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f4e584dc | 1 | /* Global common subexpression elimination/Partial redundancy elimination |
7506f491 | 2 | and global constant/copy propagation for GNU compiler. |
62e5bf5d | 3 | Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
457eeaae | 4 | 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
7506f491 | 5 | |
1322177d | 6 | This file is part of GCC. |
7506f491 | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 10 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 11 | version. |
7506f491 | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
7506f491 DE |
17 | |
18 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
7506f491 DE |
21 | |
22 | /* TODO | |
23 | - reordering of memory allocation and freeing to be more space efficient | |
24 | - do rough calc of how many regs are needed in each block, and a rough | |
25 | calc of how many regs are available in each class and use that to | |
26 | throttle back the code in cases where RTX_COST is minimal. | |
f4e584dc JL |
27 | - a store to the same address as a load does not kill the load if the |
28 | source of the store is also the destination of the load. Handling this | |
29 | allows more load motion, particularly out of loops. | |
7506f491 | 30 | |
7506f491 DE |
31 | */ |
32 | ||
33 | /* References searched while implementing this. | |
7506f491 DE |
34 | |
35 | Compilers Principles, Techniques and Tools | |
36 | Aho, Sethi, Ullman | |
37 | Addison-Wesley, 1988 | |
38 | ||
39 | Global Optimization by Suppression of Partial Redundancies | |
40 | E. Morel, C. Renvoise | |
41 | communications of the acm, Vol. 22, Num. 2, Feb. 1979 | |
42 | ||
43 | A Portable Machine-Independent Global Optimizer - Design and Measurements | |
44 | Frederick Chow | |
45 | Stanford Ph.D. thesis, Dec. 1983 | |
46 | ||
7506f491 DE |
47 | A Fast Algorithm for Code Movement Optimization |
48 | D.M. Dhamdhere | |
49 | SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988 | |
50 | ||
51 | A Solution to a Problem with Morel and Renvoise's | |
52 | Global Optimization by Suppression of Partial Redundancies | |
53 | K-H Drechsler, M.P. Stadel | |
54 | ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988 | |
55 | ||
56 | Practical Adaptation of the Global Optimization | |
57 | Algorithm of Morel and Renvoise | |
58 | D.M. Dhamdhere | |
59 | ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991 | |
60 | ||
61 | Efficiently Computing Static Single Assignment Form and the Control | |
62 | Dependence Graph | |
63 | R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck | |
64 | ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991 | |
65 | ||
7506f491 DE |
66 | Lazy Code Motion |
67 | J. Knoop, O. Ruthing, B. Steffen | |
68 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
69 | ||
70 | What's In a Region? Or Computing Control Dependence Regions in Near-Linear | |
71 | Time for Reducible Flow Control | |
72 | Thomas Ball | |
73 | ACM Letters on Programming Languages and Systems, | |
74 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
75 | ||
76 | An Efficient Representation for Sparse Sets | |
77 | Preston Briggs, Linda Torczon | |
78 | ACM Letters on Programming Languages and Systems, | |
79 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
80 | ||
81 | A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion | |
82 | K-H Drechsler, M.P. Stadel | |
83 | ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993 | |
84 | ||
85 | Partial Dead Code Elimination | |
86 | J. Knoop, O. Ruthing, B. Steffen | |
87 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
88 | ||
89 | Effective Partial Redundancy Elimination | |
90 | P. Briggs, K.D. Cooper | |
91 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
92 | ||
93 | The Program Structure Tree: Computing Control Regions in Linear Time | |
94 | R. Johnson, D. Pearson, K. Pingali | |
95 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
96 | ||
97 | Optimal Code Motion: Theory and Practice | |
98 | J. Knoop, O. Ruthing, B. Steffen | |
99 | ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994 | |
100 | ||
101 | The power of assignment motion | |
102 | J. Knoop, O. Ruthing, B. Steffen | |
103 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
104 | ||
105 | Global code motion / global value numbering | |
106 | C. Click | |
107 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
108 | ||
109 | Value Driven Redundancy Elimination | |
110 | L.T. Simpson | |
111 | Rice University Ph.D. thesis, Apr. 1996 | |
112 | ||
113 | Value Numbering | |
114 | L.T. Simpson | |
115 | Massively Scalar Compiler Project, Rice University, Sep. 1996 | |
116 | ||
117 | High Performance Compilers for Parallel Computing | |
118 | Michael Wolfe | |
119 | Addison-Wesley, 1996 | |
120 | ||
f4e584dc JL |
121 | Advanced Compiler Design and Implementation |
122 | Steven Muchnick | |
123 | Morgan Kaufmann, 1997 | |
124 | ||
a42cd965 AM |
125 | Building an Optimizing Compiler |
126 | Robert Morgan | |
127 | Digital Press, 1998 | |
128 | ||
f4e584dc JL |
129 | People wishing to speed up the code here should read: |
130 | Elimination Algorithms for Data Flow Analysis | |
131 | B.G. Ryder, M.C. Paull | |
132 | ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986 | |
133 | ||
134 | How to Analyze Large Programs Efficiently and Informatively | |
135 | D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck | |
136 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
137 | ||
7506f491 DE |
138 | People wishing to do something different can find various possibilities |
139 | in the above papers and elsewhere. | |
140 | */ | |
141 | ||
142 | #include "config.h" | |
50b2596f | 143 | #include "system.h" |
4977bab6 ZW |
144 | #include "coretypes.h" |
145 | #include "tm.h" | |
718f9c0f | 146 | #include "diagnostic-core.h" |
01198c2f | 147 | #include "toplev.h" |
7506f491 DE |
148 | |
149 | #include "rtl.h" | |
b0656d8b | 150 | #include "tree.h" |
6baf1cc8 | 151 | #include "tm_p.h" |
7506f491 DE |
152 | #include "regs.h" |
153 | #include "hard-reg-set.h" | |
154 | #include "flags.h" | |
7506f491 DE |
155 | #include "insn-config.h" |
156 | #include "recog.h" | |
157 | #include "basic-block.h" | |
50b2596f | 158 | #include "output.h" |
49ad7cfa | 159 | #include "function.h" |
589005ff | 160 | #include "expr.h" |
e7d482b9 | 161 | #include "except.h" |
fb0c0a12 | 162 | #include "ggc.h" |
f1fa37ff | 163 | #include "params.h" |
ae860ff7 | 164 | #include "cselib.h" |
d128effb | 165 | #include "intl.h" |
7506f491 | 166 | #include "obstack.h" |
27fb79ad | 167 | #include "timevar.h" |
ef330312 | 168 | #include "tree-pass.h" |
9727e468 | 169 | #include "hashtab.h" |
6fb5fa3c DB |
170 | #include "df.h" |
171 | #include "dbgcnt.h" | |
ec0a1343 | 172 | #include "target.h" |
4fa31c2a | 173 | |
f4e584dc | 174 | /* We support GCSE via Partial Redundancy Elimination. PRE optimizations |
4cad6dba | 175 | are a superset of those done by classic GCSE. |
7506f491 | 176 | |
f4e584dc | 177 | We perform the following steps: |
7506f491 | 178 | |
3906a4a1 | 179 | 1) Compute table of places where registers are set. |
7506f491 | 180 | |
3906a4a1 | 181 | 2) Perform copy/constant propagation. |
7506f491 | 182 | |
3906a4a1 | 183 | 3) Perform global cse using lazy code motion if not optimizing |
e83f4801 | 184 | for size, or code hoisting if we are. |
7506f491 | 185 | |
3906a4a1 SB |
186 | 4) Perform another pass of copy/constant propagation. Try to bypass |
187 | conditional jumps if the condition can be computed from a value of | |
188 | an incoming edge. | |
189 | ||
7506f491 DE |
190 | Two passes of copy/constant propagation are done because the first one |
191 | enables more GCSE and the second one helps to clean up the copies that | |
192 | GCSE creates. This is needed more for PRE than for Classic because Classic | |
193 | GCSE will try to use an existing register containing the common | |
194 | subexpression rather than create a new one. This is harder to do for PRE | |
195 | because of the code motion (which Classic GCSE doesn't do). | |
196 | ||
197 | Expressions we are interested in GCSE-ing are of the form | |
198 | (set (pseudo-reg) (expression)). | |
199 | Function want_to_gcse_p says what these are. | |
200 | ||
4cad6dba | 201 | In addition, expressions in REG_EQUAL notes are candidates for GCSE-ing. |
3906a4a1 | 202 | This allows PRE to hoist expressions that are expressed in multiple insns, |
4cad6dba SB |
203 | such as complex address calculations (e.g. for PIC code, or loads with a |
204 | high part and a low part). | |
3906a4a1 | 205 | |
7506f491 | 206 | PRE handles moving invariant expressions out of loops (by treating them as |
f4e584dc | 207 | partially redundant). |
7506f491 | 208 | |
7506f491 DE |
209 | ********************** |
210 | ||
211 | We used to support multiple passes but there are diminishing returns in | |
212 | doing so. The first pass usually makes 90% of the changes that are doable. | |
213 | A second pass can make a few more changes made possible by the first pass. | |
214 | Experiments show any further passes don't make enough changes to justify | |
215 | the expense. | |
216 | ||
217 | A study of spec92 using an unlimited number of passes: | |
218 | [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83, | |
219 | [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2, | |
220 | [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1 | |
221 | ||
222 | It was found doing copy propagation between each pass enables further | |
223 | substitutions. | |
224 | ||
3906a4a1 SB |
225 | This study was done before expressions in REG_EQUAL notes were added as |
226 | candidate expressions for optimization, and before the GIMPLE optimizers | |
227 | were added. Probably, multiple passes is even less efficient now than | |
228 | at the time when the study was conducted. | |
229 | ||
7506f491 | 230 | PRE is quite expensive in complicated functions because the DFA can take |
3906a4a1 | 231 | a while to converge. Hence we only perform one pass. |
7506f491 DE |
232 | |
233 | ********************** | |
234 | ||
235 | The steps for PRE are: | |
236 | ||
237 | 1) Build the hash table of expressions we wish to GCSE (expr_hash_table). | |
238 | ||
239 | 2) Perform the data flow analysis for PRE. | |
240 | ||
241 | 3) Delete the redundant instructions | |
242 | ||
243 | 4) Insert the required copies [if any] that make the partially | |
244 | redundant instructions fully redundant. | |
245 | ||
246 | 5) For other reaching expressions, insert an instruction to copy the value | |
247 | to a newly created pseudo that will reach the redundant instruction. | |
248 | ||
249 | The deletion is done first so that when we do insertions we | |
250 | know which pseudo reg to use. | |
251 | ||
252 | Various papers have argued that PRE DFA is expensive (O(n^2)) and others | |
253 | argue it is not. The number of iterations for the algorithm to converge | |
254 | is typically 2-4 so I don't view it as that expensive (relatively speaking). | |
255 | ||
4cad6dba | 256 | PRE GCSE depends heavily on the second CPROP pass to clean up the copies |
7506f491 DE |
257 | we create. To make an expression reach the place where it's redundant, |
258 | the result of the expression is copied to a new register, and the redundant | |
259 | expression is deleted by replacing it with this new register. Classic GCSE | |
260 | doesn't have this problem as much as it computes the reaching defs of | |
a3c28ba2 KH |
261 | each register in each block and thus can try to use an existing |
262 | register. */ | |
7506f491 DE |
263 | \f |
264 | /* GCSE global vars. */ | |
265 | ||
5f39ad47 SB |
266 | /* Set to non-zero if CSE should run after all GCSE optimizations are done. */ |
267 | int flag_rerun_cse_after_global_opts; | |
f4e584dc | 268 | |
7506f491 DE |
269 | /* An obstack for our working variables. */ |
270 | static struct obstack gcse_obstack; | |
271 | ||
c4c81601 | 272 | struct reg_use {rtx reg_rtx; }; |
abd535b6 | 273 | |
7506f491 DE |
274 | /* Hash table of expressions. */ |
275 | ||
276 | struct expr | |
277 | { | |
278 | /* The expression (SET_SRC for expressions, PATTERN for assignments). */ | |
279 | rtx expr; | |
280 | /* Index in the available expression bitmaps. */ | |
281 | int bitmap_index; | |
282 | /* Next entry with the same hash. */ | |
283 | struct expr *next_same_hash; | |
284 | /* List of anticipatable occurrences in basic blocks in the function. | |
285 | An "anticipatable occurrence" is one that is the first occurrence in the | |
f4e584dc JL |
286 | basic block, the operands are not modified in the basic block prior |
287 | to the occurrence and the output is not used between the start of | |
288 | the block and the occurrence. */ | |
7506f491 DE |
289 | struct occr *antic_occr; |
290 | /* List of available occurrence in basic blocks in the function. | |
291 | An "available occurrence" is one that is the last occurrence in the | |
292 | basic block and the operands are not modified by following statements in | |
293 | the basic block [including this insn]. */ | |
294 | struct occr *avail_occr; | |
295 | /* Non-null if the computation is PRE redundant. | |
296 | The value is the newly created pseudo-reg to record a copy of the | |
297 | expression in all the places that reach the redundant copy. */ | |
298 | rtx reaching_reg; | |
299 | }; | |
300 | ||
301 | /* Occurrence of an expression. | |
302 | There is one per basic block. If a pattern appears more than once the | |
303 | last appearance is used [or first for anticipatable expressions]. */ | |
304 | ||
305 | struct occr | |
306 | { | |
307 | /* Next occurrence of this expression. */ | |
308 | struct occr *next; | |
309 | /* The insn that computes the expression. */ | |
310 | rtx insn; | |
cc2902df | 311 | /* Nonzero if this [anticipatable] occurrence has been deleted. */ |
7506f491 | 312 | char deleted_p; |
cc2902df | 313 | /* Nonzero if this [available] occurrence has been copied to |
7506f491 DE |
314 | reaching_reg. */ |
315 | /* ??? This is mutually exclusive with deleted_p, so they could share | |
316 | the same byte. */ | |
317 | char copied_p; | |
318 | }; | |
319 | ||
320 | /* Expression and copy propagation hash tables. | |
321 | Each hash table is an array of buckets. | |
322 | ??? It is known that if it were an array of entries, structure elements | |
323 | `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is | |
324 | not clear whether in the final analysis a sufficient amount of memory would | |
325 | be saved as the size of the available expression bitmaps would be larger | |
326 | [one could build a mapping table without holes afterwards though]. | |
c4c81601 | 327 | Someday I'll perform the computation and figure it out. */ |
7506f491 | 328 | |
7e5487a2 | 329 | struct hash_table_d |
02280659 ZD |
330 | { |
331 | /* The table itself. | |
332 | This is an array of `expr_hash_table_size' elements. */ | |
333 | struct expr **table; | |
334 | ||
335 | /* Size of the hash table, in elements. */ | |
336 | unsigned int size; | |
2e653e39 | 337 | |
02280659 ZD |
338 | /* Number of hash table elements. */ |
339 | unsigned int n_elems; | |
7506f491 | 340 | |
02280659 ZD |
341 | /* Whether the table is expression of copy propagation one. */ |
342 | int set_p; | |
343 | }; | |
c4c81601 | 344 | |
02280659 | 345 | /* Expression hash table. */ |
7e5487a2 | 346 | static struct hash_table_d expr_hash_table; |
02280659 ZD |
347 | |
348 | /* Copy propagation hash table. */ | |
7e5487a2 | 349 | static struct hash_table_d set_hash_table; |
7506f491 | 350 | |
a13d4ebf | 351 | /* This is a list of expressions which are MEMs and will be used by load |
589005ff | 352 | or store motion. |
a13d4ebf | 353 | Load motion tracks MEMs which aren't killed by |
454ff5cb | 354 | anything except itself. (i.e., loads and stores to a single location). |
589005ff | 355 | We can then allow movement of these MEM refs with a little special |
a13d4ebf AM |
356 | allowance. (all stores copy the same value to the reaching reg used |
357 | for the loads). This means all values used to store into memory must have | |
589005ff | 358 | no side effects so we can re-issue the setter value. |
a13d4ebf AM |
359 | Store Motion uses this structure as an expression table to track stores |
360 | which look interesting, and might be moveable towards the exit block. */ | |
361 | ||
362 | struct ls_expr | |
363 | { | |
364 | struct expr * expr; /* Gcse expression reference for LM. */ | |
365 | rtx pattern; /* Pattern of this mem. */ | |
47a3dae1 | 366 | rtx pattern_regs; /* List of registers mentioned by the mem. */ |
aaa4ca30 AJ |
367 | rtx loads; /* INSN list of loads seen. */ |
368 | rtx stores; /* INSN list of stores seen. */ | |
a13d4ebf AM |
369 | struct ls_expr * next; /* Next in the list. */ |
370 | int invalid; /* Invalid for some reason. */ | |
371 | int index; /* If it maps to a bitmap index. */ | |
b58b21d5 | 372 | unsigned int hash_index; /* Index when in a hash table. */ |
a13d4ebf AM |
373 | rtx reaching_reg; /* Register to use when re-writing. */ |
374 | }; | |
375 | ||
fbef91d8 RS |
376 | /* Array of implicit set patterns indexed by basic block index. */ |
377 | static rtx *implicit_sets; | |
378 | ||
a13d4ebf AM |
379 | /* Head of the list of load/store memory refs. */ |
380 | static struct ls_expr * pre_ldst_mems = NULL; | |
381 | ||
9727e468 RG |
382 | /* Hashtable for the load/store memory refs. */ |
383 | static htab_t pre_ldst_table = NULL; | |
384 | ||
7506f491 DE |
385 | /* Bitmap containing one bit for each register in the program. |
386 | Used when performing GCSE to track which registers have been set since | |
387 | the start of the basic block. */ | |
73991d6a | 388 | static regset reg_set_bitmap; |
7506f491 | 389 | |
a13d4ebf AM |
390 | /* Array, indexed by basic block number for a list of insns which modify |
391 | memory within that block. */ | |
392 | static rtx * modify_mem_list; | |
0516f6fe | 393 | static bitmap modify_mem_list_set; |
a13d4ebf AM |
394 | |
395 | /* This array parallels modify_mem_list, but is kept canonicalized. */ | |
396 | static rtx * canon_modify_mem_list; | |
0516f6fe | 397 | |
aa47fcfa JL |
398 | /* Bitmap indexed by block numbers to record which blocks contain |
399 | function calls. */ | |
400 | static bitmap blocks_with_calls; | |
401 | ||
7506f491 DE |
402 | /* Various variables for statistics gathering. */ |
403 | ||
404 | /* Memory used in a pass. | |
405 | This isn't intended to be absolutely precise. Its intent is only | |
406 | to keep an eye on memory usage. */ | |
407 | static int bytes_used; | |
c4c81601 | 408 | |
7506f491 DE |
409 | /* GCSE substitutions made. */ |
410 | static int gcse_subst_count; | |
411 | /* Number of copy instructions created. */ | |
412 | static int gcse_create_count; | |
27fb79ad SB |
413 | /* Number of local constants propagated. */ |
414 | static int local_const_prop_count; | |
0fa2e4df | 415 | /* Number of local copies propagated. */ |
27fb79ad SB |
416 | static int local_copy_prop_count; |
417 | /* Number of global constants propagated. */ | |
418 | static int global_const_prop_count; | |
0fa2e4df | 419 | /* Number of global copies propagated. */ |
27fb79ad | 420 | static int global_copy_prop_count; |
7506f491 | 421 | \f |
e83f4801 | 422 | /* For available exprs */ |
df35c271 | 423 | static sbitmap *ae_kill; |
7506f491 | 424 | \f |
1d088dee | 425 | static void compute_can_copy (void); |
9fe15a12 KG |
426 | static void *gmalloc (size_t) ATTRIBUTE_MALLOC; |
427 | static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC; | |
703ad42b | 428 | static void *gcse_alloc (unsigned long); |
eb232f4e | 429 | static void alloc_gcse_mem (void); |
1d088dee | 430 | static void free_gcse_mem (void); |
7e5487a2 ILT |
431 | static void hash_scan_insn (rtx, struct hash_table_d *); |
432 | static void hash_scan_set (rtx, rtx, struct hash_table_d *); | |
433 | static void hash_scan_clobber (rtx, rtx, struct hash_table_d *); | |
434 | static void hash_scan_call (rtx, rtx, struct hash_table_d *); | |
1d088dee | 435 | static int want_to_gcse_p (rtx); |
ed7a4b4b KG |
436 | static bool gcse_constant_p (const_rtx); |
437 | static int oprs_unchanged_p (const_rtx, const_rtx, int); | |
438 | static int oprs_anticipatable_p (const_rtx, const_rtx); | |
439 | static int oprs_available_p (const_rtx, const_rtx); | |
1d088dee | 440 | static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int, |
7e5487a2 ILT |
441 | struct hash_table_d *); |
442 | static void insert_set_in_table (rtx, rtx, struct hash_table_d *); | |
ed7a4b4b | 443 | static unsigned int hash_expr (const_rtx, enum machine_mode, int *, int); |
1d088dee | 444 | static unsigned int hash_set (int, int); |
ed7a4b4b | 445 | static int expr_equiv_p (const_rtx, const_rtx); |
1d088dee AJ |
446 | static void record_last_reg_set_info (rtx, int); |
447 | static void record_last_mem_set_info (rtx); | |
7bc980e1 | 448 | static void record_last_set_info (rtx, const_rtx, void *); |
7e5487a2 | 449 | static void compute_hash_table (struct hash_table_d *); |
b5b8b0ac | 450 | static void alloc_hash_table (struct hash_table_d *, int); |
7e5487a2 ILT |
451 | static void free_hash_table (struct hash_table_d *); |
452 | static void compute_hash_table_work (struct hash_table_d *); | |
453 | static void dump_hash_table (FILE *, const char *, struct hash_table_d *); | |
454 | static struct expr *lookup_set (unsigned int, struct hash_table_d *); | |
1d088dee AJ |
455 | static struct expr *next_set (unsigned int, struct expr *); |
456 | static void reset_opr_set_tables (void); | |
ed7a4b4b | 457 | static int oprs_not_set_p (const_rtx, const_rtx); |
1d088dee AJ |
458 | static void mark_call (rtx); |
459 | static void mark_set (rtx, rtx); | |
460 | static void mark_clobber (rtx, rtx); | |
461 | static void mark_oprs_set (rtx); | |
462 | static void alloc_cprop_mem (int, int); | |
463 | static void free_cprop_mem (void); | |
ed7a4b4b | 464 | static void compute_transp (const_rtx, int, sbitmap *, int); |
1d088dee AJ |
465 | static void compute_transpout (void); |
466 | static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *, | |
7e5487a2 | 467 | struct hash_table_d *); |
1d088dee AJ |
468 | static void compute_cprop_data (void); |
469 | static void find_used_regs (rtx *, void *); | |
470 | static int try_replace_reg (rtx, rtx, rtx); | |
471 | static struct expr *find_avail_set (int, rtx); | |
472 | static int cprop_jump (basic_block, rtx, rtx, rtx, rtx); | |
7bc980e1 | 473 | static void mems_conflict_for_gcse_p (rtx, const_rtx, void *); |
ed7a4b4b | 474 | static int load_killed_in_block_p (const_basic_block, int, const_rtx, int); |
7bc980e1 | 475 | static void canon_list_insert (rtx, const_rtx, void *); |
5f39ad47 | 476 | static int cprop_insn (rtx); |
1d088dee | 477 | static void find_implicit_sets (void); |
5f39ad47 SB |
478 | static int one_cprop_pass (void); |
479 | static bool constprop_register (rtx, rtx, rtx); | |
1d088dee | 480 | static struct expr *find_bypass_set (int, int); |
ed7a4b4b | 481 | static bool reg_killed_on_edge (const_rtx, const_edge); |
1d088dee AJ |
482 | static int bypass_block (basic_block, rtx, rtx); |
483 | static int bypass_conditional_jumps (void); | |
484 | static void alloc_pre_mem (int, int); | |
485 | static void free_pre_mem (void); | |
486 | static void compute_pre_data (void); | |
487 | static int pre_expr_reaches_here_p (basic_block, struct expr *, | |
488 | basic_block); | |
6fb5fa3c | 489 | static void insert_insn_end_basic_block (struct expr *, basic_block, int); |
1d088dee AJ |
490 | static void pre_insert_copy_insn (struct expr *, rtx); |
491 | static void pre_insert_copies (void); | |
492 | static int pre_delete (void); | |
493 | static int pre_gcse (void); | |
5f39ad47 | 494 | static int one_pre_gcse_pass (void); |
1d088dee AJ |
495 | static void add_label_notes (rtx, rtx); |
496 | static void alloc_code_hoist_mem (int, int); | |
497 | static void free_code_hoist_mem (void); | |
498 | static void compute_code_hoist_vbeinout (void); | |
499 | static void compute_code_hoist_data (void); | |
500 | static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *); | |
5f39ad47 | 501 | static int hoist_code (void); |
1d088dee | 502 | static int one_code_hoisting_pass (void); |
1d088dee AJ |
503 | static rtx process_insert_insn (struct expr *); |
504 | static int pre_edge_insert (struct edge_list *, struct expr **); | |
1d088dee AJ |
505 | static int pre_expr_reaches_here_p_work (basic_block, struct expr *, |
506 | basic_block, char *); | |
507 | static struct ls_expr * ldst_entry (rtx); | |
508 | static void free_ldst_entry (struct ls_expr *); | |
509 | static void free_ldst_mems (void); | |
510 | static void print_ldst_list (FILE *); | |
511 | static struct ls_expr * find_rtx_in_ldst (rtx); | |
1d088dee AJ |
512 | static inline struct ls_expr * first_ls_expr (void); |
513 | static inline struct ls_expr * next_ls_expr (struct ls_expr *); | |
ed7a4b4b | 514 | static int simple_mem (const_rtx); |
1d088dee AJ |
515 | static void invalidate_any_buried_refs (rtx); |
516 | static void compute_ld_motion_mems (void); | |
517 | static void trim_ld_motion_mems (void); | |
518 | static void update_ld_motion_stores (struct expr *); | |
1d088dee AJ |
519 | static void free_insn_expr_list_list (rtx *); |
520 | static void clear_modify_mem_tables (void); | |
521 | static void free_modify_mem_tables (void); | |
522 | static rtx gcse_emit_move_after (rtx, rtx, rtx); | |
523 | static void local_cprop_find_used_regs (rtx *, void *); | |
5f39ad47 SB |
524 | static bool do_local_cprop (rtx, rtx); |
525 | static int local_cprop_pass (void); | |
d128effb | 526 | static bool is_too_expensive (const char *); |
1b4572a8 KG |
527 | |
528 | #define GNEW(T) ((T *) gmalloc (sizeof (T))) | |
529 | #define GCNEW(T) ((T *) gcalloc (1, sizeof (T))) | |
530 | ||
531 | #define GNEWVEC(T, N) ((T *) gmalloc (sizeof (T) * (N))) | |
532 | #define GCNEWVEC(T, N) ((T *) gcalloc ((N), sizeof (T))) | |
1b4572a8 KG |
533 | |
534 | #define GNEWVAR(T, S) ((T *) gmalloc ((S))) | |
535 | #define GCNEWVAR(T, S) ((T *) gcalloc (1, (S))) | |
1b4572a8 KG |
536 | |
537 | #define GOBNEW(T) ((T *) gcse_alloc (sizeof (T))) | |
538 | #define GOBNEWVAR(T, S) ((T *) gcse_alloc ((S))) | |
7506f491 | 539 | \f |
7506f491 DE |
540 | /* Misc. utilities. */ |
541 | ||
773eae39 EB |
542 | /* Nonzero for each mode that supports (set (reg) (reg)). |
543 | This is trivially true for integer and floating point values. | |
544 | It may or may not be true for condition codes. */ | |
545 | static char can_copy[(int) NUM_MACHINE_MODES]; | |
546 | ||
7506f491 DE |
547 | /* Compute which modes support reg/reg copy operations. */ |
548 | ||
549 | static void | |
1d088dee | 550 | compute_can_copy (void) |
7506f491 DE |
551 | { |
552 | int i; | |
50b2596f | 553 | #ifndef AVOID_CCMODE_COPIES |
8e42ace1 | 554 | rtx reg, insn; |
50b2596f | 555 | #endif |
773eae39 | 556 | memset (can_copy, 0, NUM_MACHINE_MODES); |
7506f491 DE |
557 | |
558 | start_sequence (); | |
559 | for (i = 0; i < NUM_MACHINE_MODES; i++) | |
c4c81601 RK |
560 | if (GET_MODE_CLASS (i) == MODE_CC) |
561 | { | |
7506f491 | 562 | #ifdef AVOID_CCMODE_COPIES |
773eae39 | 563 | can_copy[i] = 0; |
7506f491 | 564 | #else |
c4c81601 RK |
565 | reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1); |
566 | insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg)); | |
9714cf43 | 567 | if (recog (PATTERN (insn), insn, NULL) >= 0) |
773eae39 | 568 | can_copy[i] = 1; |
7506f491 | 569 | #endif |
c4c81601 | 570 | } |
141b5810 | 571 | else |
773eae39 | 572 | can_copy[i] = 1; |
c4c81601 | 573 | |
7506f491 | 574 | end_sequence (); |
7506f491 | 575 | } |
773eae39 EB |
576 | |
577 | /* Returns whether the mode supports reg/reg copy operations. */ | |
578 | ||
579 | bool | |
1d088dee | 580 | can_copy_p (enum machine_mode mode) |
773eae39 EB |
581 | { |
582 | static bool can_copy_init_p = false; | |
583 | ||
584 | if (! can_copy_init_p) | |
585 | { | |
586 | compute_can_copy (); | |
587 | can_copy_init_p = true; | |
588 | } | |
589 | ||
590 | return can_copy[mode] != 0; | |
591 | } | |
4a81774c | 592 | |
7506f491 DE |
593 | \f |
594 | /* Cover function to xmalloc to record bytes allocated. */ | |
595 | ||
703ad42b | 596 | static void * |
4ac11022 | 597 | gmalloc (size_t size) |
7506f491 DE |
598 | { |
599 | bytes_used += size; | |
600 | return xmalloc (size); | |
601 | } | |
602 | ||
9fe15a12 KG |
603 | /* Cover function to xcalloc to record bytes allocated. */ |
604 | ||
605 | static void * | |
606 | gcalloc (size_t nelem, size_t elsize) | |
607 | { | |
608 | bytes_used += nelem * elsize; | |
609 | return xcalloc (nelem, elsize); | |
610 | } | |
611 | ||
77bbd421 | 612 | /* Cover function to obstack_alloc. */ |
7506f491 | 613 | |
703ad42b | 614 | static void * |
1d088dee | 615 | gcse_alloc (unsigned long size) |
7506f491 | 616 | { |
77bbd421 | 617 | bytes_used += size; |
703ad42b | 618 | return obstack_alloc (&gcse_obstack, size); |
7506f491 DE |
619 | } |
620 | ||
4a81774c | 621 | /* Allocate memory for the reg/memory set tracking tables. |
7506f491 DE |
622 | This is called at the start of each pass. */ |
623 | ||
624 | static void | |
eb232f4e | 625 | alloc_gcse_mem (void) |
7506f491 | 626 | { |
7506f491 | 627 | /* Allocate vars to track sets of regs. */ |
7a8cba34 | 628 | reg_set_bitmap = ALLOC_REG_SET (NULL); |
7506f491 | 629 | |
a13d4ebf AM |
630 | /* Allocate array to keep a list of insns which modify memory in each |
631 | basic block. */ | |
1b4572a8 KG |
632 | modify_mem_list = GCNEWVEC (rtx, last_basic_block); |
633 | canon_modify_mem_list = GCNEWVEC (rtx, last_basic_block); | |
8bdbfff5 NS |
634 | modify_mem_list_set = BITMAP_ALLOC (NULL); |
635 | blocks_with_calls = BITMAP_ALLOC (NULL); | |
7506f491 DE |
636 | } |
637 | ||
638 | /* Free memory allocated by alloc_gcse_mem. */ | |
639 | ||
640 | static void | |
1d088dee | 641 | free_gcse_mem (void) |
7506f491 | 642 | { |
73991d6a | 643 | free_modify_mem_tables (); |
8bdbfff5 NS |
644 | BITMAP_FREE (modify_mem_list_set); |
645 | BITMAP_FREE (blocks_with_calls); | |
7506f491 | 646 | } |
b5ce41ff JL |
647 | \f |
648 | /* Compute the local properties of each recorded expression. | |
c4c81601 RK |
649 | |
650 | Local properties are those that are defined by the block, irrespective of | |
651 | other blocks. | |
b5ce41ff JL |
652 | |
653 | An expression is transparent in a block if its operands are not modified | |
654 | in the block. | |
655 | ||
656 | An expression is computed (locally available) in a block if it is computed | |
657 | at least once and expression would contain the same value if the | |
658 | computation was moved to the end of the block. | |
659 | ||
660 | An expression is locally anticipatable in a block if it is computed at | |
661 | least once and expression would contain the same value if the computation | |
662 | was moved to the beginning of the block. | |
663 | ||
c4c81601 RK |
664 | We call this routine for cprop, pre and code hoisting. They all compute |
665 | basically the same information and thus can easily share this code. | |
7506f491 | 666 | |
c4c81601 RK |
667 | TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local |
668 | properties. If NULL, then it is not necessary to compute or record that | |
669 | particular property. | |
b5ce41ff | 670 | |
02280659 ZD |
671 | TABLE controls which hash table to look at. If it is set hash table, |
672 | additionally, TRANSP is computed as ~TRANSP, since this is really cprop's | |
c4c81601 | 673 | ABSALTERED. */ |
589005ff | 674 | |
b5ce41ff | 675 | static void |
7b1b4aed | 676 | compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc, |
7e5487a2 | 677 | struct hash_table_d *table) |
b5ce41ff | 678 | { |
02280659 | 679 | unsigned int i; |
589005ff | 680 | |
b5ce41ff JL |
681 | /* Initialize any bitmaps that were passed in. */ |
682 | if (transp) | |
695ab36a | 683 | { |
02280659 | 684 | if (table->set_p) |
d55bc081 | 685 | sbitmap_vector_zero (transp, last_basic_block); |
695ab36a | 686 | else |
d55bc081 | 687 | sbitmap_vector_ones (transp, last_basic_block); |
695ab36a | 688 | } |
c4c81601 | 689 | |
b5ce41ff | 690 | if (comp) |
d55bc081 | 691 | sbitmap_vector_zero (comp, last_basic_block); |
b5ce41ff | 692 | if (antloc) |
d55bc081 | 693 | sbitmap_vector_zero (antloc, last_basic_block); |
b5ce41ff | 694 | |
02280659 | 695 | for (i = 0; i < table->size; i++) |
7506f491 | 696 | { |
b5ce41ff JL |
697 | struct expr *expr; |
698 | ||
02280659 | 699 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) |
b5ce41ff | 700 | { |
b5ce41ff | 701 | int indx = expr->bitmap_index; |
c4c81601 | 702 | struct occr *occr; |
b5ce41ff JL |
703 | |
704 | /* The expression is transparent in this block if it is not killed. | |
705 | We start by assuming all are transparent [none are killed], and | |
706 | then reset the bits for those that are. */ | |
b5ce41ff | 707 | if (transp) |
02280659 | 708 | compute_transp (expr->expr, indx, transp, table->set_p); |
b5ce41ff JL |
709 | |
710 | /* The occurrences recorded in antic_occr are exactly those that | |
cc2902df | 711 | we want to set to nonzero in ANTLOC. */ |
b5ce41ff | 712 | if (antloc) |
c4c81601 RK |
713 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
714 | { | |
b0de17ef | 715 | SET_BIT (antloc[BLOCK_FOR_INSN (occr->insn)->index], indx); |
b5ce41ff | 716 | |
c4c81601 RK |
717 | /* While we're scanning the table, this is a good place to |
718 | initialize this. */ | |
719 | occr->deleted_p = 0; | |
720 | } | |
b5ce41ff JL |
721 | |
722 | /* The occurrences recorded in avail_occr are exactly those that | |
cc2902df | 723 | we want to set to nonzero in COMP. */ |
b5ce41ff | 724 | if (comp) |
c4c81601 RK |
725 | for (occr = expr->avail_occr; occr != NULL; occr = occr->next) |
726 | { | |
b0de17ef | 727 | SET_BIT (comp[BLOCK_FOR_INSN (occr->insn)->index], indx); |
b5ce41ff | 728 | |
c4c81601 RK |
729 | /* While we're scanning the table, this is a good place to |
730 | initialize this. */ | |
731 | occr->copied_p = 0; | |
732 | } | |
b5ce41ff JL |
733 | |
734 | /* While we're scanning the table, this is a good place to | |
735 | initialize this. */ | |
736 | expr->reaching_reg = 0; | |
737 | } | |
7506f491 | 738 | } |
7506f491 DE |
739 | } |
740 | \f | |
7506f491 DE |
741 | /* Hash table support. */ |
742 | ||
80c29cc4 RZ |
743 | struct reg_avail_info |
744 | { | |
e0082a72 | 745 | basic_block last_bb; |
80c29cc4 RZ |
746 | int first_set; |
747 | int last_set; | |
748 | }; | |
749 | ||
750 | static struct reg_avail_info *reg_avail_info; | |
e0082a72 | 751 | static basic_block current_bb; |
7506f491 | 752 | |
7506f491 | 753 | |
fb0c0a12 RK |
754 | /* See whether X, the source of a set, is something we want to consider for |
755 | GCSE. */ | |
7506f491 DE |
756 | |
757 | static int | |
1d088dee | 758 | want_to_gcse_p (rtx x) |
7506f491 | 759 | { |
3d8504ac RS |
760 | #ifdef STACK_REGS |
761 | /* On register stack architectures, don't GCSE constants from the | |
762 | constant pool, as the benefits are often swamped by the overhead | |
763 | of shuffling the register stack between basic blocks. */ | |
764 | if (IS_STACK_MODE (GET_MODE (x))) | |
765 | x = avoid_constant_pool_reference (x); | |
766 | #endif | |
767 | ||
c4c81601 | 768 | switch (GET_CODE (x)) |
7506f491 DE |
769 | { |
770 | case REG: | |
771 | case SUBREG: | |
772 | case CONST_INT: | |
773 | case CONST_DOUBLE: | |
091a3ac7 | 774 | case CONST_FIXED: |
69ef87e2 | 775 | case CONST_VECTOR: |
7506f491 DE |
776 | case CALL: |
777 | return 0; | |
778 | ||
779 | default: | |
df35c271 | 780 | return can_assign_to_reg_without_clobbers_p (x); |
7506f491 | 781 | } |
1707bafa RS |
782 | } |
783 | ||
df35c271 | 784 | /* Used internally by can_assign_to_reg_without_clobbers_p. */ |
1707bafa RS |
785 | |
786 | static GTY(()) rtx test_insn; | |
787 | ||
df35c271 SB |
788 | /* Return true if we can assign X to a pseudo register such that the |
789 | resulting insn does not result in clobbering a hard register as a | |
790 | side-effect. | |
ec0a1343 JB |
791 | |
792 | Additionally, if the target requires it, check that the resulting insn | |
793 | can be copied. If it cannot, this means that X is special and probably | |
794 | has hidden side-effects we don't want to mess with. | |
795 | ||
df35c271 SB |
796 | This function is typically used by code motion passes, to verify |
797 | that it is safe to insert an insn without worrying about clobbering | |
798 | maybe live hard regs. */ | |
1707bafa | 799 | |
df35c271 SB |
800 | bool |
801 | can_assign_to_reg_without_clobbers_p (rtx x) | |
1707bafa RS |
802 | { |
803 | int num_clobbers = 0; | |
804 | int icode; | |
7506f491 | 805 | |
fb0c0a12 RK |
806 | /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */ |
807 | if (general_operand (x, GET_MODE (x))) | |
808 | return 1; | |
809 | else if (GET_MODE (x) == VOIDmode) | |
810 | return 0; | |
811 | ||
812 | /* Otherwise, check if we can make a valid insn from it. First initialize | |
813 | our test insn if we haven't already. */ | |
814 | if (test_insn == 0) | |
815 | { | |
816 | test_insn | |
817 | = make_insn_raw (gen_rtx_SET (VOIDmode, | |
818 | gen_rtx_REG (word_mode, | |
819 | FIRST_PSEUDO_REGISTER * 2), | |
820 | const0_rtx)); | |
821 | NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0; | |
fb0c0a12 RK |
822 | } |
823 | ||
824 | /* Now make an insn like the one we would make when GCSE'ing and see if | |
825 | valid. */ | |
826 | PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x)); | |
827 | SET_SRC (PATTERN (test_insn)) = x; | |
b8698a0f | 828 | |
ec0a1343 JB |
829 | icode = recog (PATTERN (test_insn), test_insn, &num_clobbers); |
830 | if (icode < 0) | |
831 | return false; | |
b8698a0f | 832 | |
ec0a1343 JB |
833 | if (num_clobbers > 0 && added_clobbers_hard_reg_p (icode)) |
834 | return false; | |
b8698a0f | 835 | |
ec0a1343 JB |
836 | if (targetm.cannot_copy_insn_p && targetm.cannot_copy_insn_p (test_insn)) |
837 | return false; | |
b8698a0f | 838 | |
ec0a1343 | 839 | return true; |
7506f491 DE |
840 | } |
841 | ||
cc2902df | 842 | /* Return nonzero if the operands of expression X are unchanged from the |
7506f491 DE |
843 | start of INSN's basic block up to but not including INSN (if AVAIL_P == 0), |
844 | or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */ | |
845 | ||
846 | static int | |
ed7a4b4b | 847 | oprs_unchanged_p (const_rtx x, const_rtx insn, int avail_p) |
7506f491 | 848 | { |
c4c81601 | 849 | int i, j; |
7506f491 | 850 | enum rtx_code code; |
6f7d635c | 851 | const char *fmt; |
7506f491 | 852 | |
7506f491 DE |
853 | if (x == 0) |
854 | return 1; | |
855 | ||
856 | code = GET_CODE (x); | |
857 | switch (code) | |
858 | { | |
859 | case REG: | |
80c29cc4 RZ |
860 | { |
861 | struct reg_avail_info *info = ®_avail_info[REGNO (x)]; | |
862 | ||
863 | if (info->last_bb != current_bb) | |
864 | return 1; | |
589005ff | 865 | if (avail_p) |
4a81774c | 866 | return info->last_set < DF_INSN_LUID (insn); |
80c29cc4 | 867 | else |
4a81774c | 868 | return info->first_set >= DF_INSN_LUID (insn); |
80c29cc4 | 869 | } |
7506f491 DE |
870 | |
871 | case MEM: | |
4a81774c | 872 | if (load_killed_in_block_p (current_bb, DF_INSN_LUID (insn), |
a13d4ebf AM |
873 | x, avail_p)) |
874 | return 0; | |
7506f491 | 875 | else |
c4c81601 | 876 | return oprs_unchanged_p (XEXP (x, 0), insn, avail_p); |
7506f491 DE |
877 | |
878 | case PRE_DEC: | |
879 | case PRE_INC: | |
880 | case POST_DEC: | |
881 | case POST_INC: | |
4b983fdc RH |
882 | case PRE_MODIFY: |
883 | case POST_MODIFY: | |
7506f491 DE |
884 | return 0; |
885 | ||
886 | case PC: | |
887 | case CC0: /*FIXME*/ | |
888 | case CONST: | |
889 | case CONST_INT: | |
890 | case CONST_DOUBLE: | |
091a3ac7 | 891 | case CONST_FIXED: |
69ef87e2 | 892 | case CONST_VECTOR: |
7506f491 DE |
893 | case SYMBOL_REF: |
894 | case LABEL_REF: | |
895 | case ADDR_VEC: | |
896 | case ADDR_DIFF_VEC: | |
897 | return 1; | |
898 | ||
899 | default: | |
900 | break; | |
901 | } | |
902 | ||
c4c81601 | 903 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
904 | { |
905 | if (fmt[i] == 'e') | |
906 | { | |
c4c81601 RK |
907 | /* If we are about to do the last recursive call needed at this |
908 | level, change it into iteration. This function is called enough | |
909 | to be worth it. */ | |
7506f491 | 910 | if (i == 0) |
c4c81601 RK |
911 | return oprs_unchanged_p (XEXP (x, i), insn, avail_p); |
912 | ||
913 | else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p)) | |
7506f491 DE |
914 | return 0; |
915 | } | |
916 | else if (fmt[i] == 'E') | |
c4c81601 RK |
917 | for (j = 0; j < XVECLEN (x, i); j++) |
918 | if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p)) | |
919 | return 0; | |
7506f491 DE |
920 | } |
921 | ||
922 | return 1; | |
923 | } | |
924 | ||
a13d4ebf AM |
925 | /* Used for communication between mems_conflict_for_gcse_p and |
926 | load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a | |
927 | conflict between two memory references. */ | |
928 | static int gcse_mems_conflict_p; | |
929 | ||
930 | /* Used for communication between mems_conflict_for_gcse_p and | |
931 | load_killed_in_block_p. A memory reference for a load instruction, | |
932 | mems_conflict_for_gcse_p will see if a memory store conflicts with | |
933 | this memory load. */ | |
ed7a4b4b | 934 | static const_rtx gcse_mem_operand; |
a13d4ebf AM |
935 | |
936 | /* DEST is the output of an instruction. If it is a memory reference, and | |
937 | possibly conflicts with the load found in gcse_mem_operand, then set | |
938 | gcse_mems_conflict_p to a nonzero value. */ | |
939 | ||
940 | static void | |
7bc980e1 | 941 | mems_conflict_for_gcse_p (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, |
1d088dee | 942 | void *data ATTRIBUTE_UNUSED) |
a13d4ebf AM |
943 | { |
944 | while (GET_CODE (dest) == SUBREG | |
945 | || GET_CODE (dest) == ZERO_EXTRACT | |
a13d4ebf AM |
946 | || GET_CODE (dest) == STRICT_LOW_PART) |
947 | dest = XEXP (dest, 0); | |
948 | ||
949 | /* If DEST is not a MEM, then it will not conflict with the load. Note | |
950 | that function calls are assumed to clobber memory, but are handled | |
951 | elsewhere. */ | |
7b1b4aed | 952 | if (! MEM_P (dest)) |
a13d4ebf | 953 | return; |
aaa4ca30 | 954 | |
a13d4ebf | 955 | /* If we are setting a MEM in our list of specially recognized MEMs, |
589005ff KH |
956 | don't mark as killed this time. */ |
957 | ||
47a3dae1 | 958 | if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL) |
a13d4ebf AM |
959 | { |
960 | if (!find_rtx_in_ldst (dest)) | |
961 | gcse_mems_conflict_p = 1; | |
962 | return; | |
963 | } | |
aaa4ca30 | 964 | |
a13d4ebf AM |
965 | if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand, |
966 | rtx_addr_varies_p)) | |
967 | gcse_mems_conflict_p = 1; | |
968 | } | |
969 | ||
970 | /* Return nonzero if the expression in X (a memory reference) is killed | |
4a81774c | 971 | in block BB before or after the insn with the LUID in UID_LIMIT. |
a13d4ebf AM |
972 | AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills |
973 | before UID_LIMIT. | |
974 | ||
975 | To check the entire block, set UID_LIMIT to max_uid + 1 and | |
976 | AVAIL_P to 0. */ | |
977 | ||
978 | static int | |
ed7a4b4b | 979 | load_killed_in_block_p (const_basic_block bb, int uid_limit, const_rtx x, int avail_p) |
a13d4ebf | 980 | { |
0b17ab2f | 981 | rtx list_entry = modify_mem_list[bb->index]; |
16c5b95d MH |
982 | |
983 | /* If this is a readonly then we aren't going to be changing it. */ | |
984 | if (MEM_READONLY_P (x)) | |
985 | return 0; | |
986 | ||
a13d4ebf AM |
987 | while (list_entry) |
988 | { | |
989 | rtx setter; | |
990 | /* Ignore entries in the list that do not apply. */ | |
991 | if ((avail_p | |
4a81774c | 992 | && DF_INSN_LUID (XEXP (list_entry, 0)) < uid_limit) |
a13d4ebf | 993 | || (! avail_p |
4a81774c | 994 | && DF_INSN_LUID (XEXP (list_entry, 0)) > uid_limit)) |
a13d4ebf AM |
995 | { |
996 | list_entry = XEXP (list_entry, 1); | |
997 | continue; | |
998 | } | |
999 | ||
1000 | setter = XEXP (list_entry, 0); | |
1001 | ||
1002 | /* If SETTER is a call everything is clobbered. Note that calls | |
1003 | to pure functions are never put on the list, so we need not | |
1004 | worry about them. */ | |
7b1b4aed | 1005 | if (CALL_P (setter)) |
a13d4ebf AM |
1006 | return 1; |
1007 | ||
1008 | /* SETTER must be an INSN of some kind that sets memory. Call | |
589005ff | 1009 | note_stores to examine each hunk of memory that is modified. |
a13d4ebf AM |
1010 | |
1011 | The note_stores interface is pretty limited, so we have to | |
1012 | communicate via global variables. Yuk. */ | |
1013 | gcse_mem_operand = x; | |
1014 | gcse_mems_conflict_p = 0; | |
1015 | note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL); | |
1016 | if (gcse_mems_conflict_p) | |
1017 | return 1; | |
1018 | list_entry = XEXP (list_entry, 1); | |
1019 | } | |
1020 | return 0; | |
1021 | } | |
1022 | ||
cc2902df | 1023 | /* Return nonzero if the operands of expression X are unchanged from |
7506f491 DE |
1024 | the start of INSN's basic block up to but not including INSN. */ |
1025 | ||
1026 | static int | |
ed7a4b4b | 1027 | oprs_anticipatable_p (const_rtx x, const_rtx insn) |
7506f491 DE |
1028 | { |
1029 | return oprs_unchanged_p (x, insn, 0); | |
1030 | } | |
1031 | ||
cc2902df | 1032 | /* Return nonzero if the operands of expression X are unchanged from |
7506f491 DE |
1033 | INSN to the end of INSN's basic block. */ |
1034 | ||
1035 | static int | |
ed7a4b4b | 1036 | oprs_available_p (const_rtx x, const_rtx insn) |
7506f491 DE |
1037 | { |
1038 | return oprs_unchanged_p (x, insn, 1); | |
1039 | } | |
1040 | ||
1041 | /* Hash expression X. | |
c4c81601 RK |
1042 | |
1043 | MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean | |
1044 | indicating if a volatile operand is found or if the expression contains | |
b58b21d5 | 1045 | something we don't want to insert in the table. HASH_TABLE_SIZE is |
0516f6fe | 1046 | the current size of the hash table to be probed. */ |
7506f491 DE |
1047 | |
1048 | static unsigned int | |
ed7a4b4b | 1049 | hash_expr (const_rtx x, enum machine_mode mode, int *do_not_record_p, |
b58b21d5 | 1050 | int hash_table_size) |
7506f491 DE |
1051 | { |
1052 | unsigned int hash; | |
1053 | ||
1054 | *do_not_record_p = 0; | |
1055 | ||
0516f6fe SB |
1056 | hash = hash_rtx (x, mode, do_not_record_p, |
1057 | NULL, /*have_reg_qty=*/false); | |
7506f491 DE |
1058 | return hash % hash_table_size; |
1059 | } | |
172890a2 | 1060 | |
7506f491 DE |
1061 | /* Hash a set of register REGNO. |
1062 | ||
c4c81601 RK |
1063 | Sets are hashed on the register that is set. This simplifies the PRE copy |
1064 | propagation code. | |
7506f491 DE |
1065 | |
1066 | ??? May need to make things more elaborate. Later, as necessary. */ | |
1067 | ||
1068 | static unsigned int | |
1d088dee | 1069 | hash_set (int regno, int hash_table_size) |
7506f491 DE |
1070 | { |
1071 | unsigned int hash; | |
1072 | ||
1073 | hash = regno; | |
1074 | return hash % hash_table_size; | |
1075 | } | |
1076 | ||
0516f6fe | 1077 | /* Return nonzero if exp1 is equivalent to exp2. */ |
7506f491 DE |
1078 | |
1079 | static int | |
ed7a4b4b | 1080 | expr_equiv_p (const_rtx x, const_rtx y) |
7506f491 | 1081 | { |
0516f6fe | 1082 | return exp_equiv_p (x, y, 0, true); |
7506f491 DE |
1083 | } |
1084 | ||
02280659 | 1085 | /* Insert expression X in INSN in the hash TABLE. |
7506f491 DE |
1086 | If it is already present, record it as the last occurrence in INSN's |
1087 | basic block. | |
1088 | ||
1089 | MODE is the mode of the value X is being stored into. | |
1090 | It is only used if X is a CONST_INT. | |
1091 | ||
cc2902df KH |
1092 | ANTIC_P is nonzero if X is an anticipatable expression. |
1093 | AVAIL_P is nonzero if X is an available expression. */ | |
7506f491 DE |
1094 | |
1095 | static void | |
1d088dee | 1096 | insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p, |
7e5487a2 | 1097 | int avail_p, struct hash_table_d *table) |
7506f491 DE |
1098 | { |
1099 | int found, do_not_record_p; | |
1100 | unsigned int hash; | |
1101 | struct expr *cur_expr, *last_expr = NULL; | |
1102 | struct occr *antic_occr, *avail_occr; | |
7506f491 | 1103 | |
02280659 | 1104 | hash = hash_expr (x, mode, &do_not_record_p, table->size); |
7506f491 DE |
1105 | |
1106 | /* Do not insert expression in table if it contains volatile operands, | |
1107 | or if hash_expr determines the expression is something we don't want | |
1108 | to or can't handle. */ | |
1109 | if (do_not_record_p) | |
1110 | return; | |
1111 | ||
02280659 | 1112 | cur_expr = table->table[hash]; |
7506f491 DE |
1113 | found = 0; |
1114 | ||
c4c81601 | 1115 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
7506f491 DE |
1116 | { |
1117 | /* If the expression isn't found, save a pointer to the end of | |
1118 | the list. */ | |
1119 | last_expr = cur_expr; | |
1120 | cur_expr = cur_expr->next_same_hash; | |
1121 | } | |
1122 | ||
1123 | if (! found) | |
1124 | { | |
1b4572a8 | 1125 | cur_expr = GOBNEW (struct expr); |
7506f491 | 1126 | bytes_used += sizeof (struct expr); |
02280659 | 1127 | if (table->table[hash] == NULL) |
c4c81601 | 1128 | /* This is the first pattern that hashed to this index. */ |
02280659 | 1129 | table->table[hash] = cur_expr; |
7506f491 | 1130 | else |
c4c81601 RK |
1131 | /* Add EXPR to end of this hash chain. */ |
1132 | last_expr->next_same_hash = cur_expr; | |
1133 | ||
589005ff | 1134 | /* Set the fields of the expr element. */ |
7506f491 | 1135 | cur_expr->expr = x; |
02280659 | 1136 | cur_expr->bitmap_index = table->n_elems++; |
7506f491 DE |
1137 | cur_expr->next_same_hash = NULL; |
1138 | cur_expr->antic_occr = NULL; | |
1139 | cur_expr->avail_occr = NULL; | |
1140 | } | |
1141 | ||
1142 | /* Now record the occurrence(s). */ | |
7506f491 DE |
1143 | if (antic_p) |
1144 | { | |
1145 | antic_occr = cur_expr->antic_occr; | |
1146 | ||
b0de17ef SB |
1147 | if (antic_occr |
1148 | && BLOCK_FOR_INSN (antic_occr->insn) != BLOCK_FOR_INSN (insn)) | |
b6e47ceb | 1149 | antic_occr = NULL; |
7506f491 DE |
1150 | |
1151 | if (antic_occr) | |
c4c81601 RK |
1152 | /* Found another instance of the expression in the same basic block. |
1153 | Prefer the currently recorded one. We want the first one in the | |
1154 | block and the block is scanned from start to end. */ | |
1155 | ; /* nothing to do */ | |
7506f491 DE |
1156 | else |
1157 | { | |
1158 | /* First occurrence of this expression in this basic block. */ | |
1b4572a8 | 1159 | antic_occr = GOBNEW (struct occr); |
7506f491 | 1160 | bytes_used += sizeof (struct occr); |
7506f491 | 1161 | antic_occr->insn = insn; |
b6e47ceb | 1162 | antic_occr->next = cur_expr->antic_occr; |
f9957958 | 1163 | antic_occr->deleted_p = 0; |
b6e47ceb | 1164 | cur_expr->antic_occr = antic_occr; |
7506f491 DE |
1165 | } |
1166 | } | |
1167 | ||
1168 | if (avail_p) | |
1169 | { | |
1170 | avail_occr = cur_expr->avail_occr; | |
1171 | ||
b0de17ef SB |
1172 | if (avail_occr |
1173 | && BLOCK_FOR_INSN (avail_occr->insn) == BLOCK_FOR_INSN (insn)) | |
7506f491 | 1174 | { |
b6e47ceb JL |
1175 | /* Found another instance of the expression in the same basic block. |
1176 | Prefer this occurrence to the currently recorded one. We want | |
1177 | the last one in the block and the block is scanned from start | |
1178 | to end. */ | |
1179 | avail_occr->insn = insn; | |
7506f491 | 1180 | } |
7506f491 DE |
1181 | else |
1182 | { | |
1183 | /* First occurrence of this expression in this basic block. */ | |
1b4572a8 | 1184 | avail_occr = GOBNEW (struct occr); |
7506f491 | 1185 | bytes_used += sizeof (struct occr); |
7506f491 | 1186 | avail_occr->insn = insn; |
b6e47ceb | 1187 | avail_occr->next = cur_expr->avail_occr; |
f9957958 | 1188 | avail_occr->deleted_p = 0; |
b6e47ceb | 1189 | cur_expr->avail_occr = avail_occr; |
7506f491 DE |
1190 | } |
1191 | } | |
1192 | } | |
1193 | ||
1194 | /* Insert pattern X in INSN in the hash table. | |
1195 | X is a SET of a reg to either another reg or a constant. | |
1196 | If it is already present, record it as the last occurrence in INSN's | |
1197 | basic block. */ | |
1198 | ||
1199 | static void | |
7e5487a2 | 1200 | insert_set_in_table (rtx x, rtx insn, struct hash_table_d *table) |
7506f491 DE |
1201 | { |
1202 | int found; | |
1203 | unsigned int hash; | |
1204 | struct expr *cur_expr, *last_expr = NULL; | |
b6e47ceb | 1205 | struct occr *cur_occr; |
7506f491 | 1206 | |
282899df | 1207 | gcc_assert (GET_CODE (x) == SET && REG_P (SET_DEST (x))); |
7506f491 | 1208 | |
02280659 | 1209 | hash = hash_set (REGNO (SET_DEST (x)), table->size); |
7506f491 | 1210 | |
02280659 | 1211 | cur_expr = table->table[hash]; |
7506f491 DE |
1212 | found = 0; |
1213 | ||
c4c81601 | 1214 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
7506f491 DE |
1215 | { |
1216 | /* If the expression isn't found, save a pointer to the end of | |
1217 | the list. */ | |
1218 | last_expr = cur_expr; | |
1219 | cur_expr = cur_expr->next_same_hash; | |
1220 | } | |
1221 | ||
1222 | if (! found) | |
1223 | { | |
1b4572a8 | 1224 | cur_expr = GOBNEW (struct expr); |
7506f491 | 1225 | bytes_used += sizeof (struct expr); |
02280659 | 1226 | if (table->table[hash] == NULL) |
c4c81601 | 1227 | /* This is the first pattern that hashed to this index. */ |
02280659 | 1228 | table->table[hash] = cur_expr; |
7506f491 | 1229 | else |
c4c81601 RK |
1230 | /* Add EXPR to end of this hash chain. */ |
1231 | last_expr->next_same_hash = cur_expr; | |
1232 | ||
7506f491 DE |
1233 | /* Set the fields of the expr element. |
1234 | We must copy X because it can be modified when copy propagation is | |
1235 | performed on its operands. */ | |
7506f491 | 1236 | cur_expr->expr = copy_rtx (x); |
02280659 | 1237 | cur_expr->bitmap_index = table->n_elems++; |
7506f491 DE |
1238 | cur_expr->next_same_hash = NULL; |
1239 | cur_expr->antic_occr = NULL; | |
1240 | cur_expr->avail_occr = NULL; | |
1241 | } | |
1242 | ||
1243 | /* Now record the occurrence. */ | |
7506f491 DE |
1244 | cur_occr = cur_expr->avail_occr; |
1245 | ||
b0de17ef SB |
1246 | if (cur_occr |
1247 | && BLOCK_FOR_INSN (cur_occr->insn) == BLOCK_FOR_INSN (insn)) | |
7506f491 | 1248 | { |
b6e47ceb JL |
1249 | /* Found another instance of the expression in the same basic block. |
1250 | Prefer this occurrence to the currently recorded one. We want | |
1251 | the last one in the block and the block is scanned from start | |
1252 | to end. */ | |
1253 | cur_occr->insn = insn; | |
7506f491 | 1254 | } |
7506f491 DE |
1255 | else |
1256 | { | |
1257 | /* First occurrence of this expression in this basic block. */ | |
1b4572a8 | 1258 | cur_occr = GOBNEW (struct occr); |
7506f491 | 1259 | bytes_used += sizeof (struct occr); |
5f39ad47 SB |
1260 | cur_occr->insn = insn; |
1261 | cur_occr->next = cur_expr->avail_occr; | |
1262 | cur_occr->deleted_p = 0; | |
1263 | cur_expr->avail_occr = cur_occr; | |
7506f491 DE |
1264 | } |
1265 | } | |
1266 | ||
6b2d1c9e RS |
1267 | /* Determine whether the rtx X should be treated as a constant for |
1268 | the purposes of GCSE's constant propagation. */ | |
1269 | ||
1270 | static bool | |
ed7a4b4b | 1271 | gcse_constant_p (const_rtx x) |
6b2d1c9e RS |
1272 | { |
1273 | /* Consider a COMPARE of two integers constant. */ | |
1274 | if (GET_CODE (x) == COMPARE | |
481683e1 SZ |
1275 | && CONST_INT_P (XEXP (x, 0)) |
1276 | && CONST_INT_P (XEXP (x, 1))) | |
6b2d1c9e RS |
1277 | return true; |
1278 | ||
db2f435b | 1279 | /* Consider a COMPARE of the same registers is a constant |
7b1b4aed | 1280 | if they are not floating point registers. */ |
db2f435b | 1281 | if (GET_CODE(x) == COMPARE |
7b1b4aed | 1282 | && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)) |
db2f435b AP |
1283 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1)) |
1284 | && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0))) | |
1285 | && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1)))) | |
1286 | return true; | |
1287 | ||
82f5c05d AK |
1288 | /* Since X might be inserted more than once we have to take care that it |
1289 | is sharable. */ | |
fa5ed76e | 1290 | return CONSTANT_P (x) && (GET_CODE (x) != CONST || shared_const_p (x)); |
6b2d1c9e RS |
1291 | } |
1292 | ||
02280659 ZD |
1293 | /* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or |
1294 | expression one). */ | |
7506f491 DE |
1295 | |
1296 | static void | |
7e5487a2 | 1297 | hash_scan_set (rtx pat, rtx insn, struct hash_table_d *table) |
7506f491 DE |
1298 | { |
1299 | rtx src = SET_SRC (pat); | |
1300 | rtx dest = SET_DEST (pat); | |
172890a2 | 1301 | rtx note; |
7506f491 | 1302 | |
6e72d1e9 | 1303 | if (GET_CODE (src) == CALL) |
02280659 | 1304 | hash_scan_call (src, insn, table); |
7506f491 | 1305 | |
7b1b4aed | 1306 | else if (REG_P (dest)) |
7506f491 | 1307 | { |
172890a2 | 1308 | unsigned int regno = REGNO (dest); |
7506f491 DE |
1309 | rtx tmp; |
1310 | ||
29470771 SB |
1311 | /* See if a REG_EQUAL note shows this equivalent to a simpler expression. |
1312 | ||
90631280 PB |
1313 | This allows us to do a single GCSE pass and still eliminate |
1314 | redundant constants, addresses or other expressions that are | |
29470771 SB |
1315 | constructed with multiple instructions. |
1316 | ||
1317 | However, keep the original SRC if INSN is a simple reg-reg move. In | |
1318 | In this case, there will almost always be a REG_EQUAL note on the | |
1319 | insn that sets SRC. By recording the REG_EQUAL value here as SRC | |
1320 | for INSN, we miss copy propagation opportunities and we perform the | |
1321 | same PRE GCSE operation repeatedly on the same REG_EQUAL value if we | |
1322 | do more than one PRE GCSE pass. | |
1323 | ||
fa10beec | 1324 | Note that this does not impede profitable constant propagations. We |
29470771 | 1325 | "look through" reg-reg sets in lookup_avail_set. */ |
90631280 PB |
1326 | note = find_reg_equal_equiv_note (insn); |
1327 | if (note != 0 | |
29470771 SB |
1328 | && REG_NOTE_KIND (note) == REG_EQUAL |
1329 | && !REG_P (src) | |
90631280 PB |
1330 | && (table->set_p |
1331 | ? gcse_constant_p (XEXP (note, 0)) | |
1332 | : want_to_gcse_p (XEXP (note, 0)))) | |
172890a2 RK |
1333 | src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src); |
1334 | ||
7506f491 | 1335 | /* Only record sets of pseudo-regs in the hash table. */ |
02280659 | 1336 | if (! table->set_p |
7506f491 DE |
1337 | && regno >= FIRST_PSEUDO_REGISTER |
1338 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
773eae39 | 1339 | && can_copy_p (GET_MODE (dest)) |
068473ec | 1340 | /* GCSE commonly inserts instruction after the insn. We can't |
1d65f45c RH |
1341 | do that easily for EH edges so disable GCSE on these for now. */ |
1342 | /* ??? We can now easily create new EH landing pads at the | |
1343 | gimple level, for splitting edges; there's no reason we | |
1344 | can't do the same thing at the rtl level. */ | |
1345 | && !can_throw_internal (insn) | |
7506f491 | 1346 | /* Is SET_SRC something we want to gcse? */ |
172890a2 RK |
1347 | && want_to_gcse_p (src) |
1348 | /* Don't CSE a nop. */ | |
43e72072 JJ |
1349 | && ! set_noop_p (pat) |
1350 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1351 | At this point this only function parameters should have | |
1352 | REG_EQUIV notes and if the argument slot is used somewhere | |
a1f300c0 | 1353 | explicitly, it means address of parameter has been taken, |
43e72072 | 1354 | so we should not extend the lifetime of the pseudo. */ |
90631280 | 1355 | && (note == NULL_RTX || ! MEM_P (XEXP (note, 0)))) |
7506f491 DE |
1356 | { |
1357 | /* An expression is not anticipatable if its operands are | |
52d76e11 | 1358 | modified before this insn or if this is not the only SET in |
6fb5fa3c DB |
1359 | this insn. The latter condition does not have to mean that |
1360 | SRC itself is not anticipatable, but we just will not be | |
1361 | able to handle code motion of insns with multiple sets. */ | |
1362 | int antic_p = oprs_anticipatable_p (src, insn) | |
1363 | && !multiple_sets (insn); | |
7506f491 | 1364 | /* An expression is not available if its operands are |
eb296bd9 GK |
1365 | subsequently modified, including this insn. It's also not |
1366 | available if this is a branch, because we can't insert | |
1367 | a set after the branch. */ | |
1368 | int avail_p = (oprs_available_p (src, insn) | |
1369 | && ! JUMP_P (insn)); | |
c4c81601 | 1370 | |
02280659 | 1371 | insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table); |
7506f491 | 1372 | } |
c4c81601 | 1373 | |
7506f491 | 1374 | /* Record sets for constant/copy propagation. */ |
02280659 | 1375 | else if (table->set_p |
7506f491 | 1376 | && regno >= FIRST_PSEUDO_REGISTER |
7b1b4aed | 1377 | && ((REG_P (src) |
7506f491 | 1378 | && REGNO (src) >= FIRST_PSEUDO_REGISTER |
773eae39 | 1379 | && can_copy_p (GET_MODE (dest)) |
172890a2 | 1380 | && REGNO (src) != regno) |
6b2d1c9e | 1381 | || gcse_constant_p (src)) |
7506f491 DE |
1382 | /* A copy is not available if its src or dest is subsequently |
1383 | modified. Here we want to search from INSN+1 on, but | |
1384 | oprs_available_p searches from INSN on. */ | |
a813c111 | 1385 | && (insn == BB_END (BLOCK_FOR_INSN (insn)) |
02a4823b | 1386 | || (tmp = next_nonnote_insn (insn)) == NULL_RTX |
1ef40d6b | 1387 | || BLOCK_FOR_INSN (tmp) != BLOCK_FOR_INSN (insn) |
02a4823b | 1388 | || oprs_available_p (pat, tmp))) |
02280659 | 1389 | insert_set_in_table (pat, insn, table); |
7506f491 | 1390 | } |
d91edf86 | 1391 | /* In case of store we want to consider the memory value as available in |
f5f2e3cd MH |
1392 | the REG stored in that memory. This makes it possible to remove |
1393 | redundant loads from due to stores to the same location. */ | |
7b1b4aed | 1394 | else if (flag_gcse_las && REG_P (src) && MEM_P (dest)) |
f5f2e3cd MH |
1395 | { |
1396 | unsigned int regno = REGNO (src); | |
1397 | ||
1398 | /* Do not do this for constant/copy propagation. */ | |
1399 | if (! table->set_p | |
1400 | /* Only record sets of pseudo-regs in the hash table. */ | |
1401 | && regno >= FIRST_PSEUDO_REGISTER | |
1402 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
1403 | && can_copy_p (GET_MODE (src)) | |
1404 | /* GCSE commonly inserts instruction after the insn. We can't | |
1d65f45c RH |
1405 | do that easily for EH edges so disable GCSE on these for now. */ |
1406 | && !can_throw_internal (insn) | |
f5f2e3cd MH |
1407 | /* Is SET_DEST something we want to gcse? */ |
1408 | && want_to_gcse_p (dest) | |
1409 | /* Don't CSE a nop. */ | |
1410 | && ! set_noop_p (pat) | |
1411 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1412 | At this point this only function parameters should have | |
1413 | REG_EQUIV notes and if the argument slot is used somewhere | |
1414 | explicitly, it means address of parameter has been taken, | |
1415 | so we should not extend the lifetime of the pseudo. */ | |
1416 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
7b1b4aed | 1417 | || ! MEM_P (XEXP (note, 0)))) |
f5f2e3cd MH |
1418 | { |
1419 | /* Stores are never anticipatable. */ | |
1420 | int antic_p = 0; | |
1421 | /* An expression is not available if its operands are | |
1422 | subsequently modified, including this insn. It's also not | |
1423 | available if this is a branch, because we can't insert | |
1424 | a set after the branch. */ | |
1425 | int avail_p = oprs_available_p (dest, insn) | |
1426 | && ! JUMP_P (insn); | |
1427 | ||
1428 | /* Record the memory expression (DEST) in the hash table. */ | |
1429 | insert_expr_in_table (dest, GET_MODE (dest), insn, | |
1430 | antic_p, avail_p, table); | |
1431 | } | |
1432 | } | |
7506f491 DE |
1433 | } |
1434 | ||
1435 | static void | |
1d088dee | 1436 | hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED, |
7e5487a2 | 1437 | struct hash_table_d *table ATTRIBUTE_UNUSED) |
7506f491 DE |
1438 | { |
1439 | /* Currently nothing to do. */ | |
1440 | } | |
1441 | ||
1442 | static void | |
1d088dee | 1443 | hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED, |
7e5487a2 | 1444 | struct hash_table_d *table ATTRIBUTE_UNUSED) |
7506f491 DE |
1445 | { |
1446 | /* Currently nothing to do. */ | |
1447 | } | |
1448 | ||
1449 | /* Process INSN and add hash table entries as appropriate. | |
1450 | ||
1451 | Only available expressions that set a single pseudo-reg are recorded. | |
1452 | ||
1453 | Single sets in a PARALLEL could be handled, but it's an extra complication | |
1454 | that isn't dealt with right now. The trick is handling the CLOBBERs that | |
1455 | are also in the PARALLEL. Later. | |
1456 | ||
cc2902df | 1457 | If SET_P is nonzero, this is for the assignment hash table, |
4a8cae83 | 1458 | otherwise it is for the expression hash table. */ |
7506f491 DE |
1459 | |
1460 | static void | |
7e5487a2 | 1461 | hash_scan_insn (rtx insn, struct hash_table_d *table) |
7506f491 DE |
1462 | { |
1463 | rtx pat = PATTERN (insn); | |
c4c81601 | 1464 | int i; |
7506f491 DE |
1465 | |
1466 | /* Pick out the sets of INSN and for other forms of instructions record | |
1467 | what's been modified. */ | |
1468 | ||
172890a2 | 1469 | if (GET_CODE (pat) == SET) |
02280659 | 1470 | hash_scan_set (pat, insn, table); |
7506f491 | 1471 | else if (GET_CODE (pat) == PARALLEL) |
c4c81601 RK |
1472 | for (i = 0; i < XVECLEN (pat, 0); i++) |
1473 | { | |
1474 | rtx x = XVECEXP (pat, 0, i); | |
7506f491 | 1475 | |
c4c81601 | 1476 | if (GET_CODE (x) == SET) |
02280659 | 1477 | hash_scan_set (x, insn, table); |
c4c81601 | 1478 | else if (GET_CODE (x) == CLOBBER) |
02280659 | 1479 | hash_scan_clobber (x, insn, table); |
6e72d1e9 | 1480 | else if (GET_CODE (x) == CALL) |
02280659 | 1481 | hash_scan_call (x, insn, table); |
c4c81601 | 1482 | } |
7506f491 | 1483 | |
7506f491 | 1484 | else if (GET_CODE (pat) == CLOBBER) |
02280659 | 1485 | hash_scan_clobber (pat, insn, table); |
6e72d1e9 | 1486 | else if (GET_CODE (pat) == CALL) |
02280659 | 1487 | hash_scan_call (pat, insn, table); |
7506f491 DE |
1488 | } |
1489 | ||
1490 | static void | |
7e5487a2 | 1491 | dump_hash_table (FILE *file, const char *name, struct hash_table_d *table) |
7506f491 DE |
1492 | { |
1493 | int i; | |
1494 | /* Flattened out table, so it's printed in proper order. */ | |
4da896b2 MM |
1495 | struct expr **flat_table; |
1496 | unsigned int *hash_val; | |
c4c81601 | 1497 | struct expr *expr; |
4da896b2 | 1498 | |
1b4572a8 KG |
1499 | flat_table = XCNEWVEC (struct expr *, table->n_elems); |
1500 | hash_val = XNEWVEC (unsigned int, table->n_elems); | |
7506f491 | 1501 | |
02280659 ZD |
1502 | for (i = 0; i < (int) table->size; i++) |
1503 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 RK |
1504 | { |
1505 | flat_table[expr->bitmap_index] = expr; | |
1506 | hash_val[expr->bitmap_index] = i; | |
1507 | } | |
7506f491 DE |
1508 | |
1509 | fprintf (file, "%s hash table (%d buckets, %d entries)\n", | |
02280659 | 1510 | name, table->size, table->n_elems); |
7506f491 | 1511 | |
02280659 | 1512 | for (i = 0; i < (int) table->n_elems; i++) |
21318741 RK |
1513 | if (flat_table[i] != 0) |
1514 | { | |
a0ac9e5a | 1515 | expr = flat_table[i]; |
21318741 RK |
1516 | fprintf (file, "Index %d (hash value %d)\n ", |
1517 | expr->bitmap_index, hash_val[i]); | |
a0ac9e5a | 1518 | print_rtl (file, expr->expr); |
21318741 RK |
1519 | fprintf (file, "\n"); |
1520 | } | |
7506f491 DE |
1521 | |
1522 | fprintf (file, "\n"); | |
4da896b2 | 1523 | |
4da896b2 MM |
1524 | free (flat_table); |
1525 | free (hash_val); | |
7506f491 DE |
1526 | } |
1527 | ||
1528 | /* Record register first/last/block set information for REGNO in INSN. | |
c4c81601 | 1529 | |
80c29cc4 | 1530 | first_set records the first place in the block where the register |
7506f491 | 1531 | is set and is used to compute "anticipatability". |
c4c81601 | 1532 | |
80c29cc4 | 1533 | last_set records the last place in the block where the register |
7506f491 | 1534 | is set and is used to compute "availability". |
c4c81601 | 1535 | |
80c29cc4 | 1536 | last_bb records the block for which first_set and last_set are |
4a81774c | 1537 | valid, as a quick test to invalidate them. */ |
7506f491 DE |
1538 | |
1539 | static void | |
1d088dee | 1540 | record_last_reg_set_info (rtx insn, int regno) |
7506f491 | 1541 | { |
80c29cc4 | 1542 | struct reg_avail_info *info = ®_avail_info[regno]; |
4a81774c | 1543 | int luid = DF_INSN_LUID (insn); |
c4c81601 | 1544 | |
4a81774c | 1545 | info->last_set = luid; |
80c29cc4 RZ |
1546 | if (info->last_bb != current_bb) |
1547 | { | |
1548 | info->last_bb = current_bb; | |
4a81774c | 1549 | info->first_set = luid; |
80c29cc4 | 1550 | } |
7506f491 DE |
1551 | } |
1552 | ||
a13d4ebf AM |
1553 | |
1554 | /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn. | |
1555 | Note we store a pair of elements in the list, so they have to be | |
1556 | taken off pairwise. */ | |
1557 | ||
589005ff | 1558 | static void |
7bc980e1 | 1559 | canon_list_insert (rtx dest ATTRIBUTE_UNUSED, const_rtx unused1 ATTRIBUTE_UNUSED, |
1d088dee | 1560 | void * v_insn) |
a13d4ebf AM |
1561 | { |
1562 | rtx dest_addr, insn; | |
0fe854a7 | 1563 | int bb; |
a13d4ebf AM |
1564 | |
1565 | while (GET_CODE (dest) == SUBREG | |
1566 | || GET_CODE (dest) == ZERO_EXTRACT | |
a13d4ebf AM |
1567 | || GET_CODE (dest) == STRICT_LOW_PART) |
1568 | dest = XEXP (dest, 0); | |
1569 | ||
1570 | /* If DEST is not a MEM, then it will not conflict with a load. Note | |
1571 | that function calls are assumed to clobber memory, but are handled | |
1572 | elsewhere. */ | |
1573 | ||
7b1b4aed | 1574 | if (! MEM_P (dest)) |
a13d4ebf AM |
1575 | return; |
1576 | ||
1577 | dest_addr = get_addr (XEXP (dest, 0)); | |
1578 | dest_addr = canon_rtx (dest_addr); | |
589005ff | 1579 | insn = (rtx) v_insn; |
b0de17ef | 1580 | bb = BLOCK_FOR_INSN (insn)->index; |
a13d4ebf | 1581 | |
589005ff | 1582 | canon_modify_mem_list[bb] = |
0fe854a7 | 1583 | alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]); |
589005ff | 1584 | canon_modify_mem_list[bb] = |
0fe854a7 | 1585 | alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]); |
a13d4ebf AM |
1586 | } |
1587 | ||
a13d4ebf AM |
1588 | /* Record memory modification information for INSN. We do not actually care |
1589 | about the memory location(s) that are set, or even how they are set (consider | |
1590 | a CALL_INSN). We merely need to record which insns modify memory. */ | |
7506f491 DE |
1591 | |
1592 | static void | |
1d088dee | 1593 | record_last_mem_set_info (rtx insn) |
7506f491 | 1594 | { |
b0de17ef | 1595 | int bb = BLOCK_FOR_INSN (insn)->index; |
0fe854a7 | 1596 | |
ccef9ef5 | 1597 | /* load_killed_in_block_p will handle the case of calls clobbering |
dc297297 | 1598 | everything. */ |
0fe854a7 RH |
1599 | modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]); |
1600 | bitmap_set_bit (modify_mem_list_set, bb); | |
a13d4ebf | 1601 | |
7b1b4aed | 1602 | if (CALL_P (insn)) |
a13d4ebf AM |
1603 | { |
1604 | /* Note that traversals of this loop (other than for free-ing) | |
1605 | will break after encountering a CALL_INSN. So, there's no | |
dc297297 | 1606 | need to insert a pair of items, as canon_list_insert does. */ |
589005ff KH |
1607 | canon_modify_mem_list[bb] = |
1608 | alloc_INSN_LIST (insn, canon_modify_mem_list[bb]); | |
aa47fcfa | 1609 | bitmap_set_bit (blocks_with_calls, bb); |
a13d4ebf AM |
1610 | } |
1611 | else | |
0fe854a7 | 1612 | note_stores (PATTERN (insn), canon_list_insert, (void*) insn); |
7506f491 DE |
1613 | } |
1614 | ||
7506f491 | 1615 | /* Called from compute_hash_table via note_stores to handle one |
84832317 MM |
1616 | SET or CLOBBER in an insn. DATA is really the instruction in which |
1617 | the SET is taking place. */ | |
7506f491 DE |
1618 | |
1619 | static void | |
7bc980e1 | 1620 | record_last_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, void *data) |
7506f491 | 1621 | { |
84832317 MM |
1622 | rtx last_set_insn = (rtx) data; |
1623 | ||
7506f491 DE |
1624 | if (GET_CODE (dest) == SUBREG) |
1625 | dest = SUBREG_REG (dest); | |
1626 | ||
7b1b4aed | 1627 | if (REG_P (dest)) |
7506f491 | 1628 | record_last_reg_set_info (last_set_insn, REGNO (dest)); |
7b1b4aed | 1629 | else if (MEM_P (dest) |
7506f491 DE |
1630 | /* Ignore pushes, they clobber nothing. */ |
1631 | && ! push_operand (dest, GET_MODE (dest))) | |
1632 | record_last_mem_set_info (last_set_insn); | |
1633 | } | |
1634 | ||
1635 | /* Top level function to create an expression or assignment hash table. | |
1636 | ||
1637 | Expression entries are placed in the hash table if | |
1638 | - they are of the form (set (pseudo-reg) src), | |
1639 | - src is something we want to perform GCSE on, | |
1640 | - none of the operands are subsequently modified in the block | |
1641 | ||
1642 | Assignment entries are placed in the hash table if | |
1643 | - they are of the form (set (pseudo-reg) src), | |
1644 | - src is something we want to perform const/copy propagation on, | |
1645 | - none of the operands or target are subsequently modified in the block | |
c4c81601 | 1646 | |
7506f491 DE |
1647 | Currently src must be a pseudo-reg or a const_int. |
1648 | ||
02280659 | 1649 | TABLE is the table computed. */ |
7506f491 DE |
1650 | |
1651 | static void | |
7e5487a2 | 1652 | compute_hash_table_work (struct hash_table_d *table) |
7506f491 | 1653 | { |
5f39ad47 | 1654 | int i; |
7506f491 | 1655 | |
a13d4ebf | 1656 | /* re-Cache any INSN_LIST nodes we have allocated. */ |
73991d6a | 1657 | clear_modify_mem_tables (); |
7506f491 | 1658 | /* Some working arrays used to track first and last set in each block. */ |
5f39ad47 | 1659 | reg_avail_info = GNEWVEC (struct reg_avail_info, max_reg_num ()); |
80c29cc4 | 1660 | |
5f39ad47 | 1661 | for (i = 0; i < max_reg_num (); ++i) |
e0082a72 | 1662 | reg_avail_info[i].last_bb = NULL; |
7506f491 | 1663 | |
e0082a72 | 1664 | FOR_EACH_BB (current_bb) |
7506f491 DE |
1665 | { |
1666 | rtx insn; | |
770ae6cc | 1667 | unsigned int regno; |
7506f491 DE |
1668 | |
1669 | /* First pass over the instructions records information used to | |
4a81774c | 1670 | determine when registers and memory are first and last set. */ |
eb232f4e | 1671 | FOR_BB_INSNS (current_bb, insn) |
7506f491 | 1672 | { |
2c3c49de | 1673 | if (! INSN_P (insn)) |
7506f491 DE |
1674 | continue; |
1675 | ||
7b1b4aed | 1676 | if (CALL_P (insn)) |
7506f491 DE |
1677 | { |
1678 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
6e14af16 | 1679 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) |
7506f491 | 1680 | record_last_reg_set_info (insn, regno); |
c4c81601 | 1681 | |
24a28584 | 1682 | mark_call (insn); |
7506f491 DE |
1683 | } |
1684 | ||
84832317 | 1685 | note_stores (PATTERN (insn), record_last_set_info, insn); |
7506f491 DE |
1686 | } |
1687 | ||
fbef91d8 RS |
1688 | /* Insert implicit sets in the hash table. */ |
1689 | if (table->set_p | |
1690 | && implicit_sets[current_bb->index] != NULL_RTX) | |
1691 | hash_scan_set (implicit_sets[current_bb->index], | |
a813c111 | 1692 | BB_HEAD (current_bb), table); |
fbef91d8 | 1693 | |
7506f491 | 1694 | /* The next pass builds the hash table. */ |
eb232f4e | 1695 | FOR_BB_INSNS (current_bb, insn) |
2c3c49de | 1696 | if (INSN_P (insn)) |
4a8cae83 | 1697 | hash_scan_insn (insn, table); |
7506f491 DE |
1698 | } |
1699 | ||
80c29cc4 RZ |
1700 | free (reg_avail_info); |
1701 | reg_avail_info = NULL; | |
7506f491 DE |
1702 | } |
1703 | ||
02280659 | 1704 | /* Allocate space for the set/expr hash TABLE. |
02280659 ZD |
1705 | It is used to determine the number of buckets to use. |
1706 | SET_P determines whether set or expression table will | |
1707 | be created. */ | |
7506f491 DE |
1708 | |
1709 | static void | |
b5b8b0ac | 1710 | alloc_hash_table (struct hash_table_d *table, int set_p) |
7506f491 DE |
1711 | { |
1712 | int n; | |
1713 | ||
b5b8b0ac AO |
1714 | n = get_max_insn_count (); |
1715 | ||
1716 | table->size = n / 4; | |
02280659 ZD |
1717 | if (table->size < 11) |
1718 | table->size = 11; | |
c4c81601 | 1719 | |
7506f491 DE |
1720 | /* Attempt to maintain efficient use of hash table. |
1721 | Making it an odd number is simplest for now. | |
1722 | ??? Later take some measurements. */ | |
02280659 ZD |
1723 | table->size |= 1; |
1724 | n = table->size * sizeof (struct expr *); | |
1b4572a8 | 1725 | table->table = GNEWVAR (struct expr *, n); |
02280659 | 1726 | table->set_p = set_p; |
7506f491 DE |
1727 | } |
1728 | ||
02280659 | 1729 | /* Free things allocated by alloc_hash_table. */ |
7506f491 DE |
1730 | |
1731 | static void | |
7e5487a2 | 1732 | free_hash_table (struct hash_table_d *table) |
7506f491 | 1733 | { |
02280659 | 1734 | free (table->table); |
7506f491 DE |
1735 | } |
1736 | ||
02280659 ZD |
1737 | /* Compute the hash TABLE for doing copy/const propagation or |
1738 | expression hash table. */ | |
7506f491 DE |
1739 | |
1740 | static void | |
7e5487a2 | 1741 | compute_hash_table (struct hash_table_d *table) |
7506f491 DE |
1742 | { |
1743 | /* Initialize count of number of entries in hash table. */ | |
02280659 | 1744 | table->n_elems = 0; |
703ad42b | 1745 | memset (table->table, 0, table->size * sizeof (struct expr *)); |
7506f491 | 1746 | |
02280659 | 1747 | compute_hash_table_work (table); |
7506f491 DE |
1748 | } |
1749 | \f | |
1750 | /* Expression tracking support. */ | |
1751 | ||
ceda50e9 RH |
1752 | /* Lookup REGNO in the set TABLE. The result is a pointer to the |
1753 | table entry, or NULL if not found. */ | |
7506f491 DE |
1754 | |
1755 | static struct expr * | |
7e5487a2 | 1756 | lookup_set (unsigned int regno, struct hash_table_d *table) |
7506f491 | 1757 | { |
02280659 | 1758 | unsigned int hash = hash_set (regno, table->size); |
7506f491 DE |
1759 | struct expr *expr; |
1760 | ||
02280659 | 1761 | expr = table->table[hash]; |
7506f491 | 1762 | |
ceda50e9 RH |
1763 | while (expr && REGNO (SET_DEST (expr->expr)) != regno) |
1764 | expr = expr->next_same_hash; | |
7506f491 DE |
1765 | |
1766 | return expr; | |
1767 | } | |
1768 | ||
1769 | /* Return the next entry for REGNO in list EXPR. */ | |
1770 | ||
1771 | static struct expr * | |
1d088dee | 1772 | next_set (unsigned int regno, struct expr *expr) |
7506f491 DE |
1773 | { |
1774 | do | |
1775 | expr = expr->next_same_hash; | |
1776 | while (expr && REGNO (SET_DEST (expr->expr)) != regno); | |
c4c81601 | 1777 | |
7506f491 DE |
1778 | return expr; |
1779 | } | |
1780 | ||
0fe854a7 RH |
1781 | /* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node |
1782 | types may be mixed. */ | |
1783 | ||
1784 | static void | |
1d088dee | 1785 | free_insn_expr_list_list (rtx *listp) |
0fe854a7 RH |
1786 | { |
1787 | rtx list, next; | |
1788 | ||
1789 | for (list = *listp; list ; list = next) | |
1790 | { | |
1791 | next = XEXP (list, 1); | |
1792 | if (GET_CODE (list) == EXPR_LIST) | |
1793 | free_EXPR_LIST_node (list); | |
1794 | else | |
1795 | free_INSN_LIST_node (list); | |
1796 | } | |
1797 | ||
1798 | *listp = NULL; | |
1799 | } | |
1800 | ||
73991d6a JH |
1801 | /* Clear canon_modify_mem_list and modify_mem_list tables. */ |
1802 | static void | |
1d088dee | 1803 | clear_modify_mem_tables (void) |
73991d6a | 1804 | { |
3cd8c58a | 1805 | unsigned i; |
87c476a2 | 1806 | bitmap_iterator bi; |
73991d6a | 1807 | |
87c476a2 ZD |
1808 | EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi) |
1809 | { | |
1810 | free_INSN_LIST_list (modify_mem_list + i); | |
87c476a2 ZD |
1811 | free_insn_expr_list_list (canon_modify_mem_list + i); |
1812 | } | |
9a6cf911 | 1813 | bitmap_clear (modify_mem_list_set); |
aa47fcfa | 1814 | bitmap_clear (blocks_with_calls); |
73991d6a JH |
1815 | } |
1816 | ||
9a6cf911 | 1817 | /* Release memory used by modify_mem_list_set. */ |
73991d6a JH |
1818 | |
1819 | static void | |
1d088dee | 1820 | free_modify_mem_tables (void) |
73991d6a JH |
1821 | { |
1822 | clear_modify_mem_tables (); | |
1823 | free (modify_mem_list); | |
1824 | free (canon_modify_mem_list); | |
1825 | modify_mem_list = 0; | |
1826 | canon_modify_mem_list = 0; | |
1827 | } | |
1828 | ||
7506f491 DE |
1829 | /* Reset tables used to keep track of what's still available [since the |
1830 | start of the block]. */ | |
1831 | ||
1832 | static void | |
1d088dee | 1833 | reset_opr_set_tables (void) |
7506f491 DE |
1834 | { |
1835 | /* Maintain a bitmap of which regs have been set since beginning of | |
1836 | the block. */ | |
73991d6a | 1837 | CLEAR_REG_SET (reg_set_bitmap); |
c4c81601 | 1838 | |
7506f491 DE |
1839 | /* Also keep a record of the last instruction to modify memory. |
1840 | For now this is very trivial, we only record whether any memory | |
1841 | location has been modified. */ | |
73991d6a | 1842 | clear_modify_mem_tables (); |
7506f491 DE |
1843 | } |
1844 | ||
cc2902df | 1845 | /* Return nonzero if the operands of X are not set before INSN in |
7506f491 DE |
1846 | INSN's basic block. */ |
1847 | ||
1848 | static int | |
ed7a4b4b | 1849 | oprs_not_set_p (const_rtx x, const_rtx insn) |
7506f491 | 1850 | { |
c4c81601 | 1851 | int i, j; |
7506f491 | 1852 | enum rtx_code code; |
6f7d635c | 1853 | const char *fmt; |
7506f491 | 1854 | |
7506f491 DE |
1855 | if (x == 0) |
1856 | return 1; | |
1857 | ||
1858 | code = GET_CODE (x); | |
1859 | switch (code) | |
1860 | { | |
1861 | case PC: | |
1862 | case CC0: | |
1863 | case CONST: | |
1864 | case CONST_INT: | |
1865 | case CONST_DOUBLE: | |
091a3ac7 | 1866 | case CONST_FIXED: |
69ef87e2 | 1867 | case CONST_VECTOR: |
7506f491 DE |
1868 | case SYMBOL_REF: |
1869 | case LABEL_REF: | |
1870 | case ADDR_VEC: | |
1871 | case ADDR_DIFF_VEC: | |
1872 | return 1; | |
1873 | ||
1874 | case MEM: | |
589005ff | 1875 | if (load_killed_in_block_p (BLOCK_FOR_INSN (insn), |
4a81774c | 1876 | DF_INSN_LUID (insn), x, 0)) |
a13d4ebf | 1877 | return 0; |
c4c81601 RK |
1878 | else |
1879 | return oprs_not_set_p (XEXP (x, 0), insn); | |
7506f491 DE |
1880 | |
1881 | case REG: | |
73991d6a | 1882 | return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x)); |
7506f491 DE |
1883 | |
1884 | default: | |
1885 | break; | |
1886 | } | |
1887 | ||
c4c81601 | 1888 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
1889 | { |
1890 | if (fmt[i] == 'e') | |
1891 | { | |
7506f491 DE |
1892 | /* If we are about to do the last recursive call |
1893 | needed at this level, change it into iteration. | |
1894 | This function is called enough to be worth it. */ | |
1895 | if (i == 0) | |
c4c81601 RK |
1896 | return oprs_not_set_p (XEXP (x, i), insn); |
1897 | ||
1898 | if (! oprs_not_set_p (XEXP (x, i), insn)) | |
7506f491 DE |
1899 | return 0; |
1900 | } | |
1901 | else if (fmt[i] == 'E') | |
c4c81601 RK |
1902 | for (j = 0; j < XVECLEN (x, i); j++) |
1903 | if (! oprs_not_set_p (XVECEXP (x, i, j), insn)) | |
1904 | return 0; | |
7506f491 DE |
1905 | } |
1906 | ||
1907 | return 1; | |
1908 | } | |
1909 | ||
1910 | /* Mark things set by a CALL. */ | |
1911 | ||
1912 | static void | |
1d088dee | 1913 | mark_call (rtx insn) |
7506f491 | 1914 | { |
becfd6e5 | 1915 | if (! RTL_CONST_OR_PURE_CALL_P (insn)) |
a13d4ebf | 1916 | record_last_mem_set_info (insn); |
7506f491 DE |
1917 | } |
1918 | ||
1919 | /* Mark things set by a SET. */ | |
1920 | ||
1921 | static void | |
1d088dee | 1922 | mark_set (rtx pat, rtx insn) |
7506f491 DE |
1923 | { |
1924 | rtx dest = SET_DEST (pat); | |
1925 | ||
1926 | while (GET_CODE (dest) == SUBREG | |
1927 | || GET_CODE (dest) == ZERO_EXTRACT | |
7506f491 DE |
1928 | || GET_CODE (dest) == STRICT_LOW_PART) |
1929 | dest = XEXP (dest, 0); | |
1930 | ||
7b1b4aed | 1931 | if (REG_P (dest)) |
73991d6a | 1932 | SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest)); |
7b1b4aed | 1933 | else if (MEM_P (dest)) |
a13d4ebf AM |
1934 | record_last_mem_set_info (insn); |
1935 | ||
6e72d1e9 | 1936 | if (GET_CODE (SET_SRC (pat)) == CALL) |
b5ce41ff | 1937 | mark_call (insn); |
7506f491 DE |
1938 | } |
1939 | ||
1940 | /* Record things set by a CLOBBER. */ | |
1941 | ||
1942 | static void | |
1d088dee | 1943 | mark_clobber (rtx pat, rtx insn) |
7506f491 DE |
1944 | { |
1945 | rtx clob = XEXP (pat, 0); | |
1946 | ||
1947 | while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART) | |
1948 | clob = XEXP (clob, 0); | |
1949 | ||
7b1b4aed | 1950 | if (REG_P (clob)) |
73991d6a | 1951 | SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob)); |
a13d4ebf AM |
1952 | else |
1953 | record_last_mem_set_info (insn); | |
7506f491 DE |
1954 | } |
1955 | ||
1956 | /* Record things set by INSN. | |
1957 | This data is used by oprs_not_set_p. */ | |
1958 | ||
1959 | static void | |
1d088dee | 1960 | mark_oprs_set (rtx insn) |
7506f491 DE |
1961 | { |
1962 | rtx pat = PATTERN (insn); | |
c4c81601 | 1963 | int i; |
7506f491 DE |
1964 | |
1965 | if (GET_CODE (pat) == SET) | |
1966 | mark_set (pat, insn); | |
1967 | else if (GET_CODE (pat) == PARALLEL) | |
c4c81601 RK |
1968 | for (i = 0; i < XVECLEN (pat, 0); i++) |
1969 | { | |
1970 | rtx x = XVECEXP (pat, 0, i); | |
1971 | ||
1972 | if (GET_CODE (x) == SET) | |
1973 | mark_set (x, insn); | |
1974 | else if (GET_CODE (x) == CLOBBER) | |
1975 | mark_clobber (x, insn); | |
6e72d1e9 | 1976 | else if (GET_CODE (x) == CALL) |
c4c81601 RK |
1977 | mark_call (insn); |
1978 | } | |
7506f491 | 1979 | |
7506f491 DE |
1980 | else if (GET_CODE (pat) == CLOBBER) |
1981 | mark_clobber (pat, insn); | |
6e72d1e9 | 1982 | else if (GET_CODE (pat) == CALL) |
b5ce41ff | 1983 | mark_call (insn); |
7506f491 | 1984 | } |
b5ce41ff | 1985 | |
7506f491 DE |
1986 | \f |
1987 | /* Compute copy/constant propagation working variables. */ | |
1988 | ||
1989 | /* Local properties of assignments. */ | |
7506f491 DE |
1990 | static sbitmap *cprop_pavloc; |
1991 | static sbitmap *cprop_absaltered; | |
1992 | ||
1993 | /* Global properties of assignments (computed from the local properties). */ | |
7506f491 DE |
1994 | static sbitmap *cprop_avin; |
1995 | static sbitmap *cprop_avout; | |
1996 | ||
c4c81601 RK |
1997 | /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of |
1998 | basic blocks. N_SETS is the number of sets. */ | |
7506f491 DE |
1999 | |
2000 | static void | |
1d088dee | 2001 | alloc_cprop_mem (int n_blocks, int n_sets) |
7506f491 DE |
2002 | { |
2003 | cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets); | |
2004 | cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets); | |
2005 | ||
2006 | cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets); | |
2007 | cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets); | |
2008 | } | |
2009 | ||
2010 | /* Free vars used by copy/const propagation. */ | |
2011 | ||
2012 | static void | |
1d088dee | 2013 | free_cprop_mem (void) |
7506f491 | 2014 | { |
5a660bff DB |
2015 | sbitmap_vector_free (cprop_pavloc); |
2016 | sbitmap_vector_free (cprop_absaltered); | |
2017 | sbitmap_vector_free (cprop_avin); | |
2018 | sbitmap_vector_free (cprop_avout); | |
7506f491 DE |
2019 | } |
2020 | ||
c4c81601 RK |
2021 | /* For each block, compute whether X is transparent. X is either an |
2022 | expression or an assignment [though we don't care which, for this context | |
2023 | an assignment is treated as an expression]. For each block where an | |
2024 | element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX | |
2025 | bit in BMAP. */ | |
7506f491 DE |
2026 | |
2027 | static void | |
ed7a4b4b | 2028 | compute_transp (const_rtx x, int indx, sbitmap *bmap, int set_p) |
7506f491 | 2029 | { |
e0082a72 | 2030 | int i, j; |
7506f491 | 2031 | enum rtx_code code; |
6f7d635c | 2032 | const char *fmt; |
7506f491 | 2033 | |
c4c81601 RK |
2034 | /* repeat is used to turn tail-recursion into iteration since GCC |
2035 | can't do it when there's no return value. */ | |
7506f491 DE |
2036 | repeat: |
2037 | ||
2038 | if (x == 0) | |
2039 | return; | |
2040 | ||
2041 | code = GET_CODE (x); | |
2042 | switch (code) | |
2043 | { | |
2044 | case REG: | |
c4c81601 RK |
2045 | if (set_p) |
2046 | { | |
4a81774c SB |
2047 | df_ref def; |
2048 | for (def = DF_REG_DEF_CHAIN (REGNO (x)); | |
2049 | def; | |
2050 | def = DF_REF_NEXT_REG (def)) | |
2051 | SET_BIT (bmap[DF_REF_BB (def)->index], indx); | |
c4c81601 RK |
2052 | } |
2053 | else | |
2054 | { | |
4a81774c SB |
2055 | df_ref def; |
2056 | for (def = DF_REG_DEF_CHAIN (REGNO (x)); | |
2057 | def; | |
2058 | def = DF_REF_NEXT_REG (def)) | |
2059 | RESET_BIT (bmap[DF_REF_BB (def)->index], indx); | |
c4c81601 | 2060 | } |
7506f491 | 2061 | |
c4c81601 | 2062 | return; |
7506f491 DE |
2063 | |
2064 | case MEM: | |
16c5b95d MH |
2065 | if (! MEM_READONLY_P (x)) |
2066 | { | |
2067 | bitmap_iterator bi; | |
2068 | unsigned bb_index; | |
aa47fcfa | 2069 | |
16c5b95d MH |
2070 | /* First handle all the blocks with calls. We don't need to |
2071 | do any list walking for them. */ | |
2072 | EXECUTE_IF_SET_IN_BITMAP (blocks_with_calls, 0, bb_index, bi) | |
2073 | { | |
2074 | if (set_p) | |
2075 | SET_BIT (bmap[bb_index], indx); | |
2076 | else | |
2077 | RESET_BIT (bmap[bb_index], indx); | |
2078 | } | |
aa47fcfa | 2079 | |
16c5b95d MH |
2080 | /* Now iterate over the blocks which have memory modifications |
2081 | but which do not have any calls. */ | |
b8698a0f | 2082 | EXECUTE_IF_AND_COMPL_IN_BITMAP (modify_mem_list_set, |
16c5b95d MH |
2083 | blocks_with_calls, |
2084 | 0, bb_index, bi) | |
aa47fcfa | 2085 | { |
16c5b95d | 2086 | rtx list_entry = canon_modify_mem_list[bb_index]; |
aa47fcfa | 2087 | |
16c5b95d | 2088 | while (list_entry) |
aa47fcfa | 2089 | { |
16c5b95d MH |
2090 | rtx dest, dest_addr; |
2091 | ||
2092 | /* LIST_ENTRY must be an INSN of some kind that sets memory. | |
2093 | Examine each hunk of memory that is modified. */ | |
2094 | ||
2095 | dest = XEXP (list_entry, 0); | |
2096 | list_entry = XEXP (list_entry, 1); | |
2097 | dest_addr = XEXP (list_entry, 0); | |
2098 | ||
2099 | if (canon_true_dependence (dest, GET_MODE (dest), dest_addr, | |
6216f94e | 2100 | x, NULL_RTX, rtx_addr_varies_p)) |
16c5b95d MH |
2101 | { |
2102 | if (set_p) | |
2103 | SET_BIT (bmap[bb_index], indx); | |
2104 | else | |
2105 | RESET_BIT (bmap[bb_index], indx); | |
2106 | break; | |
2107 | } | |
2108 | list_entry = XEXP (list_entry, 1); | |
2109 | } | |
aa47fcfa | 2110 | } |
16c5b95d | 2111 | } |
c4c81601 | 2112 | |
7506f491 DE |
2113 | x = XEXP (x, 0); |
2114 | goto repeat; | |
2115 | ||
2116 | case PC: | |
2117 | case CC0: /*FIXME*/ | |
2118 | case CONST: | |
2119 | case CONST_INT: | |
2120 | case CONST_DOUBLE: | |
091a3ac7 | 2121 | case CONST_FIXED: |
69ef87e2 | 2122 | case CONST_VECTOR: |
7506f491 DE |
2123 | case SYMBOL_REF: |
2124 | case LABEL_REF: | |
2125 | case ADDR_VEC: | |
2126 | case ADDR_DIFF_VEC: | |
2127 | return; | |
2128 | ||
2129 | default: | |
2130 | break; | |
2131 | } | |
2132 | ||
c4c81601 | 2133 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2134 | { |
2135 | if (fmt[i] == 'e') | |
2136 | { | |
7506f491 DE |
2137 | /* If we are about to do the last recursive call |
2138 | needed at this level, change it into iteration. | |
2139 | This function is called enough to be worth it. */ | |
2140 | if (i == 0) | |
2141 | { | |
c4c81601 | 2142 | x = XEXP (x, i); |
7506f491 DE |
2143 | goto repeat; |
2144 | } | |
c4c81601 RK |
2145 | |
2146 | compute_transp (XEXP (x, i), indx, bmap, set_p); | |
7506f491 DE |
2147 | } |
2148 | else if (fmt[i] == 'E') | |
c4c81601 RK |
2149 | for (j = 0; j < XVECLEN (x, i); j++) |
2150 | compute_transp (XVECEXP (x, i, j), indx, bmap, set_p); | |
7506f491 DE |
2151 | } |
2152 | } | |
2153 | ||
7506f491 DE |
2154 | /* Top level routine to do the dataflow analysis needed by copy/const |
2155 | propagation. */ | |
2156 | ||
2157 | static void | |
1d088dee | 2158 | compute_cprop_data (void) |
7506f491 | 2159 | { |
02280659 | 2160 | compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table); |
ce724250 JL |
2161 | compute_available (cprop_pavloc, cprop_absaltered, |
2162 | cprop_avout, cprop_avin); | |
7506f491 DE |
2163 | } |
2164 | \f | |
2165 | /* Copy/constant propagation. */ | |
2166 | ||
7506f491 DE |
2167 | /* Maximum number of register uses in an insn that we handle. */ |
2168 | #define MAX_USES 8 | |
2169 | ||
2170 | /* Table of uses found in an insn. | |
2171 | Allocated statically to avoid alloc/free complexity and overhead. */ | |
2172 | static struct reg_use reg_use_table[MAX_USES]; | |
2173 | ||
2174 | /* Index into `reg_use_table' while building it. */ | |
2175 | static int reg_use_count; | |
2176 | ||
c4c81601 RK |
2177 | /* Set up a list of register numbers used in INSN. The found uses are stored |
2178 | in `reg_use_table'. `reg_use_count' is initialized to zero before entry, | |
2179 | and contains the number of uses in the table upon exit. | |
7506f491 | 2180 | |
c4c81601 RK |
2181 | ??? If a register appears multiple times we will record it multiple times. |
2182 | This doesn't hurt anything but it will slow things down. */ | |
7506f491 DE |
2183 | |
2184 | static void | |
1d088dee | 2185 | find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED) |
7506f491 | 2186 | { |
c4c81601 | 2187 | int i, j; |
7506f491 | 2188 | enum rtx_code code; |
6f7d635c | 2189 | const char *fmt; |
9e71c818 | 2190 | rtx x = *xptr; |
7506f491 | 2191 | |
c4c81601 RK |
2192 | /* repeat is used to turn tail-recursion into iteration since GCC |
2193 | can't do it when there's no return value. */ | |
7506f491 | 2194 | repeat: |
7506f491 DE |
2195 | if (x == 0) |
2196 | return; | |
2197 | ||
2198 | code = GET_CODE (x); | |
9e71c818 | 2199 | if (REG_P (x)) |
7506f491 | 2200 | { |
7506f491 DE |
2201 | if (reg_use_count == MAX_USES) |
2202 | return; | |
c4c81601 | 2203 | |
7506f491 DE |
2204 | reg_use_table[reg_use_count].reg_rtx = x; |
2205 | reg_use_count++; | |
7506f491 DE |
2206 | } |
2207 | ||
2208 | /* Recursively scan the operands of this expression. */ | |
2209 | ||
c4c81601 | 2210 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2211 | { |
2212 | if (fmt[i] == 'e') | |
2213 | { | |
2214 | /* If we are about to do the last recursive call | |
2215 | needed at this level, change it into iteration. | |
2216 | This function is called enough to be worth it. */ | |
2217 | if (i == 0) | |
2218 | { | |
2219 | x = XEXP (x, 0); | |
2220 | goto repeat; | |
2221 | } | |
c4c81601 | 2222 | |
9e71c818 | 2223 | find_used_regs (&XEXP (x, i), data); |
7506f491 DE |
2224 | } |
2225 | else if (fmt[i] == 'E') | |
c4c81601 | 2226 | for (j = 0; j < XVECLEN (x, i); j++) |
9e71c818 | 2227 | find_used_regs (&XVECEXP (x, i, j), data); |
7506f491 DE |
2228 | } |
2229 | } | |
2230 | ||
2231 | /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO. | |
cc2902df | 2232 | Returns nonzero is successful. */ |
7506f491 DE |
2233 | |
2234 | static int | |
1d088dee | 2235 | try_replace_reg (rtx from, rtx to, rtx insn) |
7506f491 | 2236 | { |
205eb6e7 | 2237 | rtx note = find_reg_equal_equiv_note (insn); |
fb0c0a12 | 2238 | rtx src = 0; |
172890a2 RK |
2239 | int success = 0; |
2240 | rtx set = single_set (insn); | |
833fc3ad | 2241 | |
3e916873 JH |
2242 | /* Usually we substitute easy stuff, so we won't copy everything. |
2243 | We however need to take care to not duplicate non-trivial CONST | |
2244 | expressions. */ | |
2245 | to = copy_rtx (to); | |
2246 | ||
2b773ee2 JH |
2247 | validate_replace_src_group (from, to, insn); |
2248 | if (num_changes_pending () && apply_change_group ()) | |
2249 | success = 1; | |
9e71c818 | 2250 | |
9feff114 JDA |
2251 | /* Try to simplify SET_SRC if we have substituted a constant. */ |
2252 | if (success && set && CONSTANT_P (to)) | |
2253 | { | |
2254 | src = simplify_rtx (SET_SRC (set)); | |
2255 | ||
2256 | if (src) | |
2257 | validate_change (insn, &SET_SRC (set), src, 0); | |
2258 | } | |
2259 | ||
205eb6e7 RS |
2260 | /* If there is already a REG_EQUAL note, update the expression in it |
2261 | with our replacement. */ | |
2262 | if (note != 0 && REG_NOTE_KIND (note) == REG_EQUAL) | |
a31830a7 | 2263 | set_unique_reg_note (insn, REG_EQUAL, |
3af4ba41 | 2264 | simplify_replace_rtx (XEXP (note, 0), from, to)); |
f305679f | 2265 | if (!success && set && reg_mentioned_p (from, SET_SRC (set))) |
833fc3ad | 2266 | { |
f305679f JH |
2267 | /* If above failed and this is a single set, try to simplify the source of |
2268 | the set given our substitution. We could perhaps try this for multiple | |
2269 | SETs, but it probably won't buy us anything. */ | |
172890a2 RK |
2270 | src = simplify_replace_rtx (SET_SRC (set), from, to); |
2271 | ||
9e71c818 JH |
2272 | if (!rtx_equal_p (src, SET_SRC (set)) |
2273 | && validate_change (insn, &SET_SRC (set), src, 0)) | |
172890a2 | 2274 | success = 1; |
833fc3ad | 2275 | |
bbd288a4 FS |
2276 | /* If we've failed to do replacement, have a single SET, don't already |
2277 | have a note, and have no special SET, add a REG_EQUAL note to not | |
2278 | lose information. */ | |
2279 | if (!success && note == 0 && set != 0 | |
70a640af AK |
2280 | && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT |
2281 | && GET_CODE (SET_DEST (set)) != STRICT_LOW_PART) | |
f305679f JH |
2282 | note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); |
2283 | } | |
e251e2a2 | 2284 | |
172890a2 RK |
2285 | /* REG_EQUAL may get simplified into register. |
2286 | We don't allow that. Remove that note. This code ought | |
fbe5a4a6 | 2287 | not to happen, because previous code ought to synthesize |
172890a2 | 2288 | reg-reg move, but be on the safe side. */ |
205eb6e7 | 2289 | if (note && REG_NOTE_KIND (note) == REG_EQUAL && REG_P (XEXP (note, 0))) |
172890a2 | 2290 | remove_note (insn, note); |
833fc3ad | 2291 | |
833fc3ad JH |
2292 | return success; |
2293 | } | |
c4c81601 RK |
2294 | |
2295 | /* Find a set of REGNOs that are available on entry to INSN's block. Returns | |
2296 | NULL no such set is found. */ | |
7506f491 DE |
2297 | |
2298 | static struct expr * | |
1d088dee | 2299 | find_avail_set (int regno, rtx insn) |
7506f491 | 2300 | { |
cafba495 BS |
2301 | /* SET1 contains the last set found that can be returned to the caller for |
2302 | use in a substitution. */ | |
2303 | struct expr *set1 = 0; | |
589005ff | 2304 | |
cafba495 | 2305 | /* Loops are not possible here. To get a loop we would need two sets |
454ff5cb | 2306 | available at the start of the block containing INSN. i.e. we would |
cafba495 BS |
2307 | need two sets like this available at the start of the block: |
2308 | ||
2309 | (set (reg X) (reg Y)) | |
2310 | (set (reg Y) (reg X)) | |
2311 | ||
2312 | This can not happen since the set of (reg Y) would have killed the | |
2313 | set of (reg X) making it unavailable at the start of this block. */ | |
2314 | while (1) | |
8e42ace1 | 2315 | { |
cafba495 | 2316 | rtx src; |
ceda50e9 | 2317 | struct expr *set = lookup_set (regno, &set_hash_table); |
cafba495 BS |
2318 | |
2319 | /* Find a set that is available at the start of the block | |
2320 | which contains INSN. */ | |
2321 | while (set) | |
2322 | { | |
b0de17ef SB |
2323 | if (TEST_BIT (cprop_avin[BLOCK_FOR_INSN (insn)->index], |
2324 | set->bitmap_index)) | |
cafba495 BS |
2325 | break; |
2326 | set = next_set (regno, set); | |
2327 | } | |
7506f491 | 2328 | |
cafba495 BS |
2329 | /* If no available set was found we've reached the end of the |
2330 | (possibly empty) copy chain. */ | |
2331 | if (set == 0) | |
589005ff | 2332 | break; |
cafba495 | 2333 | |
282899df | 2334 | gcc_assert (GET_CODE (set->expr) == SET); |
cafba495 BS |
2335 | |
2336 | src = SET_SRC (set->expr); | |
2337 | ||
2338 | /* We know the set is available. | |
2339 | Now check that SRC is ANTLOC (i.e. none of the source operands | |
589005ff | 2340 | have changed since the start of the block). |
cafba495 BS |
2341 | |
2342 | If the source operand changed, we may still use it for the next | |
2343 | iteration of this loop, but we may not use it for substitutions. */ | |
c4c81601 | 2344 | |
6b2d1c9e | 2345 | if (gcse_constant_p (src) || oprs_not_set_p (src, insn)) |
cafba495 BS |
2346 | set1 = set; |
2347 | ||
2348 | /* If the source of the set is anything except a register, then | |
2349 | we have reached the end of the copy chain. */ | |
7b1b4aed | 2350 | if (! REG_P (src)) |
7506f491 | 2351 | break; |
7506f491 | 2352 | |
454ff5cb | 2353 | /* Follow the copy chain, i.e. start another iteration of the loop |
cafba495 BS |
2354 | and see if we have an available copy into SRC. */ |
2355 | regno = REGNO (src); | |
8e42ace1 | 2356 | } |
cafba495 BS |
2357 | |
2358 | /* SET1 holds the last set that was available and anticipatable at | |
2359 | INSN. */ | |
2360 | return set1; | |
7506f491 DE |
2361 | } |
2362 | ||
abd535b6 | 2363 | /* Subroutine of cprop_insn that tries to propagate constants into |
0e3f0221 | 2364 | JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL |
fbe5a4a6 | 2365 | it is the instruction that immediately precedes JUMP, and must be a |
818b6b7f | 2366 | single SET of a register. FROM is what we will try to replace, |
0e3f0221 | 2367 | SRC is the constant we will try to substitute for it. Returns nonzero |
589005ff | 2368 | if a change was made. */ |
c4c81601 | 2369 | |
abd535b6 | 2370 | static int |
1d088dee | 2371 | cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src) |
abd535b6 | 2372 | { |
60564289 | 2373 | rtx new_rtx, set_src, note_src; |
0e3f0221 | 2374 | rtx set = pc_set (jump); |
bc6688b4 | 2375 | rtx note = find_reg_equal_equiv_note (jump); |
0e3f0221 | 2376 | |
bc6688b4 RS |
2377 | if (note) |
2378 | { | |
2379 | note_src = XEXP (note, 0); | |
2380 | if (GET_CODE (note_src) == EXPR_LIST) | |
2381 | note_src = NULL_RTX; | |
2382 | } | |
2383 | else note_src = NULL_RTX; | |
2384 | ||
2385 | /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */ | |
2386 | set_src = note_src ? note_src : SET_SRC (set); | |
2387 | ||
2388 | /* First substitute the SETCC condition into the JUMP instruction, | |
2389 | then substitute that given values into this expanded JUMP. */ | |
2390 | if (setcc != NULL_RTX | |
48ddd46c JH |
2391 | && !modified_between_p (from, setcc, jump) |
2392 | && !modified_between_p (src, setcc, jump)) | |
b2f02503 | 2393 | { |
bc6688b4 | 2394 | rtx setcc_src; |
b2f02503 | 2395 | rtx setcc_set = single_set (setcc); |
bc6688b4 RS |
2396 | rtx setcc_note = find_reg_equal_equiv_note (setcc); |
2397 | setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST) | |
2398 | ? XEXP (setcc_note, 0) : SET_SRC (setcc_set); | |
2399 | set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set), | |
2400 | setcc_src); | |
b2f02503 | 2401 | } |
0e3f0221 | 2402 | else |
bc6688b4 | 2403 | setcc = NULL_RTX; |
0e3f0221 | 2404 | |
60564289 | 2405 | new_rtx = simplify_replace_rtx (set_src, from, src); |
abd535b6 | 2406 | |
bc6688b4 | 2407 | /* If no simplification can be made, then try the next register. */ |
60564289 | 2408 | if (rtx_equal_p (new_rtx, SET_SRC (set))) |
9e48c409 | 2409 | return 0; |
589005ff | 2410 | |
7d5ab30e | 2411 | /* If this is now a no-op delete it, otherwise this must be a valid insn. */ |
60564289 | 2412 | if (new_rtx == pc_rtx) |
0e3f0221 | 2413 | delete_insn (jump); |
7d5ab30e | 2414 | else |
abd535b6 | 2415 | { |
48ddd46c JH |
2416 | /* Ensure the value computed inside the jump insn to be equivalent |
2417 | to one computed by setcc. */ | |
60564289 | 2418 | if (setcc && modified_in_p (new_rtx, setcc)) |
48ddd46c | 2419 | return 0; |
60564289 | 2420 | if (! validate_unshare_change (jump, &SET_SRC (set), new_rtx, 0)) |
bc6688b4 RS |
2421 | { |
2422 | /* When (some) constants are not valid in a comparison, and there | |
2423 | are two registers to be replaced by constants before the entire | |
2424 | comparison can be folded into a constant, we need to keep | |
2425 | intermediate information in REG_EQUAL notes. For targets with | |
2426 | separate compare insns, such notes are added by try_replace_reg. | |
2427 | When we have a combined compare-and-branch instruction, however, | |
2428 | we need to attach a note to the branch itself to make this | |
2429 | optimization work. */ | |
2430 | ||
60564289 KG |
2431 | if (!rtx_equal_p (new_rtx, note_src)) |
2432 | set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new_rtx)); | |
bc6688b4 RS |
2433 | return 0; |
2434 | } | |
2435 | ||
2436 | /* Remove REG_EQUAL note after simplification. */ | |
2437 | if (note_src) | |
2438 | remove_note (jump, note); | |
7d5ab30e | 2439 | } |
abd535b6 | 2440 | |
0e3f0221 RS |
2441 | #ifdef HAVE_cc0 |
2442 | /* Delete the cc0 setter. */ | |
818b6b7f | 2443 | if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc)))) |
0e3f0221 RS |
2444 | delete_insn (setcc); |
2445 | #endif | |
2446 | ||
27fb79ad | 2447 | global_const_prop_count++; |
10d22567 | 2448 | if (dump_file != NULL) |
172890a2 | 2449 | { |
10d22567 | 2450 | fprintf (dump_file, |
27fb79ad | 2451 | "GLOBAL CONST-PROP: Replacing reg %d in jump_insn %d with constant ", |
0e3f0221 | 2452 | REGNO (from), INSN_UID (jump)); |
10d22567 ZD |
2453 | print_rtl (dump_file, src); |
2454 | fprintf (dump_file, "\n"); | |
abd535b6 | 2455 | } |
0005550b | 2456 | purge_dead_edges (bb); |
172890a2 | 2457 | |
d0a55efc JJ |
2458 | /* If a conditional jump has been changed into unconditional jump, remove |
2459 | the jump and make the edge fallthru - this is always called in | |
2460 | cfglayout mode. */ | |
60564289 | 2461 | if (new_rtx != pc_rtx && simplejump_p (jump)) |
d0a55efc JJ |
2462 | { |
2463 | edge e; | |
2464 | edge_iterator ei; | |
2465 | ||
2466 | for (ei = ei_start (bb->succs); (e = ei_safe_edge (ei)); ei_next (&ei)) | |
2467 | if (e->dest != EXIT_BLOCK_PTR | |
2468 | && BB_HEAD (e->dest) == JUMP_LABEL (jump)) | |
2469 | { | |
2470 | e->flags |= EDGE_FALLTHRU; | |
2471 | break; | |
2472 | } | |
2473 | delete_insn (jump); | |
2474 | } | |
2475 | ||
172890a2 | 2476 | return 1; |
abd535b6 BS |
2477 | } |
2478 | ||
ae860ff7 | 2479 | static bool |
5f39ad47 | 2480 | constprop_register (rtx insn, rtx from, rtx to) |
ae860ff7 JH |
2481 | { |
2482 | rtx sset; | |
2483 | ||
2484 | /* Check for reg or cc0 setting instructions followed by | |
2485 | conditional branch instructions first. */ | |
5f39ad47 | 2486 | if ((sset = single_set (insn)) != NULL |
244d05fb | 2487 | && NEXT_INSN (insn) |
ae860ff7 JH |
2488 | && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn))) |
2489 | { | |
2490 | rtx dest = SET_DEST (sset); | |
2491 | if ((REG_P (dest) || CC0_P (dest)) | |
2492 | && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to)) | |
2493 | return 1; | |
2494 | } | |
2495 | ||
2496 | /* Handle normal insns next. */ | |
4b4bf941 | 2497 | if (NONJUMP_INSN_P (insn) |
ae860ff7 JH |
2498 | && try_replace_reg (from, to, insn)) |
2499 | return 1; | |
2500 | ||
2501 | /* Try to propagate a CONST_INT into a conditional jump. | |
2502 | We're pretty specific about what we will handle in this | |
2503 | code, we can extend this as necessary over time. | |
2504 | ||
2505 | Right now the insn in question must look like | |
2506 | (set (pc) (if_then_else ...)) */ | |
5f39ad47 | 2507 | else if (any_condjump_p (insn) && onlyjump_p (insn)) |
ae860ff7 JH |
2508 | return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to); |
2509 | return 0; | |
2510 | } | |
2511 | ||
7506f491 | 2512 | /* Perform constant and copy propagation on INSN. |
cc2902df | 2513 | The result is nonzero if a change was made. */ |
7506f491 DE |
2514 | |
2515 | static int | |
5f39ad47 | 2516 | cprop_insn (rtx insn) |
7506f491 DE |
2517 | { |
2518 | struct reg_use *reg_used; | |
2519 | int changed = 0; | |
833fc3ad | 2520 | rtx note; |
7506f491 | 2521 | |
9e71c818 | 2522 | if (!INSN_P (insn)) |
7506f491 DE |
2523 | return 0; |
2524 | ||
2525 | reg_use_count = 0; | |
9e71c818 | 2526 | note_uses (&PATTERN (insn), find_used_regs, NULL); |
589005ff | 2527 | |
172890a2 | 2528 | note = find_reg_equal_equiv_note (insn); |
833fc3ad | 2529 | |
dc297297 | 2530 | /* We may win even when propagating constants into notes. */ |
833fc3ad | 2531 | if (note) |
9e71c818 | 2532 | find_used_regs (&XEXP (note, 0), NULL); |
7506f491 | 2533 | |
c4c81601 RK |
2534 | for (reg_used = ®_use_table[0]; reg_use_count > 0; |
2535 | reg_used++, reg_use_count--) | |
7506f491 | 2536 | { |
770ae6cc | 2537 | unsigned int regno = REGNO (reg_used->reg_rtx); |
7506f491 DE |
2538 | rtx pat, src; |
2539 | struct expr *set; | |
7506f491 | 2540 | |
7506f491 DE |
2541 | /* If the register has already been set in this block, there's |
2542 | nothing we can do. */ | |
2543 | if (! oprs_not_set_p (reg_used->reg_rtx, insn)) | |
2544 | continue; | |
2545 | ||
2546 | /* Find an assignment that sets reg_used and is available | |
2547 | at the start of the block. */ | |
2548 | set = find_avail_set (regno, insn); | |
2549 | if (! set) | |
2550 | continue; | |
589005ff | 2551 | |
7506f491 DE |
2552 | pat = set->expr; |
2553 | /* ??? We might be able to handle PARALLELs. Later. */ | |
282899df | 2554 | gcc_assert (GET_CODE (pat) == SET); |
c4c81601 | 2555 | |
7506f491 DE |
2556 | src = SET_SRC (pat); |
2557 | ||
e78d9500 | 2558 | /* Constant propagation. */ |
6b2d1c9e | 2559 | if (gcse_constant_p (src)) |
7506f491 | 2560 | { |
5f39ad47 | 2561 | if (constprop_register (insn, reg_used->reg_rtx, src)) |
7506f491 DE |
2562 | { |
2563 | changed = 1; | |
27fb79ad | 2564 | global_const_prop_count++; |
10d22567 | 2565 | if (dump_file != NULL) |
7506f491 | 2566 | { |
10d22567 ZD |
2567 | fprintf (dump_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno); |
2568 | fprintf (dump_file, "insn %d with constant ", INSN_UID (insn)); | |
2569 | print_rtl (dump_file, src); | |
2570 | fprintf (dump_file, "\n"); | |
7506f491 | 2571 | } |
bc6688b4 RS |
2572 | if (INSN_DELETED_P (insn)) |
2573 | return 1; | |
7506f491 DE |
2574 | } |
2575 | } | |
7b1b4aed | 2576 | else if (REG_P (src) |
7506f491 DE |
2577 | && REGNO (src) >= FIRST_PSEUDO_REGISTER |
2578 | && REGNO (src) != regno) | |
2579 | { | |
cafba495 | 2580 | if (try_replace_reg (reg_used->reg_rtx, src, insn)) |
7506f491 | 2581 | { |
cafba495 | 2582 | changed = 1; |
27fb79ad | 2583 | global_copy_prop_count++; |
10d22567 | 2584 | if (dump_file != NULL) |
7506f491 | 2585 | { |
10d22567 | 2586 | fprintf (dump_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d", |
c4c81601 | 2587 | regno, INSN_UID (insn)); |
10d22567 | 2588 | fprintf (dump_file, " with reg %d\n", REGNO (src)); |
7506f491 | 2589 | } |
cafba495 BS |
2590 | |
2591 | /* The original insn setting reg_used may or may not now be | |
2592 | deletable. We leave the deletion to flow. */ | |
2593 | /* FIXME: If it turns out that the insn isn't deletable, | |
2594 | then we may have unnecessarily extended register lifetimes | |
2595 | and made things worse. */ | |
7506f491 DE |
2596 | } |
2597 | } | |
2598 | } | |
2599 | ||
b5b8b0ac AO |
2600 | if (changed && DEBUG_INSN_P (insn)) |
2601 | return 0; | |
2602 | ||
7506f491 DE |
2603 | return changed; |
2604 | } | |
2605 | ||
710ee3ed RH |
2606 | /* Like find_used_regs, but avoid recording uses that appear in |
2607 | input-output contexts such as zero_extract or pre_dec. This | |
2608 | restricts the cases we consider to those for which local cprop | |
2609 | can legitimately make replacements. */ | |
2610 | ||
2611 | static void | |
1d088dee | 2612 | local_cprop_find_used_regs (rtx *xptr, void *data) |
710ee3ed RH |
2613 | { |
2614 | rtx x = *xptr; | |
2615 | ||
2616 | if (x == 0) | |
2617 | return; | |
2618 | ||
2619 | switch (GET_CODE (x)) | |
2620 | { | |
2621 | case ZERO_EXTRACT: | |
2622 | case SIGN_EXTRACT: | |
2623 | case STRICT_LOW_PART: | |
2624 | return; | |
2625 | ||
2626 | case PRE_DEC: | |
2627 | case PRE_INC: | |
2628 | case POST_DEC: | |
2629 | case POST_INC: | |
2630 | case PRE_MODIFY: | |
2631 | case POST_MODIFY: | |
2632 | /* Can only legitimately appear this early in the context of | |
2633 | stack pushes for function arguments, but handle all of the | |
2634 | codes nonetheless. */ | |
2635 | return; | |
2636 | ||
2637 | case SUBREG: | |
2638 | /* Setting a subreg of a register larger than word_mode leaves | |
2639 | the non-written words unchanged. */ | |
2640 | if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD) | |
2641 | return; | |
2642 | break; | |
2643 | ||
2644 | default: | |
2645 | break; | |
2646 | } | |
2647 | ||
2648 | find_used_regs (xptr, data); | |
2649 | } | |
1d088dee | 2650 | |
5f39ad47 | 2651 | /* Try to perform local const/copy propagation on X in INSN. */ |
e197b6fc | 2652 | |
ae860ff7 | 2653 | static bool |
5f39ad47 | 2654 | do_local_cprop (rtx x, rtx insn) |
ae860ff7 JH |
2655 | { |
2656 | rtx newreg = NULL, newcnst = NULL; | |
2657 | ||
e197b6fc RH |
2658 | /* Rule out USE instructions and ASM statements as we don't want to |
2659 | change the hard registers mentioned. */ | |
7b1b4aed | 2660 | if (REG_P (x) |
ae860ff7 | 2661 | && (REGNO (x) >= FIRST_PSEUDO_REGISTER |
e197b6fc RH |
2662 | || (GET_CODE (PATTERN (insn)) != USE |
2663 | && asm_noperands (PATTERN (insn)) < 0))) | |
ae860ff7 JH |
2664 | { |
2665 | cselib_val *val = cselib_lookup (x, GET_MODE (x), 0); | |
2666 | struct elt_loc_list *l; | |
2667 | ||
2668 | if (!val) | |
2669 | return false; | |
2670 | for (l = val->locs; l; l = l->next) | |
2671 | { | |
2672 | rtx this_rtx = l->loc; | |
46690369 JH |
2673 | rtx note; |
2674 | ||
6b2d1c9e | 2675 | if (gcse_constant_p (this_rtx)) |
ae860ff7 | 2676 | newcnst = this_rtx; |
46690369 JH |
2677 | if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER |
2678 | /* Don't copy propagate if it has attached REG_EQUIV note. | |
2679 | At this point this only function parameters should have | |
2680 | REG_EQUIV notes and if the argument slot is used somewhere | |
2681 | explicitly, it means address of parameter has been taken, | |
2682 | so we should not extend the lifetime of the pseudo. */ | |
2683 | && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX)) | |
7b1b4aed | 2684 | || ! MEM_P (XEXP (note, 0)))) |
ae860ff7 JH |
2685 | newreg = this_rtx; |
2686 | } | |
5f39ad47 | 2687 | if (newcnst && constprop_register (insn, x, newcnst)) |
ae860ff7 | 2688 | { |
10d22567 | 2689 | if (dump_file != NULL) |
ae860ff7 | 2690 | { |
10d22567 | 2691 | fprintf (dump_file, "LOCAL CONST-PROP: Replacing reg %d in ", |
ae860ff7 | 2692 | REGNO (x)); |
10d22567 | 2693 | fprintf (dump_file, "insn %d with constant ", |
ae860ff7 | 2694 | INSN_UID (insn)); |
10d22567 ZD |
2695 | print_rtl (dump_file, newcnst); |
2696 | fprintf (dump_file, "\n"); | |
ae860ff7 | 2697 | } |
27fb79ad | 2698 | local_const_prop_count++; |
ae860ff7 JH |
2699 | return true; |
2700 | } | |
2701 | else if (newreg && newreg != x && try_replace_reg (x, newreg, insn)) | |
2702 | { | |
10d22567 | 2703 | if (dump_file != NULL) |
ae860ff7 | 2704 | { |
10d22567 | 2705 | fprintf (dump_file, |
ae860ff7 JH |
2706 | "LOCAL COPY-PROP: Replacing reg %d in insn %d", |
2707 | REGNO (x), INSN_UID (insn)); | |
10d22567 | 2708 | fprintf (dump_file, " with reg %d\n", REGNO (newreg)); |
ae860ff7 | 2709 | } |
27fb79ad | 2710 | local_copy_prop_count++; |
ae860ff7 JH |
2711 | return true; |
2712 | } | |
2713 | } | |
2714 | return false; | |
2715 | } | |
2716 | ||
5f39ad47 | 2717 | /* Do local const/copy propagation (i.e. within each basic block). */ |
eb232f4e | 2718 | |
5f39ad47 SB |
2719 | static int |
2720 | local_cprop_pass (void) | |
ae860ff7 | 2721 | { |
eb232f4e | 2722 | basic_block bb; |
ae860ff7 JH |
2723 | rtx insn; |
2724 | struct reg_use *reg_used; | |
1649d92f | 2725 | bool changed = false; |
ae860ff7 | 2726 | |
457eeaae | 2727 | cselib_init (0); |
eb232f4e | 2728 | FOR_EACH_BB (bb) |
ae860ff7 | 2729 | { |
eb232f4e | 2730 | FOR_BB_INSNS (bb, insn) |
ae860ff7 | 2731 | { |
eb232f4e | 2732 | if (INSN_P (insn)) |
ae860ff7 | 2733 | { |
4a8cae83 | 2734 | rtx note = find_reg_equal_equiv_note (insn); |
eb232f4e SB |
2735 | do |
2736 | { | |
2737 | reg_use_count = 0; | |
2738 | note_uses (&PATTERN (insn), local_cprop_find_used_regs, | |
2739 | NULL); | |
2740 | if (note) | |
2741 | local_cprop_find_used_regs (&XEXP (note, 0), NULL); | |
2742 | ||
2743 | for (reg_used = ®_use_table[0]; reg_use_count > 0; | |
2744 | reg_used++, reg_use_count--) | |
6fb5fa3c | 2745 | { |
5f39ad47 | 2746 | if (do_local_cprop (reg_used->reg_rtx, insn)) |
6fb5fa3c DB |
2747 | { |
2748 | changed = true; | |
2749 | break; | |
2750 | } | |
2751 | } | |
eb232f4e | 2752 | if (INSN_DELETED_P (insn)) |
1649d92f | 2753 | break; |
eb232f4e SB |
2754 | } |
2755 | while (reg_use_count); | |
ae860ff7 | 2756 | } |
eb232f4e | 2757 | cselib_process_insn (insn); |
ae860ff7 | 2758 | } |
eb232f4e | 2759 | |
4a8cae83 | 2760 | /* Forget everything at the end of a basic block. */ |
eb232f4e | 2761 | cselib_clear_table (); |
ae860ff7 | 2762 | } |
eb232f4e | 2763 | |
ae860ff7 | 2764 | cselib_finish (); |
eb232f4e | 2765 | |
7506f491 DE |
2766 | return changed; |
2767 | } | |
2768 | ||
fbef91d8 RS |
2769 | /* Similar to get_condition, only the resulting condition must be |
2770 | valid at JUMP, instead of at EARLIEST. | |
2771 | ||
2772 | This differs from noce_get_condition in ifcvt.c in that we prefer not to | |
2773 | settle for the condition variable in the jump instruction being integral. | |
2774 | We prefer to be able to record the value of a user variable, rather than | |
2775 | the value of a temporary used in a condition. This could be solved by | |
aabcd309 | 2776 | recording the value of *every* register scanned by canonicalize_condition, |
fbef91d8 RS |
2777 | but this would require some code reorganization. */ |
2778 | ||
2fa4a849 | 2779 | rtx |
1d088dee | 2780 | fis_get_condition (rtx jump) |
fbef91d8 | 2781 | { |
45d09c02 | 2782 | return get_condition (jump, NULL, false, true); |
fbef91d8 RS |
2783 | } |
2784 | ||
b0656d8b JW |
2785 | /* Check the comparison COND to see if we can safely form an implicit set from |
2786 | it. COND is either an EQ or NE comparison. */ | |
2787 | ||
2788 | static bool | |
ed7a4b4b | 2789 | implicit_set_cond_p (const_rtx cond) |
b0656d8b | 2790 | { |
ed7a4b4b KG |
2791 | const enum machine_mode mode = GET_MODE (XEXP (cond, 0)); |
2792 | const_rtx cst = XEXP (cond, 1); | |
b0656d8b JW |
2793 | |
2794 | /* We can't perform this optimization if either operand might be or might | |
2795 | contain a signed zero. */ | |
2796 | if (HONOR_SIGNED_ZEROS (mode)) | |
2797 | { | |
2798 | /* It is sufficient to check if CST is or contains a zero. We must | |
2799 | handle float, complex, and vector. If any subpart is a zero, then | |
2800 | the optimization can't be performed. */ | |
2801 | /* ??? The complex and vector checks are not implemented yet. We just | |
2802 | always return zero for them. */ | |
2803 | if (GET_CODE (cst) == CONST_DOUBLE) | |
2804 | { | |
2805 | REAL_VALUE_TYPE d; | |
2806 | REAL_VALUE_FROM_CONST_DOUBLE (d, cst); | |
2807 | if (REAL_VALUES_EQUAL (d, dconst0)) | |
2808 | return 0; | |
2809 | } | |
2810 | else | |
2811 | return 0; | |
2812 | } | |
2813 | ||
2814 | return gcse_constant_p (cst); | |
2815 | } | |
2816 | ||
fbef91d8 RS |
2817 | /* Find the implicit sets of a function. An "implicit set" is a constraint |
2818 | on the value of a variable, implied by a conditional jump. For example, | |
2819 | following "if (x == 2)", the then branch may be optimized as though the | |
2820 | conditional performed an "explicit set", in this example, "x = 2". This | |
2821 | function records the set patterns that are implicit at the start of each | |
5f39ad47 SB |
2822 | basic block. |
2823 | ||
2824 | FIXME: This would be more effective if critical edges are pre-split. As | |
2825 | it is now, we can't record implicit sets for blocks that have | |
2826 | critical successor edges. This results in missed optimizations | |
2827 | and in more (unnecessary) work in cfgcleanup.c:thread_jump(). */ | |
fbef91d8 RS |
2828 | |
2829 | static void | |
1d088dee | 2830 | find_implicit_sets (void) |
fbef91d8 RS |
2831 | { |
2832 | basic_block bb, dest; | |
2833 | unsigned int count; | |
60564289 | 2834 | rtx cond, new_rtx; |
fbef91d8 RS |
2835 | |
2836 | count = 0; | |
2837 | FOR_EACH_BB (bb) | |
a98ebe2e | 2838 | /* Check for more than one successor. */ |
628f6a4e | 2839 | if (EDGE_COUNT (bb->succs) > 1) |
fbef91d8 | 2840 | { |
a813c111 | 2841 | cond = fis_get_condition (BB_END (bb)); |
fbef91d8 RS |
2842 | |
2843 | if (cond | |
2844 | && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE) | |
7b1b4aed | 2845 | && REG_P (XEXP (cond, 0)) |
fbef91d8 | 2846 | && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER |
b0656d8b | 2847 | && implicit_set_cond_p (cond)) |
fbef91d8 RS |
2848 | { |
2849 | dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest | |
2850 | : FALLTHRU_EDGE (bb)->dest; | |
2851 | ||
5f39ad47 SB |
2852 | if (dest |
2853 | /* Record nothing for a critical edge. */ | |
2854 | && single_pred_p (dest) | |
fbef91d8 RS |
2855 | && dest != EXIT_BLOCK_PTR) |
2856 | { | |
60564289 | 2857 | new_rtx = gen_rtx_SET (VOIDmode, XEXP (cond, 0), |
fbef91d8 | 2858 | XEXP (cond, 1)); |
60564289 | 2859 | implicit_sets[dest->index] = new_rtx; |
10d22567 | 2860 | if (dump_file) |
fbef91d8 | 2861 | { |
10d22567 | 2862 | fprintf(dump_file, "Implicit set of reg %d in ", |
fbef91d8 | 2863 | REGNO (XEXP (cond, 0))); |
10d22567 | 2864 | fprintf(dump_file, "basic block %d\n", dest->index); |
fbef91d8 RS |
2865 | } |
2866 | count++; | |
2867 | } | |
2868 | } | |
2869 | } | |
2870 | ||
10d22567 ZD |
2871 | if (dump_file) |
2872 | fprintf (dump_file, "Found %d implicit sets\n", count); | |
fbef91d8 RS |
2873 | } |
2874 | ||
0e3f0221 RS |
2875 | /* Bypass conditional jumps. */ |
2876 | ||
7821bfc7 RS |
2877 | /* The value of last_basic_block at the beginning of the jump_bypass |
2878 | pass. The use of redirect_edge_and_branch_force may introduce new | |
2879 | basic blocks, but the data flow analysis is only valid for basic | |
2880 | block indices less than bypass_last_basic_block. */ | |
2881 | ||
2882 | static int bypass_last_basic_block; | |
2883 | ||
0e3f0221 RS |
2884 | /* Find a set of REGNO to a constant that is available at the end of basic |
2885 | block BB. Returns NULL if no such set is found. Based heavily upon | |
2886 | find_avail_set. */ | |
2887 | ||
2888 | static struct expr * | |
1d088dee | 2889 | find_bypass_set (int regno, int bb) |
0e3f0221 RS |
2890 | { |
2891 | struct expr *result = 0; | |
2892 | ||
2893 | for (;;) | |
2894 | { | |
2895 | rtx src; | |
ceda50e9 | 2896 | struct expr *set = lookup_set (regno, &set_hash_table); |
0e3f0221 RS |
2897 | |
2898 | while (set) | |
2899 | { | |
2900 | if (TEST_BIT (cprop_avout[bb], set->bitmap_index)) | |
2901 | break; | |
2902 | set = next_set (regno, set); | |
2903 | } | |
2904 | ||
2905 | if (set == 0) | |
2906 | break; | |
2907 | ||
282899df | 2908 | gcc_assert (GET_CODE (set->expr) == SET); |
0e3f0221 RS |
2909 | |
2910 | src = SET_SRC (set->expr); | |
6b2d1c9e | 2911 | if (gcse_constant_p (src)) |
0e3f0221 RS |
2912 | result = set; |
2913 | ||
7b1b4aed | 2914 | if (! REG_P (src)) |
0e3f0221 RS |
2915 | break; |
2916 | ||
2917 | regno = REGNO (src); | |
2918 | } | |
2919 | return result; | |
2920 | } | |
2921 | ||
2922 | ||
e129b3f9 RS |
2923 | /* Subroutine of bypass_block that checks whether a pseudo is killed by |
2924 | any of the instructions inserted on an edge. Jump bypassing places | |
2925 | condition code setters on CFG edges using insert_insn_on_edge. This | |
2926 | function is required to check that our data flow analysis is still | |
2927 | valid prior to commit_edge_insertions. */ | |
2928 | ||
2929 | static bool | |
ed7a4b4b | 2930 | reg_killed_on_edge (const_rtx reg, const_edge e) |
e129b3f9 RS |
2931 | { |
2932 | rtx insn; | |
2933 | ||
6de9cd9a | 2934 | for (insn = e->insns.r; insn; insn = NEXT_INSN (insn)) |
e129b3f9 RS |
2935 | if (INSN_P (insn) && reg_set_p (reg, insn)) |
2936 | return true; | |
2937 | ||
2938 | return false; | |
2939 | } | |
2940 | ||
0e3f0221 RS |
2941 | /* Subroutine of bypass_conditional_jumps that attempts to bypass the given |
2942 | basic block BB which has more than one predecessor. If not NULL, SETCC | |
2943 | is the first instruction of BB, which is immediately followed by JUMP_INSN | |
2944 | JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB. | |
e129b3f9 RS |
2945 | Returns nonzero if a change was made. |
2946 | ||
e0bb17a8 | 2947 | During the jump bypassing pass, we may place copies of SETCC instructions |
e129b3f9 RS |
2948 | on CFG edges. The following routine must be careful to pay attention to |
2949 | these inserted insns when performing its transformations. */ | |
0e3f0221 RS |
2950 | |
2951 | static int | |
1d088dee | 2952 | bypass_block (basic_block bb, rtx setcc, rtx jump) |
0e3f0221 RS |
2953 | { |
2954 | rtx insn, note; | |
628f6a4e | 2955 | edge e, edest; |
818b6b7f | 2956 | int i, change; |
72b8d451 | 2957 | int may_be_loop_header; |
628f6a4e BE |
2958 | unsigned removed_p; |
2959 | edge_iterator ei; | |
0e3f0221 RS |
2960 | |
2961 | insn = (setcc != NULL) ? setcc : jump; | |
2962 | ||
2963 | /* Determine set of register uses in INSN. */ | |
2964 | reg_use_count = 0; | |
2965 | note_uses (&PATTERN (insn), find_used_regs, NULL); | |
2966 | note = find_reg_equal_equiv_note (insn); | |
2967 | if (note) | |
2968 | find_used_regs (&XEXP (note, 0), NULL); | |
2969 | ||
72b8d451 | 2970 | may_be_loop_header = false; |
628f6a4e | 2971 | FOR_EACH_EDGE (e, ei, bb->preds) |
72b8d451 ZD |
2972 | if (e->flags & EDGE_DFS_BACK) |
2973 | { | |
2974 | may_be_loop_header = true; | |
2975 | break; | |
2976 | } | |
2977 | ||
0e3f0221 | 2978 | change = 0; |
628f6a4e | 2979 | for (ei = ei_start (bb->preds); (e = ei_safe_edge (ei)); ) |
0e3f0221 | 2980 | { |
628f6a4e | 2981 | removed_p = 0; |
b8698a0f | 2982 | |
7821bfc7 | 2983 | if (e->flags & EDGE_COMPLEX) |
628f6a4e BE |
2984 | { |
2985 | ei_next (&ei); | |
2986 | continue; | |
2987 | } | |
7821bfc7 RS |
2988 | |
2989 | /* We can't redirect edges from new basic blocks. */ | |
2990 | if (e->src->index >= bypass_last_basic_block) | |
628f6a4e BE |
2991 | { |
2992 | ei_next (&ei); | |
2993 | continue; | |
2994 | } | |
7821bfc7 | 2995 | |
72b8d451 | 2996 | /* The irreducible loops created by redirecting of edges entering the |
e0bb17a8 KH |
2997 | loop from outside would decrease effectiveness of some of the following |
2998 | optimizations, so prevent this. */ | |
72b8d451 ZD |
2999 | if (may_be_loop_header |
3000 | && !(e->flags & EDGE_DFS_BACK)) | |
628f6a4e BE |
3001 | { |
3002 | ei_next (&ei); | |
3003 | continue; | |
3004 | } | |
72b8d451 | 3005 | |
0e3f0221 RS |
3006 | for (i = 0; i < reg_use_count; i++) |
3007 | { | |
3008 | struct reg_use *reg_used = ®_use_table[i]; | |
589005ff | 3009 | unsigned int regno = REGNO (reg_used->reg_rtx); |
818b6b7f | 3010 | basic_block dest, old_dest; |
589005ff | 3011 | struct expr *set; |
60564289 | 3012 | rtx src, new_rtx; |
0e3f0221 | 3013 | |
589005ff | 3014 | set = find_bypass_set (regno, e->src->index); |
0e3f0221 RS |
3015 | |
3016 | if (! set) | |
3017 | continue; | |
3018 | ||
e129b3f9 | 3019 | /* Check the data flow is valid after edge insertions. */ |
6de9cd9a | 3020 | if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e)) |
e129b3f9 RS |
3021 | continue; |
3022 | ||
589005ff | 3023 | src = SET_SRC (pc_set (jump)); |
0e3f0221 RS |
3024 | |
3025 | if (setcc != NULL) | |
3af4ba41 RS |
3026 | src = simplify_replace_rtx (src, |
3027 | SET_DEST (PATTERN (setcc)), | |
3028 | SET_SRC (PATTERN (setcc))); | |
0e3f0221 | 3029 | |
60564289 | 3030 | new_rtx = simplify_replace_rtx (src, reg_used->reg_rtx, |
3af4ba41 | 3031 | SET_SRC (set->expr)); |
0e3f0221 | 3032 | |
1d088dee | 3033 | /* Jump bypassing may have already placed instructions on |
e129b3f9 RS |
3034 | edges of the CFG. We can't bypass an outgoing edge that |
3035 | has instructions associated with it, as these insns won't | |
3036 | get executed if the incoming edge is redirected. */ | |
3037 | ||
60564289 | 3038 | if (new_rtx == pc_rtx) |
e129b3f9 RS |
3039 | { |
3040 | edest = FALLTHRU_EDGE (bb); | |
6de9cd9a | 3041 | dest = edest->insns.r ? NULL : edest->dest; |
e129b3f9 | 3042 | } |
60564289 | 3043 | else if (GET_CODE (new_rtx) == LABEL_REF) |
e129b3f9 | 3044 | { |
60564289 | 3045 | dest = BLOCK_FOR_INSN (XEXP (new_rtx, 0)); |
e129b3f9 | 3046 | /* Don't bypass edges containing instructions. */ |
c7d1b449 KH |
3047 | edest = find_edge (bb, dest); |
3048 | if (edest && edest->insns.r) | |
3049 | dest = NULL; | |
e129b3f9 | 3050 | } |
0e3f0221 RS |
3051 | else |
3052 | dest = NULL; | |
3053 | ||
a544524a JH |
3054 | /* Avoid unification of the edge with other edges from original |
3055 | branch. We would end up emitting the instruction on "both" | |
3056 | edges. */ | |
7b1b4aed | 3057 | |
c7d1b449 KH |
3058 | if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc))) |
3059 | && find_edge (e->src, dest)) | |
3060 | dest = NULL; | |
a544524a | 3061 | |
818b6b7f | 3062 | old_dest = e->dest; |
7821bfc7 RS |
3063 | if (dest != NULL |
3064 | && dest != old_dest | |
3065 | && dest != EXIT_BLOCK_PTR) | |
3066 | { | |
3067 | redirect_edge_and_branch_force (e, dest); | |
3068 | ||
818b6b7f | 3069 | /* Copy the register setter to the redirected edge. |
0e3f0221 RS |
3070 | Don't copy CC0 setters, as CC0 is dead after jump. */ |
3071 | if (setcc) | |
3072 | { | |
3073 | rtx pat = PATTERN (setcc); | |
818b6b7f | 3074 | if (!CC0_P (SET_DEST (pat))) |
0e3f0221 RS |
3075 | insert_insn_on_edge (copy_insn (pat), e); |
3076 | } | |
3077 | ||
10d22567 | 3078 | if (dump_file != NULL) |
0e3f0221 | 3079 | { |
10d22567 | 3080 | fprintf (dump_file, "JUMP-BYPASS: Proved reg %d " |
27fb79ad | 3081 | "in jump_insn %d equals constant ", |
818b6b7f | 3082 | regno, INSN_UID (jump)); |
10d22567 ZD |
3083 | print_rtl (dump_file, SET_SRC (set->expr)); |
3084 | fprintf (dump_file, "\nBypass edge from %d->%d to %d\n", | |
818b6b7f | 3085 | e->src->index, old_dest->index, dest->index); |
0e3f0221 RS |
3086 | } |
3087 | change = 1; | |
628f6a4e | 3088 | removed_p = 1; |
0e3f0221 RS |
3089 | break; |
3090 | } | |
3091 | } | |
628f6a4e BE |
3092 | if (!removed_p) |
3093 | ei_next (&ei); | |
0e3f0221 RS |
3094 | } |
3095 | return change; | |
3096 | } | |
3097 | ||
3098 | /* Find basic blocks with more than one predecessor that only contain a | |
3099 | single conditional jump. If the result of the comparison is known at | |
3100 | compile-time from any incoming edge, redirect that edge to the | |
9a71ece1 RH |
3101 | appropriate target. Returns nonzero if a change was made. |
3102 | ||
3103 | This function is now mis-named, because we also handle indirect jumps. */ | |
0e3f0221 RS |
3104 | |
3105 | static int | |
1d088dee | 3106 | bypass_conditional_jumps (void) |
0e3f0221 RS |
3107 | { |
3108 | basic_block bb; | |
3109 | int changed; | |
3110 | rtx setcc; | |
3111 | rtx insn; | |
3112 | rtx dest; | |
3113 | ||
3114 | /* Note we start at block 1. */ | |
3115 | if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR) | |
3116 | return 0; | |
3117 | ||
7821bfc7 | 3118 | bypass_last_basic_block = last_basic_block; |
72b8d451 | 3119 | mark_dfs_back_edges (); |
7821bfc7 | 3120 | |
0e3f0221 RS |
3121 | changed = 0; |
3122 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, | |
589005ff | 3123 | EXIT_BLOCK_PTR, next_bb) |
0e3f0221 RS |
3124 | { |
3125 | /* Check for more than one predecessor. */ | |
c5cbcccf | 3126 | if (!single_pred_p (bb)) |
0e3f0221 RS |
3127 | { |
3128 | setcc = NULL_RTX; | |
eb232f4e | 3129 | FOR_BB_INSNS (bb, insn) |
b5b8b0ac AO |
3130 | if (DEBUG_INSN_P (insn)) |
3131 | continue; | |
3132 | else if (NONJUMP_INSN_P (insn)) | |
0e3f0221 | 3133 | { |
9543a9d2 | 3134 | if (setcc) |
0e3f0221 | 3135 | break; |
ba4f7968 | 3136 | if (GET_CODE (PATTERN (insn)) != SET) |
0e3f0221 RS |
3137 | break; |
3138 | ||
ba4f7968 | 3139 | dest = SET_DEST (PATTERN (insn)); |
818b6b7f | 3140 | if (REG_P (dest) || CC0_P (dest)) |
0e3f0221 | 3141 | setcc = insn; |
0e3f0221 RS |
3142 | else |
3143 | break; | |
3144 | } | |
7b1b4aed | 3145 | else if (JUMP_P (insn)) |
0e3f0221 | 3146 | { |
9a71ece1 RH |
3147 | if ((any_condjump_p (insn) || computed_jump_p (insn)) |
3148 | && onlyjump_p (insn)) | |
0e3f0221 RS |
3149 | changed |= bypass_block (bb, setcc, insn); |
3150 | break; | |
3151 | } | |
3152 | else if (INSN_P (insn)) | |
3153 | break; | |
3154 | } | |
3155 | } | |
3156 | ||
818b6b7f | 3157 | /* If we bypassed any register setting insns, we inserted a |
fbe5a4a6 | 3158 | copy on the redirected edge. These need to be committed. */ |
0e3f0221 | 3159 | if (changed) |
62e5bf5d | 3160 | commit_edge_insertions (); |
0e3f0221 RS |
3161 | |
3162 | return changed; | |
3163 | } | |
3164 | \f | |
a65f3558 | 3165 | /* Compute PRE+LCM working variables. */ |
7506f491 DE |
3166 | |
3167 | /* Local properties of expressions. */ | |
3168 | /* Nonzero for expressions that are transparent in the block. */ | |
a65f3558 | 3169 | static sbitmap *transp; |
7506f491 | 3170 | |
5c35539b RH |
3171 | /* Nonzero for expressions that are transparent at the end of the block. |
3172 | This is only zero for expressions killed by abnormal critical edge | |
3173 | created by a calls. */ | |
a65f3558 | 3174 | static sbitmap *transpout; |
5c35539b | 3175 | |
a65f3558 JL |
3176 | /* Nonzero for expressions that are computed (available) in the block. */ |
3177 | static sbitmap *comp; | |
7506f491 | 3178 | |
a65f3558 JL |
3179 | /* Nonzero for expressions that are locally anticipatable in the block. */ |
3180 | static sbitmap *antloc; | |
7506f491 | 3181 | |
a65f3558 JL |
3182 | /* Nonzero for expressions where this block is an optimal computation |
3183 | point. */ | |
3184 | static sbitmap *pre_optimal; | |
5c35539b | 3185 | |
a65f3558 JL |
3186 | /* Nonzero for expressions which are redundant in a particular block. */ |
3187 | static sbitmap *pre_redundant; | |
7506f491 | 3188 | |
a42cd965 AM |
3189 | /* Nonzero for expressions which should be inserted on a specific edge. */ |
3190 | static sbitmap *pre_insert_map; | |
3191 | ||
3192 | /* Nonzero for expressions which should be deleted in a specific block. */ | |
3193 | static sbitmap *pre_delete_map; | |
3194 | ||
3195 | /* Contains the edge_list returned by pre_edge_lcm. */ | |
3196 | static struct edge_list *edge_list; | |
3197 | ||
a65f3558 | 3198 | /* Allocate vars used for PRE analysis. */ |
7506f491 DE |
3199 | |
3200 | static void | |
1d088dee | 3201 | alloc_pre_mem (int n_blocks, int n_exprs) |
7506f491 | 3202 | { |
a65f3558 JL |
3203 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); |
3204 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
3205 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
5faf03ae | 3206 | |
a42cd965 AM |
3207 | pre_optimal = NULL; |
3208 | pre_redundant = NULL; | |
3209 | pre_insert_map = NULL; | |
3210 | pre_delete_map = NULL; | |
a42cd965 | 3211 | ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs); |
c4c81601 | 3212 | |
a42cd965 | 3213 | /* pre_insert and pre_delete are allocated later. */ |
7506f491 DE |
3214 | } |
3215 | ||
a65f3558 | 3216 | /* Free vars used for PRE analysis. */ |
7506f491 DE |
3217 | |
3218 | static void | |
1d088dee | 3219 | free_pre_mem (void) |
7506f491 | 3220 | { |
5a660bff DB |
3221 | sbitmap_vector_free (transp); |
3222 | sbitmap_vector_free (comp); | |
bd3675fc JL |
3223 | |
3224 | /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */ | |
7506f491 | 3225 | |
a42cd965 | 3226 | if (pre_optimal) |
5a660bff | 3227 | sbitmap_vector_free (pre_optimal); |
a42cd965 | 3228 | if (pre_redundant) |
5a660bff | 3229 | sbitmap_vector_free (pre_redundant); |
a42cd965 | 3230 | if (pre_insert_map) |
5a660bff | 3231 | sbitmap_vector_free (pre_insert_map); |
a42cd965 | 3232 | if (pre_delete_map) |
5a660bff | 3233 | sbitmap_vector_free (pre_delete_map); |
a42cd965 | 3234 | |
bd3675fc | 3235 | transp = comp = NULL; |
a42cd965 | 3236 | pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL; |
7506f491 DE |
3237 | } |
3238 | ||
3239 | /* Top level routine to do the dataflow analysis needed by PRE. */ | |
3240 | ||
3241 | static void | |
1d088dee | 3242 | compute_pre_data (void) |
7506f491 | 3243 | { |
b614171e | 3244 | sbitmap trapping_expr; |
e0082a72 | 3245 | basic_block bb; |
b614171e | 3246 | unsigned int ui; |
c66e8ae9 | 3247 | |
02280659 | 3248 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
d55bc081 | 3249 | sbitmap_vector_zero (ae_kill, last_basic_block); |
c66e8ae9 | 3250 | |
b614171e | 3251 | /* Collect expressions which might trap. */ |
02280659 | 3252 | trapping_expr = sbitmap_alloc (expr_hash_table.n_elems); |
b614171e | 3253 | sbitmap_zero (trapping_expr); |
02280659 | 3254 | for (ui = 0; ui < expr_hash_table.size; ui++) |
b614171e MM |
3255 | { |
3256 | struct expr *e; | |
02280659 | 3257 | for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash) |
b614171e MM |
3258 | if (may_trap_p (e->expr)) |
3259 | SET_BIT (trapping_expr, e->bitmap_index); | |
3260 | } | |
3261 | ||
c66e8ae9 JL |
3262 | /* Compute ae_kill for each basic block using: |
3263 | ||
3264 | ~(TRANSP | COMP) | |
e83f4801 | 3265 | */ |
c66e8ae9 | 3266 | |
e0082a72 | 3267 | FOR_EACH_BB (bb) |
c66e8ae9 | 3268 | { |
b614171e | 3269 | edge e; |
628f6a4e | 3270 | edge_iterator ei; |
b614171e MM |
3271 | |
3272 | /* If the current block is the destination of an abnormal edge, we | |
3273 | kill all trapping expressions because we won't be able to properly | |
3274 | place the instruction on the edge. So make them neither | |
3275 | anticipatable nor transparent. This is fairly conservative. */ | |
628f6a4e | 3276 | FOR_EACH_EDGE (e, ei, bb->preds) |
b614171e MM |
3277 | if (e->flags & EDGE_ABNORMAL) |
3278 | { | |
e0082a72 ZD |
3279 | sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr); |
3280 | sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr); | |
b614171e MM |
3281 | break; |
3282 | } | |
3283 | ||
e0082a72 ZD |
3284 | sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]); |
3285 | sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]); | |
c66e8ae9 JL |
3286 | } |
3287 | ||
10d22567 | 3288 | edge_list = pre_edge_lcm (expr_hash_table.n_elems, transp, comp, antloc, |
a42cd965 | 3289 | ae_kill, &pre_insert_map, &pre_delete_map); |
5a660bff | 3290 | sbitmap_vector_free (antloc); |
bd3675fc | 3291 | antloc = NULL; |
5a660bff | 3292 | sbitmap_vector_free (ae_kill); |
589005ff | 3293 | ae_kill = NULL; |
76ac938b | 3294 | sbitmap_free (trapping_expr); |
7506f491 DE |
3295 | } |
3296 | \f | |
3297 | /* PRE utilities */ | |
3298 | ||
cc2902df | 3299 | /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach |
a65f3558 | 3300 | block BB. |
7506f491 DE |
3301 | |
3302 | VISITED is a pointer to a working buffer for tracking which BB's have | |
3303 | been visited. It is NULL for the top-level call. | |
3304 | ||
3305 | We treat reaching expressions that go through blocks containing the same | |
3306 | reaching expression as "not reaching". E.g. if EXPR is generated in blocks | |
3307 | 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block | |
3308 | 2 as not reaching. The intent is to improve the probability of finding | |
3309 | only one reaching expression and to reduce register lifetimes by picking | |
3310 | the closest such expression. */ | |
3311 | ||
3312 | static int | |
1d088dee | 3313 | pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited) |
7506f491 | 3314 | { |
36349f8b | 3315 | edge pred; |
628f6a4e | 3316 | edge_iterator ei; |
b8698a0f | 3317 | |
628f6a4e | 3318 | FOR_EACH_EDGE (pred, ei, bb->preds) |
7506f491 | 3319 | { |
e2d2ed72 | 3320 | basic_block pred_bb = pred->src; |
7506f491 | 3321 | |
36349f8b | 3322 | if (pred->src == ENTRY_BLOCK_PTR |
7506f491 | 3323 | /* Has predecessor has already been visited? */ |
0b17ab2f | 3324 | || visited[pred_bb->index]) |
c4c81601 RK |
3325 | ;/* Nothing to do. */ |
3326 | ||
7506f491 | 3327 | /* Does this predecessor generate this expression? */ |
0b17ab2f | 3328 | else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index)) |
7506f491 DE |
3329 | { |
3330 | /* Is this the occurrence we're looking for? | |
3331 | Note that there's only one generating occurrence per block | |
3332 | so we just need to check the block number. */ | |
a65f3558 | 3333 | if (occr_bb == pred_bb) |
7506f491 | 3334 | return 1; |
c4c81601 | 3335 | |
0b17ab2f | 3336 | visited[pred_bb->index] = 1; |
7506f491 DE |
3337 | } |
3338 | /* Ignore this predecessor if it kills the expression. */ | |
0b17ab2f RH |
3339 | else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index)) |
3340 | visited[pred_bb->index] = 1; | |
c4c81601 | 3341 | |
7506f491 DE |
3342 | /* Neither gen nor kill. */ |
3343 | else | |
ac7c5af5 | 3344 | { |
0b17ab2f | 3345 | visited[pred_bb->index] = 1; |
89e606c9 | 3346 | if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited)) |
7506f491 | 3347 | return 1; |
ac7c5af5 | 3348 | } |
7506f491 DE |
3349 | } |
3350 | ||
3351 | /* All paths have been checked. */ | |
3352 | return 0; | |
3353 | } | |
283a2545 RL |
3354 | |
3355 | /* The wrapper for pre_expr_reaches_here_work that ensures that any | |
dc297297 | 3356 | memory allocated for that function is returned. */ |
283a2545 RL |
3357 | |
3358 | static int | |
1d088dee | 3359 | pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb) |
283a2545 RL |
3360 | { |
3361 | int rval; | |
5ed6ace5 | 3362 | char *visited = XCNEWVEC (char, last_basic_block); |
283a2545 | 3363 | |
8e42ace1 | 3364 | rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited); |
283a2545 RL |
3365 | |
3366 | free (visited); | |
c4c81601 | 3367 | return rval; |
283a2545 | 3368 | } |
7506f491 | 3369 | \f |
a42cd965 AM |
3370 | |
3371 | /* Given an expr, generate RTL which we can insert at the end of a BB, | |
589005ff | 3372 | or on an edge. Set the block number of any insns generated to |
a42cd965 AM |
3373 | the value of BB. */ |
3374 | ||
3375 | static rtx | |
1d088dee | 3376 | process_insert_insn (struct expr *expr) |
a42cd965 AM |
3377 | { |
3378 | rtx reg = expr->reaching_reg; | |
fb0c0a12 RK |
3379 | rtx exp = copy_rtx (expr->expr); |
3380 | rtx pat; | |
a42cd965 AM |
3381 | |
3382 | start_sequence (); | |
fb0c0a12 RK |
3383 | |
3384 | /* If the expression is something that's an operand, like a constant, | |
3385 | just copy it to a register. */ | |
3386 | if (general_operand (exp, GET_MODE (reg))) | |
3387 | emit_move_insn (reg, exp); | |
3388 | ||
3389 | /* Otherwise, make a new insn to compute this expression and make sure the | |
3390 | insn will be recognized (this also adds any needed CLOBBERs). Copy the | |
3391 | expression to make sure we don't have any sharing issues. */ | |
282899df NS |
3392 | else |
3393 | { | |
3394 | rtx insn = emit_insn (gen_rtx_SET (VOIDmode, reg, exp)); | |
3395 | ||
2f021b67 AP |
3396 | if (insn_invalid_p (insn)) |
3397 | gcc_unreachable (); | |
282899df | 3398 | } |
b8698a0f | 3399 | |
589005ff | 3400 | |
2f937369 | 3401 | pat = get_insns (); |
a42cd965 AM |
3402 | end_sequence (); |
3403 | ||
3404 | return pat; | |
3405 | } | |
589005ff | 3406 | |
a65f3558 JL |
3407 | /* Add EXPR to the end of basic block BB. |
3408 | ||
3409 | This is used by both the PRE and code hoisting. | |
3410 | ||
3411 | For PRE, we want to verify that the expr is either transparent | |
3412 | or locally anticipatable in the target block. This check makes | |
3413 | no sense for code hoisting. */ | |
7506f491 DE |
3414 | |
3415 | static void | |
6fb5fa3c | 3416 | insert_insn_end_basic_block (struct expr *expr, basic_block bb, int pre) |
7506f491 | 3417 | { |
a813c111 | 3418 | rtx insn = BB_END (bb); |
7506f491 DE |
3419 | rtx new_insn; |
3420 | rtx reg = expr->reaching_reg; | |
3421 | int regno = REGNO (reg); | |
2f937369 | 3422 | rtx pat, pat_end; |
7506f491 | 3423 | |
a42cd965 | 3424 | pat = process_insert_insn (expr); |
282899df | 3425 | gcc_assert (pat && INSN_P (pat)); |
2f937369 DM |
3426 | |
3427 | pat_end = pat; | |
3428 | while (NEXT_INSN (pat_end) != NULL_RTX) | |
3429 | pat_end = NEXT_INSN (pat_end); | |
7506f491 DE |
3430 | |
3431 | /* If the last insn is a jump, insert EXPR in front [taking care to | |
4d6922ee | 3432 | handle cc0, etc. properly]. Similarly we need to care trapping |
068473ec | 3433 | instructions in presence of non-call exceptions. */ |
7506f491 | 3434 | |
7b1b4aed | 3435 | if (JUMP_P (insn) |
4b4bf941 | 3436 | || (NONJUMP_INSN_P (insn) |
c5cbcccf ZD |
3437 | && (!single_succ_p (bb) |
3438 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL))) | |
7506f491 | 3439 | { |
50b2596f | 3440 | #ifdef HAVE_cc0 |
7506f491 | 3441 | rtx note; |
50b2596f | 3442 | #endif |
068473ec JH |
3443 | /* It should always be the case that we can put these instructions |
3444 | anywhere in the basic block with performing PRE optimizations. | |
3445 | Check this. */ | |
282899df NS |
3446 | gcc_assert (!NONJUMP_INSN_P (insn) || !pre |
3447 | || TEST_BIT (antloc[bb->index], expr->bitmap_index) | |
3448 | || TEST_BIT (transp[bb->index], expr->bitmap_index)); | |
7506f491 DE |
3449 | |
3450 | /* If this is a jump table, then we can't insert stuff here. Since | |
3451 | we know the previous real insn must be the tablejump, we insert | |
3452 | the new instruction just before the tablejump. */ | |
3453 | if (GET_CODE (PATTERN (insn)) == ADDR_VEC | |
3454 | || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
3455 | insn = prev_real_insn (insn); | |
3456 | ||
3457 | #ifdef HAVE_cc0 | |
3458 | /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts | |
3459 | if cc0 isn't set. */ | |
3460 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
3461 | if (note) | |
3462 | insn = XEXP (note, 0); | |
3463 | else | |
3464 | { | |
3465 | rtx maybe_cc0_setter = prev_nonnote_insn (insn); | |
3466 | if (maybe_cc0_setter | |
2c3c49de | 3467 | && INSN_P (maybe_cc0_setter) |
7506f491 DE |
3468 | && sets_cc0_p (PATTERN (maybe_cc0_setter))) |
3469 | insn = maybe_cc0_setter; | |
3470 | } | |
3471 | #endif | |
3472 | /* FIXME: What if something in cc0/jump uses value set in new insn? */ | |
6fb5fa3c | 3473 | new_insn = emit_insn_before_noloc (pat, insn, bb); |
3947e2f9 | 3474 | } |
c4c81601 | 3475 | |
3947e2f9 RH |
3476 | /* Likewise if the last insn is a call, as will happen in the presence |
3477 | of exception handling. */ | |
7b1b4aed | 3478 | else if (CALL_P (insn) |
c5cbcccf ZD |
3479 | && (!single_succ_p (bb) |
3480 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL)) | |
3947e2f9 | 3481 | { |
42db504c SB |
3482 | /* Keeping in mind targets with small register classes and parameters |
3483 | in registers, we search backward and place the instructions before | |
3484 | the first parameter is loaded. Do this for everyone for consistency | |
3485 | and a presumption that we'll get better code elsewhere as well. | |
3947e2f9 | 3486 | |
c4c81601 | 3487 | It should always be the case that we can put these instructions |
a65f3558 JL |
3488 | anywhere in the basic block with performing PRE optimizations. |
3489 | Check this. */ | |
c4c81601 | 3490 | |
282899df NS |
3491 | gcc_assert (!pre |
3492 | || TEST_BIT (antloc[bb->index], expr->bitmap_index) | |
3493 | || TEST_BIT (transp[bb->index], expr->bitmap_index)); | |
3947e2f9 RH |
3494 | |
3495 | /* Since different machines initialize their parameter registers | |
3496 | in different orders, assume nothing. Collect the set of all | |
3497 | parameter registers. */ | |
a813c111 | 3498 | insn = find_first_parameter_load (insn, BB_HEAD (bb)); |
3947e2f9 | 3499 | |
b1d26727 JL |
3500 | /* If we found all the parameter loads, then we want to insert |
3501 | before the first parameter load. | |
3502 | ||
3503 | If we did not find all the parameter loads, then we might have | |
3504 | stopped on the head of the block, which could be a CODE_LABEL. | |
3505 | If we inserted before the CODE_LABEL, then we would be putting | |
3506 | the insn in the wrong basic block. In that case, put the insn | |
b5229628 | 3507 | after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */ |
7b1b4aed | 3508 | while (LABEL_P (insn) |
589ca5cb | 3509 | || NOTE_INSN_BASIC_BLOCK_P (insn)) |
b5229628 | 3510 | insn = NEXT_INSN (insn); |
c4c81601 | 3511 | |
6fb5fa3c | 3512 | new_insn = emit_insn_before_noloc (pat, insn, bb); |
7506f491 DE |
3513 | } |
3514 | else | |
6fb5fa3c | 3515 | new_insn = emit_insn_after_noloc (pat, insn, bb); |
7506f491 | 3516 | |
2f937369 | 3517 | while (1) |
a65f3558 | 3518 | { |
2f937369 | 3519 | if (INSN_P (pat)) |
4a81774c | 3520 | add_label_notes (PATTERN (pat), new_insn); |
2f937369 DM |
3521 | if (pat == pat_end) |
3522 | break; | |
3523 | pat = NEXT_INSN (pat); | |
a65f3558 | 3524 | } |
3947e2f9 | 3525 | |
7506f491 DE |
3526 | gcse_create_count++; |
3527 | ||
10d22567 | 3528 | if (dump_file) |
7506f491 | 3529 | { |
10d22567 | 3530 | fprintf (dump_file, "PRE/HOIST: end of bb %d, insn %d, ", |
0b17ab2f | 3531 | bb->index, INSN_UID (new_insn)); |
10d22567 | 3532 | fprintf (dump_file, "copying expression %d to reg %d\n", |
c4c81601 | 3533 | expr->bitmap_index, regno); |
7506f491 DE |
3534 | } |
3535 | } | |
3536 | ||
a42cd965 AM |
3537 | /* Insert partially redundant expressions on edges in the CFG to make |
3538 | the expressions fully redundant. */ | |
7506f491 | 3539 | |
a42cd965 | 3540 | static int |
1d088dee | 3541 | pre_edge_insert (struct edge_list *edge_list, struct expr **index_map) |
7506f491 | 3542 | { |
c4c81601 | 3543 | int e, i, j, num_edges, set_size, did_insert = 0; |
a65f3558 JL |
3544 | sbitmap *inserted; |
3545 | ||
a42cd965 AM |
3546 | /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge |
3547 | if it reaches any of the deleted expressions. */ | |
7506f491 | 3548 | |
a42cd965 AM |
3549 | set_size = pre_insert_map[0]->size; |
3550 | num_edges = NUM_EDGES (edge_list); | |
02280659 | 3551 | inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems); |
a42cd965 | 3552 | sbitmap_vector_zero (inserted, num_edges); |
7506f491 | 3553 | |
a42cd965 | 3554 | for (e = 0; e < num_edges; e++) |
7506f491 DE |
3555 | { |
3556 | int indx; | |
e2d2ed72 | 3557 | basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e); |
a65f3558 | 3558 | |
a65f3558 | 3559 | for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS) |
7506f491 | 3560 | { |
a42cd965 | 3561 | SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i]; |
7506f491 | 3562 | |
02280659 | 3563 | for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1) |
c4c81601 RK |
3564 | if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX) |
3565 | { | |
3566 | struct expr *expr = index_map[j]; | |
3567 | struct occr *occr; | |
a65f3558 | 3568 | |
ff7cc307 | 3569 | /* Now look at each deleted occurrence of this expression. */ |
c4c81601 RK |
3570 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
3571 | { | |
3572 | if (! occr->deleted_p) | |
3573 | continue; | |
3574 | ||
3f117656 | 3575 | /* Insert this expression on this edge if it would |
ff7cc307 | 3576 | reach the deleted occurrence in BB. */ |
c4c81601 RK |
3577 | if (!TEST_BIT (inserted[e], j)) |
3578 | { | |
3579 | rtx insn; | |
3580 | edge eg = INDEX_EDGE (edge_list, e); | |
3581 | ||
3582 | /* We can't insert anything on an abnormal and | |
3583 | critical edge, so we insert the insn at the end of | |
3584 | the previous block. There are several alternatives | |
3585 | detailed in Morgans book P277 (sec 10.5) for | |
3586 | handling this situation. This one is easiest for | |
3587 | now. */ | |
3588 | ||
b16aa8a5 | 3589 | if (eg->flags & EDGE_ABNORMAL) |
6fb5fa3c | 3590 | insert_insn_end_basic_block (index_map[j], bb, 0); |
c4c81601 RK |
3591 | else |
3592 | { | |
3593 | insn = process_insert_insn (index_map[j]); | |
3594 | insert_insn_on_edge (insn, eg); | |
3595 | } | |
3596 | ||
10d22567 | 3597 | if (dump_file) |
c4c81601 | 3598 | { |
5f39ad47 | 3599 | fprintf (dump_file, "PRE: edge (%d,%d), ", |
0b17ab2f RH |
3600 | bb->index, |
3601 | INDEX_EDGE_SUCC_BB (edge_list, e)->index); | |
10d22567 | 3602 | fprintf (dump_file, "copy expression %d\n", |
c4c81601 RK |
3603 | expr->bitmap_index); |
3604 | } | |
3605 | ||
a13d4ebf | 3606 | update_ld_motion_stores (expr); |
c4c81601 RK |
3607 | SET_BIT (inserted[e], j); |
3608 | did_insert = 1; | |
3609 | gcse_create_count++; | |
3610 | } | |
3611 | } | |
3612 | } | |
7506f491 DE |
3613 | } |
3614 | } | |
5faf03ae | 3615 | |
5a660bff | 3616 | sbitmap_vector_free (inserted); |
a42cd965 | 3617 | return did_insert; |
7506f491 DE |
3618 | } |
3619 | ||
073089a7 | 3620 | /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG. |
b885908b MH |
3621 | Given "old_reg <- expr" (INSN), instead of adding after it |
3622 | reaching_reg <- old_reg | |
3623 | it's better to do the following: | |
3624 | reaching_reg <- expr | |
3625 | old_reg <- reaching_reg | |
3626 | because this way copy propagation can discover additional PRE | |
f5f2e3cd MH |
3627 | opportunities. But if this fails, we try the old way. |
3628 | When "expr" is a store, i.e. | |
3629 | given "MEM <- old_reg", instead of adding after it | |
3630 | reaching_reg <- old_reg | |
3631 | it's better to add it before as follows: | |
3632 | reaching_reg <- old_reg | |
3633 | MEM <- reaching_reg. */ | |
7506f491 DE |
3634 | |
3635 | static void | |
1d088dee | 3636 | pre_insert_copy_insn (struct expr *expr, rtx insn) |
7506f491 DE |
3637 | { |
3638 | rtx reg = expr->reaching_reg; | |
3639 | int regno = REGNO (reg); | |
3640 | int indx = expr->bitmap_index; | |
073089a7 | 3641 | rtx pat = PATTERN (insn); |
64068ca2 | 3642 | rtx set, first_set, new_insn; |
b885908b | 3643 | rtx old_reg; |
073089a7 | 3644 | int i; |
7506f491 | 3645 | |
073089a7 | 3646 | /* This block matches the logic in hash_scan_insn. */ |
282899df | 3647 | switch (GET_CODE (pat)) |
073089a7 | 3648 | { |
282899df NS |
3649 | case SET: |
3650 | set = pat; | |
3651 | break; | |
3652 | ||
3653 | case PARALLEL: | |
073089a7 RS |
3654 | /* Search through the parallel looking for the set whose |
3655 | source was the expression that we're interested in. */ | |
64068ca2 | 3656 | first_set = NULL_RTX; |
073089a7 RS |
3657 | set = NULL_RTX; |
3658 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3659 | { | |
3660 | rtx x = XVECEXP (pat, 0, i); | |
64068ca2 | 3661 | if (GET_CODE (x) == SET) |
073089a7 | 3662 | { |
64068ca2 RS |
3663 | /* If the source was a REG_EQUAL or REG_EQUIV note, we |
3664 | may not find an equivalent expression, but in this | |
3665 | case the PARALLEL will have a single set. */ | |
3666 | if (first_set == NULL_RTX) | |
3667 | first_set = x; | |
3668 | if (expr_equiv_p (SET_SRC (x), expr->expr)) | |
3669 | { | |
3670 | set = x; | |
3671 | break; | |
3672 | } | |
073089a7 RS |
3673 | } |
3674 | } | |
64068ca2 RS |
3675 | |
3676 | gcc_assert (first_set); | |
3677 | if (set == NULL_RTX) | |
3678 | set = first_set; | |
282899df NS |
3679 | break; |
3680 | ||
3681 | default: | |
3682 | gcc_unreachable (); | |
073089a7 | 3683 | } |
c4c81601 | 3684 | |
7b1b4aed | 3685 | if (REG_P (SET_DEST (set))) |
073089a7 | 3686 | { |
f5f2e3cd MH |
3687 | old_reg = SET_DEST (set); |
3688 | /* Check if we can modify the set destination in the original insn. */ | |
3689 | if (validate_change (insn, &SET_DEST (set), reg, 0)) | |
3690 | { | |
3691 | new_insn = gen_move_insn (old_reg, reg); | |
3692 | new_insn = emit_insn_after (new_insn, insn); | |
f5f2e3cd MH |
3693 | } |
3694 | else | |
3695 | { | |
3696 | new_insn = gen_move_insn (reg, old_reg); | |
3697 | new_insn = emit_insn_after (new_insn, insn); | |
f5f2e3cd | 3698 | } |
073089a7 | 3699 | } |
f5f2e3cd | 3700 | else /* This is possible only in case of a store to memory. */ |
073089a7 | 3701 | { |
f5f2e3cd | 3702 | old_reg = SET_SRC (set); |
073089a7 | 3703 | new_insn = gen_move_insn (reg, old_reg); |
f5f2e3cd MH |
3704 | |
3705 | /* Check if we can modify the set source in the original insn. */ | |
3706 | if (validate_change (insn, &SET_SRC (set), reg, 0)) | |
3707 | new_insn = emit_insn_before (new_insn, insn); | |
3708 | else | |
3709 | new_insn = emit_insn_after (new_insn, insn); | |
073089a7 | 3710 | } |
7506f491 DE |
3711 | |
3712 | gcse_create_count++; | |
3713 | ||
10d22567 ZD |
3714 | if (dump_file) |
3715 | fprintf (dump_file, | |
a42cd965 | 3716 | "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n", |
b0de17ef | 3717 | BLOCK_FOR_INSN (insn)->index, INSN_UID (new_insn), indx, |
a42cd965 | 3718 | INSN_UID (insn), regno); |
7506f491 DE |
3719 | } |
3720 | ||
3721 | /* Copy available expressions that reach the redundant expression | |
3722 | to `reaching_reg'. */ | |
3723 | ||
3724 | static void | |
1d088dee | 3725 | pre_insert_copies (void) |
7506f491 | 3726 | { |
f5f2e3cd | 3727 | unsigned int i, added_copy; |
c4c81601 RK |
3728 | struct expr *expr; |
3729 | struct occr *occr; | |
3730 | struct occr *avail; | |
a65f3558 | 3731 | |
7506f491 DE |
3732 | /* For each available expression in the table, copy the result to |
3733 | `reaching_reg' if the expression reaches a deleted one. | |
3734 | ||
3735 | ??? The current algorithm is rather brute force. | |
3736 | Need to do some profiling. */ | |
3737 | ||
02280659 ZD |
3738 | for (i = 0; i < expr_hash_table.size; i++) |
3739 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 RK |
3740 | { |
3741 | /* If the basic block isn't reachable, PPOUT will be TRUE. However, | |
3742 | we don't want to insert a copy here because the expression may not | |
3743 | really be redundant. So only insert an insn if the expression was | |
3744 | deleted. This test also avoids further processing if the | |
3745 | expression wasn't deleted anywhere. */ | |
3746 | if (expr->reaching_reg == NULL) | |
3747 | continue; | |
7b1b4aed | 3748 | |
f5f2e3cd | 3749 | /* Set when we add a copy for that expression. */ |
7b1b4aed | 3750 | added_copy = 0; |
c4c81601 RK |
3751 | |
3752 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) | |
3753 | { | |
3754 | if (! occr->deleted_p) | |
3755 | continue; | |
7506f491 | 3756 | |
c4c81601 RK |
3757 | for (avail = expr->avail_occr; avail != NULL; avail = avail->next) |
3758 | { | |
3759 | rtx insn = avail->insn; | |
7506f491 | 3760 | |
c4c81601 RK |
3761 | /* No need to handle this one if handled already. */ |
3762 | if (avail->copied_p) | |
3763 | continue; | |
7506f491 | 3764 | |
c4c81601 | 3765 | /* Don't handle this one if it's a redundant one. */ |
4a81774c | 3766 | if (INSN_DELETED_P (insn)) |
c4c81601 | 3767 | continue; |
7506f491 | 3768 | |
c4c81601 | 3769 | /* Or if the expression doesn't reach the deleted one. */ |
589005ff | 3770 | if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn), |
e2d2ed72 AM |
3771 | expr, |
3772 | BLOCK_FOR_INSN (occr->insn))) | |
c4c81601 | 3773 | continue; |
7506f491 | 3774 | |
f5f2e3cd MH |
3775 | added_copy = 1; |
3776 | ||
c4c81601 RK |
3777 | /* Copy the result of avail to reaching_reg. */ |
3778 | pre_insert_copy_insn (expr, insn); | |
3779 | avail->copied_p = 1; | |
3780 | } | |
3781 | } | |
f5f2e3cd | 3782 | |
7b1b4aed | 3783 | if (added_copy) |
f5f2e3cd | 3784 | update_ld_motion_stores (expr); |
c4c81601 | 3785 | } |
7506f491 DE |
3786 | } |
3787 | ||
10d1bb36 JH |
3788 | /* Emit move from SRC to DEST noting the equivalence with expression computed |
3789 | in INSN. */ | |
3790 | static rtx | |
1d088dee | 3791 | gcse_emit_move_after (rtx src, rtx dest, rtx insn) |
10d1bb36 | 3792 | { |
60564289 | 3793 | rtx new_rtx; |
6bdb8dd6 | 3794 | rtx set = single_set (insn), set2; |
10d1bb36 JH |
3795 | rtx note; |
3796 | rtx eqv; | |
3797 | ||
3798 | /* This should never fail since we're creating a reg->reg copy | |
3799 | we've verified to be valid. */ | |
3800 | ||
60564289 | 3801 | new_rtx = emit_insn_after (gen_move_insn (dest, src), insn); |
285464d0 | 3802 | |
10d1bb36 | 3803 | /* Note the equivalence for local CSE pass. */ |
60564289 | 3804 | set2 = single_set (new_rtx); |
6bdb8dd6 | 3805 | if (!set2 || !rtx_equal_p (SET_DEST (set2), dest)) |
60564289 | 3806 | return new_rtx; |
10d1bb36 JH |
3807 | if ((note = find_reg_equal_equiv_note (insn))) |
3808 | eqv = XEXP (note, 0); | |
3809 | else | |
3810 | eqv = SET_SRC (set); | |
3811 | ||
60564289 | 3812 | set_unique_reg_note (new_rtx, REG_EQUAL, copy_insn_1 (eqv)); |
10d1bb36 | 3813 | |
60564289 | 3814 | return new_rtx; |
10d1bb36 JH |
3815 | } |
3816 | ||
7506f491 | 3817 | /* Delete redundant computations. |
7506f491 DE |
3818 | Deletion is done by changing the insn to copy the `reaching_reg' of |
3819 | the expression into the result of the SET. It is left to later passes | |
3820 | (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it. | |
3821 | ||
cc2902df | 3822 | Returns nonzero if a change is made. */ |
7506f491 DE |
3823 | |
3824 | static int | |
1d088dee | 3825 | pre_delete (void) |
7506f491 | 3826 | { |
2e653e39 | 3827 | unsigned int i; |
63bc1d05 | 3828 | int changed; |
c4c81601 RK |
3829 | struct expr *expr; |
3830 | struct occr *occr; | |
a65f3558 | 3831 | |
7506f491 | 3832 | changed = 0; |
02280659 | 3833 | for (i = 0; i < expr_hash_table.size; i++) |
073089a7 RS |
3834 | for (expr = expr_hash_table.table[i]; |
3835 | expr != NULL; | |
3836 | expr = expr->next_same_hash) | |
c4c81601 RK |
3837 | { |
3838 | int indx = expr->bitmap_index; | |
7506f491 | 3839 | |
c4c81601 RK |
3840 | /* We only need to search antic_occr since we require |
3841 | ANTLOC != 0. */ | |
7506f491 | 3842 | |
c4c81601 RK |
3843 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
3844 | { | |
3845 | rtx insn = occr->insn; | |
3846 | rtx set; | |
e2d2ed72 | 3847 | basic_block bb = BLOCK_FOR_INSN (insn); |
7506f491 | 3848 | |
073089a7 RS |
3849 | /* We only delete insns that have a single_set. */ |
3850 | if (TEST_BIT (pre_delete_map[bb->index], indx) | |
6fb5fa3c DB |
3851 | && (set = single_set (insn)) != 0 |
3852 | && dbg_cnt (pre_insn)) | |
c4c81601 | 3853 | { |
c4c81601 RK |
3854 | /* Create a pseudo-reg to store the result of reaching |
3855 | expressions into. Get the mode for the new pseudo from | |
3856 | the mode of the original destination pseudo. */ | |
3857 | if (expr->reaching_reg == NULL) | |
46b71b03 | 3858 | expr->reaching_reg = gen_reg_rtx_and_attrs (SET_DEST (set)); |
c4c81601 | 3859 | |
9b76aa3b | 3860 | gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn); |
10d1bb36 JH |
3861 | delete_insn (insn); |
3862 | occr->deleted_p = 1; | |
10d1bb36 JH |
3863 | changed = 1; |
3864 | gcse_subst_count++; | |
7506f491 | 3865 | |
10d22567 | 3866 | if (dump_file) |
c4c81601 | 3867 | { |
10d22567 | 3868 | fprintf (dump_file, |
c4c81601 RK |
3869 | "PRE: redundant insn %d (expression %d) in ", |
3870 | INSN_UID (insn), indx); | |
10d22567 | 3871 | fprintf (dump_file, "bb %d, reaching reg is %d\n", |
0b17ab2f | 3872 | bb->index, REGNO (expr->reaching_reg)); |
c4c81601 RK |
3873 | } |
3874 | } | |
3875 | } | |
3876 | } | |
7506f491 DE |
3877 | |
3878 | return changed; | |
3879 | } | |
3880 | ||
3881 | /* Perform GCSE optimizations using PRE. | |
3882 | This is called by one_pre_gcse_pass after all the dataflow analysis | |
3883 | has been done. | |
3884 | ||
c4c81601 RK |
3885 | This is based on the original Morel-Renvoise paper Fred Chow's thesis, and |
3886 | lazy code motion from Knoop, Ruthing and Steffen as described in Advanced | |
3887 | Compiler Design and Implementation. | |
7506f491 | 3888 | |
c4c81601 RK |
3889 | ??? A new pseudo reg is created to hold the reaching expression. The nice |
3890 | thing about the classical approach is that it would try to use an existing | |
3891 | reg. If the register can't be adequately optimized [i.e. we introduce | |
3892 | reload problems], one could add a pass here to propagate the new register | |
3893 | through the block. | |
7506f491 | 3894 | |
c4c81601 RK |
3895 | ??? We don't handle single sets in PARALLELs because we're [currently] not |
3896 | able to copy the rest of the parallel when we insert copies to create full | |
3897 | redundancies from partial redundancies. However, there's no reason why we | |
3898 | can't handle PARALLELs in the cases where there are no partial | |
7506f491 DE |
3899 | redundancies. */ |
3900 | ||
3901 | static int | |
1d088dee | 3902 | pre_gcse (void) |
7506f491 | 3903 | { |
2e653e39 RK |
3904 | unsigned int i; |
3905 | int did_insert, changed; | |
7506f491 | 3906 | struct expr **index_map; |
c4c81601 | 3907 | struct expr *expr; |
7506f491 DE |
3908 | |
3909 | /* Compute a mapping from expression number (`bitmap_index') to | |
3910 | hash table entry. */ | |
3911 | ||
5ed6ace5 | 3912 | index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems); |
02280659 ZD |
3913 | for (i = 0; i < expr_hash_table.size; i++) |
3914 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 | 3915 | index_map[expr->bitmap_index] = expr; |
7506f491 | 3916 | |
7506f491 DE |
3917 | /* Delete the redundant insns first so that |
3918 | - we know what register to use for the new insns and for the other | |
3919 | ones with reaching expressions | |
3920 | - we know which insns are redundant when we go to create copies */ | |
c4c81601 | 3921 | |
7506f491 | 3922 | changed = pre_delete (); |
a42cd965 | 3923 | did_insert = pre_edge_insert (edge_list, index_map); |
c4c81601 | 3924 | |
7506f491 | 3925 | /* In other places with reaching expressions, copy the expression to the |
a42cd965 | 3926 | specially allocated pseudo-reg that reaches the redundant expr. */ |
7506f491 | 3927 | pre_insert_copies (); |
a42cd965 AM |
3928 | if (did_insert) |
3929 | { | |
3930 | commit_edge_insertions (); | |
3931 | changed = 1; | |
3932 | } | |
7506f491 | 3933 | |
283a2545 | 3934 | free (index_map); |
7506f491 DE |
3935 | return changed; |
3936 | } | |
3937 | ||
3938 | /* Top level routine to perform one PRE GCSE pass. | |
3939 | ||
cc2902df | 3940 | Return nonzero if a change was made. */ |
7506f491 DE |
3941 | |
3942 | static int | |
5f39ad47 | 3943 | one_pre_gcse_pass (void) |
7506f491 DE |
3944 | { |
3945 | int changed = 0; | |
3946 | ||
3947 | gcse_subst_count = 0; | |
3948 | gcse_create_count = 0; | |
3949 | ||
5f39ad47 SB |
3950 | /* Return if there's nothing to do, or it is too expensive. */ |
3951 | if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1 | |
3952 | || is_too_expensive (_("PRE disabled"))) | |
3953 | return 0; | |
3954 | ||
3955 | /* We need alias. */ | |
3956 | init_alias_analysis (); | |
3957 | ||
3958 | bytes_used = 0; | |
3959 | gcc_obstack_init (&gcse_obstack); | |
3960 | alloc_gcse_mem (); | |
3961 | ||
b5b8b0ac | 3962 | alloc_hash_table (&expr_hash_table, 0); |
a42cd965 | 3963 | add_noreturn_fake_exit_edges (); |
a13d4ebf AM |
3964 | if (flag_gcse_lm) |
3965 | compute_ld_motion_mems (); | |
3966 | ||
02280659 | 3967 | compute_hash_table (&expr_hash_table); |
a13d4ebf | 3968 | trim_ld_motion_mems (); |
10d22567 ZD |
3969 | if (dump_file) |
3970 | dump_hash_table (dump_file, "Expression", &expr_hash_table); | |
c4c81601 | 3971 | |
02280659 | 3972 | if (expr_hash_table.n_elems > 0) |
7506f491 | 3973 | { |
02280659 | 3974 | alloc_pre_mem (last_basic_block, expr_hash_table.n_elems); |
7506f491 DE |
3975 | compute_pre_data (); |
3976 | changed |= pre_gcse (); | |
a42cd965 | 3977 | free_edge_list (edge_list); |
7506f491 DE |
3978 | free_pre_mem (); |
3979 | } | |
c4c81601 | 3980 | |
a13d4ebf | 3981 | free_ldst_mems (); |
6809cbf9 | 3982 | remove_fake_exit_edges (); |
02280659 | 3983 | free_hash_table (&expr_hash_table); |
7506f491 | 3984 | |
5f39ad47 SB |
3985 | free_gcse_mem (); |
3986 | obstack_free (&gcse_obstack, NULL); | |
3987 | ||
3988 | /* We are finished with alias. */ | |
3989 | end_alias_analysis (); | |
3990 | ||
10d22567 | 3991 | if (dump_file) |
7506f491 | 3992 | { |
5f39ad47 SB |
3993 | fprintf (dump_file, "PRE GCSE of %s, %d basic blocks, %d bytes needed, ", |
3994 | current_function_name (), n_basic_blocks, bytes_used); | |
10d22567 | 3995 | fprintf (dump_file, "%d substs, %d insns created\n", |
c4c81601 | 3996 | gcse_subst_count, gcse_create_count); |
7506f491 DE |
3997 | } |
3998 | ||
3999 | return changed; | |
4000 | } | |
aeb2f500 | 4001 | \f |
cf7c4aa6 HPN |
4002 | /* If X contains any LABEL_REF's, add REG_LABEL_OPERAND notes for them |
4003 | to INSN. If such notes are added to an insn which references a | |
4004 | CODE_LABEL, the LABEL_NUSES count is incremented. We have to add | |
4005 | that note, because the following loop optimization pass requires | |
4006 | them. */ | |
aeb2f500 | 4007 | |
aeb2f500 JW |
4008 | /* ??? If there was a jump optimization pass after gcse and before loop, |
4009 | then we would not need to do this here, because jump would add the | |
cf7c4aa6 | 4010 | necessary REG_LABEL_OPERAND and REG_LABEL_TARGET notes. */ |
aeb2f500 JW |
4011 | |
4012 | static void | |
1d088dee | 4013 | add_label_notes (rtx x, rtx insn) |
aeb2f500 JW |
4014 | { |
4015 | enum rtx_code code = GET_CODE (x); | |
4016 | int i, j; | |
6f7d635c | 4017 | const char *fmt; |
aeb2f500 JW |
4018 | |
4019 | if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x)) | |
4020 | { | |
6b3603c2 | 4021 | /* This code used to ignore labels that referred to dispatch tables to |
e0bb17a8 | 4022 | avoid flow generating (slightly) worse code. |
6b3603c2 | 4023 | |
ac7c5af5 JL |
4024 | We no longer ignore such label references (see LABEL_REF handling in |
4025 | mark_jump_label for additional information). */ | |
c4c81601 | 4026 | |
cb2f563b HPN |
4027 | /* There's no reason for current users to emit jump-insns with |
4028 | such a LABEL_REF, so we don't have to handle REG_LABEL_TARGET | |
4029 | notes. */ | |
4030 | gcc_assert (!JUMP_P (insn)); | |
65c5f2a6 ILT |
4031 | add_reg_note (insn, REG_LABEL_OPERAND, XEXP (x, 0)); |
4032 | ||
cb2f563b HPN |
4033 | if (LABEL_P (XEXP (x, 0))) |
4034 | LABEL_NUSES (XEXP (x, 0))++; | |
4035 | ||
aeb2f500 JW |
4036 | return; |
4037 | } | |
4038 | ||
c4c81601 | 4039 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
aeb2f500 JW |
4040 | { |
4041 | if (fmt[i] == 'e') | |
4042 | add_label_notes (XEXP (x, i), insn); | |
4043 | else if (fmt[i] == 'E') | |
4044 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
4045 | add_label_notes (XVECEXP (x, i, j), insn); | |
4046 | } | |
4047 | } | |
a65f3558 JL |
4048 | |
4049 | /* Compute transparent outgoing information for each block. | |
4050 | ||
4051 | An expression is transparent to an edge unless it is killed by | |
4052 | the edge itself. This can only happen with abnormal control flow, | |
4053 | when the edge is traversed through a call. This happens with | |
4054 | non-local labels and exceptions. | |
4055 | ||
4056 | This would not be necessary if we split the edge. While this is | |
4057 | normally impossible for abnormal critical edges, with some effort | |
4058 | it should be possible with exception handling, since we still have | |
4059 | control over which handler should be invoked. But due to increased | |
4060 | EH table sizes, this may not be worthwhile. */ | |
4061 | ||
4062 | static void | |
1d088dee | 4063 | compute_transpout (void) |
a65f3558 | 4064 | { |
e0082a72 | 4065 | basic_block bb; |
2e653e39 | 4066 | unsigned int i; |
c4c81601 | 4067 | struct expr *expr; |
a65f3558 | 4068 | |
d55bc081 | 4069 | sbitmap_vector_ones (transpout, last_basic_block); |
a65f3558 | 4070 | |
e0082a72 | 4071 | FOR_EACH_BB (bb) |
a65f3558 | 4072 | { |
fa10beec | 4073 | /* Note that flow inserted a nop at the end of basic blocks that |
a65f3558 JL |
4074 | end in call instructions for reasons other than abnormal |
4075 | control flow. */ | |
7b1b4aed | 4076 | if (! CALL_P (BB_END (bb))) |
a65f3558 JL |
4077 | continue; |
4078 | ||
02280659 ZD |
4079 | for (i = 0; i < expr_hash_table.size; i++) |
4080 | for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash) | |
7b1b4aed | 4081 | if (MEM_P (expr->expr)) |
c4c81601 RK |
4082 | { |
4083 | if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF | |
4084 | && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0))) | |
4085 | continue; | |
589005ff | 4086 | |
c4c81601 RK |
4087 | /* ??? Optimally, we would use interprocedural alias |
4088 | analysis to determine if this mem is actually killed | |
4089 | by this call. */ | |
e0082a72 | 4090 | RESET_BIT (transpout[bb->index], expr->bitmap_index); |
c4c81601 | 4091 | } |
a65f3558 JL |
4092 | } |
4093 | } | |
dfdb644f | 4094 | |
bb457bd9 JL |
4095 | /* Code Hoisting variables and subroutines. */ |
4096 | ||
4097 | /* Very busy expressions. */ | |
4098 | static sbitmap *hoist_vbein; | |
4099 | static sbitmap *hoist_vbeout; | |
4100 | ||
4101 | /* Hoistable expressions. */ | |
4102 | static sbitmap *hoist_exprs; | |
4103 | ||
bb457bd9 | 4104 | /* ??? We could compute post dominators and run this algorithm in |
68e82b83 | 4105 | reverse to perform tail merging, doing so would probably be |
bb457bd9 JL |
4106 | more effective than the tail merging code in jump.c. |
4107 | ||
4108 | It's unclear if tail merging could be run in parallel with | |
4109 | code hoisting. It would be nice. */ | |
4110 | ||
4111 | /* Allocate vars used for code hoisting analysis. */ | |
4112 | ||
4113 | static void | |
1d088dee | 4114 | alloc_code_hoist_mem (int n_blocks, int n_exprs) |
bb457bd9 JL |
4115 | { |
4116 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4117 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4118 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4119 | ||
4120 | hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4121 | hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4122 | hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4123 | transpout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
bb457bd9 JL |
4124 | } |
4125 | ||
4126 | /* Free vars used for code hoisting analysis. */ | |
4127 | ||
4128 | static void | |
1d088dee | 4129 | free_code_hoist_mem (void) |
bb457bd9 | 4130 | { |
5a660bff DB |
4131 | sbitmap_vector_free (antloc); |
4132 | sbitmap_vector_free (transp); | |
4133 | sbitmap_vector_free (comp); | |
bb457bd9 | 4134 | |
5a660bff DB |
4135 | sbitmap_vector_free (hoist_vbein); |
4136 | sbitmap_vector_free (hoist_vbeout); | |
4137 | sbitmap_vector_free (hoist_exprs); | |
4138 | sbitmap_vector_free (transpout); | |
bb457bd9 | 4139 | |
d47cc544 | 4140 | free_dominance_info (CDI_DOMINATORS); |
bb457bd9 JL |
4141 | } |
4142 | ||
4143 | /* Compute the very busy expressions at entry/exit from each block. | |
4144 | ||
4145 | An expression is very busy if all paths from a given point | |
4146 | compute the expression. */ | |
4147 | ||
4148 | static void | |
1d088dee | 4149 | compute_code_hoist_vbeinout (void) |
bb457bd9 | 4150 | { |
e0082a72 ZD |
4151 | int changed, passes; |
4152 | basic_block bb; | |
bb457bd9 | 4153 | |
d55bc081 ZD |
4154 | sbitmap_vector_zero (hoist_vbeout, last_basic_block); |
4155 | sbitmap_vector_zero (hoist_vbein, last_basic_block); | |
bb457bd9 JL |
4156 | |
4157 | passes = 0; | |
4158 | changed = 1; | |
c4c81601 | 4159 | |
bb457bd9 JL |
4160 | while (changed) |
4161 | { | |
4162 | changed = 0; | |
c4c81601 | 4163 | |
bb457bd9 JL |
4164 | /* We scan the blocks in the reverse order to speed up |
4165 | the convergence. */ | |
e0082a72 | 4166 | FOR_EACH_BB_REVERSE (bb) |
bb457bd9 | 4167 | { |
e0082a72 | 4168 | if (bb->next_bb != EXIT_BLOCK_PTR) |
f8423fea SB |
4169 | sbitmap_intersection_of_succs (hoist_vbeout[bb->index], |
4170 | hoist_vbein, bb->index); | |
4171 | ||
4172 | changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], | |
4173 | antloc[bb->index], | |
4174 | hoist_vbeout[bb->index], | |
4175 | transp[bb->index]); | |
bb457bd9 | 4176 | } |
c4c81601 | 4177 | |
bb457bd9 JL |
4178 | passes++; |
4179 | } | |
4180 | ||
10d22567 ZD |
4181 | if (dump_file) |
4182 | fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes); | |
bb457bd9 JL |
4183 | } |
4184 | ||
4185 | /* Top level routine to do the dataflow analysis needed by code hoisting. */ | |
4186 | ||
4187 | static void | |
1d088dee | 4188 | compute_code_hoist_data (void) |
bb457bd9 | 4189 | { |
02280659 | 4190 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
bb457bd9 JL |
4191 | compute_transpout (); |
4192 | compute_code_hoist_vbeinout (); | |
d47cc544 | 4193 | calculate_dominance_info (CDI_DOMINATORS); |
10d22567 ZD |
4194 | if (dump_file) |
4195 | fprintf (dump_file, "\n"); | |
bb457bd9 JL |
4196 | } |
4197 | ||
4198 | /* Determine if the expression identified by EXPR_INDEX would | |
4199 | reach BB unimpared if it was placed at the end of EXPR_BB. | |
4200 | ||
4201 | It's unclear exactly what Muchnick meant by "unimpared". It seems | |
4202 | to me that the expression must either be computed or transparent in | |
4203 | *every* block in the path(s) from EXPR_BB to BB. Any other definition | |
4204 | would allow the expression to be hoisted out of loops, even if | |
4205 | the expression wasn't a loop invariant. | |
4206 | ||
4207 | Contrast this to reachability for PRE where an expression is | |
4208 | considered reachable if *any* path reaches instead of *all* | |
4209 | paths. */ | |
4210 | ||
4211 | static int | |
1d088dee | 4212 | hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited) |
bb457bd9 JL |
4213 | { |
4214 | edge pred; | |
628f6a4e | 4215 | edge_iterator ei; |
283a2545 | 4216 | int visited_allocated_locally = 0; |
589005ff | 4217 | |
bb457bd9 JL |
4218 | |
4219 | if (visited == NULL) | |
4220 | { | |
8e42ace1 | 4221 | visited_allocated_locally = 1; |
5ed6ace5 | 4222 | visited = XCNEWVEC (char, last_basic_block); |
bb457bd9 JL |
4223 | } |
4224 | ||
628f6a4e | 4225 | FOR_EACH_EDGE (pred, ei, bb->preds) |
bb457bd9 | 4226 | { |
e2d2ed72 | 4227 | basic_block pred_bb = pred->src; |
bb457bd9 JL |
4228 | |
4229 | if (pred->src == ENTRY_BLOCK_PTR) | |
4230 | break; | |
f305679f JH |
4231 | else if (pred_bb == expr_bb) |
4232 | continue; | |
0b17ab2f | 4233 | else if (visited[pred_bb->index]) |
bb457bd9 | 4234 | continue; |
c4c81601 | 4235 | |
bb457bd9 | 4236 | /* Does this predecessor generate this expression? */ |
0b17ab2f | 4237 | else if (TEST_BIT (comp[pred_bb->index], expr_index)) |
bb457bd9 | 4238 | break; |
0b17ab2f | 4239 | else if (! TEST_BIT (transp[pred_bb->index], expr_index)) |
bb457bd9 | 4240 | break; |
c4c81601 | 4241 | |
bb457bd9 JL |
4242 | /* Not killed. */ |
4243 | else | |
4244 | { | |
0b17ab2f | 4245 | visited[pred_bb->index] = 1; |
bb457bd9 JL |
4246 | if (! hoist_expr_reaches_here_p (expr_bb, expr_index, |
4247 | pred_bb, visited)) | |
4248 | break; | |
4249 | } | |
4250 | } | |
589005ff | 4251 | if (visited_allocated_locally) |
283a2545 | 4252 | free (visited); |
c4c81601 | 4253 | |
bb457bd9 JL |
4254 | return (pred == NULL); |
4255 | } | |
4256 | \f | |
4257 | /* Actually perform code hoisting. */ | |
c4c81601 | 4258 | |
5f39ad47 | 4259 | static int |
1d088dee | 4260 | hoist_code (void) |
bb457bd9 | 4261 | { |
e0082a72 | 4262 | basic_block bb, dominated; |
66f97d31 | 4263 | VEC (basic_block, heap) *domby; |
c635a1ec | 4264 | unsigned int i,j; |
bb457bd9 | 4265 | struct expr **index_map; |
c4c81601 | 4266 | struct expr *expr; |
5f39ad47 | 4267 | int changed = 0; |
bb457bd9 | 4268 | |
d55bc081 | 4269 | sbitmap_vector_zero (hoist_exprs, last_basic_block); |
bb457bd9 JL |
4270 | |
4271 | /* Compute a mapping from expression number (`bitmap_index') to | |
4272 | hash table entry. */ | |
4273 | ||
5ed6ace5 | 4274 | index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems); |
02280659 ZD |
4275 | for (i = 0; i < expr_hash_table.size; i++) |
4276 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 | 4277 | index_map[expr->bitmap_index] = expr; |
bb457bd9 JL |
4278 | |
4279 | /* Walk over each basic block looking for potentially hoistable | |
4280 | expressions, nothing gets hoisted from the entry block. */ | |
e0082a72 | 4281 | FOR_EACH_BB (bb) |
bb457bd9 JL |
4282 | { |
4283 | int found = 0; | |
4284 | int insn_inserted_p; | |
4285 | ||
66f97d31 | 4286 | domby = get_dominated_by (CDI_DOMINATORS, bb); |
bb457bd9 JL |
4287 | /* Examine each expression that is very busy at the exit of this |
4288 | block. These are the potentially hoistable expressions. */ | |
e0082a72 | 4289 | for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++) |
bb457bd9 JL |
4290 | { |
4291 | int hoistable = 0; | |
c4c81601 | 4292 | |
c635a1ec DB |
4293 | if (TEST_BIT (hoist_vbeout[bb->index], i) |
4294 | && TEST_BIT (transpout[bb->index], i)) | |
bb457bd9 JL |
4295 | { |
4296 | /* We've found a potentially hoistable expression, now | |
4297 | we look at every block BB dominates to see if it | |
4298 | computes the expression. */ | |
66f97d31 | 4299 | for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++) |
bb457bd9 JL |
4300 | { |
4301 | /* Ignore self dominance. */ | |
c635a1ec | 4302 | if (bb == dominated) |
bb457bd9 | 4303 | continue; |
bb457bd9 JL |
4304 | /* We've found a dominated block, now see if it computes |
4305 | the busy expression and whether or not moving that | |
4306 | expression to the "beginning" of that block is safe. */ | |
e0082a72 | 4307 | if (!TEST_BIT (antloc[dominated->index], i)) |
bb457bd9 JL |
4308 | continue; |
4309 | ||
4310 | /* Note if the expression would reach the dominated block | |
589005ff | 4311 | unimpared if it was placed at the end of BB. |
bb457bd9 JL |
4312 | |
4313 | Keep track of how many times this expression is hoistable | |
4314 | from a dominated block into BB. */ | |
e0082a72 | 4315 | if (hoist_expr_reaches_here_p (bb, i, dominated, NULL)) |
bb457bd9 JL |
4316 | hoistable++; |
4317 | } | |
4318 | ||
ff7cc307 | 4319 | /* If we found more than one hoistable occurrence of this |
bb457bd9 JL |
4320 | expression, then note it in the bitmap of expressions to |
4321 | hoist. It makes no sense to hoist things which are computed | |
4322 | in only one BB, and doing so tends to pessimize register | |
4323 | allocation. One could increase this value to try harder | |
4324 | to avoid any possible code expansion due to register | |
4325 | allocation issues; however experiments have shown that | |
4326 | the vast majority of hoistable expressions are only movable | |
e0bb17a8 | 4327 | from two successors, so raising this threshold is likely |
bb457bd9 JL |
4328 | to nullify any benefit we get from code hoisting. */ |
4329 | if (hoistable > 1) | |
4330 | { | |
e0082a72 | 4331 | SET_BIT (hoist_exprs[bb->index], i); |
bb457bd9 JL |
4332 | found = 1; |
4333 | } | |
4334 | } | |
4335 | } | |
bb457bd9 JL |
4336 | /* If we found nothing to hoist, then quit now. */ |
4337 | if (! found) | |
c635a1ec | 4338 | { |
66f97d31 ZD |
4339 | VEC_free (basic_block, heap, domby); |
4340 | continue; | |
c635a1ec | 4341 | } |
bb457bd9 JL |
4342 | |
4343 | /* Loop over all the hoistable expressions. */ | |
e0082a72 | 4344 | for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++) |
bb457bd9 JL |
4345 | { |
4346 | /* We want to insert the expression into BB only once, so | |
4347 | note when we've inserted it. */ | |
4348 | insn_inserted_p = 0; | |
4349 | ||
4350 | /* These tests should be the same as the tests above. */ | |
cb83c2ec | 4351 | if (TEST_BIT (hoist_exprs[bb->index], i)) |
bb457bd9 JL |
4352 | { |
4353 | /* We've found a potentially hoistable expression, now | |
4354 | we look at every block BB dominates to see if it | |
4355 | computes the expression. */ | |
66f97d31 | 4356 | for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++) |
bb457bd9 JL |
4357 | { |
4358 | /* Ignore self dominance. */ | |
c635a1ec | 4359 | if (bb == dominated) |
bb457bd9 JL |
4360 | continue; |
4361 | ||
4362 | /* We've found a dominated block, now see if it computes | |
4363 | the busy expression and whether or not moving that | |
4364 | expression to the "beginning" of that block is safe. */ | |
e0082a72 | 4365 | if (!TEST_BIT (antloc[dominated->index], i)) |
bb457bd9 JL |
4366 | continue; |
4367 | ||
4368 | /* The expression is computed in the dominated block and | |
4369 | it would be safe to compute it at the start of the | |
4370 | dominated block. Now we have to determine if the | |
ff7cc307 | 4371 | expression would reach the dominated block if it was |
bb457bd9 | 4372 | placed at the end of BB. */ |
e0082a72 | 4373 | if (hoist_expr_reaches_here_p (bb, i, dominated, NULL)) |
bb457bd9 JL |
4374 | { |
4375 | struct expr *expr = index_map[i]; | |
4376 | struct occr *occr = expr->antic_occr; | |
4377 | rtx insn; | |
4378 | rtx set; | |
4379 | ||
ff7cc307 | 4380 | /* Find the right occurrence of this expression. */ |
e0082a72 | 4381 | while (BLOCK_FOR_INSN (occr->insn) != dominated && occr) |
bb457bd9 JL |
4382 | occr = occr->next; |
4383 | ||
282899df | 4384 | gcc_assert (occr); |
bb457bd9 | 4385 | insn = occr->insn; |
bb457bd9 | 4386 | set = single_set (insn); |
282899df | 4387 | gcc_assert (set); |
bb457bd9 JL |
4388 | |
4389 | /* Create a pseudo-reg to store the result of reaching | |
4390 | expressions into. Get the mode for the new pseudo | |
4391 | from the mode of the original destination pseudo. */ | |
4392 | if (expr->reaching_reg == NULL) | |
4393 | expr->reaching_reg | |
46b71b03 | 4394 | = gen_reg_rtx_and_attrs (SET_DEST (set)); |
bb457bd9 | 4395 | |
10d1bb36 JH |
4396 | gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn); |
4397 | delete_insn (insn); | |
4398 | occr->deleted_p = 1; | |
5f39ad47 SB |
4399 | changed = 1; |
4400 | gcse_subst_count++; | |
4401 | ||
10d1bb36 | 4402 | if (!insn_inserted_p) |
bb457bd9 | 4403 | { |
6fb5fa3c | 4404 | insert_insn_end_basic_block (index_map[i], bb, 0); |
10d1bb36 | 4405 | insn_inserted_p = 1; |
bb457bd9 JL |
4406 | } |
4407 | } | |
4408 | } | |
4409 | } | |
4410 | } | |
66f97d31 | 4411 | VEC_free (basic_block, heap, domby); |
bb457bd9 | 4412 | } |
c4c81601 | 4413 | |
8e42ace1 | 4414 | free (index_map); |
5f39ad47 SB |
4415 | |
4416 | return changed; | |
bb457bd9 JL |
4417 | } |
4418 | ||
4419 | /* Top level routine to perform one code hoisting (aka unification) pass | |
4420 | ||
cc2902df | 4421 | Return nonzero if a change was made. */ |
bb457bd9 JL |
4422 | |
4423 | static int | |
1d088dee | 4424 | one_code_hoisting_pass (void) |
bb457bd9 JL |
4425 | { |
4426 | int changed = 0; | |
4427 | ||
5f39ad47 SB |
4428 | gcse_subst_count = 0; |
4429 | gcse_create_count = 0; | |
4430 | ||
4431 | /* Return if there's nothing to do, or it is too expensive. */ | |
4432 | if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1 | |
4433 | || is_too_expensive (_("GCSE disabled"))) | |
4434 | return 0; | |
4435 | ||
4436 | /* We need alias. */ | |
4437 | init_alias_analysis (); | |
4438 | ||
4439 | bytes_used = 0; | |
4440 | gcc_obstack_init (&gcse_obstack); | |
4441 | alloc_gcse_mem (); | |
4442 | ||
b5b8b0ac | 4443 | alloc_hash_table (&expr_hash_table, 0); |
02280659 | 4444 | compute_hash_table (&expr_hash_table); |
10d22567 ZD |
4445 | if (dump_file) |
4446 | dump_hash_table (dump_file, "Code Hosting Expressions", &expr_hash_table); | |
c4c81601 | 4447 | |
02280659 | 4448 | if (expr_hash_table.n_elems > 0) |
bb457bd9 | 4449 | { |
02280659 | 4450 | alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems); |
bb457bd9 | 4451 | compute_code_hoist_data (); |
5f39ad47 | 4452 | changed = hoist_code (); |
bb457bd9 JL |
4453 | free_code_hoist_mem (); |
4454 | } | |
c4c81601 | 4455 | |
02280659 | 4456 | free_hash_table (&expr_hash_table); |
5f39ad47 SB |
4457 | free_gcse_mem (); |
4458 | obstack_free (&gcse_obstack, NULL); | |
4459 | ||
4460 | /* We are finished with alias. */ | |
4461 | end_alias_analysis (); | |
4462 | ||
4463 | if (dump_file) | |
4464 | { | |
4465 | fprintf (dump_file, "HOIST of %s, %d basic blocks, %d bytes needed, ", | |
4466 | current_function_name (), n_basic_blocks, bytes_used); | |
4467 | fprintf (dump_file, "%d substs, %d insns created\n", | |
4468 | gcse_subst_count, gcse_create_count); | |
4469 | } | |
bb457bd9 JL |
4470 | |
4471 | return changed; | |
4472 | } | |
a13d4ebf AM |
4473 | \f |
4474 | /* Here we provide the things required to do store motion towards | |
4475 | the exit. In order for this to be effective, gcse also needed to | |
4476 | be taught how to move a load when it is kill only by a store to itself. | |
4477 | ||
4478 | int i; | |
4479 | float a[10]; | |
4480 | ||
4481 | void foo(float scale) | |
4482 | { | |
4483 | for (i=0; i<10; i++) | |
4484 | a[i] *= scale; | |
4485 | } | |
4486 | ||
4487 | 'i' is both loaded and stored to in the loop. Normally, gcse cannot move | |
589005ff KH |
4488 | the load out since its live around the loop, and stored at the bottom |
4489 | of the loop. | |
a13d4ebf | 4490 | |
589005ff | 4491 | The 'Load Motion' referred to and implemented in this file is |
a13d4ebf AM |
4492 | an enhancement to gcse which when using edge based lcm, recognizes |
4493 | this situation and allows gcse to move the load out of the loop. | |
4494 | ||
4495 | Once gcse has hoisted the load, store motion can then push this | |
4496 | load towards the exit, and we end up with no loads or stores of 'i' | |
4497 | in the loop. */ | |
4498 | ||
9727e468 RG |
4499 | static hashval_t |
4500 | pre_ldst_expr_hash (const void *p) | |
4501 | { | |
4502 | int do_not_record_p = 0; | |
1b4572a8 | 4503 | const struct ls_expr *const x = (const struct ls_expr *) p; |
9727e468 RG |
4504 | return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false); |
4505 | } | |
4506 | ||
4507 | static int | |
4508 | pre_ldst_expr_eq (const void *p1, const void *p2) | |
4509 | { | |
1b4572a8 KG |
4510 | const struct ls_expr *const ptr1 = (const struct ls_expr *) p1, |
4511 | *const ptr2 = (const struct ls_expr *) p2; | |
9727e468 RG |
4512 | return expr_equiv_p (ptr1->pattern, ptr2->pattern); |
4513 | } | |
4514 | ||
ff7cc307 | 4515 | /* This will search the ldst list for a matching expression. If it |
a13d4ebf AM |
4516 | doesn't find one, we create one and initialize it. */ |
4517 | ||
4518 | static struct ls_expr * | |
1d088dee | 4519 | ldst_entry (rtx x) |
a13d4ebf | 4520 | { |
b58b21d5 | 4521 | int do_not_record_p = 0; |
a13d4ebf | 4522 | struct ls_expr * ptr; |
b58b21d5 | 4523 | unsigned int hash; |
9727e468 RG |
4524 | void **slot; |
4525 | struct ls_expr e; | |
a13d4ebf | 4526 | |
0516f6fe SB |
4527 | hash = hash_rtx (x, GET_MODE (x), &do_not_record_p, |
4528 | NULL, /*have_reg_qty=*/false); | |
a13d4ebf | 4529 | |
9727e468 RG |
4530 | e.pattern = x; |
4531 | slot = htab_find_slot_with_hash (pre_ldst_table, &e, hash, INSERT); | |
4532 | if (*slot) | |
4533 | return (struct ls_expr *)*slot; | |
b58b21d5 | 4534 | |
5ed6ace5 | 4535 | ptr = XNEW (struct ls_expr); |
b58b21d5 RS |
4536 | |
4537 | ptr->next = pre_ldst_mems; | |
4538 | ptr->expr = NULL; | |
4539 | ptr->pattern = x; | |
4540 | ptr->pattern_regs = NULL_RTX; | |
4541 | ptr->loads = NULL_RTX; | |
4542 | ptr->stores = NULL_RTX; | |
4543 | ptr->reaching_reg = NULL_RTX; | |
4544 | ptr->invalid = 0; | |
4545 | ptr->index = 0; | |
4546 | ptr->hash_index = hash; | |
4547 | pre_ldst_mems = ptr; | |
9727e468 | 4548 | *slot = ptr; |
589005ff | 4549 | |
a13d4ebf AM |
4550 | return ptr; |
4551 | } | |
4552 | ||
4553 | /* Free up an individual ldst entry. */ | |
4554 | ||
589005ff | 4555 | static void |
1d088dee | 4556 | free_ldst_entry (struct ls_expr * ptr) |
a13d4ebf | 4557 | { |
aaa4ca30 AJ |
4558 | free_INSN_LIST_list (& ptr->loads); |
4559 | free_INSN_LIST_list (& ptr->stores); | |
a13d4ebf AM |
4560 | |
4561 | free (ptr); | |
4562 | } | |
4563 | ||
4564 | /* Free up all memory associated with the ldst list. */ | |
4565 | ||
4566 | static void | |
1d088dee | 4567 | free_ldst_mems (void) |
a13d4ebf | 4568 | { |
35b5442a RG |
4569 | if (pre_ldst_table) |
4570 | htab_delete (pre_ldst_table); | |
9727e468 RG |
4571 | pre_ldst_table = NULL; |
4572 | ||
589005ff | 4573 | while (pre_ldst_mems) |
a13d4ebf AM |
4574 | { |
4575 | struct ls_expr * tmp = pre_ldst_mems; | |
4576 | ||
4577 | pre_ldst_mems = pre_ldst_mems->next; | |
4578 | ||
4579 | free_ldst_entry (tmp); | |
4580 | } | |
4581 | ||
4582 | pre_ldst_mems = NULL; | |
4583 | } | |
4584 | ||
4585 | /* Dump debugging info about the ldst list. */ | |
4586 | ||
4587 | static void | |
1d088dee | 4588 | print_ldst_list (FILE * file) |
a13d4ebf AM |
4589 | { |
4590 | struct ls_expr * ptr; | |
4591 | ||
4592 | fprintf (file, "LDST list: \n"); | |
4593 | ||
62e5bf5d | 4594 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) |
a13d4ebf AM |
4595 | { |
4596 | fprintf (file, " Pattern (%3d): ", ptr->index); | |
4597 | ||
4598 | print_rtl (file, ptr->pattern); | |
4599 | ||
4600 | fprintf (file, "\n Loads : "); | |
4601 | ||
4602 | if (ptr->loads) | |
4603 | print_rtl (file, ptr->loads); | |
4604 | else | |
4605 | fprintf (file, "(nil)"); | |
4606 | ||
4607 | fprintf (file, "\n Stores : "); | |
4608 | ||
4609 | if (ptr->stores) | |
4610 | print_rtl (file, ptr->stores); | |
4611 | else | |
4612 | fprintf (file, "(nil)"); | |
4613 | ||
4614 | fprintf (file, "\n\n"); | |
4615 | } | |
4616 | ||
4617 | fprintf (file, "\n"); | |
4618 | } | |
4619 | ||
4620 | /* Returns 1 if X is in the list of ldst only expressions. */ | |
4621 | ||
4622 | static struct ls_expr * | |
1d088dee | 4623 | find_rtx_in_ldst (rtx x) |
a13d4ebf | 4624 | { |
9727e468 RG |
4625 | struct ls_expr e; |
4626 | void **slot; | |
6375779a RG |
4627 | if (!pre_ldst_table) |
4628 | return NULL; | |
9727e468 RG |
4629 | e.pattern = x; |
4630 | slot = htab_find_slot (pre_ldst_table, &e, NO_INSERT); | |
4631 | if (!slot || ((struct ls_expr *)*slot)->invalid) | |
4632 | return NULL; | |
1b4572a8 | 4633 | return (struct ls_expr *) *slot; |
a13d4ebf AM |
4634 | } |
4635 | ||
a13d4ebf AM |
4636 | /* Return first item in the list. */ |
4637 | ||
4638 | static inline struct ls_expr * | |
1d088dee | 4639 | first_ls_expr (void) |
a13d4ebf AM |
4640 | { |
4641 | return pre_ldst_mems; | |
4642 | } | |
4643 | ||
0e8a66de | 4644 | /* Return the next item in the list after the specified one. */ |
a13d4ebf AM |
4645 | |
4646 | static inline struct ls_expr * | |
1d088dee | 4647 | next_ls_expr (struct ls_expr * ptr) |
a13d4ebf AM |
4648 | { |
4649 | return ptr->next; | |
4650 | } | |
4651 | \f | |
4652 | /* Load Motion for loads which only kill themselves. */ | |
4653 | ||
4654 | /* Return true if x is a simple MEM operation, with no registers or | |
4655 | side effects. These are the types of loads we consider for the | |
4656 | ld_motion list, otherwise we let the usual aliasing take care of it. */ | |
4657 | ||
589005ff | 4658 | static int |
ed7a4b4b | 4659 | simple_mem (const_rtx x) |
a13d4ebf | 4660 | { |
7b1b4aed | 4661 | if (! MEM_P (x)) |
a13d4ebf | 4662 | return 0; |
589005ff | 4663 | |
a13d4ebf AM |
4664 | if (MEM_VOLATILE_P (x)) |
4665 | return 0; | |
589005ff | 4666 | |
a13d4ebf AM |
4667 | if (GET_MODE (x) == BLKmode) |
4668 | return 0; | |
aaa4ca30 | 4669 | |
47a3dae1 | 4670 | /* If we are handling exceptions, we must be careful with memory references |
8f4f502f | 4671 | that may trap. If we are not, the behavior is undefined, so we may just |
47a3dae1 | 4672 | continue. */ |
8f4f502f | 4673 | if (cfun->can_throw_non_call_exceptions && may_trap_p (x)) |
98d3d336 RS |
4674 | return 0; |
4675 | ||
47a3dae1 ZD |
4676 | if (side_effects_p (x)) |
4677 | return 0; | |
589005ff | 4678 | |
47a3dae1 ZD |
4679 | /* Do not consider function arguments passed on stack. */ |
4680 | if (reg_mentioned_p (stack_pointer_rtx, x)) | |
4681 | return 0; | |
4682 | ||
4683 | if (flag_float_store && FLOAT_MODE_P (GET_MODE (x))) | |
4684 | return 0; | |
4685 | ||
4686 | return 1; | |
a13d4ebf AM |
4687 | } |
4688 | ||
589005ff KH |
4689 | /* Make sure there isn't a buried reference in this pattern anywhere. |
4690 | If there is, invalidate the entry for it since we're not capable | |
4691 | of fixing it up just yet.. We have to be sure we know about ALL | |
a13d4ebf AM |
4692 | loads since the aliasing code will allow all entries in the |
4693 | ld_motion list to not-alias itself. If we miss a load, we will get | |
589005ff | 4694 | the wrong value since gcse might common it and we won't know to |
a13d4ebf AM |
4695 | fix it up. */ |
4696 | ||
4697 | static void | |
1d088dee | 4698 | invalidate_any_buried_refs (rtx x) |
a13d4ebf AM |
4699 | { |
4700 | const char * fmt; | |
8e42ace1 | 4701 | int i, j; |
a13d4ebf AM |
4702 | struct ls_expr * ptr; |
4703 | ||
4704 | /* Invalidate it in the list. */ | |
7b1b4aed | 4705 | if (MEM_P (x) && simple_mem (x)) |
a13d4ebf AM |
4706 | { |
4707 | ptr = ldst_entry (x); | |
4708 | ptr->invalid = 1; | |
4709 | } | |
4710 | ||
4711 | /* Recursively process the insn. */ | |
4712 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
589005ff | 4713 | |
a13d4ebf AM |
4714 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) |
4715 | { | |
4716 | if (fmt[i] == 'e') | |
4717 | invalidate_any_buried_refs (XEXP (x, i)); | |
4718 | else if (fmt[i] == 'E') | |
4719 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
4720 | invalidate_any_buried_refs (XVECEXP (x, i, j)); | |
4721 | } | |
4722 | } | |
4723 | ||
4d3eb89a HPN |
4724 | /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple |
4725 | being defined as MEM loads and stores to symbols, with no side effects | |
4726 | and no registers in the expression. For a MEM destination, we also | |
4727 | check that the insn is still valid if we replace the destination with a | |
4728 | REG, as is done in update_ld_motion_stores. If there are any uses/defs | |
4729 | which don't match this criteria, they are invalidated and trimmed out | |
4730 | later. */ | |
a13d4ebf | 4731 | |
589005ff | 4732 | static void |
1d088dee | 4733 | compute_ld_motion_mems (void) |
a13d4ebf AM |
4734 | { |
4735 | struct ls_expr * ptr; | |
e0082a72 | 4736 | basic_block bb; |
a13d4ebf | 4737 | rtx insn; |
589005ff | 4738 | |
a13d4ebf | 4739 | pre_ldst_mems = NULL; |
9727e468 RG |
4740 | pre_ldst_table = htab_create (13, pre_ldst_expr_hash, |
4741 | pre_ldst_expr_eq, NULL); | |
a13d4ebf | 4742 | |
e0082a72 | 4743 | FOR_EACH_BB (bb) |
a13d4ebf | 4744 | { |
eb232f4e | 4745 | FOR_BB_INSNS (bb, insn) |
a13d4ebf | 4746 | { |
b5b8b0ac | 4747 | if (NONDEBUG_INSN_P (insn)) |
a13d4ebf AM |
4748 | { |
4749 | if (GET_CODE (PATTERN (insn)) == SET) | |
4750 | { | |
4751 | rtx src = SET_SRC (PATTERN (insn)); | |
4752 | rtx dest = SET_DEST (PATTERN (insn)); | |
4753 | ||
4754 | /* Check for a simple LOAD... */ | |
7b1b4aed | 4755 | if (MEM_P (src) && simple_mem (src)) |
a13d4ebf AM |
4756 | { |
4757 | ptr = ldst_entry (src); | |
7b1b4aed | 4758 | if (REG_P (dest)) |
a13d4ebf AM |
4759 | ptr->loads = alloc_INSN_LIST (insn, ptr->loads); |
4760 | else | |
4761 | ptr->invalid = 1; | |
4762 | } | |
4763 | else | |
4764 | { | |
4765 | /* Make sure there isn't a buried load somewhere. */ | |
4766 | invalidate_any_buried_refs (src); | |
4767 | } | |
589005ff | 4768 | |
a13d4ebf AM |
4769 | /* Check for stores. Don't worry about aliased ones, they |
4770 | will block any movement we might do later. We only care | |
4771 | about this exact pattern since those are the only | |
4772 | circumstance that we will ignore the aliasing info. */ | |
7b1b4aed | 4773 | if (MEM_P (dest) && simple_mem (dest)) |
a13d4ebf AM |
4774 | { |
4775 | ptr = ldst_entry (dest); | |
589005ff | 4776 | |
7b1b4aed | 4777 | if (! MEM_P (src) |
4d3eb89a HPN |
4778 | && GET_CODE (src) != ASM_OPERANDS |
4779 | /* Check for REG manually since want_to_gcse_p | |
4780 | returns 0 for all REGs. */ | |
df35c271 | 4781 | && can_assign_to_reg_without_clobbers_p (src)) |
a13d4ebf AM |
4782 | ptr->stores = alloc_INSN_LIST (insn, ptr->stores); |
4783 | else | |
4784 | ptr->invalid = 1; | |
4785 | } | |
4786 | } | |
4787 | else | |
4788 | invalidate_any_buried_refs (PATTERN (insn)); | |
4789 | } | |
4790 | } | |
4791 | } | |
4792 | } | |
4793 | ||
589005ff | 4794 | /* Remove any references that have been either invalidated or are not in the |
a13d4ebf AM |
4795 | expression list for pre gcse. */ |
4796 | ||
4797 | static void | |
1d088dee | 4798 | trim_ld_motion_mems (void) |
a13d4ebf | 4799 | { |
b58b21d5 RS |
4800 | struct ls_expr * * last = & pre_ldst_mems; |
4801 | struct ls_expr * ptr = pre_ldst_mems; | |
a13d4ebf AM |
4802 | |
4803 | while (ptr != NULL) | |
4804 | { | |
b58b21d5 | 4805 | struct expr * expr; |
589005ff | 4806 | |
a13d4ebf | 4807 | /* Delete if entry has been made invalid. */ |
b58b21d5 | 4808 | if (! ptr->invalid) |
a13d4ebf | 4809 | { |
a13d4ebf | 4810 | /* Delete if we cannot find this mem in the expression list. */ |
b58b21d5 | 4811 | unsigned int hash = ptr->hash_index % expr_hash_table.size; |
589005ff | 4812 | |
b58b21d5 RS |
4813 | for (expr = expr_hash_table.table[hash]; |
4814 | expr != NULL; | |
4815 | expr = expr->next_same_hash) | |
4816 | if (expr_equiv_p (expr->expr, ptr->pattern)) | |
4817 | break; | |
a13d4ebf AM |
4818 | } |
4819 | else | |
b58b21d5 RS |
4820 | expr = (struct expr *) 0; |
4821 | ||
4822 | if (expr) | |
a13d4ebf AM |
4823 | { |
4824 | /* Set the expression field if we are keeping it. */ | |
a13d4ebf | 4825 | ptr->expr = expr; |
b58b21d5 | 4826 | last = & ptr->next; |
a13d4ebf AM |
4827 | ptr = ptr->next; |
4828 | } | |
b58b21d5 RS |
4829 | else |
4830 | { | |
4831 | *last = ptr->next; | |
9727e468 | 4832 | htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index); |
b58b21d5 RS |
4833 | free_ldst_entry (ptr); |
4834 | ptr = * last; | |
4835 | } | |
a13d4ebf AM |
4836 | } |
4837 | ||
4838 | /* Show the world what we've found. */ | |
10d22567 ZD |
4839 | if (dump_file && pre_ldst_mems != NULL) |
4840 | print_ldst_list (dump_file); | |
a13d4ebf AM |
4841 | } |
4842 | ||
4843 | /* This routine will take an expression which we are replacing with | |
4844 | a reaching register, and update any stores that are needed if | |
4845 | that expression is in the ld_motion list. Stores are updated by | |
a98ebe2e | 4846 | copying their SRC to the reaching register, and then storing |
a13d4ebf AM |
4847 | the reaching register into the store location. These keeps the |
4848 | correct value in the reaching register for the loads. */ | |
4849 | ||
4850 | static void | |
1d088dee | 4851 | update_ld_motion_stores (struct expr * expr) |
a13d4ebf AM |
4852 | { |
4853 | struct ls_expr * mem_ptr; | |
4854 | ||
4855 | if ((mem_ptr = find_rtx_in_ldst (expr->expr))) | |
4856 | { | |
589005ff KH |
4857 | /* We can try to find just the REACHED stores, but is shouldn't |
4858 | matter to set the reaching reg everywhere... some might be | |
a13d4ebf AM |
4859 | dead and should be eliminated later. */ |
4860 | ||
4d3eb89a HPN |
4861 | /* We replace (set mem expr) with (set reg expr) (set mem reg) |
4862 | where reg is the reaching reg used in the load. We checked in | |
4863 | compute_ld_motion_mems that we can replace (set mem expr) with | |
4864 | (set reg expr) in that insn. */ | |
a13d4ebf | 4865 | rtx list = mem_ptr->stores; |
589005ff | 4866 | |
a13d4ebf AM |
4867 | for ( ; list != NULL_RTX; list = XEXP (list, 1)) |
4868 | { | |
4869 | rtx insn = XEXP (list, 0); | |
4870 | rtx pat = PATTERN (insn); | |
4871 | rtx src = SET_SRC (pat); | |
4872 | rtx reg = expr->reaching_reg; | |
038dc49a | 4873 | rtx copy; |
a13d4ebf AM |
4874 | |
4875 | /* If we've already copied it, continue. */ | |
4876 | if (expr->reaching_reg == src) | |
4877 | continue; | |
589005ff | 4878 | |
10d22567 | 4879 | if (dump_file) |
a13d4ebf | 4880 | { |
10d22567 ZD |
4881 | fprintf (dump_file, "PRE: store updated with reaching reg "); |
4882 | print_rtl (dump_file, expr->reaching_reg); | |
4883 | fprintf (dump_file, ":\n "); | |
4884 | print_inline_rtx (dump_file, insn, 8); | |
4885 | fprintf (dump_file, "\n"); | |
a13d4ebf | 4886 | } |
589005ff | 4887 | |
4a81774c | 4888 | copy = gen_move_insn (reg, copy_rtx (SET_SRC (pat))); |
038dc49a | 4889 | emit_insn_before (copy, insn); |
a13d4ebf | 4890 | SET_SRC (pat) = reg; |
6fb5fa3c | 4891 | df_insn_rescan (insn); |
a13d4ebf AM |
4892 | |
4893 | /* un-recognize this pattern since it's probably different now. */ | |
4894 | INSN_CODE (insn) = -1; | |
4895 | gcse_create_count++; | |
4896 | } | |
4897 | } | |
4898 | } | |
4899 | \f | |
df35c271 SB |
4900 | /* Return true if the graph is too expensive to optimize. PASS is the |
4901 | optimization about to be performed. */ | |
47a3dae1 | 4902 | |
df35c271 SB |
4903 | static bool |
4904 | is_too_expensive (const char *pass) | |
4905 | { | |
4906 | /* Trying to perform global optimizations on flow graphs which have | |
4907 | a high connectivity will take a long time and is unlikely to be | |
4908 | particularly useful. | |
aaa4ca30 | 4909 | |
df35c271 SB |
4910 | In normal circumstances a cfg should have about twice as many |
4911 | edges as blocks. But we do not want to punish small functions | |
4912 | which have a couple switch statements. Rather than simply | |
4913 | threshold the number of blocks, uses something with a more | |
4914 | graceful degradation. */ | |
4915 | if (n_edges > 20000 + n_basic_blocks * 4) | |
4916 | { | |
4917 | warning (OPT_Wdisabled_optimization, | |
4918 | "%s: %d basic blocks and %d edges/basic block", | |
4919 | pass, n_basic_blocks, n_edges / n_basic_blocks); | |
a13d4ebf | 4920 | |
df35c271 SB |
4921 | return true; |
4922 | } | |
a13d4ebf | 4923 | |
df35c271 SB |
4924 | /* If allocating memory for the cprop bitmap would take up too much |
4925 | storage it's better just to disable the optimization. */ | |
4926 | if ((n_basic_blocks | |
4927 | * SBITMAP_SET_SIZE (max_reg_num ()) | |
4928 | * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY) | |
4929 | { | |
4930 | warning (OPT_Wdisabled_optimization, | |
4931 | "%s: %d basic blocks and %d registers", | |
4932 | pass, n_basic_blocks, max_reg_num ()); | |
a13d4ebf | 4933 | |
df35c271 SB |
4934 | return true; |
4935 | } | |
adfcce61 | 4936 | |
df35c271 | 4937 | return false; |
01c43039 RE |
4938 | } |
4939 | ||
df35c271 SB |
4940 | \f |
4941 | /* Main function for the CPROP pass. */ | |
01c43039 | 4942 | |
df35c271 SB |
4943 | static int |
4944 | one_cprop_pass (void) | |
01c43039 | 4945 | { |
df35c271 | 4946 | int changed = 0; |
01c43039 | 4947 | |
df35c271 SB |
4948 | /* Return if there's nothing to do, or it is too expensive. */ |
4949 | if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1 | |
4950 | || is_too_expensive (_ ("const/copy propagation disabled"))) | |
4951 | return 0; | |
01c43039 | 4952 | |
df35c271 SB |
4953 | global_const_prop_count = local_const_prop_count = 0; |
4954 | global_copy_prop_count = local_copy_prop_count = 0; | |
a13d4ebf | 4955 | |
df35c271 SB |
4956 | bytes_used = 0; |
4957 | gcc_obstack_init (&gcse_obstack); | |
4958 | alloc_gcse_mem (); | |
1d088dee | 4959 | |
df35c271 SB |
4960 | /* Do a local const/copy propagation pass first. The global pass |
4961 | only handles global opportunities. | |
4962 | If the local pass changes something, remove any unreachable blocks | |
4963 | because the CPROP global dataflow analysis may get into infinite | |
4964 | loops for CFGs with unreachable blocks. | |
47a3dae1 | 4965 | |
df35c271 SB |
4966 | FIXME: This local pass should not be necessary after CSE (but for |
4967 | some reason it still is). It is also (proven) not necessary | |
4968 | to run the local pass right after FWPWOP. | |
b8698a0f | 4969 | |
df35c271 SB |
4970 | FIXME: The global analysis would not get into infinite loops if it |
4971 | would use the DF solver (via df_simple_dataflow) instead of | |
4972 | the solver implemented in this file. */ | |
4973 | if (local_cprop_pass ()) | |
47a3dae1 | 4974 | { |
df35c271 SB |
4975 | delete_unreachable_blocks (); |
4976 | df_analyze (); | |
47a3dae1 | 4977 | } |
a13d4ebf | 4978 | |
df35c271 SB |
4979 | /* Determine implicit sets. */ |
4980 | implicit_sets = XCNEWVEC (rtx, last_basic_block); | |
4981 | find_implicit_sets (); | |
a13d4ebf | 4982 | |
b5b8b0ac | 4983 | alloc_hash_table (&set_hash_table, 1); |
df35c271 | 4984 | compute_hash_table (&set_hash_table); |
a13d4ebf | 4985 | |
df35c271 SB |
4986 | /* Free implicit_sets before peak usage. */ |
4987 | free (implicit_sets); | |
4988 | implicit_sets = NULL; | |
a13d4ebf | 4989 | |
df35c271 SB |
4990 | if (dump_file) |
4991 | dump_hash_table (dump_file, "SET", &set_hash_table); | |
4992 | if (set_hash_table.n_elems > 0) | |
a13d4ebf | 4993 | { |
df35c271 SB |
4994 | basic_block bb; |
4995 | rtx insn; | |
a13d4ebf | 4996 | |
df35c271 SB |
4997 | alloc_cprop_mem (last_basic_block, set_hash_table.n_elems); |
4998 | compute_cprop_data (); | |
589005ff | 4999 | |
df35c271 | 5000 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb) |
a13d4ebf | 5001 | { |
df35c271 SB |
5002 | /* Reset tables used to keep track of what's still valid [since |
5003 | the start of the block]. */ | |
5004 | reset_opr_set_tables (); | |
a13d4ebf | 5005 | |
df35c271 SB |
5006 | FOR_BB_INSNS (bb, insn) |
5007 | if (INSN_P (insn)) | |
5008 | { | |
5009 | changed |= cprop_insn (insn); | |
589005ff | 5010 | |
df35c271 SB |
5011 | /* Keep track of everything modified by this insn. */ |
5012 | /* ??? Need to be careful w.r.t. mods done to INSN. | |
5013 | Don't call mark_oprs_set if we turned the | |
5014 | insn into a NOTE. */ | |
5015 | if (! NOTE_P (insn)) | |
5016 | mark_oprs_set (insn); | |
5017 | } | |
a13d4ebf | 5018 | } |
589005ff | 5019 | |
df35c271 SB |
5020 | changed |= bypass_conditional_jumps (); |
5021 | free_cprop_mem (); | |
a13d4ebf AM |
5022 | } |
5023 | ||
df35c271 SB |
5024 | free_hash_table (&set_hash_table); |
5025 | free_gcse_mem (); | |
5026 | obstack_free (&gcse_obstack, NULL); | |
a13d4ebf | 5027 | |
df35c271 SB |
5028 | if (dump_file) |
5029 | { | |
5030 | fprintf (dump_file, "CPROP of %s, %d basic blocks, %d bytes needed, ", | |
5031 | current_function_name (), n_basic_blocks, bytes_used); | |
5032 | fprintf (dump_file, "%d local const props, %d local copy props, ", | |
5033 | local_const_prop_count, local_copy_prop_count); | |
5034 | fprintf (dump_file, "%d global const props, %d global copy props\n\n", | |
5035 | global_const_prop_count, global_copy_prop_count); | |
5036 | } | |
1d088dee | 5037 | |
df35c271 SB |
5038 | return changed; |
5039 | } | |
47a3dae1 | 5040 | |
df35c271 SB |
5041 | \f |
5042 | /* All the passes implemented in this file. Each pass has its | |
5043 | own gate and execute function, and at the end of the file a | |
5044 | pass definition for passes.c. | |
47a3dae1 | 5045 | |
df35c271 SB |
5046 | We do not construct an accurate cfg in functions which call |
5047 | setjmp, so none of these passes runs if the function calls | |
5048 | setjmp. | |
5049 | FIXME: Should just handle setjmp via REG_SETJMP notes. */ | |
a13d4ebf | 5050 | |
df35c271 SB |
5051 | static bool |
5052 | gate_rtl_cprop (void) | |
a13d4ebf | 5053 | { |
df35c271 SB |
5054 | return optimize > 0 && flag_gcse |
5055 | && !cfun->calls_setjmp | |
5056 | && dbg_cnt (cprop); | |
5057 | } | |
a13d4ebf | 5058 | |
df35c271 SB |
5059 | static unsigned int |
5060 | execute_rtl_cprop (void) | |
5061 | { | |
5062 | delete_unreachable_blocks (); | |
df35c271 SB |
5063 | df_set_flags (DF_LR_RUN_DCE); |
5064 | df_analyze (); | |
5065 | flag_rerun_cse_after_global_opts |= one_cprop_pass (); | |
5066 | return 0; | |
5067 | } | |
a13d4ebf | 5068 | |
df35c271 SB |
5069 | static bool |
5070 | gate_rtl_pre (void) | |
5071 | { | |
5072 | return optimize > 0 && flag_gcse | |
5073 | && !cfun->calls_setjmp | |
5074 | && optimize_function_for_speed_p (cfun) | |
5075 | && dbg_cnt (pre); | |
5076 | } | |
589005ff | 5077 | |
df35c271 SB |
5078 | static unsigned int |
5079 | execute_rtl_pre (void) | |
5080 | { | |
5081 | delete_unreachable_blocks (); | |
df35c271 SB |
5082 | df_analyze (); |
5083 | flag_rerun_cse_after_global_opts |= one_pre_gcse_pass (); | |
5084 | return 0; | |
5085 | } | |
aaa4ca30 | 5086 | |
df35c271 SB |
5087 | static bool |
5088 | gate_rtl_hoist (void) | |
5089 | { | |
5090 | return optimize > 0 && flag_gcse | |
5091 | && !cfun->calls_setjmp | |
5092 | /* It does not make sense to run code hoisting unless we are optimizing | |
5093 | for code size -- it rarely makes programs faster, and can make then | |
5094 | bigger if we did PRE (when optimizing for space, we don't run PRE). */ | |
5095 | && optimize_function_for_size_p (cfun) | |
5096 | && dbg_cnt (hoist); | |
5097 | } | |
aaa4ca30 | 5098 | |
df35c271 SB |
5099 | static unsigned int |
5100 | execute_rtl_hoist (void) | |
5101 | { | |
5102 | delete_unreachable_blocks (); | |
df35c271 SB |
5103 | df_analyze (); |
5104 | flag_rerun_cse_after_global_opts |= one_code_hoisting_pass (); | |
5105 | return 0; | |
5106 | } | |
ef330312 | 5107 | |
5f39ad47 | 5108 | struct rtl_opt_pass pass_rtl_cprop = |
ef330312 | 5109 | { |
8ddbbcae JH |
5110 | { |
5111 | RTL_PASS, | |
5f39ad47 | 5112 | "cprop", /* name */ |
b8698a0f L |
5113 | gate_rtl_cprop, /* gate */ |
5114 | execute_rtl_cprop, /* execute */ | |
ef330312 PB |
5115 | NULL, /* sub */ |
5116 | NULL, /* next */ | |
5117 | 0, /* static_pass_number */ | |
5f39ad47 | 5118 | TV_CPROP, /* tv_id */ |
9c9e26f5 | 5119 | PROP_cfglayout, /* properties_required */ |
ef330312 PB |
5120 | 0, /* properties_provided */ |
5121 | 0, /* properties_destroyed */ | |
5122 | 0, /* todo_flags_start */ | |
5f39ad47 | 5123 | TODO_df_finish | TODO_verify_rtl_sharing | |
ef330312 | 5124 | TODO_dump_func | |
5f39ad47 | 5125 | TODO_verify_flow | TODO_ggc_collect /* todo_flags_finish */ |
8ddbbcae | 5126 | } |
ef330312 PB |
5127 | }; |
5128 | ||
5f39ad47 | 5129 | struct rtl_opt_pass pass_rtl_pre = |
ef330312 | 5130 | { |
5f39ad47 SB |
5131 | { |
5132 | RTL_PASS, | |
e0a42b0f | 5133 | "rtl pre", /* name */ |
b8698a0f L |
5134 | gate_rtl_pre, /* gate */ |
5135 | execute_rtl_pre, /* execute */ | |
5f39ad47 SB |
5136 | NULL, /* sub */ |
5137 | NULL, /* next */ | |
5138 | 0, /* static_pass_number */ | |
5139 | TV_PRE, /* tv_id */ | |
5140 | PROP_cfglayout, /* properties_required */ | |
5141 | 0, /* properties_provided */ | |
5142 | 0, /* properties_destroyed */ | |
5143 | 0, /* todo_flags_start */ | |
5144 | TODO_df_finish | TODO_verify_rtl_sharing | | |
5145 | TODO_dump_func | | |
5146 | TODO_verify_flow | TODO_ggc_collect /* todo_flags_finish */ | |
5147 | } | |
5148 | }; | |
ef330312 | 5149 | |
5f39ad47 | 5150 | struct rtl_opt_pass pass_rtl_hoist = |
ef330312 | 5151 | { |
8ddbbcae JH |
5152 | { |
5153 | RTL_PASS, | |
5f39ad47 | 5154 | "hoist", /* name */ |
b8698a0f L |
5155 | gate_rtl_hoist, /* gate */ |
5156 | execute_rtl_hoist, /* execute */ | |
ef330312 PB |
5157 | NULL, /* sub */ |
5158 | NULL, /* next */ | |
5159 | 0, /* static_pass_number */ | |
5f39ad47 | 5160 | TV_HOIST, /* tv_id */ |
9c9e26f5 | 5161 | PROP_cfglayout, /* properties_required */ |
ef330312 PB |
5162 | 0, /* properties_provided */ |
5163 | 0, /* properties_destroyed */ | |
5164 | 0, /* todo_flags_start */ | |
a36b8a1e | 5165 | TODO_df_finish | TODO_verify_rtl_sharing | |
ef330312 | 5166 | TODO_dump_func | |
8ddbbcae JH |
5167 | TODO_verify_flow | TODO_ggc_collect /* todo_flags_finish */ |
5168 | } | |
ef330312 PB |
5169 | }; |
5170 | ||
e2500fed | 5171 | #include "gt-gcse.h" |