]>
Commit | Line | Data |
---|---|---|
4bc1997b | 1 | .\" Automatically generated by Pod::Man version 1.1 |
445c435a | 2 | .\" Wed Jan 24 19:43:11 2001 |
861bb6c1 | 3 | .\" |
4bc1997b JM |
4 | .\" Standard preamble: |
5 | .\" ====================================================================== | |
6 | .de Sh \" Subsection heading | |
7 | .br | |
8 | .if t .Sp | |
9 | .ne 5 | |
10 | .PP | |
11 | \fB\\$1\fR | |
12 | .PP | |
861bb6c1 | 13 | .. |
4bc1997b JM |
14 | .de Sp \" Vertical space (when we can't use .PP) |
15 | .if t .sp .5v | |
861bb6c1 | 16 | .if n .sp |
861bb6c1 | 17 | .. |
4bc1997b | 18 | .de Ip \" List item |
861bb6c1 | 19 | .br |
4bc1997b JM |
20 | .ie \\n(.$>=3 .ne \\$3 |
21 | .el .ne 3 | |
22 | .IP "\\$1" \\$2 | |
23 | .. | |
24 | .de Vb \" Begin verbatim text | |
25 | .ft CW | |
26 | .nf | |
27 | .ne \\$1 | |
28 | .. | |
29 | .de Ve \" End verbatim text | |
30 | .ft R | |
31 | ||
32 | .fi | |
33 | .. | |
34 | .\" Set up some character translations and predefined strings. \*(-- will | |
35 | .\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left | |
36 | .\" double quote, and \*(R" will give a right double quote. | will give a | |
37 | .\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used | |
38 | .\" to do unbreakable dashes and therefore won't be available. \*(C` and | |
39 | .\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> | |
40 | .tr \(*W-|\(bv\*(Tr | |
41 | .ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' | |
42 | .ie n \{\ | |
43 | . ds -- \(*W- | |
44 | . ds PI pi | |
45 | . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch | |
46 | . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch | |
47 | . ds L" "" | |
48 | . ds R" "" | |
49 | . ds C` "" | |
50 | . ds C' "" | |
51 | 'br\} | |
52 | .el\{\ | |
53 | . ds -- \|\(em\| | |
54 | . ds PI \(*p | |
55 | . ds L" `` | |
56 | . ds R" '' | |
57 | 'br\} | |
58 | .\" | |
59 | .\" If the F register is turned on, we'll generate index entries on stderr | |
60 | .\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and | |
61 | .\" index entries marked with X<> in POD. Of course, you'll have to process | |
62 | .\" the output yourself in some meaningful fashion. | |
63 | .if \nF \{\ | |
64 | . de IX | |
65 | . tm Index:\\$1\t\\n%\t"\\$2" | |
66 | .. | |
67 | . nr % 0 | |
68 | . rr F | |
69 | .\} | |
70 | .\" | |
71 | .\" For nroff, turn off justification. Always turn off hyphenation; it | |
72 | .\" makes way too many mistakes in technical documents. | |
73 | .hy 0 | |
74 | .if n .na | |
75 | .\" | |
76 | .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). | |
77 | .\" Fear. Run. Save yourself. No user-serviceable parts. | |
78 | .bd B 3 | |
79 | . \" fudge factors for nroff and troff | |
80 | .if n \{\ | |
81 | . ds #H 0 | |
82 | . ds #V .8m | |
83 | . ds #F .3m | |
84 | . ds #[ \f1 | |
85 | . ds #] \fP | |
86 | .\} | |
87 | .if t \{\ | |
88 | . ds #H ((1u-(\\\\n(.fu%2u))*.13m) | |
89 | . ds #V .6m | |
90 | . ds #F 0 | |
91 | . ds #[ \& | |
92 | . ds #] \& | |
93 | .\} | |
94 | . \" simple accents for nroff and troff | |
95 | .if n \{\ | |
96 | . ds ' \& | |
97 | . ds ` \& | |
98 | . ds ^ \& | |
99 | . ds , \& | |
100 | . ds ~ ~ | |
101 | . ds / | |
102 | .\} | |
103 | .if t \{\ | |
104 | . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" | |
105 | . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' | |
106 | . ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' | |
107 | . ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' | |
108 | . ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' | |
109 | . ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' | |
110 | .\} | |
111 | . \" troff and (daisy-wheel) nroff accents | |
112 | .ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' | |
113 | .ds 8 \h'\*(#H'\(*b\h'-\*(#H' | |
114 | .ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] | |
115 | .ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' | |
116 | .ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' | |
117 | .ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] | |
118 | .ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] | |
119 | .ds ae a\h'-(\w'a'u*4/10)'e | |
120 | .ds Ae A\h'-(\w'A'u*4/10)'E | |
121 | . \" corrections for vroff | |
122 | .if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' | |
123 | .if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' | |
124 | . \" for low resolution devices (crt and lpr) | |
125 | .if \n(.H>23 .if \n(.V>19 \ | |
126 | \{\ | |
127 | . ds : e | |
128 | . ds 8 ss | |
129 | . ds o a | |
130 | . ds d- d\h'-1'\(ga | |
131 | . ds D- D\h'-1'\(hy | |
132 | . ds th \o'bp' | |
133 | . ds Th \o'LP' | |
134 | . ds ae ae | |
135 | . ds Ae AE | |
136 | .\} | |
137 | .rm #[ #] #H #V #F C | |
138 | .\" ====================================================================== | |
139 | .\" | |
140 | .IX Title "GCC 1" | |
445c435a | 141 | .TH GCC 1 "gcc-2.97" "2001-01-24" "GNU" |
4bc1997b JM |
142 | .UC |
143 | .SH "NAME" | |
144 | gcc \- \s-1GNU\s0 project C and \*(C+ compiler | |
145 | .SH "SYNOPSIS" | |
146 | .IX Header "SYNOPSIS" | |
147 | gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR] | |
148 | [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR] | |
149 | [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR] | |
150 | [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...] | |
151 | [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR] | |
152 | [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...] | |
153 | [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR... | |
861bb6c1 | 154 | .PP |
4bc1997b JM |
155 | Only the most useful options are listed here; see below for the |
156 | remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR. | |
157 | .SH "DESCRIPTION" | |
158 | .IX Header "DESCRIPTION" | |
159 | When you invoke \s-1GCC\s0, it normally does preprocessing, compilation, | |
160 | assembly and linking. The ``overall options'' allow you to stop this | |
161 | process at an intermediate stage. For example, the \fB\-c\fR option | |
162 | says not to run the linker. Then the output consists of object files | |
163 | output by the assembler. | |
861bb6c1 | 164 | .PP |
4bc1997b JM |
165 | Other options are passed on to one stage of processing. Some options |
166 | control the preprocessor and others the compiler itself. Yet other | |
167 | options control the assembler and linker; most of these are not | |
168 | documented here, since you rarely need to use any of them. | |
861bb6c1 | 169 | .PP |
4bc1997b JM |
170 | Most of the command line options that you can use with \s-1GCC\s0 are useful |
171 | for C programs; when an option is only useful with another language | |
172 | (usually \*(C+), the explanation says so explicitly. If the description | |
173 | for a particular option does not mention a source language, you can use | |
174 | that option with all supported languages. | |
861bb6c1 | 175 | .PP |
4bc1997b JM |
176 | The \fBgcc\fR program accepts options and file names as operands. Many |
177 | options have multi-letter names; therefore multiple single-letter options | |
178 | may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR. | |
861bb6c1 | 179 | .PP |
4bc1997b JM |
180 | You can mix options and other arguments. For the most part, the order |
181 | you use doesn't matter. Order does matter when you use several options | |
182 | of the same kind; for example, if you specify \fB\-L\fR more than once, | |
183 | the directories are searched in the order specified. | |
861bb6c1 | 184 | .PP |
4bc1997b JM |
185 | Many options have long names starting with \fB\-f\fR or with |
186 | \&\fB\-W\fR\-\-\-for example, \fB\-fforce-mem\fR, | |
187 | \&\fB\-fstrength-reduce\fR, \fB\-Wformat\fR and so on. Most of | |
188 | these have both positive and negative forms; the negative form of | |
189 | \&\fB\-ffoo\fR would be \fB\-fno-foo\fR. This manual documents | |
190 | only one of these two forms, whichever one is not the default. | |
191 | .SH "OPTIONS" | |
192 | .IX Header "OPTIONS" | |
193 | .Sh "Option Summary" | |
194 | .IX Subsection "Option Summary" | |
861bb6c1 JL |
195 | Here is a summary of all the options, grouped by type. Explanations are |
196 | in the following sections. | |
4bc1997b JM |
197 | .Ip "\fIOverall Options\fR" 4 |
198 | .IX Item "Overall Options" | |
199 | \&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-pipe \-pass-exit-codes \-x\fR \fIlanguage\fR | |
200 | \&\fB\-v \-\-target-help \-\-help\fR | |
201 | .Ip "\fIC Language Options\fR" 4 | |
202 | .IX Item "C Language Options" | |
203 | \&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fno-asm \-fno-builtin | |
204 | \&\-fhosted \-ffreestanding | |
205 | \&\-trigraphs \-traditional \-traditional-cpp | |
206 | \&\-fallow-single-precision \-fcond-mismatch | |
207 | \&\-fsigned-bitfields \-fsigned-char | |
208 | \&\-funsigned-bitfields \-funsigned-char | |
209 | \&\-fwritable-strings \-fshort-wchar\fR | |
210 | .Ip "\fI\*(C+ Language Options\fR" 4 | |
211 | .IX Item " Language Options" | |
212 | \&\fB\-fno-access-control \-fcheck-new \-fconserve-space | |
213 | \&\-fdollars-in-identifiers \-fno-elide-constructors | |
214 | \&\-fno-enforce-eh-specs \-fexternal-templates | |
215 | \&\-falt-external-templates | |
216 | \&\-ffor-scope \-fno-for-scope \-fno-gnu-keywords \-fhonor-std | |
217 | \&\-fhuge-objects \-fno-implicit-templates | |
218 | \&\-fno-implicit-inline-templates | |
219 | \&\-fno-implement-inlines \-fms-extensions | |
220 | \&\-fname-mangling-version-\fR\fIn\fR \fB\-fno-operator-names | |
221 | \&\-fno-optional-diags \-fpermissive | |
222 | \&\-frepo \-fno-rtti \-fsquangle \-ftemplate-depth-\fR\fIn\fR | |
223 | \&\fB\-fuse-cxa-atexit \-fvtable-thunks \-nostdinc++ | |
224 | \&\-fno-default-inline \-Wctor-dtor-privacy | |
225 | \&\-Wnon-virtual-dtor \-Wreorder | |
226 | \&\-Weffc++ \-Wno-deprecated | |
227 | \&\-Wno-non-template-friend \-Wold-style-cast | |
228 | \&\-Woverloaded-virtual \-Wno-pmf-conversions | |
229 | \&\-Wsign-promo \-Wsynth\fR | |
230 | .Ip "\fILanguage Independent Options\fR" 4 | |
231 | .IX Item "Language Independent Options" | |
232 | \&\fB\-fmessage-length=\fR\fIn\fR | |
233 | \&\fB\-fdiagnostics-show-location=\fR[\fBonce\fR|\fBevery-line\fR] | |
234 | .Ip "\fIWarning Options\fR" 4 | |
235 | .IX Item "Warning Options" | |
236 | \&\fB\-fsyntax-only \-pedantic \-pedantic-errors | |
237 | \&\-w \-W \-Wall \-Waggregate-return | |
238 | \&\-Wcast-align \-Wcast-qual \-Wchar-subscripts \-Wcomment | |
239 | \&\-Wconversion \-Wdisabled-optimization \-Werror | |
240 | \&\-Wfloat-equal \-Wformat \-Wformat=2 | |
241 | \&\-Wformat-nonliteral \-Wformat-security | |
242 | \&\-Wid-clash-\fR\fIlen\fR \fB\-Wimplicit \-Wimplicit-int | |
243 | \&\-Wimplicit-function-declaration | |
244 | \&\-Werror-implicit-function-declaration | |
245 | \&\-Wimport \-Winline | |
246 | \&\-Wlarger-than-\fR\fIlen\fR \fB\-Wlong-long | |
247 | \&\-Wmain \-Wmissing-declarations | |
248 | \&\-Wmissing-format-attribute \-Wmissing-noreturn | |
249 | \&\-Wmultichar \-Wno-format-extra-args \-Wno-format-y2k | |
250 | \&\-Wno-import \-Wpacked \-Wpadded | |
251 | \&\-Wparentheses \-Wpointer-arith \-Wredundant-decls | |
252 | \&\-Wreturn-type \-Wsequence-point \-Wshadow | |
253 | \&\-Wsign-compare \-Wswitch \-Wsystem-headers | |
254 | \&\-Wtrigraphs \-Wundef \-Wuninitialized | |
255 | \&\-Wunknown-pragmas \-Wunreachable-code | |
256 | \&\-Wunused \-Wunused-function \-Wunused-label \-Wunused-parameter | |
257 | \&\-Wunused-value \-Wunused-variable \-Wwrite-strings\fR | |
258 | .Ip "\fIC-only Warning Options\fR" 4 | |
259 | .IX Item "C-only Warning Options" | |
260 | \&\fB\-Wbad-function-cast \-Wmissing-prototypes \-Wnested-externs | |
261 | \&\-Wstrict-prototypes \-Wtraditional\fR | |
262 | .Ip "\fIDebugging Options\fR" 4 | |
263 | .IX Item "Debugging Options" | |
264 | \&\fB\-a \-ax \-d\fR\fIletters\fR \fB\-fdump-unnumbered \-fdump-translation-unit-\fR\fIfile\fR | |
265 | \&\fB\-fpretend-float \-fprofile-arcs \-ftest-coverage | |
266 | \&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf \-gdwarf-1 \-gdwarf-1+ \-gdwarf-2 | |
267 | \&\-ggdb \-gstabs \-gstabs+ \-gxcoff \-gxcoff+ | |
268 | \&\-p \-pg \-print-file-name=\fR\fIlibrary\fR \fB\-print-libgcc-file-name | |
269 | \&\-print-prog-name=\fR\fIprogram\fR \fB\-print-search-dirs \-Q | |
270 | \&\-save-temps \-time\fR | |
271 | .Ip "\fIOptimization Options\fR" 4 | |
272 | .IX Item "Optimization Options" | |
273 | \&\fB\-falign-functions=\fR\fIn\fR \fB\-falign-jumps=\fR\fIn\fR | |
274 | \&\fB\-falign-labels=\fR\fIn\fR \fB\-falign-loops=\fR\fIn\fR | |
275 | \&\fB\-fbranch-probabilities \-fcaller-saves | |
276 | \&\-fcse-follow-jumps \-fcse-skip-blocks \-fdata-sections \-fdce | |
277 | \&\-fdelayed-branch \-fdelete-null-pointer-checks | |
278 | \&\-fexpensive-optimizations \-ffast-math \-ffloat-store | |
279 | \&\-fforce-addr \-fforce-mem \-ffunction-sections \-fgcse | |
280 | \&\-finline-functions \-finline-limit=\fR\fIn\fR \fB\-fkeep-inline-functions | |
281 | \&\-fkeep-static-consts \-fmove-all-movables | |
282 | \&\-fno-default-inline \-fno-defer-pop | |
445c435a JM |
283 | \&\-fno-function-cse \-fno-guess-branch-probability |
284 | \&\-fno-inline \-fno-math-errno \-fno-peephole | |
4bc1997b JM |
285 | \&\-fomit-frame-pointer \-foptimize-register-move |
286 | \&\-foptimize-sibling-calls \-freduce-all-givs | |
287 | \&\-fregmove \-frename-registers | |
288 | \&\-frerun-cse-after-loop \-frerun-loop-opt | |
289 | \&\-fschedule-insns \-fschedule-insns2 | |
290 | \&\-fsingle-precision-constant \-fssa | |
291 | \&\-fstrength-reduce \-fstrict-aliasing \-fthread-jumps \-ftrapv | |
292 | \&\-funroll-all-loops \-funroll-loops | |
293 | \&\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR | |
294 | .Ip "\fIPreprocessor Options\fR" 4 | |
295 | .IX Item "Preprocessor Options" | |
296 | \&\fB\-$ \-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR \fB\-A-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] | |
297 | \&\fB\-C \-dD \-dI \-dM \-dN | |
298 | \&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H | |
299 | \&\-idirafter\fR \fIdir\fR | |
300 | \&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR | |
301 | \&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR | |
302 | \&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR \fB\-isystem-c++\fR \fIdir\fR | |
303 | \&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc \-P \-remap | |
304 | \&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR | |
305 | .Ip "\fIAssembler Option\fR" 4 | |
306 | .IX Item "Assembler Option" | |
307 | \&\fB\-Wa,\fR\fIoption\fR | |
308 | .Ip "\fILinker Options\fR" 4 | |
309 | .IX Item "Linker Options" | |
310 | \&\fB | |
311 | \&\fR\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR | |
312 | \&\fB\-nostartfiles \-nodefaultlibs \-nostdlib | |
313 | \&\-s \-static \-static-libgcc \-shared \-shared-libgcc \-symbolic | |
314 | \&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR | |
315 | \&\fB\-u\fR \fIsymbol\fR | |
316 | .Ip "\fIDirectory Options\fR" 4 | |
317 | .IX Item "Directory Options" | |
318 | \&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-I- \-L\fR\fIdir\fR \fB\-specs=\fR\fIfile\fR | |
319 | .Ip "\fITarget Options\fR" 4 | |
320 | .IX Item "Target Options" | |
321 | \&\fB\-b\fR \fImachine\fR \fB\-V\fR \fIversion\fR | |
322 | .Ip "\fIMachine Dependent Options\fR" 4 | |
323 | .IX Item "Machine Dependent Options" | |
324 | \&\fIM680x0 Options\fR | |
325 | .Sp | |
326 | \&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040 | |
327 | \&\-m68060 \-mcpu32 \-m5200 \-m68881 \-mbitfield \-mc68000 \-mc68020 | |
328 | \&\-mfpa \-mnobitfield \-mrtd \-mshort \-msoft-float \-mpcrel | |
329 | \&\-malign-int \-mstrict-align\fR | |
330 | .Sp | |
331 | \&\fIM68hc1x Options\fR | |
332 | .Sp | |
333 | \&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 | |
334 | \&\-mauto-incdec \-mshort \-msoft-reg-count=\fR\fIcount\fR | |
335 | .Sp | |
336 | \&\fI\s-1VAX\s0 Options\fR | |
337 | .Sp | |
338 | \&\fB\-mg \-mgnu \-munix\fR | |
339 | .Sp | |
340 | \&\fI\s-1SPARC\s0 Options\fR | |
341 | .Sp | |
342 | \&\fB\-mcpu=\fR\fIcpu type\fR | |
343 | \&\fB\-mtune=\fR\fIcpu type\fR | |
344 | \&\fB\-mcmodel=\fR\fIcode model\fR | |
345 | \&\fB\-m32 \-m64 | |
346 | \&\-mapp-regs \-mbroken-saverestore \-mcypress | |
347 | \&\-mepilogue \-mfaster-structs \-mflat | |
348 | \&\-mfpu \-mhard-float \-mhard-quad-float | |
349 | \&\-mimpure-text \-mlive-g0 \-mno-app-regs | |
350 | \&\-mno-epilogue \-mno-faster-structs \-mno-flat \-mno-fpu | |
351 | \&\-mno-impure-text \-mno-stack-bias \-mno-unaligned-doubles | |
352 | \&\-msoft-float \-msoft-quad-float \-msparclite \-mstack-bias | |
353 | \&\-msupersparc \-munaligned-doubles \-mv8\fR | |
354 | .Sp | |
355 | \&\fIConvex Options\fR | |
356 | .Sp | |
357 | \&\fB\-mc1 \-mc2 \-mc32 \-mc34 \-mc38 | |
358 | \&\-margcount \-mnoargcount | |
359 | \&\-mlong32 \-mlong64 | |
360 | \&\-mvolatile-cache \-mvolatile-nocache\fR | |
361 | .Sp | |
362 | \&\fI\s-1AMD29K\s0 Options\fR | |
363 | .Sp | |
364 | \&\fB\-m29000 \-m29050 \-mbw \-mnbw \-mdw \-mndw | |
365 | \&\-mlarge \-mnormal \-msmall | |
366 | \&\-mkernel-registers \-mno-reuse-arg-regs | |
367 | \&\-mno-stack-check \-mno-storem-bug | |
368 | \&\-mreuse-arg-regs \-msoft-float \-mstack-check | |
369 | \&\-mstorem-bug \-muser-registers\fR | |
370 | .Sp | |
371 | \&\fI\s-1ARM\s0 Options\fR | |
372 | .Sp | |
373 | \&\fB\-mapcs-frame \-mno-apcs-frame | |
374 | \&\-mapcs-26 \-mapcs-32 | |
375 | \&\-mapcs-stack-check \-mno-apcs-stack-check | |
376 | \&\-mapcs-float \-mno-apcs-float | |
377 | \&\-mapcs-reentrant \-mno-apcs-reentrant | |
378 | \&\-msched-prolog \-mno-sched-prolog | |
379 | \&\-mlittle-endian \-mbig-endian \-mwords-little-endian | |
380 | \&\-malignment-traps \-mno-alignment-traps | |
381 | \&\-msoft-float \-mhard-float \-mfpe | |
382 | \&\-mthumb-interwork \-mno-thumb-interwork | |
383 | \&\-mcpu= \-march= \-mfpe= | |
384 | \&\-mstructure-size-boundary= | |
385 | \&\-mbsd \-mxopen \-mno-symrename | |
386 | \&\-mabort-on-noreturn | |
387 | \&\-mlong-calls \-mno-long-calls | |
388 | \&\-mnop-fun-dllimport \-mno-nop-fun-dllimport | |
389 | \&\-msingle-pic-base \-mno-single-pic-base | |
390 | \&\-mpic-register=\fR | |
391 | .Sp | |
392 | \&\fIThumb Options\fR | |
393 | .Sp | |
394 | \&\fB\-mtpcs-frame \-mno-tpcs-frame | |
395 | \&\-mtpcs-leaf-frame \-mno-tpcs-leaf-frame | |
396 | \&\-mlittle-endian \-mbig-endian | |
397 | \&\-mthumb-interwork \-mno-thumb-interwork | |
398 | \&\-mstructure-size-boundary= | |
399 | \&\-mnop-fun-dllimport \-mno-nop-fun-dllimport | |
400 | \&\-mcallee-super-interworking \-mno-callee-super-interworking | |
401 | \&\-mcaller-super-interworking \-mno-caller-super-interworking | |
402 | \&\-msingle-pic-base \-mno-single-pic-base | |
403 | \&\-mpic-register=\fR | |
404 | .Sp | |
405 | \&\fI\s-1MN10200\s0 Options\fR | |
406 | .Sp | |
407 | \&\fB\-mrelax\fR | |
408 | .Sp | |
409 | \&\fI\s-1MN10300\s0 Options\fR | |
410 | .Sp | |
411 | \&\fB\-mmult-bug | |
412 | \&\-mno-mult-bug | |
413 | \&\-mam33 | |
414 | \&\-mno-am33 | |
415 | \&\-mrelax\fR | |
416 | .Sp | |
417 | \&\fIM32R/D Options\fR | |
418 | .Sp | |
419 | \&\fB\-mcode-model=\fR\fImodel type\fR \fB\-msdata=\fR\fIsdata type\fR | |
420 | \&\fB\-G\fR \fInum\fR | |
421 | .Sp | |
422 | \&\fIM88K Options\fR | |
423 | .Sp | |
424 | \&\fB\-m88000 \-m88100 \-m88110 \-mbig-pic | |
425 | \&\-mcheck-zero-division \-mhandle-large-shift | |
426 | \&\-midentify-revision \-mno-check-zero-division | |
427 | \&\-mno-ocs-debug-info \-mno-ocs-frame-position | |
428 | \&\-mno-optimize-arg-area \-mno-serialize-volatile | |
429 | \&\-mno-underscores \-mocs-debug-info | |
430 | \&\-mocs-frame-position \-moptimize-arg-area | |
431 | \&\-mserialize-volatile \-mshort-data-\fR\fInum\fR \fB\-msvr3 | |
432 | \&\-msvr4 \-mtrap-large-shift \-muse-div-instruction | |
433 | \&\-mversion-03.00 \-mwarn-passed-structs\fR | |
434 | .Sp | |
435 | \&\fI\s-1RS/6000\s0 and PowerPC Options\fR | |
436 | .Sp | |
437 | \&\fB\-mcpu=\fR\fIcpu type\fR | |
438 | \&\fB\-mtune=\fR\fIcpu type\fR | |
439 | \&\fB\-mpower \-mno-power \-mpower2 \-mno-power2 | |
440 | \&\-mpowerpc \-mpowerpc64 \-mno-powerpc | |
441 | \&\-mpowerpc-gpopt \-mno-powerpc-gpopt | |
442 | \&\-mpowerpc-gfxopt \-mno-powerpc-gfxopt | |
443 | \&\-mnew-mnemonics \-mold-mnemonics | |
444 | \&\-mfull-toc \-mminimal-toc \-mno-fop-in-toc \-mno-sum-in-toc | |
445 | \&\-m64 \-m32 \-mxl-call \-mno-xl-call \-mthreads \-mpe | |
446 | \&\-msoft-float \-mhard-float \-mmultiple \-mno-multiple | |
447 | \&\-mstring \-mno-string \-mupdate \-mno-update | |
448 | \&\-mfused-madd \-mno-fused-madd \-mbit-align \-mno-bit-align | |
449 | \&\-mstrict-align \-mno-strict-align \-mrelocatable | |
450 | \&\-mno-relocatable \-mrelocatable-lib \-mno-relocatable-lib | |
451 | \&\-mtoc \-mno-toc \-mlittle \-mlittle-endian \-mbig \-mbig-endian | |
452 | \&\-mcall-aix \-mcall-sysv \-mprototype \-mno-prototype | |
453 | \&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata | |
454 | \&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR | |
455 | .Sp | |
456 | \&\fI\s-1RT\s0 Options\fR | |
457 | .Sp | |
458 | \&\fB\-mcall-lib-mul \-mfp-arg-in-fpregs \-mfp-arg-in-gregs | |
459 | \&\-mfull-fp-blocks \-mhc-struct-return \-min-line-mul | |
460 | \&\-mminimum-fp-blocks \-mnohc-struct-return\fR | |
461 | .Sp | |
462 | \&\fI\s-1MIPS\s0 Options\fR | |
463 | .Sp | |
464 | \&\fB\-mabicalls \-mcpu=\fR\fIcpu type\fR | |
465 | \&\fB\-membedded-data \-muninit-const-in-rodata | |
466 | \&\-membedded-pic \-mfp32 \-mfp64 \-mgas \-mgp32 \-mgp64 | |
467 | \&\-mgpopt \-mhalf-pic \-mhard-float \-mint64 \-mips1 | |
468 | \&\-mips2 \-mips3 \-mips4 \-mlong64 \-mlong32 \-mlong-calls \-mmemcpy | |
469 | \&\-mmips-as \-mmips-tfile \-mno-abicalls | |
470 | \&\-mno-embedded-data \-mno-uninit-const-in-rodata \-mno-embedded-pic | |
471 | \&\-mno-gpopt \-mno-long-calls | |
472 | \&\-mno-memcpy \-mno-mips-tfile \-mno-rnames \-mno-stats | |
473 | \&\-mrnames \-msoft-float | |
474 | \&\-m4650 \-msingle-float \-mmad | |
475 | \&\-mstats \-EL \-EB \-G\fR \fInum\fR \fB\-nocpp | |
476 | \&\-mabi=32 \-mabi=n32 \-mabi=64 \-mabi=eabi | |
477 | \&\-mfix7000 \-mno-crt0\fR | |
478 | .Sp | |
479 | \&\fIi386 Options\fR | |
480 | .Sp | |
481 | \&\fB\-mcpu=\fR\fIcpu type\fR \fB\-march=\fR\fIcpu type\fR | |
482 | \&\fB\-mintel-syntax \-mieee-fp \-mno-fancy-math-387 | |
483 | \&\-mno-fp-ret-in-387 \-msoft-float \-msvr3\-shlib | |
484 | \&\-mno-wide-multiply \-mrtd \-malign-double | |
485 | \&\-mreg-alloc=\fR\fIlist\fR \fB\-mregparm=\fR\fInum\fR | |
486 | \&\fB\-malign-jumps=\fR\fInum\fR \fB\-malign-loops=\fR\fInum\fR | |
487 | \&\fB\-malign-functions=\fR\fInum\fR \fB\-mpreferred-stack-boundary=\fR\fInum\fR | |
488 | \&\fB\-mthreads \-mno-align-stringops \-minline-all-stringops | |
489 | \&\-mpush-args \-maccumulate-outgoing-args \-m128bit-long-double | |
490 | \&\-m96bit-long-double\fR | |
491 | .Sp | |
492 | \&\fI\s-1HPPA\s0 Options\fR | |
493 | .Sp | |
494 | \&\fB\-march=\fR\fIarchitecture type\fR | |
495 | \&\fB\-mbig-switch \-mdisable-fpregs \-mdisable-indexing | |
496 | \&\-mfast-indirect-calls \-mgas \-mjump-in-delay | |
497 | \&\-mlong-load-store \-mno-big-switch \-mno-disable-fpregs | |
498 | \&\-mno-disable-indexing \-mno-fast-indirect-calls \-mno-gas | |
499 | \&\-mno-jump-in-delay \-mno-long-load-store | |
500 | \&\-mno-portable-runtime \-mno-soft-float | |
501 | \&\-mno-space-regs \-msoft-float \-mpa-risc-1\-0 | |
502 | \&\-mpa-risc-1\-1 \-mpa-risc-2\-0 \-mportable-runtime | |
503 | \&\-mschedule=\fR\fIcpu type\fR \fB\-mspace-regs\fR | |
504 | .Sp | |
505 | \&\fIIntel 960 Options\fR | |
506 | .Sp | |
507 | \&\fB\-m\fR\fIcpu type\fR \fB\-masm-compat \-mclean-linkage | |
508 | \&\-mcode-align \-mcomplex-addr \-mleaf-procedures | |
509 | \&\-mic-compat \-mic2.0\-compat \-mic3.0\-compat | |
510 | \&\-mintel-asm \-mno-clean-linkage \-mno-code-align | |
511 | \&\-mno-complex-addr \-mno-leaf-procedures | |
512 | \&\-mno-old-align \-mno-strict-align \-mno-tail-call | |
513 | \&\-mnumerics \-mold-align \-msoft-float \-mstrict-align | |
514 | \&\-mtail-call\fR | |
515 | .Sp | |
516 | \&\fI\s-1DEC\s0 Alpha Options\fR | |
517 | .Sp | |
518 | \&\fB\-mfp-regs \-mno-fp-regs \-mno-soft-float \-msoft-float | |
519 | \&\-malpha-as \-mgas | |
520 | \&\-mieee \-mieee-with-inexact \-mieee-conformant | |
521 | \&\-mfp-trap-mode=\fR\fImode\fR \fB\-mfp-rounding-mode=\fR\fImode\fR | |
522 | \&\fB\-mtrap-precision=\fR\fImode\fR \fB\-mbuild-constants | |
523 | \&\-mcpu=\fR\fIcpu type\fR | |
524 | \&\fB\-mbwx \-mno-bwx \-mcix \-mno-cix \-mmax \-mno-max | |
525 | \&\-mmemory-latency=\fR\fItime\fR | |
526 | .Sp | |
527 | \&\fIClipper Options\fR | |
528 | .Sp | |
529 | \&\fB\-mc300 \-mc400\fR | |
530 | .Sp | |
531 | \&\fIH8/300 Options\fR | |
532 | .Sp | |
533 | \&\fB\-mrelax \-mh \-ms \-mint32 \-malign-300\fR | |
534 | .Sp | |
535 | \&\fI\s-1SH\s0 Options\fR | |
536 | .Sp | |
537 | \&\fB\-m1 \-m2 \-m3 \-m3e | |
538 | \&\-m4\-nofpu \-m4\-single-only \-m4\-single \-m4 | |
539 | \&\-mb \-ml \-mdalign \-mrelax | |
540 | \&\-mbigtable \-mfmovd \-mhitachi \-mnomacsave | |
541 | \&\-misize \-mpadstruct \-mspace | |
542 | \&\-mprefergot | |
543 | \&\-musermode\fR | |
544 | .Sp | |
545 | \&\fISystem V Options\fR | |
546 | .Sp | |
547 | \&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR | |
548 | .Sp | |
549 | \&\fI\s-1ARC\s0 Options\fR | |
550 | .Sp | |
551 | \&\fB\-EB \-EL | |
552 | \&\-mmangle-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext section\fR | |
553 | \&\fB\-mdata=\fR\fIdata section\fR \fB\-mrodata=\fR\fIreadonly data section\fR | |
554 | .Sp | |
555 | \&\fITMS320C3x/C4x Options\fR | |
556 | .Sp | |
557 | \&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm | |
558 | \&\-mfast-fix \-mmpyi \-mbk \-mti \-mdp-isr-reload | |
559 | \&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop-unsigned | |
560 | \&\-mparallel-insns \-mparallel-mpy \-mpreserve-float\fR | |
561 | .Sp | |
562 | \&\fIV850 Options\fR | |
563 | .Sp | |
564 | \&\fB\-mlong-calls \-mno-long-calls \-mep \-mno-ep | |
565 | \&\-mprolog-function \-mno-prolog-function \-mspace | |
566 | \&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR | |
567 | \&\fB\-mv850 \-mbig-switch\fR | |
568 | .Sp | |
569 | \&\fI\s-1NS32K\s0 Options\fR | |
570 | .Sp | |
571 | \&\fB\-m32032 \-m32332 \-m32532 \-m32081 \-m32381 \-mmult-add \-mnomult-add | |
572 | \&\-msoft-float \-mrtd \-mnortd \-mregparam \-mnoregparam \-msb \-mnosb | |
573 | \&\-mbitfield \-mnobitfield \-mhimem \-mnohimem\fR | |
574 | .Sp | |
575 | \&\fI\s-1AVR\s0 Options\fR | |
576 | .Sp | |
577 | \&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit-stack=\fR\fIn\fR \fB\-mno-interrupts | |
578 | \&\-mcall-prologues \-mno-tablejump \-mtiny-stack\fR | |
579 | .Sp | |
580 | \&\fIMCore Options\fR | |
581 | .Sp | |
445c435a | 582 | \&\fB\-mhardlit \-mno-hardlit \-mdiv \-mno-div \-mrelax-immediates |
4bc1997b JM |
583 | \&\-mno-relax-immediates \-mwide-bitfields \-mno-wide-bitfields |
584 | \&\-m4byte-functions \-mno-4byte-functions \-mcallgraph-data | |
585 | \&\-mno-callgraph-data \-mslow-bytes \-mno-slow-bytes \-mno-lsim | |
586 | \&\-mlittle-endian \-mbig-endian \-m210 \-m340 \-mstack-increment\fR | |
445c435a JM |
587 | .Sp |
588 | \&\fI\s-1IA-64\s0 Options\fR | |
589 | .Sp | |
590 | \&\fB\-mbig-endian \-mlittle-endian \-mgnu-as \-mgnu-ld \-mno-pic | |
591 | \&\-mvolatile-asm-stop \-mb-step \-mregister-names \-mno-sdata | |
592 | \&\-mconstant-gp \-mauto-pic \-minline-divide-min-latency | |
593 | \&\-minline-divide-max-throughput \-mno-dwarf2\-asm | |
594 | \&\-mfixed-range=\fR\fIregister range\fR | |
4bc1997b JM |
595 | .Ip "\fICode Generation Options\fR" 4 |
596 | .IX Item "Code Generation Options" | |
597 | \&\fB\-fcall-saved-\fR\fIreg\fR \fB\-fcall-used-\fR\fIreg\fR | |
598 | \&\fB\-fexceptions \-funwind-tables \-ffixed-\fR\fIreg\fR | |
599 | \&\fB\-finhibit-size-directive \-finstrument-functions | |
600 | \&\-fcheck-memory-usage \-fprefix-function-name | |
601 | \&\-fno-common \-fno-ident \-fno-gnu-linker | |
602 | \&\-fpcc-struct-return \-fpic \-fPIC | |
603 | \&\-freg-struct-return \-fshared-data \-fshort-enums | |
604 | \&\-fshort-double \-fvolatile \-fvolatile-global \-fvolatile-static | |
605 | \&\-fverbose-asm \-fpack-struct \-fstack-check | |
606 | \&\-fstack-limit-register=\fR\fIreg\fR \fB\-fstack-limit-symbol=\fR\fIsym\fR | |
607 | \&\fB\-fargument-alias \-fargument-noalias | |
608 | \&\-fargument-noalias-global | |
609 | \&\-fleading-underscore\fR | |
610 | .Sh "Options Controlling the Kind of Output" | |
611 | .IX Subsection "Options Controlling the Kind of Output" | |
612 | Compilation can involve up to four stages: preprocessing, compilation | |
613 | proper, assembly and linking, always in that order. The first three | |
614 | stages apply to an individual source file, and end by producing an | |
615 | object file; linking combines all the object files (those newly | |
616 | compiled, and those specified as input) into an executable file. | |
617 | .PP | |
618 | For any given input file, the file name suffix determines what kind of | |
619 | compilation is done: | |
620 | .Ip "\fIfile\fR\fB.c\fR" 4 | |
621 | .IX Item "file.c" | |
622 | C source code which must be preprocessed. | |
623 | .Ip "\fIfile\fR\fB.i\fR" 4 | |
624 | .IX Item "file.i" | |
625 | C source code which should not be preprocessed. | |
626 | .Ip "\fIfile\fR\fB.ii\fR" 4 | |
627 | .IX Item "file.ii" | |
628 | \&\*(C+ source code which should not be preprocessed. | |
629 | .Ip "\fIfile\fR\fB.m\fR" 4 | |
630 | .IX Item "file.m" | |
631 | Objective-C source code. Note that you must link with the library | |
632 | \&\fIlibobjc.a\fR to make an Objective-C program work. | |
633 | .Ip "\fIfile\fR\fB.mi\fR" 4 | |
634 | .IX Item "file.mi" | |
635 | Objective-C source code which should not be preprocessed. | |
636 | .Ip "\fIfile\fR\fB.h\fR" 4 | |
637 | .IX Item "file.h" | |
638 | C header file (not to be compiled or linked). | |
639 | .Ip "\fIfile\fR\fB.cc\fR" 4 | |
640 | .IX Item "file.cc" | |
641 | .PD 0 | |
642 | .Ip "\fIfile\fR\fB.cp\fR" 4 | |
643 | .IX Item "file.cp" | |
644 | .Ip "\fIfile\fR\fB.cxx\fR" 4 | |
645 | .IX Item "file.cxx" | |
646 | .Ip "\fIfile\fR\fB.cpp\fR" 4 | |
647 | .IX Item "file.cpp" | |
648 | .Ip "\fIfile\fR\fB.c++\fR" 4 | |
649 | .IX Item "file.c++" | |
650 | .Ip "\fIfile\fR\fB.C\fR" 4 | |
651 | .IX Item "file.C" | |
652 | .PD | |
653 | \&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR, | |
654 | the last two letters must both be literally \fBx\fR. Likewise, | |
655 | \&\fB.C\fR refers to a literal capital C. | |
656 | .Ip "\fIfile\fR\fB.f\fR" 4 | |
657 | .IX Item "file.f" | |
658 | .PD 0 | |
659 | .Ip "\fIfile\fR\fB.for\fR" 4 | |
660 | .IX Item "file.for" | |
661 | .Ip "\fIfile\fR\fB.FOR\fR" 4 | |
662 | .IX Item "file.FOR" | |
663 | .PD | |
664 | Fortran source code which should not be preprocessed. | |
665 | .Ip "\fIfile\fR\fB.F\fR" 4 | |
666 | .IX Item "file.F" | |
667 | .PD 0 | |
668 | .Ip "\fIfile\fR\fB.fpp\fR" 4 | |
669 | .IX Item "file.fpp" | |
670 | .Ip "\fIfile\fR\fB.FPP\fR" 4 | |
671 | .IX Item "file.FPP" | |
672 | .PD | |
673 | Fortran source code which must be preprocessed (with the traditional | |
674 | preprocessor). | |
675 | .Ip "\fIfile\fR\fB.r\fR" 4 | |
676 | .IX Item "file.r" | |
677 | Fortran source code which must be preprocessed with a \s-1RATFOR\s0 | |
678 | preprocessor (not included with \s-1GCC\s0). | |
679 | .Ip "\fIfile\fR\fB.ch\fR" 4 | |
680 | .IX Item "file.ch" | |
681 | .PD 0 | |
682 | .Ip "\fIfile\fR\fB.chi\fR" 4 | |
683 | .IX Item "file.chi" | |
684 | .PD | |
685 | \&\s-1CHILL\s0 source code (preprocessed with the traditional preprocessor). | |
686 | .Ip "\fIfile\fR\fB.s\fR" 4 | |
687 | .IX Item "file.s" | |
688 | Assembler code. | |
689 | .Ip "\fIfile\fR\fB.S\fR" 4 | |
690 | .IX Item "file.S" | |
691 | Assembler code which must be preprocessed. | |
692 | .Ip "\fIother\fR" 4 | |
693 | .IX Item "other" | |
694 | An object file to be fed straight into linking. | |
695 | Any file name with no recognized suffix is treated this way. | |
696 | .PP | |
697 | You can specify the input language explicitly with the \fB\-x\fR option: | |
698 | .Ip "\fB\-x\fR \fIlanguage\fR" 4 | |
699 | .IX Item "-x language" | |
700 | Specify explicitly the \fIlanguage\fR for the following input files | |
701 | (rather than letting the compiler choose a default based on the file | |
702 | name suffix). This option applies to all following input files until | |
703 | the next \fB\-x\fR option. Possible values for \fIlanguage\fR are: | |
704 | .Sp | |
705 | .Vb 6 | |
706 | \& c c-header cpp-output | |
707 | \& c++ c++-cpp-output | |
708 | \& objective-c objc-cpp-output | |
709 | \& assembler assembler-with-cpp | |
710 | \& f77 f77-cpp-input ratfor | |
711 | \& java chill | |
712 | .Ve | |
713 | .Ip "\fB\-x none\fR" 4 | |
714 | .IX Item "-x none" | |
861bb6c1 | 715 | Turn off any specification of a language, so that subsequent files are |
4bc1997b | 716 | handled according to their file name suffixes (as they are if \fB\-x\fR |
861bb6c1 | 717 | has not been used at all). |
4bc1997b JM |
718 | .Ip "\fB\-pass-exit-codes\fR" 4 |
719 | .IX Item "-pass-exit-codes" | |
720 | Normally the \fBgcc\fR program will exit with the code of 1 if any | |
721 | phase of the compiler returns a non-success return code. If you specify | |
722 | \&\fB\-pass-exit-codes\fR, the \fBgcc\fR program will instead return with | |
723 | numerically highest error produced by any phase that returned an error | |
724 | indication. | |
861bb6c1 | 725 | .PP |
4bc1997b JM |
726 | If you only want some of the stages of compilation, you can use |
727 | \&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and | |
728 | one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where | |
729 | \&\fBgcc\fR is to stop. Note that some combinations (for example, | |
730 | \&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all. | |
731 | .Ip "\fB\-c\fR" 4 | |
732 | .IX Item "-c" | |
733 | Compile or assemble the source files, but do not link. The linking | |
734 | stage simply is not done. The ultimate output is in the form of an | |
735 | object file for each source file. | |
736 | .Sp | |
737 | By default, the object file name for a source file is made by replacing | |
738 | the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR. | |
739 | .Sp | |
740 | Unrecognized input files, not requiring compilation or assembly, are | |
741 | ignored. | |
742 | .Ip "\fB\-S\fR" 4 | |
743 | .IX Item "-S" | |
861bb6c1 | 744 | Stop after the stage of compilation proper; do not assemble. The output |
4bc1997b | 745 | is in the form of an assembler code file for each non-assembler input |
861bb6c1 JL |
746 | file specified. |
747 | .Sp | |
4bc1997b JM |
748 | By default, the assembler file name for a source file is made by |
749 | replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR. | |
750 | .Sp | |
751 | Input files that don't require compilation are ignored. | |
752 | .Ip "\fB\-E\fR" 4 | |
753 | .IX Item "-E" | |
861bb6c1 | 754 | Stop after the preprocessing stage; do not run the compiler proper. The |
4bc1997b | 755 | output is in the form of preprocessed source code, which is sent to the |
861bb6c1 JL |
756 | standard output. |
757 | .Sp | |
4bc1997b JM |
758 | Input files which don't require preprocessing are ignored. |
759 | .Ip "\fB\-o\fR \fIfile\fR" 4 | |
760 | .IX Item "-o file" | |
761 | Place output in file \fIfile\fR. This applies regardless to whatever | |
762 | sort of output is being produced, whether it be an executable file, | |
861bb6c1 JL |
763 | an object file, an assembler file or preprocessed C code. |
764 | .Sp | |
765 | Since only one output file can be specified, it does not make sense to | |
4bc1997b | 766 | use \fB\-o\fR when compiling more than one input file, unless you are |
861bb6c1 JL |
767 | producing an executable file as output. |
768 | .Sp | |
4bc1997b JM |
769 | If \fB\-o\fR is not specified, the default is to put an executable file |
770 | in \fIa.out\fR, the object file for \fI\fIsource\fI.\fIsuffix\fI\fR in | |
771 | \&\fI\fIsource\fI.o\fR, its assembler file in \fI\fIsource\fI.s\fR, and | |
861bb6c1 | 772 | all preprocessed C source on standard output. |
4bc1997b JM |
773 | .Ip "\fB\-v\fR" 4 |
774 | .IX Item "-v" | |
861bb6c1 JL |
775 | Print (on standard error output) the commands executed to run the stages |
776 | of compilation. Also print the version number of the compiler driver | |
777 | program and of the preprocessor and the compiler proper. | |
4bc1997b JM |
778 | .Ip "\fB\-pipe\fR" 4 |
779 | .IX Item "-pipe" | |
861bb6c1 JL |
780 | Use pipes rather than temporary files for communication between the |
781 | various stages of compilation. This fails to work on some systems where | |
4bc1997b | 782 | the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has |
861bb6c1 | 783 | no trouble. |
4bc1997b JM |
784 | .Ip "\fB\*(--help\fR" 4 |
785 | .IX Item "help" | |
786 | Print (on the standard output) a description of the command line options | |
787 | understood by \fBgcc\fR. If the \fB\-v\fR option is also specified | |
788 | then \fB\*(--help\fR will also be passed on to the various processes | |
789 | invoked by \fBgcc\fR, so that they can display the command line options | |
790 | they accept. If the \fB\-W\fR option is also specified then command | |
791 | line options which have no documentation associated with them will also | |
792 | be displayed. | |
793 | .Ip "\fB\*(--target-help\fR" 4 | |
794 | .IX Item "target-help" | |
795 | Print (on the standard output) a description of target specific command | |
796 | line options for each tool. | |
797 | .Sh "Compiling \*(C+ Programs" | |
798 | .IX Subsection "Compiling Programs" | |
799 | \&\*(C+ source files conventionally use one of the suffixes \fB.C\fR, | |
800 | \&\fB.cc\fR, \fB.cpp\fR, \fB.c++\fR, \fB.cp\fR, or \fB.cxx\fR; | |
801 | preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes | |
802 | files with these names and compiles them as \*(C+ programs even if you | |
803 | call the compiler the same way as for compiling C programs (usually with | |
804 | the name \fBgcc\fR). | |
805 | .PP | |
806 | However, \*(C+ programs often require class libraries as well as a | |
807 | compiler that understands the \*(C+ language\-\-\-and under some | |
808 | circumstances, you might want to compile programs from standard input, | |
809 | or otherwise without a suffix that flags them as \*(C+ programs. | |
810 | \&\fBg++\fR is a program that calls \s-1GCC\s0 with the default language | |
811 | set to \*(C+, and automatically specifies linking against the \*(C+ | |
812 | library. On many systems, \fBg++\fR is also | |
813 | installed with the name \fBc++\fR. | |
861bb6c1 | 814 | .PP |
4bc1997b JM |
815 | When you compile \*(C+ programs, you may specify many of the same |
816 | command-line options that you use for compiling programs in any | |
817 | language; or command-line options meaningful for C and related | |
818 | languages; or options that are meaningful only for \*(C+ programs. | |
819 | .Sh "Options Controlling C Dialect" | |
820 | .IX Subsection "Options Controlling C Dialect" | |
821 | The following options control the dialect of C (or languages derived | |
822 | from C, such as \*(C+ and Objective C) that the compiler accepts: | |
823 | .Ip "\fB\-ansi\fR" 4 | |
824 | .IX Item "-ansi" | |
825 | In C mode, support all \s-1ISO\s0 C89 programs. In \*(C+ mode, | |
826 | remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+. | |
827 | .Sp | |
828 | This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0 | |
829 | C (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code), | |
830 | such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and | |
831 | predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the | |
832 | type of system you are using. It also enables the undesirable and | |
833 | rarely used \s-1ISO\s0 trigraph feature. For the C compiler, | |
834 | it disables recognition of \*(C+ style \fB//\fR comments as well as | |
835 | the \f(CW\*(C`inline\*(C'\fR keyword. | |
836 | .Sp | |
837 | The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR, | |
838 | \&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite | |
839 | \&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of | |
861bb6c1 | 840 | course, but it is useful to put them in header files that might be included |
4bc1997b JM |
841 | in compilations done with \fB\-ansi\fR. Alternate predefined macros |
842 | such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or | |
843 | without \fB\-ansi\fR. | |
844 | .Sp | |
845 | The \fB\-ansi\fR option does not cause non-ISO programs to be | |
846 | rejected gratuitously. For that, \fB\-pedantic\fR is required in | |
847 | addition to \fB\-ansi\fR. | |
848 | .Sp | |
849 | The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR | |
850 | option is used. Some header files may notice this macro and refrain | |
861bb6c1 | 851 | from declaring certain functions or defining certain macros that the |
4bc1997b | 852 | \&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any |
861bb6c1 | 853 | programs that might use these names for other things. |
4bc1997b JM |
854 | .Sp |
855 | Functions which would normally be builtin but do not have semantics | |
856 | defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not builtin | |
857 | functions with \fB\-ansi\fR is used. | |
858 | .Ip "\fB\-std=\fR" 4 | |
859 | .IX Item "-std=" | |
860 | Determine the language standard. A value for this option must be provided; | |
861 | possible values are | |
862 | .RS 4 | |
863 | .Ip "\fBiso9899:1990\fR" 4 | |
864 | .IX Item "iso9899:1990" | |
865 | Same as \fB\-ansi\fR | |
866 | .Ip "\fBiso9899:199409\fR" 4 | |
867 | .IX Item "iso9899:199409" | |
868 | \&\s-1ISO\s0 C as modified in amend. 1 | |
869 | .Ip "\fBiso9899:1999\fR" 4 | |
870 | .IX Item "iso9899:1999" | |
871 | \&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see | |
872 | <\fBhttp://gcc.gnu.org/c99status.html\fR> for more information. | |
873 | .Ip "\fBc89\fR" 4 | |
874 | .IX Item "c89" | |
875 | same as \fB\-std=iso9899:1990\fR | |
876 | .Ip "\fBc99\fR" 4 | |
877 | .IX Item "c99" | |
878 | same as \fB\-std=iso9899:1999\fR | |
879 | .Ip "\fBgnu89\fR" 4 | |
880 | .IX Item "gnu89" | |
881 | default, iso9899:1990 + gnu extensions | |
882 | .Ip "\fBgnu99\fR" 4 | |
883 | .IX Item "gnu99" | |
884 | iso9899:1999 + gnu extensions | |
885 | .Ip "\fBiso9899:199x\fR" 4 | |
886 | .IX Item "iso9899:199x" | |
887 | same as \fB\-std=iso9899:1999\fR, deprecated | |
888 | .Ip "\fBc9x\fR" 4 | |
889 | .IX Item "c9x" | |
890 | same as \fB\-std=iso9899:1999\fR, deprecated | |
891 | .Ip "\fBgnu9x\fR" 4 | |
892 | .IX Item "gnu9x" | |
893 | same as \fB\-std=gnu99\fR, deprecated | |
894 | .RE | |
895 | .RS 4 | |
896 | .Sp | |
897 | Even when this option is not specified, you can still use some of the | |
898 | features of newer standards in so far as they do not conflict with | |
899 | previous C standards. For example, you may use \f(CW\*(C`_\|_restrict_\|_\*(C'\fR even | |
900 | when \fB\-std=c99\fR is not specified. | |
901 | .Sp | |
902 | The \fB\-std\fR options specifying some version of \s-1ISO\s0 C have the same | |
903 | effects as \fB\-ansi\fR, except that features that were not in \s-1ISO\s0 C89 | |
904 | but are in the specified version (for example, \fB//\fR comments and | |
905 | the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled. | |
906 | .RE | |
907 | .Ip "\fB\-fno-asm\fR" 4 | |
908 | .IX Item "-fno-asm" | |
909 | Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a | |
910 | keyword, so that code can use these words as identifiers. You can use | |
911 | the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR | |
912 | instead. \fB\-ansi\fR implies \fB\-fno-asm\fR. | |
913 | .Sp | |
914 | In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since | |
915 | \&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to | |
916 | use the \fB\-fno-gnu-keywords\fR flag instead, which has the same | |
917 | effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this | |
918 | switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since | |
919 | \&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99. | |
920 | .Ip "\fB\-fno-builtin\fR" 4 | |
921 | .IX Item "-fno-builtin" | |
922 | Don't recognize builtin functions that do not begin with | |
923 | \&\fB_\|_builtin_\fR as prefix. | |
924 | .Sp | |
925 | \&\s-1GCC\s0 normally generates special code to handle certain builtin functions | |
926 | more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single | |
927 | instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR | |
928 | may become inline copy loops. The resulting code is often both smaller | |
929 | and faster, but since the function calls no longer appear as such, you | |
930 | cannot set a breakpoint on those calls, nor can you change the behavior | |
931 | of the functions by linking with a different library. | |
932 | .Ip "\fB\-fhosted\fR" 4 | |
933 | .IX Item "-fhosted" | |
934 | Assert that compilation takes place in a hosted environment. This implies | |
935 | \&\fB\-fbuiltin\fR. A hosted environment is one in which the | |
936 | entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return | |
937 | type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel. | |
938 | This is equivalent to \fB\-fno-freestanding\fR. | |
939 | .Ip "\fB\-ffreestanding\fR" 4 | |
940 | .IX Item "-ffreestanding" | |
941 | Assert that compilation takes place in a freestanding environment. This | |
942 | implies \fB\-fno-builtin\fR. A freestanding environment | |
943 | is one in which the standard library may not exist, and program startup may | |
944 | not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel. | |
945 | This is equivalent to \fB\-fno-hosted\fR. | |
946 | .Ip "\fB\-trigraphs\fR" 4 | |
947 | .IX Item "-trigraphs" | |
948 | Support \s-1ISO\s0 C trigraphs. You don't want to know about this | |
949 | brain-damage. The \fB\-ansi\fR option (and \fB\-std\fR options for | |
950 | strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR. | |
951 | .Ip "\fB\-traditional\fR" 4 | |
952 | .IX Item "-traditional" | |
861bb6c1 | 953 | Attempt to support some aspects of traditional C compilers. |
4bc1997b JM |
954 | Specifically: |
955 | .RS 4 | |
956 | .Ip "\(bu" 4 | |
957 | All \f(CW\*(C`extern\*(C'\fR declarations take effect globally even if they | |
958 | are written inside of a function definition. This includes implicit | |
959 | declarations of functions. | |
960 | .Ip "\(bu" 4 | |
961 | The newer keywords \f(CW\*(C`typeof\*(C'\fR, \f(CW\*(C`inline\*(C'\fR, \f(CW\*(C`signed\*(C'\fR, \f(CW\*(C`const\*(C'\fR | |
962 | and \f(CW\*(C`volatile\*(C'\fR are not recognized. (You can still use the | |
963 | alternative keywords such as \f(CW\*(C`_\|_typeof_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR, and | |
964 | so on.) | |
965 | .Ip "\(bu" 4 | |
966 | Comparisons between pointers and integers are always allowed. | |
967 | .Ip "\(bu" 4 | |
968 | Integer types \f(CW\*(C`unsigned short\*(C'\fR and \f(CW\*(C`unsigned char\*(C'\fR promote | |
969 | to \f(CW\*(C`unsigned int\*(C'\fR. | |
970 | .Ip "\(bu" 4 | |
971 | Out-of-range floating point literals are not an error. | |
972 | .Ip "\(bu" 4 | |
973 | Certain constructs which \s-1ISO\s0 regards as a single invalid preprocessing | |
974 | number, such as \fB0xe-0xd\fR, are treated as expressions instead. | |
975 | .Ip "\(bu" 4 | |
976 | String ``constants'' are not necessarily constant; they are stored in | |
977 | writable space, and identical looking constants are allocated | |
978 | separately. (This is the same as the effect of | |
979 | \&\fB\-fwritable-strings\fR.) | |
980 | .Ip "\(bu" 4 | |
981 | All automatic variables not declared \f(CW\*(C`register\*(C'\fR are preserved by | |
982 | \&\f(CW\*(C`longjmp\*(C'\fR. Ordinarily, \s-1GNU\s0 C follows \s-1ISO\s0 C: automatic variables | |
983 | not declared \f(CW\*(C`volatile\*(C'\fR may be clobbered. | |
984 | .Ip "\(bu" 4 | |
985 | The character escape sequences \fB\ex\fR and \fB\ea\fR evaluate as the | |
986 | literal characters \fBx\fR and \fBa\fR respectively. Without | |
987 | \&\fB\-traditional\fR, \fB\ex\fR is a prefix for the hexadecimal | |
988 | representation of a character, and \fB\ea\fR produces a bell. | |
989 | .RE | |
990 | .RS 4 | |
991 | .Sp | |
992 | You may wish to use \fB\-fno-builtin\fR as well as \fB\-traditional\fR | |
993 | if your program uses names that are normally \s-1GNU\s0 C builtin functions for | |
994 | other purposes of its own. | |
995 | .Sp | |
996 | You cannot use \fB\-traditional\fR if you include any header files that | |
997 | rely on \s-1ISO\s0 C features. Some vendors are starting to ship systems with | |
998 | \&\s-1ISO\s0 C header files and you cannot use \fB\-traditional\fR on such | |
999 | systems to compile files that include any system headers. | |
1000 | .Sp | |
1001 | The \fB\-traditional\fR option also enables \fB\-traditional-cpp\fR, | |
1002 | which is described next. | |
1003 | .RE | |
1004 | .Ip "\fB\-traditional-cpp\fR" 4 | |
1005 | .IX Item "-traditional-cpp" | |
861bb6c1 | 1006 | Attempt to support some aspects of traditional C preprocessors. |
4bc1997b JM |
1007 | Specifically: |
1008 | .RS 4 | |
1009 | .Ip "\(bu" 4 | |
1010 | Comments convert to nothing at all, rather than to a space. This allows | |
1011 | traditional token concatenation. | |
1012 | .Ip "\(bu" 4 | |
1013 | In a preprocessing directive, the \fB#\fR symbol must appear as the first | |
1014 | character of a line. | |
1015 | .Ip "\(bu" 4 | |
1016 | Macro arguments are recognized within string constants in a macro | |
1017 | definition (and their values are stringified, though without additional | |
1018 | quote marks, when they appear in such a context). The preprocessor | |
1019 | always considers a string constant to end at a newline. | |
1020 | .Ip "\(bu" 4 | |
1021 | The predefined macro \f(CW\*(C`_\|_STDC_\|_\*(C'\fR is not defined when you use | |
1022 | \&\fB\-traditional\fR, but \f(CW\*(C`_\|_GNUC_\|_\*(C'\fR is (since the \s-1GNU\s0 extensions | |
1023 | which \f(CW\*(C`_\|_GNUC_\|_\*(C'\fR indicates are not affected by | |
1024 | \&\fB\-traditional\fR). If you need to write header files that work | |
1025 | differently depending on whether \fB\-traditional\fR is in use, by | |
1026 | testing both of these predefined macros you can distinguish four | |
1027 | situations: \s-1GNU\s0 C, traditional \s-1GNU\s0 C, other \s-1ISO\s0 C compilers, and other | |
1028 | old C compilers. The predefined macro \f(CW\*(C`_\|_STDC_VERSION_\|_\*(C'\fR is also | |
1029 | not defined when you use \fB\-traditional\fR. | |
1030 | .Ip "\(bu" 4 | |
1031 | The preprocessor considers a string constant to end at a newline (unless | |
1032 | the newline is escaped with \fB\e\fR). (Without \fB\-traditional\fR, | |
1033 | string constants can contain the newline character as typed.) | |
1034 | .RE | |
1035 | .RS 4 | |
1036 | .RE | |
1037 | .Ip "\fB\-fcond-mismatch\fR" 4 | |
1038 | .IX Item "-fcond-mismatch" | |
861bb6c1 | 1039 | Allow conditional expressions with mismatched types in the second and |
4bc1997b JM |
1040 | third arguments. The value of such an expression is void. This option |
1041 | is not supported for \*(C+. | |
1042 | .Ip "\fB\-funsigned-char\fR" 4 | |
1043 | .IX Item "-funsigned-char" | |
1044 | Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR. | |
1045 | .Sp | |
1046 | Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should | |
1047 | be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like | |
1048 | \&\f(CW\*(C`signed char\*(C'\fR by default. | |
1049 | .Sp | |
1050 | Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or | |
1051 | \&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object. | |
1052 | But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and | |
861bb6c1 JL |
1053 | expect it to be signed, or expect it to be unsigned, depending on the |
1054 | machines they were written for. This option, and its inverse, let you | |
1055 | make such a program work with the opposite default. | |
1056 | .Sp | |
4bc1997b JM |
1057 | The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of |
1058 | \&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior | |
861bb6c1 | 1059 | is always just like one of those two. |
4bc1997b JM |
1060 | .Ip "\fB\-fsigned-char\fR" 4 |
1061 | .IX Item "-fsigned-char" | |
1062 | Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR. | |
1063 | .Sp | |
1064 | Note that this is equivalent to \fB\-fno-unsigned-char\fR, which is | |
1065 | the negative form of \fB\-funsigned-char\fR. Likewise, the option | |
1066 | \&\fB\-fno-signed-char\fR is equivalent to \fB\-funsigned-char\fR. | |
1067 | .Sp | |
1068 | You may wish to use \fB\-fno-builtin\fR as well as \fB\-traditional\fR | |
1069 | if your program uses names that are normally \s-1GNU\s0 C builtin functions for | |
1070 | other purposes of its own. | |
1071 | .Sp | |
1072 | You cannot use \fB\-traditional\fR if you include any header files that | |
1073 | rely on \s-1ISO\s0 C features. Some vendors are starting to ship systems with | |
1074 | \&\s-1ISO\s0 C header files and you cannot use \fB\-traditional\fR on such | |
1075 | systems to compile files that include any system headers. | |
1076 | .Ip "\fB\-fsigned-bitfields\fR" 4 | |
1077 | .IX Item "-fsigned-bitfields" | |
1078 | .PD 0 | |
1079 | .Ip "\fB\-funsigned-bitfields\fR" 4 | |
1080 | .IX Item "-funsigned-bitfields" | |
1081 | .Ip "\fB\-fno-signed-bitfields\fR" 4 | |
1082 | .IX Item "-fno-signed-bitfields" | |
1083 | .Ip "\fB\-fno-unsigned-bitfields\fR" 4 | |
1084 | .IX Item "-fno-unsigned-bitfields" | |
1085 | .PD | |
1086 | These options control whether a bitfield is signed or unsigned, when the | |
1087 | declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By | |
1088 | default, such a bitfield is signed, because this is consistent: the | |
1089 | basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types. | |
1090 | .Sp | |
1091 | However, when \fB\-traditional\fR is used, bitfields are all unsigned | |
861bb6c1 | 1092 | no matter what. |
4bc1997b JM |
1093 | .Ip "\fB\-fwritable-strings\fR" 4 |
1094 | .IX Item "-fwritable-strings" | |
861bb6c1 | 1095 | Store string constants in the writable data segment and don't uniquize |
4bc1997b JM |
1096 | them. This is for compatibility with old programs which assume they can |
1097 | write into string constants. The option \fB\-traditional\fR also has | |
1098 | this effect. | |
861bb6c1 | 1099 | .Sp |
4bc1997b | 1100 | Writing into string constants is a very bad idea; ``constants'' should |
861bb6c1 | 1101 | be constant. |
4bc1997b JM |
1102 | .Ip "\fB\-fallow-single-precision\fR" 4 |
1103 | .IX Item "-fallow-single-precision" | |
1104 | Do not promote single precision math operations to double precision, | |
1105 | even when compiling with \fB\-traditional\fR. | |
1106 | .Sp | |
1107 | Traditional K&R C promotes all floating point operations to double | |
1108 | precision, regardless of the sizes of the operands. On the | |
1109 | architecture for which you are compiling, single precision may be faster | |
1110 | than double precision. If you must use \fB\-traditional\fR, but want | |
1111 | to use single precision operations when the operands are single | |
1112 | precision, use this option. This option has no effect when compiling | |
1113 | with \s-1ISO\s0 or \s-1GNU\s0 C conventions (the default). | |
1114 | .Ip "\fB\-fshort-wchar\fR" 4 | |
1115 | .IX Item "-fshort-wchar" | |
1116 | Override the underlying type for \fBwchar_t\fR to be \fBshort | |
1117 | unsigned int\fR instead of the default for the target. This option is | |
1118 | useful for building programs to run under \s-1WINE\s0. | |
1119 | .Sh "Options Controlling \*(C+ Dialect" | |
1120 | .IX Subsection "Options Controlling Dialect" | |
1121 | This section describes the command-line options that are only meaningful | |
1122 | for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options | |
1123 | regardless of what language your program is in. For example, you | |
1124 | might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this: | |
861bb6c1 | 1125 | .PP |
4bc1997b JM |
1126 | .Vb 1 |
1127 | \& g++ -g -frepo -O -c firstClass.C | |
1128 | .Ve | |
1129 | In this example, only \fB\-frepo\fR is an option meant | |
1130 | only for \*(C+ programs; you can use the other options with any | |
1131 | language supported by \s-1GCC\s0. | |
1132 | .PP | |
1133 | Here is a list of options that are \fIonly\fR for compiling \*(C+ programs: | |
1134 | .Ip "\fB\-fno-access-control\fR" 4 | |
1135 | .IX Item "-fno-access-control" | |
1136 | Turn off all access checking. This switch is mainly useful for working | |
1137 | around bugs in the access control code. | |
1138 | .Ip "\fB\-fcheck-new\fR" 4 | |
1139 | .IX Item "-fcheck-new" | |
1140 | Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null | |
1141 | before attempting to modify the storage allocated. The current Working | |
1142 | Paper requires that \f(CW\*(C`operator new\*(C'\fR never return a null pointer, so | |
1143 | this check is normally unnecessary. | |
1144 | .Sp | |
1145 | An alternative to using this option is to specify that your | |
1146 | \&\f(CW\*(C`operator new\*(C'\fR does not throw any exceptions; if you declare it | |
1147 | \&\fB\f(BIthrow()\fB\fR, g++ will check the return value. See also \fBnew | |
1148 | (nothrow)\fR. | |
1149 | .Ip "\fB\-fconserve-space\fR" 4 | |
1150 | .IX Item "-fconserve-space" | |
1151 | Put uninitialized or runtime-initialized global variables into the | |
1152 | common segment, as C does. This saves space in the executable at the | |
1153 | cost of not diagnosing duplicate definitions. If you compile with this | |
1154 | flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has | |
1155 | completed, you may have an object that is being destroyed twice because | |
1156 | two definitions were merged. | |
1157 | .Sp | |
1158 | This option is no longer useful on most targets, now that support has | |
1159 | been added for putting variables into \s-1BSS\s0 without making them common. | |
1160 | .Ip "\fB\-fdollars-in-identifiers\fR" 4 | |
1161 | .IX Item "-fdollars-in-identifiers" | |
1162 | Accept \fB$\fR in identifiers. You can also explicitly prohibit use of | |
1163 | \&\fB$\fR with the option \fB\-fno-dollars-in-identifiers\fR. (\s-1GNU\s0 C allows | |
1164 | \&\fB$\fR by default on most target systems, but there are a few exceptions.) | |
1165 | Traditional C allowed the character \fB$\fR to form part of | |
1166 | identifiers. However, \s-1ISO\s0 C and \*(C+ forbid \fB$\fR in identifiers. | |
1167 | .Ip "\fB\-fno-elide-constructors\fR" 4 | |
1168 | .IX Item "-fno-elide-constructors" | |
1169 | The \*(C+ standard allows an implementation to omit creating a temporary | |
1170 | which is only used to initialize another object of the same type. | |
1171 | Specifying this option disables that optimization, and forces g++ to | |
1172 | call the copy constructor in all cases. | |
1173 | .Ip "\fB\-fno-enforce-eh-specs\fR" 4 | |
1174 | .IX Item "-fno-enforce-eh-specs" | |
1175 | Don't check for violation of exception specifications at runtime. This | |
1176 | option violates the \*(C+ standard, but may be useful for reducing code | |
1177 | size in production builds, much like defining \fB\s-1NDEBUG\s0\fR. The compiler | |
1178 | will still optimize based on the exception specifications. | |
1179 | .Ip "\fB\-fexternal-templates\fR" 4 | |
1180 | .IX Item "-fexternal-templates" | |
1181 | Cause template instantiations to obey \fB#pragma interface\fR and | |
1182 | \&\fBimplementation\fR; template instances are emitted or not according | |
1183 | to the location of the template definition. | |
1184 | .Sp | |
1185 | This option is deprecated. | |
1186 | .Ip "\fB\-falt-external-templates\fR" 4 | |
1187 | .IX Item "-falt-external-templates" | |
1188 | Similar to \-fexternal-templates, but template instances are emitted or | |
1189 | not according to the place where they are first instantiated. | |
1190 | .Sp | |
1191 | This option is deprecated. | |
1192 | .Ip "\fB\-ffor-scope\fR" 4 | |
1193 | .IX Item "-ffor-scope" | |
1194 | .PD 0 | |
1195 | .Ip "\fB\-fno-for-scope\fR" 4 | |
1196 | .IX Item "-fno-for-scope" | |
1197 | .PD | |
1198 | If \-ffor-scope is specified, the scope of variables declared in | |
1199 | a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself, | |
1200 | as specified by the \*(C+ standard. | |
1201 | If \-fno-for-scope is specified, the scope of variables declared in | |
1202 | a \fIfor-init-statement\fR extends to the end of the enclosing scope, | |
1203 | as was the case in old versions of gcc, and other (traditional) | |
1204 | implementations of \*(C+. | |
1205 | .Sp | |
1206 | The default if neither flag is given to follow the standard, | |
1207 | but to allow and give a warning for old-style code that would | |
1208 | otherwise be invalid, or have different behavior. | |
1209 | .Ip "\fB\-fno-gnu-keywords\fR" 4 | |
1210 | .IX Item "-fno-gnu-keywords" | |
1211 | Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this | |
1212 | word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead. | |
1213 | \&\fB\-ansi\fR implies \fB\-fno-gnu-keywords\fR. | |
1214 | .Ip "\fB\-fhonor-std\fR" 4 | |
1215 | .IX Item "-fhonor-std" | |
1216 | Treat the \f(CW\*(C`namespace std\*(C'\fR as a namespace, instead of ignoring | |
1217 | it. For compatibility with earlier versions of g++, the compiler will, | |
1218 | by default, ignore \f(CW\*(C`namespace\-declarations\*(C'\fR, | |
1219 | \&\f(CW\*(C`using\-declarations\*(C'\fR, \f(CW\*(C`using\-directives\*(C'\fR, and | |
1220 | \&\f(CW\*(C`namespace\-names\*(C'\fR, if they involve \f(CW\*(C`std\*(C'\fR. | |
1221 | .Ip "\fB\-fhuge-objects\fR" 4 | |
1222 | .IX Item "-fhuge-objects" | |
1223 | Support virtual function calls for objects that exceed the size | |
1224 | representable by a \fBshort int\fR. Users should not use this flag by | |
1225 | default; if you need to use it, the compiler will tell you so. | |
1226 | .Sp | |
1227 | This flag is not useful when compiling with \-fvtable-thunks. | |
1228 | .Sp | |
1229 | Like all options that change the \s-1ABI\s0, all \*(C+ code, \fIincluding | |
1230 | libgcc\fR must be built with the same setting of this option. | |
1231 | .Ip "\fB\-fno-implicit-templates\fR" 4 | |
1232 | .IX Item "-fno-implicit-templates" | |
1233 | Never emit code for non-inline templates which are instantiated | |
1234 | implicitly (i.e. by use); only emit code for explicit instantiations. | |
1235 | .Ip "\fB\-fno-implicit-inline-templates\fR" 4 | |
1236 | .IX Item "-fno-implicit-inline-templates" | |
1237 | Don't emit code for implicit instantiations of inline templates, either. | |
1238 | The default is to handle inlines differently so that compiles with and | |
1239 | without optimization will need the same set of explicit instantiations. | |
1240 | .Ip "\fB\-fno-implement-inlines\fR" 4 | |
1241 | .IX Item "-fno-implement-inlines" | |
1242 | To save space, do not emit out-of-line copies of inline functions | |
1243 | controlled by \fB#pragma implementation\fR. This will cause linker | |
1244 | errors if these functions are not inlined everywhere they are called. | |
1245 | .Ip "\fB\-fms-extensions\fR" 4 | |
1246 | .IX Item "-fms-extensions" | |
1247 | Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit | |
1248 | int and getting a pointer to member function via non-standard syntax. | |
1249 | .Ip "\fB\-fname-mangling-version-\fR\fIn\fR" 4 | |
1250 | .IX Item "-fname-mangling-version-n" | |
1251 | Control the way in which names are mangled. Version 0 is compatible | |
1252 | with versions of g++ before 2.8. Version 1 is the default. Version 1 | |
1253 | will allow correct mangling of function templates. For example, | |
1254 | version 0 mangling does not mangle foo<int, double> and foo<int, char> | |
1255 | given this declaration: | |
1256 | .Sp | |
1257 | .Vb 1 | |
1258 | \& template <class T, class U> void foo(T t); | |
1259 | .Ve | |
1260 | Like all options that change the \s-1ABI\s0, all \*(C+ code, \fIincluding | |
1261 | libgcc\fR must be built with the same setting of this option. | |
1262 | .Ip "\fB\-fno-operator-names\fR" 4 | |
1263 | .IX Item "-fno-operator-names" | |
1264 | Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR, | |
1265 | \&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as | |
1266 | synonyms as keywords. | |
1267 | .Ip "\fB\-fno-optional-diags\fR" 4 | |
1268 | .IX Item "-fno-optional-diags" | |
1269 | Disable diagnostics that the standard says a compiler does not need to | |
1270 | issue. Currently, the only such diagnostic issued by g++ is the one for | |
1271 | a name having multiple meanings within a class. | |
1272 | .Ip "\fB\-fpermissive\fR" 4 | |
1273 | .IX Item "-fpermissive" | |
1274 | Downgrade messages about nonconformant code from errors to warnings. By | |
1275 | default, g++ effectively sets \fB\-pedantic-errors\fR without | |
1276 | \&\fB\-pedantic\fR; this option reverses that. This behavior and this | |
1277 | option are superseded by \fB\-pedantic\fR, which works as it does for \s-1GNU\s0 C. | |
1278 | .Ip "\fB\-frepo\fR" 4 | |
1279 | .IX Item "-frepo" | |
1280 | Enable automatic template instantiation. This option also implies | |
1281 | \&\fB\-fno-implicit-templates\fR. | |
1282 | .Ip "\fB\-fno-rtti\fR" 4 | |
1283 | .IX Item "-fno-rtti" | |
1284 | Disable generation of information about every class with virtual | |
1285 | functions for use by the \*(C+ runtime type identification features | |
1286 | (\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts | |
1287 | of the language, you can save some space by using this flag. Note that | |
1288 | exception handling uses the same information, but it will generate it as | |
1289 | needed. | |
1290 | .Ip "\fB\-fsquangle\fR" 4 | |
1291 | .IX Item "-fsquangle" | |
1292 | .PD 0 | |
1293 | .Ip "\fB\-fno-squangle\fR" 4 | |
1294 | .IX Item "-fno-squangle" | |
1295 | .PD | |
1296 | \&\fB\-fsquangle\fR will enable a compressed form of name mangling for | |
1297 | identifiers. In particular, it helps to shorten very long names by recognizing | |
1298 | types and class names which occur more than once, replacing them with special | |
1299 | short \s-1ID\s0 codes. This option also requires any \*(C+ libraries being used to | |
1300 | be compiled with this option as well. The compiler has this disabled (the | |
1301 | equivalent of \fB\-fno-squangle\fR) by default. | |
1302 | .Sp | |
1303 | Like all options that change the \s-1ABI\s0, all \*(C+ code, \fIincluding | |
1304 | libgcc.a\fR must be built with the same setting of this option. | |
1305 | .Ip "\fB\-ftemplate-depth-\fR\fIn\fR" 4 | |
1306 | .IX Item "-ftemplate-depth-n" | |
1307 | Set the maximum instantiation depth for template classes to \fIn\fR. | |
1308 | A limit on the template instantiation depth is needed to detect | |
1309 | endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+ | |
1310 | conforming programs must not rely on a maximum depth greater than 17. | |
1311 | .Ip "\fB\-fuse-cxa-atexit\fR" 4 | |
1312 | .IX Item "-fuse-cxa-atexit" | |
1313 | Register destructors for objects with static storage duration with the | |
1314 | \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function. | |
1315 | This option is required for fully standards-compliant handling of static | |
1316 | destructors, but will only work if your C library supports | |
1317 | \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR. | |
1318 | .Ip "\fB\-fvtable-thunks\fR" 4 | |
1319 | .IX Item "-fvtable-thunks" | |
1320 | Use \fBthunks\fR to implement the virtual function dispatch table | |
1321 | (\fBvtable\fR). The traditional (cfront-style) approach to | |
1322 | implementing vtables was to store a pointer to the function and two | |
1323 | offsets for adjusting the \fBthis\fR pointer at the call site. Newer | |
1324 | implementations store a single pointer to a \fBthunk\fR function which | |
1325 | does any necessary adjustment and then calls the target function. | |
1326 | .Sp | |
1327 | This option also enables a heuristic for controlling emission of | |
1328 | vtables; if a class has any non-inline virtual functions, the vtable | |
1329 | will be emitted in the translation unit containing the first one of | |
1330 | those. | |
1331 | .Sp | |
1332 | Like all options that change the \s-1ABI\s0, all \*(C+ code, \fIincluding | |
1333 | libgcc.a\fR must be built with the same setting of this option. | |
1334 | .Ip "\fB\-nostdinc++\fR" 4 | |
1335 | .IX Item "-nostdinc++" | |
1336 | Do not search for header files in the standard directories specific to | |
1337 | \&\*(C+, but do still search the other standard directories. (This option | |
1338 | is used when building the \*(C+ library.) | |
1339 | .PP | |
1340 | In addition, these optimization, warning, and code generation options | |
1341 | have meanings only for \*(C+ programs: | |
1342 | .Ip "\fB\-fno-default-inline\fR" 4 | |
1343 | .IX Item "-fno-default-inline" | |
1344 | Do not assume \fBinline\fR for functions defined inside a class scope. | |
1345 | Note that these | |
1346 | functions will have linkage like inline functions; they just won't be | |
1347 | inlined by default. | |
1348 | .Ip "\fB\-Wctor-dtor-privacy (\*(C+ only)\fR" 4 | |
1349 | .IX Item "-Wctor-dtor-privacy ( only)" | |
1350 | Warn when a class seems unusable, because all the constructors or | |
1351 | destructors in a class are private and the class has no friends or | |
1352 | public static member functions. | |
1353 | .Ip "\fB\-Wnon-virtual-dtor (\*(C+ only)\fR" 4 | |
1354 | .IX Item "-Wnon-virtual-dtor ( only)" | |
1355 | Warn when a class declares a non-virtual destructor that should probably | |
1356 | be virtual, because it looks like the class will be used polymorphically. | |
1357 | .Ip "\fB\-Wreorder (\*(C+ only)\fR" 4 | |
1358 | .IX Item "-Wreorder ( only)" | |
1359 | Warn when the order of member initializers given in the code does not | |
1360 | match the order in which they must be executed. For instance: | |
1361 | .Sp | |
1362 | .Vb 5 | |
1363 | \& struct A { | |
1364 | \& int i; | |
1365 | \& int j; | |
1366 | \& A(): j (0), i (1) { } | |
1367 | \& }; | |
1368 | .Ve | |
1369 | Here the compiler will warn that the member initializers for \fBi\fR | |
1370 | and \fBj\fR will be rearranged to match the declaration order of the | |
1371 | members. | |
1372 | .PP | |
1373 | The following \fB\-W...\fR options are not affected by \fB\-Wall\fR. | |
1374 | .Ip "\fB\-Weffc++ (\*(C+ only)\fR" 4 | |
1375 | .IX Item "-Weffc++ ( only)" | |
1376 | Warn about violations of various style guidelines from Scott Meyers' | |
1377 | \&\fIEffective \*(C+\fR books. If you use this option, you should be aware | |
1378 | that the standard library headers do not obey all of these guidelines; | |
1379 | you can use \fBgrep \-v\fR to filter out those warnings. | |
1380 | .Ip "\fB\-Wno-deprecated (\*(C+ only)\fR" 4 | |
1381 | .IX Item "-Wno-deprecated ( only)" | |
1382 | Do not warn about usage of deprecated features. | |
1383 | .Ip "\fB\-Wno-non-template-friend (\*(C+ only)\fR" 4 | |
1384 | .IX Item "-Wno-non-template-friend ( only)" | |
1385 | Disable warnings when non-templatized friend functions are declared | |
1386 | within a template. With the advent of explicit template specification | |
1387 | support in g++, if the name of the friend is an unqualified-id (ie, | |
1388 | \&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the | |
1389 | friend declare or define an ordinary, nontemplate function. (Section | |
1390 | 14.5.3). Before g++ implemented explicit specification, unqualified-ids | |
1391 | could be interpreted as a particular specialization of a templatized | |
1392 | function. Because this non-conforming behavior is no longer the default | |
1393 | behavior for g++, \fB\-Wnon-template-friend\fR allows the compiler to | |
1394 | check existing code for potential trouble spots, and is on by default. | |
1395 | This new compiler behavior can be turned off with | |
1396 | \&\fB\-Wno-non-template-friend\fR which keeps the conformant compiler code | |
1397 | but disables the helpful warning. | |
1398 | .Ip "\fB\-Wold-style-cast (\*(C+ only)\fR" 4 | |
1399 | .IX Item "-Wold-style-cast ( only)" | |
1400 | Warn if an old-style (C-style) cast is used within a \*(C+ program. The | |
1401 | new-style casts (\fBstatic_cast\fR, \fBreinterpret_cast\fR, and | |
1402 | \&\fBconst_cast\fR) are less vulnerable to unintended effects. | |
1403 | .Ip "\fB\-Woverloaded-virtual (\*(C+ only)\fR" 4 | |
1404 | .IX Item "-Woverloaded-virtual ( only)" | |
1405 | Warn when a derived class function declaration may be an error in | |
1406 | defining a virtual function. In a derived class, the | |
1407 | definitions of virtual functions must match the type signature of a | |
1408 | virtual function declared in the base class. With this option, the | |
1409 | compiler warns when you define a function with the same name as a | |
1410 | virtual function, but with a type signature that does not match any | |
1411 | declarations from the base class. | |
1412 | .Ip "\fB\-Wno-pmf-conversions (\*(C+ only)\fR" 4 | |
1413 | .IX Item "-Wno-pmf-conversions ( only)" | |
1414 | Disable the diagnostic for converting a bound pointer to member function | |
1415 | to a plain pointer. | |
1416 | .Ip "\fB\-Wsign-promo (\*(C+ only)\fR" 4 | |
1417 | .IX Item "-Wsign-promo ( only)" | |
1418 | Warn when overload resolution chooses a promotion from unsigned or | |
1419 | enumeral type to a signed type over a conversion to an unsigned type of | |
1420 | the same size. Previous versions of g++ would try to preserve | |
1421 | unsignedness, but the standard mandates the current behavior. | |
1422 | .Ip "\fB\-Wsynth (\*(C+ only)\fR" 4 | |
1423 | .IX Item "-Wsynth ( only)" | |
1424 | Warn when g++'s synthesis behavior does not match that of cfront. For | |
1425 | instance: | |
1426 | .Sp | |
1427 | .Vb 4 | |
1428 | \& struct A { | |
1429 | \& operator int (); | |
1430 | \& A& operator = (int); | |
1431 | \& }; | |
1432 | .Ve | |
1433 | .Vb 5 | |
1434 | \& main () | |
1435 | \& { | |
1436 | \& A a,b; | |
1437 | \& a = b; | |
1438 | \& } | |
1439 | .Ve | |
1440 | In this example, g++ will synthesize a default \fBA& operator = | |
1441 | (const A&);\fR, while cfront will use the user-defined \fBoperator =\fR. | |
1442 | .Sh "Options to Control Diagnostic Messages Formatting" | |
1443 | .IX Subsection "Options to Control Diagnostic Messages Formatting" | |
1444 | Traditionally, diagnostic messages have been formatted irrespective of | |
1445 | the output device's aspect (e.g. its width, ...). The options described | |
1446 | below can be used to control the diagnostic messages formatting | |
1447 | algorithm, e.g. how many characters per line, how often source location | |
1448 | information should be reported. Right now, only the \*(C+ front-end can | |
1449 | honor these options. However it is expected, in the near future, that | |
1450 | the remaining front-ends would be able to digest them correctly. | |
1451 | .Ip "\fB\-fmessage-length=\fR\fIn\fR" 4 | |
1452 | .IX Item "-fmessage-length=n" | |
1453 | Try to format error messages so that they fit on lines of about \fIn\fR | |
1454 | characters. The default is 72 characters for g++ and 0 for the rest of | |
1455 | the front-ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no | |
1456 | line-wrapping will be done; each error message will appear on a single | |
1457 | line. | |
1458 | .Ip "\fB\-fdiagnostics-show-location=once\fR" 4 | |
1459 | .IX Item "-fdiagnostics-show-location=once" | |
1460 | Only meaningful in line-wrapping mode. Instructs the diagnostic messages | |
1461 | reporter to emit \fIonce\fR source location information; that is, in | |
1462 | case the message is too long to fit on a single physical line and has to | |
1463 | be wrapped, the source location won't be emitted (as prefix) again, | |
1464 | over and over, in subsequent continuation lines. This is the default | |
1465 | behaviour. | |
1466 | .Ip "\fB\-fdiagnostics-show-location=every-line\fR" 4 | |
1467 | .IX Item "-fdiagnostics-show-location=every-line" | |
1468 | Only meaningful in line-wrapping mode. Instructs the diagnostic | |
1469 | messages reporter to emit the same source location information (as | |
1470 | prefix) for physical lines that result from the process of breaking a | |
1471 | a message which is too long to fit on a single line. | |
1472 | .Sh "Options to Request or Suppress Warnings" | |
1473 | .IX Subsection "Options to Request or Suppress Warnings" | |
861bb6c1 JL |
1474 | Warnings are diagnostic messages that report constructions which |
1475 | are not inherently erroneous but which are risky or suggest there | |
1476 | may have been an error. | |
4bc1997b JM |
1477 | .PP |
1478 | You can request many specific warnings with options beginning \fB\-W\fR, | |
1479 | for example \fB\-Wimplicit\fR to request warnings on implicit | |
1480 | declarations. Each of these specific warning options also has a | |
1481 | negative form beginning \fB\-Wno-\fR to turn off warnings; | |
1482 | for example, \fB\-Wno-implicit\fR. This manual lists only one of the | |
1483 | two forms, whichever is not the default. | |
1484 | .PP | |
1485 | These options control the amount and kinds of warnings produced by \s-1GCC:\s0 | |
1486 | .Ip "\fB\-fsyntax-only\fR" 4 | |
1487 | .IX Item "-fsyntax-only" | |
1488 | Check the code for syntax errors, but don't do anything beyond that. | |
1489 | .Ip "\fB\-pedantic\fR" 4 | |
1490 | .IX Item "-pedantic" | |
1491 | Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+; | |
1492 | reject all programs that use forbidden extensions, and some other | |
1493 | programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the | |
1494 | version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used. | |
1495 | .Sp | |
1496 | Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without | |
1497 | this option (though a rare few will require \fB\-ansi\fR or a | |
1498 | \&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However, | |
1499 | without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+ | |
1500 | features are supported as well. With this option, they are rejected. | |
1501 | .Sp | |
1502 | \&\fB\-pedantic\fR does not cause warning messages for use of the | |
1503 | alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic | |
861bb6c1 | 1504 | warnings are also disabled in the expression that follows |
4bc1997b | 1505 | \&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use |
861bb6c1 | 1506 | these escape routes; application programs should avoid them. |
861bb6c1 | 1507 | .Sp |
4bc1997b JM |
1508 | Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0 |
1509 | C conformance. They soon find that it does not do quite what they want: | |
1510 | it finds some non-ISO practices, but not all\-\-\-only those for which | |
1511 | \&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which | |
1512 | diagnostics have been added. | |
1513 | .Sp | |
1514 | A feature to report any failure to conform to \s-1ISO\s0 C might be useful in | |
1515 | some instances, but would require considerable additional work and would | |
1516 | be quite different from \fB\-pedantic\fR. We don't have plans to | |
1517 | support such a feature in the near future. | |
1518 | .Ip "\fB\-pedantic-errors\fR" 4 | |
1519 | .IX Item "-pedantic-errors" | |
1520 | Like \fB\-pedantic\fR, except that errors are produced rather than | |
1521 | warnings. | |
1522 | .Ip "\fB\-w\fR" 4 | |
1523 | .IX Item "-w" | |
1524 | Inhibit all warning messages. | |
1525 | .Ip "\fB\-Wno-import\fR" 4 | |
1526 | .IX Item "-Wno-import" | |
1527 | Inhibit warning messages about the use of \fB#import\fR. | |
1528 | .Ip "\fB\-Wchar-subscripts\fR" 4 | |
1529 | .IX Item "-Wchar-subscripts" | |
1530 | Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause | |
1531 | of error, as programmers often forget that this type is signed on some | |
1532 | machines. | |
1533 | .Ip "\fB\-Wcomment\fR" 4 | |
1534 | .IX Item "-Wcomment" | |
1535 | Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR | |
1536 | comment, or whenever a Backslash-Newline appears in a \fB//\fR comment. | |
1537 | .Ip "\fB\-Wformat\fR" 4 | |
1538 | .IX Item "-Wformat" | |
1539 | Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that | |
1540 | the arguments supplied have types appropriate to the format string | |
1541 | specified, and that the conversions specified in the format string make | |
1542 | sense. This includes standard functions, and others specified by format | |
1543 | attributes, in the \f(CW\*(C`printf\*(C'\fR, | |
1544 | \&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension, | |
1545 | not in the C standard) families. | |
1546 | .Sp | |
1547 | The formats are checked against the format features supported by \s-1GNU\s0 | |
1548 | libc version 2.2. These include all \s-1ISO\s0 C89 and C99 features, as well | |
1549 | as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0 | |
1550 | extensions. Other library implementations may not support all these | |
1551 | features; \s-1GCC\s0 does not support warning about features that go beyond a | |
1552 | particular library's limitations. However, if \fB\-pedantic\fR is used | |
1553 | with \fB\-Wformat\fR, warnings will be given about format features not | |
1554 | in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats, | |
1555 | since those are not in any version of the C standard). | |
1556 | .Sp | |
1557 | \&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some | |
1558 | aspects of format checking, the options \fB\-Wno-format-y2k\fR, | |
1559 | \&\fB\-Wno-format-extra-args\fR, \fB\-Wformat-nonliteral\fR, | |
1560 | \&\fB\-Wformat-security\fR and \fB\-Wformat=2\fR are available, but are | |
1561 | not included in \fB\-Wall\fR. | |
1562 | .Ip "\fB\-Wno-format-y2k\fR" 4 | |
1563 | .IX Item "-Wno-format-y2k" | |
1564 | If \fB\-Wformat\fR is specified, do not warn about \f(CW\*(C`strftime\*(C'\fR | |
1565 | formats which may yield only a two-digit year. | |
1566 | .Ip "\fB\-Wno-format-extra-args\fR" 4 | |
1567 | .IX Item "-Wno-format-extra-args" | |
1568 | If \fB\-Wformat\fR is specified, do not warn about excess arguments to a | |
1569 | \&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies | |
1570 | that such arguments are ignored. | |
1571 | .Ip "\fB\-Wformat-nonliteral\fR" 4 | |
1572 | .IX Item "-Wformat-nonliteral" | |
1573 | If \fB\-Wformat\fR is specified, also warn if the format string is not a | |
1574 | string literal and so cannot be checked, unless the format function | |
1575 | takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR. | |
1576 | .Ip "\fB\-Wformat-security\fR" 4 | |
1577 | .IX Item "-Wformat-security" | |
1578 | If \fB\-Wformat\fR is specified, also warn about uses of format | |
1579 | functions that represent possible security problems. At present, this | |
1580 | warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the | |
1581 | format string is not a string literal and there are no format arguments, | |
1582 | as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format | |
1583 | string came from untrusted input and contains \fB%n\fR. (This is | |
1584 | currently a subset of what \fB\-Wformat-nonliteral\fR warns about, but | |
1585 | in future warnings may be added to \fB\-Wformat-security\fR that are not | |
1586 | included in \fB\-Wformat-nonliteral\fR.) | |
1587 | .Ip "\fB\-Wformat=2\fR" 4 | |
1588 | .IX Item "-Wformat=2" | |
1589 | Enable \fB\-Wformat\fR plus format checks not included in | |
1590 | \&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat | |
1591 | \&\-Wformat-nonliteral \-Wformat-security\fR. | |
1592 | .Ip "\fB\-Wimplicit-int\fR" 4 | |
1593 | .IX Item "-Wimplicit-int" | |
1594 | Warn when a declaration does not specify a type. | |
1595 | .Ip "\fB\-Wimplicit-function-declaration\fR" 4 | |
1596 | .IX Item "-Wimplicit-function-declaration" | |
1597 | .PD 0 | |
1598 | .Ip "\fB\-Werror-implicit-function-declaration\fR" 4 | |
1599 | .IX Item "-Werror-implicit-function-declaration" | |
1600 | .PD | |
1601 | Give a warning (or error) whenever a function is used before being | |
1602 | declared. | |
1603 | .Ip "\fB\-Wimplicit\fR" 4 | |
1604 | .IX Item "-Wimplicit" | |
1605 | Same as \fB\-Wimplicit-int\fR and \fB\-Wimplicit-function-\fR\fBdeclaration\fR. | |
1606 | .Ip "\fB\-Wmain\fR" 4 | |
1607 | .IX Item "-Wmain" | |
1608 | Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a | |
1609 | function with external linkage, returning int, taking either zero | |
1610 | arguments, two, or three arguments of appropriate types. | |
1611 | .Ip "\fB\-Wmultichar\fR" 4 | |
1612 | .IX Item "-Wmultichar" | |
1613 | Warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used. Usually they | |
1614 | indicate a typo in the user's code, as they have implementation-defined | |
1615 | values, and should not be used in portable code. | |
1616 | .Ip "\fB\-Wparentheses\fR" 4 | |
1617 | .IX Item "-Wparentheses" | |
1618 | Warn if parentheses are omitted in certain contexts, such | |
1619 | as when there is an assignment in a context where a truth value | |
1620 | is expected, or when operators are nested whose precedence people | |
1621 | often get confused about. | |
1622 | .Sp | |
1623 | Also warn about constructions where there may be confusion to which | |
1624 | \&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of | |
1625 | such a case: | |
1626 | .Sp | |
1627 | .Vb 7 | |
1628 | \& { | |
1629 | \& if (a) | |
1630 | \& if (b) | |
1631 | \& foo (); | |
1632 | \& else | |
1633 | \& bar (); | |
1634 | \& } | |
1635 | .Ve | |
1636 | In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR | |
1637 | statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is often not | |
1638 | what the programmer expected, as illustrated in the above example by | |
1639 | indentation the programmer chose. When there is the potential for this | |
1640 | confusion, \s-1GNU\s0 C will issue a warning when this flag is specified. | |
1641 | To eliminate the warning, add explicit braces around the innermost | |
1642 | \&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to | |
1643 | the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would look like this: | |
1644 | .Sp | |
1645 | .Vb 9 | |
1646 | \& { | |
1647 | \& if (a) | |
1648 | \& { | |
1649 | \& if (b) | |
1650 | \& foo (); | |
1651 | \& else | |
1652 | \& bar (); | |
1653 | \& } | |
1654 | \& } | |
1655 | .Ve | |
1656 | .Ip "\fB\-Wsequence-point\fR" 4 | |
1657 | .IX Item "-Wsequence-point" | |
1658 | Warn about code that may have undefined semantics because of violations | |
1659 | of sequence point rules in the C standard. | |
1660 | .Sp | |
1661 | The C standard defines the order in which expressions in a C program are | |
1662 | evaluated in terms of \fIsequence points\fR, which represent a partial | |
1663 | ordering between the execution of parts of the program: those executed | |
1664 | before the sequence point, and those executed after it. These occur | |
1665 | after the evaluation of a full expression (one which is not part of a | |
1666 | larger expression), after the evaluation of the first operand of a | |
1667 | \&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a | |
1668 | function is called (but after the evaluation of its arguments and the | |
1669 | expression denoting the called function), and in certain other places. | |
1670 | Other than as expressed by the sequence point rules, the order of | |
1671 | evaluation of subexpressions of an expression is not specified. All | |
1672 | these rules describe only a partial order rather than a total order, | |
1673 | since, for example, if two functions are called within one expression | |
1674 | with no sequence point between them, the order in which the functions | |
1675 | are called is not specified. However, the standards committee have | |
1676 | ruled that function calls do not overlap. | |
1677 | .Sp | |
1678 | It is not specified when between sequence points modifications to the | |
1679 | values of objects take effect. Programs whose behavior depends on this | |
1680 | have undefined behavior; the C standard specifies that ``Between the | |
1681 | previous and next sequence point an object shall have its stored value | |
1682 | modified at most once by the evaluation of an expression. Furthermore, | |
1683 | the prior value shall be read only to determine the value to be | |
1684 | stored.''. If a program breaks these rules, the results on any | |
1685 | particular implementation are entirely unpredictable. | |
1686 | .Sp | |
1687 | Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n] | |
1688 | = b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not | |
1689 | diagnosed by this option, and it may give an occasional false positive | |
1690 | result, but in general it has been found fairly effective at detecting | |
1691 | this sort of problem in programs. | |
1692 | .Sp | |
1693 | The present implementation of this option only works for C programs. A | |
1694 | future implementation may also work for \*(C+ programs. | |
1695 | .Sp | |
1696 | There is some controversy over the precise meaning of the sequence point | |
1697 | rules in subtle cases. Alternative formal definitions may be found in | |
1698 | Clive Feather's ``Annex S'' | |
1699 | <\fBhttp://wwwold.dkuug.dk/JTC1/SC22/WG14/www/docs/n925.htm\fR> and in | |
1700 | Michael Norrish's thesis | |
1701 | <\fBhttp://www.cl.cam.ac.uk/users/mn200/PhD/thesis-report.ps.gz\fR>. | |
1702 | Other discussions are by Raymond Mak | |
1703 | <\fBhttp://wwwold.dkuug.dk/JTC1/SC22/WG14/www/docs/n926.htm\fR> and | |
1704 | D. Hugh Redelmeier | |
1705 | <\fBhttp://wwwold.dkuug.dk/JTC1/SC22/WG14/www/docs/n927.htm\fR>. | |
1706 | .Ip "\fB\-Wreturn-type\fR" 4 | |
1707 | .IX Item "-Wreturn-type" | |
1708 | Warn whenever a function is defined with a return-type that defaults to | |
1709 | \&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no | |
1710 | return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR. | |
1711 | .Sp | |
1712 | For \*(C+, a function without return type always produces a diagnostic | |
1713 | message, even when \fB\-Wno-return-type\fR is specified. The only | |
1714 | exceptions are \fBmain\fR and functions defined in system headers. | |
1715 | .Ip "\fB\-Wswitch\fR" 4 | |
1716 | .IX Item "-Wswitch" | |
1717 | Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumeral type | |
1718 | and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that | |
1719 | enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this | |
1720 | warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also | |
1721 | provoke warnings when this option is used. | |
1722 | .Ip "\fB\-Wtrigraphs\fR" 4 | |
1723 | .IX Item "-Wtrigraphs" | |
1724 | Warn if any trigraphs are encountered that might change the meaning of | |
1725 | the program (trigraphs within comments are not warned about). | |
1726 | .Ip "\fB\-Wunused-function\fR" 4 | |
1727 | .IX Item "-Wunused-function" | |
078721e1 | 1728 | Warn whenever a static function is declared but not defined or a |
4bc1997b JM |
1729 | non\e-inline static function is unused. |
1730 | .Ip "\fB\-Wunused-label\fR" 4 | |
1731 | .IX Item "-Wunused-label" | |
078721e1 | 1732 | Warn whenever a label is declared but not used. |
4bc1997b JM |
1733 | .Sp |
1734 | To suppress this warning use the \fBunused\fR attribute. | |
1735 | .Ip "\fB\-Wunused-parameter\fR" 4 | |
1736 | .IX Item "-Wunused-parameter" | |
078721e1 | 1737 | Warn whenever a function parameter is unused aside from its declaration. |
4bc1997b JM |
1738 | .Sp |
1739 | To suppress this warning use the \fBunused\fR attribute. | |
1740 | .Ip "\fB\-Wunused-variable\fR" 4 | |
1741 | .IX Item "-Wunused-variable" | |
1742 | Warn whenever a local variable or non-constant static variable is unused | |
1743 | aside from its declaration | |
1744 | .Sp | |
1745 | To suppress this warning use the \fBunused\fR attribute. | |
1746 | .Ip "\fB\-Wunused-value\fR" 4 | |
1747 | .IX Item "-Wunused-value" | |
078721e1 | 1748 | Warn whenever a statement computes a result that is explicitly not used. |
4bc1997b JM |
1749 | .Sp |
1750 | To suppress this warning cast the expression to \fBvoid\fR. | |
1751 | .Ip "\fB\-Wunused\fR" 4 | |
1752 | .IX Item "-Wunused" | |
1753 | All all the above \fB\-Wunused\fR options combined. | |
1754 | .Sp | |
078721e1 | 1755 | In order to get a warning about an unused function parameter, you must |
4bc1997b JM |
1756 | either specify \fB\-W \-Wunused\fR or separately specify |
1757 | \&\fB\-Wunused-parameter\fR. | |
1758 | .Ip "\fB\-Wuninitialized\fR" 4 | |
1759 | .IX Item "-Wuninitialized" | |
1760 | Warn if an automatic variable is used without first being initialized or | |
1761 | if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. | |
861bb6c1 JL |
1762 | .Sp |
1763 | These warnings are possible only in optimizing compilation, | |
1764 | because they require data flow information that is computed only | |
4bc1997b | 1765 | when optimizing. If you don't specify \fB\-O\fR, you simply won't |
861bb6c1 JL |
1766 | get these warnings. |
1767 | .Sp | |
1768 | These warnings occur only for variables that are candidates for | |
1769 | register allocation. Therefore, they do not occur for a variable that | |
4bc1997b | 1770 | is declared \f(CW\*(C`volatile\*(C'\fR, or whose address is taken, or whose size |
861bb6c1 JL |
1771 | is other than 1, 2, 4 or 8 bytes. Also, they do not occur for |
1772 | structures, unions or arrays, even when they are in registers. | |
1773 | .Sp | |
1774 | Note that there may be no warning about a variable that is used only | |
1775 | to compute a value that itself is never used, because such | |
1776 | computations may be deleted by data flow analysis before the warnings | |
1777 | are printed. | |
1778 | .Sp | |
4bc1997b | 1779 | These warnings are made optional because \s-1GCC\s0 is not smart |
861bb6c1 JL |
1780 | enough to see all the reasons why the code might be correct |
1781 | despite appearing to have an error. Here is one example of how | |
1782 | this can happen: | |
1783 | .Sp | |
4bc1997b JM |
1784 | .Vb 12 |
1785 | \& { | |
1786 | \& int x; | |
1787 | \& switch (y) | |
1788 | \& { | |
1789 | \& case 1: x = 1; | |
1790 | \& break; | |
1791 | \& case 2: x = 4; | |
1792 | \& break; | |
1793 | \& case 3: x = 5; | |
1794 | \& } | |
1795 | \& foo (x); | |
1796 | \& } | |
1797 | .Ve | |
1798 | If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is | |
1799 | always initialized, but \s-1GCC\s0 doesn't know this. Here is | |
861bb6c1 JL |
1800 | another common case: |
1801 | .Sp | |
4bc1997b JM |
1802 | .Vb 6 |
1803 | \& { | |
1804 | \& int save_y; | |
1805 | \& if (change_y) save_y = y, y = new_y; | |
1806 | \& ... | |
1807 | \& if (change_y) y = save_y; | |
1808 | \& } | |
1809 | .Ve | |
1810 | This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set. | |
1811 | .Sp | |
1812 | This option also warns when a non-volatile automatic variable might be | |
1813 | changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible | |
1814 | only in optimizing compilation. | |
1815 | .Sp | |
1816 | The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know | |
1817 | where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could | |
1818 | call it at any point in the code. As a result, you may get a warning | |
1819 | even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot | |
1820 | in fact be called at the place which would cause a problem. | |
861bb6c1 | 1821 | .Sp |
4bc1997b JM |
1822 | Some spurious warnings can be avoided if you declare all the functions |
1823 | you use that never return as \f(CW\*(C`noreturn\*(C'\fR. | |
1824 | .Ip "\fB\-Wreorder (\*(C+ only)\fR" 4 | |
1825 | .IX Item "-Wreorder ( only)" | |
1826 | Warn when the order of member initializers given in the code does not | |
1827 | match the order in which they must be executed. For instance: | |
1828 | .Ip "\fB\-Wunknown-pragmas\fR" 4 | |
1829 | .IX Item "-Wunknown-pragmas" | |
1830 | Warn when a #pragma directive is encountered which is not understood by | |
1831 | \&\s-1GCC\s0. If this command line option is used, warnings will even be issued | |
1832 | for unknown pragmas in system header files. This is not the case if | |
1833 | the warnings were only enabled by the \fB\-Wall\fR command line option. | |
1834 | .Ip "\fB\-Wall\fR" 4 | |
1835 | .IX Item "-Wall" | |
1836 | All of the above \fB\-W\fR options combined. This enables all the | |
1837 | warnings about constructions that some users consider questionable, and | |
1838 | that are easy to avoid (or modify to prevent the warning), even in | |
1839 | conjunction with macros. | |
1840 | .Ip "\fB\-Wsystem-headers\fR" 4 | |
1841 | .IX Item "-Wsystem-headers" | |
1842 | Print warning messages for constructs found in system header files. | |
1843 | Warnings from system headers are normally suppressed, on the assumption | |
1844 | that they usually do not indicate real problems and would only make the | |
1845 | compiler output harder to read. Using this command line option tells | |
1846 | \&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user | |
1847 | code. However, note that using \fB\-Wall\fR in conjunction with this | |
1848 | option will \fInot\fR warn about unknown pragmas in system | |
1849 | headers\-\-\-for that, \fB\-Wunknown-pragmas\fR must also be used. | |
861bb6c1 | 1850 | .PP |
4bc1997b JM |
1851 | The following \fB\-W...\fR options are not implied by \fB\-Wall\fR. |
1852 | Some of them warn about constructions that users generally do not | |
1853 | consider questionable, but which occasionally you might wish to check | |
1854 | for; others warn about constructions that are necessary or hard to avoid | |
1855 | in some cases, and there is no simple way to modify the code to suppress | |
1856 | the warning. | |
1857 | .Ip "\fB\-W\fR" 4 | |
1858 | .IX Item "-W" | |
1859 | Print extra warning messages for these events: | |
1860 | .RS 4 | |
1861 | .Ip "\(bu" 4 | |
1862 | A function can return either with or without a value. (Falling | |
1863 | off the end of the function body is considered returning without | |
1864 | a value.) For example, this function would evoke such a | |
1865 | warning: | |
1866 | .Sp | |
1867 | .Vb 5 | |
1868 | \& foo (a) | |
1869 | \& { | |
1870 | \& if (a > 0) | |
1871 | \& return a; | |
1872 | \& } | |
1873 | .Ve | |
1874 | .Ip "\(bu" 4 | |
1875 | An expression-statement or the left-hand side of a comma expression | |
1876 | contains no side effects. | |
1877 | To suppress the warning, cast the unused expression to void. | |
1878 | For example, an expression such as \fBx[i,j]\fR will cause a warning, | |
1879 | but \fBx[(void)i,j]\fR will not. | |
1880 | .Ip "\(bu" 4 | |
1881 | An unsigned value is compared against zero with \fB<\fR or \fB<=\fR. | |
1882 | .Ip "\(bu" 4 | |
1883 | A comparison like \fBx<=y<=z\fR appears; this is equivalent to | |
1884 | \&\fB(x<=y ? 1 : 0) <= z\fR, which is a different interpretation from | |
1885 | that of ordinary mathematical notation. | |
1886 | .Ip "\(bu" 4 | |
1887 | Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in | |
1888 | a declaration. According to the C Standard, this usage is obsolescent. | |
1889 | .Ip "\(bu" 4 | |
1890 | The return type of a function has a type qualifier such as \f(CW\*(C`const\*(C'\fR. | |
1891 | Such a type qualifier has no effect, since the value returned by a | |
1892 | function is not an lvalue. (But don't warn about the \s-1GNU\s0 extension of | |
1893 | \&\f(CW\*(C`volatile void\*(C'\fR return types. That extension will be warned about | |
1894 | if \fB\-pedantic\fR is specified.) | |
1895 | .Ip "\(bu" 4 | |
1896 | If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused | |
1897 | arguments. | |
1898 | .Ip "\(bu" 4 | |
1899 | A comparison between signed and unsigned values could produce an | |
1900 | incorrect result when the signed value is converted to unsigned. | |
1901 | (But don't warn if \fB\-Wno-sign-compare\fR is also specified.) | |
1902 | .Ip "\(bu" 4 | |
1903 | An aggregate has a partly bracketed initializer. | |
1904 | For example, the following code would evoke such a warning, | |
1905 | because braces are missing around the initializer for \f(CW\*(C`x.h\*(C'\fR: | |
1906 | .Sp | |
1907 | .Vb 3 | |
1908 | \& struct s { int f, g; }; | |
1909 | \& struct t { struct s h; int i; }; | |
1910 | \& struct t x = { 1, 2, 3 }; | |
1911 | .Ve | |
1912 | .Ip "\(bu" 4 | |
1913 | An aggregate has an initializer which does not initialize all members. | |
1914 | For example, the following code would cause such a warning, because | |
1915 | \&\f(CW\*(C`x.h\*(C'\fR would be implicitly initialized to zero: | |
1916 | .Sp | |
1917 | .Vb 2 | |
1918 | \& struct s { int f, g, h; }; | |
1919 | \& struct s x = { 3, 4 }; | |
1920 | .Ve | |
1921 | .RE | |
1922 | .RS 4 | |
1923 | .RE | |
1924 | .Ip "\fB\-Wfloat-equal\fR" 4 | |
1925 | .IX Item "-Wfloat-equal" | |
1926 | Warn if floating point values are used in equality comparisons. | |
1927 | .Sp | |
1928 | The idea behind this is that sometimes it is convenient (for the | |
1929 | programmer) to consider floating-point values as approximations to | |
1930 | infinitely precise real numbers. If you are doing this, then you need | |
1931 | to compute (by analysing the code, or in some other way) the maximum or | |
1932 | likely maximum error that the computation introduces, and allow for it | |
1933 | when performing comparisons (and when producing output, but that's a | |
1934 | different problem). In particular, instead of testing for equality, you | |
1935 | would check to see whether the two values have ranges that overlap; and | |
1936 | this is done with the relational operators, so equality comparisons are | |
1937 | probably mistaken. | |
1938 | .Ip "\fB\-Wtraditional (C only)\fR" 4 | |
1939 | .IX Item "-Wtraditional (C only)" | |
861bb6c1 | 1940 | Warn about certain constructs that behave differently in traditional and |
4bc1997b JM |
1941 | \&\s-1ISO\s0 C. |
1942 | .RS 4 | |
1943 | .Ip "\(bu" 4 | |
861bb6c1 JL |
1944 | Macro arguments occurring within string constants in the macro body. |
1945 | These would substitute the argument in traditional C, but are part of | |
4bc1997b JM |
1946 | the constant in \s-1ISO\s0 C. |
1947 | .Ip "\(bu" 4 | |
861bb6c1 JL |
1948 | A function declared external in one block and then used after the end of |
1949 | the block. | |
4bc1997b JM |
1950 | .Ip "\(bu" 4 |
1951 | A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR. | |
1952 | .Ip "\(bu" 4 | |
1953 | A non-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one. | |
1954 | This construct is not accepted by some traditional C compilers. | |
1955 | .Ip "\(bu" 4 | |
1956 | The \s-1ISO\s0 type of an integer constant has a different width or | |
1957 | signedness from its traditional type. This warning is only issued if | |
1958 | the base of the constant is ten. I.e. hexadecimal or octal values, which | |
1959 | typically represent bit patterns, are not warned about. | |
1960 | .Ip "\(bu" 4 | |
1961 | Usage of \s-1ISO\s0 string concatenation is detected. | |
1962 | .Ip "\(bu" 4 | |
1963 | A function macro appears without arguments. | |
1964 | .Ip "\(bu" 4 | |
1965 | The unary plus operator. | |
1966 | .Ip "\(bu" 4 | |
1967 | Initialization of automatic aggregates. | |
1968 | .Ip "\(bu" 4 | |
1969 | Identifier conflicts with labels. Traditional C lacks a separate | |
1970 | namespace for labels. | |
1971 | .Ip "\(bu" 4 | |
1972 | Initialization of unions. If the initializer is zero, the warning is | |
1973 | omitted. This is done under the assumption that the zero initializer in | |
1974 | user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing | |
1975 | initializer warnings and relies on default initialization to zero in the | |
1976 | traditional C case. | |
1977 | .Ip "\(bu" 4 | |
1978 | The `U' integer constant suffix, or the `F' or `L' floating point | |
1979 | constant suffixes. (Traditonal C does support the `L' suffix on integer | |
1980 | constants.) Note, these suffixes appear in macros defined in the system | |
1981 | headers of most modern systems, e.g. the _MIN/_MAX macros in limits.h. | |
1982 | Use of these macros can lead to spurious warnings as they do not | |
1983 | necessarily reflect whether the code in question is any less portable to | |
1984 | traditional C given that suitable backup definitions are provided. | |
1985 | .RE | |
1986 | .RS 4 | |
1987 | .RE | |
1988 | .Ip "\fB\-Wundef\fR" 4 | |
1989 | .IX Item "-Wundef" | |
1990 | Warn if an undefined identifier is evaluated in an \fB#if\fR directive. | |
1991 | .Ip "\fB\-Wshadow\fR" 4 | |
1992 | .IX Item "-Wshadow" | |
861bb6c1 | 1993 | Warn whenever a local variable shadows another local variable. |
4bc1997b JM |
1994 | .Ip "\fB\-Wid-clash-\fR\fIlen\fR" 4 |
1995 | .IX Item "-Wid-clash-len" | |
1996 | Warn whenever two distinct identifiers match in the first \fIlen\fR | |
861bb6c1 JL |
1997 | characters. This may help you prepare a program that will compile |
1998 | with certain obsolete, brain-damaged compilers. | |
4bc1997b JM |
1999 | .Ip "\fB\-Wlarger-than-\fR\fIlen\fR" 4 |
2000 | .IX Item "-Wlarger-than-len" | |
2001 | Warn whenever an object of larger than \fIlen\fR bytes is defined. | |
2002 | .Ip "\fB\-Wpointer-arith\fR" 4 | |
2003 | .IX Item "-Wpointer-arith" | |
2004 | Warn about anything that depends on the ``size of'' a function type or | |
2005 | of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for | |
2006 | convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers | |
861bb6c1 | 2007 | to functions. |
4bc1997b JM |
2008 | .Ip "\fB\-Wbad-function-cast (C only)\fR" 4 |
2009 | .IX Item "-Wbad-function-cast (C only)" | |
2010 | Warn whenever a function call is cast to a non-matching type. | |
2011 | For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR. | |
2012 | .Ip "\fB\-Wcast-qual\fR" 4 | |
2013 | .IX Item "-Wcast-qual" | |
861bb6c1 | 2014 | Warn whenever a pointer is cast so as to remove a type qualifier from |
4bc1997b JM |
2015 | the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast |
2016 | to an ordinary \f(CW\*(C`char *\*(C'\fR. | |
2017 | .Ip "\fB\-Wcast-align\fR" 4 | |
2018 | .IX Item "-Wcast-align" | |
861bb6c1 | 2019 | Warn whenever a pointer is cast such that the required alignment of the |
4bc1997b JM |
2020 | target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to |
2021 | an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at | |
861bb6c1 | 2022 | two- or four-byte boundaries. |
4bc1997b JM |
2023 | .Ip "\fB\-Wwrite-strings\fR" 4 |
2024 | .IX Item "-Wwrite-strings" | |
2025 | Give string constants the type \f(CW\*(C`const char[\f(CIlength\f(CW]\*(C'\fR so that | |
2026 | copying the address of one into a non-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR | |
861bb6c1 JL |
2027 | pointer will get a warning. These warnings will help you find at |
2028 | compile time code that can try to write into a string constant, but | |
4bc1997b | 2029 | only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in |
861bb6c1 | 2030 | declarations and prototypes. Otherwise, it will just be a nuisance; |
4bc1997b JM |
2031 | this is why we did not make \fB\-Wall\fR request these warnings. |
2032 | .Ip "\fB\-Wconversion\fR" 4 | |
2033 | .IX Item "-Wconversion" | |
861bb6c1 JL |
2034 | Warn if a prototype causes a type conversion that is different from what |
2035 | would happen to the same argument in the absence of a prototype. This | |
2036 | includes conversions of fixed point to floating and vice versa, and | |
2037 | conversions changing the width or signedness of a fixed point argument | |
2038 | except when the same as the default promotion. | |
4bc1997b JM |
2039 | .Sp |
2040 | Also, warn if a negative integer constant expression is implicitly | |
2041 | converted to an unsigned type. For example, warn about the assignment | |
2042 | \&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit | |
2043 | casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR. | |
2044 | .Ip "\fB\-Wsign-compare\fR" 4 | |
2045 | .IX Item "-Wsign-compare" | |
2046 | Warn when a comparison between signed and unsigned values could produce | |
2047 | an incorrect result when the signed value is converted to unsigned. | |
2048 | This warning is also enabled by \fB\-W\fR; to get the other warnings | |
2049 | of \fB\-W\fR without this warning, use \fB\-W \-Wno-sign-compare\fR. | |
2050 | .Ip "\fB\-Waggregate-return\fR" 4 | |
2051 | .IX Item "-Waggregate-return" | |
861bb6c1 JL |
2052 | Warn if any functions that return structures or unions are defined or |
2053 | called. (In languages where you can return an array, this also elicits | |
2054 | a warning.) | |
4bc1997b JM |
2055 | .Ip "\fB\-Wstrict-prototypes (C only)\fR" 4 |
2056 | .IX Item "-Wstrict-prototypes (C only)" | |
861bb6c1 JL |
2057 | Warn if a function is declared or defined without specifying the |
2058 | argument types. (An old-style function definition is permitted without | |
2059 | a warning if preceded by a declaration which specifies the argument | |
2060 | types.) | |
4bc1997b JM |
2061 | .Ip "\fB\-Wmissing-prototypes (C only)\fR" 4 |
2062 | .IX Item "-Wmissing-prototypes (C only)" | |
861bb6c1 JL |
2063 | Warn if a global function is defined without a previous prototype |
2064 | declaration. This warning is issued even if the definition itself | |
2065 | provides a prototype. The aim is to detect global functions that fail | |
2066 | to be declared in header files. | |
4bc1997b JM |
2067 | .Ip "\fB\-Wmissing-declarations\fR" 4 |
2068 | .IX Item "-Wmissing-declarations" | |
861bb6c1 JL |
2069 | Warn if a global function is defined without a previous declaration. |
2070 | Do so even if the definition itself provides a prototype. | |
2071 | Use this option to detect global functions that are not declared in | |
2072 | header files. | |
4bc1997b JM |
2073 | .Ip "\fB\-Wmissing-noreturn\fR" 4 |
2074 | .IX Item "-Wmissing-noreturn" | |
2075 | Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR. | |
2076 | Note these are only possible candidates, not absolute ones. Care should | |
2077 | be taken to manually verify functions actually do not ever return before | |
2078 | adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation | |
2079 | bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in | |
2080 | hosted C environments. | |
2081 | .Ip "\fB\-Wmissing-format-attribute\fR" 4 | |
2082 | .IX Item "-Wmissing-format-attribute" | |
2083 | If \fB\-Wformat\fR is enabled, also warn about functions which might be | |
2084 | candidates for \f(CW\*(C`format\*(C'\fR attributes. Note these are only possible | |
2085 | candidates, not absolute ones. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR | |
2086 | attributes might be appropriate for any function that calls a function | |
2087 | like \f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the | |
2088 | case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are | |
2089 | appropriate may not be detected. This option has no effect unless | |
2090 | \&\fB\-Wformat\fR is enabled (possibly by \fB\-Wall\fR). | |
2091 | .Ip "\fB\-Wpacked\fR" 4 | |
2092 | .IX Item "-Wpacked" | |
2093 | Warn if a structure is given the packed attribute, but the packed | |
2094 | attribute has no effect on the layout or size of the structure. | |
2095 | Such structures may be mis-aligned for little benefit. For | |
2096 | instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR | |
2097 | will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself | |
2098 | have the packed attribute: | |
2099 | .Sp | |
2100 | .Vb 8 | |
2101 | \& struct foo { | |
2102 | \& int x; | |
2103 | \& char a, b, c, d; | |
2104 | \& } __attribute__((packed)); | |
2105 | \& struct bar { | |
2106 | \& char z; | |
2107 | \& struct foo f; | |
2108 | \& }; | |
2109 | .Ve | |
2110 | .Ip "\fB\-Wpadded\fR" 4 | |
2111 | .IX Item "-Wpadded" | |
2112 | Warn if padding is included in a structure, either to align an element | |
2113 | of the structure or to align the whole structure. Sometimes when this | |
2114 | happens it is possible to rearrange the fields of the structure to | |
2115 | reduce the padding and so make the structure smaller. | |
2116 | .Ip "\fB\-Wredundant-decls\fR" 4 | |
2117 | .IX Item "-Wredundant-decls" | |
861bb6c1 JL |
2118 | Warn if anything is declared more than once in the same scope, even in |
2119 | cases where multiple declaration is valid and changes nothing. | |
4bc1997b JM |
2120 | .Ip "\fB\-Wnested-externs (C only)\fR" 4 |
2121 | .IX Item "-Wnested-externs (C only)" | |
2122 | Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function. | |
2123 | .Ip "\fB\-Wunreachable-code\fR" 4 | |
2124 | .IX Item "-Wunreachable-code" | |
2125 | Warn if the compiler detects that code will never be executed. | |
2126 | .Sp | |
2127 | This option is intended to warn when the compiler detects that at | |
2128 | least a whole line of source code will never be executed, because | |
2129 | some condition is never satisfied or because it is after a | |
2130 | procedure that never returns. | |
2131 | .Sp | |
2132 | It is possible for this option to produce a warning even though there | |
2133 | are circumstances under which part of the affected line can be executed, | |
2134 | so care should be taken when removing apparently-unreachable code. | |
2135 | .Sp | |
2136 | For instance, when a function is inlined, a warning may mean that the | |
2137 | line is unreachable in only one inlined copy of the function. | |
2138 | .Sp | |
2139 | This option is not made part of \fB\-Wall\fR because in a debugging | |
2140 | version of a program there is often substantial code which checks | |
2141 | correct functioning of the program and is, hopefully, unreachable | |
2142 | because the program does work. Another common use of unreachable | |
2143 | code is to provide behaviour which is selectable at compile-time. | |
2144 | .Ip "\fB\-Winline\fR" 4 | |
2145 | .IX Item "-Winline" | |
2146 | Warn if a function can not be inlined and it was declared as inline. | |
2147 | .Ip "\fB\-Wlong-long\fR" 4 | |
2148 | .IX Item "-Wlong-long" | |
2149 | Warn if \fBlong long\fR type is used. This is default. To inhibit | |
2150 | the warning messages, use \fB\-Wno-long-long\fR. Flags | |
2151 | \&\fB\-Wlong-long\fR and \fB\-Wno-long-long\fR are taken into account | |
2152 | only when \fB\-pedantic\fR flag is used. | |
2153 | .Ip "\fB\-Wdisabled-optimization\fR" 4 | |
2154 | .IX Item "-Wdisabled-optimization" | |
2155 | Warn if a requested optimization pass is disabled. This warning does | |
2156 | not generally indicate that there is anything wrong with your code; it | |
2157 | merely indicates that \s-1GCC\s0's optimizers were unable to handle the code | |
2158 | effectively. Often, the problem is that your code is too big or too | |
2159 | complex; \s-1GCC\s0 will refuse to optimize programs when the optimization | |
2160 | itself is likely to take inordinate amounts of time. | |
2161 | .Ip "\fB\-Werror\fR" 4 | |
2162 | .IX Item "-Werror" | |
2163 | Make all warnings into errors. | |
2164 | .Sh "Options for Debugging Your Program or \s-1GCC\s0" | |
2165 | .IX Subsection "Options for Debugging Your Program or GCC" | |
2166 | \&\s-1GCC\s0 has various special options that are used for debugging | |
2167 | either your program or \s-1GCC:\s0 | |
2168 | .Ip "\fB\-g\fR" 4 | |
2169 | .IX Item "-g" | |
861bb6c1 | 2170 | Produce debugging information in the operating system's native format |
4bc1997b | 2171 | (stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0). \s-1GDB\s0 can work with this debugging |
861bb6c1 JL |
2172 | information. |
2173 | .Sp | |
4bc1997b JM |
2174 | On most systems that use stabs format, \fB\-g\fR enables use of extra |
2175 | debugging information that only \s-1GDB\s0 can use; this extra information | |
2176 | makes debugging work better in \s-1GDB\s0 but will probably make other debuggers | |
861bb6c1 JL |
2177 | crash or |
2178 | refuse to read the program. If you want to control for certain whether | |
4bc1997b JM |
2179 | to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR, |
2180 | \&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, \fB\-gdwarf-1+\fR, or \fB\-gdwarf-1\fR | |
861bb6c1 JL |
2181 | (see below). |
2182 | .Sp | |
4bc1997b JM |
2183 | Unlike most other C compilers, \s-1GCC\s0 allows you to use \fB\-g\fR with |
2184 | \&\fB\-O\fR. The shortcuts taken by optimized code may occasionally | |
861bb6c1 JL |
2185 | produce surprising results: some variables you declared may not exist |
2186 | at all; flow of control may briefly move where you did not expect it; | |
2187 | some statements may not be executed because they compute constant | |
2188 | results or their values were already at hand; some statements may | |
2189 | execute in different places because they were moved out of loops. | |
2190 | .Sp | |
2191 | Nevertheless it proves possible to debug optimized output. This makes | |
2192 | it reasonable to use the optimizer for programs that might have bugs. | |
4bc1997b JM |
2193 | .Sp |
2194 | The following options are useful when \s-1GCC\s0 is generated with the | |
861bb6c1 | 2195 | capability for more than one debugging format. |
4bc1997b JM |
2196 | .Ip "\fB\-ggdb\fR" 4 |
2197 | .IX Item "-ggdb" | |
2198 | Produce debugging information for use by \s-1GDB\s0. This means to use the | |
2199 | most expressive format available (\s-1DWARF\s0 2, stabs, or the native format | |
2200 | if neither of those are supported), including \s-1GDB\s0 extensions if at all | |
2201 | possible. | |
2202 | .Ip "\fB\-gstabs\fR" 4 | |
2203 | .IX Item "-gstabs" | |
861bb6c1 | 2204 | Produce debugging information in stabs format (if that is supported), |
4bc1997b JM |
2205 | without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0 |
2206 | systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option | |
2207 | produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0. | |
2208 | On System V Release 4 systems this option requires the \s-1GNU\s0 assembler. | |
2209 | .Ip "\fB\-gstabs+\fR" 4 | |
2210 | .IX Item "-gstabs+" | |
861bb6c1 | 2211 | Produce debugging information in stabs format (if that is supported), |
4bc1997b | 2212 | using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The |
861bb6c1 JL |
2213 | use of these extensions is likely to make other debuggers crash or |
2214 | refuse to read the program. | |
4bc1997b JM |
2215 | .Ip "\fB\-gcoff\fR" 4 |
2216 | .IX Item "-gcoff" | |
2217 | Produce debugging information in \s-1COFF\s0 format (if that is supported). | |
2218 | This is the format used by \s-1SDB\s0 on most System V systems prior to | |
861bb6c1 | 2219 | System V Release 4. |
4bc1997b JM |
2220 | .Ip "\fB\-gxcoff\fR" 4 |
2221 | .IX Item "-gxcoff" | |
2222 | Produce debugging information in \s-1XCOFF\s0 format (if that is supported). | |
2223 | This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems. | |
2224 | .Ip "\fB\-gxcoff+\fR" 4 | |
2225 | .IX Item "-gxcoff+" | |
2226 | Produce debugging information in \s-1XCOFF\s0 format (if that is supported), | |
2227 | using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The | |
861bb6c1 | 2228 | use of these extensions is likely to make other debuggers crash or |
4bc1997b JM |
2229 | refuse to read the program, and may cause assemblers other than the \s-1GNU\s0 |
2230 | assembler (\s-1GAS\s0) to fail with an error. | |
2231 | .Ip "\fB\-gdwarf\fR" 4 | |
2232 | .IX Item "-gdwarf" | |
2233 | Produce debugging information in \s-1DWARF\s0 version 1 format (if that is | |
2234 | supported). This is the format used by \s-1SDB\s0 on most System V Release 4 | |
2235 | systems. | |
2236 | .Ip "\fB\-gdwarf+\fR" 4 | |
2237 | .IX Item "-gdwarf+" | |
2238 | Produce debugging information in \s-1DWARF\s0 version 1 format (if that is | |
2239 | supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger | |
2240 | (\s-1GDB\s0). The use of these extensions is likely to make other debuggers | |
2241 | crash or refuse to read the program. | |
2242 | .Ip "\fB\-gdwarf-2\fR" 4 | |
2243 | .IX Item "-gdwarf-2" | |
2244 | Produce debugging information in \s-1DWARF\s0 version 2 format (if that is | |
2245 | supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. | |
2246 | .Ip "\fB\-g\fR\fIlevel\fR" 4 | |
2247 | .IX Item "-glevel" | |
2248 | .PD 0 | |
2249 | .Ip "\fB\-ggdb\fR\fIlevel\fR" 4 | |
2250 | .IX Item "-ggdblevel" | |
2251 | .Ip "\fB\-gstabs\fR\fIlevel\fR" 4 | |
2252 | .IX Item "-gstabslevel" | |
2253 | .Ip "\fB\-gcoff\fR\fIlevel\fR" 4 | |
2254 | .IX Item "-gcofflevel" | |
2255 | .Ip "\fB\-gxcoff\fR\fIlevel\fR" 4 | |
2256 | .IX Item "-gxcofflevel" | |
2257 | .Ip "\fB\-gdwarf\fR\fIlevel\fR" 4 | |
2258 | .IX Item "-gdwarflevel" | |
2259 | .Ip "\fB\-gdwarf-2\fR\fIlevel\fR" 4 | |
2260 | .IX Item "-gdwarf-2level" | |
2261 | .PD | |
2262 | Request debugging information and also use \fIlevel\fR to specify how | |
861bb6c1 JL |
2263 | much information. The default level is 2. |
2264 | .Sp | |
2265 | Level 1 produces minimal information, enough for making backtraces in | |
2266 | parts of the program that you don't plan to debug. This includes | |
2267 | descriptions of functions and external variables, but no information | |
2268 | about local variables and no line numbers. | |
2269 | .Sp | |
2270 | Level 3 includes extra information, such as all the macro definitions | |
2271 | present in the program. Some debuggers support macro expansion when | |
4bc1997b JM |
2272 | you use \fB\-g3\fR. |
2273 | .Ip "\fB\-p\fR" 4 | |
2274 | .IX Item "-p" | |
861bb6c1 | 2275 | Generate extra code to write profile information suitable for the |
4bc1997b JM |
2276 | analysis program \f(CW\*(C`prof\*(C'\fR. You must use this option when compiling |
2277 | the source files you want data about, and you must also use it when | |
2278 | linking. | |
2279 | .Ip "\fB\-pg\fR" 4 | |
2280 | .IX Item "-pg" | |
861bb6c1 | 2281 | Generate extra code to write profile information suitable for the |
4bc1997b JM |
2282 | analysis program \f(CW\*(C`gprof\*(C'\fR. You must use this option when compiling |
2283 | the source files you want data about, and you must also use it when | |
2284 | linking. | |
2285 | .Ip "\fB\-a\fR" 4 | |
2286 | .IX Item "-a" | |
2287 | Generate extra code to write profile information for basic blocks, which will | |
2288 | record the number of times each basic block is executed, the basic block start | |
2289 | address, and the function name containing the basic block. If \fB\-g\fR is | |
2290 | used, the line number and filename of the start of the basic block will also be | |
2291 | recorded. If not overridden by the machine description, the default action is | |
2292 | to append to the text file \fIbb.out\fR. | |
2293 | .Sp | |
2294 | This data could be analyzed by a program like \f(CW\*(C`tcov\*(C'\fR. Note, | |
2295 | however, that the format of the data is not what \f(CW\*(C`tcov\*(C'\fR expects. | |
2296 | Eventually \s-1GNU\s0 \f(CW\*(C`gprof\*(C'\fR should be extended to process this data. | |
2297 | .Ip "\fB\-Q\fR" 4 | |
2298 | .IX Item "-Q" | |
2299 | Makes the compiler print out each function name as it is compiled, and | |
2300 | print some statistics about each pass when it finishes. | |
2301 | .Ip "\fB\-ax\fR" 4 | |
2302 | .IX Item "-ax" | |
2303 | Generate extra code to profile basic blocks. Your executable will | |
2304 | produce output that is a superset of that produced when \fB\-a\fR is | |
2305 | used. Additional output is the source and target address of the basic | |
2306 | blocks where a jump takes place, the number of times a jump is executed, | |
2307 | and (optionally) the complete sequence of basic blocks being executed. | |
2308 | The output is appended to file \fIbb.out\fR. | |
2309 | .Sp | |
2310 | You can examine different profiling aspects without recompilation. Your | |
2311 | executable will read a list of function names from file \fIbb.in\fR. | |
2312 | Profiling starts when a function on the list is entered and stops when | |
2313 | that invocation is exited. To exclude a function from profiling, prefix | |
2314 | its name with `\-'. If a function name is not unique, you can | |
2315 | disambiguate it by writing it in the form | |
2316 | \&\fB/path/filename.d:functionname\fR. Your executable will write the | |
2317 | available paths and filenames in file \fIbb.out\fR. | |
2318 | .Sp | |
2319 | Several function names have a special meaning: | |
2320 | .RS 4 | |
2321 | .if n .Ip "\f(CW""_\|_bb_jumps_\|_""\fR" 4 | |
2322 | .el .Ip "\f(CW_\|_bb_jumps_\|_\fR" 4 | |
2323 | .IX Item "__bb_jumps__" | |
2324 | Write source, target and frequency of jumps to file \fIbb.out\fR. | |
2325 | .if n .Ip "\f(CW""_\|_bb_hidecall_\|_""\fR" 4 | |
2326 | .el .Ip "\f(CW_\|_bb_hidecall_\|_\fR" 4 | |
2327 | .IX Item "__bb_hidecall__" | |
2328 | Exclude function calls from frequency count. | |
2329 | .if n .Ip "\f(CW""_\|_bb_showret_\|_""\fR" 4 | |
2330 | .el .Ip "\f(CW_\|_bb_showret_\|_\fR" 4 | |
2331 | .IX Item "__bb_showret__" | |
2332 | Include function returns in frequency count. | |
2333 | .if n .Ip "\f(CW""_\|_bb_trace_\|_""\fR" 4 | |
2334 | .el .Ip "\f(CW_\|_bb_trace_\|_\fR" 4 | |
2335 | .IX Item "__bb_trace__" | |
2336 | Write the sequence of basic blocks executed to file \fIbbtrace.gz\fR. | |
2337 | The file will be compressed using the program \fBgzip\fR, which must | |
2338 | exist in your \fB\s-1PATH\s0\fR. On systems without the \fBpopen\fR | |
2339 | function, the file will be named \fIbbtrace\fR and will not be | |
2340 | compressed. \fBProfiling for even a few seconds on these systems | |
2341 | will produce a very large file.\fR Note: \f(CW\*(C`_\|_bb_hidecall_\|_\*(C'\fR and | |
2342 | \&\f(CW\*(C`_\|_bb_showret_\|_\*(C'\fR will not affect the sequence written to | |
2343 | \&\fIbbtrace.gz\fR. | |
2344 | .RE | |
2345 | .RS 4 | |
2346 | .Sp | |
2347 | Here's a short example using different profiling parameters | |
2348 | in file \fIbb.in\fR. Assume function \f(CW\*(C`foo\*(C'\fR consists of basic blocks | |
2349 | 1 and 2 and is called twice from block 3 of function \f(CW\*(C`main\*(C'\fR. After | |
2350 | the calls, block 3 transfers control to block 4 of \f(CW\*(C`main\*(C'\fR. | |
2351 | .Sp | |
2352 | With \f(CW\*(C`_\|_bb_trace_\|_\*(C'\fR and \f(CW\*(C`main\*(C'\fR contained in file \fIbb.in\fR, | |
2353 | the following sequence of blocks is written to file \fIbbtrace.gz\fR: | |
2354 | 0 3 1 2 1 2 4. The return from block 2 to block 3 is not shown, because | |
2355 | the return is to a point inside the block and not to the top. The | |
2356 | block address 0 always indicates, that control is transferred | |
2357 | to the trace from somewhere outside the observed functions. With | |
2358 | \&\fB\-foo\fR added to \fIbb.in\fR, the blocks of function | |
2359 | \&\f(CW\*(C`foo\*(C'\fR are removed from the trace, so only 0 3 4 remains. | |
2360 | .Sp | |
2361 | With \f(CW\*(C`_\|_bb_jumps_\|_\*(C'\fR and \f(CW\*(C`main\*(C'\fR contained in file \fIbb.in\fR, | |
2362 | jump frequencies will be written to file \fIbb.out\fR. The | |
2363 | frequencies are obtained by constructing a trace of blocks | |
2364 | and incrementing a counter for every neighbouring pair of blocks | |
2365 | in the trace. The trace 0 3 1 2 1 2 4 displays the following | |
2366 | frequencies: | |
2367 | .Sp | |
2368 | .Vb 5 | |
2369 | \& Jump from block 0x0 to block 0x3 executed 1 time(s) | |
2370 | \& Jump from block 0x3 to block 0x1 executed 1 time(s) | |
2371 | \& Jump from block 0x1 to block 0x2 executed 2 time(s) | |
2372 | \& Jump from block 0x2 to block 0x1 executed 1 time(s) | |
2373 | \& Jump from block 0x2 to block 0x4 executed 1 time(s) | |
2374 | .Ve | |
2375 | With \f(CW\*(C`_\|_bb_hidecall_\|_\*(C'\fR, control transfer due to call instructions | |
2376 | is removed from the trace, that is the trace is cut into three parts: 0 | |
2377 | 3 4, 0 1 2 and 0 1 2. With \f(CW\*(C`_\|_bb_showret_\|_\*(C'\fR, control transfer due | |
2378 | to return instructions is added to the trace. The trace becomes: 0 3 1 | |
2379 | 2 3 1 2 3 4. Note, that this trace is not the same, as the sequence | |
2380 | written to \fIbbtrace.gz\fR. It is solely used for counting jump | |
2381 | frequencies. | |
2382 | .RE | |
2383 | .Ip "\fB\-fprofile-arcs\fR" 4 | |
2384 | .IX Item "-fprofile-arcs" | |
2385 | Instrument \fIarcs\fR during compilation. For each function of your | |
2386 | program, \s-1GCC\s0 creates a program flow graph, then finds a spanning tree | |
2387 | for the graph. Only arcs that are not on the spanning tree have to be | |
2388 | instrumented: the compiler adds code to count the number of times that these | |
2389 | arcs are executed. When an arc is the only exit or only entrance to a | |
2390 | block, the instrumentation code can be added to the block; otherwise, a | |
2391 | new basic block must be created to hold the instrumentation code. | |
2392 | .Sp | |
2393 | Since not every arc in the program must be instrumented, programs | |
2394 | compiled with this option run faster than programs compiled with | |
2395 | \&\fB\-a\fR, which adds instrumentation code to every basic block in the | |
2396 | program. The tradeoff: since \f(CW\*(C`gcov\*(C'\fR does not have | |
2397 | execution counts for all branches, it must start with the execution | |
2398 | counts for the instrumented branches, and then iterate over the program | |
2399 | flow graph until the entire graph has been solved. Hence, \f(CW\*(C`gcov\*(C'\fR | |
2400 | runs a little more slowly than a program which uses information from | |
2401 | \&\fB\-a\fR. | |
2402 | .Sp | |
2403 | \&\fB\-fprofile-arcs\fR also makes it possible to estimate branch | |
2404 | probabilities, and to calculate basic block execution counts. In | |
2405 | general, basic block execution counts do not give enough information to | |
2406 | estimate all branch probabilities. When the compiled program exits, it | |
2407 | saves the arc execution counts to a file called | |
2408 | \&\fI\fIsourcename\fI.da\fR. Use the compiler option | |
2409 | \&\fB\-fbranch-probabilities\fR when recompiling, to optimize using estimated | |
2410 | branch probabilities. | |
2411 | .Ip "\fB\-ftest-coverage\fR" 4 | |
2412 | .IX Item "-ftest-coverage" | |
2413 | Create data files for the \f(CW\*(C`gcov\*(C'\fR code-coverage utility. | |
2414 | The data file names begin with the name of your source file: | |
2415 | .RS 4 | |
2416 | .Ip "\fIsourcename\fR\fB.bb\fR" 4 | |
2417 | .IX Item "sourcename.bb" | |
2418 | A mapping from basic blocks to line numbers, which \f(CW\*(C`gcov\*(C'\fR uses to | |
2419 | associate basic block execution counts with line numbers. | |
2420 | .Ip "\fIsourcename\fR\fB.bbg\fR" 4 | |
2421 | .IX Item "sourcename.bbg" | |
2422 | A list of all arcs in the program flow graph. This allows \f(CW\*(C`gcov\*(C'\fR | |
2423 | to reconstruct the program flow graph, so that it can compute all basic | |
2424 | block and arc execution counts from the information in the | |
2425 | \&\f(CW\*(C`\f(CIsourcename\f(CW.da\*(C'\fR file (this last file is the output from | |
2426 | \&\fB\-fprofile-arcs\fR). | |
2427 | .RE | |
2428 | .RS 4 | |
2429 | .RE | |
2430 | .Ip "\fB\-d\fR\fIletters\fR" 4 | |
2431 | .IX Item "-dletters" | |
861bb6c1 | 2432 | Says to make debugging dumps during compilation at times specified by |
4bc1997b JM |
2433 | \&\fIletters\fR. This is used for debugging the compiler. The file names |
2434 | for most of the dumps are made by appending a pass number and a word to | |
2435 | the source file name (e.g. \fIfoo.c.00.rtl\fR or \fIfoo.c.01.sibling\fR). | |
2436 | Here are the possible letters for use in \fIletters\fR, and their meanings: | |
2437 | .RS 4 | |
2438 | .Ip "\fBA\fR" 4 | |
2439 | .IX Item "A" | |
2440 | Annotate the assembler output with miscellaneous debugging information. | |
2441 | .Ip "\fBb\fR" 4 | |
2442 | .IX Item "b" | |
2443 | Dump after computing branch probabilities, to \fI\fIfile\fI.11.bp\fR. | |
2444 | .Ip "\fBB\fR" 4 | |
2445 | .IX Item "B" | |
2446 | Dump after block reordering, to \fI\fIfile\fI.26.bbro\fR. | |
2447 | .Ip "\fBc\fR" 4 | |
2448 | .IX Item "c" | |
2449 | Dump after instruction combination, to the file \fI\fIfile\fI.14.combine\fR. | |
2450 | .Ip "\fBC\fR" 4 | |
2451 | .IX Item "C" | |
2452 | Dump after the first if conversion, to the file \fI\fIfile\fI.15.ce\fR. | |
2453 | .Ip "\fBd\fR" 4 | |
2454 | .IX Item "d" | |
2455 | Dump after delayed branch scheduling, to \fI\fIfile\fI.29.dbr\fR. | |
2456 | .Ip "\fBD\fR" 4 | |
2457 | .IX Item "D" | |
861bb6c1 JL |
2458 | Dump all macro definitions, at the end of preprocessing, in addition to |
2459 | normal output. | |
4bc1997b JM |
2460 | .Ip "\fBe\fR" 4 |
2461 | .IX Item "e" | |
2462 | Dump after \s-1SSA\s0 optimizations, to \fI\fIfile\fI.05.ssa\fR and | |
2463 | \&\fI\fIfile\fI.06.ussa\fR. | |
2464 | .Ip "\fBE\fR" 4 | |
2465 | .IX Item "E" | |
2466 | Dump after the second if conversion, to \fI\fIfile\fI.24.ce2\fR. | |
2467 | .Ip "\fBf\fR" 4 | |
2468 | .IX Item "f" | |
2469 | Dump after life analysis, to \fI\fIfile\fI.13.life\fR. | |
2470 | .Ip "\fBF\fR" 4 | |
2471 | .IX Item "F" | |
2472 | Dump after purging \f(CW\*(C`ADDRESSOF\*(C'\fR codes, to \fI\fIfile\fI.04.addressof\fR. | |
2473 | .Ip "\fBg\fR" 4 | |
2474 | .IX Item "g" | |
2475 | Dump after global register allocation, to \fI\fIfile\fI.19.greg\fR. | |
2476 | .Ip "\fBo\fR" 4 | |
2477 | .IX Item "o" | |
2478 | Dump after post-reload \s-1CSE\s0 and other optimizations, to \fI\fIfile\fI.20.postreload\fR. | |
2479 | .Ip "\fBG\fR" 4 | |
2480 | .IX Item "G" | |
2481 | Dump after \s-1GCSE\s0, to \fI\fIfile\fI.08.gcse\fR. | |
2482 | .Ip "\fBi\fR" 4 | |
2483 | .IX Item "i" | |
2484 | Dump after sibling call optimizations, to \fI\fIfile\fI.01.sibling\fR. | |
2485 | .Ip "\fBj\fR" 4 | |
2486 | .IX Item "j" | |
2487 | Dump after the first jump optimization, to \fI\fIfile\fI.02.jump\fR. | |
2488 | .Ip "\fBJ\fR" 4 | |
2489 | .IX Item "J" | |
2490 | Dump after the last jump optimization, to \fI\fIfile\fI.27.jump2\fR. | |
2491 | .Ip "\fBk\fR" 4 | |
2492 | .IX Item "k" | |
2493 | Dump after conversion from registers to stack, to \fI\fIfile\fI.29.stack\fR. | |
2494 | .Ip "\fBl\fR" 4 | |
2495 | .IX Item "l" | |
2496 | Dump after local register allocation, to \fI\fIfile\fI.18.lreg\fR. | |
2497 | .Ip "\fBL\fR" 4 | |
2498 | .IX Item "L" | |
2499 | Dump after loop optimization, to \fI\fIfile\fI.09.loop\fR. | |
2500 | .Ip "\fBM\fR" 4 | |
2501 | .IX Item "M" | |
2502 | Dump after performing the machine dependent reorganisation pass, to | |
2503 | \&\fI\fIfile\fI.28.mach\fR. | |
2504 | .Ip "\fBn\fR" 4 | |
2505 | .IX Item "n" | |
2506 | Dump after register renumbering, to \fI\fIfile\fI.23.rnreg\fR. | |
2507 | .Ip "\fBN\fR" 4 | |
2508 | .IX Item "N" | |
2509 | Dump after the register move pass, to \fI\fIfile\fI.16.regmove\fR. | |
2510 | .Ip "\fBr\fR" 4 | |
2511 | .IX Item "r" | |
2512 | Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.00.rtl\fR. | |
2513 | .Ip "\fBR\fR" 4 | |
2514 | .IX Item "R" | |
861bb6c1 | 2515 | Dump after the second instruction scheduling pass, to |
4bc1997b JM |
2516 | \&\fI\fIfile\fI.25.sched2\fR. |
2517 | .Ip "\fBs\fR" 4 | |
2518 | .IX Item "s" | |
2519 | Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows | |
2520 | \&\s-1CSE\s0), to \fI\fIfile\fI.03.cse\fR. | |
2521 | .Ip "\fBS\fR" 4 | |
2522 | .IX Item "S" | |
2523 | Dump after the first instruction scheduling pass, to | |
2524 | \&\fI\fIfile\fI.17.sched\fR. | |
2525 | .Ip "\fBt\fR" 4 | |
2526 | .IX Item "t" | |
2527 | Dump after the second \s-1CSE\s0 pass (including the jump optimization that | |
2528 | sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.10.cse2\fR. | |
2529 | .Ip "\fBw\fR" 4 | |
2530 | .IX Item "w" | |
2531 | Dump after the second flow pass, to \fI\fIfile\fI.21.flow2\fR. | |
2532 | .Ip "\fBX\fR" 4 | |
2533 | .IX Item "X" | |
2534 | Dump after dead code elimination, to \fI\fIfile\fI.06.dce\fR. | |
2535 | .Ip "\fBz\fR" 4 | |
2536 | .IX Item "z" | |
2537 | Dump after the peephole pass, to \fI\fIfile\fI.22.peephole2\fR. | |
2538 | .Ip "\fBa\fR" 4 | |
2539 | .IX Item "a" | |
861bb6c1 | 2540 | Produce all the dumps listed above. |
4bc1997b JM |
2541 | .Ip "\fBm\fR" 4 |
2542 | .IX Item "m" | |
861bb6c1 JL |
2543 | Print statistics on memory usage, at the end of the run, to |
2544 | standard error. | |
4bc1997b JM |
2545 | .Ip "\fBp\fR" 4 |
2546 | .IX Item "p" | |
861bb6c1 | 2547 | Annotate the assembler output with a comment indicating which |
4bc1997b JM |
2548 | pattern and alternative was used. The length of each instruction is |
2549 | also printed. | |
2550 | .Ip "\fBP\fR" 4 | |
2551 | .IX Item "P" | |
2552 | Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction. | |
2553 | Also turns on \fB\-dp\fR annotation. | |
2554 | .Ip "\fBv\fR" 4 | |
2555 | .IX Item "v" | |
2556 | For each of the other indicated dump files (except for | |
2557 | \&\fI\fIfile\fI.00.rtl\fR), dump a representation of the control flow graph | |
2558 | suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR. | |
2559 | .Ip "\fBx\fR" 4 | |
2560 | .IX Item "x" | |
2561 | Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used | |
2562 | with \fBr\fR. | |
2563 | .Ip "\fBy\fR" 4 | |
2564 | .IX Item "y" | |
2565 | Dump debugging information during parsing, to standard error. | |
2566 | .RE | |
2567 | .RS 4 | |
2568 | .RE | |
2569 | .Ip "\fB\-fdump-unnumbered\fR" 4 | |
2570 | .IX Item "-fdump-unnumbered" | |
2571 | When doing debugging dumps (see \-d option above), suppress instruction | |
2572 | numbers and line number note output. This makes it more feasible to | |
2573 | use diff on debugging dumps for compiler invocations with different | |
2574 | options, in particular with and without \-g. | |
2575 | .Ip "\fB\-fdump-translation-unit-\fR\fIfile\fR \fB(C and \*(C+ only)\fR" 4 | |
2576 | .IX Item "-fdump-translation-unit-file (C and only)" | |
2577 | Dump a representation of the tree structure for the entire translation | |
2578 | unit to \fIfile\fR. | |
2579 | .Ip "\fB\-fpretend-float\fR" 4 | |
2580 | .IX Item "-fpretend-float" | |
861bb6c1 JL |
2581 | When running a cross-compiler, pretend that the target machine uses the |
2582 | same floating point format as the host machine. This causes incorrect | |
2583 | output of the actual floating constants, but the actual instruction | |
4bc1997b | 2584 | sequence will probably be the same as \s-1GCC\s0 would make when running on |
861bb6c1 | 2585 | the target machine. |
4bc1997b JM |
2586 | .Ip "\fB\-save-temps\fR" 4 |
2587 | .IX Item "-save-temps" | |
2588 | Store the usual ``temporary'' intermediate files permanently; place them | |
861bb6c1 | 2589 | in the current directory and name them based on the source file. Thus, |
4bc1997b JM |
2590 | compiling \fIfoo.c\fR with \fB\-c \-save-temps\fR would produce files |
2591 | \&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a | |
2592 | preprocessed \fIfoo.i\fR output file even though the compiler now | |
2593 | normally uses an integrated preprocessor. | |
2594 | .Ip "\fB\-time\fR" 4 | |
2595 | .IX Item "-time" | |
2596 | Report the \s-1CPU\s0 time taken by each subprocess in the compilation | |
2597 | sequence. For C source files, this is the compiler proper and assembler | |
2598 | (plus the linker if linking is done). The output looks like this: | |
2599 | .Sp | |
2600 | .Vb 2 | |
2601 | \& # cc1 0.12 0.01 | |
2602 | \& # as 0.00 0.01 | |
2603 | .Ve | |
2604 | The first number on each line is the ``user time,'' that is time spent | |
2605 | executing the program itself. The second number is ``system time,'' | |
2606 | time spent executing operating system routines on behalf of the program. | |
2607 | Both numbers are in seconds. | |
2608 | .Ip "\fB\-print-file-name=\fR\fIlibrary\fR" 4 | |
2609 | .IX Item "-print-file-name=library" | |
2610 | Print the full absolute name of the library file \fIlibrary\fR that | |
2611 | would be used when linking\-\-\-and don't do anything else. With this | |
2612 | option, \s-1GCC\s0 does not compile or link anything; it just prints the | |
861bb6c1 | 2613 | file name. |
4bc1997b JM |
2614 | .Ip "\fB\-print-prog-name=\fR\fIprogram\fR" 4 |
2615 | .IX Item "-print-prog-name=program" | |
2616 | Like \fB\-print-file-name\fR, but searches for a program such as \fBcpp\fR. | |
2617 | .Ip "\fB\-print-libgcc-file-name\fR" 4 | |
2618 | .IX Item "-print-libgcc-file-name" | |
2619 | Same as \fB\-print-file-name=libgcc.a\fR. | |
2620 | .Sp | |
2621 | This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR | |
2622 | but you do want to link with \fIlibgcc.a\fR. You can do | |
2623 | .Sp | |
2624 | .Vb 1 | |
2625 | \& gcc -nostdlib I<files>... `gcc -print-libgcc-file-name` | |
2626 | .Ve | |
2627 | .Ip "\fB\-print-search-dirs\fR" 4 | |
2628 | .IX Item "-print-search-dirs" | |
2629 | Print the name of the configured installation directory and a list of | |
2630 | program and library directories gcc will search\-\-\-and don't do anything else. | |
2631 | .Sp | |
2632 | This is useful when gcc prints the error message | |
2633 | \&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR. | |
2634 | To resolve this you either need to put \fIcpp0\fR and the other compiler | |
2635 | components where gcc expects to find them, or you can set the environment | |
2636 | variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them. | |
2637 | Don't forget the trailing '/'. | |
2638 | .Sh "Options That Control Optimization" | |
2639 | .IX Subsection "Options That Control Optimization" | |
861bb6c1 | 2640 | These options control various sorts of optimizations: |
4bc1997b JM |
2641 | .Ip "\fB\-O\fR" 4 |
2642 | .IX Item "-O" | |
2643 | .PD 0 | |
2644 | .Ip "\fB\-O1\fR" 4 | |
2645 | .IX Item "-O1" | |
2646 | .PD | |
861bb6c1 JL |
2647 | Optimize. Optimizing compilation takes somewhat more time, and a lot |
2648 | more memory for a large function. | |
2649 | .Sp | |
4bc1997b | 2650 | Without \fB\-O\fR, the compiler's goal is to reduce the cost of |
861bb6c1 JL |
2651 | compilation and to make debugging produce the expected results. |
2652 | Statements are independent: if you stop the program with a breakpoint | |
2653 | between statements, you can then assign a new value to any variable or | |
2654 | change the program counter to any other statement in the function and | |
2655 | get exactly the results you would expect from the source code. | |
2656 | .Sp | |
4bc1997b JM |
2657 | Without \fB\-O\fR, the compiler only allocates variables declared |
2658 | \&\f(CW\*(C`register\*(C'\fR in registers. The resulting compiled code is a little | |
2659 | worse than produced by \s-1PCC\s0 without \fB\-O\fR. | |
2660 | .Sp | |
2661 | With \fB\-O\fR, the compiler tries to reduce code size and execution | |
861bb6c1 JL |
2662 | time. |
2663 | .Sp | |
4bc1997b JM |
2664 | When you specify \fB\-O\fR, the compiler turns on \fB\-fthread-jumps\fR |
2665 | and \fB\-fdefer-pop\fR on all machines. The compiler turns on | |
2666 | \&\fB\-fdelayed-branch\fR on machines that have delay slots, and | |
2667 | \&\fB\-fomit-frame-pointer\fR on machines that can support debugging even | |
2668 | without a frame pointer. On some machines the compiler also turns | |
2669 | on other flags. | |
2670 | .Ip "\fB\-O2\fR" 4 | |
2671 | .IX Item "-O2" | |
2672 | Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations | |
2673 | that do not involve a space-speed tradeoff. The compiler does not | |
2674 | perform loop unrolling or function inlining when you specify \fB\-O2\fR. | |
2675 | As compared to \fB\-O\fR, this option increases both compilation time | |
2676 | and the performance of the generated code. | |
2677 | .Sp | |
2678 | \&\fB\-O2\fR turns on all optional optimizations except for loop unrolling, | |
2679 | function inlining, and register renaming. It also turns on the | |
2680 | \&\fB\-fforce-mem\fR option on all machines and frame pointer elimination | |
2681 | on machines where doing so does not interfere with debugging. | |
2682 | .Ip "\fB\-O3\fR" 4 | |
2683 | .IX Item "-O3" | |
2684 | Optimize yet more. \fB\-O3\fR turns on all optimizations specified by | |
2685 | \&\fB\-O2\fR and also turns on the \fB\-finline-functions\fR and | |
2686 | \&\fB\-frename-registers\fR options. | |
2687 | .Ip "\fB\-O0\fR" 4 | |
2688 | .IX Item "-O0" | |
861bb6c1 | 2689 | Do not optimize. |
4bc1997b JM |
2690 | .Ip "\fB\-Os\fR" 4 |
2691 | .IX Item "-Os" | |
2692 | Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that | |
2693 | do not typically increase code size. It also performs further | |
2694 | optimizations designed to reduce code size. | |
2695 | .Sp | |
2696 | If you use multiple \fB\-O\fR options, with or without level numbers, | |
2697 | the last such option is the one that is effective. | |
861bb6c1 | 2698 | .PP |
4bc1997b | 2699 | Options of the form \fB\-f\fR\fIflag\fR specify machine-independent |
861bb6c1 | 2700 | flags. Most flags have both positive and negative forms; the negative |
4bc1997b JM |
2701 | form of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table below, |
2702 | only one of the forms is listed\-\-\-the one which is not the default. | |
2703 | You can figure out the other form by either removing \fBno-\fR or | |
861bb6c1 | 2704 | adding it. |
4bc1997b JM |
2705 | .Ip "\fB\-ffloat-store\fR" 4 |
2706 | .IX Item "-ffloat-store" | |
2707 | Do not store floating point variables in registers, and inhibit other | |
2708 | options that might change whether a floating point value is taken from a | |
2709 | register or memory. | |
2710 | .Sp | |
2711 | This option prevents undesirable excess precision on machines such as | |
2712 | the 68000 where the floating registers (of the 68881) keep more | |
2713 | precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the | |
2714 | x86 architecture. For most programs, the excess precision does only | |
2715 | good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating | |
2716 | point. Use \fB\-ffloat-store\fR for such programs, after modifying | |
2717 | them to store all pertinent intermediate computations into variables. | |
2718 | .Ip "\fB\-fno-default-inline\fR" 4 | |
2719 | .IX Item "-fno-default-inline" | |
2720 | Do not make member functions inline by default merely because they are | |
2721 | defined inside the class scope (\*(C+ only). Otherwise, when you specify | |
2722 | \&\fB\-O\fR, member functions defined inside class scope are compiled | |
2723 | inline by default; i.e., you don't need to add \fBinline\fR in front of | |
2724 | the member function name. | |
2725 | .Ip "\fB\-fno-defer-pop\fR" 4 | |
2726 | .IX Item "-fno-defer-pop" | |
2727 | Always pop the arguments to each function call as soon as that function | |
2728 | returns. For machines which must pop arguments after a function call, | |
2729 | the compiler normally lets arguments accumulate on the stack for several | |
2730 | function calls and pops them all at once. | |
2731 | .Ip "\fB\-fforce-mem\fR" 4 | |
2732 | .IX Item "-fforce-mem" | |
861bb6c1 | 2733 | Force memory operands to be copied into registers before doing |
4bc1997b JM |
2734 | arithmetic on them. This produces better code by making all memory |
2735 | references potential common subexpressions. When they are not common | |
2736 | subexpressions, instruction combination should eliminate the separate | |
2737 | register-load. The \fB\-O2\fR option turns on this option. | |
2738 | .Ip "\fB\-fforce-addr\fR" 4 | |
2739 | .IX Item "-fforce-addr" | |
861bb6c1 JL |
2740 | Force memory address constants to be copied into registers before |
2741 | doing arithmetic on them. This may produce better code just as | |
4bc1997b JM |
2742 | \&\fB\-fforce-mem\fR may. |
2743 | .Ip "\fB\-fomit-frame-pointer\fR" 4 | |
2744 | .IX Item "-fomit-frame-pointer" | |
861bb6c1 JL |
2745 | Don't keep the frame pointer in a register for functions that |
2746 | don't need one. This avoids the instructions to save, set up and | |
2747 | restore frame pointers; it also makes an extra register available | |
4bc1997b JM |
2748 | in many functions. \fBIt also makes debugging impossible on |
2749 | some machines.\fR | |
861bb6c1 JL |
2750 | .Sp |
2751 | On some machines, such as the Vax, this flag has no effect, because | |
2752 | the standard calling sequence automatically handles the frame pointer | |
2753 | and nothing is saved by pretending it doesn't exist. The | |
4bc1997b JM |
2754 | machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls |
2755 | whether a target machine supports this flag. | |
2756 | .Ip "\fB\-foptimize-sibling-calls\fR" 4 | |
2757 | .IX Item "-foptimize-sibling-calls" | |
2758 | Optimize sibling and tail recursive calls. | |
2759 | .Ip "\fB\-ftrapv\fR" 4 | |
2760 | .IX Item "-ftrapv" | |
2761 | This option generates traps for signed overflow on addition, subtraction, | |
2762 | multiplication operations. | |
2763 | .Ip "\fB\-fno-inline\fR" 4 | |
2764 | .IX Item "-fno-inline" | |
2765 | Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option | |
2766 | is used to keep the compiler from expanding any functions inline. | |
2767 | Note that if you are not optimizing, no functions can be expanded inline. | |
2768 | .Ip "\fB\-finline-functions\fR" 4 | |
2769 | .IX Item "-finline-functions" | |
861bb6c1 JL |
2770 | Integrate all simple functions into their callers. The compiler |
2771 | heuristically decides which functions are simple enough to be worth | |
2772 | integrating in this way. | |
2773 | .Sp | |
2774 | If all calls to a given function are integrated, and the function is | |
4bc1997b | 2775 | declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as |
861bb6c1 | 2776 | assembler code in its own right. |
4bc1997b JM |
2777 | .Ip "\fB\-finline-limit=\fR\fIn\fR" 4 |
2778 | .IX Item "-finline-limit=n" | |
2779 | By default, gcc limits the size of functions that can be inlined. This flag | |
2780 | allows the control of this limit for functions that are explicitly marked as | |
2781 | inline (ie marked with the inline keyword or defined within the class | |
2782 | definition in c++). \fIn\fR is the size of functions that can be inlined in | |
2783 | number of pseudo instructions (not counting parameter handling). The default | |
2784 | value of n is 10000. Increasing this value can result in more inlined code at | |
2785 | the cost of compilation time and memory consumption. Decreasing usually makes | |
2786 | the compilation faster and less code will be inlined (which presumably | |
2787 | means slower programs). This option is particularly useful for programs that | |
2788 | use inlining heavily such as those based on recursive templates with c++. | |
2789 | .Sp | |
2790 | \&\fINote:\fR pseudo instruction represents, in this particular context, an | |
2791 | abstract measurement of function's size. In no way, it represents a count | |
2792 | of assembly instructions and as such its exact meaning might change from one | |
2793 | release to an another. | |
2794 | .Ip "\fB\-fkeep-inline-functions\fR" 4 | |
2795 | .IX Item "-fkeep-inline-functions" | |
861bb6c1 | 2796 | Even if all calls to a given function are integrated, and the function |
4bc1997b JM |
2797 | is declared \f(CW\*(C`static\*(C'\fR, nevertheless output a separate run-time |
2798 | callable version of the function. This switch does not affect | |
2799 | \&\f(CW\*(C`extern inline\*(C'\fR functions. | |
2800 | .Ip "\fB\-fkeep-static-consts\fR" 4 | |
2801 | .IX Item "-fkeep-static-consts" | |
2802 | Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned | |
2803 | on, even if the variables aren't referenced. | |
2804 | .Sp | |
2805 | \&\s-1GCC\s0 enables this option by default. If you want to force the compiler to | |
2806 | check if the variable was referenced, regardless of whether or not | |
2807 | optimization is turned on, use the \fB\-fno-keep-static-consts\fR option. | |
2808 | .Ip "\fB\-fno-function-cse\fR" 4 | |
2809 | .IX Item "-fno-function-cse" | |
861bb6c1 JL |
2810 | Do not put function addresses in registers; make each instruction that |
2811 | calls a constant function contain the function's address explicitly. | |
2812 | .Sp | |
2813 | This option results in less efficient code, but some strange hacks | |
2814 | that alter the assembler output may be confused by the optimizations | |
2815 | performed when this option is not used. | |
4bc1997b JM |
2816 | .Ip "\fB\-ffast-math\fR" 4 |
2817 | .IX Item "-ffast-math" | |
2818 | This option allows \s-1GCC\s0 to violate some \s-1ISO\s0 or \s-1IEEE\s0 rules and/or | |
2819 | specifications in the interest of optimizing code for speed. For | |
2820 | example, it allows the compiler to assume arguments to the \f(CW\*(C`sqrt\*(C'\fR | |
2821 | function are non-negative numbers and that no floating-point values | |
2822 | are NaNs. | |
2823 | .Sp | |
2824 | This option should never be turned on by any \fB\-O\fR option since | |
861bb6c1 | 2825 | it can result in incorrect output for programs which depend on |
4bc1997b | 2826 | an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for |
861bb6c1 | 2827 | math functions. |
4bc1997b JM |
2828 | .Ip "\fB\-fno-math-errno\fR" 4 |
2829 | .IX Item "-fno-math-errno" | |
2830 | Do not set \s-1ERRNO\s0 after calling math functions that are executed | |
2831 | with a single instruction, e.g., sqrt. A program that relies on | |
2832 | \&\s-1IEEE\s0 exceptions for math error handling may want to use this flag | |
2833 | for speed while maintaining \s-1IEEE\s0 arithmetic compatibility. | |
2834 | .Sp | |
2835 | The default is \fB\-fmath-errno\fR. The \fB\-ffast-math\fR option | |
2836 | sets \fB\-fno-math-errno\fR. | |
861bb6c1 | 2837 | .PP |
4bc1997b JM |
2838 | The following options control specific optimizations. The \fB\-O2\fR |
2839 | option turns on all of these optimizations except \fB\-funroll-loops\fR | |
2840 | and \fB\-funroll-all-loops\fR. On most machines, the \fB\-O\fR option | |
2841 | turns on the \fB\-fthread-jumps\fR and \fB\-fdelayed-branch\fR options, | |
2842 | but specific machines may handle it differently. | |
861bb6c1 | 2843 | .PP |
4bc1997b | 2844 | You can use the following flags in the rare cases when ``fine-tuning'' |
861bb6c1 | 2845 | of optimizations to be performed is desired. |
4bc1997b JM |
2846 | .Ip "\fB\-fstrength-reduce\fR" 4 |
2847 | .IX Item "-fstrength-reduce" | |
861bb6c1 JL |
2848 | Perform the optimizations of loop strength reduction and |
2849 | elimination of iteration variables. | |
4bc1997b JM |
2850 | .Ip "\fB\-fthread-jumps\fR" 4 |
2851 | .IX Item "-fthread-jumps" | |
861bb6c1 JL |
2852 | Perform optimizations where we check to see if a jump branches to a |
2853 | location where another comparison subsumed by the first is found. If | |
2854 | so, the first branch is redirected to either the destination of the | |
2855 | second branch or a point immediately following it, depending on whether | |
2856 | the condition is known to be true or false. | |
4bc1997b JM |
2857 | .Ip "\fB\-fcse-follow-jumps\fR" 4 |
2858 | .IX Item "-fcse-follow-jumps" | |
861bb6c1 JL |
2859 | In common subexpression elimination, scan through jump instructions |
2860 | when the target of the jump is not reached by any other path. For | |
4bc1997b JM |
2861 | example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an |
2862 | \&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition | |
861bb6c1 | 2863 | tested is false. |
4bc1997b JM |
2864 | .Ip "\fB\-fcse-skip-blocks\fR" 4 |
2865 | .IX Item "-fcse-skip-blocks" | |
2866 | This is similar to \fB\-fcse-follow-jumps\fR, but causes \s-1CSE\s0 to | |
2867 | follow jumps which conditionally skip over blocks. When \s-1CSE\s0 | |
2868 | encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause, | |
2869 | \&\fB\-fcse-skip-blocks\fR causes \s-1CSE\s0 to follow the jump around the | |
2870 | body of the \f(CW\*(C`if\*(C'\fR. | |
2871 | .Ip "\fB\-frerun-cse-after-loop\fR" 4 | |
2872 | .IX Item "-frerun-cse-after-loop" | |
861bb6c1 JL |
2873 | Re-run common subexpression elimination after loop optimizations has been |
2874 | performed. | |
4bc1997b JM |
2875 | .Ip "\fB\-frerun-loop-opt\fR" 4 |
2876 | .IX Item "-frerun-loop-opt" | |
2877 | Run the loop optimizer twice. | |
2878 | .Ip "\fB\-fgcse\fR" 4 | |
2879 | .IX Item "-fgcse" | |
2880 | Perform a global common subexpression elimination pass. | |
2881 | This pass also performs global constant and copy propagation. | |
2882 | .Ip "\fB\-fdelete-null-pointer-checks\fR" 4 | |
2883 | .IX Item "-fdelete-null-pointer-checks" | |
2884 | Use global dataflow analysis to identify and eliminate useless null | |
2885 | pointer checks. Programs which rely on \s-1NULL\s0 pointer dereferences \fInot\fR | |
2886 | halting the program may not work properly with this option. Use | |
2887 | \&\-fno-delete-null-pointer-checks to disable this optimizing for programs | |
2888 | which depend on that behavior. | |
2889 | .Ip "\fB\-fexpensive-optimizations\fR" 4 | |
2890 | .IX Item "-fexpensive-optimizations" | |
861bb6c1 | 2891 | Perform a number of minor optimizations that are relatively expensive. |
4bc1997b JM |
2892 | .Ip "\fB\-foptimize-register-move\fR" 4 |
2893 | .IX Item "-foptimize-register-move" | |
2894 | .PD 0 | |
2895 | .Ip "\fB\-fregmove\fR" 4 | |
2896 | .IX Item "-fregmove" | |
2897 | .PD | |
2898 | Attempt to reassign register numbers in move instructions and as | |
2899 | operands of other simple instructions in order to maximize the amount of | |
2900 | register tying. This is especially helpful on machines with two-operand | |
2901 | instructions. \s-1GCC\s0 enables this optimization by default with \fB\-O2\fR | |
2902 | or higher. | |
2903 | .Sp | |
2904 | Note \fB\-fregmove\fR and \fB\-foptimize-register-move\fR are the same | |
2905 | optimization. | |
2906 | .Ip "\fB\-fdelayed-branch\fR" 4 | |
2907 | .IX Item "-fdelayed-branch" | |
861bb6c1 JL |
2908 | If supported for the target machine, attempt to reorder instructions |
2909 | to exploit instruction slots available after delayed branch | |
2910 | instructions. | |
4bc1997b JM |
2911 | .Ip "\fB\-fschedule-insns\fR" 4 |
2912 | .IX Item "-fschedule-insns" | |
861bb6c1 JL |
2913 | If supported for the target machine, attempt to reorder instructions to |
2914 | eliminate execution stalls due to required data being unavailable. This | |
2915 | helps machines that have slow floating point or memory load instructions | |
2916 | by allowing other instructions to be issued until the result of the load | |
2917 | or floating point instruction is required. | |
4bc1997b JM |
2918 | .Ip "\fB\-fschedule-insns2\fR" 4 |
2919 | .IX Item "-fschedule-insns2" | |
2920 | Similar to \fB\-fschedule-insns\fR, but requests an additional pass of | |
861bb6c1 JL |
2921 | instruction scheduling after register allocation has been done. This is |
2922 | especially useful on machines with a relatively small number of | |
2923 | registers and where memory load instructions take more than one cycle. | |
4bc1997b JM |
2924 | .Ip "\fB\-ffunction-sections\fR" 4 |
2925 | .IX Item "-ffunction-sections" | |
2926 | .PD 0 | |
2927 | .Ip "\fB\-fdata-sections\fR" 4 | |
2928 | .IX Item "-fdata-sections" | |
2929 | .PD | |
2930 | Place each function or data item into its own section in the output | |
2931 | file if the target supports arbitrary sections. The name of the | |
2932 | function or the name of the data item determines the section's name | |
2933 | in the output file. | |
2934 | .Sp | |
2935 | Use these options on systems where the linker can perform optimizations | |
2936 | to improve locality of reference in the instruction space. \s-1HPPA\s0 | |
2937 | processors running \s-1HP-UX\s0 and Sparc processors running Solaris 2 have | |
2938 | linkers with such optimizations. Other systems using the \s-1ELF\s0 object format | |
2939 | as well as \s-1AIX\s0 may have these optimizations in the future. | |
2940 | .Sp | |
2941 | Only use these options when there are significant benefits from doing | |
2942 | so. When you specify these options, the assembler and linker will | |
2943 | create larger object and executable files and will also be slower. | |
2944 | You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you | |
2945 | specify this option and you may have problems with debugging if | |
2946 | you specify both this option and \fB\-g\fR. | |
2947 | .Ip "\fB\-fcaller-saves\fR" 4 | |
2948 | .IX Item "-fcaller-saves" | |
2949 | Enable values to be allocated in registers that will be clobbered by | |
2950 | function calls, by emitting extra instructions to save and restore the | |
2951 | registers around such calls. Such allocation is done only when it | |
2952 | seems to result in better code than would otherwise be produced. | |
2953 | .Sp | |
2954 | This option is always enabled by default on certain machines, usually | |
2955 | those which have no call-preserved registers to use instead. | |
2956 | .Sp | |
2957 | For all machines, optimization level 2 and higher enables this flag by | |
2958 | default. | |
2959 | .Ip "\fB\-funroll-loops\fR" 4 | |
2960 | .IX Item "-funroll-loops" | |
2961 | Perform the optimization of loop unrolling. This is only done for loops | |
2962 | whose number of iterations can be determined at compile time or run time. | |
2963 | \&\fB\-funroll-loops\fR implies both \fB\-fstrength-reduce\fR and | |
2964 | \&\fB\-frerun-cse-after-loop\fR. | |
2965 | .Ip "\fB\-funroll-all-loops\fR" 4 | |
2966 | .IX Item "-funroll-all-loops" | |
2967 | Perform the optimization of loop unrolling. This is done for all loops | |
2968 | and usually makes programs run more slowly. \fB\-funroll-all-loops\fR | |
2969 | implies \fB\-fstrength-reduce\fR as well as \fB\-frerun-cse-after-loop\fR. | |
2970 | .Ip "\fB\-fmove-all-movables\fR" 4 | |
2971 | .IX Item "-fmove-all-movables" | |
2972 | Forces all invariant computations in loops to be moved | |
2973 | outside the loop. | |
2974 | .Ip "\fB\-freduce-all-givs\fR" 4 | |
2975 | .IX Item "-freduce-all-givs" | |
2976 | Forces all general-induction variables in loops to be | |
2977 | strength-reduced. | |
2978 | .Sp | |
2979 | \&\fINote:\fR When compiling programs written in Fortran, | |
2980 | \&\fB\-fmove-all-movables\fR and \fB\-freduce-all-givs\fR are enabled | |
2981 | by default when you use the optimizer. | |
2982 | .Sp | |
2983 | These options may generate better or worse code; results are highly | |
2984 | dependent on the structure of loops within the source code. | |
2985 | .Sp | |
2986 | These two options are intended to be removed someday, once | |
2987 | they have helped determine the efficacy of various | |
2988 | approaches to improving loop optimizations. | |
2989 | .Sp | |
2990 | Please let us (<\fBgcc@gcc.gnu.org\fR> and <\fBfortran@gnu.org\fR>) | |
2991 | know how use of these options affects | |
2992 | the performance of your production code. | |
2993 | We're very interested in code that runs \fIslower\fR | |
2994 | when these options are \fIenabled\fR. | |
2995 | .Ip "\fB\-fno-peephole\fR" 4 | |
2996 | .IX Item "-fno-peephole" | |
2997 | Disable any machine-specific peephole optimizations. | |
2998 | .Ip "\fB\-fbranch-probabilities\fR" 4 | |
2999 | .IX Item "-fbranch-probabilities" | |
3000 | After running a program compiled with \fB\-fprofile-arcs\fR, you can compile it a second time using | |
3001 | \&\fB\-fbranch-probabilities\fR, to improve optimizations based on | |
3002 | guessing the path a branch might take. | |
445c435a JM |
3003 | .Ip "\fB\-fno-guess-branch-probability\fR" 4 |
3004 | .IX Item "-fno-guess-branch-probability" | |
3005 | Sometimes gcc will opt to guess branch probabilities when none are | |
3006 | available from either profile directed feedback (\fB\-fprofile-arcs\fR) | |
3007 | or \fB_\|_builtin_expect\fR. In a hard real-time system, people don't | |
3008 | want different runs of the compiler to produce code that has different | |
3009 | behavior; minimizing non-determinism is of paramount import. This | |
3010 | switch allows users to reduce non-determinism, possibly at the expense | |
3011 | of inferior optimization. | |
4bc1997b JM |
3012 | .Ip "\fB\-fstrict-aliasing\fR" 4 |
3013 | .IX Item "-fstrict-aliasing" | |
3014 | Allows the compiler to assume the strictest aliasing rules applicable to | |
3015 | the language being compiled. For C (and \*(C+), this activates | |
3016 | optimizations based on the type of expressions. In particular, an | |
3017 | object of one type is assumed never to reside at the same address as an | |
3018 | object of a different type, unless the types are almost the same. For | |
3019 | example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a | |
3020 | \&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other | |
3021 | type. | |
3022 | .Sp | |
3023 | Pay special attention to code like this: | |
3024 | .Sp | |
3025 | .Vb 4 | |
3026 | \& union a_union { | |
3027 | \& int i; | |
3028 | \& double d; | |
3029 | \& }; | |
3030 | .Ve | |
3031 | .Vb 5 | |
3032 | \& int f() { | |
3033 | \& a_union t; | |
3034 | \& t.d = 3.0; | |
3035 | \& return t.i; | |
3036 | \& } | |
3037 | .Ve | |
3038 | The practice of reading from a different union member than the one most | |
3039 | recently written to (called ``type-punning'') is common. Even with | |
3040 | \&\fB\-fstrict-aliasing\fR, type-punning is allowed, provided the memory | |
3041 | is accessed through the union type. So, the code above will work as | |
3042 | expected. However, this code might not: | |
3043 | .Sp | |
3044 | .Vb 7 | |
3045 | \& int f() { | |
3046 | \& a_union t; | |
3047 | \& int* ip; | |
3048 | \& t.d = 3.0; | |
3049 | \& ip = &t.i; | |
3050 | \& return *ip; | |
3051 | \& } | |
3052 | .Ve | |
3053 | .Ip "\fB\-falign-functions\fR" 4 | |
3054 | .IX Item "-falign-functions" | |
3055 | .PD 0 | |
3056 | .Ip "\fB\-falign-functions=\fR\fIn\fR" 4 | |
3057 | .IX Item "-falign-functions=n" | |
3058 | .PD | |
3059 | Align the start of functions to the next power-of-two greater than | |
3060 | \&\fIn\fR, skipping up to \fIn\fR bytes. For instance, | |
3061 | \&\fB\-falign-functions=32\fR aligns functions to the next 32\-byte | |
3062 | boundary, but \fB\-falign-functions=24\fR would align to the next | |
3063 | 32\-byte boundary only if this can be done by skipping 23 bytes or less. | |
3064 | .Sp | |
3065 | \&\fB\-fno-align-functions\fR and \fB\-falign-functions=1\fR are | |
3066 | equivalent and mean that functions will not be aligned. | |
3067 | .Sp | |
3068 | Some assemblers only support this flag when \fIn\fR is a power of two; | |
3069 | in that case, it is rounded up. | |
3070 | .Sp | |
3071 | If \fIn\fR is not specified, use a machine-dependent default. | |
3072 | .Ip "\fB\-falign-labels\fR" 4 | |
3073 | .IX Item "-falign-labels" | |
3074 | .PD 0 | |
3075 | .Ip "\fB\-falign-labels=\fR\fIn\fR" 4 | |
3076 | .IX Item "-falign-labels=n" | |
3077 | .PD | |
3078 | Align all branch targets to a power-of-two boundary, skipping up to | |
3079 | \&\fIn\fR bytes like \fB\-falign-functions\fR. This option can easily | |
3080 | make code slower, because it must insert dummy operations for when the | |
3081 | branch target is reached in the usual flow of the code. | |
3082 | .Sp | |
3083 | If \fB\-falign-loops\fR or \fB\-falign-jumps\fR are applicable and | |
3084 | are greater than this value, then their values are used instead. | |
3085 | .Sp | |
3086 | If \fIn\fR is not specified, use a machine-dependent default which is | |
3087 | very likely to be \fB1\fR, meaning no alignment. | |
3088 | .Ip "\fB\-falign-loops\fR" 4 | |
3089 | .IX Item "-falign-loops" | |
3090 | .PD 0 | |
3091 | .Ip "\fB\-falign-loops=\fR\fIn\fR" 4 | |
3092 | .IX Item "-falign-loops=n" | |
3093 | .PD | |
3094 | Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes | |
3095 | like \fB\-falign-functions\fR. The hope is that the loop will be | |
3096 | executed many times, which will make up for any execution of the dummy | |
3097 | operations. | |
3098 | .Sp | |
3099 | If \fIn\fR is not specified, use a machine-dependent default. | |
3100 | .Ip "\fB\-falign-jumps\fR" 4 | |
3101 | .IX Item "-falign-jumps" | |
3102 | .PD 0 | |
3103 | .Ip "\fB\-falign-jumps=\fR\fIn\fR" 4 | |
3104 | .IX Item "-falign-jumps=n" | |
3105 | .PD | |
3106 | Align branch targets to a power-of-two boundary, for branch targets | |
3107 | where the targets can only be reached by jumping, skipping up to \fIn\fR | |
3108 | bytes like \fB\-falign-functions\fR. In this case, no dummy operations | |
3109 | need be executed. | |
3110 | .Sp | |
3111 | If \fIn\fR is not specified, use a machine-dependent default. | |
3112 | .Ip "\fB\-fssa\fR" 4 | |
3113 | .IX Item "-fssa" | |
3114 | Perform optimizations in static single assignment form. Each function's | |
3115 | flow graph is translated into \s-1SSA\s0 form, optimizations are performed, and | |
3116 | the flow graph is translated back from \s-1SSA\s0 form. User's should not | |
3117 | specify this option, since it is not yet ready for production use. | |
3118 | .Ip "\fB\-fdce\fR" 4 | |
3119 | .IX Item "-fdce" | |
3120 | Perform dead-code elimination in \s-1SSA\s0 form. Requires \fB\-fssa\fR. Like | |
3121 | \&\fB\-fssa\fR, this is an experimental feature. | |
3122 | .Ip "\fB\-fsingle-precision-constant\fR" 4 | |
3123 | .IX Item "-fsingle-precision-constant" | |
3124 | Treat floating point constant as single precision constant instead of | |
3125 | implicitly converting it to double precision constant. | |
3126 | .Ip "\fB\-frename-registers\fR" 4 | |
3127 | .IX Item "-frename-registers" | |
3128 | Attempt to avoid false dependancies in scheduled code by making use | |
3129 | of registers left over after register allocation. This optimization | |
3130 | will most benefit processors with lots of registers. It can, however, | |
3131 | make debugging impossible, since variables will no longer stay in | |
3132 | a ``home register''. | |
3133 | .Sh "Options Controlling the Preprocessor" | |
3134 | .IX Subsection "Options Controlling the Preprocessor" | |
3135 | These options control the C preprocessor, which is run on each C source | |
3136 | file before actual compilation. | |
3137 | .PP | |
3138 | If you use the \fB\-E\fR option, nothing is done except preprocessing. | |
3139 | Some of these options make sense only together with \fB\-E\fR because | |
3140 | they cause the preprocessor output to be unsuitable for actual | |
3141 | compilation. | |
3142 | .Ip "\fB\-include\fR \fIfile\fR" 4 | |
3143 | .IX Item "-include file" | |
3144 | Process \fIfile\fR as input before processing the regular input file. | |
3145 | In effect, the contents of \fIfile\fR are compiled first. Any \fB\-D\fR | |
3146 | and \fB\-U\fR options on the command line are always processed before | |
3147 | \&\fB\-include\fR \fIfile\fR, regardless of the order in which they are | |
3148 | written. All the \fB\-include\fR and \fB\-imacros\fR options are | |
3149 | processed in the order in which they are written. | |
3150 | .Ip "\fB\-imacros\fR \fIfile\fR" 4 | |
3151 | .IX Item "-imacros file" | |
3152 | Process \fIfile\fR as input, discarding the resulting output, before | |
3153 | processing the regular input file. Because the output generated from | |
3154 | \&\fIfile\fR is discarded, the only effect of \fB\-imacros\fR \fIfile\fR | |
3155 | is to make the macros defined in \fIfile\fR available for use in the | |
3156 | main input. All the \fB\-include\fR and \fB\-imacros\fR options are | |
3157 | processed in the order in which they are written. | |
3158 | .Ip "\fB\-idirafter\fR \fIdir\fR" 4 | |
3159 | .IX Item "-idirafter dir" | |
3160 | Add the directory \fIdir\fR to the second include path. The directories | |
3161 | on the second include path are searched when a header file is not found | |
3162 | in any of the directories in the main include path (the one that | |
3163 | \&\fB\-I\fR adds to). | |
3164 | .Ip "\fB\-iprefix\fR \fIprefix\fR" 4 | |
3165 | .IX Item "-iprefix prefix" | |
3166 | Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR | |
3167 | options. | |
3168 | .Ip "\fB\-iwithprefix\fR \fIdir\fR" 4 | |
3169 | .IX Item "-iwithprefix dir" | |
3170 | Add a directory to the second include path. The directory's name is | |
3171 | made by concatenating \fIprefix\fR and \fIdir\fR, where \fIprefix\fR was | |
3172 | specified previously with \fB\-iprefix\fR. If you have not specified a | |
3173 | prefix yet, the directory containing the installed passes of the | |
3174 | compiler is used as the default. | |
3175 | .Ip "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 | |
3176 | .IX Item "-iwithprefixbefore dir" | |
3177 | Add a directory to the main include path. The directory's name is made | |
3178 | by concatenating \fIprefix\fR and \fIdir\fR, as in the case of | |
3179 | \&\fB\-iwithprefix\fR. | |
3180 | .Ip "\fB\-isystem\fR \fIdir\fR" 4 | |
3181 | .IX Item "-isystem dir" | |
3182 | Add a directory to the beginning of the second include path, marking it | |
3183 | as a system directory, so that it gets the same special treatment as | |
3184 | is applied to the standard system directories. | |
3185 | .Ip "\fB\-nostdinc\fR" 4 | |
3186 | .IX Item "-nostdinc" | |
3187 | Do not search the standard system directories for header files. Only | |
3188 | the directories you have specified with \fB\-I\fR options (and the | |
3189 | current directory, if appropriate) are searched. | |
3190 | .Sp | |
3191 | By using both \fB\-nostdinc\fR and \fB\-I-\fR, you can limit the include-file | |
3192 | search path to only those directories you specify explicitly. | |
3193 | .Ip "\fB\-remap\fR" 4 | |
3194 | .IX Item "-remap" | |
3195 | When searching for a header file in a directory, remap file names if a | |
3196 | file named \fIheader.gcc\fR exists in that directory. This can be used | |
3197 | to work around limitations of file systems with file name restrictions. | |
3198 | The \fIheader.gcc\fR file should contain a series of lines with two | |
3199 | tokens on each line: the first token is the name to map, and the second | |
3200 | token is the actual name to use. | |
3201 | .Ip "\fB\-undef\fR" 4 | |
3202 | .IX Item "-undef" | |
3203 | Do not predefine any nonstandard macros. (Including architecture flags). | |
3204 | .Ip "\fB\-E\fR" 4 | |
3205 | .IX Item "-E" | |
3206 | Run only the C preprocessor. Preprocess all the C source files | |
3207 | specified and output the results to standard output or to the | |
3208 | specified output file. | |
3209 | .Ip "\fB\-C\fR" 4 | |
3210 | .IX Item "-C" | |
3211 | Tell the preprocessor not to discard comments. Used with the | |
3212 | \&\fB\-E\fR option. | |
3213 | .Ip "\fB\-P\fR" 4 | |
3214 | .IX Item "-P" | |
3215 | Tell the preprocessor not to generate \fB#line\fR directives. | |
3216 | Used with the \fB\-E\fR option. | |
3217 | .Ip "\fB\-M\fR" 4 | |
3218 | .IX Item "-M" | |
3219 | Instead of outputting the result of preprocessing, output a rule | |
3220 | suitable for \f(CW\*(C`make\*(C'\fR describing the dependencies of the main source | |
3221 | file. The preprocessor outputs one \f(CW\*(C`make\*(C'\fR rule containing the | |
3222 | object file name for that source file, a colon, and the names of all the | |
3223 | included files. If there are many included files then the rule is split | |
3224 | into several lines using \fB\e\fR\-newline. | |
3225 | .Sp | |
3226 | \&\fB\-M\fR implies \fB\-E\fR. | |
3227 | .Ip "\fB\-MM\fR" 4 | |
3228 | .IX Item "-MM" | |
3229 | Like \fB\-M\fR, but mention only the files included with \fB#include | |
3230 | "\fR\fIfile\fR\fB"\fR. System header files included with \fB#include | |
3231 | <\fR\fIfile\fR\fB>\fR are omitted. | |
3232 | .Ip "\fB\-MD\fR" 4 | |
3233 | .IX Item "-MD" | |
3234 | Like \fB\-M\fR but the dependency information is written to a file | |
3235 | rather than stdout. \f(CW\*(C`gcc\*(C'\fR will use the same file name and | |
3236 | directory as the object file, but with the suffix \*(L".d\*(R" instead. | |
3237 | .Sp | |
3238 | This is in addition to compiling the main file as specified \-\-\- | |
3239 | \&\fB\-MD\fR does not inhibit ordinary compilation the way \fB\-M\fR does, | |
3240 | unless you also specify \fB\-MG\fR. | |
3241 | .Sp | |
3242 | With Mach, you can use the utility \f(CW\*(C`md\*(C'\fR to merge multiple | |
3243 | dependency files into a single dependency file suitable for using with | |
3244 | the \fBmake\fR command. | |
3245 | .Ip "\fB\-MMD\fR" 4 | |
3246 | .IX Item "-MMD" | |
3247 | Like \fB\-MD\fR except mention only user header files, not system | |
3248 | \&\-header files. | |
3249 | .Ip "\fB\-MF\fR \fIfile\fR" 4 | |
3250 | .IX Item "-MF file" | |
3251 | When used with \fB\-M\fR or \fB\-MM\fR, specifies a file to write the | |
3252 | dependencies to. This allows the preprocessor to write the preprocessed | |
3253 | file to stdout normally. If no \fB\-MF\fR switch is given, \s-1CPP\s0 sends | |
3254 | the rules to stdout and suppresses normal preprocessed output. | |
3255 | .Sp | |
3256 | Another way to specify output of a \f(CW\*(C`make\*(C'\fR rule is by setting | |
3257 | the environment variable \fB\s-1DEPENDENCIES_OUTPUT\s0\fR. | |
3258 | .Ip "\fB\-MG\fR" 4 | |
3259 | .IX Item "-MG" | |
3260 | When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing | |
3261 | header files as generated files and assume they live in the same | |
3262 | directory as the source file. It suppresses preprocessed output, as a | |
3263 | missing header file is ordinarily an error. | |
3264 | .Sp | |
3265 | This feature is used in automatic updating of makefiles. | |
3266 | .Ip "\fB\-MP\fR" 4 | |
3267 | .IX Item "-MP" | |
3268 | This option instructs \s-1CPP\s0 to add a phony target for each dependency | |
3269 | other than the main file, causing each to depend on nothing. These | |
3270 | dummy rules work around errors \f(CW\*(C`make\*(C'\fR gives if you remove header | |
3271 | files without updating the \f(CW\*(C`Makefile\*(C'\fR to match. | |
3272 | .Sp | |
3273 | This is typical output:\- | |
3274 | .Sp | |
3275 | .Vb 1 | |
3276 | \& /tmp/test.o: /tmp/test.c /tmp/test.h | |
3277 | .Ve | |
3278 | .Vb 1 | |
3279 | \& /tmp/test.h: | |
3280 | .Ve | |
3281 | .Ip "\fB\-MQ\fR \fItarget\fR" 4 | |
3282 | .IX Item "-MQ target" | |
3283 | .PD 0 | |
3284 | .Ip "\fB\-MT\fR \fItarget\fR" 4 | |
3285 | .IX Item "-MT target" | |
3286 | .PD | |
3287 | By default \s-1CPP\s0 uses the main file name, including any path, and appends | |
3288 | the object suffix, normally ``.o'', to it to obtain the name of the | |
3289 | target for dependency generation. With \fB\-MT\fR you can specify a | |
3290 | target yourself, overriding the default one. | |
3291 | .Sp | |
3292 | If you want multiple targets, you can specify them as a single argument | |
3293 | to \fB\-MT\fR, or use multiple \fB\-MT\fR options. | |
3294 | .Sp | |
3295 | The targets you specify are output in the order they appear on the | |
3296 | command line. \fB\-MQ\fR is identical to \fB\-MT\fR, except that the | |
3297 | target name is quoted for Make, but with \fB\-MT\fR it isn't. For | |
3298 | example, \-MT '$(objpfx)foo.o' gives | |
3299 | .Sp | |
3300 | .Vb 1 | |
3301 | \& $(objpfx)foo.o: /tmp/foo.c | |
3302 | .Ve | |
3303 | but \-MQ '$(objpfx)foo.o' gives | |
3304 | .Sp | |
3305 | .Vb 1 | |
3306 | \& $$(objpfx)foo.o: /tmp/foo.c | |
3307 | .Ve | |
3308 | The default target is automatically quoted, as if it were given with | |
3309 | \&\fB\-MQ\fR. | |
3310 | .Ip "\fB\-H\fR" 4 | |
3311 | .IX Item "-H" | |
3312 | Print the name of each header file used, in addition to other normal | |
3313 | activities. | |
3314 | .Ip "\fB\-A\fR\fIquestion\fR\fB(\fR\fIanswer\fR\fB)\fR" 4 | |
3315 | .IX Item "-Aquestion(answer)" | |
3316 | Assert the answer \fIanswer\fR for \fIquestion\fR, in case it is tested | |
3317 | with a preprocessing conditional such as \fB#if | |
3318 | #\fR\fIquestion\fR\fB(\fR\fIanswer\fR\fB)\fR. \fB\-A-\fR disables the standard | |
3319 | assertions that normally describe the target machine. | |
3320 | .Ip "\fB\-D\fR\fImacro\fR" 4 | |
3321 | .IX Item "-Dmacro" | |
3322 | Define macro \fImacro\fR with the string \fB1\fR as its definition. | |
3323 | .Ip "\fB\-D\fR\fImacro\fR\fB=\fR\fIdefn\fR" 4 | |
3324 | .IX Item "-Dmacro=defn" | |
3325 | Define macro \fImacro\fR as \fIdefn\fR. All instances of \fB\-D\fR on | |
3326 | the command line are processed before any \fB\-U\fR options. | |
3327 | .Sp | |
3328 | Any \fB\-D\fR and \fB\-U\fR options on the command line are processed in | |
3329 | order, and always before \fB\-imacros\fR \fIfile\fR, regardless of the | |
3330 | order in which they are written. | |
3331 | .Ip "\fB\-U\fR\fImacro\fR" 4 | |
3332 | .IX Item "-Umacro" | |
3333 | Undefine macro \fImacro\fR. \fB\-U\fR options are evaluated after all | |
3334 | \&\fB\-D\fR options, but before any \fB\-include\fR and \fB\-imacros\fR | |
3335 | options. | |
3336 | .Sp | |
3337 | Any \fB\-D\fR and \fB\-U\fR options on the command line are processed in | |
3338 | order, and always before \fB\-imacros\fR \fIfile\fR, regardless of the | |
3339 | order in which they are written. | |
3340 | .Ip "\fB\-dM\fR" 4 | |
3341 | .IX Item "-dM" | |
3342 | Tell the preprocessor to output only a list of the macro definitions | |
3343 | that are in effect at the end of preprocessing. Used with the \fB\-E\fR | |
3344 | option. | |
3345 | .Ip "\fB\-dD\fR" 4 | |
3346 | .IX Item "-dD" | |
3347 | Tell the preprocessing to pass all macro definitions into the output, in | |
3348 | their proper sequence in the rest of the output. | |
3349 | .Ip "\fB\-dN\fR" 4 | |
3350 | .IX Item "-dN" | |
3351 | Like \fB\-dD\fR except that the macro arguments and contents are omitted. | |
3352 | Only \fB#define\fR \fIname\fR is included in the output. | |
3353 | .Ip "\fB\-dI\fR" 4 | |
3354 | .IX Item "-dI" | |
3355 | Output \fB#include\fR directives in addition to the result of | |
3356 | preprocessing. | |
3357 | .Ip "\fB\-trigraphs\fR" 4 | |
3358 | .IX Item "-trigraphs" | |
3359 | Process \s-1ISO\s0 standard trigraph sequences. These are three-character | |
3360 | sequences, all starting with \fB??\fR, that are defined by \s-1ISO\s0 C to | |
3361 | stand for single characters. For example, \fB??/\fR stands for | |
3362 | \&\fB\e\fR, so \fB'??/n'\fR is a character constant for a newline. By | |
3363 | default, \s-1GCC\s0 ignores trigraphs, but in standard-conforming modes it | |
3364 | converts them. See the \fB\-std\fR and \fB\-ansi\fR options. | |
3365 | .Sp | |
3366 | The nine trigraph sequences are | |
3367 | .RS 4 | |
3368 | .Ip "\fB??(\fR" 4 | |
3369 | .IX Item "??(" | |
3370 | -> \fB[\fR | |
3371 | .Ip "\fB??)\fR" 4 | |
3372 | .IX Item "??)" | |
3373 | -> \fB]\fR | |
3374 | .Ip "\fB??<\fR" 4 | |
3375 | .IX Item "??<" | |
3376 | -> \fB{\fR | |
3377 | .Ip "\fB??>\fR" 4 | |
3378 | .IX Item "??>" | |
3379 | -> \fB}\fR | |
3380 | .Ip "\fB??=\fR" 4 | |
3381 | .IX Item "??=" | |
3382 | -> \fB#\fR | |
3383 | .Ip "\fB??/\fR" 4 | |
3384 | .IX Item "??/" | |
3385 | -> \fB\e\fR | |
3386 | .Ip "\fB??'\fR" 4 | |
3387 | .IX Item "??'" | |
3388 | -> \fB^\fR | |
3389 | .Ip "\fB??!\fR" 4 | |
3390 | .IX Item "??!" | |
3391 | -> \fB|\fR | |
3392 | .Ip "\fB??-\fR" 4 | |
3393 | .IX Item "??-" | |
3394 | -> \fB~\fR | |
3395 | .RE | |
3396 | .RS 4 | |
3397 | .Sp | |
3398 | Trigraph support is not popular, so many compilers do not implement it | |
3399 | properly. Portable code should not rely on trigraphs being either | |
3400 | converted or ignored. | |
3401 | .RE | |
3402 | .Ip "\fB\-Wp,\fR\fIoption\fR" 4 | |
3403 | .IX Item "-Wp,option" | |
3404 | Pass \fIoption\fR as an option to the preprocessor. If \fIoption\fR | |
3405 | contains commas, it is split into multiple options at the commas. | |
3406 | .Sh "Passing Options to the Assembler" | |
3407 | .IX Subsection "Passing Options to the Assembler" | |
3408 | You can pass options to the assembler. | |
3409 | .Ip "\fB\-Wa,\fR\fIoption\fR" 4 | |
3410 | .IX Item "-Wa,option" | |
3411 | Pass \fIoption\fR as an option to the assembler. If \fIoption\fR | |
3412 | contains commas, it is split into multiple options at the commas. | |
3413 | .Sh "Options for Linking" | |
3414 | .IX Subsection "Options for Linking" | |
3415 | These options come into play when the compiler links object files into | |
3416 | an executable output file. They are meaningless if the compiler is | |
3417 | not doing a link step. | |
3418 | .Ip "\fIobject-file-name\fR" 4 | |
3419 | .IX Item "object-file-name" | |
3420 | A file name that does not end in a special recognized suffix is | |
3421 | considered to name an object file or library. (Object files are | |
3422 | distinguished from libraries by the linker according to the file | |
3423 | contents.) If linking is done, these object files are used as input | |
3424 | to the linker. | |
3425 | .Ip "\fB\-c\fR" 4 | |
3426 | .IX Item "-c" | |
3427 | .PD 0 | |
3428 | .Ip "\fB\-S\fR" 4 | |
3429 | .IX Item "-S" | |
3430 | .Ip "\fB\-E\fR" 4 | |
3431 | .IX Item "-E" | |
3432 | .PD | |
3433 | If any of these options is used, then the linker is not run, and | |
3434 | object file names should not be used as arguments. | |
3435 | .Ip "\fB\-l\fR\fIlibrary\fR" 4 | |
3436 | .IX Item "-llibrary" | |
3437 | Search the library named \fIlibrary\fR when linking. | |
3438 | .Sp | |
3439 | It makes a difference where in the command you write this option; the | |
3440 | linker searches processes libraries and object files in the order they | |
3441 | are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR | |
3442 | after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers | |
3443 | to functions in \fBz\fR, those functions may not be loaded. | |
3444 | .Sp | |
3445 | The linker searches a standard list of directories for the library, | |
3446 | which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker | |
3447 | then uses this file as if it had been specified precisely by name. | |
3448 | .Sp | |
3449 | The directories searched include several standard system directories | |
3450 | plus any that you specify with \fB\-L\fR. | |
3451 | .Sp | |
3452 | Normally the files found this way are library files\-\-\-archive files | |
3453 | whose members are object files. The linker handles an archive file by | |
3454 | scanning through it for members which define symbols that have so far | |
3455 | been referenced but not defined. But if the file that is found is an | |
3456 | ordinary object file, it is linked in the usual fashion. The only | |
3457 | difference between using an \fB\-l\fR option and specifying a file name | |
3458 | is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR | |
3459 | and searches several directories. | |
3460 | .Ip "\fB\-lobjc\fR" 4 | |
3461 | .IX Item "-lobjc" | |
3462 | You need this special case of the \fB\-l\fR option in order to | |
3463 | link an Objective C program. | |
3464 | .Ip "\fB\-nostartfiles\fR" 4 | |
3465 | .IX Item "-nostartfiles" | |
3466 | Do not use the standard system startup files when linking. | |
3467 | The standard system libraries are used normally, unless \fB\-nostdlib\fR | |
3468 | or \fB\-nodefaultlibs\fR is used. | |
3469 | .Ip "\fB\-nodefaultlibs\fR" 4 | |
3470 | .IX Item "-nodefaultlibs" | |
3471 | Do not use the standard system libraries when linking. | |
3472 | Only the libraries you specify will be passed to the linker. | |
3473 | The standard startup files are used normally, unless \fB\-nostartfiles\fR | |
3474 | is used. The compiler may generate calls to memcmp, memset, and memcpy | |
3475 | for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for | |
3476 | \&\s-1BSD\s0 environments. These entries are usually resolved by entries in | |
3477 | libc. These entry points should be supplied through some other | |
3478 | mechanism when this option is specified. | |
3479 | .Ip "\fB\-nostdlib\fR" 4 | |
3480 | .IX Item "-nostdlib" | |
3481 | Do not use the standard system startup files or libraries when linking. | |
3482 | No startup files and only the libraries you specify will be passed to | |
3483 | the linker. The compiler may generate calls to memcmp, memset, and memcpy | |
3484 | for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for | |
3485 | \&\s-1BSD\s0 environments. These entries are usually resolved by entries in | |
3486 | libc. These entry points should be supplied through some other | |
3487 | mechanism when this option is specified. | |
3488 | .Sp | |
3489 | One of the standard libraries bypassed by \fB\-nostdlib\fR and | |
3490 | \&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines | |
3491 | that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special | |
3492 | needs for some languages. | |
3493 | .Sp | |
3494 | In most cases, you need \fIlibgcc.a\fR even when you want to avoid | |
3495 | other standard libraries. In other words, when you specify \fB\-nostdlib\fR | |
3496 | or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well. | |
3497 | This ensures that you have no unresolved references to internal \s-1GCC\s0 | |
3498 | library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+ | |
3499 | constructors will be called.) | |
3500 | .Ip "\fB\-s\fR" 4 | |
3501 | .IX Item "-s" | |
3502 | Remove all symbol table and relocation information from the executable. | |
3503 | .Ip "\fB\-static\fR" 4 | |
3504 | .IX Item "-static" | |
3505 | On systems that support dynamic linking, this prevents linking with the shared | |
3506 | libraries. On other systems, this option has no effect. | |
3507 | .Ip "\fB\-shared\fR" 4 | |
3508 | .IX Item "-shared" | |
3509 | Produce a shared object which can then be linked with other objects to | |
3510 | form an executable. Not all systems support this option. For predictable | |
3511 | results, you must also specify the same set of options that were used to | |
3512 | generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions) | |
3513 | when you specify this option.[1] | |
3514 | .Ip "\fB\-shared-libgcc\fR" 4 | |
3515 | .IX Item "-shared-libgcc" | |
3516 | .PD 0 | |
3517 | .Ip "\fB\-static-libgcc\fR" 4 | |
3518 | .IX Item "-static-libgcc" | |
3519 | .PD | |
3520 | On systems that provide \fIlibgcc\fR as a shared library, these options | |
3521 | force the use of either the shared or static version respectively. | |
3522 | If no shared version of \fIlibgcc\fR was built when the compiler was | |
3523 | configured, these options have no effect. | |
3524 | .Sp | |
3525 | There are several situations in which an application should use the | |
3526 | shared \fIlibgcc\fR instead of the static version. The most common | |
3527 | of these is when the application wishes to throw and catch exceptions | |
3528 | across different shared libraries. In that case, each of the libraries | |
3529 | as well as the application itself should use the shared \fIlibgcc\fR. | |
3530 | .Sp | |
3531 | At present the \s-1GCC\s0 driver makes no attempt to recognize the situations | |
3532 | in which the shared \fIlibgcc\fR should be used, and defaults to using | |
3533 | the static \fIlibgcc\fR always. This will likely change in the future, | |
3534 | at which time \fB\-static-libgcc\fR becomes useful as a means for | |
3535 | overriding \s-1GCC\s0's choice. | |
3536 | .Ip "\fB\-symbolic\fR" 4 | |
3537 | .IX Item "-symbolic" | |
3538 | Bind references to global symbols when building a shared object. Warn | |
3539 | about any unresolved references (unless overridden by the link editor | |
3540 | option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support | |
3541 | this option. | |
3542 | .Ip "\fB\-Xlinker\fR \fIoption\fR" 4 | |
3543 | .IX Item "-Xlinker option" | |
3544 | Pass \fIoption\fR as an option to the linker. You can use this to | |
3545 | supply system-specific linker options which \s-1GCC\s0 does not know how to | |
3546 | recognize. | |
3547 | .Sp | |
3548 | If you want to pass an option that takes an argument, you must use | |
3549 | \&\fB\-Xlinker\fR twice, once for the option and once for the argument. | |
3550 | For example, to pass \fB\-assert definitions\fR, you must write | |
3551 | \&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write | |
3552 | \&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire | |
3553 | string as a single argument, which is not what the linker expects. | |
3554 | .Ip "\fB\-Wl,\fR\fIoption\fR" 4 | |
3555 | .IX Item "-Wl,option" | |
3556 | Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains | |
3557 | commas, it is split into multiple options at the commas. | |
3558 | .Ip "\fB\-u\fR \fIsymbol\fR" 4 | |
3559 | .IX Item "-u symbol" | |
3560 | Pretend the symbol \fIsymbol\fR is undefined, to force linking of | |
3561 | library modules to define it. You can use \fB\-u\fR multiple times with | |
3562 | different symbols to force loading of additional library modules. | |
3563 | .Sh "Options for Directory Search" | |
3564 | .IX Subsection "Options for Directory Search" | |
3565 | These options specify directories to search for header files, for | |
3566 | libraries and for parts of the compiler: | |
3567 | .Ip "\fB\-I\fR\fIdir\fR" 4 | |
3568 | .IX Item "-Idir" | |
3569 | Add the directory \fIdir\fR to the head of the list of directories to be | |
3570 | searched for header files. This can be used to override a system header | |
3571 | file, substituting your own version, since these directories are | |
3572 | searched before the system header file directories. If you use more | |
3573 | than one \fB\-I\fR option, the directories are scanned in left-to-right | |
3574 | order; the standard system directories come after. | |
3575 | .Ip "\fB\-I-\fR" 4 | |
3576 | .IX Item "-I-" | |
3577 | Any directories you specify with \fB\-I\fR options before the \fB\-I-\fR | |
3578 | option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR; | |
3579 | they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR. | |
3580 | .Sp | |
3581 | If additional directories are specified with \fB\-I\fR options after | |
3582 | the \fB\-I-\fR, these directories are searched for all \fB#include\fR | |
3583 | directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used | |
3584 | this way.) | |
3585 | .Sp | |
3586 | In addition, the \fB\-I-\fR option inhibits the use of the current | |
3587 | directory (where the current input file came from) as the first search | |
3588 | directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to | |
3589 | override this effect of \fB\-I-\fR. With \fB\-I.\fR you can specify | |
3590 | searching the directory which was current when the compiler was | |
3591 | invoked. That is not exactly the same as what the preprocessor does | |
3592 | by default, but it is often satisfactory. | |
3593 | .Sp | |
3594 | \&\fB\-I-\fR does not inhibit the use of the standard system directories | |
3595 | for header files. Thus, \fB\-I-\fR and \fB\-nostdinc\fR are | |
3596 | independent. | |
3597 | .Ip "\fB\-L\fR\fIdir\fR" 4 | |
3598 | .IX Item "-Ldir" | |
3599 | Add directory \fIdir\fR to the list of directories to be searched | |
3600 | for \fB\-l\fR. | |
3601 | .Ip "\fB\-B\fR\fIprefix\fR" 4 | |
3602 | .IX Item "-Bprefix" | |
3603 | This option specifies where to find the executables, libraries, | |
3604 | include files, and data files of the compiler itself. | |
3605 | .Sp | |
3606 | The compiler driver program runs one or more of the subprograms | |
3607 | \&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries | |
3608 | \&\fIprefix\fR as a prefix for each program it tries to run, both with and | |
3609 | without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR. | |
3610 | .Sp | |
3611 | For each subprogram to be run, the compiler driver first tries the | |
3612 | \&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR | |
3613 | was not specified, the driver tries two standard prefixes, which are | |
3614 | \&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc-lib/\fR. If neither of | |
3615 | those results in a file name that is found, the unmodified program | |
3616 | name is searched for using the directories specified in your | |
3617 | \&\fB\s-1PATH\s0\fR environment variable. | |
3618 | .Sp | |
3619 | \&\fB\-B\fR prefixes that effectively specify directory names also apply | |
3620 | to libraries in the linker, because the compiler translates these | |
3621 | options into \fB\-L\fR options for the linker. They also apply to | |
3622 | includes files in the preprocessor, because the compiler translates these | |
3623 | options into \fB\-isystem\fR options for the preprocessor. In this case, | |
3624 | the compiler appends \fBinclude\fR to the prefix. | |
3625 | .Sp | |
3626 | The run-time support file \fIlibgcc.a\fR can also be searched for using | |
3627 | the \fB\-B\fR prefix, if needed. If it is not found there, the two | |
3628 | standard prefixes above are tried, and that is all. The file is left | |
3629 | out of the link if it is not found by those means. | |
3630 | .Sp | |
3631 | Another way to specify a prefix much like the \fB\-B\fR prefix is to use | |
3632 | the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR. | |
3633 | .Ip "\fB\-specs=\fR\fIfile\fR" 4 | |
3634 | .IX Item "-specs=file" | |
3635 | Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR | |
3636 | file, in order to override the defaults that the \fIgcc\fR driver | |
3637 | program uses when determining what switches to pass to \fIcc1\fR, | |
3638 | \&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one | |
3639 | \&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they | |
3640 | are processed in order, from left to right. | |
3641 | .Sh "Specifying Target Machine and Compiler Version" | |
3642 | .IX Subsection "Specifying Target Machine and Compiler Version" | |
3643 | By default, \s-1GCC\s0 compiles code for the same type of machine that you | |
861bb6c1 JL |
3644 | are using. However, it can also be installed as a cross-compiler, to |
3645 | compile for some other type of machine. In fact, several different | |
4bc1997b | 3646 | configurations of \s-1GCC\s0, for different target machines, can be |
861bb6c1 | 3647 | installed side by side. Then you specify which one to use with the |
4bc1997b | 3648 | \&\fB\-b\fR option. |
861bb6c1 | 3649 | .PP |
4bc1997b | 3650 | In addition, older and newer versions of \s-1GCC\s0 can be installed side |
861bb6c1 JL |
3651 | by side. One of them (probably the newest) will be the default, but |
3652 | you may sometimes wish to use another. | |
4bc1997b JM |
3653 | .Ip "\fB\-b\fR \fImachine\fR" 4 |
3654 | .IX Item "-b machine" | |
3655 | The argument \fImachine\fR specifies the target machine for compilation. | |
3656 | This is useful when you have installed \s-1GCC\s0 as a cross-compiler. | |
3657 | .Sp | |
3658 | The value to use for \fImachine\fR is the same as was specified as the | |
3659 | machine type when configuring \s-1GCC\s0 as a cross-compiler. For | |
3660 | example, if a cross-compiler was configured with \fBconfigure | |
3661 | i386v\fR, meaning to compile for an 80386 running System V, then you | |
3662 | would specify \fB\-b i386v\fR to run that cross compiler. | |
3663 | .Sp | |
3664 | When you do not specify \fB\-b\fR, it normally means to compile for | |
861bb6c1 | 3665 | the same type of machine that you are using. |
4bc1997b JM |
3666 | .Ip "\fB\-V\fR \fIversion\fR" 4 |
3667 | .IX Item "-V version" | |
3668 | The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run. | |
861bb6c1 | 3669 | This is useful when multiple versions are installed. For example, |
4bc1997b JM |
3670 | \&\fIversion\fR might be \fB2.0\fR, meaning to run \s-1GCC\s0 version 2.0. |
3671 | .Sp | |
3672 | The default version, when you do not specify \fB\-V\fR, is the last | |
3673 | version of \s-1GCC\s0 that you installed. | |
3674 | .PP | |
3675 | The \fB\-b\fR and \fB\-V\fR options actually work by controlling part of | |
3676 | the file name used for the executable files and libraries used for | |
3677 | compilation. A given version of \s-1GCC\s0, for a given target machine, is | |
3678 | normally kept in the directory \fI/usr/local/lib/gcc-lib/\fImachine\fI/\fIversion\fI\fR. | |
3679 | .PP | |
3680 | Thus, sites can customize the effect of \fB\-b\fR or \fB\-V\fR either by | |
3681 | changing the names of these directories or adding alternate names (or | |
3682 | symbolic links). If in directory \fI/usr/local/lib/gcc-lib/\fR the | |
3683 | file \fI80386\fR is a link to the file \fIi386v\fR, then \fB\-b | |
3684 | 80386\fR becomes an alias for \fB\-b i386v\fR. | |
3685 | .PP | |
3686 | In one respect, the \fB\-b\fR or \fB\-V\fR do not completely change | |
3687 | to a different compiler: the top-level driver program \fBgcc\fR | |
3688 | that you originally invoked continues to run and invoke the other | |
3689 | executables (preprocessor, compiler per se, assembler and linker) | |
3690 | that do the real work. However, since no real work is done in the | |
3691 | driver program, it usually does not matter that the driver program | |
3692 | in use is not the one for the specified target. It is common for the | |
3693 | interface to the other executables to change incompatibly between | |
3694 | compiler versions, so unless the version specified is very close to that | |
3695 | of the driver (for example, \fB\-V 3.0\fR with a driver program from \s-1GCC\s0 | |
3696 | version 3.0.1), use of \fB\-V\fR may not work; for example, using | |
3697 | \&\fB\-V 2.95.2\fR will not work with a driver program from \s-1GCC\s0 3.0. | |
3698 | .PP | |
3699 | The only way that the driver program depends on the target machine is | |
3700 | in the parsing and handling of special machine-specific options. | |
3701 | However, this is controlled by a file which is found, along with the | |
3702 | other executables, in the directory for the specified version and | |
3703 | target machine. As a result, a single installed driver program adapts | |
3704 | to any specified target machine, and sufficiently similar compiler | |
3705 | versions. | |
3706 | .PP | |
3707 | The driver program executable does control one significant thing, | |
3708 | however: the default version and target machine. Therefore, you can | |
3709 | install different instances of the driver program, compiled for | |
3710 | different targets or versions, under different names. | |
3711 | .PP | |
3712 | For example, if the driver for version 2.0 is installed as \fBogcc\fR | |
3713 | and that for version 2.1 is installed as \fBgcc\fR, then the command | |
3714 | \&\fBgcc\fR will use version 2.1 by default, while \fBogcc\fR will use | |
3715 | 2.0 by default. However, you can choose either version with either | |
3716 | command with the \fB\-V\fR option. | |
3717 | .Sh "Hardware Models and Configurations" | |
3718 | .IX Subsection "Hardware Models and Configurations" | |
3719 | Earlier we discussed the standard option \fB\-b\fR which chooses among | |
3720 | different installed compilers for completely different target | |
3721 | machines, such as Vax vs. 68000 vs. 80386. | |
3722 | .PP | |
3723 | In addition, each of these target machine types can have its own | |
3724 | special options, starting with \fB\-m\fR, to choose among various | |
3725 | hardware models or configurations\-\-\-for example, 68010 vs 68020, | |
3726 | floating coprocessor or none. A single installed version of the | |
3727 | compiler can compile for any model or configuration, according to the | |
3728 | options specified. | |
861bb6c1 JL |
3729 | .PP |
3730 | Some configurations of the compiler also support additional special | |
4bc1997b JM |
3731 | options, usually for compatibility with other compilers on the same |
3732 | platform. | |
3733 | .PP | |
3734 | .I "M680x0 Options" | |
3735 | .IX Subsection "M680x0 Options" | |
861bb6c1 | 3736 | .PP |
4bc1997b JM |
3737 | These are the \fB\-m\fR options defined for the 68000 series. The default |
3738 | values for these options depends on which style of 68000 was selected when | |
3739 | the compiler was configured; the defaults for the most common choices are | |
3740 | given below. | |
3741 | .Ip "\fB\-m68000\fR" 4 | |
3742 | .IX Item "-m68000" | |
3743 | .PD 0 | |
3744 | .Ip "\fB\-mc68000\fR" 4 | |
3745 | .IX Item "-mc68000" | |
3746 | .PD | |
3747 | Generate output for a 68000. This is the default | |
3748 | when the compiler is configured for 68000\-based systems. | |
3749 | .Sp | |
3750 | Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core, | |
3751 | including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356. | |
3752 | .Ip "\fB\-m68020\fR" 4 | |
3753 | .IX Item "-m68020" | |
3754 | .PD 0 | |
3755 | .Ip "\fB\-mc68020\fR" 4 | |
3756 | .IX Item "-mc68020" | |
3757 | .PD | |
3758 | Generate output for a 68020. This is the default | |
3759 | when the compiler is configured for 68020\-based systems. | |
3760 | .Ip "\fB\-m68881\fR" 4 | |
3761 | .IX Item "-m68881" | |
861bb6c1 | 3762 | Generate output containing 68881 instructions for floating point. |
4bc1997b JM |
3763 | This is the default for most 68020 systems unless \fB\-nfp\fR was |
3764 | specified when the compiler was configured. | |
3765 | .Ip "\fB\-m68030\fR" 4 | |
3766 | .IX Item "-m68030" | |
861bb6c1 | 3767 | Generate output for a 68030. This is the default when the compiler is |
4bc1997b JM |
3768 | configured for 68030\-based systems. |
3769 | .Ip "\fB\-m68040\fR" 4 | |
3770 | .IX Item "-m68040" | |
861bb6c1 | 3771 | Generate output for a 68040. This is the default when the compiler is |
4bc1997b JM |
3772 | configured for 68040\-based systems. |
3773 | .Sp | |
3774 | This option inhibits the use of 68881/68882 instructions that have to be | |
3775 | emulated by software on the 68040. Use this option if your 68040 does not | |
3776 | have code to emulate those instructions. | |
3777 | .Ip "\fB\-m68060\fR" 4 | |
3778 | .IX Item "-m68060" | |
3779 | Generate output for a 68060. This is the default when the compiler is | |
3780 | configured for 68060\-based systems. | |
3781 | .Sp | |
3782 | This option inhibits the use of 68020 and 68881/68882 instructions that | |
3783 | have to be emulated by software on the 68060. Use this option if your 68060 | |
3784 | does not have code to emulate those instructions. | |
3785 | .Ip "\fB\-mcpu32\fR" 4 | |
3786 | .IX Item "-mcpu32" | |
3787 | Generate output for a \s-1CPU32\s0. This is the default | |
3788 | when the compiler is configured for CPU32\-based systems. | |
3789 | .Sp | |
3790 | Use this option for microcontrollers with a | |
3791 | \&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334, | |
3792 | 68336, 68340, 68341, 68349 and 68360. | |
3793 | .Ip "\fB\-m5200\fR" 4 | |
3794 | .IX Item "-m5200" | |
3795 | Generate output for a 520X \*(L"coldfire\*(R" family cpu. This is the default | |
3796 | when the compiler is configured for 520X-based systems. | |
3797 | .Sp | |
3798 | Use this option for microcontroller with a 5200 core, including | |
3799 | the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0. | |
3800 | .Ip "\fB\-m68020\-40\fR" 4 | |
3801 | .IX Item "-m68020-40" | |
861bb6c1 JL |
3802 | Generate output for a 68040, without using any of the new instructions. |
3803 | This results in code which can run relatively efficiently on either a | |
4bc1997b JM |
3804 | 68020/68881 or a 68030 or a 68040. The generated code does use the |
3805 | 68881 instructions that are emulated on the 68040. | |
3806 | .Ip "\fB\-m68020\-60\fR" 4 | |
3807 | .IX Item "-m68020-60" | |
3808 | Generate output for a 68060, without using any of the new instructions. | |
3809 | This results in code which can run relatively efficiently on either a | |
3810 | 68020/68881 or a 68030 or a 68040. The generated code does use the | |
3811 | 68881 instructions that are emulated on the 68060. | |
3812 | .Ip "\fB\-mfpa\fR" 4 | |
3813 | .IX Item "-mfpa" | |
3814 | Generate output containing Sun \s-1FPA\s0 instructions for floating point. | |
3815 | .Ip "\fB\-msoft-float\fR" 4 | |
3816 | .IX Item "-msoft-float" | |
861bb6c1 | 3817 | Generate output containing library calls for floating point. |
4bc1997b JM |
3818 | \&\fBWarning:\fR the requisite libraries are not available for all m68k |
3819 | targets. Normally the facilities of the machine's usual C compiler are | |
3820 | used, but this can't be done directly in cross-compilation. You must | |
3821 | make your own arrangements to provide suitable library functions for | |
3822 | cross-compilation. The embedded targets \fBm68k-*\-aout\fR and | |
3823 | \&\fBm68k-*\-coff\fR do provide software floating point support. | |
3824 | .Ip "\fB\-mshort\fR" 4 | |
3825 | .IX Item "-mshort" | |
3826 | Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. | |
3827 | .Ip "\fB\-mnobitfield\fR" 4 | |
3828 | .IX Item "-mnobitfield" | |
3829 | Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR | |
3830 | and \fB\-m5200\fR options imply \fB\-mnobitfield\fR. | |
3831 | .Ip "\fB\-mbitfield\fR" 4 | |
3832 | .IX Item "-mbitfield" | |
3833 | Do use the bit-field instructions. The \fB\-m68020\fR option implies | |
3834 | \&\fB\-mbitfield\fR. This is the default if you use a configuration | |
3835 | designed for a 68020. | |
3836 | .Ip "\fB\-mrtd\fR" 4 | |
3837 | .IX Item "-mrtd" | |
861bb6c1 | 3838 | Use a different function-calling convention, in which functions |
4bc1997b | 3839 | that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR |
861bb6c1 JL |
3840 | instruction, which pops their arguments while returning. This |
3841 | saves one instruction in the caller since there is no need to pop | |
3842 | the arguments there. | |
3843 | .Sp | |
3844 | This calling convention is incompatible with the one normally | |
3845 | used on Unix, so you cannot use it if you need to call libraries | |
3846 | compiled with the Unix compiler. | |
3847 | .Sp | |
3848 | Also, you must provide function prototypes for all functions that | |
4bc1997b | 3849 | take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); |
861bb6c1 JL |
3850 | otherwise incorrect code will be generated for calls to those |
3851 | functions. | |
3852 | .Sp | |
3853 | In addition, seriously incorrect code will result if you call a | |
3854 | function with too many arguments. (Normally, extra arguments are | |
3855 | harmlessly ignored.) | |
3856 | .Sp | |
4bc1997b JM |
3857 | The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030, |
3858 | 68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200. | |
3859 | .Ip "\fB\-malign-int\fR" 4 | |
3860 | .IX Item "-malign-int" | |
3861 | .PD 0 | |
3862 | .Ip "\fB\-mno-align-int\fR" 4 | |
3863 | .IX Item "-mno-align-int" | |
3864 | .PD | |
3865 | Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR, | |
3866 | \&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit | |
3867 | boundary (\fB\-malign-int\fR) or a 16\-bit boundary (\fB\-mno-align-int\fR). | |
3868 | Aligning variables on 32\-bit boundaries produces code that runs somewhat | |
3869 | faster on processors with 32\-bit busses at the expense of more memory. | |
3870 | .Sp | |
3871 | \&\fBWarning:\fR if you use the \fB\-malign-int\fR switch, \s-1GCC\s0 will | |
3872 | align structures containing the above types differently than | |
3873 | most published application binary interface specifications for the m68k. | |
3874 | .Ip "\fB\-mpcrel\fR" 4 | |
3875 | .IX Item "-mpcrel" | |
3876 | Use the pc-relative addressing mode of the 68000 directly, instead of | |
3877 | using a global offset table. At present, this option implies \-fpic, | |
3878 | allowing at most a 16\-bit offset for pc-relative addressing. \-fPIC is | |
3879 | not presently supported with \-mpcrel, though this could be supported for | |
3880 | 68020 and higher processors. | |
3881 | .Ip "\fB\-mno-strict-align\fR" 4 | |
3882 | .IX Item "-mno-strict-align" | |
3883 | .PD 0 | |
3884 | .Ip "\fB\-mstrict-align\fR" 4 | |
3885 | .IX Item "-mstrict-align" | |
3886 | .PD | |
3887 | Do not (do) assume that unaligned memory references will be handled by | |
3888 | the system. | |
861bb6c1 | 3889 | .PP |
4bc1997b JM |
3890 | .I "M68hc1x Options" |
3891 | .IX Subsection "M68hc1x Options" | |
3892 | .PP | |
3893 | These are the \fB\-m\fR options defined for the 68hc11 and 68hc12 | |
3894 | microcontrollers. The default values for these options depends on | |
3895 | which style of microcontroller was selected when the compiler was configured; | |
3896 | the defaults for the most common choices are given below. | |
3897 | .Ip "\fB\-m6811\fR" 4 | |
3898 | .IX Item "-m6811" | |
3899 | .PD 0 | |
3900 | .Ip "\fB\-m68hc11\fR" 4 | |
3901 | .IX Item "-m68hc11" | |
3902 | .PD | |
3903 | Generate output for a 68HC11. This is the default | |
3904 | when the compiler is configured for 68HC11\-based systems. | |
3905 | .Ip "\fB\-m6812\fR" 4 | |
3906 | .IX Item "-m6812" | |
3907 | .PD 0 | |
3908 | .Ip "\fB\-m68hc12\fR" 4 | |
3909 | .IX Item "-m68hc12" | |
3910 | .PD | |
3911 | Generate output for a 68HC12. This is the default | |
3912 | when the compiler is configured for 68HC12\-based systems. | |
3913 | .Ip "\fB\-mauto-incdec\fR" 4 | |
3914 | .IX Item "-mauto-incdec" | |
3915 | Enable the use of 68HC12 pre and post auto-increment and auto-decrement | |
3916 | addressing modes. | |
3917 | .Ip "\fB\-mshort\fR" 4 | |
3918 | .IX Item "-mshort" | |
3919 | Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. | |
3920 | .Ip "\fB\-msoft-reg-count=\fR\fIcount\fR" 4 | |
3921 | .IX Item "-msoft-reg-count=count" | |
456aadaa SC |
3922 | Specify the number of pseudo-soft registers which are used for the |
3923 | code generation. The maximum number is 32. Using more pseudo-soft | |
3924 | register may or may not result in better code depending on the program. | |
3925 | The default is 4 for 68HC11 and 2 for 68HC12. | |
456aadaa | 3926 | .PP |
4bc1997b JM |
3927 | .I "\s-1VAX\s0 Options" |
3928 | .IX Subsection "VAX Options" | |
3929 | .PP | |
3930 | These \fB\-m\fR options are defined for the Vax: | |
3931 | .Ip "\fB\-munix\fR" 4 | |
3932 | .IX Item "-munix" | |
3933 | Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on) | |
861bb6c1 JL |
3934 | that the Unix assembler for the Vax cannot handle across long |
3935 | ranges. | |
4bc1997b JM |
3936 | .Ip "\fB\-mgnu\fR" 4 |
3937 | .IX Item "-mgnu" | |
861bb6c1 | 3938 | Do output those jump instructions, on the assumption that you |
4bc1997b JM |
3939 | will assemble with the \s-1GNU\s0 assembler. |
3940 | .Ip "\fB\-mg\fR" 4 | |
3941 | .IX Item "-mg" | |
861bb6c1 JL |
3942 | Output code for g-format floating point numbers instead of d-format. |
3943 | .PP | |
4bc1997b JM |
3944 | .I "\s-1SPARC\s0 Options" |
3945 | .IX Subsection "SPARC Options" | |
861bb6c1 | 3946 | .PP |
4bc1997b JM |
3947 | These \fB\-m\fR switches are supported on the \s-1SPARC:\s0 |
3948 | .Ip "\fB\-mno-app-regs\fR" 4 | |
3949 | .IX Item "-mno-app-regs" | |
3950 | .PD 0 | |
3951 | .Ip "\fB\-mapp-regs\fR" 4 | |
3952 | .IX Item "-mapp-regs" | |
3953 | .PD | |
3954 | Specify \fB\-mapp-regs\fR to generate output using the global registers | |
3955 | 2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This | |
3956 | is the default. | |
3957 | .Sp | |
3958 | To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss, | |
3959 | specify \fB\-mno-app-regs\fR. You should compile libraries and system | |
3960 | software with this option. | |
3961 | .Ip "\fB\-mfpu\fR" 4 | |
3962 | .IX Item "-mfpu" | |
3963 | .PD 0 | |
3964 | .Ip "\fB\-mhard-float\fR" 4 | |
3965 | .IX Item "-mhard-float" | |
3966 | .PD | |
861bb6c1 JL |
3967 | Generate output containing floating point instructions. This is the |
3968 | default. | |
4bc1997b JM |
3969 | .Ip "\fB\-mno-fpu\fR" 4 |
3970 | .IX Item "-mno-fpu" | |
3971 | .PD 0 | |
3972 | .Ip "\fB\-msoft-float\fR" 4 | |
3973 | .IX Item "-msoft-float" | |
3974 | .PD | |
861bb6c1 | 3975 | Generate output containing library calls for floating point. |
4bc1997b JM |
3976 | \&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0 |
3977 | targets. Normally the facilities of the machine's usual C compiler are | |
3978 | used, but this cannot be done directly in cross-compilation. You must make | |
3979 | your own arrangements to provide suitable library functions for | |
3980 | cross-compilation. The embedded targets \fBsparc-*\-aout\fR and | |
3981 | \&\fBsparclite-*\-*\fR do provide software floating point support. | |
3982 | .Sp | |
3983 | \&\fB\-msoft-float\fR changes the calling convention in the output file; | |
3984 | therefore, it is only useful if you compile \fIall\fR of a program with | |
3985 | this option. In particular, you need to compile \fIlibgcc.a\fR, the | |
3986 | library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for | |
3987 | this to work. | |
3988 | .Ip "\fB\-mhard-quad-float\fR" 4 | |
3989 | .IX Item "-mhard-quad-float" | |
3990 | Generate output containing quad-word (long double) floating point | |
3991 | instructions. | |
3992 | .Ip "\fB\-msoft-quad-float\fR" 4 | |
3993 | .IX Item "-msoft-quad-float" | |
3994 | Generate output containing library calls for quad-word (long double) | |
3995 | floating point instructions. The functions called are those specified | |
3996 | in the \s-1SPARC\s0 \s-1ABI\s0. This is the default. | |
3997 | .Sp | |
3998 | As of this writing, there are no sparc implementations that have hardware | |
3999 | support for the quad-word floating point instructions. They all invoke | |
4000 | a trap handler for one of these instructions, and then the trap handler | |
4001 | emulates the effect of the instruction. Because of the trap handler overhead, | |
4002 | this is much slower than calling the \s-1ABI\s0 library routines. Thus the | |
4003 | \&\fB\-msoft-quad-float\fR option is the default. | |
4004 | .Ip "\fB\-mno-epilogue\fR" 4 | |
4005 | .IX Item "-mno-epilogue" | |
4006 | .PD 0 | |
4007 | .Ip "\fB\-mepilogue\fR" 4 | |
4008 | .IX Item "-mepilogue" | |
4009 | .PD | |
4010 | With \fB\-mepilogue\fR (the default), the compiler always emits code for | |
861bb6c1 JL |
4011 | function exit at the end of each function. Any function exit in |
4012 | the middle of the function (such as a return statement in C) will | |
4013 | generate a jump to the exit code at the end of the function. | |
4014 | .Sp | |
4bc1997b JM |
4015 | With \fB\-mno-epilogue\fR, the compiler tries to emit exit code inline |
4016 | at every function exit. | |
4017 | .Ip "\fB\-mno-flat\fR" 4 | |
4018 | .IX Item "-mno-flat" | |
4019 | .PD 0 | |
4020 | .Ip "\fB\-mflat\fR" 4 | |
4021 | .IX Item "-mflat" | |
4022 | .PD | |
4023 | With \fB\-mflat\fR, the compiler does not generate save/restore instructions | |
4024 | and will use a \*(L"flat\*(R" or single register window calling convention. | |
4025 | This model uses \f(CW%i7\fR as the frame pointer and is compatible with the normal | |
4026 | register window model. Code from either may be intermixed. | |
4027 | The local registers and the input registers (0\-5) are still treated as | |
4028 | \&\*(L"call saved\*(R" registers and will be saved on the stack as necessary. | |
4029 | .Sp | |
4030 | With \fB\-mno-flat\fR (the default), the compiler emits save/restore | |
4031 | instructions (except for leaf functions) and is the normal mode of operation. | |
4032 | .Ip "\fB\-mno-unaligned-doubles\fR" 4 | |
4033 | .IX Item "-mno-unaligned-doubles" | |
4034 | .PD 0 | |
4035 | .Ip "\fB\-munaligned-doubles\fR" 4 | |
4036 | .IX Item "-munaligned-doubles" | |
4037 | .PD | |
4038 | Assume that doubles have 8 byte alignment. This is the default. | |
4039 | .Sp | |
4040 | With \fB\-munaligned-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte | |
4041 | alignment only if they are contained in another type, or if they have an | |
4042 | absolute address. Otherwise, it assumes they have 4 byte alignment. | |
4043 | Specifying this option avoids some rare compatibility problems with code | |
4044 | generated by other compilers. It is not the default because it results | |
4045 | in a performance loss, especially for floating point code. | |
4046 | .Ip "\fB\-mno-faster-structs\fR" 4 | |
4047 | .IX Item "-mno-faster-structs" | |
4048 | .PD 0 | |
4049 | .Ip "\fB\-mfaster-structs\fR" 4 | |
4050 | .IX Item "-mfaster-structs" | |
4051 | .PD | |
4052 | With \fB\-mfaster-structs\fR, the compiler assumes that structures | |
4053 | should have 8 byte alignment. This enables the use of pairs of | |
4054 | \&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure | |
4055 | assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs. | |
4056 | However, the use of this changed alignment directly violates the Sparc | |
4057 | \&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer | |
4058 | acknowledges that their resulting code will not be directly in line with | |
4059 | the rules of the \s-1ABI\s0. | |
4060 | .Ip "\fB\-mv8\fR" 4 | |
4061 | .IX Item "-mv8" | |
4062 | .PD 0 | |
4063 | .Ip "\fB\-msparclite\fR" 4 | |
4064 | .IX Item "-msparclite" | |
4065 | .PD | |
4066 | These two options select variations on the \s-1SPARC\s0 architecture. | |
861bb6c1 JL |
4067 | .Sp |
4068 | By default (unless specifically configured for the Fujitsu SPARClite), | |
4bc1997b | 4069 | \&\s-1GCC\s0 generates code for the v7 variant of the \s-1SPARC\s0 architecture. |
861bb6c1 | 4070 | .Sp |
4bc1997b | 4071 | \&\fB\-mv8\fR will give you \s-1SPARC\s0 v8 code. The only difference from v7 |
861bb6c1 | 4072 | code is that the compiler emits the integer multiply and integer |
4bc1997b JM |
4073 | divide instructions which exist in \s-1SPARC\s0 v8 but not in \s-1SPARC\s0 v7. |
4074 | .Sp | |
4075 | \&\fB\-msparclite\fR will give you SPARClite code. This adds the integer | |
4076 | multiply, integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which | |
4077 | exist in SPARClite but not in \s-1SPARC\s0 v7. | |
4078 | .Sp | |
4079 | These options are deprecated and will be deleted in a future \s-1GCC\s0 release. | |
4080 | They have been replaced with \fB\-mcpu=xxx\fR. | |
4081 | .Ip "\fB\-mcypress\fR" 4 | |
4082 | .IX Item "-mcypress" | |
4083 | .PD 0 | |
4084 | .Ip "\fB\-msupersparc\fR" 4 | |
4085 | .IX Item "-msupersparc" | |
4086 | .PD | |
861bb6c1 JL |
4087 | These two options select the processor for which the code is optimised. |
4088 | .Sp | |
4bc1997b JM |
4089 | With \fB\-mcypress\fR (the default), the compiler optimizes code for the |
4090 | Cypress \s-1CY7C602\s0 chip, as used in the SparcStation/SparcServer 3xx series. | |
4091 | This is also appropriate for the older SparcStation 1, 2, \s-1IPX\s0 etc. | |
4092 | .Sp | |
4093 | With \fB\-msupersparc\fR the compiler optimizes code for the SuperSparc cpu, as | |
4094 | used in the SparcStation 10, 1000 and 2000 series. This flag also enables use | |
4095 | of the full \s-1SPARC\s0 v8 instruction set. | |
4096 | .Sp | |
4097 | These options are deprecated and will be deleted in a future \s-1GCC\s0 release. | |
4098 | They have been replaced with \fB\-mcpu=xxx\fR. | |
4099 | .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 | |
4100 | .IX Item "-mcpu=cpu_type" | |
4101 | Set the instruction set, register set, and instruction scheduling parameters | |
4102 | for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are | |
4103 | \&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR, | |
4104 | \&\fBhypersparc\fR, \fBsparclite86x\fR, \fBf930\fR, \fBf934\fR, | |
4105 | \&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, and \fBultrasparc\fR. | |
4106 | .Sp | |
4107 | Default instruction scheduling parameters are used for values that select | |
4108 | an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR, | |
4109 | \&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR. | |
4110 | .Sp | |
4111 | Here is a list of each supported architecture and their supported | |
4112 | implementations. | |
4113 | .Sp | |
4114 | .Vb 5 | |
4115 | \& v7: cypress | |
4116 | \& v8: supersparc, hypersparc | |
4117 | \& sparclite: f930, f934, sparclite86x | |
4118 | \& sparclet: tsc701 | |
4119 | \& v9: ultrasparc | |
4120 | .Ve | |
4121 | .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 | |
4122 | .IX Item "-mtune=cpu_type" | |
4123 | Set the instruction scheduling parameters for machine type | |
4124 | \&\fIcpu_type\fR, but do not set the instruction set or register set that the | |
4125 | option \fB\-mcpu=\fR\fIcpu_type\fR would. | |
4126 | .Sp | |
4127 | The same values for \fB\-mcpu=\fR\fIcpu_type\fR are used for | |
4128 | \&\fB\-mtune=\fR\fIcpu_type\fR, though the only useful values are those that | |
4129 | select a particular cpu implementation: \fBcypress\fR, \fBsupersparc\fR, | |
4130 | \&\fBhypersparc\fR, \fBf930\fR, \fBf934\fR, \fBsparclite86x\fR, | |
4131 | \&\fBtsc701\fR, \fBultrasparc\fR. | |
4132 | .PP | |
4133 | These \fB\-m\fR switches are supported in addition to the above | |
4134 | on the \s-1SPARCLET\s0 processor. | |
4135 | .Ip "\fB\-mlittle-endian\fR" 4 | |
4136 | .IX Item "-mlittle-endian" | |
4137 | Generate code for a processor running in little-endian mode. | |
4138 | .Ip "\fB\-mlive-g0\fR" 4 | |
4139 | .IX Item "-mlive-g0" | |
4140 | Treat register \f(CW\*(C`%g0\*(C'\fR as a normal register. | |
4141 | \&\s-1GCC\s0 will continue to clobber it as necessary but will not assume | |
4142 | it always reads as 0. | |
4143 | .Ip "\fB\-mbroken-saverestore\fR" 4 | |
4144 | .IX Item "-mbroken-saverestore" | |
4145 | Generate code that does not use non-trivial forms of the \f(CW\*(C`save\*(C'\fR and | |
4146 | \&\f(CW\*(C`restore\*(C'\fR instructions. Early versions of the \s-1SPARCLET\s0 processor do | |
4147 | not correctly handle \f(CW\*(C`save\*(C'\fR and \f(CW\*(C`restore\*(C'\fR instructions used with | |
4148 | arguments. They correctly handle them used without arguments. A \f(CW\*(C`save\*(C'\fR | |
4149 | instruction used without arguments increments the current window pointer | |
4150 | but does not allocate a new stack frame. It is assumed that the window | |
4151 | overflow trap handler will properly handle this case as will interrupt | |
4152 | handlers. | |
861bb6c1 | 4153 | .PP |
4bc1997b JM |
4154 | These \fB\-m\fR switches are supported in addition to the above |
4155 | on \s-1SPARC\s0 V9 processors in 64 bit environments. | |
4156 | .Ip "\fB\-mlittle-endian\fR" 4 | |
4157 | .IX Item "-mlittle-endian" | |
4158 | Generate code for a processor running in little-endian mode. | |
4159 | .Ip "\fB\-m32\fR" 4 | |
4160 | .IX Item "-m32" | |
4161 | .PD 0 | |
4162 | .Ip "\fB\-m64\fR" 4 | |
4163 | .IX Item "-m64" | |
4164 | .PD | |
4165 | Generate code for a 32 bit or 64 bit environment. | |
4166 | The 32 bit environment sets int, long and pointer to 32 bits. | |
4167 | The 64 bit environment sets int to 32 bits and long and pointer | |
4168 | to 64 bits. | |
4169 | .Ip "\fB\-mcmodel=medlow\fR" 4 | |
4170 | .IX Item "-mcmodel=medlow" | |
4171 | Generate code for the Medium/Low code model: the program must be linked | |
4172 | in the low 32 bits of the address space. Pointers are 64 bits. | |
4173 | Programs can be statically or dynamically linked. | |
4174 | .Ip "\fB\-mcmodel=medmid\fR" 4 | |
4175 | .IX Item "-mcmodel=medmid" | |
4176 | Generate code for the Medium/Middle code model: the program must be linked | |
4177 | in the low 44 bits of the address space, the text segment must be less than | |
4178 | 2G bytes, and data segment must be within 2G of the text segment. | |
4179 | Pointers are 64 bits. | |
4180 | .Ip "\fB\-mcmodel=medany\fR" 4 | |
4181 | .IX Item "-mcmodel=medany" | |
4182 | Generate code for the Medium/Anywhere code model: the program may be linked | |
4183 | anywhere in the address space, the text segment must be less than | |
4184 | 2G bytes, and data segment must be within 2G of the text segment. | |
4185 | Pointers are 64 bits. | |
4186 | .Ip "\fB\-mcmodel=embmedany\fR" 4 | |
4187 | .IX Item "-mcmodel=embmedany" | |
4188 | Generate code for the Medium/Anywhere code model for embedded systems: | |
4189 | assume a 32 bit text and a 32 bit data segment, both starting anywhere | |
4190 | (determined at link time). Register \f(CW%g4\fR points to the base of the | |
4191 | data segment. Pointers still 64 bits. | |
4192 | Programs are statically linked, \s-1PIC\s0 is not supported. | |
4193 | .Ip "\fB\-mstack-bias\fR" 4 | |
4194 | .IX Item "-mstack-bias" | |
4195 | .PD 0 | |
4196 | .Ip "\fB\-mno-stack-bias\fR" 4 | |
4197 | .IX Item "-mno-stack-bias" | |
4198 | .PD | |
4199 | With \fB\-mstack-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and | |
4200 | frame pointer if present, are offset by \-2047 which must be added back | |
4201 | when making stack frame references. | |
4202 | Otherwise, assume no such offset is present. | |
4203 | .PP | |
4204 | .I "Convex Options" | |
4205 | .IX Subsection "Convex Options" | |
4206 | .PP | |
4207 | These \fB\-m\fR options are defined for Convex: | |
4208 | .Ip "\fB\-mc1\fR" 4 | |
4209 | .IX Item "-mc1" | |
4210 | Generate output for C1. The code will run on any Convex machine. | |
4211 | The preprocessor symbol \f(CW\*(C`_\|_convex_\|_c1_\|_\*(C'\fR is defined. | |
4212 | .Ip "\fB\-mc2\fR" 4 | |
4213 | .IX Item "-mc2" | |
4214 | Generate output for C2. Uses instructions not available on C1. | |
4215 | Scheduling and other optimizations are chosen for max performance on C2. | |
4216 | The preprocessor symbol \f(CW\*(C`_\|_convex_c2_\|_\*(C'\fR is defined. | |
4217 | .Ip "\fB\-mc32\fR" 4 | |
4218 | .IX Item "-mc32" | |
4219 | Generate output for C32xx. Uses instructions not available on C1. | |
4220 | Scheduling and other optimizations are chosen for max performance on C32. | |
4221 | The preprocessor symbol \f(CW\*(C`_\|_convex_c32_\|_\*(C'\fR is defined. | |
4222 | .Ip "\fB\-mc34\fR" 4 | |
4223 | .IX Item "-mc34" | |
4224 | Generate output for C34xx. Uses instructions not available on C1. | |
4225 | Scheduling and other optimizations are chosen for max performance on C34. | |
4226 | The preprocessor symbol \f(CW\*(C`_\|_convex_c34_\|_\*(C'\fR is defined. | |
4227 | .Ip "\fB\-mc38\fR" 4 | |
4228 | .IX Item "-mc38" | |
4229 | Generate output for C38xx. Uses instructions not available on C1. | |
4230 | Scheduling and other optimizations are chosen for max performance on C38. | |
4231 | The preprocessor symbol \f(CW\*(C`_\|_convex_c38_\|_\*(C'\fR is defined. | |
4232 | .Ip "\fB\-margcount\fR" 4 | |
4233 | .IX Item "-margcount" | |
861bb6c1 | 4234 | Generate code which puts an argument count in the word preceding each |
4bc1997b JM |
4235 | argument list. This is compatible with regular \s-1CC\s0, and a few programs |
4236 | may need the argument count word. \s-1GDB\s0 and other source-level debuggers | |
4237 | do not need it; this info is in the symbol table. | |
4238 | .Ip "\fB\-mnoargcount\fR" 4 | |
4239 | .IX Item "-mnoargcount" | |
4240 | Omit the argument count word. This is the default. | |
4241 | .Ip "\fB\-mvolatile-cache\fR" 4 | |
4242 | .IX Item "-mvolatile-cache" | |
4243 | Allow volatile references to be cached. This is the default. | |
4244 | .Ip "\fB\-mvolatile-nocache\fR" 4 | |
4245 | .IX Item "-mvolatile-nocache" | |
4246 | Volatile references bypass the data cache, going all the way to memory. | |
4247 | This is only needed for multi-processor code that does not use standard | |
4248 | synchronization instructions. Making non-volatile references to volatile | |
4249 | locations will not necessarily work. | |
4250 | .Ip "\fB\-mlong32\fR" 4 | |
4251 | .IX Item "-mlong32" | |
4252 | Type long is 32 bits, the same as type int. This is the default. | |
4253 | .Ip "\fB\-mlong64\fR" 4 | |
4254 | .IX Item "-mlong64" | |
4255 | Type long is 64 bits, the same as type long long. This option is useless, | |
4256 | because no library support exists for it. | |
4257 | .PP | |
4258 | .I "\s-1AMD29K\s0 Options" | |
4259 | .IX Subsection "AMD29K Options" | |
861bb6c1 | 4260 | .PP |
4bc1997b JM |
4261 | These \fB\-m\fR options are defined for the \s-1AMD\s0 Am29000: |
4262 | .Ip "\fB\-mdw\fR" 4 | |
4263 | .IX Item "-mdw" | |
4264 | Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is set, i.e., that byte and | |
861bb6c1 JL |
4265 | halfword operations are directly supported by the hardware. This is the |
4266 | default. | |
4bc1997b JM |
4267 | .Ip "\fB\-mndw\fR" 4 |
4268 | .IX Item "-mndw" | |
4269 | Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is not set. | |
4270 | .Ip "\fB\-mbw\fR" 4 | |
4271 | .IX Item "-mbw" | |
861bb6c1 JL |
4272 | Generate code that assumes the system supports byte and halfword write |
4273 | operations. This is the default. | |
4bc1997b JM |
4274 | .Ip "\fB\-mnbw\fR" 4 |
4275 | .IX Item "-mnbw" | |
861bb6c1 | 4276 | Generate code that assumes the systems does not support byte and |
4bc1997b JM |
4277 | halfword write operations. \fB\-mnbw\fR implies \fB\-mndw\fR. |
4278 | .Ip "\fB\-msmall\fR" 4 | |
4279 | .IX Item "-msmall" | |
861bb6c1 | 4280 | Use a small memory model that assumes that all function addresses are |
4bc1997b JM |
4281 | either within a single 256 \s-1KB\s0 segment or at an absolute address of less |
4282 | than 256k. This allows the \f(CW\*(C`call\*(C'\fR instruction to be used instead | |
4283 | of a \f(CW\*(C`const\*(C'\fR, \f(CW\*(C`consth\*(C'\fR, \f(CW\*(C`calli\*(C'\fR sequence. | |
4284 | .Ip "\fB\-mnormal\fR" 4 | |
4285 | .IX Item "-mnormal" | |
4286 | Use the normal memory model: Generate \f(CW\*(C`call\*(C'\fR instructions only when | |
4287 | calling functions in the same file and \f(CW\*(C`calli\*(C'\fR instructions | |
4288 | otherwise. This works if each file occupies less than 256 \s-1KB\s0 but allows | |
4289 | the entire executable to be larger than 256 \s-1KB\s0. This is the default. | |
4290 | .Ip "\fB\-mlarge\fR" 4 | |
4291 | .IX Item "-mlarge" | |
4292 | Always use \f(CW\*(C`calli\*(C'\fR instructions. Specify this option if you expect | |
4293 | a single file to compile into more than 256 \s-1KB\s0 of code. | |
4294 | .Ip "\fB\-m29050\fR" 4 | |
4295 | .IX Item "-m29050" | |
861bb6c1 | 4296 | Generate code for the Am29050. |
4bc1997b JM |
4297 | .Ip "\fB\-m29000\fR" 4 |
4298 | .IX Item "-m29000" | |
861bb6c1 | 4299 | Generate code for the Am29000. This is the default. |
4bc1997b JM |
4300 | .Ip "\fB\-mkernel-registers\fR" 4 |
4301 | .IX Item "-mkernel-registers" | |
4302 | Generate references to registers \f(CW\*(C`gr64\-gr95\*(C'\fR instead of to | |
4303 | registers \f(CW\*(C`gr96\-gr127\*(C'\fR. This option can be used when compiling | |
4304 | kernel code that wants a set of global registers disjoint from that used | |
4305 | by user-mode code. | |
4306 | .Sp | |
4307 | Note that when this option is used, register names in \fB\-f\fR flags | |
861bb6c1 | 4308 | must use the normal, user-mode, names. |
4bc1997b JM |
4309 | .Ip "\fB\-muser-registers\fR" 4 |
4310 | .IX Item "-muser-registers" | |
4311 | Use the normal set of global registers, \f(CW\*(C`gr96\-gr127\*(C'\fR. This is the | |
861bb6c1 | 4312 | default. |
4bc1997b JM |
4313 | .Ip "\fB\-mstack-check\fR" 4 |
4314 | .IX Item "-mstack-check" | |
4315 | .PD 0 | |
4316 | .Ip "\fB\-mno-stack-check\fR" 4 | |
4317 | .IX Item "-mno-stack-check" | |
4318 | .PD | |
4319 | Insert (or do not insert) a call to \f(CW\*(C`_\|_msp_check\*(C'\fR after each stack | |
4320 | adjustment. This is often used for kernel code. | |
4321 | .Ip "\fB\-mstorem-bug\fR" 4 | |
4322 | .IX Item "-mstorem-bug" | |
4323 | .PD 0 | |
4324 | .Ip "\fB\-mno-storem-bug\fR" 4 | |
4325 | .IX Item "-mno-storem-bug" | |
4326 | .PD | |
4327 | \&\fB\-mstorem-bug\fR handles 29k processors which cannot handle the | |
4328 | separation of a mtsrim insn and a storem instruction (most 29000 chips | |
4329 | to date, but not the 29050). | |
4330 | .Ip "\fB\-mno-reuse-arg-regs\fR" 4 | |
4331 | .IX Item "-mno-reuse-arg-regs" | |
4332 | .PD 0 | |
4333 | .Ip "\fB\-mreuse-arg-regs\fR" 4 | |
4334 | .IX Item "-mreuse-arg-regs" | |
4335 | .PD | |
4336 | \&\fB\-mno-reuse-arg-regs\fR tells the compiler to only use incoming argument | |
4337 | registers for copying out arguments. This helps detect calling a function | |
4338 | with fewer arguments than it was declared with. | |
4339 | .Ip "\fB\-mno-impure-text\fR" 4 | |
4340 | .IX Item "-mno-impure-text" | |
4341 | .PD 0 | |
4342 | .Ip "\fB\-mimpure-text\fR" 4 | |
4343 | .IX Item "-mimpure-text" | |
4344 | .PD | |
4345 | \&\fB\-mimpure-text\fR, used in addition to \fB\-shared\fR, tells the compiler to | |
4346 | not pass \fB\-assert pure-text\fR to the linker when linking a shared object. | |
4347 | .Ip "\fB\-msoft-float\fR" 4 | |
4348 | .IX Item "-msoft-float" | |
4349 | Generate output containing library calls for floating point. | |
4350 | \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. | |
4351 | Normally the facilities of the machine's usual C compiler are used, but | |
4352 | this can't be done directly in cross-compilation. You must make your | |
4353 | own arrangements to provide suitable library functions for | |
4354 | cross-compilation. | |
4355 | .Ip "\fB\-mno-multm\fR" 4 | |
4356 | .IX Item "-mno-multm" | |
4357 | Do not generate multm or multmu instructions. This is useful for some embedded | |
4358 | systems which do not have trap handlers for these instructions. | |
4359 | .PP | |
4360 | .I "\s-1ARM\s0 Options" | |
4361 | .IX Subsection "ARM Options" | |
4362 | .PP | |
4363 | These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0) | |
4364 | architectures: | |
4365 | .Ip "\fB\-mapcs-frame\fR" 4 | |
4366 | .IX Item "-mapcs-frame" | |
4367 | Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call | |
4368 | Standard for all functions, even if this is not strictly necessary for | |
4369 | correct execution of the code. Specifying \fB\-fomit-frame-pointer\fR | |
4370 | with this option will cause the stack frames not to be generated for | |
4371 | leaf functions. The default is \fB\-mno-apcs-frame\fR. | |
4372 | .Ip "\fB\-mapcs\fR" 4 | |
4373 | .IX Item "-mapcs" | |
4374 | This is a synonym for \fB\-mapcs-frame\fR. | |
4375 | .Ip "\fB\-mapcs-26\fR" 4 | |
4376 | .IX Item "-mapcs-26" | |
4377 | Generate code for a processor running with a 26\-bit program counter, | |
4378 | and conforming to the function calling standards for the \s-1APCS\s0 26\-bit | |
4379 | option. This option replaces the \fB\-m2\fR and \fB\-m3\fR options | |
4380 | of previous releases of the compiler. | |
4381 | .Ip "\fB\-mapcs-32\fR" 4 | |
4382 | .IX Item "-mapcs-32" | |
4383 | Generate code for a processor running with a 32\-bit program counter, | |
4384 | and conforming to the function calling standards for the \s-1APCS\s0 32\-bit | |
4385 | option. This option replaces the \fB\-m6\fR option of previous releases | |
4386 | of the compiler. | |
4387 | .Ip "\fB\-mapcs-stack-check\fR" 4 | |
4388 | .IX Item "-mapcs-stack-check" | |
4389 | Generate code to check the amount of stack space available upon entry to | |
4390 | every function (that actually uses some stack space). If there is | |
4391 | insufficient space available then either the function | |
4392 | \&\fB_\|_rt_stkovf_split_small\fR or \fB_\|_rt_stkovf_split_big\fR will be | |
4393 | called, depending upon the amount of stack space required. The run time | |
4394 | system is required to provide these functions. The default is | |
4395 | \&\fB\-mno-apcs-stack-check\fR, since this produces smaller code. | |
4396 | .Ip "\fB\-mapcs-float\fR" 4 | |
4397 | .IX Item "-mapcs-float" | |
4398 | Pass floating point arguments using the float point registers. This is | |
4399 | one of the variants of the \s-1APCS\s0. This option is recommended if the | |
4400 | target hardware has a floating point unit or if a lot of floating point | |
4401 | arithmetic is going to be performed by the code. The default is | |
4402 | \&\fB\-mno-apcs-float\fR, since integer only code is slightly increased in | |
4403 | size if \fB\-mapcs-float\fR is used. | |
4404 | .Ip "\fB\-mapcs-reentrant\fR" 4 | |
4405 | .IX Item "-mapcs-reentrant" | |
4406 | Generate reentrant, position independent code. This is the equivalent | |
4407 | to specifying the \fB\-fpic\fR option. The default is | |
4408 | \&\fB\-mno-apcs-reentrant\fR. | |
4409 | .Ip "\fB\-mthumb-interwork\fR" 4 | |
4410 | .IX Item "-mthumb-interwork" | |
4411 | Generate code which supports calling between the \s-1ARM\s0 and \s-1THUMB\s0 | |
4412 | instruction sets. Without this option the two instruction sets cannot | |
4413 | be reliably used inside one program. The default is | |
4414 | \&\fB\-mno-thumb-interwork\fR, since slightly larger code is generated | |
4415 | when \fB\-mthumb-interwork\fR is specified. | |
4416 | .Ip "\fB\-mno-sched-prolog\fR" 4 | |
4417 | .IX Item "-mno-sched-prolog" | |
4418 | Prevent the reordering of instructions in the function prolog, or the | |
4419 | merging of those instruction with the instructions in the function's | |
4420 | body. This means that all functions will start with a recognizable set | |
4421 | of instructions (or in fact one of a choice from a small set of | |
4422 | different function prologues), and this information can be used to | |
4423 | locate the start if functions inside an executable piece of code. The | |
4424 | default is \fB\-msched-prolog\fR. | |
4425 | .Ip "\fB\-mhard-float\fR" 4 | |
4426 | .IX Item "-mhard-float" | |
4427 | Generate output containing floating point instructions. This is the | |
4428 | default. | |
4429 | .Ip "\fB\-msoft-float\fR" 4 | |
4430 | .IX Item "-msoft-float" | |
4431 | Generate output containing library calls for floating point. | |
4432 | \&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0 | |
4433 | targets. Normally the facilities of the machine's usual C compiler are | |
4434 | used, but this cannot be done directly in cross-compilation. You must make | |
4435 | your own arrangements to provide suitable library functions for | |
4436 | cross-compilation. | |
4437 | .Sp | |
4438 | \&\fB\-msoft-float\fR changes the calling convention in the output file; | |
4439 | therefore, it is only useful if you compile \fIall\fR of a program with | |
4440 | this option. In particular, you need to compile \fIlibgcc.a\fR, the | |
4441 | library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for | |
4442 | this to work. | |
4443 | .Ip "\fB\-mlittle-endian\fR" 4 | |
4444 | .IX Item "-mlittle-endian" | |
4445 | Generate code for a processor running in little-endian mode. This is | |
4446 | the default for all standard configurations. | |
4447 | .Ip "\fB\-mbig-endian\fR" 4 | |
4448 | .IX Item "-mbig-endian" | |
4449 | Generate code for a processor running in big-endian mode; the default is | |
4450 | to compile code for a little-endian processor. | |
4451 | .Ip "\fB\-mwords-little-endian\fR" 4 | |
4452 | .IX Item "-mwords-little-endian" | |
4453 | This option only applies when generating code for big-endian processors. | |
4454 | Generate code for a little-endian word order but a big-endian byte | |
4455 | order. That is, a byte order of the form \fB32107654\fR. Note: this | |
4456 | option should only be used if you require compatibility with code for | |
4457 | big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to | |
4458 | 2.8. | |
4459 | .Ip "\fB\-malignment-traps\fR" 4 | |
4460 | .IX Item "-malignment-traps" | |
4461 | Generate code that will not trap if the \s-1MMU\s0 has alignment traps enabled. | |
4462 | On \s-1ARM\s0 architectures prior to ARMv4, there were no instructions to | |
4463 | access half-word objects stored in memory. However, when reading from | |
4464 | memory a feature of the \s-1ARM\s0 architecture allows a word load to be used, | |
4465 | even if the address is unaligned, and the processor core will rotate the | |
4466 | data as it is being loaded. This option tells the compiler that such | |
4467 | misaligned accesses will cause a \s-1MMU\s0 trap and that it should instead | |
4468 | synthesise the access as a series of byte accesses. The compiler can | |
4469 | still use word accesses to load half-word data if it knows that the | |
4470 | address is aligned to a word boundary. | |
4471 | .Sp | |
4472 | This option is ignored when compiling for \s-1ARM\s0 architecture 4 or later, | |
4473 | since these processors have instructions to directly access half-word | |
4474 | objects in memory. | |
4475 | .Ip "\fB\-mno-alignment-traps\fR" 4 | |
4476 | .IX Item "-mno-alignment-traps" | |
4477 | Generate code that assumes that the \s-1MMU\s0 will not trap unaligned | |
4478 | accesses. This produces better code when the target instruction set | |
4479 | does not have half-word memory operations (implementations prior to | |
4480 | ARMv4). | |
4481 | .Sp | |
4482 | Note that you cannot use this option to access unaligned word objects, | |
4483 | since the processor will only fetch one 32\-bit aligned object from | |
4484 | memory. | |
4485 | .Sp | |
4486 | The default setting for most targets is \-mno-alignment-traps, since | |
4487 | this produces better code when there are no half-word memory | |
4488 | instructions available. | |
4489 | .Ip "\fB\-mshort-load-bytes\fR" 4 | |
4490 | .IX Item "-mshort-load-bytes" | |
4491 | This is a deprecated alias for \fB\-malignment-traps\fR. | |
4492 | .Ip "\fB\-mno-short-load-bytes\fR" 4 | |
4493 | .IX Item "-mno-short-load-bytes" | |
4494 | This is a deprecated alias for \fB\-mno-alignment-traps\fR. | |
4495 | .Ip "\fB\-mshort-load-words\fR" 4 | |
4496 | .IX Item "-mshort-load-words" | |
4497 | This is a deprecated alias for \fB\-mno-alignment-traps\fR. | |
4498 | .Ip "\fB\-mno-short-load-words\fR" 4 | |
4499 | .IX Item "-mno-short-load-words" | |
4500 | This is a deprecated alias for \fB\-malignment-traps\fR. | |
4501 | .Ip "\fB\-mbsd\fR" 4 | |
4502 | .IX Item "-mbsd" | |
4503 | This option only applies to \s-1RISC\s0 iX. Emulate the native BSD-mode | |
4504 | compiler. This is the default if \fB\-ansi\fR is not specified. | |
4505 | .Ip "\fB\-mxopen\fR" 4 | |
4506 | .IX Item "-mxopen" | |
4507 | This option only applies to \s-1RISC\s0 iX. Emulate the native X/Open-mode | |
4508 | compiler. | |
4509 | .Ip "\fB\-mno-symrename\fR" 4 | |
4510 | .IX Item "-mno-symrename" | |
4511 | This option only applies to \s-1RISC\s0 iX. Do not run the assembler | |
4512 | post-processor, \fBsymrename\fR, after code has been assembled. | |
4513 | Normally it is necessary to modify some of the standard symbols in | |
4514 | preparation for linking with the \s-1RISC\s0 iX C library; this option | |
4515 | suppresses this pass. The post-processor is never run when the | |
4516 | compiler is built for cross-compilation. | |
4517 | .Ip "\fB\-mcpu=<name>\fR" 4 | |
4518 | .IX Item "-mcpu=<name>" | |
4519 | This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name | |
4520 | to determine what kind of instructions it can use when generating | |
4521 | assembly code. Permissible names are: arm2, arm250, arm3, arm6, arm60, | |
4522 | arm600, arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi, | |
4523 | arm70, arm700, arm700i, arm710, arm710c, arm7100, arm7500, arm7500fe, | |
4524 | arm7tdmi, arm8, strongarm, strongarm110, strongarm1100, arm8, arm810, | |
4525 | arm9, arm920, arm920t, arm9tdmi. | |
4526 | .Ip "\fB\-mtune=<name>\fR" 4 | |
4527 | .IX Item "-mtune=<name>" | |
4528 | This option is very similar to the \fB\-mcpu=\fR option, except that | |
4529 | instead of specifying the actual target processor type, and hence | |
4530 | restricting which instructions can be used, it specifies that \s-1GCC\s0 should | |
4531 | tune the performance of the code as if the target were of the type | |
4532 | specified in this option, but still choosing the instructions that it | |
4533 | will generate based on the cpu specified by a \fB\-mcpu=\fR option. | |
4534 | For some arm implementations better performance can be obtained by using | |
4535 | this option. | |
4536 | .Ip "\fB\-march=<name>\fR" 4 | |
4537 | .IX Item "-march=<name>" | |
4538 | This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this | |
4539 | name to determine what kind of instructions it can use when generating | |
4540 | assembly code. This option can be used in conjunction with or instead | |
4541 | of the \fB\-mcpu=\fR option. Permissible names are: armv2, armv2a, | |
4542 | armv3, armv3m, armv4, armv4t, armv5. | |
4543 | .Ip "\fB\-mfpe=<number>\fR" 4 | |
4544 | .IX Item "-mfpe=<number>" | |
4545 | .PD 0 | |
4546 | .Ip "\fB\-mfp=<number>\fR" 4 | |
4547 | .IX Item "-mfp=<number>" | |
4548 | .PD | |
4549 | This specifies the version of the floating point emulation available on | |
4550 | the target. Permissible values are 2 and 3. \fB\-mfp=\fR is a synonym | |
4551 | for \fB\-mfpe=\fR to support older versions of \s-1GCC\s0. | |
4552 | .Ip "\fB\-mstructure-size-boundary=<n>\fR" 4 | |
4553 | .IX Item "-mstructure-size-boundary=<n>" | |
4554 | The size of all structures and unions will be rounded up to a multiple | |
4555 | of the number of bits set by this option. Permissible values are 8 and | |
4556 | 32. The default value varies for different toolchains. For the \s-1COFF\s0 | |
4557 | targeted toolchain the default value is 8. Specifying the larger number | |
4558 | can produce faster, more efficient code, but can also increase the size | |
4559 | of the program. The two values are potentially incompatible. Code | |
4560 | compiled with one value cannot necessarily expect to work with code or | |
4561 | libraries compiled with the other value, if they exchange information | |
4562 | using structures or unions. Programmers are encouraged to use the 32 | |
4563 | value as future versions of the toolchain may default to this value. | |
4564 | .Ip "\fB\-mabort-on-noreturn\fR" 4 | |
4565 | .IX Item "-mabort-on-noreturn" | |
4566 | Generate a call to the function abort at the end of a noreturn function. | |
4567 | It will be executed if the function tries to return. | |
4568 | .Ip "\fB\-mlong-calls\fR" 4 | |
4569 | .IX Item "-mlong-calls" | |
4570 | .PD 0 | |
4571 | .Ip "\fB\-mno-long-calls\fR" 4 | |
4572 | .IX Item "-mno-long-calls" | |
4573 | .PD | |
4574 | Tells the compiler to perform function calls by first loading the | |
4575 | address of the function into a register and then performing a subroutine | |
4576 | call on this register. This switch is needed if the target function | |
4577 | will lie outside of the 64 megabyte addressing range of the offset based | |
4578 | version of subroutine call instruction. | |
4579 | .Sp | |
4580 | Even if this switch is enabled, not all function calls will be turned | |
4581 | into long calls. The heuristic is that static functions, functions | |
4582 | which have the \fBshort-call\fR attribute, functions that are inside | |
4583 | the scope of a \fB#pragma no_long_calls\fR directive and functions whose | |
4584 | definitions have already been compiled within the current compilation | |
4585 | unit, will not be turned into long calls. The exception to this rule is | |
4586 | that weak function definitions, functions with the \fBlong-call\fR | |
4587 | attribute or the \fBsection\fR attribute, and functions that are within | |
4588 | the scope of a \fB#pragma long_calls\fR directive, will always be | |
4589 | turned into long calls. | |
4590 | .Sp | |
4591 | This feature is not enabled by default. Specifying | |
4592 | \&\fB\*(--no-long-calls\fR will restore the default behaviour, as will | |
4593 | placing the function calls within the scope of a \fB#pragma | |
4594 | long_calls_off\fR directive. Note these switches have no effect on how | |
4595 | the compiler generates code to handle function calls via function | |
4596 | pointers. | |
4597 | .Ip "\fB\-mnop-fun-dllimport\fR" 4 | |
4598 | .IX Item "-mnop-fun-dllimport" | |
4599 | Disable the support for the \fIdllimport\fR attribute. | |
4600 | .Ip "\fB\-msingle-pic-base\fR" 4 | |
4601 | .IX Item "-msingle-pic-base" | |
4602 | Treat the register used for \s-1PIC\s0 addressing as read-only, rather than | |
4603 | loading it in the prologue for each function. The run-time system is | |
4604 | responsible for initialising this register with an appropriate value | |
4605 | before execution begins. | |
4606 | .Ip "\fB\-mpic-register=<reg>\fR" 4 | |
4607 | .IX Item "-mpic-register=<reg>" | |
4608 | Specify the register to be used for \s-1PIC\s0 addressing. The default is R10 | |
4609 | unless stack-checking is enabled, when R9 is used. | |
4610 | .PP | |
4611 | .I "Thumb Options" | |
4612 | .IX Subsection "Thumb Options" | |
4613 | .Ip "\fB\-mthumb-interwork\fR" 4 | |
4614 | .IX Item "-mthumb-interwork" | |
4615 | Generate code which supports calling between the \s-1THUMB\s0 and \s-1ARM\s0 | |
4616 | instruction sets. Without this option the two instruction sets cannot | |
4617 | be reliably used inside one program. The default is | |
4618 | \&\fB\-mno-thumb-interwork\fR, since slightly smaller code is generated | |
4619 | with this option. | |
4620 | .Ip "\fB\-mtpcs-frame\fR" 4 | |
4621 | .IX Item "-mtpcs-frame" | |
4622 | Generate a stack frame that is compliant with the Thumb Procedure Call | |
4623 | Standard for all non-leaf functions. (A leaf function is one that does | |
4624 | not call any other functions). The default is \fB\-mno-apcs-frame\fR. | |
4625 | .Ip "\fB\-mtpcs-leaf-frame\fR" 4 | |
4626 | .IX Item "-mtpcs-leaf-frame" | |
4627 | Generate a stack frame that is compliant with the Thumb Procedure Call | |
4628 | Standard for all leaf functions. (A leaf function is one that does | |
4629 | not call any other functions). The default is \fB\-mno-apcs-leaf-frame\fR. | |
4630 | .Ip "\fB\-mlittle-endian\fR" 4 | |
4631 | .IX Item "-mlittle-endian" | |
4632 | Generate code for a processor running in little-endian mode. This is | |
4633 | the default for all standard configurations. | |
4634 | .Ip "\fB\-mbig-endian\fR" 4 | |
4635 | .IX Item "-mbig-endian" | |
4636 | Generate code for a processor running in big-endian mode. | |
4637 | .Ip "\fB\-mstructure-size-boundary=<n>\fR" 4 | |
4638 | .IX Item "-mstructure-size-boundary=<n>" | |
4639 | The size of all structures and unions will be rounded up to a multiple | |
4640 | of the number of bits set by this option. Permissible values are 8 and | |
4641 | 32. The default value varies for different toolchains. For the \s-1COFF\s0 | |
4642 | targeted toolchain the default value is 8. Specifying the larger number | |
4643 | can produced faster, more efficient code, but can also increase the size | |
4644 | of the program. The two values are potentially incompatible. Code | |
4645 | compiled with one value cannot necessarily expect to work with code or | |
4646 | libraries compiled with the other value, if they exchange information | |
4647 | using structures or unions. Programmers are encouraged to use the 32 | |
4648 | value as future versions of the toolchain may default to this value. | |
4649 | .Ip "\fB\-mnop-fun-dllimport\fR" 4 | |
4650 | .IX Item "-mnop-fun-dllimport" | |
4651 | Disable the support for the \fIdllimport\fR attribute. | |
4652 | .Ip "\fB\-mcallee-super-interworking\fR" 4 | |
4653 | .IX Item "-mcallee-super-interworking" | |
4654 | Gives all externally visible functions in the file being compiled an \s-1ARM\s0 | |
4655 | instruction set header which switches to Thumb mode before executing the | |
4656 | rest of the function. This allows these functions to be called from | |
4657 | non-interworking code. | |
4658 | .Ip "\fB\-mcaller-super-interworking\fR" 4 | |
4659 | .IX Item "-mcaller-super-interworking" | |
4660 | Allows calls via function pointers (including virtual functions) to | |
4661 | execute correctly regardless of whether the target code has been | |
4662 | compiled for interworking or not. There is a small overhead in the cost | |
4663 | of executing a function pointer if this option is enabled. | |
4664 | .Ip "\fB\-msingle-pic-base\fR" 4 | |
4665 | .IX Item "-msingle-pic-base" | |
4666 | Treat the register used for \s-1PIC\s0 addressing as read-only, rather than | |
4667 | loading it in the prologue for each function. The run-time system is | |
4668 | responsible for initialising this register with an appropriate value | |
4669 | before execution begins. | |
4670 | .Ip "\fB\-mpic-register=<reg>\fR" 4 | |
4671 | .IX Item "-mpic-register=<reg>" | |
4672 | Specify the register to be used for \s-1PIC\s0 addressing. The default is R10. | |
4673 | .PP | |
4674 | .I "\s-1MN10200\s0 Options" | |
4675 | .IX Subsection "MN10200 Options" | |
4676 | .PP | |
4677 | These \fB\-m\fR options are defined for Matsushita \s-1MN10200\s0 architectures: | |
4678 | .Ip "\fB\-mrelax\fR" 4 | |
4679 | .IX Item "-mrelax" | |
4680 | Indicate to the linker that it should perform a relaxation optimization pass | |
4681 | to shorten branches, calls and absolute memory addresses. This option only | |
4682 | has an effect when used on the command line for the final link step. | |
4683 | .Sp | |
4684 | This option makes symbolic debugging impossible. | |
4685 | .PP | |
4686 | .I "\s-1MN10300\s0 Options" | |
4687 | .IX Subsection "MN10300 Options" | |
4688 | .PP | |
4689 | These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures: | |
4690 | .Ip "\fB\-mmult-bug\fR" 4 | |
4691 | .IX Item "-mmult-bug" | |
4692 | Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0 | |
4693 | processors. This is the default. | |
4694 | .Ip "\fB\-mno-mult-bug\fR" 4 | |
4695 | .IX Item "-mno-mult-bug" | |
4696 | Do not generate code to avoid bugs in the multiply instructions for the | |
4697 | \&\s-1MN10300\s0 processors. | |
4698 | .Ip "\fB\-mam33\fR" 4 | |
4699 | .IX Item "-mam33" | |
4700 | Generate code which uses features specific to the \s-1AM33\s0 processor. | |
4701 | .Ip "\fB\-mno-am33\fR" 4 | |
4702 | .IX Item "-mno-am33" | |
4703 | Do not generate code which uses features specific to the \s-1AM33\s0 processor. This | |
4704 | is the default. | |
4705 | .Ip "\fB\-mrelax\fR" 4 | |
4706 | .IX Item "-mrelax" | |
4707 | Indicate to the linker that it should perform a relaxation optimization pass | |
4708 | to shorten branches, calls and absolute memory addresses. This option only | |
4709 | has an effect when used on the command line for the final link step. | |
4710 | .Sp | |
4711 | This option makes symbolic debugging impossible. | |
4712 | .PP | |
4713 | .I "M32R/D Options" | |
4714 | .IX Subsection "M32R/D Options" | |
861bb6c1 | 4715 | .PP |
4bc1997b JM |
4716 | These \fB\-m\fR options are defined for Mitsubishi M32R/D architectures: |
4717 | .Ip "\fB\-mcode-model=small\fR" 4 | |
4718 | .IX Item "-mcode-model=small" | |
4719 | Assume all objects live in the lower 16MB of memory (so that their addresses | |
4720 | can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines | |
4721 | are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. | |
4722 | This is the default. | |
4723 | .Sp | |
4724 | The addressability of a particular object can be set with the | |
4725 | \&\f(CW\*(C`model\*(C'\fR attribute. | |
4726 | .Ip "\fB\-mcode-model=medium\fR" 4 | |
4727 | .IX Item "-mcode-model=medium" | |
4728 | Assume objects may be anywhere in the 32 bit address space (the compiler | |
4729 | will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and | |
4730 | assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. | |
4731 | .Ip "\fB\-mcode-model=large\fR" 4 | |
4732 | .IX Item "-mcode-model=large" | |
4733 | Assume objects may be anywhere in the 32 bit address space (the compiler | |
4734 | will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and | |
4735 | assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction | |
4736 | (the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR | |
4737 | instruction sequence). | |
4738 | .Ip "\fB\-msdata=none\fR" 4 | |
4739 | .IX Item "-msdata=none" | |
4740 | Disable use of the small data area. Variables will be put into | |
4741 | one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the | |
4742 | \&\f(CW\*(C`section\*(C'\fR attribute has been specified). | |
4743 | This is the default. | |
4744 | .Sp | |
4745 | The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR. | |
4746 | Objects may be explicitly put in the small data area with the | |
4747 | \&\f(CW\*(C`section\*(C'\fR attribute using one of these sections. | |
4748 | .Ip "\fB\-msdata=sdata\fR" 4 | |
4749 | .IX Item "-msdata=sdata" | |
4750 | Put small global and static data in the small data area, but do not | |
4751 | generate special code to reference them. | |
4752 | .Ip "\fB\-msdata=use\fR" 4 | |
4753 | .IX Item "-msdata=use" | |
4754 | Put small global and static data in the small data area, and generate | |
4755 | special instructions to reference them. | |
4756 | .Ip "\fB\-G\fR \fInum\fR" 4 | |
4757 | .IX Item "-G num" | |
4758 | Put global and static objects less than or equal to \fInum\fR bytes | |
4759 | into the small data or bss sections instead of the normal data or bss | |
4760 | sections. The default value of \fInum\fR is 8. | |
4761 | The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR | |
4762 | for this option to have any effect. | |
4763 | .Sp | |
4764 | All modules should be compiled with the same \fB\-G\fR \fInum\fR value. | |
4765 | Compiling with different values of \fInum\fR may or may not work; if it | |
4766 | doesn't the linker will give an error message \- incorrect code will not be | |
4767 | generated. | |
4768 | .PP | |
4769 | .I "M88K Options" | |
4770 | .IX Subsection "M88K Options" | |
4771 | .PP | |
4772 | These \fB\-m\fR options are defined for Motorola 88k architectures: | |
4773 | .Ip "\fB\-m88000\fR" 4 | |
4774 | .IX Item "-m88000" | |
861bb6c1 JL |
4775 | Generate code that works well on both the m88100 and the |
4776 | m88110. | |
4bc1997b JM |
4777 | .Ip "\fB\-m88100\fR" 4 |
4778 | .IX Item "-m88100" | |
861bb6c1 JL |
4779 | Generate code that works best for the m88100, but that also |
4780 | runs on the m88110. | |
4bc1997b JM |
4781 | .Ip "\fB\-m88110\fR" 4 |
4782 | .IX Item "-m88110" | |
861bb6c1 JL |
4783 | Generate code that works best for the m88110, and may not run |
4784 | on the m88100. | |
4bc1997b JM |
4785 | .Ip "\fB\-mbig-pic\fR" 4 |
4786 | .IX Item "-mbig-pic" | |
4787 | Obsolete option to be removed from the next revision. | |
4788 | Use \fB\-fPIC\fR. | |
4789 | .Ip "\fB\-midentify-revision\fR" 4 | |
4790 | .IX Item "-midentify-revision" | |
4791 | Include an \f(CW\*(C`ident\*(C'\fR directive in the assembler output recording the | |
861bb6c1 JL |
4792 | source file name, compiler name and version, timestamp, and compilation |
4793 | flags used. | |
4bc1997b JM |
4794 | .Ip "\fB\-mno-underscores\fR" 4 |
4795 | .IX Item "-mno-underscores" | |
861bb6c1 JL |
4796 | In assembler output, emit symbol names without adding an underscore |
4797 | character at the beginning of each name. The default is to use an | |
4798 | underscore as prefix on each name. | |
4bc1997b JM |
4799 | .Ip "\fB\-mocs-debug-info\fR" 4 |
4800 | .IX Item "-mocs-debug-info" | |
4801 | .PD 0 | |
4802 | .Ip "\fB\-mno-ocs-debug-info\fR" 4 | |
4803 | .IX Item "-mno-ocs-debug-info" | |
4804 | .PD | |
4805 | Include (or omit) additional debugging information (about registers used | |
4806 | in each stack frame) as specified in the 88open Object Compatibility | |
4807 | Standard, ``\s-1OCS\s0''. This extra information allows debugging of code that | |
4808 | has had the frame pointer eliminated. The default for \s-1DG/UX\s0, SVr4, and | |
4809 | Delta 88 SVr3.2 is to include this information; other 88k configurations | |
4810 | omit this information by default. | |
4811 | .Ip "\fB\-mocs-frame-position\fR" 4 | |
4812 | .IX Item "-mocs-frame-position" | |
4813 | When emitting \s-1COFF\s0 debugging information for automatic variables and | |
4814 | parameters stored on the stack, use the offset from the canonical frame | |
4815 | address, which is the stack pointer (register 31) on entry to the | |
4816 | function. The \s-1DG/UX\s0, SVr4, Delta88 SVr3.2, and \s-1BCS\s0 configurations use | |
4817 | \&\fB\-mocs-frame-position\fR; other 88k configurations have the default | |
4818 | \&\fB\-mno-ocs-frame-position\fR. | |
4819 | .Ip "\fB\-mno-ocs-frame-position\fR" 4 | |
4820 | .IX Item "-mno-ocs-frame-position" | |
4821 | When emitting \s-1COFF\s0 debugging information for automatic variables and | |
4822 | parameters stored on the stack, use the offset from the frame pointer | |
4823 | register (register 30). When this option is in effect, the frame | |
4824 | pointer is not eliminated when debugging information is selected by the | |
4825 | \&\-g switch. | |
4826 | .Ip "\fB\-moptimize-arg-area\fR" 4 | |
4827 | .IX Item "-moptimize-arg-area" | |
4828 | .PD 0 | |
4829 | .Ip "\fB\-mno-optimize-arg-area\fR" 4 | |
4830 | .IX Item "-mno-optimize-arg-area" | |
4831 | .PD | |
4832 | Control how function arguments are stored in stack frames. | |
4833 | \&\fB\-moptimize-arg-area\fR saves space by optimizing them, but this | |
4834 | conflicts with the 88open specifications. The opposite alternative, | |
4835 | \&\fB\-mno-optimize-arg-area\fR, agrees with 88open standards. By default | |
4836 | \&\s-1GCC\s0 does not optimize the argument area. | |
4837 | .Ip "\fB\-mshort-data-\fR\fInum\fR" 4 | |
4838 | .IX Item "-mshort-data-num" | |
4839 | Generate smaller data references by making them relative to \f(CW\*(C`r0\*(C'\fR, | |
861bb6c1 JL |
4840 | which allows loading a value using a single instruction (rather than the |
4841 | usual two). You control which data references are affected by | |
4bc1997b JM |
4842 | specifying \fInum\fR with this option. For example, if you specify |
4843 | \&\fB\-mshort-data-512\fR, then the data references affected are those | |
861bb6c1 | 4844 | involving displacements of less than 512 bytes. |
4bc1997b JM |
4845 | \&\fB\-mshort-data-\fR\fInum\fR is not effective for \fInum\fR greater |
4846 | than 64k. | |
4847 | .Ip "\fB\-mserialize-volatile\fR" 4 | |
4848 | .IX Item "-mserialize-volatile" | |
4849 | .PD 0 | |
4850 | .Ip "\fB\-mno-serialize-volatile\fR" 4 | |
4851 | .IX Item "-mno-serialize-volatile" | |
4852 | .PD | |
4853 | Do, or don't, generate code to guarantee sequential consistency | |
4854 | of volatile memory references. By default, consistency is | |
4855 | guaranteed. | |
4856 | .Sp | |
4857 | The order of memory references made by the \s-1MC88110\s0 processor does | |
4858 | not always match the order of the instructions requesting those | |
4859 | references. In particular, a load instruction may execute before | |
4860 | a preceding store instruction. Such reordering violates | |
4861 | sequential consistency of volatile memory references, when there | |
4862 | are multiple processors. When consistency must be guaranteed, | |
4863 | \&\s-1GNU\s0 C generates special instructions, as needed, to force | |
4864 | execution in the proper order. | |
4865 | .Sp | |
4866 | The \s-1MC88100\s0 processor does not reorder memory references and so | |
4867 | always provides sequential consistency. However, by default, \s-1GNU\s0 | |
4868 | C generates the special instructions to guarantee consistency | |
4869 | even when you use \fB\-m88100\fR, so that the code may be run on an | |
4870 | \&\s-1MC88110\s0 processor. If you intend to run your code only on the | |
4871 | \&\s-1MC88100\s0 processor, you may use \fB\-mno-serialize-volatile\fR. | |
861bb6c1 JL |
4872 | .Sp |
4873 | The extra code generated to guarantee consistency may affect the | |
4bc1997b JM |
4874 | performance of your application. If you know that you can safely |
4875 | forgo this guarantee, you may use \fB\-mno-serialize-volatile\fR. | |
4876 | .Ip "\fB\-msvr4\fR" 4 | |
4877 | .IX Item "-msvr4" | |
4878 | .PD 0 | |
4879 | .Ip "\fB\-msvr3\fR" 4 | |
4880 | .IX Item "-msvr3" | |
4881 | .PD | |
4882 | Turn on (\fB\-msvr4\fR) or off (\fB\-msvr3\fR) compiler extensions | |
861bb6c1 | 4883 | related to System V release 4 (SVr4). This controls the following: |
4bc1997b JM |
4884 | .RS 4 |
4885 | .Ip "1." 4 | |
4886 | Which variant of the assembler syntax to emit. | |
4887 | .Ip "2." 4 | |
4888 | \&\fB\-msvr4\fR makes the C preprocessor recognize \fB#pragma weak\fR | |
4889 | that is used on System V release 4. | |
4890 | .Ip "3." 4 | |
4891 | \&\fB\-msvr4\fR makes \s-1GCC\s0 issue additional declaration directives used in | |
861bb6c1 | 4892 | SVr4. |
4bc1997b JM |
4893 | .RE |
4894 | .RS 4 | |
4895 | .Sp | |
4896 | \&\fB\-msvr4\fR is the default for the m88k-motorola-sysv4 and | |
4897 | m88k-dg-dgux m88k configurations. \fB\-msvr3\fR is the default for all | |
4898 | other m88k configurations. | |
4899 | .RE | |
4900 | .Ip "\fB\-mversion-03.00\fR" 4 | |
4901 | .IX Item "-mversion-03.00" | |
4902 | This option is obsolete, and is ignored. | |
4903 | .Ip "\fB\-mno-check-zero-division\fR" 4 | |
4904 | .IX Item "-mno-check-zero-division" | |
4905 | .PD 0 | |
4906 | .Ip "\fB\-mcheck-zero-division\fR" 4 | |
4907 | .IX Item "-mcheck-zero-division" | |
4908 | .PD | |
4909 | Do, or don't, generate code to guarantee that integer division by | |
4910 | zero will be detected. By default, detection is guaranteed. | |
4911 | .Sp | |
4912 | Some models of the \s-1MC88100\s0 processor fail to trap upon integer | |
4913 | division by zero under certain conditions. By default, when | |
4914 | compiling code that might be run on such a processor, \s-1GNU\s0 C | |
4915 | generates code that explicitly checks for zero-valued divisors | |
4916 | and traps with exception number 503 when one is detected. Use of | |
4917 | mno-check-zero-division suppresses such checking for code | |
4918 | generated to run on an \s-1MC88100\s0 processor. | |
4919 | .Sp | |
4920 | \&\s-1GNU\s0 C assumes that the \s-1MC88110\s0 processor correctly detects all | |
4921 | instances of integer division by zero. When \fB\-m88110\fR is | |
4922 | specified, both \fB\-mcheck-zero-division\fR and | |
4923 | \&\fB\-mno-check-zero-division\fR are ignored, and no explicit checks for | |
4924 | zero-valued divisors are generated. | |
4925 | .Ip "\fB\-muse-div-instruction\fR" 4 | |
4926 | .IX Item "-muse-div-instruction" | |
4927 | Use the div instruction for signed integer division on the | |
4928 | \&\s-1MC88100\s0 processor. By default, the div instruction is not used. | |
4929 | .Sp | |
4930 | On the \s-1MC88100\s0 processor the signed integer division instruction | |
4931 | div) traps to the operating system on a negative operand. The | |
4932 | operating system transparently completes the operation, but at a | |
4933 | large cost in execution time. By default, when compiling code | |
4934 | that might be run on an \s-1MC88100\s0 processor, \s-1GNU\s0 C emulates signed | |
4935 | integer division using the unsigned integer division instruction | |
4936 | divu), thereby avoiding the large penalty of a trap to the | |
4937 | operating system. Such emulation has its own, smaller, execution | |
4938 | cost in both time and space. To the extent that your code's | |
4939 | important signed integer division operations are performed on two | |
4940 | nonnegative operands, it may be desirable to use the div | |
4941 | instruction directly. | |
4942 | .Sp | |
4943 | On the \s-1MC88110\s0 processor the div instruction (also known as the | |
4944 | divs instruction) processes negative operands without trapping to | |
4945 | the operating system. When \fB\-m88110\fR is specified, | |
4946 | \&\fB\-muse-div-instruction\fR is ignored, and the div instruction is used | |
4947 | for signed integer division. | |
4948 | .Sp | |
4949 | Note that the result of dividing \s-1INT_MIN\s0 by \-1 is undefined. In | |
4950 | particular, the behavior of such a division with and without | |
4951 | \&\fB\-muse-div-instruction\fR may differ. | |
4952 | .Ip "\fB\-mtrap-large-shift\fR" 4 | |
4953 | .IX Item "-mtrap-large-shift" | |
4954 | .PD 0 | |
4955 | .Ip "\fB\-mhandle-large-shift\fR" 4 | |
4956 | .IX Item "-mhandle-large-shift" | |
4957 | .PD | |
861bb6c1 | 4958 | Include code to detect bit-shifts of more than 31 bits; respectively, |
4bc1997b | 4959 | trap such shifts or emit code to handle them properly. By default \s-1GCC\s0 |
861bb6c1 | 4960 | makes no special provision for large bit shifts. |
4bc1997b JM |
4961 | .Ip "\fB\-mwarn-passed-structs\fR" 4 |
4962 | .IX Item "-mwarn-passed-structs" | |
861bb6c1 JL |
4963 | Warn when a function passes a struct as an argument or result. |
4964 | Structure-passing conventions have changed during the evolution of the C | |
4965 | language, and are often the source of portability problems. By default, | |
4bc1997b | 4966 | \&\s-1GCC\s0 issues no such warning. |
861bb6c1 | 4967 | .PP |
4bc1997b JM |
4968 | .I "\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options" |
4969 | .IX Subsection "IBM RS/6000 and PowerPC Options" | |
861bb6c1 | 4970 | .PP |
4bc1997b JM |
4971 | These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC: |
4972 | .Ip "\fB\-mpower\fR" 4 | |
4973 | .IX Item "-mpower" | |
4974 | .PD 0 | |
4975 | .Ip "\fB\-mno-power\fR" 4 | |
4976 | .IX Item "-mno-power" | |
4977 | .Ip "\fB\-mpower2\fR" 4 | |
4978 | .IX Item "-mpower2" | |
4979 | .Ip "\fB\-mno-power2\fR" 4 | |
4980 | .IX Item "-mno-power2" | |
4981 | .Ip "\fB\-mpowerpc\fR" 4 | |
4982 | .IX Item "-mpowerpc" | |
4983 | .Ip "\fB\-mno-powerpc\fR" 4 | |
4984 | .IX Item "-mno-powerpc" | |
4985 | .Ip "\fB\-mpowerpc-gpopt\fR" 4 | |
4986 | .IX Item "-mpowerpc-gpopt" | |
4987 | .Ip "\fB\-mno-powerpc-gpopt\fR" 4 | |
4988 | .IX Item "-mno-powerpc-gpopt" | |
4989 | .Ip "\fB\-mpowerpc-gfxopt\fR" 4 | |
4990 | .IX Item "-mpowerpc-gfxopt" | |
4991 | .Ip "\fB\-mno-powerpc-gfxopt\fR" 4 | |
4992 | .IX Item "-mno-powerpc-gfxopt" | |
4993 | .Ip "\fB\-mpowerpc64\fR" 4 | |
4994 | .IX Item "-mpowerpc64" | |
4995 | .Ip "\fB\-mno-powerpc64\fR" 4 | |
4996 | .IX Item "-mno-powerpc64" | |
4997 | .PD | |
4998 | \&\s-1GCC\s0 supports two related instruction set architectures for the | |
4999 | \&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those | |
5000 | instructions supported by the \fBrios\fR chip set used in the original | |
5001 | \&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the | |
5002 | architecture of the Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and | |
5003 | the \s-1IBM\s0 4xx microprocessors. | |
5004 | .Sp | |
5005 | Neither architecture is a subset of the other. However there is a | |
5006 | large common subset of instructions supported by both. An \s-1MQ\s0 | |
5007 | register is included in processors supporting the \s-1POWER\s0 architecture. | |
5008 | .Sp | |
5009 | You use these options to specify which instructions are available on the | |
5010 | processor you are using. The default value of these options is | |
5011 | determined when configuring \s-1GCC\s0. Specifying the | |
5012 | \&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these | |
5013 | options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option | |
5014 | rather than the options listed above. | |
5015 | .Sp | |
5016 | The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that | |
5017 | are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register. | |
5018 | Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0 | |
5019 | to generate instructions that are present in the \s-1POWER2\s0 architecture but | |
5020 | not the original \s-1POWER\s0 architecture. | |
5021 | .Sp | |
5022 | The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that | |
5023 | are found only in the 32\-bit subset of the PowerPC architecture. | |
5024 | Specifying \fB\-mpowerpc-gpopt\fR implies \fB\-mpowerpc\fR and also allows | |
5025 | \&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the | |
5026 | General Purpose group, including floating-point square root. Specifying | |
5027 | \&\fB\-mpowerpc-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to | |
5028 | use the optional PowerPC architecture instructions in the Graphics | |
5029 | group, including floating-point select. | |
5030 | .Sp | |
5031 | The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional | |
5032 | 64\-bit instructions that are found in the full PowerPC64 architecture | |
5033 | and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to | |
5034 | \&\fB\-mno-powerpc64\fR. | |
5035 | .Sp | |
5036 | If you specify both \fB\-mno-power\fR and \fB\-mno-powerpc\fR, \s-1GCC\s0 | |
5037 | will use only the instructions in the common subset of both | |
5038 | architectures plus some special \s-1AIX\s0 common-mode calls, and will not use | |
5039 | the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR | |
5040 | permits \s-1GCC\s0 to use any instruction from either architecture and to | |
5041 | allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0. | |
5042 | .Ip "\fB\-mnew-mnemonics\fR" 4 | |
5043 | .IX Item "-mnew-mnemonics" | |
5044 | .PD 0 | |
5045 | .Ip "\fB\-mold-mnemonics\fR" 4 | |
5046 | .IX Item "-mold-mnemonics" | |
5047 | .PD | |
5048 | Select which mnemonics to use in the generated assembler code. | |
5049 | \&\fB\-mnew-mnemonics\fR requests output that uses the assembler mnemonics | |
5050 | defined for the PowerPC architecture, while \fB\-mold-mnemonics\fR | |
5051 | requests the assembler mnemonics defined for the \s-1POWER\s0 architecture. | |
5052 | Instructions defined in only one architecture have only one mnemonic; | |
5053 | \&\s-1GCC\s0 uses that mnemonic irrespective of which of these options is | |
5054 | specified. | |
5055 | .Sp | |
5056 | \&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in | |
5057 | use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the | |
5058 | value of these option. Unless you are building a cross-compiler, you | |
5059 | should normally not specify either \fB\-mnew-mnemonics\fR or | |
5060 | \&\fB\-mold-mnemonics\fR, but should instead accept the default. | |
5061 | .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 | |
5062 | .IX Item "-mcpu=cpu_type" | |
5063 | Set architecture type, register usage, choice of mnemonics, and | |
5064 | instruction scheduling parameters for machine type \fIcpu_type\fR. | |
5065 | Supported values for \fIcpu_type\fR are \fBrios\fR, \fBrios1\fR, | |
5066 | \&\fBrsc\fR, \fBrios2\fR, \fBrs64a\fR, \fB601\fR, \fB602\fR, | |
5067 | \&\fB603\fR, \fB603e\fR, \fB604\fR, \fB604e\fR, \fB620\fR, | |
5068 | \&\fB630\fR, \fB740\fR, \fB750\fR, \fBpower\fR, \fBpower2\fR, | |
5069 | \&\fBpowerpc\fR, \fB403\fR, \fB505\fR, \fB801\fR, \fB821\fR, | |
5070 | \&\fB823\fR, and \fB860\fR and \fBcommon\fR. \fB\-mcpu=power\fR, | |
5071 | \&\fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and \fB\-mcpu=powerpc64\fR | |
5072 | specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit PowerPC (i.e., not \s-1MPC601\s0), | |
5073 | and 64\-bit PowerPC architecture machine types, with an appropriate, | |
5074 | generic processor model assumed for scheduling purposes. | |
5075 | .Sp | |
5076 | Specifying any of the following options: | |
5077 | \&\fB\-mcpu=rios1\fR, \fB\-mcpu=rios2\fR, \fB\-mcpu=rsc\fR, | |
5078 | \&\fB\-mcpu=power\fR, or \fB\-mcpu=power2\fR | |
5079 | enables the \fB\-mpower\fR option and disables the \fB\-mpowerpc\fR option; | |
5080 | \&\fB\-mcpu=601\fR enables both the \fB\-mpower\fR and \fB\-mpowerpc\fR options. | |
5081 | All of \fB\-mcpu=rs64a\fR, \fB\-mcpu=602\fR, \fB\-mcpu=603\fR, | |
5082 | \&\fB\-mcpu=603e\fR, \fB\-mcpu=604\fR, \fB\-mcpu=620\fR, \fB\-mcpu=630\fR, | |
5083 | \&\fB\-mcpu=740\fR, and \fB\-mcpu=750\fR | |
5084 | enable the \fB\-mpowerpc\fR option and disable the \fB\-mpower\fR option. | |
5085 | Exactly similarly, all of \fB\-mcpu=403\fR, | |
5086 | \&\fB\-mcpu=505\fR, \fB\-mcpu=821\fR, \fB\-mcpu=860\fR and \fB\-mcpu=powerpc\fR | |
5087 | enable the \fB\-mpowerpc\fR option and disable the \fB\-mpower\fR option. | |
5088 | \&\fB\-mcpu=common\fR disables both the | |
5089 | \&\fB\-mpower\fR and \fB\-mpowerpc\fR options. | |
5090 | .Sp | |
5091 | \&\s-1AIX\s0 versions 4 or greater selects \fB\-mcpu=common\fR by default, so | |
5092 | that code will operate on all members of the \s-1RS/6000\s0 \s-1POWER\s0 and PowerPC | |
5093 | families. In that case, \s-1GCC\s0 will use only the instructions in the | |
5094 | common subset of both architectures plus some special \s-1AIX\s0 common-mode | |
5095 | calls, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic | |
5096 | processor model for scheduling purposes. | |
5097 | .Sp | |
5098 | Specifying any of the options \fB\-mcpu=rios1\fR, \fB\-mcpu=rios2\fR, | |
5099 | \&\fB\-mcpu=rsc\fR, \fB\-mcpu=power\fR, or \fB\-mcpu=power2\fR also | |
5100 | disables the \fBnew-mnemonics\fR option. Specifying \fB\-mcpu=601\fR, | |
5101 | \&\fB\-mcpu=602\fR, \fB\-mcpu=603\fR, \fB\-mcpu=603e\fR, \fB\-mcpu=604\fR, | |
5102 | \&\fB\-mcpu=620\fR, \fB\-mcpu=630\fR, \fB\-mcpu=403\fR, \fB\-mcpu=505\fR, | |
5103 | \&\fB\-mcpu=821\fR, \fB\-mcpu=860\fR or \fB\-mcpu=powerpc\fR also enables | |
5104 | the \fBnew-mnemonics\fR option. | |
5105 | .Sp | |
5106 | Specifying \fB\-mcpu=403\fR, \fB\-mcpu=821\fR, or \fB\-mcpu=860\fR also | |
5107 | enables the \fB\-msoft-float\fR option. | |
5108 | .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 | |
5109 | .IX Item "-mtune=cpu_type" | |
5110 | Set the instruction scheduling parameters for machine type | |
5111 | \&\fIcpu_type\fR, but do not set the architecture type, register usage, | |
5112 | choice of mnemonics like \fB\-mcpu=\fR\fIcpu_type\fR would. The same | |
5113 | values for \fIcpu_type\fR are used for \fB\-mtune=\fR\fIcpu_type\fR as | |
5114 | for \fB\-mcpu=\fR\fIcpu_type\fR. The \fB\-mtune=\fR\fIcpu_type\fR | |
5115 | option overrides the \fB\-mcpu=\fR\fIcpu_type\fR option in terms of | |
5116 | instruction scheduling parameters. | |
5117 | .Ip "\fB\-mfull-toc\fR" 4 | |
5118 | .IX Item "-mfull-toc" | |
5119 | .PD 0 | |
5120 | .Ip "\fB\-mno-fp-in-toc\fR" 4 | |
5121 | .IX Item "-mno-fp-in-toc" | |
5122 | .Ip "\fB\-mno-sum-in-toc\fR" 4 | |
5123 | .IX Item "-mno-sum-in-toc" | |
5124 | .Ip "\fB\-mminimal-toc\fR" 4 | |
5125 | .IX Item "-mminimal-toc" | |
5126 | .PD | |
5127 | Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for | |
5128 | every executable file. The \fB\-mfull-toc\fR option is selected by | |
5129 | default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for | |
5130 | each unique non-automatic variable reference in your program. \s-1GCC\s0 | |
5131 | will also place floating-point constants in the \s-1TOC\s0. However, only | |
5132 | 16,384 entries are available in the \s-1TOC\s0. | |
5133 | .Sp | |
5134 | If you receive a linker error message that saying you have overflowed | |
5135 | the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used | |
5136 | with the \fB\-mno-fp-in-toc\fR and \fB\-mno-sum-in-toc\fR options. | |
5137 | \&\fB\-mno-fp-in-toc\fR prevents \s-1GCC\s0 from putting floating-point | |
5138 | constants in the \s-1TOC\s0 and \fB\-mno-sum-in-toc\fR forces \s-1GCC\s0 to | |
5139 | generate code to calculate the sum of an address and a constant at | |
5140 | run-time instead of putting that sum into the \s-1TOC\s0. You may specify one | |
5141 | or both of these options. Each causes \s-1GCC\s0 to produce very slightly | |
5142 | slower and larger code at the expense of conserving \s-1TOC\s0 space. | |
5143 | .Sp | |
5144 | If you still run out of space in the \s-1TOC\s0 even when you specify both of | |
5145 | these options, specify \fB\-mminimal-toc\fR instead. This option causes | |
5146 | \&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this | |
5147 | option, \s-1GCC\s0 will produce code that is slower and larger but which | |
5148 | uses extremely little \s-1TOC\s0 space. You may wish to use this option | |
5149 | only on files that contain less frequently executed code. | |
5150 | .Ip "\fB\-maix64\fR" 4 | |
5151 | .IX Item "-maix64" | |
5152 | .PD 0 | |
5153 | .Ip "\fB\-maix32\fR" 4 | |
5154 | .IX Item "-maix32" | |
5155 | .PD | |
5156 | Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit | |
5157 | \&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them. | |
5158 | Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and | |
5159 | \&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and | |
5160 | implies \fB\-mno-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR. | |
5161 | .Ip "\fB\-mxl-call\fR" 4 | |
5162 | .IX Item "-mxl-call" | |
5163 | .PD 0 | |
5164 | .Ip "\fB\-mno-xl-call\fR" 4 | |
5165 | .IX Item "-mno-xl-call" | |
5166 | .PD | |
5167 | On \s-1AIX\s0, pass floating-point arguments to prototyped functions beyond the | |
5168 | register save area (\s-1RSA\s0) on the stack in addition to argument FPRs. The | |
5169 | \&\s-1AIX\s0 calling convention was extended but not initially documented to | |
5170 | handle an obscure K&R C case of calling a function that takes the | |
5171 | address of its arguments with fewer arguments than declared. \s-1AIX\s0 \s-1XL\s0 | |
5172 | compilers access floating point arguments which do not fit in the | |
5173 | \&\s-1RSA\s0 from the stack when a subroutine is compiled without | |
5174 | optimization. Because always storing floating-point arguments on the | |
5175 | stack is inefficient and rarely needed, this option is not enabled by | |
5176 | default and only is necessary when calling subroutines compiled by \s-1AIX\s0 | |
5177 | \&\s-1XL\s0 compilers without optimization. | |
5178 | .Ip "\fB\-mthreads\fR" 4 | |
5179 | .IX Item "-mthreads" | |
5180 | Support \fI\s-1AIX\s0 Threads\fR. Link an application written to use | |
5181 | \&\fIpthreads\fR with special libraries and startup code to enable the | |
5182 | application to run. | |
5183 | .Ip "\fB\-mpe\fR" 4 | |
5184 | .IX Item "-mpe" | |
5185 | Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an | |
5186 | application written to use message passing with special startup code to | |
5187 | enable the application to run. The system must have \s-1PE\s0 installed in the | |
5188 | standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file | |
5189 | must be overridden with the \fB\-specs=\fR option to specify the | |
5190 | appropriate directory location. The Parallel Environment does not | |
5191 | support threads, so the \fB\-mpe\fR option and the \fB\-mthreads\fR | |
5192 | option are incompatible. | |
5193 | .Ip "\fB\-msoft-float\fR" 4 | |
5194 | .IX Item "-msoft-float" | |
5195 | .PD 0 | |
5196 | .Ip "\fB\-mhard-float\fR" 4 | |
5197 | .IX Item "-mhard-float" | |
5198 | .PD | |
5199 | Generate code that does not use (uses) the floating-point register set. | |
5200 | Software floating point emulation is provided if you use the | |
5201 | \&\fB\-msoft-float\fR option, and pass the option to \s-1GCC\s0 when linking. | |
5202 | .Ip "\fB\-mmultiple\fR" 4 | |
5203 | .IX Item "-mmultiple" | |
5204 | .PD 0 | |
5205 | .Ip "\fB\-mno-multiple\fR" 4 | |
5206 | .IX Item "-mno-multiple" | |
5207 | .PD | |
5208 | Generate code that uses (does not use) the load multiple word | |
5209 | instructions and the store multiple word instructions. These | |
5210 | instructions are generated by default on \s-1POWER\s0 systems, and not | |
5211 | generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little | |
5212 | endian PowerPC systems, since those instructions do not work when the | |
5213 | processor is in little endian mode. The exceptions are \s-1PPC740\s0 and | |
5214 | \&\s-1PPC750\s0 which permit the instructions usage in little endian mode. | |
5215 | .Ip "\fB\-mstring\fR" 4 | |
5216 | .IX Item "-mstring" | |
5217 | .PD 0 | |
5218 | .Ip "\fB\-mno-string\fR" 4 | |
5219 | .IX Item "-mno-string" | |
5220 | .PD | |
5221 | Generate code that uses (does not use) the load string instructions | |
5222 | and the store string word instructions to save multiple registers and | |
5223 | do small block moves. These instructions are generated by default on | |
5224 | \&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use | |
5225 | \&\fB\-mstring\fR on little endian PowerPC systems, since those | |
5226 | instructions do not work when the processor is in little endian mode. | |
5227 | The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions | |
5228 | usage in little endian mode. | |
5229 | .Ip "\fB\-mupdate\fR" 4 | |
5230 | .IX Item "-mupdate" | |
5231 | .PD 0 | |
5232 | .Ip "\fB\-mno-update\fR" 4 | |
5233 | .IX Item "-mno-update" | |
5234 | .PD | |
5235 | Generate code that uses (does not use) the load or store instructions | |
5236 | that update the base register to the address of the calculated memory | |
5237 | location. These instructions are generated by default. If you use | |
5238 | \&\fB\-mno-update\fR, there is a small window between the time that the | |
5239 | stack pointer is updated and the address of the previous frame is | |
5240 | stored, which means code that walks the stack frame across interrupts or | |
5241 | signals may get corrupted data. | |
5242 | .Ip "\fB\-mfused-madd\fR" 4 | |
5243 | .IX Item "-mfused-madd" | |
5244 | .PD 0 | |
5245 | .Ip "\fB\-mno-fused-madd\fR" 4 | |
5246 | .IX Item "-mno-fused-madd" | |
5247 | .PD | |
5248 | Generate code that uses (does not use) the floating point multiply and | |
5249 | accumulate instructions. These instructions are generated by default if | |
5250 | hardware floating is used. | |
5251 | .Ip "\fB\-mno-bit-align\fR" 4 | |
5252 | .IX Item "-mno-bit-align" | |
5253 | .PD 0 | |
5254 | .Ip "\fB\-mbit-align\fR" 4 | |
5255 | .IX Item "-mbit-align" | |
5256 | .PD | |
5257 | On System V.4 and embedded PowerPC systems do not (do) force structures | |
5258 | and unions that contain bit fields to be aligned to the base type of the | |
5259 | bit field. | |
5260 | .Sp | |
5261 | For example, by default a structure containing nothing but 8 | |
5262 | \&\f(CW\*(C`unsigned\*(C'\fR bitfields of length 1 would be aligned to a 4 byte | |
5263 | boundary and have a size of 4 bytes. By using \fB\-mno-bit-align\fR, | |
5264 | the structure would be aligned to a 1 byte boundary and be one byte in | |
5265 | size. | |
5266 | .Ip "\fB\-mno-strict-align\fR" 4 | |
5267 | .IX Item "-mno-strict-align" | |
5268 | .PD 0 | |
5269 | .Ip "\fB\-mstrict-align\fR" 4 | |
5270 | .IX Item "-mstrict-align" | |
5271 | .PD | |
5272 | On System V.4 and embedded PowerPC systems do not (do) assume that | |
5273 | unaligned memory references will be handled by the system. | |
5274 | .Ip "\fB\-mrelocatable\fR" 4 | |
5275 | .IX Item "-mrelocatable" | |
5276 | .PD 0 | |
5277 | .Ip "\fB\-mno-relocatable\fR" 4 | |
5278 | .IX Item "-mno-relocatable" | |
5279 | .PD | |
5280 | On embedded PowerPC systems generate code that allows (does not allow) | |
5281 | the program to be relocated to a different address at runtime. If you | |
5282 | use \fB\-mrelocatable\fR on any module, all objects linked together must | |
5283 | be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable-lib\fR. | |
5284 | .Ip "\fB\-mrelocatable-lib\fR" 4 | |
5285 | .IX Item "-mrelocatable-lib" | |
5286 | .PD 0 | |
5287 | .Ip "\fB\-mno-relocatable-lib\fR" 4 | |
5288 | .IX Item "-mno-relocatable-lib" | |
5289 | .PD | |
5290 | On embedded PowerPC systems generate code that allows (does not allow) | |
5291 | the program to be relocated to a different address at runtime. Modules | |
5292 | compiled with \fB\-mrelocatable-lib\fR can be linked with either modules | |
5293 | compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable-lib\fR or | |
5294 | with modules compiled with the \fB\-mrelocatable\fR options. | |
5295 | .Ip "\fB\-mno-toc\fR" 4 | |
5296 | .IX Item "-mno-toc" | |
5297 | .PD 0 | |
5298 | .Ip "\fB\-mtoc\fR" 4 | |
5299 | .IX Item "-mtoc" | |
5300 | .PD | |
5301 | On System V.4 and embedded PowerPC systems do not (do) assume that | |
5302 | register 2 contains a pointer to a global area pointing to the addresses | |
5303 | used in the program. | |
5304 | .Ip "\fB\-mlittle\fR" 4 | |
5305 | .IX Item "-mlittle" | |
5306 | .PD 0 | |
5307 | .Ip "\fB\-mlittle-endian\fR" 4 | |
5308 | .IX Item "-mlittle-endian" | |
5309 | .PD | |
5310 | On System V.4 and embedded PowerPC systems compile code for the | |
5311 | processor in little endian mode. The \fB\-mlittle-endian\fR option is | |
5312 | the same as \fB\-mlittle\fR. | |
5313 | .Ip "\fB\-mbig\fR" 4 | |
5314 | .IX Item "-mbig" | |
5315 | .PD 0 | |
5316 | .Ip "\fB\-mbig-endian\fR" 4 | |
5317 | .IX Item "-mbig-endian" | |
5318 | .PD | |
5319 | On System V.4 and embedded PowerPC systems compile code for the | |
5320 | processor in big endian mode. The \fB\-mbig-endian\fR option is | |
5321 | the same as \fB\-mbig\fR. | |
5322 | .Ip "\fB\-mcall-sysv\fR" 4 | |
5323 | .IX Item "-mcall-sysv" | |
5324 | On System V.4 and embedded PowerPC systems compile code using calling | |
5325 | conventions that adheres to the March 1995 draft of the System V | |
5326 | Application Binary Interface, PowerPC processor supplement. This is the | |
5327 | default unless you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. | |
5328 | .Ip "\fB\-mcall-sysv-eabi\fR" 4 | |
5329 | .IX Item "-mcall-sysv-eabi" | |
5330 | Specify both \fB\-mcall-sysv\fR and \fB\-meabi\fR options. | |
5331 | .Ip "\fB\-mcall-sysv-noeabi\fR" 4 | |
5332 | .IX Item "-mcall-sysv-noeabi" | |
5333 | Specify both \fB\-mcall-sysv\fR and \fB\-mno-eabi\fR options. | |
5334 | .Ip "\fB\-mcall-aix\fR" 4 | |
5335 | .IX Item "-mcall-aix" | |
5336 | On System V.4 and embedded PowerPC systems compile code using calling | |
5337 | conventions that are similar to those used on \s-1AIX\s0. This is the | |
5338 | default if you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. | |
5339 | .Ip "\fB\-mcall-solaris\fR" 4 | |
5340 | .IX Item "-mcall-solaris" | |
5341 | On System V.4 and embedded PowerPC systems compile code for the Solaris | |
5342 | operating system. | |
5343 | .Ip "\fB\-mcall-linux\fR" 4 | |
5344 | .IX Item "-mcall-linux" | |
5345 | On System V.4 and embedded PowerPC systems compile code for the | |
5346 | Linux-based \s-1GNU\s0 system. | |
5347 | .Ip "\fB\-mprototype\fR" 4 | |
5348 | .IX Item "-mprototype" | |
5349 | .PD 0 | |
5350 | .Ip "\fB\-mno-prototype\fR" 4 | |
5351 | .IX Item "-mno-prototype" | |
5352 | .PD | |
5353 | On System V.4 and embedded PowerPC systems assume that all calls to | |
5354 | variable argument functions are properly prototyped. Otherwise, the | |
5355 | compiler must insert an instruction before every non prototyped call to | |
5356 | set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to | |
5357 | indicate whether floating point values were passed in the floating point | |
5358 | registers in case the function takes a variable arguments. With | |
5359 | \&\fB\-mprototype\fR, only calls to prototyped variable argument functions | |
5360 | will set or clear the bit. | |
5361 | .Ip "\fB\-msim\fR" 4 | |
5362 | .IX Item "-msim" | |
5363 | On embedded PowerPC systems, assume that the startup module is called | |
5364 | \&\fIsim-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and | |
5365 | \&\fIlibc.a\fR. This is the default for \fBpowerpc-*\-eabisim\fR. | |
5366 | configurations. | |
5367 | .Ip "\fB\-mmvme\fR" 4 | |
5368 | .IX Item "-mmvme" | |
5369 | On embedded PowerPC systems, assume that the startup module is called | |
5370 | \&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and | |
5371 | \&\fIlibc.a\fR. | |
5372 | .Ip "\fB\-mads\fR" 4 | |
5373 | .IX Item "-mads" | |
5374 | On embedded PowerPC systems, assume that the startup module is called | |
5375 | \&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and | |
5376 | \&\fIlibc.a\fR. | |
5377 | .Ip "\fB\-myellowknife\fR" 4 | |
5378 | .IX Item "-myellowknife" | |
5379 | On embedded PowerPC systems, assume that the startup module is called | |
5380 | \&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and | |
5381 | \&\fIlibc.a\fR. | |
5382 | .Ip "\fB\-mvxworks\fR" 4 | |
5383 | .IX Item "-mvxworks" | |
5384 | On System V.4 and embedded PowerPC systems, specify that you are | |
5385 | compiling for a VxWorks system. | |
5386 | .Ip "\fB\-memb\fR" 4 | |
5387 | .IX Item "-memb" | |
5388 | On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags | |
5389 | header to indicate that \fBeabi\fR extended relocations are used. | |
5390 | .Ip "\fB\-meabi\fR" 4 | |
5391 | .IX Item "-meabi" | |
5392 | .PD 0 | |
5393 | .Ip "\fB\-mno-eabi\fR" 4 | |
5394 | .IX Item "-mno-eabi" | |
5395 | .PD | |
5396 | On System V.4 and embedded PowerPC systems do (do not) adhere to the | |
5397 | Embedded Applications Binary Interface (eabi) which is a set of | |
5398 | modifications to the System V.4 specifications. Selecting \fB\-meabi\fR | |
5399 | means that the stack is aligned to an 8 byte boundary, a function | |
5400 | \&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi | |
5401 | environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and | |
5402 | \&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting | |
5403 | \&\fB\-mno-eabi\fR means that the stack is aligned to a 16 byte boundary, | |
5404 | do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the | |
5405 | \&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single | |
5406 | small data area. The \fB\-meabi\fR option is on by default if you | |
5407 | configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options. | |
5408 | .Ip "\fB\-msdata=eabi\fR" 4 | |
5409 | .IX Item "-msdata=eabi" | |
5410 | On System V.4 and embedded PowerPC systems, put small initialized | |
5411 | \&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which | |
5412 | is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized | |
5413 | non-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section, | |
5414 | which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized | |
5415 | global and static data in the \fB.sbss\fR section, which is adjacent to | |
5416 | the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is | |
5417 | incompatible with the \fB\-mrelocatable\fR option. The | |
5418 | \&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option. | |
5419 | .Ip "\fB\-msdata=sysv\fR" 4 | |
5420 | .IX Item "-msdata=sysv" | |
5421 | On System V.4 and embedded PowerPC systems, put small global and static | |
5422 | data in the \fB.sdata\fR section, which is pointed to by register | |
5423 | \&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the | |
5424 | \&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section. | |
5425 | The \fB\-msdata=sysv\fR option is incompatible with the | |
5426 | \&\fB\-mrelocatable\fR option. | |
5427 | .Ip "\fB\-msdata=default\fR" 4 | |
5428 | .IX Item "-msdata=default" | |
5429 | .PD 0 | |
5430 | .Ip "\fB\-msdata\fR" 4 | |
5431 | .IX Item "-msdata" | |
5432 | .PD | |
5433 | On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used, | |
5434 | compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the | |
5435 | same as \fB\-msdata=sysv\fR. | |
5436 | .Ip "\fB\-msdata-data\fR" 4 | |
5437 | .IX Item "-msdata-data" | |
5438 | On System V.4 and embedded PowerPC systems, put small global and static | |
5439 | data in the \fB.sdata\fR section. Put small uninitialized global and | |
5440 | static data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR | |
5441 | to address small data however. This is the default behavior unless | |
5442 | other \fB\-msdata\fR options are used. | |
5443 | .Ip "\fB\-msdata=none\fR" 4 | |
5444 | .IX Item "-msdata=none" | |
5445 | .PD 0 | |
5446 | .Ip "\fB\-mno-sdata\fR" 4 | |
5447 | .IX Item "-mno-sdata" | |
5448 | .PD | |
5449 | On embedded PowerPC systems, put all initialized global and static data | |
5450 | in the \fB.data\fR section, and all uninitialized data in the | |
5451 | \&\fB.bss\fR section. | |
5452 | .Ip "\fB\-G\fR \fInum\fR" 4 | |
5453 | .IX Item "-G num" | |
5454 | On embedded PowerPC systems, put global and static items less than or | |
5455 | equal to \fInum\fR bytes into the small data or bss sections instead of | |
5456 | the normal data or bss section. By default, \fInum\fR is 8. The | |
5457 | \&\fB\-G\fR \fInum\fR switch is also passed to the linker. | |
5458 | All modules should be compiled with the same \fB\-G\fR \fInum\fR value. | |
5459 | .Ip "\fB\-mregnames\fR" 4 | |
5460 | .IX Item "-mregnames" | |
5461 | .PD 0 | |
5462 | .Ip "\fB\-mno-regnames\fR" 4 | |
5463 | .IX Item "-mno-regnames" | |
5464 | .PD | |
5465 | On System V.4 and embedded PowerPC systems do (do not) emit register | |
5466 | names in the assembly language output using symbolic forms. | |
861bb6c1 | 5467 | .PP |
4bc1997b JM |
5468 | .I "\s-1IBM\s0 \s-1RT\s0 Options" |
5469 | .IX Subsection "IBM RT Options" | |
5470 | .PP | |
5471 | These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RT\s0 \s-1PC:\s0 | |
5472 | .Ip "\fB\-min-line-mul\fR" 4 | |
5473 | .IX Item "-min-line-mul" | |
861bb6c1 JL |
5474 | Use an in-line code sequence for integer multiplies. This is the |
5475 | default. | |
4bc1997b JM |
5476 | .Ip "\fB\-mcall-lib-mul\fR" 4 |
5477 | .IX Item "-mcall-lib-mul" | |
5478 | Call \f(CW\*(C`lmul$$\*(C'\fR for integer multiples. | |
5479 | .Ip "\fB\-mfull-fp-blocks\fR" 4 | |
5480 | .IX Item "-mfull-fp-blocks" | |
861bb6c1 | 5481 | Generate full-size floating point data blocks, including the minimum |
4bc1997b JM |
5482 | amount of scratch space recommended by \s-1IBM\s0. This is the default. |
5483 | .Ip "\fB\-mminimum-fp-blocks\fR" 4 | |
5484 | .IX Item "-mminimum-fp-blocks" | |
861bb6c1 JL |
5485 | Do not include extra scratch space in floating point data blocks. This |
5486 | results in smaller code, but slower execution, since scratch space must | |
5487 | be allocated dynamically. | |
4bc1997b JM |
5488 | .Ip "\fB\-mfp-arg-in-fpregs\fR" 4 |
5489 | .IX Item "-mfp-arg-in-fpregs" | |
5490 | Use a calling sequence incompatible with the \s-1IBM\s0 calling convention in | |
861bb6c1 | 5491 | which floating point arguments are passed in floating point registers. |
4bc1997b | 5492 | Note that \f(CW\*(C`varargs.h\*(C'\fR and \f(CW\*(C`stdargs.h\*(C'\fR will not work with |
861bb6c1 | 5493 | floating point operands if this option is specified. |
4bc1997b JM |
5494 | .Ip "\fB\-mfp-arg-in-gregs\fR" 4 |
5495 | .IX Item "-mfp-arg-in-gregs" | |
861bb6c1 JL |
5496 | Use the normal calling convention for floating point arguments. This is |
5497 | the default. | |
4bc1997b JM |
5498 | .Ip "\fB\-mhc-struct-return\fR" 4 |
5499 | .IX Item "-mhc-struct-return" | |
861bb6c1 JL |
5500 | Return structures of more than one word in memory, rather than in a |
5501 | register. This provides compatibility with the MetaWare HighC (hc) | |
4bc1997b JM |
5502 | compiler. Use the option \fB\-fpcc-struct-return\fR for compatibility |
5503 | with the Portable C Compiler (pcc). | |
5504 | .Ip "\fB\-mnohc-struct-return\fR" 4 | |
5505 | .IX Item "-mnohc-struct-return" | |
861bb6c1 JL |
5506 | Return some structures of more than one word in registers, when |
5507 | convenient. This is the default. For compatibility with the | |
4bc1997b JM |
5508 | IBM-supplied compilers, use the option \fB\-fpcc-struct-return\fR or the |
5509 | option \fB\-mhc-struct-return\fR. | |
5510 | .PP | |
5511 | .I "\s-1MIPS\s0 Options" | |
5512 | .IX Subsection "MIPS Options" | |
861bb6c1 | 5513 | .PP |
4bc1997b JM |
5514 | These \fB\-m\fR options are defined for the \s-1MIPS\s0 family of computers: |
5515 | .Ip "\fB\-mcpu=\fR\fIcpu type\fR" 4 | |
5516 | .IX Item "-mcpu=cpu type" | |
5517 | Assume the defaults for the machine type \fIcpu type\fR when scheduling | |
5518 | instructions. The choices for \fIcpu type\fR are \fBr2000\fR, \fBr3000\fR, | |
5519 | \&\fBr3900\fR, \fBr4000\fR, \fBr4100\fR, \fBr4300\fR, \fBr4400\fR, | |
5520 | \&\fBr4600\fR, \fBr4650\fR, \fBr5000\fR, \fBr6000\fR, \fBr8000\fR, | |
5521 | and \fBorion\fR. Additionally, the \fBr2000\fR, \fBr3000\fR, | |
5522 | \&\fBr4000\fR, \fBr5000\fR, and \fBr6000\fR can be abbreviated as | |
5523 | \&\fBr2k\fR (or \fBr2K\fR), \fBr3k\fR, etc. While picking a specific | |
5524 | \&\fIcpu type\fR will schedule things appropriately for that particular | |
5525 | chip, the compiler will not generate any code that does not meet level 1 | |
5526 | of the \s-1MIPS\s0 \s-1ISA\s0 (instruction set architecture) without a \fB\-mipsX\fR | |
5527 | or \fB\-mabi\fR switch being used. | |
5528 | .Ip "\fB\-mips1\fR" 4 | |
5529 | .IX Item "-mips1" | |
5530 | Issue instructions from level 1 of the \s-1MIPS\s0 \s-1ISA\s0. This is the default. | |
5531 | \&\fBr3000\fR is the default \fIcpu type\fR at this \s-1ISA\s0 level. | |
5532 | .Ip "\fB\-mips2\fR" 4 | |
5533 | .IX Item "-mips2" | |
5534 | Issue instructions from level 2 of the \s-1MIPS\s0 \s-1ISA\s0 (branch likely, square | |
5535 | root instructions). \fBr6000\fR is the default \fIcpu type\fR at this | |
5536 | \&\s-1ISA\s0 level. | |
5537 | .Ip "\fB\-mips3\fR" 4 | |
5538 | .IX Item "-mips3" | |
5539 | Issue instructions from level 3 of the \s-1MIPS\s0 \s-1ISA\s0 (64 bit instructions). | |
5540 | \&\fBr4000\fR is the default \fIcpu type\fR at this \s-1ISA\s0 level. | |
5541 | .Ip "\fB\-mips4\fR" 4 | |
5542 | .IX Item "-mips4" | |
5543 | Issue instructions from level 4 of the \s-1MIPS\s0 \s-1ISA\s0 (conditional move, | |
5544 | prefetch, enhanced \s-1FPU\s0 instructions). \fBr8000\fR is the default | |
5545 | \&\fIcpu type\fR at this \s-1ISA\s0 level. | |
5546 | .Ip "\fB\-mfp32\fR" 4 | |
5547 | .IX Item "-mfp32" | |
5548 | Assume that 32 32\-bit floating point registers are available. This is | |
5549 | the default. | |
5550 | .Ip "\fB\-mfp64\fR" 4 | |
5551 | .IX Item "-mfp64" | |
5552 | Assume that 32 64\-bit floating point registers are available. This is | |
5553 | the default when the \fB\-mips3\fR option is used. | |
5554 | .Ip "\fB\-mgp32\fR" 4 | |
5555 | .IX Item "-mgp32" | |
5556 | Assume that 32 32\-bit general purpose registers are available. This is | |
5557 | the default. | |
5558 | .Ip "\fB\-mgp64\fR" 4 | |
5559 | .IX Item "-mgp64" | |
5560 | Assume that 32 64\-bit general purpose registers are available. This is | |
5561 | the default when the \fB\-mips3\fR option is used. | |
5562 | .Ip "\fB\-mint64\fR" 4 | |
5563 | .IX Item "-mint64" | |
5564 | Force int and long types to be 64 bits wide. See \fB\-mlong32\fR for an | |
5565 | explanation of the default, and the width of pointers. | |
5566 | .Ip "\fB\-mlong64\fR" 4 | |
5567 | .IX Item "-mlong64" | |
5568 | Force long types to be 64 bits wide. See \fB\-mlong32\fR for an | |
5569 | explanation of the default, and the width of pointers. | |
5570 | .Ip "\fB\-mlong32\fR" 4 | |
5571 | .IX Item "-mlong32" | |
5572 | Force long, int, and pointer types to be 32 bits wide. | |
5573 | .Sp | |
5574 | If none of \fB\-mlong32\fR, \fB\-mlong64\fR, or \fB\-mint64\fR are set, | |
5575 | the size of ints, longs, and pointers depends on the \s-1ABI\s0 and \s-1ISA\s0 chosen. | |
5576 | For \fB\-mabi=32\fR, and \fB\-mabi=n32\fR, ints and longs are 32 bits | |
5577 | wide. For \fB\-mabi=64\fR, ints are 32 bits, and longs are 64 bits wide. | |
5578 | For \fB\-mabi=eabi\fR and either \fB\-mips1\fR or \fB\-mips2\fR, ints | |
5579 | and longs are 32 bits wide. For \fB\-mabi=eabi\fR and higher ISAs, ints | |
5580 | are 32 bits, and longs are 64 bits wide. The width of pointer types is | |
5581 | the smaller of the width of longs or the width of general purpose | |
5582 | registers (which in turn depends on the \s-1ISA\s0). | |
5583 | .Ip "\fB\-mabi=32\fR" 4 | |
5584 | .IX Item "-mabi=32" | |
5585 | .PD 0 | |
5586 | .Ip "\fB\-mabi=o64\fR" 4 | |
5587 | .IX Item "-mabi=o64" | |
5588 | .Ip "\fB\-mabi=n32\fR" 4 | |
5589 | .IX Item "-mabi=n32" | |
5590 | .Ip "\fB\-mabi=64\fR" 4 | |
5591 | .IX Item "-mabi=64" | |
5592 | .Ip "\fB\-mabi=eabi\fR" 4 | |
5593 | .IX Item "-mabi=eabi" | |
5594 | .PD | |
5595 | Generate code for the indicated \s-1ABI\s0. The default instruction level is | |
5596 | \&\fB\-mips1\fR for \fB32\fR, \fB\-mips3\fR for \fBn32\fR, and | |
5597 | \&\fB\-mips4\fR otherwise. Conversely, with \fB\-mips1\fR or | |
5598 | \&\fB\-mips2\fR, the default \s-1ABI\s0 is \fB32\fR; otherwise, the default \s-1ABI\s0 | |
5599 | is \fB64\fR. | |
5600 | .Ip "\fB\-mmips-as\fR" 4 | |
5601 | .IX Item "-mmips-as" | |
5602 | Generate code for the \s-1MIPS\s0 assembler, and invoke \fImips-tfile\fR to | |
5603 | add normal debug information. This is the default for all | |
5604 | platforms except for the \s-1OSF/1\s0 reference platform, using the OSF/rose | |
5605 | object format. If the either of the \fB\-gstabs\fR or \fB\-gstabs+\fR | |
5606 | switches are used, the \fImips-tfile\fR program will encapsulate the | |
5607 | stabs within \s-1MIPS\s0 \s-1ECOFF\s0. | |
5608 | .Ip "\fB\-mgas\fR" 4 | |
5609 | .IX Item "-mgas" | |
5610 | Generate code for the \s-1GNU\s0 assembler. This is the default on the \s-1OSF/1\s0 | |
5611 | reference platform, using the OSF/rose object format. Also, this is | |
5612 | the default if the configure option \fB\*(--with-gnu-as\fR is used. | |
5613 | .Ip "\fB\-msplit-addresses\fR" 4 | |
5614 | .IX Item "-msplit-addresses" | |
5615 | .PD 0 | |
5616 | .Ip "\fB\-mno-split-addresses\fR" 4 | |
5617 | .IX Item "-mno-split-addresses" | |
5618 | .PD | |
5619 | Generate code to load the high and low parts of address constants separately. | |
5620 | This allows \f(CW\*(C`gcc\*(C'\fR to optimize away redundant loads of the high order | |
5621 | bits of addresses. This optimization requires \s-1GNU\s0 as and \s-1GNU\s0 ld. | |
5622 | This optimization is enabled by default for some embedded targets where | |
5623 | \&\s-1GNU\s0 as and \s-1GNU\s0 ld are standard. | |
5624 | .Ip "\fB\-mrnames\fR" 4 | |
5625 | .IX Item "-mrnames" | |
5626 | .PD 0 | |
5627 | .Ip "\fB\-mno-rnames\fR" 4 | |
5628 | .IX Item "-mno-rnames" | |
5629 | .PD | |
5630 | The \fB\-mrnames\fR switch says to output code using the \s-1MIPS\s0 software | |
5631 | names for the registers, instead of the hardware names (ie, \fIa0\fR | |
5632 | instead of \fI$4\fR). The only known assembler that supports this option | |
5633 | is the Algorithmics assembler. | |
5634 | .Ip "\fB\-mgpopt\fR" 4 | |
5635 | .IX Item "-mgpopt" | |
5636 | .PD 0 | |
5637 | .Ip "\fB\-mno-gpopt\fR" 4 | |
5638 | .IX Item "-mno-gpopt" | |
5639 | .PD | |
5640 | The \fB\-mgpopt\fR switch says to write all of the data declarations | |
5641 | before the instructions in the text section, this allows the \s-1MIPS\s0 | |
5642 | assembler to generate one word memory references instead of using two | |
5643 | words for short global or static data items. This is on by default if | |
861bb6c1 | 5644 | optimization is selected. |
4bc1997b JM |
5645 | .Ip "\fB\-mstats\fR" 4 |
5646 | .IX Item "-mstats" | |
5647 | .PD 0 | |
5648 | .Ip "\fB\-mno-stats\fR" 4 | |
5649 | .IX Item "-mno-stats" | |
5650 | .PD | |
5651 | For each non-inline function processed, the \fB\-mstats\fR switch | |
5652 | causes the compiler to emit one line to the standard error file to | |
5653 | print statistics about the program (number of registers saved, stack | |
5654 | size, etc.). | |
5655 | .Ip "\fB\-mmemcpy\fR" 4 | |
5656 | .IX Item "-mmemcpy" | |
5657 | .PD 0 | |
5658 | .Ip "\fB\-mno-memcpy\fR" 4 | |
5659 | .IX Item "-mno-memcpy" | |
5660 | .PD | |
5661 | The \fB\-mmemcpy\fR switch makes all block moves call the appropriate | |
5662 | string function (\fBmemcpy\fR or \fBbcopy\fR) instead of possibly | |
5663 | generating inline code. | |
5664 | .Ip "\fB\-mmips-tfile\fR" 4 | |
5665 | .IX Item "-mmips-tfile" | |
5666 | .PD 0 | |
5667 | .Ip "\fB\-mno-mips-tfile\fR" 4 | |
5668 | .IX Item "-mno-mips-tfile" | |
5669 | .PD | |
5670 | The \fB\-mno-mips-tfile\fR switch causes the compiler not | |
5671 | postprocess the object file with the \fImips-tfile\fR program, | |
5672 | after the \s-1MIPS\s0 assembler has generated it to add debug support. If | |
5673 | \&\fImips-tfile\fR is not run, then no local variables will be | |
5674 | available to the debugger. In addition, \fIstage2\fR and | |
5675 | \&\fIstage3\fR objects will have the temporary file names passed to the | |
5676 | assembler embedded in the object file, which means the objects will | |
5677 | not compare the same. The \fB\-mno-mips-tfile\fR switch should only | |
5678 | be used when there are bugs in the \fImips-tfile\fR program that | |
5679 | prevents compilation. | |
5680 | .Ip "\fB\-msoft-float\fR" 4 | |
5681 | .IX Item "-msoft-float" | |
861bb6c1 | 5682 | Generate output containing library calls for floating point. |
4bc1997b JM |
5683 | \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. |
5684 | Normally the facilities of the machine's usual C compiler are used, but | |
5685 | this can't be done directly in cross-compilation. You must make your | |
5686 | own arrangements to provide suitable library functions for | |
5687 | cross-compilation. | |
5688 | .Ip "\fB\-mhard-float\fR" 4 | |
5689 | .IX Item "-mhard-float" | |
861bb6c1 JL |
5690 | Generate output containing floating point instructions. This is the |
5691 | default if you use the unmodified sources. | |
4bc1997b JM |
5692 | .Ip "\fB\-mabicalls\fR" 4 |
5693 | .IX Item "-mabicalls" | |
5694 | .PD 0 | |
5695 | .Ip "\fB\-mno-abicalls\fR" 4 | |
5696 | .IX Item "-mno-abicalls" | |
5697 | .PD | |
5698 | Emit (or do not emit) the pseudo operations \fB.abicalls\fR, | |
5699 | \&\fB.cpload\fR, and \fB.cprestore\fR that some System V.4 ports use for | |
5700 | position independent code. | |
5701 | .Ip "\fB\-mlong-calls\fR" 4 | |
5702 | .IX Item "-mlong-calls" | |
5703 | .PD 0 | |
5704 | .Ip "\fB\-mno-long-calls\fR" 4 | |
5705 | .IX Item "-mno-long-calls" | |
5706 | .PD | |
5707 | Do all calls with the \fB\s-1JALR\s0\fR instruction, which requires | |
5708 | loading up a function's address into a register before the call. | |
5709 | You need to use this switch, if you call outside of the current | |
5710 | 512 megabyte segment to functions that are not through pointers. | |
5711 | .Ip "\fB\-mhalf-pic\fR" 4 | |
5712 | .IX Item "-mhalf-pic" | |
5713 | .PD 0 | |
5714 | .Ip "\fB\-mno-half-pic\fR" 4 | |
5715 | .IX Item "-mno-half-pic" | |
5716 | .PD | |
5717 | Put pointers to extern references into the data section and load them | |
5718 | up, rather than put the references in the text section. | |
5719 | .Ip "\fB\-membedded-pic\fR" 4 | |
5720 | .IX Item "-membedded-pic" | |
5721 | .PD 0 | |
5722 | .Ip "\fB\-mno-embedded-pic\fR" 4 | |
5723 | .IX Item "-mno-embedded-pic" | |
5724 | .PD | |
5725 | Generate \s-1PIC\s0 code suitable for some embedded systems. All calls are | |
5726 | made using \s-1PC\s0 relative address, and all data is addressed using the \f(CW$gp\fR | |
5727 | register. No more than 65536 bytes of global data may be used. This | |
5728 | requires \s-1GNU\s0 as and \s-1GNU\s0 ld which do most of the work. This currently | |
5729 | only works on targets which use \s-1ECOFF\s0; it does not work with \s-1ELF\s0. | |
5730 | .Ip "\fB\-membedded-data\fR" 4 | |
5731 | .IX Item "-membedded-data" | |
5732 | .PD 0 | |
5733 | .Ip "\fB\-mno-embedded-data\fR" 4 | |
5734 | .IX Item "-mno-embedded-data" | |
5735 | .PD | |
5736 | Allocate variables to the read-only data section first if possible, then | |
5737 | next in the small data section if possible, otherwise in data. This gives | |
5738 | slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required | |
5739 | when executing, and thus may be preferred for some embedded systems. | |
5740 | .Ip "\fB\-muninit-const-in-rodata\fR" 4 | |
5741 | .IX Item "-muninit-const-in-rodata" | |
5742 | .PD 0 | |
5743 | .Ip "\fB\-mno-uninit-const-in-rodata\fR" 4 | |
5744 | .IX Item "-mno-uninit-const-in-rodata" | |
5745 | .PD | |
5746 | When used together with \-membedded-data, it will always store uninitialized | |
5747 | const variables in the read-only data section. | |
5748 | .Ip "\fB\-msingle-float\fR" 4 | |
5749 | .IX Item "-msingle-float" | |
5750 | .PD 0 | |
5751 | .Ip "\fB\-mdouble-float\fR" 4 | |
5752 | .IX Item "-mdouble-float" | |
5753 | .PD | |
5754 | The \fB\-msingle-float\fR switch tells gcc to assume that the floating | |
5755 | point coprocessor only supports single precision operations, as on the | |
5756 | \&\fBr4650\fR chip. The \fB\-mdouble-float\fR switch permits gcc to use | |
5757 | double precision operations. This is the default. | |
5758 | .Ip "\fB\-mmad\fR" 4 | |
5759 | .IX Item "-mmad" | |
5760 | .PD 0 | |
5761 | .Ip "\fB\-mno-mad\fR" 4 | |
5762 | .IX Item "-mno-mad" | |
5763 | .PD | |
5764 | Permit use of the \fBmad\fR, \fBmadu\fR and \fBmul\fR instructions, | |
5765 | as on the \fBr4650\fR chip. | |
5766 | .Ip "\fB\-m4650\fR" 4 | |
5767 | .IX Item "-m4650" | |
5768 | Turns on \fB\-msingle-float\fR, \fB\-mmad\fR, and, at least for now, | |
5769 | \&\fB\-mcpu=r4650\fR. | |
5770 | .Ip "\fB\-mips16\fR" 4 | |
5771 | .IX Item "-mips16" | |
5772 | .PD 0 | |
5773 | .Ip "\fB\-mno-mips16\fR" 4 | |
5774 | .IX Item "-mno-mips16" | |
5775 | .PD | |
5776 | Enable 16\-bit instructions. | |
5777 | .Ip "\fB\-mentry\fR" 4 | |
5778 | .IX Item "-mentry" | |
5779 | Use the entry and exit pseudo ops. This option can only be used with | |
5780 | \&\fB\-mips16\fR. | |
5781 | .Ip "\fB\-EL\fR" 4 | |
5782 | .IX Item "-EL" | |
5783 | Compile code for the processor in little endian mode. | |
5784 | The requisite libraries are assumed to exist. | |
5785 | .Ip "\fB\-EB\fR" 4 | |
5786 | .IX Item "-EB" | |
5787 | Compile code for the processor in big endian mode. | |
5788 | The requisite libraries are assumed to exist. | |
5789 | .Ip "\fB\-G\fR \fInum\fR" 4 | |
5790 | .IX Item "-G num" | |
5791 | Put global and static items less than or equal to \fInum\fR bytes into | |
5792 | the small data or bss sections instead of the normal data or bss | |
5793 | section. This allows the assembler to emit one word memory reference | |
5794 | instructions based on the global pointer (\fIgp\fR or \fI$28\fR), | |
5795 | instead of the normal two words used. By default, \fInum\fR is 8 when | |
5796 | the \s-1MIPS\s0 assembler is used, and 0 when the \s-1GNU\s0 assembler is used. The | |
5797 | \&\fB\-G\fR \fInum\fR switch is also passed to the assembler and linker. | |
5798 | All modules should be compiled with the same \fB\-G\fR \fInum\fR | |
861bb6c1 | 5799 | value. |
4bc1997b JM |
5800 | .Ip "\fB\-nocpp\fR" 4 |
5801 | .IX Item "-nocpp" | |
5802 | Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user | |
5803 | assembler files (with a \fB.s\fR suffix) when assembling them. | |
5804 | .Ip "\fB\-mfix7000\fR" 4 | |
5805 | .IX Item "-mfix7000" | |
5806 | Pass an option to gas which will cause nops to be inserted if | |
5807 | the read of the destination register of an mfhi or mflo instruction | |
5808 | occurs in the following two instructions. | |
5809 | .Ip "\fB\-no-crt0\fR" 4 | |
5810 | .IX Item "-no-crt0" | |
5811 | Do not include the default crt0. | |
861bb6c1 | 5812 | .PP |
4bc1997b JM |
5813 | .I "Intel 386 Options" |
5814 | .IX Subsection "Intel 386 Options" | |
5815 | .PP | |
5816 | These \fB\-m\fR options are defined for the i386 family of computers: | |
5817 | .Ip "\fB\-mcpu=\fR\fIcpu type\fR" 4 | |
5818 | .IX Item "-mcpu=cpu type" | |
5819 | Assume the defaults for the machine type \fIcpu type\fR when scheduling | |
5820 | instructions. The choices for \fIcpu type\fR are \fBi386\fR, | |
5821 | \&\fBi486\fR, \fBi586\fR, \fBi686\fR, \fBpentium\fR, | |
5822 | \&\fBpentiumpro\fR, \fBk6\fR, and \fBathlon\fR | |
5823 | .Sp | |
5824 | While picking a specific \fIcpu type\fR will schedule things appropriately | |
5825 | for that particular chip, the compiler will not generate any code that | |
5826 | does not run on the i386 without the \fB\-march=\fR\fIcpu type\fR option | |
5827 | being used. \fBi586\fR is equivalent to \fBpentium\fR and \fBi686\fR | |
5828 | is equivalent to \fBpentiumpro\fR. \fBk6\fR is the \s-1AMD\s0 chip as | |
5829 | opposed to the Intel ones. | |
5830 | .Ip "\fB\-march=\fR\fIcpu type\fR" 4 | |
5831 | .IX Item "-march=cpu type" | |
5832 | Generate instructions for the machine type \fIcpu type\fR. The choices | |
5833 | for \fIcpu type\fR are the same as for \fB\-mcpu\fR. Moreover, | |
5834 | specifying \fB\-march=\fR\fIcpu type\fR implies \fB\-mcpu=\fR\fIcpu type\fR. | |
5835 | .Ip "\fB\-m386\fR" 4 | |
5836 | .IX Item "-m386" | |
5837 | .PD 0 | |
5838 | .Ip "\fB\-m486\fR" 4 | |
5839 | .IX Item "-m486" | |
5840 | .Ip "\fB\-mpentium\fR" 4 | |
5841 | .IX Item "-mpentium" | |
5842 | .Ip "\fB\-mpentiumpro\fR" 4 | |
5843 | .IX Item "-mpentiumpro" | |
5844 | .PD | |
5845 | Synonyms for \-mcpu=i386, \-mcpu=i486, \-mcpu=pentium, and \-mcpu=pentiumpro | |
5846 | respectively. These synonyms are deprecated. | |
5847 | .Ip "\fB\-mintel-syntax\fR" 4 | |
5848 | .IX Item "-mintel-syntax" | |
5849 | Emit assembly using Intel syntax opcodes instead of \s-1AT&T\s0 syntax. | |
5850 | .Ip "\fB\-mieee-fp\fR" 4 | |
5851 | .IX Item "-mieee-fp" | |
5852 | .PD 0 | |
5853 | .Ip "\fB\-mno-ieee-fp\fR" 4 | |
5854 | .IX Item "-mno-ieee-fp" | |
5855 | .PD | |
5856 | Control whether or not the compiler uses \s-1IEEE\s0 floating point | |
5857 | comparisons. These handle correctly the case where the result of a | |
5858 | comparison is unordered. | |
5859 | .Ip "\fB\-msoft-float\fR" 4 | |
5860 | .IX Item "-msoft-float" | |
861bb6c1 | 5861 | Generate output containing library calls for floating point. |
4bc1997b | 5862 | \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. |
861bb6c1 JL |
5863 | Normally the facilities of the machine's usual C compiler are used, but |
5864 | this can't be done directly in cross-compilation. You must make your | |
5865 | own arrangements to provide suitable library functions for | |
5866 | cross-compilation. | |
5867 | .Sp | |
5868 | On machines where a function returns floating point results in the 80387 | |
5869 | register stack, some floating point opcodes may be emitted even if | |
4bc1997b JM |
5870 | \&\fB\-msoft-float\fR is used. |
5871 | .Ip "\fB\-mno-fp-ret-in-387\fR" 4 | |
5872 | .IX Item "-mno-fp-ret-in-387" | |
5873 | Do not use the \s-1FPU\s0 registers for return values of functions. | |
861bb6c1 JL |
5874 | .Sp |
5875 | The usual calling convention has functions return values of types | |
4bc1997b JM |
5876 | \&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there |
5877 | is no \s-1FPU\s0. The idea is that the operating system should emulate | |
5878 | an \s-1FPU\s0. | |
5879 | .Sp | |
5880 | The option \fB\-mno-fp-ret-in-387\fR causes such values to be returned | |
5881 | in ordinary \s-1CPU\s0 registers instead. | |
5882 | .Ip "\fB\-mno-fancy-math-387\fR" 4 | |
5883 | .IX Item "-mno-fancy-math-387" | |
5884 | Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and | |
5885 | \&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid | |
5886 | generating those instructions. This option is the default on FreeBSD. | |
5887 | As of revision 2.6.1, these instructions are not generated unless you | |
5888 | also use the \fB\-ffast-math\fR switch. | |
5889 | .Ip "\fB\-malign-double\fR" 4 | |
5890 | .IX Item "-malign-double" | |
5891 | .PD 0 | |
5892 | .Ip "\fB\-mno-align-double\fR" 4 | |
5893 | .IX Item "-mno-align-double" | |
5894 | .PD | |
5895 | Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and | |
5896 | \&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word | |
5897 | boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will | |
5898 | produce code that runs somewhat faster on a \fBPentium\fR at the | |
5899 | expense of more memory. | |
5900 | .Ip "\fB\-m128bit-long-double\fR" 4 | |
5901 | .IX Item "-m128bit-long-double" | |
5902 | .PD 0 | |
5903 | .Ip "\fB\-m128bit-long-double\fR" 4 | |
5904 | .IX Item "-m128bit-long-double" | |
5905 | .PD | |
5906 | Control the size of \f(CW\*(C`long double\*(C'\fR type. i386 application binary interface | |
5907 | specify the size to be 12 bytes, while modern architectures (Pentium and newer) | |
5908 | preffer \f(CW\*(C`long double\*(C'\fR aligned to 8 or 16 byte boundary. This is | |
5909 | impossible to reach with 12 byte long doubles in the array accesses. | |
5910 | .Sp | |
5911 | \&\fBWarning:\fR if you use the \fB\-m128bit-long-double\fR switch, the | |
5912 | structures and arrays containing \f(CW\*(C`long double\*(C'\fR will change their size as | |
5913 | well as function calling convention for function taking \f(CW\*(C`long double\*(C'\fR | |
5914 | will be modified. | |
5915 | .Ip "\fB\-m96bit-long-double\fR" 4 | |
5916 | .IX Item "-m96bit-long-double" | |
5917 | .PD 0 | |
5918 | .Ip "\fB\-m96bit-long-double\fR" 4 | |
5919 | .IX Item "-m96bit-long-double" | |
5920 | .PD | |
5921 | Set the size of \f(CW\*(C`long double\*(C'\fR to 96 bits as required by the i386 | |
5922 | application binary interface. This is the default. | |
5923 | .Ip "\fB\-msvr3\-shlib\fR" 4 | |
5924 | .IX Item "-msvr3-shlib" | |
5925 | .PD 0 | |
5926 | .Ip "\fB\-mno-svr3\-shlib\fR" 4 | |
5927 | .IX Item "-mno-svr3-shlib" | |
5928 | .PD | |
5929 | Control whether \s-1GCC\s0 places uninitialized locals into \f(CW\*(C`bss\*(C'\fR or | |
5930 | \&\f(CW\*(C`data\*(C'\fR. \fB\-msvr3\-shlib\fR places these locals into \f(CW\*(C`bss\*(C'\fR. | |
5931 | These options are meaningful only on System V Release 3. | |
5932 | .Ip "\fB\-mno-wide-multiply\fR" 4 | |
5933 | .IX Item "-mno-wide-multiply" | |
5934 | .PD 0 | |
5935 | .Ip "\fB\-mwide-multiply\fR" 4 | |
5936 | .IX Item "-mwide-multiply" | |
5937 | .PD | |
5938 | Control whether \s-1GCC\s0 uses the \f(CW\*(C`mul\*(C'\fR and \f(CW\*(C`imul\*(C'\fR that produce | |
5939 | 64 bit results in \f(CW\*(C`eax:edx\*(C'\fR from 32 bit operands to do \f(CW\*(C`long | |
5940 | long\*(C'\fR multiplies and 32\-bit division by constants. | |
5941 | .Ip "\fB\-mrtd\fR" 4 | |
5942 | .IX Item "-mrtd" | |
5943 | Use a different function-calling convention, in which functions that | |
5944 | take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR | |
5945 | instruction, which pops their arguments while returning. This saves one | |
5946 | instruction in the caller since there is no need to pop the arguments | |
5947 | there. | |
5948 | .Sp | |
5949 | You can specify that an individual function is called with this calling | |
5950 | sequence with the function attribute \fBstdcall\fR. You can also | |
5951 | override the \fB\-mrtd\fR option by using the function attribute | |
5952 | \&\fBcdecl\fR. | |
5953 | .Sp | |
5954 | \&\fBWarning:\fR this calling convention is incompatible with the one | |
5955 | normally used on Unix, so you cannot use it if you need to call | |
5956 | libraries compiled with the Unix compiler. | |
5957 | .Sp | |
5958 | Also, you must provide function prototypes for all functions that | |
5959 | take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); | |
5960 | otherwise incorrect code will be generated for calls to those | |
5961 | functions. | |
5962 | .Sp | |
5963 | In addition, seriously incorrect code will result if you call a | |
5964 | function with too many arguments. (Normally, extra arguments are | |
5965 | harmlessly ignored.) | |
5966 | .Ip "\fB\-mreg-alloc=\fR\fIregs\fR" 4 | |
5967 | .IX Item "-mreg-alloc=regs" | |
5968 | Control the default allocation order of integer registers. The | |
5969 | string \fIregs\fR is a series of letters specifying a register. The | |
5970 | supported letters are: \f(CW\*(C`a\*(C'\fR allocate \s-1EAX\s0; \f(CW\*(C`b\*(C'\fR allocate \s-1EBX\s0; | |
5971 | \&\f(CW\*(C`c\*(C'\fR allocate \s-1ECX\s0; \f(CW\*(C`d\*(C'\fR allocate \s-1EDX\s0; \f(CW\*(C`S\*(C'\fR allocate \s-1ESI\s0; | |
5972 | \&\f(CW\*(C`D\*(C'\fR allocate \s-1EDI\s0; \f(CW\*(C`B\*(C'\fR allocate \s-1EBP\s0. | |
5973 | .Ip "\fB\-mregparm=\fR\fInum\fR" 4 | |
5974 | .IX Item "-mregparm=num" | |
5975 | Control how many registers are used to pass integer arguments. By | |
5976 | default, no registers are used to pass arguments, and at most 3 | |
5977 | registers can be used. You can control this behavior for a specific | |
5978 | function by using the function attribute \fBregparm\fR. | |
5979 | .Sp | |
5980 | \&\fBWarning:\fR if you use this switch, and | |
5981 | \&\fInum\fR is nonzero, then you must build all modules with the same | |
5982 | value, including any libraries. This includes the system libraries and | |
5983 | startup modules. | |
5984 | .Ip "\fB\-malign-loops=\fR\fInum\fR" 4 | |
5985 | .IX Item "-malign-loops=num" | |
5986 | Align loops to a 2 raised to a \fInum\fR byte boundary. If | |
5987 | \&\fB\-malign-loops\fR is not specified, the default is 2 unless | |
5988 | gas 2.8 (or later) is being used in which case the default is | |
5989 | to align the loop on a 16 byte boundary if it is less than 8 | |
5990 | bytes away. | |
5991 | .Ip "\fB\-malign-jumps=\fR\fInum\fR" 4 | |
5992 | .IX Item "-malign-jumps=num" | |
5993 | Align instructions that are only jumped to to a 2 raised to a \fInum\fR | |
5994 | byte boundary. If \fB\-malign-jumps\fR is not specified, the default is | |
5995 | 2 if optimizing for a 386, and 4 if optimizing for a 486 unless | |
5996 | gas 2.8 (or later) is being used in which case the default is | |
5997 | to align the instruction on a 16 byte boundary if it is less | |
5998 | than 8 bytes away. | |
5999 | .Ip "\fB\-malign-functions=\fR\fInum\fR" 4 | |
6000 | .IX Item "-malign-functions=num" | |
6001 | Align the start of functions to a 2 raised to \fInum\fR byte boundary. | |
6002 | If \fB\-malign-functions\fR is not specified, the default is 2 if optimizing | |
6003 | for a 386, and 4 if optimizing for a 486. | |
6004 | .Ip "\fB\-mpreferred-stack-boundary=\fR\fInum\fR" 4 | |
6005 | .IX Item "-mpreferred-stack-boundary=num" | |
6006 | Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR | |
6007 | byte boundary. If \fB\-mpreferred-stack-boundary\fR is not specified, | |
6008 | the default is 4 (16 bytes or 128 bits). | |
6009 | .Sp | |
6010 | The stack is required to be aligned on a 4 byte boundary. On Pentium | |
6011 | and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values should be | |
6012 | aligned to an 8 byte boundary (see \fB\-malign-double\fR) or suffer | |
6013 | significant run time performance penalties. On Pentium \s-1III\s0, the | |
6014 | Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR suffers similar | |
6015 | penalties if it is not 16 byte aligned. | |
6016 | .Sp | |
6017 | To ensure proper alignment of this values on the stack, the stack boundary | |
6018 | must be as aligned as that required by any value stored on the stack. | |
6019 | Further, every function must be generated such that it keeps the stack | |
6020 | aligned. Thus calling a function compiled with a higher preferred | |
6021 | stack boundary from a function compiled with a lower preferred stack | |
6022 | boundary will most likely misalign the stack. It is recommended that | |
6023 | libraries that use callbacks always use the default setting. | |
6024 | .Sp | |
6025 | This extra alignment does consume extra stack space. Code that is sensitive | |
6026 | to stack space usage, such as embedded systems and operating system kernels, | |
6027 | may want to reduce the preferred alignment to | |
6028 | \&\fB\-mpreferred-stack-boundary=2\fR. | |
6029 | .Ip "\fB\-mpush-args\fR" 4 | |
6030 | .IX Item "-mpush-args" | |
6031 | Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter | |
6032 | and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled | |
6033 | by default. In some cases disabling it may improve performance because of | |
6034 | improved scheduling and reduced dependencies. | |
6035 | .Ip "\fB\-maccumulate-outgoing-args\fR" 4 | |
6036 | .IX Item "-maccumulate-outgoing-args" | |
6037 | If enabled, the maximum amount of space required for outgoing arguments will be | |
6038 | computed in the function prologue. This in faster on most modern CPUs | |
6039 | because of reduced dependencies, improved scheduling and reduced stack usage | |
6040 | when preferred stack boundary is not equal to 2. The drawback is a notable | |
6041 | increase in code size. This switch implies \-mno-push-args. | |
6042 | .Ip "\fB\-mthreads\fR" 4 | |
6043 | .IX Item "-mthreads" | |
6044 | Support thread-safe exception handling on \fBMingw32\fR. Code that relies | |
6045 | on thread-safe exception handling must compile and link all code with the | |
6046 | \&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines | |
6047 | \&\fB\-D_MT\fR; when linking, it links in a special thread helper library | |
6048 | \&\fB\-lmingwthrd\fR which cleans up per thread exception handling data. | |
6049 | .Ip "\fB\-mno-align-stringops\fR" 4 | |
6050 | .IX Item "-mno-align-stringops" | |
6051 | Do not align destination of inlined string operations. This switch reduces | |
6052 | code size and improves performance in case the destination is already aligned, | |
6053 | but gcc don't know about it. | |
6054 | .Ip "\fB\-minline-all-stringops\fR" 4 | |
6055 | .IX Item "-minline-all-stringops" | |
6056 | By default \s-1GCC\s0 inlines string operations only when destination is known to be | |
6057 | aligned at least to 4 byte boundary. This enables more inlining, increase code | |
6058 | size, but may improve performance of code that depends on fast memcpy, strlen | |
6059 | and memset for short lengths. | |
861bb6c1 | 6060 | .PP |
4bc1997b JM |
6061 | .I "\s-1HPPA\s0 Options" |
6062 | .IX Subsection "HPPA Options" | |
6063 | .PP | |
6064 | These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers: | |
6065 | .Ip "\fB\-march=\fR\fIarchitecture type\fR" 4 | |
6066 | .IX Item "-march=architecture type" | |
6067 | Generate code for the specified architecture. The choices for | |
6068 | \&\fIarchitecture type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0 | |
6069 | 1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to | |
6070 | \&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the proper | |
6071 | architecture option for your machine. Code compiled for lower numbered | |
6072 | architectures will run on higher numbered architectures, but not the | |
6073 | other way around. | |
6074 | .Sp | |
6075 | \&\s-1PA\s0 2.0 support currently requires gas snapshot 19990413 or later. The | |
6076 | next release of binutils (current is 2.9.1) will probably contain \s-1PA\s0 2.0 | |
6077 | support. | |
6078 | .Ip "\fB\-mpa-risc-1\-0\fR" 4 | |
6079 | .IX Item "-mpa-risc-1-0" | |
6080 | .PD 0 | |
6081 | .Ip "\fB\-mpa-risc-1\-1\fR" 4 | |
6082 | .IX Item "-mpa-risc-1-1" | |
6083 | .Ip "\fB\-mpa-risc-2\-0\fR" 4 | |
6084 | .IX Item "-mpa-risc-2-0" | |
6085 | .PD | |
6086 | Synonyms for \-march=1.0, \-march=1.1, and \-march=2.0 respectively. | |
6087 | .Ip "\fB\-mbig-switch\fR" 4 | |
6088 | .IX Item "-mbig-switch" | |
6089 | Generate code suitable for big switch tables. Use this option only if | |
6090 | the assembler/linker complain about out of range branches within a switch | |
6091 | table. | |
6092 | .Ip "\fB\-mjump-in-delay\fR" 4 | |
6093 | .IX Item "-mjump-in-delay" | |
6094 | Fill delay slots of function calls with unconditional jump instructions | |
6095 | by modifying the return pointer for the function call to be the target | |
6096 | of the conditional jump. | |
6097 | .Ip "\fB\-mdisable-fpregs\fR" 4 | |
6098 | .IX Item "-mdisable-fpregs" | |
861bb6c1 JL |
6099 | Prevent floating point registers from being used in any manner. This is |
6100 | necessary for compiling kernels which perform lazy context switching of | |
6101 | floating point registers. If you use this option and attempt to perform | |
6102 | floating point operations, the compiler will abort. | |
4bc1997b JM |
6103 | .Ip "\fB\-mdisable-indexing\fR" 4 |
6104 | .IX Item "-mdisable-indexing" | |
861bb6c1 | 6105 | Prevent the compiler from using indexing address modes. This avoids some |
4bc1997b JM |
6106 | rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0. |
6107 | .Ip "\fB\-mno-space-regs\fR" 4 | |
6108 | .IX Item "-mno-space-regs" | |
6109 | Generate code that assumes the target has no space registers. This allows | |
6110 | \&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes. | |
6111 | .Sp | |
6112 | Such code is suitable for level 0 \s-1PA\s0 systems and kernels. | |
6113 | .Ip "\fB\-mfast-indirect-calls\fR" 4 | |
6114 | .IX Item "-mfast-indirect-calls" | |
6115 | Generate code that assumes calls never cross space boundaries. This | |
6116 | allows \s-1GCC\s0 to emit code which performs faster indirect calls. | |
6117 | .Sp | |
6118 | This option will not work in the presence of shared libraries or nested | |
6119 | functions. | |
6120 | .Ip "\fB\-mlong-load-store\fR" 4 | |
6121 | .IX Item "-mlong-load-store" | |
6122 | Generate 3\-instruction load and store sequences as sometimes required by | |
6123 | the \s-1HP-UX\s0 10 linker. This is equivalent to the \fB+k\fR option to | |
6124 | the \s-1HP\s0 compilers. | |
6125 | .Ip "\fB\-mportable-runtime\fR" 4 | |
6126 | .IX Item "-mportable-runtime" | |
6127 | Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems. | |
6128 | .Ip "\fB\-mgas\fR" 4 | |
6129 | .IX Item "-mgas" | |
6130 | Enable the use of assembler directives only \s-1GAS\s0 understands. | |
6131 | .Ip "\fB\-mschedule=\fR\fIcpu type\fR" 4 | |
6132 | .IX Item "-mschedule=cpu type" | |
6133 | Schedule code according to the constraints for the machine type | |
6134 | \&\fIcpu type\fR. The choices for \fIcpu type\fR are \fB700\fR | |
6135 | \&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, and \fB8000\fR. Refer to | |
6136 | \&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the | |
6137 | proper scheduling option for your machine. | |
6138 | .Ip "\fB\-mlinker-opt\fR" 4 | |
6139 | .IX Item "-mlinker-opt" | |
6140 | Enable the optimization pass in the \s-1HPUX\s0 linker. Note this makes symbolic | |
6141 | debugging impossible. It also triggers a bug in the \s-1HPUX\s0 8 and \s-1HPUX\s0 9 linkers | |
6142 | in which they give bogus error messages when linking some programs. | |
6143 | .Ip "\fB\-msoft-float\fR" 4 | |
6144 | .IX Item "-msoft-float" | |
6145 | Generate output containing library calls for floating point. | |
6146 | \&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0 | |
6147 | targets. Normally the facilities of the machine's usual C compiler are | |
6148 | used, but this cannot be done directly in cross-compilation. You must make | |
6149 | your own arrangements to provide suitable library functions for | |
6150 | cross-compilation. The embedded target \fBhppa1.1\-*\-pro\fR | |
6151 | does provide software floating point support. | |
6152 | .Sp | |
6153 | \&\fB\-msoft-float\fR changes the calling convention in the output file; | |
6154 | therefore, it is only useful if you compile \fIall\fR of a program with | |
6155 | this option. In particular, you need to compile \fIlibgcc.a\fR, the | |
6156 | library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for | |
6157 | this to work. | |
6158 | .PP | |
6159 | .I "Intel 960 Options" | |
6160 | .IX Subsection "Intel 960 Options" | |
861bb6c1 | 6161 | .PP |
4bc1997b JM |
6162 | These \fB\-m\fR options are defined for the Intel 960 implementations: |
6163 | .Ip "\fB\-m\fR\fIcpu type\fR" 4 | |
6164 | .IX Item "-mcpu type" | |
6165 | Assume the defaults for the machine type \fIcpu type\fR for some of | |
6166 | the other options, including instruction scheduling, floating point | |
6167 | support, and addressing modes. The choices for \fIcpu type\fR are | |
6168 | \&\fBka\fR, \fBkb\fR, \fBmc\fR, \fBca\fR, \fBcf\fR, | |
6169 | \&\fBsa\fR, and \fBsb\fR. | |
6170 | The default is | |
6171 | \&\fBkb\fR. | |
6172 | .Ip "\fB\-mnumerics\fR" 4 | |
6173 | .IX Item "-mnumerics" | |
6174 | .PD 0 | |
6175 | .Ip "\fB\-msoft-float\fR" 4 | |
6176 | .IX Item "-msoft-float" | |
6177 | .PD | |
6178 | The \fB\-mnumerics\fR option indicates that the processor does support | |
6179 | floating-point instructions. The \fB\-msoft-float\fR option indicates | |
861bb6c1 | 6180 | that floating-point support should not be assumed. |
4bc1997b JM |
6181 | .Ip "\fB\-mleaf-procedures\fR" 4 |
6182 | .IX Item "-mleaf-procedures" | |
6183 | .PD 0 | |
6184 | .Ip "\fB\-mno-leaf-procedures\fR" 4 | |
6185 | .IX Item "-mno-leaf-procedures" | |
6186 | .PD | |
861bb6c1 | 6187 | Do (or do not) attempt to alter leaf procedures to be callable with the |
4bc1997b JM |
6188 | \&\f(CW\*(C`bal\*(C'\fR instruction as well as \f(CW\*(C`call\*(C'\fR. This will result in more |
6189 | efficient code for explicit calls when the \f(CW\*(C`bal\*(C'\fR instruction can be | |
861bb6c1 JL |
6190 | substituted by the assembler or linker, but less efficient code in other |
6191 | cases, such as calls via function pointers, or using a linker that doesn't | |
6192 | support this optimization. | |
4bc1997b JM |
6193 | .Ip "\fB\-mtail-call\fR" 4 |
6194 | .IX Item "-mtail-call" | |
6195 | .PD 0 | |
6196 | .Ip "\fB\-mno-tail-call\fR" 4 | |
6197 | .IX Item "-mno-tail-call" | |
6198 | .PD | |
861bb6c1 JL |
6199 | Do (or do not) make additional attempts (beyond those of the |
6200 | machine-independent portions of the compiler) to optimize tail-recursive | |
6201 | calls into branches. You may not want to do this because the detection of | |
6202 | cases where this is not valid is not totally complete. The default is | |
4bc1997b JM |
6203 | \&\fB\-mno-tail-call\fR. |
6204 | .Ip "\fB\-mcomplex-addr\fR" 4 | |
6205 | .IX Item "-mcomplex-addr" | |
6206 | .PD 0 | |
6207 | .Ip "\fB\-mno-complex-addr\fR" 4 | |
6208 | .IX Item "-mno-complex-addr" | |
6209 | .PD | |
861bb6c1 JL |
6210 | Assume (or do not assume) that the use of a complex addressing mode is a |
6211 | win on this implementation of the i960. Complex addressing modes may not | |
6212 | be worthwhile on the K-series, but they definitely are on the C-series. | |
4bc1997b JM |
6213 | The default is currently \fB\-mcomplex-addr\fR for all processors except |
6214 | the \s-1CB\s0 and \s-1CC\s0. | |
6215 | .Ip "\fB\-mcode-align\fR" 4 | |
6216 | .IX Item "-mcode-align" | |
6217 | .PD 0 | |
6218 | .Ip "\fB\-mno-code-align\fR" 4 | |
6219 | .IX Item "-mno-code-align" | |
6220 | .PD | |
6221 | Align code to 8\-byte boundaries for faster fetching (or don't bother). | |
861bb6c1 | 6222 | Currently turned on by default for C-series implementations only. |
4bc1997b JM |
6223 | .Ip "\fB\-mic-compat\fR" 4 |
6224 | .IX Item "-mic-compat" | |
6225 | .PD 0 | |
6226 | .Ip "\fB\-mic2.0\-compat\fR" 4 | |
6227 | .IX Item "-mic2.0-compat" | |
6228 | .Ip "\fB\-mic3.0\-compat\fR" 4 | |
6229 | .IX Item "-mic3.0-compat" | |
6230 | .PD | |
861bb6c1 | 6231 | Enable compatibility with iC960 v2.0 or v3.0. |
4bc1997b JM |
6232 | .Ip "\fB\-masm-compat\fR" 4 |
6233 | .IX Item "-masm-compat" | |
6234 | .PD 0 | |
6235 | .Ip "\fB\-mintel-asm\fR" 4 | |
6236 | .IX Item "-mintel-asm" | |
6237 | .PD | |
861bb6c1 | 6238 | Enable compatibility with the iC960 assembler. |
4bc1997b JM |
6239 | .Ip "\fB\-mstrict-align\fR" 4 |
6240 | .IX Item "-mstrict-align" | |
6241 | .PD 0 | |
6242 | .Ip "\fB\-mno-strict-align\fR" 4 | |
6243 | .IX Item "-mno-strict-align" | |
6244 | .PD | |
861bb6c1 | 6245 | Do not permit (do permit) unaligned accesses. |
4bc1997b JM |
6246 | .Ip "\fB\-mold-align\fR" 4 |
6247 | .IX Item "-mold-align" | |
861bb6c1 | 6248 | Enable structure-alignment compatibility with Intel's gcc release version |
4bc1997b JM |
6249 | 1.3 (based on gcc 1.37). This option implies \fB\-mstrict-align\fR. |
6250 | .Ip "\fB\-mlong-double-64\fR" 4 | |
6251 | .IX Item "-mlong-double-64" | |
6252 | Implement type \fBlong double\fR as 64\-bit floating point numbers. | |
6253 | Without the option \fBlong double\fR is implemented by 80\-bit | |
6254 | floating point numbers. The only reason we have it because there is | |
6255 | no 128\-bit \fBlong double\fR support in \fBfp-bit.c\fR yet. So it | |
6256 | is only useful for people using soft-float targets. Otherwise, we | |
6257 | should recommend against use of it. | |
861bb6c1 | 6258 | .PP |
4bc1997b JM |
6259 | .I "\s-1DEC\s0 Alpha Options" |
6260 | .IX Subsection "DEC Alpha Options" | |
6261 | .PP | |
6262 | These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations: | |
6263 | .Ip "\fB\-mno-soft-float\fR" 4 | |
6264 | .IX Item "-mno-soft-float" | |
6265 | .PD 0 | |
6266 | .Ip "\fB\-msoft-float\fR" 4 | |
6267 | .IX Item "-msoft-float" | |
6268 | .PD | |
861bb6c1 | 6269 | Use (do not use) the hardware floating-point instructions for |
4bc1997b JM |
6270 | floating-point operations. When \fB\-msoft-float\fR is specified, |
6271 | functions in \fIlibgcc1.c\fR will be used to perform floating-point | |
861bb6c1 JL |
6272 | operations. Unless they are replaced by routines that emulate the |
6273 | floating-point operations, or compiled in such a way as to call such | |
6274 | emulations routines, these routines will issue floating-point | |
6275 | operations. If you are compiling for an Alpha without floating-point | |
6276 | operations, you must ensure that the library is built so as not to call | |
6277 | them. | |
6278 | .Sp | |
6279 | Note that Alpha implementations without floating-point operations are | |
6280 | required to have floating-point registers. | |
4bc1997b JM |
6281 | .Ip "\fB\-mfp-reg\fR" 4 |
6282 | .IX Item "-mfp-reg" | |
6283 | .PD 0 | |
6284 | .Ip "\fB\-mno-fp-regs\fR" 4 | |
6285 | .IX Item "-mno-fp-regs" | |
6286 | .PD | |
861bb6c1 | 6287 | Generate code that uses (does not use) the floating-point register set. |
4bc1997b | 6288 | \&\fB\-mno-fp-regs\fR implies \fB\-msoft-float\fR. If the floating-point |
861bb6c1 JL |
6289 | register set is not used, floating point operands are passed in integer |
6290 | registers as if they were integers and floating-point results are passed | |
4bc1997b | 6291 | in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence, so any |
861bb6c1 | 6292 | function with a floating-point argument or return value called by code |
4bc1997b | 6293 | compiled with \fB\-mno-fp-regs\fR must also be compiled with that |
861bb6c1 JL |
6294 | option. |
6295 | .Sp | |
6296 | A typical use of this option is building a kernel that does not use, | |
6297 | and hence need not save and restore, any floating-point registers. | |
4bc1997b JM |
6298 | .Ip "\fB\-mieee\fR" 4 |
6299 | .IX Item "-mieee" | |
6300 | The Alpha architecture implements floating-point hardware optimized for | |
6301 | maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating | |
6302 | point standard. However, for full compliance, software assistance is | |
6303 | required. This option generates code fully \s-1IEEE\s0 compliant code | |
6304 | \&\fIexcept\fR that the \fIinexact flag\fR is not maintained (see below). | |
6305 | If this option is turned on, the \s-1CPP\s0 macro \f(CW\*(C`_IEEE_FP\*(C'\fR is defined | |
6306 | during compilation. The option is a shorthand for: \fB\-D_IEEE_FP | |
6307 | \&\-mfp-trap-mode=su \-mtrap-precision=i \-mieee-conformant\fR. The resulting | |
6308 | code is less efficient but is able to correctly support denormalized | |
6309 | numbers and exceptional \s-1IEEE\s0 values such as not-a-number and plus/minus | |
6310 | infinity. Other Alpha compilers call this option | |
6311 | \&\fB\-ieee_with_no_inexact\fR. | |
6312 | .Ip "\fB\-mieee-with-inexact\fR" 4 | |
6313 | .IX Item "-mieee-with-inexact" | |
6314 | This is like \fB\-mieee\fR except the generated code also maintains the | |
6315 | \&\s-1IEEE\s0 \fIinexact flag\fR. Turning on this option causes the generated | |
6316 | code to implement fully-compliant \s-1IEEE\s0 math. The option is a shorthand | |
6317 | for \fB\-D_IEEE_FP \-D_IEEE_FP_INEXACT\fR plus the three following: | |
6318 | \&\fB\-mieee-conformant\fR, | |
6319 | \&\fB\-mfp-trap-mode=sui\fR, | |
6320 | and \fB\-mtrap-precision=i\fR. | |
6321 | On some Alpha implementations the resulting code may execute | |
6322 | significantly slower than the code generated by default. Since there | |
6323 | is very little code that depends on the \fIinexact flag\fR, you should | |
6324 | normally not specify this option. Other Alpha compilers call this | |
6325 | option \fB\-ieee_with_inexact\fR. | |
6326 | .Ip "\fB\-mfp-trap-mode=\fR\fItrap mode\fR" 4 | |
6327 | .IX Item "-mfp-trap-mode=trap mode" | |
6328 | This option controls what floating-point related traps are enabled. | |
6329 | Other Alpha compilers call this option \fB\-fptm\fR \fItrap mode\fR. | |
6330 | The trap mode can be set to one of four values: | |
6331 | .RS 4 | |
6332 | .Ip "\fBn\fR" 4 | |
6333 | .IX Item "n" | |
6334 | This is the default (normal) setting. The only traps that are enabled | |
6335 | are the ones that cannot be disabled in software (e.g., division by zero | |
6336 | trap). | |
6337 | .Ip "\fBu\fR" 4 | |
6338 | .IX Item "u" | |
6339 | In addition to the traps enabled by \fBn\fR, underflow traps are enabled | |
6340 | as well. | |
6341 | .Ip "\fBsu\fR" 4 | |
6342 | .IX Item "su" | |
6343 | Like \fBsu\fR, but the instructions are marked to be safe for software | |
6344 | completion (see Alpha architecture manual for details). | |
6345 | .Ip "\fBsui\fR" 4 | |
6346 | .IX Item "sui" | |
6347 | Like \fBsu\fR, but inexact traps are enabled as well. | |
6348 | .RE | |
6349 | .RS 4 | |
6350 | .RE | |
6351 | .Ip "\fB\-mfp-rounding-mode=\fR\fIrounding mode\fR" 4 | |
6352 | .IX Item "-mfp-rounding-mode=rounding mode" | |
6353 | Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option | |
6354 | \&\fB\-fprm\fR \fIrounding mode\fR. The \fIrounding mode\fR can be one | |
6355 | of: | |
6356 | .RS 4 | |
6357 | .Ip "\fBn\fR" 4 | |
6358 | .IX Item "n" | |
6359 | Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards | |
6360 | the nearest machine number or towards the even machine number in case | |
6361 | of a tie. | |
6362 | .Ip "\fBm\fR" 4 | |
6363 | .IX Item "m" | |
6364 | Round towards minus infinity. | |
6365 | .Ip "\fBc\fR" 4 | |
6366 | .IX Item "c" | |
6367 | Chopped rounding mode. Floating point numbers are rounded towards zero. | |
6368 | .Ip "\fBd\fR" 4 | |
6369 | .IX Item "d" | |
6370 | Dynamic rounding mode. A field in the floating point control register | |
6371 | (\fIfpcr\fR, see Alpha architecture reference manual) controls the | |
6372 | rounding mode in effect. The C library initializes this register for | |
6373 | rounding towards plus infinity. Thus, unless your program modifies the | |
6374 | \&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity. | |
6375 | .RE | |
6376 | .RS 4 | |
6377 | .RE | |
6378 | .Ip "\fB\-mtrap-precision=\fR\fItrap precision\fR" 4 | |
6379 | .IX Item "-mtrap-precision=trap precision" | |
6380 | In the Alpha architecture, floating point traps are imprecise. This | |
6381 | means without software assistance it is impossible to recover from a | |
6382 | floating trap and program execution normally needs to be terminated. | |
6383 | \&\s-1GCC\s0 can generate code that can assist operating system trap handlers | |
6384 | in determining the exact location that caused a floating point trap. | |
6385 | Depending on the requirements of an application, different levels of | |
6386 | precisions can be selected: | |
6387 | .RS 4 | |
6388 | .Ip "\fBp\fR" 4 | |
6389 | .IX Item "p" | |
6390 | Program precision. This option is the default and means a trap handler | |
6391 | can only identify which program caused a floating point exception. | |
6392 | .Ip "\fBf\fR" 4 | |
6393 | .IX Item "f" | |
6394 | Function precision. The trap handler can determine the function that | |
6395 | caused a floating point exception. | |
6396 | .Ip "\fBi\fR" 4 | |
6397 | .IX Item "i" | |
6398 | Instruction precision. The trap handler can determine the exact | |
6399 | instruction that caused a floating point exception. | |
6400 | .RE | |
6401 | .RS 4 | |
6402 | .Sp | |
6403 | Other Alpha compilers provide the equivalent options called | |
6404 | \&\fB\-scope_safe\fR and \fB\-resumption_safe\fR. | |
6405 | .RE | |
6406 | .Ip "\fB\-mieee-conformant\fR" 4 | |
6407 | .IX Item "-mieee-conformant" | |
6408 | This option marks the generated code as \s-1IEEE\s0 conformant. You must not | |
6409 | use this option unless you also specify \fB\-mtrap-precision=i\fR and either | |
6410 | \&\fB\-mfp-trap-mode=su\fR or \fB\-mfp-trap-mode=sui\fR. Its only effect | |
6411 | is to emit the line \fB.eflag 48\fR in the function prologue of the | |
6412 | generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that | |
6413 | IEEE-conformant math library routines will be linked in. | |
6414 | .Ip "\fB\-mbuild-constants\fR" 4 | |
6415 | .IX Item "-mbuild-constants" | |
6416 | Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to | |
6417 | see if it can construct it from smaller constants in two or three | |
6418 | instructions. If it cannot, it will output the constant as a literal and | |
6419 | generate code to load it from the data segment at runtime. | |
6420 | .Sp | |
6421 | Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants | |
6422 | using code, even if it takes more instructions (the maximum is six). | |
6423 | .Sp | |
6424 | You would typically use this option to build a shared library dynamic | |
6425 | loader. Itself a shared library, it must relocate itself in memory | |
6426 | before it can find the variables and constants in its own data segment. | |
6427 | .Ip "\fB\-malpha-as\fR" 4 | |
6428 | .IX Item "-malpha-as" | |
6429 | .PD 0 | |
6430 | .Ip "\fB\-mgas\fR" 4 | |
6431 | .IX Item "-mgas" | |
6432 | .PD | |
6433 | Select whether to generate code to be assembled by the vendor-supplied | |
6434 | assembler (\fB\-malpha-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR. | |
6435 | .Ip "\fB\-mbwx\fR" 4 | |
6436 | .IX Item "-mbwx" | |
6437 | .PD 0 | |
6438 | .Ip "\fB\-mno-bwx\fR" 4 | |
6439 | .IX Item "-mno-bwx" | |
6440 | .Ip "\fB\-mcix\fR" 4 | |
6441 | .IX Item "-mcix" | |
6442 | .Ip "\fB\-mno-cix\fR" 4 | |
6443 | .IX Item "-mno-cix" | |
6444 | .Ip "\fB\-mmax\fR" 4 | |
6445 | .IX Item "-mmax" | |
6446 | .Ip "\fB\-mno-max\fR" 4 | |
6447 | .IX Item "-mno-max" | |
6448 | .PD | |
6449 | Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0, | |
6450 | \&\s-1CIX\s0, and \s-1MAX\s0 instruction sets. The default is to use the instruction sets | |
6451 | supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that | |
6452 | of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified. | |
6453 | .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 | |
6454 | .IX Item "-mcpu=cpu_type" | |
6455 | Set the instruction set, register set, and instruction scheduling | |
6456 | parameters for machine type \fIcpu_type\fR. You can specify either the | |
6457 | \&\fB\s-1EV\s0\fR style name or the corresponding chip number. \s-1GCC\s0 | |
6458 | supports scheduling parameters for the \s-1EV4\s0 and \s-1EV5\s0 family of processors | |
6459 | and will choose the default values for the instruction set from | |
6460 | the processor you specify. If you do not specify a processor type, | |
6461 | \&\s-1GCC\s0 will default to the processor on which the compiler was built. | |
6462 | .Sp | |
6463 | Supported values for \fIcpu_type\fR are | |
6464 | .RS 4 | |
6465 | .Ip "\fBev4\fR" 4 | |
6466 | .IX Item "ev4" | |
6467 | .PD 0 | |
6468 | .Ip "\fB21064\fR" 4 | |
6469 | .IX Item "21064" | |
6470 | .PD | |
6471 | Schedules as an \s-1EV4\s0 and has no instruction set extensions. | |
6472 | .Ip "\fBev5\fR" 4 | |
6473 | .IX Item "ev5" | |
6474 | .PD 0 | |
6475 | .Ip "\fB21164\fR" 4 | |
6476 | .IX Item "21164" | |
6477 | .PD | |
6478 | Schedules as an \s-1EV5\s0 and has no instruction set extensions. | |
6479 | .Ip "\fBev56\fR" 4 | |
6480 | .IX Item "ev56" | |
6481 | .PD 0 | |
6482 | .Ip "\fB21164a\fR" 4 | |
6483 | .IX Item "21164a" | |
6484 | .PD | |
6485 | Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension. | |
6486 | .Ip "\fBpca56\fR" 4 | |
6487 | .IX Item "pca56" | |
6488 | .PD 0 | |
6489 | .Ip "\fB21164pc\fR" 4 | |
6490 | .IX Item "21164pc" | |
6491 | .Ip "\fB21164PC\fR" 4 | |
6492 | .IX Item "21164PC" | |
6493 | .PD | |
6494 | Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions. | |
6495 | .Ip "\fBev6\fR" 4 | |
6496 | .IX Item "ev6" | |
6497 | .PD 0 | |
6498 | .Ip "\fB21264\fR" 4 | |
6499 | .IX Item "21264" | |
6500 | .PD | |
6501 | Schedules as an \s-1EV5\s0 (until Digital releases the scheduling parameters | |
6502 | for the \s-1EV6\s0) and supports the \s-1BWX\s0, \s-1CIX\s0, and \s-1MAX\s0 extensions. | |
6503 | .RE | |
6504 | .RS 4 | |
6505 | .RE | |
6506 | .Ip "\fB\-mmemory-latency=\fR\fItime\fR" 4 | |
6507 | .IX Item "-mmemory-latency=time" | |
6508 | Sets the latency the scheduler should assume for typical memory | |
6509 | references as seen by the application. This number is highly | |
6510 | dependent on the memory access patterns used by the application | |
6511 | and the size of the external cache on the machine. | |
6512 | .Sp | |
6513 | Valid options for \fItime\fR are | |
6514 | .RS 4 | |
6515 | .Ip "\fInumber\fR" 4 | |
6516 | .IX Item "number" | |
6517 | A decimal number representing clock cycles. | |
6518 | .Ip "\fBL1\fR" 4 | |
6519 | .IX Item "L1" | |
6520 | .PD 0 | |
6521 | .Ip "\fBL2\fR" 4 | |
6522 | .IX Item "L2" | |
6523 | .Ip "\fBL3\fR" 4 | |
6524 | .IX Item "L3" | |
6525 | .Ip "\fBmain\fR" 4 | |
6526 | .IX Item "main" | |
6527 | .PD | |
6528 | The compiler contains estimates of the number of clock cycles for | |
6529 | ``typical'' \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches | |
6530 | (also called Dcache, Scache, and Bcache), as well as to main memory. | |
6531 | Note that L3 is only valid for \s-1EV5\s0. | |
6532 | .RE | |
6533 | .RS 4 | |
6534 | .RE | |
6535 | .PP | |
6536 | .I "Clipper Options" | |
6537 | .IX Subsection "Clipper Options" | |
6538 | .PP | |
6539 | These \fB\-m\fR options are defined for the Clipper implementations: | |
6540 | .Ip "\fB\-mc300\fR" 4 | |
6541 | .IX Item "-mc300" | |
6542 | Produce code for a C300 Clipper processor. This is the default. | |
6543 | .Ip "\fB\-mc400\fR" 4 | |
6544 | .IX Item "-mc400" | |
6545 | Produce code for a C400 Clipper processor i.e. use floating point | |
6546 | registers f8..f15. | |
6547 | .PP | |
6548 | .I "H8/300 Options" | |
6549 | .IX Subsection "H8/300 Options" | |
6550 | .PP | |
6551 | These \fB\-m\fR options are defined for the H8/300 implementations: | |
6552 | .Ip "\fB\-mrelax\fR" 4 | |
6553 | .IX Item "-mrelax" | |
6554 | Shorten some address references at link time, when possible; uses the | |
6555 | linker option \fB\-relax\fR. | |
6556 | .Ip "\fB\-mh\fR" 4 | |
6557 | .IX Item "-mh" | |
6558 | Generate code for the H8/300H. | |
6559 | .Ip "\fB\-ms\fR" 4 | |
6560 | .IX Item "-ms" | |
6561 | Generate code for the H8/S. | |
6562 | .Ip "\fB\-ms2600\fR" 4 | |
6563 | .IX Item "-ms2600" | |
6564 | Generate code for the H8/S2600. This switch must be used with \-ms. | |
6565 | .Ip "\fB\-mint32\fR" 4 | |
6566 | .IX Item "-mint32" | |
6567 | Make \f(CW\*(C`int\*(C'\fR data 32 bits by default. | |
6568 | .Ip "\fB\-malign-300\fR" 4 | |
6569 | .IX Item "-malign-300" | |
6570 | On the H8/300H and H8/S, use the same alignment rules as for the H8/300. | |
6571 | The default for the H8/300H and H8/S is to align longs and floats on 4 | |
6572 | byte boundaries. | |
6573 | \&\fB\-malign-300\fR causes them to be aligned on 2 byte boundaries. | |
6574 | This option has no effect on the H8/300. | |
6575 | .PP | |
6576 | .I "\s-1SH\s0 Options" | |
6577 | .IX Subsection "SH Options" | |
6578 | .PP | |
6579 | These \fB\-m\fR options are defined for the \s-1SH\s0 implementations: | |
6580 | .Ip "\fB\-m1\fR" 4 | |
6581 | .IX Item "-m1" | |
6582 | Generate code for the \s-1SH1\s0. | |
6583 | .Ip "\fB\-m2\fR" 4 | |
6584 | .IX Item "-m2" | |
6585 | Generate code for the \s-1SH2\s0. | |
6586 | .Ip "\fB\-m3\fR" 4 | |
6587 | .IX Item "-m3" | |
6588 | Generate code for the \s-1SH3\s0. | |
6589 | .Ip "\fB\-m3e\fR" 4 | |
6590 | .IX Item "-m3e" | |
6591 | Generate code for the SH3e. | |
6592 | .Ip "\fB\-m4\-nofpu\fR" 4 | |
6593 | .IX Item "-m4-nofpu" | |
6594 | Generate code for the \s-1SH4\s0 without a floating-point unit. | |
6595 | .Ip "\fB\-m4\-single-only\fR" 4 | |
6596 | .IX Item "-m4-single-only" | |
6597 | Generate code for the \s-1SH4\s0 with a floating-point unit that only | |
6598 | supports single-precision arithmentic. | |
6599 | .Ip "\fB\-m4\-single\fR" 4 | |
6600 | .IX Item "-m4-single" | |
6601 | Generate code for the \s-1SH4\s0 assuming the floating-point unit is in | |
6602 | single-precision mode by default. | |
6603 | .Ip "\fB\-m4\fR" 4 | |
6604 | .IX Item "-m4" | |
6605 | Generate code for the \s-1SH4\s0. | |
6606 | .Ip "\fB\-mb\fR" 4 | |
6607 | .IX Item "-mb" | |
6608 | Compile code for the processor in big endian mode. | |
6609 | .Ip "\fB\-ml\fR" 4 | |
6610 | .IX Item "-ml" | |
6611 | Compile code for the processor in little endian mode. | |
6612 | .Ip "\fB\-mdalign\fR" 4 | |
6613 | .IX Item "-mdalign" | |
6614 | Align doubles at 64 bit boundaries. Note that this changes the calling | |
6615 | conventions, and thus some functions from the standard C library will | |
6616 | not work unless you recompile it first with \-mdalign. | |
6617 | .Ip "\fB\-mrelax\fR" 4 | |
6618 | .IX Item "-mrelax" | |
6619 | Shorten some address references at link time, when possible; uses the | |
6620 | linker option \fB\-relax\fR. | |
6621 | .Ip "\fB\-mbigtable\fR" 4 | |
6622 | .IX Item "-mbigtable" | |
6623 | Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use | |
6624 | 16\-bit offsets. | |
6625 | .Ip "\fB\-mfmovd\fR" 4 | |
6626 | .IX Item "-mfmovd" | |
6627 | Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR. | |
6628 | .Ip "\fB\-mhitachi\fR" 4 | |
6629 | .IX Item "-mhitachi" | |
6630 | Comply with the calling conventions defined by Hitachi. | |
6631 | .Ip "\fB\-mnomacsave\fR" 4 | |
6632 | .IX Item "-mnomacsave" | |
6633 | Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if | |
6634 | \&\fB\-mhitachi\fR is given. | |
6635 | .Ip "\fB\-misize\fR" 4 | |
6636 | .IX Item "-misize" | |
6637 | Dump instruction size and location in the assembly code. | |
6638 | .Ip "\fB\-mpadstruct\fR" 4 | |
6639 | .IX Item "-mpadstruct" | |
6640 | This option is deprecated. It pads structures to multiple of 4 bytes, | |
6641 | which is incompatible with the \s-1SH\s0 \s-1ABI\s0. | |
6642 | .Ip "\fB\-mspace\fR" 4 | |
6643 | .IX Item "-mspace" | |
6644 | Optimize for space instead of speed. Implied by \fB\-Os\fR. | |
6645 | .Ip "\fB\-mprefergot\fR" 4 | |
6646 | .IX Item "-mprefergot" | |
6647 | When generating position-independent code, emit function calls using | |
6648 | the Global Offset Table instead of the Procedure Linkage Table. | |
6649 | .Ip "\fB\-musermode\fR" 4 | |
6650 | .IX Item "-musermode" | |
6651 | Generate a library function call to invalidate instruction cache | |
6652 | entries, after fixing up a trampoline. This library function call | |
6653 | doesn't assume it can write to the whole memory address space. This | |
6654 | is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR. | |
6655 | .PP | |
6656 | .I "Options for System V" | |
6657 | .IX Subsection "Options for System V" | |
861bb6c1 JL |
6658 | .PP |
6659 | These additional options are available on System V Release 4 for | |
6660 | compatibility with other compilers on those systems: | |
4bc1997b JM |
6661 | .Ip "\fB\-G\fR" 4 |
6662 | .IX Item "-G" | |
6663 | Create a shared object. | |
6664 | It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead. | |
6665 | .Ip "\fB\-Qy\fR" 4 | |
6666 | .IX Item "-Qy" | |
861bb6c1 | 6667 | Identify the versions of each tool used by the compiler, in a |
4bc1997b JM |
6668 | \&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output. |
6669 | .Ip "\fB\-Qn\fR" 4 | |
6670 | .IX Item "-Qn" | |
6671 | Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is | |
861bb6c1 | 6672 | the default). |
4bc1997b JM |
6673 | .Ip "\fB\-YP,\fR\fIdirs\fR" 4 |
6674 | .IX Item "-YP,dirs" | |
6675 | Search the directories \fIdirs\fR, and no others, for libraries | |
6676 | specified with \fB\-l\fR. | |
6677 | .Ip "\fB\-Ym,\fR\fIdir\fR" 4 | |
6678 | .IX Item "-Ym,dir" | |
6679 | Look in the directory \fIdir\fR to find the M4 preprocessor. | |
861bb6c1 | 6680 | The assembler uses this option. |
4bc1997b JM |
6681 | .PP |
6682 | .I "TMS320C3x/C4x Options" | |
6683 | .IX Subsection "TMS320C3x/C4x Options" | |
6684 | .PP | |
6685 | These \fB\-m\fR options are defined for TMS320C3x/C4x implementations: | |
6686 | .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 | |
6687 | .IX Item "-mcpu=cpu_type" | |
6688 | Set the instruction set, register set, and instruction scheduling | |
6689 | parameters for machine type \fIcpu_type\fR. Supported values for | |
6690 | \&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and | |
6691 | \&\fBc44\fR. The default is \fBc40\fR to generate code for the | |
6692 | \&\s-1TMS320C40\s0. | |
6693 | .Ip "\fB\-mbig-memory\fR" 4 | |
6694 | .IX Item "-mbig-memory" | |
6695 | .PD 0 | |
6696 | .Ip "\fB\-mbig\fR" 4 | |
6697 | .IX Item "-mbig" | |
6698 | .Ip "\fB\-msmall-memory\fR" 4 | |
6699 | .IX Item "-msmall-memory" | |
6700 | .Ip "\fB\-msmall\fR" 4 | |
6701 | .IX Item "-msmall" | |
6702 | .PD | |
6703 | Generates code for the big or small memory model. The small memory | |
6704 | model assumed that all data fits into one 64K word page. At run-time | |
6705 | the data page (\s-1DP\s0) register must be set to point to the 64K page | |
6706 | containing the .bss and .data program sections. The big memory model is | |
6707 | the default and requires reloading of the \s-1DP\s0 register for every direct | |
6708 | memory access. | |
6709 | .Ip "\fB\-mbk\fR" 4 | |
6710 | .IX Item "-mbk" | |
6711 | .PD 0 | |
6712 | .Ip "\fB\-mno-bk\fR" 4 | |
6713 | .IX Item "-mno-bk" | |
6714 | .PD | |
6715 | Allow (disallow) allocation of general integer operands into the block | |
6716 | count register \s-1BK\s0. | |
6717 | .Ip "\fB\-mdb\fR" 4 | |
6718 | .IX Item "-mdb" | |
6719 | .PD 0 | |
6720 | .Ip "\fB\-mno-db\fR" 4 | |
6721 | .IX Item "-mno-db" | |
6722 | .PD | |
6723 | Enable (disable) generation of code using decrement and branch, | |
6724 | \&\fIDBcond\fR\|(D), instructions. This is enabled by default for the C4x. To be | |
6725 | on the safe side, this is disabled for the C3x, since the maximum | |
6726 | iteration count on the C3x is 2^23 + 1 (but who iterates loops more than | |
6727 | 2^23 times on the C3x?). Note that \s-1GCC\s0 will try to reverse a loop so | |
6728 | that it can utilise the decrement and branch instruction, but will give | |
6729 | up if there is more than one memory reference in the loop. Thus a loop | |
6730 | where the loop counter is decremented can generate slightly more | |
6731 | efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilised. | |
6732 | .Ip "\fB\-mdp-isr-reload\fR" 4 | |
6733 | .IX Item "-mdp-isr-reload" | |
6734 | .PD 0 | |
6735 | .Ip "\fB\-mparanoid\fR" 4 | |
6736 | .IX Item "-mparanoid" | |
6737 | .PD | |
6738 | Force the \s-1DP\s0 register to be saved on entry to an interrupt service | |
6739 | routine (\s-1ISR\s0), reloaded to point to the data section, and restored on | |
6740 | exit from the \s-1ISR\s0. This should not be required unless someone has | |
6741 | violated the small memory model by modifying the \s-1DP\s0 register, say within | |
6742 | an object library. | |
6743 | .Ip "\fB\-mmpyi\fR" 4 | |
6744 | .IX Item "-mmpyi" | |
6745 | .PD 0 | |
6746 | .Ip "\fB\-mno-mpyi\fR" 4 | |
6747 | .IX Item "-mno-mpyi" | |
6748 | .PD | |
6749 | For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies | |
6750 | instead of a library call to guarantee 32\-bit results. Note that if one | |
6751 | of the operands is a constant, then the multiplication will be performed | |
6752 | using shifts and adds. If the \-mmpyi option is not specified for the C3x, | |
6753 | then squaring operations are performed inline instead of a library call. | |
6754 | .Ip "\fB\-mfast-fix\fR" 4 | |
6755 | .IX Item "-mfast-fix" | |
6756 | .PD 0 | |
6757 | .Ip "\fB\-mno-fast-fix\fR" 4 | |
6758 | .IX Item "-mno-fast-fix" | |
6759 | .PD | |
6760 | The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an | |
6761 | integer value chooses the nearest integer less than or equal to the | |
6762 | floating point value rather than to the nearest integer. Thus if the | |
6763 | floating point number is negative, the result will be incorrectly | |
6764 | truncated an additional code is necessary to detect and correct this | |
6765 | case. This option can be used to disable generation of the additional | |
6766 | code required to correct the result. | |
6767 | .Ip "\fB\-mrptb\fR" 4 | |
6768 | .IX Item "-mrptb" | |
6769 | .PD 0 | |
6770 | .Ip "\fB\-mno-rptb\fR" 4 | |
6771 | .IX Item "-mno-rptb" | |
6772 | .PD | |
6773 | Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0 | |
6774 | instruction for zero overhead looping. The \s-1RPTB\s0 construct is only used | |
6775 | for innermost loops that do not call functions or jump across the loop | |
6776 | boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the | |
6777 | overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers. | |
6778 | This is enabled by default with \-O2. | |
6779 | .Ip "\fB\-mrpts=\fR\fIcount\fR" 4 | |
6780 | .IX Item "-mrpts=count" | |
6781 | .PD 0 | |
6782 | .Ip "\fB\-mno-rpts\fR" 4 | |
6783 | .IX Item "-mno-rpts" | |
6784 | .PD | |
6785 | Enable (disable) the use of the single instruction repeat instruction | |
6786 | \&\s-1RPTS\s0. If a repeat block contains a single instruction, and the loop | |
6787 | count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will | |
6788 | emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0. If no value is specified, | |
6789 | then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined | |
6790 | at compile time. Note that the repeated instruction following \s-1RPTS\s0 does | |
6791 | not have to be reloaded from memory each iteration, thus freeing up the | |
6792 | \&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this | |
6793 | instruction, it is disabled by default. | |
6794 | .Ip "\fB\-mloop-unsigned\fR" 4 | |
6795 | .IX Item "-mloop-unsigned" | |
6796 | .PD 0 | |
6797 | .Ip "\fB\-mno-loop-unsigned\fR" 4 | |
6798 | .IX Item "-mno-loop-unsigned" | |
6799 | .PD | |
6800 | The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40) | |
6801 | is 2^31 + 1 since these instructions test if the iteration count is | |
6802 | negative to terminate the loop. If the iteration count is unsigned | |
6803 | there is a possibility than the 2^31 + 1 maximum iteration count may be | |
6804 | exceeded. This switch allows an unsigned iteration count. | |
6805 | .Ip "\fB\-mti\fR" 4 | |
6806 | .IX Item "-mti" | |
6807 | Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy | |
6808 | with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0 | |
6809 | C3x C compiler. For example, long doubles are passed as structures | |
6810 | rather than in floating point registers. | |
6811 | .Ip "\fB\-mregparm\fR" 4 | |
6812 | .IX Item "-mregparm" | |
6813 | .PD 0 | |
6814 | .Ip "\fB\-mmemparm\fR" 4 | |
6815 | .IX Item "-mmemparm" | |
6816 | .PD | |
6817 | Generate code that uses registers (stack) for passing arguments to functions. | |
6818 | By default, arguments are passed in registers where possible rather | |
6819 | than by pushing arguments on to the stack. | |
6820 | .Ip "\fB\-mparallel-insns\fR" 4 | |
6821 | .IX Item "-mparallel-insns" | |
6822 | .PD 0 | |
6823 | .Ip "\fB\-mno-parallel-insns\fR" 4 | |
6824 | .IX Item "-mno-parallel-insns" | |
6825 | .PD | |
6826 | Allow the generation of parallel instructions. This is enabled by | |
6827 | default with \-O2. | |
6828 | .Ip "\fB\-mparallel-mpy\fR" 4 | |
6829 | .IX Item "-mparallel-mpy" | |
6830 | .PD 0 | |
6831 | .Ip "\fB\-mno-parallel-mpy\fR" 4 | |
6832 | .IX Item "-mno-parallel-mpy" | |
6833 | .PD | |
6834 | Allow the generation of MPY||ADD and MPY||SUB parallel instructions, | |
6835 | provided \-mparallel-insns is also specified. These instructions have | |
6836 | tight register constraints which can pessimize the code generation | |
6837 | of large functions. | |
6838 | .PP | |
6839 | .I "V850 Options" | |
6840 | .IX Subsection "V850 Options" | |
6841 | .PP | |
6842 | These \fB\-m\fR options are defined for V850 implementations: | |
6843 | .Ip "\fB\-mlong-calls\fR" 4 | |
6844 | .IX Item "-mlong-calls" | |
6845 | .PD 0 | |
6846 | .Ip "\fB\-mno-long-calls\fR" 4 | |
6847 | .IX Item "-mno-long-calls" | |
6848 | .PD | |
6849 | Treat all calls as being far away (near). If calls are assumed to be | |
6850 | far away, the compiler will always load the functions address up into a | |
6851 | register, and call indirect through the pointer. | |
6852 | .Ip "\fB\-mno-ep\fR" 4 | |
6853 | .IX Item "-mno-ep" | |
6854 | .PD 0 | |
6855 | .Ip "\fB\-mep\fR" 4 | |
6856 | .IX Item "-mep" | |
6857 | .PD | |
6858 | Do not optimize (do optimize) basic blocks that use the same index | |
6859 | pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and | |
6860 | use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR | |
6861 | option is on by default if you optimize. | |
6862 | .Ip "\fB\-mno-prolog-function\fR" 4 | |
6863 | .IX Item "-mno-prolog-function" | |
6864 | .PD 0 | |
6865 | .Ip "\fB\-mprolog-function\fR" 4 | |
6866 | .IX Item "-mprolog-function" | |
6867 | .PD | |
6868 | Do not use (do use) external functions to save and restore registers at | |
6869 | the prolog and epilog of a function. The external functions are slower, | |
6870 | but use less code space if more than one function saves the same number | |
6871 | of registers. The \fB\-mprolog-function\fR option is on by default if | |
6872 | you optimize. | |
6873 | .Ip "\fB\-mspace\fR" 4 | |
6874 | .IX Item "-mspace" | |
6875 | Try to make the code as small as possible. At present, this just turns | |
6876 | on the \fB\-mep\fR and \fB\-mprolog-function\fR options. | |
6877 | .Ip "\fB\-mtda=\fR\fIn\fR" 4 | |
6878 | .IX Item "-mtda=n" | |
6879 | Put static or global variables whose size is \fIn\fR bytes or less into | |
6880 | the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data | |
6881 | area can hold up to 256 bytes in total (128 bytes for byte references). | |
6882 | .Ip "\fB\-msda=\fR\fIn\fR" 4 | |
6883 | .IX Item "-msda=n" | |
6884 | Put static or global variables whose size is \fIn\fR bytes or less into | |
6885 | the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data | |
6886 | area can hold up to 64 kilobytes. | |
6887 | .Ip "\fB\-mzda=\fR\fIn\fR" 4 | |
6888 | .IX Item "-mzda=n" | |
6889 | Put static or global variables whose size is \fIn\fR bytes or less into | |
6890 | the first 32 kilobytes of memory. | |
6891 | .Ip "\fB\-mv850\fR" 4 | |
6892 | .IX Item "-mv850" | |
6893 | Specify that the target processor is the V850. | |
6894 | .Ip "\fB\-mbig-switch\fR" 4 | |
6895 | .IX Item "-mbig-switch" | |
6896 | Generate code suitable for big switch tables. Use this option only if | |
6897 | the assembler/linker complain about out of range branches within a switch | |
6898 | table. | |
6899 | .PP | |
6900 | .I "\s-1ARC\s0 Options" | |
6901 | .IX Subsection "ARC Options" | |
6902 | .PP | |
6903 | These options are defined for \s-1ARC\s0 implementations: | |
6904 | .Ip "\fB\-EL\fR" 4 | |
6905 | .IX Item "-EL" | |
6906 | Compile code for little endian mode. This is the default. | |
6907 | .Ip "\fB\-EB\fR" 4 | |
6908 | .IX Item "-EB" | |
6909 | Compile code for big endian mode. | |
6910 | .Ip "\fB\-mmangle-cpu\fR" 4 | |
6911 | .IX Item "-mmangle-cpu" | |
6912 | Prepend the name of the cpu to all public symbol names. | |
6913 | In multiple-processor systems, there are many \s-1ARC\s0 variants with different | |
6914 | instruction and register set characteristics. This flag prevents code | |
6915 | compiled for one cpu to be linked with code compiled for another. | |
6916 | No facility exists for handling variants that are \*(L"almost identical\*(R". | |
6917 | This is an all or nothing option. | |
6918 | .Ip "\fB\-mcpu=\fR\fIcpu\fR" 4 | |
6919 | .IX Item "-mcpu=cpu" | |
6920 | Compile code for \s-1ARC\s0 variant \fIcpu\fR. | |
6921 | Which variants are supported depend on the configuration. | |
6922 | All variants support \fB\-mcpu=base\fR, this is the default. | |
6923 | .Ip "\fB\-mtext=\fR\fItext section\fR" 4 | |
6924 | .IX Item "-mtext=text section" | |
6925 | .PD 0 | |
6926 | .Ip "\fB\-mdata=\fR\fIdata section\fR" 4 | |
6927 | .IX Item "-mdata=data section" | |
6928 | .Ip "\fB\-mrodata=\fR\fIreadonly data section\fR" 4 | |
6929 | .IX Item "-mrodata=readonly data section" | |
6930 | .PD | |
6931 | Put functions, data, and readonly data in \fItext section\fR, | |
6932 | \&\fIdata section\fR, and \fIreadonly data section\fR respectively | |
6933 | by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute. | |
6934 | .PP | |
6935 | .I "\s-1NS32K\s0 Options" | |
6936 | .IX Subsection "NS32K Options" | |
6937 | .PP | |
6938 | These are the \fB\-m\fR options defined for the 32000 series. The default | |
6939 | values for these options depends on which style of 32000 was selected when | |
6940 | the compiler was configured; the defaults for the most common choices are | |
6941 | given below. | |
6942 | .Ip "\fB\-m32032\fR" 4 | |
6943 | .IX Item "-m32032" | |
6944 | .PD 0 | |
6945 | .Ip "\fB\-m32032\fR" 4 | |
6946 | .IX Item "-m32032" | |
6947 | .PD | |
6948 | Generate output for a 32032. This is the default | |
6949 | when the compiler is configured for 32032 and 32016 based systems. | |
6950 | .Ip "\fB\-m32332\fR" 4 | |
6951 | .IX Item "-m32332" | |
6952 | .PD 0 | |
6953 | .Ip "\fB\-m32332\fR" 4 | |
6954 | .IX Item "-m32332" | |
6955 | .PD | |
6956 | Generate output for a 32332. This is the default | |
6957 | when the compiler is configured for 32332\-based systems. | |
6958 | .Ip "\fB\-m32532\fR" 4 | |
6959 | .IX Item "-m32532" | |
6960 | .PD 0 | |
6961 | .Ip "\fB\-m32532\fR" 4 | |
6962 | .IX Item "-m32532" | |
6963 | .PD | |
6964 | Generate output for a 32532. This is the default | |
6965 | when the compiler is configured for 32532\-based systems. | |
6966 | .Ip "\fB\-m32081\fR" 4 | |
6967 | .IX Item "-m32081" | |
6968 | Generate output containing 32081 instructions for floating point. | |
6969 | This is the default for all systems. | |
6970 | .Ip "\fB\-m32381\fR" 4 | |
6971 | .IX Item "-m32381" | |
6972 | Generate output containing 32381 instructions for floating point. This | |
6973 | also implies \fB\-m32081\fR. The 32381 is only compatible with the 32332 | |
6974 | and 32532 cpus. This is the default for the pc532\-netbsd configuration. | |
6975 | .Ip "\fB\-mmulti-add\fR" 4 | |
6976 | .IX Item "-mmulti-add" | |
6977 | Try and generate multiply-add floating point instructions \f(CW\*(C`polyF\*(C'\fR | |
6978 | and \f(CW\*(C`dotF\*(C'\fR. This option is only available if the \fB\-m32381\fR | |
6979 | option is in effect. Using these instructions requires changes to to | |
6980 | register allocation which generally has a negative impact on | |
6981 | performance. This option should only be enabled when compiling code | |
6982 | particularly likely to make heavy use of multiply-add instructions. | |
6983 | .Ip "\fB\-mnomulti-add\fR" 4 | |
6984 | .IX Item "-mnomulti-add" | |
6985 | Do not try and generate multiply-add floating point instructions | |
6986 | \&\f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This is the default on all platforms. | |
6987 | .Ip "\fB\-msoft-float\fR" 4 | |
6988 | .IX Item "-msoft-float" | |
6989 | Generate output containing library calls for floating point. | |
6990 | \&\fBWarning:\fR the requisite libraries may not be available. | |
6991 | .Ip "\fB\-mnobitfield\fR" 4 | |
6992 | .IX Item "-mnobitfield" | |
6993 | Do not use the bit-field instructions. On some machines it is faster to | |
6994 | use shifting and masking operations. This is the default for the pc532. | |
6995 | .Ip "\fB\-mbitfield\fR" 4 | |
6996 | .IX Item "-mbitfield" | |
6997 | Do use the bit-field instructions. This is the default for all platforms | |
6998 | except the pc532. | |
6999 | .Ip "\fB\-mrtd\fR" 4 | |
7000 | .IX Item "-mrtd" | |
7001 | Use a different function-calling convention, in which functions | |
7002 | that take a fixed number of arguments return pop their | |
7003 | arguments on return with the \f(CW\*(C`ret\*(C'\fR instruction. | |
7004 | .Sp | |
7005 | This calling convention is incompatible with the one normally | |
7006 | used on Unix, so you cannot use it if you need to call libraries | |
7007 | compiled with the Unix compiler. | |
7008 | .Sp | |
7009 | Also, you must provide function prototypes for all functions that | |
7010 | take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); | |
7011 | otherwise incorrect code will be generated for calls to those | |
7012 | functions. | |
7013 | .Sp | |
7014 | In addition, seriously incorrect code will result if you call a | |
7015 | function with too many arguments. (Normally, extra arguments are | |
7016 | harmlessly ignored.) | |
7017 | .Sp | |
7018 | This option takes its name from the 680x0 \f(CW\*(C`rtd\*(C'\fR instruction. | |
7019 | .Ip "\fB\-mregparam\fR" 4 | |
7020 | .IX Item "-mregparam" | |
7021 | Use a different function-calling convention where the first two arguments | |
7022 | are passed in registers. | |
7023 | .Sp | |
7024 | This calling convention is incompatible with the one normally | |
7025 | used on Unix, so you cannot use it if you need to call libraries | |
7026 | compiled with the Unix compiler. | |
7027 | .Ip "\fB\-mnoregparam\fR" 4 | |
7028 | .IX Item "-mnoregparam" | |
7029 | Do not pass any arguments in registers. This is the default for all | |
7030 | targets. | |
7031 | .Ip "\fB\-msb\fR" 4 | |
7032 | .IX Item "-msb" | |
7033 | It is \s-1OK\s0 to use the sb as an index register which is always loaded with | |
7034 | zero. This is the default for the pc532\-netbsd target. | |
7035 | .Ip "\fB\-mnosb\fR" 4 | |
7036 | .IX Item "-mnosb" | |
7037 | The sb register is not available for use or has not been initialized to | |
7038 | zero by the run time system. This is the default for all targets except | |
7039 | the pc532\-netbsd. It is also implied whenever \fB\-mhimem\fR or | |
7040 | \&\fB\-fpic\fR is set. | |
7041 | .Ip "\fB\-mhimem\fR" 4 | |
7042 | .IX Item "-mhimem" | |
7043 | Many ns32000 series addressing modes use displacements of up to 512MB. | |
7044 | If an address is above 512MB then displacements from zero can not be used. | |
7045 | This option causes code to be generated which can be loaded above 512MB. | |
7046 | This may be useful for operating systems or \s-1ROM\s0 code. | |
7047 | .Ip "\fB\-mnohimem\fR" 4 | |
7048 | .IX Item "-mnohimem" | |
7049 | Assume code will be loaded in the first 512MB of virtual address space. | |
7050 | This is the default for all platforms. | |
7051 | .PP | |
7052 | .I "\s-1AVR\s0 Options" | |
7053 | .IX Subsection "AVR Options" | |
7054 | .PP | |
7055 | These options are defined for \s-1AVR\s0 implementations: | |
7056 | .Ip "\fB\-mmcu=\fR\fImcu\fR" 4 | |
7057 | .IX Item "-mmcu=mcu" | |
7058 | Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type. | |
7059 | .Sp | |
7060 | Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C | |
7061 | compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10, | |
7062 | attiny11, attiny12, attiny15, attiny28). | |
7063 | .Sp | |
7064 | Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to | |
7065 | 8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22, | |
7066 | at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515, | |
7067 | at90c8534, at90s8535). | |
7068 | .Sp | |
7069 | Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program | |
7070 | memory space (\s-1MCU\s0 types: atmega103, atmega603). | |
7071 | .Sp | |
7072 | Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program | |
7073 | memory space (\s-1MCU\s0 types: atmega83, atmega85). | |
7074 | .Sp | |
7075 | Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program | |
7076 | memory space (\s-1MCU\s0 types: atmega161, atmega163, atmega32, at94k). | |
7077 | .Ip "\fB\-msize\fR" 4 | |
7078 | .IX Item "-msize" | |
7079 | Output instruction sizes to the asm file. | |
7080 | .Ip "\fB\-minit-stack=\fR\fIN\fR" 4 | |
7081 | .IX Item "-minit-stack=N" | |
7082 | Specify the initial stack address, which may be a symbol or numeric value, | |
7083 | _\|_stack is the default. | |
7084 | .Ip "\fB\-mno-interrupts\fR" 4 | |
7085 | .IX Item "-mno-interrupts" | |
7086 | Generated code is not compatible with hardware interrupts. | |
7087 | Code size will be smaller. | |
7088 | .Ip "\fB\-mcall-prologues\fR" 4 | |
7089 | .IX Item "-mcall-prologues" | |
7090 | Functions prologues/epilogues expanded as call to appropriate | |
7091 | subroutines. Code size will be smaller. | |
7092 | .Ip "\fB\-mno-tablejump\fR" 4 | |
7093 | .IX Item "-mno-tablejump" | |
7094 | Do not generate tablejump insns which sometimes increase code size. | |
7095 | .Ip "\fB\-mtiny-stack\fR" 4 | |
7096 | .IX Item "-mtiny-stack" | |
7097 | Change only the low 8 bits of the stack pointer. | |
7098 | .PP | |
7099 | .I "MCore Options" | |
7100 | .IX Subsection "MCore Options" | |
7101 | .PP | |
7102 | These are the \fB\-m\fR options defined for the Motorola M*Core | |
7103 | processors. | |
7104 | .Ip "\fB\-mhardlit\fR" 4 | |
7105 | .IX Item "-mhardlit" | |
7106 | .PD 0 | |
7107 | .Ip "\fB\-mhardlit\fR" 4 | |
7108 | .IX Item "-mhardlit" | |
7109 | .Ip "\fB\-mno-hardlit\fR" 4 | |
7110 | .IX Item "-mno-hardlit" | |
7111 | .PD | |
7112 | Inline constants into the code stream if it can be done in two | |
7113 | instructions or less. | |
7114 | .Ip "\fB\-mdiv\fR" 4 | |
7115 | .IX Item "-mdiv" | |
7116 | .PD 0 | |
7117 | .Ip "\fB\-mdiv\fR" 4 | |
7118 | .IX Item "-mdiv" | |
7119 | .Ip "\fB\-mno-div\fR" 4 | |
7120 | .IX Item "-mno-div" | |
7121 | .PD | |
7122 | Use the divide instruction. (Enabled by default). | |
7123 | .Ip "\fB\-mrelax-immediate\fR" 4 | |
7124 | .IX Item "-mrelax-immediate" | |
7125 | .PD 0 | |
7126 | .Ip "\fB\-mrelax-immediate\fR" 4 | |
7127 | .IX Item "-mrelax-immediate" | |
7128 | .Ip "\fB\-mno-relax-immediate\fR" 4 | |
7129 | .IX Item "-mno-relax-immediate" | |
7130 | .PD | |
7131 | Allow arbitrary sized immediates in bit operations. | |
7132 | .Ip "\fB\-mwide-bitfields\fR" 4 | |
7133 | .IX Item "-mwide-bitfields" | |
7134 | .PD 0 | |
7135 | .Ip "\fB\-mwide-bitfields\fR" 4 | |
7136 | .IX Item "-mwide-bitfields" | |
7137 | .Ip "\fB\-mno-wide-bitfields\fR" 4 | |
7138 | .IX Item "-mno-wide-bitfields" | |
7139 | .PD | |
7140 | Always treat bitfields as int-sized. | |
7141 | .Ip "\fB\-m4byte-functions\fR" 4 | |
7142 | .IX Item "-m4byte-functions" | |
7143 | .PD 0 | |
7144 | .Ip "\fB\-m4byte-functions\fR" 4 | |
7145 | .IX Item "-m4byte-functions" | |
7146 | .Ip "\fB\-mno-4byte-functions\fR" 4 | |
7147 | .IX Item "-mno-4byte-functions" | |
7148 | .PD | |
7149 | Force all functions to be aligned to a four byte boundary. | |
7150 | .Ip "\fB\-mcallgraph-data\fR" 4 | |
7151 | .IX Item "-mcallgraph-data" | |
7152 | .PD 0 | |
7153 | .Ip "\fB\-mcallgraph-data\fR" 4 | |
7154 | .IX Item "-mcallgraph-data" | |
7155 | .Ip "\fB\-mno-callgraph-data\fR" 4 | |
7156 | .IX Item "-mno-callgraph-data" | |
7157 | .PD | |
7158 | Emit callgraph information. | |
7159 | .Ip "\fB\-mslow-bytes\fR" 4 | |
7160 | .IX Item "-mslow-bytes" | |
7161 | .PD 0 | |
7162 | .Ip "\fB\-mslow-bytes\fR" 4 | |
7163 | .IX Item "-mslow-bytes" | |
7164 | .Ip "\fB\-mno-slow-bytes\fR" 4 | |
7165 | .IX Item "-mno-slow-bytes" | |
7166 | .PD | |
7167 | Prefer word access when reading byte quantities. | |
7168 | .Ip "\fB\-mlittle-endian\fR" 4 | |
7169 | .IX Item "-mlittle-endian" | |
7170 | .PD 0 | |
7171 | .Ip "\fB\-mlittle-endian\fR" 4 | |
7172 | .IX Item "-mlittle-endian" | |
7173 | .Ip "\fB\-mbig-endian\fR" 4 | |
7174 | .IX Item "-mbig-endian" | |
7175 | .PD | |
7176 | Generate code for a little endian target. | |
7177 | .Ip "\fB\-m210\fR" 4 | |
7178 | .IX Item "-m210" | |
7179 | .PD 0 | |
7180 | .Ip "\fB\-m210\fR" 4 | |
7181 | .IX Item "-m210" | |
7182 | .Ip "\fB\-m340\fR" 4 | |
7183 | .IX Item "-m340" | |
7184 | .PD | |
7185 | Generate code for the 210 processor. | |
7186 | .PP | |
445c435a JM |
7187 | .I "\s-1IA-64\s0 Options" |
7188 | .IX Subsection "IA-64 Options" | |
7189 | .PP | |
7190 | These are the \fB\-m\fR options defined for the Intel \s-1IA-64\s0 architecture. | |
7191 | .Ip "\fB\-mbig-endian\fR" 4 | |
7192 | .IX Item "-mbig-endian" | |
7193 | Generate code for a big endian target. This is the default for \s-1HPUX\s0. | |
7194 | .Ip "\fB\-mlittle-endian\fR" 4 | |
7195 | .IX Item "-mlittle-endian" | |
7196 | Generate code for a little endian target. This is the default for \s-1AIX5\s0 | |
7197 | and Linux. | |
7198 | .Ip "\fB\-mgnu-as\fR" 4 | |
7199 | .IX Item "-mgnu-as" | |
7200 | .PD 0 | |
7201 | .Ip "\fB\-mno-gnu-as\fR" 4 | |
7202 | .IX Item "-mno-gnu-as" | |
7203 | .PD | |
7204 | Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default. | |
7205 | .Ip "\fB\-mgnu-ld\fR" 4 | |
7206 | .IX Item "-mgnu-ld" | |
7207 | .PD 0 | |
7208 | .Ip "\fB\-mno-gnu-ld\fR" 4 | |
7209 | .IX Item "-mno-gnu-ld" | |
7210 | .PD | |
7211 | Generate (or don't) code for the \s-1GNU\s0 linker. This is the default. | |
7212 | .Ip "\fB\-mno-pic\fR" 4 | |
7213 | .IX Item "-mno-pic" | |
7214 | Generate code that does not use a global pointer register. The result | |
7215 | is not position independent code, and violates the \s-1IA-64\s0 \s-1ABI\s0. | |
7216 | .Ip "\fB\-mvolatile-asm-stop\fR" 4 | |
7217 | .IX Item "-mvolatile-asm-stop" | |
7218 | .PD 0 | |
7219 | .Ip "\fB\-mno-volatile-asm-stop\fR" 4 | |
7220 | .IX Item "-mno-volatile-asm-stop" | |
7221 | .PD | |
7222 | Generate (or don't) a stop bit immediately before and after volatile asm | |
7223 | statements. | |
7224 | .Ip "\fB\-mb-step\fR" 4 | |
7225 | .IX Item "-mb-step" | |
7226 | Generate code that works around Itanium B step errata. | |
7227 | .Ip "\fB\-mregister-names\fR" 4 | |
7228 | .IX Item "-mregister-names" | |
7229 | .PD 0 | |
7230 | .Ip "\fB\-mno-register-names\fR" 4 | |
7231 | .IX Item "-mno-register-names" | |
7232 | .PD | |
7233 | Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for | |
7234 | the stacked registers. This may make assembler output more readable. | |
7235 | .Ip "\fB\-mno-sdata\fR" 4 | |
7236 | .IX Item "-mno-sdata" | |
7237 | .PD 0 | |
7238 | .Ip "\fB\-msdata\fR" 4 | |
7239 | .IX Item "-msdata" | |
7240 | .PD | |
7241 | Disable (or enable) optimizations that use the small data section. This may | |
7242 | be useful for working around optimizer bugs. | |
7243 | .Ip "\fB\-mconstant-gp\fR" 4 | |
7244 | .IX Item "-mconstant-gp" | |
7245 | Generate code that uses a single constant global pointer value. This is | |
7246 | useful when compiling kernel code. | |
7247 | .Ip "\fB\-mauto-pic\fR" 4 | |
7248 | .IX Item "-mauto-pic" | |
7249 | Generate code that is self-relocatable. This implies \fB\-mconstant-gp\fR. | |
7250 | This is useful when compiling firmware code. | |
7251 | .Ip "\fB\-minline-divide-min-latency\fR" 4 | |
7252 | .IX Item "-minline-divide-min-latency" | |
7253 | Generate code for inline divides using the minimum latency algorithm. | |
7254 | .Ip "\fB\-minline-divide-max-throughput\fR" 4 | |
7255 | .IX Item "-minline-divide-max-throughput" | |
7256 | Generate code for inline divides using the maximum throughput algorithm. | |
7257 | .Ip "\fB\-mno-dwarf2\-asm\fR" 4 | |
7258 | .IX Item "-mno-dwarf2-asm" | |
7259 | .PD 0 | |
7260 | .Ip "\fB\-mdwarf2\-asm\fR" 4 | |
7261 | .IX Item "-mdwarf2-asm" | |
7262 | .PD | |
7263 | Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging | |
7264 | info. This may be useful when not using the \s-1GNU\s0 assembler. | |
7265 | .Ip "\fB\-mfixed-range=\fR\fIregister range\fR" 4 | |
7266 | .IX Item "-mfixed-range=register range" | |
7267 | Generate code treating the given register range as fixed registers. | |
7268 | A fixed register is one that the register allocator can not use. This is | |
7269 | useful when compiling kernel code. A register range is specified as | |
7270 | two registers separated by a dash. Multiple register ranges can be | |
7271 | specified separated by a comma. | |
7272 | .PP | |
4bc1997b JM |
7273 | .I "D30V Options" |
7274 | .IX Subsection "D30V Options" | |
7275 | .PP | |
7276 | These \fB\-m\fR options are defined for D30V implementations: | |
7277 | .Ip "\fB\-mextmem\fR" 4 | |
7278 | .IX Item "-mextmem" | |
7279 | Link the \fB.text\fR, \fB.data\fR, \fB.bss\fR, \fB.strings\fR, | |
7280 | \&\fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections into external | |
7281 | memory, which starts at location \f(CW\*(C`0x80000000\*(C'\fR. | |
7282 | .Ip "\fB\-mextmemory\fR" 4 | |
7283 | .IX Item "-mextmemory" | |
7284 | Same as the \fB\-mextmem\fR switch. | |
7285 | .Ip "\fB\-monchip\fR" 4 | |
7286 | .IX Item "-monchip" | |
7287 | Link the \fB.text\fR section into onchip text memory, which starts at | |
7288 | location \f(CW\*(C`0x0\*(C'\fR. Also link \fB.data\fR, \fB.bss\fR, | |
7289 | \&\fB.strings\fR, \fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections | |
7290 | into onchip data memory, which starts at location \f(CW\*(C`0x20000000\*(C'\fR. | |
7291 | .Ip "\fB\-mno-asm-optimize\fR" 4 | |
7292 | .IX Item "-mno-asm-optimize" | |
7293 | .PD 0 | |
7294 | .Ip "\fB\-masm-optimize\fR" 4 | |
7295 | .IX Item "-masm-optimize" | |
7296 | .PD | |
7297 | Disable (enable) passing \fB\-O\fR to the assembler when optimizing. | |
7298 | The assembler uses the \fB\-O\fR option to automatically parallelize | |
7299 | adjacent short instructions where possible. | |
7300 | .Ip "\fB\-mbranch-cost=\fR\fIn\fR" 4 | |
7301 | .IX Item "-mbranch-cost=n" | |
7302 | Increase the internal costs of branches to \fIn\fR. Higher costs means | |
7303 | that the compiler will issue more instructions to avoid doing a branch. | |
7304 | The default is 2. | |
7305 | .Ip "\fB\-mcond-exec=\fR\fIn\fR" 4 | |
7306 | .IX Item "-mcond-exec=n" | |
7307 | Specify the maximum number of conditionally executed instructions that | |
7308 | replace a branch. The default is 4. | |
7309 | .Sh "Options for Code Generation Conventions" | |
7310 | .IX Subsection "Options for Code Generation Conventions" | |
861bb6c1 JL |
7311 | These machine-independent options control the interface conventions |
7312 | used in code generation. | |
7313 | .PP | |
4bc1997b JM |
7314 | Most of them have both positive and negative forms; the negative form |
7315 | of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table below, only | |
7316 | one of the forms is listed\-\-\-the one which is not the default. You | |
7317 | can figure out the other form by either removing \fBno-\fR or adding | |
861bb6c1 | 7318 | it. |
4bc1997b JM |
7319 | .Ip "\fB\-fexceptions\fR" 4 |
7320 | .IX Item "-fexceptions" | |
7321 | Enable exception handling. Generates extra code needed to propagate | |
7322 | exceptions. For some targets, this implies \s-1GNU\s0 \s-1CC\s0 will generate frame | |
7323 | unwind information for all functions, which can produce significant data | |
7324 | size overhead, although it does not affect execution. If you do not | |
7325 | specify this option, \s-1GNU\s0 \s-1CC\s0 will enable it by default for languages like | |
7326 | \&\*(C+ which normally require exception handling, and disable itfor | |
7327 | languages like C that do not normally require it. However, you may need | |
7328 | to enable this option when compiling C code that needs to interoperate | |
7329 | properly with exception handlers written in \*(C+. You may also wish to | |
7330 | disable this option if you are compiling older \*(C+ programs that don't | |
7331 | use exception handling. | |
7332 | .Ip "\fB\-funwind-tables\fR" 4 | |
7333 | .IX Item "-funwind-tables" | |
7334 | Similar to \fB\-fexceptions\fR, except that it will just generate any needed | |
7335 | static data, but will not affect the generated code in any other way. | |
7336 | You will normally not enable this option; instead, a language processor | |
7337 | that needs this handling would enable it on your behalf. | |
7338 | .Ip "\fB\-fpcc-struct-return\fR" 4 | |
7339 | .IX Item "-fpcc-struct-return" | |
7340 | Return ``short'' \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like | |
7341 | longer ones, rather than in registers. This convention is less | |
7342 | efficient, but it has the advantage of allowing intercallability between | |
7343 | GCC-compiled files and files compiled with other compilers. | |
7344 | .Sp | |
7345 | The precise convention for returning structures in memory depends | |
7346 | on the target configuration macros. | |
7347 | .Sp | |
7348 | Short structures and unions are those whose size and alignment match | |
7349 | that of some integer type. | |
7350 | .Ip "\fB\-freg-struct-return\fR" 4 | |
7351 | .IX Item "-freg-struct-return" | |
7352 | Use the convention that \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values are | |
7353 | returned in registers when possible. This is more efficient for small | |
7354 | structures than \fB\-fpcc-struct-return\fR. | |
7355 | .Sp | |
7356 | If you specify neither \fB\-fpcc-struct-return\fR nor its contrary | |
7357 | \&\fB\-freg-struct-return\fR, \s-1GCC\s0 defaults to whichever convention is | |
7358 | standard for the target. If there is no standard convention, \s-1GCC\s0 | |
7359 | defaults to \fB\-fpcc-struct-return\fR, except on targets where \s-1GCC\s0 | |
7360 | is the principal compiler. In those cases, we can choose the standard, | |
7361 | and we chose the more efficient register return alternative. | |
7362 | .Ip "\fB\-fshort-enums\fR" 4 | |
7363 | .IX Item "-fshort-enums" | |
7364 | Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the | |
7365 | declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type | |
861bb6c1 | 7366 | will be equivalent to the smallest integer type which has enough room. |
4bc1997b JM |
7367 | .Ip "\fB\-fshort-double\fR" 4 |
7368 | .IX Item "-fshort-double" | |
7369 | Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR. | |
7370 | .Ip "\fB\-fshared-data\fR" 4 | |
7371 | .IX Item "-fshared-data" | |
7372 | Requests that the data and non-\f(CW\*(C`const\*(C'\fR variables of this | |
861bb6c1 JL |
7373 | compilation be shared data rather than private data. The distinction |
7374 | makes sense only on certain operating systems, where shared data is | |
7375 | shared between processes running the same program, while private data | |
7376 | exists in one copy per process. | |
4bc1997b JM |
7377 | .Ip "\fB\-fno-common\fR" 4 |
7378 | .IX Item "-fno-common" | |
7379 | Allocate even uninitialized global variables in the data section of the | |
861bb6c1 | 7380 | object file, rather than generating them as common blocks. This has the |
4bc1997b | 7381 | effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in |
861bb6c1 JL |
7382 | two different compilations, you will get an error when you link them. |
7383 | The only reason this might be useful is if you wish to verify that the | |
7384 | program will work on other systems which always work this way. | |
4bc1997b JM |
7385 | .Ip "\fB\-fno-ident\fR" 4 |
7386 | .IX Item "-fno-ident" | |
7387 | Ignore the \fB#ident\fR directive. | |
7388 | .Ip "\fB\-fno-gnu-linker\fR" 4 | |
7389 | .IX Item "-fno-gnu-linker" | |
7390 | Do not output global initializations (such as \*(C+ constructors and | |
7391 | destructors) in the form used by the \s-1GNU\s0 linker (on systems where the \s-1GNU\s0 | |
861bb6c1 JL |
7392 | linker is the standard method of handling them). Use this option when |
7393 | you want to use a non-GNU linker, which also requires using the | |
4bc1997b JM |
7394 | \&\fBcollect2\fR program to make sure the system linker includes |
7395 | constructors and destructors. (\fBcollect2\fR is included in the \s-1GCC\s0 | |
7396 | distribution.) For systems which \fImust\fR use \fBcollect2\fR, the | |
7397 | compiler driver \fBgcc\fR is configured to do this automatically. | |
7398 | .Ip "\fB\-finhibit-size-directive\fR" 4 | |
7399 | .IX Item "-finhibit-size-directive" | |
7400 | Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that | |
861bb6c1 JL |
7401 | would cause trouble if the function is split in the middle, and the |
7402 | two halves are placed at locations far apart in memory. This option is | |
4bc1997b | 7403 | used when compiling \fIcrtstuff.c\fR; you should not need to use it |
861bb6c1 | 7404 | for anything else. |
4bc1997b JM |
7405 | .Ip "\fB\-fverbose-asm\fR" 4 |
7406 | .IX Item "-fverbose-asm" | |
861bb6c1 JL |
7407 | Put extra commentary information in the generated assembly code to |
7408 | make it more readable. This option is generally only of use to those | |
7409 | who actually need to read the generated assembly code (perhaps while | |
7410 | debugging the compiler itself). | |
4bc1997b JM |
7411 | .Sp |
7412 | \&\fB\-fno-verbose-asm\fR, the default, causes the | |
7413 | extra information to be omitted and is useful when comparing two assembler | |
7414 | files. | |
7415 | .Ip "\fB\-fvolatile\fR" 4 | |
7416 | .IX Item "-fvolatile" | |
861bb6c1 | 7417 | Consider all memory references through pointers to be volatile. |
4bc1997b JM |
7418 | .Ip "\fB\-fvolatile-global\fR" 4 |
7419 | .IX Item "-fvolatile-global" | |
861bb6c1 | 7420 | Consider all memory references to extern and global data items to |
4bc1997b JM |
7421 | be volatile. \s-1GCC\s0 does not consider static data items to be volatile |
7422 | because of this switch. | |
7423 | .Ip "\fB\-fvolatile-static\fR" 4 | |
7424 | .IX Item "-fvolatile-static" | |
7425 | Consider all memory references to static data to be volatile. | |
7426 | .Ip "\fB\-fpic\fR" 4 | |
7427 | .IX Item "-fpic" | |
7428 | Generate position-independent code (\s-1PIC\s0) suitable for use in a shared | |
7429 | library, if supported for the target machine. Such code accesses all | |
7430 | constant addresses through a global offset table (\s-1GOT\s0). The dynamic | |
7431 | loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic | |
7432 | loader is not part of \s-1GCC\s0; it is part of the operating system). If | |
7433 | the \s-1GOT\s0 size for the linked executable exceeds a machine-specific | |
7434 | maximum size, you get an error message from the linker indicating that | |
7435 | \&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR | |
7436 | instead. (These maximums are 16k on the m88k, 8k on the Sparc, and 32k | |
7437 | on the m68k and \s-1RS/6000\s0. The 386 has no such limit.) | |
7438 | .Sp | |
7439 | Position-independent code requires special support, and therefore works | |
7440 | only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V | |
7441 | but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always | |
7442 | position-independent. | |
7443 | .Ip "\fB\-fPIC\fR" 4 | |
7444 | .IX Item "-fPIC" | |
861bb6c1 | 7445 | If supported for the target machine, emit position-independent code, |
4bc1997b JM |
7446 | suitable for dynamic linking and avoiding any limit on the size of the |
7447 | global offset table. This option makes a difference on the m68k, m88k, | |
7448 | and the Sparc. | |
7449 | .Sp | |
7450 | Position-independent code requires special support, and therefore works | |
7451 | only on certain machines. | |
7452 | .Ip "\fB\-ffixed-\fR\fIreg\fR" 4 | |
7453 | .IX Item "-ffixed-reg" | |
7454 | Treat the register named \fIreg\fR as a fixed register; generated code | |
861bb6c1 JL |
7455 | should never refer to it (except perhaps as a stack pointer, frame |
7456 | pointer or in some other fixed role). | |
7457 | .Sp | |
4bc1997b JM |
7458 | \&\fIreg\fR must be the name of a register. The register names accepted |
7459 | are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR | |
861bb6c1 JL |
7460 | macro in the machine description macro file. |
7461 | .Sp | |
7462 | This flag does not have a negative form, because it specifies a | |
7463 | three-way choice. | |
4bc1997b JM |
7464 | .Ip "\fB\-fcall-used-\fR\fIreg\fR" 4 |
7465 | .IX Item "-fcall-used-reg" | |
7466 | Treat the register named \fIreg\fR as an allocable register that is | |
861bb6c1 JL |
7467 | clobbered by function calls. It may be allocated for temporaries or |
7468 | variables that do not live across a call. Functions compiled this way | |
4bc1997b | 7469 | will not save and restore the register \fIreg\fR. |
861bb6c1 | 7470 | .Sp |
4bc1997b JM |
7471 | It is an error to used this flag with the frame pointer or stack pointer. |
7472 | Use of this flag for other registers that have fixed pervasive roles in | |
7473 | the machine's execution model will produce disastrous results. | |
861bb6c1 JL |
7474 | .Sp |
7475 | This flag does not have a negative form, because it specifies a | |
7476 | three-way choice. | |
4bc1997b JM |
7477 | .Ip "\fB\-fcall-saved-\fR\fIreg\fR" 4 |
7478 | .IX Item "-fcall-saved-reg" | |
7479 | Treat the register named \fIreg\fR as an allocable register saved by | |
861bb6c1 JL |
7480 | functions. It may be allocated even for temporaries or variables that |
7481 | live across a call. Functions compiled this way will save and restore | |
4bc1997b | 7482 | the register \fIreg\fR if they use it. |
861bb6c1 | 7483 | .Sp |
4bc1997b JM |
7484 | It is an error to used this flag with the frame pointer or stack pointer. |
7485 | Use of this flag for other registers that have fixed pervasive roles in | |
7486 | the machine's execution model will produce disastrous results. | |
861bb6c1 JL |
7487 | .Sp |
7488 | A different sort of disaster will result from the use of this flag for | |
7489 | a register in which function values may be returned. | |
7490 | .Sp | |
7491 | This flag does not have a negative form, because it specifies a | |
7492 | three-way choice. | |
4bc1997b JM |
7493 | .Ip "\fB\-fpack-struct\fR" 4 |
7494 | .IX Item "-fpack-struct" | |
7495 | Pack all structure members together without holes. Usually you would | |
7496 | not want to use this option, since it makes the code suboptimal, and | |
7497 | the offsets of structure members won't agree with system libraries. | |
7498 | .Ip "\fB\-fcheck-memory-usage\fR" 4 | |
7499 | .IX Item "-fcheck-memory-usage" | |
7500 | Generate extra code to check each memory access. \s-1GCC\s0 will generate | |
7501 | code that is suitable for a detector of bad memory accesses such as | |
7502 | \&\fIChecker\fR. | |
7503 | .Sp | |
7504 | Normally, you should compile all, or none, of your code with this option. | |
7505 | .Sp | |
7506 | If you do mix code compiled with and without this option, | |
7507 | you must ensure that all code that has side effects | |
7508 | and that is called by code compiled with this option | |
7509 | is, itself, compiled with this option. | |
7510 | If you do not, you might get erroneous messages from the detector. | |
7511 | .Sp | |
7512 | If you use functions from a library that have side-effects (such as | |
7513 | \&\f(CW\*(C`read\*(C'\fR), you might not be able to recompile the library and | |
7514 | specify this option. In that case, you can enable the | |
7515 | \&\fB\-fprefix-function-name\fR option, which requests \s-1GCC\s0 to encapsulate | |
7516 | your code and make other functions look as if they were compiled with | |
7517 | \&\fB\-fcheck-memory-usage\fR. This is done by calling ``stubs'', | |
7518 | which are provided by the detector. If you cannot find or build | |
7519 | stubs for every function you call, you might have to specify | |
7520 | \&\fB\-fcheck-memory-usage\fR without \fB\-fprefix-function-name\fR. | |
7521 | .Sp | |
7522 | If you specify this option, you can not use the \f(CW\*(C`asm\*(C'\fR or | |
7523 | \&\f(CW\*(C`_\|_asm_\|_\*(C'\fR keywords in functions with memory checking enabled. \s-1GNU\s0 | |
7524 | \&\s-1CC\s0 cannot understand what the \f(CW\*(C`asm\*(C'\fR statement may do, and therefore | |
7525 | cannot generate the appropriate code, so it will reject it. However, if | |
7526 | you specify the function attribute \f(CW\*(C`no_check_memory_usage\*(C'\fR, \s-1GNU\s0 \s-1CC\s0 will disable memory checking within a | |
7527 | function; you may use \f(CW\*(C`asm\*(C'\fR statements inside such functions. You | |
7528 | may have an inline expansion of a non-checked function within a checked | |
7529 | function; in that case \s-1GNU\s0 \s-1CC\s0 will not generate checks for the inlined | |
7530 | function's memory accesses. | |
7531 | .Sp | |
7532 | If you move your \f(CW\*(C`asm\*(C'\fR statements to non-checked inline functions | |
7533 | and they do access memory, you can add calls to the support code in your | |
7534 | inline function, to indicate any reads, writes, or copies being done. | |
7535 | These calls would be similar to those done in the stubs described above. | |
7536 | .Ip "\fB\-fprefix-function-name\fR" 4 | |
7537 | .IX Item "-fprefix-function-name" | |
7538 | Request \s-1GCC\s0 to add a prefix to the symbols generated for function names. | |
7539 | \&\s-1GCC\s0 adds a prefix to the names of functions defined as well as | |
7540 | functions called. Code compiled with this option and code compiled | |
7541 | without the option can't be linked together, unless stubs are used. | |
7542 | .Sp | |
7543 | If you compile the following code with \fB\-fprefix-function-name\fR | |
7544 | .Sp | |
7545 | .Vb 6 | |
7546 | \& extern void bar (int); | |
7547 | \& void | |
7548 | \& foo (int a) | |
7549 | \& { | |
7550 | \& return bar (a + 5); | |
7551 | \& } | |
7552 | .Ve | |
7553 | \&\s-1GCC\s0 will compile the code as if it was written: | |
7554 | .Sp | |
7555 | .Vb 6 | |
7556 | \& extern void prefix_bar (int); | |
7557 | \& void | |
7558 | \& prefix_foo (int a) | |
7559 | \& { | |
7560 | \& return prefix_bar (a + 5); | |
7561 | \& } | |
7562 | .Ve | |
7563 | This option is designed to be used with \fB\-fcheck-memory-usage\fR. | |
7564 | .Ip "\fB\-finstrument-functions\fR" 4 | |
7565 | .IX Item "-finstrument-functions" | |
7566 | Generate instrumentation calls for entry and exit to functions. Just | |
7567 | after function entry and just before function exit, the following | |
7568 | profiling functions will be called with the address of the current | |
7569 | function and its call site. (On some platforms, | |
7570 | \&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current | |
7571 | function, so the call site information may not be available to the | |
7572 | profiling functions otherwise.) | |
7573 | .Sp | |
7574 | .Vb 2 | |
7575 | \& void __cyg_profile_func_enter (void *this_fn, void *call_site); | |
7576 | \& void __cyg_profile_func_exit (void *this_fn, void *call_site); | |
7577 | .Ve | |
7578 | The first argument is the address of the start of the current function, | |
7579 | which may be looked up exactly in the symbol table. | |
7580 | .Sp | |
7581 | This instrumentation is also done for functions expanded inline in other | |
7582 | functions. The profiling calls will indicate where, conceptually, the | |
7583 | inline function is entered and exited. This means that addressable | |
7584 | versions of such functions must be available. If all your uses of a | |
7585 | function are expanded inline, this may mean an additional expansion of | |
7586 | code size. If you use \fBextern inline\fR in your C code, an | |
7587 | addressable version of such functions must be provided. (This is | |
7588 | normally the case anyways, but if you get lucky and the optimizer always | |
7589 | expands the functions inline, you might have gotten away without | |
7590 | providing static copies.) | |
7591 | .Sp | |
7592 | A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in | |
7593 | which case this instrumentation will not be done. This can be used, for | |
7594 | example, for the profiling functions listed above, high-priority | |
7595 | interrupt routines, and any functions from which the profiling functions | |
7596 | cannot safely be called (perhaps signal handlers, if the profiling | |
7597 | routines generate output or allocate memory). | |
7598 | .Ip "\fB\-fstack-check\fR" 4 | |
7599 | .IX Item "-fstack-check" | |
7600 | Generate code to verify that you do not go beyond the boundary of the | |
7601 | stack. You should specify this flag if you are running in an | |
7602 | environment with multiple threads, but only rarely need to specify it in | |
7603 | a single-threaded environment since stack overflow is automatically | |
7604 | detected on nearly all systems if there is only one stack. | |
7605 | .Sp | |
7606 | Note that this switch does not actually cause checking to be done; the | |
7607 | operating system must do that. The switch causes generation of code | |
7608 | to ensure that the operating system sees the stack being extended. | |
7609 | .Ip "\fB\-fstack-limit-register=\fR\fIreg\fR" 4 | |
7610 | .IX Item "-fstack-limit-register=reg" | |
7611 | .PD 0 | |
7612 | .Ip "\fB\-fstack-limit-symbol=\fR\fIsym\fR" 4 | |
7613 | .IX Item "-fstack-limit-symbol=sym" | |
7614 | .Ip "\fB\-fno-stack-limit\fR" 4 | |
7615 | .IX Item "-fno-stack-limit" | |
7616 | .PD | |
7617 | Generate code to ensure that the stack does not grow beyond a certain value, | |
7618 | either the value of a register or the address of a symbol. If the stack | |
7619 | would grow beyond the value, a signal is raised. For most targets, | |
7620 | the signal is raised before the stack overruns the boundary, so | |
7621 | it is possible to catch the signal without taking special precautions. | |
7622 | .Sp | |
7623 | For instance, if the stack starts at address \fB0x80000000\fR and grows | |
7624 | downwards you can use the flags | |
7625 | \&\fB\-fstack-limit-symbol=_\|_stack_limit\fR | |
7626 | \&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR which will enforce a stack | |
7627 | limit of 128K. | |
7628 | .Ip "\fB\-fargument-alias\fR" 4 | |
7629 | .IX Item "-fargument-alias" | |
7630 | .PD 0 | |
7631 | .Ip "\fB\-fargument-noalias\fR" 4 | |
7632 | .IX Item "-fargument-noalias" | |
7633 | .Ip "\fB\-fargument-noalias-global\fR" 4 | |
7634 | .IX Item "-fargument-noalias-global" | |
7635 | .PD | |
7636 | Specify the possible relationships among parameters and between | |
7637 | parameters and global data. | |
7638 | .Sp | |
7639 | \&\fB\-fargument-alias\fR specifies that arguments (parameters) may | |
7640 | alias each other and may alias global storage. | |
7641 | \&\fB\-fargument-noalias\fR specifies that arguments do not alias | |
7642 | each other, but may alias global storage. | |
7643 | \&\fB\-fargument-noalias-global\fR specifies that arguments do not | |
7644 | alias each other and do not alias global storage. | |
7645 | .Sp | |
7646 | Each language will automatically use whatever option is required by | |
7647 | the language standard. You should not need to use these options yourself. | |
7648 | .Ip "\fB\-fleading-underscore\fR" 4 | |
7649 | .IX Item "-fleading-underscore" | |
7650 | This option and its counterpart, \-fno-leading-underscore, forcibly | |
7651 | change the way C symbols are represented in the object file. One use | |
7652 | is to help link with legacy assembly code. | |
7653 | .Sp | |
7654 | Be warned that you should know what you are doing when invoking this | |
7655 | option, and that not all targets provide complete support for it. | |
7656 | .SH "ENVIRONMENT" | |
7657 | .IX Header "ENVIRONMENT" | |
7658 | This section describes several environment variables that affect how \s-1GCC\s0 | |
7659 | operates. Some of them work by specifying directories or prefixes to use | |
7660 | when searching for various kinds of files. Some are used to specify other | |
7661 | aspects of the compilation environment. | |
7662 | .PP | |
7663 | Note that you can also specify places to search using options such as | |
7664 | \&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These | |
7665 | take precedence over places specified using environment variables, which | |
7666 | in turn take precedence over those specified by the configuration of \s-1GCC\s0. | |
7667 | .Ip "\fB\s-1LANG\s0\fR" 4 | |
7668 | .IX Item "LANG" | |
7669 | .PD 0 | |
7670 | .Ip "\fB\s-1LC_CTYPE\s0\fR" 4 | |
7671 | .IX Item "LC_CTYPE" | |
7672 | .Ip "\fB\s-1LC_MESSAGES\s0\fR" 4 | |
7673 | .IX Item "LC_MESSAGES" | |
7674 | .Ip "\fB\s-1LC_ALL\s0\fR" 4 | |
7675 | .IX Item "LC_ALL" | |
7676 | .PD | |
7677 | These environment variables control the way that \s-1GCC\s0 uses | |
7678 | localization information that allow \s-1GCC\s0 to work with different | |
7679 | national conventions. \s-1GCC\s0 inspects the locale categories | |
7680 | \&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do | |
7681 | so. These locale categories can be set to any value supported by your | |
7682 | installation. A typical value is \fBen_UK\fR for English in the United | |
7683 | Kingdom. | |
7684 | .Sp | |
7685 | The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character | |
7686 | classification. \s-1GCC\s0 uses it to determine the character boundaries in | |
7687 | a string; this is needed for some multibyte encodings that contain quote | |
7688 | and escape characters that would otherwise be interpreted as a string | |
7689 | end or escape. | |
7690 | .Sp | |
7691 | The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to | |
7692 | use in diagnostic messages. | |
7693 | .Sp | |
7694 | If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value | |
7695 | of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR | |
7696 | and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR | |
7697 | environment variable. If none of these variables are set, \s-1GCC\s0 | |
7698 | defaults to traditional C English behavior. | |
7699 | .Ip "\fB\s-1TMPDIR\s0\fR" 4 | |
7700 | .IX Item "TMPDIR" | |
7701 | If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary | |
7702 | files. \s-1GCC\s0 uses temporary files to hold the output of one stage of | |
7703 | compilation which is to be used as input to the next stage: for example, | |
7704 | the output of the preprocessor, which is the input to the compiler | |
7705 | proper. | |
7706 | .Ip "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4 | |
7707 | .IX Item "GCC_EXEC_PREFIX" | |
7708 | If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the | |
7709 | names of the subprograms executed by the compiler. No slash is added | |
7710 | when this prefix is combined with the name of a subprogram, but you can | |
7711 | specify a prefix that ends with a slash if you wish. | |
7712 | .Sp | |
7713 | If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GNU\s0 \s-1CC\s0 will attempt to figure out | |
7714 | an appropriate prefix to use based on the pathname it was invoked with. | |
7715 | .Sp | |
7716 | If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it | |
7717 | tries looking in the usual places for the subprogram. | |
7718 | .Sp | |
7719 | The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is | |
7720 | \&\fI\fIprefix\fI/lib/gcc-lib/\fR where \fIprefix\fR is the value | |
7721 | of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script. | |
7722 | .Sp | |
7723 | Other prefixes specified with \fB\-B\fR take precedence over this prefix. | |
7724 | .Sp | |
7725 | This prefix is also used for finding files such as \fIcrt0.o\fR that are | |
7726 | used for linking. | |
7727 | .Sp | |
7728 | In addition, the prefix is used in an unusual way in finding the | |
7729 | directories to search for header files. For each of the standard | |
7730 | directories whose name normally begins with \fB/usr/local/lib/gcc-lib\fR | |
7731 | (more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries | |
7732 | replacing that beginning with the specified prefix to produce an | |
7733 | alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search | |
7734 | \&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR. | |
7735 | These alternate directories are searched first; the standard directories | |
7736 | come next. | |
7737 | .Ip "\fB\s-1COMPILER_PATH\s0\fR" 4 | |
7738 | .IX Item "COMPILER_PATH" | |
7739 | The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of | |
7740 | directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus | |
7741 | specified when searching for subprograms, if it can't find the | |
7742 | subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR. | |
7743 | .Ip "\fB\s-1LIBRARY_PATH\s0\fR" 4 | |
7744 | .IX Item "LIBRARY_PATH" | |
7745 | The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of | |
7746 | directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler, | |
7747 | \&\s-1GCC\s0 tries the directories thus specified when searching for special | |
7748 | linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking | |
7749 | using \s-1GCC\s0 also uses these directories when searching for ordinary | |
7750 | libraries for the \fB\-l\fR option (but directories specified with | |
7751 | \&\fB\-L\fR come first). | |
7752 | .Ip "\fBC_INCLUDE_PATH\fR" 4 | |
7753 | .IX Item "C_INCLUDE_PATH" | |
7754 | .PD 0 | |
7755 | .Ip "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4 | |
7756 | .IX Item "CPLUS_INCLUDE_PATH" | |
7757 | .Ip "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4 | |
7758 | .IX Item "OBJC_INCLUDE_PATH" | |
7759 | .PD | |
7760 | These environment variables pertain to particular languages. Each | |
7761 | variable's value is a colon-separated list of directories, much like | |
7762 | \&\fB\s-1PATH\s0\fR. When \s-1GCC\s0 searches for header files, it tries the | |
7763 | directories listed in the variable for the language you are using, after | |
7764 | the directories specified with \fB\-I\fR but before the standard header | |
7765 | file directories. | |
7766 | .Ip "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4 | |
7767 | .IX Item "DEPENDENCIES_OUTPUT" | |
7768 | If this variable is set, its value specifies how to output dependencies | |
7769 | for Make based on the header files processed by the compiler. This | |
7770 | output looks much like the output from the \fB\-M\fR option, but it goes to a separate file, and is | |
7771 | in addition to the usual results of compilation. | |
7772 | .Sp | |
7773 | The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in | |
7774 | which case the Make rules are written to that file, guessing the target | |
7775 | name from the source file name. Or the value can have the form | |
7776 | \&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to | |
7777 | file \fIfile\fR using \fItarget\fR as the target name. | |
7778 | .Ip "\fB\s-1LANG\s0\fR" 4 | |
7779 | .IX Item "LANG" | |
7780 | This variable is used to pass locale information to the compiler. One way in | |
7781 | which this information is used is to determine the character set to be used | |
7782 | when character literals, string literals and comments are parsed in C and \*(C+. | |
7783 | When the compiler is configured to allow multibyte characters, | |
7784 | the following values for \fB\s-1LANG\s0\fR are recognized: | |
7785 | .RS 4 | |
7786 | .Ip "\fBC-JIS\fR" 4 | |
7787 | .IX Item "C-JIS" | |
7788 | Recognize \s-1JIS\s0 characters. | |
7789 | .Ip "\fBC-SJIS\fR" 4 | |
7790 | .IX Item "C-SJIS" | |
7791 | Recognize \s-1SJIS\s0 characters. | |
7792 | .Ip "\fBC-EUCJP\fR" 4 | |
7793 | .IX Item "C-EUCJP" | |
7794 | Recognize \s-1EUCJP\s0 characters. | |
7795 | .RE | |
7796 | .RS 4 | |
7797 | .Sp | |
7798 | If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the | |
7799 | compiler will use mblen and mbtowc as defined by the default locale to | |
7800 | recognize and translate multibyte characters. | |
7801 | .RE | |
7802 | .SH "BUGS" | |
7803 | .IX Header "BUGS" | |
7804 | For instructions on reporting bugs, see | |
7805 | <\fBhttp://gcc.gnu.org/bugs.html\fR>. Use of the \fBgccbug\fR | |
7806 | script to report bugs is recommended. | |
7807 | .SH "FOOTNOTES" | |
7808 | .IX Header "FOOTNOTES" | |
7809 | .Ip "1." 4 | |
7810 | On some systems, \fBgcc \-shared\fR | |
7811 | needs to build supplementary stub code for constructors to work. On | |
7812 | multi-libbed systems, \fBgcc \-shared\fR must select the correct support | |
7813 | libraries to link against. Failing to supply the correct flags may lead | |
7814 | to subtle defects. Supplying them in cases where they are not necessary | |
7815 | is innocuous. | |
861bb6c1 | 7816 | .SH "SEE ALSO" |
4bc1997b JM |
7817 | .IX Header "SEE ALSO" |
7818 | \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIg77\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1) | |
7819 | and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIg77\fR, \fIas\fR, | |
7820 | \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR. | |
7821 | .SH "AUTHOR" | |
7822 | .IX Header "AUTHOR" | |
7823 | See the Info entry for \fIgcc\fR, or | |
7824 | <\fBhttp://gcc.gnu.org/thanks.html\fR>, for contributors to \s-1GCC\s0. | |
7825 | .SH "COPYRIGHT" | |
7826 | .IX Header "COPYRIGHT" | |
7827 | Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, | |
7828 | 1998, 1999, 2000, 2001 Free Software Foundation, Inc. | |
861bb6c1 | 7829 | .PP |
4bc1997b JM |
7830 | Permission is granted to make and distribute verbatim copies of this |
7831 | manual provided the copyright notice and this permission notice are | |
7832 | preserved on all copies. | |
861bb6c1 JL |
7833 | .PP |
7834 | Permission is granted to copy and distribute modified versions of this | |
4bc1997b | 7835 | manual under the conditions for verbatim copying, provided also that the |
861bb6c1 JL |
7836 | entire resulting derived work is distributed under the terms of a |
7837 | permission notice identical to this one. | |
7838 | .PP | |
4bc1997b JM |
7839 | Permission is granted to copy and distribute translations of this manual |
7840 | into another language, under the above conditions for modified versions, | |
7841 | except that this permission notice may be included in translations | |
7842 | approved by the Free Software Foundation instead of in the original | |
7843 | English. |