]> gcc.gnu.org Git - gcc.git/blame - gcc/function.c
configure.in: Add hppa1.0-*-mpeix for MPE port.
[gcc.git] / gcc / function.c
CommitLineData
6f086dfc 1/* Expands front end tree to back end RTL for GNU C-Compiler
a5cad800 2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
6f086dfc
RS
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
a35311b0
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
6f086dfc
RS
20
21
22/* This file handles the generation of rtl code from tree structure
23 at the level of the function as a whole.
24 It creates the rtl expressions for parameters and auto variables
25 and has full responsibility for allocating stack slots.
26
27 `expand_function_start' is called at the beginning of a function,
28 before the function body is parsed, and `expand_function_end' is
29 called after parsing the body.
30
31 Call `assign_stack_local' to allocate a stack slot for a local variable.
32 This is usually done during the RTL generation for the function body,
33 but it can also be done in the reload pass when a pseudo-register does
34 not get a hard register.
35
36 Call `put_var_into_stack' when you learn, belatedly, that a variable
37 previously given a pseudo-register must in fact go in the stack.
38 This function changes the DECL_RTL to be a stack slot instead of a reg
39 then scans all the RTL instructions so far generated to correct them. */
40
41#include "config.h"
670ee920 42#include "system.h"
6f086dfc
RS
43#include "rtl.h"
44#include "tree.h"
45#include "flags.h"
1ef08c63 46#include "except.h"
6f086dfc
RS
47#include "function.h"
48#include "insn-flags.h"
49#include "expr.h"
50#include "insn-codes.h"
51#include "regs.h"
52#include "hard-reg-set.h"
53#include "insn-config.h"
54#include "recog.h"
55#include "output.h"
bdac5f58 56#include "basic-block.h"
c20bf1f3 57#include "obstack.h"
10f0ad3d 58#include "toplev.h"
fe9b4957 59#include "hash.h"
87ff9c8e 60#include "ggc.h"
6f086dfc 61
189cc377
RK
62#ifndef TRAMPOLINE_ALIGNMENT
63#define TRAMPOLINE_ALIGNMENT FUNCTION_BOUNDARY
64#endif
65
d16790f2
JW
66#ifndef LOCAL_ALIGNMENT
67#define LOCAL_ALIGNMENT(TYPE, ALIGNMENT) ALIGNMENT
68#endif
69
293e3de4
RS
70/* Some systems use __main in a way incompatible with its use in gcc, in these
71 cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
72 give the same symbol without quotes for an alternative entry point. You
0f41302f 73 must define both, or neither. */
293e3de4
RS
74#ifndef NAME__MAIN
75#define NAME__MAIN "__main"
76#define SYMBOL__MAIN __main
77#endif
78
6f086dfc
RS
79/* Round a value to the lowest integer less than it that is a multiple of
80 the required alignment. Avoid using division in case the value is
81 negative. Assume the alignment is a power of two. */
82#define FLOOR_ROUND(VALUE,ALIGN) ((VALUE) & ~((ALIGN) - 1))
83
84/* Similar, but round to the next highest integer that meets the
85 alignment. */
86#define CEIL_ROUND(VALUE,ALIGN) (((VALUE) + (ALIGN) - 1) & ~((ALIGN)- 1))
87
88/* NEED_SEPARATE_AP means that we cannot derive ap from the value of fp
89 during rtl generation. If they are different register numbers, this is
90 always true. It may also be true if
91 FIRST_PARM_OFFSET - STARTING_FRAME_OFFSET is not a constant during rtl
92 generation. See fix_lexical_addr for details. */
93
94#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
95#define NEED_SEPARATE_AP
96#endif
97
54ff41b7
JW
98/* Nonzero if function being compiled doesn't contain any calls
99 (ignoring the prologue and epilogue). This is set prior to
100 local register allocation and is valid for the remaining
101 compiler passes. */
54ff41b7
JW
102int current_function_is_leaf;
103
fdb8a883
JW
104/* Nonzero if function being compiled doesn't modify the stack pointer
105 (ignoring the prologue and epilogue). This is only valid after
106 life_analysis has run. */
fdb8a883
JW
107int current_function_sp_is_unchanging;
108
54ff41b7
JW
109/* Nonzero if the function being compiled is a leaf function which only
110 uses leaf registers. This is valid after reload (specifically after
111 sched2) and is useful only if the port defines LEAF_REGISTERS. */
54ff41b7
JW
112int current_function_uses_only_leaf_regs;
113
6f086dfc
RS
114/* Nonzero once virtual register instantiation has been done.
115 assign_stack_local uses frame_pointer_rtx when this is nonzero. */
116static int virtuals_instantiated;
117
46766466
RS
118/* These variables hold pointers to functions to
119 save and restore machine-specific data,
120 in push_function_context and pop_function_context. */
36edd3cc 121void (*init_machine_status) PROTO((struct function *));
9e014ded
RK
122void (*save_machine_status) PROTO((struct function *));
123void (*restore_machine_status) PROTO((struct function *));
e2ecd91c 124void (*mark_machine_status) PROTO((struct function *));
46766466 125
8c5666b4
BS
126/* Likewise, but for language-specific data. */
127void (*save_lang_status) PROTO((struct function *));
128void (*restore_lang_status) PROTO((struct function *));
e2ecd91c 129void (*mark_lang_status) PROTO((struct function *));
8c5666b4 130
49ad7cfa
BS
131/* The FUNCTION_DECL for an inline function currently being expanded. */
132tree inline_function_decl;
b384405b
BS
133
134/* The currently compiled function. */
135struct function *current_function = 0;
136
137/* Global list of all compiled functions. */
138struct function *all_functions = 0;
5c7675e9
RH
139
140/* These arrays record the INSN_UIDs of the prologue and epilogue insns. */
141static int *prologue;
142static int *epilogue;
6f086dfc
RS
143\f
144/* In order to evaluate some expressions, such as function calls returning
145 structures in memory, we need to temporarily allocate stack locations.
146 We record each allocated temporary in the following structure.
147
148 Associated with each temporary slot is a nesting level. When we pop up
149 one level, all temporaries associated with the previous level are freed.
150 Normally, all temporaries are freed after the execution of the statement
151 in which they were created. However, if we are inside a ({...}) grouping,
152 the result may be in a temporary and hence must be preserved. If the
153 result could be in a temporary, we preserve it if we can determine which
154 one it is in. If we cannot determine which temporary may contain the
155 result, all temporaries are preserved. A temporary is preserved by
156 pretending it was allocated at the previous nesting level.
157
158 Automatic variables are also assigned temporary slots, at the nesting
159 level where they are defined. They are marked a "kept" so that
160 free_temp_slots will not free them. */
161
162struct temp_slot
163{
164 /* Points to next temporary slot. */
165 struct temp_slot *next;
0f41302f 166 /* The rtx to used to reference the slot. */
6f086dfc 167 rtx slot;
e5e76139
RK
168 /* The rtx used to represent the address if not the address of the
169 slot above. May be an EXPR_LIST if multiple addresses exist. */
170 rtx address;
d16790f2
JW
171 /* The alignment (in bits) of the slot. */
172 int align;
6f086dfc 173 /* The size, in units, of the slot. */
e5e809f4 174 HOST_WIDE_INT size;
a4c6502a
MM
175 /* The alias set for the slot. If the alias set is zero, we don't
176 know anything about the alias set of the slot. We must only
177 reuse a slot if it is assigned an object of the same alias set.
178 Otherwise, the rest of the compiler may assume that the new use
179 of the slot cannot alias the old use of the slot, which is
180 false. If the slot has alias set zero, then we can't reuse the
181 slot at all, since we have no idea what alias set may have been
182 imposed on the memory. For example, if the stack slot is the
183 call frame for an inline functioned, we have no idea what alias
184 sets will be assigned to various pieces of the call frame. */
185 int alias_set;
e7a84011
RK
186 /* The value of `sequence_rtl_expr' when this temporary is allocated. */
187 tree rtl_expr;
6f086dfc
RS
188 /* Non-zero if this temporary is currently in use. */
189 char in_use;
a25d4ba2
RK
190 /* Non-zero if this temporary has its address taken. */
191 char addr_taken;
6f086dfc
RS
192 /* Nesting level at which this slot is being used. */
193 int level;
194 /* Non-zero if this should survive a call to free_temp_slots. */
195 int keep;
fc91b0d0
RK
196 /* The offset of the slot from the frame_pointer, including extra space
197 for alignment. This info is for combine_temp_slots. */
e5e809f4 198 HOST_WIDE_INT base_offset;
fc91b0d0
RK
199 /* The size of the slot, including extra space for alignment. This
200 info is for combine_temp_slots. */
e5e809f4 201 HOST_WIDE_INT full_size;
6f086dfc 202};
6f086dfc 203\f
e15679f8
RK
204/* This structure is used to record MEMs or pseudos used to replace VAR, any
205 SUBREGs of VAR, and any MEMs containing VAR as an address. We need to
206 maintain this list in case two operands of an insn were required to match;
207 in that case we must ensure we use the same replacement. */
208
209struct fixup_replacement
210{
211 rtx old;
212 rtx new;
213 struct fixup_replacement *next;
214};
215
fe9b4957
MM
216struct insns_for_mem_entry {
217 /* The KEY in HE will be a MEM. */
218 struct hash_entry he;
219 /* These are the INSNS which reference the MEM. */
220 rtx insns;
221};
222
e15679f8
RK
223/* Forward declarations. */
224
e2ecd91c 225static rtx assign_stack_local_1 PROTO ((enum machine_mode, HOST_WIDE_INT,
1ac4f799 226 int, struct function *));
d16790f2
JW
227static rtx assign_stack_temp_for_type PROTO ((enum machine_mode, HOST_WIDE_INT,
228 int, tree));
e15679f8
RK
229static struct temp_slot *find_temp_slot_from_address PROTO((rtx));
230static void put_reg_into_stack PROTO((struct function *, rtx, tree,
0006e95b 231 enum machine_mode, enum machine_mode,
fe9b4957
MM
232 int, int, int,
233 struct hash_table *));
234static void fixup_var_refs PROTO((rtx, enum machine_mode, int,
235 struct hash_table *));
e15679f8
RK
236static struct fixup_replacement
237 *find_fixup_replacement PROTO((struct fixup_replacement **, rtx));
238static void fixup_var_refs_insns PROTO((rtx, enum machine_mode, int,
fe9b4957 239 rtx, int, struct hash_table *));
e15679f8
RK
240static void fixup_var_refs_1 PROTO((rtx, enum machine_mode, rtx *, rtx,
241 struct fixup_replacement **));
242static rtx fixup_memory_subreg PROTO((rtx, rtx, int));
243static rtx walk_fixup_memory_subreg PROTO((rtx, rtx, int));
244static rtx fixup_stack_1 PROTO((rtx, rtx));
245static void optimize_bit_field PROTO((rtx, rtx, rtx *));
246static void instantiate_decls PROTO((tree, int));
247static void instantiate_decls_1 PROTO((tree, int));
248static void instantiate_decl PROTO((rtx, int, int));
249static int instantiate_virtual_regs_1 PROTO((rtx *, rtx, int));
250static void delete_handlers PROTO((void));
251static void pad_to_arg_alignment PROTO((struct args_size *, int));
51723711 252#ifndef ARGS_GROW_DOWNWARD
e15679f8
RK
253static void pad_below PROTO((struct args_size *, enum machine_mode,
254 tree));
51723711 255#endif
487a6e06 256#ifdef ARGS_GROW_DOWNWARD
e15679f8 257static tree round_down PROTO((tree, int));
487a6e06 258#endif
e15679f8
RK
259static rtx round_trampoline_addr PROTO((rtx));
260static tree blocks_nreverse PROTO((tree));
261static int all_blocks PROTO((tree, tree *));
081f5e7e 262#if defined (HAVE_prologue) || defined (HAVE_epilogue)
487a6e06 263static int *record_insns PROTO((rtx));
e15679f8 264static int contains PROTO((rtx, int *));
081f5e7e 265#endif /* HAVE_prologue || HAVE_epilogue */
fe9b4957
MM
266static void put_addressof_into_stack PROTO((rtx, struct hash_table *));
267static void purge_addressof_1 PROTO((rtx *, rtx, int, int,
268 struct hash_table *));
269static struct hash_entry *insns_for_mem_newfunc PROTO((struct hash_entry *,
270 struct hash_table *,
271 hash_table_key));
272static unsigned long insns_for_mem_hash PROTO ((hash_table_key));
273static boolean insns_for_mem_comp PROTO ((hash_table_key, hash_table_key));
274static int insns_for_mem_walk PROTO ((rtx *, void *));
275static void compute_insns_for_mem PROTO ((rtx, rtx, struct hash_table *));
87ff9c8e
RH
276static void mark_temp_slot PROTO ((struct temp_slot *));
277static void mark_function_state PROTO ((struct function *));
278static void mark_function_chain PROTO ((void *));
fe9b4957 279
c20bf1f3 280\f
6f086dfc
RS
281/* Pointer to chain of `struct function' for containing functions. */
282struct function *outer_function_chain;
283
284/* Given a function decl for a containing function,
285 return the `struct function' for it. */
286
287struct function *
288find_function_data (decl)
289 tree decl;
290{
291 struct function *p;
e5e809f4 292
6f086dfc
RS
293 for (p = outer_function_chain; p; p = p->next)
294 if (p->decl == decl)
295 return p;
e5e809f4 296
6f086dfc
RS
297 abort ();
298}
299
300/* Save the current context for compilation of a nested function.
8c5666b4
BS
301 This is called from language-specific code. The caller should use
302 the save_lang_status callback to save any language-specific state,
303 since this function knows only about language-independent
304 variables. */
6f086dfc
RS
305
306void
a0dabda5
JM
307push_function_context_to (context)
308 tree context;
6f086dfc 309{
36edd3cc
BS
310 struct function *p, *context_data;
311
312 if (context)
313 {
314 context_data = (context == current_function_decl
315 ? current_function
316 : find_function_data (context));
317 context_data->contains_functions = 1;
318 }
b384405b
BS
319
320 if (current_function == 0)
321 init_dummy_function_start ();
322 p = current_function;
6f086dfc
RS
323
324 p->next = outer_function_chain;
325 outer_function_chain = p;
6f086dfc 326 p->decl = current_function_decl;
6f086dfc
RS
327 p->fixup_var_refs_queue = 0;
328
36edd3cc 329 save_tree_status (p);
8c5666b4
BS
330 if (save_lang_status)
331 (*save_lang_status) (p);
46766466
RS
332 if (save_machine_status)
333 (*save_machine_status) (p);
b384405b
BS
334
335 current_function = 0;
6f086dfc
RS
336}
337
e4a4639e
JM
338void
339push_function_context ()
340{
a0dabda5 341 push_function_context_to (current_function_decl);
e4a4639e
JM
342}
343
6f086dfc
RS
344/* Restore the last saved context, at the end of a nested function.
345 This function is called from language-specific code. */
346
347void
a0dabda5
JM
348pop_function_context_from (context)
349 tree context;
6f086dfc
RS
350{
351 struct function *p = outer_function_chain;
e5e809f4 352 struct var_refs_queue *queue;
a3770a81 353 struct var_refs_queue *next;
6f086dfc 354
b384405b 355 current_function = p;
6f086dfc
RS
356 outer_function_chain = p->next;
357
6f086dfc 358 current_function_decl = p->decl;
7cbc7b0c 359 reg_renumber = 0;
6f086dfc 360
36edd3cc 361 restore_tree_status (p);
6f086dfc 362 restore_emit_status (p);
6f086dfc 363
46766466
RS
364 if (restore_machine_status)
365 (*restore_machine_status) (p);
8c5666b4
BS
366 if (restore_lang_status)
367 (*restore_lang_status) (p);
46766466 368
6f086dfc
RS
369 /* Finish doing put_var_into_stack for any of our variables
370 which became addressable during the nested function. */
a3770a81
RH
371 for (queue = p->fixup_var_refs_queue; queue; queue = next)
372 {
373 next = queue->next;
374 fixup_var_refs (queue->modified, queue->promoted_mode,
375 queue->unsignedp, 0);
376 free (queue);
377 }
378 p->fixup_var_refs_queue = 0;
6f086dfc 379
6f086dfc
RS
380 /* Reset variables that have known state during rtx generation. */
381 rtx_equal_function_value_matters = 1;
382 virtuals_instantiated = 0;
383}
e4a4639e 384
36edd3cc
BS
385void
386pop_function_context ()
e4a4639e 387{
a0dabda5 388 pop_function_context_from (current_function_decl);
e4a4639e 389}
e2ecd91c
BS
390
391/* Clear out all parts of the state in F that can safely be discarded
392 after the function has been compiled, to let garbage collection
393 reclaim the memory. */
394void
395free_after_compilation (f)
396 struct function *f;
397{
398 free_emit_status (f);
399 free_varasm_status (f);
400
401 free (f->x_parm_reg_stack_loc);
402
403 f->can_garbage_collect = 1;
404}
6f086dfc
RS
405\f
406/* Allocate fixed slots in the stack frame of the current function. */
407
49ad7cfa
BS
408/* Return size needed for stack frame based on slots so far allocated in
409 function F.
c795bca9 410 This size counts from zero. It is not rounded to PREFERRED_STACK_BOUNDARY;
6f086dfc
RS
411 the caller may have to do that. */
412
8af5168b 413HOST_WIDE_INT
49ad7cfa
BS
414get_func_frame_size (f)
415 struct function *f;
6f086dfc
RS
416{
417#ifdef FRAME_GROWS_DOWNWARD
49ad7cfa 418 return -f->x_frame_offset;
6f086dfc 419#else
49ad7cfa 420 return f->x_frame_offset;
6f086dfc
RS
421#endif
422}
423
49ad7cfa
BS
424/* Return size needed for stack frame based on slots so far allocated.
425 This size counts from zero. It is not rounded to PREFERRED_STACK_BOUNDARY;
426 the caller may have to do that. */
427HOST_WIDE_INT
428get_frame_size ()
429{
430 return get_func_frame_size (current_function);
431}
432
6f086dfc
RS
433/* Allocate a stack slot of SIZE bytes and return a MEM rtx for it
434 with machine mode MODE.
435
436 ALIGN controls the amount of alignment for the address of the slot:
437 0 means according to MODE,
438 -1 means use BIGGEST_ALIGNMENT and round size to multiple of that,
439 positive specifies alignment boundary in bits.
440
e2ecd91c 441 We do not round to stack_boundary here.
6f086dfc 442
e2ecd91c
BS
443 FUNCTION specifies the function to allocate in. */
444
445static rtx
446assign_stack_local_1 (mode, size, align, function)
6f086dfc 447 enum machine_mode mode;
e5e809f4 448 HOST_WIDE_INT size;
6f086dfc 449 int align;
e2ecd91c 450 struct function *function;
6f086dfc
RS
451{
452 register rtx x, addr;
453 int bigend_correction = 0;
454 int alignment;
455
e2ecd91c
BS
456 /* Allocate in the memory associated with the function in whose frame
457 we are assigning. */
458 if (function != current_function)
459 push_obstacks (function->function_obstack,
460 function->function_maybepermanent_obstack);
461
6f086dfc
RS
462 if (align == 0)
463 {
d16790f2
JW
464 tree type;
465
466 alignment = GET_MODE_ALIGNMENT (mode);
6f086dfc 467 if (mode == BLKmode)
d16790f2
JW
468 alignment = BIGGEST_ALIGNMENT;
469
470 /* Allow the target to (possibly) increase the alignment of this
471 stack slot. */
472 type = type_for_mode (mode, 0);
473 if (type)
474 alignment = LOCAL_ALIGNMENT (type, alignment);
475
476 alignment /= BITS_PER_UNIT;
6f086dfc
RS
477 }
478 else if (align == -1)
479 {
480 alignment = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
481 size = CEIL_ROUND (size, alignment);
482 }
483 else
484 alignment = align / BITS_PER_UNIT;
485
1474e303 486#ifdef FRAME_GROWS_DOWNWARD
e2ecd91c 487 function->x_frame_offset -= size;
1474e303
JL
488#endif
489
6f086dfc
RS
490 /* Round frame offset to that alignment.
491 We must be careful here, since FRAME_OFFSET might be negative and
492 division with a negative dividend isn't as well defined as we might
493 like. So we instead assume that ALIGNMENT is a power of two and
494 use logical operations which are unambiguous. */
495#ifdef FRAME_GROWS_DOWNWARD
e2ecd91c 496 function->x_frame_offset = FLOOR_ROUND (function->x_frame_offset, alignment);
6f086dfc 497#else
e2ecd91c 498 function->x_frame_offset = CEIL_ROUND (function->x_frame_offset, alignment);
6f086dfc
RS
499#endif
500
501 /* On a big-endian machine, if we are allocating more space than we will use,
502 use the least significant bytes of those that are allocated. */
f76b9db2 503 if (BYTES_BIG_ENDIAN && mode != BLKmode)
6f086dfc 504 bigend_correction = size - GET_MODE_SIZE (mode);
6f086dfc 505
6f086dfc
RS
506 /* If we have already instantiated virtual registers, return the actual
507 address relative to the frame pointer. */
e2ecd91c 508 if (function == current_function && virtuals_instantiated)
6f086dfc
RS
509 addr = plus_constant (frame_pointer_rtx,
510 (frame_offset + bigend_correction
511 + STARTING_FRAME_OFFSET));
512 else
513 addr = plus_constant (virtual_stack_vars_rtx,
514 frame_offset + bigend_correction);
515
516#ifndef FRAME_GROWS_DOWNWARD
e2ecd91c 517 function->x_frame_offset += size;
6f086dfc
RS
518#endif
519
38a448ca 520 x = gen_rtx_MEM (mode, addr);
6f086dfc 521
e2ecd91c
BS
522 function->x_stack_slot_list
523 = gen_rtx_EXPR_LIST (VOIDmode, x, function->x_stack_slot_list);
524
525 if (function != current_function)
526 pop_obstacks ();
6f086dfc
RS
527
528 return x;
529}
530
e2ecd91c
BS
531/* Wrapper around assign_stack_local_1; assign a local stack slot for the
532 current function. */
533rtx
534assign_stack_local (mode, size, align)
6f086dfc 535 enum machine_mode mode;
e5e809f4 536 HOST_WIDE_INT size;
6f086dfc 537 int align;
6f086dfc 538{
e2ecd91c 539 return assign_stack_local_1 (mode, size, align, current_function);
6f086dfc
RS
540}
541\f
542/* Allocate a temporary stack slot and record it for possible later
543 reuse.
544
545 MODE is the machine mode to be given to the returned rtx.
546
547 SIZE is the size in units of the space required. We do no rounding here
548 since assign_stack_local will do any required rounding.
549
d93d4205
MS
550 KEEP is 1 if this slot is to be retained after a call to
551 free_temp_slots. Automatic variables for a block are allocated
e5e809f4
JL
552 with this flag. KEEP is 2 if we allocate a longer term temporary,
553 whose lifetime is controlled by CLEANUP_POINT_EXPRs. KEEP is 3
554 if we are to allocate something at an inner level to be treated as
a4c6502a
MM
555 a variable in the block (e.g., a SAVE_EXPR).
556
557 TYPE is the type that will be used for the stack slot. */
6f086dfc 558
d16790f2
JW
559static rtx
560assign_stack_temp_for_type (mode, size, keep, type)
6f086dfc 561 enum machine_mode mode;
e5e809f4 562 HOST_WIDE_INT size;
6f086dfc 563 int keep;
d16790f2 564 tree type;
6f086dfc 565{
d16790f2 566 int align;
a4c6502a 567 int alias_set;
6f086dfc
RS
568 struct temp_slot *p, *best_p = 0;
569
303ec2aa
RK
570 /* If SIZE is -1 it means that somebody tried to allocate a temporary
571 of a variable size. */
572 if (size == -1)
573 abort ();
574
a4c6502a
MM
575 /* If we know the alias set for the memory that will be used, use
576 it. If there's no TYPE, then we don't know anything about the
577 alias set for the memory. */
578 if (type)
579 alias_set = get_alias_set (type);
580 else
581 alias_set = 0;
582
d16790f2
JW
583 align = GET_MODE_ALIGNMENT (mode);
584 if (mode == BLKmode)
585 align = BIGGEST_ALIGNMENT;
6f086dfc 586
d16790f2
JW
587 if (! type)
588 type = type_for_mode (mode, 0);
589 if (type)
590 align = LOCAL_ALIGNMENT (type, align);
591
592 /* Try to find an available, already-allocated temporary of the proper
593 mode which meets the size and alignment requirements. Choose the
594 smallest one with the closest alignment. */
595 for (p = temp_slots; p; p = p->next)
596 if (p->align >= align && p->size >= size && GET_MODE (p->slot) == mode
597 && ! p->in_use
a4c6502a
MM
598 && (!flag_strict_aliasing
599 || (alias_set && p->alias_set == alias_set))
d16790f2
JW
600 && (best_p == 0 || best_p->size > p->size
601 || (best_p->size == p->size && best_p->align > p->align)))
602 {
603 if (p->align == align && p->size == size)
604 {
605 best_p = 0;
606 break;
607 }
6f086dfc 608 best_p = p;
d16790f2 609 }
6f086dfc
RS
610
611 /* Make our best, if any, the one to use. */
612 if (best_p)
a45035b6
JW
613 {
614 /* If there are enough aligned bytes left over, make them into a new
615 temp_slot so that the extra bytes don't get wasted. Do this only
616 for BLKmode slots, so that we can be sure of the alignment. */
a4c6502a
MM
617 if (GET_MODE (best_p->slot) == BLKmode
618 /* We can't split slots if -fstrict-aliasing because the
619 information about the alias set for the new slot will be
620 lost. */
621 && !flag_strict_aliasing)
a45035b6 622 {
d16790f2 623 int alignment = best_p->align / BITS_PER_UNIT;
e5e809f4 624 HOST_WIDE_INT rounded_size = CEIL_ROUND (size, alignment);
a45035b6
JW
625
626 if (best_p->size - rounded_size >= alignment)
627 {
628 p = (struct temp_slot *) oballoc (sizeof (struct temp_slot));
a25d4ba2 629 p->in_use = p->addr_taken = 0;
a45035b6 630 p->size = best_p->size - rounded_size;
307d8cd6
RK
631 p->base_offset = best_p->base_offset + rounded_size;
632 p->full_size = best_p->full_size - rounded_size;
38a448ca
RH
633 p->slot = gen_rtx_MEM (BLKmode,
634 plus_constant (XEXP (best_p->slot, 0),
635 rounded_size));
d16790f2 636 p->align = best_p->align;
e5e76139 637 p->address = 0;
84e24c03 638 p->rtl_expr = 0;
a45035b6
JW
639 p->next = temp_slots;
640 temp_slots = p;
641
38a448ca
RH
642 stack_slot_list = gen_rtx_EXPR_LIST (VOIDmode, p->slot,
643 stack_slot_list);
a45035b6
JW
644
645 best_p->size = rounded_size;
291dde90 646 best_p->full_size = rounded_size;
a45035b6
JW
647 }
648 }
649
650 p = best_p;
651 }
652
6f086dfc
RS
653 /* If we still didn't find one, make a new temporary. */
654 if (p == 0)
655 {
e5e809f4
JL
656 HOST_WIDE_INT frame_offset_old = frame_offset;
657
6f086dfc 658 p = (struct temp_slot *) oballoc (sizeof (struct temp_slot));
e5e809f4 659
c87a0a39
JL
660 /* We are passing an explicit alignment request to assign_stack_local.
661 One side effect of that is assign_stack_local will not round SIZE
662 to ensure the frame offset remains suitably aligned.
663
664 So for requests which depended on the rounding of SIZE, we go ahead
665 and round it now. We also make sure ALIGNMENT is at least
666 BIGGEST_ALIGNMENT. */
010529e5 667 if (mode == BLKmode && align < BIGGEST_ALIGNMENT)
6f67a30d
JW
668 abort();
669 p->slot = assign_stack_local (mode,
010529e5
AS
670 (mode == BLKmode
671 ? CEIL_ROUND (size, align / BITS_PER_UNIT)
672 : size),
6f67a30d 673 align);
d16790f2
JW
674
675 p->align = align;
a4c6502a 676 p->alias_set = alias_set;
e5e809f4 677
b2a80c0d
DE
678 /* The following slot size computation is necessary because we don't
679 know the actual size of the temporary slot until assign_stack_local
680 has performed all the frame alignment and size rounding for the
fc91b0d0
RK
681 requested temporary. Note that extra space added for alignment
682 can be either above or below this stack slot depending on which
683 way the frame grows. We include the extra space if and only if it
684 is above this slot. */
b2a80c0d
DE
685#ifdef FRAME_GROWS_DOWNWARD
686 p->size = frame_offset_old - frame_offset;
687#else
fc91b0d0
RK
688 p->size = size;
689#endif
e5e809f4 690
fc91b0d0
RK
691 /* Now define the fields used by combine_temp_slots. */
692#ifdef FRAME_GROWS_DOWNWARD
693 p->base_offset = frame_offset;
694 p->full_size = frame_offset_old - frame_offset;
695#else
696 p->base_offset = frame_offset_old;
697 p->full_size = frame_offset - frame_offset_old;
b2a80c0d 698#endif
e5e76139 699 p->address = 0;
6f086dfc
RS
700 p->next = temp_slots;
701 temp_slots = p;
702 }
703
704 p->in_use = 1;
a25d4ba2 705 p->addr_taken = 0;
49ad7cfa 706 p->rtl_expr = seq_rtl_expr;
a25d4ba2 707
d93d4205
MS
708 if (keep == 2)
709 {
710 p->level = target_temp_slot_level;
711 p->keep = 0;
712 }
e5e809f4
JL
713 else if (keep == 3)
714 {
715 p->level = var_temp_slot_level;
716 p->keep = 0;
717 }
d93d4205
MS
718 else
719 {
720 p->level = temp_slot_level;
721 p->keep = keep;
722 }
1995f267
RK
723
724 /* We may be reusing an old slot, so clear any MEM flags that may have been
725 set from before. */
726 RTX_UNCHANGING_P (p->slot) = 0;
727 MEM_IN_STRUCT_P (p->slot) = 0;
c6df88cb
MM
728 MEM_SCALAR_P (p->slot) = 0;
729 MEM_ALIAS_SET (p->slot) = 0;
6f086dfc
RS
730 return p->slot;
731}
d16790f2
JW
732
733/* Allocate a temporary stack slot and record it for possible later
734 reuse. First three arguments are same as in preceding function. */
735
736rtx
737assign_stack_temp (mode, size, keep)
738 enum machine_mode mode;
739 HOST_WIDE_INT size;
740 int keep;
741{
742 return assign_stack_temp_for_type (mode, size, keep, NULL_TREE);
743}
638141a6 744\f
230f21b4
PB
745/* Assign a temporary of given TYPE.
746 KEEP is as for assign_stack_temp.
747 MEMORY_REQUIRED is 1 if the result must be addressable stack memory;
b55d9ff8
RK
748 it is 0 if a register is OK.
749 DONT_PROMOTE is 1 if we should not promote values in register
750 to wider modes. */
230f21b4
PB
751
752rtx
b55d9ff8 753assign_temp (type, keep, memory_required, dont_promote)
230f21b4
PB
754 tree type;
755 int keep;
756 int memory_required;
b55d9ff8 757 int dont_promote;
230f21b4
PB
758{
759 enum machine_mode mode = TYPE_MODE (type);
638141a6
RK
760 int unsignedp = TREE_UNSIGNED (type);
761
230f21b4
PB
762 if (mode == BLKmode || memory_required)
763 {
e5e809f4 764 HOST_WIDE_INT size = int_size_in_bytes (type);
230f21b4
PB
765 rtx tmp;
766
767 /* Unfortunately, we don't yet know how to allocate variable-sized
768 temporaries. However, sometimes we have a fixed upper limit on
769 the size (which is stored in TYPE_ARRAY_MAX_SIZE) and can use that
0f41302f 770 instead. This is the case for Chill variable-sized strings. */
230f21b4
PB
771 if (size == -1 && TREE_CODE (type) == ARRAY_TYPE
772 && TYPE_ARRAY_MAX_SIZE (type) != NULL_TREE
773 && TREE_CODE (TYPE_ARRAY_MAX_SIZE (type)) == INTEGER_CST)
774 size = TREE_INT_CST_LOW (TYPE_ARRAY_MAX_SIZE (type));
775
d16790f2 776 tmp = assign_stack_temp_for_type (mode, size, keep, type);
c6df88cb 777 MEM_SET_IN_STRUCT_P (tmp, AGGREGATE_TYPE_P (type));
230f21b4
PB
778 return tmp;
779 }
638141a6 780
230f21b4 781#ifndef PROMOTE_FOR_CALL_ONLY
b55d9ff8
RK
782 if (! dont_promote)
783 mode = promote_mode (type, mode, &unsignedp, 0);
230f21b4 784#endif
638141a6 785
230f21b4
PB
786 return gen_reg_rtx (mode);
787}
638141a6 788\f
a45035b6
JW
789/* Combine temporary stack slots which are adjacent on the stack.
790
791 This allows for better use of already allocated stack space. This is only
792 done for BLKmode slots because we can be sure that we won't have alignment
793 problems in this case. */
794
795void
796combine_temp_slots ()
797{
798 struct temp_slot *p, *q;
799 struct temp_slot *prev_p, *prev_q;
e5e809f4
JL
800 int num_slots;
801
a4c6502a
MM
802 /* We can't combine slots, because the information about which slot
803 is in which alias set will be lost. */
804 if (flag_strict_aliasing)
805 return;
806
e5e809f4
JL
807 /* If there are a lot of temp slots, don't do anything unless
808 high levels of optimizaton. */
809 if (! flag_expensive_optimizations)
810 for (p = temp_slots, num_slots = 0; p; p = p->next, num_slots++)
811 if (num_slots > 100 || (num_slots > 10 && optimize == 0))
812 return;
a45035b6 813
e9b7093a
RS
814 for (p = temp_slots, prev_p = 0; p; p = prev_p ? prev_p->next : temp_slots)
815 {
816 int delete_p = 0;
e5e809f4 817
e9b7093a
RS
818 if (! p->in_use && GET_MODE (p->slot) == BLKmode)
819 for (q = p->next, prev_q = p; q; q = prev_q->next)
a45035b6 820 {
e9b7093a
RS
821 int delete_q = 0;
822 if (! q->in_use && GET_MODE (q->slot) == BLKmode)
a45035b6 823 {
fc91b0d0 824 if (p->base_offset + p->full_size == q->base_offset)
e9b7093a
RS
825 {
826 /* Q comes after P; combine Q into P. */
827 p->size += q->size;
307d8cd6 828 p->full_size += q->full_size;
e9b7093a
RS
829 delete_q = 1;
830 }
fc91b0d0 831 else if (q->base_offset + q->full_size == p->base_offset)
e9b7093a
RS
832 {
833 /* P comes after Q; combine P into Q. */
834 q->size += p->size;
307d8cd6 835 q->full_size += p->full_size;
e9b7093a
RS
836 delete_p = 1;
837 break;
838 }
a45035b6 839 }
e9b7093a
RS
840 /* Either delete Q or advance past it. */
841 if (delete_q)
842 prev_q->next = q->next;
843 else
844 prev_q = q;
a45035b6 845 }
e9b7093a
RS
846 /* Either delete P or advance past it. */
847 if (delete_p)
848 {
849 if (prev_p)
850 prev_p->next = p->next;
851 else
852 temp_slots = p->next;
853 }
854 else
855 prev_p = p;
856 }
a45035b6 857}
6f086dfc 858\f
e5e76139
RK
859/* Find the temp slot corresponding to the object at address X. */
860
861static struct temp_slot *
862find_temp_slot_from_address (x)
863 rtx x;
864{
865 struct temp_slot *p;
866 rtx next;
867
868 for (p = temp_slots; p; p = p->next)
869 {
870 if (! p->in_use)
871 continue;
e5e809f4 872
e5e76139 873 else if (XEXP (p->slot, 0) == x
abb52246
RK
874 || p->address == x
875 || (GET_CODE (x) == PLUS
876 && XEXP (x, 0) == virtual_stack_vars_rtx
877 && GET_CODE (XEXP (x, 1)) == CONST_INT
878 && INTVAL (XEXP (x, 1)) >= p->base_offset
879 && INTVAL (XEXP (x, 1)) < p->base_offset + p->full_size))
e5e76139
RK
880 return p;
881
882 else if (p->address != 0 && GET_CODE (p->address) == EXPR_LIST)
883 for (next = p->address; next; next = XEXP (next, 1))
884 if (XEXP (next, 0) == x)
885 return p;
886 }
887
888 return 0;
889}
890
9faa82d8 891/* Indicate that NEW is an alternate way of referring to the temp slot
e5e809f4 892 that previously was known by OLD. */
e5e76139
RK
893
894void
895update_temp_slot_address (old, new)
896 rtx old, new;
897{
898 struct temp_slot *p = find_temp_slot_from_address (old);
899
900 /* If none, return. Else add NEW as an alias. */
901 if (p == 0)
902 return;
903 else if (p->address == 0)
904 p->address = new;
905 else
906 {
907 if (GET_CODE (p->address) != EXPR_LIST)
38a448ca 908 p->address = gen_rtx_EXPR_LIST (VOIDmode, p->address, NULL_RTX);
e5e76139 909
38a448ca 910 p->address = gen_rtx_EXPR_LIST (VOIDmode, new, p->address);
e5e76139
RK
911 }
912}
913
a25d4ba2 914/* If X could be a reference to a temporary slot, mark the fact that its
9faa82d8 915 address was taken. */
a25d4ba2
RK
916
917void
918mark_temp_addr_taken (x)
919 rtx x;
920{
921 struct temp_slot *p;
922
923 if (x == 0)
924 return;
925
926 /* If X is not in memory or is at a constant address, it cannot be in
927 a temporary slot. */
928 if (GET_CODE (x) != MEM || CONSTANT_P (XEXP (x, 0)))
929 return;
930
931 p = find_temp_slot_from_address (XEXP (x, 0));
932 if (p != 0)
933 p->addr_taken = 1;
934}
935
9cca6a99
MS
936/* If X could be a reference to a temporary slot, mark that slot as
937 belonging to the to one level higher than the current level. If X
938 matched one of our slots, just mark that one. Otherwise, we can't
939 easily predict which it is, so upgrade all of them. Kept slots
940 need not be touched.
6f086dfc
RS
941
942 This is called when an ({...}) construct occurs and a statement
943 returns a value in memory. */
944
945void
946preserve_temp_slots (x)
947 rtx x;
948{
a25d4ba2 949 struct temp_slot *p = 0;
6f086dfc 950
73620b82
RK
951 /* If there is no result, we still might have some objects whose address
952 were taken, so we need to make sure they stay around. */
e3a77161 953 if (x == 0)
73620b82
RK
954 {
955 for (p = temp_slots; p; p = p->next)
956 if (p->in_use && p->level == temp_slot_level && p->addr_taken)
957 p->level--;
958
959 return;
960 }
e3a77161
RK
961
962 /* If X is a register that is being used as a pointer, see if we have
963 a temporary slot we know it points to. To be consistent with
964 the code below, we really should preserve all non-kept slots
965 if we can't find a match, but that seems to be much too costly. */
a25d4ba2
RK
966 if (GET_CODE (x) == REG && REGNO_POINTER_FLAG (REGNO (x)))
967 p = find_temp_slot_from_address (x);
968
6f086dfc 969 /* If X is not in memory or is at a constant address, it cannot be in
e19571db
RK
970 a temporary slot, but it can contain something whose address was
971 taken. */
a25d4ba2 972 if (p == 0 && (GET_CODE (x) != MEM || CONSTANT_P (XEXP (x, 0))))
e19571db
RK
973 {
974 for (p = temp_slots; p; p = p->next)
975 if (p->in_use && p->level == temp_slot_level && p->addr_taken)
976 p->level--;
977
978 return;
979 }
6f086dfc
RS
980
981 /* First see if we can find a match. */
73620b82 982 if (p == 0)
a25d4ba2
RK
983 p = find_temp_slot_from_address (XEXP (x, 0));
984
e5e76139
RK
985 if (p != 0)
986 {
a25d4ba2
RK
987 /* Move everything at our level whose address was taken to our new
988 level in case we used its address. */
989 struct temp_slot *q;
990
9cca6a99
MS
991 if (p->level == temp_slot_level)
992 {
993 for (q = temp_slots; q; q = q->next)
994 if (q != p && q->addr_taken && q->level == p->level)
995 q->level--;
a25d4ba2 996
9cca6a99
MS
997 p->level--;
998 p->addr_taken = 0;
999 }
e5e76139
RK
1000 return;
1001 }
6f086dfc
RS
1002
1003 /* Otherwise, preserve all non-kept slots at this level. */
1004 for (p = temp_slots; p; p = p->next)
1005 if (p->in_use && p->level == temp_slot_level && ! p->keep)
1006 p->level--;
1007}
1008
422c8f63
RK
1009/* X is the result of an RTL_EXPR. If it is a temporary slot associated
1010 with that RTL_EXPR, promote it into a temporary slot at the present
1011 level so it will not be freed when we free slots made in the
1012 RTL_EXPR. */
1013
1014void
1015preserve_rtl_expr_result (x)
1016 rtx x;
1017{
1018 struct temp_slot *p;
1019
1020 /* If X is not in memory or is at a constant address, it cannot be in
1021 a temporary slot. */
1022 if (x == 0 || GET_CODE (x) != MEM || CONSTANT_P (XEXP (x, 0)))
1023 return;
1024
199b61d8
RK
1025 /* If we can find a match, move it to our level unless it is already at
1026 an upper level. */
1027 p = find_temp_slot_from_address (XEXP (x, 0));
1028 if (p != 0)
1029 {
1030 p->level = MIN (p->level, temp_slot_level);
1031 p->rtl_expr = 0;
1032 }
422c8f63
RK
1033
1034 return;
1035}
1036
6f086dfc 1037/* Free all temporaries used so far. This is normally called at the end
e7a84011
RK
1038 of generating code for a statement. Don't free any temporaries
1039 currently in use for an RTL_EXPR that hasn't yet been emitted.
1040 We could eventually do better than this since it can be reused while
1041 generating the same RTL_EXPR, but this is complex and probably not
1042 worthwhile. */
6f086dfc
RS
1043
1044void
1045free_temp_slots ()
1046{
1047 struct temp_slot *p;
1048
1049 for (p = temp_slots; p; p = p->next)
e7a84011
RK
1050 if (p->in_use && p->level == temp_slot_level && ! p->keep
1051 && p->rtl_expr == 0)
1052 p->in_use = 0;
1053
1054 combine_temp_slots ();
1055}
1056
1057/* Free all temporary slots used in T, an RTL_EXPR node. */
1058
1059void
1060free_temps_for_rtl_expr (t)
1061 tree t;
1062{
1063 struct temp_slot *p;
1064
1065 for (p = temp_slots; p; p = p->next)
1066 if (p->rtl_expr == t)
6f086dfc 1067 p->in_use = 0;
a45035b6
JW
1068
1069 combine_temp_slots ();
6f086dfc
RS
1070}
1071
956d6950 1072/* Mark all temporaries ever allocated in this function as not suitable
a94e4054
RK
1073 for reuse until the current level is exited. */
1074
1075void
1076mark_all_temps_used ()
1077{
1078 struct temp_slot *p;
1079
1080 for (p = temp_slots; p; p = p->next)
1081 {
85b119d1 1082 p->in_use = p->keep = 1;
27ce006b 1083 p->level = MIN (p->level, temp_slot_level);
a94e4054
RK
1084 }
1085}
1086
6f086dfc
RS
1087/* Push deeper into the nesting level for stack temporaries. */
1088
1089void
1090push_temp_slots ()
1091{
6f086dfc
RS
1092 temp_slot_level++;
1093}
1094
e5e809f4
JL
1095/* Likewise, but save the new level as the place to allocate variables
1096 for blocks. */
1097
1098void
1099push_temp_slots_for_block ()
1100{
1101 push_temp_slots ();
1102
1103 var_temp_slot_level = temp_slot_level;
1104}
1105
f5963e61
JL
1106/* Likewise, but save the new level as the place to allocate temporaries
1107 for TARGET_EXPRs. */
1108
1109void
1110push_temp_slots_for_target ()
1111{
1112 push_temp_slots ();
1113
1114 target_temp_slot_level = temp_slot_level;
1115}
1116
1117/* Set and get the value of target_temp_slot_level. The only
1118 permitted use of these functions is to save and restore this value. */
1119
1120int
1121get_target_temp_slot_level ()
1122{
1123 return target_temp_slot_level;
1124}
1125
1126void
1127set_target_temp_slot_level (level)
1128 int level;
1129{
1130 target_temp_slot_level = level;
1131}
1132
6f086dfc
RS
1133/* Pop a temporary nesting level. All slots in use in the current level
1134 are freed. */
1135
1136void
1137pop_temp_slots ()
1138{
1139 struct temp_slot *p;
1140
6f086dfc 1141 for (p = temp_slots; p; p = p->next)
e7a84011 1142 if (p->in_use && p->level == temp_slot_level && p->rtl_expr == 0)
6f086dfc
RS
1143 p->in_use = 0;
1144
a45035b6
JW
1145 combine_temp_slots ();
1146
6f086dfc
RS
1147 temp_slot_level--;
1148}
bc0ebdf9
RK
1149
1150/* Initialize temporary slots. */
1151
1152void
1153init_temp_slots ()
1154{
1155 /* We have not allocated any temporaries yet. */
1156 temp_slots = 0;
1157 temp_slot_level = 0;
e5e809f4 1158 var_temp_slot_level = 0;
bc0ebdf9
RK
1159 target_temp_slot_level = 0;
1160}
6f086dfc
RS
1161\f
1162/* Retroactively move an auto variable from a register to a stack slot.
1163 This is done when an address-reference to the variable is seen. */
1164
1165void
1166put_var_into_stack (decl)
1167 tree decl;
1168{
1169 register rtx reg;
00d8a4c1 1170 enum machine_mode promoted_mode, decl_mode;
6f086dfc 1171 struct function *function = 0;
c20bf1f3 1172 tree context;
e9a25f70 1173 int can_use_addressof;
c20bf1f3 1174
c20bf1f3 1175 context = decl_function_context (decl);
6f086dfc 1176
9ec36da5 1177 /* Get the current rtl used for this object and its original mode. */
6f086dfc 1178 reg = TREE_CODE (decl) == SAVE_EXPR ? SAVE_EXPR_RTL (decl) : DECL_RTL (decl);
2baccce2
RS
1179
1180 /* No need to do anything if decl has no rtx yet
1181 since in that case caller is setting TREE_ADDRESSABLE
1182 and a stack slot will be assigned when the rtl is made. */
1183 if (reg == 0)
1184 return;
00d8a4c1
RK
1185
1186 /* Get the declared mode for this object. */
1187 decl_mode = (TREE_CODE (decl) == SAVE_EXPR ? TYPE_MODE (TREE_TYPE (decl))
1188 : DECL_MODE (decl));
2baccce2
RS
1189 /* Get the mode it's actually stored in. */
1190 promoted_mode = GET_MODE (reg);
6f086dfc
RS
1191
1192 /* If this variable comes from an outer function,
1193 find that function's saved context. */
4ac74fb8 1194 if (context != current_function_decl && context != inline_function_decl)
6f086dfc
RS
1195 for (function = outer_function_chain; function; function = function->next)
1196 if (function->decl == context)
1197 break;
1198
6f086dfc
RS
1199 /* If this is a variable-size object with a pseudo to address it,
1200 put that pseudo into the stack, if the var is nonlocal. */
a82ad570 1201 if (DECL_NONLOCAL (decl)
6f086dfc
RS
1202 && GET_CODE (reg) == MEM
1203 && GET_CODE (XEXP (reg, 0)) == REG
1204 && REGNO (XEXP (reg, 0)) > LAST_VIRTUAL_REGISTER)
4cdb3e78
RS
1205 {
1206 reg = XEXP (reg, 0);
1207 decl_mode = promoted_mode = GET_MODE (reg);
1208 }
e15762df 1209
e9a25f70
JL
1210 can_use_addressof
1211 = (function == 0
e5e809f4 1212 && optimize > 0
e9a25f70
JL
1213 /* FIXME make it work for promoted modes too */
1214 && decl_mode == promoted_mode
1215#ifdef NON_SAVING_SETJMP
1216 && ! (NON_SAVING_SETJMP && current_function_calls_setjmp)
1217#endif
1218 );
1219
1220 /* If we can't use ADDRESSOF, make sure we see through one we already
1221 generated. */
1222 if (! can_use_addressof && GET_CODE (reg) == MEM
1223 && GET_CODE (XEXP (reg, 0)) == ADDRESSOF)
1224 reg = XEXP (XEXP (reg, 0), 0);
1225
293e3de4
RS
1226 /* Now we should have a value that resides in one or more pseudo regs. */
1227
1228 if (GET_CODE (reg) == REG)
e9a25f70
JL
1229 {
1230 /* If this variable lives in the current function and we don't need
1231 to put things in the stack for the sake of setjmp, try to keep it
1232 in a register until we know we actually need the address. */
1233 if (can_use_addressof)
1234 gen_mem_addressof (reg, decl);
1235 else
1236 put_reg_into_stack (function, reg, TREE_TYPE (decl),
1237 promoted_mode, decl_mode,
e5e809f4 1238 TREE_SIDE_EFFECTS (decl), 0,
fe9b4957
MM
1239 TREE_USED (decl) || DECL_INITIAL (decl) != 0,
1240 0);
e9a25f70 1241 }
293e3de4
RS
1242 else if (GET_CODE (reg) == CONCAT)
1243 {
1244 /* A CONCAT contains two pseudos; put them both in the stack.
1245 We do it so they end up consecutive. */
1246 enum machine_mode part_mode = GET_MODE (XEXP (reg, 0));
1247 tree part_type = TREE_TYPE (TREE_TYPE (decl));
4738c10d 1248#ifdef FRAME_GROWS_DOWNWARD
293e3de4 1249 /* Since part 0 should have a lower address, do it second. */
0006e95b 1250 put_reg_into_stack (function, XEXP (reg, 1), part_type, part_mode,
e5e809f4 1251 part_mode, TREE_SIDE_EFFECTS (decl), 0,
fe9b4957
MM
1252 TREE_USED (decl) || DECL_INITIAL (decl) != 0,
1253 0);
0006e95b 1254 put_reg_into_stack (function, XEXP (reg, 0), part_type, part_mode,
e5e809f4 1255 part_mode, TREE_SIDE_EFFECTS (decl), 0,
fe9b4957
MM
1256 TREE_USED (decl) || DECL_INITIAL (decl) != 0,
1257 0);
293e3de4 1258#else
0006e95b 1259 put_reg_into_stack (function, XEXP (reg, 0), part_type, part_mode,
e5e809f4 1260 part_mode, TREE_SIDE_EFFECTS (decl), 0,
fe9b4957
MM
1261 TREE_USED (decl) || DECL_INITIAL (decl) != 0,
1262 0);
0006e95b 1263 put_reg_into_stack (function, XEXP (reg, 1), part_type, part_mode,
e5e809f4 1264 part_mode, TREE_SIDE_EFFECTS (decl), 0,
fe9b4957
MM
1265 TREE_USED (decl) || DECL_INITIAL (decl) != 0,
1266 0);
293e3de4
RS
1267#endif
1268
1269 /* Change the CONCAT into a combined MEM for both parts. */
1270 PUT_CODE (reg, MEM);
0006e95b 1271 MEM_VOLATILE_P (reg) = MEM_VOLATILE_P (XEXP (reg, 0));
41472af8 1272 MEM_ALIAS_SET (reg) = get_alias_set (decl);
0006e95b 1273
293e3de4
RS
1274 /* The two parts are in memory order already.
1275 Use the lower parts address as ours. */
1276 XEXP (reg, 0) = XEXP (XEXP (reg, 0), 0);
1277 /* Prevent sharing of rtl that might lose. */
1278 if (GET_CODE (XEXP (reg, 0)) == PLUS)
1279 XEXP (reg, 0) = copy_rtx (XEXP (reg, 0));
1280 }
86fa911a
RK
1281 else
1282 return;
1283
7d384cc0 1284 if (current_function_check_memory_usage)
86fa911a 1285 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,
6a9c4aed 1286 XEXP (reg, 0), Pmode,
86fa911a
RK
1287 GEN_INT (GET_MODE_SIZE (GET_MODE (reg))),
1288 TYPE_MODE (sizetype),
956d6950
JL
1289 GEN_INT (MEMORY_USE_RW),
1290 TYPE_MODE (integer_type_node));
293e3de4
RS
1291}
1292
1293/* Subroutine of put_var_into_stack. This puts a single pseudo reg REG
1294 into the stack frame of FUNCTION (0 means the current function).
1295 DECL_MODE is the machine mode of the user-level data type.
0006e95b 1296 PROMOTED_MODE is the machine mode of the register.
e5e809f4
JL
1297 VOLATILE_P is nonzero if this is for a "volatile" decl.
1298 USED_P is nonzero if this reg might have already been used in an insn. */
293e3de4
RS
1299
1300static void
e9a25f70 1301put_reg_into_stack (function, reg, type, promoted_mode, decl_mode, volatile_p,
fe9b4957 1302 original_regno, used_p, ht)
293e3de4
RS
1303 struct function *function;
1304 rtx reg;
1305 tree type;
1306 enum machine_mode promoted_mode, decl_mode;
0006e95b 1307 int volatile_p;
e9a25f70 1308 int original_regno;
e5e809f4 1309 int used_p;
fe9b4957 1310 struct hash_table *ht;
293e3de4 1311{
e2ecd91c 1312 struct function *func = function ? function : current_function;
293e3de4 1313 rtx new = 0;
e9a25f70
JL
1314 int regno = original_regno;
1315
1316 if (regno == 0)
1317 regno = REGNO (reg);
6f086dfc 1318
e2ecd91c
BS
1319 if (regno < func->x_max_parm_reg)
1320 new = func->x_parm_reg_stack_loc[regno];
1321 if (new == 0)
1322 new = assign_stack_local_1 (decl_mode, GET_MODE_SIZE (decl_mode), 0, func);
6f086dfc 1323
ef178af3 1324 PUT_CODE (reg, MEM);
0006e95b 1325 PUT_MODE (reg, decl_mode);
6f086dfc
RS
1326 XEXP (reg, 0) = XEXP (new, 0);
1327 /* `volatil' bit means one thing for MEMs, another entirely for REGs. */
0006e95b 1328 MEM_VOLATILE_P (reg) = volatile_p;
6f086dfc
RS
1329
1330 /* If this is a memory ref that contains aggregate components,
bdd3e6ab
JW
1331 mark it as such for cse and loop optimize. If we are reusing a
1332 previously generated stack slot, then we need to copy the bit in
1333 case it was set for other reasons. For instance, it is set for
1334 __builtin_va_alist. */
c6df88cb
MM
1335 MEM_SET_IN_STRUCT_P (reg,
1336 AGGREGATE_TYPE_P (type) || MEM_IN_STRUCT_P (new));
41472af8 1337 MEM_ALIAS_SET (reg) = get_alias_set (type);
6f086dfc
RS
1338
1339 /* Now make sure that all refs to the variable, previously made
1340 when it was a register, are fixed up to be valid again. */
e5e809f4
JL
1341
1342 if (used_p && function != 0)
6f086dfc
RS
1343 {
1344 struct var_refs_queue *temp;
1345
6f086dfc 1346 temp
a3770a81 1347 = (struct var_refs_queue *) xmalloc (sizeof (struct var_refs_queue));
6f086dfc 1348 temp->modified = reg;
00d8a4c1 1349 temp->promoted_mode = promoted_mode;
293e3de4 1350 temp->unsignedp = TREE_UNSIGNED (type);
6f086dfc
RS
1351 temp->next = function->fixup_var_refs_queue;
1352 function->fixup_var_refs_queue = temp;
6f086dfc 1353 }
e5e809f4 1354 else if (used_p)
6f086dfc 1355 /* Variable is local; fix it up now. */
fe9b4957 1356 fixup_var_refs (reg, promoted_mode, TREE_UNSIGNED (type), ht);
6f086dfc
RS
1357}
1358\f
1359static void
fe9b4957 1360fixup_var_refs (var, promoted_mode, unsignedp, ht)
6f086dfc 1361 rtx var;
00d8a4c1
RK
1362 enum machine_mode promoted_mode;
1363 int unsignedp;
fe9b4957 1364 struct hash_table *ht;
6f086dfc
RS
1365{
1366 tree pending;
1367 rtx first_insn = get_insns ();
49ad7cfa 1368 struct sequence_stack *stack = seq_stack;
6f086dfc
RS
1369 tree rtl_exps = rtl_expr_chain;
1370
1371 /* Must scan all insns for stack-refs that exceed the limit. */
fe9b4957
MM
1372 fixup_var_refs_insns (var, promoted_mode, unsignedp, first_insn,
1373 stack == 0, ht);
1374 /* If there's a hash table, it must record all uses of VAR. */
1375 if (ht)
1376 return;
6f086dfc
RS
1377
1378 /* Scan all pending sequences too. */
1379 for (; stack; stack = stack->next)
1380 {
1381 push_to_sequence (stack->first);
00d8a4c1 1382 fixup_var_refs_insns (var, promoted_mode, unsignedp,
fe9b4957 1383 stack->first, stack->next != 0, 0);
6f086dfc
RS
1384 /* Update remembered end of sequence
1385 in case we added an insn at the end. */
1386 stack->last = get_last_insn ();
1387 end_sequence ();
1388 }
1389
1390 /* Scan all waiting RTL_EXPRs too. */
1391 for (pending = rtl_exps; pending; pending = TREE_CHAIN (pending))
1392 {
1393 rtx seq = RTL_EXPR_SEQUENCE (TREE_VALUE (pending));
1394 if (seq != const0_rtx && seq != 0)
1395 {
1396 push_to_sequence (seq);
fe9b4957
MM
1397 fixup_var_refs_insns (var, promoted_mode, unsignedp, seq, 0,
1398 0);
6f086dfc
RS
1399 end_sequence ();
1400 }
1401 }
d33c2956
DB
1402
1403 /* Scan the catch clauses for exception handling too. */
1404 push_to_sequence (catch_clauses);
fe9b4957
MM
1405 fixup_var_refs_insns (var, promoted_mode, unsignedp, catch_clauses,
1406 0, 0);
d33c2956 1407 end_sequence ();
6f086dfc
RS
1408}
1409\f
e15679f8 1410/* REPLACEMENTS is a pointer to a list of the struct fixup_replacement and X is
6f086dfc 1411 some part of an insn. Return a struct fixup_replacement whose OLD
0f41302f 1412 value is equal to X. Allocate a new structure if no such entry exists. */
6f086dfc
RS
1413
1414static struct fixup_replacement *
2740a678 1415find_fixup_replacement (replacements, x)
6f086dfc
RS
1416 struct fixup_replacement **replacements;
1417 rtx x;
1418{
1419 struct fixup_replacement *p;
1420
1421 /* See if we have already replaced this. */
c5c76735 1422 for (p = *replacements; p != 0 && ! rtx_equal_p (p->old, x); p = p->next)
6f086dfc
RS
1423 ;
1424
1425 if (p == 0)
1426 {
1427 p = (struct fixup_replacement *) oballoc (sizeof (struct fixup_replacement));
1428 p->old = x;
1429 p->new = 0;
1430 p->next = *replacements;
1431 *replacements = p;
1432 }
1433
1434 return p;
1435}
1436
1437/* Scan the insn-chain starting with INSN for refs to VAR
1438 and fix them up. TOPLEVEL is nonzero if this chain is the
1439 main chain of insns for the current function. */
1440
1441static void
fe9b4957 1442fixup_var_refs_insns (var, promoted_mode, unsignedp, insn, toplevel, ht)
6f086dfc 1443 rtx var;
00d8a4c1
RK
1444 enum machine_mode promoted_mode;
1445 int unsignedp;
6f086dfc
RS
1446 rtx insn;
1447 int toplevel;
fe9b4957 1448 struct hash_table *ht;
6f086dfc 1449{
02a10449 1450 rtx call_dest = 0;
07444f1d 1451 rtx insn_list = NULL_RTX;
fe9b4957
MM
1452
1453 /* If we already know which INSNs reference VAR there's no need
1454 to walk the entire instruction chain. */
1455 if (ht)
1456 {
1457 insn_list = ((struct insns_for_mem_entry *)
1458 hash_lookup (ht, var, /*create=*/0, /*copy=*/0))->insns;
1459 insn = insn_list ? XEXP (insn_list, 0) : NULL_RTX;
1460 insn_list = XEXP (insn_list, 1);
1461 }
02a10449 1462
6f086dfc
RS
1463 while (insn)
1464 {
1465 rtx next = NEXT_INSN (insn);
e5e809f4 1466 rtx set, prev, prev_set;
6f086dfc 1467 rtx note;
e5e809f4 1468
e15762df 1469 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
6f086dfc 1470 {
ef178af3
ZW
1471 /* Remember the notes in case we delete the insn. */
1472 note = REG_NOTES (insn);
1473
63770d6a
RK
1474 /* If this is a CLOBBER of VAR, delete it.
1475
1476 If it has a REG_LIBCALL note, delete the REG_LIBCALL
1477 and REG_RETVAL notes too. */
926d1ca5 1478 if (GET_CODE (PATTERN (insn)) == CLOBBER
07362cb3
JW
1479 && (XEXP (PATTERN (insn), 0) == var
1480 || (GET_CODE (XEXP (PATTERN (insn), 0)) == CONCAT
1481 && (XEXP (XEXP (PATTERN (insn), 0), 0) == var
1482 || XEXP (XEXP (PATTERN (insn), 0), 1) == var))))
63770d6a
RK
1483 {
1484 if ((note = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) != 0)
1485 /* The REG_LIBCALL note will go away since we are going to
1486 turn INSN into a NOTE, so just delete the
1487 corresponding REG_RETVAL note. */
1488 remove_note (XEXP (note, 0),
1489 find_reg_note (XEXP (note, 0), REG_RETVAL,
1490 NULL_RTX));
1491
1492 /* In unoptimized compilation, we shouldn't call delete_insn
1493 except in jump.c doing warnings. */
1494 PUT_CODE (insn, NOTE);
1495 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1496 NOTE_SOURCE_FILE (insn) = 0;
1497 }
1498
6f086dfc 1499 /* The insn to load VAR from a home in the arglist
e5e809f4
JL
1500 is now a no-op. When we see it, just delete it.
1501 Similarly if this is storing VAR from a register from which
1502 it was loaded in the previous insn. This will occur
1503 when an ADDRESSOF was made for an arglist slot. */
63770d6a 1504 else if (toplevel
e5e809f4
JL
1505 && (set = single_set (insn)) != 0
1506 && SET_DEST (set) == var
63770d6a
RK
1507 /* If this represents the result of an insn group,
1508 don't delete the insn. */
1509 && find_reg_note (insn, REG_RETVAL, NULL_RTX) == 0
e5e809f4
JL
1510 && (rtx_equal_p (SET_SRC (set), var)
1511 || (GET_CODE (SET_SRC (set)) == REG
1512 && (prev = prev_nonnote_insn (insn)) != 0
1513 && (prev_set = single_set (prev)) != 0
1514 && SET_DEST (prev_set) == SET_SRC (set)
1515 && rtx_equal_p (SET_SRC (prev_set), var))))
6f086dfc 1516 {
b4ff474c
RS
1517 /* In unoptimized compilation, we shouldn't call delete_insn
1518 except in jump.c doing warnings. */
1519 PUT_CODE (insn, NOTE);
1520 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1521 NOTE_SOURCE_FILE (insn) = 0;
6f086dfc
RS
1522 if (insn == last_parm_insn)
1523 last_parm_insn = PREV_INSN (next);
1524 }
1525 else
1526 {
02a10449
RK
1527 struct fixup_replacement *replacements = 0;
1528 rtx next_insn = NEXT_INSN (insn);
1529
e9a25f70
JL
1530 if (SMALL_REGISTER_CLASSES)
1531 {
1532 /* If the insn that copies the results of a CALL_INSN
1533 into a pseudo now references VAR, we have to use an
1534 intermediate pseudo since we want the life of the
1535 return value register to be only a single insn.
02a10449 1536
e9a25f70
JL
1537 If we don't use an intermediate pseudo, such things as
1538 address computations to make the address of VAR valid
1539 if it is not can be placed between the CALL_INSN and INSN.
02a10449 1540
e9a25f70
JL
1541 To make sure this doesn't happen, we record the destination
1542 of the CALL_INSN and see if the next insn uses both that
1543 and VAR. */
02a10449 1544
f95182a4
ILT
1545 if (call_dest != 0 && GET_CODE (insn) == INSN
1546 && reg_mentioned_p (var, PATTERN (insn))
1547 && reg_mentioned_p (call_dest, PATTERN (insn)))
1548 {
1549 rtx temp = gen_reg_rtx (GET_MODE (call_dest));
02a10449 1550
f95182a4 1551 emit_insn_before (gen_move_insn (temp, call_dest), insn);
02a10449 1552
f95182a4
ILT
1553 PATTERN (insn) = replace_rtx (PATTERN (insn),
1554 call_dest, temp);
1555 }
02a10449 1556
f95182a4
ILT
1557 if (GET_CODE (insn) == CALL_INSN
1558 && GET_CODE (PATTERN (insn)) == SET)
1559 call_dest = SET_DEST (PATTERN (insn));
1560 else if (GET_CODE (insn) == CALL_INSN
1561 && GET_CODE (PATTERN (insn)) == PARALLEL
1562 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
1563 call_dest = SET_DEST (XVECEXP (PATTERN (insn), 0, 0));
1564 else
1565 call_dest = 0;
1566 }
02a10449 1567
6f086dfc
RS
1568 /* See if we have to do anything to INSN now that VAR is in
1569 memory. If it needs to be loaded into a pseudo, use a single
1570 pseudo for the entire insn in case there is a MATCH_DUP
1571 between two operands. We pass a pointer to the head of
1572 a list of struct fixup_replacements. If fixup_var_refs_1
1573 needs to allocate pseudos or replacement MEMs (for SUBREGs),
1574 it will record them in this list.
1575
1576 If it allocated a pseudo for any replacement, we copy into
1577 it here. */
1578
00d8a4c1
RK
1579 fixup_var_refs_1 (var, promoted_mode, &PATTERN (insn), insn,
1580 &replacements);
6f086dfc 1581
77121fee
JW
1582 /* If this is last_parm_insn, and any instructions were output
1583 after it to fix it up, then we must set last_parm_insn to
1584 the last such instruction emitted. */
1585 if (insn == last_parm_insn)
1586 last_parm_insn = PREV_INSN (next_insn);
1587
6f086dfc
RS
1588 while (replacements)
1589 {
1590 if (GET_CODE (replacements->new) == REG)
1591 {
1592 rtx insert_before;
00d8a4c1 1593 rtx seq;
6f086dfc
RS
1594
1595 /* OLD might be a (subreg (mem)). */
1596 if (GET_CODE (replacements->old) == SUBREG)
1597 replacements->old
1598 = fixup_memory_subreg (replacements->old, insn, 0);
1599 else
1600 replacements->old
1601 = fixup_stack_1 (replacements->old, insn);
1602
5fa7422b 1603 insert_before = insn;
6f086dfc 1604
00d8a4c1
RK
1605 /* If we are changing the mode, do a conversion.
1606 This might be wasteful, but combine.c will
1607 eliminate much of the waste. */
1608
1609 if (GET_MODE (replacements->new)
1610 != GET_MODE (replacements->old))
1611 {
1612 start_sequence ();
1613 convert_move (replacements->new,
1614 replacements->old, unsignedp);
1615 seq = gen_sequence ();
1616 end_sequence ();
1617 }
1618 else
1619 seq = gen_move_insn (replacements->new,
1620 replacements->old);
1621
1622 emit_insn_before (seq, insert_before);
6f086dfc
RS
1623 }
1624
1625 replacements = replacements->next;
1626 }
1627 }
1628
1629 /* Also fix up any invalid exprs in the REG_NOTES of this insn.
1630 But don't touch other insns referred to by reg-notes;
1631 we will get them elsewhere. */
ef178af3
ZW
1632 while (note)
1633 {
1634 if (GET_CODE (note) != INSN_LIST)
1635 XEXP (note, 0)
1636 = walk_fixup_memory_subreg (XEXP (note, 0), insn, 1);
1637 note = XEXP (note, 1);
1638 }
6f086dfc 1639 }
fe9b4957
MM
1640
1641 if (!ht)
1642 insn = next;
1643 else if (insn_list)
1644 {
1645 insn = XEXP (insn_list, 0);
1646 insn_list = XEXP (insn_list, 1);
1647 }
1648 else
1649 insn = NULL_RTX;
6f086dfc
RS
1650 }
1651}
1652\f
00d8a4c1
RK
1653/* VAR is a MEM that used to be a pseudo register with mode PROMOTED_MODE.
1654 See if the rtx expression at *LOC in INSN needs to be changed.
6f086dfc
RS
1655
1656 REPLACEMENTS is a pointer to a list head that starts out zero, but may
1657 contain a list of original rtx's and replacements. If we find that we need
1658 to modify this insn by replacing a memory reference with a pseudo or by
1659 making a new MEM to implement a SUBREG, we consult that list to see if
1660 we have already chosen a replacement. If none has already been allocated,
1661 we allocate it and update the list. fixup_var_refs_insns will copy VAR
1662 or the SUBREG, as appropriate, to the pseudo. */
1663
1664static void
00d8a4c1 1665fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements)
6f086dfc 1666 register rtx var;
00d8a4c1 1667 enum machine_mode promoted_mode;
6f086dfc
RS
1668 register rtx *loc;
1669 rtx insn;
1670 struct fixup_replacement **replacements;
1671{
1672 register int i;
1673 register rtx x = *loc;
1674 RTX_CODE code = GET_CODE (x);
6f7d635c 1675 register const char *fmt;
6f086dfc
RS
1676 register rtx tem, tem1;
1677 struct fixup_replacement *replacement;
1678
1679 switch (code)
1680 {
e9a25f70
JL
1681 case ADDRESSOF:
1682 if (XEXP (x, 0) == var)
1683 {
956d6950
JL
1684 /* Prevent sharing of rtl that might lose. */
1685 rtx sub = copy_rtx (XEXP (var, 0));
1686
956d6950
JL
1687 if (! validate_change (insn, loc, sub, 0))
1688 {
5f98f7c4
RH
1689 rtx y = gen_reg_rtx (GET_MODE (sub));
1690 rtx seq, new_insn;
1691
1692 /* We should be able to replace with a register or all is lost.
1693 Note that we can't use validate_change to verify this, since
1694 we're not caring for replacing all dups simultaneously. */
1695 if (! validate_replace_rtx (*loc, y, insn))
1696 abort ();
1697
1698 /* Careful! First try to recognize a direct move of the
1699 value, mimicking how things are done in gen_reload wrt
1700 PLUS. Consider what happens when insn is a conditional
1701 move instruction and addsi3 clobbers flags. */
1702
1703 start_sequence ();
1704 new_insn = emit_insn (gen_rtx_SET (VOIDmode, y, sub));
1705 seq = gen_sequence ();
1706 end_sequence ();
1707
1708 if (recog_memoized (new_insn) < 0)
1709 {
1710 /* That failed. Fall back on force_operand and hope. */
956d6950 1711
5f98f7c4
RH
1712 start_sequence ();
1713 force_operand (sub, y);
1714 seq = gen_sequence ();
1715 end_sequence ();
1716 }
956d6950 1717
5f98f7c4
RH
1718#ifdef HAVE_cc0
1719 /* Don't separate setter from user. */
1720 if (PREV_INSN (insn) && sets_cc0_p (PREV_INSN (insn)))
1721 insn = PREV_INSN (insn);
1722#endif
1723
1724 emit_insn_before (seq, insn);
1725 }
e9a25f70
JL
1726 }
1727 return;
1728
6f086dfc
RS
1729 case MEM:
1730 if (var == x)
1731 {
1732 /* If we already have a replacement, use it. Otherwise,
1733 try to fix up this address in case it is invalid. */
1734
2740a678 1735 replacement = find_fixup_replacement (replacements, var);
6f086dfc
RS
1736 if (replacement->new)
1737 {
1738 *loc = replacement->new;
1739 return;
1740 }
1741
1742 *loc = replacement->new = x = fixup_stack_1 (x, insn);
1743
00d8a4c1
RK
1744 /* Unless we are forcing memory to register or we changed the mode,
1745 we can leave things the way they are if the insn is valid. */
6f086dfc
RS
1746
1747 INSN_CODE (insn) = -1;
00d8a4c1
RK
1748 if (! flag_force_mem && GET_MODE (x) == promoted_mode
1749 && recog_memoized (insn) >= 0)
6f086dfc
RS
1750 return;
1751
00d8a4c1 1752 *loc = replacement->new = gen_reg_rtx (promoted_mode);
6f086dfc
RS
1753 return;
1754 }
1755
1756 /* If X contains VAR, we need to unshare it here so that we update
1757 each occurrence separately. But all identical MEMs in one insn
1758 must be replaced with the same rtx because of the possibility of
1759 MATCH_DUPs. */
1760
1761 if (reg_mentioned_p (var, x))
1762 {
2740a678 1763 replacement = find_fixup_replacement (replacements, x);
6f086dfc
RS
1764 if (replacement->new == 0)
1765 replacement->new = copy_most_rtx (x, var);
1766
1767 *loc = x = replacement->new;
1768 }
1769 break;
1770
1771 case REG:
1772 case CC0:
1773 case PC:
1774 case CONST_INT:
1775 case CONST:
1776 case SYMBOL_REF:
1777 case LABEL_REF:
1778 case CONST_DOUBLE:
1779 return;
1780
1781 case SIGN_EXTRACT:
1782 case ZERO_EXTRACT:
1783 /* Note that in some cases those types of expressions are altered
1784 by optimize_bit_field, and do not survive to get here. */
1785 if (XEXP (x, 0) == var
1786 || (GET_CODE (XEXP (x, 0)) == SUBREG
1787 && SUBREG_REG (XEXP (x, 0)) == var))
1788 {
1789 /* Get TEM as a valid MEM in the mode presently in the insn.
1790
1791 We don't worry about the possibility of MATCH_DUP here; it
1792 is highly unlikely and would be tricky to handle. */
1793
1794 tem = XEXP (x, 0);
1795 if (GET_CODE (tem) == SUBREG)
0e09cc26
RK
1796 {
1797 if (GET_MODE_BITSIZE (GET_MODE (tem))
1798 > GET_MODE_BITSIZE (GET_MODE (var)))
1799 {
1800 replacement = find_fixup_replacement (replacements, var);
1801 if (replacement->new == 0)
1802 replacement->new = gen_reg_rtx (GET_MODE (var));
1803 SUBREG_REG (tem) = replacement->new;
1804 }
ef933d26
RK
1805 else
1806 tem = fixup_memory_subreg (tem, insn, 0);
0e09cc26
RK
1807 }
1808 else
1809 tem = fixup_stack_1 (tem, insn);
6f086dfc
RS
1810
1811 /* Unless we want to load from memory, get TEM into the proper mode
1812 for an extract from memory. This can only be done if the
1813 extract is at a constant position and length. */
1814
1815 if (! flag_force_mem && GET_CODE (XEXP (x, 1)) == CONST_INT
1816 && GET_CODE (XEXP (x, 2)) == CONST_INT
1817 && ! mode_dependent_address_p (XEXP (tem, 0))
1818 && ! MEM_VOLATILE_P (tem))
1819 {
1820 enum machine_mode wanted_mode = VOIDmode;
1821 enum machine_mode is_mode = GET_MODE (tem);
e5e809f4 1822 HOST_WIDE_INT pos = INTVAL (XEXP (x, 2));
6f086dfc
RS
1823
1824#ifdef HAVE_extzv
1825 if (GET_CODE (x) == ZERO_EXTRACT)
0d8e55d8
JL
1826 {
1827 wanted_mode = insn_operand_mode[(int) CODE_FOR_extzv][1];
1828 if (wanted_mode == VOIDmode)
1829 wanted_mode = word_mode;
1830 }
6f086dfc
RS
1831#endif
1832#ifdef HAVE_extv
1833 if (GET_CODE (x) == SIGN_EXTRACT)
0d8e55d8
JL
1834 {
1835 wanted_mode = insn_operand_mode[(int) CODE_FOR_extv][1];
1836 if (wanted_mode == VOIDmode)
1837 wanted_mode = word_mode;
1838 }
6f086dfc 1839#endif
6dc42e49 1840 /* If we have a narrower mode, we can do something. */
6f086dfc
RS
1841 if (wanted_mode != VOIDmode
1842 && GET_MODE_SIZE (wanted_mode) < GET_MODE_SIZE (is_mode))
1843 {
e5e809f4 1844 HOST_WIDE_INT offset = pos / BITS_PER_UNIT;
6f086dfc
RS
1845 rtx old_pos = XEXP (x, 2);
1846 rtx newmem;
1847
1848 /* If the bytes and bits are counted differently, we
1849 must adjust the offset. */
f76b9db2
ILT
1850 if (BYTES_BIG_ENDIAN != BITS_BIG_ENDIAN)
1851 offset = (GET_MODE_SIZE (is_mode)
1852 - GET_MODE_SIZE (wanted_mode) - offset);
6f086dfc
RS
1853
1854 pos %= GET_MODE_BITSIZE (wanted_mode);
1855
38a448ca
RH
1856 newmem = gen_rtx_MEM (wanted_mode,
1857 plus_constant (XEXP (tem, 0), offset));
6f086dfc 1858 RTX_UNCHANGING_P (newmem) = RTX_UNCHANGING_P (tem);
c6df88cb 1859 MEM_COPY_ATTRIBUTES (newmem, tem);
6f086dfc
RS
1860
1861 /* Make the change and see if the insn remains valid. */
1862 INSN_CODE (insn) = -1;
1863 XEXP (x, 0) = newmem;
5f4f0e22 1864 XEXP (x, 2) = GEN_INT (pos);
6f086dfc
RS
1865
1866 if (recog_memoized (insn) >= 0)
1867 return;
1868
1869 /* Otherwise, restore old position. XEXP (x, 0) will be
1870 restored later. */
1871 XEXP (x, 2) = old_pos;
1872 }
1873 }
1874
1875 /* If we get here, the bitfield extract insn can't accept a memory
1876 reference. Copy the input into a register. */
1877
1878 tem1 = gen_reg_rtx (GET_MODE (tem));
1879 emit_insn_before (gen_move_insn (tem1, tem), insn);
1880 XEXP (x, 0) = tem1;
1881 return;
1882 }
1883 break;
1884
1885 case SUBREG:
1886 if (SUBREG_REG (x) == var)
1887 {
00d8a4c1
RK
1888 /* If this is a special SUBREG made because VAR was promoted
1889 from a wider mode, replace it with VAR and call ourself
1890 recursively, this time saying that the object previously
1891 had its current mode (by virtue of the SUBREG). */
1892
1893 if (SUBREG_PROMOTED_VAR_P (x))
1894 {
1895 *loc = var;
1896 fixup_var_refs_1 (var, GET_MODE (var), loc, insn, replacements);
1897 return;
1898 }
1899
6f086dfc
RS
1900 /* If this SUBREG makes VAR wider, it has become a paradoxical
1901 SUBREG with VAR in memory, but these aren't allowed at this
1902 stage of the compilation. So load VAR into a pseudo and take
1903 a SUBREG of that pseudo. */
1904 if (GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (GET_MODE (var)))
1905 {
2740a678 1906 replacement = find_fixup_replacement (replacements, var);
6f086dfc
RS
1907 if (replacement->new == 0)
1908 replacement->new = gen_reg_rtx (GET_MODE (var));
1909 SUBREG_REG (x) = replacement->new;
1910 return;
1911 }
1912
1913 /* See if we have already found a replacement for this SUBREG.
1914 If so, use it. Otherwise, make a MEM and see if the insn
1915 is recognized. If not, or if we should force MEM into a register,
1916 make a pseudo for this SUBREG. */
2740a678 1917 replacement = find_fixup_replacement (replacements, x);
6f086dfc
RS
1918 if (replacement->new)
1919 {
1920 *loc = replacement->new;
1921 return;
1922 }
1923
1924 replacement->new = *loc = fixup_memory_subreg (x, insn, 0);
1925
f898f031 1926 INSN_CODE (insn) = -1;
6f086dfc
RS
1927 if (! flag_force_mem && recog_memoized (insn) >= 0)
1928 return;
1929
1930 *loc = replacement->new = gen_reg_rtx (GET_MODE (x));
1931 return;
1932 }
1933 break;
1934
1935 case SET:
1936 /* First do special simplification of bit-field references. */
1937 if (GET_CODE (SET_DEST (x)) == SIGN_EXTRACT
1938 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
1939 optimize_bit_field (x, insn, 0);
1940 if (GET_CODE (SET_SRC (x)) == SIGN_EXTRACT
1941 || GET_CODE (SET_SRC (x)) == ZERO_EXTRACT)
5f4f0e22 1942 optimize_bit_field (x, insn, NULL_PTR);
6f086dfc 1943
0e09cc26
RK
1944 /* For a paradoxical SUBREG inside a ZERO_EXTRACT, load the object
1945 into a register and then store it back out. */
1946 if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
1947 && GET_CODE (XEXP (SET_DEST (x), 0)) == SUBREG
1948 && SUBREG_REG (XEXP (SET_DEST (x), 0)) == var
1949 && (GET_MODE_SIZE (GET_MODE (XEXP (SET_DEST (x), 0)))
1950 > GET_MODE_SIZE (GET_MODE (var))))
1951 {
1952 replacement = find_fixup_replacement (replacements, var);
1953 if (replacement->new == 0)
1954 replacement->new = gen_reg_rtx (GET_MODE (var));
1955
1956 SUBREG_REG (XEXP (SET_DEST (x), 0)) = replacement->new;
1957 emit_insn_after (gen_move_insn (var, replacement->new), insn);
1958 }
1959
6f086dfc 1960 /* If SET_DEST is now a paradoxical SUBREG, put the result of this
0f41302f 1961 insn into a pseudo and store the low part of the pseudo into VAR. */
6f086dfc
RS
1962 if (GET_CODE (SET_DEST (x)) == SUBREG
1963 && SUBREG_REG (SET_DEST (x)) == var
1964 && (GET_MODE_SIZE (GET_MODE (SET_DEST (x)))
1965 > GET_MODE_SIZE (GET_MODE (var))))
1966 {
1967 SET_DEST (x) = tem = gen_reg_rtx (GET_MODE (SET_DEST (x)));
1968 emit_insn_after (gen_move_insn (var, gen_lowpart (GET_MODE (var),
1969 tem)),
1970 insn);
1971 break;
1972 }
1973
1974 {
1975 rtx dest = SET_DEST (x);
1976 rtx src = SET_SRC (x);
29a82058 1977#ifdef HAVE_insv
6f086dfc 1978 rtx outerdest = dest;
29a82058 1979#endif
6f086dfc
RS
1980
1981 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1982 || GET_CODE (dest) == SIGN_EXTRACT
1983 || GET_CODE (dest) == ZERO_EXTRACT)
1984 dest = XEXP (dest, 0);
1985
1986 if (GET_CODE (src) == SUBREG)
1987 src = XEXP (src, 0);
1988
1989 /* If VAR does not appear at the top level of the SET
1990 just scan the lower levels of the tree. */
1991
1992 if (src != var && dest != var)
1993 break;
1994
1995 /* We will need to rerecognize this insn. */
1996 INSN_CODE (insn) = -1;
1997
1998#ifdef HAVE_insv
1999 if (GET_CODE (outerdest) == ZERO_EXTRACT && dest == var)
2000 {
2001 /* Since this case will return, ensure we fixup all the
2002 operands here. */
00d8a4c1
RK
2003 fixup_var_refs_1 (var, promoted_mode, &XEXP (outerdest, 1),
2004 insn, replacements);
2005 fixup_var_refs_1 (var, promoted_mode, &XEXP (outerdest, 2),
2006 insn, replacements);
2007 fixup_var_refs_1 (var, promoted_mode, &SET_SRC (x),
2008 insn, replacements);
6f086dfc
RS
2009
2010 tem = XEXP (outerdest, 0);
2011
2012 /* Clean up (SUBREG:SI (MEM:mode ...) 0)
2013 that may appear inside a ZERO_EXTRACT.
2014 This was legitimate when the MEM was a REG. */
2015 if (GET_CODE (tem) == SUBREG
2016 && SUBREG_REG (tem) == var)
0e09cc26 2017 tem = fixup_memory_subreg (tem, insn, 0);
6f086dfc
RS
2018 else
2019 tem = fixup_stack_1 (tem, insn);
2020
2021 if (GET_CODE (XEXP (outerdest, 1)) == CONST_INT
2022 && GET_CODE (XEXP (outerdest, 2)) == CONST_INT
2023 && ! mode_dependent_address_p (XEXP (tem, 0))
2024 && ! MEM_VOLATILE_P (tem))
2025 {
0d8e55d8 2026 enum machine_mode wanted_mode;
6f086dfc 2027 enum machine_mode is_mode = GET_MODE (tem);
e5e809f4 2028 HOST_WIDE_INT pos = INTVAL (XEXP (outerdest, 2));
6f086dfc 2029
0d8e55d8
JL
2030 wanted_mode = insn_operand_mode[(int) CODE_FOR_insv][0];
2031 if (wanted_mode == VOIDmode)
2032 wanted_mode = word_mode;
2033
6dc42e49 2034 /* If we have a narrower mode, we can do something. */
6f086dfc
RS
2035 if (GET_MODE_SIZE (wanted_mode) < GET_MODE_SIZE (is_mode))
2036 {
e5e809f4 2037 HOST_WIDE_INT offset = pos / BITS_PER_UNIT;
6f086dfc
RS
2038 rtx old_pos = XEXP (outerdest, 2);
2039 rtx newmem;
2040
f76b9db2
ILT
2041 if (BYTES_BIG_ENDIAN != BITS_BIG_ENDIAN)
2042 offset = (GET_MODE_SIZE (is_mode)
2043 - GET_MODE_SIZE (wanted_mode) - offset);
6f086dfc
RS
2044
2045 pos %= GET_MODE_BITSIZE (wanted_mode);
2046
38a448ca 2047 newmem = gen_rtx_MEM (wanted_mode,
c5c76735
JL
2048 plus_constant (XEXP (tem, 0),
2049 offset));
6f086dfc 2050 RTX_UNCHANGING_P (newmem) = RTX_UNCHANGING_P (tem);
c6df88cb 2051 MEM_COPY_ATTRIBUTES (newmem, tem);
6f086dfc
RS
2052
2053 /* Make the change and see if the insn remains valid. */
2054 INSN_CODE (insn) = -1;
2055 XEXP (outerdest, 0) = newmem;
5f4f0e22 2056 XEXP (outerdest, 2) = GEN_INT (pos);
6f086dfc
RS
2057
2058 if (recog_memoized (insn) >= 0)
2059 return;
2060
2061 /* Otherwise, restore old position. XEXP (x, 0) will be
2062 restored later. */
2063 XEXP (outerdest, 2) = old_pos;
2064 }
2065 }
2066
2067 /* If we get here, the bit-field store doesn't allow memory
2068 or isn't located at a constant position. Load the value into
2069 a register, do the store, and put it back into memory. */
2070
2071 tem1 = gen_reg_rtx (GET_MODE (tem));
2072 emit_insn_before (gen_move_insn (tem1, tem), insn);
2073 emit_insn_after (gen_move_insn (tem, tem1), insn);
2074 XEXP (outerdest, 0) = tem1;
2075 return;
2076 }
2077#endif
2078
2079 /* STRICT_LOW_PART is a no-op on memory references
2080 and it can cause combinations to be unrecognizable,
2081 so eliminate it. */
2082
2083 if (dest == var && GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
2084 SET_DEST (x) = XEXP (SET_DEST (x), 0);
2085
2086 /* A valid insn to copy VAR into or out of a register
2087 must be left alone, to avoid an infinite loop here.
2088 If the reference to VAR is by a subreg, fix that up,
2089 since SUBREG is not valid for a memref.
e15762df
RK
2090 Also fix up the address of the stack slot.
2091
2092 Note that we must not try to recognize the insn until
2093 after we know that we have valid addresses and no
2094 (subreg (mem ...) ...) constructs, since these interfere
2095 with determining the validity of the insn. */
6f086dfc
RS
2096
2097 if ((SET_SRC (x) == var
2098 || (GET_CODE (SET_SRC (x)) == SUBREG
2099 && SUBREG_REG (SET_SRC (x)) == var))
2100 && (GET_CODE (SET_DEST (x)) == REG
2101 || (GET_CODE (SET_DEST (x)) == SUBREG
2102 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG))
1d273bf5 2103 && GET_MODE (var) == promoted_mode
c46722a7 2104 && x == single_set (insn))
6f086dfc 2105 {
e15762df
RK
2106 rtx pat;
2107
2740a678 2108 replacement = find_fixup_replacement (replacements, SET_SRC (x));
6f086dfc 2109 if (replacement->new)
6f086dfc 2110 SET_SRC (x) = replacement->new;
6f086dfc
RS
2111 else if (GET_CODE (SET_SRC (x)) == SUBREG)
2112 SET_SRC (x) = replacement->new
2113 = fixup_memory_subreg (SET_SRC (x), insn, 0);
2114 else
2115 SET_SRC (x) = replacement->new
2116 = fixup_stack_1 (SET_SRC (x), insn);
e15762df
RK
2117
2118 if (recog_memoized (insn) >= 0)
2119 return;
2120
2121 /* INSN is not valid, but we know that we want to
2122 copy SET_SRC (x) to SET_DEST (x) in some way. So
2123 we generate the move and see whether it requires more
2124 than one insn. If it does, we emit those insns and
2125 delete INSN. Otherwise, we an just replace the pattern
2126 of INSN; we have already verified above that INSN has
2127 no other function that to do X. */
2128
2129 pat = gen_move_insn (SET_DEST (x), SET_SRC (x));
2130 if (GET_CODE (pat) == SEQUENCE)
2131 {
2132 emit_insn_after (pat, insn);
2133 PUT_CODE (insn, NOTE);
2134 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2135 NOTE_SOURCE_FILE (insn) = 0;
2136 }
2137 else
2138 PATTERN (insn) = pat;
2139
6f086dfc
RS
2140 return;
2141 }
2142
2143 if ((SET_DEST (x) == var
2144 || (GET_CODE (SET_DEST (x)) == SUBREG
2145 && SUBREG_REG (SET_DEST (x)) == var))
2146 && (GET_CODE (SET_SRC (x)) == REG
2147 || (GET_CODE (SET_SRC (x)) == SUBREG
2148 && GET_CODE (SUBREG_REG (SET_SRC (x))) == REG))
1d273bf5 2149 && GET_MODE (var) == promoted_mode
c46722a7 2150 && x == single_set (insn))
6f086dfc 2151 {
e15762df
RK
2152 rtx pat;
2153
6f086dfc
RS
2154 if (GET_CODE (SET_DEST (x)) == SUBREG)
2155 SET_DEST (x) = fixup_memory_subreg (SET_DEST (x), insn, 0);
2156 else
2157 SET_DEST (x) = fixup_stack_1 (SET_DEST (x), insn);
e15762df
RK
2158
2159 if (recog_memoized (insn) >= 0)
2160 return;
2161
2162 pat = gen_move_insn (SET_DEST (x), SET_SRC (x));
2163 if (GET_CODE (pat) == SEQUENCE)
2164 {
2165 emit_insn_after (pat, insn);
2166 PUT_CODE (insn, NOTE);
2167 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2168 NOTE_SOURCE_FILE (insn) = 0;
2169 }
2170 else
2171 PATTERN (insn) = pat;
2172
6f086dfc
RS
2173 return;
2174 }
2175
2176 /* Otherwise, storing into VAR must be handled specially
2177 by storing into a temporary and copying that into VAR
00d8a4c1
RK
2178 with a new insn after this one. Note that this case
2179 will be used when storing into a promoted scalar since
2180 the insn will now have different modes on the input
2181 and output and hence will be invalid (except for the case
2182 of setting it to a constant, which does not need any
2183 change if it is valid). We generate extra code in that case,
2184 but combine.c will eliminate it. */
6f086dfc
RS
2185
2186 if (dest == var)
2187 {
2188 rtx temp;
00d8a4c1
RK
2189 rtx fixeddest = SET_DEST (x);
2190
6f086dfc 2191 /* STRICT_LOW_PART can be discarded, around a MEM. */
00d8a4c1
RK
2192 if (GET_CODE (fixeddest) == STRICT_LOW_PART)
2193 fixeddest = XEXP (fixeddest, 0);
6f086dfc 2194 /* Convert (SUBREG (MEM)) to a MEM in a changed mode. */
00d8a4c1 2195 if (GET_CODE (fixeddest) == SUBREG)
926d1ca5
RK
2196 {
2197 fixeddest = fixup_memory_subreg (fixeddest, insn, 0);
2198 promoted_mode = GET_MODE (fixeddest);
2199 }
6f086dfc 2200 else
00d8a4c1
RK
2201 fixeddest = fixup_stack_1 (fixeddest, insn);
2202
926d1ca5 2203 temp = gen_reg_rtx (promoted_mode);
00d8a4c1
RK
2204
2205 emit_insn_after (gen_move_insn (fixeddest,
2206 gen_lowpart (GET_MODE (fixeddest),
2207 temp)),
2208 insn);
6f086dfc 2209
6f086dfc
RS
2210 SET_DEST (x) = temp;
2211 }
2212 }
e9a25f70
JL
2213
2214 default:
2215 break;
6f086dfc
RS
2216 }
2217
2218 /* Nothing special about this RTX; fix its operands. */
2219
2220 fmt = GET_RTX_FORMAT (code);
2221 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2222 {
2223 if (fmt[i] == 'e')
00d8a4c1 2224 fixup_var_refs_1 (var, promoted_mode, &XEXP (x, i), insn, replacements);
6f086dfc
RS
2225 if (fmt[i] == 'E')
2226 {
2227 register int j;
2228 for (j = 0; j < XVECLEN (x, i); j++)
00d8a4c1
RK
2229 fixup_var_refs_1 (var, promoted_mode, &XVECEXP (x, i, j),
2230 insn, replacements);
6f086dfc
RS
2231 }
2232 }
2233}
2234\f
2235/* Given X, an rtx of the form (SUBREG:m1 (MEM:m2 addr)),
2236 return an rtx (MEM:m1 newaddr) which is equivalent.
2237 If any insns must be emitted to compute NEWADDR, put them before INSN.
2238
2239 UNCRITICAL nonzero means accept paradoxical subregs.
0f41302f 2240 This is used for subregs found inside REG_NOTES. */
6f086dfc
RS
2241
2242static rtx
2243fixup_memory_subreg (x, insn, uncritical)
2244 rtx x;
2245 rtx insn;
2246 int uncritical;
2247{
2248 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
2249 rtx addr = XEXP (SUBREG_REG (x), 0);
2250 enum machine_mode mode = GET_MODE (x);
29a82058 2251 rtx result;
6f086dfc
RS
2252
2253 /* Paradoxical SUBREGs are usually invalid during RTL generation. */
2254 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
2255 && ! uncritical)
2256 abort ();
2257
f76b9db2
ILT
2258 if (BYTES_BIG_ENDIAN)
2259 offset += (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
2260 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)));
6f086dfc
RS
2261 addr = plus_constant (addr, offset);
2262 if (!flag_force_addr && memory_address_p (mode, addr))
2263 /* Shortcut if no insns need be emitted. */
2264 return change_address (SUBREG_REG (x), mode, addr);
2265 start_sequence ();
2266 result = change_address (SUBREG_REG (x), mode, addr);
2267 emit_insn_before (gen_sequence (), insn);
2268 end_sequence ();
2269 return result;
2270}
2271
2272/* Do fixup_memory_subreg on all (SUBREG (MEM ...) ...) contained in X.
2273 Replace subexpressions of X in place.
2274 If X itself is a (SUBREG (MEM ...) ...), return the replacement expression.
2275 Otherwise return X, with its contents possibly altered.
2276
ab6155b7
RK
2277 If any insns must be emitted to compute NEWADDR, put them before INSN.
2278
2279 UNCRITICAL is as in fixup_memory_subreg. */
6f086dfc
RS
2280
2281static rtx
ab6155b7 2282walk_fixup_memory_subreg (x, insn, uncritical)
6f086dfc
RS
2283 register rtx x;
2284 rtx insn;
ab6155b7 2285 int uncritical;
6f086dfc
RS
2286{
2287 register enum rtx_code code;
6f7d635c 2288 register const char *fmt;
6f086dfc
RS
2289 register int i;
2290
2291 if (x == 0)
2292 return 0;
2293
2294 code = GET_CODE (x);
2295
2296 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
ab6155b7 2297 return fixup_memory_subreg (x, insn, uncritical);
6f086dfc
RS
2298
2299 /* Nothing special about this RTX; fix its operands. */
2300
2301 fmt = GET_RTX_FORMAT (code);
2302 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2303 {
2304 if (fmt[i] == 'e')
ab6155b7 2305 XEXP (x, i) = walk_fixup_memory_subreg (XEXP (x, i), insn, uncritical);
6f086dfc
RS
2306 if (fmt[i] == 'E')
2307 {
2308 register int j;
2309 for (j = 0; j < XVECLEN (x, i); j++)
2310 XVECEXP (x, i, j)
ab6155b7 2311 = walk_fixup_memory_subreg (XVECEXP (x, i, j), insn, uncritical);
6f086dfc
RS
2312 }
2313 }
2314 return x;
2315}
2316\f
6f086dfc
RS
2317/* For each memory ref within X, if it refers to a stack slot
2318 with an out of range displacement, put the address in a temp register
2319 (emitting new insns before INSN to load these registers)
2320 and alter the memory ref to use that register.
2321 Replace each such MEM rtx with a copy, to avoid clobberage. */
2322
2323static rtx
2324fixup_stack_1 (x, insn)
2325 rtx x;
2326 rtx insn;
2327{
2328 register int i;
2329 register RTX_CODE code = GET_CODE (x);
6f7d635c 2330 register const char *fmt;
6f086dfc
RS
2331
2332 if (code == MEM)
2333 {
2334 register rtx ad = XEXP (x, 0);
2335 /* If we have address of a stack slot but it's not valid
2336 (displacement is too large), compute the sum in a register. */
2337 if (GET_CODE (ad) == PLUS
2338 && GET_CODE (XEXP (ad, 0)) == REG
40d05551
RK
2339 && ((REGNO (XEXP (ad, 0)) >= FIRST_VIRTUAL_REGISTER
2340 && REGNO (XEXP (ad, 0)) <= LAST_VIRTUAL_REGISTER)
e9a25f70
JL
2341 || REGNO (XEXP (ad, 0)) == FRAME_POINTER_REGNUM
2342#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2343 || REGNO (XEXP (ad, 0)) == HARD_FRAME_POINTER_REGNUM
2344#endif
2345 || REGNO (XEXP (ad, 0)) == STACK_POINTER_REGNUM
956d6950 2346 || REGNO (XEXP (ad, 0)) == ARG_POINTER_REGNUM
40d05551 2347 || XEXP (ad, 0) == current_function_internal_arg_pointer)
6f086dfc
RS
2348 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
2349 {
2350 rtx temp, seq;
2351 if (memory_address_p (GET_MODE (x), ad))
2352 return x;
2353
2354 start_sequence ();
2355 temp = copy_to_reg (ad);
2356 seq = gen_sequence ();
2357 end_sequence ();
2358 emit_insn_before (seq, insn);
2359 return change_address (x, VOIDmode, temp);
2360 }
2361 return x;
2362 }
2363
2364 fmt = GET_RTX_FORMAT (code);
2365 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2366 {
2367 if (fmt[i] == 'e')
2368 XEXP (x, i) = fixup_stack_1 (XEXP (x, i), insn);
2369 if (fmt[i] == 'E')
2370 {
2371 register int j;
2372 for (j = 0; j < XVECLEN (x, i); j++)
2373 XVECEXP (x, i, j) = fixup_stack_1 (XVECEXP (x, i, j), insn);
2374 }
2375 }
2376 return x;
2377}
2378\f
2379/* Optimization: a bit-field instruction whose field
2380 happens to be a byte or halfword in memory
2381 can be changed to a move instruction.
2382
2383 We call here when INSN is an insn to examine or store into a bit-field.
2384 BODY is the SET-rtx to be altered.
2385
2386 EQUIV_MEM is the table `reg_equiv_mem' if that is available; else 0.
2387 (Currently this is called only from function.c, and EQUIV_MEM
2388 is always 0.) */
2389
2390static void
2391optimize_bit_field (body, insn, equiv_mem)
2392 rtx body;
2393 rtx insn;
2394 rtx *equiv_mem;
2395{
2396 register rtx bitfield;
2397 int destflag;
2398 rtx seq = 0;
2399 enum machine_mode mode;
2400
2401 if (GET_CODE (SET_DEST (body)) == SIGN_EXTRACT
2402 || GET_CODE (SET_DEST (body)) == ZERO_EXTRACT)
2403 bitfield = SET_DEST (body), destflag = 1;
2404 else
2405 bitfield = SET_SRC (body), destflag = 0;
2406
2407 /* First check that the field being stored has constant size and position
2408 and is in fact a byte or halfword suitably aligned. */
2409
2410 if (GET_CODE (XEXP (bitfield, 1)) == CONST_INT
2411 && GET_CODE (XEXP (bitfield, 2)) == CONST_INT
2412 && ((mode = mode_for_size (INTVAL (XEXP (bitfield, 1)), MODE_INT, 1))
2413 != BLKmode)
2414 && INTVAL (XEXP (bitfield, 2)) % INTVAL (XEXP (bitfield, 1)) == 0)
2415 {
2416 register rtx memref = 0;
2417
2418 /* Now check that the containing word is memory, not a register,
2419 and that it is safe to change the machine mode. */
2420
2421 if (GET_CODE (XEXP (bitfield, 0)) == MEM)
2422 memref = XEXP (bitfield, 0);
2423 else if (GET_CODE (XEXP (bitfield, 0)) == REG
2424 && equiv_mem != 0)
2425 memref = equiv_mem[REGNO (XEXP (bitfield, 0))];
2426 else if (GET_CODE (XEXP (bitfield, 0)) == SUBREG
2427 && GET_CODE (SUBREG_REG (XEXP (bitfield, 0))) == MEM)
2428 memref = SUBREG_REG (XEXP (bitfield, 0));
2429 else if (GET_CODE (XEXP (bitfield, 0)) == SUBREG
2430 && equiv_mem != 0
2431 && GET_CODE (SUBREG_REG (XEXP (bitfield, 0))) == REG)
2432 memref = equiv_mem[REGNO (SUBREG_REG (XEXP (bitfield, 0)))];
2433
2434 if (memref
2435 && ! mode_dependent_address_p (XEXP (memref, 0))
2436 && ! MEM_VOLATILE_P (memref))
2437 {
2438 /* Now adjust the address, first for any subreg'ing
2439 that we are now getting rid of,
2440 and then for which byte of the word is wanted. */
2441
e5e809f4 2442 HOST_WIDE_INT offset = INTVAL (XEXP (bitfield, 2));
b88a3142
RK
2443 rtx insns;
2444
6f086dfc 2445 /* Adjust OFFSET to count bits from low-address byte. */
f76b9db2
ILT
2446 if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
2447 offset = (GET_MODE_BITSIZE (GET_MODE (XEXP (bitfield, 0)))
2448 - offset - INTVAL (XEXP (bitfield, 1)));
2449
6f086dfc
RS
2450 /* Adjust OFFSET to count bytes from low-address byte. */
2451 offset /= BITS_PER_UNIT;
2452 if (GET_CODE (XEXP (bitfield, 0)) == SUBREG)
2453 {
2454 offset += SUBREG_WORD (XEXP (bitfield, 0)) * UNITS_PER_WORD;
f76b9db2
ILT
2455 if (BYTES_BIG_ENDIAN)
2456 offset -= (MIN (UNITS_PER_WORD,
2457 GET_MODE_SIZE (GET_MODE (XEXP (bitfield, 0))))
2458 - MIN (UNITS_PER_WORD,
2459 GET_MODE_SIZE (GET_MODE (memref))));
6f086dfc
RS
2460 }
2461
b88a3142
RK
2462 start_sequence ();
2463 memref = change_address (memref, mode,
6f086dfc 2464 plus_constant (XEXP (memref, 0), offset));
b88a3142
RK
2465 insns = get_insns ();
2466 end_sequence ();
2467 emit_insns_before (insns, insn);
6f086dfc
RS
2468
2469 /* Store this memory reference where
2470 we found the bit field reference. */
2471
2472 if (destflag)
2473 {
2474 validate_change (insn, &SET_DEST (body), memref, 1);
2475 if (! CONSTANT_ADDRESS_P (SET_SRC (body)))
2476 {
2477 rtx src = SET_SRC (body);
2478 while (GET_CODE (src) == SUBREG
2479 && SUBREG_WORD (src) == 0)
2480 src = SUBREG_REG (src);
2481 if (GET_MODE (src) != GET_MODE (memref))
2482 src = gen_lowpart (GET_MODE (memref), SET_SRC (body));
2483 validate_change (insn, &SET_SRC (body), src, 1);
2484 }
2485 else if (GET_MODE (SET_SRC (body)) != VOIDmode
2486 && GET_MODE (SET_SRC (body)) != GET_MODE (memref))
2487 /* This shouldn't happen because anything that didn't have
2488 one of these modes should have got converted explicitly
2489 and then referenced through a subreg.
2490 This is so because the original bit-field was
2491 handled by agg_mode and so its tree structure had
2492 the same mode that memref now has. */
2493 abort ();
2494 }
2495 else
2496 {
2497 rtx dest = SET_DEST (body);
2498
2499 while (GET_CODE (dest) == SUBREG
4013a709
RK
2500 && SUBREG_WORD (dest) == 0
2501 && (GET_MODE_CLASS (GET_MODE (dest))
ab87f8c8
JL
2502 == GET_MODE_CLASS (GET_MODE (SUBREG_REG (dest))))
2503 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
2504 <= UNITS_PER_WORD))
6f086dfc
RS
2505 dest = SUBREG_REG (dest);
2506
2507 validate_change (insn, &SET_DEST (body), dest, 1);
2508
2509 if (GET_MODE (dest) == GET_MODE (memref))
2510 validate_change (insn, &SET_SRC (body), memref, 1);
2511 else
2512 {
2513 /* Convert the mem ref to the destination mode. */
2514 rtx newreg = gen_reg_rtx (GET_MODE (dest));
2515
2516 start_sequence ();
2517 convert_move (newreg, memref,
2518 GET_CODE (SET_SRC (body)) == ZERO_EXTRACT);
2519 seq = get_insns ();
2520 end_sequence ();
2521
2522 validate_change (insn, &SET_SRC (body), newreg, 1);
2523 }
2524 }
2525
2526 /* See if we can convert this extraction or insertion into
2527 a simple move insn. We might not be able to do so if this
2528 was, for example, part of a PARALLEL.
2529
2530 If we succeed, write out any needed conversions. If we fail,
2531 it is hard to guess why we failed, so don't do anything
2532 special; just let the optimization be suppressed. */
2533
2534 if (apply_change_group () && seq)
2535 emit_insns_before (seq, insn);
2536 }
2537 }
2538}
2539\f
2540/* These routines are responsible for converting virtual register references
2541 to the actual hard register references once RTL generation is complete.
2542
2543 The following four variables are used for communication between the
2544 routines. They contain the offsets of the virtual registers from their
2545 respective hard registers. */
2546
2547static int in_arg_offset;
2548static int var_offset;
2549static int dynamic_offset;
2550static int out_arg_offset;
71038426 2551static int cfa_offset;
6f086dfc
RS
2552
2553/* In most machines, the stack pointer register is equivalent to the bottom
2554 of the stack. */
2555
2556#ifndef STACK_POINTER_OFFSET
2557#define STACK_POINTER_OFFSET 0
2558#endif
2559
2560/* If not defined, pick an appropriate default for the offset of dynamically
2561 allocated memory depending on the value of ACCUMULATE_OUTGOING_ARGS,
2562 REG_PARM_STACK_SPACE, and OUTGOING_REG_PARM_STACK_SPACE. */
2563
2564#ifndef STACK_DYNAMIC_OFFSET
2565
2566#ifdef ACCUMULATE_OUTGOING_ARGS
2567/* The bottom of the stack points to the actual arguments. If
2568 REG_PARM_STACK_SPACE is defined, this includes the space for the register
2569 parameters. However, if OUTGOING_REG_PARM_STACK space is not defined,
2570 stack space for register parameters is not pushed by the caller, but
2571 rather part of the fixed stack areas and hence not included in
2572 `current_function_outgoing_args_size'. Nevertheless, we must allow
2573 for it when allocating stack dynamic objects. */
2574
2575#if defined(REG_PARM_STACK_SPACE) && ! defined(OUTGOING_REG_PARM_STACK_SPACE)
2576#define STACK_DYNAMIC_OFFSET(FNDECL) \
2577(current_function_outgoing_args_size \
2578 + REG_PARM_STACK_SPACE (FNDECL) + (STACK_POINTER_OFFSET))
2579
2580#else
2581#define STACK_DYNAMIC_OFFSET(FNDECL) \
2582(current_function_outgoing_args_size + (STACK_POINTER_OFFSET))
2583#endif
2584
2585#else
2586#define STACK_DYNAMIC_OFFSET(FNDECL) STACK_POINTER_OFFSET
2587#endif
2588#endif
2589
71038426
RH
2590/* On a few machines, the CFA coincides with the arg pointer. */
2591
2592#ifndef ARG_POINTER_CFA_OFFSET
2593#define ARG_POINTER_CFA_OFFSET 0
2594#endif
2595
2596
e9a25f70
JL
2597/* Build up a (MEM (ADDRESSOF (REG))) rtx for a register REG that just had
2598 its address taken. DECL is the decl for the object stored in the
2599 register, for later use if we do need to force REG into the stack.
2600 REG is overwritten by the MEM like in put_reg_into_stack. */
2601
2602rtx
2603gen_mem_addressof (reg, decl)
2604 rtx reg;
2605 tree decl;
2606{
2607 tree type = TREE_TYPE (decl);
8f985ec4
ZW
2608 rtx r = gen_rtx_ADDRESSOF (Pmode, gen_reg_rtx (GET_MODE (reg)),
2609 REGNO (reg), decl);
95ca22f4
MM
2610 /* If the original REG was a user-variable, then so is the REG whose
2611 address is being taken. */
2612 REG_USERVAR_P (XEXP (r, 0)) = REG_USERVAR_P (reg);
e9a25f70 2613
e9a25f70
JL
2614 PUT_CODE (reg, MEM);
2615 PUT_MODE (reg, DECL_MODE (decl));
ef178af3 2616 XEXP (reg, 0) = r;
e9a25f70 2617 MEM_VOLATILE_P (reg) = TREE_SIDE_EFFECTS (decl);
c6df88cb 2618 MEM_SET_IN_STRUCT_P (reg, AGGREGATE_TYPE_P (type));
41472af8 2619 MEM_ALIAS_SET (reg) = get_alias_set (decl);
e9a25f70 2620
e5e809f4 2621 if (TREE_USED (decl) || DECL_INITIAL (decl) != 0)
fe9b4957 2622 fixup_var_refs (reg, GET_MODE (reg), TREE_UNSIGNED (type), 0);
e5e809f4 2623
e9a25f70
JL
2624 return reg;
2625}
2626
2627/* If DECL has an RTL that is an ADDRESSOF rtx, put it into the stack. */
2628
2629void
2630flush_addressof (decl)
2631 tree decl;
2632{
2633 if ((TREE_CODE (decl) == PARM_DECL || TREE_CODE (decl) == VAR_DECL)
2634 && DECL_RTL (decl) != 0
2635 && GET_CODE (DECL_RTL (decl)) == MEM
2636 && GET_CODE (XEXP (DECL_RTL (decl), 0)) == ADDRESSOF
2637 && GET_CODE (XEXP (XEXP (DECL_RTL (decl), 0), 0)) == REG)
fe9b4957 2638 put_addressof_into_stack (XEXP (DECL_RTL (decl), 0), 0);
e9a25f70
JL
2639}
2640
2641/* Force the register pointed to by R, an ADDRESSOF rtx, into the stack. */
2642
2643static void
fe9b4957 2644put_addressof_into_stack (r, ht)
e9a25f70 2645 rtx r;
fe9b4957 2646 struct hash_table *ht;
e9a25f70
JL
2647{
2648 tree decl = ADDRESSOF_DECL (r);
2649 rtx reg = XEXP (r, 0);
2650
2651 if (GET_CODE (reg) != REG)
2652 abort ();
2653
2654 put_reg_into_stack (0, reg, TREE_TYPE (decl), GET_MODE (reg),
2655 DECL_MODE (decl), TREE_SIDE_EFFECTS (decl),
e5e809f4 2656 ADDRESSOF_REGNO (r),
fe9b4957 2657 TREE_USED (decl) || DECL_INITIAL (decl) != 0, ht);
e9a25f70
JL
2658}
2659
b5bd3b3c
AS
2660/* List of replacements made below in purge_addressof_1 when creating
2661 bitfield insertions. */
8b04083b
VM
2662static rtx purge_bitfield_addressof_replacements;
2663
2664/* List of replacements made below in purge_addressof_1 for patterns
2665 (MEM (ADDRESSOF (REG ...))). The key of the list entry is the
2666 corresponding (ADDRESSOF (REG ...)) and value is a substitution for
2667 the all pattern. List PURGE_BITFIELD_ADDRESSOF_REPLACEMENTS is not
2668 enough in complex cases, e.g. when some field values can be
2669 extracted by usage MEM with narrower mode. */
b5bd3b3c
AS
2670static rtx purge_addressof_replacements;
2671
e9a25f70
JL
2672/* Helper function for purge_addressof. See if the rtx expression at *LOC
2673 in INSN needs to be changed. If FORCE, always put any ADDRESSOFs into
2674 the stack. */
2675
2676static void
fe9b4957 2677purge_addressof_1 (loc, insn, force, store, ht)
e9a25f70
JL
2678 rtx *loc;
2679 rtx insn;
f7b6d104 2680 int force, store;
fe9b4957 2681 struct hash_table *ht;
e9a25f70
JL
2682{
2683 rtx x;
2684 RTX_CODE code;
2685 int i, j;
6f7d635c 2686 const char *fmt;
e9a25f70
JL
2687
2688 /* Re-start here to avoid recursion in common cases. */
2689 restart:
2690
2691 x = *loc;
2692 if (x == 0)
2693 return;
2694
2695 code = GET_CODE (x);
2696
c5c76735
JL
2697 /* If we don't return in any of the cases below, we will recurse inside
2698 the RTX, which will normally result in any ADDRESSOF being forced into
2699 memory. */
2700 if (code == SET)
2701 {
2702 purge_addressof_1 (&SET_DEST (x), insn, force, 1, ht);
2703 purge_addressof_1 (&SET_SRC (x), insn, force, 0, ht);
2704 return;
2705 }
2706
2707 else if (code == ADDRESSOF && GET_CODE (XEXP (x, 0)) == MEM)
e9a25f70 2708 {
956d6950
JL
2709 /* We must create a copy of the rtx because it was created by
2710 overwriting a REG rtx which is always shared. */
2711 rtx sub = copy_rtx (XEXP (XEXP (x, 0), 0));
c5c76735 2712 rtx insns;
e9a25f70 2713
ab87f8c8
JL
2714 if (validate_change (insn, loc, sub, 0)
2715 || validate_replace_rtx (x, sub, insn))
e9a25f70 2716 return;
ab87f8c8 2717
e9a25f70 2718 start_sequence ();
ab87f8c8
JL
2719 sub = force_operand (sub, NULL_RTX);
2720 if (! validate_change (insn, loc, sub, 0)
2721 && ! validate_replace_rtx (x, sub, insn))
e9a25f70
JL
2722 abort ();
2723
f7b6d104 2724 insns = gen_sequence ();
e9a25f70 2725 end_sequence ();
18e765cb 2726 emit_insn_before (insns, insn);
e9a25f70
JL
2727 return;
2728 }
c5c76735 2729
e9a25f70
JL
2730 else if (code == MEM && GET_CODE (XEXP (x, 0)) == ADDRESSOF && ! force)
2731 {
2732 rtx sub = XEXP (XEXP (x, 0), 0);
ab87f8c8 2733 rtx sub2;
e5e809f4 2734
6d8ccdbb 2735 if (GET_CODE (sub) == MEM)
ab87f8c8
JL
2736 {
2737 sub2 = gen_rtx_MEM (GET_MODE (x), copy_rtx (XEXP (sub, 0)));
2738 MEM_COPY_ATTRIBUTES (sub2, sub);
2739 RTX_UNCHANGING_P (sub2) = RTX_UNCHANGING_P (sub);
2740 sub = sub2;
2741 }
c5c76735
JL
2742 else if (GET_CODE (sub) == REG
2743 && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2744 ;
e5e809f4 2745 else if (GET_CODE (sub) == REG && GET_MODE (x) != GET_MODE (sub))
e9a25f70 2746 {
f7b6d104
RH
2747 int size_x, size_sub;
2748
b5bd3b3c
AS
2749 if (!insn)
2750 {
2751 /* When processing REG_NOTES look at the list of
2752 replacements done on the insn to find the register that X
2753 was replaced by. */
2754 rtx tem;
2755
8b04083b
VM
2756 for (tem = purge_bitfield_addressof_replacements;
2757 tem != NULL_RTX;
b5bd3b3c 2758 tem = XEXP (XEXP (tem, 1), 1))
8b04083b
VM
2759 if (rtx_equal_p (x, XEXP (tem, 0)))
2760 {
2761 *loc = XEXP (XEXP (tem, 1), 0);
2762 return;
2763 }
fbdfe39c 2764
8b04083b
VM
2765 /* See comment for purge_addressof_replacements. */
2766 for (tem = purge_addressof_replacements;
2767 tem != NULL_RTX;
2768 tem = XEXP (XEXP (tem, 1), 1))
2769 if (rtx_equal_p (XEXP (x, 0), XEXP (tem, 0)))
2770 {
2771 rtx z = XEXP (XEXP (tem, 1), 0);
fbdfe39c 2772
8b04083b
VM
2773 if (GET_MODE (x) == GET_MODE (z)
2774 || (GET_CODE (XEXP (XEXP (tem, 1), 0)) != REG
2775 && GET_CODE (XEXP (XEXP (tem, 1), 0)) != SUBREG))
2776 abort ();
2777
2778 /* It can happen that the note may speak of things
2779 in a wider (or just different) mode than the
2780 code did. This is especially true of
2781 REG_RETVAL. */
2782
2783 if (GET_CODE (z) == SUBREG && SUBREG_WORD (z) == 0)
2784 z = SUBREG_REG (z);
2785
2786 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2787 && (GET_MODE_SIZE (GET_MODE (x))
2788 > GET_MODE_SIZE (GET_MODE (z))))
2789 {
2790 /* This can occur as a result in invalid
2791 pointer casts, e.g. float f; ...
2792 *(long long int *)&f.
2793 ??? We could emit a warning here, but
2794 without a line number that wouldn't be
2795 very helpful. */
2796 z = gen_rtx_SUBREG (GET_MODE (x), z, 0);
2797 }
2798 else
2799 z = gen_lowpart (GET_MODE (x), z);
2800
2801 *loc = z;
2802 return;
2803 }
b5bd3b3c
AS
2804
2805 /* There should always be such a replacement. */
2806 abort ();
2807 }
2808
f7b6d104
RH
2809 size_x = GET_MODE_BITSIZE (GET_MODE (x));
2810 size_sub = GET_MODE_BITSIZE (GET_MODE (sub));
2811
2812 /* Don't even consider working with paradoxical subregs,
2813 or the moral equivalent seen here. */
470032d7 2814 if (size_x <= size_sub
d006aa54 2815 && int_mode_for_mode (GET_MODE (sub)) != BLKmode)
e9a25f70 2816 {
f7b6d104
RH
2817 /* Do a bitfield insertion to mirror what would happen
2818 in memory. */
2819
f7b6d104
RH
2820 rtx val, seq;
2821
f7b6d104
RH
2822 if (store)
2823 {
fe9b4957 2824 rtx p = PREV_INSN (insn);
de0dd934 2825
f7b6d104
RH
2826 start_sequence ();
2827 val = gen_reg_rtx (GET_MODE (x));
2828 if (! validate_change (insn, loc, val, 0))
b5bd3b3c
AS
2829 {
2830 /* Discard the current sequence and put the
2831 ADDRESSOF on stack. */
2832 end_sequence ();
2833 goto give_up;
2834 }
f7b6d104
RH
2835 seq = gen_sequence ();
2836 end_sequence ();
2837 emit_insn_before (seq, insn);
fe9b4957
MM
2838 compute_insns_for_mem (p ? NEXT_INSN (p) : get_insns (),
2839 insn, ht);
f7b6d104
RH
2840
2841 start_sequence ();
47401c4d 2842 store_bit_field (sub, size_x, 0, GET_MODE (x),
f7b6d104
RH
2843 val, GET_MODE_SIZE (GET_MODE (sub)),
2844 GET_MODE_SIZE (GET_MODE (sub)));
2845
de0dd934
R
2846 /* Make sure to unshare any shared rtl that store_bit_field
2847 might have created. */
2848 for (p = get_insns(); p; p = NEXT_INSN (p))
2849 {
2850 reset_used_flags (PATTERN (p));
2851 reset_used_flags (REG_NOTES (p));
2852 reset_used_flags (LOG_LINKS (p));
2853 }
2854 unshare_all_rtl (get_insns ());
2855
f7b6d104
RH
2856 seq = gen_sequence ();
2857 end_sequence ();
fe9b4957
MM
2858 p = emit_insn_after (seq, insn);
2859 if (NEXT_INSN (insn))
2860 compute_insns_for_mem (NEXT_INSN (insn),
2861 p ? NEXT_INSN (p) : NULL_RTX,
2862 ht);
f7b6d104
RH
2863 }
2864 else
2865 {
fe9b4957
MM
2866 rtx p = PREV_INSN (insn);
2867
f7b6d104 2868 start_sequence ();
47401c4d 2869 val = extract_bit_field (sub, size_x, 0, 1, NULL_RTX,
f7b6d104
RH
2870 GET_MODE (x), GET_MODE (x),
2871 GET_MODE_SIZE (GET_MODE (sub)),
2872 GET_MODE_SIZE (GET_MODE (sub)));
2873
f7b6d104 2874 if (! validate_change (insn, loc, val, 0))
b5bd3b3c
AS
2875 {
2876 /* Discard the current sequence and put the
2877 ADDRESSOF on stack. */
2878 end_sequence ();
2879 goto give_up;
2880 }
f7b6d104
RH
2881
2882 seq = gen_sequence ();
2883 end_sequence ();
2884 emit_insn_before (seq, insn);
fe9b4957
MM
2885 compute_insns_for_mem (p ? NEXT_INSN (p) : get_insns (),
2886 insn, ht);
f7b6d104
RH
2887 }
2888
b5bd3b3c
AS
2889 /* Remember the replacement so that the same one can be done
2890 on the REG_NOTES. */
8b04083b 2891 purge_bitfield_addressof_replacements
b5bd3b3c 2892 = gen_rtx_EXPR_LIST (VOIDmode, x,
8b04083b
VM
2893 gen_rtx_EXPR_LIST
2894 (VOIDmode, val,
2895 purge_bitfield_addressof_replacements));
b5bd3b3c 2896
f7b6d104
RH
2897 /* We replaced with a reg -- all done. */
2898 return;
e9a25f70
JL
2899 }
2900 }
c5c76735 2901
e9a25f70 2902 else if (validate_change (insn, loc, sub, 0))
fbdfe39c
RH
2903 {
2904 /* Remember the replacement so that the same one can be done
2905 on the REG_NOTES. */
8b04083b
VM
2906 if (GET_CODE (sub) == REG || GET_CODE (sub) == SUBREG)
2907 {
2908 rtx tem;
2909
2910 for (tem = purge_addressof_replacements;
2911 tem != NULL_RTX;
2912 tem = XEXP (XEXP (tem, 1), 1))
2913 if (rtx_equal_p (XEXP (x, 0), XEXP (tem, 0)))
2914 {
2915 XEXP (XEXP (tem, 1), 0) = sub;
2916 return;
2917 }
2918 purge_addressof_replacements
2919 = gen_rtx (EXPR_LIST, VOIDmode, XEXP (x, 0),
2920 gen_rtx_EXPR_LIST (VOIDmode, sub,
2921 purge_addressof_replacements));
2922 return;
2923 }
fbdfe39c
RH
2924 goto restart;
2925 }
b5bd3b3c 2926 give_up:;
e9a25f70
JL
2927 /* else give up and put it into the stack */
2928 }
c5c76735 2929
e9a25f70
JL
2930 else if (code == ADDRESSOF)
2931 {
fe9b4957 2932 put_addressof_into_stack (x, ht);
e9a25f70
JL
2933 return;
2934 }
f7b6d104
RH
2935 else if (code == SET)
2936 {
fe9b4957
MM
2937 purge_addressof_1 (&SET_DEST (x), insn, force, 1, ht);
2938 purge_addressof_1 (&SET_SRC (x), insn, force, 0, ht);
f7b6d104
RH
2939 return;
2940 }
e9a25f70
JL
2941
2942 /* Scan all subexpressions. */
2943 fmt = GET_RTX_FORMAT (code);
2944 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
2945 {
2946 if (*fmt == 'e')
fe9b4957 2947 purge_addressof_1 (&XEXP (x, i), insn, force, 0, ht);
e9a25f70
JL
2948 else if (*fmt == 'E')
2949 for (j = 0; j < XVECLEN (x, i); j++)
fe9b4957
MM
2950 purge_addressof_1 (&XVECEXP (x, i, j), insn, force, 0, ht);
2951 }
2952}
2953
2954/* Return a new hash table entry in HT. */
2955
2956static struct hash_entry *
2957insns_for_mem_newfunc (he, ht, k)
2958 struct hash_entry *he;
2959 struct hash_table *ht;
2960 hash_table_key k ATTRIBUTE_UNUSED;
2961{
2962 struct insns_for_mem_entry *ifmhe;
2963 if (he)
2964 return he;
2965
2966 ifmhe = ((struct insns_for_mem_entry *)
2967 hash_allocate (ht, sizeof (struct insns_for_mem_entry)));
2968 ifmhe->insns = NULL_RTX;
2969
2970 return &ifmhe->he;
2971}
2972
2973/* Return a hash value for K, a REG. */
2974
2975static unsigned long
2976insns_for_mem_hash (k)
2977 hash_table_key k;
2978{
2979 /* K is really a RTX. Just use the address as the hash value. */
2980 return (unsigned long) k;
2981}
2982
2983/* Return non-zero if K1 and K2 (two REGs) are the same. */
2984
2985static boolean
2986insns_for_mem_comp (k1, k2)
2987 hash_table_key k1;
2988 hash_table_key k2;
2989{
2990 return k1 == k2;
2991}
2992
2993struct insns_for_mem_walk_info {
2994 /* The hash table that we are using to record which INSNs use which
2995 MEMs. */
2996 struct hash_table *ht;
2997
2998 /* The INSN we are currently proessing. */
2999 rtx insn;
3000
3001 /* Zero if we are walking to find ADDRESSOFs, one if we are walking
3002 to find the insns that use the REGs in the ADDRESSOFs. */
3003 int pass;
3004};
3005
3006/* Called from compute_insns_for_mem via for_each_rtx. If R is a REG
3007 that might be used in an ADDRESSOF expression, record this INSN in
3008 the hash table given by DATA (which is really a pointer to an
3009 insns_for_mem_walk_info structure). */
3010
3011static int
3012insns_for_mem_walk (r, data)
3013 rtx *r;
3014 void *data;
3015{
3016 struct insns_for_mem_walk_info *ifmwi
3017 = (struct insns_for_mem_walk_info *) data;
3018
3019 if (ifmwi->pass == 0 && *r && GET_CODE (*r) == ADDRESSOF
3020 && GET_CODE (XEXP (*r, 0)) == REG)
3021 hash_lookup (ifmwi->ht, XEXP (*r, 0), /*create=*/1, /*copy=*/0);
3022 else if (ifmwi->pass == 1 && *r && GET_CODE (*r) == REG)
3023 {
3024 /* Lookup this MEM in the hashtable, creating it if necessary. */
3025 struct insns_for_mem_entry *ifme
3026 = (struct insns_for_mem_entry *) hash_lookup (ifmwi->ht,
3027 *r,
3028 /*create=*/0,
3029 /*copy=*/0);
3030
3031 /* If we have not already recorded this INSN, do so now. Since
3032 we process the INSNs in order, we know that if we have
3033 recorded it it must be at the front of the list. */
3034 if (ifme && (!ifme->insns || XEXP (ifme->insns, 0) != ifmwi->insn))
3035 {
3036 /* We do the allocation on the same obstack as is used for
3037 the hash table since this memory will not be used once
3038 the hash table is deallocated. */
3039 push_obstacks (&ifmwi->ht->memory, &ifmwi->ht->memory);
3040 ifme->insns = gen_rtx_EXPR_LIST (VOIDmode, ifmwi->insn,
3041 ifme->insns);
3042 pop_obstacks ();
3043 }
e9a25f70 3044 }
fe9b4957
MM
3045
3046 return 0;
3047}
3048
3049/* Walk the INSNS, until we reach LAST_INSN, recording which INSNs use
3050 which REGs in HT. */
3051
3052static void
3053compute_insns_for_mem (insns, last_insn, ht)
3054 rtx insns;
3055 rtx last_insn;
3056 struct hash_table *ht;
3057{
3058 rtx insn;
3059 struct insns_for_mem_walk_info ifmwi;
3060 ifmwi.ht = ht;
3061
3062 for (ifmwi.pass = 0; ifmwi.pass < 2; ++ifmwi.pass)
3063 for (insn = insns; insn != last_insn; insn = NEXT_INSN (insn))
3064 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3065 {
3066 ifmwi.insn = insn;
3067 for_each_rtx (&insn, insns_for_mem_walk, &ifmwi);
3068 }
e9a25f70
JL
3069}
3070
3071/* Eliminate all occurrences of ADDRESSOF from INSNS. Elide any remaining
3072 (MEM (ADDRESSOF)) patterns, and force any needed registers into the
3073 stack. */
3074
3075void
3076purge_addressof (insns)
3077 rtx insns;
3078{
3079 rtx insn;
fe9b4957
MM
3080 struct hash_table ht;
3081
3082 /* When we actually purge ADDRESSOFs, we turn REGs into MEMs. That
3083 requires a fixup pass over the instruction stream to correct
3084 INSNs that depended on the REG being a REG, and not a MEM. But,
3085 these fixup passes are slow. Furthermore, more MEMs are not
3086 mentioned in very many instructions. So, we speed up the process
3087 by pre-calculating which REGs occur in which INSNs; that allows
3088 us to perform the fixup passes much more quickly. */
3089 hash_table_init (&ht,
3090 insns_for_mem_newfunc,
3091 insns_for_mem_hash,
3092 insns_for_mem_comp);
3093 compute_insns_for_mem (insns, NULL_RTX, &ht);
3094
e9a25f70
JL
3095 for (insn = insns; insn; insn = NEXT_INSN (insn))
3096 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
3097 || GET_CODE (insn) == CALL_INSN)
3098 {
3099 purge_addressof_1 (&PATTERN (insn), insn,
fe9b4957
MM
3100 asm_noperands (PATTERN (insn)) > 0, 0, &ht);
3101 purge_addressof_1 (&REG_NOTES (insn), NULL_RTX, 0, 0, &ht);
e9a25f70 3102 }
fe9b4957
MM
3103
3104 /* Clean up. */
3105 hash_table_free (&ht);
8b04083b 3106 purge_bitfield_addressof_replacements = 0;
da9b1f9c 3107 purge_addressof_replacements = 0;
e9a25f70
JL
3108}
3109\f
6f086dfc
RS
3110/* Pass through the INSNS of function FNDECL and convert virtual register
3111 references to hard register references. */
3112
3113void
3114instantiate_virtual_regs (fndecl, insns)
3115 tree fndecl;
3116 rtx insns;
3117{
3118 rtx insn;
e9a25f70 3119 int i;
6f086dfc
RS
3120
3121 /* Compute the offsets to use for this function. */
3122 in_arg_offset = FIRST_PARM_OFFSET (fndecl);
3123 var_offset = STARTING_FRAME_OFFSET;
3124 dynamic_offset = STACK_DYNAMIC_OFFSET (fndecl);
3125 out_arg_offset = STACK_POINTER_OFFSET;
71038426 3126 cfa_offset = ARG_POINTER_CFA_OFFSET;
6f086dfc
RS
3127
3128 /* Scan all variables and parameters of this function. For each that is
3129 in memory, instantiate all virtual registers if the result is a valid
3130 address. If not, we do it later. That will handle most uses of virtual
3131 regs on many machines. */
3132 instantiate_decls (fndecl, 1);
3133
3134 /* Initialize recognition, indicating that volatile is OK. */
3135 init_recog ();
3136
3137 /* Scan through all the insns, instantiating every virtual register still
3138 present. */
3139 for (insn = insns; insn; insn = NEXT_INSN (insn))
3140 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
3141 || GET_CODE (insn) == CALL_INSN)
3142 {
3143 instantiate_virtual_regs_1 (&PATTERN (insn), insn, 1);
5f4f0e22 3144 instantiate_virtual_regs_1 (&REG_NOTES (insn), NULL_RTX, 0);
6f086dfc
RS
3145 }
3146
e9a25f70
JL
3147 /* Instantiate the stack slots for the parm registers, for later use in
3148 addressof elimination. */
3149 for (i = 0; i < max_parm_reg; ++i)
3150 if (parm_reg_stack_loc[i])
3151 instantiate_virtual_regs_1 (&parm_reg_stack_loc[i], NULL_RTX, 0);
3152
6f086dfc
RS
3153 /* Now instantiate the remaining register equivalences for debugging info.
3154 These will not be valid addresses. */
3155 instantiate_decls (fndecl, 0);
3156
3157 /* Indicate that, from now on, assign_stack_local should use
3158 frame_pointer_rtx. */
3159 virtuals_instantiated = 1;
3160}
3161
3162/* Scan all decls in FNDECL (both variables and parameters) and instantiate
3163 all virtual registers in their DECL_RTL's.
3164
3165 If VALID_ONLY, do this only if the resulting address is still valid.
3166 Otherwise, always do it. */
3167
3168static void
3169instantiate_decls (fndecl, valid_only)
3170 tree fndecl;
3171 int valid_only;
3172{
3173 tree decl;
3174
e1686233 3175 if (DECL_SAVED_INSNS (fndecl))
6f086dfc
RS
3176 /* When compiling an inline function, the obstack used for
3177 rtl allocation is the maybepermanent_obstack. Calling
3178 `resume_temporary_allocation' switches us back to that
3179 obstack while we process this function's parameters. */
3180 resume_temporary_allocation ();
3181
3182 /* Process all parameters of the function. */
3183 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
3184 {
e5e809f4
JL
3185 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (decl));
3186
ce717ce4
JW
3187 instantiate_decl (DECL_RTL (decl), size, valid_only);
3188
3189 /* If the parameter was promoted, then the incoming RTL mode may be
3190 larger than the declared type size. We must use the larger of
3191 the two sizes. */
3192 size = MAX (GET_MODE_SIZE (GET_MODE (DECL_INCOMING_RTL (decl))), size);
3193 instantiate_decl (DECL_INCOMING_RTL (decl), size, valid_only);
6f086dfc
RS
3194 }
3195
0f41302f 3196 /* Now process all variables defined in the function or its subblocks. */
6f086dfc
RS
3197 instantiate_decls_1 (DECL_INITIAL (fndecl), valid_only);
3198
79c0672e 3199 if (DECL_INLINE (fndecl) || DECL_DEFER_OUTPUT (fndecl))
6f086dfc
RS
3200 {
3201 /* Save all rtl allocated for this function by raising the
3202 high-water mark on the maybepermanent_obstack. */
3203 preserve_data ();
3204 /* All further rtl allocation is now done in the current_obstack. */
3205 rtl_in_current_obstack ();
3206 }
3207}
3208
3209/* Subroutine of instantiate_decls: Process all decls in the given
3210 BLOCK node and all its subblocks. */
3211
3212static void
3213instantiate_decls_1 (let, valid_only)
3214 tree let;
3215 int valid_only;
3216{
3217 tree t;
3218
3219 for (t = BLOCK_VARS (let); t; t = TREE_CHAIN (t))
5a73491b
RK
3220 instantiate_decl (DECL_RTL (t), int_size_in_bytes (TREE_TYPE (t)),
3221 valid_only);
6f086dfc
RS
3222
3223 /* Process all subblocks. */
3224 for (t = BLOCK_SUBBLOCKS (let); t; t = TREE_CHAIN (t))
3225 instantiate_decls_1 (t, valid_only);
3226}
5a73491b 3227
8008b228 3228/* Subroutine of the preceding procedures: Given RTL representing a
5a73491b
RK
3229 decl and the size of the object, do any instantiation required.
3230
3231 If VALID_ONLY is non-zero, it means that the RTL should only be
3232 changed if the new address is valid. */
3233
3234static void
3235instantiate_decl (x, size, valid_only)
3236 rtx x;
3237 int size;
3238 int valid_only;
3239{
3240 enum machine_mode mode;
3241 rtx addr;
3242
3243 /* If this is not a MEM, no need to do anything. Similarly if the
3244 address is a constant or a register that is not a virtual register. */
3245
3246 if (x == 0 || GET_CODE (x) != MEM)
3247 return;
3248
3249 addr = XEXP (x, 0);
3250 if (CONSTANT_P (addr)
956d6950 3251 || (GET_CODE (addr) == ADDRESSOF && GET_CODE (XEXP (addr, 0)) == REG)
5a73491b
RK
3252 || (GET_CODE (addr) == REG
3253 && (REGNO (addr) < FIRST_VIRTUAL_REGISTER
3254 || REGNO (addr) > LAST_VIRTUAL_REGISTER)))
3255 return;
3256
3257 /* If we should only do this if the address is valid, copy the address.
3258 We need to do this so we can undo any changes that might make the
3259 address invalid. This copy is unfortunate, but probably can't be
3260 avoided. */
3261
3262 if (valid_only)
3263 addr = copy_rtx (addr);
3264
3265 instantiate_virtual_regs_1 (&addr, NULL_RTX, 0);
3266
87ce34d6
JW
3267 if (valid_only)
3268 {
3269 /* Now verify that the resulting address is valid for every integer or
3270 floating-point mode up to and including SIZE bytes long. We do this
3271 since the object might be accessed in any mode and frame addresses
3272 are shared. */
3273
3274 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
3275 mode != VOIDmode && GET_MODE_SIZE (mode) <= size;
3276 mode = GET_MODE_WIDER_MODE (mode))
3277 if (! memory_address_p (mode, addr))
3278 return;
5a73491b 3279
87ce34d6
JW
3280 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3281 mode != VOIDmode && GET_MODE_SIZE (mode) <= size;
3282 mode = GET_MODE_WIDER_MODE (mode))
3283 if (! memory_address_p (mode, addr))
3284 return;
3285 }
5a73491b 3286
87ce34d6
JW
3287 /* Put back the address now that we have updated it and we either know
3288 it is valid or we don't care whether it is valid. */
5a73491b
RK
3289
3290 XEXP (x, 0) = addr;
3291}
6f086dfc
RS
3292\f
3293/* Given a pointer to a piece of rtx and an optional pointer to the
3294 containing object, instantiate any virtual registers present in it.
3295
3296 If EXTRA_INSNS, we always do the replacement and generate
3297 any extra insns before OBJECT. If it zero, we do nothing if replacement
3298 is not valid.
3299
3300 Return 1 if we either had nothing to do or if we were able to do the
3301 needed replacement. Return 0 otherwise; we only return zero if
3302 EXTRA_INSNS is zero.
3303
3304 We first try some simple transformations to avoid the creation of extra
3305 pseudos. */
3306
3307static int
3308instantiate_virtual_regs_1 (loc, object, extra_insns)
3309 rtx *loc;
3310 rtx object;
3311 int extra_insns;
3312{
3313 rtx x;
3314 RTX_CODE code;
3315 rtx new = 0;
07444f1d 3316 HOST_WIDE_INT offset = 0;
6f086dfc
RS
3317 rtx temp;
3318 rtx seq;
3319 int i, j;
6f7d635c 3320 const char *fmt;
6f086dfc
RS
3321
3322 /* Re-start here to avoid recursion in common cases. */
3323 restart:
3324
3325 x = *loc;
3326 if (x == 0)
3327 return 1;
3328
3329 code = GET_CODE (x);
3330
3331 /* Check for some special cases. */
3332 switch (code)
3333 {
3334 case CONST_INT:
3335 case CONST_DOUBLE:
3336 case CONST:
3337 case SYMBOL_REF:
3338 case CODE_LABEL:
3339 case PC:
3340 case CC0:
3341 case ASM_INPUT:
3342 case ADDR_VEC:
3343 case ADDR_DIFF_VEC:
3344 case RETURN:
3345 return 1;
3346
3347 case SET:
3348 /* We are allowed to set the virtual registers. This means that
38e01259 3349 the actual register should receive the source minus the
6f086dfc
RS
3350 appropriate offset. This is used, for example, in the handling
3351 of non-local gotos. */
3352 if (SET_DEST (x) == virtual_incoming_args_rtx)
3353 new = arg_pointer_rtx, offset = - in_arg_offset;
3354 else if (SET_DEST (x) == virtual_stack_vars_rtx)
dfd3dae6 3355 new = frame_pointer_rtx, offset = - var_offset;
6f086dfc
RS
3356 else if (SET_DEST (x) == virtual_stack_dynamic_rtx)
3357 new = stack_pointer_rtx, offset = - dynamic_offset;
3358 else if (SET_DEST (x) == virtual_outgoing_args_rtx)
3359 new = stack_pointer_rtx, offset = - out_arg_offset;
71038426
RH
3360 else if (SET_DEST (x) == virtual_cfa_rtx)
3361 new = arg_pointer_rtx, offset = - cfa_offset;
6f086dfc
RS
3362
3363 if (new)
3364 {
3365 /* The only valid sources here are PLUS or REG. Just do
3366 the simplest possible thing to handle them. */
3367 if (GET_CODE (SET_SRC (x)) != REG
3368 && GET_CODE (SET_SRC (x)) != PLUS)
3369 abort ();
3370
3371 start_sequence ();
3372 if (GET_CODE (SET_SRC (x)) != REG)
5f4f0e22 3373 temp = force_operand (SET_SRC (x), NULL_RTX);
6f086dfc
RS
3374 else
3375 temp = SET_SRC (x);
5f4f0e22 3376 temp = force_operand (plus_constant (temp, offset), NULL_RTX);
6f086dfc
RS
3377 seq = get_insns ();
3378 end_sequence ();
3379
3380 emit_insns_before (seq, object);
3381 SET_DEST (x) = new;
3382
e9a25f70 3383 if (! validate_change (object, &SET_SRC (x), temp, 0)
6f086dfc
RS
3384 || ! extra_insns)
3385 abort ();
3386
3387 return 1;
3388 }
3389
3390 instantiate_virtual_regs_1 (&SET_DEST (x), object, extra_insns);
3391 loc = &SET_SRC (x);
3392 goto restart;
3393
3394 case PLUS:
3395 /* Handle special case of virtual register plus constant. */
3396 if (CONSTANT_P (XEXP (x, 1)))
3397 {
b1f82ccf 3398 rtx old, new_offset;
6f086dfc
RS
3399
3400 /* Check for (plus (plus VIRT foo) (const_int)) first. */
3401 if (GET_CODE (XEXP (x, 0)) == PLUS)
3402 {
3403 rtx inner = XEXP (XEXP (x, 0), 0);
3404
3405 if (inner == virtual_incoming_args_rtx)
3406 new = arg_pointer_rtx, offset = in_arg_offset;
3407 else if (inner == virtual_stack_vars_rtx)
3408 new = frame_pointer_rtx, offset = var_offset;
3409 else if (inner == virtual_stack_dynamic_rtx)
3410 new = stack_pointer_rtx, offset = dynamic_offset;
3411 else if (inner == virtual_outgoing_args_rtx)
3412 new = stack_pointer_rtx, offset = out_arg_offset;
71038426
RH
3413 else if (inner == virtual_cfa_rtx)
3414 new = arg_pointer_rtx, offset = cfa_offset;
6f086dfc
RS
3415 else
3416 {
3417 loc = &XEXP (x, 0);
3418 goto restart;
3419 }
3420
3421 instantiate_virtual_regs_1 (&XEXP (XEXP (x, 0), 1), object,
3422 extra_insns);
38a448ca 3423 new = gen_rtx_PLUS (Pmode, new, XEXP (XEXP (x, 0), 1));
6f086dfc
RS
3424 }
3425
3426 else if (XEXP (x, 0) == virtual_incoming_args_rtx)
3427 new = arg_pointer_rtx, offset = in_arg_offset;
3428 else if (XEXP (x, 0) == virtual_stack_vars_rtx)
3429 new = frame_pointer_rtx, offset = var_offset;
3430 else if (XEXP (x, 0) == virtual_stack_dynamic_rtx)
3431 new = stack_pointer_rtx, offset = dynamic_offset;
3432 else if (XEXP (x, 0) == virtual_outgoing_args_rtx)
3433 new = stack_pointer_rtx, offset = out_arg_offset;
71038426
RH
3434 else if (XEXP (x, 0) == virtual_cfa_rtx)
3435 new = arg_pointer_rtx, offset = cfa_offset;
6f086dfc
RS
3436 else
3437 {
3438 /* We know the second operand is a constant. Unless the
3439 first operand is a REG (which has been already checked),
3440 it needs to be checked. */
3441 if (GET_CODE (XEXP (x, 0)) != REG)
3442 {
3443 loc = &XEXP (x, 0);
3444 goto restart;
3445 }
3446 return 1;
3447 }
3448
b1f82ccf 3449 new_offset = plus_constant (XEXP (x, 1), offset);
6f086dfc 3450
b1f82ccf
DE
3451 /* If the new constant is zero, try to replace the sum with just
3452 the register. */
3453 if (new_offset == const0_rtx
3454 && validate_change (object, loc, new, 0))
6f086dfc
RS
3455 return 1;
3456
b1f82ccf
DE
3457 /* Next try to replace the register and new offset.
3458 There are two changes to validate here and we can't assume that
3459 in the case of old offset equals new just changing the register
3460 will yield a valid insn. In the interests of a little efficiency,
3461 however, we only call validate change once (we don't queue up the
0f41302f 3462 changes and then call apply_change_group). */
b1f82ccf
DE
3463
3464 old = XEXP (x, 0);
3465 if (offset == 0
3466 ? ! validate_change (object, &XEXP (x, 0), new, 0)
3467 : (XEXP (x, 0) = new,
3468 ! validate_change (object, &XEXP (x, 1), new_offset, 0)))
6f086dfc
RS
3469 {
3470 if (! extra_insns)
3471 {
3472 XEXP (x, 0) = old;
3473 return 0;
3474 }
3475
3476 /* Otherwise copy the new constant into a register and replace
3477 constant with that register. */
3478 temp = gen_reg_rtx (Pmode);
b1f82ccf 3479 XEXP (x, 0) = new;
6f086dfc 3480 if (validate_change (object, &XEXP (x, 1), temp, 0))
b1f82ccf 3481 emit_insn_before (gen_move_insn (temp, new_offset), object);
6f086dfc
RS
3482 else
3483 {
3484 /* If that didn't work, replace this expression with a
3485 register containing the sum. */
3486
6f086dfc 3487 XEXP (x, 0) = old;
38a448ca 3488 new = gen_rtx_PLUS (Pmode, new, new_offset);
6f086dfc
RS
3489
3490 start_sequence ();
5f4f0e22 3491 temp = force_operand (new, NULL_RTX);
6f086dfc
RS
3492 seq = get_insns ();
3493 end_sequence ();
3494
3495 emit_insns_before (seq, object);
3496 if (! validate_change (object, loc, temp, 0)
3497 && ! validate_replace_rtx (x, temp, object))
3498 abort ();
3499 }
3500 }
3501
3502 return 1;
3503 }
3504
3505 /* Fall through to generic two-operand expression case. */
3506 case EXPR_LIST:
3507 case CALL:
3508 case COMPARE:
3509 case MINUS:
3510 case MULT:
3511 case DIV: case UDIV:
3512 case MOD: case UMOD:
3513 case AND: case IOR: case XOR:
45620ed4
RK
3514 case ROTATERT: case ROTATE:
3515 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
6f086dfc
RS
3516 case NE: case EQ:
3517 case GE: case GT: case GEU: case GTU:
3518 case LE: case LT: case LEU: case LTU:
3519 if (XEXP (x, 1) && ! CONSTANT_P (XEXP (x, 1)))
3520 instantiate_virtual_regs_1 (&XEXP (x, 1), object, extra_insns);
3521 loc = &XEXP (x, 0);
3522 goto restart;
3523
3524 case MEM:
3525 /* Most cases of MEM that convert to valid addresses have already been
4fd796bb 3526 handled by our scan of decls. The only special handling we
6f086dfc 3527 need here is to make a copy of the rtx to ensure it isn't being
b335c2cc 3528 shared if we have to change it to a pseudo.
6f086dfc
RS
3529
3530 If the rtx is a simple reference to an address via a virtual register,
3531 it can potentially be shared. In such cases, first try to make it
3532 a valid address, which can also be shared. Otherwise, copy it and
3533 proceed normally.
3534
3535 First check for common cases that need no processing. These are
3536 usually due to instantiation already being done on a previous instance
3537 of a shared rtx. */
3538
3539 temp = XEXP (x, 0);
3540 if (CONSTANT_ADDRESS_P (temp)
3541#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3542 || temp == arg_pointer_rtx
b37f453b
DE
3543#endif
3544#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3545 || temp == hard_frame_pointer_rtx
6f086dfc
RS
3546#endif
3547 || temp == frame_pointer_rtx)
3548 return 1;
3549
3550 if (GET_CODE (temp) == PLUS
3551 && CONSTANT_ADDRESS_P (XEXP (temp, 1))
3552 && (XEXP (temp, 0) == frame_pointer_rtx
b37f453b
DE
3553#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3554 || XEXP (temp, 0) == hard_frame_pointer_rtx
3555#endif
6f086dfc
RS
3556#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3557 || XEXP (temp, 0) == arg_pointer_rtx
3558#endif
3559 ))
3560 return 1;
3561
3562 if (temp == virtual_stack_vars_rtx
3563 || temp == virtual_incoming_args_rtx
3564 || (GET_CODE (temp) == PLUS
3565 && CONSTANT_ADDRESS_P (XEXP (temp, 1))
3566 && (XEXP (temp, 0) == virtual_stack_vars_rtx
3567 || XEXP (temp, 0) == virtual_incoming_args_rtx)))
3568 {
3569 /* This MEM may be shared. If the substitution can be done without
3570 the need to generate new pseudos, we want to do it in place
3571 so all copies of the shared rtx benefit. The call below will
3572 only make substitutions if the resulting address is still
3573 valid.
3574
3575 Note that we cannot pass X as the object in the recursive call
3576 since the insn being processed may not allow all valid
6461be14
RS
3577 addresses. However, if we were not passed on object, we can
3578 only modify X without copying it if X will have a valid
3579 address.
6f086dfc 3580
6461be14
RS
3581 ??? Also note that this can still lose if OBJECT is an insn that
3582 has less restrictions on an address that some other insn.
3583 In that case, we will modify the shared address. This case
4fd796bb
RK
3584 doesn't seem very likely, though. One case where this could
3585 happen is in the case of a USE or CLOBBER reference, but we
3586 take care of that below. */
6461be14
RS
3587
3588 if (instantiate_virtual_regs_1 (&XEXP (x, 0),
3589 object ? object : x, 0))
6f086dfc
RS
3590 return 1;
3591
3592 /* Otherwise make a copy and process that copy. We copy the entire
3593 RTL expression since it might be a PLUS which could also be
3594 shared. */
3595 *loc = x = copy_rtx (x);
3596 }
3597
3598 /* Fall through to generic unary operation case. */
6f086dfc
RS
3599 case SUBREG:
3600 case STRICT_LOW_PART:
3601 case NEG: case NOT:
3602 case PRE_DEC: case PRE_INC: case POST_DEC: case POST_INC:
3603 case SIGN_EXTEND: case ZERO_EXTEND:
3604 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
3605 case FLOAT: case FIX:
3606 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
3607 case ABS:
3608 case SQRT:
3609 case FFS:
3610 /* These case either have just one operand or we know that we need not
3611 check the rest of the operands. */
3612 loc = &XEXP (x, 0);
3613 goto restart;
3614
4fd796bb
RK
3615 case USE:
3616 case CLOBBER:
3617 /* If the operand is a MEM, see if the change is a valid MEM. If not,
3618 go ahead and make the invalid one, but do it to a copy. For a REG,
3619 just make the recursive call, since there's no chance of a problem. */
3620
3621 if ((GET_CODE (XEXP (x, 0)) == MEM
3622 && instantiate_virtual_regs_1 (&XEXP (XEXP (x, 0), 0), XEXP (x, 0),
3623 0))
3624 || (GET_CODE (XEXP (x, 0)) == REG
7694ce35 3625 && instantiate_virtual_regs_1 (&XEXP (x, 0), object, 0)))
4fd796bb
RK
3626 return 1;
3627
3628 XEXP (x, 0) = copy_rtx (XEXP (x, 0));
3629 loc = &XEXP (x, 0);
3630 goto restart;
3631
6f086dfc
RS
3632 case REG:
3633 /* Try to replace with a PLUS. If that doesn't work, compute the sum
3634 in front of this insn and substitute the temporary. */
3635 if (x == virtual_incoming_args_rtx)
3636 new = arg_pointer_rtx, offset = in_arg_offset;
3637 else if (x == virtual_stack_vars_rtx)
3638 new = frame_pointer_rtx, offset = var_offset;
3639 else if (x == virtual_stack_dynamic_rtx)
3640 new = stack_pointer_rtx, offset = dynamic_offset;
3641 else if (x == virtual_outgoing_args_rtx)
3642 new = stack_pointer_rtx, offset = out_arg_offset;
71038426
RH
3643 else if (x == virtual_cfa_rtx)
3644 new = arg_pointer_rtx, offset = cfa_offset;
6f086dfc
RS
3645
3646 if (new)
3647 {
3648 temp = plus_constant (new, offset);
3649 if (!validate_change (object, loc, temp, 0))
3650 {
3651 if (! extra_insns)
3652 return 0;
3653
3654 start_sequence ();
5f4f0e22 3655 temp = force_operand (temp, NULL_RTX);
6f086dfc
RS
3656 seq = get_insns ();
3657 end_sequence ();
3658
3659 emit_insns_before (seq, object);
3660 if (! validate_change (object, loc, temp, 0)
3661 && ! validate_replace_rtx (x, temp, object))
3662 abort ();
3663 }
3664 }
3665
3666 return 1;
e9a25f70
JL
3667
3668 case ADDRESSOF:
3669 if (GET_CODE (XEXP (x, 0)) == REG)
3670 return 1;
3671
3672 else if (GET_CODE (XEXP (x, 0)) == MEM)
3673 {
3674 /* If we have a (addressof (mem ..)), do any instantiation inside
3675 since we know we'll be making the inside valid when we finally
3676 remove the ADDRESSOF. */
3677 instantiate_virtual_regs_1 (&XEXP (XEXP (x, 0), 0), NULL_RTX, 0);
3678 return 1;
3679 }
3680 break;
3681
3682 default:
3683 break;
6f086dfc
RS
3684 }
3685
3686 /* Scan all subexpressions. */
3687 fmt = GET_RTX_FORMAT (code);
3688 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
3689 if (*fmt == 'e')
3690 {
3691 if (!instantiate_virtual_regs_1 (&XEXP (x, i), object, extra_insns))
3692 return 0;
3693 }
3694 else if (*fmt == 'E')
3695 for (j = 0; j < XVECLEN (x, i); j++)
3696 if (! instantiate_virtual_regs_1 (&XVECEXP (x, i, j), object,
3697 extra_insns))
3698 return 0;
3699
3700 return 1;
3701}
3702\f
3703/* Optimization: assuming this function does not receive nonlocal gotos,
3704 delete the handlers for such, as well as the insns to establish
3705 and disestablish them. */
3706
3707static void
3708delete_handlers ()
3709{
3710 rtx insn;
3711 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3712 {
3713 /* Delete the handler by turning off the flag that would
3714 prevent jump_optimize from deleting it.
3715 Also permit deletion of the nonlocal labels themselves
3716 if nothing local refers to them. */
3717 if (GET_CODE (insn) == CODE_LABEL)
71cd4a8d
JW
3718 {
3719 tree t, last_t;
3720
3721 LABEL_PRESERVE_P (insn) = 0;
3722
3723 /* Remove it from the nonlocal_label list, to avoid confusing
3724 flow. */
3725 for (t = nonlocal_labels, last_t = 0; t;
3726 last_t = t, t = TREE_CHAIN (t))
3727 if (DECL_RTL (TREE_VALUE (t)) == insn)
3728 break;
3729 if (t)
3730 {
3731 if (! last_t)
3732 nonlocal_labels = TREE_CHAIN (nonlocal_labels);
3733 else
3734 TREE_CHAIN (last_t) = TREE_CHAIN (t);
3735 }
3736 }
ba716ac9
BS
3737 if (GET_CODE (insn) == INSN)
3738 {
3739 int can_delete = 0;
3740 rtx t;
3741 for (t = nonlocal_goto_handler_slots; t != 0; t = XEXP (t, 1))
3742 if (reg_mentioned_p (t, PATTERN (insn)))
3743 {
3744 can_delete = 1;
3745 break;
3746 }
3747 if (can_delete
59257ff7
RK
3748 || (nonlocal_goto_stack_level != 0
3749 && reg_mentioned_p (nonlocal_goto_stack_level,
ba716ac9
BS
3750 PATTERN (insn))))
3751 delete_insn (insn);
3752 }
6f086dfc
RS
3753 }
3754}
6f086dfc
RS
3755\f
3756/* Output a USE for any register use in RTL.
3757 This is used with -noreg to mark the extent of lifespan
3758 of any registers used in a user-visible variable's DECL_RTL. */
3759
3760void
3761use_variable (rtl)
3762 rtx rtl;
3763{
3764 if (GET_CODE (rtl) == REG)
3765 /* This is a register variable. */
38a448ca 3766 emit_insn (gen_rtx_USE (VOIDmode, rtl));
6f086dfc
RS
3767 else if (GET_CODE (rtl) == MEM
3768 && GET_CODE (XEXP (rtl, 0)) == REG
3769 && (REGNO (XEXP (rtl, 0)) < FIRST_VIRTUAL_REGISTER
3770 || REGNO (XEXP (rtl, 0)) > LAST_VIRTUAL_REGISTER)
3771 && XEXP (rtl, 0) != current_function_internal_arg_pointer)
3772 /* This is a variable-sized structure. */
38a448ca 3773 emit_insn (gen_rtx_USE (VOIDmode, XEXP (rtl, 0)));
6f086dfc
RS
3774}
3775
3776/* Like use_variable except that it outputs the USEs after INSN
3777 instead of at the end of the insn-chain. */
3778
3779void
3780use_variable_after (rtl, insn)
3781 rtx rtl, insn;
3782{
3783 if (GET_CODE (rtl) == REG)
3784 /* This is a register variable. */
38a448ca 3785 emit_insn_after (gen_rtx_USE (VOIDmode, rtl), insn);
6f086dfc
RS
3786 else if (GET_CODE (rtl) == MEM
3787 && GET_CODE (XEXP (rtl, 0)) == REG
3788 && (REGNO (XEXP (rtl, 0)) < FIRST_VIRTUAL_REGISTER
3789 || REGNO (XEXP (rtl, 0)) > LAST_VIRTUAL_REGISTER)
3790 && XEXP (rtl, 0) != current_function_internal_arg_pointer)
3791 /* This is a variable-sized structure. */
38a448ca 3792 emit_insn_after (gen_rtx_USE (VOIDmode, XEXP (rtl, 0)), insn);
6f086dfc
RS
3793}
3794\f
3795int
3796max_parm_reg_num ()
3797{
3798 return max_parm_reg;
3799}
3800
3801/* Return the first insn following those generated by `assign_parms'. */
3802
3803rtx
3804get_first_nonparm_insn ()
3805{
3806 if (last_parm_insn)
3807 return NEXT_INSN (last_parm_insn);
3808 return get_insns ();
3809}
3810
5378192b
RS
3811/* Return the first NOTE_INSN_BLOCK_BEG note in the function.
3812 Crash if there is none. */
3813
3814rtx
3815get_first_block_beg ()
3816{
3817 register rtx searcher;
3818 register rtx insn = get_first_nonparm_insn ();
3819
3820 for (searcher = insn; searcher; searcher = NEXT_INSN (searcher))
3821 if (GET_CODE (searcher) == NOTE
3822 && NOTE_LINE_NUMBER (searcher) == NOTE_INSN_BLOCK_BEG)
3823 return searcher;
3824
3825 abort (); /* Invalid call to this function. (See comments above.) */
3826 return NULL_RTX;
3827}
3828
d181c154
RS
3829/* Return 1 if EXP is an aggregate type (or a value with aggregate type).
3830 This means a type for which function calls must pass an address to the
3831 function or get an address back from the function.
3832 EXP may be a type node or an expression (whose type is tested). */
6f086dfc
RS
3833
3834int
3835aggregate_value_p (exp)
3836 tree exp;
3837{
9d790a4f
RS
3838 int i, regno, nregs;
3839 rtx reg;
d181c154
RS
3840 tree type;
3841 if (TREE_CODE_CLASS (TREE_CODE (exp)) == 't')
3842 type = exp;
3843 else
3844 type = TREE_TYPE (exp);
3845
3846 if (RETURN_IN_MEMORY (type))
6f086dfc 3847 return 1;
956d6950 3848 /* Types that are TREE_ADDRESSABLE must be constructed in memory,
49a2e5b2
DE
3849 and thus can't be returned in registers. */
3850 if (TREE_ADDRESSABLE (type))
3851 return 1;
05e3bdb9 3852 if (flag_pcc_struct_return && AGGREGATE_TYPE_P (type))
6f086dfc 3853 return 1;
9d790a4f
RS
3854 /* Make sure we have suitable call-clobbered regs to return
3855 the value in; if not, we must return it in memory. */
d181c154 3856 reg = hard_function_value (type, 0);
e71f7aa5
JW
3857
3858 /* If we have something other than a REG (e.g. a PARALLEL), then assume
3859 it is OK. */
3860 if (GET_CODE (reg) != REG)
3861 return 0;
3862
9d790a4f 3863 regno = REGNO (reg);
d181c154 3864 nregs = HARD_REGNO_NREGS (regno, TYPE_MODE (type));
9d790a4f
RS
3865 for (i = 0; i < nregs; i++)
3866 if (! call_used_regs[regno + i])
3867 return 1;
6f086dfc
RS
3868 return 0;
3869}
3870\f
3871/* Assign RTL expressions to the function's parameters.
3872 This may involve copying them into registers and using
3873 those registers as the RTL for them.
3874
3875 If SECOND_TIME is non-zero it means that this function is being
3876 called a second time. This is done by integrate.c when a function's
3877 compilation is deferred. We need to come back here in case the
3878 FUNCTION_ARG macro computes items needed for the rest of the compilation
3879 (such as changing which registers are fixed or caller-saved). But suppress
3880 writing any insns or setting DECL_RTL of anything in this case. */
3881
3882void
3883assign_parms (fndecl, second_time)
3884 tree fndecl;
3885 int second_time;
3886{
3887 register tree parm;
3888 register rtx entry_parm = 0;
3889 register rtx stack_parm = 0;
3890 CUMULATIVE_ARGS args_so_far;
621061f4
RK
3891 enum machine_mode promoted_mode, passed_mode;
3892 enum machine_mode nominal_mode, promoted_nominal_mode;
00d8a4c1 3893 int unsignedp;
6f086dfc
RS
3894 /* Total space needed so far for args on the stack,
3895 given as a constant and a tree-expression. */
3896 struct args_size stack_args_size;
3897 tree fntype = TREE_TYPE (fndecl);
3898 tree fnargs = DECL_ARGUMENTS (fndecl);
3899 /* This is used for the arg pointer when referring to stack args. */
3900 rtx internal_arg_pointer;
3901 /* This is a dummy PARM_DECL that we used for the function result if
3902 the function returns a structure. */
3903 tree function_result_decl = 0;
54ea1de9 3904#ifdef SETUP_INCOMING_VARARGS
6f086dfc 3905 int varargs_setup = 0;
54ea1de9 3906#endif
3412b298 3907 rtx conversion_insns = 0;
6f086dfc
RS
3908
3909 /* Nonzero if the last arg is named `__builtin_va_alist',
3910 which is used on some machines for old-fashioned non-ANSI varargs.h;
3911 this should be stuck onto the stack as if it had arrived there. */
3b69d50e
RK
3912 int hide_last_arg
3913 = (current_function_varargs
3914 && fnargs
6f086dfc
RS
3915 && (parm = tree_last (fnargs)) != 0
3916 && DECL_NAME (parm)
3917 && (! strcmp (IDENTIFIER_POINTER (DECL_NAME (parm)),
3918 "__builtin_va_alist")));
3919
3920 /* Nonzero if function takes extra anonymous args.
3921 This means the last named arg must be on the stack
0f41302f 3922 right before the anonymous ones. */
6f086dfc
RS
3923 int stdarg
3924 = (TYPE_ARG_TYPES (fntype) != 0
3925 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
3926 != void_type_node));
3927
ebb904cb
RK
3928 current_function_stdarg = stdarg;
3929
6f086dfc
RS
3930 /* If the reg that the virtual arg pointer will be translated into is
3931 not a fixed reg or is the stack pointer, make a copy of the virtual
3932 arg pointer, and address parms via the copy. The frame pointer is
3933 considered fixed even though it is not marked as such.
3934
3935 The second time through, simply use ap to avoid generating rtx. */
3936
3937 if ((ARG_POINTER_REGNUM == STACK_POINTER_REGNUM
3938 || ! (fixed_regs[ARG_POINTER_REGNUM]
3939 || ARG_POINTER_REGNUM == FRAME_POINTER_REGNUM))
3940 && ! second_time)
3941 internal_arg_pointer = copy_to_reg (virtual_incoming_args_rtx);
3942 else
3943 internal_arg_pointer = virtual_incoming_args_rtx;
3944 current_function_internal_arg_pointer = internal_arg_pointer;
3945
3946 stack_args_size.constant = 0;
3947 stack_args_size.var = 0;
3948
3949 /* If struct value address is treated as the first argument, make it so. */
3950 if (aggregate_value_p (DECL_RESULT (fndecl))
3951 && ! current_function_returns_pcc_struct
3952 && struct_value_incoming_rtx == 0)
3953 {
f9f29478 3954 tree type = build_pointer_type (TREE_TYPE (fntype));
6f086dfc 3955
5f4f0e22 3956 function_result_decl = build_decl (PARM_DECL, NULL_TREE, type);
6f086dfc
RS
3957
3958 DECL_ARG_TYPE (function_result_decl) = type;
3959 TREE_CHAIN (function_result_decl) = fnargs;
3960 fnargs = function_result_decl;
3961 }
3962
e9a25f70 3963 max_parm_reg = LAST_VIRTUAL_REGISTER + 1;
e2ecd91c 3964 parm_reg_stack_loc = (rtx *) xcalloc (max_parm_reg, sizeof (rtx));
6f086dfc
RS
3965
3966#ifdef INIT_CUMULATIVE_INCOMING_ARGS
ea0d4c4b 3967 INIT_CUMULATIVE_INCOMING_ARGS (args_so_far, fntype, NULL_RTX);
6f086dfc 3968#else
2c7ee1a6 3969 INIT_CUMULATIVE_ARGS (args_so_far, fntype, NULL_RTX, 0);
6f086dfc
RS
3970#endif
3971
3972 /* We haven't yet found an argument that we must push and pretend the
3973 caller did. */
3974 current_function_pretend_args_size = 0;
3975
3976 for (parm = fnargs; parm; parm = TREE_CHAIN (parm))
3977 {
05e3bdb9 3978 int aggregate = AGGREGATE_TYPE_P (TREE_TYPE (parm));
6f086dfc
RS
3979 struct args_size stack_offset;
3980 struct args_size arg_size;
3981 int passed_pointer = 0;
621061f4 3982 int did_conversion = 0;
6f086dfc 3983 tree passed_type = DECL_ARG_TYPE (parm);
621061f4 3984 tree nominal_type = TREE_TYPE (parm);
9ab70a9b 3985 int pretend_named;
6f086dfc
RS
3986
3987 /* Set LAST_NAMED if this is last named arg before some
bf9c83fe 3988 anonymous args. */
6f086dfc
RS
3989 int last_named = ((TREE_CHAIN (parm) == 0
3990 || DECL_NAME (TREE_CHAIN (parm)) == 0)
3b69d50e 3991 && (stdarg || current_function_varargs));
bf9c83fe
JW
3992 /* Set NAMED_ARG if this arg should be treated as a named arg. For
3993 most machines, if this is a varargs/stdarg function, then we treat
3994 the last named arg as if it were anonymous too. */
e5e809f4 3995 int named_arg = STRICT_ARGUMENT_NAMING ? 1 : ! last_named;
6f086dfc
RS
3996
3997 if (TREE_TYPE (parm) == error_mark_node
3998 /* This can happen after weird syntax errors
3999 or if an enum type is defined among the parms. */
4000 || TREE_CODE (parm) != PARM_DECL
4001 || passed_type == NULL)
4002 {
38a448ca
RH
4003 DECL_INCOMING_RTL (parm) = DECL_RTL (parm)
4004 = gen_rtx_MEM (BLKmode, const0_rtx);
6f086dfc
RS
4005 TREE_USED (parm) = 1;
4006 continue;
4007 }
4008
4009 /* For varargs.h function, save info about regs and stack space
4010 used by the individual args, not including the va_alist arg. */
3b69d50e 4011 if (hide_last_arg && last_named)
6f086dfc
RS
4012 current_function_args_info = args_so_far;
4013
4014 /* Find mode of arg as it is passed, and mode of arg
4015 as it should be during execution of this function. */
4016 passed_mode = TYPE_MODE (passed_type);
621061f4 4017 nominal_mode = TYPE_MODE (nominal_type);
6f086dfc 4018
16bae307
RS
4019 /* If the parm's mode is VOID, its value doesn't matter,
4020 and avoid the usual things like emit_move_insn that could crash. */
4021 if (nominal_mode == VOIDmode)
4022 {
4023 DECL_INCOMING_RTL (parm) = DECL_RTL (parm) = const0_rtx;
4024 continue;
4025 }
4026
3f46679a
RK
4027 /* If the parm is to be passed as a transparent union, use the
4028 type of the first field for the tests below. We have already
4029 verified that the modes are the same. */
4030 if (DECL_TRANSPARENT_UNION (parm)
4031 || TYPE_TRANSPARENT_UNION (passed_type))
4032 passed_type = TREE_TYPE (TYPE_FIELDS (passed_type));
4033
a14ae508
RK
4034 /* See if this arg was passed by invisible reference. It is if
4035 it is an object whose size depends on the contents of the
4036 object itself or if the machine requires these objects be passed
4037 that way. */
4038
4039 if ((TREE_CODE (TYPE_SIZE (passed_type)) != INTEGER_CST
4040 && contains_placeholder_p (TYPE_SIZE (passed_type)))
657bb6dc 4041 || TREE_ADDRESSABLE (passed_type)
6f086dfc 4042#ifdef FUNCTION_ARG_PASS_BY_REFERENCE
a14ae508 4043 || FUNCTION_ARG_PASS_BY_REFERENCE (args_so_far, passed_mode,
bf9c83fe 4044 passed_type, named_arg)
a14ae508
RK
4045#endif
4046 )
6f086dfc 4047 {
621061f4 4048 passed_type = nominal_type = build_pointer_type (passed_type);
6f086dfc
RS
4049 passed_pointer = 1;
4050 passed_mode = nominal_mode = Pmode;
4051 }
6f086dfc 4052
a53e14c0
RK
4053 promoted_mode = passed_mode;
4054
4055#ifdef PROMOTE_FUNCTION_ARGS
4056 /* Compute the mode in which the arg is actually extended to. */
7940255d 4057 unsignedp = TREE_UNSIGNED (passed_type);
a5a52dbc 4058 promoted_mode = promote_mode (passed_type, promoted_mode, &unsignedp, 1);
a53e14c0
RK
4059#endif
4060
6f086dfc
RS
4061 /* Let machine desc say which reg (if any) the parm arrives in.
4062 0 means it arrives on the stack. */
4063#ifdef FUNCTION_INCOMING_ARG
a53e14c0 4064 entry_parm = FUNCTION_INCOMING_ARG (args_so_far, promoted_mode,
bf9c83fe 4065 passed_type, named_arg);
6f086dfc 4066#else
a53e14c0 4067 entry_parm = FUNCTION_ARG (args_so_far, promoted_mode,
bf9c83fe 4068 passed_type, named_arg);
6f086dfc
RS
4069#endif
4070
621061f4
RK
4071 if (entry_parm == 0)
4072 promoted_mode = passed_mode;
a53e14c0 4073
6f086dfc
RS
4074#ifdef SETUP_INCOMING_VARARGS
4075 /* If this is the last named parameter, do any required setup for
4076 varargs or stdargs. We need to know about the case of this being an
4077 addressable type, in which case we skip the registers it
4078 would have arrived in.
4079
4080 For stdargs, LAST_NAMED will be set for two parameters, the one that
4081 is actually the last named, and the dummy parameter. We only
4082 want to do this action once.
4083
4084 Also, indicate when RTL generation is to be suppressed. */
4085 if (last_named && !varargs_setup)
4086 {
621061f4 4087 SETUP_INCOMING_VARARGS (args_so_far, promoted_mode, passed_type,
6f086dfc
RS
4088 current_function_pretend_args_size,
4089 second_time);
4090 varargs_setup = 1;
4091 }
4092#endif
4093
4094 /* Determine parm's home in the stack,
4095 in case it arrives in the stack or we should pretend it did.
4096
4097 Compute the stack position and rtx where the argument arrives
4098 and its size.
4099
4100 There is one complexity here: If this was a parameter that would
4101 have been passed in registers, but wasn't only because it is
4102 __builtin_va_alist, we want locate_and_pad_parm to treat it as if
4103 it came in a register so that REG_PARM_STACK_SPACE isn't skipped.
4104 In this case, we call FUNCTION_ARG with NAMED set to 1 instead of
4105 0 as it was the previous time. */
4106
9ab70a9b 4107 pretend_named = named_arg || PRETEND_OUTGOING_VARARGS_NAMED;
0f11903b 4108 locate_and_pad_parm (promoted_mode, passed_type,
6f086dfc
RS
4109#ifdef STACK_PARMS_IN_REG_PARM_AREA
4110 1,
4111#else
4112#ifdef FUNCTION_INCOMING_ARG
621061f4 4113 FUNCTION_INCOMING_ARG (args_so_far, promoted_mode,
6f086dfc 4114 passed_type,
9ab70a9b 4115 pretend_named) != 0,
6f086dfc 4116#else
621061f4 4117 FUNCTION_ARG (args_so_far, promoted_mode,
6f086dfc 4118 passed_type,
9ab70a9b 4119 pretend_named) != 0,
6f086dfc
RS
4120#endif
4121#endif
4122 fndecl, &stack_args_size, &stack_offset, &arg_size);
4123
4124 if (! second_time)
4125 {
4126 rtx offset_rtx = ARGS_SIZE_RTX (stack_offset);
4127
4128 if (offset_rtx == const0_rtx)
0f11903b 4129 stack_parm = gen_rtx_MEM (promoted_mode, internal_arg_pointer);
6f086dfc 4130 else
0f11903b 4131 stack_parm = gen_rtx_MEM (promoted_mode,
38a448ca
RH
4132 gen_rtx_PLUS (Pmode,
4133 internal_arg_pointer,
4134 offset_rtx));
6f086dfc
RS
4135
4136 /* If this is a memory ref that contains aggregate components,
a00285d0
RK
4137 mark it as such for cse and loop optimize. Likewise if it
4138 is readonly. */
c6df88cb 4139 MEM_SET_IN_STRUCT_P (stack_parm, aggregate);
a00285d0 4140 RTX_UNCHANGING_P (stack_parm) = TREE_READONLY (parm);
41472af8 4141 MEM_ALIAS_SET (stack_parm) = get_alias_set (parm);
6f086dfc
RS
4142 }
4143
4144 /* If this parameter was passed both in registers and in the stack,
4145 use the copy on the stack. */
621061f4 4146 if (MUST_PASS_IN_STACK (promoted_mode, passed_type))
6f086dfc
RS
4147 entry_parm = 0;
4148
461beb10 4149#ifdef FUNCTION_ARG_PARTIAL_NREGS
6f086dfc
RS
4150 /* If this parm was passed part in regs and part in memory,
4151 pretend it arrived entirely in memory
4152 by pushing the register-part onto the stack.
4153
4154 In the special case of a DImode or DFmode that is split,
4155 we could put it together in a pseudoreg directly,
4156 but for now that's not worth bothering with. */
4157
4158 if (entry_parm)
4159 {
621061f4 4160 int nregs = FUNCTION_ARG_PARTIAL_NREGS (args_so_far, promoted_mode,
bf9c83fe 4161 passed_type, named_arg);
6f086dfc
RS
4162
4163 if (nregs > 0)
4164 {
4165 current_function_pretend_args_size
4166 = (((nregs * UNITS_PER_WORD) + (PARM_BOUNDARY / BITS_PER_UNIT) - 1)
4167 / (PARM_BOUNDARY / BITS_PER_UNIT)
4168 * (PARM_BOUNDARY / BITS_PER_UNIT));
4169
4170 if (! second_time)
5c4cdc9f
JW
4171 {
4172 /* Handle calls that pass values in multiple non-contiguous
4173 locations. The Irix 6 ABI has examples of this. */
4174 if (GET_CODE (entry_parm) == PARALLEL)
aac5cc16
RH
4175 emit_group_store (validize_mem (stack_parm), entry_parm,
4176 int_size_in_bytes (TREE_TYPE (parm)),
4177 (TYPE_ALIGN (TREE_TYPE (parm))
4178 / BITS_PER_UNIT));
5c4cdc9f
JW
4179 else
4180 move_block_from_reg (REGNO (entry_parm),
4181 validize_mem (stack_parm), nregs,
4182 int_size_in_bytes (TREE_TYPE (parm)));
4183 }
6f086dfc
RS
4184 entry_parm = stack_parm;
4185 }
4186 }
461beb10 4187#endif
6f086dfc
RS
4188
4189 /* If we didn't decide this parm came in a register,
4190 by default it came on the stack. */
4191 if (entry_parm == 0)
4192 entry_parm = stack_parm;
4193
4194 /* Record permanently how this parm was passed. */
4195 if (! second_time)
4196 DECL_INCOMING_RTL (parm) = entry_parm;
4197
4198 /* If there is actually space on the stack for this parm,
4199 count it in stack_args_size; otherwise set stack_parm to 0
4200 to indicate there is no preallocated stack slot for the parm. */
4201
4202 if (entry_parm == stack_parm
ab87f8c8
JL
4203 || (GET_CODE (entry_parm) == PARALLEL
4204 && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX)
d9ca49d5 4205#if defined (REG_PARM_STACK_SPACE) && ! defined (MAYBE_REG_PARM_STACK_SPACE)
6f086dfc 4206 /* On some machines, even if a parm value arrives in a register
d9ca49d5
JW
4207 there is still an (uninitialized) stack slot allocated for it.
4208
4209 ??? When MAYBE_REG_PARM_STACK_SPACE is defined, we can't tell
4210 whether this parameter already has a stack slot allocated,
4211 because an arg block exists only if current_function_args_size
abc95ed3 4212 is larger than some threshold, and we haven't calculated that
d9ca49d5
JW
4213 yet. So, for now, we just assume that stack slots never exist
4214 in this case. */
6f086dfc
RS
4215 || REG_PARM_STACK_SPACE (fndecl) > 0
4216#endif
4217 )
4218 {
4219 stack_args_size.constant += arg_size.constant;
4220 if (arg_size.var)
4221 ADD_PARM_SIZE (stack_args_size, arg_size.var);
4222 }
4223 else
4224 /* No stack slot was pushed for this parm. */
4225 stack_parm = 0;
4226
4227 /* Update info on where next arg arrives in registers. */
4228
621061f4 4229 FUNCTION_ARG_ADVANCE (args_so_far, promoted_mode,
bf9c83fe 4230 passed_type, named_arg);
6f086dfc 4231
0f41302f 4232 /* If this is our second time through, we are done with this parm. */
6f086dfc
RS
4233 if (second_time)
4234 continue;
4235
e16c591a
RS
4236 /* If we can't trust the parm stack slot to be aligned enough
4237 for its ultimate type, don't use that slot after entry.
4238 We'll make another stack slot, if we need one. */
4239 {
e16c591a 4240 int thisparm_boundary
621061f4 4241 = FUNCTION_ARG_BOUNDARY (promoted_mode, passed_type);
e16c591a
RS
4242
4243 if (GET_MODE_ALIGNMENT (nominal_mode) > thisparm_boundary)
4244 stack_parm = 0;
4245 }
4246
cb61f66f
RS
4247 /* If parm was passed in memory, and we need to convert it on entry,
4248 don't store it back in that same slot. */
4249 if (entry_parm != 0
4250 && nominal_mode != BLKmode && nominal_mode != passed_mode)
4251 stack_parm = 0;
4252
4253#if 0
6f086dfc
RS
4254 /* Now adjust STACK_PARM to the mode and precise location
4255 where this parameter should live during execution,
4256 if we discover that it must live in the stack during execution.
4257 To make debuggers happier on big-endian machines, we store
4258 the value in the last bytes of the space available. */
4259
4260 if (nominal_mode != BLKmode && nominal_mode != passed_mode
4261 && stack_parm != 0)
4262 {
4263 rtx offset_rtx;
4264
f76b9db2
ILT
4265 if (BYTES_BIG_ENDIAN
4266 && GET_MODE_SIZE (nominal_mode) < UNITS_PER_WORD)
6f086dfc
RS
4267 stack_offset.constant += (GET_MODE_SIZE (passed_mode)
4268 - GET_MODE_SIZE (nominal_mode));
6f086dfc
RS
4269
4270 offset_rtx = ARGS_SIZE_RTX (stack_offset);
4271 if (offset_rtx == const0_rtx)
38a448ca 4272 stack_parm = gen_rtx_MEM (nominal_mode, internal_arg_pointer);
6f086dfc 4273 else
38a448ca
RH
4274 stack_parm = gen_rtx_MEM (nominal_mode,
4275 gen_rtx_PLUS (Pmode,
4276 internal_arg_pointer,
4277 offset_rtx));
6f086dfc
RS
4278
4279 /* If this is a memory ref that contains aggregate components,
4280 mark it as such for cse and loop optimize. */
c6df88cb 4281 MEM_SET_IN_STRUCT_P (stack_parm, aggregate);
6f086dfc 4282 }
cb61f66f 4283#endif /* 0 */
6f086dfc 4284
9dc0f531
RK
4285#ifdef STACK_REGS
4286 /* We need this "use" info, because the gcc-register->stack-register
4287 converter in reg-stack.c needs to know which registers are active
4288 at the start of the function call. The actual parameter loading
4289 instructions are not always available then anymore, since they might
4290 have been optimised away. */
4291
4292 if (GET_CODE (entry_parm) == REG && !(hide_last_arg && last_named))
38a448ca 4293 emit_insn (gen_rtx_USE (GET_MODE (entry_parm), entry_parm));
9dc0f531
RK
4294#endif
4295
6f086dfc
RS
4296 /* ENTRY_PARM is an RTX for the parameter as it arrives,
4297 in the mode in which it arrives.
4298 STACK_PARM is an RTX for a stack slot where the parameter can live
4299 during the function (in case we want to put it there).
4300 STACK_PARM is 0 if no stack slot was pushed for it.
4301
4302 Now output code if necessary to convert ENTRY_PARM to
4303 the type in which this function declares it,
4304 and store that result in an appropriate place,
4305 which may be a pseudo reg, may be STACK_PARM,
4306 or may be a local stack slot if STACK_PARM is 0.
4307
4308 Set DECL_RTL to that place. */
4309
5c4cdc9f 4310 if (nominal_mode == BLKmode || GET_CODE (entry_parm) == PARALLEL)
6f086dfc 4311 {
5c4cdc9f
JW
4312 /* If a BLKmode arrives in registers, copy it to a stack slot.
4313 Handle calls that pass values in multiple non-contiguous
4314 locations. The Irix 6 ABI has examples of this. */
4315 if (GET_CODE (entry_parm) == REG
4316 || GET_CODE (entry_parm) == PARALLEL)
6f086dfc 4317 {
621061f4
RK
4318 int size_stored
4319 = CEIL_ROUND (int_size_in_bytes (TREE_TYPE (parm)),
4320 UNITS_PER_WORD);
6f086dfc
RS
4321
4322 /* Note that we will be storing an integral number of words.
4323 So we have to be careful to ensure that we allocate an
4324 integral number of words. We do this below in the
4325 assign_stack_local if space was not allocated in the argument
4326 list. If it was, this will not work if PARM_BOUNDARY is not
4327 a multiple of BITS_PER_WORD. It isn't clear how to fix this
4328 if it becomes a problem. */
4329
4330 if (stack_parm == 0)
7e41ffa2
RS
4331 {
4332 stack_parm
621061f4
RK
4333 = assign_stack_local (GET_MODE (entry_parm),
4334 size_stored, 0);
4335
4336 /* If this is a memory ref that contains aggregate
4337 components, mark it as such for cse and loop optimize. */
c6df88cb 4338 MEM_SET_IN_STRUCT_P (stack_parm, aggregate);
7e41ffa2
RS
4339 }
4340
6f086dfc
RS
4341 else if (PARM_BOUNDARY % BITS_PER_WORD != 0)
4342 abort ();
4343
7a30f0c4
JW
4344 if (TREE_READONLY (parm))
4345 RTX_UNCHANGING_P (stack_parm) = 1;
4346
5c4cdc9f
JW
4347 /* Handle calls that pass values in multiple non-contiguous
4348 locations. The Irix 6 ABI has examples of this. */
4349 if (GET_CODE (entry_parm) == PARALLEL)
aac5cc16
RH
4350 emit_group_store (validize_mem (stack_parm), entry_parm,
4351 int_size_in_bytes (TREE_TYPE (parm)),
4352 (TYPE_ALIGN (TREE_TYPE (parm))
4353 / BITS_PER_UNIT));
5c4cdc9f
JW
4354 else
4355 move_block_from_reg (REGNO (entry_parm),
4356 validize_mem (stack_parm),
4357 size_stored / UNITS_PER_WORD,
4358 int_size_in_bytes (TREE_TYPE (parm)));
6f086dfc
RS
4359 }
4360 DECL_RTL (parm) = stack_parm;
4361 }
74bd77a8 4362 else if (! ((obey_regdecls && ! DECL_REGISTER (parm)
a82ad570 4363 && ! DECL_INLINE (fndecl))
6f086dfc
RS
4364 /* layout_decl may set this. */
4365 || TREE_ADDRESSABLE (parm)
4366 || TREE_SIDE_EFFECTS (parm)
4367 /* If -ffloat-store specified, don't put explicit
4368 float variables into registers. */
4369 || (flag_float_store
4370 && TREE_CODE (TREE_TYPE (parm)) == REAL_TYPE))
4371 /* Always assign pseudo to structure return or item passed
4372 by invisible reference. */
4373 || passed_pointer || parm == function_result_decl)
4374 {
00d8a4c1
RK
4375 /* Store the parm in a pseudoregister during the function, but we
4376 may need to do it in a wider mode. */
4377
4378 register rtx parmreg;
4e86caed 4379 int regno, regnoi = 0, regnor = 0;
00d8a4c1
RK
4380
4381 unsignedp = TREE_UNSIGNED (TREE_TYPE (parm));
cd5b3469 4382
621061f4
RK
4383 promoted_nominal_mode
4384 = promote_mode (TREE_TYPE (parm), nominal_mode, &unsignedp, 0);
6f086dfc 4385
621061f4 4386 parmreg = gen_reg_rtx (promoted_nominal_mode);
ddb7361a 4387 mark_user_reg (parmreg);
6f086dfc
RS
4388
4389 /* If this was an item that we received a pointer to, set DECL_RTL
4390 appropriately. */
4391 if (passed_pointer)
4392 {
621061f4 4393 DECL_RTL (parm)
38a448ca 4394 = gen_rtx_MEM (TYPE_MODE (TREE_TYPE (passed_type)), parmreg);
c6df88cb 4395 MEM_SET_IN_STRUCT_P (DECL_RTL (parm), aggregate);
6f086dfc
RS
4396 }
4397 else
4398 DECL_RTL (parm) = parmreg;
4399
4400 /* Copy the value into the register. */
621061f4
RK
4401 if (nominal_mode != passed_mode
4402 || promoted_nominal_mode != promoted_mode)
86f8eff3 4403 {
efd8cba0 4404 int save_tree_used;
621061f4
RK
4405 /* ENTRY_PARM has been converted to PROMOTED_MODE, its
4406 mode, by the caller. We now have to convert it to
4407 NOMINAL_MODE, if different. However, PARMREG may be in
956d6950 4408 a different mode than NOMINAL_MODE if it is being stored
621061f4
RK
4409 promoted.
4410
4411 If ENTRY_PARM is a hard register, it might be in a register
86f8eff3
RK
4412 not valid for operating in its mode (e.g., an odd-numbered
4413 register for a DFmode). In that case, moves are the only
4414 thing valid, so we can't do a convert from there. This
4415 occurs when the calling sequence allow such misaligned
3412b298
JW
4416 usages.
4417
4418 In addition, the conversion may involve a call, which could
4419 clobber parameters which haven't been copied to pseudo
4420 registers yet. Therefore, we must first copy the parm to
4421 a pseudo reg here, and save the conversion until after all
4422 parameters have been moved. */
4423
4424 rtx tempreg = gen_reg_rtx (GET_MODE (entry_parm));
4425
4426 emit_move_insn (tempreg, validize_mem (entry_parm));
4427
4428 push_to_sequence (conversion_insns);
ad241351
RK
4429 tempreg = convert_to_mode (nominal_mode, tempreg, unsignedp);
4430
efd8cba0
DB
4431 /* TREE_USED gets set erroneously during expand_assignment. */
4432 save_tree_used = TREE_USED (parm);
621061f4
RK
4433 expand_assignment (parm,
4434 make_tree (nominal_type, tempreg), 0, 0);
efd8cba0 4435 TREE_USED (parm) = save_tree_used;
3412b298 4436 conversion_insns = get_insns ();
621061f4 4437 did_conversion = 1;
3412b298 4438 end_sequence ();
86f8eff3 4439 }
6f086dfc
RS
4440 else
4441 emit_move_insn (parmreg, validize_mem (entry_parm));
4442
74bd77a8
RS
4443 /* If we were passed a pointer but the actual value
4444 can safely live in a register, put it in one. */
16bae307 4445 if (passed_pointer && TYPE_MODE (TREE_TYPE (parm)) != BLKmode
74bd77a8
RS
4446 && ! ((obey_regdecls && ! DECL_REGISTER (parm)
4447 && ! DECL_INLINE (fndecl))
4448 /* layout_decl may set this. */
4449 || TREE_ADDRESSABLE (parm)
4450 || TREE_SIDE_EFFECTS (parm)
4451 /* If -ffloat-store specified, don't put explicit
4452 float variables into registers. */
4453 || (flag_float_store
4454 && TREE_CODE (TREE_TYPE (parm)) == REAL_TYPE)))
4455 {
2654605a
JW
4456 /* We can't use nominal_mode, because it will have been set to
4457 Pmode above. We must use the actual mode of the parm. */
4458 parmreg = gen_reg_rtx (TYPE_MODE (TREE_TYPE (parm)));
ddb7361a 4459 mark_user_reg (parmreg);
74bd77a8
RS
4460 emit_move_insn (parmreg, DECL_RTL (parm));
4461 DECL_RTL (parm) = parmreg;
c110c53d
RS
4462 /* STACK_PARM is the pointer, not the parm, and PARMREG is
4463 now the parm. */
4464 stack_parm = 0;
74bd77a8 4465 }
137a2a7b
DE
4466#ifdef FUNCTION_ARG_CALLEE_COPIES
4467 /* If we are passed an arg by reference and it is our responsibility
4468 to make a copy, do it now.
4469 PASSED_TYPE and PASSED mode now refer to the pointer, not the
4470 original argument, so we must recreate them in the call to
4471 FUNCTION_ARG_CALLEE_COPIES. */
4472 /* ??? Later add code to handle the case that if the argument isn't
4473 modified, don't do the copy. */
4474
4475 else if (passed_pointer
4476 && FUNCTION_ARG_CALLEE_COPIES (args_so_far,
4477 TYPE_MODE (DECL_ARG_TYPE (parm)),
4478 DECL_ARG_TYPE (parm),
bf9c83fe 4479 named_arg)
926b1b99 4480 && ! TREE_ADDRESSABLE (DECL_ARG_TYPE (parm)))
137a2a7b
DE
4481 {
4482 rtx copy;
4483 tree type = DECL_ARG_TYPE (parm);
4484
4485 /* This sequence may involve a library call perhaps clobbering
4486 registers that haven't been copied to pseudos yet. */
4487
4488 push_to_sequence (conversion_insns);
4489
4490 if (TYPE_SIZE (type) == 0
4491 || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1fd3ef7f 4492 /* This is a variable sized object. */
38a448ca
RH
4493 copy = gen_rtx_MEM (BLKmode,
4494 allocate_dynamic_stack_space
4495 (expr_size (parm), NULL_RTX,
4496 TYPE_ALIGN (type)));
137a2a7b 4497 else
1fd3ef7f
RK
4498 copy = assign_stack_temp (TYPE_MODE (type),
4499 int_size_in_bytes (type), 1);
c6df88cb 4500 MEM_SET_IN_STRUCT_P (copy, AGGREGATE_TYPE_P (type));
e9a25f70 4501 RTX_UNCHANGING_P (copy) = TREE_READONLY (parm);
137a2a7b
DE
4502
4503 store_expr (parm, copy, 0);
4504 emit_move_insn (parmreg, XEXP (copy, 0));
7d384cc0 4505 if (current_function_check_memory_usage)
86fa911a 4506 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,
6a9c4aed 4507 XEXP (copy, 0), Pmode,
86fa911a
RK
4508 GEN_INT (int_size_in_bytes (type)),
4509 TYPE_MODE (sizetype),
956d6950
JL
4510 GEN_INT (MEMORY_USE_RW),
4511 TYPE_MODE (integer_type_node));
137a2a7b 4512 conversion_insns = get_insns ();
621061f4 4513 did_conversion = 1;
137a2a7b
DE
4514 end_sequence ();
4515 }
4516#endif /* FUNCTION_ARG_CALLEE_COPIES */
74bd77a8 4517
6f086dfc 4518 /* In any case, record the parm's desired stack location
14aceb29
RS
4519 in case we later discover it must live in the stack.
4520
4521 If it is a COMPLEX value, store the stack location for both
4522 halves. */
4523
4524 if (GET_CODE (parmreg) == CONCAT)
4525 regno = MAX (REGNO (XEXP (parmreg, 0)), REGNO (XEXP (parmreg, 1)));
4526 else
4527 regno = REGNO (parmreg);
4528
e9a25f70 4529 if (regno >= max_parm_reg)
6f086dfc
RS
4530 {
4531 rtx *new;
e9a25f70 4532 int old_max_parm_reg = max_parm_reg;
14aceb29 4533
e9a25f70
JL
4534 /* It's slow to expand this one register at a time,
4535 but it's also rare and we need max_parm_reg to be
4536 precisely correct. */
4537 max_parm_reg = regno + 1;
e2ecd91c
BS
4538 new = (rtx *) xrealloc (parm_reg_stack_loc,
4539 max_parm_reg * sizeof (rtx));
e9a25f70
JL
4540 bzero ((char *) (new + old_max_parm_reg),
4541 (max_parm_reg - old_max_parm_reg) * sizeof (rtx));
6f086dfc
RS
4542 parm_reg_stack_loc = new;
4543 }
14aceb29
RS
4544
4545 if (GET_CODE (parmreg) == CONCAT)
4546 {
4547 enum machine_mode submode = GET_MODE (XEXP (parmreg, 0));
4548
a03caf76
RK
4549 regnor = REGNO (gen_realpart (submode, parmreg));
4550 regnoi = REGNO (gen_imagpart (submode, parmreg));
4551
7b1a0c14
RS
4552 if (stack_parm != 0)
4553 {
a03caf76 4554 parm_reg_stack_loc[regnor]
3d329b07 4555 = gen_realpart (submode, stack_parm);
a03caf76 4556 parm_reg_stack_loc[regnoi]
3d329b07 4557 = gen_imagpart (submode, stack_parm);
7b1a0c14
RS
4558 }
4559 else
4560 {
a03caf76
RK
4561 parm_reg_stack_loc[regnor] = 0;
4562 parm_reg_stack_loc[regnoi] = 0;
7b1a0c14 4563 }
14aceb29
RS
4564 }
4565 else
4566 parm_reg_stack_loc[REGNO (parmreg)] = stack_parm;
6f086dfc
RS
4567
4568 /* Mark the register as eliminable if we did no conversion
4569 and it was copied from memory at a fixed offset,
4570 and the arg pointer was not copied to a pseudo-reg.
4571 If the arg pointer is a pseudo reg or the offset formed
4572 an invalid address, such memory-equivalences
4573 as we make here would screw up life analysis for it. */
4574 if (nominal_mode == passed_mode
621061f4 4575 && ! did_conversion
38b610ed
ILT
4576 && stack_parm != 0
4577 && GET_CODE (stack_parm) == MEM
6f086dfc
RS
4578 && stack_offset.var == 0
4579 && reg_mentioned_p (virtual_incoming_args_rtx,
38b610ed 4580 XEXP (stack_parm, 0)))
a03caf76
RK
4581 {
4582 rtx linsn = get_last_insn ();
69685820 4583 rtx sinsn, set;
a03caf76
RK
4584
4585 /* Mark complex types separately. */
4586 if (GET_CODE (parmreg) == CONCAT)
69685820
RK
4587 /* Scan backwards for the set of the real and
4588 imaginary parts. */
4589 for (sinsn = linsn; sinsn != 0;
4590 sinsn = prev_nonnote_insn (sinsn))
4591 {
4592 set = single_set (sinsn);
4593 if (set != 0
4594 && SET_DEST (set) == regno_reg_rtx [regnoi])
4595 REG_NOTES (sinsn)
38a448ca
RH
4596 = gen_rtx_EXPR_LIST (REG_EQUIV,
4597 parm_reg_stack_loc[regnoi],
4598 REG_NOTES (sinsn));
69685820
RK
4599 else if (set != 0
4600 && SET_DEST (set) == regno_reg_rtx [regnor])
4601 REG_NOTES (sinsn)
38a448ca
RH
4602 = gen_rtx_EXPR_LIST (REG_EQUIV,
4603 parm_reg_stack_loc[regnor],
4604 REG_NOTES (sinsn));
69685820
RK
4605 }
4606 else if ((set = single_set (linsn)) != 0
4607 && SET_DEST (set) == parmreg)
a03caf76 4608 REG_NOTES (linsn)
38a448ca
RH
4609 = gen_rtx_EXPR_LIST (REG_EQUIV,
4610 stack_parm, REG_NOTES (linsn));
a03caf76 4611 }
6f086dfc
RS
4612
4613 /* For pointer data type, suggest pointer register. */
e5e809f4 4614 if (POINTER_TYPE_P (TREE_TYPE (parm)))
6c6166bd
RK
4615 mark_reg_pointer (parmreg,
4616 (TYPE_ALIGN (TREE_TYPE (TREE_TYPE (parm)))
4617 / BITS_PER_UNIT));
6f086dfc
RS
4618 }
4619 else
4620 {
4621 /* Value must be stored in the stack slot STACK_PARM
4622 during function execution. */
4623
621061f4 4624 if (promoted_mode != nominal_mode)
86f8eff3
RK
4625 {
4626 /* Conversion is required. */
3412b298
JW
4627 rtx tempreg = gen_reg_rtx (GET_MODE (entry_parm));
4628
4629 emit_move_insn (tempreg, validize_mem (entry_parm));
86f8eff3 4630
3412b298
JW
4631 push_to_sequence (conversion_insns);
4632 entry_parm = convert_to_mode (nominal_mode, tempreg,
a53e14c0 4633 TREE_UNSIGNED (TREE_TYPE (parm)));
de957303
DE
4634 if (stack_parm)
4635 {
4636 /* ??? This may need a big-endian conversion on sparc64. */
4637 stack_parm = change_address (stack_parm, nominal_mode,
4638 NULL_RTX);
4639 }
3412b298 4640 conversion_insns = get_insns ();
621061f4 4641 did_conversion = 1;
3412b298 4642 end_sequence ();
86f8eff3 4643 }
6f086dfc
RS
4644
4645 if (entry_parm != stack_parm)
4646 {
4647 if (stack_parm == 0)
7e41ffa2
RS
4648 {
4649 stack_parm
4650 = assign_stack_local (GET_MODE (entry_parm),
4651 GET_MODE_SIZE (GET_MODE (entry_parm)), 0);
4652 /* If this is a memory ref that contains aggregate components,
4653 mark it as such for cse and loop optimize. */
c6df88cb 4654 MEM_SET_IN_STRUCT_P (stack_parm, aggregate);
7e41ffa2
RS
4655 }
4656
621061f4 4657 if (promoted_mode != nominal_mode)
3412b298
JW
4658 {
4659 push_to_sequence (conversion_insns);
4660 emit_move_insn (validize_mem (stack_parm),
4661 validize_mem (entry_parm));
4662 conversion_insns = get_insns ();
4663 end_sequence ();
4664 }
4665 else
4666 emit_move_insn (validize_mem (stack_parm),
4667 validize_mem (entry_parm));
6f086dfc 4668 }
7d384cc0 4669 if (current_function_check_memory_usage)
86fa911a
RK
4670 {
4671 push_to_sequence (conversion_insns);
4672 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,
6a9c4aed 4673 XEXP (stack_parm, 0), Pmode,
86fa911a
RK
4674 GEN_INT (GET_MODE_SIZE (GET_MODE
4675 (entry_parm))),
4676 TYPE_MODE (sizetype),
956d6950
JL
4677 GEN_INT (MEMORY_USE_RW),
4678 TYPE_MODE (integer_type_node));
6f086dfc 4679
86fa911a
RK
4680 conversion_insns = get_insns ();
4681 end_sequence ();
4682 }
6f086dfc
RS
4683 DECL_RTL (parm) = stack_parm;
4684 }
4685
4686 /* If this "parameter" was the place where we are receiving the
4687 function's incoming structure pointer, set up the result. */
4688 if (parm == function_result_decl)
ccdecf58
RK
4689 {
4690 tree result = DECL_RESULT (fndecl);
4691 tree restype = TREE_TYPE (result);
4692
4693 DECL_RTL (result)
38a448ca 4694 = gen_rtx_MEM (DECL_MODE (result), DECL_RTL (parm));
ccdecf58 4695
c6df88cb
MM
4696 MEM_SET_IN_STRUCT_P (DECL_RTL (result),
4697 AGGREGATE_TYPE_P (restype));
ccdecf58 4698 }
6f086dfc
RS
4699
4700 if (TREE_THIS_VOLATILE (parm))
4701 MEM_VOLATILE_P (DECL_RTL (parm)) = 1;
4702 if (TREE_READONLY (parm))
4703 RTX_UNCHANGING_P (DECL_RTL (parm)) = 1;
4704 }
4705
3412b298
JW
4706 /* Output all parameter conversion instructions (possibly including calls)
4707 now that all parameters have been copied out of hard registers. */
4708 emit_insns (conversion_insns);
4709
6f086dfc
RS
4710 last_parm_insn = get_last_insn ();
4711
4712 current_function_args_size = stack_args_size.constant;
4713
4714 /* Adjust function incoming argument size for alignment and
4715 minimum length. */
4716
4717#ifdef REG_PARM_STACK_SPACE
6f90e075 4718#ifndef MAYBE_REG_PARM_STACK_SPACE
6f086dfc
RS
4719 current_function_args_size = MAX (current_function_args_size,
4720 REG_PARM_STACK_SPACE (fndecl));
4721#endif
6f90e075 4722#endif
6f086dfc 4723
4433e339
RH
4724#ifdef STACK_BOUNDARY
4725#define STACK_BYTES (STACK_BOUNDARY / BITS_PER_UNIT)
4726
4727 current_function_args_size
4728 = ((current_function_args_size + STACK_BYTES - 1)
4729 / STACK_BYTES) * STACK_BYTES;
4730#endif
4731
6f086dfc
RS
4732#ifdef ARGS_GROW_DOWNWARD
4733 current_function_arg_offset_rtx
5f4f0e22 4734 = (stack_args_size.var == 0 ? GEN_INT (-stack_args_size.constant)
6f086dfc
RS
4735 : expand_expr (size_binop (MINUS_EXPR, stack_args_size.var,
4736 size_int (-stack_args_size.constant)),
86fa911a 4737 NULL_RTX, VOIDmode, EXPAND_MEMORY_USE_BAD));
6f086dfc
RS
4738#else
4739 current_function_arg_offset_rtx = ARGS_SIZE_RTX (stack_args_size);
4740#endif
4741
4742 /* See how many bytes, if any, of its args a function should try to pop
4743 on return. */
4744
64e6d9cc 4745 current_function_pops_args = RETURN_POPS_ARGS (fndecl, TREE_TYPE (fndecl),
6f086dfc
RS
4746 current_function_args_size);
4747
3b69d50e
RK
4748 /* For stdarg.h function, save info about
4749 regs and stack space used by the named args. */
6f086dfc 4750
3b69d50e 4751 if (!hide_last_arg)
6f086dfc
RS
4752 current_function_args_info = args_so_far;
4753
4754 /* Set the rtx used for the function return value. Put this in its
4755 own variable so any optimizers that need this information don't have
4756 to include tree.h. Do this here so it gets done when an inlined
4757 function gets output. */
4758
4759 current_function_return_rtx = DECL_RTL (DECL_RESULT (fndecl));
4760}
4761\f
75dc3319
RK
4762/* Indicate whether REGNO is an incoming argument to the current function
4763 that was promoted to a wider mode. If so, return the RTX for the
4764 register (to get its mode). PMODE and PUNSIGNEDP are set to the mode
4765 that REGNO is promoted from and whether the promotion was signed or
4766 unsigned. */
4767
4768#ifdef PROMOTE_FUNCTION_ARGS
4769
4770rtx
4771promoted_input_arg (regno, pmode, punsignedp)
4772 int regno;
4773 enum machine_mode *pmode;
4774 int *punsignedp;
4775{
4776 tree arg;
4777
4778 for (arg = DECL_ARGUMENTS (current_function_decl); arg;
4779 arg = TREE_CHAIN (arg))
4780 if (GET_CODE (DECL_INCOMING_RTL (arg)) == REG
621061f4
RK
4781 && REGNO (DECL_INCOMING_RTL (arg)) == regno
4782 && TYPE_MODE (DECL_ARG_TYPE (arg)) == TYPE_MODE (TREE_TYPE (arg)))
75dc3319
RK
4783 {
4784 enum machine_mode mode = TYPE_MODE (TREE_TYPE (arg));
4785 int unsignedp = TREE_UNSIGNED (TREE_TYPE (arg));
4786
a5a52dbc 4787 mode = promote_mode (TREE_TYPE (arg), mode, &unsignedp, 1);
75dc3319
RK
4788 if (mode == GET_MODE (DECL_INCOMING_RTL (arg))
4789 && mode != DECL_MODE (arg))
4790 {
4791 *pmode = DECL_MODE (arg);
4792 *punsignedp = unsignedp;
4793 return DECL_INCOMING_RTL (arg);
4794 }
4795 }
4796
4797 return 0;
4798}
4799
4800#endif
4801\f
6f086dfc
RS
4802/* Compute the size and offset from the start of the stacked arguments for a
4803 parm passed in mode PASSED_MODE and with type TYPE.
4804
4805 INITIAL_OFFSET_PTR points to the current offset into the stacked
4806 arguments.
4807
4808 The starting offset and size for this parm are returned in *OFFSET_PTR
4809 and *ARG_SIZE_PTR, respectively.
4810
4811 IN_REGS is non-zero if the argument will be passed in registers. It will
4812 never be set if REG_PARM_STACK_SPACE is not defined.
4813
4814 FNDECL is the function in which the argument was defined.
4815
4816 There are two types of rounding that are done. The first, controlled by
4817 FUNCTION_ARG_BOUNDARY, forces the offset from the start of the argument
4818 list to be aligned to the specific boundary (in bits). This rounding
4819 affects the initial and starting offsets, but not the argument size.
4820
4821 The second, controlled by FUNCTION_ARG_PADDING and PARM_BOUNDARY,
4822 optionally rounds the size of the parm to PARM_BOUNDARY. The
4823 initial offset is not affected by this rounding, while the size always
4824 is and the starting offset may be. */
4825
4826/* offset_ptr will be negative for ARGS_GROW_DOWNWARD case;
4827 initial_offset_ptr is positive because locate_and_pad_parm's
4828 callers pass in the total size of args so far as
4829 initial_offset_ptr. arg_size_ptr is always positive.*/
4830
6f086dfc
RS
4831void
4832locate_and_pad_parm (passed_mode, type, in_regs, fndecl,
4833 initial_offset_ptr, offset_ptr, arg_size_ptr)
4834 enum machine_mode passed_mode;
4835 tree type;
4836 int in_regs;
91813b28 4837 tree fndecl ATTRIBUTE_UNUSED;
6f086dfc
RS
4838 struct args_size *initial_offset_ptr;
4839 struct args_size *offset_ptr;
4840 struct args_size *arg_size_ptr;
4841{
4842 tree sizetree
4843 = type ? size_in_bytes (type) : size_int (GET_MODE_SIZE (passed_mode));
4844 enum direction where_pad = FUNCTION_ARG_PADDING (passed_mode, type);
4845 int boundary = FUNCTION_ARG_BOUNDARY (passed_mode, type);
6f086dfc
RS
4846
4847#ifdef REG_PARM_STACK_SPACE
4848 /* If we have found a stack parm before we reach the end of the
4849 area reserved for registers, skip that area. */
4850 if (! in_regs)
4851 {
29a82058
JL
4852 int reg_parm_stack_space = 0;
4853
29008b51
JW
4854#ifdef MAYBE_REG_PARM_STACK_SPACE
4855 reg_parm_stack_space = MAYBE_REG_PARM_STACK_SPACE;
4856#else
6f086dfc 4857 reg_parm_stack_space = REG_PARM_STACK_SPACE (fndecl);
29008b51 4858#endif
6f086dfc
RS
4859 if (reg_parm_stack_space > 0)
4860 {
4861 if (initial_offset_ptr->var)
4862 {
4863 initial_offset_ptr->var
4864 = size_binop (MAX_EXPR, ARGS_SIZE_TREE (*initial_offset_ptr),
4865 size_int (reg_parm_stack_space));
4866 initial_offset_ptr->constant = 0;
4867 }
4868 else if (initial_offset_ptr->constant < reg_parm_stack_space)
4869 initial_offset_ptr->constant = reg_parm_stack_space;
4870 }
4871 }
4872#endif /* REG_PARM_STACK_SPACE */
4873
4874 arg_size_ptr->var = 0;
4875 arg_size_ptr->constant = 0;
4876
4877#ifdef ARGS_GROW_DOWNWARD
4878 if (initial_offset_ptr->var)
4879 {
4880 offset_ptr->constant = 0;
4881 offset_ptr->var = size_binop (MINUS_EXPR, integer_zero_node,
4882 initial_offset_ptr->var);
4883 }
4884 else
4885 {
4886 offset_ptr->constant = - initial_offset_ptr->constant;
4887 offset_ptr->var = 0;
4888 }
0b21dcf5 4889 if (where_pad != none
6f086dfc
RS
4890 && (TREE_CODE (sizetree) != INTEGER_CST
4891 || ((TREE_INT_CST_LOW (sizetree) * BITS_PER_UNIT) % PARM_BOUNDARY)))
4892 sizetree = round_up (sizetree, PARM_BOUNDARY / BITS_PER_UNIT);
4893 SUB_PARM_SIZE (*offset_ptr, sizetree);
66bcbe19
TG
4894 if (where_pad != downward)
4895 pad_to_arg_alignment (offset_ptr, boundary);
6f086dfc
RS
4896 if (initial_offset_ptr->var)
4897 {
4898 arg_size_ptr->var = size_binop (MINUS_EXPR,
4899 size_binop (MINUS_EXPR,
4900 integer_zero_node,
4901 initial_offset_ptr->var),
4902 offset_ptr->var);
4903 }
4904 else
4905 {
db3cf6fb
MS
4906 arg_size_ptr->constant = (- initial_offset_ptr->constant
4907 - offset_ptr->constant);
6f086dfc 4908 }
6f086dfc
RS
4909#else /* !ARGS_GROW_DOWNWARD */
4910 pad_to_arg_alignment (initial_offset_ptr, boundary);
4911 *offset_ptr = *initial_offset_ptr;
6f086dfc
RS
4912
4913#ifdef PUSH_ROUNDING
4914 if (passed_mode != BLKmode)
4915 sizetree = size_int (PUSH_ROUNDING (TREE_INT_CST_LOW (sizetree)));
4916#endif
4917
d4b0a7a0
DE
4918 /* Pad_below needs the pre-rounded size to know how much to pad below
4919 so this must be done before rounding up. */
ea5917da
DE
4920 if (where_pad == downward
4921 /* However, BLKmode args passed in regs have their padding done elsewhere.
4922 The stack slot must be able to hold the entire register. */
4923 && !(in_regs && passed_mode == BLKmode))
d4b0a7a0
DE
4924 pad_below (offset_ptr, passed_mode, sizetree);
4925
6f086dfc
RS
4926 if (where_pad != none
4927 && (TREE_CODE (sizetree) != INTEGER_CST
4928 || ((TREE_INT_CST_LOW (sizetree) * BITS_PER_UNIT) % PARM_BOUNDARY)))
4929 sizetree = round_up (sizetree, PARM_BOUNDARY / BITS_PER_UNIT);
4930
4931 ADD_PARM_SIZE (*arg_size_ptr, sizetree);
4932#endif /* ARGS_GROW_DOWNWARD */
4933}
4934
e16c591a
RS
4935/* Round the stack offset in *OFFSET_PTR up to a multiple of BOUNDARY.
4936 BOUNDARY is measured in bits, but must be a multiple of a storage unit. */
4937
6f086dfc
RS
4938static void
4939pad_to_arg_alignment (offset_ptr, boundary)
4940 struct args_size *offset_ptr;
4941 int boundary;
4942{
4943 int boundary_in_bytes = boundary / BITS_PER_UNIT;
4944
4945 if (boundary > BITS_PER_UNIT)
4946 {
4947 if (offset_ptr->var)
4948 {
4949 offset_ptr->var =
4950#ifdef ARGS_GROW_DOWNWARD
4951 round_down
4952#else
4953 round_up
4954#endif
4955 (ARGS_SIZE_TREE (*offset_ptr),
4956 boundary / BITS_PER_UNIT);
4957 offset_ptr->constant = 0; /*?*/
4958 }
4959 else
4960 offset_ptr->constant =
4961#ifdef ARGS_GROW_DOWNWARD
4962 FLOOR_ROUND (offset_ptr->constant, boundary_in_bytes);
4963#else
4964 CEIL_ROUND (offset_ptr->constant, boundary_in_bytes);
4965#endif
4966 }
4967}
4968
51723711 4969#ifndef ARGS_GROW_DOWNWARD
6f086dfc
RS
4970static void
4971pad_below (offset_ptr, passed_mode, sizetree)
4972 struct args_size *offset_ptr;
4973 enum machine_mode passed_mode;
4974 tree sizetree;
4975{
4976 if (passed_mode != BLKmode)
4977 {
4978 if (GET_MODE_BITSIZE (passed_mode) % PARM_BOUNDARY)
4979 offset_ptr->constant
4980 += (((GET_MODE_BITSIZE (passed_mode) + PARM_BOUNDARY - 1)
4981 / PARM_BOUNDARY * PARM_BOUNDARY / BITS_PER_UNIT)
4982 - GET_MODE_SIZE (passed_mode));
4983 }
4984 else
4985 {
4986 if (TREE_CODE (sizetree) != INTEGER_CST
4987 || (TREE_INT_CST_LOW (sizetree) * BITS_PER_UNIT) % PARM_BOUNDARY)
4988 {
4989 /* Round the size up to multiple of PARM_BOUNDARY bits. */
4990 tree s2 = round_up (sizetree, PARM_BOUNDARY / BITS_PER_UNIT);
4991 /* Add it in. */
4992 ADD_PARM_SIZE (*offset_ptr, s2);
4993 SUB_PARM_SIZE (*offset_ptr, sizetree);
4994 }
4995 }
4996}
51723711 4997#endif
6f086dfc 4998
487a6e06 4999#ifdef ARGS_GROW_DOWNWARD
6f086dfc
RS
5000static tree
5001round_down (value, divisor)
5002 tree value;
5003 int divisor;
5004{
5005 return size_binop (MULT_EXPR,
5006 size_binop (FLOOR_DIV_EXPR, value, size_int (divisor)),
5007 size_int (divisor));
5008}
487a6e06 5009#endif
6f086dfc
RS
5010\f
5011/* Walk the tree of blocks describing the binding levels within a function
5012 and warn about uninitialized variables.
5013 This is done after calling flow_analysis and before global_alloc
5014 clobbers the pseudo-regs to hard regs. */
5015
5016void
5017uninitialized_vars_warning (block)
5018 tree block;
5019{
5020 register tree decl, sub;
5021 for (decl = BLOCK_VARS (block); decl; decl = TREE_CHAIN (decl))
5022 {
5023 if (TREE_CODE (decl) == VAR_DECL
5024 /* These warnings are unreliable for and aggregates
5025 because assigning the fields one by one can fail to convince
5026 flow.c that the entire aggregate was initialized.
5027 Unions are troublesome because members may be shorter. */
05e3bdb9 5028 && ! AGGREGATE_TYPE_P (TREE_TYPE (decl))
6f086dfc
RS
5029 && DECL_RTL (decl) != 0
5030 && GET_CODE (DECL_RTL (decl)) == REG
6acdd0fd
JL
5031 /* Global optimizations can make it difficult to determine if a
5032 particular variable has been initialized. However, a VAR_DECL
5033 with a nonzero DECL_INITIAL had an initializer, so do not
5034 claim it is potentially uninitialized.
5035
5036 We do not care about the actual value in DECL_INITIAL, so we do
5037 not worry that it may be a dangling pointer. */
5038 && DECL_INITIAL (decl) == NULL_TREE
6f086dfc
RS
5039 && regno_uninitialized (REGNO (DECL_RTL (decl))))
5040 warning_with_decl (decl,
3c8cd8bd 5041 "`%s' might be used uninitialized in this function");
6f086dfc
RS
5042 if (TREE_CODE (decl) == VAR_DECL
5043 && DECL_RTL (decl) != 0
5044 && GET_CODE (DECL_RTL (decl)) == REG
5045 && regno_clobbered_at_setjmp (REGNO (DECL_RTL (decl))))
5046 warning_with_decl (decl,
3c8cd8bd 5047 "variable `%s' might be clobbered by `longjmp' or `vfork'");
6f086dfc
RS
5048 }
5049 for (sub = BLOCK_SUBBLOCKS (block); sub; sub = TREE_CHAIN (sub))
5050 uninitialized_vars_warning (sub);
5051}
5052
5053/* Do the appropriate part of uninitialized_vars_warning
5054 but for arguments instead of local variables. */
5055
5056void
0cd6ef35 5057setjmp_args_warning ()
6f086dfc
RS
5058{
5059 register tree decl;
5060 for (decl = DECL_ARGUMENTS (current_function_decl);
5061 decl; decl = TREE_CHAIN (decl))
5062 if (DECL_RTL (decl) != 0
5063 && GET_CODE (DECL_RTL (decl)) == REG
5064 && regno_clobbered_at_setjmp (REGNO (DECL_RTL (decl))))
3c8cd8bd 5065 warning_with_decl (decl, "argument `%s' might be clobbered by `longjmp' or `vfork'");
6f086dfc
RS
5066}
5067
5068/* If this function call setjmp, put all vars into the stack
5069 unless they were declared `register'. */
5070
5071void
5072setjmp_protect (block)
5073 tree block;
5074{
5075 register tree decl, sub;
5076 for (decl = BLOCK_VARS (block); decl; decl = TREE_CHAIN (decl))
5077 if ((TREE_CODE (decl) == VAR_DECL
5078 || TREE_CODE (decl) == PARM_DECL)
5079 && DECL_RTL (decl) != 0
e9a25f70
JL
5080 && (GET_CODE (DECL_RTL (decl)) == REG
5081 || (GET_CODE (DECL_RTL (decl)) == MEM
5082 && GET_CODE (XEXP (DECL_RTL (decl), 0)) == ADDRESSOF))
b335c2cc 5083 /* If this variable came from an inline function, it must be
9ec36da5 5084 that its life doesn't overlap the setjmp. If there was a
b335c2cc
TW
5085 setjmp in the function, it would already be in memory. We
5086 must exclude such variable because their DECL_RTL might be
5087 set to strange things such as virtual_stack_vars_rtx. */
5088 && ! DECL_FROM_INLINE (decl)
6f086dfc
RS
5089 && (
5090#ifdef NON_SAVING_SETJMP
5091 /* If longjmp doesn't restore the registers,
5092 don't put anything in them. */
5093 NON_SAVING_SETJMP
5094 ||
5095#endif
a82ad570 5096 ! DECL_REGISTER (decl)))
6f086dfc
RS
5097 put_var_into_stack (decl);
5098 for (sub = BLOCK_SUBBLOCKS (block); sub; sub = TREE_CHAIN (sub))
5099 setjmp_protect (sub);
5100}
5101\f
5102/* Like the previous function, but for args instead of local variables. */
5103
5104void
5105setjmp_protect_args ()
5106{
29a82058 5107 register tree decl;
6f086dfc
RS
5108 for (decl = DECL_ARGUMENTS (current_function_decl);
5109 decl; decl = TREE_CHAIN (decl))
5110 if ((TREE_CODE (decl) == VAR_DECL
5111 || TREE_CODE (decl) == PARM_DECL)
5112 && DECL_RTL (decl) != 0
e9a25f70
JL
5113 && (GET_CODE (DECL_RTL (decl)) == REG
5114 || (GET_CODE (DECL_RTL (decl)) == MEM
5115 && GET_CODE (XEXP (DECL_RTL (decl), 0)) == ADDRESSOF))
6f086dfc
RS
5116 && (
5117 /* If longjmp doesn't restore the registers,
5118 don't put anything in them. */
5119#ifdef NON_SAVING_SETJMP
5120 NON_SAVING_SETJMP
5121 ||
5122#endif
a82ad570 5123 ! DECL_REGISTER (decl)))
6f086dfc
RS
5124 put_var_into_stack (decl);
5125}
5126\f
5127/* Return the context-pointer register corresponding to DECL,
5128 or 0 if it does not need one. */
5129
5130rtx
5131lookup_static_chain (decl)
5132 tree decl;
5133{
b001a02f
PB
5134 tree context = decl_function_context (decl);
5135 tree link;
7ad8c4bf 5136
38ee6ed9
JM
5137 if (context == 0
5138 || (TREE_CODE (decl) == FUNCTION_DECL && DECL_NO_STATIC_CHAIN (decl)))
7ad8c4bf 5139 return 0;
38ee6ed9 5140
6f086dfc
RS
5141 /* We treat inline_function_decl as an alias for the current function
5142 because that is the inline function whose vars, types, etc.
5143 are being merged into the current function.
5144 See expand_inline_function. */
5145 if (context == current_function_decl || context == inline_function_decl)
5146 return virtual_stack_vars_rtx;
5147
5148 for (link = context_display; link; link = TREE_CHAIN (link))
5149 if (TREE_PURPOSE (link) == context)
5150 return RTL_EXPR_RTL (TREE_VALUE (link));
5151
5152 abort ();
5153}
5154\f
5155/* Convert a stack slot address ADDR for variable VAR
5156 (from a containing function)
5157 into an address valid in this function (using a static chain). */
5158
5159rtx
5160fix_lexical_addr (addr, var)
5161 rtx addr;
5162 tree var;
5163{
5164 rtx basereg;
e5e809f4 5165 HOST_WIDE_INT displacement;
6f086dfc
RS
5166 tree context = decl_function_context (var);
5167 struct function *fp;
5168 rtx base = 0;
5169
5170 /* If this is the present function, we need not do anything. */
5171 if (context == current_function_decl || context == inline_function_decl)
5172 return addr;
5173
5174 for (fp = outer_function_chain; fp; fp = fp->next)
5175 if (fp->decl == context)
5176 break;
5177
5178 if (fp == 0)
5179 abort ();
5180
e9a25f70
JL
5181 if (GET_CODE (addr) == ADDRESSOF && GET_CODE (XEXP (addr, 0)) == MEM)
5182 addr = XEXP (XEXP (addr, 0), 0);
5183
6f086dfc
RS
5184 /* Decode given address as base reg plus displacement. */
5185 if (GET_CODE (addr) == REG)
5186 basereg = addr, displacement = 0;
5187 else if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
5188 basereg = XEXP (addr, 0), displacement = INTVAL (XEXP (addr, 1));
5189 else
5190 abort ();
5191
5192 /* We accept vars reached via the containing function's
5193 incoming arg pointer and via its stack variables pointer. */
5194 if (basereg == fp->internal_arg_pointer)
5195 {
5196 /* If reached via arg pointer, get the arg pointer value
5197 out of that function's stack frame.
5198
5199 There are two cases: If a separate ap is needed, allocate a
5200 slot in the outer function for it and dereference it that way.
5201 This is correct even if the real ap is actually a pseudo.
5202 Otherwise, just adjust the offset from the frame pointer to
5203 compensate. */
5204
5205#ifdef NEED_SEPARATE_AP
5206 rtx addr;
5207
49ad7cfa
BS
5208 if (fp->x_arg_pointer_save_area == 0)
5209 fp->x_arg_pointer_save_area
e2ecd91c 5210 = assign_stack_local_1 (Pmode, GET_MODE_SIZE (Pmode), 0, fp);
6f086dfc 5211
49ad7cfa 5212 addr = fix_lexical_addr (XEXP (fp->x_arg_pointer_save_area, 0), var);
6f086dfc
RS
5213 addr = memory_address (Pmode, addr);
5214
38a448ca 5215 base = copy_to_reg (gen_rtx_MEM (Pmode, addr));
6f086dfc
RS
5216#else
5217 displacement += (FIRST_PARM_OFFSET (context) - STARTING_FRAME_OFFSET);
86f8eff3 5218 base = lookup_static_chain (var);
6f086dfc
RS
5219#endif
5220 }
5221
5222 else if (basereg == virtual_stack_vars_rtx)
5223 {
5224 /* This is the same code as lookup_static_chain, duplicated here to
5225 avoid an extra call to decl_function_context. */
5226 tree link;
5227
5228 for (link = context_display; link; link = TREE_CHAIN (link))
5229 if (TREE_PURPOSE (link) == context)
5230 {
5231 base = RTL_EXPR_RTL (TREE_VALUE (link));
5232 break;
5233 }
5234 }
5235
5236 if (base == 0)
5237 abort ();
5238
5239 /* Use same offset, relative to appropriate static chain or argument
5240 pointer. */
5241 return plus_constant (base, displacement);
5242}
5243\f
5244/* Return the address of the trampoline for entering nested fn FUNCTION.
5245 If necessary, allocate a trampoline (in the stack frame)
5246 and emit rtl to initialize its contents (at entry to this function). */
5247
5248rtx
5249trampoline_address (function)
5250 tree function;
5251{
5252 tree link;
5253 tree rtlexp;
5254 rtx tramp;
5255 struct function *fp;
5256 tree fn_context;
5257
5258 /* Find an existing trampoline and return it. */
5259 for (link = trampoline_list; link; link = TREE_CHAIN (link))
5260 if (TREE_PURPOSE (link) == function)
e87ee2a9
RK
5261 return
5262 round_trampoline_addr (XEXP (RTL_EXPR_RTL (TREE_VALUE (link)), 0));
5263
6f086dfc 5264 for (fp = outer_function_chain; fp; fp = fp->next)
49ad7cfa 5265 for (link = fp->x_trampoline_list; link; link = TREE_CHAIN (link))
6f086dfc
RS
5266 if (TREE_PURPOSE (link) == function)
5267 {
5268 tramp = fix_lexical_addr (XEXP (RTL_EXPR_RTL (TREE_VALUE (link)), 0),
5269 function);
5270 return round_trampoline_addr (tramp);
5271 }
5272
5273 /* None exists; we must make one. */
5274
5275 /* Find the `struct function' for the function containing FUNCTION. */
5276 fp = 0;
5277 fn_context = decl_function_context (function);
4ac74fb8
RK
5278 if (fn_context != current_function_decl
5279 && fn_context != inline_function_decl)
6f086dfc
RS
5280 for (fp = outer_function_chain; fp; fp = fp->next)
5281 if (fp->decl == fn_context)
5282 break;
5283
5284 /* Allocate run-time space for this trampoline
5285 (usually in the defining function's stack frame). */
5286#ifdef ALLOCATE_TRAMPOLINE
5287 tramp = ALLOCATE_TRAMPOLINE (fp);
5288#else
5289 /* If rounding needed, allocate extra space
5290 to ensure we have TRAMPOLINE_SIZE bytes left after rounding up. */
5291#ifdef TRAMPOLINE_ALIGNMENT
b02ab63a
RK
5292#define TRAMPOLINE_REAL_SIZE \
5293 (TRAMPOLINE_SIZE + (TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT) - 1)
6f086dfc
RS
5294#else
5295#define TRAMPOLINE_REAL_SIZE (TRAMPOLINE_SIZE)
5296#endif
e2ecd91c
BS
5297 tramp = assign_stack_local_1 (BLKmode, TRAMPOLINE_REAL_SIZE, 0,
5298 fp ? fp : current_function);
6f086dfc
RS
5299#endif
5300
5301 /* Record the trampoline for reuse and note it for later initialization
5302 by expand_function_end. */
5303 if (fp != 0)
5304 {
28498644
RK
5305 push_obstacks (fp->function_maybepermanent_obstack,
5306 fp->function_maybepermanent_obstack);
6f086dfc
RS
5307 rtlexp = make_node (RTL_EXPR);
5308 RTL_EXPR_RTL (rtlexp) = tramp;
49ad7cfa
BS
5309 fp->x_trampoline_list = tree_cons (function, rtlexp,
5310 fp->x_trampoline_list);
6f086dfc
RS
5311 pop_obstacks ();
5312 }
5313 else
5314 {
5315 /* Make the RTL_EXPR node temporary, not momentary, so that the
5316 trampoline_list doesn't become garbage. */
5317 int momentary = suspend_momentary ();
5318 rtlexp = make_node (RTL_EXPR);
5319 resume_momentary (momentary);
5320
5321 RTL_EXPR_RTL (rtlexp) = tramp;
5322 trampoline_list = tree_cons (function, rtlexp, trampoline_list);
5323 }
5324
5325 tramp = fix_lexical_addr (XEXP (tramp, 0), function);
5326 return round_trampoline_addr (tramp);
5327}
5328
5329/* Given a trampoline address,
5330 round it to multiple of TRAMPOLINE_ALIGNMENT. */
5331
5332static rtx
5333round_trampoline_addr (tramp)
5334 rtx tramp;
5335{
5336#ifdef TRAMPOLINE_ALIGNMENT
5337 /* Round address up to desired boundary. */
5338 rtx temp = gen_reg_rtx (Pmode);
5339 temp = expand_binop (Pmode, add_optab, tramp,
b02ab63a 5340 GEN_INT (TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT - 1),
6f086dfc
RS
5341 temp, 0, OPTAB_LIB_WIDEN);
5342 tramp = expand_binop (Pmode, and_optab, temp,
b02ab63a 5343 GEN_INT (- TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT),
6f086dfc
RS
5344 temp, 0, OPTAB_LIB_WIDEN);
5345#endif
5346 return tramp;
5347}
5348\f
467456d0
RS
5349/* The functions identify_blocks and reorder_blocks provide a way to
5350 reorder the tree of BLOCK nodes, for optimizers that reshuffle or
5351 duplicate portions of the RTL code. Call identify_blocks before
5352 changing the RTL, and call reorder_blocks after. */
5353
b2a59b15
MS
5354/* Put all this function's BLOCK nodes including those that are chained
5355 onto the first block into a vector, and return it.
467456d0
RS
5356 Also store in each NOTE for the beginning or end of a block
5357 the index of that block in the vector.
b2a59b15 5358 The arguments are BLOCK, the chain of top-level blocks of the function,
467456d0
RS
5359 and INSNS, the insn chain of the function. */
5360
5361tree *
b2a59b15
MS
5362identify_blocks (block, insns)
5363 tree block;
467456d0
RS
5364 rtx insns;
5365{
fc289cd1
JW
5366 int n_blocks;
5367 tree *block_vector;
5368 int *block_stack;
467456d0 5369 int depth = 0;
b2a59b15
MS
5370 int next_block_number = 1;
5371 int current_block_number = 1;
467456d0
RS
5372 rtx insn;
5373
b2a59b15 5374 if (block == 0)
fc289cd1
JW
5375 return 0;
5376
b2a59b15 5377 n_blocks = all_blocks (block, 0);
fc289cd1
JW
5378 block_vector = (tree *) xmalloc (n_blocks * sizeof (tree));
5379 block_stack = (int *) alloca (n_blocks * sizeof (int));
5380
b2a59b15 5381 all_blocks (block, block_vector);
467456d0
RS
5382
5383 for (insn = insns; insn; insn = NEXT_INSN (insn))
5384 if (GET_CODE (insn) == NOTE)
5385 {
5386 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG)
5387 {
5388 block_stack[depth++] = current_block_number;
5389 current_block_number = next_block_number;
1b2ac438 5390 NOTE_BLOCK_NUMBER (insn) = next_block_number++;
467456d0
RS
5391 }
5392 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
5393 {
1b2ac438 5394 NOTE_BLOCK_NUMBER (insn) = current_block_number;
c7fdfd49 5395 current_block_number = block_stack[--depth];
467456d0
RS
5396 }
5397 }
5398
b2a59b15
MS
5399 if (n_blocks != next_block_number)
5400 abort ();
5401
467456d0
RS
5402 return block_vector;
5403}
5404
5405/* Given BLOCK_VECTOR which was returned by identify_blocks,
5406 and a revised instruction chain, rebuild the tree structure
5407 of BLOCK nodes to correspond to the new order of RTL.
fc289cd1 5408 The new block tree is inserted below TOP_BLOCK.
467456d0
RS
5409 Returns the current top-level block. */
5410
5411tree
b2a59b15 5412reorder_blocks (block_vector, block, insns)
467456d0 5413 tree *block_vector;
b2a59b15 5414 tree block;
467456d0
RS
5415 rtx insns;
5416{
b2a59b15 5417 tree current_block = block;
467456d0
RS
5418 rtx insn;
5419
fc289cd1 5420 if (block_vector == 0)
b2a59b15 5421 return block;
fc289cd1 5422
b2a59b15 5423 /* Prune the old trees away, so that it doesn't get in the way. */
fc289cd1 5424 BLOCK_SUBBLOCKS (current_block) = 0;
b2a59b15 5425 BLOCK_CHAIN (current_block) = 0;
fc289cd1 5426
467456d0
RS
5427 for (insn = insns; insn; insn = NEXT_INSN (insn))
5428 if (GET_CODE (insn) == NOTE)
5429 {
5430 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG)
5431 {
5432 tree block = block_vector[NOTE_BLOCK_NUMBER (insn)];
5433 /* If we have seen this block before, copy it. */
5434 if (TREE_ASM_WRITTEN (block))
5435 block = copy_node (block);
fc289cd1 5436 BLOCK_SUBBLOCKS (block) = 0;
467456d0
RS
5437 TREE_ASM_WRITTEN (block) = 1;
5438 BLOCK_SUPERCONTEXT (block) = current_block;
5439 BLOCK_CHAIN (block) = BLOCK_SUBBLOCKS (current_block);
5440 BLOCK_SUBBLOCKS (current_block) = block;
5441 current_block = block;
1b2ac438 5442 NOTE_SOURCE_FILE (insn) = 0;
467456d0
RS
5443 }
5444 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
5445 {
5446 BLOCK_SUBBLOCKS (current_block)
5447 = blocks_nreverse (BLOCK_SUBBLOCKS (current_block));
5448 current_block = BLOCK_SUPERCONTEXT (current_block);
1b2ac438 5449 NOTE_SOURCE_FILE (insn) = 0;
467456d0
RS
5450 }
5451 }
5452
b2a59b15
MS
5453 BLOCK_SUBBLOCKS (current_block)
5454 = blocks_nreverse (BLOCK_SUBBLOCKS (current_block));
467456d0
RS
5455 return current_block;
5456}
5457
5458/* Reverse the order of elements in the chain T of blocks,
5459 and return the new head of the chain (old last element). */
5460
5461static tree
5462blocks_nreverse (t)
5463 tree t;
5464{
5465 register tree prev = 0, decl, next;
5466 for (decl = t; decl; decl = next)
5467 {
5468 next = BLOCK_CHAIN (decl);
5469 BLOCK_CHAIN (decl) = prev;
5470 prev = decl;
5471 }
5472 return prev;
5473}
5474
b2a59b15
MS
5475/* Count the subblocks of the list starting with BLOCK, and list them
5476 all into the vector VECTOR. Also clear TREE_ASM_WRITTEN in all
5477 blocks. */
467456d0
RS
5478
5479static int
5480all_blocks (block, vector)
5481 tree block;
5482 tree *vector;
5483{
b2a59b15
MS
5484 int n_blocks = 0;
5485
5486 while (block)
5487 {
5488 TREE_ASM_WRITTEN (block) = 0;
5489
5490 /* Record this block. */
5491 if (vector)
5492 vector[n_blocks] = block;
5493
5494 ++n_blocks;
5495
5496 /* Record the subblocks, and their subblocks... */
5497 n_blocks += all_blocks (BLOCK_SUBBLOCKS (block),
5498 vector ? vector + n_blocks : 0);
5499 block = BLOCK_CHAIN (block);
5500 }
467456d0
RS
5501
5502 return n_blocks;
5503}
5504\f
b384405b
BS
5505/* Allocate a function structure and reset its contents to the defaults. */
5506static void
5507prepare_function_start ()
6f086dfc 5508{
b384405b 5509 current_function = (struct function *) xcalloc (1, sizeof (struct function));
e2ecd91c
BS
5510 current_function->can_garbage_collect = 0;
5511
6f086dfc
RS
5512 init_stmt_for_function ();
5513
5514 cse_not_expected = ! optimize;
5515
5516 /* Caller save not needed yet. */
5517 caller_save_needed = 0;
5518
5519 /* No stack slots have been made yet. */
5520 stack_slot_list = 0;
5521
b384405b
BS
5522 current_function_has_nonlocal_label = 0;
5523 current_function_has_nonlocal_goto = 0;
5524
6f086dfc 5525 /* There is no stack slot for handling nonlocal gotos. */
ba716ac9 5526 nonlocal_goto_handler_slots = 0;
6f086dfc
RS
5527 nonlocal_goto_stack_level = 0;
5528
5529 /* No labels have been declared for nonlocal use. */
5530 nonlocal_labels = 0;
e881bb1b 5531 nonlocal_goto_handler_labels = 0;
6f086dfc
RS
5532
5533 /* No function calls so far in this function. */
5534 function_call_count = 0;
5535
5536 /* No parm regs have been allocated.
5537 (This is important for output_inline_function.) */
5538 max_parm_reg = LAST_VIRTUAL_REGISTER + 1;
5539
5540 /* Initialize the RTL mechanism. */
5541 init_emit ();
5542
5543 /* Initialize the queue of pending postincrement and postdecrements,
5544 and some other info in expr.c. */
5545 init_expr ();
b384405b 5546
6f086dfc
RS
5547 /* We haven't done register allocation yet. */
5548 reg_renumber = 0;
5549
36edd3cc 5550 init_varasm_status (current_function);
6f086dfc 5551
e2ecd91c
BS
5552 /* Clear out data used for inlining. */
5553 current_function->inlinable = 0;
5554 current_function->original_decl_initial = 0;
5555 current_function->original_arg_vector = 0;
5556
6f086dfc
RS
5557 /* Set if a call to setjmp is seen. */
5558 current_function_calls_setjmp = 0;
5559
5560 /* Set if a call to longjmp is seen. */
5561 current_function_calls_longjmp = 0;
5562
5563 current_function_calls_alloca = 0;
6f086dfc 5564 current_function_contains_functions = 0;
54ff41b7 5565 current_function_is_leaf = 0;
fdb8a883 5566 current_function_sp_is_unchanging = 0;
54ff41b7 5567 current_function_uses_only_leaf_regs = 0;
acd693d1 5568 current_function_has_computed_jump = 0;
173cd503 5569 current_function_is_thunk = 0;
6f086dfc
RS
5570
5571 current_function_returns_pcc_struct = 0;
5572 current_function_returns_struct = 0;
5573 current_function_epilogue_delay_list = 0;
5574 current_function_uses_const_pool = 0;
5575 current_function_uses_pic_offset_table = 0;
aeb302bb 5576 current_function_cannot_inline = 0;
6f086dfc
RS
5577
5578 /* We have not yet needed to make a label to jump to for tail-recursion. */
5579 tail_recursion_label = 0;
5580
5581 /* We haven't had a need to make a save area for ap yet. */
6f086dfc
RS
5582 arg_pointer_save_area = 0;
5583
5584 /* No stack slots allocated yet. */
5585 frame_offset = 0;
5586
5587 /* No SAVE_EXPRs in this function yet. */
5588 save_expr_regs = 0;
5589
5590 /* No RTL_EXPRs in this function yet. */
5591 rtl_expr_chain = 0;
5592
bc0ebdf9
RK
5593 /* Set up to allocate temporaries. */
5594 init_temp_slots ();
6f086dfc 5595
b384405b
BS
5596 /* Indicate that we need to distinguish between the return value of the
5597 present function and the return value of a function being called. */
5598 rtx_equal_function_value_matters = 1;
5599
5600 /* Indicate that we have not instantiated virtual registers yet. */
5601 virtuals_instantiated = 0;
5602
5603 /* Indicate we have no need of a frame pointer yet. */
5604 frame_pointer_needed = 0;
5605
5606 /* By default assume not varargs or stdarg. */
5607 current_function_varargs = 0;
5608 current_function_stdarg = 0;
6f086dfc 5609
d9a98e1a
RK
5610 /* We haven't made any trampolines for this function yet. */
5611 trampoline_list = 0;
5612
6f086dfc
RS
5613 init_pending_stack_adjust ();
5614 inhibit_defer_pop = 0;
5615
5616 current_function_outgoing_args_size = 0;
36edd3cc
BS
5617
5618 if (init_machine_status)
5619 (*init_machine_status) (current_function);
b384405b
BS
5620}
5621
5622/* Initialize the rtl expansion mechanism so that we can do simple things
5623 like generate sequences. This is used to provide a context during global
5624 initialization of some passes. */
5625void
5626init_dummy_function_start ()
5627{
5628 prepare_function_start ();
5629}
5630
5631/* Generate RTL for the start of the function SUBR (a FUNCTION_DECL tree node)
5632 and initialize static variables for generating RTL for the statements
5633 of the function. */
5634
5635void
5636init_function_start (subr, filename, line)
5637 tree subr;
5638 char *filename;
5639 int line;
5640{
5641 prepare_function_start ();
5642
5643 /* Remember this function for later. */
5644 current_function->next_global = all_functions;
5645 all_functions = current_function;
87ff9c8e 5646
b384405b
BS
5647 current_function_name = (*decl_printable_name) (subr, 2);
5648
5649 /* Nonzero if this is a nested function that uses a static chain. */
5650
5651 current_function_needs_context
5652 = (decl_function_context (current_function_decl) != 0
5653 && ! DECL_NO_STATIC_CHAIN (current_function_decl));
5654
5655 /* Within function body, compute a type's size as soon it is laid out. */
5656 immediate_size_expand++;
6f086dfc 5657
6f086dfc 5658 /* Prevent ever trying to delete the first instruction of a function.
b274104c
PB
5659 Also tell final how to output a linenum before the function prologue.
5660 Note linenums could be missing, e.g. when compiling a Java .class file. */
5661 if (line > 0)
5662 emit_line_note (filename, line);
6f086dfc
RS
5663
5664 /* Make sure first insn is a note even if we don't want linenums.
5665 This makes sure the first insn will never be deleted.
5666 Also, final expects a note to appear there. */
5f4f0e22 5667 emit_note (NULL_PTR, NOTE_INSN_DELETED);
6f086dfc
RS
5668
5669 /* Set flags used by final.c. */
5670 if (aggregate_value_p (DECL_RESULT (subr)))
5671 {
5672#ifdef PCC_STATIC_STRUCT_RETURN
1b8297c1 5673 current_function_returns_pcc_struct = 1;
6f086dfc 5674#endif
1b8297c1 5675 current_function_returns_struct = 1;
6f086dfc
RS
5676 }
5677
5678 /* Warn if this value is an aggregate type,
5679 regardless of which calling convention we are using for it. */
5680 if (warn_aggregate_return
05e3bdb9 5681 && AGGREGATE_TYPE_P (TREE_TYPE (DECL_RESULT (subr))))
6f086dfc
RS
5682 warning ("function returns an aggregate");
5683
5684 current_function_returns_pointer
8eda074c 5685 = POINTER_TYPE_P (TREE_TYPE (DECL_RESULT (subr)));
49ad7cfa 5686}
5c7675e9 5687
49ad7cfa
BS
5688/* Make sure all values used by the optimization passes have sane
5689 defaults. */
5690void
5691init_function_for_compilation ()
5692{
5693 reg_renumber = 0;
5c7675e9
RH
5694 /* No prologue/epilogue insns yet. */
5695 prologue = epilogue = 0;
6f086dfc
RS
5696}
5697
5698/* Indicate that the current function uses extra args
5699 not explicitly mentioned in the argument list in any fashion. */
5700
5701void
5702mark_varargs ()
5703{
5704 current_function_varargs = 1;
5705}
5706
5707/* Expand a call to __main at the beginning of a possible main function. */
5708
e2fd1d94
JM
5709#if defined(INIT_SECTION_ASM_OP) && !defined(INVOKE__main)
5710#undef HAS_INIT_SECTION
5711#define HAS_INIT_SECTION
5712#endif
5713
6f086dfc
RS
5714void
5715expand_main_function ()
5716{
e2fd1d94 5717#if !defined (HAS_INIT_SECTION)
b93a436e
JL
5718 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, NAME__MAIN), 0,
5719 VOIDmode, 0);
e2fd1d94 5720#endif /* not HAS_INIT_SECTION */
6f086dfc
RS
5721}
5722\f
c20bf1f3
JB
5723extern struct obstack permanent_obstack;
5724
6f086dfc
RS
5725/* Start the RTL for a new function, and set variables used for
5726 emitting RTL.
5727 SUBR is the FUNCTION_DECL node.
5728 PARMS_HAVE_CLEANUPS is nonzero if there are cleanups associated with
5729 the function's parameters, which must be run at any return statement. */
5730
5731void
5732expand_function_start (subr, parms_have_cleanups)
5733 tree subr;
5734 int parms_have_cleanups;
5735{
5736 register int i;
5737 tree tem;
4e86caed 5738 rtx last_ptr = NULL_RTX;
6f086dfc
RS
5739
5740 /* Make sure volatile mem refs aren't considered
5741 valid operands of arithmetic insns. */
5742 init_recog_no_volatile ();
5743
7d384cc0
KR
5744 /* Set this before generating any memory accesses. */
5745 current_function_check_memory_usage
5746 = (flag_check_memory_usage
5747 && ! DECL_NO_CHECK_MEMORY_USAGE (current_function_decl));
5748
07417085
KR
5749 current_function_instrument_entry_exit
5750 = (flag_instrument_function_entry_exit
5751 && ! DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT (subr));
5752
6f086dfc
RS
5753 /* If function gets a static chain arg, store it in the stack frame.
5754 Do this first, so it gets the first stack slot offset. */
5755 if (current_function_needs_context)
3e2481e9
JW
5756 {
5757 last_ptr = assign_stack_local (Pmode, GET_MODE_SIZE (Pmode), 0);
f0c51a1e 5758
f0c51a1e
RK
5759 /* Delay copying static chain if it is not a register to avoid
5760 conflicts with regs used for parameters. */
f95182a4
ILT
5761 if (! SMALL_REGISTER_CLASSES
5762 || GET_CODE (static_chain_incoming_rtx) == REG)
f0c51a1e 5763 emit_move_insn (last_ptr, static_chain_incoming_rtx);
3e2481e9 5764 }
6f086dfc
RS
5765
5766 /* If the parameters of this function need cleaning up, get a label
5767 for the beginning of the code which executes those cleanups. This must
5768 be done before doing anything with return_label. */
5769 if (parms_have_cleanups)
5770 cleanup_label = gen_label_rtx ();
5771 else
5772 cleanup_label = 0;
5773
5774 /* Make the label for return statements to jump to, if this machine
5775 does not have a one-instruction return and uses an epilogue,
5776 or if it returns a structure, or if it has parm cleanups. */
5777#ifdef HAVE_return
5778 if (cleanup_label == 0 && HAVE_return
07417085 5779 && ! current_function_instrument_entry_exit
6f086dfc
RS
5780 && ! current_function_returns_pcc_struct
5781 && ! (current_function_returns_struct && ! optimize))
5782 return_label = 0;
5783 else
5784 return_label = gen_label_rtx ();
5785#else
5786 return_label = gen_label_rtx ();
5787#endif
5788
5789 /* Initialize rtx used to return the value. */
5790 /* Do this before assign_parms so that we copy the struct value address
5791 before any library calls that assign parms might generate. */
5792
5793 /* Decide whether to return the value in memory or in a register. */
5794 if (aggregate_value_p (DECL_RESULT (subr)))
5795 {
5796 /* Returning something that won't go in a register. */
4acc00bf 5797 register rtx value_address = 0;
6f086dfc
RS
5798
5799#ifdef PCC_STATIC_STRUCT_RETURN
5800 if (current_function_returns_pcc_struct)
5801 {
5802 int size = int_size_in_bytes (TREE_TYPE (DECL_RESULT (subr)));
5803 value_address = assemble_static_space (size);
5804 }
5805 else
5806#endif
5807 {
5808 /* Expect to be passed the address of a place to store the value.
5809 If it is passed as an argument, assign_parms will take care of
5810 it. */
5811 if (struct_value_incoming_rtx)
5812 {
5813 value_address = gen_reg_rtx (Pmode);
5814 emit_move_insn (value_address, struct_value_incoming_rtx);
5815 }
5816 }
5817 if (value_address)
ccdecf58
RK
5818 {
5819 DECL_RTL (DECL_RESULT (subr))
38a448ca 5820 = gen_rtx_MEM (DECL_MODE (DECL_RESULT (subr)), value_address);
c6df88cb
MM
5821 MEM_SET_IN_STRUCT_P (DECL_RTL (DECL_RESULT (subr)),
5822 AGGREGATE_TYPE_P (TREE_TYPE
5823 (DECL_RESULT
5824 (subr))));
ccdecf58 5825 }
6f086dfc
RS
5826 }
5827 else if (DECL_MODE (DECL_RESULT (subr)) == VOIDmode)
5828 /* If return mode is void, this decl rtl should not be used. */
5829 DECL_RTL (DECL_RESULT (subr)) = 0;
07417085 5830 else if (parms_have_cleanups || current_function_instrument_entry_exit)
a53e14c0
RK
5831 {
5832 /* If function will end with cleanup code for parms,
5833 compute the return values into a pseudo reg,
5834 which we will copy into the true return register
5835 after the cleanups are done. */
5836
5837 enum machine_mode mode = DECL_MODE (DECL_RESULT (subr));
a5a52dbc 5838
a53e14c0
RK
5839#ifdef PROMOTE_FUNCTION_RETURN
5840 tree type = TREE_TYPE (DECL_RESULT (subr));
5841 int unsignedp = TREE_UNSIGNED (type);
5842
a5a52dbc 5843 mode = promote_mode (type, mode, &unsignedp, 1);
a53e14c0
RK
5844#endif
5845
5846 DECL_RTL (DECL_RESULT (subr)) = gen_reg_rtx (mode);
5847 }
6f086dfc
RS
5848 else
5849 /* Scalar, returned in a register. */
5850 {
5851#ifdef FUNCTION_OUTGOING_VALUE
5852 DECL_RTL (DECL_RESULT (subr))
5853 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (subr)), subr);
5854#else
5855 DECL_RTL (DECL_RESULT (subr))
5856 = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (subr)), subr);
5857#endif
5858
5859 /* Mark this reg as the function's return value. */
5860 if (GET_CODE (DECL_RTL (DECL_RESULT (subr))) == REG)
5861 {
5862 REG_FUNCTION_VALUE_P (DECL_RTL (DECL_RESULT (subr))) = 1;
5863 /* Needed because we may need to move this to memory
5864 in case it's a named return value whose address is taken. */
a82ad570 5865 DECL_REGISTER (DECL_RESULT (subr)) = 1;
6f086dfc
RS
5866 }
5867 }
5868
5869 /* Initialize rtx for parameters and local variables.
5870 In some cases this requires emitting insns. */
5871
5872 assign_parms (subr, 0);
5873
f0c51a1e
RK
5874 /* Copy the static chain now if it wasn't a register. The delay is to
5875 avoid conflicts with the parameter passing registers. */
5876
f95182a4 5877 if (SMALL_REGISTER_CLASSES && current_function_needs_context)
f0c51a1e
RK
5878 if (GET_CODE (static_chain_incoming_rtx) != REG)
5879 emit_move_insn (last_ptr, static_chain_incoming_rtx);
f0c51a1e 5880
6f086dfc
RS
5881 /* The following was moved from init_function_start.
5882 The move is supposed to make sdb output more accurate. */
5883 /* Indicate the beginning of the function body,
5884 as opposed to parm setup. */
5f4f0e22 5885 emit_note (NULL_PTR, NOTE_INSN_FUNCTION_BEG);
6f086dfc
RS
5886
5887 /* If doing stupid allocation, mark parms as born here. */
5888
5889 if (GET_CODE (get_last_insn ()) != NOTE)
5f4f0e22 5890 emit_note (NULL_PTR, NOTE_INSN_DELETED);
6f086dfc
RS
5891 parm_birth_insn = get_last_insn ();
5892
5893 if (obey_regdecls)
5894 {
5895 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_parm_reg; i++)
5896 use_variable (regno_reg_rtx[i]);
5897
5898 if (current_function_internal_arg_pointer != virtual_incoming_args_rtx)
5899 use_variable (current_function_internal_arg_pointer);
5900 }
5901
6d7306f7
JM
5902 context_display = 0;
5903 if (current_function_needs_context)
ac9e20f0 5904 {
6d7306f7
JM
5905 /* Fetch static chain values for containing functions. */
5906 tem = decl_function_context (current_function_decl);
5907 /* If not doing stupid register allocation copy the static chain
5908 pointer into a pseudo. If we have small register classes, copy
5909 the value from memory if static_chain_incoming_rtx is a REG. If
5910 we do stupid register allocation, we use the stack address
5911 generated above. */
5912 if (tem && ! obey_regdecls)
5913 {
6d7306f7
JM
5914 /* If the static chain originally came in a register, put it back
5915 there, then move it out in the next insn. The reason for
5916 this peculiar code is to satisfy function integration. */
f95182a4
ILT
5917 if (SMALL_REGISTER_CLASSES
5918 && GET_CODE (static_chain_incoming_rtx) == REG)
6d7306f7 5919 emit_move_insn (static_chain_incoming_rtx, last_ptr);
6d7306f7
JM
5920 last_ptr = copy_to_reg (static_chain_incoming_rtx);
5921 }
ac9e20f0 5922
6d7306f7
JM
5923 while (tem)
5924 {
5925 tree rtlexp = make_node (RTL_EXPR);
6f086dfc 5926
6d7306f7
JM
5927 RTL_EXPR_RTL (rtlexp) = last_ptr;
5928 context_display = tree_cons (tem, rtlexp, context_display);
5929 tem = decl_function_context (tem);
5930 if (tem == 0)
5931 break;
5932 /* Chain thru stack frames, assuming pointer to next lexical frame
5933 is found at the place we always store it. */
6f086dfc 5934#ifdef FRAME_GROWS_DOWNWARD
6d7306f7 5935 last_ptr = plus_constant (last_ptr, - GET_MODE_SIZE (Pmode));
6f086dfc 5936#endif
38a448ca 5937 last_ptr = copy_to_reg (gen_rtx_MEM (Pmode,
c5c76735
JL
5938 memory_address (Pmode,
5939 last_ptr)));
6d7306f7
JM
5940
5941 /* If we are not optimizing, ensure that we know that this
5942 piece of context is live over the entire function. */
5943 if (! optimize)
38a448ca
RH
5944 save_expr_regs = gen_rtx_EXPR_LIST (VOIDmode, last_ptr,
5945 save_expr_regs);
6d7306f7 5946 }
6f086dfc
RS
5947 }
5948
07417085
KR
5949 if (current_function_instrument_entry_exit)
5950 {
5951 rtx fun = DECL_RTL (current_function_decl);
5952 if (GET_CODE (fun) == MEM)
5953 fun = XEXP (fun, 0);
5954 else
5955 abort ();
5956 emit_library_call (profile_function_entry_libfunc, 0, VOIDmode, 2,
5957 fun, Pmode,
5958 expand_builtin_return_addr (BUILT_IN_RETURN_ADDRESS,
5959 0,
5960 hard_frame_pointer_rtx),
5961 Pmode);
5962 }
5963
6f086dfc
RS
5964 /* After the display initializations is where the tail-recursion label
5965 should go, if we end up needing one. Ensure we have a NOTE here
5966 since some things (like trampolines) get placed before this. */
5f4f0e22 5967 tail_recursion_reentry = emit_note (NULL_PTR, NOTE_INSN_DELETED);
6f086dfc
RS
5968
5969 /* Evaluate now the sizes of any types declared among the arguments. */
5970 for (tem = nreverse (get_pending_sizes ()); tem; tem = TREE_CHAIN (tem))
7b05e286 5971 {
86fa911a
RK
5972 expand_expr (TREE_VALUE (tem), const0_rtx, VOIDmode,
5973 EXPAND_MEMORY_USE_BAD);
7b05e286
JW
5974 /* Flush the queue in case this parameter declaration has
5975 side-effects. */
5976 emit_queue ();
5977 }
6f086dfc
RS
5978
5979 /* Make sure there is a line number after the function entry setup code. */
5980 force_next_line_note ();
5981}
5982\f
49ad7cfa
BS
5983/* Undo the effects of init_dummy_function_start. */
5984void
5985expand_dummy_function_end ()
5986{
5987 /* End any sequences that failed to be closed due to syntax errors. */
5988 while (in_sequence_p ())
5989 end_sequence ();
5990
5991 /* Outside function body, can't compute type's actual size
5992 until next function's body starts. */
5993 current_function = 0;
5994}
5995
6f086dfc 5996/* Generate RTL for the end of the current function.
980697fd 5997 FILENAME and LINE are the current position in the source file.
6f086dfc 5998
980697fd 5999 It is up to language-specific callers to do cleanups for parameters--
1be07046 6000 or else, supply 1 for END_BINDINGS and we will call expand_end_bindings. */
6f086dfc
RS
6001
6002void
1be07046 6003expand_function_end (filename, line, end_bindings)
6f086dfc
RS
6004 char *filename;
6005 int line;
1be07046 6006 int end_bindings;
6f086dfc
RS
6007{
6008 register int i;
6009 tree link;
6010
1e2414db 6011#ifdef TRAMPOLINE_TEMPLATE
6f086dfc 6012 static rtx initial_trampoline;
1e2414db 6013#endif
6f086dfc 6014
49ad7cfa
BS
6015 finish_expr_for_function ();
6016
6f086dfc
RS
6017#ifdef NON_SAVING_SETJMP
6018 /* Don't put any variables in registers if we call setjmp
6019 on a machine that fails to restore the registers. */
6020 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
6021 {
b88a3142
RK
6022 if (DECL_INITIAL (current_function_decl) != error_mark_node)
6023 setjmp_protect (DECL_INITIAL (current_function_decl));
6024
6f086dfc
RS
6025 setjmp_protect_args ();
6026 }
6027#endif
6028
6029 /* Save the argument pointer if a save area was made for it. */
6030 if (arg_pointer_save_area)
6031 {
ea0f9a85
JW
6032 /* arg_pointer_save_area may not be a valid memory address, so we
6033 have to check it and fix it if necessary. */
6034 rtx seq;
6035 start_sequence ();
6036 emit_move_insn (validize_mem (arg_pointer_save_area),
6037 virtual_incoming_args_rtx);
6038 seq = gen_sequence ();
6039 end_sequence ();
6040 emit_insn_before (seq, tail_recursion_reentry);
6f086dfc
RS
6041 }
6042
6043 /* Initialize any trampolines required by this function. */
6044 for (link = trampoline_list; link; link = TREE_CHAIN (link))
6045 {
6046 tree function = TREE_PURPOSE (link);
6047 rtx context = lookup_static_chain (function);
6048 rtx tramp = RTL_EXPR_RTL (TREE_VALUE (link));
7a87758d 6049#ifdef TRAMPOLINE_TEMPLATE
1e2414db 6050 rtx blktramp;
7a87758d 6051#endif
6f086dfc
RS
6052 rtx seq;
6053
1e2414db 6054#ifdef TRAMPOLINE_TEMPLATE
6f086dfc
RS
6055 /* First make sure this compilation has a template for
6056 initializing trampolines. */
6057 if (initial_trampoline == 0)
86f8eff3
RK
6058 {
6059 end_temporary_allocation ();
6060 initial_trampoline
38a448ca 6061 = gen_rtx_MEM (BLKmode, assemble_trampoline_template ());
86f8eff3
RK
6062 resume_temporary_allocation ();
6063 }
1e2414db 6064#endif
6f086dfc
RS
6065
6066 /* Generate insns to initialize the trampoline. */
6067 start_sequence ();
1e2414db
RK
6068 tramp = round_trampoline_addr (XEXP (tramp, 0));
6069#ifdef TRAMPOLINE_TEMPLATE
6070 blktramp = change_address (initial_trampoline, BLKmode, tramp);
6071 emit_block_move (blktramp, initial_trampoline,
6072 GEN_INT (TRAMPOLINE_SIZE),
189cc377 6073 TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT);
1e2414db
RK
6074#endif
6075 INITIALIZE_TRAMPOLINE (tramp, XEXP (DECL_RTL (function), 0), context);
6f086dfc
RS
6076 seq = get_insns ();
6077 end_sequence ();
6078
6079 /* Put those insns at entry to the containing function (this one). */
6080 emit_insns_before (seq, tail_recursion_reentry);
6081 }
6f086dfc 6082
11044f66
RK
6083 /* If we are doing stack checking and this function makes calls,
6084 do a stack probe at the start of the function to ensure we have enough
6085 space for another stack frame. */
6086 if (flag_stack_check && ! STACK_CHECK_BUILTIN)
6087 {
6088 rtx insn, seq;
6089
6090 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
6091 if (GET_CODE (insn) == CALL_INSN)
6092 {
6093 start_sequence ();
6094 probe_stack_range (STACK_CHECK_PROTECT,
6095 GEN_INT (STACK_CHECK_MAX_FRAME_SIZE));
6096 seq = get_insns ();
6097 end_sequence ();
6098 emit_insns_before (seq, tail_recursion_reentry);
6099 break;
6100 }
6101 }
6102
db8717d9
RK
6103 /* Warn about unused parms if extra warnings were specified. */
6104 if (warn_unused && extra_warnings)
6f086dfc 6105 {
db8717d9 6106 tree decl;
6f086dfc
RS
6107
6108 for (decl = DECL_ARGUMENTS (current_function_decl);
6109 decl; decl = TREE_CHAIN (decl))
497dc802
JM
6110 if (! TREE_USED (decl) && TREE_CODE (decl) == PARM_DECL
6111 && DECL_NAME (decl) && ! DECL_ARTIFICIAL (decl))
6f086dfc
RS
6112 warning_with_decl (decl, "unused parameter `%s'");
6113 }
6f086dfc
RS
6114
6115 /* Delete handlers for nonlocal gotos if nothing uses them. */
ba716ac9
BS
6116 if (nonlocal_goto_handler_slots != 0
6117 && ! current_function_has_nonlocal_label)
6f086dfc
RS
6118 delete_handlers ();
6119
6120 /* End any sequences that failed to be closed due to syntax errors. */
6121 while (in_sequence_p ())
5f4f0e22 6122 end_sequence ();
6f086dfc
RS
6123
6124 /* Outside function body, can't compute type's actual size
6125 until next function's body starts. */
6126 immediate_size_expand--;
6127
6128 /* If doing stupid register allocation,
6129 mark register parms as dying here. */
6130
6131 if (obey_regdecls)
6132 {
6133 rtx tem;
6134 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_parm_reg; i++)
6135 use_variable (regno_reg_rtx[i]);
6136
6137 /* Likewise for the regs of all the SAVE_EXPRs in the function. */
6138
6139 for (tem = save_expr_regs; tem; tem = XEXP (tem, 1))
6140 {
6141 use_variable (XEXP (tem, 0));
6142 use_variable_after (XEXP (tem, 0), parm_birth_insn);
6143 }
6144
6145 if (current_function_internal_arg_pointer != virtual_incoming_args_rtx)
6146 use_variable (current_function_internal_arg_pointer);
6147 }
6148
6149 clear_pending_stack_adjust ();
6150 do_pending_stack_adjust ();
6151
6152 /* Mark the end of the function body.
6153 If control reaches this insn, the function can drop through
6154 without returning a value. */
5f4f0e22 6155 emit_note (NULL_PTR, NOTE_INSN_FUNCTION_END);
6f086dfc 6156
82e415a3
DE
6157 /* Must mark the last line number note in the function, so that the test
6158 coverage code can avoid counting the last line twice. This just tells
6159 the code to ignore the immediately following line note, since there
6160 already exists a copy of this note somewhere above. This line number
6161 note is still needed for debugging though, so we can't delete it. */
6162 if (flag_test_coverage)
6163 emit_note (NULL_PTR, NOTE_REPEATED_LINE_NUMBER);
6164
6f086dfc
RS
6165 /* Output a linenumber for the end of the function.
6166 SDB depends on this. */
6167 emit_line_note_force (filename, line);
6168
6169 /* Output the label for the actual return from the function,
6170 if one is expected. This happens either because a function epilogue
6171 is used instead of a return instruction, or because a return was done
6172 with a goto in order to run local cleanups, or because of pcc-style
6173 structure returning. */
6174
6175 if (return_label)
6176 emit_label (return_label);
6177
1be07046
RS
6178 /* C++ uses this. */
6179 if (end_bindings)
6180 expand_end_bindings (0, 0, 0);
6181
e5a1e0e8
MS
6182 /* Now handle any leftover exception regions that may have been
6183 created for the parameters. */
6184 {
6185 rtx last = get_last_insn ();
6186 rtx label;
6187
6188 expand_leftover_cleanups ();
6189
6190 /* If the above emitted any code, may sure we jump around it. */
6191 if (last != get_last_insn ())
6192 {
6193 label = gen_label_rtx ();
6194 last = emit_jump_insn_after (gen_jump (label), last);
6195 last = emit_barrier_after (last);
6196 emit_label (label);
6197 }
6198 }
6199
07417085
KR
6200 if (current_function_instrument_entry_exit)
6201 {
6202 rtx fun = DECL_RTL (current_function_decl);
6203 if (GET_CODE (fun) == MEM)
6204 fun = XEXP (fun, 0);
6205 else
6206 abort ();
6207 emit_library_call (profile_function_exit_libfunc, 0, VOIDmode, 2,
6208 fun, Pmode,
6209 expand_builtin_return_addr (BUILT_IN_RETURN_ADDRESS,
6210 0,
6211 hard_frame_pointer_rtx),
6212 Pmode);
6213 }
6214
6f086dfc
RS
6215 /* If we had calls to alloca, and this machine needs
6216 an accurate stack pointer to exit the function,
6217 insert some code to save and restore the stack pointer. */
6218#ifdef EXIT_IGNORE_STACK
6219 if (! EXIT_IGNORE_STACK)
6220#endif
6221 if (current_function_calls_alloca)
6222 {
59257ff7
RK
6223 rtx tem = 0;
6224
6225 emit_stack_save (SAVE_FUNCTION, &tem, parm_birth_insn);
5f4f0e22 6226 emit_stack_restore (SAVE_FUNCTION, tem, NULL_RTX);
6f086dfc
RS
6227 }
6228
6229 /* If scalar return value was computed in a pseudo-reg,
6230 copy that to the hard return register. */
6231 if (DECL_RTL (DECL_RESULT (current_function_decl)) != 0
6232 && GET_CODE (DECL_RTL (DECL_RESULT (current_function_decl))) == REG
6233 && (REGNO (DECL_RTL (DECL_RESULT (current_function_decl)))
6234 >= FIRST_PSEUDO_REGISTER))
6235 {
6236 rtx real_decl_result;
6237
6238#ifdef FUNCTION_OUTGOING_VALUE
6239 real_decl_result
6240 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (current_function_decl)),
6241 current_function_decl);
6242#else
6243 real_decl_result
6244 = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (current_function_decl)),
6245 current_function_decl);
6246#endif
6247 REG_FUNCTION_VALUE_P (real_decl_result) = 1;
ecec4441
JW
6248 /* If this is a BLKmode structure being returned in registers, then use
6249 the mode computed in expand_return. */
6250 if (GET_MODE (real_decl_result) == BLKmode)
6251 PUT_MODE (real_decl_result,
6252 GET_MODE (DECL_RTL (DECL_RESULT (current_function_decl))));
6f086dfc
RS
6253 emit_move_insn (real_decl_result,
6254 DECL_RTL (DECL_RESULT (current_function_decl)));
38a448ca 6255 emit_insn (gen_rtx_USE (VOIDmode, real_decl_result));
f345de42
JL
6256
6257 /* The delay slot scheduler assumes that current_function_return_rtx
6258 holds the hard register containing the return value, not a temporary
6259 pseudo. */
6260 current_function_return_rtx = real_decl_result;
6f086dfc
RS
6261 }
6262
6263 /* If returning a structure, arrange to return the address of the value
6264 in a place where debuggers expect to find it.
6265
6266 If returning a structure PCC style,
6267 the caller also depends on this value.
6268 And current_function_returns_pcc_struct is not necessarily set. */
6269 if (current_function_returns_struct
6270 || current_function_returns_pcc_struct)
6271 {
6272 rtx value_address = XEXP (DECL_RTL (DECL_RESULT (current_function_decl)), 0);
6273 tree type = TREE_TYPE (DECL_RESULT (current_function_decl));
6274#ifdef FUNCTION_OUTGOING_VALUE
6275 rtx outgoing
6276 = FUNCTION_OUTGOING_VALUE (build_pointer_type (type),
6277 current_function_decl);
6278#else
6279 rtx outgoing
6280 = FUNCTION_VALUE (build_pointer_type (type),
6281 current_function_decl);
6282#endif
6283
6284 /* Mark this as a function return value so integrate will delete the
6285 assignment and USE below when inlining this function. */
6286 REG_FUNCTION_VALUE_P (outgoing) = 1;
6287
6288 emit_move_insn (outgoing, value_address);
6289 use_variable (outgoing);
6290 }
6291
71038426
RH
6292 /* If this is an implementation of __throw, do what's necessary to
6293 communicate between __builtin_eh_return and the epilogue. */
6294 expand_eh_return ();
6295
6f086dfc
RS
6296 /* Output a return insn if we are using one.
6297 Otherwise, let the rtl chain end here, to drop through
6298 into the epilogue. */
6299
6300#ifdef HAVE_return
6301 if (HAVE_return)
6302 {
6303 emit_jump_insn (gen_return ());
6304 emit_barrier ();
6305 }
6306#endif
6307
6308 /* Fix up any gotos that jumped out to the outermost
6309 binding level of the function.
6310 Must follow emitting RETURN_LABEL. */
6311
6312 /* If you have any cleanups to do at this point,
6313 and they need to create temporary variables,
6314 then you will lose. */
e15679f8 6315 expand_fixups (get_insns ());
6f086dfc 6316}
bdac5f58 6317\f
bdac5f58
TW
6318/* Create an array that records the INSN_UIDs of INSNS (either a sequence
6319 or a single insn). */
6320
487a6e06 6321#if defined (HAVE_prologue) || defined (HAVE_epilogue)
bdac5f58
TW
6322static int *
6323record_insns (insns)
6324 rtx insns;
6325{
6326 int *vec;
6327
6328 if (GET_CODE (insns) == SEQUENCE)
6329 {
6330 int len = XVECLEN (insns, 0);
6331 vec = (int *) oballoc ((len + 1) * sizeof (int));
6332 vec[len] = 0;
6333 while (--len >= 0)
6334 vec[len] = INSN_UID (XVECEXP (insns, 0, len));
6335 }
6336 else
6337 {
6338 vec = (int *) oballoc (2 * sizeof (int));
6339 vec[0] = INSN_UID (insns);
6340 vec[1] = 0;
6341 }
6342 return vec;
6343}
6344
10914065 6345/* Determine how many INSN_UIDs in VEC are part of INSN. */
bdac5f58 6346
10914065 6347static int
bdac5f58
TW
6348contains (insn, vec)
6349 rtx insn;
6350 int *vec;
6351{
6352 register int i, j;
6353
6354 if (GET_CODE (insn) == INSN
6355 && GET_CODE (PATTERN (insn)) == SEQUENCE)
6356 {
10914065 6357 int count = 0;
bdac5f58
TW
6358 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6359 for (j = 0; vec[j]; j++)
6360 if (INSN_UID (XVECEXP (PATTERN (insn), 0, i)) == vec[j])
10914065
TW
6361 count++;
6362 return count;
bdac5f58
TW
6363 }
6364 else
6365 {
6366 for (j = 0; vec[j]; j++)
6367 if (INSN_UID (insn) == vec[j])
10914065 6368 return 1;
bdac5f58
TW
6369 }
6370 return 0;
6371}
5c7675e9
RH
6372
6373int
6374prologue_epilogue_contains (insn)
6375 rtx insn;
6376{
6377 if (prologue && contains (insn, prologue))
6378 return 1;
6379 if (epilogue && contains (insn, epilogue))
6380 return 1;
6381 return 0;
6382}
081f5e7e 6383#endif /* HAVE_prologue || HAVE_epilogue */
bdac5f58 6384
9faa82d8 6385/* Generate the prologue and epilogue RTL if the machine supports it. Thread
bdac5f58
TW
6386 this into place with notes indicating where the prologue ends and where
6387 the epilogue begins. Update the basic block information when possible. */
6388
6389void
6390thread_prologue_and_epilogue_insns (f)
54ea1de9 6391 rtx f ATTRIBUTE_UNUSED;
bdac5f58 6392{
e881bb1b
RH
6393 int insertted = 0;
6394
bdac5f58
TW
6395#ifdef HAVE_prologue
6396 if (HAVE_prologue)
6397 {
e881bb1b 6398 rtx seq;
bdac5f58 6399
e881bb1b
RH
6400 start_sequence ();
6401 seq = gen_prologue();
6402 emit_insn (seq);
bdac5f58
TW
6403
6404 /* Retain a map of the prologue insns. */
e881bb1b
RH
6405 if (GET_CODE (seq) != SEQUENCE)
6406 seq = get_insns ();
6407 prologue = record_insns (seq);
6408
6409 emit_note (NULL, NOTE_INSN_PROLOGUE_END);
6410 seq = gen_sequence ();
6411 end_sequence ();
6412
6413 /* If optimization is off, and perhaps in an empty function,
6414 the entry block will have no successors. */
6415 if (ENTRY_BLOCK_PTR->succ)
6416 {
6417 /* Can't deal with multiple successsors of the entry block. */
6418 if (ENTRY_BLOCK_PTR->succ->succ_next)
6419 abort ();
6420
6421 insert_insn_on_edge (seq, ENTRY_BLOCK_PTR->succ);
6422 insertted = 1;
6423 }
6424 else
6425 emit_insn_after (seq, f);
bdac5f58 6426 }
bdac5f58 6427#endif
bdac5f58
TW
6428
6429#ifdef HAVE_epilogue
6430 if (HAVE_epilogue)
6431 {
e881bb1b
RH
6432 edge e;
6433 basic_block bb = 0;
6434 rtx tail = get_last_insn ();
6435
6436 /* ??? This is gastly. If function returns were not done via uses,
6437 but via mark_regs_live_at_end, we could use insert_insn_on_edge
6438 and all of this uglyness would go away. */
bdac5f58 6439
e881bb1b 6440 switch (optimize)
bdac5f58 6441 {
e881bb1b
RH
6442 default:
6443 /* If the exit block has no non-fake predecessors, we don't
6444 need an epilogue. Furthermore, only pay attention to the
6445 fallthru predecessors; if (conditional) return insns were
6446 generated, by definition we do not need to emit epilogue
6447 insns. */
6448
6449 for (e = EXIT_BLOCK_PTR->pred; e ; e = e->pred_next)
6450 if ((e->flags & EDGE_FAKE) == 0
6451 && (e->flags & EDGE_FALLTHRU) != 0)
6452 break;
6453 if (e == NULL)
6454 break;
6455
6456 /* We can't handle multiple epilogues -- if one is needed,
6457 we won't be able to place it multiple times.
6458
6459 ??? Fix epilogue expanders to not assume they are the
6460 last thing done compiling the function. Either that
6461 or copy_rtx each insn.
6462
6463 ??? Blah, it's not a simple expression to assert that
6464 we've exactly one fallthru exit edge. */
6465
6466 bb = e->src;
6467 tail = bb->end;
6468
6469 /* ??? If the last insn of the basic block is a jump, then we
6470 are creating a new basic block. Wimp out and leave these
6471 insns outside any block. */
6472 if (GET_CODE (tail) == JUMP_INSN)
6473 bb = 0;
6474
6475 /* FALLTHRU */
6476 case 0:
6477 {
6478 rtx prev, seq, first_use;
6479
6480 /* Move the USE insns at the end of a function onto a list. */
6481 prev = tail;
6482 if (GET_CODE (prev) == BARRIER
6483 || GET_CODE (prev) == NOTE)
bdac5f58 6484 prev = prev_nonnote_insn (prev);
a78bdb38 6485
e881bb1b
RH
6486 first_use = 0;
6487 if (prev
6488 && GET_CODE (prev) == INSN
6489 && GET_CODE (PATTERN (prev)) == USE)
6490 {
6491 /* If the end of the block is the use, grab hold of something
6492 else so that we emit barriers etc in the right place. */
6493 if (prev == tail)
6494 {
6495 do
6496 tail = PREV_INSN (tail);
6497 while (GET_CODE (tail) == INSN
6498 && GET_CODE (PATTERN (tail)) == USE);
6499 }
bdac5f58 6500
e881bb1b
RH
6501 do
6502 {
6503 rtx use = prev;
6504 prev = prev_nonnote_insn (prev);
6505
6506 remove_insn (use);
6507 if (first_use)
6508 {
6509 NEXT_INSN (use) = first_use;
6510 PREV_INSN (first_use) = use;
6511 }
6512 else
6513 NEXT_INSN (use) = NULL_RTX;
6514 first_use = use;
6515 }
6516 while (prev
6517 && GET_CODE (prev) == INSN
6518 && GET_CODE (PATTERN (prev)) == USE);
6519 }
a78bdb38 6520
e881bb1b
RH
6521 /* The last basic block ends with a NOTE_INSN_EPILOGUE_BEG, the
6522 epilogue insns, the USE insns at the end of a function,
6523 the jump insn that returns, and then a BARRIER. */
a78bdb38 6524
e881bb1b
RH
6525 if (GET_CODE (tail) != BARRIER)
6526 {
6527 prev = next_nonnote_insn (tail);
6528 if (!prev || GET_CODE (prev) != BARRIER)
6529 emit_barrier_after (tail);
6530 }
a78bdb38 6531
e881bb1b
RH
6532 seq = gen_epilogue ();
6533 prev = tail;
6534 tail = emit_jump_insn_after (seq, tail);
bdac5f58 6535
e881bb1b
RH
6536 /* Insert the USE insns immediately before the return insn, which
6537 must be the last instruction emitted in the sequence. */
6538 if (first_use)
6539 emit_insns_before (first_use, tail);
6540 emit_note_after (NOTE_INSN_EPILOGUE_BEG, prev);
bdac5f58 6541
e881bb1b
RH
6542 /* Update the tail of the basic block. */
6543 if (bb)
6544 bb->end = tail;
6545
6546 /* Retain a map of the epilogue insns. */
6547 epilogue = record_insns (GET_CODE (seq) == SEQUENCE ? seq : tail);
6548 }
bdac5f58
TW
6549 }
6550 }
6551#endif
e881bb1b
RH
6552
6553 if (insertted)
6554 commit_edge_insertions ();
bdac5f58
TW
6555}
6556
6557/* Reposition the prologue-end and epilogue-begin notes after instruction
6558 scheduling and delayed branch scheduling. */
6559
6560void
6561reposition_prologue_and_epilogue_notes (f)
79c9824e 6562 rtx f ATTRIBUTE_UNUSED;
bdac5f58
TW
6563{
6564#if defined (HAVE_prologue) || defined (HAVE_epilogue)
6565 /* Reposition the prologue and epilogue notes. */
6566 if (n_basic_blocks)
6567 {
bf526252 6568 int len;
bdac5f58
TW
6569
6570 if (prologue)
6571 {
bf526252
RK
6572 register rtx insn, note = 0;
6573
6574 /* Scan from the beginning until we reach the last prologue insn.
6575 We apparently can't depend on basic_block_{head,end} after
6576 reorg has run. */
6577 for (len = 0; prologue[len]; len++)
6578 ;
9392c110
JH
6579 for (insn = f; len && insn; insn = NEXT_INSN (insn))
6580 {
6581 if (GET_CODE (insn) == NOTE)
6582 {
6583 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_PROLOGUE_END)
6584 note = insn;
6585 }
6586 else if ((len -= contains (insn, prologue)) == 0)
6587 {
89e99eea 6588 rtx next;
9392c110
JH
6589 /* Find the prologue-end note if we haven't already, and
6590 move it to just after the last prologue insn. */
6591 if (note == 0)
6592 {
51723711 6593 for (note = insn; (note = NEXT_INSN (note));)
9392c110
JH
6594 if (GET_CODE (note) == NOTE
6595 && NOTE_LINE_NUMBER (note) == NOTE_INSN_PROLOGUE_END)
6596 break;
6597 }
c93b03c2 6598
9392c110 6599 next = NEXT_INSN (note);
c93b03c2 6600
3b413743 6601 /* Whether or not we can depend on BLOCK_HEAD,
c93b03c2 6602 attempt to keep it up-to-date. */
3b413743
RH
6603 if (BLOCK_HEAD (0) == note)
6604 BLOCK_HEAD (0) = next;
c93b03c2 6605
89e99eea 6606 remove_insn (note);
9392c110
JH
6607 add_insn_after (note, insn);
6608 }
6609 }
bdac5f58
TW
6610 }
6611
6612 if (epilogue)
6613 {
bf526252
RK
6614 register rtx insn, note = 0;
6615
6616 /* Scan from the end until we reach the first epilogue insn.
6617 We apparently can't depend on basic_block_{head,end} after
6618 reorg has run. */
6619 for (len = 0; epilogue[len]; len++)
6620 ;
9392c110
JH
6621 for (insn = get_last_insn (); len && insn; insn = PREV_INSN (insn))
6622 {
6623 if (GET_CODE (insn) == NOTE)
6624 {
6625 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
6626 note = insn;
6627 }
6628 else if ((len -= contains (insn, epilogue)) == 0)
6629 {
6630 /* Find the epilogue-begin note if we haven't already, and
6631 move it to just before the first epilogue insn. */
6632 if (note == 0)
6633 {
51723711 6634 for (note = insn; (note = PREV_INSN (note));)
9392c110
JH
6635 if (GET_CODE (note) == NOTE
6636 && NOTE_LINE_NUMBER (note) == NOTE_INSN_EPILOGUE_BEG)
6637 break;
6638 }
c93b03c2 6639
3b413743 6640 /* Whether or not we can depend on BLOCK_HEAD,
c93b03c2
RH
6641 attempt to keep it up-to-date. */
6642 if (n_basic_blocks
3b413743
RH
6643 && BLOCK_HEAD (n_basic_blocks-1) == insn)
6644 BLOCK_HEAD (n_basic_blocks-1) = note;
c93b03c2 6645
89e99eea 6646 remove_insn (note);
c93b03c2 6647 add_insn_before (note, insn);
9392c110
JH
6648 }
6649 }
bdac5f58
TW
6650 }
6651 }
6652#endif /* HAVE_prologue or HAVE_epilogue */
6653}
87ff9c8e
RH
6654
6655/* Mark T for GC. */
6656
6657static void
6658mark_temp_slot (t)
6659 struct temp_slot *t;
6660{
6661 while (t)
6662 {
6663 ggc_mark_rtx (t->slot);
6664 ggc_mark_rtx (t->address);
6665 ggc_mark_tree (t->rtl_expr);
6666
6667 t = t->next;
6668 }
6669}
6670
6671/* Mark P for GC. */
6672
6673static void
6674mark_function_state (p)
6675 struct function *p;
6676{
6677 int i;
6678 rtx *r;
6679
6680 if (p == 0)
6681 return;
6682
6683 ggc_mark_rtx (p->arg_offset_rtx);
6684
6685 for (i = p->x_max_parm_reg, r = p->x_parm_reg_stack_loc;
6686 i > 0; --i, ++r)
6687 ggc_mark_rtx (*r);
6688
6689 ggc_mark_rtx (p->return_rtx);
6690 ggc_mark_rtx (p->x_cleanup_label);
6691 ggc_mark_rtx (p->x_return_label);
6692 ggc_mark_rtx (p->x_save_expr_regs);
6693 ggc_mark_rtx (p->x_stack_slot_list);
6694 ggc_mark_rtx (p->x_parm_birth_insn);
6695 ggc_mark_rtx (p->x_tail_recursion_label);
6696 ggc_mark_rtx (p->x_tail_recursion_reentry);
6697 ggc_mark_rtx (p->internal_arg_pointer);
6698 ggc_mark_rtx (p->x_arg_pointer_save_area);
6699 ggc_mark_tree (p->x_rtl_expr_chain);
6700 ggc_mark_rtx (p->x_last_parm_insn);
6701 ggc_mark_tree (p->x_context_display);
6702 ggc_mark_tree (p->x_trampoline_list);
6703 ggc_mark_rtx (p->epilogue_delay_list);
6704
6705 mark_temp_slot (p->x_temp_slots);
6706
6707 {
6708 struct var_refs_queue *q = p->fixup_var_refs_queue;
6709 while (q)
6710 {
6711 ggc_mark_rtx (q->modified);
6712 q = q->next;
6713 }
6714 }
6715
6716 ggc_mark_rtx (p->x_nonlocal_goto_handler_slots);
6717 ggc_mark_rtx (p->x_nonlocal_goto_stack_level);
6718 ggc_mark_tree (p->x_nonlocal_labels);
6719}
6720
6721/* Mark the function chain ARG (which is really a struct function **)
6722 for GC. */
6723
6724static void
6725mark_function_chain (arg)
6726 void *arg;
6727{
6728 struct function *f = *(struct function **) arg;
6729
6730 for (; f; f = f->next_global)
6731 {
6732 if (f->can_garbage_collect)
6733 continue;
6734
6735 ggc_mark_tree (f->decl);
6736
6737 mark_function_state (f);
6738 mark_stmt_state (f->stmt);
6739 mark_eh_state (f->eh);
6740 mark_emit_state (f->emit);
6741 mark_varasm_state (f->varasm);
6742
6743 ggc_mark_rtx (f->expr->x_saveregs_value);
6744 ggc_mark_rtx (f->expr->x_apply_args_value);
6745 ggc_mark_rtx (f->expr->x_forced_labels);
6746
6747 if (mark_machine_status)
6748 (*mark_machine_status) (f);
6749 if (mark_lang_status)
6750 (*mark_lang_status) (f);
6751
6752 if (f->original_arg_vector)
6753 ggc_mark_rtvec ((rtvec) f->original_arg_vector);
6754 if (f->original_decl_initial)
6755 ggc_mark_tree (f->original_decl_initial);
6756 }
6757}
6758
6759/* Called once, at initialization, to initialize function.c. */
6760
6761void
6762init_function_once ()
6763{
6764 ggc_add_root (&all_functions, 1, sizeof all_functions,
6765 mark_function_chain);
6766}
This page took 1.691065 seconds and 5 git commands to generate.