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1 | /* Data flow analysis for GNU compiler. |
2 | Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* This file contains the data flow analysis pass of the compiler. | |
22 | It computes data flow information | |
23 | which tells combine_instructions which insns to consider combining | |
24 | and controls register allocation. | |
25 | ||
26 | Additional data flow information that is too bulky to record | |
27 | is generated during the analysis, and is used at that time to | |
28 | create autoincrement and autodecrement addressing. | |
29 | ||
30 | The first step is dividing the function into basic blocks. | |
31 | find_basic_blocks does this. Then life_analysis determines | |
32 | where each register is live and where it is dead. | |
33 | ||
34 | ** find_basic_blocks ** | |
35 | ||
36 | find_basic_blocks divides the current function's rtl | |
37 | into basic blocks. It records the beginnings and ends of the | |
38 | basic blocks in the vectors basic_block_head and basic_block_end, | |
39 | and the number of blocks in n_basic_blocks. | |
40 | ||
41 | find_basic_blocks also finds any unreachable loops | |
42 | and deletes them. | |
43 | ||
44 | ** life_analysis ** | |
45 | ||
46 | life_analysis is called immediately after find_basic_blocks. | |
47 | It uses the basic block information to determine where each | |
48 | hard or pseudo register is live. | |
49 | ||
50 | ** live-register info ** | |
51 | ||
52 | The information about where each register is live is in two parts: | |
53 | the REG_NOTES of insns, and the vector basic_block_live_at_start. | |
54 | ||
55 | basic_block_live_at_start has an element for each basic block, | |
56 | and the element is a bit-vector with a bit for each hard or pseudo | |
57 | register. The bit is 1 if the register is live at the beginning | |
58 | of the basic block. | |
59 | ||
60 | Two types of elements can be added to an insn's REG_NOTES. | |
61 | A REG_DEAD note is added to an insn's REG_NOTES for any register | |
62 | that meets both of two conditions: The value in the register is not | |
63 | needed in subsequent insns and the insn does not replace the value in | |
64 | the register (in the case of multi-word hard registers, the value in | |
65 | each register must be replaced by the insn to avoid a REG_DEAD note). | |
66 | ||
67 | In the vast majority of cases, an object in a REG_DEAD note will be | |
68 | used somewhere in the insn. The (rare) exception to this is if an | |
69 | insn uses a multi-word hard register and only some of the registers are | |
70 | needed in subsequent insns. In that case, REG_DEAD notes will be | |
71 | provided for those hard registers that are not subsequently needed. | |
72 | Partial REG_DEAD notes of this type do not occur when an insn sets | |
73 | only some of the hard registers used in such a multi-word operand; | |
74 | omitting REG_DEAD notes for objects stored in an insn is optional and | |
75 | the desire to do so does not justify the complexity of the partial | |
76 | REG_DEAD notes. | |
77 | ||
78 | REG_UNUSED notes are added for each register that is set by the insn | |
79 | but is unused subsequently (if every register set by the insn is unused | |
80 | and the insn does not reference memory or have some other side-effect, | |
81 | the insn is deleted instead). If only part of a multi-word hard | |
82 | register is used in a subsequent insn, REG_UNUSED notes are made for | |
83 | the parts that will not be used. | |
84 | ||
85 | To determine which registers are live after any insn, one can | |
86 | start from the beginning of the basic block and scan insns, noting | |
87 | which registers are set by each insn and which die there. | |
88 | ||
89 | ** Other actions of life_analysis ** | |
90 | ||
91 | life_analysis sets up the LOG_LINKS fields of insns because the | |
92 | information needed to do so is readily available. | |
93 | ||
94 | life_analysis deletes insns whose only effect is to store a value | |
95 | that is never used. | |
96 | ||
97 | life_analysis notices cases where a reference to a register as | |
98 | a memory address can be combined with a preceding or following | |
99 | incrementation or decrementation of the register. The separate | |
100 | instruction to increment or decrement is deleted and the address | |
101 | is changed to a POST_INC or similar rtx. | |
102 | ||
103 | Each time an incrementing or decrementing address is created, | |
104 | a REG_INC element is added to the insn's REG_NOTES list. | |
105 | ||
106 | life_analysis fills in certain vectors containing information about | |
107 | register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length, | |
108 | reg_n_calls_crosses and reg_basic_block. */ | |
109 | \f | |
110 | #include <stdio.h> | |
111 | #include "config.h" | |
112 | #include "rtl.h" | |
113 | #include "basic-block.h" | |
114 | #include "insn-config.h" | |
115 | #include "regs.h" | |
116 | #include "hard-reg-set.h" | |
117 | #include "flags.h" | |
118 | #include "output.h" | |
119 | ||
120 | #include "obstack.h" | |
121 | #define obstack_chunk_alloc xmalloc | |
122 | #define obstack_chunk_free free | |
123 | ||
d7429b6a RK |
124 | /* List of labels that must never be deleted. */ |
125 | extern rtx forced_labels; | |
126 | ||
127 | /* Get the basic block number of an insn. | |
128 | This info should not be expected to remain available | |
129 | after the end of life_analysis. */ | |
130 | ||
131 | /* This is the limit of the allocated space in the following two arrays. */ | |
132 | ||
133 | static int max_uid_for_flow; | |
134 | ||
135 | #define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)] | |
136 | ||
137 | /* This is where the BLOCK_NUM values are really stored. | |
138 | This is set up by find_basic_blocks and used there and in life_analysis, | |
139 | and then freed. */ | |
140 | ||
141 | static short *uid_block_number; | |
142 | ||
143 | /* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */ | |
144 | ||
145 | #define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)] | |
146 | static char *uid_volatile; | |
147 | ||
148 | /* Number of basic blocks in the current function. */ | |
149 | ||
150 | int n_basic_blocks; | |
151 | ||
152 | /* Maximum register number used in this function, plus one. */ | |
153 | ||
154 | int max_regno; | |
155 | ||
156 | /* Maximum number of SCRATCH rtx's used in any basic block of this function. */ | |
157 | ||
158 | int max_scratch; | |
159 | ||
160 | /* Number of SCRATCH rtx's in the current block. */ | |
161 | ||
162 | static int num_scratch; | |
163 | ||
164 | /* Indexed by n, gives number of basic block that (REG n) is used in. | |
165 | If the value is REG_BLOCK_GLOBAL (-2), | |
166 | it means (REG n) is used in more than one basic block. | |
167 | REG_BLOCK_UNKNOWN (-1) means it hasn't been seen yet so we don't know. | |
168 | This information remains valid for the rest of the compilation | |
169 | of the current function; it is used to control register allocation. */ | |
170 | ||
171 | short *reg_basic_block; | |
172 | ||
173 | /* Indexed by n, gives number of times (REG n) is used or set, each | |
174 | weighted by its loop-depth. | |
175 | This information remains valid for the rest of the compilation | |
176 | of the current function; it is used to control register allocation. */ | |
177 | ||
178 | int *reg_n_refs; | |
179 | ||
180 | /* Indexed by N, gives number of places register N dies. | |
181 | This information remains valid for the rest of the compilation | |
182 | of the current function; it is used to control register allocation. */ | |
183 | ||
184 | short *reg_n_deaths; | |
185 | ||
186 | /* Indexed by N, gives 1 if that reg is live across any CALL_INSNs. | |
187 | This information remains valid for the rest of the compilation | |
188 | of the current function; it is used to control register allocation. */ | |
189 | ||
190 | int *reg_n_calls_crossed; | |
191 | ||
192 | /* Total number of instructions at which (REG n) is live. | |
193 | The larger this is, the less priority (REG n) gets for | |
194 | allocation in a real register. | |
195 | This information remains valid for the rest of the compilation | |
196 | of the current function; it is used to control register allocation. | |
197 | ||
198 | local-alloc.c may alter this number to change the priority. | |
199 | ||
200 | Negative values are special. | |
201 | -1 is used to mark a pseudo reg which has a constant or memory equivalent | |
202 | and is used infrequently enough that it should not get a hard register. | |
203 | -2 is used to mark a pseudo reg for a parameter, when a frame pointer | |
cfb2c0b1 | 204 | is not required. global.c makes an allocno for this but does |
d7429b6a RK |
205 | not try to assign a hard register to it. */ |
206 | ||
207 | int *reg_live_length; | |
208 | ||
209 | /* Element N is the next insn that uses (hard or pseudo) register number N | |
210 | within the current basic block; or zero, if there is no such insn. | |
211 | This is valid only during the final backward scan in propagate_block. */ | |
212 | ||
213 | static rtx *reg_next_use; | |
214 | ||
215 | /* Size of a regset for the current function, | |
216 | in (1) bytes and (2) elements. */ | |
217 | ||
218 | int regset_bytes; | |
219 | int regset_size; | |
220 | ||
221 | /* Element N is first insn in basic block N. | |
222 | This info lasts until we finish compiling the function. */ | |
223 | ||
224 | rtx *basic_block_head; | |
225 | ||
226 | /* Element N is last insn in basic block N. | |
227 | This info lasts until we finish compiling the function. */ | |
228 | ||
229 | rtx *basic_block_end; | |
230 | ||
231 | /* Element N is a regset describing the registers live | |
232 | at the start of basic block N. | |
233 | This info lasts until we finish compiling the function. */ | |
234 | ||
235 | regset *basic_block_live_at_start; | |
236 | ||
237 | /* Regset of regs live when calls to `setjmp'-like functions happen. */ | |
238 | ||
239 | regset regs_live_at_setjmp; | |
240 | ||
241 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers | |
242 | that have to go in the same hard reg. | |
243 | The first two regs in the list are a pair, and the next two | |
244 | are another pair, etc. */ | |
245 | rtx regs_may_share; | |
246 | ||
247 | /* Element N is nonzero if control can drop into basic block N | |
248 | from the preceding basic block. Freed after life_analysis. */ | |
249 | ||
250 | static char *basic_block_drops_in; | |
251 | ||
252 | /* Element N is depth within loops of the last insn in basic block number N. | |
253 | Freed after life_analysis. */ | |
254 | ||
255 | static short *basic_block_loop_depth; | |
256 | ||
257 | /* Element N nonzero if basic block N can actually be reached. | |
258 | Vector exists only during find_basic_blocks. */ | |
259 | ||
260 | static char *block_live_static; | |
261 | ||
262 | /* Depth within loops of basic block being scanned for lifetime analysis, | |
263 | plus one. This is the weight attached to references to registers. */ | |
264 | ||
265 | static int loop_depth; | |
266 | ||
267 | /* During propagate_block, this is non-zero if the value of CC0 is live. */ | |
268 | ||
269 | static int cc0_live; | |
270 | ||
271 | /* During propagate_block, this contains the last MEM stored into. It | |
272 | is used to eliminate consecutive stores to the same location. */ | |
273 | ||
274 | static rtx last_mem_set; | |
275 | ||
276 | /* Set of registers that may be eliminable. These are handled specially | |
277 | in updating regs_ever_live. */ | |
278 | ||
279 | static HARD_REG_SET elim_reg_set; | |
280 | ||
281 | /* Forward declarations */ | |
282 | static void find_basic_blocks (); | |
283 | static void life_analysis (); | |
284 | static void mark_label_ref (); | |
285 | void allocate_for_life_analysis (); /* Used also in stupid_life_analysis */ | |
286 | static void init_regset_vector (); | |
287 | static void propagate_block (); | |
288 | static void mark_set_regs (); | |
289 | static void mark_used_regs (); | |
290 | static int insn_dead_p (); | |
291 | static int libcall_dead_p (); | |
292 | static int try_pre_increment (); | |
293 | static int try_pre_increment_1 (); | |
294 | static rtx find_use_as_address (); | |
295 | void dump_flow_info (); | |
296 | \f | |
297 | /* Find basic blocks of the current function and perform data flow analysis. | |
298 | F is the first insn of the function and NREGS the number of register numbers | |
299 | in use. */ | |
300 | ||
301 | void | |
302 | flow_analysis (f, nregs, file) | |
303 | rtx f; | |
304 | int nregs; | |
305 | FILE *file; | |
306 | { | |
307 | register rtx insn; | |
308 | register int i; | |
d7e4fe8b | 309 | rtx nonlocal_label_list = nonlocal_label_rtx_list (); |
d7429b6a RK |
310 | |
311 | #ifdef ELIMINABLE_REGS | |
312 | static struct {int from, to; } eliminables[] = ELIMINABLE_REGS; | |
313 | #endif | |
314 | ||
315 | /* Record which registers will be eliminated. We use this in | |
316 | mark_used_regs. */ | |
317 | ||
318 | CLEAR_HARD_REG_SET (elim_reg_set); | |
319 | ||
320 | #ifdef ELIMINABLE_REGS | |
321 | for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++) | |
322 | SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from); | |
323 | #else | |
324 | SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM); | |
325 | #endif | |
326 | ||
327 | /* Count the basic blocks. Also find maximum insn uid value used. */ | |
328 | ||
329 | { | |
330 | register RTX_CODE prev_code = JUMP_INSN; | |
331 | register RTX_CODE code; | |
332 | ||
333 | max_uid_for_flow = 0; | |
334 | ||
335 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
336 | { | |
337 | code = GET_CODE (insn); | |
338 | if (INSN_UID (insn) > max_uid_for_flow) | |
339 | max_uid_for_flow = INSN_UID (insn); | |
340 | if (code == CODE_LABEL | |
d7e4fe8b RS |
341 | || (GET_RTX_CLASS (code) == 'i' |
342 | && (prev_code == JUMP_INSN | |
343 | || (prev_code == CALL_INSN | |
344 | && nonlocal_label_list != 0) | |
345 | || prev_code == BARRIER))) | |
d7429b6a RK |
346 | i++; |
347 | if (code != NOTE) | |
348 | prev_code = code; | |
349 | } | |
350 | } | |
351 | ||
352 | #ifdef AUTO_INC_DEC | |
353 | /* Leave space for insns we make in some cases for auto-inc. These cases | |
354 | are rare, so we don't need too much space. */ | |
355 | max_uid_for_flow += max_uid_for_flow / 10; | |
356 | #endif | |
357 | ||
358 | /* Allocate some tables that last till end of compiling this function | |
359 | and some needed only in find_basic_blocks and life_analysis. */ | |
360 | ||
361 | n_basic_blocks = i; | |
362 | basic_block_head = (rtx *) oballoc (n_basic_blocks * sizeof (rtx)); | |
363 | basic_block_end = (rtx *) oballoc (n_basic_blocks * sizeof (rtx)); | |
364 | basic_block_drops_in = (char *) alloca (n_basic_blocks); | |
365 | basic_block_loop_depth = (short *) alloca (n_basic_blocks * sizeof (short)); | |
366 | uid_block_number | |
367 | = (short *) alloca ((max_uid_for_flow + 1) * sizeof (short)); | |
368 | uid_volatile = (char *) alloca (max_uid_for_flow + 1); | |
369 | bzero (uid_volatile, max_uid_for_flow + 1); | |
370 | ||
d7e4fe8b | 371 | find_basic_blocks (f, nonlocal_label_list); |
d7429b6a RK |
372 | life_analysis (f, nregs); |
373 | if (file) | |
374 | dump_flow_info (file); | |
375 | ||
376 | basic_block_drops_in = 0; | |
377 | uid_block_number = 0; | |
378 | basic_block_loop_depth = 0; | |
379 | } | |
380 | \f | |
381 | /* Find all basic blocks of the function whose first insn is F. | |
382 | Store the correct data in the tables that describe the basic blocks, | |
383 | set up the chains of references for each CODE_LABEL, and | |
d7e4fe8b RS |
384 | delete any entire basic blocks that cannot be reached. |
385 | ||
386 | NONLOCAL_LABEL_LIST is the same local variable from flow_analysis. */ | |
d7429b6a RK |
387 | |
388 | static void | |
d7e4fe8b RS |
389 | find_basic_blocks (f, nonlocal_label_list) |
390 | rtx f, nonlocal_label_list; | |
d7429b6a RK |
391 | { |
392 | register rtx insn; | |
393 | register int i; | |
394 | register char *block_live = (char *) alloca (n_basic_blocks); | |
395 | register char *block_marked = (char *) alloca (n_basic_blocks); | |
396 | /* List of label_refs to all labels whose addresses are taken | |
397 | and used as data. */ | |
398 | rtx label_value_list = 0; | |
399 | ||
400 | block_live_static = block_live; | |
401 | bzero (block_live, n_basic_blocks); | |
402 | bzero (block_marked, n_basic_blocks); | |
403 | ||
404 | /* Initialize with just block 0 reachable and no blocks marked. */ | |
405 | if (n_basic_blocks > 0) | |
406 | block_live[0] = 1; | |
407 | ||
408 | /* Initialize the ref chain of each label to 0. */ | |
409 | /* Record where all the blocks start and end and their depth in loops. */ | |
410 | /* For each insn, record the block it is in. */ | |
411 | /* Also mark as reachable any blocks headed by labels that | |
412 | must not be deleted. */ | |
413 | ||
414 | { | |
415 | register RTX_CODE prev_code = JUMP_INSN; | |
416 | register RTX_CODE code; | |
417 | int depth = 1; | |
418 | ||
419 | for (insn = f, i = -1; insn; insn = NEXT_INSN (insn)) | |
420 | { | |
421 | code = GET_CODE (insn); | |
422 | if (code == NOTE) | |
423 | { | |
424 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
425 | depth++; | |
426 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
427 | depth--; | |
428 | } | |
d7e4fe8b | 429 | /* A basic block starts at label, or after something that can jump. */ |
d7429b6a | 430 | else if (code == CODE_LABEL |
d7e4fe8b RS |
431 | || (GET_RTX_CLASS (code) == 'i' |
432 | && (prev_code == JUMP_INSN | |
433 | || (prev_code == CALL_INSN | |
434 | && nonlocal_label_list != 0) | |
435 | || prev_code == BARRIER))) | |
d7429b6a RK |
436 | { |
437 | basic_block_head[++i] = insn; | |
438 | basic_block_end[i] = insn; | |
439 | basic_block_loop_depth[i] = depth; | |
440 | if (code == CODE_LABEL) | |
441 | { | |
442 | LABEL_REFS (insn) = insn; | |
443 | /* Any label that cannot be deleted | |
444 | is considered to start a reachable block. */ | |
445 | if (LABEL_PRESERVE_P (insn)) | |
446 | block_live[i] = 1; | |
447 | } | |
448 | } | |
449 | else if (GET_RTX_CLASS (code) == 'i') | |
450 | { | |
451 | basic_block_end[i] = insn; | |
452 | basic_block_loop_depth[i] = depth; | |
453 | } | |
454 | ||
455 | /* Make a list of all labels referred to other than by jumps. */ | |
456 | if (code == INSN || code == CALL_INSN) | |
457 | { | |
5f4f0e22 | 458 | rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX); |
d7429b6a RK |
459 | if (note != 0) |
460 | label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0), | |
461 | label_value_list); | |
462 | } | |
463 | ||
464 | BLOCK_NUM (insn) = i; | |
d7e4fe8b | 465 | |
6dc42e49 | 466 | /* Don't separate a CALL_INSN from following CLOBBER insns. This is |
d7e4fe8b RS |
467 | a kludge that will go away when each CALL_INSN records its |
468 | USE and CLOBBERs. */ | |
469 | ||
470 | if (code != NOTE | |
471 | && ! (prev_code == CALL_INSN && code == INSN | |
472 | && GET_CODE (PATTERN (insn)) == CLOBBER)) | |
d7429b6a RK |
473 | prev_code = code; |
474 | } | |
475 | if (i + 1 != n_basic_blocks) | |
476 | abort (); | |
477 | } | |
478 | ||
d7e4fe8b RS |
479 | /* Don't delete the labels that are referenced by non-jump instructions. */ |
480 | { | |
481 | register rtx x; | |
482 | for (x = label_value_list; x; x = XEXP (x, 1)) | |
483 | block_live[BLOCK_NUM (XEXP (x, 0))] = 1; | |
484 | } | |
485 | ||
d7429b6a RK |
486 | /* Record which basic blocks control can drop in to. */ |
487 | ||
488 | { | |
489 | register int i; | |
490 | for (i = 0; i < n_basic_blocks; i++) | |
491 | { | |
492 | register rtx insn = PREV_INSN (basic_block_head[i]); | |
493 | /* TEMP1 is used to avoid a bug in Sequent's compiler. */ | |
494 | register int temp1; | |
495 | while (insn && GET_CODE (insn) == NOTE) | |
496 | insn = PREV_INSN (insn); | |
497 | temp1 = insn && GET_CODE (insn) != BARRIER; | |
498 | basic_block_drops_in[i] = temp1; | |
499 | } | |
500 | } | |
501 | ||
502 | /* Now find which basic blocks can actually be reached | |
503 | and put all jump insns' LABEL_REFS onto the ref-chains | |
504 | of their target labels. */ | |
505 | ||
506 | if (n_basic_blocks > 0) | |
507 | { | |
508 | int something_marked = 1; | |
509 | ||
510 | /* Find all indirect jump insns and mark them as possibly jumping | |
511 | to all the labels whose addresses are explicitly used. | |
512 | This is because, when there are computed gotos, | |
513 | we can't tell which labels they jump to, of all the possibilities. */ | |
514 | ||
515 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
516 | if (GET_CODE (insn) == JUMP_INSN | |
517 | && GET_CODE (PATTERN (insn)) == SET | |
518 | && SET_DEST (PATTERN (insn)) == pc_rtx | |
bf1c6940 JW |
519 | && (GET_CODE (SET_SRC (PATTERN (insn))) == REG |
520 | || GET_CODE (SET_SRC (PATTERN (insn))) == MEM)) | |
d7429b6a RK |
521 | { |
522 | rtx x; | |
523 | for (x = label_value_list; x; x = XEXP (x, 1)) | |
524 | mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)), | |
525 | insn, 0); | |
526 | for (x = forced_labels; x; x = XEXP (x, 1)) | |
527 | mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)), | |
528 | insn, 0); | |
529 | } | |
530 | ||
d7e4fe8b RS |
531 | /* Find all call insns and mark them as possibly jumping |
532 | to all the nonlocal goto handler labels. */ | |
533 | ||
534 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
535 | if (GET_CODE (insn) == CALL_INSN) | |
536 | { | |
537 | rtx x; | |
538 | for (x = nonlocal_label_list; x; x = XEXP (x, 1)) | |
539 | mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)), | |
540 | insn, 0); | |
541 | /* ??? This could be made smarter: | |
542 | in some cases it's possible to tell that certain | |
543 | calls will not do a nonlocal goto. | |
544 | ||
545 | For example, if the nested functions that do the | |
546 | nonlocal gotos do not have their addresses taken, then | |
547 | only calls to those functions or to other nested | |
548 | functions that use them could possibly do nonlocal | |
549 | gotos. */ | |
550 | } | |
551 | ||
d7429b6a RK |
552 | /* Pass over all blocks, marking each block that is reachable |
553 | and has not yet been marked. | |
554 | Keep doing this until, in one pass, no blocks have been marked. | |
555 | Then blocks_live and blocks_marked are identical and correct. | |
556 | In addition, all jumps actually reachable have been marked. */ | |
557 | ||
558 | while (something_marked) | |
559 | { | |
560 | something_marked = 0; | |
561 | for (i = 0; i < n_basic_blocks; i++) | |
562 | if (block_live[i] && !block_marked[i]) | |
563 | { | |
564 | block_marked[i] = 1; | |
565 | something_marked = 1; | |
566 | if (i + 1 < n_basic_blocks && basic_block_drops_in[i + 1]) | |
567 | block_live[i + 1] = 1; | |
568 | insn = basic_block_end[i]; | |
569 | if (GET_CODE (insn) == JUMP_INSN) | |
570 | mark_label_ref (PATTERN (insn), insn, 0); | |
571 | } | |
572 | } | |
573 | ||
574 | /* Now delete the code for any basic blocks that can't be reached. | |
575 | They can occur because jump_optimize does not recognize | |
576 | unreachable loops as unreachable. */ | |
577 | ||
578 | for (i = 0; i < n_basic_blocks; i++) | |
579 | if (!block_live[i]) | |
580 | { | |
581 | insn = basic_block_head[i]; | |
582 | while (1) | |
583 | { | |
584 | if (GET_CODE (insn) == BARRIER) | |
585 | abort (); | |
586 | if (GET_CODE (insn) != NOTE) | |
587 | { | |
588 | PUT_CODE (insn, NOTE); | |
589 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
590 | NOTE_SOURCE_FILE (insn) = 0; | |
591 | } | |
592 | if (insn == basic_block_end[i]) | |
593 | { | |
594 | /* BARRIERs are between basic blocks, not part of one. | |
595 | Delete a BARRIER if the preceding jump is deleted. | |
596 | We cannot alter a BARRIER into a NOTE | |
597 | because it is too short; but we can really delete | |
598 | it because it is not part of a basic block. */ | |
599 | if (NEXT_INSN (insn) != 0 | |
600 | && GET_CODE (NEXT_INSN (insn)) == BARRIER) | |
601 | delete_insn (NEXT_INSN (insn)); | |
602 | break; | |
603 | } | |
604 | insn = NEXT_INSN (insn); | |
605 | } | |
606 | /* Each time we delete some basic blocks, | |
607 | see if there is a jump around them that is | |
608 | being turned into a no-op. If so, delete it. */ | |
609 | ||
610 | if (block_live[i - 1]) | |
611 | { | |
612 | register int j; | |
613 | for (j = i; j < n_basic_blocks; j++) | |
614 | if (block_live[j]) | |
615 | { | |
616 | rtx label; | |
617 | insn = basic_block_end[i - 1]; | |
618 | if (GET_CODE (insn) == JUMP_INSN | |
619 | /* An unconditional jump is the only possibility | |
620 | we must check for, since a conditional one | |
621 | would make these blocks live. */ | |
622 | && simplejump_p (insn) | |
623 | && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1) | |
624 | && INSN_UID (label) != 0 | |
625 | && BLOCK_NUM (label) == j) | |
626 | { | |
627 | PUT_CODE (insn, NOTE); | |
628 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
629 | NOTE_SOURCE_FILE (insn) = 0; | |
630 | if (GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
631 | abort (); | |
632 | delete_insn (NEXT_INSN (insn)); | |
633 | } | |
634 | break; | |
635 | } | |
636 | } | |
637 | } | |
638 | } | |
639 | } | |
640 | \f | |
641 | /* Check expression X for label references; | |
642 | if one is found, add INSN to the label's chain of references. | |
643 | ||
644 | CHECKDUP means check for and avoid creating duplicate references | |
645 | from the same insn. Such duplicates do no serious harm but | |
646 | can slow life analysis. CHECKDUP is set only when duplicates | |
647 | are likely. */ | |
648 | ||
649 | static void | |
650 | mark_label_ref (x, insn, checkdup) | |
651 | rtx x, insn; | |
652 | int checkdup; | |
653 | { | |
654 | register RTX_CODE code; | |
655 | register int i; | |
656 | register char *fmt; | |
657 | ||
658 | /* We can be called with NULL when scanning label_value_list. */ | |
659 | if (x == 0) | |
660 | return; | |
661 | ||
662 | code = GET_CODE (x); | |
663 | if (code == LABEL_REF) | |
664 | { | |
665 | register rtx label = XEXP (x, 0); | |
666 | register rtx y; | |
667 | if (GET_CODE (label) != CODE_LABEL) | |
668 | abort (); | |
669 | /* If the label was never emitted, this insn is junk, | |
670 | but avoid a crash trying to refer to BLOCK_NUM (label). | |
671 | This can happen as a result of a syntax error | |
672 | and a diagnostic has already been printed. */ | |
673 | if (INSN_UID (label) == 0) | |
674 | return; | |
675 | CONTAINING_INSN (x) = insn; | |
676 | /* if CHECKDUP is set, check for duplicate ref from same insn | |
677 | and don't insert. */ | |
678 | if (checkdup) | |
679 | for (y = LABEL_REFS (label); y != label; y = LABEL_NEXTREF (y)) | |
680 | if (CONTAINING_INSN (y) == insn) | |
681 | return; | |
682 | LABEL_NEXTREF (x) = LABEL_REFS (label); | |
683 | LABEL_REFS (label) = x; | |
684 | block_live_static[BLOCK_NUM (label)] = 1; | |
685 | return; | |
686 | } | |
687 | ||
688 | fmt = GET_RTX_FORMAT (code); | |
689 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
690 | { | |
691 | if (fmt[i] == 'e') | |
692 | mark_label_ref (XEXP (x, i), insn, 0); | |
693 | if (fmt[i] == 'E') | |
694 | { | |
695 | register int j; | |
696 | for (j = 0; j < XVECLEN (x, i); j++) | |
697 | mark_label_ref (XVECEXP (x, i, j), insn, 1); | |
698 | } | |
699 | } | |
700 | } | |
701 | \f | |
702 | /* Determine which registers are live at the start of each | |
703 | basic block of the function whose first insn is F. | |
704 | NREGS is the number of registers used in F. | |
705 | We allocate the vector basic_block_live_at_start | |
706 | and the regsets that it points to, and fill them with the data. | |
707 | regset_size and regset_bytes are also set here. */ | |
708 | ||
709 | static void | |
710 | life_analysis (f, nregs) | |
711 | rtx f; | |
712 | int nregs; | |
713 | { | |
714 | register regset tem; | |
715 | int first_pass; | |
716 | int changed; | |
717 | /* For each basic block, a bitmask of regs | |
718 | live on exit from the block. */ | |
719 | regset *basic_block_live_at_end; | |
720 | /* For each basic block, a bitmask of regs | |
721 | live on entry to a successor-block of this block. | |
722 | If this does not match basic_block_live_at_end, | |
723 | that must be updated, and the block must be rescanned. */ | |
724 | regset *basic_block_new_live_at_end; | |
725 | /* For each basic block, a bitmask of regs | |
726 | whose liveness at the end of the basic block | |
727 | can make a difference in which regs are live on entry to the block. | |
728 | These are the regs that are set within the basic block, | |
729 | possibly excluding those that are used after they are set. */ | |
730 | regset *basic_block_significant; | |
731 | register int i; | |
732 | rtx insn; | |
733 | ||
734 | struct obstack flow_obstack; | |
735 | ||
736 | gcc_obstack_init (&flow_obstack); | |
737 | ||
738 | max_regno = nregs; | |
739 | ||
740 | bzero (regs_ever_live, sizeof regs_ever_live); | |
741 | ||
742 | /* Allocate and zero out many data structures | |
743 | that will record the data from lifetime analysis. */ | |
744 | ||
745 | allocate_for_life_analysis (); | |
746 | ||
747 | reg_next_use = (rtx *) alloca (nregs * sizeof (rtx)); | |
748 | bzero (reg_next_use, nregs * sizeof (rtx)); | |
749 | ||
750 | /* Set up several regset-vectors used internally within this function. | |
751 | Their meanings are documented above, with their declarations. */ | |
752 | ||
753 | basic_block_live_at_end = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
754 | /* Don't use alloca since that leads to a crash rather than an error message | |
755 | if there isn't enough space. | |
756 | Don't use oballoc since we may need to allocate other things during | |
757 | this function on the temporary obstack. */ | |
758 | tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes); | |
759 | bzero (tem, n_basic_blocks * regset_bytes); | |
760 | init_regset_vector (basic_block_live_at_end, tem, n_basic_blocks, regset_bytes); | |
761 | ||
762 | basic_block_new_live_at_end = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
763 | tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes); | |
764 | bzero (tem, n_basic_blocks * regset_bytes); | |
765 | init_regset_vector (basic_block_new_live_at_end, tem, n_basic_blocks, regset_bytes); | |
766 | ||
767 | basic_block_significant = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
768 | tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes); | |
769 | bzero (tem, n_basic_blocks * regset_bytes); | |
770 | init_regset_vector (basic_block_significant, tem, n_basic_blocks, regset_bytes); | |
771 | ||
772 | /* Record which insns refer to any volatile memory | |
773 | or for any reason can't be deleted just because they are dead stores. | |
774 | Also, delete any insns that copy a register to itself. */ | |
775 | ||
776 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
777 | { | |
778 | enum rtx_code code1 = GET_CODE (insn); | |
779 | if (code1 == CALL_INSN) | |
780 | INSN_VOLATILE (insn) = 1; | |
781 | else if (code1 == INSN || code1 == JUMP_INSN) | |
782 | { | |
783 | /* Delete (in effect) any obvious no-op moves. */ | |
784 | if (GET_CODE (PATTERN (insn)) == SET | |
785 | && GET_CODE (SET_DEST (PATTERN (insn))) == REG | |
786 | && GET_CODE (SET_SRC (PATTERN (insn))) == REG | |
787 | && REGNO (SET_DEST (PATTERN (insn))) == | |
788 | REGNO (SET_SRC (PATTERN (insn))) | |
789 | /* Insns carrying these notes are useful later on. */ | |
5f4f0e22 | 790 | && ! find_reg_note (insn, REG_EQUAL, NULL_RTX)) |
d7429b6a RK |
791 | { |
792 | PUT_CODE (insn, NOTE); | |
793 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
794 | NOTE_SOURCE_FILE (insn) = 0; | |
795 | } | |
796 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
797 | { | |
798 | /* If nothing but SETs of registers to themselves, | |
799 | this insn can also be deleted. */ | |
800 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
801 | { | |
802 | rtx tem = XVECEXP (PATTERN (insn), 0, i); | |
803 | ||
804 | if (GET_CODE (tem) == USE | |
805 | || GET_CODE (tem) == CLOBBER) | |
806 | continue; | |
807 | ||
808 | if (GET_CODE (tem) != SET | |
809 | || GET_CODE (SET_DEST (tem)) != REG | |
810 | || GET_CODE (SET_SRC (tem)) != REG | |
811 | || REGNO (SET_DEST (tem)) != REGNO (SET_SRC (tem))) | |
812 | break; | |
813 | } | |
814 | ||
815 | if (i == XVECLEN (PATTERN (insn), 0) | |
816 | /* Insns carrying these notes are useful later on. */ | |
5f4f0e22 | 817 | && ! find_reg_note (insn, REG_EQUAL, NULL_RTX)) |
d7429b6a RK |
818 | { |
819 | PUT_CODE (insn, NOTE); | |
820 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
821 | NOTE_SOURCE_FILE (insn) = 0; | |
822 | } | |
823 | else | |
824 | INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn)); | |
825 | } | |
826 | else if (GET_CODE (PATTERN (insn)) != USE) | |
827 | INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn)); | |
828 | /* A SET that makes space on the stack cannot be dead. | |
829 | (Such SETs occur only for allocating variable-size data, | |
830 | so they will always have a PLUS or MINUS according to the | |
831 | direction of stack growth.) | |
832 | Even if this function never uses this stack pointer value, | |
833 | signal handlers do! */ | |
834 | else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET | |
835 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
836 | #ifdef STACK_GROWS_DOWNWARD | |
837 | && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS | |
838 | #else | |
839 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
840 | #endif | |
841 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx) | |
842 | INSN_VOLATILE (insn) = 1; | |
843 | } | |
844 | } | |
845 | ||
846 | if (n_basic_blocks > 0) | |
847 | #ifdef EXIT_IGNORE_STACK | |
848 | if (! EXIT_IGNORE_STACK | |
849 | || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer)) | |
850 | #endif | |
851 | { | |
852 | /* If exiting needs the right stack value, | |
853 | consider the stack pointer live at the end of the function. */ | |
854 | basic_block_live_at_end[n_basic_blocks - 1] | |
855 | [STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
efb07da7 | 856 | |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS); |
d7429b6a RK |
857 | basic_block_new_live_at_end[n_basic_blocks - 1] |
858 | [STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
efb07da7 | 859 | |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS); |
d7429b6a RK |
860 | } |
861 | ||
862 | /* Mark all global registers as being live at the end of the function | |
863 | since they may be referenced by our caller. */ | |
864 | ||
865 | if (n_basic_blocks > 0) | |
866 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
867 | if (global_regs[i]) | |
868 | { | |
869 | basic_block_live_at_end[n_basic_blocks - 1] | |
efb07da7 RK |
870 | [i / REGSET_ELT_BITS] |
871 | |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS); | |
d7429b6a | 872 | basic_block_new_live_at_end[n_basic_blocks - 1] |
efb07da7 RK |
873 | [i / REGSET_ELT_BITS] |
874 | |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS); | |
d7429b6a RK |
875 | } |
876 | ||
877 | /* Propagate life info through the basic blocks | |
878 | around the graph of basic blocks. | |
879 | ||
880 | This is a relaxation process: each time a new register | |
881 | is live at the end of the basic block, we must scan the block | |
882 | to determine which registers are, as a consequence, live at the beginning | |
883 | of that block. These registers must then be marked live at the ends | |
884 | of all the blocks that can transfer control to that block. | |
885 | The process continues until it reaches a fixed point. */ | |
886 | ||
887 | first_pass = 1; | |
888 | changed = 1; | |
889 | while (changed) | |
890 | { | |
891 | changed = 0; | |
892 | for (i = n_basic_blocks - 1; i >= 0; i--) | |
893 | { | |
894 | int consider = first_pass; | |
895 | int must_rescan = first_pass; | |
896 | register int j; | |
897 | ||
898 | if (!first_pass) | |
899 | { | |
900 | /* Set CONSIDER if this block needs thinking about at all | |
901 | (that is, if the regs live now at the end of it | |
902 | are not the same as were live at the end of it when | |
903 | we last thought about it). | |
904 | Set must_rescan if it needs to be thought about | |
905 | instruction by instruction (that is, if any additional | |
906 | reg that is live at the end now but was not live there before | |
907 | is one of the significant regs of this basic block). */ | |
908 | ||
909 | for (j = 0; j < regset_size; j++) | |
910 | { | |
5f4f0e22 CH |
911 | register REGSET_ELT_TYPE x |
912 | = (basic_block_new_live_at_end[i][j] | |
913 | & ~basic_block_live_at_end[i][j]); | |
d7429b6a RK |
914 | if (x) |
915 | consider = 1; | |
916 | if (x & basic_block_significant[i][j]) | |
917 | { | |
918 | must_rescan = 1; | |
919 | consider = 1; | |
920 | break; | |
921 | } | |
922 | } | |
923 | ||
924 | if (! consider) | |
925 | continue; | |
926 | } | |
927 | ||
928 | /* The live_at_start of this block may be changing, | |
929 | so another pass will be required after this one. */ | |
930 | changed = 1; | |
931 | ||
932 | if (! must_rescan) | |
933 | { | |
934 | /* No complete rescan needed; | |
935 | just record those variables newly known live at end | |
936 | as live at start as well. */ | |
937 | for (j = 0; j < regset_size; j++) | |
938 | { | |
5f4f0e22 CH |
939 | register REGSET_ELT_TYPE x |
940 | = (basic_block_new_live_at_end[i][j] | |
941 | & ~basic_block_live_at_end[i][j]); | |
d7429b6a RK |
942 | basic_block_live_at_start[i][j] |= x; |
943 | basic_block_live_at_end[i][j] |= x; | |
944 | } | |
945 | } | |
946 | else | |
947 | { | |
948 | /* Update the basic_block_live_at_start | |
949 | by propagation backwards through the block. */ | |
950 | bcopy (basic_block_new_live_at_end[i], | |
951 | basic_block_live_at_end[i], regset_bytes); | |
952 | bcopy (basic_block_live_at_end[i], | |
953 | basic_block_live_at_start[i], regset_bytes); | |
954 | propagate_block (basic_block_live_at_start[i], | |
955 | basic_block_head[i], basic_block_end[i], 0, | |
5f4f0e22 CH |
956 | first_pass ? basic_block_significant[i] |
957 | : (regset) 0, | |
d7429b6a RK |
958 | i); |
959 | } | |
960 | ||
961 | { | |
962 | register rtx jump, head; | |
963 | /* Update the basic_block_new_live_at_end's of the block | |
964 | that falls through into this one (if any). */ | |
965 | head = basic_block_head[i]; | |
966 | jump = PREV_INSN (head); | |
967 | if (basic_block_drops_in[i]) | |
968 | { | |
969 | register int from_block = BLOCK_NUM (jump); | |
970 | register int j; | |
971 | for (j = 0; j < regset_size; j++) | |
972 | basic_block_new_live_at_end[from_block][j] | |
973 | |= basic_block_live_at_start[i][j]; | |
974 | } | |
975 | /* Update the basic_block_new_live_at_end's of | |
976 | all the blocks that jump to this one. */ | |
977 | if (GET_CODE (head) == CODE_LABEL) | |
978 | for (jump = LABEL_REFS (head); | |
979 | jump != head; | |
980 | jump = LABEL_NEXTREF (jump)) | |
981 | { | |
982 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
983 | register int j; | |
984 | for (j = 0; j < regset_size; j++) | |
985 | basic_block_new_live_at_end[from_block][j] | |
986 | |= basic_block_live_at_start[i][j]; | |
987 | } | |
988 | } | |
989 | #ifdef USE_C_ALLOCA | |
990 | alloca (0); | |
991 | #endif | |
992 | } | |
993 | first_pass = 0; | |
994 | } | |
995 | ||
996 | /* The only pseudos that are live at the beginning of the function are | |
997 | those that were not set anywhere in the function. local-alloc doesn't | |
998 | know how to handle these correctly, so mark them as not local to any | |
999 | one basic block. */ | |
1000 | ||
1001 | if (n_basic_blocks > 0) | |
1002 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1003 | if (basic_block_live_at_start[0][i / REGSET_ELT_BITS] | |
5f4f0e22 | 1004 | & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS))) |
d7429b6a RK |
1005 | reg_basic_block[i] = REG_BLOCK_GLOBAL; |
1006 | ||
1007 | /* Now the life information is accurate. | |
1008 | Make one more pass over each basic block | |
1009 | to delete dead stores, create autoincrement addressing | |
1010 | and record how many times each register is used, is set, or dies. | |
1011 | ||
1012 | To save time, we operate directly in basic_block_live_at_end[i], | |
1013 | thus destroying it (in fact, converting it into a copy of | |
1014 | basic_block_live_at_start[i]). This is ok now because | |
1015 | basic_block_live_at_end[i] is no longer used past this point. */ | |
1016 | ||
1017 | max_scratch = 0; | |
1018 | ||
1019 | for (i = 0; i < n_basic_blocks; i++) | |
1020 | { | |
1021 | propagate_block (basic_block_live_at_end[i], | |
5f4f0e22 CH |
1022 | basic_block_head[i], basic_block_end[i], 1, |
1023 | (regset) 0, i); | |
d7429b6a RK |
1024 | #ifdef USE_C_ALLOCA |
1025 | alloca (0); | |
1026 | #endif | |
1027 | } | |
1028 | ||
1029 | #if 0 | |
1030 | /* Something live during a setjmp should not be put in a register | |
1031 | on certain machines which restore regs from stack frames | |
1032 | rather than from the jmpbuf. | |
1033 | But we don't need to do this for the user's variables, since | |
1034 | ANSI says only volatile variables need this. */ | |
1035 | #ifdef LONGJMP_RESTORE_FROM_STACK | |
1036 | for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) | |
5f4f0e22 CH |
1037 | if (regs_live_at_setjmp[i / REGSET_ELT_BITS] |
1038 | & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)) | |
d7429b6a RK |
1039 | && regno_reg_rtx[i] != 0 && ! REG_USERVAR_P (regno_reg_rtx[i])) |
1040 | { | |
1041 | reg_live_length[i] = -1; | |
1042 | reg_basic_block[i] = -1; | |
1043 | } | |
1044 | #endif | |
1045 | #endif | |
1046 | ||
1047 | /* We have a problem with any pseudoreg that | |
1048 | lives across the setjmp. ANSI says that if a | |
1049 | user variable does not change in value | |
1050 | between the setjmp and the longjmp, then the longjmp preserves it. | |
1051 | This includes longjmp from a place where the pseudo appears dead. | |
1052 | (In principle, the value still exists if it is in scope.) | |
1053 | If the pseudo goes in a hard reg, some other value may occupy | |
1054 | that hard reg where this pseudo is dead, thus clobbering the pseudo. | |
1055 | Conclusion: such a pseudo must not go in a hard reg. */ | |
1056 | for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) | |
5f4f0e22 CH |
1057 | if ((regs_live_at_setjmp[i / REGSET_ELT_BITS] |
1058 | & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS))) | |
d7429b6a RK |
1059 | && regno_reg_rtx[i] != 0) |
1060 | { | |
1061 | reg_live_length[i] = -1; | |
1062 | reg_basic_block[i] = -1; | |
1063 | } | |
1064 | ||
5f4f0e22 | 1065 | obstack_free (&flow_obstack, NULL_PTR); |
d7429b6a RK |
1066 | } |
1067 | \f | |
1068 | /* Subroutines of life analysis. */ | |
1069 | ||
1070 | /* Allocate the permanent data structures that represent the results | |
1071 | of life analysis. Not static since used also for stupid life analysis. */ | |
1072 | ||
1073 | void | |
1074 | allocate_for_life_analysis () | |
1075 | { | |
1076 | register int i; | |
1077 | register regset tem; | |
1078 | ||
1079 | regset_size = ((max_regno + REGSET_ELT_BITS - 1) / REGSET_ELT_BITS); | |
1080 | regset_bytes = regset_size * sizeof (*(regset)0); | |
1081 | ||
1082 | reg_n_refs = (int *) oballoc (max_regno * sizeof (int)); | |
1083 | bzero (reg_n_refs, max_regno * sizeof (int)); | |
1084 | ||
1085 | reg_n_sets = (short *) oballoc (max_regno * sizeof (short)); | |
1086 | bzero (reg_n_sets, max_regno * sizeof (short)); | |
1087 | ||
1088 | reg_n_deaths = (short *) oballoc (max_regno * sizeof (short)); | |
1089 | bzero (reg_n_deaths, max_regno * sizeof (short)); | |
1090 | ||
1091 | reg_live_length = (int *) oballoc (max_regno * sizeof (int)); | |
1092 | bzero (reg_live_length, max_regno * sizeof (int)); | |
1093 | ||
1094 | reg_n_calls_crossed = (int *) oballoc (max_regno * sizeof (int)); | |
1095 | bzero (reg_n_calls_crossed, max_regno * sizeof (int)); | |
1096 | ||
1097 | reg_basic_block = (short *) oballoc (max_regno * sizeof (short)); | |
1098 | for (i = 0; i < max_regno; i++) | |
1099 | reg_basic_block[i] = REG_BLOCK_UNKNOWN; | |
1100 | ||
1101 | basic_block_live_at_start = (regset *) oballoc (n_basic_blocks * sizeof (regset)); | |
1102 | tem = (regset) oballoc (n_basic_blocks * regset_bytes); | |
1103 | bzero (tem, n_basic_blocks * regset_bytes); | |
1104 | init_regset_vector (basic_block_live_at_start, tem, n_basic_blocks, regset_bytes); | |
1105 | ||
1106 | regs_live_at_setjmp = (regset) oballoc (regset_bytes); | |
1107 | bzero (regs_live_at_setjmp, regset_bytes); | |
1108 | } | |
1109 | ||
1110 | /* Make each element of VECTOR point at a regset, | |
1111 | taking the space for all those regsets from SPACE. | |
1112 | SPACE is of type regset, but it is really as long as NELTS regsets. | |
1113 | BYTES_PER_ELT is the number of bytes in one regset. */ | |
1114 | ||
1115 | static void | |
1116 | init_regset_vector (vector, space, nelts, bytes_per_elt) | |
1117 | regset *vector; | |
1118 | regset space; | |
1119 | int nelts; | |
1120 | int bytes_per_elt; | |
1121 | { | |
1122 | register int i; | |
1123 | register regset p = space; | |
1124 | ||
1125 | for (i = 0; i < nelts; i++) | |
1126 | { | |
1127 | vector[i] = p; | |
1128 | p += bytes_per_elt / sizeof (*p); | |
1129 | } | |
1130 | } | |
1131 | \f | |
1132 | /* Compute the registers live at the beginning of a basic block | |
1133 | from those live at the end. | |
1134 | ||
1135 | When called, OLD contains those live at the end. | |
1136 | On return, it contains those live at the beginning. | |
1137 | FIRST and LAST are the first and last insns of the basic block. | |
1138 | ||
1139 | FINAL is nonzero if we are doing the final pass which is not | |
1140 | for computing the life info (since that has already been done) | |
1141 | but for acting on it. On this pass, we delete dead stores, | |
1142 | set up the logical links and dead-variables lists of instructions, | |
1143 | and merge instructions for autoincrement and autodecrement addresses. | |
1144 | ||
1145 | SIGNIFICANT is nonzero only the first time for each basic block. | |
1146 | If it is nonzero, it points to a regset in which we store | |
1147 | a 1 for each register that is set within the block. | |
1148 | ||
1149 | BNUM is the number of the basic block. */ | |
1150 | ||
1151 | static void | |
1152 | propagate_block (old, first, last, final, significant, bnum) | |
1153 | register regset old; | |
1154 | rtx first; | |
1155 | rtx last; | |
1156 | int final; | |
1157 | regset significant; | |
1158 | int bnum; | |
1159 | { | |
1160 | register rtx insn; | |
1161 | rtx prev; | |
1162 | regset live; | |
1163 | regset dead; | |
1164 | ||
1165 | /* The following variables are used only if FINAL is nonzero. */ | |
1166 | /* This vector gets one element for each reg that has been live | |
1167 | at any point in the basic block that has been scanned so far. | |
1168 | SOMETIMES_MAX says how many elements are in use so far. | |
1169 | In each element, OFFSET is the byte-number within a regset | |
1170 | for the register described by the element, and BIT is a mask | |
1171 | for that register's bit within the byte. */ | |
5a13dfdd | 1172 | register struct sometimes { short offset; short bit; } *regs_sometimes_live; |
d7429b6a RK |
1173 | int sometimes_max = 0; |
1174 | /* This regset has 1 for each reg that we have seen live so far. | |
1175 | It and REGS_SOMETIMES_LIVE are updated together. */ | |
1176 | regset maxlive; | |
1177 | ||
1178 | /* The loop depth may change in the middle of a basic block. Since we | |
1179 | scan from end to beginning, we start with the depth at the end of the | |
1180 | current basic block, and adjust as we pass ends and starts of loops. */ | |
1181 | loop_depth = basic_block_loop_depth[bnum]; | |
1182 | ||
1183 | dead = (regset) alloca (regset_bytes); | |
1184 | live = (regset) alloca (regset_bytes); | |
1185 | ||
1186 | cc0_live = 0; | |
1187 | last_mem_set = 0; | |
1188 | ||
1189 | /* Include any notes at the end of the block in the scan. | |
1190 | This is in case the block ends with a call to setjmp. */ | |
1191 | ||
1192 | while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE) | |
1193 | { | |
1194 | /* Look for loop boundaries, we are going forward here. */ | |
1195 | last = NEXT_INSN (last); | |
1196 | if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG) | |
1197 | loop_depth++; | |
1198 | else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END) | |
1199 | loop_depth--; | |
1200 | } | |
1201 | ||
1202 | if (final) | |
1203 | { | |
5f4f0e22 CH |
1204 | register int i, offset; |
1205 | REGSET_ELT_TYPE bit; | |
d7429b6a RK |
1206 | |
1207 | num_scratch = 0; | |
1208 | maxlive = (regset) alloca (regset_bytes); | |
1209 | bcopy (old, maxlive, regset_bytes); | |
1210 | regs_sometimes_live | |
5a13dfdd | 1211 | = (struct sometimes *) alloca (max_regno * sizeof (struct sometimes)); |
d7429b6a RK |
1212 | |
1213 | /* Process the regs live at the end of the block. | |
1214 | Enter them in MAXLIVE and REGS_SOMETIMES_LIVE. | |
1215 | Also mark them as not local to any one basic block. */ | |
1216 | ||
1217 | for (offset = 0, i = 0; offset < regset_size; offset++) | |
1218 | for (bit = 1; bit; bit <<= 1, i++) | |
1219 | { | |
1220 | if (i == max_regno) | |
1221 | break; | |
1222 | if (old[offset] & bit) | |
1223 | { | |
1224 | reg_basic_block[i] = REG_BLOCK_GLOBAL; | |
1225 | regs_sometimes_live[sometimes_max].offset = offset; | |
1226 | regs_sometimes_live[sometimes_max].bit = i % REGSET_ELT_BITS; | |
1227 | sometimes_max++; | |
1228 | } | |
1229 | } | |
1230 | } | |
1231 | ||
1232 | /* Scan the block an insn at a time from end to beginning. */ | |
1233 | ||
1234 | for (insn = last; ; insn = prev) | |
1235 | { | |
1236 | prev = PREV_INSN (insn); | |
1237 | ||
1238 | /* Look for loop boundaries, remembering that we are going backwards. */ | |
1239 | if (GET_CODE (insn) == NOTE | |
1240 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
1241 | loop_depth++; | |
1242 | else if (GET_CODE (insn) == NOTE | |
1243 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
1244 | loop_depth--; | |
1245 | ||
1246 | /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. | |
1247 | Abort now rather than setting register status incorrectly. */ | |
1248 | if (loop_depth == 0) | |
1249 | abort (); | |
1250 | ||
1251 | /* If this is a call to `setjmp' et al, | |
1252 | warn if any non-volatile datum is live. */ | |
1253 | ||
1254 | if (final && GET_CODE (insn) == NOTE | |
1255 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP) | |
1256 | { | |
1257 | int i; | |
1258 | for (i = 0; i < regset_size; i++) | |
1259 | regs_live_at_setjmp[i] |= old[i]; | |
1260 | } | |
1261 | ||
1262 | /* Update the life-status of regs for this insn. | |
1263 | First DEAD gets which regs are set in this insn | |
1264 | then LIVE gets which regs are used in this insn. | |
1265 | Then the regs live before the insn | |
1266 | are those live after, with DEAD regs turned off, | |
1267 | and then LIVE regs turned on. */ | |
1268 | ||
1269 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1270 | { | |
1271 | register int i; | |
5f4f0e22 | 1272 | rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX); |
d7429b6a RK |
1273 | int insn_is_dead |
1274 | = (insn_dead_p (PATTERN (insn), old, 0) | |
1275 | /* Don't delete something that refers to volatile storage! */ | |
1276 | && ! INSN_VOLATILE (insn)); | |
1277 | int libcall_is_dead | |
1278 | = (insn_is_dead && note != 0 | |
1279 | && libcall_dead_p (PATTERN (insn), old, note, insn)); | |
1280 | ||
1281 | /* If an instruction consists of just dead store(s) on final pass, | |
1282 | "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED. | |
1283 | We could really delete it with delete_insn, but that | |
1284 | can cause trouble for first or last insn in a basic block. */ | |
1285 | if (final && insn_is_dead) | |
1286 | { | |
1287 | PUT_CODE (insn, NOTE); | |
1288 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1289 | NOTE_SOURCE_FILE (insn) = 0; | |
1290 | ||
e5df1ea3 RK |
1291 | /* CC0 is now known to be dead. Either this insn used it, |
1292 | in which case it doesn't anymore, or clobbered it, | |
1293 | so the next insn can't use it. */ | |
1294 | cc0_live = 0; | |
1295 | ||
d7429b6a RK |
1296 | /* If this insn is copying the return value from a library call, |
1297 | delete the entire library call. */ | |
1298 | if (libcall_is_dead) | |
1299 | { | |
1300 | rtx first = XEXP (note, 0); | |
1301 | rtx p = insn; | |
1302 | while (INSN_DELETED_P (first)) | |
1303 | first = NEXT_INSN (first); | |
1304 | while (p != first) | |
1305 | { | |
1306 | p = PREV_INSN (p); | |
1307 | PUT_CODE (p, NOTE); | |
1308 | NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED; | |
1309 | NOTE_SOURCE_FILE (p) = 0; | |
1310 | } | |
1311 | } | |
1312 | goto flushed; | |
1313 | } | |
1314 | ||
1315 | for (i = 0; i < regset_size; i++) | |
1316 | { | |
1317 | dead[i] = 0; /* Faster than bzero here */ | |
1318 | live[i] = 0; /* since regset_size is usually small */ | |
1319 | } | |
1320 | ||
1321 | /* See if this is an increment or decrement that can be | |
1322 | merged into a following memory address. */ | |
1323 | #ifdef AUTO_INC_DEC | |
1324 | { | |
1325 | register rtx x = PATTERN (insn); | |
1326 | /* Does this instruction increment or decrement a register? */ | |
1327 | if (final && GET_CODE (x) == SET | |
1328 | && GET_CODE (SET_DEST (x)) == REG | |
1329 | && (GET_CODE (SET_SRC (x)) == PLUS | |
1330 | || GET_CODE (SET_SRC (x)) == MINUS) | |
1331 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) | |
1332 | && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT | |
1333 | /* Ok, look for a following memory ref we can combine with. | |
1334 | If one is found, change the memory ref to a PRE_INC | |
1335 | or PRE_DEC, cancel this insn, and return 1. | |
1336 | Return 0 if nothing has been done. */ | |
1337 | && try_pre_increment_1 (insn)) | |
1338 | goto flushed; | |
1339 | } | |
1340 | #endif /* AUTO_INC_DEC */ | |
1341 | ||
1342 | /* If this is not the final pass, and this insn is copying the | |
1343 | value of a library call and it's dead, don't scan the | |
1344 | insns that perform the library call, so that the call's | |
1345 | arguments are not marked live. */ | |
1346 | if (libcall_is_dead) | |
1347 | { | |
1348 | /* Mark the dest reg as `significant'. */ | |
5f4f0e22 | 1349 | mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant); |
d7429b6a RK |
1350 | |
1351 | insn = XEXP (note, 0); | |
1352 | prev = PREV_INSN (insn); | |
1353 | } | |
1354 | else if (GET_CODE (PATTERN (insn)) == SET | |
1355 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1356 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1357 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx | |
1358 | && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT) | |
1359 | /* We have an insn to pop a constant amount off the stack. | |
1360 | (Such insns use PLUS regardless of the direction of the stack, | |
1361 | and any insn to adjust the stack by a constant is always a pop.) | |
1362 | These insns, if not dead stores, have no effect on life. */ | |
1363 | ; | |
1364 | else | |
1365 | { | |
1366 | /* LIVE gets the regs used in INSN; | |
1367 | DEAD gets those set by it. Dead insns don't make anything | |
1368 | live. */ | |
1369 | ||
5f4f0e22 CH |
1370 | mark_set_regs (old, dead, PATTERN (insn), |
1371 | final ? insn : NULL_RTX, significant); | |
d7429b6a RK |
1372 | |
1373 | /* If an insn doesn't use CC0, it becomes dead since we | |
1374 | assume that every insn clobbers it. So show it dead here; | |
1375 | mark_used_regs will set it live if it is referenced. */ | |
1376 | cc0_live = 0; | |
1377 | ||
1378 | if (! insn_is_dead) | |
1379 | mark_used_regs (old, live, PATTERN (insn), final, insn); | |
1380 | ||
1381 | /* Sometimes we may have inserted something before INSN (such as | |
1382 | a move) when we make an auto-inc. So ensure we will scan | |
1383 | those insns. */ | |
1384 | #ifdef AUTO_INC_DEC | |
1385 | prev = PREV_INSN (insn); | |
1386 | #endif | |
1387 | ||
1388 | if (! insn_is_dead && GET_CODE (insn) == CALL_INSN) | |
1389 | { | |
1390 | register int i; | |
1391 | ||
1392 | /* Each call clobbers all call-clobbered regs that are not | |
1393 | global. Note that the function-value reg is a | |
1394 | call-clobbered reg, and mark_set_regs has already had | |
1395 | a chance to handle it. */ | |
1396 | ||
1397 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1398 | if (call_used_regs[i] && ! global_regs[i]) | |
1399 | dead[i / REGSET_ELT_BITS] | |
5f4f0e22 | 1400 | |= ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)); |
d7429b6a RK |
1401 | |
1402 | /* The stack ptr is used (honorarily) by a CALL insn. */ | |
1403 | live[STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
5f4f0e22 CH |
1404 | |= ((REGSET_ELT_TYPE) 1 |
1405 | << (STACK_POINTER_REGNUM % REGSET_ELT_BITS)); | |
d7429b6a RK |
1406 | |
1407 | /* Calls may also reference any of the global registers, | |
1408 | so they are made live. */ | |
1409 | ||
1410 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1411 | if (global_regs[i]) | |
1412 | live[i / REGSET_ELT_BITS] | |
5f4f0e22 | 1413 | |= ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)); |
d7429b6a RK |
1414 | |
1415 | /* Calls also clobber memory. */ | |
1416 | last_mem_set = 0; | |
1417 | } | |
1418 | ||
1419 | /* Update OLD for the registers used or set. */ | |
1420 | for (i = 0; i < regset_size; i++) | |
1421 | { | |
1422 | old[i] &= ~dead[i]; | |
1423 | old[i] |= live[i]; | |
1424 | } | |
1425 | ||
1426 | if (GET_CODE (insn) == CALL_INSN && final) | |
1427 | { | |
1428 | /* Any regs live at the time of a call instruction | |
1429 | must not go in a register clobbered by calls. | |
1430 | Find all regs now live and record this for them. */ | |
1431 | ||
5a13dfdd | 1432 | register struct sometimes *p = regs_sometimes_live; |
d7429b6a RK |
1433 | |
1434 | for (i = 0; i < sometimes_max; i++, p++) | |
efb07da7 | 1435 | if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit)) |
d7429b6a RK |
1436 | reg_n_calls_crossed[p->offset * REGSET_ELT_BITS + p->bit]+= 1; |
1437 | } | |
1438 | } | |
1439 | ||
1440 | /* On final pass, add any additional sometimes-live regs | |
1441 | into MAXLIVE and REGS_SOMETIMES_LIVE. | |
1442 | Also update counts of how many insns each reg is live at. */ | |
1443 | ||
1444 | if (final) | |
1445 | { | |
1446 | for (i = 0; i < regset_size; i++) | |
1447 | { | |
5f4f0e22 | 1448 | register REGSET_ELT_TYPE diff = live[i] & ~maxlive[i]; |
d7429b6a RK |
1449 | |
1450 | if (diff) | |
1451 | { | |
1452 | register int regno; | |
1453 | maxlive[i] |= diff; | |
1454 | for (regno = 0; diff && regno < REGSET_ELT_BITS; regno++) | |
5f4f0e22 | 1455 | if (diff & ((REGSET_ELT_TYPE) 1 << regno)) |
d7429b6a RK |
1456 | { |
1457 | regs_sometimes_live[sometimes_max].offset = i; | |
1458 | regs_sometimes_live[sometimes_max].bit = regno; | |
5f4f0e22 | 1459 | diff &= ~ ((REGSET_ELT_TYPE) 1 << regno); |
d7429b6a RK |
1460 | sometimes_max++; |
1461 | } | |
1462 | } | |
1463 | } | |
1464 | ||
1465 | { | |
5a13dfdd | 1466 | register struct sometimes *p = regs_sometimes_live; |
d7429b6a RK |
1467 | for (i = 0; i < sometimes_max; i++, p++) |
1468 | { | |
5f4f0e22 | 1469 | if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit)) |
d7429b6a RK |
1470 | reg_live_length[p->offset * REGSET_ELT_BITS + p->bit]++; |
1471 | } | |
1472 | } | |
1473 | } | |
1474 | } | |
1475 | flushed: ; | |
1476 | if (insn == first) | |
1477 | break; | |
1478 | } | |
1479 | ||
1480 | if (num_scratch > max_scratch) | |
1481 | max_scratch = num_scratch; | |
1482 | } | |
1483 | \f | |
1484 | /* Return 1 if X (the body of an insn, or part of it) is just dead stores | |
1485 | (SET expressions whose destinations are registers dead after the insn). | |
1486 | NEEDED is the regset that says which regs are alive after the insn. | |
1487 | ||
1488 | Unless CALL_OK is non-zero, an insn is needed if it contains a CALL. */ | |
1489 | ||
1490 | static int | |
1491 | insn_dead_p (x, needed, call_ok) | |
1492 | rtx x; | |
1493 | regset needed; | |
1494 | int call_ok; | |
1495 | { | |
1496 | register RTX_CODE code = GET_CODE (x); | |
1497 | /* If setting something that's a reg or part of one, | |
1498 | see if that register's altered value will be live. */ | |
1499 | ||
1500 | if (code == SET) | |
1501 | { | |
1502 | register rtx r = SET_DEST (x); | |
1503 | /* A SET that is a subroutine call cannot be dead. */ | |
1504 | if (! call_ok && GET_CODE (SET_SRC (x)) == CALL) | |
1505 | return 0; | |
1506 | ||
1507 | #ifdef HAVE_cc0 | |
1508 | if (GET_CODE (r) == CC0) | |
1509 | return ! cc0_live; | |
1510 | #endif | |
1511 | ||
1512 | if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r) | |
1513 | && rtx_equal_p (r, last_mem_set)) | |
1514 | return 1; | |
1515 | ||
1516 | while (GET_CODE (r) == SUBREG | |
1517 | || GET_CODE (r) == STRICT_LOW_PART | |
1518 | || GET_CODE (r) == ZERO_EXTRACT | |
1519 | || GET_CODE (r) == SIGN_EXTRACT) | |
1520 | r = SUBREG_REG (r); | |
1521 | ||
1522 | if (GET_CODE (r) == REG) | |
1523 | { | |
1524 | register int regno = REGNO (r); | |
1525 | register int offset = regno / REGSET_ELT_BITS; | |
5f4f0e22 CH |
1526 | register REGSET_ELT_TYPE bit |
1527 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
d7429b6a | 1528 | |
d8c8b8e3 | 1529 | /* Don't delete insns to set global regs. */ |
d7429b6a RK |
1530 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) |
1531 | /* Make sure insns to set frame pointer aren't deleted. */ | |
1532 | || regno == FRAME_POINTER_REGNUM | |
d7e4fe8b RS |
1533 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
1534 | /* Make sure insns to set arg pointer are never deleted | |
1535 | (if the arg pointer isn't fixed, there will be a USE for | |
1536 | it, so we can treat it normally). */ | |
1537 | || (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
1538 | #endif | |
d7429b6a RK |
1539 | || (needed[offset] & bit) != 0) |
1540 | return 0; | |
1541 | ||
1542 | /* If this is a hard register, verify that subsequent words are | |
1543 | not needed. */ | |
1544 | if (regno < FIRST_PSEUDO_REGISTER) | |
1545 | { | |
1546 | int n = HARD_REGNO_NREGS (regno, GET_MODE (r)); | |
1547 | ||
1548 | while (--n > 0) | |
1549 | if ((needed[(regno + n) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
1550 | & ((REGSET_ELT_TYPE) 1 |
1551 | << ((regno + n) % REGSET_ELT_BITS))) != 0) | |
d7429b6a RK |
1552 | return 0; |
1553 | } | |
1554 | ||
1555 | return 1; | |
1556 | } | |
1557 | } | |
1558 | /* If performing several activities, | |
1559 | insn is dead if each activity is individually dead. | |
1560 | Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE | |
1561 | that's inside a PARALLEL doesn't make the insn worth keeping. */ | |
1562 | else if (code == PARALLEL) | |
1563 | { | |
1564 | register int i = XVECLEN (x, 0); | |
1565 | for (i--; i >= 0; i--) | |
1566 | { | |
1567 | rtx elt = XVECEXP (x, 0, i); | |
1568 | if (!insn_dead_p (elt, needed, call_ok) | |
1569 | && GET_CODE (elt) != CLOBBER | |
1570 | && GET_CODE (elt) != USE) | |
1571 | return 0; | |
1572 | } | |
1573 | return 1; | |
1574 | } | |
1575 | /* We do not check CLOBBER or USE here. | |
1576 | An insn consisting of just a CLOBBER or just a USE | |
1577 | should not be deleted. */ | |
1578 | return 0; | |
1579 | } | |
1580 | ||
1581 | /* If X is the pattern of the last insn in a libcall, and assuming X is dead, | |
1582 | return 1 if the entire library call is dead. | |
1583 | This is true if X copies a register (hard or pseudo) | |
1584 | and if the hard return reg of the call insn is dead. | |
1585 | (The caller should have tested the destination of X already for death.) | |
1586 | ||
1587 | If this insn doesn't just copy a register, then we don't | |
1588 | have an ordinary libcall. In that case, cse could not have | |
1589 | managed to substitute the source for the dest later on, | |
1590 | so we can assume the libcall is dead. | |
1591 | ||
1592 | NEEDED is the bit vector of pseudoregs live before this insn. | |
1593 | NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */ | |
1594 | ||
1595 | static int | |
1596 | libcall_dead_p (x, needed, note, insn) | |
1597 | rtx x; | |
1598 | regset needed; | |
1599 | rtx note; | |
1600 | rtx insn; | |
1601 | { | |
1602 | register RTX_CODE code = GET_CODE (x); | |
1603 | ||
1604 | if (code == SET) | |
1605 | { | |
1606 | register rtx r = SET_SRC (x); | |
1607 | if (GET_CODE (r) == REG) | |
1608 | { | |
1609 | rtx call = XEXP (note, 0); | |
1610 | register int i; | |
1611 | ||
1612 | /* Find the call insn. */ | |
1613 | while (call != insn && GET_CODE (call) != CALL_INSN) | |
1614 | call = NEXT_INSN (call); | |
1615 | ||
1616 | /* If there is none, do nothing special, | |
1617 | since ordinary death handling can understand these insns. */ | |
1618 | if (call == insn) | |
1619 | return 0; | |
1620 | ||
1621 | /* See if the hard reg holding the value is dead. | |
1622 | If this is a PARALLEL, find the call within it. */ | |
1623 | call = PATTERN (call); | |
1624 | if (GET_CODE (call) == PARALLEL) | |
1625 | { | |
1626 | for (i = XVECLEN (call, 0) - 1; i >= 0; i--) | |
1627 | if (GET_CODE (XVECEXP (call, 0, i)) == SET | |
1628 | && GET_CODE (SET_SRC (XVECEXP (call, 0, i))) == CALL) | |
1629 | break; | |
1630 | ||
1631 | if (i < 0) | |
1632 | abort (); | |
1633 | ||
1634 | call = XVECEXP (call, 0, i); | |
1635 | } | |
1636 | ||
1637 | return insn_dead_p (call, needed, 1); | |
1638 | } | |
1639 | } | |
1640 | return 1; | |
1641 | } | |
1642 | ||
1643 | /* Return 1 if register REGNO was used before it was set. | |
944e5f77 RS |
1644 | In other words, if it is live at function entry. |
1645 | Don't count global regster variables, though. */ | |
d7429b6a RK |
1646 | |
1647 | int | |
1648 | regno_uninitialized (regno) | |
1649 | int regno; | |
1650 | { | |
944e5f77 | 1651 | if (n_basic_blocks == 0 || global_regs[regno]) |
d7429b6a RK |
1652 | return 0; |
1653 | ||
1654 | return (basic_block_live_at_start[0][regno / REGSET_ELT_BITS] | |
5f4f0e22 | 1655 | & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))); |
d7429b6a RK |
1656 | } |
1657 | ||
1658 | /* 1 if register REGNO was alive at a place where `setjmp' was called | |
1659 | and was set more than once or is an argument. | |
1660 | Such regs may be clobbered by `longjmp'. */ | |
1661 | ||
1662 | int | |
1663 | regno_clobbered_at_setjmp (regno) | |
1664 | int regno; | |
1665 | { | |
1666 | if (n_basic_blocks == 0) | |
1667 | return 0; | |
1668 | ||
1669 | return ((reg_n_sets[regno] > 1 | |
1670 | || (basic_block_live_at_start[0][regno / REGSET_ELT_BITS] | |
5f4f0e22 | 1671 | & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS)))) |
d7429b6a | 1672 | && (regs_live_at_setjmp[regno / REGSET_ELT_BITS] |
5f4f0e22 | 1673 | & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS)))); |
d7429b6a RK |
1674 | } |
1675 | \f | |
1676 | /* Process the registers that are set within X. | |
1677 | Their bits are set to 1 in the regset DEAD, | |
1678 | because they are dead prior to this insn. | |
1679 | ||
1680 | If INSN is nonzero, it is the insn being processed | |
1681 | and the fact that it is nonzero implies this is the FINAL pass | |
1682 | in propagate_block. In this case, various info about register | |
1683 | usage is stored, LOG_LINKS fields of insns are set up. */ | |
1684 | ||
1685 | static void mark_set_1 (); | |
1686 | ||
1687 | static void | |
1688 | mark_set_regs (needed, dead, x, insn, significant) | |
1689 | regset needed; | |
1690 | regset dead; | |
1691 | rtx x; | |
1692 | rtx insn; | |
1693 | regset significant; | |
1694 | { | |
1695 | register RTX_CODE code = GET_CODE (x); | |
1696 | ||
1697 | if (code == SET || code == CLOBBER) | |
1698 | mark_set_1 (needed, dead, x, insn, significant); | |
1699 | else if (code == PARALLEL) | |
1700 | { | |
1701 | register int i; | |
1702 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1703 | { | |
1704 | code = GET_CODE (XVECEXP (x, 0, i)); | |
1705 | if (code == SET || code == CLOBBER) | |
1706 | mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant); | |
1707 | } | |
1708 | } | |
1709 | } | |
1710 | ||
1711 | /* Process a single SET rtx, X. */ | |
1712 | ||
1713 | static void | |
1714 | mark_set_1 (needed, dead, x, insn, significant) | |
1715 | regset needed; | |
1716 | regset dead; | |
1717 | rtx x; | |
1718 | rtx insn; | |
1719 | regset significant; | |
1720 | { | |
1721 | register int regno; | |
1722 | register rtx reg = SET_DEST (x); | |
1723 | ||
1724 | /* Modifying just one hardware register of a multi-reg value | |
1725 | or just a byte field of a register | |
1726 | does not mean the value from before this insn is now dead. | |
1727 | But it does mean liveness of that register at the end of the block | |
1728 | is significant. | |
1729 | ||
1730 | Within mark_set_1, however, we treat it as if the register is | |
1731 | indeed modified. mark_used_regs will, however, also treat this | |
1732 | register as being used. Thus, we treat these insns as setting a | |
1733 | new value for the register as a function of its old value. This | |
1734 | cases LOG_LINKS to be made appropriately and this will help combine. */ | |
1735 | ||
1736 | while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT | |
1737 | || GET_CODE (reg) == SIGN_EXTRACT | |
1738 | || GET_CODE (reg) == STRICT_LOW_PART) | |
1739 | reg = XEXP (reg, 0); | |
1740 | ||
1741 | /* If we are writing into memory or into a register mentioned in the | |
1742 | address of the last thing stored into memory, show we don't know | |
1743 | what the last store was. If we are writing memory, save the address | |
1744 | unless it is volatile. */ | |
1745 | if (GET_CODE (reg) == MEM | |
1746 | || (GET_CODE (reg) == REG | |
1747 | && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set))) | |
1748 | last_mem_set = 0; | |
1749 | ||
1750 | if (GET_CODE (reg) == MEM && ! side_effects_p (reg) | |
1751 | /* There are no REG_INC notes for SP, so we can't assume we'll see | |
1752 | everything that invalidates it. To be safe, don't eliminate any | |
1753 | stores though SP; none of them should be redundant anyway. */ | |
1754 | && ! reg_mentioned_p (stack_pointer_rtx, reg)) | |
1755 | last_mem_set = reg; | |
1756 | ||
1757 | if (GET_CODE (reg) == REG | |
1758 | && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM) | |
d7e4fe8b RS |
1759 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
1760 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
1761 | #endif | |
d7429b6a RK |
1762 | && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])) |
1763 | /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */ | |
1764 | { | |
1765 | register int offset = regno / REGSET_ELT_BITS; | |
5f4f0e22 CH |
1766 | register REGSET_ELT_TYPE bit |
1767 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
1768 | REGSET_ELT_TYPE all_needed = (needed[offset] & bit); | |
1769 | REGSET_ELT_TYPE some_needed = (needed[offset] & bit); | |
d7429b6a RK |
1770 | |
1771 | /* Mark it as a significant register for this basic block. */ | |
1772 | if (significant) | |
1773 | significant[offset] |= bit; | |
1774 | ||
1775 | /* Mark it as as dead before this insn. */ | |
1776 | dead[offset] |= bit; | |
1777 | ||
1778 | /* A hard reg in a wide mode may really be multiple registers. | |
1779 | If so, mark all of them just like the first. */ | |
1780 | if (regno < FIRST_PSEUDO_REGISTER) | |
1781 | { | |
1782 | int n; | |
1783 | ||
1784 | /* Nothing below is needed for the stack pointer; get out asap. | |
1785 | Eg, log links aren't needed, since combine won't use them. */ | |
1786 | if (regno == STACK_POINTER_REGNUM) | |
1787 | return; | |
1788 | ||
1789 | n = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1790 | while (--n > 0) | |
1791 | { | |
1792 | if (significant) | |
1793 | significant[(regno + n) / REGSET_ELT_BITS] | |
5f4f0e22 | 1794 | |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS); |
d7429b6a | 1795 | dead[(regno + n) / REGSET_ELT_BITS] |
5f4f0e22 CH |
1796 | |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS); |
1797 | some_needed | |
1798 | |= (needed[(regno + n) / REGSET_ELT_BITS] | |
1799 | & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS)); | |
1800 | all_needed | |
1801 | &= (needed[(regno + n) / REGSET_ELT_BITS] | |
1802 | & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS)); | |
d7429b6a RK |
1803 | } |
1804 | } | |
1805 | /* Additional data to record if this is the final pass. */ | |
1806 | if (insn) | |
1807 | { | |
1808 | register rtx y = reg_next_use[regno]; | |
1809 | register int blocknum = BLOCK_NUM (insn); | |
1810 | ||
1811 | /* If this is a hard reg, record this function uses the reg. */ | |
1812 | ||
1813 | if (regno < FIRST_PSEUDO_REGISTER) | |
1814 | { | |
1815 | register int i; | |
1816 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1817 | ||
1818 | for (i = regno; i < endregno; i++) | |
1819 | { | |
1820 | regs_ever_live[i] = 1; | |
1821 | reg_n_sets[i]++; | |
1822 | } | |
1823 | } | |
1824 | else | |
1825 | { | |
1826 | /* Keep track of which basic blocks each reg appears in. */ | |
1827 | ||
1828 | if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN) | |
1829 | reg_basic_block[regno] = blocknum; | |
1830 | else if (reg_basic_block[regno] != blocknum) | |
1831 | reg_basic_block[regno] = REG_BLOCK_GLOBAL; | |
1832 | ||
1833 | /* Count (weighted) references, stores, etc. This counts a | |
1834 | register twice if it is modified, but that is correct. */ | |
1835 | reg_n_sets[regno]++; | |
1836 | ||
1837 | reg_n_refs[regno] += loop_depth; | |
1838 | ||
1839 | /* The insns where a reg is live are normally counted | |
1840 | elsewhere, but we want the count to include the insn | |
1841 | where the reg is set, and the normal counting mechanism | |
1842 | would not count it. */ | |
1843 | reg_live_length[regno]++; | |
1844 | } | |
1845 | ||
1846 | /* The next use is no longer "next", since a store intervenes. */ | |
1847 | reg_next_use[regno] = 0; | |
1848 | ||
1849 | if (all_needed) | |
1850 | { | |
1851 | /* Make a logical link from the next following insn | |
1852 | that uses this register, back to this insn. | |
1853 | The following insns have already been processed. | |
1854 | ||
1855 | We don't build a LOG_LINK for hard registers containing | |
1856 | in ASM_OPERANDs. If these registers get replaced, | |
1857 | we might wind up changing the semantics of the insn, | |
1858 | even if reload can make what appear to be valid assignments | |
1859 | later. */ | |
1860 | if (y && (BLOCK_NUM (y) == blocknum) | |
1861 | && (regno >= FIRST_PSEUDO_REGISTER | |
1862 | || asm_noperands (PATTERN (y)) < 0)) | |
1863 | LOG_LINKS (y) | |
1864 | = gen_rtx (INSN_LIST, VOIDmode, insn, LOG_LINKS (y)); | |
1865 | } | |
1866 | else if (! some_needed) | |
1867 | { | |
1868 | /* Note that dead stores have already been deleted when possible | |
1869 | If we get here, we have found a dead store that cannot | |
1870 | be eliminated (because the same insn does something useful). | |
1871 | Indicate this by marking the reg being set as dying here. */ | |
1872 | REG_NOTES (insn) | |
1873 | = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn)); | |
1874 | reg_n_deaths[REGNO (reg)]++; | |
1875 | } | |
1876 | else | |
1877 | { | |
1878 | /* This is a case where we have a multi-word hard register | |
1879 | and some, but not all, of the words of the register are | |
1880 | needed in subsequent insns. Write REG_UNUSED notes | |
1881 | for those parts that were not needed. This case should | |
1882 | be rare. */ | |
1883 | ||
1884 | int i; | |
1885 | ||
1886 | for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1; | |
1887 | i >= 0; i--) | |
1888 | if ((needed[(regno + i) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
1889 | & ((REGSET_ELT_TYPE) 1 |
1890 | << ((regno + i) % REGSET_ELT_BITS))) == 0) | |
d7429b6a RK |
1891 | REG_NOTES (insn) |
1892 | = gen_rtx (EXPR_LIST, REG_UNUSED, | |
1893 | gen_rtx (REG, word_mode, regno + i), | |
1894 | REG_NOTES (insn)); | |
1895 | } | |
1896 | } | |
1897 | } | |
1898 | ||
1899 | /* If this is the last pass and this is a SCRATCH, show it will be dying | |
1900 | here and count it. */ | |
1901 | else if (GET_CODE (reg) == SCRATCH && insn != 0) | |
1902 | { | |
1903 | REG_NOTES (insn) | |
1904 | = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn)); | |
1905 | num_scratch++; | |
1906 | } | |
1907 | } | |
1908 | \f | |
1909 | #ifdef AUTO_INC_DEC | |
1910 | ||
1911 | /* X is a MEM found in INSN. See if we can convert it into an auto-increment | |
1912 | reference. */ | |
1913 | ||
1914 | static void | |
1915 | find_auto_inc (needed, x, insn) | |
1916 | regset needed; | |
1917 | rtx x; | |
1918 | rtx insn; | |
1919 | { | |
1920 | rtx addr = XEXP (x, 0); | |
1921 | int offset = 0; | |
1922 | ||
1923 | /* Here we detect use of an index register which might be good for | |
1924 | postincrement, postdecrement, preincrement, or predecrement. */ | |
1925 | ||
1926 | if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
1927 | offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); | |
1928 | ||
1929 | if (GET_CODE (addr) == REG) | |
1930 | { | |
1931 | register rtx y; | |
1932 | register int size = GET_MODE_SIZE (GET_MODE (x)); | |
1933 | rtx use; | |
1934 | rtx incr; | |
1935 | int regno = REGNO (addr); | |
1936 | ||
1937 | /* Is the next use an increment that might make auto-increment? */ | |
1938 | incr = reg_next_use[regno]; | |
1939 | if (incr && GET_CODE (PATTERN (incr)) == SET | |
1940 | && BLOCK_NUM (incr) == BLOCK_NUM (insn) | |
1941 | /* Can't add side effects to jumps; if reg is spilled and | |
1942 | reloaded, there's no way to store back the altered value. */ | |
1943 | && GET_CODE (insn) != JUMP_INSN | |
1944 | && (y = SET_SRC (PATTERN (incr)), GET_CODE (y) == PLUS) | |
1945 | && XEXP (y, 0) == addr | |
1946 | && GET_CODE (XEXP (y, 1)) == CONST_INT | |
1947 | && (0 | |
1948 | #ifdef HAVE_POST_INCREMENT | |
1949 | || (INTVAL (XEXP (y, 1)) == size && offset == 0) | |
1950 | #endif | |
1951 | #ifdef HAVE_POST_DECREMENT | |
1952 | || (INTVAL (XEXP (y, 1)) == - size && offset == 0) | |
1953 | #endif | |
1954 | #ifdef HAVE_PRE_INCREMENT | |
1955 | || (INTVAL (XEXP (y, 1)) == size && offset == size) | |
1956 | #endif | |
1957 | #ifdef HAVE_PRE_DECREMENT | |
1958 | || (INTVAL (XEXP (y, 1)) == - size && offset == - size) | |
1959 | #endif | |
1960 | ) | |
1961 | /* Make sure this reg appears only once in this insn. */ | |
1962 | && (use = find_use_as_address (PATTERN (insn), addr, offset), | |
1963 | use != 0 && use != (rtx) 1)) | |
1964 | { | |
1965 | int win = 0; | |
1966 | rtx q = SET_DEST (PATTERN (incr)); | |
1967 | ||
1968 | if (dead_or_set_p (incr, addr)) | |
1969 | win = 1; | |
1970 | else if (GET_CODE (q) == REG && ! reg_used_between_p (q, insn, incr)) | |
1971 | { | |
1972 | /* We have *p followed by q = p+size. | |
1973 | Both p and q must be live afterward, | |
1974 | and q must be dead before. | |
1975 | Change it to q = p, ...*q..., q = q+size. | |
1976 | Then fall into the usual case. */ | |
1977 | rtx insns, temp; | |
1978 | ||
1979 | start_sequence (); | |
1980 | emit_move_insn (q, addr); | |
1981 | insns = get_insns (); | |
1982 | end_sequence (); | |
1983 | ||
1984 | /* If anything in INSNS have UID's that don't fit within the | |
1985 | extra space we allocate earlier, we can't make this auto-inc. | |
1986 | This should never happen. */ | |
1987 | for (temp = insns; temp; temp = NEXT_INSN (temp)) | |
1988 | { | |
1989 | if (INSN_UID (temp) > max_uid_for_flow) | |
1990 | return; | |
1991 | BLOCK_NUM (temp) = BLOCK_NUM (insn); | |
1992 | } | |
1993 | ||
1994 | emit_insns_before (insns, insn); | |
e8b641a1 RK |
1995 | |
1996 | if (basic_block_head[BLOCK_NUM (insn)] == insn) | |
1997 | basic_block_head[BLOCK_NUM (insn)] = insns; | |
1998 | ||
d7429b6a RK |
1999 | XEXP (x, 0) = q; |
2000 | XEXP (y, 0) = q; | |
2001 | ||
2002 | /* INCR will become a NOTE and INSN won't contain a | |
2003 | use of ADDR. If a use of ADDR was just placed in | |
2004 | the insn before INSN, make that the next use. | |
2005 | Otherwise, invalidate it. */ | |
2006 | if (GET_CODE (PREV_INSN (insn)) == INSN | |
2007 | && GET_CODE (PATTERN (PREV_INSN (insn))) == SET | |
2008 | && SET_SRC (PATTERN (PREV_INSN (insn))) == addr) | |
2009 | reg_next_use[regno] = PREV_INSN (insn); | |
2010 | else | |
2011 | reg_next_use[regno] = 0; | |
2012 | ||
2013 | addr = q; | |
2014 | regno = REGNO (q); | |
2015 | win = 1; | |
2016 | ||
2017 | /* REGNO is now used in INCR which is below INSN, but | |
2018 | it previously wasn't live here. If we don't mark | |
2019 | it as needed, we'll put a REG_DEAD note for it | |
2020 | on this insn, which is incorrect. */ | |
2021 | needed[regno / REGSET_ELT_BITS] | |
5f4f0e22 | 2022 | |= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); |
d7429b6a RK |
2023 | |
2024 | /* If there are any calls between INSN and INCR, show | |
2025 | that REGNO now crosses them. */ | |
2026 | for (temp = insn; temp != incr; temp = NEXT_INSN (temp)) | |
2027 | if (GET_CODE (temp) == CALL_INSN) | |
2028 | reg_n_calls_crossed[regno]++; | |
2029 | } | |
2030 | ||
2031 | if (win) | |
2032 | { | |
2033 | /* We have found a suitable auto-increment: do POST_INC around | |
2034 | the register here, and patch out the increment instruction | |
2035 | that follows. */ | |
2036 | XEXP (x, 0) = gen_rtx ((INTVAL (XEXP (y, 1)) == size | |
2037 | ? (offset ? PRE_INC : POST_INC) | |
2038 | : (offset ? PRE_DEC : POST_DEC)), | |
2039 | Pmode, addr); | |
2040 | ||
2041 | /* Record that this insn has an implicit side effect. */ | |
2042 | REG_NOTES (insn) | |
2043 | = gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn)); | |
2044 | ||
2045 | /* Modify the old increment-insn to simply copy | |
2046 | the already-incremented value of our register. */ | |
2047 | SET_SRC (PATTERN (incr)) = addr; | |
2048 | /* Indicate insn must be re-recognized. */ | |
2049 | INSN_CODE (incr) = -1; | |
2050 | ||
2051 | /* If that makes it a no-op (copying the register into itself) | |
2052 | then delete it so it won't appear to be a "use" and a "set" | |
2053 | of this register. */ | |
2054 | if (SET_DEST (PATTERN (incr)) == addr) | |
2055 | { | |
2056 | PUT_CODE (incr, NOTE); | |
2057 | NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED; | |
2058 | NOTE_SOURCE_FILE (incr) = 0; | |
2059 | } | |
2060 | ||
2061 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2062 | { | |
2063 | /* Count an extra reference to the reg. When a reg is | |
2064 | incremented, spilling it is worse, so we want to make | |
2065 | that less likely. */ | |
2066 | reg_n_refs[regno] += loop_depth; | |
2067 | /* Count the increment as a setting of the register, | |
2068 | even though it isn't a SET in rtl. */ | |
2069 | reg_n_sets[regno]++; | |
2070 | } | |
2071 | } | |
2072 | } | |
2073 | } | |
2074 | } | |
2075 | #endif /* AUTO_INC_DEC */ | |
2076 | \f | |
2077 | /* Scan expression X and store a 1-bit in LIVE for each reg it uses. | |
2078 | This is done assuming the registers needed from X | |
2079 | are those that have 1-bits in NEEDED. | |
2080 | ||
2081 | On the final pass, FINAL is 1. This means try for autoincrement | |
2082 | and count the uses and deaths of each pseudo-reg. | |
2083 | ||
2084 | INSN is the containing instruction. If INSN is dead, this function is not | |
2085 | called. */ | |
2086 | ||
2087 | static void | |
2088 | mark_used_regs (needed, live, x, final, insn) | |
2089 | regset needed; | |
2090 | regset live; | |
2091 | rtx x; | |
2092 | rtx insn; | |
2093 | int final; | |
2094 | { | |
2095 | register RTX_CODE code; | |
2096 | register int regno; | |
2097 | int i; | |
2098 | ||
2099 | retry: | |
2100 | code = GET_CODE (x); | |
2101 | switch (code) | |
2102 | { | |
2103 | case LABEL_REF: | |
2104 | case SYMBOL_REF: | |
2105 | case CONST_INT: | |
2106 | case CONST: | |
2107 | case CONST_DOUBLE: | |
2108 | case PC: | |
2109 | case CLOBBER: | |
2110 | case ADDR_VEC: | |
2111 | case ADDR_DIFF_VEC: | |
2112 | case ASM_INPUT: | |
2113 | return; | |
2114 | ||
2115 | #ifdef HAVE_cc0 | |
2116 | case CC0: | |
2117 | cc0_live = 1; | |
2118 | return; | |
2119 | #endif | |
2120 | ||
2121 | case MEM: | |
2122 | /* Invalidate the data for the last MEM stored. We could do this only | |
2123 | if the addresses conflict, but this doesn't seem worthwhile. */ | |
2124 | last_mem_set = 0; | |
2125 | ||
2126 | #ifdef AUTO_INC_DEC | |
2127 | if (final) | |
2128 | find_auto_inc (needed, x, insn); | |
2129 | #endif | |
2130 | break; | |
2131 | ||
2132 | case REG: | |
2133 | /* See a register other than being set | |
2134 | => mark it as needed. */ | |
2135 | ||
2136 | regno = REGNO (x); | |
2137 | { | |
2138 | register int offset = regno / REGSET_ELT_BITS; | |
5f4f0e22 CH |
2139 | register REGSET_ELT_TYPE bit |
2140 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
d7429b6a RK |
2141 | int all_needed = (needed[offset] & bit) != 0; |
2142 | int some_needed = (needed[offset] & bit) != 0; | |
2143 | ||
2144 | live[offset] |= bit; | |
2145 | /* A hard reg in a wide mode may really be multiple registers. | |
2146 | If so, mark all of them just like the first. */ | |
2147 | if (regno < FIRST_PSEUDO_REGISTER) | |
2148 | { | |
2149 | int n; | |
2150 | ||
d7e4fe8b | 2151 | /* For stack ptr or fixed arg pointer, |
d7429b6a RK |
2152 | nothing below can be necessary, so waste no more time. */ |
2153 | if (regno == STACK_POINTER_REGNUM | |
d7e4fe8b RS |
2154 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2155 | || (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2156 | #endif | |
d7429b6a RK |
2157 | || regno == FRAME_POINTER_REGNUM) |
2158 | { | |
2159 | /* If this is a register we are going to try to eliminate, | |
2160 | don't mark it live here. If we are successful in | |
2161 | eliminating it, it need not be live unless it is used for | |
2162 | pseudos, in which case it will have been set live when | |
2163 | it was allocated to the pseudos. If the register will not | |
2164 | be eliminated, reload will set it live at that point. */ | |
2165 | ||
2166 | if (! TEST_HARD_REG_BIT (elim_reg_set, regno)) | |
2167 | regs_ever_live[regno] = 1; | |
2168 | return; | |
2169 | } | |
2170 | /* No death notes for global register variables; | |
2171 | their values are live after this function exits. */ | |
2172 | if (global_regs[regno]) | |
d8c8b8e3 RS |
2173 | { |
2174 | if (final) | |
2175 | reg_next_use[regno] = insn; | |
2176 | return; | |
2177 | } | |
d7429b6a RK |
2178 | |
2179 | n = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
2180 | while (--n > 0) | |
2181 | { | |
2182 | live[(regno + n) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
2183 | |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS); |
2184 | some_needed | |
2185 | |= (needed[(regno + n) / REGSET_ELT_BITS] | |
2186 | & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS)); | |
2187 | all_needed | |
2188 | &= (needed[(regno + n) / REGSET_ELT_BITS] | |
2189 | & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS)); | |
d7429b6a RK |
2190 | } |
2191 | } | |
2192 | if (final) | |
2193 | { | |
2194 | /* Record where each reg is used, so when the reg | |
2195 | is set we know the next insn that uses it. */ | |
2196 | ||
2197 | reg_next_use[regno] = insn; | |
2198 | ||
2199 | if (regno < FIRST_PSEUDO_REGISTER) | |
2200 | { | |
2201 | /* If a hard reg is being used, | |
2202 | record that this function does use it. */ | |
2203 | ||
2204 | i = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
2205 | if (i == 0) | |
2206 | i = 1; | |
2207 | do | |
2208 | regs_ever_live[regno + --i] = 1; | |
2209 | while (i > 0); | |
2210 | } | |
2211 | else | |
2212 | { | |
2213 | /* Keep track of which basic block each reg appears in. */ | |
2214 | ||
2215 | register int blocknum = BLOCK_NUM (insn); | |
2216 | ||
2217 | if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN) | |
2218 | reg_basic_block[regno] = blocknum; | |
2219 | else if (reg_basic_block[regno] != blocknum) | |
2220 | reg_basic_block[regno] = REG_BLOCK_GLOBAL; | |
2221 | ||
2222 | /* Count (weighted) number of uses of each reg. */ | |
2223 | ||
2224 | reg_n_refs[regno] += loop_depth; | |
2225 | } | |
2226 | ||
2227 | /* Record and count the insns in which a reg dies. | |
2228 | If it is used in this insn and was dead below the insn | |
2229 | then it dies in this insn. If it was set in this insn, | |
2230 | we do not make a REG_DEAD note; likewise if we already | |
2231 | made such a note. */ | |
2232 | ||
2233 | if (! all_needed | |
2234 | && ! dead_or_set_p (insn, x) | |
2235 | #if 0 | |
2236 | && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
2237 | #endif | |
2238 | ) | |
2239 | { | |
2240 | /* If none of the words in X is needed, make a REG_DEAD | |
2241 | note. Otherwise, we must make partial REG_DEAD notes. */ | |
2242 | if (! some_needed) | |
2243 | { | |
2244 | REG_NOTES (insn) | |
2245 | = gen_rtx (EXPR_LIST, REG_DEAD, x, REG_NOTES (insn)); | |
2246 | reg_n_deaths[regno]++; | |
2247 | } | |
2248 | else | |
2249 | { | |
2250 | int i; | |
2251 | ||
2252 | /* Don't make a REG_DEAD note for a part of a register | |
2253 | that is set in the insn. */ | |
2254 | ||
2255 | for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1; | |
2256 | i >= 0; i--) | |
2257 | if ((needed[(regno + i) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
2258 | & ((REGSET_ELT_TYPE) 1 |
2259 | << ((regno + i) % REGSET_ELT_BITS))) == 0 | |
d7429b6a RK |
2260 | && ! dead_or_set_regno_p (insn, regno + i)) |
2261 | REG_NOTES (insn) | |
2262 | = gen_rtx (EXPR_LIST, REG_DEAD, | |
2263 | gen_rtx (REG, word_mode, regno + i), | |
2264 | REG_NOTES (insn)); | |
2265 | } | |
2266 | } | |
2267 | } | |
2268 | } | |
2269 | return; | |
2270 | ||
2271 | case SET: | |
2272 | { | |
2273 | register rtx testreg = SET_DEST (x); | |
2274 | int mark_dest = 0; | |
2275 | ||
2276 | /* If storing into MEM, don't show it as being used. But do | |
2277 | show the address as being used. */ | |
2278 | if (GET_CODE (testreg) == MEM) | |
2279 | { | |
2280 | #ifdef AUTO_INC_DEC | |
2281 | if (final) | |
2282 | find_auto_inc (needed, testreg, insn); | |
2283 | #endif | |
2284 | mark_used_regs (needed, live, XEXP (testreg, 0), final, insn); | |
2285 | mark_used_regs (needed, live, SET_SRC (x), final, insn); | |
2286 | return; | |
2287 | } | |
2288 | ||
2289 | /* Storing in STRICT_LOW_PART is like storing in a reg | |
2290 | in that this SET might be dead, so ignore it in TESTREG. | |
2291 | but in some other ways it is like using the reg. | |
2292 | ||
2293 | Storing in a SUBREG or a bit field is like storing the entire | |
2294 | register in that if the register's value is not used | |
2295 | then this SET is not needed. */ | |
2296 | while (GET_CODE (testreg) == STRICT_LOW_PART | |
2297 | || GET_CODE (testreg) == ZERO_EXTRACT | |
2298 | || GET_CODE (testreg) == SIGN_EXTRACT | |
2299 | || GET_CODE (testreg) == SUBREG) | |
2300 | { | |
2301 | /* Modifying a single register in an alternate mode | |
2302 | does not use any of the old value. But these other | |
2303 | ways of storing in a register do use the old value. */ | |
2304 | if (GET_CODE (testreg) == SUBREG | |
2305 | && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg))) | |
2306 | ; | |
2307 | else | |
2308 | mark_dest = 1; | |
2309 | ||
2310 | testreg = XEXP (testreg, 0); | |
2311 | } | |
2312 | ||
2313 | /* If this is a store into a register, | |
2314 | recursively scan the value being stored. */ | |
2315 | ||
2316 | if (GET_CODE (testreg) == REG | |
2317 | && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM) | |
d7e4fe8b RS |
2318 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2319 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2320 | #endif | |
d8c8b8e3 RS |
2321 | ) |
2322 | /* We used to exclude global_regs here, but that seems wrong. | |
2323 | Storing in them is like storing in mem. */ | |
d7429b6a RK |
2324 | { |
2325 | mark_used_regs (needed, live, SET_SRC (x), final, insn); | |
2326 | if (mark_dest) | |
2327 | mark_used_regs (needed, live, SET_DEST (x), final, insn); | |
2328 | return; | |
2329 | } | |
2330 | } | |
2331 | break; | |
2332 | ||
2333 | case RETURN: | |
2334 | /* If exiting needs the right stack value, consider this insn as | |
2335 | using the stack pointer. In any event, consider it as using | |
2336 | all global registers. */ | |
2337 | ||
2338 | #ifdef EXIT_IGNORE_STACK | |
2339 | if (! EXIT_IGNORE_STACK | |
2340 | || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer)) | |
2341 | #endif | |
2342 | live[STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
5f4f0e22 | 2343 | |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS); |
d7429b6a RK |
2344 | |
2345 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
2346 | if (global_regs[i]) | |
5f4f0e22 CH |
2347 | live[i / REGSET_ELT_BITS] |
2348 | |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS); | |
d7429b6a RK |
2349 | break; |
2350 | } | |
2351 | ||
2352 | /* Recursively scan the operands of this expression. */ | |
2353 | ||
2354 | { | |
2355 | register char *fmt = GET_RTX_FORMAT (code); | |
2356 | register int i; | |
2357 | ||
2358 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2359 | { | |
2360 | if (fmt[i] == 'e') | |
2361 | { | |
2362 | /* Tail recursive case: save a function call level. */ | |
2363 | if (i == 0) | |
2364 | { | |
2365 | x = XEXP (x, 0); | |
2366 | goto retry; | |
2367 | } | |
2368 | mark_used_regs (needed, live, XEXP (x, i), final, insn); | |
2369 | } | |
2370 | else if (fmt[i] == 'E') | |
2371 | { | |
2372 | register int j; | |
2373 | for (j = 0; j < XVECLEN (x, i); j++) | |
2374 | mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn); | |
2375 | } | |
2376 | } | |
2377 | } | |
2378 | } | |
2379 | \f | |
2380 | #ifdef AUTO_INC_DEC | |
2381 | ||
2382 | static int | |
2383 | try_pre_increment_1 (insn) | |
2384 | rtx insn; | |
2385 | { | |
2386 | /* Find the next use of this reg. If in same basic block, | |
2387 | make it do pre-increment or pre-decrement if appropriate. */ | |
2388 | rtx x = PATTERN (insn); | |
5f4f0e22 | 2389 | HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1) |
d7429b6a RK |
2390 | * INTVAL (XEXP (SET_SRC (x), 1))); |
2391 | int regno = REGNO (SET_DEST (x)); | |
2392 | rtx y = reg_next_use[regno]; | |
2393 | if (y != 0 | |
2394 | && BLOCK_NUM (y) == BLOCK_NUM (insn) | |
2395 | && try_pre_increment (y, SET_DEST (PATTERN (insn)), | |
2396 | amount)) | |
2397 | { | |
2398 | /* We have found a suitable auto-increment | |
2399 | and already changed insn Y to do it. | |
2400 | So flush this increment-instruction. */ | |
2401 | PUT_CODE (insn, NOTE); | |
2402 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
2403 | NOTE_SOURCE_FILE (insn) = 0; | |
2404 | /* Count a reference to this reg for the increment | |
2405 | insn we are deleting. When a reg is incremented. | |
2406 | spilling it is worse, so we want to make that | |
2407 | less likely. */ | |
2408 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2409 | { | |
2410 | reg_n_refs[regno] += loop_depth; | |
2411 | reg_n_sets[regno]++; | |
2412 | } | |
2413 | return 1; | |
2414 | } | |
2415 | return 0; | |
2416 | } | |
2417 | ||
2418 | /* Try to change INSN so that it does pre-increment or pre-decrement | |
2419 | addressing on register REG in order to add AMOUNT to REG. | |
2420 | AMOUNT is negative for pre-decrement. | |
2421 | Returns 1 if the change could be made. | |
2422 | This checks all about the validity of the result of modifying INSN. */ | |
2423 | ||
2424 | static int | |
2425 | try_pre_increment (insn, reg, amount) | |
2426 | rtx insn, reg; | |
5f4f0e22 | 2427 | HOST_WIDE_INT amount; |
d7429b6a RK |
2428 | { |
2429 | register rtx use; | |
2430 | ||
2431 | /* Nonzero if we can try to make a pre-increment or pre-decrement. | |
2432 | For example, addl $4,r1; movl (r1),... can become movl +(r1),... */ | |
2433 | int pre_ok = 0; | |
2434 | /* Nonzero if we can try to make a post-increment or post-decrement. | |
2435 | For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,... | |
2436 | It is possible for both PRE_OK and POST_OK to be nonzero if the machine | |
2437 | supports both pre-inc and post-inc, or both pre-dec and post-dec. */ | |
2438 | int post_ok = 0; | |
2439 | ||
2440 | /* Nonzero if the opportunity actually requires post-inc or post-dec. */ | |
2441 | int do_post = 0; | |
2442 | ||
2443 | /* From the sign of increment, see which possibilities are conceivable | |
2444 | on this target machine. */ | |
2445 | #ifdef HAVE_PRE_INCREMENT | |
2446 | if (amount > 0) | |
2447 | pre_ok = 1; | |
2448 | #endif | |
2449 | #ifdef HAVE_POST_INCREMENT | |
2450 | if (amount > 0) | |
2451 | post_ok = 1; | |
2452 | #endif | |
2453 | ||
2454 | #ifdef HAVE_PRE_DECREMENT | |
2455 | if (amount < 0) | |
2456 | pre_ok = 1; | |
2457 | #endif | |
2458 | #ifdef HAVE_POST_DECREMENT | |
2459 | if (amount < 0) | |
2460 | post_ok = 1; | |
2461 | #endif | |
2462 | ||
2463 | if (! (pre_ok || post_ok)) | |
2464 | return 0; | |
2465 | ||
2466 | /* It is not safe to add a side effect to a jump insn | |
2467 | because if the incremented register is spilled and must be reloaded | |
2468 | there would be no way to store the incremented value back in memory. */ | |
2469 | ||
2470 | if (GET_CODE (insn) == JUMP_INSN) | |
2471 | return 0; | |
2472 | ||
2473 | use = 0; | |
2474 | if (pre_ok) | |
2475 | use = find_use_as_address (PATTERN (insn), reg, 0); | |
2476 | if (post_ok && (use == 0 || use == (rtx) 1)) | |
2477 | { | |
2478 | use = find_use_as_address (PATTERN (insn), reg, -amount); | |
2479 | do_post = 1; | |
2480 | } | |
2481 | ||
2482 | if (use == 0 || use == (rtx) 1) | |
2483 | return 0; | |
2484 | ||
2485 | if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount)) | |
2486 | return 0; | |
2487 | ||
2488 | XEXP (use, 0) = gen_rtx (amount > 0 | |
2489 | ? (do_post ? POST_INC : PRE_INC) | |
2490 | : (do_post ? POST_DEC : PRE_DEC), | |
2491 | Pmode, reg); | |
2492 | ||
2493 | /* Record that this insn now has an implicit side effect on X. */ | |
2494 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn)); | |
2495 | return 1; | |
2496 | } | |
2497 | ||
2498 | #endif /* AUTO_INC_DEC */ | |
2499 | \f | |
2500 | /* Find the place in the rtx X where REG is used as a memory address. | |
2501 | Return the MEM rtx that so uses it. | |
2502 | If PLUSCONST is nonzero, search instead for a memory address equivalent to | |
2503 | (plus REG (const_int PLUSCONST)). | |
2504 | ||
2505 | If such an address does not appear, return 0. | |
2506 | If REG appears more than once, or is used other than in such an address, | |
2507 | return (rtx)1. */ | |
2508 | ||
2509 | static rtx | |
2510 | find_use_as_address (x, reg, plusconst) | |
2511 | register rtx x; | |
2512 | rtx reg; | |
2513 | int plusconst; | |
2514 | { | |
2515 | enum rtx_code code = GET_CODE (x); | |
2516 | char *fmt = GET_RTX_FORMAT (code); | |
2517 | register int i; | |
2518 | register rtx value = 0; | |
2519 | register rtx tem; | |
2520 | ||
2521 | if (code == MEM && XEXP (x, 0) == reg && plusconst == 0) | |
2522 | return x; | |
2523 | ||
2524 | if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS | |
2525 | && XEXP (XEXP (x, 0), 0) == reg | |
2526 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
2527 | && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) | |
2528 | return x; | |
2529 | ||
2530 | if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) | |
2531 | { | |
2532 | /* If REG occurs inside a MEM used in a bit-field reference, | |
2533 | that is unacceptable. */ | |
2534 | if (find_use_as_address (XEXP (x, 0), reg, 0) != 0) | |
6fa5c106 | 2535 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2536 | } |
2537 | ||
2538 | if (x == reg) | |
6fa5c106 | 2539 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2540 | |
2541 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2542 | { | |
2543 | if (fmt[i] == 'e') | |
2544 | { | |
2545 | tem = find_use_as_address (XEXP (x, i), reg, plusconst); | |
2546 | if (value == 0) | |
2547 | value = tem; | |
2548 | else if (tem != 0) | |
6fa5c106 | 2549 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2550 | } |
2551 | if (fmt[i] == 'E') | |
2552 | { | |
2553 | register int j; | |
2554 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2555 | { | |
2556 | tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst); | |
2557 | if (value == 0) | |
2558 | value = tem; | |
2559 | else if (tem != 0) | |
6fa5c106 | 2560 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2561 | } |
2562 | } | |
2563 | } | |
2564 | ||
2565 | return value; | |
2566 | } | |
2567 | \f | |
2568 | /* Write information about registers and basic blocks into FILE. | |
2569 | This is part of making a debugging dump. */ | |
2570 | ||
2571 | void | |
2572 | dump_flow_info (file) | |
2573 | FILE *file; | |
2574 | { | |
2575 | register int i; | |
2576 | static char *reg_class_names[] = REG_CLASS_NAMES; | |
2577 | ||
2578 | fprintf (file, "%d registers.\n", max_regno); | |
2579 | ||
2580 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
2581 | if (reg_n_refs[i]) | |
2582 | { | |
e4600702 | 2583 | enum reg_class class, altclass; |
d7429b6a RK |
2584 | fprintf (file, "\nRegister %d used %d times across %d insns", |
2585 | i, reg_n_refs[i], reg_live_length[i]); | |
2586 | if (reg_basic_block[i] >= 0) | |
2587 | fprintf (file, " in block %d", reg_basic_block[i]); | |
2588 | if (reg_n_deaths[i] != 1) | |
2589 | fprintf (file, "; dies in %d places", reg_n_deaths[i]); | |
2590 | if (reg_n_calls_crossed[i] == 1) | |
2591 | fprintf (file, "; crosses 1 call"); | |
2592 | else if (reg_n_calls_crossed[i]) | |
2593 | fprintf (file, "; crosses %d calls", reg_n_calls_crossed[i]); | |
2594 | if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD) | |
2595 | fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i)); | |
2596 | class = reg_preferred_class (i); | |
e4600702 RK |
2597 | altclass = reg_alternate_class (i); |
2598 | if (class != GENERAL_REGS || altclass != ALL_REGS) | |
d7429b6a | 2599 | { |
e4600702 RK |
2600 | if (altclass == ALL_REGS || class == ALL_REGS) |
2601 | fprintf (file, "; pref %s", reg_class_names[(int) class]); | |
2602 | else if (altclass == NO_REGS) | |
d7429b6a RK |
2603 | fprintf (file, "; %s or none", reg_class_names[(int) class]); |
2604 | else | |
e4600702 RK |
2605 | fprintf (file, "; pref %s, else %s", |
2606 | reg_class_names[(int) class], | |
2607 | reg_class_names[(int) altclass]); | |
d7429b6a RK |
2608 | } |
2609 | if (REGNO_POINTER_FLAG (i)) | |
2610 | fprintf (file, "; pointer"); | |
2611 | fprintf (file, ".\n"); | |
2612 | } | |
2613 | fprintf (file, "\n%d basic blocks.\n", n_basic_blocks); | |
2614 | for (i = 0; i < n_basic_blocks; i++) | |
2615 | { | |
2616 | register rtx head, jump; | |
2617 | register int regno; | |
2618 | fprintf (file, "\nBasic block %d: first insn %d, last %d.\n", | |
2619 | i, | |
2620 | INSN_UID (basic_block_head[i]), | |
2621 | INSN_UID (basic_block_end[i])); | |
2622 | /* The control flow graph's storage is freed | |
2623 | now when flow_analysis returns. | |
2624 | Don't try to print it if it is gone. */ | |
2625 | if (basic_block_drops_in) | |
2626 | { | |
2627 | fprintf (file, "Reached from blocks: "); | |
2628 | head = basic_block_head[i]; | |
2629 | if (GET_CODE (head) == CODE_LABEL) | |
2630 | for (jump = LABEL_REFS (head); | |
2631 | jump != head; | |
2632 | jump = LABEL_NEXTREF (jump)) | |
2633 | { | |
2634 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
2635 | fprintf (file, " %d", from_block); | |
2636 | } | |
2637 | if (basic_block_drops_in[i]) | |
2638 | fprintf (file, " previous"); | |
2639 | } | |
2640 | fprintf (file, "\nRegisters live at start:"); | |
2641 | for (regno = 0; regno < max_regno; regno++) | |
2642 | { | |
2643 | register int offset = regno / REGSET_ELT_BITS; | |
efb07da7 RK |
2644 | register REGSET_ELT_TYPE bit |
2645 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
d7429b6a RK |
2646 | if (basic_block_live_at_start[i][offset] & bit) |
2647 | fprintf (file, " %d", regno); | |
2648 | } | |
2649 | fprintf (file, "\n"); | |
2650 | } | |
2651 | fprintf (file, "\n"); | |
2652 | } |