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d7429b6a 1/* Data flow analysis for GNU compiler.
05ed5d57 2 Copyright (C) 1987, 1988, 1992, 1993, 1994 Free Software Foundation, Inc.
d7429b6a
RK
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20
21/* This file contains the data flow analysis pass of the compiler.
22 It computes data flow information
23 which tells combine_instructions which insns to consider combining
24 and controls register allocation.
25
26 Additional data flow information that is too bulky to record
27 is generated during the analysis, and is used at that time to
28 create autoincrement and autodecrement addressing.
29
30 The first step is dividing the function into basic blocks.
31 find_basic_blocks does this. Then life_analysis determines
32 where each register is live and where it is dead.
33
34 ** find_basic_blocks **
35
36 find_basic_blocks divides the current function's rtl
37 into basic blocks. It records the beginnings and ends of the
38 basic blocks in the vectors basic_block_head and basic_block_end,
39 and the number of blocks in n_basic_blocks.
40
41 find_basic_blocks also finds any unreachable loops
42 and deletes them.
43
44 ** life_analysis **
45
46 life_analysis is called immediately after find_basic_blocks.
47 It uses the basic block information to determine where each
48 hard or pseudo register is live.
49
50 ** live-register info **
51
52 The information about where each register is live is in two parts:
53 the REG_NOTES of insns, and the vector basic_block_live_at_start.
54
55 basic_block_live_at_start has an element for each basic block,
56 and the element is a bit-vector with a bit for each hard or pseudo
57 register. The bit is 1 if the register is live at the beginning
58 of the basic block.
59
60 Two types of elements can be added to an insn's REG_NOTES.
61 A REG_DEAD note is added to an insn's REG_NOTES for any register
62 that meets both of two conditions: The value in the register is not
63 needed in subsequent insns and the insn does not replace the value in
64 the register (in the case of multi-word hard registers, the value in
65 each register must be replaced by the insn to avoid a REG_DEAD note).
66
67 In the vast majority of cases, an object in a REG_DEAD note will be
68 used somewhere in the insn. The (rare) exception to this is if an
69 insn uses a multi-word hard register and only some of the registers are
70 needed in subsequent insns. In that case, REG_DEAD notes will be
71 provided for those hard registers that are not subsequently needed.
72 Partial REG_DEAD notes of this type do not occur when an insn sets
73 only some of the hard registers used in such a multi-word operand;
74 omitting REG_DEAD notes for objects stored in an insn is optional and
75 the desire to do so does not justify the complexity of the partial
76 REG_DEAD notes.
77
78 REG_UNUSED notes are added for each register that is set by the insn
79 but is unused subsequently (if every register set by the insn is unused
80 and the insn does not reference memory or have some other side-effect,
81 the insn is deleted instead). If only part of a multi-word hard
82 register is used in a subsequent insn, REG_UNUSED notes are made for
83 the parts that will not be used.
84
85 To determine which registers are live after any insn, one can
86 start from the beginning of the basic block and scan insns, noting
87 which registers are set by each insn and which die there.
88
89 ** Other actions of life_analysis **
90
91 life_analysis sets up the LOG_LINKS fields of insns because the
92 information needed to do so is readily available.
93
94 life_analysis deletes insns whose only effect is to store a value
95 that is never used.
96
97 life_analysis notices cases where a reference to a register as
98 a memory address can be combined with a preceding or following
99 incrementation or decrementation of the register. The separate
100 instruction to increment or decrement is deleted and the address
101 is changed to a POST_INC or similar rtx.
102
103 Each time an incrementing or decrementing address is created,
104 a REG_INC element is added to the insn's REG_NOTES list.
105
106 life_analysis fills in certain vectors containing information about
107 register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length,
108 reg_n_calls_crosses and reg_basic_block. */
109\f
110#include <stdio.h>
111#include "config.h"
112#include "rtl.h"
113#include "basic-block.h"
114#include "insn-config.h"
115#include "regs.h"
116#include "hard-reg-set.h"
117#include "flags.h"
118#include "output.h"
119
120#include "obstack.h"
121#define obstack_chunk_alloc xmalloc
122#define obstack_chunk_free free
123
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124/* List of labels that must never be deleted. */
125extern rtx forced_labels;
126
127/* Get the basic block number of an insn.
128 This info should not be expected to remain available
129 after the end of life_analysis. */
130
131/* This is the limit of the allocated space in the following two arrays. */
132
133static int max_uid_for_flow;
134
135#define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)]
136
137/* This is where the BLOCK_NUM values are really stored.
138 This is set up by find_basic_blocks and used there and in life_analysis,
139 and then freed. */
140
6ac271be 141static int *uid_block_number;
d7429b6a
RK
142
143/* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
144
145#define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)]
146static char *uid_volatile;
147
148/* Number of basic blocks in the current function. */
149
150int n_basic_blocks;
151
152/* Maximum register number used in this function, plus one. */
153
154int max_regno;
155
156/* Maximum number of SCRATCH rtx's used in any basic block of this function. */
157
158int max_scratch;
159
160/* Number of SCRATCH rtx's in the current block. */
161
162static int num_scratch;
163
164/* Indexed by n, gives number of basic block that (REG n) is used in.
165 If the value is REG_BLOCK_GLOBAL (-2),
166 it means (REG n) is used in more than one basic block.
167 REG_BLOCK_UNKNOWN (-1) means it hasn't been seen yet so we don't know.
168 This information remains valid for the rest of the compilation
169 of the current function; it is used to control register allocation. */
170
6ac271be 171int *reg_basic_block;
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172
173/* Indexed by n, gives number of times (REG n) is used or set, each
174 weighted by its loop-depth.
175 This information remains valid for the rest of the compilation
176 of the current function; it is used to control register allocation. */
177
178int *reg_n_refs;
179
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180/* Indexed by N; says whether a psuedo register N was ever used
181 within a SUBREG that changes the size of the reg. Some machines prohibit
182 such objects to be in certain (usually floating-point) registers. */
183
184char *reg_changes_size;
185
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186/* Indexed by N, gives number of places register N dies.
187 This information remains valid for the rest of the compilation
188 of the current function; it is used to control register allocation. */
189
190short *reg_n_deaths;
191
192/* Indexed by N, gives 1 if that reg is live across any CALL_INSNs.
193 This information remains valid for the rest of the compilation
194 of the current function; it is used to control register allocation. */
195
196int *reg_n_calls_crossed;
197
198/* Total number of instructions at which (REG n) is live.
199 The larger this is, the less priority (REG n) gets for
200 allocation in a real register.
201 This information remains valid for the rest of the compilation
202 of the current function; it is used to control register allocation.
203
204 local-alloc.c may alter this number to change the priority.
205
206 Negative values are special.
207 -1 is used to mark a pseudo reg which has a constant or memory equivalent
208 and is used infrequently enough that it should not get a hard register.
209 -2 is used to mark a pseudo reg for a parameter, when a frame pointer
cfb2c0b1 210 is not required. global.c makes an allocno for this but does
d7429b6a
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211 not try to assign a hard register to it. */
212
213int *reg_live_length;
214
215/* Element N is the next insn that uses (hard or pseudo) register number N
216 within the current basic block; or zero, if there is no such insn.
217 This is valid only during the final backward scan in propagate_block. */
218
219static rtx *reg_next_use;
220
221/* Size of a regset for the current function,
222 in (1) bytes and (2) elements. */
223
224int regset_bytes;
225int regset_size;
226
227/* Element N is first insn in basic block N.
228 This info lasts until we finish compiling the function. */
229
230rtx *basic_block_head;
231
232/* Element N is last insn in basic block N.
233 This info lasts until we finish compiling the function. */
234
235rtx *basic_block_end;
236
237/* Element N is a regset describing the registers live
238 at the start of basic block N.
239 This info lasts until we finish compiling the function. */
240
241regset *basic_block_live_at_start;
242
243/* Regset of regs live when calls to `setjmp'-like functions happen. */
244
245regset regs_live_at_setjmp;
246
247/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
248 that have to go in the same hard reg.
249 The first two regs in the list are a pair, and the next two
250 are another pair, etc. */
251rtx regs_may_share;
252
253/* Element N is nonzero if control can drop into basic block N
254 from the preceding basic block. Freed after life_analysis. */
255
256static char *basic_block_drops_in;
257
258/* Element N is depth within loops of the last insn in basic block number N.
259 Freed after life_analysis. */
260
261static short *basic_block_loop_depth;
262
263/* Element N nonzero if basic block N can actually be reached.
264 Vector exists only during find_basic_blocks. */
265
266static char *block_live_static;
267
268/* Depth within loops of basic block being scanned for lifetime analysis,
269 plus one. This is the weight attached to references to registers. */
270
271static int loop_depth;
272
273/* During propagate_block, this is non-zero if the value of CC0 is live. */
274
275static int cc0_live;
276
277/* During propagate_block, this contains the last MEM stored into. It
278 is used to eliminate consecutive stores to the same location. */
279
280static rtx last_mem_set;
281
282/* Set of registers that may be eliminable. These are handled specially
283 in updating regs_ever_live. */
284
285static HARD_REG_SET elim_reg_set;
286
287/* Forward declarations */
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288static void find_basic_blocks PROTO((rtx, rtx));
289static int uses_reg_or_mem PROTO((rtx));
290static void mark_label_ref PROTO((rtx, rtx, int));
291static void life_analysis PROTO((rtx, int));
292void allocate_for_life_analysis PROTO((void));
293static void init_regset_vector PROTO((regset *, regset, int, int));
294static void propagate_block PROTO((regset, rtx, rtx, int,
295 regset, int));
8329b5ec 296static rtx flow_delete_insn PROTO((rtx));
e658434c
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297static int insn_dead_p PROTO((rtx, regset, int));
298static int libcall_dead_p PROTO((rtx, regset, rtx, rtx));
299static void mark_set_regs PROTO((regset, regset, rtx,
300 rtx, regset));
301static void mark_set_1 PROTO((regset, regset, rtx,
302 rtx, regset));
303static void find_auto_inc PROTO((regset, rtx, rtx));
304static void mark_used_regs PROTO((regset, regset, rtx, int, rtx));
305static int try_pre_increment_1 PROTO((rtx));
306static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT));
307static rtx find_use_as_address PROTO((rtx, rtx, HOST_WIDE_INT));
308void dump_flow_info PROTO((FILE *));
d7429b6a
RK
309\f
310/* Find basic blocks of the current function and perform data flow analysis.
311 F is the first insn of the function and NREGS the number of register numbers
312 in use. */
313
314void
315flow_analysis (f, nregs, file)
316 rtx f;
317 int nregs;
318 FILE *file;
319{
320 register rtx insn;
321 register int i;
d7e4fe8b 322 rtx nonlocal_label_list = nonlocal_label_rtx_list ();
d7429b6a
RK
323
324#ifdef ELIMINABLE_REGS
325 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
326#endif
327
328 /* Record which registers will be eliminated. We use this in
329 mark_used_regs. */
330
331 CLEAR_HARD_REG_SET (elim_reg_set);
332
333#ifdef ELIMINABLE_REGS
334 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
335 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
336#else
337 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
338#endif
339
340 /* Count the basic blocks. Also find maximum insn uid value used. */
341
342 {
343 register RTX_CODE prev_code = JUMP_INSN;
344 register RTX_CODE code;
345
346 max_uid_for_flow = 0;
347
348 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
349 {
350 code = GET_CODE (insn);
351 if (INSN_UID (insn) > max_uid_for_flow)
352 max_uid_for_flow = INSN_UID (insn);
353 if (code == CODE_LABEL
d7e4fe8b
RS
354 || (GET_RTX_CLASS (code) == 'i'
355 && (prev_code == JUMP_INSN
356 || (prev_code == CALL_INSN
6b67ec08 357 && nonlocal_label_list != 0)
d7e4fe8b 358 || prev_code == BARRIER)))
d7429b6a 359 i++;
6b67ec08 360 if (code != NOTE)
d7429b6a
RK
361 prev_code = code;
362 }
363 }
364
365#ifdef AUTO_INC_DEC
366 /* Leave space for insns we make in some cases for auto-inc. These cases
367 are rare, so we don't need too much space. */
368 max_uid_for_flow += max_uid_for_flow / 10;
369#endif
370
371 /* Allocate some tables that last till end of compiling this function
372 and some needed only in find_basic_blocks and life_analysis. */
373
374 n_basic_blocks = i;
375 basic_block_head = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
376 basic_block_end = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
377 basic_block_drops_in = (char *) alloca (n_basic_blocks);
378 basic_block_loop_depth = (short *) alloca (n_basic_blocks * sizeof (short));
379 uid_block_number
6ac271be 380 = (int *) alloca ((max_uid_for_flow + 1) * sizeof (int));
d7429b6a
RK
381 uid_volatile = (char *) alloca (max_uid_for_flow + 1);
382 bzero (uid_volatile, max_uid_for_flow + 1);
383
d7e4fe8b 384 find_basic_blocks (f, nonlocal_label_list);
d7429b6a
RK
385 life_analysis (f, nregs);
386 if (file)
387 dump_flow_info (file);
388
389 basic_block_drops_in = 0;
390 uid_block_number = 0;
391 basic_block_loop_depth = 0;
392}
393\f
394/* Find all basic blocks of the function whose first insn is F.
395 Store the correct data in the tables that describe the basic blocks,
396 set up the chains of references for each CODE_LABEL, and
d7e4fe8b
RS
397 delete any entire basic blocks that cannot be reached.
398
399 NONLOCAL_LABEL_LIST is the same local variable from flow_analysis. */
d7429b6a
RK
400
401static void
d7e4fe8b
RS
402find_basic_blocks (f, nonlocal_label_list)
403 rtx f, nonlocal_label_list;
d7429b6a
RK
404{
405 register rtx insn;
406 register int i;
407 register char *block_live = (char *) alloca (n_basic_blocks);
408 register char *block_marked = (char *) alloca (n_basic_blocks);
409 /* List of label_refs to all labels whose addresses are taken
410 and used as data. */
8329b5ec 411 rtx label_value_list;
e658434c
RK
412 rtx x, note;
413 enum rtx_code prev_code, code;
8329b5ec 414 int depth, pass;
d7429b6a 415
8329b5ec
DE
416 pass = 1;
417 restart:
418
419 label_value_list = 0;
d7429b6a
RK
420 block_live_static = block_live;
421 bzero (block_live, n_basic_blocks);
422 bzero (block_marked, n_basic_blocks);
423
424 /* Initialize with just block 0 reachable and no blocks marked. */
425 if (n_basic_blocks > 0)
426 block_live[0] = 1;
427
e658434c
RK
428 /* Initialize the ref chain of each label to 0. Record where all the
429 blocks start and end and their depth in loops. For each insn, record
430 the block it is in. Also mark as reachable any blocks headed by labels
431 that must not be deleted. */
d7429b6a 432
e658434c
RK
433 for (insn = f, i = -1, prev_code = JUMP_INSN, depth = 1;
434 insn; insn = NEXT_INSN (insn))
435 {
436 code = GET_CODE (insn);
437 if (code == NOTE)
438 {
439 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
440 depth++;
441 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
442 depth--;
443 }
d7429b6a 444
e658434c
RK
445 /* A basic block starts at label, or after something that can jump. */
446 else if (code == CODE_LABEL
447 || (GET_RTX_CLASS (code) == 'i'
448 && (prev_code == JUMP_INSN
449 || (prev_code == CALL_INSN
6b67ec08 450 && nonlocal_label_list != 0)
e658434c
RK
451 || prev_code == BARRIER)))
452 {
453 basic_block_head[++i] = insn;
454 basic_block_end[i] = insn;
455 basic_block_loop_depth[i] = depth;
456
457 if (code == CODE_LABEL)
458 {
d7429b6a
RK
459 LABEL_REFS (insn) = insn;
460 /* Any label that cannot be deleted
461 is considered to start a reachable block. */
462 if (LABEL_PRESERVE_P (insn))
463 block_live[i] = 1;
464 }
e658434c 465 }
d7429b6a 466
e658434c
RK
467 else if (GET_RTX_CLASS (code) == 'i')
468 {
469 basic_block_end[i] = insn;
470 basic_block_loop_depth[i] = depth;
42fa3cfb 471 }
e658434c 472
42fa3cfb
JW
473 if (GET_RTX_CLASS (code) == 'i')
474 {
e658434c
RK
475 /* Make a list of all labels referred to other than by jumps. */
476 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
477 if (REG_NOTE_KIND (note) == REG_LABEL)
d7429b6a
RK
478 label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0),
479 label_value_list);
42fa3cfb 480 }
d7429b6a 481
e658434c 482 BLOCK_NUM (insn) = i;
d7e4fe8b 483
6b67ec08 484 if (code != NOTE)
e658434c
RK
485 prev_code = code;
486 }
487
488 if (i + 1 != n_basic_blocks)
489 abort ();
d7429b6a 490
37548fa3
RS
491 /* Don't delete the labels (in this function)
492 that are referenced by non-jump instructions. */
e658434c
RK
493
494 for (x = label_value_list; x; x = XEXP (x, 1))
495 if (! LABEL_REF_NONLOCAL_P (x))
496 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
497
498 for (x = forced_labels; x; x = XEXP (x, 1))
499 if (! LABEL_REF_NONLOCAL_P (x))
500 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
d7e4fe8b 501
d7429b6a
RK
502 /* Record which basic blocks control can drop in to. */
503
e658434c
RK
504 for (i = 0; i < n_basic_blocks; i++)
505 {
506 for (insn = PREV_INSN (basic_block_head[i]);
507 insn && GET_CODE (insn) == NOTE; insn = PREV_INSN (insn))
508 ;
509
510 basic_block_drops_in[i] = insn && GET_CODE (insn) != BARRIER;
511 }
d7429b6a
RK
512
513 /* Now find which basic blocks can actually be reached
514 and put all jump insns' LABEL_REFS onto the ref-chains
515 of their target labels. */
516
517 if (n_basic_blocks > 0)
518 {
519 int something_marked = 1;
8329b5ec 520 int deleted;
d7429b6a 521
e658434c
RK
522 /* Find all indirect jump insns and mark them as possibly jumping to all
523 the labels whose addresses are explicitly used. This is because,
524 when there are computed gotos, we can't tell which labels they jump
525 to, of all the possibilities.
526
527 Tablejumps and casesi insns are OK and we can recognize them by
528 a (use (label_ref)). */
d7429b6a
RK
529
530 for (insn = f; insn; insn = NEXT_INSN (insn))
e658434c 531 if (GET_CODE (insn) == JUMP_INSN)
d7429b6a 532 {
e658434c
RK
533 rtx pat = PATTERN (insn);
534 int computed_jump = 0;
535
536 if (GET_CODE (pat) == PARALLEL)
537 {
538 int len = XVECLEN (pat, 0);
539 int has_use_labelref = 0;
540
541 for (i = len - 1; i >= 0; i--)
542 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
543 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
544 == LABEL_REF))
545 has_use_labelref = 1;
546
547 if (! has_use_labelref)
548 for (i = len - 1; i >= 0; i--)
549 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
550 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
551 && uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
552 computed_jump = 1;
553 }
554 else if (GET_CODE (pat) == SET
555 && SET_DEST (pat) == pc_rtx
556 && uses_reg_or_mem (SET_SRC (pat)))
557 computed_jump = 1;
558
559 if (computed_jump)
560 {
561 for (x = label_value_list; x; x = XEXP (x, 1))
562 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
563 insn, 0);
564
565 for (x = forced_labels; x; x = XEXP (x, 1))
566 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
d7429b6a 567 insn, 0);
e658434c 568 }
d7429b6a
RK
569 }
570
d7e4fe8b
RS
571 /* Find all call insns and mark them as possibly jumping
572 to all the nonlocal goto handler labels. */
573
574 for (insn = f; insn; insn = NEXT_INSN (insn))
575 if (GET_CODE (insn) == CALL_INSN)
576 {
d7e4fe8b 577 for (x = nonlocal_label_list; x; x = XEXP (x, 1))
27212ac6
RS
578 /* Don't try marking labels that
579 were deleted as unreferenced. */
580 if (GET_CODE (XEXP (x, 0)) == CODE_LABEL)
581 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
582 insn, 0);
e658434c 583
d7e4fe8b
RS
584 /* ??? This could be made smarter:
585 in some cases it's possible to tell that certain
586 calls will not do a nonlocal goto.
587
588 For example, if the nested functions that do the
589 nonlocal gotos do not have their addresses taken, then
590 only calls to those functions or to other nested
591 functions that use them could possibly do nonlocal
592 gotos. */
593 }
594
d7429b6a
RK
595 /* Pass over all blocks, marking each block that is reachable
596 and has not yet been marked.
597 Keep doing this until, in one pass, no blocks have been marked.
598 Then blocks_live and blocks_marked are identical and correct.
599 In addition, all jumps actually reachable have been marked. */
600
601 while (something_marked)
602 {
603 something_marked = 0;
604 for (i = 0; i < n_basic_blocks; i++)
605 if (block_live[i] && !block_marked[i])
606 {
607 block_marked[i] = 1;
608 something_marked = 1;
609 if (i + 1 < n_basic_blocks && basic_block_drops_in[i + 1])
610 block_live[i + 1] = 1;
611 insn = basic_block_end[i];
612 if (GET_CODE (insn) == JUMP_INSN)
613 mark_label_ref (PATTERN (insn), insn, 0);
614 }
615 }
616
af14ce9c
RK
617 /* ??? See if we have a "live" basic block that is not reachable.
618 This can happen if it is headed by a label that is preserved or
619 in one of the label lists, but no call or computed jump is in
620 the loop. It's not clear if we can delete the block or not,
621 but don't for now. However, we will mess up register status if
622 it remains unreachable, so add a fake reachability from the
623 previous block. */
624
625 for (i = 1; i < n_basic_blocks; i++)
626 if (block_live[i] && ! basic_block_drops_in[i]
627 && GET_CODE (basic_block_head[i]) == CODE_LABEL
628 && LABEL_REFS (basic_block_head[i]) == basic_block_head[i])
629 basic_block_drops_in[i] = 1;
630
d7429b6a
RK
631 /* Now delete the code for any basic blocks that can't be reached.
632 They can occur because jump_optimize does not recognize
633 unreachable loops as unreachable. */
634
8329b5ec 635 deleted = 0;
d7429b6a
RK
636 for (i = 0; i < n_basic_blocks; i++)
637 if (!block_live[i])
638 {
8329b5ec
DE
639 deleted++;
640
641 /* Delete the insns in a (non-live) block. We physically delete
642 every non-note insn except the start and end (so
643 basic_block_head/end needn't be updated), we turn the latter
644 into NOTE_INSN_DELETED notes.
645 We use to "delete" the insns by turning them into notes, but
646 we may be deleting lots of insns that subsequent passes would
647 otherwise have to process. Secondly, lots of deleted blocks in
648 a row can really slow down propagate_block since it will
649 otherwise process insn-turned-notes multiple times when it
650 looks for loop begin/end notes. */
651 if (basic_block_head[i] != basic_block_end[i])
652 {
653 insn = NEXT_INSN (basic_block_head[i]);
654 while (insn != basic_block_end[i])
655 {
656 if (GET_CODE (insn) == BARRIER)
657 abort ();
658 else if (GET_CODE (insn) != NOTE)
659 insn = flow_delete_insn (insn);
660 else
661 insn = NEXT_INSN (insn);
662 }
663 }
d7429b6a 664 insn = basic_block_head[i];
8329b5ec 665 if (GET_CODE (insn) != NOTE)
d7429b6a 666 {
8329b5ec 667 /* Turn the head into a deleted insn note. */
d7429b6a
RK
668 if (GET_CODE (insn) == BARRIER)
669 abort ();
8329b5ec
DE
670 PUT_CODE (insn, NOTE);
671 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
672 NOTE_SOURCE_FILE (insn) = 0;
673 }
674 insn = basic_block_end[i];
675 if (GET_CODE (insn) != NOTE)
676 {
677 /* Turn the tail into a deleted insn note. */
678 if (GET_CODE (insn) == BARRIER)
679 abort ();
680 PUT_CODE (insn, NOTE);
681 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
682 NOTE_SOURCE_FILE (insn) = 0;
d7429b6a 683 }
8329b5ec
DE
684 /* BARRIERs are between basic blocks, not part of one.
685 Delete a BARRIER if the preceding jump is deleted.
686 We cannot alter a BARRIER into a NOTE
687 because it is too short; but we can really delete
688 it because it is not part of a basic block. */
689 if (NEXT_INSN (insn) != 0
690 && GET_CODE (NEXT_INSN (insn)) == BARRIER)
691 delete_insn (NEXT_INSN (insn));
692
d7429b6a
RK
693 /* Each time we delete some basic blocks,
694 see if there is a jump around them that is
695 being turned into a no-op. If so, delete it. */
696
697 if (block_live[i - 1])
698 {
699 register int j;
8329b5ec 700 for (j = i + 1; j < n_basic_blocks; j++)
d7429b6a
RK
701 if (block_live[j])
702 {
703 rtx label;
704 insn = basic_block_end[i - 1];
705 if (GET_CODE (insn) == JUMP_INSN
706 /* An unconditional jump is the only possibility
707 we must check for, since a conditional one
708 would make these blocks live. */
709 && simplejump_p (insn)
710 && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1)
711 && INSN_UID (label) != 0
712 && BLOCK_NUM (label) == j)
713 {
714 PUT_CODE (insn, NOTE);
715 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
716 NOTE_SOURCE_FILE (insn) = 0;
717 if (GET_CODE (NEXT_INSN (insn)) != BARRIER)
718 abort ();
719 delete_insn (NEXT_INSN (insn));
720 }
721 break;
722 }
723 }
724 }
8329b5ec
DE
725
726 /* There are pathalogical cases where one function calling hundreds of
727 nested inline functions can generate lots and lots of unreachable
728 blocks that jump can't delete. Since we don't use sparse matrices
729 a lot of memory will be needed to compile such functions.
730 Implementing sparse matrices is a fair bit of work and it is not
731 clear that they win more than they lose (we don't want to
732 unnecessarily slow down compilation of normal code). By making
733 another pass for the pathalogical case, we can greatly speed up
734 their compilation without hurting normal code. This works because
735 all the insns in the unreachable blocks have either been deleted or
736 turned into notes. */
737 /* ??? The choice of when to make another pass is a bit arbitrary,
738 and was derived from empirical data. */
739 if (pass == 1
740 && (deleted > n_basic_blocks / 2 || deleted > 1000))
741 {
742 pass++;
743 n_basic_blocks -= deleted;
744 goto restart;
745 }
d7429b6a
RK
746 }
747}
748\f
8329b5ec
DE
749/* Subroutines of find_basic_blocks. */
750
e658434c
RK
751/* Return 1 if X contain a REG or MEM that is not in the constant pool. */
752
753static int
754uses_reg_or_mem (x)
755 rtx x;
756{
757 enum rtx_code code = GET_CODE (x);
758 int i, j;
759 char *fmt;
760
761 if (code == REG
762 || (code == MEM
763 && ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
764 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))))
765 return 1;
766
767 fmt = GET_RTX_FORMAT (code);
768 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
769 {
770 if (fmt[i] == 'e'
771 && uses_reg_or_mem (XEXP (x, i)))
772 return 1;
773
774 if (fmt[i] == 'E')
775 for (j = 0; j < XVECLEN (x, i); j++)
776 if (uses_reg_or_mem (XVECEXP (x, i, j)))
777 return 1;
778 }
779
780 return 0;
781}
8329b5ec 782
d7429b6a
RK
783/* Check expression X for label references;
784 if one is found, add INSN to the label's chain of references.
785
786 CHECKDUP means check for and avoid creating duplicate references
787 from the same insn. Such duplicates do no serious harm but
788 can slow life analysis. CHECKDUP is set only when duplicates
789 are likely. */
790
791static void
792mark_label_ref (x, insn, checkdup)
793 rtx x, insn;
794 int checkdup;
795{
796 register RTX_CODE code;
797 register int i;
798 register char *fmt;
799
800 /* We can be called with NULL when scanning label_value_list. */
801 if (x == 0)
802 return;
803
804 code = GET_CODE (x);
805 if (code == LABEL_REF)
806 {
807 register rtx label = XEXP (x, 0);
808 register rtx y;
809 if (GET_CODE (label) != CODE_LABEL)
810 abort ();
811 /* If the label was never emitted, this insn is junk,
812 but avoid a crash trying to refer to BLOCK_NUM (label).
813 This can happen as a result of a syntax error
814 and a diagnostic has already been printed. */
815 if (INSN_UID (label) == 0)
816 return;
817 CONTAINING_INSN (x) = insn;
818 /* if CHECKDUP is set, check for duplicate ref from same insn
819 and don't insert. */
820 if (checkdup)
821 for (y = LABEL_REFS (label); y != label; y = LABEL_NEXTREF (y))
822 if (CONTAINING_INSN (y) == insn)
823 return;
824 LABEL_NEXTREF (x) = LABEL_REFS (label);
825 LABEL_REFS (label) = x;
826 block_live_static[BLOCK_NUM (label)] = 1;
827 return;
828 }
829
830 fmt = GET_RTX_FORMAT (code);
831 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
832 {
833 if (fmt[i] == 'e')
834 mark_label_ref (XEXP (x, i), insn, 0);
835 if (fmt[i] == 'E')
836 {
837 register int j;
838 for (j = 0; j < XVECLEN (x, i); j++)
839 mark_label_ref (XVECEXP (x, i, j), insn, 1);
840 }
841 }
842}
8329b5ec
DE
843
844/* Delete INSN by patching it out.
845 Return the next insn. */
846
847static rtx
848flow_delete_insn (insn)
849 rtx insn;
850{
851 /* ??? For the moment we assume we don't have to watch for NULLs here
852 since the start/end of basic blocks aren't deleted like this. */
853 NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
854 PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
855 return NEXT_INSN (insn);
856}
d7429b6a
RK
857\f
858/* Determine which registers are live at the start of each
859 basic block of the function whose first insn is F.
860 NREGS is the number of registers used in F.
861 We allocate the vector basic_block_live_at_start
862 and the regsets that it points to, and fill them with the data.
863 regset_size and regset_bytes are also set here. */
864
865static void
866life_analysis (f, nregs)
867 rtx f;
868 int nregs;
869{
870 register regset tem;
871 int first_pass;
872 int changed;
873 /* For each basic block, a bitmask of regs
874 live on exit from the block. */
875 regset *basic_block_live_at_end;
876 /* For each basic block, a bitmask of regs
877 live on entry to a successor-block of this block.
878 If this does not match basic_block_live_at_end,
879 that must be updated, and the block must be rescanned. */
880 regset *basic_block_new_live_at_end;
881 /* For each basic block, a bitmask of regs
882 whose liveness at the end of the basic block
883 can make a difference in which regs are live on entry to the block.
884 These are the regs that are set within the basic block,
885 possibly excluding those that are used after they are set. */
886 regset *basic_block_significant;
887 register int i;
888 rtx insn;
889
890 struct obstack flow_obstack;
891
892 gcc_obstack_init (&flow_obstack);
893
894 max_regno = nregs;
895
896 bzero (regs_ever_live, sizeof regs_ever_live);
897
898 /* Allocate and zero out many data structures
899 that will record the data from lifetime analysis. */
900
901 allocate_for_life_analysis ();
902
903 reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
4c9a05bc 904 bzero ((char *) reg_next_use, nregs * sizeof (rtx));
d7429b6a
RK
905
906 /* Set up several regset-vectors used internally within this function.
907 Their meanings are documented above, with their declarations. */
908
4c9a05bc
RK
909 basic_block_live_at_end
910 = (regset *) alloca (n_basic_blocks * sizeof (regset));
911
d7429b6a
RK
912 /* Don't use alloca since that leads to a crash rather than an error message
913 if there isn't enough space.
914 Don't use oballoc since we may need to allocate other things during
915 this function on the temporary obstack. */
916 tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes);
4c9a05bc
RK
917 bzero ((char *) tem, n_basic_blocks * regset_bytes);
918 init_regset_vector (basic_block_live_at_end, tem,
919 n_basic_blocks, regset_bytes);
d7429b6a 920
4c9a05bc
RK
921 basic_block_new_live_at_end
922 = (regset *) alloca (n_basic_blocks * sizeof (regset));
d7429b6a 923 tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes);
4c9a05bc
RK
924 bzero ((char *) tem, n_basic_blocks * regset_bytes);
925 init_regset_vector (basic_block_new_live_at_end, tem,
926 n_basic_blocks, regset_bytes);
d7429b6a 927
4c9a05bc
RK
928 basic_block_significant
929 = (regset *) alloca (n_basic_blocks * sizeof (regset));
d7429b6a 930 tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes);
4c9a05bc
RK
931 bzero ((char *) tem, n_basic_blocks * regset_bytes);
932 init_regset_vector (basic_block_significant, tem,
933 n_basic_blocks, regset_bytes);
d7429b6a
RK
934
935 /* Record which insns refer to any volatile memory
936 or for any reason can't be deleted just because they are dead stores.
937 Also, delete any insns that copy a register to itself. */
938
939 for (insn = f; insn; insn = NEXT_INSN (insn))
940 {
941 enum rtx_code code1 = GET_CODE (insn);
942 if (code1 == CALL_INSN)
943 INSN_VOLATILE (insn) = 1;
944 else if (code1 == INSN || code1 == JUMP_INSN)
945 {
946 /* Delete (in effect) any obvious no-op moves. */
947 if (GET_CODE (PATTERN (insn)) == SET
948 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
949 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
950 && REGNO (SET_DEST (PATTERN (insn))) ==
951 REGNO (SET_SRC (PATTERN (insn)))
952 /* Insns carrying these notes are useful later on. */
5f4f0e22 953 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
d7429b6a
RK
954 {
955 PUT_CODE (insn, NOTE);
956 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
957 NOTE_SOURCE_FILE (insn) = 0;
958 }
959 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
960 {
961 /* If nothing but SETs of registers to themselves,
962 this insn can also be deleted. */
963 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
964 {
965 rtx tem = XVECEXP (PATTERN (insn), 0, i);
966
967 if (GET_CODE (tem) == USE
968 || GET_CODE (tem) == CLOBBER)
969 continue;
970
971 if (GET_CODE (tem) != SET
972 || GET_CODE (SET_DEST (tem)) != REG
973 || GET_CODE (SET_SRC (tem)) != REG
974 || REGNO (SET_DEST (tem)) != REGNO (SET_SRC (tem)))
975 break;
976 }
977
978 if (i == XVECLEN (PATTERN (insn), 0)
979 /* Insns carrying these notes are useful later on. */
5f4f0e22 980 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
d7429b6a
RK
981 {
982 PUT_CODE (insn, NOTE);
983 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
984 NOTE_SOURCE_FILE (insn) = 0;
985 }
986 else
987 INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
988 }
989 else if (GET_CODE (PATTERN (insn)) != USE)
990 INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
991 /* A SET that makes space on the stack cannot be dead.
992 (Such SETs occur only for allocating variable-size data,
993 so they will always have a PLUS or MINUS according to the
994 direction of stack growth.)
995 Even if this function never uses this stack pointer value,
996 signal handlers do! */
997 else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET
998 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
999#ifdef STACK_GROWS_DOWNWARD
1000 && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS
1001#else
1002 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1003#endif
1004 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx)
1005 INSN_VOLATILE (insn) = 1;
1006 }
1007 }
1008
1009 if (n_basic_blocks > 0)
1010#ifdef EXIT_IGNORE_STACK
1011 if (! EXIT_IGNORE_STACK
1012 || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer))
1013#endif
1014 {
1015 /* If exiting needs the right stack value,
1016 consider the stack pointer live at the end of the function. */
1017 basic_block_live_at_end[n_basic_blocks - 1]
1018 [STACK_POINTER_REGNUM / REGSET_ELT_BITS]
efb07da7 1019 |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
d7429b6a
RK
1020 basic_block_new_live_at_end[n_basic_blocks - 1]
1021 [STACK_POINTER_REGNUM / REGSET_ELT_BITS]
efb07da7 1022 |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
d7429b6a
RK
1023 }
1024
fe0f9c4b
RK
1025 /* Mark the frame pointer is needed at the end of the function. If
1026 we end up eliminating it, it will be removed from the live list
1027 of each basic block by reload. */
1028
1029 if (n_basic_blocks > 0)
1030 {
1031 basic_block_live_at_end[n_basic_blocks - 1]
1032 [FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1033 |= (REGSET_ELT_TYPE) 1 << (FRAME_POINTER_REGNUM % REGSET_ELT_BITS);
1034 basic_block_new_live_at_end[n_basic_blocks - 1]
1035 [FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1036 |= (REGSET_ELT_TYPE) 1 << (FRAME_POINTER_REGNUM % REGSET_ELT_BITS);
73a187c1
DE
1037#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1038 /* If they are different, also mark the hard frame pointer as live */
1039 basic_block_live_at_end[n_basic_blocks - 1]
1040 [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1041 |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM
1042 % REGSET_ELT_BITS);
1043 basic_block_new_live_at_end[n_basic_blocks - 1]
1044 [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1045 |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM
1046 % REGSET_ELT_BITS);
1047#endif
fe0f9c4b
RK
1048 }
1049
d7429b6a
RK
1050 /* Mark all global registers as being live at the end of the function
1051 since they may be referenced by our caller. */
1052
1053 if (n_basic_blocks > 0)
1054 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1055 if (global_regs[i])
1056 {
1057 basic_block_live_at_end[n_basic_blocks - 1]
efb07da7
RK
1058 [i / REGSET_ELT_BITS]
1059 |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
d7429b6a 1060 basic_block_new_live_at_end[n_basic_blocks - 1]
efb07da7
RK
1061 [i / REGSET_ELT_BITS]
1062 |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
d7429b6a
RK
1063 }
1064
1065 /* Propagate life info through the basic blocks
1066 around the graph of basic blocks.
1067
1068 This is a relaxation process: each time a new register
1069 is live at the end of the basic block, we must scan the block
1070 to determine which registers are, as a consequence, live at the beginning
1071 of that block. These registers must then be marked live at the ends
1072 of all the blocks that can transfer control to that block.
1073 The process continues until it reaches a fixed point. */
1074
1075 first_pass = 1;
1076 changed = 1;
1077 while (changed)
1078 {
1079 changed = 0;
1080 for (i = n_basic_blocks - 1; i >= 0; i--)
1081 {
1082 int consider = first_pass;
1083 int must_rescan = first_pass;
1084 register int j;
1085
1086 if (!first_pass)
1087 {
1088 /* Set CONSIDER if this block needs thinking about at all
1089 (that is, if the regs live now at the end of it
1090 are not the same as were live at the end of it when
1091 we last thought about it).
1092 Set must_rescan if it needs to be thought about
1093 instruction by instruction (that is, if any additional
1094 reg that is live at the end now but was not live there before
1095 is one of the significant regs of this basic block). */
1096
1097 for (j = 0; j < regset_size; j++)
1098 {
5f4f0e22
CH
1099 register REGSET_ELT_TYPE x
1100 = (basic_block_new_live_at_end[i][j]
1101 & ~basic_block_live_at_end[i][j]);
d7429b6a
RK
1102 if (x)
1103 consider = 1;
1104 if (x & basic_block_significant[i][j])
1105 {
1106 must_rescan = 1;
1107 consider = 1;
1108 break;
1109 }
1110 }
1111
1112 if (! consider)
1113 continue;
1114 }
1115
1116 /* The live_at_start of this block may be changing,
1117 so another pass will be required after this one. */
1118 changed = 1;
1119
1120 if (! must_rescan)
1121 {
1122 /* No complete rescan needed;
1123 just record those variables newly known live at end
1124 as live at start as well. */
1125 for (j = 0; j < regset_size; j++)
1126 {
5f4f0e22
CH
1127 register REGSET_ELT_TYPE x
1128 = (basic_block_new_live_at_end[i][j]
1129 & ~basic_block_live_at_end[i][j]);
d7429b6a
RK
1130 basic_block_live_at_start[i][j] |= x;
1131 basic_block_live_at_end[i][j] |= x;
1132 }
1133 }
1134 else
1135 {
1136 /* Update the basic_block_live_at_start
1137 by propagation backwards through the block. */
4c9a05bc
RK
1138 bcopy ((char *) basic_block_new_live_at_end[i],
1139 (char *) basic_block_live_at_end[i], regset_bytes);
1140 bcopy ((char *) basic_block_live_at_end[i],
1141 (char *) basic_block_live_at_start[i], regset_bytes);
d7429b6a
RK
1142 propagate_block (basic_block_live_at_start[i],
1143 basic_block_head[i], basic_block_end[i], 0,
5f4f0e22
CH
1144 first_pass ? basic_block_significant[i]
1145 : (regset) 0,
d7429b6a
RK
1146 i);
1147 }
1148
1149 {
1150 register rtx jump, head;
af14ce9c 1151
d7429b6a
RK
1152 /* Update the basic_block_new_live_at_end's of the block
1153 that falls through into this one (if any). */
1154 head = basic_block_head[i];
d7429b6a
RK
1155 if (basic_block_drops_in[i])
1156 {
d7429b6a
RK
1157 register int j;
1158 for (j = 0; j < regset_size; j++)
af14ce9c 1159 basic_block_new_live_at_end[i-1][j]
d7429b6a
RK
1160 |= basic_block_live_at_start[i][j];
1161 }
af14ce9c 1162
d7429b6a
RK
1163 /* Update the basic_block_new_live_at_end's of
1164 all the blocks that jump to this one. */
1165 if (GET_CODE (head) == CODE_LABEL)
1166 for (jump = LABEL_REFS (head);
1167 jump != head;
1168 jump = LABEL_NEXTREF (jump))
1169 {
1170 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
1171 register int j;
1172 for (j = 0; j < regset_size; j++)
1173 basic_block_new_live_at_end[from_block][j]
1174 |= basic_block_live_at_start[i][j];
1175 }
1176 }
1177#ifdef USE_C_ALLOCA
1178 alloca (0);
1179#endif
1180 }
1181 first_pass = 0;
1182 }
1183
1184 /* The only pseudos that are live at the beginning of the function are
1185 those that were not set anywhere in the function. local-alloc doesn't
1186 know how to handle these correctly, so mark them as not local to any
1187 one basic block. */
1188
1189 if (n_basic_blocks > 0)
1190 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1191 if (basic_block_live_at_start[0][i / REGSET_ELT_BITS]
5f4f0e22 1192 & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)))
d7429b6a
RK
1193 reg_basic_block[i] = REG_BLOCK_GLOBAL;
1194
1195 /* Now the life information is accurate.
1196 Make one more pass over each basic block
1197 to delete dead stores, create autoincrement addressing
1198 and record how many times each register is used, is set, or dies.
1199
1200 To save time, we operate directly in basic_block_live_at_end[i],
1201 thus destroying it (in fact, converting it into a copy of
1202 basic_block_live_at_start[i]). This is ok now because
1203 basic_block_live_at_end[i] is no longer used past this point. */
1204
1205 max_scratch = 0;
1206
1207 for (i = 0; i < n_basic_blocks; i++)
1208 {
1209 propagate_block (basic_block_live_at_end[i],
5f4f0e22
CH
1210 basic_block_head[i], basic_block_end[i], 1,
1211 (regset) 0, i);
d7429b6a
RK
1212#ifdef USE_C_ALLOCA
1213 alloca (0);
1214#endif
1215 }
1216
1217#if 0
1218 /* Something live during a setjmp should not be put in a register
1219 on certain machines which restore regs from stack frames
1220 rather than from the jmpbuf.
1221 But we don't need to do this for the user's variables, since
1222 ANSI says only volatile variables need this. */
1223#ifdef LONGJMP_RESTORE_FROM_STACK
1224 for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
5f4f0e22
CH
1225 if (regs_live_at_setjmp[i / REGSET_ELT_BITS]
1226 & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS))
d7429b6a
RK
1227 && regno_reg_rtx[i] != 0 && ! REG_USERVAR_P (regno_reg_rtx[i]))
1228 {
1229 reg_live_length[i] = -1;
1230 reg_basic_block[i] = -1;
1231 }
1232#endif
1233#endif
1234
1235 /* We have a problem with any pseudoreg that
1236 lives across the setjmp. ANSI says that if a
1237 user variable does not change in value
1238 between the setjmp and the longjmp, then the longjmp preserves it.
1239 This includes longjmp from a place where the pseudo appears dead.
1240 (In principle, the value still exists if it is in scope.)
1241 If the pseudo goes in a hard reg, some other value may occupy
1242 that hard reg where this pseudo is dead, thus clobbering the pseudo.
1243 Conclusion: such a pseudo must not go in a hard reg. */
1244 for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
5f4f0e22
CH
1245 if ((regs_live_at_setjmp[i / REGSET_ELT_BITS]
1246 & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)))
d7429b6a
RK
1247 && regno_reg_rtx[i] != 0)
1248 {
1249 reg_live_length[i] = -1;
1250 reg_basic_block[i] = -1;
1251 }
1252
5f4f0e22 1253 obstack_free (&flow_obstack, NULL_PTR);
d7429b6a
RK
1254}
1255\f
1256/* Subroutines of life analysis. */
1257
1258/* Allocate the permanent data structures that represent the results
1259 of life analysis. Not static since used also for stupid life analysis. */
1260
1261void
1262allocate_for_life_analysis ()
1263{
1264 register int i;
1265 register regset tem;
1266
1267 regset_size = ((max_regno + REGSET_ELT_BITS - 1) / REGSET_ELT_BITS);
1268 regset_bytes = regset_size * sizeof (*(regset)0);
1269
1270 reg_n_refs = (int *) oballoc (max_regno * sizeof (int));
4c9a05bc 1271 bzero ((char *) reg_n_refs, max_regno * sizeof (int));
d7429b6a
RK
1272
1273 reg_n_sets = (short *) oballoc (max_regno * sizeof (short));
4c9a05bc 1274 bzero ((char *) reg_n_sets, max_regno * sizeof (short));
d7429b6a
RK
1275
1276 reg_n_deaths = (short *) oballoc (max_regno * sizeof (short));
4c9a05bc 1277 bzero ((char *) reg_n_deaths, max_regno * sizeof (short));
d7429b6a 1278
80f8f04a
RK
1279 reg_changes_size = (char *) oballoc (max_regno * sizeof (char));
1280 bzero (reg_changes_size, max_regno * sizeof (char));;
1281
d7429b6a 1282 reg_live_length = (int *) oballoc (max_regno * sizeof (int));
4c9a05bc 1283 bzero ((char *) reg_live_length, max_regno * sizeof (int));
d7429b6a
RK
1284
1285 reg_n_calls_crossed = (int *) oballoc (max_regno * sizeof (int));
4c9a05bc 1286 bzero ((char *) reg_n_calls_crossed, max_regno * sizeof (int));
d7429b6a 1287
6ac271be 1288 reg_basic_block = (int *) oballoc (max_regno * sizeof (int));
d7429b6a
RK
1289 for (i = 0; i < max_regno; i++)
1290 reg_basic_block[i] = REG_BLOCK_UNKNOWN;
1291
4c9a05bc
RK
1292 basic_block_live_at_start
1293 = (regset *) oballoc (n_basic_blocks * sizeof (regset));
d7429b6a 1294 tem = (regset) oballoc (n_basic_blocks * regset_bytes);
4c9a05bc
RK
1295 bzero ((char *) tem, n_basic_blocks * regset_bytes);
1296 init_regset_vector (basic_block_live_at_start, tem,
1297 n_basic_blocks, regset_bytes);
d7429b6a
RK
1298
1299 regs_live_at_setjmp = (regset) oballoc (regset_bytes);
4c9a05bc 1300 bzero ((char *) regs_live_at_setjmp, regset_bytes);
d7429b6a
RK
1301}
1302
1303/* Make each element of VECTOR point at a regset,
1304 taking the space for all those regsets from SPACE.
1305 SPACE is of type regset, but it is really as long as NELTS regsets.
1306 BYTES_PER_ELT is the number of bytes in one regset. */
1307
1308static void
1309init_regset_vector (vector, space, nelts, bytes_per_elt)
1310 regset *vector;
1311 regset space;
1312 int nelts;
1313 int bytes_per_elt;
1314{
1315 register int i;
1316 register regset p = space;
1317
1318 for (i = 0; i < nelts; i++)
1319 {
1320 vector[i] = p;
1321 p += bytes_per_elt / sizeof (*p);
1322 }
1323}
e658434c 1324
d7429b6a
RK
1325/* Compute the registers live at the beginning of a basic block
1326 from those live at the end.
1327
1328 When called, OLD contains those live at the end.
1329 On return, it contains those live at the beginning.
1330 FIRST and LAST are the first and last insns of the basic block.
1331
1332 FINAL is nonzero if we are doing the final pass which is not
1333 for computing the life info (since that has already been done)
1334 but for acting on it. On this pass, we delete dead stores,
1335 set up the logical links and dead-variables lists of instructions,
1336 and merge instructions for autoincrement and autodecrement addresses.
1337
1338 SIGNIFICANT is nonzero only the first time for each basic block.
1339 If it is nonzero, it points to a regset in which we store
1340 a 1 for each register that is set within the block.
1341
1342 BNUM is the number of the basic block. */
1343
1344static void
1345propagate_block (old, first, last, final, significant, bnum)
1346 register regset old;
1347 rtx first;
1348 rtx last;
1349 int final;
1350 regset significant;
1351 int bnum;
1352{
1353 register rtx insn;
1354 rtx prev;
1355 regset live;
1356 regset dead;
1357
1358 /* The following variables are used only if FINAL is nonzero. */
1359 /* This vector gets one element for each reg that has been live
1360 at any point in the basic block that has been scanned so far.
1361 SOMETIMES_MAX says how many elements are in use so far.
1362 In each element, OFFSET is the byte-number within a regset
1363 for the register described by the element, and BIT is a mask
1364 for that register's bit within the byte. */
5a13dfdd 1365 register struct sometimes { short offset; short bit; } *regs_sometimes_live;
d7429b6a
RK
1366 int sometimes_max = 0;
1367 /* This regset has 1 for each reg that we have seen live so far.
1368 It and REGS_SOMETIMES_LIVE are updated together. */
1369 regset maxlive;
1370
1371 /* The loop depth may change in the middle of a basic block. Since we
1372 scan from end to beginning, we start with the depth at the end of the
1373 current basic block, and adjust as we pass ends and starts of loops. */
1374 loop_depth = basic_block_loop_depth[bnum];
1375
1376 dead = (regset) alloca (regset_bytes);
1377 live = (regset) alloca (regset_bytes);
1378
1379 cc0_live = 0;
1380 last_mem_set = 0;
1381
1382 /* Include any notes at the end of the block in the scan.
1383 This is in case the block ends with a call to setjmp. */
1384
1385 while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE)
1386 {
1387 /* Look for loop boundaries, we are going forward here. */
1388 last = NEXT_INSN (last);
1389 if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG)
1390 loop_depth++;
1391 else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END)
1392 loop_depth--;
1393 }
1394
1395 if (final)
1396 {
5f4f0e22
CH
1397 register int i, offset;
1398 REGSET_ELT_TYPE bit;
d7429b6a
RK
1399
1400 num_scratch = 0;
1401 maxlive = (regset) alloca (regset_bytes);
4c9a05bc 1402 bcopy ((char *) old, (char *) maxlive, regset_bytes);
d7429b6a 1403 regs_sometimes_live
5a13dfdd 1404 = (struct sometimes *) alloca (max_regno * sizeof (struct sometimes));
d7429b6a
RK
1405
1406 /* Process the regs live at the end of the block.
1407 Enter them in MAXLIVE and REGS_SOMETIMES_LIVE.
1408 Also mark them as not local to any one basic block. */
1409
1410 for (offset = 0, i = 0; offset < regset_size; offset++)
1411 for (bit = 1; bit; bit <<= 1, i++)
1412 {
1413 if (i == max_regno)
1414 break;
1415 if (old[offset] & bit)
1416 {
1417 reg_basic_block[i] = REG_BLOCK_GLOBAL;
1418 regs_sometimes_live[sometimes_max].offset = offset;
1419 regs_sometimes_live[sometimes_max].bit = i % REGSET_ELT_BITS;
1420 sometimes_max++;
1421 }
1422 }
1423 }
1424
1425 /* Scan the block an insn at a time from end to beginning. */
1426
1427 for (insn = last; ; insn = prev)
1428 {
1429 prev = PREV_INSN (insn);
1430
8329b5ec 1431 if (GET_CODE (insn) == NOTE)
d7429b6a 1432 {
8329b5ec
DE
1433 /* Look for loop boundaries, remembering that we are going
1434 backwards. */
1435 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1436 loop_depth++;
1437 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1438 loop_depth--;
1439
1440 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
1441 Abort now rather than setting register status incorrectly. */
1442 if (loop_depth == 0)
1443 abort ();
1444
1445 /* If this is a call to `setjmp' et al,
1446 warn if any non-volatile datum is live. */
1447
1448 if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
1449 {
1450 int i;
1451 for (i = 0; i < regset_size; i++)
1452 regs_live_at_setjmp[i] |= old[i];
1453 }
d7429b6a
RK
1454 }
1455
1456 /* Update the life-status of regs for this insn.
1457 First DEAD gets which regs are set in this insn
1458 then LIVE gets which regs are used in this insn.
1459 Then the regs live before the insn
1460 are those live after, with DEAD regs turned off,
1461 and then LIVE regs turned on. */
1462
8329b5ec 1463 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
d7429b6a
RK
1464 {
1465 register int i;
5f4f0e22 1466 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
d7429b6a
RK
1467 int insn_is_dead
1468 = (insn_dead_p (PATTERN (insn), old, 0)
1469 /* Don't delete something that refers to volatile storage! */
1470 && ! INSN_VOLATILE (insn));
1471 int libcall_is_dead
1472 = (insn_is_dead && note != 0
1473 && libcall_dead_p (PATTERN (insn), old, note, insn));
1474
1475 /* If an instruction consists of just dead store(s) on final pass,
1476 "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
1477 We could really delete it with delete_insn, but that
1478 can cause trouble for first or last insn in a basic block. */
1479 if (final && insn_is_dead)
1480 {
1481 PUT_CODE (insn, NOTE);
1482 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1483 NOTE_SOURCE_FILE (insn) = 0;
1484
e5df1ea3
RK
1485 /* CC0 is now known to be dead. Either this insn used it,
1486 in which case it doesn't anymore, or clobbered it,
1487 so the next insn can't use it. */
1488 cc0_live = 0;
1489
d7429b6a
RK
1490 /* If this insn is copying the return value from a library call,
1491 delete the entire library call. */
1492 if (libcall_is_dead)
1493 {
1494 rtx first = XEXP (note, 0);
1495 rtx p = insn;
1496 while (INSN_DELETED_P (first))
1497 first = NEXT_INSN (first);
1498 while (p != first)
1499 {
1500 p = PREV_INSN (p);
1501 PUT_CODE (p, NOTE);
1502 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
1503 NOTE_SOURCE_FILE (p) = 0;
1504 }
1505 }
1506 goto flushed;
1507 }
1508
1509 for (i = 0; i < regset_size; i++)
1510 {
1511 dead[i] = 0; /* Faster than bzero here */
1512 live[i] = 0; /* since regset_size is usually small */
1513 }
1514
1515 /* See if this is an increment or decrement that can be
1516 merged into a following memory address. */
1517#ifdef AUTO_INC_DEC
1518 {
1519 register rtx x = PATTERN (insn);
1520 /* Does this instruction increment or decrement a register? */
1521 if (final && GET_CODE (x) == SET
1522 && GET_CODE (SET_DEST (x)) == REG
1523 && (GET_CODE (SET_SRC (x)) == PLUS
1524 || GET_CODE (SET_SRC (x)) == MINUS)
1525 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
1526 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1527 /* Ok, look for a following memory ref we can combine with.
1528 If one is found, change the memory ref to a PRE_INC
1529 or PRE_DEC, cancel this insn, and return 1.
1530 Return 0 if nothing has been done. */
1531 && try_pre_increment_1 (insn))
1532 goto flushed;
1533 }
1534#endif /* AUTO_INC_DEC */
1535
1536 /* If this is not the final pass, and this insn is copying the
1537 value of a library call and it's dead, don't scan the
1538 insns that perform the library call, so that the call's
1539 arguments are not marked live. */
1540 if (libcall_is_dead)
1541 {
1542 /* Mark the dest reg as `significant'. */
5f4f0e22 1543 mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant);
d7429b6a
RK
1544
1545 insn = XEXP (note, 0);
1546 prev = PREV_INSN (insn);
1547 }
1548 else if (GET_CODE (PATTERN (insn)) == SET
1549 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1550 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1551 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
1552 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
1553 /* We have an insn to pop a constant amount off the stack.
1554 (Such insns use PLUS regardless of the direction of the stack,
1555 and any insn to adjust the stack by a constant is always a pop.)
1556 These insns, if not dead stores, have no effect on life. */
1557 ;
1558 else
1559 {
1560 /* LIVE gets the regs used in INSN;
1561 DEAD gets those set by it. Dead insns don't make anything
1562 live. */
1563
5f4f0e22
CH
1564 mark_set_regs (old, dead, PATTERN (insn),
1565 final ? insn : NULL_RTX, significant);
d7429b6a
RK
1566
1567 /* If an insn doesn't use CC0, it becomes dead since we
1568 assume that every insn clobbers it. So show it dead here;
1569 mark_used_regs will set it live if it is referenced. */
1570 cc0_live = 0;
1571
1572 if (! insn_is_dead)
1573 mark_used_regs (old, live, PATTERN (insn), final, insn);
1574
1575 /* Sometimes we may have inserted something before INSN (such as
1576 a move) when we make an auto-inc. So ensure we will scan
1577 those insns. */
1578#ifdef AUTO_INC_DEC
1579 prev = PREV_INSN (insn);
1580#endif
1581
1582 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
1583 {
1584 register int i;
1585
6b67ec08
RK
1586 rtx note;
1587
1588 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1589 note;
1590 note = XEXP (note, 1))
1591 if (GET_CODE (XEXP (note, 0)) == USE)
1592 mark_used_regs (old, live, SET_DEST (XEXP (note, 0)),
1593 final, insn);
1594
d7429b6a
RK
1595 /* Each call clobbers all call-clobbered regs that are not
1596 global. Note that the function-value reg is a
1597 call-clobbered reg, and mark_set_regs has already had
1598 a chance to handle it. */
1599
1600 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1601 if (call_used_regs[i] && ! global_regs[i])
1602 dead[i / REGSET_ELT_BITS]
5f4f0e22 1603 |= ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS));
d7429b6a
RK
1604
1605 /* The stack ptr is used (honorarily) by a CALL insn. */
1606 live[STACK_POINTER_REGNUM / REGSET_ELT_BITS]
5f4f0e22
CH
1607 |= ((REGSET_ELT_TYPE) 1
1608 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS));
d7429b6a
RK
1609
1610 /* Calls may also reference any of the global registers,
1611 so they are made live. */
d7429b6a
RK
1612 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1613 if (global_regs[i])
9b316aa2
RK
1614 mark_used_regs (old, live,
1615 gen_rtx (REG, reg_raw_mode[i], i),
1616 final, insn);
d7429b6a
RK
1617
1618 /* Calls also clobber memory. */
1619 last_mem_set = 0;
1620 }
1621
1622 /* Update OLD for the registers used or set. */
1623 for (i = 0; i < regset_size; i++)
1624 {
1625 old[i] &= ~dead[i];
1626 old[i] |= live[i];
1627 }
1628
1629 if (GET_CODE (insn) == CALL_INSN && final)
1630 {
1631 /* Any regs live at the time of a call instruction
1632 must not go in a register clobbered by calls.
1633 Find all regs now live and record this for them. */
1634
5a13dfdd 1635 register struct sometimes *p = regs_sometimes_live;
d7429b6a
RK
1636
1637 for (i = 0; i < sometimes_max; i++, p++)
efb07da7 1638 if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit))
d7429b6a
RK
1639 reg_n_calls_crossed[p->offset * REGSET_ELT_BITS + p->bit]+= 1;
1640 }
1641 }
1642
1643 /* On final pass, add any additional sometimes-live regs
1644 into MAXLIVE and REGS_SOMETIMES_LIVE.
1645 Also update counts of how many insns each reg is live at. */
1646
1647 if (final)
1648 {
1649 for (i = 0; i < regset_size; i++)
1650 {
5f4f0e22 1651 register REGSET_ELT_TYPE diff = live[i] & ~maxlive[i];
d7429b6a
RK
1652
1653 if (diff)
1654 {
1655 register int regno;
1656 maxlive[i] |= diff;
1657 for (regno = 0; diff && regno < REGSET_ELT_BITS; regno++)
5f4f0e22 1658 if (diff & ((REGSET_ELT_TYPE) 1 << regno))
d7429b6a
RK
1659 {
1660 regs_sometimes_live[sometimes_max].offset = i;
1661 regs_sometimes_live[sometimes_max].bit = regno;
5f4f0e22 1662 diff &= ~ ((REGSET_ELT_TYPE) 1 << regno);
d7429b6a
RK
1663 sometimes_max++;
1664 }
1665 }
1666 }
1667
1668 {
5a13dfdd 1669 register struct sometimes *p = regs_sometimes_live;
d7429b6a
RK
1670 for (i = 0; i < sometimes_max; i++, p++)
1671 {
5f4f0e22 1672 if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit))
d7429b6a
RK
1673 reg_live_length[p->offset * REGSET_ELT_BITS + p->bit]++;
1674 }
1675 }
1676 }
1677 }
1678 flushed: ;
1679 if (insn == first)
1680 break;
1681 }
1682
1683 if (num_scratch > max_scratch)
1684 max_scratch = num_scratch;
1685}
1686\f
1687/* Return 1 if X (the body of an insn, or part of it) is just dead stores
1688 (SET expressions whose destinations are registers dead after the insn).
1689 NEEDED is the regset that says which regs are alive after the insn.
1690
1691 Unless CALL_OK is non-zero, an insn is needed if it contains a CALL. */
1692
1693static int
1694insn_dead_p (x, needed, call_ok)
1695 rtx x;
1696 regset needed;
1697 int call_ok;
1698{
1699 register RTX_CODE code = GET_CODE (x);
1700 /* If setting something that's a reg or part of one,
1701 see if that register's altered value will be live. */
1702
1703 if (code == SET)
1704 {
1705 register rtx r = SET_DEST (x);
1706 /* A SET that is a subroutine call cannot be dead. */
1707 if (! call_ok && GET_CODE (SET_SRC (x)) == CALL)
1708 return 0;
1709
1710#ifdef HAVE_cc0
1711 if (GET_CODE (r) == CC0)
1712 return ! cc0_live;
1713#endif
1714
1715 if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r)
1716 && rtx_equal_p (r, last_mem_set))
1717 return 1;
1718
1719 while (GET_CODE (r) == SUBREG
1720 || GET_CODE (r) == STRICT_LOW_PART
1721 || GET_CODE (r) == ZERO_EXTRACT
1722 || GET_CODE (r) == SIGN_EXTRACT)
1723 r = SUBREG_REG (r);
1724
1725 if (GET_CODE (r) == REG)
1726 {
1727 register int regno = REGNO (r);
1728 register int offset = regno / REGSET_ELT_BITS;
5f4f0e22
CH
1729 register REGSET_ELT_TYPE bit
1730 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
d7429b6a 1731
d8c8b8e3 1732 /* Don't delete insns to set global regs. */
d7429b6a
RK
1733 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1734 /* Make sure insns to set frame pointer aren't deleted. */
1735 || regno == FRAME_POINTER_REGNUM
73a187c1
DE
1736#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1737 || regno == HARD_FRAME_POINTER_REGNUM
1738#endif
d7e4fe8b
RS
1739#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1740 /* Make sure insns to set arg pointer are never deleted
1741 (if the arg pointer isn't fixed, there will be a USE for
1742 it, so we can treat it normally). */
1743 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
1744#endif
d7429b6a
RK
1745 || (needed[offset] & bit) != 0)
1746 return 0;
1747
1748 /* If this is a hard register, verify that subsequent words are
1749 not needed. */
1750 if (regno < FIRST_PSEUDO_REGISTER)
1751 {
1752 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
1753
1754 while (--n > 0)
1755 if ((needed[(regno + n) / REGSET_ELT_BITS]
5f4f0e22
CH
1756 & ((REGSET_ELT_TYPE) 1
1757 << ((regno + n) % REGSET_ELT_BITS))) != 0)
d7429b6a
RK
1758 return 0;
1759 }
1760
1761 return 1;
1762 }
1763 }
1764 /* If performing several activities,
1765 insn is dead if each activity is individually dead.
1766 Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
1767 that's inside a PARALLEL doesn't make the insn worth keeping. */
1768 else if (code == PARALLEL)
1769 {
1770 register int i = XVECLEN (x, 0);
1771 for (i--; i >= 0; i--)
1772 {
1773 rtx elt = XVECEXP (x, 0, i);
1774 if (!insn_dead_p (elt, needed, call_ok)
1775 && GET_CODE (elt) != CLOBBER
1776 && GET_CODE (elt) != USE)
1777 return 0;
1778 }
1779 return 1;
1780 }
1781 /* We do not check CLOBBER or USE here.
1782 An insn consisting of just a CLOBBER or just a USE
1783 should not be deleted. */
1784 return 0;
1785}
1786
1787/* If X is the pattern of the last insn in a libcall, and assuming X is dead,
1788 return 1 if the entire library call is dead.
1789 This is true if X copies a register (hard or pseudo)
1790 and if the hard return reg of the call insn is dead.
1791 (The caller should have tested the destination of X already for death.)
1792
1793 If this insn doesn't just copy a register, then we don't
1794 have an ordinary libcall. In that case, cse could not have
1795 managed to substitute the source for the dest later on,
1796 so we can assume the libcall is dead.
1797
1798 NEEDED is the bit vector of pseudoregs live before this insn.
1799 NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */
1800
1801static int
1802libcall_dead_p (x, needed, note, insn)
1803 rtx x;
1804 regset needed;
1805 rtx note;
1806 rtx insn;
1807{
1808 register RTX_CODE code = GET_CODE (x);
1809
1810 if (code == SET)
1811 {
1812 register rtx r = SET_SRC (x);
1813 if (GET_CODE (r) == REG)
1814 {
1815 rtx call = XEXP (note, 0);
1816 register int i;
1817
1818 /* Find the call insn. */
1819 while (call != insn && GET_CODE (call) != CALL_INSN)
1820 call = NEXT_INSN (call);
1821
1822 /* If there is none, do nothing special,
1823 since ordinary death handling can understand these insns. */
1824 if (call == insn)
1825 return 0;
1826
1827 /* See if the hard reg holding the value is dead.
1828 If this is a PARALLEL, find the call within it. */
1829 call = PATTERN (call);
1830 if (GET_CODE (call) == PARALLEL)
1831 {
1832 for (i = XVECLEN (call, 0) - 1; i >= 0; i--)
1833 if (GET_CODE (XVECEXP (call, 0, i)) == SET
1834 && GET_CODE (SET_SRC (XVECEXP (call, 0, i))) == CALL)
1835 break;
1836
761a5bcd
JW
1837 /* This may be a library call that is returning a value
1838 via invisible pointer. Do nothing special, since
1839 ordinary death handling can understand these insns. */
d7429b6a 1840 if (i < 0)
761a5bcd 1841 return 0;
d7429b6a
RK
1842
1843 call = XVECEXP (call, 0, i);
1844 }
1845
1846 return insn_dead_p (call, needed, 1);
1847 }
1848 }
1849 return 1;
1850}
1851
1852/* Return 1 if register REGNO was used before it was set.
944e5f77
RS
1853 In other words, if it is live at function entry.
1854 Don't count global regster variables, though. */
d7429b6a
RK
1855
1856int
1857regno_uninitialized (regno)
1858 int regno;
1859{
b0b7b46a
RS
1860 if (n_basic_blocks == 0
1861 || (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
d7429b6a
RK
1862 return 0;
1863
1864 return (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
5f4f0e22 1865 & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS)));
d7429b6a
RK
1866}
1867
1868/* 1 if register REGNO was alive at a place where `setjmp' was called
1869 and was set more than once or is an argument.
1870 Such regs may be clobbered by `longjmp'. */
1871
1872int
1873regno_clobbered_at_setjmp (regno)
1874 int regno;
1875{
1876 if (n_basic_blocks == 0)
1877 return 0;
1878
1879 return ((reg_n_sets[regno] > 1
1880 || (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
5f4f0e22 1881 & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))))
d7429b6a 1882 && (regs_live_at_setjmp[regno / REGSET_ELT_BITS]
5f4f0e22 1883 & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))));
d7429b6a
RK
1884}
1885\f
1886/* Process the registers that are set within X.
1887 Their bits are set to 1 in the regset DEAD,
1888 because they are dead prior to this insn.
1889
1890 If INSN is nonzero, it is the insn being processed
1891 and the fact that it is nonzero implies this is the FINAL pass
1892 in propagate_block. In this case, various info about register
1893 usage is stored, LOG_LINKS fields of insns are set up. */
1894
d7429b6a
RK
1895static void
1896mark_set_regs (needed, dead, x, insn, significant)
1897 regset needed;
1898 regset dead;
1899 rtx x;
1900 rtx insn;
1901 regset significant;
1902{
1903 register RTX_CODE code = GET_CODE (x);
1904
1905 if (code == SET || code == CLOBBER)
1906 mark_set_1 (needed, dead, x, insn, significant);
1907 else if (code == PARALLEL)
1908 {
1909 register int i;
1910 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1911 {
1912 code = GET_CODE (XVECEXP (x, 0, i));
1913 if (code == SET || code == CLOBBER)
1914 mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
1915 }
1916 }
1917}
1918
1919/* Process a single SET rtx, X. */
1920
1921static void
1922mark_set_1 (needed, dead, x, insn, significant)
1923 regset needed;
1924 regset dead;
1925 rtx x;
1926 rtx insn;
1927 regset significant;
1928{
1929 register int regno;
1930 register rtx reg = SET_DEST (x);
1931
1932 /* Modifying just one hardware register of a multi-reg value
1933 or just a byte field of a register
1934 does not mean the value from before this insn is now dead.
1935 But it does mean liveness of that register at the end of the block
1936 is significant.
1937
1938 Within mark_set_1, however, we treat it as if the register is
1939 indeed modified. mark_used_regs will, however, also treat this
1940 register as being used. Thus, we treat these insns as setting a
1941 new value for the register as a function of its old value. This
1942 cases LOG_LINKS to be made appropriately and this will help combine. */
1943
1944 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
1945 || GET_CODE (reg) == SIGN_EXTRACT
1946 || GET_CODE (reg) == STRICT_LOW_PART)
1947 reg = XEXP (reg, 0);
1948
1949 /* If we are writing into memory or into a register mentioned in the
1950 address of the last thing stored into memory, show we don't know
1951 what the last store was. If we are writing memory, save the address
1952 unless it is volatile. */
1953 if (GET_CODE (reg) == MEM
1954 || (GET_CODE (reg) == REG
1955 && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set)))
1956 last_mem_set = 0;
1957
1958 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
1959 /* There are no REG_INC notes for SP, so we can't assume we'll see
1960 everything that invalidates it. To be safe, don't eliminate any
1961 stores though SP; none of them should be redundant anyway. */
1962 && ! reg_mentioned_p (stack_pointer_rtx, reg))
1963 last_mem_set = reg;
1964
1965 if (GET_CODE (reg) == REG
1966 && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
1967#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1968 && regno != HARD_FRAME_POINTER_REGNUM
1969#endif
d7e4fe8b
RS
1970#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1971 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
1972#endif
d7429b6a
RK
1973 && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
1974 /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
1975 {
1976 register int offset = regno / REGSET_ELT_BITS;
5f4f0e22
CH
1977 register REGSET_ELT_TYPE bit
1978 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
1979 REGSET_ELT_TYPE all_needed = (needed[offset] & bit);
1980 REGSET_ELT_TYPE some_needed = (needed[offset] & bit);
d7429b6a
RK
1981
1982 /* Mark it as a significant register for this basic block. */
1983 if (significant)
1984 significant[offset] |= bit;
1985
1986 /* Mark it as as dead before this insn. */
1987 dead[offset] |= bit;
1988
1989 /* A hard reg in a wide mode may really be multiple registers.
1990 If so, mark all of them just like the first. */
1991 if (regno < FIRST_PSEUDO_REGISTER)
1992 {
1993 int n;
1994
1995 /* Nothing below is needed for the stack pointer; get out asap.
1996 Eg, log links aren't needed, since combine won't use them. */
1997 if (regno == STACK_POINTER_REGNUM)
1998 return;
1999
2000 n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
2001 while (--n > 0)
2002 {
2003 if (significant)
2004 significant[(regno + n) / REGSET_ELT_BITS]
5f4f0e22 2005 |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS);
d7429b6a 2006 dead[(regno + n) / REGSET_ELT_BITS]
5f4f0e22
CH
2007 |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS);
2008 some_needed
2009 |= (needed[(regno + n) / REGSET_ELT_BITS]
2010 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
2011 all_needed
2012 &= (needed[(regno + n) / REGSET_ELT_BITS]
2013 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
d7429b6a
RK
2014 }
2015 }
2016 /* Additional data to record if this is the final pass. */
2017 if (insn)
2018 {
2019 register rtx y = reg_next_use[regno];
2020 register int blocknum = BLOCK_NUM (insn);
2021
6d9efc7b
RS
2022 /* The next use is no longer "next", since a store intervenes. */
2023 reg_next_use[regno] = 0;
2024
d7429b6a
RK
2025 /* If this is a hard reg, record this function uses the reg. */
2026
2027 if (regno < FIRST_PSEUDO_REGISTER)
2028 {
2029 register int i;
2030 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
2031
2032 for (i = regno; i < endregno; i++)
2033 {
2034 regs_ever_live[i] = 1;
2035 reg_n_sets[i]++;
2036 }
2037 }
2038 else
2039 {
2040 /* Keep track of which basic blocks each reg appears in. */
2041
2042 if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN)
2043 reg_basic_block[regno] = blocknum;
2044 else if (reg_basic_block[regno] != blocknum)
2045 reg_basic_block[regno] = REG_BLOCK_GLOBAL;
2046
2047 /* Count (weighted) references, stores, etc. This counts a
2048 register twice if it is modified, but that is correct. */
2049 reg_n_sets[regno]++;
2050
2051 reg_n_refs[regno] += loop_depth;
2052
2053 /* The insns where a reg is live are normally counted
2054 elsewhere, but we want the count to include the insn
2055 where the reg is set, and the normal counting mechanism
2056 would not count it. */
2057 reg_live_length[regno]++;
2058 }
2059
d7429b6a
RK
2060 if (all_needed)
2061 {
2062 /* Make a logical link from the next following insn
2063 that uses this register, back to this insn.
2064 The following insns have already been processed.
2065
2066 We don't build a LOG_LINK for hard registers containing
2067 in ASM_OPERANDs. If these registers get replaced,
2068 we might wind up changing the semantics of the insn,
2069 even if reload can make what appear to be valid assignments
2070 later. */
2071 if (y && (BLOCK_NUM (y) == blocknum)
2072 && (regno >= FIRST_PSEUDO_REGISTER
2073 || asm_noperands (PATTERN (y)) < 0))
2074 LOG_LINKS (y)
2075 = gen_rtx (INSN_LIST, VOIDmode, insn, LOG_LINKS (y));
2076 }
2077 else if (! some_needed)
2078 {
2079 /* Note that dead stores have already been deleted when possible
2080 If we get here, we have found a dead store that cannot
2081 be eliminated (because the same insn does something useful).
2082 Indicate this by marking the reg being set as dying here. */
2083 REG_NOTES (insn)
2084 = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn));
2085 reg_n_deaths[REGNO (reg)]++;
2086 }
2087 else
2088 {
2089 /* This is a case where we have a multi-word hard register
2090 and some, but not all, of the words of the register are
2091 needed in subsequent insns. Write REG_UNUSED notes
2092 for those parts that were not needed. This case should
2093 be rare. */
2094
2095 int i;
2096
2097 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
2098 i >= 0; i--)
2099 if ((needed[(regno + i) / REGSET_ELT_BITS]
5f4f0e22
CH
2100 & ((REGSET_ELT_TYPE) 1
2101 << ((regno + i) % REGSET_ELT_BITS))) == 0)
d7429b6a
RK
2102 REG_NOTES (insn)
2103 = gen_rtx (EXPR_LIST, REG_UNUSED,
04227afa
DE
2104 gen_rtx (REG, reg_raw_mode[regno + i],
2105 regno + i),
d7429b6a
RK
2106 REG_NOTES (insn));
2107 }
2108 }
2109 }
8244fc4f
RS
2110 else if (GET_CODE (reg) == REG)
2111 reg_next_use[regno] = 0;
d7429b6a
RK
2112
2113 /* If this is the last pass and this is a SCRATCH, show it will be dying
2114 here and count it. */
2115 else if (GET_CODE (reg) == SCRATCH && insn != 0)
2116 {
2117 REG_NOTES (insn)
2118 = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn));
2119 num_scratch++;
2120 }
2121}
2122\f
2123#ifdef AUTO_INC_DEC
2124
2125/* X is a MEM found in INSN. See if we can convert it into an auto-increment
2126 reference. */
2127
2128static void
2129find_auto_inc (needed, x, insn)
2130 regset needed;
2131 rtx x;
2132 rtx insn;
2133{
2134 rtx addr = XEXP (x, 0);
e658434c 2135 HOST_WIDE_INT offset = 0;
05ed5d57 2136 rtx set;
d7429b6a
RK
2137
2138 /* Here we detect use of an index register which might be good for
2139 postincrement, postdecrement, preincrement, or predecrement. */
2140
2141 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2142 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
2143
2144 if (GET_CODE (addr) == REG)
2145 {
2146 register rtx y;
2147 register int size = GET_MODE_SIZE (GET_MODE (x));
2148 rtx use;
2149 rtx incr;
2150 int regno = REGNO (addr);
2151
2152 /* Is the next use an increment that might make auto-increment? */
05ed5d57
RK
2153 if ((incr = reg_next_use[regno]) != 0
2154 && (set = single_set (incr)) != 0
2155 && GET_CODE (set) == SET
d7429b6a
RK
2156 && BLOCK_NUM (incr) == BLOCK_NUM (insn)
2157 /* Can't add side effects to jumps; if reg is spilled and
2158 reloaded, there's no way to store back the altered value. */
2159 && GET_CODE (insn) != JUMP_INSN
05ed5d57 2160 && (y = SET_SRC (set), GET_CODE (y) == PLUS)
d7429b6a
RK
2161 && XEXP (y, 0) == addr
2162 && GET_CODE (XEXP (y, 1)) == CONST_INT
2163 && (0
2164#ifdef HAVE_POST_INCREMENT
2165 || (INTVAL (XEXP (y, 1)) == size && offset == 0)
2166#endif
2167#ifdef HAVE_POST_DECREMENT
2168 || (INTVAL (XEXP (y, 1)) == - size && offset == 0)
2169#endif
2170#ifdef HAVE_PRE_INCREMENT
2171 || (INTVAL (XEXP (y, 1)) == size && offset == size)
2172#endif
2173#ifdef HAVE_PRE_DECREMENT
2174 || (INTVAL (XEXP (y, 1)) == - size && offset == - size)
2175#endif
2176 )
2177 /* Make sure this reg appears only once in this insn. */
2178 && (use = find_use_as_address (PATTERN (insn), addr, offset),
2179 use != 0 && use != (rtx) 1))
2180 {
05ed5d57 2181 rtx q = SET_DEST (set);
7280c2a4
RK
2182 enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size
2183 ? (offset ? PRE_INC : POST_INC)
2184 : (offset ? PRE_DEC : POST_DEC));
d7429b6a
RK
2185
2186 if (dead_or_set_p (incr, addr))
7280c2a4
RK
2187 {
2188 /* This is the simple case. Try to make the auto-inc. If
2189 we can't, we are done. Otherwise, we will do any
2190 needed updates below. */
2191 if (! validate_change (insn, &XEXP (x, 0),
2192 gen_rtx (inc_code, Pmode, addr),
2193 0))
2194 return;
2195 }
5175ad37
DE
2196 else if (GET_CODE (q) == REG
2197 /* PREV_INSN used here to check the semi-open interval
2198 [insn,incr). */
2199 && ! reg_used_between_p (q, PREV_INSN (insn), incr))
d7429b6a 2200 {
5175ad37 2201 /* We have *p followed sometime later by q = p+size.
d7429b6a 2202 Both p and q must be live afterward,
5175ad37 2203 and q is not used between INSN and it's assignment.
d7429b6a
RK
2204 Change it to q = p, ...*q..., q = q+size.
2205 Then fall into the usual case. */
2206 rtx insns, temp;
2207
2208 start_sequence ();
2209 emit_move_insn (q, addr);
2210 insns = get_insns ();
2211 end_sequence ();
2212
2213 /* If anything in INSNS have UID's that don't fit within the
2214 extra space we allocate earlier, we can't make this auto-inc.
2215 This should never happen. */
2216 for (temp = insns; temp; temp = NEXT_INSN (temp))
2217 {
2218 if (INSN_UID (temp) > max_uid_for_flow)
2219 return;
2220 BLOCK_NUM (temp) = BLOCK_NUM (insn);
2221 }
2222
7280c2a4
RK
2223 /* If we can't make the auto-inc, or can't make the
2224 replacement into Y, exit. There's no point in making
2225 the change below if we can't do the auto-inc and doing
2226 so is not correct in the pre-inc case. */
2227
2228 validate_change (insn, &XEXP (x, 0),
2229 gen_rtx (inc_code, Pmode, q),
2230 1);
2231 validate_change (incr, &XEXP (y, 0), q, 1);
2232 if (! apply_change_group ())
2233 return;
2234
2235 /* We now know we'll be doing this change, so emit the
2236 new insn(s) and do the updates. */
d7429b6a 2237 emit_insns_before (insns, insn);
e8b641a1
RK
2238
2239 if (basic_block_head[BLOCK_NUM (insn)] == insn)
2240 basic_block_head[BLOCK_NUM (insn)] = insns;
2241
d7429b6a
RK
2242 /* INCR will become a NOTE and INSN won't contain a
2243 use of ADDR. If a use of ADDR was just placed in
2244 the insn before INSN, make that the next use.
2245 Otherwise, invalidate it. */
2246 if (GET_CODE (PREV_INSN (insn)) == INSN
2247 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
2248 && SET_SRC (PATTERN (PREV_INSN (insn))) == addr)
2249 reg_next_use[regno] = PREV_INSN (insn);
2250 else
2251 reg_next_use[regno] = 0;
2252
2253 addr = q;
2254 regno = REGNO (q);
d7429b6a
RK
2255
2256 /* REGNO is now used in INCR which is below INSN, but
2257 it previously wasn't live here. If we don't mark
2258 it as needed, we'll put a REG_DEAD note for it
2259 on this insn, which is incorrect. */
2260 needed[regno / REGSET_ELT_BITS]
5f4f0e22 2261 |= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
d7429b6a
RK
2262
2263 /* If there are any calls between INSN and INCR, show
2264 that REGNO now crosses them. */
2265 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
2266 if (GET_CODE (temp) == CALL_INSN)
2267 reg_n_calls_crossed[regno]++;
2268 }
02df8aba
RK
2269 else
2270 return;
d7429b6a 2271
7280c2a4
RK
2272 /* If we haven't returned, it means we were able to make the
2273 auto-inc, so update the status. First, record that this insn
2274 has an implicit side effect. */
2275
2276 REG_NOTES (insn)
2277 = gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn));
2278
2279 /* Modify the old increment-insn to simply copy
2280 the already-incremented value of our register. */
2281 if (! validate_change (incr, &SET_SRC (set), addr, 0))
2282 abort ();
2283
2284 /* If that makes it a no-op (copying the register into itself) delete
2285 it so it won't appear to be a "use" and a "set" of this
2286 register. */
2287 if (SET_DEST (set) == addr)
d7429b6a 2288 {
7280c2a4
RK
2289 PUT_CODE (incr, NOTE);
2290 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
2291 NOTE_SOURCE_FILE (incr) = 0;
2292 }
d7429b6a 2293
7280c2a4
RK
2294 if (regno >= FIRST_PSEUDO_REGISTER)
2295 {
2296 /* Count an extra reference to the reg. When a reg is
2297 incremented, spilling it is worse, so we want to make
2298 that less likely. */
2299 reg_n_refs[regno] += loop_depth;
2300
2301 /* Count the increment as a setting of the register,
2302 even though it isn't a SET in rtl. */
2303 reg_n_sets[regno]++;
d7429b6a
RK
2304 }
2305 }
2306 }
2307}
2308#endif /* AUTO_INC_DEC */
2309\f
2310/* Scan expression X and store a 1-bit in LIVE for each reg it uses.
2311 This is done assuming the registers needed from X
2312 are those that have 1-bits in NEEDED.
2313
2314 On the final pass, FINAL is 1. This means try for autoincrement
2315 and count the uses and deaths of each pseudo-reg.
2316
2317 INSN is the containing instruction. If INSN is dead, this function is not
2318 called. */
2319
2320static void
2321mark_used_regs (needed, live, x, final, insn)
2322 regset needed;
2323 regset live;
2324 rtx x;
d7429b6a 2325 int final;
e658434c 2326 rtx insn;
d7429b6a
RK
2327{
2328 register RTX_CODE code;
2329 register int regno;
2330 int i;
2331
2332 retry:
2333 code = GET_CODE (x);
2334 switch (code)
2335 {
2336 case LABEL_REF:
2337 case SYMBOL_REF:
2338 case CONST_INT:
2339 case CONST:
2340 case CONST_DOUBLE:
2341 case PC:
d7429b6a
RK
2342 case ADDR_VEC:
2343 case ADDR_DIFF_VEC:
2344 case ASM_INPUT:
2345 return;
2346
2347#ifdef HAVE_cc0
2348 case CC0:
2349 cc0_live = 1;
2350 return;
2351#endif
2352
2f1553a4
RK
2353 case CLOBBER:
2354 /* If we are clobbering a MEM, mark any registers inside the address
2355 as being used. */
2356 if (GET_CODE (XEXP (x, 0)) == MEM)
2357 mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn);
2358 return;
2359
d7429b6a
RK
2360 case MEM:
2361 /* Invalidate the data for the last MEM stored. We could do this only
2362 if the addresses conflict, but this doesn't seem worthwhile. */
2363 last_mem_set = 0;
2364
2365#ifdef AUTO_INC_DEC
2366 if (final)
2367 find_auto_inc (needed, x, insn);
2368#endif
2369 break;
2370
80f8f04a
RK
2371 case SUBREG:
2372 if (GET_CODE (SUBREG_REG (x)) == REG
2373 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
2374 && (GET_MODE_SIZE (GET_MODE (x))
5638ef0d
RK
2375 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
2376 && (INTEGRAL_MODE_P (GET_MODE (x))
2377 || INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x)))))
80f8f04a
RK
2378 reg_changes_size[REGNO (SUBREG_REG (x))] = 1;
2379
2380 /* While we're here, optimize this case. */
2381 x = SUBREG_REG (x);
2382
2383 /* ... fall through ... */
2384
d7429b6a
RK
2385 case REG:
2386 /* See a register other than being set
2387 => mark it as needed. */
2388
2389 regno = REGNO (x);
2390 {
2391 register int offset = regno / REGSET_ELT_BITS;
5f4f0e22
CH
2392 register REGSET_ELT_TYPE bit
2393 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
26300dcd
RK
2394 REGSET_ELT_TYPE all_needed = needed[offset] & bit;
2395 REGSET_ELT_TYPE some_needed = needed[offset] & bit;
d7429b6a
RK
2396
2397 live[offset] |= bit;
2398 /* A hard reg in a wide mode may really be multiple registers.
2399 If so, mark all of them just like the first. */
2400 if (regno < FIRST_PSEUDO_REGISTER)
2401 {
2402 int n;
2403
d7e4fe8b 2404 /* For stack ptr or fixed arg pointer,
d7429b6a
RK
2405 nothing below can be necessary, so waste no more time. */
2406 if (regno == STACK_POINTER_REGNUM
73a187c1
DE
2407#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2408 || regno == HARD_FRAME_POINTER_REGNUM
2409#endif
d7e4fe8b
RS
2410#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2411 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2412#endif
d7429b6a
RK
2413 || regno == FRAME_POINTER_REGNUM)
2414 {
2415 /* If this is a register we are going to try to eliminate,
2416 don't mark it live here. If we are successful in
2417 eliminating it, it need not be live unless it is used for
2418 pseudos, in which case it will have been set live when
2419 it was allocated to the pseudos. If the register will not
2420 be eliminated, reload will set it live at that point. */
2421
2422 if (! TEST_HARD_REG_BIT (elim_reg_set, regno))
2423 regs_ever_live[regno] = 1;
2424 return;
2425 }
2426 /* No death notes for global register variables;
2427 their values are live after this function exits. */
2428 if (global_regs[regno])
d8c8b8e3
RS
2429 {
2430 if (final)
2431 reg_next_use[regno] = insn;
2432 return;
2433 }
d7429b6a
RK
2434
2435 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
2436 while (--n > 0)
2437 {
2438 live[(regno + n) / REGSET_ELT_BITS]
5f4f0e22
CH
2439 |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS);
2440 some_needed
2441 |= (needed[(regno + n) / REGSET_ELT_BITS]
2442 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
2443 all_needed
2444 &= (needed[(regno + n) / REGSET_ELT_BITS]
2445 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
d7429b6a
RK
2446 }
2447 }
2448 if (final)
2449 {
2450 /* Record where each reg is used, so when the reg
2451 is set we know the next insn that uses it. */
2452
2453 reg_next_use[regno] = insn;
2454
2455 if (regno < FIRST_PSEUDO_REGISTER)
2456 {
2457 /* If a hard reg is being used,
2458 record that this function does use it. */
2459
2460 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
2461 if (i == 0)
2462 i = 1;
2463 do
2464 regs_ever_live[regno + --i] = 1;
2465 while (i > 0);
2466 }
2467 else
2468 {
2469 /* Keep track of which basic block each reg appears in. */
2470
2471 register int blocknum = BLOCK_NUM (insn);
2472
2473 if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN)
2474 reg_basic_block[regno] = blocknum;
2475 else if (reg_basic_block[regno] != blocknum)
2476 reg_basic_block[regno] = REG_BLOCK_GLOBAL;
2477
2478 /* Count (weighted) number of uses of each reg. */
2479
2480 reg_n_refs[regno] += loop_depth;
2481 }
2482
2483 /* Record and count the insns in which a reg dies.
2484 If it is used in this insn and was dead below the insn
2485 then it dies in this insn. If it was set in this insn,
2486 we do not make a REG_DEAD note; likewise if we already
2487 made such a note. */
2488
2489 if (! all_needed
2490 && ! dead_or_set_p (insn, x)
2491#if 0
2492 && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
2493#endif
2494 )
2495 {
ab28041e
JW
2496 /* Check for the case where the register dying partially
2497 overlaps the register set by this insn. */
2498 if (regno < FIRST_PSEUDO_REGISTER
2499 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
2500 {
480eac3b 2501 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
ab28041e
JW
2502 while (--n >= 0)
2503 some_needed |= dead_or_set_regno_p (insn, regno + n);
2504 }
2505
d7429b6a
RK
2506 /* If none of the words in X is needed, make a REG_DEAD
2507 note. Otherwise, we must make partial REG_DEAD notes. */
2508 if (! some_needed)
2509 {
2510 REG_NOTES (insn)
2511 = gen_rtx (EXPR_LIST, REG_DEAD, x, REG_NOTES (insn));
2512 reg_n_deaths[regno]++;
2513 }
2514 else
2515 {
2516 int i;
2517
2518 /* Don't make a REG_DEAD note for a part of a register
2519 that is set in the insn. */
2520
2521 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
2522 i >= 0; i--)
2523 if ((needed[(regno + i) / REGSET_ELT_BITS]
5f4f0e22
CH
2524 & ((REGSET_ELT_TYPE) 1
2525 << ((regno + i) % REGSET_ELT_BITS))) == 0
d7429b6a
RK
2526 && ! dead_or_set_regno_p (insn, regno + i))
2527 REG_NOTES (insn)
2528 = gen_rtx (EXPR_LIST, REG_DEAD,
04227afa
DE
2529 gen_rtx (REG, reg_raw_mode[regno + i],
2530 regno + i),
d7429b6a
RK
2531 REG_NOTES (insn));
2532 }
2533 }
2534 }
2535 }
2536 return;
2537
2538 case SET:
2539 {
2540 register rtx testreg = SET_DEST (x);
2541 int mark_dest = 0;
2542
2543 /* If storing into MEM, don't show it as being used. But do
2544 show the address as being used. */
2545 if (GET_CODE (testreg) == MEM)
2546 {
2547#ifdef AUTO_INC_DEC
2548 if (final)
2549 find_auto_inc (needed, testreg, insn);
2550#endif
2551 mark_used_regs (needed, live, XEXP (testreg, 0), final, insn);
2552 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2553 return;
2554 }
2555
2556 /* Storing in STRICT_LOW_PART is like storing in a reg
2557 in that this SET might be dead, so ignore it in TESTREG.
2558 but in some other ways it is like using the reg.
2559
2560 Storing in a SUBREG or a bit field is like storing the entire
2561 register in that if the register's value is not used
2562 then this SET is not needed. */
2563 while (GET_CODE (testreg) == STRICT_LOW_PART
2564 || GET_CODE (testreg) == ZERO_EXTRACT
2565 || GET_CODE (testreg) == SIGN_EXTRACT
2566 || GET_CODE (testreg) == SUBREG)
2567 {
2568 /* Modifying a single register in an alternate mode
2569 does not use any of the old value. But these other
2570 ways of storing in a register do use the old value. */
2571 if (GET_CODE (testreg) == SUBREG
2572 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
2573 ;
2574 else
2575 mark_dest = 1;
2576
2577 testreg = XEXP (testreg, 0);
2578 }
2579
2580 /* If this is a store into a register,
2581 recursively scan the value being stored. */
2582
2583 if (GET_CODE (testreg) == REG
2584 && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
2585#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2586 && regno != HARD_FRAME_POINTER_REGNUM
2587#endif
d7e4fe8b
RS
2588#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2589 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2590#endif
d8c8b8e3
RS
2591 )
2592 /* We used to exclude global_regs here, but that seems wrong.
2593 Storing in them is like storing in mem. */
d7429b6a
RK
2594 {
2595 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2596 if (mark_dest)
2597 mark_used_regs (needed, live, SET_DEST (x), final, insn);
2598 return;
2599 }
2600 }
2601 break;
2602
2603 case RETURN:
2604 /* If exiting needs the right stack value, consider this insn as
2605 using the stack pointer. In any event, consider it as using
2606 all global registers. */
2607
2608#ifdef EXIT_IGNORE_STACK
2609 if (! EXIT_IGNORE_STACK
2610 || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer))
2611#endif
2612 live[STACK_POINTER_REGNUM / REGSET_ELT_BITS]
5f4f0e22 2613 |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
d7429b6a
RK
2614
2615 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2616 if (global_regs[i])
5f4f0e22
CH
2617 live[i / REGSET_ELT_BITS]
2618 |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
d7429b6a
RK
2619 break;
2620 }
2621
2622 /* Recursively scan the operands of this expression. */
2623
2624 {
2625 register char *fmt = GET_RTX_FORMAT (code);
2626 register int i;
2627
2628 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2629 {
2630 if (fmt[i] == 'e')
2631 {
2632 /* Tail recursive case: save a function call level. */
2633 if (i == 0)
2634 {
2635 x = XEXP (x, 0);
2636 goto retry;
2637 }
2638 mark_used_regs (needed, live, XEXP (x, i), final, insn);
2639 }
2640 else if (fmt[i] == 'E')
2641 {
2642 register int j;
2643 for (j = 0; j < XVECLEN (x, i); j++)
2644 mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
2645 }
2646 }
2647 }
2648}
2649\f
2650#ifdef AUTO_INC_DEC
2651
2652static int
2653try_pre_increment_1 (insn)
2654 rtx insn;
2655{
2656 /* Find the next use of this reg. If in same basic block,
2657 make it do pre-increment or pre-decrement if appropriate. */
2658 rtx x = PATTERN (insn);
5f4f0e22 2659 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
d7429b6a
RK
2660 * INTVAL (XEXP (SET_SRC (x), 1)));
2661 int regno = REGNO (SET_DEST (x));
2662 rtx y = reg_next_use[regno];
2663 if (y != 0
2664 && BLOCK_NUM (y) == BLOCK_NUM (insn)
89861c38
RK
2665 /* Don't do this if the reg dies, or gets set in y; a standard addressing
2666 mode would be better. */
2667 && ! dead_or_set_p (y, SET_DEST (x))
d7429b6a
RK
2668 && try_pre_increment (y, SET_DEST (PATTERN (insn)),
2669 amount))
2670 {
2671 /* We have found a suitable auto-increment
2672 and already changed insn Y to do it.
2673 So flush this increment-instruction. */
2674 PUT_CODE (insn, NOTE);
2675 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2676 NOTE_SOURCE_FILE (insn) = 0;
2677 /* Count a reference to this reg for the increment
2678 insn we are deleting. When a reg is incremented.
2679 spilling it is worse, so we want to make that
2680 less likely. */
2681 if (regno >= FIRST_PSEUDO_REGISTER)
2682 {
2683 reg_n_refs[regno] += loop_depth;
2684 reg_n_sets[regno]++;
2685 }
2686 return 1;
2687 }
2688 return 0;
2689}
2690
2691/* Try to change INSN so that it does pre-increment or pre-decrement
2692 addressing on register REG in order to add AMOUNT to REG.
2693 AMOUNT is negative for pre-decrement.
2694 Returns 1 if the change could be made.
2695 This checks all about the validity of the result of modifying INSN. */
2696
2697static int
2698try_pre_increment (insn, reg, amount)
2699 rtx insn, reg;
5f4f0e22 2700 HOST_WIDE_INT amount;
d7429b6a
RK
2701{
2702 register rtx use;
2703
2704 /* Nonzero if we can try to make a pre-increment or pre-decrement.
2705 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
2706 int pre_ok = 0;
2707 /* Nonzero if we can try to make a post-increment or post-decrement.
2708 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
2709 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
2710 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
2711 int post_ok = 0;
2712
2713 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
2714 int do_post = 0;
2715
2716 /* From the sign of increment, see which possibilities are conceivable
2717 on this target machine. */
2718#ifdef HAVE_PRE_INCREMENT
2719 if (amount > 0)
2720 pre_ok = 1;
2721#endif
2722#ifdef HAVE_POST_INCREMENT
2723 if (amount > 0)
2724 post_ok = 1;
2725#endif
2726
2727#ifdef HAVE_PRE_DECREMENT
2728 if (amount < 0)
2729 pre_ok = 1;
2730#endif
2731#ifdef HAVE_POST_DECREMENT
2732 if (amount < 0)
2733 post_ok = 1;
2734#endif
2735
2736 if (! (pre_ok || post_ok))
2737 return 0;
2738
2739 /* It is not safe to add a side effect to a jump insn
2740 because if the incremented register is spilled and must be reloaded
2741 there would be no way to store the incremented value back in memory. */
2742
2743 if (GET_CODE (insn) == JUMP_INSN)
2744 return 0;
2745
2746 use = 0;
2747 if (pre_ok)
2748 use = find_use_as_address (PATTERN (insn), reg, 0);
2749 if (post_ok && (use == 0 || use == (rtx) 1))
2750 {
2751 use = find_use_as_address (PATTERN (insn), reg, -amount);
2752 do_post = 1;
2753 }
2754
2755 if (use == 0 || use == (rtx) 1)
2756 return 0;
2757
2758 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
2759 return 0;
2760
a0fbc3a9
SC
2761 /* See if this combination of instruction and addressing mode exists. */
2762 if (! validate_change (insn, &XEXP (use, 0),
2763 gen_rtx (amount > 0
2764 ? (do_post ? POST_INC : PRE_INC)
2765 : (do_post ? POST_DEC : PRE_DEC),
2766 Pmode, reg), 0))
2767 return 0;
d7429b6a
RK
2768
2769 /* Record that this insn now has an implicit side effect on X. */
2770 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn));
2771 return 1;
2772}
2773
2774#endif /* AUTO_INC_DEC */
2775\f
2776/* Find the place in the rtx X where REG is used as a memory address.
2777 Return the MEM rtx that so uses it.
2778 If PLUSCONST is nonzero, search instead for a memory address equivalent to
2779 (plus REG (const_int PLUSCONST)).
2780
2781 If such an address does not appear, return 0.
2782 If REG appears more than once, or is used other than in such an address,
2783 return (rtx)1. */
2784
2785static rtx
2786find_use_as_address (x, reg, plusconst)
2787 register rtx x;
2788 rtx reg;
e658434c 2789 HOST_WIDE_INT plusconst;
d7429b6a
RK
2790{
2791 enum rtx_code code = GET_CODE (x);
2792 char *fmt = GET_RTX_FORMAT (code);
2793 register int i;
2794 register rtx value = 0;
2795 register rtx tem;
2796
2797 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
2798 return x;
2799
2800 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
2801 && XEXP (XEXP (x, 0), 0) == reg
2802 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2803 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
2804 return x;
2805
2806 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
2807 {
2808 /* If REG occurs inside a MEM used in a bit-field reference,
2809 that is unacceptable. */
2810 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
6fa5c106 2811 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2812 }
2813
2814 if (x == reg)
6fa5c106 2815 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2816
2817 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2818 {
2819 if (fmt[i] == 'e')
2820 {
2821 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
2822 if (value == 0)
2823 value = tem;
2824 else if (tem != 0)
6fa5c106 2825 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2826 }
2827 if (fmt[i] == 'E')
2828 {
2829 register int j;
2830 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2831 {
2832 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
2833 if (value == 0)
2834 value = tem;
2835 else if (tem != 0)
6fa5c106 2836 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2837 }
2838 }
2839 }
2840
2841 return value;
2842}
2843\f
2844/* Write information about registers and basic blocks into FILE.
2845 This is part of making a debugging dump. */
2846
2847void
2848dump_flow_info (file)
2849 FILE *file;
2850{
2851 register int i;
2852 static char *reg_class_names[] = REG_CLASS_NAMES;
2853
2854 fprintf (file, "%d registers.\n", max_regno);
2855
2856 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
2857 if (reg_n_refs[i])
2858 {
e4600702 2859 enum reg_class class, altclass;
d7429b6a
RK
2860 fprintf (file, "\nRegister %d used %d times across %d insns",
2861 i, reg_n_refs[i], reg_live_length[i]);
2862 if (reg_basic_block[i] >= 0)
2863 fprintf (file, " in block %d", reg_basic_block[i]);
2864 if (reg_n_deaths[i] != 1)
2865 fprintf (file, "; dies in %d places", reg_n_deaths[i]);
2866 if (reg_n_calls_crossed[i] == 1)
2867 fprintf (file, "; crosses 1 call");
2868 else if (reg_n_calls_crossed[i])
2869 fprintf (file, "; crosses %d calls", reg_n_calls_crossed[i]);
2870 if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
2871 fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
2872 class = reg_preferred_class (i);
e4600702
RK
2873 altclass = reg_alternate_class (i);
2874 if (class != GENERAL_REGS || altclass != ALL_REGS)
d7429b6a 2875 {
e4600702
RK
2876 if (altclass == ALL_REGS || class == ALL_REGS)
2877 fprintf (file, "; pref %s", reg_class_names[(int) class]);
2878 else if (altclass == NO_REGS)
d7429b6a
RK
2879 fprintf (file, "; %s or none", reg_class_names[(int) class]);
2880 else
e4600702
RK
2881 fprintf (file, "; pref %s, else %s",
2882 reg_class_names[(int) class],
2883 reg_class_names[(int) altclass]);
d7429b6a
RK
2884 }
2885 if (REGNO_POINTER_FLAG (i))
2886 fprintf (file, "; pointer");
2887 fprintf (file, ".\n");
2888 }
2889 fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
2890 for (i = 0; i < n_basic_blocks; i++)
2891 {
2892 register rtx head, jump;
2893 register int regno;
2894 fprintf (file, "\nBasic block %d: first insn %d, last %d.\n",
2895 i,
2896 INSN_UID (basic_block_head[i]),
2897 INSN_UID (basic_block_end[i]));
2898 /* The control flow graph's storage is freed
2899 now when flow_analysis returns.
2900 Don't try to print it if it is gone. */
2901 if (basic_block_drops_in)
2902 {
2903 fprintf (file, "Reached from blocks: ");
2904 head = basic_block_head[i];
2905 if (GET_CODE (head) == CODE_LABEL)
2906 for (jump = LABEL_REFS (head);
2907 jump != head;
2908 jump = LABEL_NEXTREF (jump))
2909 {
2910 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2911 fprintf (file, " %d", from_block);
2912 }
2913 if (basic_block_drops_in[i])
2914 fprintf (file, " previous");
2915 }
2916 fprintf (file, "\nRegisters live at start:");
2917 for (regno = 0; regno < max_regno; regno++)
2918 {
2919 register int offset = regno / REGSET_ELT_BITS;
efb07da7
RK
2920 register REGSET_ELT_TYPE bit
2921 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
d7429b6a
RK
2922 if (basic_block_live_at_start[i][offset] & bit)
2923 fprintf (file, " %d", regno);
2924 }
2925 fprintf (file, "\n");
2926 }
2927 fprintf (file, "\n");
2928}
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