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d7429b6a | 1 | /* Data flow analysis for GNU compiler. |
c9bacfdb | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
283334f0 | 3 | 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. |
d7429b6a | 4 | |
1322177d | 5 | This file is part of GCC. |
d7429b6a | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
d7429b6a | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
d7429b6a RK |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
d7429b6a | 21 | |
e881bb1b RH |
22 | /* This file contains the data flow analysis pass of the compiler. It |
23 | computes data flow information which tells combine_instructions | |
24 | which insns to consider combining and controls register allocation. | |
d7429b6a | 25 | |
e881bb1b RH |
26 | Additional data flow information that is too bulky to record is |
27 | generated during the analysis, and is used at that time to create | |
28 | autoincrement and autodecrement addressing. | |
d7429b6a RK |
29 | |
30 | The first step is dividing the function into basic blocks. | |
31 | find_basic_blocks does this. Then life_analysis determines | |
32 | where each register is live and where it is dead. | |
33 | ||
34 | ** find_basic_blocks ** | |
35 | ||
e881bb1b RH |
36 | find_basic_blocks divides the current function's rtl into basic |
37 | blocks and constructs the CFG. The blocks are recorded in the | |
38 | basic_block_info array; the CFG exists in the edge structures | |
39 | referenced by the blocks. | |
d7429b6a | 40 | |
e881bb1b | 41 | find_basic_blocks also finds any unreachable loops and deletes them. |
d7429b6a RK |
42 | |
43 | ** life_analysis ** | |
44 | ||
45 | life_analysis is called immediately after find_basic_blocks. | |
46 | It uses the basic block information to determine where each | |
47 | hard or pseudo register is live. | |
48 | ||
49 | ** live-register info ** | |
50 | ||
51 | The information about where each register is live is in two parts: | |
e881bb1b | 52 | the REG_NOTES of insns, and the vector basic_block->global_live_at_start. |
d7429b6a | 53 | |
e881bb1b RH |
54 | basic_block->global_live_at_start has an element for each basic |
55 | block, and the element is a bit-vector with a bit for each hard or | |
56 | pseudo register. The bit is 1 if the register is live at the | |
57 | beginning of the basic block. | |
d7429b6a | 58 | |
c9bacfdb | 59 | Two types of elements can be added to an insn's REG_NOTES. |
d7429b6a RK |
60 | A REG_DEAD note is added to an insn's REG_NOTES for any register |
61 | that meets both of two conditions: The value in the register is not | |
62 | needed in subsequent insns and the insn does not replace the value in | |
63 | the register (in the case of multi-word hard registers, the value in | |
64 | each register must be replaced by the insn to avoid a REG_DEAD note). | |
65 | ||
66 | In the vast majority of cases, an object in a REG_DEAD note will be | |
67 | used somewhere in the insn. The (rare) exception to this is if an | |
68 | insn uses a multi-word hard register and only some of the registers are | |
69 | needed in subsequent insns. In that case, REG_DEAD notes will be | |
70 | provided for those hard registers that are not subsequently needed. | |
71 | Partial REG_DEAD notes of this type do not occur when an insn sets | |
72 | only some of the hard registers used in such a multi-word operand; | |
73 | omitting REG_DEAD notes for objects stored in an insn is optional and | |
74 | the desire to do so does not justify the complexity of the partial | |
75 | REG_DEAD notes. | |
76 | ||
77 | REG_UNUSED notes are added for each register that is set by the insn | |
78 | but is unused subsequently (if every register set by the insn is unused | |
79 | and the insn does not reference memory or have some other side-effect, | |
80 | the insn is deleted instead). If only part of a multi-word hard | |
81 | register is used in a subsequent insn, REG_UNUSED notes are made for | |
82 | the parts that will not be used. | |
83 | ||
84 | To determine which registers are live after any insn, one can | |
85 | start from the beginning of the basic block and scan insns, noting | |
86 | which registers are set by each insn and which die there. | |
87 | ||
88 | ** Other actions of life_analysis ** | |
89 | ||
90 | life_analysis sets up the LOG_LINKS fields of insns because the | |
91 | information needed to do so is readily available. | |
92 | ||
93 | life_analysis deletes insns whose only effect is to store a value | |
94 | that is never used. | |
95 | ||
96 | life_analysis notices cases where a reference to a register as | |
97 | a memory address can be combined with a preceding or following | |
98 | incrementation or decrementation of the register. The separate | |
99 | instruction to increment or decrement is deleted and the address | |
100 | is changed to a POST_INC or similar rtx. | |
101 | ||
102 | Each time an incrementing or decrementing address is created, | |
103 | a REG_INC element is added to the insn's REG_NOTES list. | |
104 | ||
105 | life_analysis fills in certain vectors containing information about | |
d4b60170 RK |
106 | register usage: REG_N_REFS, REG_N_DEATHS, REG_N_SETS, REG_LIVE_LENGTH, |
107 | REG_N_CALLS_CROSSED and REG_BASIC_BLOCK. | |
fdb8a883 JW |
108 | |
109 | life_analysis sets current_function_sp_is_unchanging if the function | |
110 | doesn't modify the stack pointer. */ | |
e881bb1b | 111 | |
c9bacfdb | 112 | /* TODO: |
e881bb1b RH |
113 | |
114 | Split out from life_analysis: | |
115 | - local property discovery (bb->local_live, bb->local_set) | |
116 | - global property computation | |
117 | - log links creation | |
118 | - pre/post modify transformation | |
119 | */ | |
d7429b6a | 120 | \f |
d7429b6a | 121 | #include "config.h" |
670ee920 | 122 | #include "system.h" |
4977bab6 ZW |
123 | #include "coretypes.h" |
124 | #include "tm.h" | |
d3a923ee | 125 | #include "tree.h" |
d7429b6a | 126 | #include "rtl.h" |
6baf1cc8 | 127 | #include "tm_p.h" |
efc9bd41 | 128 | #include "hard-reg-set.h" |
d7429b6a RK |
129 | #include "basic-block.h" |
130 | #include "insn-config.h" | |
131 | #include "regs.h" | |
d7429b6a RK |
132 | #include "flags.h" |
133 | #include "output.h" | |
b384405b | 134 | #include "function.h" |
3d195391 | 135 | #include "except.h" |
2e107e9e | 136 | #include "toplev.h" |
79c9824e | 137 | #include "recog.h" |
11bdd2ae | 138 | #include "expr.h" |
4793dca1 | 139 | #include "timevar.h" |
d7429b6a RK |
140 | |
141 | #include "obstack.h" | |
11ae508b | 142 | #include "splay-tree.h" |
c5c76735 | 143 | |
d3a923ee RH |
144 | #ifndef HAVE_epilogue |
145 | #define HAVE_epilogue 0 | |
146 | #endif | |
d3a923ee RH |
147 | #ifndef HAVE_prologue |
148 | #define HAVE_prologue 0 | |
149 | #endif | |
0a1c58a2 JL |
150 | #ifndef HAVE_sibcall_epilogue |
151 | #define HAVE_sibcall_epilogue 0 | |
152 | #endif | |
d3a923ee | 153 | |
2a3e384f RH |
154 | #ifndef EPILOGUE_USES |
155 | #define EPILOGUE_USES(REGNO) 0 | |
156 | #endif | |
15b5aef3 RH |
157 | #ifndef EH_USES |
158 | #define EH_USES(REGNO) 0 | |
159 | #endif | |
2a3e384f | 160 | |
7e6d8ba1 AH |
161 | #ifdef HAVE_conditional_execution |
162 | #ifndef REVERSE_CONDEXEC_PREDICATES_P | |
15dce812 RE |
163 | #define REVERSE_CONDEXEC_PREDICATES_P(x, y) \ |
164 | (GET_CODE ((x)) == reversed_comparison_code ((y), NULL)) | |
7e6d8ba1 AH |
165 | #endif |
166 | #endif | |
167 | ||
56744d1a JL |
168 | /* Nonzero if the second flow pass has completed. */ |
169 | int flow2_completed; | |
170 | ||
d7429b6a RK |
171 | /* Maximum register number used in this function, plus one. */ |
172 | ||
173 | int max_regno; | |
174 | ||
b1f21e0a | 175 | /* Indexed by n, giving various register information */ |
d7429b6a | 176 | |
6feacd09 | 177 | varray_type reg_n_info; |
d7429b6a | 178 | |
d7429b6a RK |
179 | /* Size of a regset for the current function, |
180 | in (1) bytes and (2) elements. */ | |
181 | ||
182 | int regset_bytes; | |
183 | int regset_size; | |
184 | ||
d7429b6a | 185 | /* Regset of regs live when calls to `setjmp'-like functions happen. */ |
e881bb1b | 186 | /* ??? Does this exist only for the setjmp-clobbered warning message? */ |
d7429b6a RK |
187 | |
188 | regset regs_live_at_setjmp; | |
189 | ||
190 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers | |
191 | that have to go in the same hard reg. | |
192 | The first two regs in the list are a pair, and the next two | |
193 | are another pair, etc. */ | |
194 | rtx regs_may_share; | |
195 | ||
d7429b6a RK |
196 | /* Set of registers that may be eliminable. These are handled specially |
197 | in updating regs_ever_live. */ | |
198 | ||
199 | static HARD_REG_SET elim_reg_set; | |
200 | ||
11ae508b RH |
201 | /* Holds information for tracking conditional register life information. */ |
202 | struct reg_cond_life_info | |
203 | { | |
685af3af | 204 | /* A boolean expression of conditions under which a register is dead. */ |
11ae508b | 205 | rtx condition; |
685af3af JW |
206 | /* Conditions under which a register is dead at the basic block end. */ |
207 | rtx orig_condition; | |
208 | ||
209 | /* A boolean expression of conditions under which a register has been | |
210 | stored into. */ | |
211 | rtx stores; | |
11ae508b RH |
212 | |
213 | /* ??? Could store mask of bytes that are dead, so that we could finally | |
214 | track lifetimes of multi-word registers accessed via subregs. */ | |
215 | }; | |
216 | ||
62828c00 RH |
217 | /* For use in communicating between propagate_block and its subroutines. |
218 | Holds all information needed to compute life and def-use information. */ | |
219 | ||
220 | struct propagate_block_info | |
221 | { | |
222 | /* The basic block we're considering. */ | |
223 | basic_block bb; | |
224 | ||
225 | /* Bit N is set if register N is conditionally or unconditionally live. */ | |
226 | regset reg_live; | |
227 | ||
9785c68d RH |
228 | /* Bit N is set if register N is set this insn. */ |
229 | regset new_set; | |
8e3f9094 | 230 | |
62828c00 RH |
231 | /* Element N is the next insn that uses (hard or pseudo) register N |
232 | within the current basic block; or zero, if there is no such insn. */ | |
233 | rtx *reg_next_use; | |
234 | ||
235 | /* Contains a list of all the MEMs we are tracking for dead store | |
236 | elimination. */ | |
237 | rtx mem_set_list; | |
238 | ||
7dfc0fbe BS |
239 | /* If non-null, record the set of registers set unconditionally in the |
240 | basic block. */ | |
62828c00 RH |
241 | regset local_set; |
242 | ||
7dfc0fbe BS |
243 | /* If non-null, record the set of registers set conditionally in the |
244 | basic block. */ | |
245 | regset cond_local_set; | |
246 | ||
11ae508b RH |
247 | #ifdef HAVE_conditional_execution |
248 | /* Indexed by register number, holds a reg_cond_life_info for each | |
249 | register that is not unconditionally live or dead. */ | |
250 | splay_tree reg_cond_dead; | |
251 | ||
252 | /* Bit N is set if register N is in an expression in reg_cond_dead. */ | |
253 | regset reg_cond_reg; | |
254 | #endif | |
255 | ||
0875baa0 RH |
256 | /* The length of mem_set_list. */ |
257 | int mem_set_list_len; | |
258 | ||
cc2902df | 259 | /* Nonzero if the value of CC0 is live. */ |
62828c00 RH |
260 | int cc0_live; |
261 | ||
fbe5a4a6 | 262 | /* Flags controlling the set of information propagate_block collects. */ |
62828c00 | 263 | int flags; |
736b64dd JH |
264 | /* Index of instruction being processed. */ |
265 | int insn_num; | |
62828c00 RH |
266 | }; |
267 | ||
3dec4024 JH |
268 | /* Number of dead insns removed. */ |
269 | static int ndead; | |
270 | ||
736b64dd JH |
271 | /* When PROP_REG_INFO set, array contains pbi->insn_num of instruction |
272 | where given register died. When the register is marked alive, we use the | |
273 | information to compute amount of instructions life range cross. | |
274 | (remember, we are walking backward). This can be computed as current | |
275 | pbi->insn_num - reg_deaths[regno]. | |
276 | At the end of processing each basic block, the remaining live registers | |
277 | are inspected and liferanges are increased same way so liverange of global | |
278 | registers are computed correctly. | |
279 | ||
280 | The array is maintained clear for dead registers, so it can be safely reused | |
281 | for next basic block without expensive memset of the whole array after | |
282 | reseting pbi->insn_num to 0. */ | |
283 | ||
284 | static int *reg_deaths; | |
285 | ||
0875baa0 RH |
286 | /* Maximum length of pbi->mem_set_list before we start dropping |
287 | new elements on the floor. */ | |
288 | #define MAX_MEM_SET_LIST_LEN 100 | |
289 | ||
d7429b6a | 290 | /* Forward declarations */ |
6cf9ac28 AJ |
291 | static int verify_wide_reg_1 (rtx *, void *); |
292 | static void verify_wide_reg (int, basic_block); | |
293 | static void verify_local_live_at_start (regset, basic_block); | |
294 | static void notice_stack_pointer_modification_1 (rtx, rtx, void *); | |
827c06b6 | 295 | static void notice_stack_pointer_modification (void); |
6cf9ac28 AJ |
296 | static void mark_reg (rtx, void *); |
297 | static void mark_regs_live_at_end (regset); | |
6cf9ac28 AJ |
298 | static void calculate_global_regs_live (sbitmap, sbitmap, int); |
299 | static void propagate_block_delete_insn (rtx); | |
300 | static rtx propagate_block_delete_libcall (rtx, rtx); | |
301 | static int insn_dead_p (struct propagate_block_info *, rtx, int, rtx); | |
302 | static int libcall_dead_p (struct propagate_block_info *, rtx, rtx); | |
303 | static void mark_set_regs (struct propagate_block_info *, rtx, rtx); | |
304 | static void mark_set_1 (struct propagate_block_info *, enum rtx_code, rtx, | |
305 | rtx, rtx, int); | |
306 | static int find_regno_partial (rtx *, void *); | |
0626ef8a | 307 | |
11ae508b | 308 | #ifdef HAVE_conditional_execution |
6cf9ac28 AJ |
309 | static int mark_regno_cond_dead (struct propagate_block_info *, int, rtx); |
310 | static void free_reg_cond_life_info (splay_tree_value); | |
311 | static int flush_reg_cond_reg_1 (splay_tree_node, void *); | |
312 | static void flush_reg_cond_reg (struct propagate_block_info *, int); | |
313 | static rtx elim_reg_cond (rtx, unsigned int); | |
314 | static rtx ior_reg_cond (rtx, rtx, int); | |
315 | static rtx not_reg_cond (rtx); | |
316 | static rtx and_reg_cond (rtx, rtx, int); | |
11ae508b | 317 | #endif |
1d300e19 | 318 | #ifdef AUTO_INC_DEC |
6cf9ac28 AJ |
319 | static void attempt_auto_inc (struct propagate_block_info *, rtx, rtx, rtx, |
320 | rtx, rtx); | |
321 | static void find_auto_inc (struct propagate_block_info *, rtx, rtx); | |
322 | static int try_pre_increment_1 (struct propagate_block_info *, rtx); | |
323 | static int try_pre_increment (rtx, rtx, HOST_WIDE_INT); | |
1d300e19 | 324 | #endif |
6cf9ac28 AJ |
325 | static void mark_used_reg (struct propagate_block_info *, rtx, rtx, rtx); |
326 | static void mark_used_regs (struct propagate_block_info *, rtx, rtx, rtx); | |
327 | void debug_flow_info (void); | |
328 | static void add_to_mem_set_list (struct propagate_block_info *, rtx); | |
329 | static int invalidate_mems_from_autoinc (rtx *, void *); | |
330 | static void invalidate_mems_from_set (struct propagate_block_info *, rtx); | |
331 | static void clear_log_links (sbitmap); | |
095c3bbd | 332 | static int count_or_remove_death_notes_bb (basic_block, int); |
d7429b6a | 333 | \f |
402209ff JH |
334 | /* Return the INSN immediately following the NOTE_INSN_BASIC_BLOCK |
335 | note associated with the BLOCK. */ | |
336 | ||
337 | rtx | |
6cf9ac28 | 338 | first_insn_after_basic_block_note (basic_block block) |
402209ff JH |
339 | { |
340 | rtx insn; | |
b313a0fe | 341 | |
402209ff | 342 | /* Get the first instruction in the block. */ |
a813c111 | 343 | insn = BB_HEAD (block); |
dc2ede84 | 344 | |
402209ff JH |
345 | if (insn == NULL_RTX) |
346 | return NULL_RTX; | |
4b4bf941 | 347 | if (LABEL_P (insn)) |
402209ff | 348 | insn = NEXT_INSN (insn); |
0bccc606 | 349 | gcc_assert (NOTE_INSN_BASIC_BLOCK_P (insn)); |
402209ff JH |
350 | |
351 | return NEXT_INSN (insn); | |
352 | } | |
353 | \f | |
827c06b6 SB |
354 | /* Perform data flow analysis for the whole control flow graph. |
355 | FLAGS is a set of PROP_* flags to be used in accumulating flow info. */ | |
402209ff JH |
356 | |
357 | void | |
827c06b6 | 358 | life_analysis (FILE *file, int flags) |
e881bb1b | 359 | { |
cff9f8d5 | 360 | #ifdef ELIMINABLE_REGS |
c1b50e49 | 361 | int i; |
8b60264b | 362 | static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS; |
402209ff | 363 | #endif |
dc2ede84 | 364 | |
402209ff JH |
365 | /* Record which registers will be eliminated. We use this in |
366 | mark_used_regs. */ | |
e881bb1b | 367 | |
402209ff | 368 | CLEAR_HARD_REG_SET (elim_reg_set); |
314883b8 | 369 | |
402209ff JH |
370 | #ifdef ELIMINABLE_REGS |
371 | for (i = 0; i < (int) ARRAY_SIZE (eliminables); i++) | |
372 | SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from); | |
373 | #else | |
374 | SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM); | |
375 | #endif | |
52a11cbf | 376 | |
cff9f8d5 AH |
377 | |
378 | #ifdef CANNOT_CHANGE_MODE_CLASS | |
379 | if (flags & PROP_REG_INFO) | |
41bf2a8b | 380 | init_subregs_of_mode (); |
cff9f8d5 AH |
381 | #endif |
382 | ||
402209ff JH |
383 | if (! optimize) |
384 | flags &= ~(PROP_LOG_LINKS | PROP_AUTOINC | PROP_ALLOW_CFG_CHANGES); | |
52a11cbf | 385 | |
402209ff JH |
386 | /* The post-reload life analysis have (on a global basis) the same |
387 | registers live as was computed by reload itself. elimination | |
388 | Otherwise offsets and such may be incorrect. | |
e881bb1b | 389 | |
402209ff JH |
390 | Reload will make some registers as live even though they do not |
391 | appear in the rtl. | |
e881bb1b | 392 | |
402209ff JH |
393 | We don't want to create new auto-incs after reload, since they |
394 | are unlikely to be useful and can cause problems with shared | |
395 | stack slots. */ | |
396 | if (reload_completed) | |
397 | flags &= ~(PROP_REG_INFO | PROP_AUTOINC); | |
e881bb1b | 398 | |
402209ff | 399 | /* We want alias analysis information for local dead store elimination. */ |
5149f070 | 400 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
402209ff | 401 | init_alias_analysis (); |
dc2ede84 | 402 | |
402209ff JH |
403 | /* Always remove no-op moves. Do this before other processing so |
404 | that we don't have to keep re-scanning them. */ | |
827c06b6 | 405 | delete_noop_moves (); |
1bc48f82 | 406 | |
402209ff JH |
407 | /* Some targets can emit simpler epilogues if they know that sp was |
408 | not ever modified during the function. After reload, of course, | |
409 | we've already emitted the epilogue so there's no sense searching. */ | |
410 | if (! reload_completed) | |
827c06b6 | 411 | notice_stack_pointer_modification (); |
1bc48f82 | 412 | |
402209ff JH |
413 | /* Allocate and zero out data structures that will record the |
414 | data from lifetime analysis. */ | |
415 | allocate_reg_life_data (); | |
416 | allocate_bb_life_data (); | |
1bc48f82 | 417 | |
402209ff JH |
418 | /* Find the set of registers live on function exit. */ |
419 | mark_regs_live_at_end (EXIT_BLOCK_PTR->global_live_at_start); | |
1bc48f82 | 420 | |
402209ff JH |
421 | /* "Update" life info from zero. It'd be nice to begin the |
422 | relaxation with just the exit and noreturn blocks, but that set | |
423 | is not immediately handy. */ | |
c9bacfdb | 424 | |
402209ff | 425 | if (flags & PROP_REG_INFO) |
df2ef49b AM |
426 | { |
427 | memset (regs_ever_live, 0, sizeof (regs_ever_live)); | |
428 | memset (regs_asm_clobbered, 0, sizeof (regs_asm_clobbered)); | |
429 | } | |
402209ff | 430 | update_life_info (NULL, UPDATE_LIFE_GLOBAL, flags); |
736b64dd JH |
431 | if (reg_deaths) |
432 | { | |
433 | free (reg_deaths); | |
434 | reg_deaths = NULL; | |
435 | } | |
1bc48f82 | 436 | |
402209ff | 437 | /* Clean up. */ |
5149f070 | 438 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
402209ff | 439 | end_alias_analysis (); |
1bc48f82 | 440 | |
402209ff JH |
441 | if (file) |
442 | dump_flow_info (file); | |
0005550b | 443 | |
1f52178b | 444 | /* Removing dead insns should have made jumptables really dead. */ |
402209ff JH |
445 | delete_dead_jumptables (); |
446 | } | |
0005550b | 447 | |
402209ff | 448 | /* A subroutine of verify_wide_reg, called through for_each_rtx. |
08ef5437 RH |
449 | Search for REGNO. If found, return 2 if it is not wider than |
450 | word_mode. */ | |
a686dbf8 | 451 | |
402209ff | 452 | static int |
6cf9ac28 | 453 | verify_wide_reg_1 (rtx *px, void *pregno) |
402209ff JH |
454 | { |
455 | rtx x = *px; | |
456 | unsigned int regno = *(int *) pregno; | |
134d3a2e | 457 | |
f8cfc6aa | 458 | if (REG_P (x) && REGNO (x) == regno) |
134d3a2e | 459 | { |
402209ff | 460 | if (GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD) |
08ef5437 | 461 | return 2; |
402209ff | 462 | return 1; |
134d3a2e | 463 | } |
402209ff | 464 | return 0; |
a686dbf8 JH |
465 | } |
466 | ||
402209ff | 467 | /* A subroutine of verify_local_live_at_start. Search through insns |
08ef5437 | 468 | of BB looking for register REGNO. */ |
8329b5ec | 469 | |
be1bb652 | 470 | static void |
6cf9ac28 | 471 | verify_wide_reg (int regno, basic_block bb) |
e881bb1b | 472 | { |
a813c111 | 473 | rtx head = BB_HEAD (bb), end = BB_END (bb); |
08ef5437 | 474 | |
402209ff | 475 | while (1) |
e881bb1b | 476 | { |
08ef5437 RH |
477 | if (INSN_P (head)) |
478 | { | |
479 | int r = for_each_rtx (&PATTERN (head), verify_wide_reg_1, ®no); | |
480 | if (r == 1) | |
481 | return; | |
482 | if (r == 2) | |
483 | break; | |
484 | } | |
402209ff JH |
485 | if (head == end) |
486 | break; | |
487 | head = NEXT_INSN (head); | |
488 | } | |
c263766c | 489 | if (dump_file) |
08ef5437 | 490 | { |
c263766c RH |
491 | fprintf (dump_file, "Register %d died unexpectedly.\n", regno); |
492 | dump_bb (bb, dump_file, 0); | |
08ef5437 | 493 | } |
0bccc606 | 494 | fatal_error ("internal consistency failure"); |
402209ff | 495 | } |
314883b8 | 496 | |
402209ff JH |
497 | /* A subroutine of update_life_info. Verify that there are no untoward |
498 | changes in live_at_start during a local update. */ | |
d06c6389 | 499 | |
402209ff | 500 | static void |
6cf9ac28 | 501 | verify_local_live_at_start (regset new_live_at_start, basic_block bb) |
402209ff JH |
502 | { |
503 | if (reload_completed) | |
504 | { | |
505 | /* After reload, there are no pseudos, nor subregs of multi-word | |
506 | registers. The regsets should exactly match. */ | |
507 | if (! REG_SET_EQUAL_P (new_live_at_start, bb->global_live_at_start)) | |
508 | { | |
c263766c | 509 | if (dump_file) |
e881bb1b | 510 | { |
c263766c | 511 | fprintf (dump_file, |
08ef5437 | 512 | "live_at_start mismatch in bb %d, aborting\nNew:\n", |
0b17ab2f | 513 | bb->index); |
c263766c RH |
514 | debug_bitmap_file (dump_file, new_live_at_start); |
515 | fputs ("Old:\n", dump_file); | |
516 | dump_bb (bb, dump_file, 0); | |
e881bb1b | 517 | } |
0bccc606 | 518 | fatal_error ("internal consistency failure"); |
e881bb1b | 519 | } |
402209ff JH |
520 | } |
521 | else | |
522 | { | |
523 | int i; | |
a2041967 | 524 | reg_set_iterator rsi; |
d7429b6a | 525 | |
402209ff JH |
526 | /* Find the set of changed registers. */ |
527 | XOR_REG_SET (new_live_at_start, bb->global_live_at_start); | |
421382ac | 528 | |
a2041967 | 529 | EXECUTE_IF_SET_IN_REG_SET (new_live_at_start, 0, i, rsi) |
402209ff | 530 | { |
dd3f0101 | 531 | /* No registers should die. */ |
402209ff JH |
532 | if (REGNO_REG_SET_P (bb->global_live_at_start, i)) |
533 | { | |
c263766c | 534 | if (dump_file) |
08ef5437 | 535 | { |
c263766c | 536 | fprintf (dump_file, |
08ef5437 | 537 | "Register %d died unexpectedly.\n", i); |
c263766c | 538 | dump_bb (bb, dump_file, 0); |
08ef5437 | 539 | } |
0bccc606 | 540 | fatal_error ("internal consistency failure"); |
402209ff | 541 | } |
dd3f0101 | 542 | /* Verify that the now-live register is wider than word_mode. */ |
08ef5437 | 543 | verify_wide_reg (i, bb); |
a2041967 | 544 | } |
e881bb1b | 545 | } |
402209ff | 546 | } |
d7429b6a | 547 | |
402209ff JH |
548 | /* Updates life information starting with the basic blocks set in BLOCKS. |
549 | If BLOCKS is null, consider it to be the universal set. | |
af14ce9c | 550 | |
e0bb17a8 | 551 | If EXTENT is UPDATE_LIFE_LOCAL, such as after splitting or peepholing, |
402209ff JH |
552 | we are only expecting local modifications to basic blocks. If we find |
553 | extra registers live at the beginning of a block, then we either killed | |
554 | useful data, or we have a broken split that wants data not provided. | |
555 | If we find registers removed from live_at_start, that means we have | |
556 | a broken peephole that is killing a register it shouldn't. | |
af14ce9c | 557 | |
402209ff JH |
558 | ??? This is not true in one situation -- when a pre-reload splitter |
559 | generates subregs of a multi-word pseudo, current life analysis will | |
560 | lose the kill. So we _can_ have a pseudo go live. How irritating. | |
5ece9746 | 561 | |
24908375 R |
562 | It is also not true when a peephole decides that it doesn't need one |
563 | or more of the inputs. | |
564 | ||
402209ff JH |
565 | Including PROP_REG_INFO does not properly refresh regs_ever_live |
566 | unless the caller resets it to zero. */ | |
19d3c25c | 567 | |
3dec4024 | 568 | int |
6cf9ac28 | 569 | update_life_info (sbitmap blocks, enum update_life_extent extent, int prop_flags) |
19d3c25c | 570 | { |
402209ff JH |
571 | regset tmp; |
572 | regset_head tmp_head; | |
006844a3 | 573 | int i; |
566576e7 | 574 | int stabilized_prop_flags = prop_flags; |
e0082a72 | 575 | basic_block bb; |
006844a3 | 576 | |
402209ff | 577 | tmp = INITIALIZE_REG_SET (tmp_head); |
3dec4024 | 578 | ndead = 0; |
2cade2ad | 579 | |
298c28a8 JH |
580 | if ((prop_flags & PROP_REG_INFO) && !reg_deaths) |
581 | reg_deaths = xcalloc (sizeof (*reg_deaths), max_regno); | |
582 | ||
b932f770 JH |
583 | timevar_push ((extent == UPDATE_LIFE_LOCAL || blocks) |
584 | ? TV_LIFE_UPDATE : TV_LIFE); | |
585 | ||
402209ff JH |
586 | /* Changes to the CFG are only allowed when |
587 | doing a global update for the entire CFG. */ | |
0bccc606 NS |
588 | gcc_assert (!(prop_flags & PROP_ALLOW_CFG_CHANGES) |
589 | || (extent != UPDATE_LIFE_LOCAL && !blocks)); | |
006844a3 | 590 | |
402209ff JH |
591 | /* For a global update, we go through the relaxation process again. */ |
592 | if (extent != UPDATE_LIFE_LOCAL) | |
593 | { | |
594 | for ( ; ; ) | |
595 | { | |
596 | int changed = 0; | |
19d3c25c | 597 | |
402209ff JH |
598 | calculate_global_regs_live (blocks, blocks, |
599 | prop_flags & (PROP_SCAN_DEAD_CODE | |
5149f070 | 600 | | PROP_SCAN_DEAD_STORES |
402209ff | 601 | | PROP_ALLOW_CFG_CHANGES)); |
5ece9746 | 602 | |
402209ff JH |
603 | if ((prop_flags & (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES)) |
604 | != (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES)) | |
605 | break; | |
e881bb1b | 606 | |
402209ff JH |
607 | /* Removing dead code may allow the CFG to be simplified which |
608 | in turn may allow for further dead code detection / removal. */ | |
e0082a72 | 609 | FOR_EACH_BB_REVERSE (bb) |
402209ff | 610 | { |
402209ff JH |
611 | COPY_REG_SET (tmp, bb->global_live_at_end); |
612 | changed |= propagate_block (bb, tmp, NULL, NULL, | |
613 | prop_flags & (PROP_SCAN_DEAD_CODE | |
5149f070 | 614 | | PROP_SCAN_DEAD_STORES |
402209ff JH |
615 | | PROP_KILL_DEAD_CODE)); |
616 | } | |
47095bfc | 617 | |
566576e7 HPN |
618 | /* Don't pass PROP_SCAN_DEAD_CODE or PROP_KILL_DEAD_CODE to |
619 | subsequent propagate_block calls, since removing or acting as | |
620 | removing dead code can affect global register liveness, which | |
621 | is supposed to be finalized for this call after this loop. */ | |
622 | stabilized_prop_flags | |
5149f070 JH |
623 | &= ~(PROP_SCAN_DEAD_CODE | PROP_SCAN_DEAD_STORES |
624 | | PROP_KILL_DEAD_CODE); | |
566576e7 HPN |
625 | |
626 | if (! changed) | |
402209ff | 627 | break; |
566576e7 HPN |
628 | |
629 | /* We repeat regardless of what cleanup_cfg says. If there were | |
630 | instructions deleted above, that might have been only a | |
631 | partial improvement (see MAX_MEM_SET_LIST_LEN usage). | |
632 | Further improvement may be possible. */ | |
633 | cleanup_cfg (CLEANUP_EXPENSIVE); | |
cdd1f01b | 634 | |
6cf9ac28 | 635 | /* Zap the life information from the last round. If we don't |
cdd1f01b | 636 | do this, we can wind up with registers that no longer appear |
6de9cd9a | 637 | in the code being marked live at entry. */ |
cdd1f01b RH |
638 | FOR_EACH_BB (bb) |
639 | { | |
640 | CLEAR_REG_SET (bb->global_live_at_start); | |
641 | CLEAR_REG_SET (bb->global_live_at_end); | |
642 | } | |
e881bb1b | 643 | } |
47095bfc | 644 | |
402209ff JH |
645 | /* If asked, remove notes from the blocks we'll update. */ |
646 | if (extent == UPDATE_LIFE_GLOBAL_RM_NOTES) | |
647 | count_or_remove_death_notes (blocks, 1); | |
648 | } | |
649 | ||
38c1593d JH |
650 | /* Clear log links in case we are asked to (re)compute them. */ |
651 | if (prop_flags & PROP_LOG_LINKS) | |
652 | clear_log_links (blocks); | |
653 | ||
402209ff JH |
654 | if (blocks) |
655 | { | |
656 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, | |
657 | { | |
e0082a72 | 658 | bb = BASIC_BLOCK (i); |
402209ff JH |
659 | |
660 | COPY_REG_SET (tmp, bb->global_live_at_end); | |
566576e7 | 661 | propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags); |
402209ff JH |
662 | |
663 | if (extent == UPDATE_LIFE_LOCAL) | |
664 | verify_local_live_at_start (tmp, bb); | |
665 | }); | |
5ece9746 | 666 | } |
e881bb1b RH |
667 | else |
668 | { | |
e0082a72 | 669 | FOR_EACH_BB_REVERSE (bb) |
355e4ec4 | 670 | { |
402209ff | 671 | COPY_REG_SET (tmp, bb->global_live_at_end); |
566576e7 HPN |
672 | |
673 | propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags); | |
421382ac | 674 | |
402209ff JH |
675 | if (extent == UPDATE_LIFE_LOCAL) |
676 | verify_local_live_at_start (tmp, bb); | |
e881bb1b | 677 | } |
e881bb1b RH |
678 | } |
679 | ||
402209ff | 680 | FREE_REG_SET (tmp); |
eeea333e | 681 | |
402209ff JH |
682 | if (prop_flags & PROP_REG_INFO) |
683 | { | |
a2041967 KH |
684 | reg_set_iterator rsi; |
685 | ||
402209ff JH |
686 | /* The only pseudos that are live at the beginning of the function |
687 | are those that were not set anywhere in the function. local-alloc | |
688 | doesn't know how to handle these correctly, so mark them as not | |
689 | local to any one basic block. */ | |
690 | EXECUTE_IF_SET_IN_REG_SET (ENTRY_BLOCK_PTR->global_live_at_end, | |
a2041967 KH |
691 | FIRST_PSEUDO_REGISTER, i, rsi) |
692 | REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; | |
e881bb1b | 693 | |
402209ff JH |
694 | /* We have a problem with any pseudoreg that lives across the setjmp. |
695 | ANSI says that if a user variable does not change in value between | |
696 | the setjmp and the longjmp, then the longjmp preserves it. This | |
697 | includes longjmp from a place where the pseudo appears dead. | |
698 | (In principle, the value still exists if it is in scope.) | |
699 | If the pseudo goes in a hard reg, some other value may occupy | |
700 | that hard reg where this pseudo is dead, thus clobbering the pseudo. | |
701 | Conclusion: such a pseudo must not go in a hard reg. */ | |
702 | EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp, | |
a2041967 KH |
703 | FIRST_PSEUDO_REGISTER, i, rsi) |
704 | { | |
705 | if (regno_reg_rtx[i] != 0) | |
706 | { | |
707 | REG_LIVE_LENGTH (i) = -1; | |
708 | REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; | |
709 | } | |
710 | } | |
402209ff | 711 | } |
736b64dd JH |
712 | if (reg_deaths) |
713 | { | |
714 | free (reg_deaths); | |
715 | reg_deaths = NULL; | |
716 | } | |
b932f770 JH |
717 | timevar_pop ((extent == UPDATE_LIFE_LOCAL || blocks) |
718 | ? TV_LIFE_UPDATE : TV_LIFE); | |
c263766c RH |
719 | if (ndead && dump_file) |
720 | fprintf (dump_file, "deleted %i dead insns\n", ndead); | |
3dec4024 | 721 | return ndead; |
421382ac | 722 | } |
b62c8881 | 723 | |
38c1593d JH |
724 | /* Update life information in all blocks where BB_DIRTY is set. */ |
725 | ||
3dec4024 | 726 | int |
6cf9ac28 | 727 | update_life_info_in_dirty_blocks (enum update_life_extent extent, int prop_flags) |
38c1593d | 728 | { |
d55bc081 | 729 | sbitmap update_life_blocks = sbitmap_alloc (last_basic_block); |
38c1593d | 730 | int n = 0; |
e0082a72 | 731 | basic_block bb; |
0a2ed1f1 | 732 | int retval = 0; |
38c1593d JH |
733 | |
734 | sbitmap_zero (update_life_blocks); | |
e0082a72 | 735 | FOR_EACH_BB (bb) |
e0e577a2 RH |
736 | { |
737 | if (extent == UPDATE_LIFE_LOCAL) | |
738 | { | |
739 | if (bb->flags & BB_DIRTY) | |
740 | { | |
741 | SET_BIT (update_life_blocks, bb->index); | |
742 | n++; | |
743 | } | |
744 | } | |
745 | else | |
746 | { | |
747 | /* ??? Bootstrap with -march=pentium4 fails to terminate | |
748 | with only a partial life update. */ | |
749 | SET_BIT (update_life_blocks, bb->index); | |
750 | if (bb->flags & BB_DIRTY) | |
751 | n++; | |
752 | } | |
753 | } | |
38c1593d JH |
754 | |
755 | if (n) | |
0a2ed1f1 | 756 | retval = update_life_info (update_life_blocks, extent, prop_flags); |
38c1593d JH |
757 | |
758 | sbitmap_free (update_life_blocks); | |
0a2ed1f1 | 759 | return retval; |
38c1593d JH |
760 | } |
761 | ||
bb8a619e | 762 | /* Free the variables allocated by find_basic_blocks. */ |
421382ac | 763 | |
2307e372 | 764 | void |
bb8a619e | 765 | free_basic_block_vars (void) |
421382ac | 766 | { |
bb8a619e | 767 | if (basic_block_info) |
402209ff | 768 | { |
bb8a619e | 769 | clear_edges (); |
6de9cd9a | 770 | basic_block_info = NULL; |
e881bb1b | 771 | } |
bb8a619e SB |
772 | n_basic_blocks = 0; |
773 | last_basic_block = 0; | |
774 | ||
775 | ENTRY_BLOCK_PTR->aux = NULL; | |
776 | ENTRY_BLOCK_PTR->global_live_at_end = NULL; | |
777 | EXIT_BLOCK_PTR->aux = NULL; | |
778 | EXIT_BLOCK_PTR->global_live_at_start = NULL; | |
421382ac BS |
779 | } |
780 | ||
402209ff | 781 | /* Delete any insns that copy a register to itself. */ |
421382ac | 782 | |
3dec4024 | 783 | int |
827c06b6 | 784 | delete_noop_moves (void) |
421382ac | 785 | { |
402209ff JH |
786 | rtx insn, next; |
787 | basic_block bb; | |
3dec4024 | 788 | int nnoops = 0; |
421382ac | 789 | |
e0082a72 | 790 | FOR_EACH_BB (bb) |
421382ac | 791 | { |
a813c111 | 792 | for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb)); insn = next) |
421382ac | 793 | { |
402209ff JH |
794 | next = NEXT_INSN (insn); |
795 | if (INSN_P (insn) && noop_move_p (insn)) | |
796 | { | |
eb9d8e4d JW |
797 | rtx note; |
798 | ||
799 | /* If we're about to remove the first insn of a libcall | |
800 | then move the libcall note to the next real insn and | |
801 | update the retval note. */ | |
802 | if ((note = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
803 | && XEXP (note, 0) != insn) | |
804 | { | |
805 | rtx new_libcall_insn = next_real_insn (insn); | |
806 | rtx retval_note = find_reg_note (XEXP (note, 0), | |
807 | REG_RETVAL, NULL_RTX); | |
808 | REG_NOTES (new_libcall_insn) | |
809 | = gen_rtx_INSN_LIST (REG_LIBCALL, XEXP (note, 0), | |
810 | REG_NOTES (new_libcall_insn)); | |
811 | XEXP (retval_note, 0) = new_libcall_insn; | |
812 | } | |
813 | ||
3dec4024 JH |
814 | delete_insn_and_edges (insn); |
815 | nnoops++; | |
402209ff | 816 | } |
421382ac BS |
817 | } |
818 | } | |
c263766c RH |
819 | if (nnoops && dump_file) |
820 | fprintf (dump_file, "deleted %i noop moves", nnoops); | |
3dec4024 | 821 | return nnoops; |
421382ac BS |
822 | } |
823 | ||
402209ff | 824 | /* Delete any jump tables never referenced. We can't delete them at the |
eaec9b3d | 825 | time of removing tablejump insn as they are referenced by the preceding |
402209ff JH |
826 | insns computing the destination, so we delay deleting and garbagecollect |
827 | them once life information is computed. */ | |
0010687d | 828 | void |
6cf9ac28 | 829 | delete_dead_jumptables (void) |
402209ff JH |
830 | { |
831 | rtx insn, next; | |
832 | for (insn = get_insns (); insn; insn = next) | |
421382ac | 833 | { |
402209ff | 834 | next = NEXT_INSN (insn); |
4b4bf941 | 835 | if (LABEL_P (insn) |
967bd823 | 836 | && LABEL_NUSES (insn) == LABEL_PRESERVE_P (insn) |
4b4bf941 | 837 | && JUMP_P (next) |
402209ff JH |
838 | && (GET_CODE (PATTERN (next)) == ADDR_VEC |
839 | || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)) | |
e881bb1b | 840 | { |
c263766c RH |
841 | if (dump_file) |
842 | fprintf (dump_file, "Dead jumptable %i removed\n", INSN_UID (insn)); | |
53c17031 JH |
843 | delete_insn (NEXT_INSN (insn)); |
844 | delete_insn (insn); | |
402209ff | 845 | next = NEXT_INSN (next); |
e881bb1b | 846 | } |
dc2ede84 | 847 | } |
e881bb1b RH |
848 | } |
849 | ||
402209ff JH |
850 | /* Determine if the stack pointer is constant over the life of the function. |
851 | Only useful before prologues have been emitted. */ | |
e881bb1b RH |
852 | |
853 | static void | |
6cf9ac28 AJ |
854 | notice_stack_pointer_modification_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, |
855 | void *data ATTRIBUTE_UNUSED) | |
e881bb1b | 856 | { |
402209ff JH |
857 | if (x == stack_pointer_rtx |
858 | /* The stack pointer is only modified indirectly as the result | |
859 | of a push until later in flow. See the comments in rtl.texi | |
860 | regarding Embedded Side-Effects on Addresses. */ | |
3c0cb5de | 861 | || (MEM_P (x) |
ec8e098d | 862 | && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == RTX_AUTOINC |
402209ff JH |
863 | && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx)) |
864 | current_function_sp_is_unchanging = 0; | |
e881bb1b | 865 | } |
e6cfb550 | 866 | |
336a6399 | 867 | static void |
827c06b6 | 868 | notice_stack_pointer_modification (void) |
e881bb1b | 869 | { |
827c06b6 | 870 | basic_block bb; |
402209ff | 871 | rtx insn; |
e881bb1b | 872 | |
402209ff JH |
873 | /* Assume that the stack pointer is unchanging if alloca hasn't |
874 | been used. */ | |
875 | current_function_sp_is_unchanging = !current_function_calls_alloca; | |
876 | if (! current_function_sp_is_unchanging) | |
877 | return; | |
e881bb1b | 878 | |
827c06b6 SB |
879 | FOR_EACH_BB (bb) |
880 | FOR_BB_INSNS (bb, insn) | |
881 | { | |
882 | if (INSN_P (insn)) | |
883 | { | |
884 | /* Check if insn modifies the stack pointer. */ | |
885 | note_stores (PATTERN (insn), | |
886 | notice_stack_pointer_modification_1, | |
887 | NULL); | |
888 | if (! current_function_sp_is_unchanging) | |
889 | return; | |
890 | } | |
891 | } | |
e881bb1b | 892 | } |
0ecf09f9 | 893 | |
402209ff JH |
894 | /* Mark a register in SET. Hard registers in large modes get all |
895 | of their component registers set as well. */ | |
0ecf09f9 | 896 | |
402209ff | 897 | static void |
6cf9ac28 | 898 | mark_reg (rtx reg, void *xset) |
0ecf09f9 | 899 | { |
402209ff JH |
900 | regset set = (regset) xset; |
901 | int regno = REGNO (reg); | |
0ecf09f9 | 902 | |
0bccc606 | 903 | gcc_assert (GET_MODE (reg) != BLKmode); |
0ecf09f9 | 904 | |
402209ff JH |
905 | SET_REGNO_REG_SET (set, regno); |
906 | if (regno < FIRST_PSEUDO_REGISTER) | |
0ecf09f9 | 907 | { |
66fd46b6 | 908 | int n = hard_regno_nregs[regno][GET_MODE (reg)]; |
402209ff JH |
909 | while (--n > 0) |
910 | SET_REGNO_REG_SET (set, regno + n); | |
0ecf09f9 | 911 | } |
0ecf09f9 | 912 | } |
c586192c | 913 | |
402209ff JH |
914 | /* Mark those regs which are needed at the end of the function as live |
915 | at the end of the last basic block. */ | |
c586192c | 916 | |
402209ff | 917 | static void |
6cf9ac28 | 918 | mark_regs_live_at_end (regset set) |
402209ff JH |
919 | { |
920 | unsigned int i; | |
c586192c | 921 | |
402209ff JH |
922 | /* If exiting needs the right stack value, consider the stack pointer |
923 | live at the end of the function. */ | |
fe3ad572 | 924 | if ((HAVE_epilogue && epilogue_completed) |
402209ff JH |
925 | || ! EXIT_IGNORE_STACK |
926 | || (! FRAME_POINTER_REQUIRED | |
927 | && ! current_function_calls_alloca | |
928 | && flag_omit_frame_pointer) | |
929 | || current_function_sp_is_unchanging) | |
c586192c | 930 | { |
402209ff | 931 | SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM); |
c586192c MH |
932 | } |
933 | ||
402209ff JH |
934 | /* Mark the frame pointer if needed at the end of the function. If |
935 | we end up eliminating it, it will be removed from the live list | |
936 | of each basic block by reload. */ | |
c586192c | 937 | |
402209ff | 938 | if (! reload_completed || frame_pointer_needed) |
a686dbf8 | 939 | { |
402209ff JH |
940 | SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM); |
941 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
942 | /* If they are different, also mark the hard frame pointer as live. */ | |
943 | if (! LOCAL_REGNO (HARD_FRAME_POINTER_REGNUM)) | |
dd3f0101 | 944 | SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM); |
402209ff | 945 | #endif |
a686dbf8 | 946 | } |
c586192c | 947 | |
402209ff JH |
948 | #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED |
949 | /* Many architectures have a GP register even without flag_pic. | |
950 | Assume the pic register is not in use, or will be handled by | |
951 | other means, if it is not fixed. */ | |
fc555370 | 952 | if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM |
402209ff JH |
953 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) |
954 | SET_REGNO_REG_SET (set, PIC_OFFSET_TABLE_REGNUM); | |
955 | #endif | |
c586192c | 956 | |
402209ff JH |
957 | /* Mark all global registers, and all registers used by the epilogue |
958 | as being live at the end of the function since they may be | |
959 | referenced by our caller. */ | |
960 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
961 | if (global_regs[i] || EPILOGUE_USES (i)) | |
962 | SET_REGNO_REG_SET (set, i); | |
c586192c | 963 | |
fe3ad572 | 964 | if (HAVE_epilogue && epilogue_completed) |
ca9fef16 | 965 | { |
402209ff JH |
966 | /* Mark all call-saved registers that we actually used. */ |
967 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
968 | if (regs_ever_live[i] && ! LOCAL_REGNO (i) | |
969 | && ! TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
970 | SET_REGNO_REG_SET (set, i); | |
ca9fef16 | 971 | } |
b9b2c339 | 972 | |
402209ff JH |
973 | #ifdef EH_RETURN_DATA_REGNO |
974 | /* Mark the registers that will contain data for the handler. */ | |
975 | if (reload_completed && current_function_calls_eh_return) | |
976 | for (i = 0; ; ++i) | |
977 | { | |
978 | unsigned regno = EH_RETURN_DATA_REGNO(i); | |
979 | if (regno == INVALID_REGNUM) | |
980 | break; | |
981 | SET_REGNO_REG_SET (set, regno); | |
982 | } | |
e9644cfe | 983 | #endif |
402209ff | 984 | #ifdef EH_RETURN_STACKADJ_RTX |
fe3ad572 | 985 | if ((! HAVE_epilogue || ! epilogue_completed) |
402209ff | 986 | && current_function_calls_eh_return) |
7a442791 | 987 | { |
402209ff JH |
988 | rtx tmp = EH_RETURN_STACKADJ_RTX; |
989 | if (tmp && REG_P (tmp)) | |
990 | mark_reg (tmp, set); | |
7a442791 | 991 | } |
402209ff JH |
992 | #endif |
993 | #ifdef EH_RETURN_HANDLER_RTX | |
fe3ad572 | 994 | if ((! HAVE_epilogue || ! epilogue_completed) |
402209ff | 995 | && current_function_calls_eh_return) |
2b2c8b3e | 996 | { |
402209ff JH |
997 | rtx tmp = EH_RETURN_HANDLER_RTX; |
998 | if (tmp && REG_P (tmp)) | |
999 | mark_reg (tmp, set); | |
2b2c8b3e | 1000 | } |
402209ff | 1001 | #endif |
7a442791 | 1002 | |
402209ff JH |
1003 | /* Mark function return value. */ |
1004 | diddle_return_value (mark_reg, set); | |
7a442791 JH |
1005 | } |
1006 | ||
402209ff JH |
1007 | /* Propagate global life info around the graph of basic blocks. Begin |
1008 | considering blocks with their corresponding bit set in BLOCKS_IN. | |
1009 | If BLOCKS_IN is null, consider it the universal set. | |
b9b2c339 | 1010 | |
402209ff | 1011 | BLOCKS_OUT is set for every block that was changed. */ |
b9b2c339 | 1012 | |
402209ff | 1013 | static void |
6cf9ac28 | 1014 | calculate_global_regs_live (sbitmap blocks_in, sbitmap blocks_out, int flags) |
402209ff | 1015 | { |
e0082a72 | 1016 | basic_block *queue, *qhead, *qtail, *qend, bb; |
f3ea5f6a RH |
1017 | regset tmp, new_live_at_end, invalidated_by_call; |
1018 | regset_head tmp_head, invalidated_by_call_head; | |
402209ff JH |
1019 | regset_head new_live_at_end_head; |
1020 | int i; | |
b9b2c339 | 1021 | |
1540f9eb | 1022 | /* Some passes used to forget clear aux field of basic block causing |
8d9afc4e | 1023 | sick behavior here. */ |
1540f9eb | 1024 | #ifdef ENABLE_CHECKING |
e0082a72 | 1025 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb) |
0bccc606 | 1026 | gcc_assert (!bb->aux); |
1540f9eb JH |
1027 | #endif |
1028 | ||
402209ff JH |
1029 | tmp = INITIALIZE_REG_SET (tmp_head); |
1030 | new_live_at_end = INITIALIZE_REG_SET (new_live_at_end_head); | |
f3ea5f6a | 1031 | invalidated_by_call = INITIALIZE_REG_SET (invalidated_by_call_head); |
b9b2c339 | 1032 | |
d6a7951f | 1033 | /* Inconveniently, this is only readily available in hard reg set form. */ |
402209ff | 1034 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) |
f3ea5f6a RH |
1035 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) |
1036 | SET_REGNO_REG_SET (invalidated_by_call, i); | |
2b2c8b3e | 1037 | |
402209ff JH |
1038 | /* Create a worklist. Allocate an extra slot for ENTRY_BLOCK, and one |
1039 | because the `head == tail' style test for an empty queue doesn't | |
1040 | work with a full queue. */ | |
703ad42b | 1041 | queue = xmalloc ((n_basic_blocks + 2) * sizeof (*queue)); |
402209ff | 1042 | qtail = queue; |
0b17ab2f | 1043 | qhead = qend = queue + n_basic_blocks + 2; |
2b2c8b3e | 1044 | |
402209ff JH |
1045 | /* Queue the blocks set in the initial mask. Do this in reverse block |
1046 | number order so that we are more likely for the first round to do | |
1047 | useful work. We use AUX non-null to flag that the block is queued. */ | |
1048 | if (blocks_in) | |
c319629b | 1049 | { |
e0082a72 ZD |
1050 | FOR_EACH_BB (bb) |
1051 | if (TEST_BIT (blocks_in, bb->index)) | |
1052 | { | |
1053 | *--qhead = bb; | |
1054 | bb->aux = bb; | |
1055 | } | |
2b2c8b3e | 1056 | } |
402209ff | 1057 | else |
e881bb1b | 1058 | { |
bf77398c | 1059 | FOR_EACH_BB (bb) |
402209ff | 1060 | { |
402209ff JH |
1061 | *--qhead = bb; |
1062 | bb->aux = bb; | |
1063 | } | |
e881bb1b | 1064 | } |
e881bb1b | 1065 | |
70e0ccd0 AO |
1066 | /* We clean aux when we remove the initially-enqueued bbs, but we |
1067 | don't enqueue ENTRY and EXIT initially, so clean them upfront and | |
1068 | unconditionally. */ | |
1069 | ENTRY_BLOCK_PTR->aux = EXIT_BLOCK_PTR->aux = NULL; | |
1070 | ||
402209ff JH |
1071 | if (blocks_out) |
1072 | sbitmap_zero (blocks_out); | |
e881bb1b | 1073 | |
402209ff JH |
1074 | /* We work through the queue until there are no more blocks. What |
1075 | is live at the end of this block is precisely the union of what | |
1076 | is live at the beginning of all its successors. So, we set its | |
1077 | GLOBAL_LIVE_AT_END field based on the GLOBAL_LIVE_AT_START field | |
1078 | for its successors. Then, we compute GLOBAL_LIVE_AT_START for | |
1079 | this block by walking through the instructions in this block in | |
1080 | reverse order and updating as we go. If that changed | |
1081 | GLOBAL_LIVE_AT_START, we add the predecessors of the block to the | |
1082 | queue; they will now need to recalculate GLOBAL_LIVE_AT_END. | |
e881bb1b | 1083 | |
402209ff JH |
1084 | We are guaranteed to terminate, because GLOBAL_LIVE_AT_START |
1085 | never shrinks. If a register appears in GLOBAL_LIVE_AT_START, it | |
1086 | must either be live at the end of the block, or used within the | |
1087 | block. In the latter case, it will certainly never disappear | |
1088 | from GLOBAL_LIVE_AT_START. In the former case, the register | |
1089 | could go away only if it disappeared from GLOBAL_LIVE_AT_START | |
1090 | for one of the successor blocks. By induction, that cannot | |
1091 | occur. */ | |
1092 | while (qhead != qtail) | |
e881bb1b | 1093 | { |
402209ff JH |
1094 | int rescan, changed; |
1095 | basic_block bb; | |
e881bb1b | 1096 | edge e; |
628f6a4e | 1097 | edge_iterator ei; |
e881bb1b | 1098 | |
402209ff JH |
1099 | bb = *qhead++; |
1100 | if (qhead == qend) | |
1101 | qhead = queue; | |
1102 | bb->aux = NULL; | |
1103 | ||
1104 | /* Begin by propagating live_at_start from the successor blocks. */ | |
1105 | CLEAR_REG_SET (new_live_at_end); | |
e881bb1b | 1106 | |
628f6a4e BE |
1107 | if (EDGE_COUNT (bb->succs) > 0) |
1108 | FOR_EACH_EDGE (e, ei, bb->succs) | |
15b5aef3 RH |
1109 | { |
1110 | basic_block sb = e->dest; | |
1111 | ||
1112 | /* Call-clobbered registers die across exception and | |
1113 | call edges. */ | |
1114 | /* ??? Abnormal call edges ignored for the moment, as this gets | |
1115 | confused by sibling call edges, which crashes reg-stack. */ | |
1116 | if (e->flags & EDGE_EH) | |
1117 | { | |
1118 | bitmap_operation (tmp, sb->global_live_at_start, | |
f3ea5f6a | 1119 | invalidated_by_call, BITMAP_AND_COMPL); |
15b5aef3 RH |
1120 | IOR_REG_SET (new_live_at_end, tmp); |
1121 | } | |
1122 | else | |
1123 | IOR_REG_SET (new_live_at_end, sb->global_live_at_start); | |
1124 | ||
1125 | /* If a target saves one register in another (instead of on | |
1126 | the stack) the save register will need to be live for EH. */ | |
1127 | if (e->flags & EDGE_EH) | |
1128 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1129 | if (EH_USES (i)) | |
1130 | SET_REGNO_REG_SET (new_live_at_end, i); | |
1131 | } | |
1132 | else | |
1133 | { | |
1134 | /* This might be a noreturn function that throws. And | |
1135 | even if it isn't, getting the unwind info right helps | |
1136 | debugging. */ | |
1137 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1138 | if (EH_USES (i)) | |
1139 | SET_REGNO_REG_SET (new_live_at_end, i); | |
402209ff | 1140 | } |
e881bb1b | 1141 | |
402209ff JH |
1142 | /* The all-important stack pointer must always be live. */ |
1143 | SET_REGNO_REG_SET (new_live_at_end, STACK_POINTER_REGNUM); | |
1e7d57a3 | 1144 | |
402209ff JH |
1145 | /* Before reload, there are a few registers that must be forced |
1146 | live everywhere -- which might not already be the case for | |
1147 | blocks within infinite loops. */ | |
1148 | if (! reload_completed) | |
1149 | { | |
1150 | /* Any reference to any pseudo before reload is a potential | |
1151 | reference of the frame pointer. */ | |
1152 | SET_REGNO_REG_SET (new_live_at_end, FRAME_POINTER_REGNUM); | |
c9bacfdb | 1153 | |
402209ff JH |
1154 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
1155 | /* Pseudos with argument area equivalences may require | |
1156 | reloading via the argument pointer. */ | |
1157 | if (fixed_regs[ARG_POINTER_REGNUM]) | |
1158 | SET_REGNO_REG_SET (new_live_at_end, ARG_POINTER_REGNUM); | |
1159 | #endif | |
e881bb1b | 1160 | |
402209ff JH |
1161 | /* Any constant, or pseudo with constant equivalences, may |
1162 | require reloading from memory using the pic register. */ | |
fc555370 | 1163 | if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM |
402209ff JH |
1164 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) |
1165 | SET_REGNO_REG_SET (new_live_at_end, PIC_OFFSET_TABLE_REGNUM); | |
e881bb1b | 1166 | } |
e881bb1b | 1167 | |
402209ff JH |
1168 | if (bb == ENTRY_BLOCK_PTR) |
1169 | { | |
1170 | COPY_REG_SET (bb->global_live_at_end, new_live_at_end); | |
1171 | continue; | |
1172 | } | |
e881bb1b | 1173 | |
402209ff JH |
1174 | /* On our first pass through this block, we'll go ahead and continue. |
1175 | Recognize first pass by local_set NULL. On subsequent passes, we | |
1176 | get to skip out early if live_at_end wouldn't have changed. */ | |
e881bb1b | 1177 | |
402209ff JH |
1178 | if (bb->local_set == NULL) |
1179 | { | |
1180 | bb->local_set = OBSTACK_ALLOC_REG_SET (&flow_obstack); | |
1181 | bb->cond_local_set = OBSTACK_ALLOC_REG_SET (&flow_obstack); | |
1182 | rescan = 1; | |
1183 | } | |
1184 | else | |
1185 | { | |
1186 | /* If any bits were removed from live_at_end, we'll have to | |
1187 | rescan the block. This wouldn't be necessary if we had | |
1188 | precalculated local_live, however with PROP_SCAN_DEAD_CODE | |
1189 | local_live is really dependent on live_at_end. */ | |
1190 | CLEAR_REG_SET (tmp); | |
1191 | rescan = bitmap_operation (tmp, bb->global_live_at_end, | |
1192 | new_live_at_end, BITMAP_AND_COMPL); | |
e881bb1b | 1193 | |
402209ff JH |
1194 | if (! rescan) |
1195 | { | |
1196 | /* If any of the registers in the new live_at_end set are | |
1197 | conditionally set in this basic block, we must rescan. | |
1198 | This is because conditional lifetimes at the end of the | |
1199 | block do not just take the live_at_end set into account, | |
1200 | but also the liveness at the start of each successor | |
1201 | block. We can miss changes in those sets if we only | |
1202 | compare the new live_at_end against the previous one. */ | |
1203 | CLEAR_REG_SET (tmp); | |
1204 | rescan = bitmap_operation (tmp, new_live_at_end, | |
1205 | bb->cond_local_set, BITMAP_AND); | |
1206 | } | |
e881bb1b | 1207 | |
402209ff JH |
1208 | if (! rescan) |
1209 | { | |
1210 | /* Find the set of changed bits. Take this opportunity | |
1211 | to notice that this set is empty and early out. */ | |
1212 | CLEAR_REG_SET (tmp); | |
1213 | changed = bitmap_operation (tmp, bb->global_live_at_end, | |
1214 | new_live_at_end, BITMAP_XOR); | |
1215 | if (! changed) | |
1216 | continue; | |
e881bb1b | 1217 | |
402209ff JH |
1218 | /* If any of the changed bits overlap with local_set, |
1219 | we'll have to rescan the block. Detect overlap by | |
1220 | the AND with ~local_set turning off bits. */ | |
1221 | rescan = bitmap_operation (tmp, tmp, bb->local_set, | |
1222 | BITMAP_AND_COMPL); | |
1223 | } | |
1224 | } | |
e881bb1b | 1225 | |
402209ff JH |
1226 | /* Let our caller know that BB changed enough to require its |
1227 | death notes updated. */ | |
1228 | if (blocks_out) | |
0b17ab2f | 1229 | SET_BIT (blocks_out, bb->index); |
e881bb1b | 1230 | |
402209ff JH |
1231 | if (! rescan) |
1232 | { | |
1233 | /* Add to live_at_start the set of all registers in | |
1234 | new_live_at_end that aren't in the old live_at_end. */ | |
19d3c25c | 1235 | |
402209ff JH |
1236 | bitmap_operation (tmp, new_live_at_end, bb->global_live_at_end, |
1237 | BITMAP_AND_COMPL); | |
1238 | COPY_REG_SET (bb->global_live_at_end, new_live_at_end); | |
c9bacfdb | 1239 | |
402209ff JH |
1240 | changed = bitmap_operation (bb->global_live_at_start, |
1241 | bb->global_live_at_start, | |
1242 | tmp, BITMAP_IOR); | |
1243 | if (! changed) | |
1244 | continue; | |
e881bb1b RH |
1245 | } |
1246 | else | |
1247 | { | |
402209ff | 1248 | COPY_REG_SET (bb->global_live_at_end, new_live_at_end); |
e881bb1b | 1249 | |
402209ff JH |
1250 | /* Rescan the block insn by insn to turn (a copy of) live_at_end |
1251 | into live_at_start. */ | |
1252 | propagate_block (bb, new_live_at_end, bb->local_set, | |
1253 | bb->cond_local_set, flags); | |
e881bb1b | 1254 | |
402209ff JH |
1255 | /* If live_at start didn't change, no need to go farther. */ |
1256 | if (REG_SET_EQUAL_P (bb->global_live_at_start, new_live_at_end)) | |
1257 | continue; | |
e881bb1b | 1258 | |
402209ff JH |
1259 | COPY_REG_SET (bb->global_live_at_start, new_live_at_end); |
1260 | } | |
a8688bd6 | 1261 | |
402209ff JH |
1262 | /* Queue all predecessors of BB so that we may re-examine |
1263 | their live_at_end. */ | |
628f6a4e | 1264 | FOR_EACH_EDGE (e, ei, bb->preds) |
402209ff JH |
1265 | { |
1266 | basic_block pb = e->src; | |
1267 | if (pb->aux == NULL) | |
1268 | { | |
1269 | *qtail++ = pb; | |
1270 | if (qtail == qend) | |
1271 | qtail = queue; | |
1272 | pb->aux = pb; | |
1273 | } | |
1274 | } | |
a8688bd6 AM |
1275 | } |
1276 | ||
402209ff JH |
1277 | FREE_REG_SET (tmp); |
1278 | FREE_REG_SET (new_live_at_end); | |
f3ea5f6a | 1279 | FREE_REG_SET (invalidated_by_call); |
f5540cd4 | 1280 | |
402209ff JH |
1281 | if (blocks_out) |
1282 | { | |
1283 | EXECUTE_IF_SET_IN_SBITMAP (blocks_out, 0, i, | |
1284 | { | |
0b17ab2f | 1285 | basic_block bb = BASIC_BLOCK (i); |
402209ff JH |
1286 | FREE_REG_SET (bb->local_set); |
1287 | FREE_REG_SET (bb->cond_local_set); | |
1288 | }); | |
e881bb1b RH |
1289 | } |
1290 | else | |
1291 | { | |
e0082a72 | 1292 | FOR_EACH_BB (bb) |
402209ff | 1293 | { |
402209ff JH |
1294 | FREE_REG_SET (bb->local_set); |
1295 | FREE_REG_SET (bb->cond_local_set); | |
1296 | } | |
f5540cd4 | 1297 | } |
19d3c25c | 1298 | |
402209ff | 1299 | free (queue); |
e881bb1b | 1300 | } |
0626ef8a AM |
1301 | |
1302 | \f | |
09da1532 | 1303 | /* This structure is used to pass parameters to and from the |
4a913dd6 EC |
1304 | the function find_regno_partial(). It is used to pass in the |
1305 | register number we are looking, as well as to return any rtx | |
0626ef8a AM |
1306 | we find. */ |
1307 | ||
1308 | typedef struct { | |
1309 | unsigned regno_to_find; | |
1310 | rtx retval; | |
1311 | } find_regno_partial_param; | |
1312 | ||
1313 | ||
1314 | /* Find the rtx for the reg numbers specified in 'data' if it is | |
1315 | part of an expression which only uses part of the register. Return | |
1316 | it in the structure passed in. */ | |
4a913dd6 | 1317 | static int |
6cf9ac28 | 1318 | find_regno_partial (rtx *ptr, void *data) |
0626ef8a AM |
1319 | { |
1320 | find_regno_partial_param *param = (find_regno_partial_param *)data; | |
1321 | unsigned reg = param->regno_to_find; | |
1322 | param->retval = NULL_RTX; | |
1323 | ||
1324 | if (*ptr == NULL_RTX) | |
1325 | return 0; | |
1326 | ||
4a913dd6 | 1327 | switch (GET_CODE (*ptr)) |
0626ef8a | 1328 | { |
448cad06 AH |
1329 | case ZERO_EXTRACT: |
1330 | case SIGN_EXTRACT: | |
1331 | case STRICT_LOW_PART: | |
f8cfc6aa | 1332 | if (REG_P (XEXP (*ptr, 0)) && REGNO (XEXP (*ptr, 0)) == reg) |
448cad06 AH |
1333 | { |
1334 | param->retval = XEXP (*ptr, 0); | |
1335 | return 1; | |
1336 | } | |
1337 | break; | |
0626ef8a | 1338 | |
448cad06 | 1339 | case SUBREG: |
f8cfc6aa | 1340 | if (REG_P (SUBREG_REG (*ptr)) |
448cad06 AH |
1341 | && REGNO (SUBREG_REG (*ptr)) == reg) |
1342 | { | |
1343 | param->retval = SUBREG_REG (*ptr); | |
1344 | return 1; | |
1345 | } | |
1346 | break; | |
1347 | ||
1348 | default: | |
1349 | break; | |
0626ef8a AM |
1350 | } |
1351 | ||
1352 | return 0; | |
1353 | } | |
1354 | ||
1355 | /* Process all immediate successors of the entry block looking for pseudo | |
4a913dd6 EC |
1356 | registers which are live on entry. Find all of those whose first |
1357 | instance is a partial register reference of some kind, and initialize | |
0626ef8a | 1358 | them to 0 after the entry block. This will prevent bit sets within |
4a913dd6 | 1359 | registers whose value is unknown, and may contain some kind of sticky |
0626ef8a AM |
1360 | bits we don't want. */ |
1361 | ||
1362 | int | |
6cf9ac28 | 1363 | initialize_uninitialized_subregs (void) |
0626ef8a AM |
1364 | { |
1365 | rtx insn; | |
1366 | edge e; | |
1367 | int reg, did_something = 0; | |
1368 | find_regno_partial_param param; | |
628f6a4e | 1369 | edge_iterator ei; |
0626ef8a | 1370 | |
628f6a4e | 1371 | FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) |
0626ef8a AM |
1372 | { |
1373 | basic_block bb = e->dest; | |
1374 | regset map = bb->global_live_at_start; | |
a2041967 KH |
1375 | reg_set_iterator rsi; |
1376 | ||
1377 | EXECUTE_IF_SET_IN_REG_SET (map, FIRST_PSEUDO_REGISTER, reg, rsi) | |
0626ef8a AM |
1378 | { |
1379 | int uid = REGNO_FIRST_UID (reg); | |
1380 | rtx i; | |
1381 | ||
1382 | /* Find an insn which mentions the register we are looking for. | |
1383 | Its preferable to have an instance of the register's rtl since | |
4a913dd6 | 1384 | there may be various flags set which we need to duplicate. |
0626ef8a | 1385 | If we can't find it, its probably an automatic whose initial |
23d1aac4 | 1386 | value doesn't matter, or hopefully something we don't care about. */ |
0626ef8a AM |
1387 | for (i = get_insns (); i && INSN_UID (i) != uid; i = NEXT_INSN (i)) |
1388 | ; | |
1389 | if (i != NULL_RTX) | |
1390 | { | |
1391 | /* Found the insn, now get the REG rtx, if we can. */ | |
1392 | param.regno_to_find = reg; | |
1393 | for_each_rtx (&i, find_regno_partial, ¶m); | |
1394 | if (param.retval != NULL_RTX) | |
1395 | { | |
a7a7d7ac KH |
1396 | start_sequence (); |
1397 | emit_move_insn (param.retval, | |
1398 | CONST0_RTX (GET_MODE (param.retval))); | |
1399 | insn = get_insns (); | |
1400 | end_sequence (); | |
0626ef8a AM |
1401 | insert_insn_on_edge (insn, e); |
1402 | did_something = 1; | |
1403 | } | |
1404 | } | |
a2041967 | 1405 | } |
0626ef8a AM |
1406 | } |
1407 | ||
1408 | if (did_something) | |
1409 | commit_edge_insertions (); | |
1410 | return did_something; | |
1411 | } | |
1412 | ||
402209ff JH |
1413 | \f |
1414 | /* Subroutines of life analysis. */ | |
e881bb1b | 1415 | |
402209ff JH |
1416 | /* Allocate the permanent data structures that represent the results |
1417 | of life analysis. Not static since used also for stupid life analysis. */ | |
e881bb1b RH |
1418 | |
1419 | void | |
6cf9ac28 | 1420 | allocate_bb_life_data (void) |
e881bb1b | 1421 | { |
e0082a72 | 1422 | basic_block bb; |
c9bacfdb | 1423 | |
e0082a72 | 1424 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb) |
e881bb1b | 1425 | { |
402209ff JH |
1426 | bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (&flow_obstack); |
1427 | bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (&flow_obstack); | |
e881bb1b | 1428 | } |
f1330226 | 1429 | |
402209ff JH |
1430 | regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (&flow_obstack); |
1431 | } | |
0ab409ed | 1432 | |
402209ff | 1433 | void |
6cf9ac28 | 1434 | allocate_reg_life_data (void) |
0ab409ed MH |
1435 | { |
1436 | int i; | |
0ab409ed | 1437 | |
402209ff | 1438 | max_regno = max_reg_num (); |
0bccc606 | 1439 | gcc_assert (!reg_deaths); |
736b64dd | 1440 | reg_deaths = xcalloc (sizeof (*reg_deaths), max_regno); |
0ab409ed | 1441 | |
402209ff JH |
1442 | /* Recalculate the register space, in case it has grown. Old style |
1443 | vector oriented regsets would set regset_{size,bytes} here also. */ | |
1444 | allocate_reg_info (max_regno, FALSE, FALSE); | |
0ab409ed | 1445 | |
402209ff JH |
1446 | /* Reset all the data we'll collect in propagate_block and its |
1447 | subroutines. */ | |
1448 | for (i = 0; i < max_regno; i++) | |
0ab409ed | 1449 | { |
402209ff JH |
1450 | REG_N_SETS (i) = 0; |
1451 | REG_N_REFS (i) = 0; | |
1452 | REG_N_DEATHS (i) = 0; | |
1453 | REG_N_CALLS_CROSSED (i) = 0; | |
1454 | REG_LIVE_LENGTH (i) = 0; | |
e505be85 | 1455 | REG_FREQ (i) = 0; |
402209ff | 1456 | REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; |
0ab409ed | 1457 | } |
402209ff | 1458 | } |
0ab409ed | 1459 | |
402209ff | 1460 | /* Delete dead instructions for propagate_block. */ |
f1330226 | 1461 | |
402209ff | 1462 | static void |
6cf9ac28 | 1463 | propagate_block_delete_insn (rtx insn) |
402209ff JH |
1464 | { |
1465 | rtx inote = find_reg_note (insn, REG_LABEL, NULL_RTX); | |
f1330226 | 1466 | |
402209ff JH |
1467 | /* If the insn referred to a label, and that label was attached to |
1468 | an ADDR_VEC, it's safe to delete the ADDR_VEC. In fact, it's | |
1469 | pretty much mandatory to delete it, because the ADDR_VEC may be | |
1470 | referencing labels that no longer exist. | |
f1330226 | 1471 | |
402209ff JH |
1472 | INSN may reference a deleted label, particularly when a jump |
1473 | table has been optimized into a direct jump. There's no | |
1474 | real good way to fix up the reference to the deleted label | |
19f71cd7 | 1475 | when the label is deleted, so we just allow it here. */ |
0ab409ed | 1476 | |
4b4bf941 | 1477 | if (inote && LABEL_P (inote)) |
0ab409ed | 1478 | { |
402209ff JH |
1479 | rtx label = XEXP (inote, 0); |
1480 | rtx next; | |
0ab409ed | 1481 | |
402209ff JH |
1482 | /* The label may be forced if it has been put in the constant |
1483 | pool. If that is the only use we must discard the table | |
1484 | jump following it, but not the label itself. */ | |
1485 | if (LABEL_NUSES (label) == 1 + LABEL_PRESERVE_P (label) | |
1486 | && (next = next_nonnote_insn (label)) != NULL | |
4b4bf941 | 1487 | && JUMP_P (next) |
402209ff JH |
1488 | && (GET_CODE (PATTERN (next)) == ADDR_VEC |
1489 | || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)) | |
0ab409ed | 1490 | { |
402209ff JH |
1491 | rtx pat = PATTERN (next); |
1492 | int diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC; | |
1493 | int len = XVECLEN (pat, diff_vec_p); | |
1494 | int i; | |
f1330226 | 1495 | |
402209ff JH |
1496 | for (i = 0; i < len; i++) |
1497 | LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0))--; | |
0ab409ed | 1498 | |
3dec4024 JH |
1499 | delete_insn_and_edges (next); |
1500 | ndead++; | |
0ab409ed MH |
1501 | } |
1502 | } | |
1503 | ||
3dec4024 JH |
1504 | delete_insn_and_edges (insn); |
1505 | ndead++; | |
0ab409ed | 1506 | } |
e881bb1b | 1507 | |
402209ff JH |
1508 | /* Delete dead libcalls for propagate_block. Return the insn |
1509 | before the libcall. */ | |
e881bb1b | 1510 | |
402209ff | 1511 | static rtx |
6cf9ac28 | 1512 | propagate_block_delete_libcall (rtx insn, rtx note) |
402209ff JH |
1513 | { |
1514 | rtx first = XEXP (note, 0); | |
1515 | rtx before = PREV_INSN (first); | |
e881bb1b | 1516 | |
3dec4024 JH |
1517 | delete_insn_chain_and_edges (first, insn); |
1518 | ndead++; | |
402209ff | 1519 | return before; |
1e29ee12 JL |
1520 | } |
1521 | ||
402209ff JH |
1522 | /* Update the life-status of regs for one insn. Return the previous insn. */ |
1523 | ||
1524 | rtx | |
6cf9ac28 | 1525 | propagate_one_insn (struct propagate_block_info *pbi, rtx insn) |
1e29ee12 | 1526 | { |
402209ff JH |
1527 | rtx prev = PREV_INSN (insn); |
1528 | int flags = pbi->flags; | |
1529 | int insn_is_dead = 0; | |
1530 | int libcall_is_dead = 0; | |
1531 | rtx note; | |
1e29ee12 JL |
1532 | int i; |
1533 | ||
402209ff JH |
1534 | if (! INSN_P (insn)) |
1535 | return prev; | |
164d59e0 | 1536 | |
402209ff JH |
1537 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); |
1538 | if (flags & PROP_SCAN_DEAD_CODE) | |
1539 | { | |
1540 | insn_is_dead = insn_dead_p (pbi, PATTERN (insn), 0, REG_NOTES (insn)); | |
1541 | libcall_is_dead = (insn_is_dead && note != 0 | |
1542 | && libcall_dead_p (pbi, note, insn)); | |
1543 | } | |
e881bb1b | 1544 | |
402209ff JH |
1545 | /* If an instruction consists of just dead store(s) on final pass, |
1546 | delete it. */ | |
1547 | if ((flags & PROP_KILL_DEAD_CODE) && insn_is_dead) | |
e881bb1b | 1548 | { |
402209ff JH |
1549 | /* If we're trying to delete a prologue or epilogue instruction |
1550 | that isn't flagged as possibly being dead, something is wrong. | |
1551 | But if we are keeping the stack pointer depressed, we might well | |
1552 | be deleting insns that are used to compute the amount to update | |
1553 | it by, so they are fine. */ | |
1554 | if (reload_completed | |
1555 | && !(TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE | |
1556 | && (TYPE_RETURNS_STACK_DEPRESSED | |
1557 | (TREE_TYPE (current_function_decl)))) | |
1558 | && (((HAVE_epilogue || HAVE_prologue) | |
1559 | && prologue_epilogue_contains (insn)) | |
1560 | || (HAVE_sibcall_epilogue | |
1561 | && sibcall_epilogue_contains (insn))) | |
1562 | && find_reg_note (insn, REG_MAYBE_DEAD, NULL_RTX) == 0) | |
31fce3c4 | 1563 | fatal_insn ("Attempt to delete prologue/epilogue insn:", insn); |
e881bb1b | 1564 | |
402209ff JH |
1565 | /* Record sets. Do this even for dead instructions, since they |
1566 | would have killed the values if they hadn't been deleted. */ | |
1567 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1568 | |
402209ff JH |
1569 | /* CC0 is now known to be dead. Either this insn used it, |
1570 | in which case it doesn't anymore, or clobbered it, | |
1571 | so the next insn can't use it. */ | |
1572 | pbi->cc0_live = 0; | |
e881bb1b | 1573 | |
402209ff | 1574 | if (libcall_is_dead) |
607a6500 | 1575 | prev = propagate_block_delete_libcall ( insn, note); |
d35dfca9 JL |
1576 | else |
1577 | { | |
1578 | ||
b0ac73f8 JL |
1579 | /* If INSN contains a RETVAL note and is dead, but the libcall |
1580 | as a whole is not dead, then we want to remove INSN, but | |
1581 | not the whole libcall sequence. | |
1582 | ||
6cf9ac28 | 1583 | However, we need to also remove the dangling REG_LIBCALL |
b0ac73f8 JL |
1584 | note so that we do not have mis-matched LIBCALL/RETVAL |
1585 | notes. In theory we could find a new location for the | |
6cf9ac28 | 1586 | REG_RETVAL note, but it hardly seems worth the effort. |
b0ac73f8 JL |
1587 | |
1588 | NOTE at this point will be the RETVAL note if it exists. */ | |
d35dfca9 JL |
1589 | if (note) |
1590 | { | |
d35dfca9 | 1591 | rtx libcall_note; |
6cf9ac28 | 1592 | |
d35dfca9 JL |
1593 | libcall_note |
1594 | = find_reg_note (XEXP (note, 0), REG_LIBCALL, NULL_RTX); | |
1595 | remove_note (XEXP (note, 0), libcall_note); | |
1596 | } | |
b0ac73f8 JL |
1597 | |
1598 | /* Similarly if INSN contains a LIBCALL note, remove the | |
fbe5a4a6 | 1599 | dangling REG_RETVAL note. */ |
b0ac73f8 JL |
1600 | note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); |
1601 | if (note) | |
1602 | { | |
1603 | rtx retval_note; | |
1604 | ||
1605 | retval_note | |
1606 | = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL_RTX); | |
1607 | remove_note (XEXP (note, 0), retval_note); | |
1608 | } | |
1609 | ||
1610 | /* Now delete INSN. */ | |
d35dfca9 JL |
1611 | propagate_block_delete_insn (insn); |
1612 | } | |
e881bb1b | 1613 | |
402209ff JH |
1614 | return prev; |
1615 | } | |
e881bb1b | 1616 | |
402209ff JH |
1617 | /* See if this is an increment or decrement that can be merged into |
1618 | a following memory address. */ | |
1619 | #ifdef AUTO_INC_DEC | |
1620 | { | |
b3694847 | 1621 | rtx x = single_set (insn); |
e881bb1b | 1622 | |
402209ff JH |
1623 | /* Does this instruction increment or decrement a register? */ |
1624 | if ((flags & PROP_AUTOINC) | |
1625 | && x != 0 | |
f8cfc6aa | 1626 | && REG_P (SET_DEST (x)) |
402209ff JH |
1627 | && (GET_CODE (SET_SRC (x)) == PLUS |
1628 | || GET_CODE (SET_SRC (x)) == MINUS) | |
1629 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) | |
1630 | && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT | |
1631 | /* Ok, look for a following memory ref we can combine with. | |
1632 | If one is found, change the memory ref to a PRE_INC | |
1633 | or PRE_DEC, cancel this insn, and return 1. | |
1634 | Return 0 if nothing has been done. */ | |
1635 | && try_pre_increment_1 (pbi, insn)) | |
1636 | return prev; | |
1637 | } | |
1638 | #endif /* AUTO_INC_DEC */ | |
e881bb1b | 1639 | |
402209ff | 1640 | CLEAR_REG_SET (pbi->new_set); |
e881bb1b | 1641 | |
402209ff JH |
1642 | /* If this is not the final pass, and this insn is copying the value of |
1643 | a library call and it's dead, don't scan the insns that perform the | |
1644 | library call, so that the call's arguments are not marked live. */ | |
1645 | if (libcall_is_dead) | |
e881bb1b | 1646 | { |
402209ff JH |
1647 | /* Record the death of the dest reg. */ |
1648 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1649 | |
402209ff JH |
1650 | insn = XEXP (note, 0); |
1651 | return PREV_INSN (insn); | |
e881bb1b | 1652 | } |
402209ff JH |
1653 | else if (GET_CODE (PATTERN (insn)) == SET |
1654 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1655 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1656 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx | |
1657 | && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT) | |
e344dbf3 R |
1658 | { |
1659 | /* We have an insn to pop a constant amount off the stack. | |
1660 | (Such insns use PLUS regardless of the direction of the stack, | |
1661 | and any insn to adjust the stack by a constant is always a pop | |
1662 | or part of a push.) | |
1663 | These insns, if not dead stores, have no effect on life, though | |
1664 | they do have an effect on the memory stores we are tracking. */ | |
1665 | invalidate_mems_from_set (pbi, stack_pointer_rtx); | |
1666 | /* Still, we need to update local_set, lest ifcvt.c:dead_or_predicable | |
1667 | concludes that the stack pointer is not modified. */ | |
1668 | mark_set_regs (pbi, PATTERN (insn), insn); | |
1669 | } | |
402209ff JH |
1670 | else |
1671 | { | |
5a133afd | 1672 | rtx note; |
402209ff JH |
1673 | /* Any regs live at the time of a call instruction must not go |
1674 | in a register clobbered by calls. Find all regs now live and | |
1675 | record this for them. */ | |
e881bb1b | 1676 | |
4b4bf941 | 1677 | if (CALL_P (insn) && (flags & PROP_REG_INFO)) |
a2041967 KH |
1678 | { |
1679 | reg_set_iterator rsi; | |
1680 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, rsi) | |
1681 | REG_N_CALLS_CROSSED (i)++; | |
1682 | } | |
e881bb1b | 1683 | |
402209ff JH |
1684 | /* Record sets. Do this even for dead instructions, since they |
1685 | would have killed the values if they hadn't been deleted. */ | |
1686 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1687 | |
4b4bf941 | 1688 | if (CALL_P (insn)) |
402209ff | 1689 | { |
d444b5e8 RH |
1690 | regset live_at_end; |
1691 | bool sibcall_p; | |
402209ff | 1692 | rtx note, cond; |
d444b5e8 | 1693 | int i; |
e881bb1b | 1694 | |
402209ff JH |
1695 | cond = NULL_RTX; |
1696 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
1697 | cond = COND_EXEC_TEST (PATTERN (insn)); | |
e881bb1b | 1698 | |
fe4b3c79 JL |
1699 | /* Non-constant calls clobber memory, constant calls do not |
1700 | clobber memory, though they may clobber outgoing arguments | |
1701 | on the stack. */ | |
402209ff JH |
1702 | if (! CONST_OR_PURE_CALL_P (insn)) |
1703 | { | |
1704 | free_EXPR_LIST_list (&pbi->mem_set_list); | |
1705 | pbi->mem_set_list_len = 0; | |
1706 | } | |
dd3f0101 | 1707 | else |
fe4b3c79 | 1708 | invalidate_mems_from_set (pbi, stack_pointer_rtx); |
e881bb1b | 1709 | |
402209ff JH |
1710 | /* There may be extra registers to be clobbered. */ |
1711 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
1712 | note; | |
1713 | note = XEXP (note, 1)) | |
1714 | if (GET_CODE (XEXP (note, 0)) == CLOBBER) | |
1715 | mark_set_1 (pbi, CLOBBER, XEXP (XEXP (note, 0), 0), | |
1716 | cond, insn, pbi->flags); | |
c9bacfdb | 1717 | |
d444b5e8 | 1718 | /* Calls change all call-used and global registers; sibcalls do not |
99af0d26 RH |
1719 | clobber anything that must be preserved at end-of-function, |
1720 | except for return values. */ | |
d444b5e8 RH |
1721 | |
1722 | sibcall_p = SIBLING_CALL_P (insn); | |
1723 | live_at_end = EXIT_BLOCK_PTR->global_live_at_start; | |
402209ff | 1724 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
d444b5e8 | 1725 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i) |
99af0d26 RH |
1726 | && ! (sibcall_p |
1727 | && REGNO_REG_SET_P (live_at_end, i) | |
57856e4d R |
1728 | && ! refers_to_regno_p (i, i+1, |
1729 | current_function_return_rtx, | |
1730 | (rtx *) 0))) | |
402209ff | 1731 | { |
a10016d3 | 1732 | enum rtx_code code = global_regs[i] ? SET : CLOBBER; |
402209ff | 1733 | /* We do not want REG_UNUSED notes for these registers. */ |
a10016d3 | 1734 | mark_set_1 (pbi, code, regno_reg_rtx[i], cond, insn, |
402209ff JH |
1735 | pbi->flags & ~(PROP_DEATH_NOTES | PROP_REG_INFO)); |
1736 | } | |
1737 | } | |
312f6255 | 1738 | |
402209ff JH |
1739 | /* If an insn doesn't use CC0, it becomes dead since we assume |
1740 | that every insn clobbers it. So show it dead here; | |
1741 | mark_used_regs will set it live if it is referenced. */ | |
1742 | pbi->cc0_live = 0; | |
e881bb1b | 1743 | |
402209ff JH |
1744 | /* Record uses. */ |
1745 | if (! insn_is_dead) | |
1746 | mark_used_regs (pbi, PATTERN (insn), NULL_RTX, insn); | |
5a133afd JH |
1747 | if ((flags & PROP_EQUAL_NOTES) |
1748 | && ((note = find_reg_note (insn, REG_EQUAL, NULL_RTX)) | |
1749 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)))) | |
1750 | mark_used_regs (pbi, XEXP (note, 0), NULL_RTX, insn); | |
e881bb1b | 1751 | |
402209ff JH |
1752 | /* Sometimes we may have inserted something before INSN (such as a move) |
1753 | when we make an auto-inc. So ensure we will scan those insns. */ | |
1754 | #ifdef AUTO_INC_DEC | |
1755 | prev = PREV_INSN (insn); | |
1756 | #endif | |
e881bb1b | 1757 | |
4b4bf941 | 1758 | if (! insn_is_dead && CALL_P (insn)) |
402209ff | 1759 | { |
b3694847 | 1760 | int i; |
402209ff | 1761 | rtx note, cond; |
e881bb1b | 1762 | |
402209ff JH |
1763 | cond = NULL_RTX; |
1764 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
1765 | cond = COND_EXEC_TEST (PATTERN (insn)); | |
e881bb1b | 1766 | |
ee960939 OH |
1767 | /* Calls use their arguments, and may clobber memory which |
1768 | address involves some register. */ | |
402209ff JH |
1769 | for (note = CALL_INSN_FUNCTION_USAGE (insn); |
1770 | note; | |
1771 | note = XEXP (note, 1)) | |
ee960939 OH |
1772 | /* We find USE or CLOBBER entities in a FUNCTION_USAGE list: both |
1773 | of which mark_used_regs knows how to handle. */ | |
1774 | mark_used_regs (pbi, XEXP (XEXP (note, 0), 0), cond, insn); | |
e881bb1b | 1775 | |
402209ff | 1776 | /* The stack ptr is used (honorarily) by a CALL insn. */ |
736b64dd JH |
1777 | if ((flags & PROP_REG_INFO) |
1778 | && !REGNO_REG_SET_P (pbi->reg_live, STACK_POINTER_REGNUM)) | |
1779 | reg_deaths[STACK_POINTER_REGNUM] = pbi->insn_num; | |
402209ff | 1780 | SET_REGNO_REG_SET (pbi->reg_live, STACK_POINTER_REGNUM); |
e881bb1b | 1781 | |
402209ff JH |
1782 | /* Calls may also reference any of the global registers, |
1783 | so they are made live. */ | |
1784 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1785 | if (global_regs[i]) | |
e50126e8 | 1786 | mark_used_reg (pbi, regno_reg_rtx[i], cond, insn); |
402209ff | 1787 | } |
e881bb1b RH |
1788 | } |
1789 | ||
736b64dd | 1790 | pbi->insn_num++; |
402209ff JH |
1791 | |
1792 | return prev; | |
e881bb1b RH |
1793 | } |
1794 | ||
402209ff JH |
1795 | /* Initialize a propagate_block_info struct for public consumption. |
1796 | Note that the structure itself is opaque to this file, but that | |
1797 | the user can use the regsets provided here. */ | |
e881bb1b | 1798 | |
402209ff | 1799 | struct propagate_block_info * |
6cf9ac28 AJ |
1800 | init_propagate_block_info (basic_block bb, regset live, regset local_set, |
1801 | regset cond_local_set, int flags) | |
e881bb1b | 1802 | { |
402209ff | 1803 | struct propagate_block_info *pbi = xmalloc (sizeof (*pbi)); |
e881bb1b | 1804 | |
402209ff JH |
1805 | pbi->bb = bb; |
1806 | pbi->reg_live = live; | |
1807 | pbi->mem_set_list = NULL_RTX; | |
1808 | pbi->mem_set_list_len = 0; | |
1809 | pbi->local_set = local_set; | |
1810 | pbi->cond_local_set = cond_local_set; | |
1811 | pbi->cc0_live = 0; | |
1812 | pbi->flags = flags; | |
736b64dd | 1813 | pbi->insn_num = 0; |
c9bacfdb | 1814 | |
402209ff | 1815 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) |
703ad42b | 1816 | pbi->reg_next_use = xcalloc (max_reg_num (), sizeof (rtx)); |
e881bb1b | 1817 | else |
402209ff | 1818 | pbi->reg_next_use = NULL; |
e6cfb550 | 1819 | |
402209ff | 1820 | pbi->new_set = BITMAP_XMALLOC (); |
7a442791 | 1821 | |
402209ff JH |
1822 | #ifdef HAVE_conditional_execution |
1823 | pbi->reg_cond_dead = splay_tree_new (splay_tree_compare_ints, NULL, | |
1824 | free_reg_cond_life_info); | |
1825 | pbi->reg_cond_reg = BITMAP_XMALLOC (); | |
7a442791 | 1826 | |
38b2a605 RE |
1827 | /* If this block ends in a conditional branch, for each register |
1828 | live from one side of the branch and not the other, record the | |
1829 | register as conditionally dead. */ | |
4b4bf941 | 1830 | if (JUMP_P (BB_END (bb)) |
a813c111 | 1831 | && any_condjump_p (BB_END (bb))) |
402209ff JH |
1832 | { |
1833 | regset_head diff_head; | |
1834 | regset diff = INITIALIZE_REG_SET (diff_head); | |
1835 | basic_block bb_true, bb_false; | |
402209ff | 1836 | int i; |
421382ac | 1837 | |
402209ff | 1838 | /* Identify the successor blocks. */ |
628f6a4e BE |
1839 | bb_true = EDGE_SUCC (bb, 0)->dest; |
1840 | if (EDGE_COUNT (bb->succs) > 1) | |
402209ff | 1841 | { |
628f6a4e | 1842 | bb_false = EDGE_SUCC (bb, 1)->dest; |
c9bacfdb | 1843 | |
628f6a4e | 1844 | if (EDGE_SUCC (bb, 0)->flags & EDGE_FALLTHRU) |
402209ff JH |
1845 | { |
1846 | basic_block t = bb_false; | |
1847 | bb_false = bb_true; | |
1848 | bb_true = t; | |
1849 | } | |
0bccc606 | 1850 | else |
628f6a4e | 1851 | gcc_assert (EDGE_SUCC (bb, 1)->flags & EDGE_FALLTHRU); |
402209ff JH |
1852 | } |
1853 | else | |
1854 | { | |
1855 | /* This can happen with a conditional jump to the next insn. */ | |
0bccc606 | 1856 | gcc_assert (JUMP_LABEL (BB_END (bb)) == BB_HEAD (bb_true)); |
421382ac | 1857 | |
402209ff JH |
1858 | /* Simplest way to do nothing. */ |
1859 | bb_false = bb_true; | |
1860 | } | |
be1bb652 | 1861 | |
402209ff JH |
1862 | /* Compute which register lead different lives in the successors. */ |
1863 | if (bitmap_operation (diff, bb_true->global_live_at_start, | |
1864 | bb_false->global_live_at_start, BITMAP_XOR)) | |
1865 | { | |
38b2a605 | 1866 | /* Extract the condition from the branch. */ |
a813c111 | 1867 | rtx set_src = SET_SRC (pc_set (BB_END (bb))); |
38b2a605 | 1868 | rtx cond_true = XEXP (set_src, 0); |
402209ff | 1869 | rtx reg = XEXP (cond_true, 0); |
8965ece1 | 1870 | enum rtx_code inv_cond; |
be1bb652 | 1871 | |
402209ff JH |
1872 | if (GET_CODE (reg) == SUBREG) |
1873 | reg = SUBREG_REG (reg); | |
dc108b7a | 1874 | |
38b2a605 | 1875 | /* We can only track conditional lifetimes if the condition is |
8965ece1 PB |
1876 | in the form of a reversible comparison of a register against |
1877 | zero. If the condition is more complex than that, then it is | |
1878 | safe not to record any information. */ | |
1879 | inv_cond = reversed_comparison_code (cond_true, BB_END (bb)); | |
1880 | if (inv_cond != UNKNOWN | |
1881 | && REG_P (reg) | |
38b2a605 RE |
1882 | && XEXP (cond_true, 1) == const0_rtx) |
1883 | { | |
1884 | rtx cond_false | |
8965ece1 | 1885 | = gen_rtx_fmt_ee (inv_cond, |
38b2a605 RE |
1886 | GET_MODE (cond_true), XEXP (cond_true, 0), |
1887 | XEXP (cond_true, 1)); | |
a2041967 KH |
1888 | reg_set_iterator rsi; |
1889 | ||
38b2a605 RE |
1890 | if (GET_CODE (XEXP (set_src, 1)) == PC) |
1891 | { | |
1892 | rtx t = cond_false; | |
1893 | cond_false = cond_true; | |
1894 | cond_true = t; | |
1895 | } | |
dc108b7a | 1896 | |
38b2a605 | 1897 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (reg)); |
dc108b7a | 1898 | |
38b2a605 | 1899 | /* For each such register, mark it conditionally dead. */ |
a2041967 KH |
1900 | EXECUTE_IF_SET_IN_REG_SET (diff, 0, i, rsi) |
1901 | { | |
1902 | struct reg_cond_life_info *rcli; | |
1903 | rtx cond; | |
1904 | ||
1905 | rcli = xmalloc (sizeof (*rcli)); | |
1906 | ||
1907 | if (REGNO_REG_SET_P (bb_true->global_live_at_start, i)) | |
1908 | cond = cond_false; | |
1909 | else | |
1910 | cond = cond_true; | |
1911 | rcli->condition = cond; | |
1912 | rcli->stores = const0_rtx; | |
1913 | rcli->orig_condition = cond; | |
1914 | ||
1915 | splay_tree_insert (pbi->reg_cond_dead, i, | |
1916 | (splay_tree_value) rcli); | |
1917 | } | |
38b2a605 | 1918 | } |
dc108b7a | 1919 | } |
dc108b7a | 1920 | |
402209ff | 1921 | FREE_REG_SET (diff); |
dc108b7a | 1922 | } |
402209ff JH |
1923 | #endif |
1924 | ||
1925 | /* If this block has no successors, any stores to the frame that aren't | |
1926 | used later in the block are dead. So make a pass over the block | |
1927 | recording any such that are made and show them dead at the end. We do | |
1928 | a very conservative and simple job here. */ | |
1929 | if (optimize | |
1930 | && ! (TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE | |
1931 | && (TYPE_RETURNS_STACK_DEPRESSED | |
1932 | (TREE_TYPE (current_function_decl)))) | |
5149f070 | 1933 | && (flags & PROP_SCAN_DEAD_STORES) |
628f6a4e BE |
1934 | && (EDGE_COUNT (bb->succs) == 0 |
1935 | || (EDGE_COUNT (bb->succs) == 1 | |
1936 | && EDGE_SUCC (bb, 0)->dest == EXIT_BLOCK_PTR | |
402209ff | 1937 | && ! current_function_calls_eh_return))) |
dc108b7a | 1938 | { |
402209ff | 1939 | rtx insn, set; |
a813c111 | 1940 | for (insn = BB_END (bb); insn != BB_HEAD (bb); insn = PREV_INSN (insn)) |
4b4bf941 | 1941 | if (NONJUMP_INSN_P (insn) |
402209ff | 1942 | && (set = single_set (insn)) |
3c0cb5de | 1943 | && MEM_P (SET_DEST (set))) |
402209ff JH |
1944 | { |
1945 | rtx mem = SET_DEST (set); | |
1946 | rtx canon_mem = canon_rtx (mem); | |
1947 | ||
402209ff JH |
1948 | if (XEXP (canon_mem, 0) == frame_pointer_rtx |
1949 | || (GET_CODE (XEXP (canon_mem, 0)) == PLUS | |
1950 | && XEXP (XEXP (canon_mem, 0), 0) == frame_pointer_rtx | |
1951 | && GET_CODE (XEXP (XEXP (canon_mem, 0), 1)) == CONST_INT)) | |
1952 | add_to_mem_set_list (pbi, canon_mem); | |
1953 | } | |
dc108b7a | 1954 | } |
dc108b7a | 1955 | |
402209ff | 1956 | return pbi; |
dc108b7a RH |
1957 | } |
1958 | ||
402209ff | 1959 | /* Release a propagate_block_info struct. */ |
558389e3 | 1960 | |
402209ff | 1961 | void |
6cf9ac28 | 1962 | free_propagate_block_info (struct propagate_block_info *pbi) |
558389e3 | 1963 | { |
402209ff | 1964 | free_EXPR_LIST_list (&pbi->mem_set_list); |
558389e3 | 1965 | |
402209ff | 1966 | BITMAP_XFREE (pbi->new_set); |
558389e3 | 1967 | |
402209ff JH |
1968 | #ifdef HAVE_conditional_execution |
1969 | splay_tree_delete (pbi->reg_cond_dead); | |
1970 | BITMAP_XFREE (pbi->reg_cond_reg); | |
1971 | #endif | |
558389e3 | 1972 | |
736b64dd JH |
1973 | if (pbi->flags & PROP_REG_INFO) |
1974 | { | |
1975 | int num = pbi->insn_num; | |
1976 | int i; | |
a2041967 | 1977 | reg_set_iterator rsi; |
736b64dd | 1978 | |
a2041967 KH |
1979 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, rsi) |
1980 | { | |
1981 | REG_LIVE_LENGTH (i) += num - reg_deaths[i]; | |
1982 | reg_deaths[i] = 0; | |
1983 | } | |
736b64dd | 1984 | } |
402209ff JH |
1985 | if (pbi->reg_next_use) |
1986 | free (pbi->reg_next_use); | |
558389e3 | 1987 | |
402209ff JH |
1988 | free (pbi); |
1989 | } | |
336a6399 | 1990 | |
402209ff JH |
1991 | /* Compute the registers live at the beginning of a basic block BB from |
1992 | those live at the end. | |
c9bacfdb | 1993 | |
402209ff JH |
1994 | When called, REG_LIVE contains those live at the end. On return, it |
1995 | contains those live at the beginning. | |
ee7b8369 | 1996 | |
402209ff JH |
1997 | LOCAL_SET, if non-null, will be set with all registers killed |
1998 | unconditionally by this basic block. | |
1999 | Likewise, COND_LOCAL_SET, if non-null, will be set with all registers | |
2000 | killed conditionally by this basic block. If there is any unconditional | |
2001 | set of a register, then the corresponding bit will be set in LOCAL_SET | |
2002 | and cleared in COND_LOCAL_SET. | |
2003 | It is valid for LOCAL_SET and COND_LOCAL_SET to be the same set. In this | |
2004 | case, the resulting set will be equal to the union of the two sets that | |
2005 | would otherwise be computed. | |
558389e3 | 2006 | |
cc2902df | 2007 | Return nonzero if an INSN is deleted (i.e. by dead code removal). */ |
558389e3 | 2008 | |
402209ff | 2009 | int |
6cf9ac28 AJ |
2010 | propagate_block (basic_block bb, regset live, regset local_set, |
2011 | regset cond_local_set, int flags) | |
558389e3 | 2012 | { |
402209ff JH |
2013 | struct propagate_block_info *pbi; |
2014 | rtx insn, prev; | |
2015 | int changed; | |
558389e3 | 2016 | |
402209ff | 2017 | pbi = init_propagate_block_info (bb, live, local_set, cond_local_set, flags); |
be1bb652 | 2018 | |
402209ff | 2019 | if (flags & PROP_REG_INFO) |
be1bb652 | 2020 | { |
b3694847 | 2021 | int i; |
a2041967 | 2022 | reg_set_iterator rsi; |
558389e3 | 2023 | |
402209ff JH |
2024 | /* Process the regs live at the end of the block. |
2025 | Mark them as not local to any one basic block. */ | |
a2041967 KH |
2026 | EXECUTE_IF_SET_IN_REG_SET (live, 0, i, rsi) |
2027 | REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; | |
402209ff | 2028 | } |
558389e3 | 2029 | |
402209ff | 2030 | /* Scan the block an insn at a time from end to beginning. */ |
558389e3 | 2031 | |
402209ff | 2032 | changed = 0; |
a813c111 | 2033 | for (insn = BB_END (bb); ; insn = prev) |
402209ff JH |
2034 | { |
2035 | /* If this is a call to `setjmp' et al, warn if any | |
2036 | non-volatile datum is live. */ | |
2037 | if ((flags & PROP_REG_INFO) | |
4b4bf941 | 2038 | && CALL_P (insn) |
402209ff JH |
2039 | && find_reg_note (insn, REG_SETJMP, NULL)) |
2040 | IOR_REG_SET (regs_live_at_setjmp, pbi->reg_live); | |
558389e3 | 2041 | |
402209ff | 2042 | prev = propagate_one_insn (pbi, insn); |
bc35512f JH |
2043 | if (!prev) |
2044 | changed |= insn != get_insns (); | |
2045 | else | |
2046 | changed |= NEXT_INSN (prev) != insn; | |
336a6399 | 2047 | |
a813c111 | 2048 | if (insn == BB_HEAD (bb)) |
402209ff | 2049 | break; |
336a6399 RH |
2050 | } |
2051 | ||
402209ff JH |
2052 | free_propagate_block_info (pbi); |
2053 | ||
2054 | return changed; | |
558389e3 | 2055 | } |
402209ff JH |
2056 | \f |
2057 | /* Return 1 if X (the body of an insn, or part of it) is just dead stores | |
2058 | (SET expressions whose destinations are registers dead after the insn). | |
2059 | NEEDED is the regset that says which regs are alive after the insn. | |
2060 | ||
cc2902df | 2061 | Unless CALL_OK is nonzero, an insn is needed if it contains a CALL. |
558389e3 | 2062 | |
402209ff JH |
2063 | If X is the entire body of an insn, NOTES contains the reg notes |
2064 | pertaining to the insn. */ | |
dc2ede84 | 2065 | |
dc2ede84 | 2066 | static int |
6cf9ac28 AJ |
2067 | insn_dead_p (struct propagate_block_info *pbi, rtx x, int call_ok, |
2068 | rtx notes ATTRIBUTE_UNUSED) | |
dc2ede84 | 2069 | { |
402209ff | 2070 | enum rtx_code code = GET_CODE (x); |
be1bb652 | 2071 | |
a646f6cc AH |
2072 | /* Don't eliminate insns that may trap. */ |
2073 | if (flag_non_call_exceptions && may_trap_p (x)) | |
2074 | return 0; | |
2075 | ||
402209ff | 2076 | #ifdef AUTO_INC_DEC |
ff6051b7 GK |
2077 | /* As flow is invoked after combine, we must take existing AUTO_INC |
2078 | expressions into account. */ | |
2079 | for (; notes; notes = XEXP (notes, 1)) | |
e881bb1b | 2080 | { |
ff6051b7 | 2081 | if (REG_NOTE_KIND (notes) == REG_INC) |
336a6399 | 2082 | { |
ff6051b7 | 2083 | int regno = REGNO (XEXP (notes, 0)); |
4a913dd6 | 2084 | |
ff6051b7 GK |
2085 | /* Don't delete insns to set global regs. */ |
2086 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2087 | || REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2088 | return 0; | |
402209ff | 2089 | } |
336a6399 | 2090 | } |
402209ff | 2091 | #endif |
4793dca1 | 2092 | |
402209ff JH |
2093 | /* If setting something that's a reg or part of one, |
2094 | see if that register's altered value will be live. */ | |
558389e3 | 2095 | |
402209ff | 2096 | if (code == SET) |
7a442791 | 2097 | { |
402209ff | 2098 | rtx r = SET_DEST (x); |
b02eea61 | 2099 | |
402209ff JH |
2100 | #ifdef HAVE_cc0 |
2101 | if (GET_CODE (r) == CC0) | |
2102 | return ! pbi->cc0_live; | |
2103 | #endif | |
b9f22704 | 2104 | |
402209ff JH |
2105 | /* A SET that is a subroutine call cannot be dead. */ |
2106 | if (GET_CODE (SET_SRC (x)) == CALL) | |
2107 | { | |
2108 | if (! call_ok) | |
2109 | return 0; | |
2110 | } | |
b02eea61 | 2111 | |
402209ff JH |
2112 | /* Don't eliminate loads from volatile memory or volatile asms. */ |
2113 | else if (volatile_refs_p (SET_SRC (x))) | |
2114 | return 0; | |
7a442791 | 2115 | |
3c0cb5de | 2116 | if (MEM_P (r)) |
7a442791 | 2117 | { |
402209ff | 2118 | rtx temp, canon_r; |
b9f22704 | 2119 | |
402209ff JH |
2120 | if (MEM_VOLATILE_P (r) || GET_MODE (r) == BLKmode) |
2121 | return 0; | |
0068fd96 | 2122 | |
402209ff | 2123 | canon_r = canon_rtx (r); |
0068fd96 | 2124 | |
402209ff JH |
2125 | /* Walk the set of memory locations we are currently tracking |
2126 | and see if one is an identical match to this memory location. | |
2127 | If so, this memory write is dead (remember, we're walking | |
2128 | backwards from the end of the block to the start). Since | |
2129 | rtx_equal_p does not check the alias set or flags, we also | |
2130 | must have the potential for them to conflict (anti_dependence). */ | |
2131 | for (temp = pbi->mem_set_list; temp != 0; temp = XEXP (temp, 1)) | |
389fdba0 | 2132 | if (anti_dependence (r, XEXP (temp, 0))) |
402209ff JH |
2133 | { |
2134 | rtx mem = XEXP (temp, 0); | |
0068fd96 | 2135 | |
402209ff JH |
2136 | if (rtx_equal_p (XEXP (canon_r, 0), XEXP (mem, 0)) |
2137 | && (GET_MODE_SIZE (GET_MODE (canon_r)) | |
2138 | <= GET_MODE_SIZE (GET_MODE (mem)))) | |
2139 | return 1; | |
7a442791 | 2140 | |
402209ff JH |
2141 | #ifdef AUTO_INC_DEC |
2142 | /* Check if memory reference matches an auto increment. Only | |
2143 | post increment/decrement or modify are valid. */ | |
2144 | if (GET_MODE (mem) == GET_MODE (r) | |
2145 | && (GET_CODE (XEXP (mem, 0)) == POST_DEC | |
2146 | || GET_CODE (XEXP (mem, 0)) == POST_INC | |
2147 | || GET_CODE (XEXP (mem, 0)) == POST_MODIFY) | |
2148 | && GET_MODE (XEXP (mem, 0)) == GET_MODE (r) | |
2149 | && rtx_equal_p (XEXP (XEXP (mem, 0), 0), XEXP (r, 0))) | |
2150 | return 1; | |
2151 | #endif | |
2152 | } | |
b02eea61 | 2153 | } |
d69d0316 | 2154 | else |
7a442791 | 2155 | { |
402209ff JH |
2156 | while (GET_CODE (r) == SUBREG |
2157 | || GET_CODE (r) == STRICT_LOW_PART | |
2158 | || GET_CODE (r) == ZERO_EXTRACT) | |
2159 | r = XEXP (r, 0); | |
b02eea61 | 2160 | |
f8cfc6aa | 2161 | if (REG_P (r)) |
d69d0316 | 2162 | { |
402209ff | 2163 | int regno = REGNO (r); |
b02eea61 | 2164 | |
402209ff JH |
2165 | /* Obvious. */ |
2166 | if (REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2167 | return 0; | |
7a442791 | 2168 | |
402209ff JH |
2169 | /* If this is a hard register, verify that subsequent |
2170 | words are not needed. */ | |
2171 | if (regno < FIRST_PSEUDO_REGISTER) | |
2172 | { | |
66fd46b6 | 2173 | int n = hard_regno_nregs[regno][GET_MODE (r)]; |
46fac664 | 2174 | |
402209ff JH |
2175 | while (--n > 0) |
2176 | if (REGNO_REG_SET_P (pbi->reg_live, regno+n)) | |
2177 | return 0; | |
2178 | } | |
46fac664 | 2179 | |
402209ff JH |
2180 | /* Don't delete insns to set global regs. */ |
2181 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2182 | return 0; | |
46fac664 | 2183 | |
402209ff JH |
2184 | /* Make sure insns to set the stack pointer aren't deleted. */ |
2185 | if (regno == STACK_POINTER_REGNUM) | |
2186 | return 0; | |
b02eea61 | 2187 | |
402209ff JH |
2188 | /* ??? These bits might be redundant with the force live bits |
2189 | in calculate_global_regs_live. We would delete from | |
2190 | sequential sets; whether this actually affects real code | |
2191 | for anything but the stack pointer I don't know. */ | |
2192 | /* Make sure insns to set the frame pointer aren't deleted. */ | |
2193 | if (regno == FRAME_POINTER_REGNUM | |
2194 | && (! reload_completed || frame_pointer_needed)) | |
2195 | return 0; | |
2196 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
2197 | if (regno == HARD_FRAME_POINTER_REGNUM | |
2198 | && (! reload_completed || frame_pointer_needed)) | |
2199 | return 0; | |
2200 | #endif | |
b02eea61 | 2201 | |
402209ff JH |
2202 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2203 | /* Make sure insns to set arg pointer are never deleted | |
2204 | (if the arg pointer isn't fixed, there will be a USE | |
2205 | for it, so we can treat it normally). */ | |
2206 | if (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2207 | return 0; | |
2208 | #endif | |
46fac664 | 2209 | |
402209ff JH |
2210 | /* Otherwise, the set is dead. */ |
2211 | return 1; | |
2212 | } | |
2213 | } | |
2214 | } | |
46fac664 | 2215 | |
402209ff JH |
2216 | /* If performing several activities, insn is dead if each activity |
2217 | is individually dead. Also, CLOBBERs and USEs can be ignored; a | |
2218 | CLOBBER or USE that's inside a PARALLEL doesn't make the insn | |
2219 | worth keeping. */ | |
2220 | else if (code == PARALLEL) | |
2221 | { | |
2222 | int i = XVECLEN (x, 0); | |
46fac664 | 2223 | |
402209ff JH |
2224 | for (i--; i >= 0; i--) |
2225 | if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER | |
2226 | && GET_CODE (XVECEXP (x, 0, i)) != USE | |
2227 | && ! insn_dead_p (pbi, XVECEXP (x, 0, i), call_ok, NULL_RTX)) | |
2228 | return 0; | |
46fac664 | 2229 | |
402209ff JH |
2230 | return 1; |
2231 | } | |
46fac664 | 2232 | |
402209ff | 2233 | /* A CLOBBER of a pseudo-register that is dead serves no purpose. That |
a6abdce3 RH |
2234 | is not necessarily true for hard registers until after reload. */ |
2235 | else if (code == CLOBBER) | |
2236 | { | |
f8cfc6aa | 2237 | if (REG_P (XEXP (x, 0)) |
a6abdce3 RH |
2238 | && (REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER |
2239 | || reload_completed) | |
2240 | && ! REGNO_REG_SET_P (pbi->reg_live, REGNO (XEXP (x, 0)))) | |
2241 | return 1; | |
2242 | } | |
2243 | ||
2244 | /* ??? A base USE is a historical relic. It ought not be needed anymore. | |
2245 | Instances where it is still used are either (1) temporary and the USE | |
2246 | escaped the pass, (2) cruft and the USE need not be emitted anymore, | |
2247 | or (3) hiding bugs elsewhere that are not properly representing data | |
2248 | flow. */ | |
2249 | ||
402209ff JH |
2250 | return 0; |
2251 | } | |
46fac664 | 2252 | |
402209ff JH |
2253 | /* If INSN is the last insn in a libcall, and assuming INSN is dead, |
2254 | return 1 if the entire library call is dead. | |
2255 | This is true if INSN copies a register (hard or pseudo) | |
2256 | and if the hard return reg of the call insn is dead. | |
2257 | (The caller should have tested the destination of the SET inside | |
2258 | INSN already for death.) | |
46fac664 | 2259 | |
402209ff JH |
2260 | If this insn doesn't just copy a register, then we don't |
2261 | have an ordinary libcall. In that case, cse could not have | |
2262 | managed to substitute the source for the dest later on, | |
2263 | so we can assume the libcall is dead. | |
46fac664 | 2264 | |
402209ff JH |
2265 | PBI is the block info giving pseudoregs live before this insn. |
2266 | NOTE is the REG_RETVAL note of the insn. */ | |
46fac664 | 2267 | |
402209ff | 2268 | static int |
6cf9ac28 | 2269 | libcall_dead_p (struct propagate_block_info *pbi, rtx note, rtx insn) |
402209ff JH |
2270 | { |
2271 | rtx x = single_set (insn); | |
46fac664 | 2272 | |
402209ff JH |
2273 | if (x) |
2274 | { | |
b3694847 | 2275 | rtx r = SET_SRC (x); |
46fac664 | 2276 | |
f8cfc6aa | 2277 | if (REG_P (r)) |
402209ff JH |
2278 | { |
2279 | rtx call = XEXP (note, 0); | |
2280 | rtx call_pat; | |
b3694847 | 2281 | int i; |
46fac664 | 2282 | |
402209ff | 2283 | /* Find the call insn. */ |
4b4bf941 | 2284 | while (call != insn && !CALL_P (call)) |
402209ff | 2285 | call = NEXT_INSN (call); |
46fac664 | 2286 | |
402209ff JH |
2287 | /* If there is none, do nothing special, |
2288 | since ordinary death handling can understand these insns. */ | |
2289 | if (call == insn) | |
2290 | return 0; | |
b02eea61 | 2291 | |
402209ff JH |
2292 | /* See if the hard reg holding the value is dead. |
2293 | If this is a PARALLEL, find the call within it. */ | |
2294 | call_pat = PATTERN (call); | |
2295 | if (GET_CODE (call_pat) == PARALLEL) | |
46fac664 | 2296 | { |
402209ff JH |
2297 | for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--) |
2298 | if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET | |
2299 | && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL) | |
2300 | break; | |
2301 | ||
2302 | /* This may be a library call that is returning a value | |
2303 | via invisible pointer. Do nothing special, since | |
2304 | ordinary death handling can understand these insns. */ | |
2305 | if (i < 0) | |
2306 | return 0; | |
2307 | ||
2308 | call_pat = XVECEXP (call_pat, 0, i); | |
46fac664 | 2309 | } |
46fac664 | 2310 | |
402209ff | 2311 | return insn_dead_p (pbi, call_pat, 1, REG_NOTES (call)); |
46fac664 | 2312 | } |
46fac664 | 2313 | } |
402209ff JH |
2314 | return 1; |
2315 | } | |
46fac664 | 2316 | |
402209ff JH |
2317 | /* 1 if register REGNO was alive at a place where `setjmp' was called |
2318 | and was set more than once or is an argument. | |
2319 | Such regs may be clobbered by `longjmp'. */ | |
b02eea61 | 2320 | |
402209ff | 2321 | int |
6cf9ac28 | 2322 | regno_clobbered_at_setjmp (int regno) |
402209ff | 2323 | { |
0b17ab2f | 2324 | if (n_basic_blocks == 0) |
402209ff JH |
2325 | return 0; |
2326 | ||
2327 | return ((REG_N_SETS (regno) > 1 | |
cdd1f01b | 2328 | || REGNO_REG_SET_P (ENTRY_BLOCK_PTR->global_live_at_end, regno)) |
402209ff JH |
2329 | && REGNO_REG_SET_P (regs_live_at_setjmp, regno)); |
2330 | } | |
2331 | \f | |
2332 | /* Add MEM to PBI->MEM_SET_LIST. MEM should be canonical. Respect the | |
2333 | maximal list size; look for overlaps in mode and select the largest. */ | |
2334 | static void | |
6cf9ac28 | 2335 | add_to_mem_set_list (struct propagate_block_info *pbi, rtx mem) |
46fac664 | 2336 | { |
402209ff JH |
2337 | rtx i; |
2338 | ||
2339 | /* We don't know how large a BLKmode store is, so we must not | |
2340 | take them into consideration. */ | |
2341 | if (GET_MODE (mem) == BLKmode) | |
2342 | return; | |
2343 | ||
2344 | for (i = pbi->mem_set_list; i ; i = XEXP (i, 1)) | |
46fac664 | 2345 | { |
402209ff JH |
2346 | rtx e = XEXP (i, 0); |
2347 | if (rtx_equal_p (XEXP (mem, 0), XEXP (e, 0))) | |
46fac664 | 2348 | { |
402209ff | 2349 | if (GET_MODE_SIZE (GET_MODE (mem)) > GET_MODE_SIZE (GET_MODE (e))) |
b02eea61 | 2350 | { |
402209ff JH |
2351 | #ifdef AUTO_INC_DEC |
2352 | /* If we must store a copy of the mem, we can just modify | |
2353 | the mode of the stored copy. */ | |
2354 | if (pbi->flags & PROP_AUTOINC) | |
2355 | PUT_MODE (e, GET_MODE (mem)); | |
2356 | else | |
2357 | #endif | |
2358 | XEXP (i, 0) = mem; | |
b02eea61 | 2359 | } |
402209ff | 2360 | return; |
46fac664 | 2361 | } |
46fac664 | 2362 | } |
b02eea61 | 2363 | |
402209ff JH |
2364 | if (pbi->mem_set_list_len < MAX_MEM_SET_LIST_LEN) |
2365 | { | |
2366 | #ifdef AUTO_INC_DEC | |
2367 | /* Store a copy of mem, otherwise the address may be | |
2368 | scrogged by find_auto_inc. */ | |
2369 | if (pbi->flags & PROP_AUTOINC) | |
2370 | mem = shallow_copy_rtx (mem); | |
2371 | #endif | |
2372 | pbi->mem_set_list = alloc_EXPR_LIST (0, mem, pbi->mem_set_list); | |
2373 | pbi->mem_set_list_len++; | |
2374 | } | |
46fac664 JH |
2375 | } |
2376 | ||
402209ff JH |
2377 | /* INSN references memory, possibly using autoincrement addressing modes. |
2378 | Find any entries on the mem_set_list that need to be invalidated due | |
2379 | to an address change. */ | |
b02eea61 | 2380 | |
fe4b3c79 | 2381 | static int |
6cf9ac28 | 2382 | invalidate_mems_from_autoinc (rtx *px, void *data) |
46fac664 | 2383 | { |
fe4b3c79 JL |
2384 | rtx x = *px; |
2385 | struct propagate_block_info *pbi = data; | |
2386 | ||
ec8e098d | 2387 | if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC) |
fe4b3c79 JL |
2388 | { |
2389 | invalidate_mems_from_set (pbi, XEXP (x, 0)); | |
2390 | return -1; | |
2391 | } | |
2392 | ||
2393 | return 0; | |
402209ff | 2394 | } |
46fac664 | 2395 | |
ff7cc307 | 2396 | /* EXP is a REG. Remove any dependent entries from pbi->mem_set_list. */ |
46fac664 | 2397 | |
402209ff | 2398 | static void |
6cf9ac28 | 2399 | invalidate_mems_from_set (struct propagate_block_info *pbi, rtx exp) |
402209ff JH |
2400 | { |
2401 | rtx temp = pbi->mem_set_list; | |
2402 | rtx prev = NULL_RTX; | |
2403 | rtx next; | |
46fac664 | 2404 | |
402209ff | 2405 | while (temp) |
46fac664 | 2406 | { |
402209ff JH |
2407 | next = XEXP (temp, 1); |
2408 | if (reg_overlap_mentioned_p (exp, XEXP (temp, 0))) | |
46fac664 | 2409 | { |
402209ff JH |
2410 | /* Splice this entry out of the list. */ |
2411 | if (prev) | |
2412 | XEXP (prev, 1) = next; | |
2413 | else | |
2414 | pbi->mem_set_list = next; | |
2415 | free_EXPR_LIST_node (temp); | |
2416 | pbi->mem_set_list_len--; | |
46fac664 | 2417 | } |
46fac664 | 2418 | else |
402209ff JH |
2419 | prev = temp; |
2420 | temp = next; | |
46fac664 | 2421 | } |
402209ff | 2422 | } |
46fac664 | 2423 | |
402209ff JH |
2424 | /* Process the registers that are set within X. Their bits are set to |
2425 | 1 in the regset DEAD, because they are dead prior to this insn. | |
b02eea61 | 2426 | |
402209ff | 2427 | If INSN is nonzero, it is the insn being processed. |
46fac664 | 2428 | |
402209ff | 2429 | FLAGS is the set of operations to perform. */ |
b02eea61 | 2430 | |
402209ff | 2431 | static void |
6cf9ac28 | 2432 | mark_set_regs (struct propagate_block_info *pbi, rtx x, rtx insn) |
46fac664 | 2433 | { |
402209ff JH |
2434 | rtx cond = NULL_RTX; |
2435 | rtx link; | |
2436 | enum rtx_code code; | |
df2ef49b | 2437 | int flags = pbi->flags; |
46fac664 | 2438 | |
402209ff JH |
2439 | if (insn) |
2440 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2441 | { | |
2442 | if (REG_NOTE_KIND (link) == REG_INC) | |
2443 | mark_set_1 (pbi, SET, XEXP (link, 0), | |
2444 | (GET_CODE (x) == COND_EXEC | |
2445 | ? COND_EXEC_TEST (x) : NULL_RTX), | |
df2ef49b | 2446 | insn, flags); |
402209ff JH |
2447 | } |
2448 | retry: | |
2449 | switch (code = GET_CODE (x)) | |
46fac664 | 2450 | { |
402209ff | 2451 | case SET: |
df2ef49b AM |
2452 | if (GET_CODE (XEXP (x, 1)) == ASM_OPERANDS) |
2453 | flags |= PROP_ASM_SCAN; | |
ba228239 | 2454 | /* Fall through */ |
402209ff | 2455 | case CLOBBER: |
df2ef49b | 2456 | mark_set_1 (pbi, code, SET_DEST (x), cond, insn, flags); |
402209ff | 2457 | return; |
b02eea61 | 2458 | |
402209ff JH |
2459 | case COND_EXEC: |
2460 | cond = COND_EXEC_TEST (x); | |
2461 | x = COND_EXEC_CODE (x); | |
2462 | goto retry; | |
b02eea61 | 2463 | |
402209ff JH |
2464 | case PARALLEL: |
2465 | { | |
b3694847 SS |
2466 | int i; |
2467 | ||
a06f01ba JW |
2468 | /* We must scan forwards. If we have an asm, we need to set |
2469 | the PROP_ASM_SCAN flag before scanning the clobbers. */ | |
2470 | for (i = 0; i < XVECLEN (x, 0); i++) | |
402209ff JH |
2471 | { |
2472 | rtx sub = XVECEXP (x, 0, i); | |
2473 | switch (code = GET_CODE (sub)) | |
2474 | { | |
2475 | case COND_EXEC: | |
0bccc606 | 2476 | gcc_assert (!cond); |
b02eea61 | 2477 | |
402209ff JH |
2478 | cond = COND_EXEC_TEST (sub); |
2479 | sub = COND_EXEC_CODE (sub); | |
df2ef49b AM |
2480 | if (GET_CODE (sub) == SET) |
2481 | goto mark_set; | |
2482 | if (GET_CODE (sub) == CLOBBER) | |
2483 | goto mark_clob; | |
2484 | break; | |
b02eea61 | 2485 | |
402209ff | 2486 | case SET: |
df2ef49b AM |
2487 | mark_set: |
2488 | if (GET_CODE (XEXP (sub, 1)) == ASM_OPERANDS) | |
2489 | flags |= PROP_ASM_SCAN; | |
ba228239 | 2490 | /* Fall through */ |
402209ff | 2491 | case CLOBBER: |
df2ef49b AM |
2492 | mark_clob: |
2493 | mark_set_1 (pbi, code, SET_DEST (sub), cond, insn, flags); | |
402209ff | 2494 | break; |
b02eea61 | 2495 | |
a06f01ba JW |
2496 | case ASM_OPERANDS: |
2497 | flags |= PROP_ASM_SCAN; | |
2498 | break; | |
2499 | ||
402209ff JH |
2500 | default: |
2501 | break; | |
2502 | } | |
2503 | } | |
2504 | break; | |
2505 | } | |
b02eea61 | 2506 | |
402209ff JH |
2507 | default: |
2508 | break; | |
46fac664 | 2509 | } |
46fac664 JH |
2510 | } |
2511 | ||
402209ff JH |
2512 | /* Process a single set, which appears in INSN. REG (which may not |
2513 | actually be a REG, it may also be a SUBREG, PARALLEL, etc.) is | |
2514 | being set using the CODE (which may be SET, CLOBBER, or COND_EXEC). | |
2515 | If the set is conditional (because it appear in a COND_EXEC), COND | |
2516 | will be the condition. */ | |
7a442791 | 2517 | |
402209ff | 2518 | static void |
6cf9ac28 | 2519 | mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx cond, rtx insn, int flags) |
336a6399 | 2520 | { |
402209ff JH |
2521 | int regno_first = -1, regno_last = -1; |
2522 | unsigned long not_dead = 0; | |
336a6399 RH |
2523 | int i; |
2524 | ||
402209ff JH |
2525 | /* Modifying just one hardware register of a multi-reg value or just a |
2526 | byte field of a register does not mean the value from before this insn | |
2527 | is now dead. Of course, if it was dead after it's unused now. */ | |
336a6399 | 2528 | |
402209ff | 2529 | switch (GET_CODE (reg)) |
336a6399 | 2530 | { |
402209ff JH |
2531 | case PARALLEL: |
2532 | /* Some targets place small structures in registers for return values of | |
2533 | functions. We have to detect this case specially here to get correct | |
2534 | flow information. */ | |
2535 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) | |
2536 | if (XEXP (XVECEXP (reg, 0, i), 0) != 0) | |
2537 | mark_set_1 (pbi, code, XEXP (XVECEXP (reg, 0, i), 0), cond, insn, | |
2538 | flags); | |
2539 | return; | |
2540 | ||
2541 | case ZERO_EXTRACT: | |
2542 | case SIGN_EXTRACT: | |
2543 | case STRICT_LOW_PART: | |
2544 | /* ??? Assumes STRICT_LOW_PART not used on multi-word registers. */ | |
2545 | do | |
2546 | reg = XEXP (reg, 0); | |
2547 | while (GET_CODE (reg) == SUBREG | |
2548 | || GET_CODE (reg) == ZERO_EXTRACT | |
2549 | || GET_CODE (reg) == SIGN_EXTRACT | |
2550 | || GET_CODE (reg) == STRICT_LOW_PART); | |
3c0cb5de | 2551 | if (MEM_P (reg)) |
402209ff JH |
2552 | break; |
2553 | not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, REGNO (reg)); | |
2554 | /* Fall through. */ | |
b02eea61 | 2555 | |
402209ff JH |
2556 | case REG: |
2557 | regno_last = regno_first = REGNO (reg); | |
2558 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
66fd46b6 | 2559 | regno_last += hard_regno_nregs[regno_first][GET_MODE (reg)] - 1; |
402209ff | 2560 | break; |
b02eea61 | 2561 | |
402209ff | 2562 | case SUBREG: |
f8cfc6aa | 2563 | if (REG_P (SUBREG_REG (reg))) |
7a442791 | 2564 | { |
402209ff JH |
2565 | enum machine_mode outer_mode = GET_MODE (reg); |
2566 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (reg)); | |
7a442791 | 2567 | |
402209ff JH |
2568 | /* Identify the range of registers affected. This is moderately |
2569 | tricky for hard registers. See alter_subreg. */ | |
b02eea61 | 2570 | |
402209ff JH |
2571 | regno_last = regno_first = REGNO (SUBREG_REG (reg)); |
2572 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
4793dca1 | 2573 | { |
402209ff JH |
2574 | regno_first += subreg_regno_offset (regno_first, inner_mode, |
2575 | SUBREG_BYTE (reg), | |
2576 | outer_mode); | |
2577 | regno_last = (regno_first | |
66fd46b6 | 2578 | + hard_regno_nregs[regno_first][outer_mode] - 1); |
3e28fe44 | 2579 | |
402209ff JH |
2580 | /* Since we've just adjusted the register number ranges, make |
2581 | sure REG matches. Otherwise some_was_live will be clear | |
2582 | when it shouldn't have been, and we'll create incorrect | |
2583 | REG_UNUSED notes. */ | |
2584 | reg = gen_rtx_REG (outer_mode, regno_first); | |
62828c00 | 2585 | } |
402209ff | 2586 | else |
d3a923ee | 2587 | { |
402209ff JH |
2588 | /* If the number of words in the subreg is less than the number |
2589 | of words in the full register, we have a well-defined partial | |
2590 | set. Otherwise the high bits are undefined. | |
d3a923ee | 2591 | |
402209ff JH |
2592 | This is only really applicable to pseudos, since we just took |
2593 | care of multi-word hard registers. */ | |
2594 | if (((GET_MODE_SIZE (outer_mode) | |
2595 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
2596 | < ((GET_MODE_SIZE (inner_mode) | |
2597 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
2598 | not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, | |
2599 | regno_first); | |
d3a923ee | 2600 | |
402209ff | 2601 | reg = SUBREG_REG (reg); |
d3a923ee | 2602 | } |
d3a923ee | 2603 | } |
402209ff JH |
2604 | else |
2605 | reg = SUBREG_REG (reg); | |
2606 | break; | |
c586192c | 2607 | |
402209ff JH |
2608 | default: |
2609 | break; | |
c586192c | 2610 | } |
c586192c | 2611 | |
402209ff JH |
2612 | /* If this set is a MEM, then it kills any aliased writes. |
2613 | If this set is a REG, then it kills any MEMs which use the reg. */ | |
5149f070 | 2614 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
e881bb1b | 2615 | { |
f8cfc6aa | 2616 | if (REG_P (reg)) |
402209ff | 2617 | invalidate_mems_from_set (pbi, reg); |
e881bb1b | 2618 | |
402209ff JH |
2619 | /* If the memory reference had embedded side effects (autoincrement |
2620 | address modes. Then we may need to kill some entries on the | |
2621 | memory set list. */ | |
3c0cb5de | 2622 | if (insn && MEM_P (reg)) |
fe4b3c79 | 2623 | for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi); |
ccbaf064 | 2624 | |
3c0cb5de | 2625 | if (MEM_P (reg) && ! side_effects_p (reg) |
402209ff | 2626 | /* ??? With more effort we could track conditional memory life. */ |
fe4b3c79 | 2627 | && ! cond) |
dd3f0101 | 2628 | add_to_mem_set_list (pbi, canon_rtx (reg)); |
ccbaf064 | 2629 | } |
f2a1bc02 | 2630 | |
f8cfc6aa | 2631 | if (REG_P (reg) |
402209ff JH |
2632 | && ! (regno_first == FRAME_POINTER_REGNUM |
2633 | && (! reload_completed || frame_pointer_needed)) | |
2634 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
2635 | && ! (regno_first == HARD_FRAME_POINTER_REGNUM | |
2636 | && (! reload_completed || frame_pointer_needed)) | |
2637 | #endif | |
2638 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
2639 | && ! (regno_first == ARG_POINTER_REGNUM && fixed_regs[regno_first]) | |
2640 | #endif | |
2641 | ) | |
f2a1bc02 | 2642 | { |
402209ff | 2643 | int some_was_live = 0, some_was_dead = 0; |
f2a1bc02 | 2644 | |
402209ff | 2645 | for (i = regno_first; i <= regno_last; ++i) |
f2a1bc02 | 2646 | { |
402209ff JH |
2647 | int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i); |
2648 | if (pbi->local_set) | |
f2a1bc02 | 2649 | { |
402209ff JH |
2650 | /* Order of the set operation matters here since both |
2651 | sets may be the same. */ | |
2652 | CLEAR_REGNO_REG_SET (pbi->cond_local_set, i); | |
2653 | if (cond != NULL_RTX | |
2654 | && ! REGNO_REG_SET_P (pbi->local_set, i)) | |
2655 | SET_REGNO_REG_SET (pbi->cond_local_set, i); | |
2656 | else | |
2657 | SET_REGNO_REG_SET (pbi->local_set, i); | |
f2a1bc02 | 2658 | } |
402209ff JH |
2659 | if (code != CLOBBER) |
2660 | SET_REGNO_REG_SET (pbi->new_set, i); | |
d3a923ee | 2661 | |
402209ff JH |
2662 | some_was_live |= needed_regno; |
2663 | some_was_dead |= ! needed_regno; | |
f2a1bc02 | 2664 | } |
402209ff JH |
2665 | |
2666 | #ifdef HAVE_conditional_execution | |
2667 | /* Consider conditional death in deciding that the register needs | |
2668 | a death note. */ | |
2669 | if (some_was_live && ! not_dead | |
2670 | /* The stack pointer is never dead. Well, not strictly true, | |
2671 | but it's very difficult to tell from here. Hopefully | |
2672 | combine_stack_adjustments will fix up the most egregious | |
2673 | errors. */ | |
2674 | && regno_first != STACK_POINTER_REGNUM) | |
d3a923ee | 2675 | { |
402209ff JH |
2676 | for (i = regno_first; i <= regno_last; ++i) |
2677 | if (! mark_regno_cond_dead (pbi, i, cond)) | |
2678 | not_dead |= ((unsigned long) 1) << (i - regno_first); | |
d3a923ee | 2679 | } |
402209ff | 2680 | #endif |
6ff71a97 | 2681 | |
402209ff JH |
2682 | /* Additional data to record if this is the final pass. */ |
2683 | if (flags & (PROP_LOG_LINKS | PROP_REG_INFO | |
2684 | | PROP_DEATH_NOTES | PROP_AUTOINC)) | |
f2a1bc02 | 2685 | { |
b3694847 | 2686 | rtx y; |
0b17ab2f | 2687 | int blocknum = pbi->bb->index; |
402209ff JH |
2688 | |
2689 | y = NULL_RTX; | |
2690 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
ca9fef16 | 2691 | { |
402209ff | 2692 | y = pbi->reg_next_use[regno_first]; |
ca9fef16 | 2693 | |
402209ff JH |
2694 | /* The next use is no longer next, since a store intervenes. */ |
2695 | for (i = regno_first; i <= regno_last; ++i) | |
2696 | pbi->reg_next_use[i] = 0; | |
2697 | } | |
6e64a52a | 2698 | |
402209ff | 2699 | if (flags & PROP_REG_INFO) |
46fac664 | 2700 | { |
402209ff JH |
2701 | for (i = regno_first; i <= regno_last; ++i) |
2702 | { | |
2703 | /* Count (weighted) references, stores, etc. This counts a | |
2704 | register twice if it is modified, but that is correct. */ | |
2705 | REG_N_SETS (i) += 1; | |
2706 | REG_N_REFS (i) += 1; | |
2707 | REG_FREQ (i) += REG_FREQ_FROM_BB (pbi->bb); | |
2708 | ||
2709 | /* The insns where a reg is live are normally counted | |
2710 | elsewhere, but we want the count to include the insn | |
2711 | where the reg is set, and the normal counting mechanism | |
2712 | would not count it. */ | |
2713 | REG_LIVE_LENGTH (i) += 1; | |
2714 | } | |
2715 | ||
2716 | /* If this is a hard reg, record this function uses the reg. */ | |
2717 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
6e64a52a | 2718 | { |
402209ff JH |
2719 | for (i = regno_first; i <= regno_last; i++) |
2720 | regs_ever_live[i] = 1; | |
df2ef49b AM |
2721 | if (flags & PROP_ASM_SCAN) |
2722 | for (i = regno_first; i <= regno_last; i++) | |
2723 | regs_asm_clobbered[i] = 1; | |
6e64a52a JH |
2724 | } |
2725 | else | |
6e64a52a | 2726 | { |
402209ff JH |
2727 | /* Keep track of which basic blocks each reg appears in. */ |
2728 | if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN) | |
2729 | REG_BASIC_BLOCK (regno_first) = blocknum; | |
2730 | else if (REG_BASIC_BLOCK (regno_first) != blocknum) | |
2731 | REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL; | |
6e64a52a | 2732 | } |
402209ff | 2733 | } |
f2a1bc02 | 2734 | |
402209ff | 2735 | if (! some_was_dead) |
f2a1bc02 | 2736 | { |
402209ff JH |
2737 | if (flags & PROP_LOG_LINKS) |
2738 | { | |
2739 | /* Make a logical link from the next following insn | |
2740 | that uses this register, back to this insn. | |
2741 | The following insns have already been processed. | |
2742 | ||
2743 | We don't build a LOG_LINK for hard registers containing | |
2744 | in ASM_OPERANDs. If these registers get replaced, | |
2745 | we might wind up changing the semantics of the insn, | |
2746 | even if reload can make what appear to be valid | |
a10016d3 ILT |
2747 | assignments later. |
2748 | ||
2749 | We don't build a LOG_LINK for global registers to | |
2750 | or from a function call. We don't want to let | |
2751 | combine think that it knows what is going on with | |
2752 | global registers. */ | |
402209ff JH |
2753 | if (y && (BLOCK_NUM (y) == blocknum) |
2754 | && (regno_first >= FIRST_PSEUDO_REGISTER | |
a10016d3 | 2755 | || (asm_noperands (PATTERN (y)) < 0 |
4b4bf941 JQ |
2756 | && ! ((CALL_P (insn) |
2757 | || CALL_P (y)) | |
a10016d3 | 2758 | && global_regs[regno_first])))) |
402209ff JH |
2759 | LOG_LINKS (y) = alloc_INSN_LIST (insn, LOG_LINKS (y)); |
2760 | } | |
34487bf8 | 2761 | } |
402209ff JH |
2762 | else if (not_dead) |
2763 | ; | |
2764 | else if (! some_was_live) | |
2765 | { | |
2766 | if (flags & PROP_REG_INFO) | |
2767 | REG_N_DEATHS (regno_first) += 1; | |
34487bf8 | 2768 | |
402209ff JH |
2769 | if (flags & PROP_DEATH_NOTES) |
2770 | { | |
2771 | /* Note that dead stores have already been deleted | |
2772 | when possible. If we get here, we have found a | |
2773 | dead store that cannot be eliminated (because the | |
2774 | same insn does something useful). Indicate this | |
2775 | by marking the reg being set as dying here. */ | |
2776 | REG_NOTES (insn) | |
2777 | = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); | |
2778 | } | |
2779 | } | |
2780 | else | |
34487bf8 | 2781 | { |
402209ff JH |
2782 | if (flags & PROP_DEATH_NOTES) |
2783 | { | |
2784 | /* This is a case where we have a multi-word hard register | |
2785 | and some, but not all, of the words of the register are | |
2786 | needed in subsequent insns. Write REG_UNUSED notes | |
2787 | for those parts that were not needed. This case should | |
2788 | be rare. */ | |
2789 | ||
2790 | for (i = regno_first; i <= regno_last; ++i) | |
2791 | if (! REGNO_REG_SET_P (pbi->reg_live, i)) | |
2792 | REG_NOTES (insn) | |
2793 | = alloc_EXPR_LIST (REG_UNUSED, | |
e50126e8 | 2794 | regno_reg_rtx[i], |
402209ff JH |
2795 | REG_NOTES (insn)); |
2796 | } | |
34487bf8 | 2797 | } |
34487bf8 | 2798 | } |
402209ff JH |
2799 | |
2800 | /* Mark the register as being dead. */ | |
2801 | if (some_was_live | |
2802 | /* The stack pointer is never dead. Well, not strictly true, | |
2803 | but it's very difficult to tell from here. Hopefully | |
2804 | combine_stack_adjustments will fix up the most egregious | |
2805 | errors. */ | |
2806 | && regno_first != STACK_POINTER_REGNUM) | |
34487bf8 | 2807 | { |
402209ff JH |
2808 | for (i = regno_first; i <= regno_last; ++i) |
2809 | if (!(not_dead & (((unsigned long) 1) << (i - regno_first)))) | |
736b64dd JH |
2810 | { |
2811 | if ((pbi->flags & PROP_REG_INFO) | |
2812 | && REGNO_REG_SET_P (pbi->reg_live, i)) | |
2813 | { | |
2814 | REG_LIVE_LENGTH (i) += pbi->insn_num - reg_deaths[i]; | |
2815 | reg_deaths[i] = 0; | |
2816 | } | |
2817 | CLEAR_REGNO_REG_SET (pbi->reg_live, i); | |
2818 | } | |
34487bf8 | 2819 | } |
402209ff | 2820 | } |
f8cfc6aa | 2821 | else if (REG_P (reg)) |
402209ff JH |
2822 | { |
2823 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
2824 | pbi->reg_next_use[regno_first] = 0; | |
df2ef49b AM |
2825 | |
2826 | if ((flags & PROP_REG_INFO) != 0 | |
2827 | && (flags & PROP_ASM_SCAN) != 0 | |
2828 | && regno_first < FIRST_PSEUDO_REGISTER) | |
2829 | { | |
2830 | for (i = regno_first; i <= regno_last; i++) | |
2831 | regs_asm_clobbered[i] = 1; | |
2832 | } | |
402209ff JH |
2833 | } |
2834 | ||
2835 | /* If this is the last pass and this is a SCRATCH, show it will be dying | |
2836 | here and count it. */ | |
2837 | else if (GET_CODE (reg) == SCRATCH) | |
2838 | { | |
2839 | if (flags & PROP_DEATH_NOTES) | |
2840 | REG_NOTES (insn) | |
2841 | = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); | |
2842 | } | |
2843 | } | |
2844 | \f | |
2845 | #ifdef HAVE_conditional_execution | |
2846 | /* Mark REGNO conditionally dead. | |
2847 | Return true if the register is now unconditionally dead. */ | |
2848 | ||
2849 | static int | |
6cf9ac28 | 2850 | mark_regno_cond_dead (struct propagate_block_info *pbi, int regno, rtx cond) |
402209ff JH |
2851 | { |
2852 | /* If this is a store to a predicate register, the value of the | |
2853 | predicate is changing, we don't know that the predicate as seen | |
2854 | before is the same as that seen after. Flush all dependent | |
2855 | conditions from reg_cond_dead. This will make all such | |
2856 | conditionally live registers unconditionally live. */ | |
2857 | if (REGNO_REG_SET_P (pbi->reg_cond_reg, regno)) | |
2858 | flush_reg_cond_reg (pbi, regno); | |
2859 | ||
2860 | /* If this is an unconditional store, remove any conditional | |
2861 | life that may have existed. */ | |
2862 | if (cond == NULL_RTX) | |
2863 | splay_tree_remove (pbi->reg_cond_dead, regno); | |
2864 | else | |
2865 | { | |
2866 | splay_tree_node node; | |
2867 | struct reg_cond_life_info *rcli; | |
2868 | rtx ncond; | |
2869 | ||
2870 | /* Otherwise this is a conditional set. Record that fact. | |
2871 | It may have been conditionally used, or there may be a | |
2872 | subsequent set with a complimentary condition. */ | |
34487bf8 | 2873 | |
402209ff JH |
2874 | node = splay_tree_lookup (pbi->reg_cond_dead, regno); |
2875 | if (node == NULL) | |
34487bf8 | 2876 | { |
402209ff JH |
2877 | /* The register was unconditionally live previously. |
2878 | Record the current condition as the condition under | |
2879 | which it is dead. */ | |
703ad42b | 2880 | rcli = xmalloc (sizeof (*rcli)); |
402209ff JH |
2881 | rcli->condition = cond; |
2882 | rcli->stores = cond; | |
2883 | rcli->orig_condition = const0_rtx; | |
2884 | splay_tree_insert (pbi->reg_cond_dead, regno, | |
2885 | (splay_tree_value) rcli); | |
2886 | ||
2887 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); | |
2888 | ||
d6a7951f | 2889 | /* Not unconditionally dead. */ |
402209ff | 2890 | return 0; |
34487bf8 RH |
2891 | } |
2892 | else | |
2893 | { | |
402209ff JH |
2894 | /* The register was conditionally live previously. |
2895 | Add the new condition to the old. */ | |
2896 | rcli = (struct reg_cond_life_info *) node->value; | |
2897 | ncond = rcli->condition; | |
2898 | ncond = ior_reg_cond (ncond, cond, 1); | |
2899 | if (rcli->stores == const0_rtx) | |
2900 | rcli->stores = cond; | |
2901 | else if (rcli->stores != const1_rtx) | |
2902 | rcli->stores = ior_reg_cond (rcli->stores, cond, 1); | |
34487bf8 | 2903 | |
402209ff JH |
2904 | /* If the register is now unconditionally dead, remove the entry |
2905 | in the splay_tree. A register is unconditionally dead if the | |
2906 | dead condition ncond is true. A register is also unconditionally | |
2907 | dead if the sum of all conditional stores is an unconditional | |
2908 | store (stores is true), and the dead condition is identically the | |
2909 | same as the original dead condition initialized at the end of | |
2910 | the block. This is a pointer compare, not an rtx_equal_p | |
2911 | compare. */ | |
2912 | if (ncond == const1_rtx | |
2913 | || (ncond == rcli->orig_condition && rcli->stores == const1_rtx)) | |
2914 | splay_tree_remove (pbi->reg_cond_dead, regno); | |
2915 | else | |
2916 | { | |
2917 | rcli->condition = ncond; | |
34487bf8 | 2918 | |
402209ff | 2919 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); |
34487bf8 | 2920 | |
d6a7951f | 2921 | /* Not unconditionally dead. */ |
402209ff | 2922 | return 0; |
34487bf8 RH |
2923 | } |
2924 | } | |
2925 | } | |
2926 | ||
402209ff JH |
2927 | return 1; |
2928 | } | |
bce7bfe8 | 2929 | |
402209ff | 2930 | /* Called from splay_tree_delete for pbi->reg_cond_life. */ |
b9f22704 | 2931 | |
402209ff | 2932 | static void |
6cf9ac28 | 2933 | free_reg_cond_life_info (splay_tree_value value) |
402209ff JH |
2934 | { |
2935 | struct reg_cond_life_info *rcli = (struct reg_cond_life_info *) value; | |
2936 | free (rcli); | |
2937 | } | |
18ca529b | 2938 | |
402209ff | 2939 | /* Helper function for flush_reg_cond_reg. */ |
34487bf8 | 2940 | |
402209ff | 2941 | static int |
6cf9ac28 | 2942 | flush_reg_cond_reg_1 (splay_tree_node node, void *data) |
402209ff JH |
2943 | { |
2944 | struct reg_cond_life_info *rcli; | |
2945 | int *xdata = (int *) data; | |
2946 | unsigned int regno = xdata[0]; | |
34487bf8 | 2947 | |
402209ff JH |
2948 | /* Don't need to search if last flushed value was farther on in |
2949 | the in-order traversal. */ | |
2950 | if (xdata[1] >= (int) node->key) | |
2951 | return 0; | |
34487bf8 | 2952 | |
402209ff JH |
2953 | /* Splice out portions of the expression that refer to regno. */ |
2954 | rcli = (struct reg_cond_life_info *) node->value; | |
2955 | rcli->condition = elim_reg_cond (rcli->condition, regno); | |
2956 | if (rcli->stores != const0_rtx && rcli->stores != const1_rtx) | |
2957 | rcli->stores = elim_reg_cond (rcli->stores, regno); | |
0edd203b | 2958 | |
402209ff JH |
2959 | /* If the entire condition is now false, signal the node to be removed. */ |
2960 | if (rcli->condition == const0_rtx) | |
2961 | { | |
2962 | xdata[1] = node->key; | |
2963 | return -1; | |
34487bf8 | 2964 | } |
0bccc606 NS |
2965 | else |
2966 | gcc_assert (rcli->condition != const1_rtx); | |
d3a923ee | 2967 | |
402209ff | 2968 | return 0; |
34487bf8 | 2969 | } |
410538ea | 2970 | |
402209ff | 2971 | /* Flush all (sub) expressions referring to REGNO from REG_COND_LIVE. */ |
410538ea | 2972 | |
402209ff | 2973 | static void |
6cf9ac28 | 2974 | flush_reg_cond_reg (struct propagate_block_info *pbi, int regno) |
402209ff JH |
2975 | { |
2976 | int pair[2]; | |
410538ea | 2977 | |
402209ff JH |
2978 | pair[0] = regno; |
2979 | pair[1] = -1; | |
2980 | while (splay_tree_foreach (pbi->reg_cond_dead, | |
2981 | flush_reg_cond_reg_1, pair) == -1) | |
2982 | splay_tree_remove (pbi->reg_cond_dead, pair[1]); | |
410538ea | 2983 | |
402209ff JH |
2984 | CLEAR_REGNO_REG_SET (pbi->reg_cond_reg, regno); |
2985 | } | |
410538ea | 2986 | |
402209ff JH |
2987 | /* Logical arithmetic on predicate conditions. IOR, NOT and AND. |
2988 | For ior/and, the ADD flag determines whether we want to add the new | |
2989 | condition X to the old one unconditionally. If it is zero, we will | |
2990 | only return a new expression if X allows us to simplify part of | |
b318748f | 2991 | OLD, otherwise we return NULL to the caller. |
402209ff JH |
2992 | If ADD is nonzero, we will return a new condition in all cases. The |
2993 | toplevel caller of one of these functions should always pass 1 for | |
2994 | ADD. */ | |
410538ea | 2995 | |
402209ff | 2996 | static rtx |
6cf9ac28 | 2997 | ior_reg_cond (rtx old, rtx x, int add) |
402209ff JH |
2998 | { |
2999 | rtx op0, op1; | |
410538ea | 3000 | |
ec8e098d | 3001 | if (COMPARISON_P (old)) |
410538ea | 3002 | { |
33e6a97a | 3003 | if (COMPARISON_P (x) |
15dce812 | 3004 | && REVERSE_CONDEXEC_PREDICATES_P (x, old) |
402209ff JH |
3005 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) |
3006 | return const1_rtx; | |
3007 | if (GET_CODE (x) == GET_CODE (old) | |
3008 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
3009 | return old; | |
3010 | if (! add) | |
b318748f | 3011 | return NULL; |
402209ff | 3012 | return gen_rtx_IOR (0, old, x); |
410538ea | 3013 | } |
c9bacfdb | 3014 | |
402209ff | 3015 | switch (GET_CODE (old)) |
410538ea | 3016 | { |
402209ff JH |
3017 | case IOR: |
3018 | op0 = ior_reg_cond (XEXP (old, 0), x, 0); | |
3019 | op1 = ior_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3020 | if (op0 != NULL || op1 != NULL) |
402209ff JH |
3021 | { |
3022 | if (op0 == const0_rtx) | |
b318748f | 3023 | return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x); |
402209ff | 3024 | if (op1 == const0_rtx) |
b318748f | 3025 | return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x); |
402209ff JH |
3026 | if (op0 == const1_rtx || op1 == const1_rtx) |
3027 | return const1_rtx; | |
b318748f JJ |
3028 | if (op0 == NULL) |
3029 | op0 = gen_rtx_IOR (0, XEXP (old, 0), x); | |
3030 | else if (rtx_equal_p (x, op0)) | |
3031 | /* (x | A) | x ~ (x | A). */ | |
3032 | return old; | |
3033 | if (op1 == NULL) | |
3034 | op1 = gen_rtx_IOR (0, XEXP (old, 1), x); | |
3035 | else if (rtx_equal_p (x, op1)) | |
3036 | /* (A | x) | x ~ (A | x). */ | |
3037 | return old; | |
402209ff JH |
3038 | return gen_rtx_IOR (0, op0, op1); |
3039 | } | |
3040 | if (! add) | |
b318748f | 3041 | return NULL; |
402209ff | 3042 | return gen_rtx_IOR (0, old, x); |
410538ea | 3043 | |
402209ff JH |
3044 | case AND: |
3045 | op0 = ior_reg_cond (XEXP (old, 0), x, 0); | |
3046 | op1 = ior_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3047 | if (op0 != NULL || op1 != NULL) |
410538ea | 3048 | { |
402209ff | 3049 | if (op0 == const1_rtx) |
b318748f | 3050 | return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x); |
402209ff | 3051 | if (op1 == const1_rtx) |
b318748f | 3052 | return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x); |
402209ff JH |
3053 | if (op0 == const0_rtx || op1 == const0_rtx) |
3054 | return const0_rtx; | |
b318748f JJ |
3055 | if (op0 == NULL) |
3056 | op0 = gen_rtx_IOR (0, XEXP (old, 0), x); | |
3057 | else if (rtx_equal_p (x, op0)) | |
3058 | /* (x & A) | x ~ x. */ | |
3059 | return op0; | |
3060 | if (op1 == NULL) | |
3061 | op1 = gen_rtx_IOR (0, XEXP (old, 1), x); | |
3062 | else if (rtx_equal_p (x, op1)) | |
3063 | /* (A & x) | x ~ x. */ | |
3064 | return op1; | |
402209ff | 3065 | return gen_rtx_AND (0, op0, op1); |
410538ea | 3066 | } |
402209ff | 3067 | if (! add) |
b318748f | 3068 | return NULL; |
402209ff | 3069 | return gen_rtx_IOR (0, old, x); |
410538ea | 3070 | |
402209ff JH |
3071 | case NOT: |
3072 | op0 = and_reg_cond (XEXP (old, 0), not_reg_cond (x), 0); | |
b318748f | 3073 | if (op0 != NULL) |
402209ff JH |
3074 | return not_reg_cond (op0); |
3075 | if (! add) | |
b318748f | 3076 | return NULL; |
402209ff | 3077 | return gen_rtx_IOR (0, old, x); |
c9bacfdb | 3078 | |
402209ff | 3079 | default: |
0bccc606 | 3080 | gcc_unreachable (); |
410538ea AM |
3081 | } |
3082 | } | |
3083 | ||
402209ff | 3084 | static rtx |
6cf9ac28 | 3085 | not_reg_cond (rtx x) |
410538ea | 3086 | { |
402209ff JH |
3087 | if (x == const0_rtx) |
3088 | return const1_rtx; | |
3089 | else if (x == const1_rtx) | |
3090 | return const0_rtx; | |
15dce812 | 3091 | if (GET_CODE (x) == NOT) |
402209ff | 3092 | return XEXP (x, 0); |
ec8e098d | 3093 | if (COMPARISON_P (x) |
f8cfc6aa | 3094 | && REG_P (XEXP (x, 0))) |
410538ea | 3095 | { |
0bccc606 | 3096 | gcc_assert (XEXP (x, 1) == const0_rtx); |
410538ea | 3097 | |
15dce812 | 3098 | return gen_rtx_fmt_ee (reversed_comparison_code (x, NULL), |
402209ff | 3099 | VOIDmode, XEXP (x, 0), const0_rtx); |
410538ea | 3100 | } |
402209ff | 3101 | return gen_rtx_NOT (0, x); |
410538ea AM |
3102 | } |
3103 | ||
402209ff | 3104 | static rtx |
6cf9ac28 | 3105 | and_reg_cond (rtx old, rtx x, int add) |
410538ea | 3106 | { |
402209ff | 3107 | rtx op0, op1; |
410538ea | 3108 | |
ec8e098d | 3109 | if (COMPARISON_P (old)) |
410538ea | 3110 | { |
33e6a97a | 3111 | if (COMPARISON_P (x) |
15dce812 | 3112 | && GET_CODE (x) == reversed_comparison_code (old, NULL) |
402209ff JH |
3113 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) |
3114 | return const0_rtx; | |
3115 | if (GET_CODE (x) == GET_CODE (old) | |
3116 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
3117 | return old; | |
3118 | if (! add) | |
b318748f | 3119 | return NULL; |
402209ff JH |
3120 | return gen_rtx_AND (0, old, x); |
3121 | } | |
410538ea | 3122 | |
402209ff JH |
3123 | switch (GET_CODE (old)) |
3124 | { | |
3125 | case IOR: | |
3126 | op0 = and_reg_cond (XEXP (old, 0), x, 0); | |
3127 | op1 = and_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3128 | if (op0 != NULL || op1 != NULL) |
410538ea | 3129 | { |
402209ff | 3130 | if (op0 == const0_rtx) |
b318748f | 3131 | return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x); |
402209ff | 3132 | if (op1 == const0_rtx) |
b318748f | 3133 | return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x); |
402209ff JH |
3134 | if (op0 == const1_rtx || op1 == const1_rtx) |
3135 | return const1_rtx; | |
b318748f JJ |
3136 | if (op0 == NULL) |
3137 | op0 = gen_rtx_AND (0, XEXP (old, 0), x); | |
3138 | else if (rtx_equal_p (x, op0)) | |
3139 | /* (x | A) & x ~ x. */ | |
3140 | return op0; | |
3141 | if (op1 == NULL) | |
3142 | op1 = gen_rtx_AND (0, XEXP (old, 1), x); | |
3143 | else if (rtx_equal_p (x, op1)) | |
3144 | /* (A | x) & x ~ x. */ | |
3145 | return op1; | |
402209ff | 3146 | return gen_rtx_IOR (0, op0, op1); |
410538ea | 3147 | } |
402209ff | 3148 | if (! add) |
b318748f | 3149 | return NULL; |
402209ff JH |
3150 | return gen_rtx_AND (0, old, x); |
3151 | ||
3152 | case AND: | |
3153 | op0 = and_reg_cond (XEXP (old, 0), x, 0); | |
3154 | op1 = and_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3155 | if (op0 != NULL || op1 != NULL) |
410538ea | 3156 | { |
402209ff | 3157 | if (op0 == const1_rtx) |
b318748f | 3158 | return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x); |
402209ff | 3159 | if (op1 == const1_rtx) |
b318748f | 3160 | return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x); |
402209ff JH |
3161 | if (op0 == const0_rtx || op1 == const0_rtx) |
3162 | return const0_rtx; | |
b318748f JJ |
3163 | if (op0 == NULL) |
3164 | op0 = gen_rtx_AND (0, XEXP (old, 0), x); | |
3165 | else if (rtx_equal_p (x, op0)) | |
3166 | /* (x & A) & x ~ (x & A). */ | |
3167 | return old; | |
3168 | if (op1 == NULL) | |
3169 | op1 = gen_rtx_AND (0, XEXP (old, 1), x); | |
3170 | else if (rtx_equal_p (x, op1)) | |
3171 | /* (A & x) & x ~ (A & x). */ | |
3172 | return old; | |
402209ff | 3173 | return gen_rtx_AND (0, op0, op1); |
410538ea | 3174 | } |
402209ff | 3175 | if (! add) |
b318748f | 3176 | return NULL; |
402209ff | 3177 | return gen_rtx_AND (0, old, x); |
410538ea | 3178 | |
402209ff JH |
3179 | case NOT: |
3180 | op0 = ior_reg_cond (XEXP (old, 0), not_reg_cond (x), 0); | |
b318748f | 3181 | if (op0 != NULL) |
402209ff JH |
3182 | return not_reg_cond (op0); |
3183 | if (! add) | |
b318748f | 3184 | return NULL; |
402209ff | 3185 | return gen_rtx_AND (0, old, x); |
410538ea | 3186 | |
402209ff | 3187 | default: |
0bccc606 | 3188 | gcc_unreachable (); |
c9bacfdb | 3189 | } |
410538ea AM |
3190 | } |
3191 | ||
402209ff JH |
3192 | /* Given a condition X, remove references to reg REGNO and return the |
3193 | new condition. The removal will be done so that all conditions | |
3194 | involving REGNO are considered to evaluate to false. This function | |
3195 | is used when the value of REGNO changes. */ | |
c9bacfdb | 3196 | |
402209ff | 3197 | static rtx |
6cf9ac28 | 3198 | elim_reg_cond (rtx x, unsigned int regno) |
410538ea | 3199 | { |
402209ff JH |
3200 | rtx op0, op1; |
3201 | ||
ec8e098d | 3202 | if (COMPARISON_P (x)) |
410538ea | 3203 | { |
402209ff JH |
3204 | if (REGNO (XEXP (x, 0)) == regno) |
3205 | return const0_rtx; | |
3206 | return x; | |
410538ea | 3207 | } |
c9bacfdb | 3208 | |
402209ff JH |
3209 | switch (GET_CODE (x)) |
3210 | { | |
3211 | case AND: | |
3212 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3213 | op1 = elim_reg_cond (XEXP (x, 1), regno); | |
3214 | if (op0 == const0_rtx || op1 == const0_rtx) | |
3215 | return const0_rtx; | |
3216 | if (op0 == const1_rtx) | |
3217 | return op1; | |
3218 | if (op1 == const1_rtx) | |
3219 | return op0; | |
3220 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) | |
3221 | return x; | |
3222 | return gen_rtx_AND (0, op0, op1); | |
87fdf7ff | 3223 | |
402209ff JH |
3224 | case IOR: |
3225 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3226 | op1 = elim_reg_cond (XEXP (x, 1), regno); | |
3227 | if (op0 == const1_rtx || op1 == const1_rtx) | |
3228 | return const1_rtx; | |
3229 | if (op0 == const0_rtx) | |
3230 | return op1; | |
3231 | if (op1 == const0_rtx) | |
3232 | return op0; | |
3233 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) | |
3234 | return x; | |
3235 | return gen_rtx_IOR (0, op0, op1); | |
87fdf7ff | 3236 | |
402209ff JH |
3237 | case NOT: |
3238 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3239 | if (op0 == const0_rtx) | |
3240 | return const1_rtx; | |
3241 | if (op0 == const1_rtx) | |
3242 | return const0_rtx; | |
3243 | if (op0 != XEXP (x, 0)) | |
3244 | return not_reg_cond (op0); | |
3245 | return x; | |
87fdf7ff | 3246 | |
402209ff | 3247 | default: |
0bccc606 | 3248 | gcc_unreachable (); |
402209ff | 3249 | } |
87fdf7ff | 3250 | } |
402209ff JH |
3251 | #endif /* HAVE_conditional_execution */ |
3252 | \f | |
3253 | #ifdef AUTO_INC_DEC | |
87fdf7ff | 3254 | |
402209ff JH |
3255 | /* Try to substitute the auto-inc expression INC as the address inside |
3256 | MEM which occurs in INSN. Currently, the address of MEM is an expression | |
3257 | involving INCR_REG, and INCR is the next use of INCR_REG; it is an insn | |
3258 | that has a single set whose source is a PLUS of INCR_REG and something | |
3259 | else. */ | |
c9bacfdb | 3260 | |
87fdf7ff | 3261 | static void |
6cf9ac28 AJ |
3262 | attempt_auto_inc (struct propagate_block_info *pbi, rtx inc, rtx insn, |
3263 | rtx mem, rtx incr, rtx incr_reg) | |
87fdf7ff | 3264 | { |
402209ff JH |
3265 | int regno = REGNO (incr_reg); |
3266 | rtx set = single_set (incr); | |
3267 | rtx q = SET_DEST (set); | |
3268 | rtx y = SET_SRC (set); | |
3269 | int opnum = XEXP (y, 0) == incr_reg ? 0 : 1; | |
0bccc606 | 3270 | int changed; |
c9bacfdb | 3271 | |
402209ff JH |
3272 | /* Make sure this reg appears only once in this insn. */ |
3273 | if (count_occurrences (PATTERN (insn), incr_reg, 1) != 1) | |
3274 | return; | |
87fdf7ff | 3275 | |
402209ff JH |
3276 | if (dead_or_set_p (incr, incr_reg) |
3277 | /* Mustn't autoinc an eliminable register. */ | |
3278 | && (regno >= FIRST_PSEUDO_REGISTER | |
3279 | || ! TEST_HARD_REG_BIT (elim_reg_set, regno))) | |
3280 | { | |
3281 | /* This is the simple case. Try to make the auto-inc. If | |
3282 | we can't, we are done. Otherwise, we will do any | |
3283 | needed updates below. */ | |
3284 | if (! validate_change (insn, &XEXP (mem, 0), inc, 0)) | |
3285 | return; | |
3286 | } | |
f8cfc6aa | 3287 | else if (REG_P (q) |
402209ff JH |
3288 | /* PREV_INSN used here to check the semi-open interval |
3289 | [insn,incr). */ | |
3290 | && ! reg_used_between_p (q, PREV_INSN (insn), incr) | |
3291 | /* We must also check for sets of q as q may be | |
3292 | a call clobbered hard register and there may | |
3293 | be a call between PREV_INSN (insn) and incr. */ | |
3294 | && ! reg_set_between_p (q, PREV_INSN (insn), incr)) | |
3295 | { | |
3296 | /* We have *p followed sometime later by q = p+size. | |
3297 | Both p and q must be live afterward, | |
3298 | and q is not used between INSN and its assignment. | |
3299 | Change it to q = p, ...*q..., q = q+size. | |
3300 | Then fall into the usual case. */ | |
3301 | rtx insns, temp; | |
d3a923ee | 3302 | |
402209ff JH |
3303 | start_sequence (); |
3304 | emit_move_insn (q, incr_reg); | |
3305 | insns = get_insns (); | |
3306 | end_sequence (); | |
87fdf7ff | 3307 | |
402209ff JH |
3308 | /* If we can't make the auto-inc, or can't make the |
3309 | replacement into Y, exit. There's no point in making | |
3310 | the change below if we can't do the auto-inc and doing | |
3311 | so is not correct in the pre-inc case. */ | |
87fdf7ff | 3312 | |
402209ff JH |
3313 | XEXP (inc, 0) = q; |
3314 | validate_change (insn, &XEXP (mem, 0), inc, 1); | |
3315 | validate_change (incr, &XEXP (y, opnum), q, 1); | |
3316 | if (! apply_change_group ()) | |
3317 | return; | |
f008a564 | 3318 | |
402209ff JH |
3319 | /* We now know we'll be doing this change, so emit the |
3320 | new insn(s) and do the updates. */ | |
2f937369 | 3321 | emit_insn_before (insns, insn); |
f008a564 | 3322 | |
a813c111 SB |
3323 | if (BB_HEAD (pbi->bb) == insn) |
3324 | BB_HEAD (pbi->bb) = insns; | |
b53978a3 | 3325 | |
402209ff JH |
3326 | /* INCR will become a NOTE and INSN won't contain a |
3327 | use of INCR_REG. If a use of INCR_REG was just placed in | |
3328 | the insn before INSN, make that the next use. | |
3329 | Otherwise, invalidate it. */ | |
4b4bf941 | 3330 | if (NONJUMP_INSN_P (PREV_INSN (insn)) |
402209ff JH |
3331 | && GET_CODE (PATTERN (PREV_INSN (insn))) == SET |
3332 | && SET_SRC (PATTERN (PREV_INSN (insn))) == incr_reg) | |
3333 | pbi->reg_next_use[regno] = PREV_INSN (insn); | |
3334 | else | |
3335 | pbi->reg_next_use[regno] = 0; | |
c9bacfdb | 3336 | |
402209ff JH |
3337 | incr_reg = q; |
3338 | regno = REGNO (q); | |
b53978a3 | 3339 | |
298c28a8 JH |
3340 | if ((pbi->flags & PROP_REG_INFO) |
3341 | && !REGNO_REG_SET_P (pbi->reg_live, regno)) | |
3342 | reg_deaths[regno] = pbi->insn_num; | |
3343 | ||
402209ff JH |
3344 | /* REGNO is now used in INCR which is below INSN, but |
3345 | it previously wasn't live here. If we don't mark | |
3346 | it as live, we'll put a REG_DEAD note for it | |
3347 | on this insn, which is incorrect. */ | |
3348 | SET_REGNO_REG_SET (pbi->reg_live, regno); | |
b53978a3 | 3349 | |
402209ff JH |
3350 | /* If there are any calls between INSN and INCR, show |
3351 | that REGNO now crosses them. */ | |
3352 | for (temp = insn; temp != incr; temp = NEXT_INSN (temp)) | |
4b4bf941 | 3353 | if (CALL_P (temp)) |
402209ff | 3354 | REG_N_CALLS_CROSSED (regno)++; |
c9bacfdb | 3355 | |
402209ff JH |
3356 | /* Invalidate alias info for Q since we just changed its value. */ |
3357 | clear_reg_alias_info (q); | |
b53978a3 | 3358 | } |
402209ff JH |
3359 | else |
3360 | return; | |
b53978a3 | 3361 | |
402209ff JH |
3362 | /* If we haven't returned, it means we were able to make the |
3363 | auto-inc, so update the status. First, record that this insn | |
3364 | has an implicit side effect. */ | |
f008a564 | 3365 | |
402209ff | 3366 | REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, incr_reg, REG_NOTES (insn)); |
f008a564 | 3367 | |
402209ff JH |
3368 | /* Modify the old increment-insn to simply copy |
3369 | the already-incremented value of our register. */ | |
0bccc606 NS |
3370 | changed = validate_change (incr, &SET_SRC (set), incr_reg, 0); |
3371 | gcc_assert (changed); | |
ca9fef16 | 3372 | |
402209ff JH |
3373 | /* If that makes it a no-op (copying the register into itself) delete |
3374 | it so it won't appear to be a "use" and a "set" of this | |
3375 | register. */ | |
3376 | if (REGNO (SET_DEST (set)) == REGNO (incr_reg)) | |
ca9fef16 | 3377 | { |
402209ff JH |
3378 | /* If the original source was dead, it's dead now. */ |
3379 | rtx note; | |
ca9fef16 | 3380 | |
402209ff JH |
3381 | while ((note = find_reg_note (incr, REG_DEAD, NULL_RTX)) != NULL_RTX) |
3382 | { | |
3383 | remove_note (incr, note); | |
3384 | if (XEXP (note, 0) != incr_reg) | |
298c28a8 JH |
3385 | { |
3386 | unsigned int regno = REGNO (XEXP (note, 0)); | |
3387 | ||
3388 | if ((pbi->flags & PROP_REG_INFO) | |
3389 | && REGNO_REG_SET_P (pbi->reg_live, regno)) | |
3390 | { | |
3391 | REG_LIVE_LENGTH (regno) += pbi->insn_num - reg_deaths[regno]; | |
3392 | reg_deaths[regno] = 0; | |
3393 | } | |
3394 | CLEAR_REGNO_REG_SET (pbi->reg_live, REGNO (XEXP (note, 0))); | |
3395 | } | |
402209ff | 3396 | } |
c9bacfdb | 3397 | |
6773e15f | 3398 | SET_INSN_DELETED (incr); |
402209ff | 3399 | } |
f008a564 | 3400 | |
402209ff JH |
3401 | if (regno >= FIRST_PSEUDO_REGISTER) |
3402 | { | |
3403 | /* Count an extra reference to the reg. When a reg is | |
3404 | incremented, spilling it is worse, so we want to make | |
3405 | that less likely. */ | |
3406 | REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb); | |
f008a564 | 3407 | |
402209ff JH |
3408 | /* Count the increment as a setting of the register, |
3409 | even though it isn't a SET in rtl. */ | |
3410 | REG_N_SETS (regno)++; | |
3411 | } | |
f008a564 | 3412 | } |
402209ff JH |
3413 | |
3414 | /* X is a MEM found in INSN. See if we can convert it into an auto-increment | |
3415 | reference. */ | |
c9bacfdb | 3416 | |
21c7361e | 3417 | static void |
6cf9ac28 | 3418 | find_auto_inc (struct propagate_block_info *pbi, rtx x, rtx insn) |
4dc9341c | 3419 | { |
402209ff JH |
3420 | rtx addr = XEXP (x, 0); |
3421 | HOST_WIDE_INT offset = 0; | |
3422 | rtx set, y, incr, inc_val; | |
3423 | int regno; | |
3424 | int size = GET_MODE_SIZE (GET_MODE (x)); | |
4dc9341c | 3425 | |
4b4bf941 | 3426 | if (JUMP_P (insn)) |
135ebc36 MH |
3427 | return; |
3428 | ||
402209ff JH |
3429 | /* Here we detect use of an index register which might be good for |
3430 | postincrement, postdecrement, preincrement, or predecrement. */ | |
3431 | ||
3432 | if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
3433 | offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); | |
4dc9341c | 3434 | |
f8cfc6aa | 3435 | if (!REG_P (addr)) |
402209ff | 3436 | return; |
c9bacfdb | 3437 | |
402209ff | 3438 | regno = REGNO (addr); |
135ebc36 | 3439 | |
402209ff JH |
3440 | /* Is the next use an increment that might make auto-increment? */ |
3441 | incr = pbi->reg_next_use[regno]; | |
3442 | if (incr == 0 || BLOCK_NUM (incr) != BLOCK_NUM (insn)) | |
3443 | return; | |
3444 | set = single_set (incr); | |
3445 | if (set == 0 || GET_CODE (set) != SET) | |
3446 | return; | |
3447 | y = SET_SRC (set); | |
4dc9341c | 3448 | |
402209ff | 3449 | if (GET_CODE (y) != PLUS) |
135ebc36 MH |
3450 | return; |
3451 | ||
402209ff JH |
3452 | if (REG_P (XEXP (y, 0)) && REGNO (XEXP (y, 0)) == REGNO (addr)) |
3453 | inc_val = XEXP (y, 1); | |
3454 | else if (REG_P (XEXP (y, 1)) && REGNO (XEXP (y, 1)) == REGNO (addr)) | |
3455 | inc_val = XEXP (y, 0); | |
3456 | else | |
3457 | return; | |
4dc9341c | 3458 | |
402209ff JH |
3459 | if (GET_CODE (inc_val) == CONST_INT) |
3460 | { | |
3461 | if (HAVE_POST_INCREMENT | |
3462 | && (INTVAL (inc_val) == size && offset == 0)) | |
3463 | attempt_auto_inc (pbi, gen_rtx_POST_INC (Pmode, addr), insn, x, | |
3464 | incr, addr); | |
3465 | else if (HAVE_POST_DECREMENT | |
3466 | && (INTVAL (inc_val) == -size && offset == 0)) | |
3467 | attempt_auto_inc (pbi, gen_rtx_POST_DEC (Pmode, addr), insn, x, | |
3468 | incr, addr); | |
3469 | else if (HAVE_PRE_INCREMENT | |
3470 | && (INTVAL (inc_val) == size && offset == size)) | |
3471 | attempt_auto_inc (pbi, gen_rtx_PRE_INC (Pmode, addr), insn, x, | |
3472 | incr, addr); | |
3473 | else if (HAVE_PRE_DECREMENT | |
3474 | && (INTVAL (inc_val) == -size && offset == -size)) | |
3475 | attempt_auto_inc (pbi, gen_rtx_PRE_DEC (Pmode, addr), insn, x, | |
3476 | incr, addr); | |
3477 | else if (HAVE_POST_MODIFY_DISP && offset == 0) | |
3478 | attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr, | |
3479 | gen_rtx_PLUS (Pmode, | |
3480 | addr, | |
3481 | inc_val)), | |
3482 | insn, x, incr, addr); | |
89c4b810 RE |
3483 | else if (HAVE_PRE_MODIFY_DISP && offset == INTVAL (inc_val)) |
3484 | attempt_auto_inc (pbi, gen_rtx_PRE_MODIFY (Pmode, addr, | |
3485 | gen_rtx_PLUS (Pmode, | |
3486 | addr, | |
3487 | inc_val)), | |
3488 | insn, x, incr, addr); | |
402209ff | 3489 | } |
f8cfc6aa | 3490 | else if (REG_P (inc_val) |
402209ff JH |
3491 | && ! reg_set_between_p (inc_val, PREV_INSN (insn), |
3492 | NEXT_INSN (incr))) | |
135ebc36 | 3493 | |
402209ff JH |
3494 | { |
3495 | if (HAVE_POST_MODIFY_REG && offset == 0) | |
3496 | attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr, | |
3497 | gen_rtx_PLUS (Pmode, | |
3498 | addr, | |
3499 | inc_val)), | |
3500 | insn, x, incr, addr); | |
3501 | } | |
3502 | } | |
c9bacfdb | 3503 | |
402209ff JH |
3504 | #endif /* AUTO_INC_DEC */ |
3505 | \f | |
4dc9341c | 3506 | static void |
6cf9ac28 AJ |
3507 | mark_used_reg (struct propagate_block_info *pbi, rtx reg, |
3508 | rtx cond ATTRIBUTE_UNUSED, rtx insn) | |
4dc9341c | 3509 | { |
402209ff JH |
3510 | unsigned int regno_first, regno_last, i; |
3511 | int some_was_live, some_was_dead, some_not_set; | |
4dc9341c | 3512 | |
402209ff JH |
3513 | regno_last = regno_first = REGNO (reg); |
3514 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
66fd46b6 | 3515 | regno_last += hard_regno_nregs[regno_first][GET_MODE (reg)] - 1; |
4dc9341c | 3516 | |
402209ff JH |
3517 | /* Find out if any of this register is live after this instruction. */ |
3518 | some_was_live = some_was_dead = 0; | |
3519 | for (i = regno_first; i <= regno_last; ++i) | |
4dc9341c | 3520 | { |
402209ff JH |
3521 | int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i); |
3522 | some_was_live |= needed_regno; | |
3523 | some_was_dead |= ! needed_regno; | |
4dc9341c MH |
3524 | } |
3525 | ||
402209ff JH |
3526 | /* Find out if any of the register was set this insn. */ |
3527 | some_not_set = 0; | |
3528 | for (i = regno_first; i <= regno_last; ++i) | |
3529 | some_not_set |= ! REGNO_REG_SET_P (pbi->new_set, i); | |
3530 | ||
3531 | if (pbi->flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
c34d5374 | 3532 | { |
402209ff JH |
3533 | /* Record where each reg is used, so when the reg is set we know |
3534 | the next insn that uses it. */ | |
3535 | pbi->reg_next_use[regno_first] = insn; | |
c34d5374 | 3536 | } |
c9bacfdb | 3537 | |
402209ff JH |
3538 | if (pbi->flags & PROP_REG_INFO) |
3539 | { | |
3540 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
3541 | { | |
3542 | /* If this is a register we are going to try to eliminate, | |
3543 | don't mark it live here. If we are successful in | |
3544 | eliminating it, it need not be live unless it is used for | |
3545 | pseudos, in which case it will have been set live when it | |
3546 | was allocated to the pseudos. If the register will not | |
3547 | be eliminated, reload will set it live at that point. | |
4dc9341c | 3548 | |
402209ff JH |
3549 | Otherwise, record that this function uses this register. */ |
3550 | /* ??? The PPC backend tries to "eliminate" on the pic | |
3551 | register to itself. This should be fixed. In the mean | |
3552 | time, hack around it. */ | |
c9bacfdb | 3553 | |
402209ff JH |
3554 | if (! (TEST_HARD_REG_BIT (elim_reg_set, regno_first) |
3555 | && (regno_first == FRAME_POINTER_REGNUM | |
3556 | || regno_first == ARG_POINTER_REGNUM))) | |
3557 | for (i = regno_first; i <= regno_last; ++i) | |
3558 | regs_ever_live[i] = 1; | |
3559 | } | |
3560 | else | |
3561 | { | |
3562 | /* Keep track of which basic block each reg appears in. */ | |
6057c0e6 | 3563 | |
0b17ab2f | 3564 | int blocknum = pbi->bb->index; |
402209ff JH |
3565 | if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN) |
3566 | REG_BASIC_BLOCK (regno_first) = blocknum; | |
3567 | else if (REG_BASIC_BLOCK (regno_first) != blocknum) | |
3568 | REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL; | |
6057c0e6 | 3569 | |
402209ff JH |
3570 | /* Count (weighted) number of uses of each reg. */ |
3571 | REG_FREQ (regno_first) += REG_FREQ_FROM_BB (pbi->bb); | |
3572 | REG_N_REFS (regno_first)++; | |
3573 | } | |
736b64dd JH |
3574 | for (i = regno_first; i <= regno_last; ++i) |
3575 | if (! REGNO_REG_SET_P (pbi->reg_live, i)) | |
3576 | { | |
0bccc606 | 3577 | gcc_assert (!reg_deaths[i]); |
736b64dd JH |
3578 | reg_deaths[i] = pbi->insn_num; |
3579 | } | |
402209ff | 3580 | } |
6057c0e6 | 3581 | |
402209ff JH |
3582 | /* Record and count the insns in which a reg dies. If it is used in |
3583 | this insn and was dead below the insn then it dies in this insn. | |
3584 | If it was set in this insn, we do not make a REG_DEAD note; | |
3585 | likewise if we already made such a note. */ | |
3586 | if ((pbi->flags & (PROP_DEATH_NOTES | PROP_REG_INFO)) | |
3587 | && some_was_dead | |
3588 | && some_not_set) | |
3589 | { | |
3590 | /* Check for the case where the register dying partially | |
3591 | overlaps the register set by this insn. */ | |
3592 | if (regno_first != regno_last) | |
3593 | for (i = regno_first; i <= regno_last; ++i) | |
3594 | some_was_live |= REGNO_REG_SET_P (pbi->new_set, i); | |
4dc9341c | 3595 | |
402209ff JH |
3596 | /* If none of the words in X is needed, make a REG_DEAD note. |
3597 | Otherwise, we must make partial REG_DEAD notes. */ | |
3598 | if (! some_was_live) | |
3599 | { | |
3600 | if ((pbi->flags & PROP_DEATH_NOTES) | |
3601 | && ! find_regno_note (insn, REG_DEAD, regno_first)) | |
3602 | REG_NOTES (insn) | |
3603 | = alloc_EXPR_LIST (REG_DEAD, reg, REG_NOTES (insn)); | |
4dc9341c | 3604 | |
402209ff JH |
3605 | if (pbi->flags & PROP_REG_INFO) |
3606 | REG_N_DEATHS (regno_first)++; | |
3607 | } | |
3608 | else | |
3609 | { | |
3610 | /* Don't make a REG_DEAD note for a part of a register | |
3611 | that is set in the insn. */ | |
3612 | for (i = regno_first; i <= regno_last; ++i) | |
3613 | if (! REGNO_REG_SET_P (pbi->reg_live, i) | |
3614 | && ! dead_or_set_regno_p (insn, i)) | |
3615 | REG_NOTES (insn) | |
3616 | = alloc_EXPR_LIST (REG_DEAD, | |
e50126e8 | 3617 | regno_reg_rtx[i], |
402209ff JH |
3618 | REG_NOTES (insn)); |
3619 | } | |
3620 | } | |
4dc9341c | 3621 | |
402209ff JH |
3622 | /* Mark the register as being live. */ |
3623 | for (i = regno_first; i <= regno_last; ++i) | |
4dc9341c | 3624 | { |
9be40833 RH |
3625 | #ifdef HAVE_conditional_execution |
3626 | int this_was_live = REGNO_REG_SET_P (pbi->reg_live, i); | |
3627 | #endif | |
3628 | ||
402209ff | 3629 | SET_REGNO_REG_SET (pbi->reg_live, i); |
4dc9341c | 3630 | |
402209ff JH |
3631 | #ifdef HAVE_conditional_execution |
3632 | /* If this is a conditional use, record that fact. If it is later | |
3633 | conditionally set, we'll know to kill the register. */ | |
3634 | if (cond != NULL_RTX) | |
4dc9341c | 3635 | { |
402209ff JH |
3636 | splay_tree_node node; |
3637 | struct reg_cond_life_info *rcli; | |
3638 | rtx ncond; | |
3639 | ||
9be40833 | 3640 | if (this_was_live) |
402209ff JH |
3641 | { |
3642 | node = splay_tree_lookup (pbi->reg_cond_dead, i); | |
3643 | if (node == NULL) | |
3644 | { | |
3645 | /* The register was unconditionally live previously. | |
3646 | No need to do anything. */ | |
3647 | } | |
3648 | else | |
3649 | { | |
3650 | /* The register was conditionally live previously. | |
3651 | Subtract the new life cond from the old death cond. */ | |
3652 | rcli = (struct reg_cond_life_info *) node->value; | |
3653 | ncond = rcli->condition; | |
3654 | ncond = and_reg_cond (ncond, not_reg_cond (cond), 1); | |
4dc9341c | 3655 | |
402209ff JH |
3656 | /* If the register is now unconditionally live, |
3657 | remove the entry in the splay_tree. */ | |
3658 | if (ncond == const0_rtx) | |
3659 | splay_tree_remove (pbi->reg_cond_dead, i); | |
3660 | else | |
3661 | { | |
3662 | rcli->condition = ncond; | |
3663 | SET_REGNO_REG_SET (pbi->reg_cond_reg, | |
3664 | REGNO (XEXP (cond, 0))); | |
3665 | } | |
3666 | } | |
3667 | } | |
3668 | else | |
4dc9341c | 3669 | { |
402209ff JH |
3670 | /* The register was not previously live at all. Record |
3671 | the condition under which it is still dead. */ | |
703ad42b | 3672 | rcli = xmalloc (sizeof (*rcli)); |
402209ff JH |
3673 | rcli->condition = not_reg_cond (cond); |
3674 | rcli->stores = const0_rtx; | |
3675 | rcli->orig_condition = const0_rtx; | |
3676 | splay_tree_insert (pbi->reg_cond_dead, i, | |
3677 | (splay_tree_value) rcli); | |
4dc9341c | 3678 | |
402209ff | 3679 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); |
4dc9341c MH |
3680 | } |
3681 | } | |
9be40833 | 3682 | else if (this_was_live) |
4dc9341c | 3683 | { |
402209ff JH |
3684 | /* The register may have been conditionally live previously, but |
3685 | is now unconditionally live. Remove it from the conditionally | |
3686 | dead list, so that a conditional set won't cause us to think | |
3687 | it dead. */ | |
3688 | splay_tree_remove (pbi->reg_cond_dead, i); | |
4dc9341c | 3689 | } |
402209ff | 3690 | #endif |
4dc9341c MH |
3691 | } |
3692 | } | |
3693 | ||
402209ff JH |
3694 | /* Scan expression X and store a 1-bit in NEW_LIVE for each reg it uses. |
3695 | This is done assuming the registers needed from X are those that | |
3696 | have 1-bits in PBI->REG_LIVE. | |
6057c0e6 | 3697 | |
402209ff JH |
3698 | INSN is the containing instruction. If INSN is dead, this function |
3699 | is not called. */ | |
135ebc36 | 3700 | |
402209ff | 3701 | static void |
6cf9ac28 | 3702 | mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) |
135ebc36 | 3703 | { |
b3694847 SS |
3704 | RTX_CODE code; |
3705 | int regno; | |
402209ff | 3706 | int flags = pbi->flags; |
135ebc36 | 3707 | |
402209ff | 3708 | retry: |
5a133afd JH |
3709 | if (!x) |
3710 | return; | |
402209ff JH |
3711 | code = GET_CODE (x); |
3712 | switch (code) | |
135ebc36 | 3713 | { |
402209ff JH |
3714 | case LABEL_REF: |
3715 | case SYMBOL_REF: | |
3716 | case CONST_INT: | |
3717 | case CONST: | |
3718 | case CONST_DOUBLE: | |
69ef87e2 | 3719 | case CONST_VECTOR: |
402209ff JH |
3720 | case PC: |
3721 | case ADDR_VEC: | |
3722 | case ADDR_DIFF_VEC: | |
3723 | return; | |
4dc9341c | 3724 | |
402209ff JH |
3725 | #ifdef HAVE_cc0 |
3726 | case CC0: | |
3727 | pbi->cc0_live = 1; | |
3728 | return; | |
3729 | #endif | |
4dc9341c | 3730 | |
402209ff JH |
3731 | case CLOBBER: |
3732 | /* If we are clobbering a MEM, mark any registers inside the address | |
3733 | as being used. */ | |
3c0cb5de | 3734 | if (MEM_P (XEXP (x, 0))) |
402209ff JH |
3735 | mark_used_regs (pbi, XEXP (XEXP (x, 0), 0), cond, insn); |
3736 | return; | |
4dc9341c | 3737 | |
402209ff JH |
3738 | case MEM: |
3739 | /* Don't bother watching stores to mems if this is not the | |
3740 | final pass. We'll not be deleting dead stores this round. */ | |
5149f070 | 3741 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
4dc9341c | 3742 | { |
402209ff JH |
3743 | /* Invalidate the data for the last MEM stored, but only if MEM is |
3744 | something that can be stored into. */ | |
3745 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
3746 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))) | |
3747 | /* Needn't clear the memory set list. */ | |
3748 | ; | |
3749 | else | |
4dc9341c | 3750 | { |
402209ff JH |
3751 | rtx temp = pbi->mem_set_list; |
3752 | rtx prev = NULL_RTX; | |
3753 | rtx next; | |
3754 | ||
3755 | while (temp) | |
3756 | { | |
3757 | next = XEXP (temp, 1); | |
389fdba0 | 3758 | if (anti_dependence (XEXP (temp, 0), x)) |
402209ff JH |
3759 | { |
3760 | /* Splice temp out of the list. */ | |
3761 | if (prev) | |
3762 | XEXP (prev, 1) = next; | |
3763 | else | |
3764 | pbi->mem_set_list = next; | |
3765 | free_EXPR_LIST_node (temp); | |
3766 | pbi->mem_set_list_len--; | |
3767 | } | |
3768 | else | |
3769 | prev = temp; | |
3770 | temp = next; | |
3771 | } | |
4dc9341c | 3772 | } |
402209ff JH |
3773 | |
3774 | /* If the memory reference had embedded side effects (autoincrement | |
3775 | address modes. Then we may need to kill some entries on the | |
3776 | memory set list. */ | |
3777 | if (insn) | |
fe4b3c79 | 3778 | for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi); |
4dc9341c | 3779 | } |
4dc9341c | 3780 | |
402209ff JH |
3781 | #ifdef AUTO_INC_DEC |
3782 | if (flags & PROP_AUTOINC) | |
dd3f0101 | 3783 | find_auto_inc (pbi, x, insn); |
402209ff JH |
3784 | #endif |
3785 | break; | |
d59c5346 | 3786 | |
402209ff | 3787 | case SUBREG: |
cff9f8d5 | 3788 | #ifdef CANNOT_CHANGE_MODE_CLASS |
41bf2a8b RH |
3789 | if (flags & PROP_REG_INFO) |
3790 | record_subregs_of_mode (x); | |
402209ff | 3791 | #endif |
d59c5346 | 3792 | |
402209ff JH |
3793 | /* While we're here, optimize this case. */ |
3794 | x = SUBREG_REG (x); | |
f8cfc6aa | 3795 | if (!REG_P (x)) |
402209ff JH |
3796 | goto retry; |
3797 | /* Fall through. */ | |
d59c5346 | 3798 | |
402209ff JH |
3799 | case REG: |
3800 | /* See a register other than being set => mark it as needed. */ | |
3801 | mark_used_reg (pbi, x, cond, insn); | |
3802 | return; | |
d59c5346 | 3803 | |
402209ff JH |
3804 | case SET: |
3805 | { | |
b3694847 | 3806 | rtx testreg = SET_DEST (x); |
402209ff | 3807 | int mark_dest = 0; |
d59c5346 | 3808 | |
402209ff JH |
3809 | /* If storing into MEM, don't show it as being used. But do |
3810 | show the address as being used. */ | |
3c0cb5de | 3811 | if (MEM_P (testreg)) |
402209ff JH |
3812 | { |
3813 | #ifdef AUTO_INC_DEC | |
3814 | if (flags & PROP_AUTOINC) | |
3815 | find_auto_inc (pbi, testreg, insn); | |
3816 | #endif | |
3817 | mark_used_regs (pbi, XEXP (testreg, 0), cond, insn); | |
3818 | mark_used_regs (pbi, SET_SRC (x), cond, insn); | |
3819 | return; | |
3820 | } | |
d59c5346 | 3821 | |
402209ff JH |
3822 | /* Storing in STRICT_LOW_PART is like storing in a reg |
3823 | in that this SET might be dead, so ignore it in TESTREG. | |
3824 | but in some other ways it is like using the reg. | |
d59c5346 | 3825 | |
402209ff JH |
3826 | Storing in a SUBREG or a bit field is like storing the entire |
3827 | register in that if the register's value is not used | |
3828 | then this SET is not needed. */ | |
3829 | while (GET_CODE (testreg) == STRICT_LOW_PART | |
3830 | || GET_CODE (testreg) == ZERO_EXTRACT | |
3831 | || GET_CODE (testreg) == SIGN_EXTRACT | |
3832 | || GET_CODE (testreg) == SUBREG) | |
3833 | { | |
cff9f8d5 | 3834 | #ifdef CANNOT_CHANGE_MODE_CLASS |
41bf2a8b RH |
3835 | if ((flags & PROP_REG_INFO) && GET_CODE (testreg) == SUBREG) |
3836 | record_subregs_of_mode (testreg); | |
402209ff | 3837 | #endif |
d59c5346 | 3838 | |
402209ff JH |
3839 | /* Modifying a single register in an alternate mode |
3840 | does not use any of the old value. But these other | |
3841 | ways of storing in a register do use the old value. */ | |
3842 | if (GET_CODE (testreg) == SUBREG | |
ec8e621d KG |
3843 | && !((REG_BYTES (SUBREG_REG (testreg)) |
3844 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD | |
3845 | > (REG_BYTES (testreg) | |
3846 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
402209ff JH |
3847 | ; |
3848 | else | |
3849 | mark_dest = 1; | |
d59c5346 | 3850 | |
402209ff JH |
3851 | testreg = XEXP (testreg, 0); |
3852 | } | |
d59c5346 | 3853 | |
402209ff JH |
3854 | /* If this is a store into a register or group of registers, |
3855 | recursively scan the value being stored. */ | |
d59c5346 | 3856 | |
402209ff JH |
3857 | if ((GET_CODE (testreg) == PARALLEL |
3858 | && GET_MODE (testreg) == BLKmode) | |
f8cfc6aa | 3859 | || (REG_P (testreg) |
402209ff JH |
3860 | && (regno = REGNO (testreg), |
3861 | ! (regno == FRAME_POINTER_REGNUM | |
3862 | && (! reload_completed || frame_pointer_needed))) | |
3863 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
3864 | && ! (regno == HARD_FRAME_POINTER_REGNUM | |
3865 | && (! reload_completed || frame_pointer_needed)) | |
3866 | #endif | |
3867 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
3868 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
3869 | #endif | |
3870 | )) | |
3871 | { | |
3872 | if (mark_dest) | |
3873 | mark_used_regs (pbi, SET_DEST (x), cond, insn); | |
3874 | mark_used_regs (pbi, SET_SRC (x), cond, insn); | |
3875 | return; | |
3876 | } | |
3877 | } | |
3878 | break; | |
c9bacfdb | 3879 | |
402209ff JH |
3880 | case ASM_OPERANDS: |
3881 | case UNSPEC_VOLATILE: | |
3882 | case TRAP_IF: | |
3883 | case ASM_INPUT: | |
3884 | { | |
3885 | /* Traditional and volatile asm instructions must be considered to use | |
3886 | and clobber all hard registers, all pseudo-registers and all of | |
3887 | memory. So must TRAP_IF and UNSPEC_VOLATILE operations. | |
4dc9341c | 3888 | |
402209ff JH |
3889 | Consider for instance a volatile asm that changes the fpu rounding |
3890 | mode. An insn should not be moved across this even if it only uses | |
3891 | pseudo-regs because it might give an incorrectly rounded result. | |
4dc9341c | 3892 | |
402209ff JH |
3893 | ?!? Unfortunately, marking all hard registers as live causes massive |
3894 | problems for the register allocator and marking all pseudos as live | |
3895 | creates mountains of uninitialized variable warnings. | |
4dc9341c | 3896 | |
402209ff JH |
3897 | So for now, just clear the memory set list and mark any regs |
3898 | we can find in ASM_OPERANDS as used. */ | |
3899 | if (code != ASM_OPERANDS || MEM_VOLATILE_P (x)) | |
3900 | { | |
3901 | free_EXPR_LIST_list (&pbi->mem_set_list); | |
3902 | pbi->mem_set_list_len = 0; | |
3903 | } | |
c9bacfdb | 3904 | |
402209ff JH |
3905 | /* For all ASM_OPERANDS, we must traverse the vector of input operands. |
3906 | We can not just fall through here since then we would be confused | |
3907 | by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate | |
3908 | traditional asms unlike their normal usage. */ | |
3909 | if (code == ASM_OPERANDS) | |
3910 | { | |
3911 | int j; | |
628f05b4 | 3912 | |
402209ff JH |
3913 | for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++) |
3914 | mark_used_regs (pbi, ASM_OPERANDS_INPUT (x, j), cond, insn); | |
3915 | } | |
3916 | break; | |
3917 | } | |
628f05b4 | 3918 | |
402209ff | 3919 | case COND_EXEC: |
0bccc606 | 3920 | gcc_assert (!cond); |
c9bacfdb | 3921 | |
402209ff | 3922 | mark_used_regs (pbi, COND_EXEC_TEST (x), NULL_RTX, insn); |
c9bacfdb | 3923 | |
402209ff JH |
3924 | cond = COND_EXEC_TEST (x); |
3925 | x = COND_EXEC_CODE (x); | |
3926 | goto retry; | |
628f05b4 | 3927 | |
402209ff JH |
3928 | default: |
3929 | break; | |
4dc9341c | 3930 | } |
628f05b4 | 3931 | |
402209ff | 3932 | /* Recursively scan the operands of this expression. */ |
4dc9341c | 3933 | |
402209ff | 3934 | { |
b3694847 SS |
3935 | const char * const fmt = GET_RTX_FORMAT (code); |
3936 | int i; | |
4dc9341c | 3937 | |
402209ff JH |
3938 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
3939 | { | |
3940 | if (fmt[i] == 'e') | |
3941 | { | |
3942 | /* Tail recursive case: save a function call level. */ | |
3943 | if (i == 0) | |
3944 | { | |
3945 | x = XEXP (x, 0); | |
3946 | goto retry; | |
3947 | } | |
3948 | mark_used_regs (pbi, XEXP (x, i), cond, insn); | |
3949 | } | |
3950 | else if (fmt[i] == 'E') | |
3951 | { | |
b3694847 | 3952 | int j; |
402209ff JH |
3953 | for (j = 0; j < XVECLEN (x, i); j++) |
3954 | mark_used_regs (pbi, XVECEXP (x, i, j), cond, insn); | |
3955 | } | |
3956 | } | |
3957 | } | |
4dc9341c | 3958 | } |
402209ff JH |
3959 | \f |
3960 | #ifdef AUTO_INC_DEC | |
4dc9341c | 3961 | |
402209ff | 3962 | static int |
6cf9ac28 | 3963 | try_pre_increment_1 (struct propagate_block_info *pbi, rtx insn) |
402209ff JH |
3964 | { |
3965 | /* Find the next use of this reg. If in same basic block, | |
3966 | make it do pre-increment or pre-decrement if appropriate. */ | |
3967 | rtx x = single_set (insn); | |
3968 | HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1) | |
3969 | * INTVAL (XEXP (SET_SRC (x), 1))); | |
3970 | int regno = REGNO (SET_DEST (x)); | |
3971 | rtx y = pbi->reg_next_use[regno]; | |
3972 | if (y != 0 | |
3973 | && SET_DEST (x) != stack_pointer_rtx | |
3974 | && BLOCK_NUM (y) == BLOCK_NUM (insn) | |
3975 | /* Don't do this if the reg dies, or gets set in y; a standard addressing | |
3976 | mode would be better. */ | |
3977 | && ! dead_or_set_p (y, SET_DEST (x)) | |
3978 | && try_pre_increment (y, SET_DEST (x), amount)) | |
3979 | { | |
3980 | /* We have found a suitable auto-increment and already changed | |
3981 | insn Y to do it. So flush this increment instruction. */ | |
3dec4024 | 3982 | propagate_block_delete_insn (insn); |
b53978a3 | 3983 | |
402209ff JH |
3984 | /* Count a reference to this reg for the increment insn we are |
3985 | deleting. When a reg is incremented, spilling it is worse, | |
3986 | so we want to make that less likely. */ | |
3987 | if (regno >= FIRST_PSEUDO_REGISTER) | |
3988 | { | |
3989 | REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb); | |
3990 | REG_N_SETS (regno)++; | |
3991 | } | |
b53978a3 | 3992 | |
402209ff JH |
3993 | /* Flush any remembered memories depending on the value of |
3994 | the incremented register. */ | |
3995 | invalidate_mems_from_set (pbi, SET_DEST (x)); | |
b53978a3 | 3996 | |
402209ff JH |
3997 | return 1; |
3998 | } | |
3999 | return 0; | |
4000 | } | |
b53978a3 | 4001 | |
402209ff JH |
4002 | /* Try to change INSN so that it does pre-increment or pre-decrement |
4003 | addressing on register REG in order to add AMOUNT to REG. | |
4004 | AMOUNT is negative for pre-decrement. | |
4005 | Returns 1 if the change could be made. | |
4006 | This checks all about the validity of the result of modifying INSN. */ | |
b53978a3 | 4007 | |
402209ff | 4008 | static int |
6cf9ac28 | 4009 | try_pre_increment (rtx insn, rtx reg, HOST_WIDE_INT amount) |
b53978a3 | 4010 | { |
b3694847 | 4011 | rtx use; |
b53978a3 | 4012 | |
402209ff JH |
4013 | /* Nonzero if we can try to make a pre-increment or pre-decrement. |
4014 | For example, addl $4,r1; movl (r1),... can become movl +(r1),... */ | |
4015 | int pre_ok = 0; | |
4016 | /* Nonzero if we can try to make a post-increment or post-decrement. | |
4017 | For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,... | |
4018 | It is possible for both PRE_OK and POST_OK to be nonzero if the machine | |
4019 | supports both pre-inc and post-inc, or both pre-dec and post-dec. */ | |
4020 | int post_ok = 0; | |
b53978a3 | 4021 | |
402209ff JH |
4022 | /* Nonzero if the opportunity actually requires post-inc or post-dec. */ |
4023 | int do_post = 0; | |
b53978a3 | 4024 | |
402209ff JH |
4025 | /* From the sign of increment, see which possibilities are conceivable |
4026 | on this target machine. */ | |
4027 | if (HAVE_PRE_INCREMENT && amount > 0) | |
4028 | pre_ok = 1; | |
4029 | if (HAVE_POST_INCREMENT && amount > 0) | |
4030 | post_ok = 1; | |
b53978a3 | 4031 | |
402209ff JH |
4032 | if (HAVE_PRE_DECREMENT && amount < 0) |
4033 | pre_ok = 1; | |
4034 | if (HAVE_POST_DECREMENT && amount < 0) | |
4035 | post_ok = 1; | |
b53978a3 | 4036 | |
402209ff JH |
4037 | if (! (pre_ok || post_ok)) |
4038 | return 0; | |
b53978a3 | 4039 | |
402209ff JH |
4040 | /* It is not safe to add a side effect to a jump insn |
4041 | because if the incremented register is spilled and must be reloaded | |
4042 | there would be no way to store the incremented value back in memory. */ | |
c9bacfdb | 4043 | |
4b4bf941 | 4044 | if (JUMP_P (insn)) |
402209ff | 4045 | return 0; |
b53978a3 | 4046 | |
402209ff JH |
4047 | use = 0; |
4048 | if (pre_ok) | |
4049 | use = find_use_as_address (PATTERN (insn), reg, 0); | |
60e8b9f0 | 4050 | if (post_ok && (use == 0 || use == (rtx) (size_t) 1)) |
b53978a3 | 4051 | { |
402209ff JH |
4052 | use = find_use_as_address (PATTERN (insn), reg, -amount); |
4053 | do_post = 1; | |
b53978a3 JO |
4054 | } |
4055 | ||
60e8b9f0 | 4056 | if (use == 0 || use == (rtx) (size_t) 1) |
402209ff JH |
4057 | return 0; |
4058 | ||
4059 | if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount)) | |
4060 | return 0; | |
b53978a3 | 4061 | |
402209ff JH |
4062 | /* See if this combination of instruction and addressing mode exists. */ |
4063 | if (! validate_change (insn, &XEXP (use, 0), | |
4064 | gen_rtx_fmt_e (amount > 0 | |
4065 | ? (do_post ? POST_INC : PRE_INC) | |
4066 | : (do_post ? POST_DEC : PRE_DEC), | |
4067 | Pmode, reg), 0)) | |
4068 | return 0; | |
b53978a3 | 4069 | |
402209ff JH |
4070 | /* Record that this insn now has an implicit side effect on X. */ |
4071 | REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, reg, REG_NOTES (insn)); | |
4072 | return 1; | |
b53978a3 JO |
4073 | } |
4074 | ||
402209ff JH |
4075 | #endif /* AUTO_INC_DEC */ |
4076 | \f | |
4077 | /* Find the place in the rtx X where REG is used as a memory address. | |
4078 | Return the MEM rtx that so uses it. | |
4079 | If PLUSCONST is nonzero, search instead for a memory address equivalent to | |
4080 | (plus REG (const_int PLUSCONST)). | |
5d6a16e2 | 4081 | |
402209ff JH |
4082 | If such an address does not appear, return 0. |
4083 | If REG appears more than once, or is used other than in such an address, | |
60e8b9f0 | 4084 | return (rtx) 1. */ |
5d6a16e2 | 4085 | |
402209ff | 4086 | rtx |
6cf9ac28 | 4087 | find_use_as_address (rtx x, rtx reg, HOST_WIDE_INT plusconst) |
5d6a16e2 | 4088 | { |
402209ff JH |
4089 | enum rtx_code code = GET_CODE (x); |
4090 | const char * const fmt = GET_RTX_FORMAT (code); | |
b3694847 SS |
4091 | int i; |
4092 | rtx value = 0; | |
4093 | rtx tem; | |
4a7da9b5 | 4094 | |
402209ff JH |
4095 | if (code == MEM && XEXP (x, 0) == reg && plusconst == 0) |
4096 | return x; | |
5d6a16e2 | 4097 | |
402209ff JH |
4098 | if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS |
4099 | && XEXP (XEXP (x, 0), 0) == reg | |
4100 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
4101 | && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) | |
4102 | return x; | |
ef120fc0 | 4103 | |
402209ff | 4104 | if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) |
5d6a16e2 | 4105 | { |
402209ff JH |
4106 | /* If REG occurs inside a MEM used in a bit-field reference, |
4107 | that is unacceptable. */ | |
4108 | if (find_use_as_address (XEXP (x, 0), reg, 0) != 0) | |
60e8b9f0 | 4109 | return (rtx) (size_t) 1; |
5d6a16e2 | 4110 | } |
5d6a16e2 | 4111 | |
402209ff | 4112 | if (x == reg) |
60e8b9f0 | 4113 | return (rtx) (size_t) 1; |
4dc9341c | 4114 | |
402209ff | 4115 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
4dc9341c | 4116 | { |
402209ff JH |
4117 | if (fmt[i] == 'e') |
4118 | { | |
4119 | tem = find_use_as_address (XEXP (x, i), reg, plusconst); | |
4120 | if (value == 0) | |
4121 | value = tem; | |
4122 | else if (tem != 0) | |
60e8b9f0 | 4123 | return (rtx) (size_t) 1; |
402209ff JH |
4124 | } |
4125 | else if (fmt[i] == 'E') | |
4dc9341c | 4126 | { |
b3694847 | 4127 | int j; |
402209ff | 4128 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
4dc9341c | 4129 | { |
402209ff JH |
4130 | tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst); |
4131 | if (value == 0) | |
4132 | value = tem; | |
4133 | else if (tem != 0) | |
60e8b9f0 | 4134 | return (rtx) (size_t) 1; |
4dc9341c MH |
4135 | } |
4136 | } | |
4137 | } | |
4dc9341c | 4138 | |
402209ff JH |
4139 | return value; |
4140 | } | |
4141 | \f | |
4142 | /* Write information about registers and basic blocks into FILE. | |
4143 | This is part of making a debugging dump. */ | |
c9bacfdb | 4144 | |
402209ff | 4145 | void |
6cf9ac28 | 4146 | dump_regset (regset r, FILE *outf) |
4dc9341c | 4147 | { |
402209ff | 4148 | int i; |
a2041967 KH |
4149 | reg_set_iterator rsi; |
4150 | ||
402209ff | 4151 | if (r == NULL) |
3abd3239 | 4152 | { |
402209ff | 4153 | fputs (" (nil)", outf); |
3abd3239 MH |
4154 | return; |
4155 | } | |
4dc9341c | 4156 | |
a2041967 | 4157 | EXECUTE_IF_SET_IN_REG_SET (r, 0, i, rsi) |
4dc9341c | 4158 | { |
402209ff JH |
4159 | fprintf (outf, " %d", i); |
4160 | if (i < FIRST_PSEUDO_REGISTER) | |
4161 | fprintf (outf, " [%s]", | |
4162 | reg_names[i]); | |
a2041967 | 4163 | } |
4dc9341c MH |
4164 | } |
4165 | ||
fbe5a4a6 | 4166 | /* Print a human-readable representation of R on the standard error |
402209ff JH |
4167 | stream. This function is designed to be used from within the |
4168 | debugger. */ | |
c9bacfdb | 4169 | |
402209ff | 4170 | void |
6cf9ac28 | 4171 | debug_regset (regset r) |
4dc9341c | 4172 | { |
402209ff JH |
4173 | dump_regset (r, stderr); |
4174 | putc ('\n', stderr); | |
4dc9341c MH |
4175 | } |
4176 | ||
402209ff JH |
4177 | /* Recompute register set/reference counts immediately prior to register |
4178 | allocation. | |
5d6a16e2 | 4179 | |
402209ff JH |
4180 | This avoids problems with set/reference counts changing to/from values |
4181 | which have special meanings to the register allocators. | |
eab02feb | 4182 | |
402209ff JH |
4183 | Additionally, the reference counts are the primary component used by the |
4184 | register allocators to prioritize pseudos for allocation to hard regs. | |
4185 | More accurate reference counts generally lead to better register allocation. | |
eab02feb | 4186 | |
402209ff | 4187 | F is the first insn to be scanned. |
eab02feb | 4188 | |
402209ff JH |
4189 | LOOP_STEP denotes how much loop_depth should be incremented per |
4190 | loop nesting level in order to increase the ref count more for | |
4191 | references in a loop. | |
b9f22704 | 4192 | |
402209ff JH |
4193 | It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and |
4194 | possibly other information which is used by the register allocators. */ | |
eab02feb | 4195 | |
402209ff | 4196 | void |
6cf9ac28 | 4197 | recompute_reg_usage (rtx f ATTRIBUTE_UNUSED, int loop_step ATTRIBUTE_UNUSED) |
402209ff JH |
4198 | { |
4199 | allocate_reg_life_data (); | |
58565a33 SKG |
4200 | /* distribute_notes in combiner fails to convert some of the REG_UNUSED notes |
4201 | to REG_DEAD notes. This causes CHECK_DEAD_NOTES in sched1 to abort. To | |
4202 | solve this update the DEATH_NOTES here. */ | |
4203 | update_life_info (NULL, UPDATE_LIFE_LOCAL, PROP_REG_INFO | PROP_DEATH_NOTES); | |
eab02feb MH |
4204 | } |
4205 | ||
402209ff JH |
4206 | /* Optionally removes all the REG_DEAD and REG_UNUSED notes from a set of |
4207 | blocks. If BLOCKS is NULL, assume the universal set. Returns a count | |
4208 | of the number of registers that died. */ | |
d4b60170 | 4209 | |
c9bacfdb | 4210 | int |
6cf9ac28 | 4211 | count_or_remove_death_notes (sbitmap blocks, int kill) |
4dc9341c | 4212 | { |
e0082a72 | 4213 | int count = 0; |
095c3bbd | 4214 | int i; |
e0082a72 | 4215 | basic_block bb; |
ce4bbac7 | 4216 | |
095c3bbd JL |
4217 | /* This used to be a loop over all the blocks with a membership test |
4218 | inside the loop. That can be amazingly expensive on a large CFG | |
4219 | when only a small number of bits are set in BLOCKs (for example, | |
4220 | the calls from the scheduler typically have very few bits set). | |
4221 | ||
4222 | For extra credit, someone should convert BLOCKS to a bitmap rather | |
4223 | than an sbitmap. */ | |
4224 | if (blocks) | |
4225 | { | |
4226 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, | |
4227 | { | |
4228 | count += count_or_remove_death_notes_bb (BASIC_BLOCK (i), kill); | |
4229 | }); | |
4230 | } | |
4231 | else | |
4dc9341c | 4232 | { |
095c3bbd JL |
4233 | FOR_EACH_BB (bb) |
4234 | { | |
4235 | count += count_or_remove_death_notes_bb (bb, kill); | |
4236 | } | |
4237 | } | |
5d6a16e2 | 4238 | |
095c3bbd JL |
4239 | return count; |
4240 | } | |
4241 | ||
4242 | /* Optionally removes all the REG_DEAD and REG_UNUSED notes from basic | |
4243 | block BB. Returns a count of the number of registers that died. */ | |
5d6a16e2 | 4244 | |
095c3bbd JL |
4245 | static int |
4246 | count_or_remove_death_notes_bb (basic_block bb, int kill) | |
4247 | { | |
4248 | int count = 0; | |
4249 | rtx insn; | |
4250 | ||
a813c111 | 4251 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
095c3bbd JL |
4252 | { |
4253 | if (INSN_P (insn)) | |
4dc9341c | 4254 | { |
095c3bbd JL |
4255 | rtx *pprev = ®_NOTES (insn); |
4256 | rtx link = *pprev; | |
402209ff | 4257 | |
095c3bbd JL |
4258 | while (link) |
4259 | { | |
4260 | switch (REG_NOTE_KIND (link)) | |
4dc9341c | 4261 | { |
095c3bbd | 4262 | case REG_DEAD: |
f8cfc6aa | 4263 | if (REG_P (XEXP (link, 0))) |
095c3bbd JL |
4264 | { |
4265 | rtx reg = XEXP (link, 0); | |
4266 | int n; | |
4267 | ||
4268 | if (REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
4269 | n = 1; | |
4270 | else | |
66fd46b6 | 4271 | n = hard_regno_nregs[REGNO (reg)][GET_MODE (reg)]; |
095c3bbd JL |
4272 | count += n; |
4273 | } | |
4274 | ||
4275 | /* Fall through. */ | |
4276 | ||
4277 | case REG_UNUSED: | |
4278 | if (kill) | |
402209ff | 4279 | { |
095c3bbd JL |
4280 | rtx next = XEXP (link, 1); |
4281 | free_EXPR_LIST_node (link); | |
4282 | *pprev = link = next; | |
402209ff JH |
4283 | break; |
4284 | } | |
095c3bbd JL |
4285 | /* Fall through. */ |
4286 | ||
4287 | default: | |
4288 | pprev = &XEXP (link, 1); | |
4289 | link = *pprev; | |
4290 | break; | |
4dc9341c MH |
4291 | } |
4292 | } | |
5d6a16e2 | 4293 | } |
095c3bbd | 4294 | |
a813c111 | 4295 | if (insn == BB_END (bb)) |
095c3bbd | 4296 | break; |
5a660bff | 4297 | } |
4dc9341c | 4298 | |
402209ff | 4299 | return count; |
4dc9341c | 4300 | } |
095c3bbd | 4301 | |
b932f770 JH |
4302 | /* Clear LOG_LINKS fields of insns in a selected blocks or whole chain |
4303 | if blocks is NULL. */ | |
efc9bd41 | 4304 | |
b932f770 | 4305 | static void |
6cf9ac28 | 4306 | clear_log_links (sbitmap blocks) |
d9d4fb43 | 4307 | { |
b932f770 JH |
4308 | rtx insn; |
4309 | int i; | |
1868b439 | 4310 | |
b932f770 | 4311 | if (!blocks) |
1868b439 | 4312 | { |
b932f770 JH |
4313 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) |
4314 | if (INSN_P (insn)) | |
e9cf0934 | 4315 | free_INSN_LIST_list (&LOG_LINKS (insn)); |
1868b439 | 4316 | } |
b932f770 JH |
4317 | else |
4318 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, | |
4319 | { | |
4320 | basic_block bb = BASIC_BLOCK (i); | |
16e99e29 | 4321 | |
a813c111 | 4322 | for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb)); |
b932f770 JH |
4323 | insn = NEXT_INSN (insn)) |
4324 | if (INSN_P (insn)) | |
e9cf0934 | 4325 | free_INSN_LIST_list (&LOG_LINKS (insn)); |
b932f770 | 4326 | }); |
d9d4fb43 | 4327 | } |
efc9bd41 RK |
4328 | |
4329 | /* Given a register bitmap, turn on the bits in a HARD_REG_SET that | |
4330 | correspond to the hard registers, if any, set in that map. This | |
4331 | could be done far more efficiently by having all sorts of special-cases | |
4332 | with moving single words, but probably isn't worth the trouble. */ | |
4333 | ||
4334 | void | |
6cf9ac28 | 4335 | reg_set_to_hard_reg_set (HARD_REG_SET *to, bitmap from) |
efc9bd41 RK |
4336 | { |
4337 | int i; | |
87c476a2 | 4338 | bitmap_iterator bi; |
efc9bd41 | 4339 | |
87c476a2 ZD |
4340 | EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi) |
4341 | { | |
4342 | if (i >= FIRST_PSEUDO_REGISTER) | |
4343 | return; | |
4344 | SET_HARD_REG_BIT (*to, i); | |
4345 | } | |
efc9bd41 | 4346 | } |