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d7429b6a | 1 | /* Data flow analysis for GNU compiler. |
c9bacfdb | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
baaa1222 | 3 | 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
d7429b6a | 4 | |
1322177d | 5 | This file is part of GCC. |
d7429b6a | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
d7429b6a | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
d7429b6a RK |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
d7429b6a | 21 | |
e881bb1b RH |
22 | /* This file contains the data flow analysis pass of the compiler. It |
23 | computes data flow information which tells combine_instructions | |
24 | which insns to consider combining and controls register allocation. | |
d7429b6a | 25 | |
e881bb1b RH |
26 | Additional data flow information that is too bulky to record is |
27 | generated during the analysis, and is used at that time to create | |
28 | autoincrement and autodecrement addressing. | |
d7429b6a RK |
29 | |
30 | The first step is dividing the function into basic blocks. | |
31 | find_basic_blocks does this. Then life_analysis determines | |
32 | where each register is live and where it is dead. | |
33 | ||
34 | ** find_basic_blocks ** | |
35 | ||
e881bb1b RH |
36 | find_basic_blocks divides the current function's rtl into basic |
37 | blocks and constructs the CFG. The blocks are recorded in the | |
38 | basic_block_info array; the CFG exists in the edge structures | |
39 | referenced by the blocks. | |
d7429b6a | 40 | |
e881bb1b | 41 | find_basic_blocks also finds any unreachable loops and deletes them. |
d7429b6a RK |
42 | |
43 | ** life_analysis ** | |
44 | ||
45 | life_analysis is called immediately after find_basic_blocks. | |
46 | It uses the basic block information to determine where each | |
47 | hard or pseudo register is live. | |
48 | ||
49 | ** live-register info ** | |
50 | ||
51 | The information about where each register is live is in two parts: | |
e881bb1b | 52 | the REG_NOTES of insns, and the vector basic_block->global_live_at_start. |
d7429b6a | 53 | |
e881bb1b RH |
54 | basic_block->global_live_at_start has an element for each basic |
55 | block, and the element is a bit-vector with a bit for each hard or | |
56 | pseudo register. The bit is 1 if the register is live at the | |
57 | beginning of the basic block. | |
d7429b6a | 58 | |
c9bacfdb | 59 | Two types of elements can be added to an insn's REG_NOTES. |
d7429b6a RK |
60 | A REG_DEAD note is added to an insn's REG_NOTES for any register |
61 | that meets both of two conditions: The value in the register is not | |
62 | needed in subsequent insns and the insn does not replace the value in | |
63 | the register (in the case of multi-word hard registers, the value in | |
64 | each register must be replaced by the insn to avoid a REG_DEAD note). | |
65 | ||
66 | In the vast majority of cases, an object in a REG_DEAD note will be | |
67 | used somewhere in the insn. The (rare) exception to this is if an | |
68 | insn uses a multi-word hard register and only some of the registers are | |
69 | needed in subsequent insns. In that case, REG_DEAD notes will be | |
70 | provided for those hard registers that are not subsequently needed. | |
71 | Partial REG_DEAD notes of this type do not occur when an insn sets | |
72 | only some of the hard registers used in such a multi-word operand; | |
73 | omitting REG_DEAD notes for objects stored in an insn is optional and | |
74 | the desire to do so does not justify the complexity of the partial | |
75 | REG_DEAD notes. | |
76 | ||
77 | REG_UNUSED notes are added for each register that is set by the insn | |
78 | but is unused subsequently (if every register set by the insn is unused | |
79 | and the insn does not reference memory or have some other side-effect, | |
80 | the insn is deleted instead). If only part of a multi-word hard | |
81 | register is used in a subsequent insn, REG_UNUSED notes are made for | |
82 | the parts that will not be used. | |
83 | ||
84 | To determine which registers are live after any insn, one can | |
85 | start from the beginning of the basic block and scan insns, noting | |
86 | which registers are set by each insn and which die there. | |
87 | ||
88 | ** Other actions of life_analysis ** | |
89 | ||
90 | life_analysis sets up the LOG_LINKS fields of insns because the | |
91 | information needed to do so is readily available. | |
92 | ||
93 | life_analysis deletes insns whose only effect is to store a value | |
94 | that is never used. | |
95 | ||
96 | life_analysis notices cases where a reference to a register as | |
97 | a memory address can be combined with a preceding or following | |
98 | incrementation or decrementation of the register. The separate | |
99 | instruction to increment or decrement is deleted and the address | |
100 | is changed to a POST_INC or similar rtx. | |
101 | ||
102 | Each time an incrementing or decrementing address is created, | |
103 | a REG_INC element is added to the insn's REG_NOTES list. | |
104 | ||
105 | life_analysis fills in certain vectors containing information about | |
d4b60170 RK |
106 | register usage: REG_N_REFS, REG_N_DEATHS, REG_N_SETS, REG_LIVE_LENGTH, |
107 | REG_N_CALLS_CROSSED and REG_BASIC_BLOCK. | |
fdb8a883 JW |
108 | |
109 | life_analysis sets current_function_sp_is_unchanging if the function | |
110 | doesn't modify the stack pointer. */ | |
e881bb1b | 111 | |
c9bacfdb | 112 | /* TODO: |
e881bb1b RH |
113 | |
114 | Split out from life_analysis: | |
115 | - local property discovery (bb->local_live, bb->local_set) | |
116 | - global property computation | |
117 | - log links creation | |
118 | - pre/post modify transformation | |
119 | */ | |
d7429b6a | 120 | \f |
d7429b6a | 121 | #include "config.h" |
670ee920 | 122 | #include "system.h" |
4977bab6 ZW |
123 | #include "coretypes.h" |
124 | #include "tm.h" | |
d3a923ee | 125 | #include "tree.h" |
d7429b6a | 126 | #include "rtl.h" |
6baf1cc8 | 127 | #include "tm_p.h" |
efc9bd41 | 128 | #include "hard-reg-set.h" |
d7429b6a RK |
129 | #include "basic-block.h" |
130 | #include "insn-config.h" | |
131 | #include "regs.h" | |
d7429b6a RK |
132 | #include "flags.h" |
133 | #include "output.h" | |
b384405b | 134 | #include "function.h" |
3d195391 | 135 | #include "except.h" |
2e107e9e | 136 | #include "toplev.h" |
79c9824e | 137 | #include "recog.h" |
11bdd2ae | 138 | #include "expr.h" |
b53978a3 | 139 | #include "ssa.h" |
4793dca1 | 140 | #include "timevar.h" |
d7429b6a RK |
141 | |
142 | #include "obstack.h" | |
11ae508b | 143 | #include "splay-tree.h" |
c5c76735 | 144 | |
e881bb1b RH |
145 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
146 | the stack pointer does not matter. The value is tested only in | |
147 | functions that have frame pointers. | |
148 | No definition is equivalent to always zero. */ | |
149 | #ifndef EXIT_IGNORE_STACK | |
150 | #define EXIT_IGNORE_STACK 0 | |
151 | #endif | |
152 | ||
d3a923ee RH |
153 | #ifndef HAVE_epilogue |
154 | #define HAVE_epilogue 0 | |
155 | #endif | |
d3a923ee RH |
156 | #ifndef HAVE_prologue |
157 | #define HAVE_prologue 0 | |
158 | #endif | |
0a1c58a2 JL |
159 | #ifndef HAVE_sibcall_epilogue |
160 | #define HAVE_sibcall_epilogue 0 | |
161 | #endif | |
d3a923ee | 162 | |
2a3e384f RH |
163 | #ifndef LOCAL_REGNO |
164 | #define LOCAL_REGNO(REGNO) 0 | |
165 | #endif | |
166 | #ifndef EPILOGUE_USES | |
167 | #define EPILOGUE_USES(REGNO) 0 | |
168 | #endif | |
15b5aef3 RH |
169 | #ifndef EH_USES |
170 | #define EH_USES(REGNO) 0 | |
171 | #endif | |
2a3e384f | 172 | |
7e6d8ba1 AH |
173 | #ifdef HAVE_conditional_execution |
174 | #ifndef REVERSE_CONDEXEC_PREDICATES_P | |
175 | #define REVERSE_CONDEXEC_PREDICATES_P(x, y) ((x) == reverse_condition (y)) | |
176 | #endif | |
177 | #endif | |
178 | ||
56744d1a JL |
179 | /* Nonzero if the second flow pass has completed. */ |
180 | int flow2_completed; | |
181 | ||
d7429b6a RK |
182 | /* Maximum register number used in this function, plus one. */ |
183 | ||
184 | int max_regno; | |
185 | ||
b1f21e0a | 186 | /* Indexed by n, giving various register information */ |
d7429b6a | 187 | |
6feacd09 | 188 | varray_type reg_n_info; |
d7429b6a | 189 | |
d7429b6a RK |
190 | /* Size of a regset for the current function, |
191 | in (1) bytes and (2) elements. */ | |
192 | ||
193 | int regset_bytes; | |
194 | int regset_size; | |
195 | ||
d7429b6a | 196 | /* Regset of regs live when calls to `setjmp'-like functions happen. */ |
e881bb1b | 197 | /* ??? Does this exist only for the setjmp-clobbered warning message? */ |
d7429b6a RK |
198 | |
199 | regset regs_live_at_setjmp; | |
200 | ||
201 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers | |
202 | that have to go in the same hard reg. | |
203 | The first two regs in the list are a pair, and the next two | |
204 | are another pair, etc. */ | |
205 | rtx regs_may_share; | |
206 | ||
21c7361e AJ |
207 | /* Callback that determines if it's ok for a function to have no |
208 | noreturn attribute. */ | |
6cf9ac28 | 209 | int (*lang_missing_noreturn_ok_p) (tree); |
21c7361e | 210 | |
d7429b6a RK |
211 | /* Set of registers that may be eliminable. These are handled specially |
212 | in updating regs_ever_live. */ | |
213 | ||
214 | static HARD_REG_SET elim_reg_set; | |
215 | ||
11ae508b RH |
216 | /* Holds information for tracking conditional register life information. */ |
217 | struct reg_cond_life_info | |
218 | { | |
685af3af | 219 | /* A boolean expression of conditions under which a register is dead. */ |
11ae508b | 220 | rtx condition; |
685af3af JW |
221 | /* Conditions under which a register is dead at the basic block end. */ |
222 | rtx orig_condition; | |
223 | ||
224 | /* A boolean expression of conditions under which a register has been | |
225 | stored into. */ | |
226 | rtx stores; | |
11ae508b RH |
227 | |
228 | /* ??? Could store mask of bytes that are dead, so that we could finally | |
229 | track lifetimes of multi-word registers accessed via subregs. */ | |
230 | }; | |
231 | ||
62828c00 RH |
232 | /* For use in communicating between propagate_block and its subroutines. |
233 | Holds all information needed to compute life and def-use information. */ | |
234 | ||
235 | struct propagate_block_info | |
236 | { | |
237 | /* The basic block we're considering. */ | |
238 | basic_block bb; | |
239 | ||
240 | /* Bit N is set if register N is conditionally or unconditionally live. */ | |
241 | regset reg_live; | |
242 | ||
9785c68d RH |
243 | /* Bit N is set if register N is set this insn. */ |
244 | regset new_set; | |
8e3f9094 | 245 | |
62828c00 RH |
246 | /* Element N is the next insn that uses (hard or pseudo) register N |
247 | within the current basic block; or zero, if there is no such insn. */ | |
248 | rtx *reg_next_use; | |
249 | ||
250 | /* Contains a list of all the MEMs we are tracking for dead store | |
251 | elimination. */ | |
252 | rtx mem_set_list; | |
253 | ||
7dfc0fbe BS |
254 | /* If non-null, record the set of registers set unconditionally in the |
255 | basic block. */ | |
62828c00 RH |
256 | regset local_set; |
257 | ||
7dfc0fbe BS |
258 | /* If non-null, record the set of registers set conditionally in the |
259 | basic block. */ | |
260 | regset cond_local_set; | |
261 | ||
11ae508b RH |
262 | #ifdef HAVE_conditional_execution |
263 | /* Indexed by register number, holds a reg_cond_life_info for each | |
264 | register that is not unconditionally live or dead. */ | |
265 | splay_tree reg_cond_dead; | |
266 | ||
267 | /* Bit N is set if register N is in an expression in reg_cond_dead. */ | |
268 | regset reg_cond_reg; | |
269 | #endif | |
270 | ||
0875baa0 RH |
271 | /* The length of mem_set_list. */ |
272 | int mem_set_list_len; | |
273 | ||
cc2902df | 274 | /* Nonzero if the value of CC0 is live. */ |
62828c00 RH |
275 | int cc0_live; |
276 | ||
fbe5a4a6 | 277 | /* Flags controlling the set of information propagate_block collects. */ |
62828c00 RH |
278 | int flags; |
279 | }; | |
280 | ||
3dec4024 JH |
281 | /* Number of dead insns removed. */ |
282 | static int ndead; | |
283 | ||
0875baa0 RH |
284 | /* Maximum length of pbi->mem_set_list before we start dropping |
285 | new elements on the floor. */ | |
286 | #define MAX_MEM_SET_LIST_LEN 100 | |
287 | ||
d7429b6a | 288 | /* Forward declarations */ |
6cf9ac28 AJ |
289 | static int verify_wide_reg_1 (rtx *, void *); |
290 | static void verify_wide_reg (int, basic_block); | |
291 | static void verify_local_live_at_start (regset, basic_block); | |
292 | static void notice_stack_pointer_modification_1 (rtx, rtx, void *); | |
293 | static void notice_stack_pointer_modification (rtx); | |
294 | static void mark_reg (rtx, void *); | |
295 | static void mark_regs_live_at_end (regset); | |
296 | static int set_phi_alternative_reg (rtx, int, int, void *); | |
297 | static void calculate_global_regs_live (sbitmap, sbitmap, int); | |
298 | static void propagate_block_delete_insn (rtx); | |
299 | static rtx propagate_block_delete_libcall (rtx, rtx); | |
300 | static int insn_dead_p (struct propagate_block_info *, rtx, int, rtx); | |
301 | static int libcall_dead_p (struct propagate_block_info *, rtx, rtx); | |
302 | static void mark_set_regs (struct propagate_block_info *, rtx, rtx); | |
303 | static void mark_set_1 (struct propagate_block_info *, enum rtx_code, rtx, | |
304 | rtx, rtx, int); | |
305 | static int find_regno_partial (rtx *, void *); | |
0626ef8a | 306 | |
11ae508b | 307 | #ifdef HAVE_conditional_execution |
6cf9ac28 AJ |
308 | static int mark_regno_cond_dead (struct propagate_block_info *, int, rtx); |
309 | static void free_reg_cond_life_info (splay_tree_value); | |
310 | static int flush_reg_cond_reg_1 (splay_tree_node, void *); | |
311 | static void flush_reg_cond_reg (struct propagate_block_info *, int); | |
312 | static rtx elim_reg_cond (rtx, unsigned int); | |
313 | static rtx ior_reg_cond (rtx, rtx, int); | |
314 | static rtx not_reg_cond (rtx); | |
315 | static rtx and_reg_cond (rtx, rtx, int); | |
11ae508b | 316 | #endif |
1d300e19 | 317 | #ifdef AUTO_INC_DEC |
6cf9ac28 AJ |
318 | static void attempt_auto_inc (struct propagate_block_info *, rtx, rtx, rtx, |
319 | rtx, rtx); | |
320 | static void find_auto_inc (struct propagate_block_info *, rtx, rtx); | |
321 | static int try_pre_increment_1 (struct propagate_block_info *, rtx); | |
322 | static int try_pre_increment (rtx, rtx, HOST_WIDE_INT); | |
1d300e19 | 323 | #endif |
6cf9ac28 AJ |
324 | static void mark_used_reg (struct propagate_block_info *, rtx, rtx, rtx); |
325 | static void mark_used_regs (struct propagate_block_info *, rtx, rtx, rtx); | |
326 | void debug_flow_info (void); | |
327 | static void add_to_mem_set_list (struct propagate_block_info *, rtx); | |
328 | static int invalidate_mems_from_autoinc (rtx *, void *); | |
329 | static void invalidate_mems_from_set (struct propagate_block_info *, rtx); | |
330 | static void clear_log_links (sbitmap); | |
d7429b6a | 331 | \f |
5ece9746 | 332 | |
b313a0fe | 333 | void |
6cf9ac28 | 334 | check_function_return_warnings (void) |
b313a0fe RH |
335 | { |
336 | if (warn_missing_noreturn | |
337 | && !TREE_THIS_VOLATILE (cfun->decl) | |
21c7361e AJ |
338 | && EXIT_BLOCK_PTR->pred == NULL |
339 | && (lang_missing_noreturn_ok_p | |
340 | && !lang_missing_noreturn_ok_p (cfun->decl))) | |
b313a0fe RH |
341 | warning ("function might be possible candidate for attribute `noreturn'"); |
342 | ||
343 | /* If we have a path to EXIT, then we do return. */ | |
344 | if (TREE_THIS_VOLATILE (cfun->decl) | |
345 | && EXIT_BLOCK_PTR->pred != NULL) | |
346 | warning ("`noreturn' function does return"); | |
347 | ||
348 | /* If the clobber_return_insn appears in some basic block, then we | |
349 | do reach the end without returning a value. */ | |
350 | else if (warn_return_type | |
351 | && cfun->x_clobber_return_insn != NULL | |
352 | && EXIT_BLOCK_PTR->pred != NULL) | |
353 | { | |
354 | int max_uid = get_max_uid (); | |
355 | ||
356 | /* If clobber_return_insn was excised by jump1, then renumber_insns | |
357 | can make max_uid smaller than the number still recorded in our rtx. | |
358 | That's fine, since this is a quick way of verifying that the insn | |
359 | is no longer in the chain. */ | |
360 | if (INSN_UID (cfun->x_clobber_return_insn) < max_uid) | |
361 | { | |
ba4f7968 JH |
362 | rtx insn; |
363 | ||
364 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
365 | if (insn == cfun->x_clobber_return_insn) | |
366 | { | |
367 | warning ("control reaches end of non-void function"); | |
368 | break; | |
369 | } | |
b313a0fe RH |
370 | } |
371 | } | |
372 | } | |
402209ff JH |
373 | \f |
374 | /* Return the INSN immediately following the NOTE_INSN_BASIC_BLOCK | |
375 | note associated with the BLOCK. */ | |
376 | ||
377 | rtx | |
6cf9ac28 | 378 | first_insn_after_basic_block_note (basic_block block) |
402209ff JH |
379 | { |
380 | rtx insn; | |
b313a0fe | 381 | |
402209ff JH |
382 | /* Get the first instruction in the block. */ |
383 | insn = block->head; | |
dc2ede84 | 384 | |
402209ff JH |
385 | if (insn == NULL_RTX) |
386 | return NULL_RTX; | |
387 | if (GET_CODE (insn) == CODE_LABEL) | |
388 | insn = NEXT_INSN (insn); | |
389 | if (!NOTE_INSN_BASIC_BLOCK_P (insn)) | |
390 | abort (); | |
391 | ||
392 | return NEXT_INSN (insn); | |
393 | } | |
394 | \f | |
395 | /* Perform data flow analysis. | |
396 | F is the first insn of the function; FLAGS is a set of PROP_* flags | |
397 | to be used in accumulating flow info. */ | |
398 | ||
399 | void | |
6cf9ac28 | 400 | life_analysis (rtx f, FILE *file, int flags) |
e881bb1b | 401 | { |
cff9f8d5 | 402 | #ifdef ELIMINABLE_REGS |
c1b50e49 | 403 | int i; |
8b60264b | 404 | static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS; |
402209ff | 405 | #endif |
dc2ede84 | 406 | |
402209ff JH |
407 | /* Record which registers will be eliminated. We use this in |
408 | mark_used_regs. */ | |
e881bb1b | 409 | |
402209ff | 410 | CLEAR_HARD_REG_SET (elim_reg_set); |
314883b8 | 411 | |
402209ff JH |
412 | #ifdef ELIMINABLE_REGS |
413 | for (i = 0; i < (int) ARRAY_SIZE (eliminables); i++) | |
414 | SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from); | |
415 | #else | |
416 | SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM); | |
417 | #endif | |
52a11cbf | 418 | |
cff9f8d5 AH |
419 | |
420 | #ifdef CANNOT_CHANGE_MODE_CLASS | |
421 | if (flags & PROP_REG_INFO) | |
10a3fdd9 | 422 | bitmap_initialize (&subregs_of_mode, 1); |
cff9f8d5 AH |
423 | #endif |
424 | ||
402209ff JH |
425 | if (! optimize) |
426 | flags &= ~(PROP_LOG_LINKS | PROP_AUTOINC | PROP_ALLOW_CFG_CHANGES); | |
52a11cbf | 427 | |
402209ff JH |
428 | /* The post-reload life analysis have (on a global basis) the same |
429 | registers live as was computed by reload itself. elimination | |
430 | Otherwise offsets and such may be incorrect. | |
e881bb1b | 431 | |
402209ff JH |
432 | Reload will make some registers as live even though they do not |
433 | appear in the rtl. | |
e881bb1b | 434 | |
402209ff JH |
435 | We don't want to create new auto-incs after reload, since they |
436 | are unlikely to be useful and can cause problems with shared | |
437 | stack slots. */ | |
438 | if (reload_completed) | |
439 | flags &= ~(PROP_REG_INFO | PROP_AUTOINC); | |
e881bb1b | 440 | |
402209ff | 441 | /* We want alias analysis information for local dead store elimination. */ |
5149f070 | 442 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
402209ff | 443 | init_alias_analysis (); |
dc2ede84 | 444 | |
402209ff JH |
445 | /* Always remove no-op moves. Do this before other processing so |
446 | that we don't have to keep re-scanning them. */ | |
447 | delete_noop_moves (f); | |
1bc48f82 | 448 | |
402209ff JH |
449 | /* Some targets can emit simpler epilogues if they know that sp was |
450 | not ever modified during the function. After reload, of course, | |
451 | we've already emitted the epilogue so there's no sense searching. */ | |
452 | if (! reload_completed) | |
453 | notice_stack_pointer_modification (f); | |
1bc48f82 | 454 | |
402209ff JH |
455 | /* Allocate and zero out data structures that will record the |
456 | data from lifetime analysis. */ | |
457 | allocate_reg_life_data (); | |
458 | allocate_bb_life_data (); | |
1bc48f82 | 459 | |
402209ff JH |
460 | /* Find the set of registers live on function exit. */ |
461 | mark_regs_live_at_end (EXIT_BLOCK_PTR->global_live_at_start); | |
1bc48f82 | 462 | |
402209ff JH |
463 | /* "Update" life info from zero. It'd be nice to begin the |
464 | relaxation with just the exit and noreturn blocks, but that set | |
465 | is not immediately handy. */ | |
c9bacfdb | 466 | |
402209ff JH |
467 | if (flags & PROP_REG_INFO) |
468 | memset (regs_ever_live, 0, sizeof (regs_ever_live)); | |
469 | update_life_info (NULL, UPDATE_LIFE_GLOBAL, flags); | |
1bc48f82 | 470 | |
402209ff | 471 | /* Clean up. */ |
5149f070 | 472 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
402209ff | 473 | end_alias_analysis (); |
1bc48f82 | 474 | |
402209ff JH |
475 | if (file) |
476 | dump_flow_info (file); | |
0005550b | 477 | |
402209ff | 478 | free_basic_block_vars (1); |
a686dbf8 | 479 | |
402209ff JH |
480 | /* Removing dead insns should've made jumptables really dead. */ |
481 | delete_dead_jumptables (); | |
482 | } | |
0005550b | 483 | |
402209ff | 484 | /* A subroutine of verify_wide_reg, called through for_each_rtx. |
08ef5437 RH |
485 | Search for REGNO. If found, return 2 if it is not wider than |
486 | word_mode. */ | |
a686dbf8 | 487 | |
402209ff | 488 | static int |
6cf9ac28 | 489 | verify_wide_reg_1 (rtx *px, void *pregno) |
402209ff JH |
490 | { |
491 | rtx x = *px; | |
492 | unsigned int regno = *(int *) pregno; | |
134d3a2e | 493 | |
402209ff | 494 | if (GET_CODE (x) == REG && REGNO (x) == regno) |
134d3a2e | 495 | { |
402209ff | 496 | if (GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD) |
08ef5437 | 497 | return 2; |
402209ff | 498 | return 1; |
134d3a2e | 499 | } |
402209ff | 500 | return 0; |
a686dbf8 JH |
501 | } |
502 | ||
402209ff | 503 | /* A subroutine of verify_local_live_at_start. Search through insns |
08ef5437 | 504 | of BB looking for register REGNO. */ |
8329b5ec | 505 | |
be1bb652 | 506 | static void |
6cf9ac28 | 507 | verify_wide_reg (int regno, basic_block bb) |
e881bb1b | 508 | { |
08ef5437 RH |
509 | rtx head = bb->head, end = bb->end; |
510 | ||
402209ff | 511 | while (1) |
e881bb1b | 512 | { |
08ef5437 RH |
513 | if (INSN_P (head)) |
514 | { | |
515 | int r = for_each_rtx (&PATTERN (head), verify_wide_reg_1, ®no); | |
516 | if (r == 1) | |
517 | return; | |
518 | if (r == 2) | |
519 | break; | |
520 | } | |
402209ff JH |
521 | if (head == end) |
522 | break; | |
523 | head = NEXT_INSN (head); | |
524 | } | |
d7429b6a | 525 | |
402209ff | 526 | if (rtl_dump_file) |
08ef5437 RH |
527 | { |
528 | fprintf (rtl_dump_file, "Register %d died unexpectedly.\n", regno); | |
529 | dump_bb (bb, rtl_dump_file); | |
530 | } | |
531 | abort (); | |
402209ff | 532 | } |
314883b8 | 533 | |
402209ff JH |
534 | /* A subroutine of update_life_info. Verify that there are no untoward |
535 | changes in live_at_start during a local update. */ | |
d06c6389 | 536 | |
402209ff | 537 | static void |
6cf9ac28 | 538 | verify_local_live_at_start (regset new_live_at_start, basic_block bb) |
402209ff JH |
539 | { |
540 | if (reload_completed) | |
541 | { | |
542 | /* After reload, there are no pseudos, nor subregs of multi-word | |
543 | registers. The regsets should exactly match. */ | |
544 | if (! REG_SET_EQUAL_P (new_live_at_start, bb->global_live_at_start)) | |
545 | { | |
546 | if (rtl_dump_file) | |
e881bb1b | 547 | { |
402209ff | 548 | fprintf (rtl_dump_file, |
08ef5437 | 549 | "live_at_start mismatch in bb %d, aborting\nNew:\n", |
0b17ab2f | 550 | bb->index); |
402209ff | 551 | debug_bitmap_file (rtl_dump_file, new_live_at_start); |
08ef5437 RH |
552 | fputs ("Old:\n", rtl_dump_file); |
553 | dump_bb (bb, rtl_dump_file); | |
e881bb1b | 554 | } |
08ef5437 | 555 | abort (); |
e881bb1b | 556 | } |
402209ff JH |
557 | } |
558 | else | |
559 | { | |
560 | int i; | |
d7429b6a | 561 | |
402209ff JH |
562 | /* Find the set of changed registers. */ |
563 | XOR_REG_SET (new_live_at_start, bb->global_live_at_start); | |
421382ac | 564 | |
402209ff JH |
565 | EXECUTE_IF_SET_IN_REG_SET (new_live_at_start, 0, i, |
566 | { | |
dd3f0101 | 567 | /* No registers should die. */ |
402209ff JH |
568 | if (REGNO_REG_SET_P (bb->global_live_at_start, i)) |
569 | { | |
570 | if (rtl_dump_file) | |
08ef5437 RH |
571 | { |
572 | fprintf (rtl_dump_file, | |
573 | "Register %d died unexpectedly.\n", i); | |
574 | dump_bb (bb, rtl_dump_file); | |
575 | } | |
576 | abort (); | |
402209ff | 577 | } |
c9bacfdb | 578 | |
dd3f0101 | 579 | /* Verify that the now-live register is wider than word_mode. */ |
08ef5437 | 580 | verify_wide_reg (i, bb); |
402209ff | 581 | }); |
e881bb1b | 582 | } |
402209ff | 583 | } |
d7429b6a | 584 | |
402209ff JH |
585 | /* Updates life information starting with the basic blocks set in BLOCKS. |
586 | If BLOCKS is null, consider it to be the universal set. | |
af14ce9c | 587 | |
e0bb17a8 | 588 | If EXTENT is UPDATE_LIFE_LOCAL, such as after splitting or peepholing, |
402209ff JH |
589 | we are only expecting local modifications to basic blocks. If we find |
590 | extra registers live at the beginning of a block, then we either killed | |
591 | useful data, or we have a broken split that wants data not provided. | |
592 | If we find registers removed from live_at_start, that means we have | |
593 | a broken peephole that is killing a register it shouldn't. | |
af14ce9c | 594 | |
402209ff JH |
595 | ??? This is not true in one situation -- when a pre-reload splitter |
596 | generates subregs of a multi-word pseudo, current life analysis will | |
597 | lose the kill. So we _can_ have a pseudo go live. How irritating. | |
5ece9746 | 598 | |
402209ff JH |
599 | Including PROP_REG_INFO does not properly refresh regs_ever_live |
600 | unless the caller resets it to zero. */ | |
19d3c25c | 601 | |
3dec4024 | 602 | int |
6cf9ac28 | 603 | update_life_info (sbitmap blocks, enum update_life_extent extent, int prop_flags) |
19d3c25c | 604 | { |
402209ff JH |
605 | regset tmp; |
606 | regset_head tmp_head; | |
006844a3 | 607 | int i; |
566576e7 | 608 | int stabilized_prop_flags = prop_flags; |
e0082a72 | 609 | basic_block bb; |
006844a3 | 610 | |
402209ff | 611 | tmp = INITIALIZE_REG_SET (tmp_head); |
3dec4024 | 612 | ndead = 0; |
2cade2ad | 613 | |
b932f770 JH |
614 | timevar_push ((extent == UPDATE_LIFE_LOCAL || blocks) |
615 | ? TV_LIFE_UPDATE : TV_LIFE); | |
616 | ||
402209ff JH |
617 | /* Changes to the CFG are only allowed when |
618 | doing a global update for the entire CFG. */ | |
619 | if ((prop_flags & PROP_ALLOW_CFG_CHANGES) | |
620 | && (extent == UPDATE_LIFE_LOCAL || blocks)) | |
621 | abort (); | |
006844a3 | 622 | |
402209ff JH |
623 | /* For a global update, we go through the relaxation process again. */ |
624 | if (extent != UPDATE_LIFE_LOCAL) | |
625 | { | |
626 | for ( ; ; ) | |
627 | { | |
628 | int changed = 0; | |
19d3c25c | 629 | |
402209ff JH |
630 | calculate_global_regs_live (blocks, blocks, |
631 | prop_flags & (PROP_SCAN_DEAD_CODE | |
5149f070 | 632 | | PROP_SCAN_DEAD_STORES |
402209ff | 633 | | PROP_ALLOW_CFG_CHANGES)); |
5ece9746 | 634 | |
402209ff JH |
635 | if ((prop_flags & (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES)) |
636 | != (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES)) | |
637 | break; | |
e881bb1b | 638 | |
402209ff JH |
639 | /* Removing dead code may allow the CFG to be simplified which |
640 | in turn may allow for further dead code detection / removal. */ | |
e0082a72 | 641 | FOR_EACH_BB_REVERSE (bb) |
402209ff | 642 | { |
402209ff JH |
643 | COPY_REG_SET (tmp, bb->global_live_at_end); |
644 | changed |= propagate_block (bb, tmp, NULL, NULL, | |
645 | prop_flags & (PROP_SCAN_DEAD_CODE | |
5149f070 | 646 | | PROP_SCAN_DEAD_STORES |
402209ff JH |
647 | | PROP_KILL_DEAD_CODE)); |
648 | } | |
47095bfc | 649 | |
566576e7 HPN |
650 | /* Don't pass PROP_SCAN_DEAD_CODE or PROP_KILL_DEAD_CODE to |
651 | subsequent propagate_block calls, since removing or acting as | |
652 | removing dead code can affect global register liveness, which | |
653 | is supposed to be finalized for this call after this loop. */ | |
654 | stabilized_prop_flags | |
5149f070 JH |
655 | &= ~(PROP_SCAN_DEAD_CODE | PROP_SCAN_DEAD_STORES |
656 | | PROP_KILL_DEAD_CODE); | |
566576e7 HPN |
657 | |
658 | if (! changed) | |
402209ff | 659 | break; |
566576e7 HPN |
660 | |
661 | /* We repeat regardless of what cleanup_cfg says. If there were | |
662 | instructions deleted above, that might have been only a | |
663 | partial improvement (see MAX_MEM_SET_LIST_LEN usage). | |
664 | Further improvement may be possible. */ | |
665 | cleanup_cfg (CLEANUP_EXPENSIVE); | |
cdd1f01b | 666 | |
6cf9ac28 | 667 | /* Zap the life information from the last round. If we don't |
cdd1f01b RH |
668 | do this, we can wind up with registers that no longer appear |
669 | in the code being marked live at entry, which twiggs bogus | |
670 | warnings from regno_uninitialized. */ | |
671 | FOR_EACH_BB (bb) | |
672 | { | |
673 | CLEAR_REG_SET (bb->global_live_at_start); | |
674 | CLEAR_REG_SET (bb->global_live_at_end); | |
675 | } | |
e881bb1b | 676 | } |
47095bfc | 677 | |
402209ff JH |
678 | /* If asked, remove notes from the blocks we'll update. */ |
679 | if (extent == UPDATE_LIFE_GLOBAL_RM_NOTES) | |
680 | count_or_remove_death_notes (blocks, 1); | |
681 | } | |
682 | ||
38c1593d JH |
683 | /* Clear log links in case we are asked to (re)compute them. */ |
684 | if (prop_flags & PROP_LOG_LINKS) | |
685 | clear_log_links (blocks); | |
686 | ||
402209ff JH |
687 | if (blocks) |
688 | { | |
689 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, | |
690 | { | |
e0082a72 | 691 | bb = BASIC_BLOCK (i); |
402209ff JH |
692 | |
693 | COPY_REG_SET (tmp, bb->global_live_at_end); | |
566576e7 | 694 | propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags); |
402209ff JH |
695 | |
696 | if (extent == UPDATE_LIFE_LOCAL) | |
697 | verify_local_live_at_start (tmp, bb); | |
698 | }); | |
5ece9746 | 699 | } |
e881bb1b RH |
700 | else |
701 | { | |
e0082a72 | 702 | FOR_EACH_BB_REVERSE (bb) |
355e4ec4 | 703 | { |
402209ff | 704 | COPY_REG_SET (tmp, bb->global_live_at_end); |
566576e7 HPN |
705 | |
706 | propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags); | |
421382ac | 707 | |
402209ff JH |
708 | if (extent == UPDATE_LIFE_LOCAL) |
709 | verify_local_live_at_start (tmp, bb); | |
e881bb1b | 710 | } |
e881bb1b RH |
711 | } |
712 | ||
402209ff | 713 | FREE_REG_SET (tmp); |
eeea333e | 714 | |
402209ff JH |
715 | if (prop_flags & PROP_REG_INFO) |
716 | { | |
717 | /* The only pseudos that are live at the beginning of the function | |
718 | are those that were not set anywhere in the function. local-alloc | |
719 | doesn't know how to handle these correctly, so mark them as not | |
720 | local to any one basic block. */ | |
721 | EXECUTE_IF_SET_IN_REG_SET (ENTRY_BLOCK_PTR->global_live_at_end, | |
722 | FIRST_PSEUDO_REGISTER, i, | |
723 | { REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; }); | |
e881bb1b | 724 | |
402209ff JH |
725 | /* We have a problem with any pseudoreg that lives across the setjmp. |
726 | ANSI says that if a user variable does not change in value between | |
727 | the setjmp and the longjmp, then the longjmp preserves it. This | |
728 | includes longjmp from a place where the pseudo appears dead. | |
729 | (In principle, the value still exists if it is in scope.) | |
730 | If the pseudo goes in a hard reg, some other value may occupy | |
731 | that hard reg where this pseudo is dead, thus clobbering the pseudo. | |
732 | Conclusion: such a pseudo must not go in a hard reg. */ | |
733 | EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp, | |
734 | FIRST_PSEUDO_REGISTER, i, | |
735 | { | |
736 | if (regno_reg_rtx[i] != 0) | |
737 | { | |
738 | REG_LIVE_LENGTH (i) = -1; | |
739 | REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; | |
740 | } | |
741 | }); | |
742 | } | |
b932f770 JH |
743 | timevar_pop ((extent == UPDATE_LIFE_LOCAL || blocks) |
744 | ? TV_LIFE_UPDATE : TV_LIFE); | |
3dec4024 JH |
745 | if (ndead && rtl_dump_file) |
746 | fprintf (rtl_dump_file, "deleted %i dead insns\n", ndead); | |
747 | return ndead; | |
421382ac | 748 | } |
b62c8881 | 749 | |
38c1593d JH |
750 | /* Update life information in all blocks where BB_DIRTY is set. */ |
751 | ||
3dec4024 | 752 | int |
6cf9ac28 | 753 | update_life_info_in_dirty_blocks (enum update_life_extent extent, int prop_flags) |
38c1593d | 754 | { |
d55bc081 | 755 | sbitmap update_life_blocks = sbitmap_alloc (last_basic_block); |
38c1593d | 756 | int n = 0; |
e0082a72 | 757 | basic_block bb; |
0a2ed1f1 | 758 | int retval = 0; |
38c1593d JH |
759 | |
760 | sbitmap_zero (update_life_blocks); | |
e0082a72 | 761 | FOR_EACH_BB (bb) |
e0e577a2 RH |
762 | { |
763 | if (extent == UPDATE_LIFE_LOCAL) | |
764 | { | |
765 | if (bb->flags & BB_DIRTY) | |
766 | { | |
767 | SET_BIT (update_life_blocks, bb->index); | |
768 | n++; | |
769 | } | |
770 | } | |
771 | else | |
772 | { | |
773 | /* ??? Bootstrap with -march=pentium4 fails to terminate | |
774 | with only a partial life update. */ | |
775 | SET_BIT (update_life_blocks, bb->index); | |
776 | if (bb->flags & BB_DIRTY) | |
777 | n++; | |
778 | } | |
779 | } | |
38c1593d JH |
780 | |
781 | if (n) | |
0a2ed1f1 | 782 | retval = update_life_info (update_life_blocks, extent, prop_flags); |
38c1593d JH |
783 | |
784 | sbitmap_free (update_life_blocks); | |
0a2ed1f1 | 785 | return retval; |
38c1593d JH |
786 | } |
787 | ||
402209ff | 788 | /* Free the variables allocated by find_basic_blocks. |
b62c8881 | 789 | |
cc2902df | 790 | KEEP_HEAD_END_P is nonzero if basic_block_info is not to be freed. */ |
421382ac | 791 | |
2307e372 | 792 | void |
6cf9ac28 | 793 | free_basic_block_vars (int keep_head_end_p) |
421382ac | 794 | { |
402209ff JH |
795 | if (! keep_head_end_p) |
796 | { | |
797 | if (basic_block_info) | |
e881bb1b | 798 | { |
402209ff JH |
799 | clear_edges (); |
800 | VARRAY_FREE (basic_block_info); | |
e881bb1b | 801 | } |
0b17ab2f | 802 | n_basic_blocks = 0; |
d55bc081 | 803 | last_basic_block = 0; |
402209ff JH |
804 | |
805 | ENTRY_BLOCK_PTR->aux = NULL; | |
806 | ENTRY_BLOCK_PTR->global_live_at_end = NULL; | |
807 | EXIT_BLOCK_PTR->aux = NULL; | |
808 | EXIT_BLOCK_PTR->global_live_at_start = NULL; | |
e881bb1b | 809 | } |
421382ac BS |
810 | } |
811 | ||
402209ff | 812 | /* Delete any insns that copy a register to itself. */ |
421382ac | 813 | |
3dec4024 | 814 | int |
6cf9ac28 | 815 | delete_noop_moves (rtx f ATTRIBUTE_UNUSED) |
421382ac | 816 | { |
402209ff JH |
817 | rtx insn, next; |
818 | basic_block bb; | |
3dec4024 | 819 | int nnoops = 0; |
421382ac | 820 | |
e0082a72 | 821 | FOR_EACH_BB (bb) |
421382ac | 822 | { |
402209ff | 823 | for (insn = bb->head; insn != NEXT_INSN (bb->end); insn = next) |
421382ac | 824 | { |
402209ff JH |
825 | next = NEXT_INSN (insn); |
826 | if (INSN_P (insn) && noop_move_p (insn)) | |
827 | { | |
eb9d8e4d JW |
828 | rtx note; |
829 | ||
830 | /* If we're about to remove the first insn of a libcall | |
831 | then move the libcall note to the next real insn and | |
832 | update the retval note. */ | |
833 | if ((note = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
834 | && XEXP (note, 0) != insn) | |
835 | { | |
836 | rtx new_libcall_insn = next_real_insn (insn); | |
837 | rtx retval_note = find_reg_note (XEXP (note, 0), | |
838 | REG_RETVAL, NULL_RTX); | |
839 | REG_NOTES (new_libcall_insn) | |
840 | = gen_rtx_INSN_LIST (REG_LIBCALL, XEXP (note, 0), | |
841 | REG_NOTES (new_libcall_insn)); | |
842 | XEXP (retval_note, 0) = new_libcall_insn; | |
843 | } | |
844 | ||
3dec4024 JH |
845 | delete_insn_and_edges (insn); |
846 | nnoops++; | |
402209ff | 847 | } |
421382ac BS |
848 | } |
849 | } | |
3dec4024 JH |
850 | if (nnoops && rtl_dump_file) |
851 | fprintf (rtl_dump_file, "deleted %i noop moves", nnoops); | |
852 | return nnoops; | |
421382ac BS |
853 | } |
854 | ||
402209ff | 855 | /* Delete any jump tables never referenced. We can't delete them at the |
eaec9b3d | 856 | time of removing tablejump insn as they are referenced by the preceding |
402209ff JH |
857 | insns computing the destination, so we delay deleting and garbagecollect |
858 | them once life information is computed. */ | |
0010687d | 859 | void |
6cf9ac28 | 860 | delete_dead_jumptables (void) |
402209ff JH |
861 | { |
862 | rtx insn, next; | |
863 | for (insn = get_insns (); insn; insn = next) | |
421382ac | 864 | { |
402209ff JH |
865 | next = NEXT_INSN (insn); |
866 | if (GET_CODE (insn) == CODE_LABEL | |
967bd823 | 867 | && LABEL_NUSES (insn) == LABEL_PRESERVE_P (insn) |
402209ff JH |
868 | && GET_CODE (next) == JUMP_INSN |
869 | && (GET_CODE (PATTERN (next)) == ADDR_VEC | |
870 | || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)) | |
e881bb1b | 871 | { |
402209ff JH |
872 | if (rtl_dump_file) |
873 | fprintf (rtl_dump_file, "Dead jumptable %i removed\n", INSN_UID (insn)); | |
53c17031 JH |
874 | delete_insn (NEXT_INSN (insn)); |
875 | delete_insn (insn); | |
402209ff | 876 | next = NEXT_INSN (next); |
e881bb1b | 877 | } |
dc2ede84 | 878 | } |
e881bb1b RH |
879 | } |
880 | ||
402209ff JH |
881 | /* Determine if the stack pointer is constant over the life of the function. |
882 | Only useful before prologues have been emitted. */ | |
e881bb1b RH |
883 | |
884 | static void | |
6cf9ac28 AJ |
885 | notice_stack_pointer_modification_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, |
886 | void *data ATTRIBUTE_UNUSED) | |
e881bb1b | 887 | { |
402209ff JH |
888 | if (x == stack_pointer_rtx |
889 | /* The stack pointer is only modified indirectly as the result | |
890 | of a push until later in flow. See the comments in rtl.texi | |
891 | regarding Embedded Side-Effects on Addresses. */ | |
892 | || (GET_CODE (x) == MEM | |
893 | && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == 'a' | |
894 | && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx)) | |
895 | current_function_sp_is_unchanging = 0; | |
e881bb1b | 896 | } |
e6cfb550 | 897 | |
336a6399 | 898 | static void |
6cf9ac28 | 899 | notice_stack_pointer_modification (rtx f) |
e881bb1b | 900 | { |
402209ff | 901 | rtx insn; |
e881bb1b | 902 | |
402209ff JH |
903 | /* Assume that the stack pointer is unchanging if alloca hasn't |
904 | been used. */ | |
905 | current_function_sp_is_unchanging = !current_function_calls_alloca; | |
906 | if (! current_function_sp_is_unchanging) | |
907 | return; | |
e881bb1b | 908 | |
402209ff | 909 | for (insn = f; insn; insn = NEXT_INSN (insn)) |
e6cfb550 | 910 | { |
402209ff | 911 | if (INSN_P (insn)) |
e881bb1b | 912 | { |
402209ff JH |
913 | /* Check if insn modifies the stack pointer. */ |
914 | note_stores (PATTERN (insn), notice_stack_pointer_modification_1, | |
915 | NULL); | |
916 | if (! current_function_sp_is_unchanging) | |
917 | return; | |
e881bb1b | 918 | } |
e6cfb550 | 919 | } |
e881bb1b | 920 | } |
0ecf09f9 | 921 | |
402209ff JH |
922 | /* Mark a register in SET. Hard registers in large modes get all |
923 | of their component registers set as well. */ | |
0ecf09f9 | 924 | |
402209ff | 925 | static void |
6cf9ac28 | 926 | mark_reg (rtx reg, void *xset) |
0ecf09f9 | 927 | { |
402209ff JH |
928 | regset set = (regset) xset; |
929 | int regno = REGNO (reg); | |
0ecf09f9 | 930 | |
402209ff JH |
931 | if (GET_MODE (reg) == BLKmode) |
932 | abort (); | |
0ecf09f9 | 933 | |
402209ff JH |
934 | SET_REGNO_REG_SET (set, regno); |
935 | if (regno < FIRST_PSEUDO_REGISTER) | |
0ecf09f9 | 936 | { |
402209ff JH |
937 | int n = HARD_REGNO_NREGS (regno, GET_MODE (reg)); |
938 | while (--n > 0) | |
939 | SET_REGNO_REG_SET (set, regno + n); | |
0ecf09f9 | 940 | } |
0ecf09f9 | 941 | } |
c586192c | 942 | |
402209ff JH |
943 | /* Mark those regs which are needed at the end of the function as live |
944 | at the end of the last basic block. */ | |
c586192c | 945 | |
402209ff | 946 | static void |
6cf9ac28 | 947 | mark_regs_live_at_end (regset set) |
402209ff JH |
948 | { |
949 | unsigned int i; | |
c586192c | 950 | |
402209ff JH |
951 | /* If exiting needs the right stack value, consider the stack pointer |
952 | live at the end of the function. */ | |
fe3ad572 | 953 | if ((HAVE_epilogue && epilogue_completed) |
402209ff JH |
954 | || ! EXIT_IGNORE_STACK |
955 | || (! FRAME_POINTER_REQUIRED | |
956 | && ! current_function_calls_alloca | |
957 | && flag_omit_frame_pointer) | |
958 | || current_function_sp_is_unchanging) | |
c586192c | 959 | { |
402209ff | 960 | SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM); |
c586192c MH |
961 | } |
962 | ||
402209ff JH |
963 | /* Mark the frame pointer if needed at the end of the function. If |
964 | we end up eliminating it, it will be removed from the live list | |
965 | of each basic block by reload. */ | |
c586192c | 966 | |
402209ff | 967 | if (! reload_completed || frame_pointer_needed) |
a686dbf8 | 968 | { |
402209ff JH |
969 | SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM); |
970 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
971 | /* If they are different, also mark the hard frame pointer as live. */ | |
972 | if (! LOCAL_REGNO (HARD_FRAME_POINTER_REGNUM)) | |
dd3f0101 | 973 | SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM); |
402209ff | 974 | #endif |
a686dbf8 | 975 | } |
c586192c | 976 | |
402209ff JH |
977 | #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED |
978 | /* Many architectures have a GP register even without flag_pic. | |
979 | Assume the pic register is not in use, or will be handled by | |
980 | other means, if it is not fixed. */ | |
fc555370 | 981 | if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM |
402209ff JH |
982 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) |
983 | SET_REGNO_REG_SET (set, PIC_OFFSET_TABLE_REGNUM); | |
984 | #endif | |
c586192c | 985 | |
402209ff JH |
986 | /* Mark all global registers, and all registers used by the epilogue |
987 | as being live at the end of the function since they may be | |
988 | referenced by our caller. */ | |
989 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
990 | if (global_regs[i] || EPILOGUE_USES (i)) | |
991 | SET_REGNO_REG_SET (set, i); | |
c586192c | 992 | |
fe3ad572 | 993 | if (HAVE_epilogue && epilogue_completed) |
ca9fef16 | 994 | { |
402209ff JH |
995 | /* Mark all call-saved registers that we actually used. */ |
996 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
997 | if (regs_ever_live[i] && ! LOCAL_REGNO (i) | |
998 | && ! TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
999 | SET_REGNO_REG_SET (set, i); | |
ca9fef16 | 1000 | } |
b9b2c339 | 1001 | |
402209ff JH |
1002 | #ifdef EH_RETURN_DATA_REGNO |
1003 | /* Mark the registers that will contain data for the handler. */ | |
1004 | if (reload_completed && current_function_calls_eh_return) | |
1005 | for (i = 0; ; ++i) | |
1006 | { | |
1007 | unsigned regno = EH_RETURN_DATA_REGNO(i); | |
1008 | if (regno == INVALID_REGNUM) | |
1009 | break; | |
1010 | SET_REGNO_REG_SET (set, regno); | |
1011 | } | |
e9644cfe | 1012 | #endif |
402209ff | 1013 | #ifdef EH_RETURN_STACKADJ_RTX |
fe3ad572 | 1014 | if ((! HAVE_epilogue || ! epilogue_completed) |
402209ff | 1015 | && current_function_calls_eh_return) |
7a442791 | 1016 | { |
402209ff JH |
1017 | rtx tmp = EH_RETURN_STACKADJ_RTX; |
1018 | if (tmp && REG_P (tmp)) | |
1019 | mark_reg (tmp, set); | |
7a442791 | 1020 | } |
402209ff JH |
1021 | #endif |
1022 | #ifdef EH_RETURN_HANDLER_RTX | |
fe3ad572 | 1023 | if ((! HAVE_epilogue || ! epilogue_completed) |
402209ff | 1024 | && current_function_calls_eh_return) |
2b2c8b3e | 1025 | { |
402209ff JH |
1026 | rtx tmp = EH_RETURN_HANDLER_RTX; |
1027 | if (tmp && REG_P (tmp)) | |
1028 | mark_reg (tmp, set); | |
2b2c8b3e | 1029 | } |
402209ff | 1030 | #endif |
7a442791 | 1031 | |
402209ff JH |
1032 | /* Mark function return value. */ |
1033 | diddle_return_value (mark_reg, set); | |
7a442791 JH |
1034 | } |
1035 | ||
402209ff JH |
1036 | /* Callback function for for_each_successor_phi. DATA is a regset. |
1037 | Sets the SRC_REGNO, the regno of the phi alternative for phi node | |
1038 | INSN, in the regset. */ | |
d69d0316 | 1039 | |
402209ff | 1040 | static int |
6cf9ac28 AJ |
1041 | set_phi_alternative_reg (rtx insn ATTRIBUTE_UNUSED, |
1042 | int dest_regno ATTRIBUTE_UNUSED, int src_regno, | |
1043 | void *data) | |
d69d0316 | 1044 | { |
402209ff JH |
1045 | regset live = (regset) data; |
1046 | SET_REGNO_REG_SET (live, src_regno); | |
1047 | return 0; | |
d69d0316 JH |
1048 | } |
1049 | ||
402209ff JH |
1050 | /* Propagate global life info around the graph of basic blocks. Begin |
1051 | considering blocks with their corresponding bit set in BLOCKS_IN. | |
1052 | If BLOCKS_IN is null, consider it the universal set. | |
b9b2c339 | 1053 | |
402209ff | 1054 | BLOCKS_OUT is set for every block that was changed. */ |
b9b2c339 | 1055 | |
402209ff | 1056 | static void |
6cf9ac28 | 1057 | calculate_global_regs_live (sbitmap blocks_in, sbitmap blocks_out, int flags) |
402209ff | 1058 | { |
e0082a72 | 1059 | basic_block *queue, *qhead, *qtail, *qend, bb; |
f3ea5f6a RH |
1060 | regset tmp, new_live_at_end, invalidated_by_call; |
1061 | regset_head tmp_head, invalidated_by_call_head; | |
402209ff JH |
1062 | regset_head new_live_at_end_head; |
1063 | int i; | |
b9b2c339 | 1064 | |
1540f9eb | 1065 | /* Some passes used to forget clear aux field of basic block causing |
8d9afc4e | 1066 | sick behavior here. */ |
1540f9eb | 1067 | #ifdef ENABLE_CHECKING |
e0082a72 ZD |
1068 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb) |
1069 | if (bb->aux) | |
1540f9eb JH |
1070 | abort (); |
1071 | #endif | |
1072 | ||
402209ff JH |
1073 | tmp = INITIALIZE_REG_SET (tmp_head); |
1074 | new_live_at_end = INITIALIZE_REG_SET (new_live_at_end_head); | |
f3ea5f6a | 1075 | invalidated_by_call = INITIALIZE_REG_SET (invalidated_by_call_head); |
b9b2c339 | 1076 | |
d6a7951f | 1077 | /* Inconveniently, this is only readily available in hard reg set form. */ |
402209ff | 1078 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) |
f3ea5f6a RH |
1079 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) |
1080 | SET_REGNO_REG_SET (invalidated_by_call, i); | |
2b2c8b3e | 1081 | |
402209ff JH |
1082 | /* Create a worklist. Allocate an extra slot for ENTRY_BLOCK, and one |
1083 | because the `head == tail' style test for an empty queue doesn't | |
1084 | work with a full queue. */ | |
703ad42b | 1085 | queue = xmalloc ((n_basic_blocks + 2) * sizeof (*queue)); |
402209ff | 1086 | qtail = queue; |
0b17ab2f | 1087 | qhead = qend = queue + n_basic_blocks + 2; |
2b2c8b3e | 1088 | |
402209ff JH |
1089 | /* Queue the blocks set in the initial mask. Do this in reverse block |
1090 | number order so that we are more likely for the first round to do | |
1091 | useful work. We use AUX non-null to flag that the block is queued. */ | |
1092 | if (blocks_in) | |
c319629b | 1093 | { |
e0082a72 ZD |
1094 | FOR_EACH_BB (bb) |
1095 | if (TEST_BIT (blocks_in, bb->index)) | |
1096 | { | |
1097 | *--qhead = bb; | |
1098 | bb->aux = bb; | |
1099 | } | |
2b2c8b3e | 1100 | } |
402209ff | 1101 | else |
e881bb1b | 1102 | { |
bf77398c | 1103 | FOR_EACH_BB (bb) |
402209ff | 1104 | { |
402209ff JH |
1105 | *--qhead = bb; |
1106 | bb->aux = bb; | |
1107 | } | |
e881bb1b | 1108 | } |
e881bb1b | 1109 | |
70e0ccd0 AO |
1110 | /* We clean aux when we remove the initially-enqueued bbs, but we |
1111 | don't enqueue ENTRY and EXIT initially, so clean them upfront and | |
1112 | unconditionally. */ | |
1113 | ENTRY_BLOCK_PTR->aux = EXIT_BLOCK_PTR->aux = NULL; | |
1114 | ||
402209ff JH |
1115 | if (blocks_out) |
1116 | sbitmap_zero (blocks_out); | |
e881bb1b | 1117 | |
402209ff JH |
1118 | /* We work through the queue until there are no more blocks. What |
1119 | is live at the end of this block is precisely the union of what | |
1120 | is live at the beginning of all its successors. So, we set its | |
1121 | GLOBAL_LIVE_AT_END field based on the GLOBAL_LIVE_AT_START field | |
1122 | for its successors. Then, we compute GLOBAL_LIVE_AT_START for | |
1123 | this block by walking through the instructions in this block in | |
1124 | reverse order and updating as we go. If that changed | |
1125 | GLOBAL_LIVE_AT_START, we add the predecessors of the block to the | |
1126 | queue; they will now need to recalculate GLOBAL_LIVE_AT_END. | |
e881bb1b | 1127 | |
402209ff JH |
1128 | We are guaranteed to terminate, because GLOBAL_LIVE_AT_START |
1129 | never shrinks. If a register appears in GLOBAL_LIVE_AT_START, it | |
1130 | must either be live at the end of the block, or used within the | |
1131 | block. In the latter case, it will certainly never disappear | |
1132 | from GLOBAL_LIVE_AT_START. In the former case, the register | |
1133 | could go away only if it disappeared from GLOBAL_LIVE_AT_START | |
1134 | for one of the successor blocks. By induction, that cannot | |
1135 | occur. */ | |
1136 | while (qhead != qtail) | |
e881bb1b | 1137 | { |
402209ff JH |
1138 | int rescan, changed; |
1139 | basic_block bb; | |
e881bb1b | 1140 | edge e; |
e881bb1b | 1141 | |
402209ff JH |
1142 | bb = *qhead++; |
1143 | if (qhead == qend) | |
1144 | qhead = queue; | |
1145 | bb->aux = NULL; | |
1146 | ||
1147 | /* Begin by propagating live_at_start from the successor blocks. */ | |
1148 | CLEAR_REG_SET (new_live_at_end); | |
e881bb1b | 1149 | |
15b5aef3 RH |
1150 | if (bb->succ) |
1151 | for (e = bb->succ; e; e = e->succ_next) | |
1152 | { | |
1153 | basic_block sb = e->dest; | |
1154 | ||
1155 | /* Call-clobbered registers die across exception and | |
1156 | call edges. */ | |
1157 | /* ??? Abnormal call edges ignored for the moment, as this gets | |
1158 | confused by sibling call edges, which crashes reg-stack. */ | |
1159 | if (e->flags & EDGE_EH) | |
1160 | { | |
1161 | bitmap_operation (tmp, sb->global_live_at_start, | |
f3ea5f6a | 1162 | invalidated_by_call, BITMAP_AND_COMPL); |
15b5aef3 RH |
1163 | IOR_REG_SET (new_live_at_end, tmp); |
1164 | } | |
1165 | else | |
1166 | IOR_REG_SET (new_live_at_end, sb->global_live_at_start); | |
1167 | ||
1168 | /* If a target saves one register in another (instead of on | |
1169 | the stack) the save register will need to be live for EH. */ | |
1170 | if (e->flags & EDGE_EH) | |
1171 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1172 | if (EH_USES (i)) | |
1173 | SET_REGNO_REG_SET (new_live_at_end, i); | |
1174 | } | |
1175 | else | |
1176 | { | |
1177 | /* This might be a noreturn function that throws. And | |
1178 | even if it isn't, getting the unwind info right helps | |
1179 | debugging. */ | |
1180 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1181 | if (EH_USES (i)) | |
1182 | SET_REGNO_REG_SET (new_live_at_end, i); | |
402209ff | 1183 | } |
e881bb1b | 1184 | |
402209ff JH |
1185 | /* The all-important stack pointer must always be live. */ |
1186 | SET_REGNO_REG_SET (new_live_at_end, STACK_POINTER_REGNUM); | |
1e7d57a3 | 1187 | |
402209ff JH |
1188 | /* Before reload, there are a few registers that must be forced |
1189 | live everywhere -- which might not already be the case for | |
1190 | blocks within infinite loops. */ | |
1191 | if (! reload_completed) | |
1192 | { | |
1193 | /* Any reference to any pseudo before reload is a potential | |
1194 | reference of the frame pointer. */ | |
1195 | SET_REGNO_REG_SET (new_live_at_end, FRAME_POINTER_REGNUM); | |
c9bacfdb | 1196 | |
402209ff JH |
1197 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
1198 | /* Pseudos with argument area equivalences may require | |
1199 | reloading via the argument pointer. */ | |
1200 | if (fixed_regs[ARG_POINTER_REGNUM]) | |
1201 | SET_REGNO_REG_SET (new_live_at_end, ARG_POINTER_REGNUM); | |
1202 | #endif | |
e881bb1b | 1203 | |
402209ff JH |
1204 | /* Any constant, or pseudo with constant equivalences, may |
1205 | require reloading from memory using the pic register. */ | |
fc555370 | 1206 | if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM |
402209ff JH |
1207 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) |
1208 | SET_REGNO_REG_SET (new_live_at_end, PIC_OFFSET_TABLE_REGNUM); | |
e881bb1b | 1209 | } |
e881bb1b | 1210 | |
402209ff JH |
1211 | /* Regs used in phi nodes are not included in |
1212 | global_live_at_start, since they are live only along a | |
1213 | particular edge. Set those regs that are live because of a | |
1214 | phi node alternative corresponding to this particular block. */ | |
1215 | if (in_ssa_form) | |
1216 | for_each_successor_phi (bb, &set_phi_alternative_reg, | |
1217 | new_live_at_end); | |
e881bb1b | 1218 | |
402209ff JH |
1219 | if (bb == ENTRY_BLOCK_PTR) |
1220 | { | |
1221 | COPY_REG_SET (bb->global_live_at_end, new_live_at_end); | |
1222 | continue; | |
1223 | } | |
e881bb1b | 1224 | |
402209ff JH |
1225 | /* On our first pass through this block, we'll go ahead and continue. |
1226 | Recognize first pass by local_set NULL. On subsequent passes, we | |
1227 | get to skip out early if live_at_end wouldn't have changed. */ | |
e881bb1b | 1228 | |
402209ff JH |
1229 | if (bb->local_set == NULL) |
1230 | { | |
1231 | bb->local_set = OBSTACK_ALLOC_REG_SET (&flow_obstack); | |
1232 | bb->cond_local_set = OBSTACK_ALLOC_REG_SET (&flow_obstack); | |
1233 | rescan = 1; | |
1234 | } | |
1235 | else | |
1236 | { | |
1237 | /* If any bits were removed from live_at_end, we'll have to | |
1238 | rescan the block. This wouldn't be necessary if we had | |
1239 | precalculated local_live, however with PROP_SCAN_DEAD_CODE | |
1240 | local_live is really dependent on live_at_end. */ | |
1241 | CLEAR_REG_SET (tmp); | |
1242 | rescan = bitmap_operation (tmp, bb->global_live_at_end, | |
1243 | new_live_at_end, BITMAP_AND_COMPL); | |
e881bb1b | 1244 | |
402209ff JH |
1245 | if (! rescan) |
1246 | { | |
1247 | /* If any of the registers in the new live_at_end set are | |
1248 | conditionally set in this basic block, we must rescan. | |
1249 | This is because conditional lifetimes at the end of the | |
1250 | block do not just take the live_at_end set into account, | |
1251 | but also the liveness at the start of each successor | |
1252 | block. We can miss changes in those sets if we only | |
1253 | compare the new live_at_end against the previous one. */ | |
1254 | CLEAR_REG_SET (tmp); | |
1255 | rescan = bitmap_operation (tmp, new_live_at_end, | |
1256 | bb->cond_local_set, BITMAP_AND); | |
1257 | } | |
e881bb1b | 1258 | |
402209ff JH |
1259 | if (! rescan) |
1260 | { | |
1261 | /* Find the set of changed bits. Take this opportunity | |
1262 | to notice that this set is empty and early out. */ | |
1263 | CLEAR_REG_SET (tmp); | |
1264 | changed = bitmap_operation (tmp, bb->global_live_at_end, | |
1265 | new_live_at_end, BITMAP_XOR); | |
1266 | if (! changed) | |
1267 | continue; | |
e881bb1b | 1268 | |
402209ff JH |
1269 | /* If any of the changed bits overlap with local_set, |
1270 | we'll have to rescan the block. Detect overlap by | |
1271 | the AND with ~local_set turning off bits. */ | |
1272 | rescan = bitmap_operation (tmp, tmp, bb->local_set, | |
1273 | BITMAP_AND_COMPL); | |
1274 | } | |
1275 | } | |
e881bb1b | 1276 | |
402209ff JH |
1277 | /* Let our caller know that BB changed enough to require its |
1278 | death notes updated. */ | |
1279 | if (blocks_out) | |
0b17ab2f | 1280 | SET_BIT (blocks_out, bb->index); |
e881bb1b | 1281 | |
402209ff JH |
1282 | if (! rescan) |
1283 | { | |
1284 | /* Add to live_at_start the set of all registers in | |
1285 | new_live_at_end that aren't in the old live_at_end. */ | |
19d3c25c | 1286 | |
402209ff JH |
1287 | bitmap_operation (tmp, new_live_at_end, bb->global_live_at_end, |
1288 | BITMAP_AND_COMPL); | |
1289 | COPY_REG_SET (bb->global_live_at_end, new_live_at_end); | |
c9bacfdb | 1290 | |
402209ff JH |
1291 | changed = bitmap_operation (bb->global_live_at_start, |
1292 | bb->global_live_at_start, | |
1293 | tmp, BITMAP_IOR); | |
1294 | if (! changed) | |
1295 | continue; | |
e881bb1b RH |
1296 | } |
1297 | else | |
1298 | { | |
402209ff | 1299 | COPY_REG_SET (bb->global_live_at_end, new_live_at_end); |
e881bb1b | 1300 | |
402209ff JH |
1301 | /* Rescan the block insn by insn to turn (a copy of) live_at_end |
1302 | into live_at_start. */ | |
1303 | propagate_block (bb, new_live_at_end, bb->local_set, | |
1304 | bb->cond_local_set, flags); | |
e881bb1b | 1305 | |
402209ff JH |
1306 | /* If live_at start didn't change, no need to go farther. */ |
1307 | if (REG_SET_EQUAL_P (bb->global_live_at_start, new_live_at_end)) | |
1308 | continue; | |
e881bb1b | 1309 | |
402209ff JH |
1310 | COPY_REG_SET (bb->global_live_at_start, new_live_at_end); |
1311 | } | |
a8688bd6 | 1312 | |
402209ff JH |
1313 | /* Queue all predecessors of BB so that we may re-examine |
1314 | their live_at_end. */ | |
1315 | for (e = bb->pred; e; e = e->pred_next) | |
1316 | { | |
1317 | basic_block pb = e->src; | |
1318 | if (pb->aux == NULL) | |
1319 | { | |
1320 | *qtail++ = pb; | |
1321 | if (qtail == qend) | |
1322 | qtail = queue; | |
1323 | pb->aux = pb; | |
1324 | } | |
1325 | } | |
a8688bd6 AM |
1326 | } |
1327 | ||
402209ff JH |
1328 | FREE_REG_SET (tmp); |
1329 | FREE_REG_SET (new_live_at_end); | |
f3ea5f6a | 1330 | FREE_REG_SET (invalidated_by_call); |
f5540cd4 | 1331 | |
402209ff JH |
1332 | if (blocks_out) |
1333 | { | |
1334 | EXECUTE_IF_SET_IN_SBITMAP (blocks_out, 0, i, | |
1335 | { | |
0b17ab2f | 1336 | basic_block bb = BASIC_BLOCK (i); |
402209ff JH |
1337 | FREE_REG_SET (bb->local_set); |
1338 | FREE_REG_SET (bb->cond_local_set); | |
1339 | }); | |
e881bb1b RH |
1340 | } |
1341 | else | |
1342 | { | |
e0082a72 | 1343 | FOR_EACH_BB (bb) |
402209ff | 1344 | { |
402209ff JH |
1345 | FREE_REG_SET (bb->local_set); |
1346 | FREE_REG_SET (bb->cond_local_set); | |
1347 | } | |
f5540cd4 | 1348 | } |
19d3c25c | 1349 | |
402209ff | 1350 | free (queue); |
e881bb1b | 1351 | } |
0626ef8a AM |
1352 | |
1353 | \f | |
09da1532 | 1354 | /* This structure is used to pass parameters to and from the |
4a913dd6 EC |
1355 | the function find_regno_partial(). It is used to pass in the |
1356 | register number we are looking, as well as to return any rtx | |
0626ef8a AM |
1357 | we find. */ |
1358 | ||
1359 | typedef struct { | |
1360 | unsigned regno_to_find; | |
1361 | rtx retval; | |
1362 | } find_regno_partial_param; | |
1363 | ||
1364 | ||
1365 | /* Find the rtx for the reg numbers specified in 'data' if it is | |
1366 | part of an expression which only uses part of the register. Return | |
1367 | it in the structure passed in. */ | |
4a913dd6 | 1368 | static int |
6cf9ac28 | 1369 | find_regno_partial (rtx *ptr, void *data) |
0626ef8a AM |
1370 | { |
1371 | find_regno_partial_param *param = (find_regno_partial_param *)data; | |
1372 | unsigned reg = param->regno_to_find; | |
1373 | param->retval = NULL_RTX; | |
1374 | ||
1375 | if (*ptr == NULL_RTX) | |
1376 | return 0; | |
1377 | ||
4a913dd6 | 1378 | switch (GET_CODE (*ptr)) |
0626ef8a | 1379 | { |
448cad06 AH |
1380 | case ZERO_EXTRACT: |
1381 | case SIGN_EXTRACT: | |
1382 | case STRICT_LOW_PART: | |
1383 | if (GET_CODE (XEXP (*ptr, 0)) == REG && REGNO (XEXP (*ptr, 0)) == reg) | |
1384 | { | |
1385 | param->retval = XEXP (*ptr, 0); | |
1386 | return 1; | |
1387 | } | |
1388 | break; | |
0626ef8a | 1389 | |
448cad06 | 1390 | case SUBREG: |
4a913dd6 | 1391 | if (GET_CODE (SUBREG_REG (*ptr)) == REG |
448cad06 AH |
1392 | && REGNO (SUBREG_REG (*ptr)) == reg) |
1393 | { | |
1394 | param->retval = SUBREG_REG (*ptr); | |
1395 | return 1; | |
1396 | } | |
1397 | break; | |
1398 | ||
1399 | default: | |
1400 | break; | |
0626ef8a AM |
1401 | } |
1402 | ||
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | /* Process all immediate successors of the entry block looking for pseudo | |
4a913dd6 EC |
1407 | registers which are live on entry. Find all of those whose first |
1408 | instance is a partial register reference of some kind, and initialize | |
0626ef8a | 1409 | them to 0 after the entry block. This will prevent bit sets within |
4a913dd6 | 1410 | registers whose value is unknown, and may contain some kind of sticky |
0626ef8a AM |
1411 | bits we don't want. */ |
1412 | ||
1413 | int | |
6cf9ac28 | 1414 | initialize_uninitialized_subregs (void) |
0626ef8a AM |
1415 | { |
1416 | rtx insn; | |
1417 | edge e; | |
1418 | int reg, did_something = 0; | |
1419 | find_regno_partial_param param; | |
1420 | ||
1421 | for (e = ENTRY_BLOCK_PTR->succ; e; e = e->succ_next) | |
1422 | { | |
1423 | basic_block bb = e->dest; | |
1424 | regset map = bb->global_live_at_start; | |
1425 | EXECUTE_IF_SET_IN_REG_SET (map, | |
1426 | FIRST_PSEUDO_REGISTER, reg, | |
1427 | { | |
1428 | int uid = REGNO_FIRST_UID (reg); | |
1429 | rtx i; | |
1430 | ||
1431 | /* Find an insn which mentions the register we are looking for. | |
1432 | Its preferable to have an instance of the register's rtl since | |
4a913dd6 | 1433 | there may be various flags set which we need to duplicate. |
0626ef8a | 1434 | If we can't find it, its probably an automatic whose initial |
23d1aac4 | 1435 | value doesn't matter, or hopefully something we don't care about. */ |
0626ef8a AM |
1436 | for (i = get_insns (); i && INSN_UID (i) != uid; i = NEXT_INSN (i)) |
1437 | ; | |
1438 | if (i != NULL_RTX) | |
1439 | { | |
1440 | /* Found the insn, now get the REG rtx, if we can. */ | |
1441 | param.regno_to_find = reg; | |
1442 | for_each_rtx (&i, find_regno_partial, ¶m); | |
1443 | if (param.retval != NULL_RTX) | |
1444 | { | |
a7a7d7ac KH |
1445 | start_sequence (); |
1446 | emit_move_insn (param.retval, | |
1447 | CONST0_RTX (GET_MODE (param.retval))); | |
1448 | insn = get_insns (); | |
1449 | end_sequence (); | |
0626ef8a AM |
1450 | insert_insn_on_edge (insn, e); |
1451 | did_something = 1; | |
1452 | } | |
1453 | } | |
1454 | }); | |
1455 | } | |
1456 | ||
1457 | if (did_something) | |
1458 | commit_edge_insertions (); | |
1459 | return did_something; | |
1460 | } | |
1461 | ||
402209ff JH |
1462 | \f |
1463 | /* Subroutines of life analysis. */ | |
e881bb1b | 1464 | |
402209ff JH |
1465 | /* Allocate the permanent data structures that represent the results |
1466 | of life analysis. Not static since used also for stupid life analysis. */ | |
e881bb1b RH |
1467 | |
1468 | void | |
6cf9ac28 | 1469 | allocate_bb_life_data (void) |
e881bb1b | 1470 | { |
e0082a72 | 1471 | basic_block bb; |
c9bacfdb | 1472 | |
e0082a72 | 1473 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb) |
e881bb1b | 1474 | { |
402209ff JH |
1475 | bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (&flow_obstack); |
1476 | bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (&flow_obstack); | |
e881bb1b | 1477 | } |
f1330226 | 1478 | |
402209ff JH |
1479 | regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (&flow_obstack); |
1480 | } | |
0ab409ed | 1481 | |
402209ff | 1482 | void |
6cf9ac28 | 1483 | allocate_reg_life_data (void) |
0ab409ed MH |
1484 | { |
1485 | int i; | |
0ab409ed | 1486 | |
402209ff | 1487 | max_regno = max_reg_num (); |
0ab409ed | 1488 | |
402209ff JH |
1489 | /* Recalculate the register space, in case it has grown. Old style |
1490 | vector oriented regsets would set regset_{size,bytes} here also. */ | |
1491 | allocate_reg_info (max_regno, FALSE, FALSE); | |
0ab409ed | 1492 | |
402209ff JH |
1493 | /* Reset all the data we'll collect in propagate_block and its |
1494 | subroutines. */ | |
1495 | for (i = 0; i < max_regno; i++) | |
0ab409ed | 1496 | { |
402209ff JH |
1497 | REG_N_SETS (i) = 0; |
1498 | REG_N_REFS (i) = 0; | |
1499 | REG_N_DEATHS (i) = 0; | |
1500 | REG_N_CALLS_CROSSED (i) = 0; | |
1501 | REG_LIVE_LENGTH (i) = 0; | |
e505be85 | 1502 | REG_FREQ (i) = 0; |
402209ff | 1503 | REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; |
0ab409ed | 1504 | } |
402209ff | 1505 | } |
0ab409ed | 1506 | |
402209ff | 1507 | /* Delete dead instructions for propagate_block. */ |
f1330226 | 1508 | |
402209ff | 1509 | static void |
6cf9ac28 | 1510 | propagate_block_delete_insn (rtx insn) |
402209ff JH |
1511 | { |
1512 | rtx inote = find_reg_note (insn, REG_LABEL, NULL_RTX); | |
f1330226 | 1513 | |
402209ff JH |
1514 | /* If the insn referred to a label, and that label was attached to |
1515 | an ADDR_VEC, it's safe to delete the ADDR_VEC. In fact, it's | |
1516 | pretty much mandatory to delete it, because the ADDR_VEC may be | |
1517 | referencing labels that no longer exist. | |
f1330226 | 1518 | |
402209ff JH |
1519 | INSN may reference a deleted label, particularly when a jump |
1520 | table has been optimized into a direct jump. There's no | |
1521 | real good way to fix up the reference to the deleted label | |
19f71cd7 | 1522 | when the label is deleted, so we just allow it here. */ |
0ab409ed | 1523 | |
402209ff | 1524 | if (inote && GET_CODE (inote) == CODE_LABEL) |
0ab409ed | 1525 | { |
402209ff JH |
1526 | rtx label = XEXP (inote, 0); |
1527 | rtx next; | |
0ab409ed | 1528 | |
402209ff JH |
1529 | /* The label may be forced if it has been put in the constant |
1530 | pool. If that is the only use we must discard the table | |
1531 | jump following it, but not the label itself. */ | |
1532 | if (LABEL_NUSES (label) == 1 + LABEL_PRESERVE_P (label) | |
1533 | && (next = next_nonnote_insn (label)) != NULL | |
1534 | && GET_CODE (next) == JUMP_INSN | |
1535 | && (GET_CODE (PATTERN (next)) == ADDR_VEC | |
1536 | || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)) | |
0ab409ed | 1537 | { |
402209ff JH |
1538 | rtx pat = PATTERN (next); |
1539 | int diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC; | |
1540 | int len = XVECLEN (pat, diff_vec_p); | |
1541 | int i; | |
f1330226 | 1542 | |
402209ff JH |
1543 | for (i = 0; i < len; i++) |
1544 | LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0))--; | |
0ab409ed | 1545 | |
3dec4024 JH |
1546 | delete_insn_and_edges (next); |
1547 | ndead++; | |
0ab409ed MH |
1548 | } |
1549 | } | |
1550 | ||
3dec4024 JH |
1551 | delete_insn_and_edges (insn); |
1552 | ndead++; | |
0ab409ed | 1553 | } |
e881bb1b | 1554 | |
402209ff JH |
1555 | /* Delete dead libcalls for propagate_block. Return the insn |
1556 | before the libcall. */ | |
e881bb1b | 1557 | |
402209ff | 1558 | static rtx |
6cf9ac28 | 1559 | propagate_block_delete_libcall (rtx insn, rtx note) |
402209ff JH |
1560 | { |
1561 | rtx first = XEXP (note, 0); | |
1562 | rtx before = PREV_INSN (first); | |
e881bb1b | 1563 | |
3dec4024 JH |
1564 | delete_insn_chain_and_edges (first, insn); |
1565 | ndead++; | |
402209ff | 1566 | return before; |
1e29ee12 JL |
1567 | } |
1568 | ||
402209ff JH |
1569 | /* Update the life-status of regs for one insn. Return the previous insn. */ |
1570 | ||
1571 | rtx | |
6cf9ac28 | 1572 | propagate_one_insn (struct propagate_block_info *pbi, rtx insn) |
1e29ee12 | 1573 | { |
402209ff JH |
1574 | rtx prev = PREV_INSN (insn); |
1575 | int flags = pbi->flags; | |
1576 | int insn_is_dead = 0; | |
1577 | int libcall_is_dead = 0; | |
1578 | rtx note; | |
1e29ee12 JL |
1579 | int i; |
1580 | ||
402209ff JH |
1581 | if (! INSN_P (insn)) |
1582 | return prev; | |
164d59e0 | 1583 | |
402209ff JH |
1584 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); |
1585 | if (flags & PROP_SCAN_DEAD_CODE) | |
1586 | { | |
1587 | insn_is_dead = insn_dead_p (pbi, PATTERN (insn), 0, REG_NOTES (insn)); | |
1588 | libcall_is_dead = (insn_is_dead && note != 0 | |
1589 | && libcall_dead_p (pbi, note, insn)); | |
1590 | } | |
e881bb1b | 1591 | |
402209ff JH |
1592 | /* If an instruction consists of just dead store(s) on final pass, |
1593 | delete it. */ | |
1594 | if ((flags & PROP_KILL_DEAD_CODE) && insn_is_dead) | |
e881bb1b | 1595 | { |
402209ff JH |
1596 | /* If we're trying to delete a prologue or epilogue instruction |
1597 | that isn't flagged as possibly being dead, something is wrong. | |
1598 | But if we are keeping the stack pointer depressed, we might well | |
1599 | be deleting insns that are used to compute the amount to update | |
1600 | it by, so they are fine. */ | |
1601 | if (reload_completed | |
1602 | && !(TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE | |
1603 | && (TYPE_RETURNS_STACK_DEPRESSED | |
1604 | (TREE_TYPE (current_function_decl)))) | |
1605 | && (((HAVE_epilogue || HAVE_prologue) | |
1606 | && prologue_epilogue_contains (insn)) | |
1607 | || (HAVE_sibcall_epilogue | |
1608 | && sibcall_epilogue_contains (insn))) | |
1609 | && find_reg_note (insn, REG_MAYBE_DEAD, NULL_RTX) == 0) | |
31fce3c4 | 1610 | fatal_insn ("Attempt to delete prologue/epilogue insn:", insn); |
e881bb1b | 1611 | |
402209ff JH |
1612 | /* Record sets. Do this even for dead instructions, since they |
1613 | would have killed the values if they hadn't been deleted. */ | |
1614 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1615 | |
402209ff JH |
1616 | /* CC0 is now known to be dead. Either this insn used it, |
1617 | in which case it doesn't anymore, or clobbered it, | |
1618 | so the next insn can't use it. */ | |
1619 | pbi->cc0_live = 0; | |
e881bb1b | 1620 | |
402209ff | 1621 | if (libcall_is_dead) |
607a6500 | 1622 | prev = propagate_block_delete_libcall ( insn, note); |
d35dfca9 JL |
1623 | else |
1624 | { | |
1625 | ||
b0ac73f8 JL |
1626 | /* If INSN contains a RETVAL note and is dead, but the libcall |
1627 | as a whole is not dead, then we want to remove INSN, but | |
1628 | not the whole libcall sequence. | |
1629 | ||
6cf9ac28 | 1630 | However, we need to also remove the dangling REG_LIBCALL |
b0ac73f8 JL |
1631 | note so that we do not have mis-matched LIBCALL/RETVAL |
1632 | notes. In theory we could find a new location for the | |
6cf9ac28 | 1633 | REG_RETVAL note, but it hardly seems worth the effort. |
b0ac73f8 JL |
1634 | |
1635 | NOTE at this point will be the RETVAL note if it exists. */ | |
d35dfca9 JL |
1636 | if (note) |
1637 | { | |
d35dfca9 | 1638 | rtx libcall_note; |
6cf9ac28 | 1639 | |
d35dfca9 JL |
1640 | libcall_note |
1641 | = find_reg_note (XEXP (note, 0), REG_LIBCALL, NULL_RTX); | |
1642 | remove_note (XEXP (note, 0), libcall_note); | |
1643 | } | |
b0ac73f8 JL |
1644 | |
1645 | /* Similarly if INSN contains a LIBCALL note, remove the | |
fbe5a4a6 | 1646 | dangling REG_RETVAL note. */ |
b0ac73f8 JL |
1647 | note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); |
1648 | if (note) | |
1649 | { | |
1650 | rtx retval_note; | |
1651 | ||
1652 | retval_note | |
1653 | = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL_RTX); | |
1654 | remove_note (XEXP (note, 0), retval_note); | |
1655 | } | |
1656 | ||
1657 | /* Now delete INSN. */ | |
d35dfca9 JL |
1658 | propagate_block_delete_insn (insn); |
1659 | } | |
e881bb1b | 1660 | |
402209ff JH |
1661 | return prev; |
1662 | } | |
e881bb1b | 1663 | |
402209ff JH |
1664 | /* See if this is an increment or decrement that can be merged into |
1665 | a following memory address. */ | |
1666 | #ifdef AUTO_INC_DEC | |
1667 | { | |
b3694847 | 1668 | rtx x = single_set (insn); |
e881bb1b | 1669 | |
402209ff JH |
1670 | /* Does this instruction increment or decrement a register? */ |
1671 | if ((flags & PROP_AUTOINC) | |
1672 | && x != 0 | |
1673 | && GET_CODE (SET_DEST (x)) == REG | |
1674 | && (GET_CODE (SET_SRC (x)) == PLUS | |
1675 | || GET_CODE (SET_SRC (x)) == MINUS) | |
1676 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) | |
1677 | && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT | |
1678 | /* Ok, look for a following memory ref we can combine with. | |
1679 | If one is found, change the memory ref to a PRE_INC | |
1680 | or PRE_DEC, cancel this insn, and return 1. | |
1681 | Return 0 if nothing has been done. */ | |
1682 | && try_pre_increment_1 (pbi, insn)) | |
1683 | return prev; | |
1684 | } | |
1685 | #endif /* AUTO_INC_DEC */ | |
e881bb1b | 1686 | |
402209ff | 1687 | CLEAR_REG_SET (pbi->new_set); |
e881bb1b | 1688 | |
402209ff JH |
1689 | /* If this is not the final pass, and this insn is copying the value of |
1690 | a library call and it's dead, don't scan the insns that perform the | |
1691 | library call, so that the call's arguments are not marked live. */ | |
1692 | if (libcall_is_dead) | |
e881bb1b | 1693 | { |
402209ff JH |
1694 | /* Record the death of the dest reg. */ |
1695 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1696 | |
402209ff JH |
1697 | insn = XEXP (note, 0); |
1698 | return PREV_INSN (insn); | |
e881bb1b | 1699 | } |
402209ff JH |
1700 | else if (GET_CODE (PATTERN (insn)) == SET |
1701 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1702 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1703 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx | |
1704 | && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT) | |
1705 | /* We have an insn to pop a constant amount off the stack. | |
1706 | (Such insns use PLUS regardless of the direction of the stack, | |
1707 | and any insn to adjust the stack by a constant is always a pop.) | |
fe4b3c79 JL |
1708 | These insns, if not dead stores, have no effect on life, though |
1709 | they do have an effect on the memory stores we are tracking. */ | |
1710 | invalidate_mems_from_set (pbi, stack_pointer_rtx); | |
402209ff JH |
1711 | else |
1712 | { | |
5a133afd | 1713 | rtx note; |
402209ff JH |
1714 | /* Any regs live at the time of a call instruction must not go |
1715 | in a register clobbered by calls. Find all regs now live and | |
1716 | record this for them. */ | |
e881bb1b | 1717 | |
402209ff JH |
1718 | if (GET_CODE (insn) == CALL_INSN && (flags & PROP_REG_INFO)) |
1719 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, | |
1720 | { REG_N_CALLS_CROSSED (i)++; }); | |
e881bb1b | 1721 | |
402209ff JH |
1722 | /* Record sets. Do this even for dead instructions, since they |
1723 | would have killed the values if they hadn't been deleted. */ | |
1724 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1725 | |
402209ff JH |
1726 | if (GET_CODE (insn) == CALL_INSN) |
1727 | { | |
d444b5e8 RH |
1728 | regset live_at_end; |
1729 | bool sibcall_p; | |
402209ff | 1730 | rtx note, cond; |
d444b5e8 | 1731 | int i; |
e881bb1b | 1732 | |
402209ff JH |
1733 | cond = NULL_RTX; |
1734 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
1735 | cond = COND_EXEC_TEST (PATTERN (insn)); | |
e881bb1b | 1736 | |
fe4b3c79 JL |
1737 | /* Non-constant calls clobber memory, constant calls do not |
1738 | clobber memory, though they may clobber outgoing arguments | |
1739 | on the stack. */ | |
402209ff JH |
1740 | if (! CONST_OR_PURE_CALL_P (insn)) |
1741 | { | |
1742 | free_EXPR_LIST_list (&pbi->mem_set_list); | |
1743 | pbi->mem_set_list_len = 0; | |
1744 | } | |
dd3f0101 | 1745 | else |
fe4b3c79 | 1746 | invalidate_mems_from_set (pbi, stack_pointer_rtx); |
e881bb1b | 1747 | |
402209ff JH |
1748 | /* There may be extra registers to be clobbered. */ |
1749 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
1750 | note; | |
1751 | note = XEXP (note, 1)) | |
1752 | if (GET_CODE (XEXP (note, 0)) == CLOBBER) | |
1753 | mark_set_1 (pbi, CLOBBER, XEXP (XEXP (note, 0), 0), | |
1754 | cond, insn, pbi->flags); | |
c9bacfdb | 1755 | |
d444b5e8 | 1756 | /* Calls change all call-used and global registers; sibcalls do not |
99af0d26 RH |
1757 | clobber anything that must be preserved at end-of-function, |
1758 | except for return values. */ | |
d444b5e8 RH |
1759 | |
1760 | sibcall_p = SIBLING_CALL_P (insn); | |
1761 | live_at_end = EXIT_BLOCK_PTR->global_live_at_start; | |
402209ff | 1762 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
d444b5e8 | 1763 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i) |
99af0d26 RH |
1764 | && ! (sibcall_p |
1765 | && REGNO_REG_SET_P (live_at_end, i) | |
57856e4d R |
1766 | && ! refers_to_regno_p (i, i+1, |
1767 | current_function_return_rtx, | |
1768 | (rtx *) 0))) | |
402209ff JH |
1769 | { |
1770 | /* We do not want REG_UNUSED notes for these registers. */ | |
e50126e8 | 1771 | mark_set_1 (pbi, CLOBBER, regno_reg_rtx[i], cond, insn, |
402209ff JH |
1772 | pbi->flags & ~(PROP_DEATH_NOTES | PROP_REG_INFO)); |
1773 | } | |
1774 | } | |
312f6255 | 1775 | |
402209ff JH |
1776 | /* If an insn doesn't use CC0, it becomes dead since we assume |
1777 | that every insn clobbers it. So show it dead here; | |
1778 | mark_used_regs will set it live if it is referenced. */ | |
1779 | pbi->cc0_live = 0; | |
e881bb1b | 1780 | |
402209ff JH |
1781 | /* Record uses. */ |
1782 | if (! insn_is_dead) | |
1783 | mark_used_regs (pbi, PATTERN (insn), NULL_RTX, insn); | |
5a133afd JH |
1784 | if ((flags & PROP_EQUAL_NOTES) |
1785 | && ((note = find_reg_note (insn, REG_EQUAL, NULL_RTX)) | |
1786 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)))) | |
1787 | mark_used_regs (pbi, XEXP (note, 0), NULL_RTX, insn); | |
e881bb1b | 1788 | |
402209ff JH |
1789 | /* Sometimes we may have inserted something before INSN (such as a move) |
1790 | when we make an auto-inc. So ensure we will scan those insns. */ | |
1791 | #ifdef AUTO_INC_DEC | |
1792 | prev = PREV_INSN (insn); | |
1793 | #endif | |
e881bb1b | 1794 | |
402209ff JH |
1795 | if (! insn_is_dead && GET_CODE (insn) == CALL_INSN) |
1796 | { | |
b3694847 | 1797 | int i; |
402209ff | 1798 | rtx note, cond; |
e881bb1b | 1799 | |
402209ff JH |
1800 | cond = NULL_RTX; |
1801 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
1802 | cond = COND_EXEC_TEST (PATTERN (insn)); | |
e881bb1b | 1803 | |
ee960939 OH |
1804 | /* Calls use their arguments, and may clobber memory which |
1805 | address involves some register. */ | |
402209ff JH |
1806 | for (note = CALL_INSN_FUNCTION_USAGE (insn); |
1807 | note; | |
1808 | note = XEXP (note, 1)) | |
ee960939 OH |
1809 | /* We find USE or CLOBBER entities in a FUNCTION_USAGE list: both |
1810 | of which mark_used_regs knows how to handle. */ | |
1811 | mark_used_regs (pbi, XEXP (XEXP (note, 0), 0), cond, insn); | |
e881bb1b | 1812 | |
402209ff JH |
1813 | /* The stack ptr is used (honorarily) by a CALL insn. */ |
1814 | SET_REGNO_REG_SET (pbi->reg_live, STACK_POINTER_REGNUM); | |
e881bb1b | 1815 | |
402209ff JH |
1816 | /* Calls may also reference any of the global registers, |
1817 | so they are made live. */ | |
1818 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1819 | if (global_regs[i]) | |
e50126e8 | 1820 | mark_used_reg (pbi, regno_reg_rtx[i], cond, insn); |
402209ff | 1821 | } |
e881bb1b RH |
1822 | } |
1823 | ||
402209ff JH |
1824 | /* On final pass, update counts of how many insns in which each reg |
1825 | is live. */ | |
1826 | if (flags & PROP_REG_INFO) | |
1827 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, | |
1828 | { REG_LIVE_LENGTH (i)++; }); | |
1829 | ||
1830 | return prev; | |
e881bb1b RH |
1831 | } |
1832 | ||
402209ff JH |
1833 | /* Initialize a propagate_block_info struct for public consumption. |
1834 | Note that the structure itself is opaque to this file, but that | |
1835 | the user can use the regsets provided here. */ | |
e881bb1b | 1836 | |
402209ff | 1837 | struct propagate_block_info * |
6cf9ac28 AJ |
1838 | init_propagate_block_info (basic_block bb, regset live, regset local_set, |
1839 | regset cond_local_set, int flags) | |
e881bb1b | 1840 | { |
402209ff | 1841 | struct propagate_block_info *pbi = xmalloc (sizeof (*pbi)); |
e881bb1b | 1842 | |
402209ff JH |
1843 | pbi->bb = bb; |
1844 | pbi->reg_live = live; | |
1845 | pbi->mem_set_list = NULL_RTX; | |
1846 | pbi->mem_set_list_len = 0; | |
1847 | pbi->local_set = local_set; | |
1848 | pbi->cond_local_set = cond_local_set; | |
1849 | pbi->cc0_live = 0; | |
1850 | pbi->flags = flags; | |
c9bacfdb | 1851 | |
402209ff | 1852 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) |
703ad42b | 1853 | pbi->reg_next_use = xcalloc (max_reg_num (), sizeof (rtx)); |
e881bb1b | 1854 | else |
402209ff | 1855 | pbi->reg_next_use = NULL; |
e6cfb550 | 1856 | |
402209ff | 1857 | pbi->new_set = BITMAP_XMALLOC (); |
7a442791 | 1858 | |
402209ff JH |
1859 | #ifdef HAVE_conditional_execution |
1860 | pbi->reg_cond_dead = splay_tree_new (splay_tree_compare_ints, NULL, | |
1861 | free_reg_cond_life_info); | |
1862 | pbi->reg_cond_reg = BITMAP_XMALLOC (); | |
7a442791 | 1863 | |
402209ff JH |
1864 | /* If this block ends in a conditional branch, for each register live |
1865 | from one side of the branch and not the other, record the register | |
1866 | as conditionally dead. */ | |
1867 | if (GET_CODE (bb->end) == JUMP_INSN | |
1868 | && any_condjump_p (bb->end)) | |
1869 | { | |
1870 | regset_head diff_head; | |
1871 | regset diff = INITIALIZE_REG_SET (diff_head); | |
1872 | basic_block bb_true, bb_false; | |
1873 | rtx cond_true, cond_false, set_src; | |
1874 | int i; | |
421382ac | 1875 | |
402209ff JH |
1876 | /* Identify the successor blocks. */ |
1877 | bb_true = bb->succ->dest; | |
1878 | if (bb->succ->succ_next != NULL) | |
1879 | { | |
1880 | bb_false = bb->succ->succ_next->dest; | |
c9bacfdb | 1881 | |
402209ff JH |
1882 | if (bb->succ->flags & EDGE_FALLTHRU) |
1883 | { | |
1884 | basic_block t = bb_false; | |
1885 | bb_false = bb_true; | |
1886 | bb_true = t; | |
1887 | } | |
1888 | else if (! (bb->succ->succ_next->flags & EDGE_FALLTHRU)) | |
1889 | abort (); | |
1890 | } | |
1891 | else | |
1892 | { | |
1893 | /* This can happen with a conditional jump to the next insn. */ | |
1894 | if (JUMP_LABEL (bb->end) != bb_true->head) | |
1895 | abort (); | |
421382ac | 1896 | |
402209ff JH |
1897 | /* Simplest way to do nothing. */ |
1898 | bb_false = bb_true; | |
1899 | } | |
be1bb652 | 1900 | |
402209ff JH |
1901 | /* Extract the condition from the branch. */ |
1902 | set_src = SET_SRC (pc_set (bb->end)); | |
1903 | cond_true = XEXP (set_src, 0); | |
1904 | cond_false = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond_true)), | |
1905 | GET_MODE (cond_true), XEXP (cond_true, 0), | |
1906 | XEXP (cond_true, 1)); | |
1907 | if (GET_CODE (XEXP (set_src, 1)) == PC) | |
1908 | { | |
1909 | rtx t = cond_false; | |
1910 | cond_false = cond_true; | |
1911 | cond_true = t; | |
1912 | } | |
be1bb652 | 1913 | |
402209ff JH |
1914 | /* Compute which register lead different lives in the successors. */ |
1915 | if (bitmap_operation (diff, bb_true->global_live_at_start, | |
1916 | bb_false->global_live_at_start, BITMAP_XOR)) | |
1917 | { | |
1918 | rtx reg = XEXP (cond_true, 0); | |
be1bb652 | 1919 | |
402209ff JH |
1920 | if (GET_CODE (reg) == SUBREG) |
1921 | reg = SUBREG_REG (reg); | |
dc108b7a | 1922 | |
402209ff JH |
1923 | if (GET_CODE (reg) != REG) |
1924 | abort (); | |
dc108b7a | 1925 | |
402209ff | 1926 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (reg)); |
dc108b7a | 1927 | |
402209ff JH |
1928 | /* For each such register, mark it conditionally dead. */ |
1929 | EXECUTE_IF_SET_IN_REG_SET | |
1930 | (diff, 0, i, | |
1931 | { | |
1932 | struct reg_cond_life_info *rcli; | |
1933 | rtx cond; | |
dc108b7a | 1934 | |
703ad42b | 1935 | rcli = xmalloc (sizeof (*rcli)); |
dc108b7a | 1936 | |
402209ff JH |
1937 | if (REGNO_REG_SET_P (bb_true->global_live_at_start, i)) |
1938 | cond = cond_false; | |
1939 | else | |
1940 | cond = cond_true; | |
1941 | rcli->condition = cond; | |
1942 | rcli->stores = const0_rtx; | |
1943 | rcli->orig_condition = cond; | |
dc108b7a | 1944 | |
402209ff JH |
1945 | splay_tree_insert (pbi->reg_cond_dead, i, |
1946 | (splay_tree_value) rcli); | |
1947 | }); | |
dc108b7a | 1948 | } |
dc108b7a | 1949 | |
402209ff | 1950 | FREE_REG_SET (diff); |
dc108b7a | 1951 | } |
402209ff JH |
1952 | #endif |
1953 | ||
1954 | /* If this block has no successors, any stores to the frame that aren't | |
1955 | used later in the block are dead. So make a pass over the block | |
1956 | recording any such that are made and show them dead at the end. We do | |
1957 | a very conservative and simple job here. */ | |
1958 | if (optimize | |
1959 | && ! (TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE | |
1960 | && (TYPE_RETURNS_STACK_DEPRESSED | |
1961 | (TREE_TYPE (current_function_decl)))) | |
5149f070 | 1962 | && (flags & PROP_SCAN_DEAD_STORES) |
402209ff JH |
1963 | && (bb->succ == NULL |
1964 | || (bb->succ->succ_next == NULL | |
1965 | && bb->succ->dest == EXIT_BLOCK_PTR | |
1966 | && ! current_function_calls_eh_return))) | |
dc108b7a | 1967 | { |
402209ff JH |
1968 | rtx insn, set; |
1969 | for (insn = bb->end; insn != bb->head; insn = PREV_INSN (insn)) | |
1970 | if (GET_CODE (insn) == INSN | |
1971 | && (set = single_set (insn)) | |
1972 | && GET_CODE (SET_DEST (set)) == MEM) | |
1973 | { | |
1974 | rtx mem = SET_DEST (set); | |
1975 | rtx canon_mem = canon_rtx (mem); | |
1976 | ||
1977 | /* This optimization is performed by faking a store to the | |
1978 | memory at the end of the block. This doesn't work for | |
1979 | unchanging memories because multiple stores to unchanging | |
1980 | memory is illegal and alias analysis doesn't consider it. */ | |
1981 | if (RTX_UNCHANGING_P (canon_mem)) | |
1982 | continue; | |
1983 | ||
1984 | if (XEXP (canon_mem, 0) == frame_pointer_rtx | |
1985 | || (GET_CODE (XEXP (canon_mem, 0)) == PLUS | |
1986 | && XEXP (XEXP (canon_mem, 0), 0) == frame_pointer_rtx | |
1987 | && GET_CODE (XEXP (XEXP (canon_mem, 0), 1)) == CONST_INT)) | |
1988 | add_to_mem_set_list (pbi, canon_mem); | |
1989 | } | |
dc108b7a | 1990 | } |
dc108b7a | 1991 | |
402209ff | 1992 | return pbi; |
dc108b7a RH |
1993 | } |
1994 | ||
402209ff | 1995 | /* Release a propagate_block_info struct. */ |
558389e3 | 1996 | |
402209ff | 1997 | void |
6cf9ac28 | 1998 | free_propagate_block_info (struct propagate_block_info *pbi) |
558389e3 | 1999 | { |
402209ff | 2000 | free_EXPR_LIST_list (&pbi->mem_set_list); |
558389e3 | 2001 | |
402209ff | 2002 | BITMAP_XFREE (pbi->new_set); |
558389e3 | 2003 | |
402209ff JH |
2004 | #ifdef HAVE_conditional_execution |
2005 | splay_tree_delete (pbi->reg_cond_dead); | |
2006 | BITMAP_XFREE (pbi->reg_cond_reg); | |
2007 | #endif | |
558389e3 | 2008 | |
402209ff JH |
2009 | if (pbi->reg_next_use) |
2010 | free (pbi->reg_next_use); | |
558389e3 | 2011 | |
402209ff JH |
2012 | free (pbi); |
2013 | } | |
336a6399 | 2014 | |
402209ff JH |
2015 | /* Compute the registers live at the beginning of a basic block BB from |
2016 | those live at the end. | |
c9bacfdb | 2017 | |
402209ff JH |
2018 | When called, REG_LIVE contains those live at the end. On return, it |
2019 | contains those live at the beginning. | |
ee7b8369 | 2020 | |
402209ff JH |
2021 | LOCAL_SET, if non-null, will be set with all registers killed |
2022 | unconditionally by this basic block. | |
2023 | Likewise, COND_LOCAL_SET, if non-null, will be set with all registers | |
2024 | killed conditionally by this basic block. If there is any unconditional | |
2025 | set of a register, then the corresponding bit will be set in LOCAL_SET | |
2026 | and cleared in COND_LOCAL_SET. | |
2027 | It is valid for LOCAL_SET and COND_LOCAL_SET to be the same set. In this | |
2028 | case, the resulting set will be equal to the union of the two sets that | |
2029 | would otherwise be computed. | |
558389e3 | 2030 | |
cc2902df | 2031 | Return nonzero if an INSN is deleted (i.e. by dead code removal). */ |
558389e3 | 2032 | |
402209ff | 2033 | int |
6cf9ac28 AJ |
2034 | propagate_block (basic_block bb, regset live, regset local_set, |
2035 | regset cond_local_set, int flags) | |
558389e3 | 2036 | { |
402209ff JH |
2037 | struct propagate_block_info *pbi; |
2038 | rtx insn, prev; | |
2039 | int changed; | |
558389e3 | 2040 | |
402209ff | 2041 | pbi = init_propagate_block_info (bb, live, local_set, cond_local_set, flags); |
be1bb652 | 2042 | |
402209ff | 2043 | if (flags & PROP_REG_INFO) |
be1bb652 | 2044 | { |
b3694847 | 2045 | int i; |
558389e3 | 2046 | |
402209ff JH |
2047 | /* Process the regs live at the end of the block. |
2048 | Mark them as not local to any one basic block. */ | |
2049 | EXECUTE_IF_SET_IN_REG_SET (live, 0, i, | |
2050 | { REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; }); | |
2051 | } | |
558389e3 | 2052 | |
402209ff | 2053 | /* Scan the block an insn at a time from end to beginning. */ |
558389e3 | 2054 | |
402209ff JH |
2055 | changed = 0; |
2056 | for (insn = bb->end;; insn = prev) | |
2057 | { | |
2058 | /* If this is a call to `setjmp' et al, warn if any | |
2059 | non-volatile datum is live. */ | |
2060 | if ((flags & PROP_REG_INFO) | |
2061 | && GET_CODE (insn) == CALL_INSN | |
2062 | && find_reg_note (insn, REG_SETJMP, NULL)) | |
2063 | IOR_REG_SET (regs_live_at_setjmp, pbi->reg_live); | |
558389e3 | 2064 | |
402209ff | 2065 | prev = propagate_one_insn (pbi, insn); |
bc35512f JH |
2066 | if (!prev) |
2067 | changed |= insn != get_insns (); | |
2068 | else | |
2069 | changed |= NEXT_INSN (prev) != insn; | |
336a6399 | 2070 | |
402209ff JH |
2071 | if (insn == bb->head) |
2072 | break; | |
336a6399 RH |
2073 | } |
2074 | ||
402209ff JH |
2075 | free_propagate_block_info (pbi); |
2076 | ||
2077 | return changed; | |
558389e3 | 2078 | } |
402209ff JH |
2079 | \f |
2080 | /* Return 1 if X (the body of an insn, or part of it) is just dead stores | |
2081 | (SET expressions whose destinations are registers dead after the insn). | |
2082 | NEEDED is the regset that says which regs are alive after the insn. | |
2083 | ||
cc2902df | 2084 | Unless CALL_OK is nonzero, an insn is needed if it contains a CALL. |
558389e3 | 2085 | |
402209ff JH |
2086 | If X is the entire body of an insn, NOTES contains the reg notes |
2087 | pertaining to the insn. */ | |
dc2ede84 | 2088 | |
dc2ede84 | 2089 | static int |
6cf9ac28 AJ |
2090 | insn_dead_p (struct propagate_block_info *pbi, rtx x, int call_ok, |
2091 | rtx notes ATTRIBUTE_UNUSED) | |
dc2ede84 | 2092 | { |
402209ff | 2093 | enum rtx_code code = GET_CODE (x); |
be1bb652 | 2094 | |
a646f6cc AH |
2095 | /* Don't eliminate insns that may trap. */ |
2096 | if (flag_non_call_exceptions && may_trap_p (x)) | |
2097 | return 0; | |
2098 | ||
402209ff | 2099 | #ifdef AUTO_INC_DEC |
ff6051b7 GK |
2100 | /* As flow is invoked after combine, we must take existing AUTO_INC |
2101 | expressions into account. */ | |
2102 | for (; notes; notes = XEXP (notes, 1)) | |
e881bb1b | 2103 | { |
ff6051b7 | 2104 | if (REG_NOTE_KIND (notes) == REG_INC) |
336a6399 | 2105 | { |
ff6051b7 | 2106 | int regno = REGNO (XEXP (notes, 0)); |
4a913dd6 | 2107 | |
ff6051b7 GK |
2108 | /* Don't delete insns to set global regs. */ |
2109 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2110 | || REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2111 | return 0; | |
402209ff | 2112 | } |
336a6399 | 2113 | } |
402209ff | 2114 | #endif |
4793dca1 | 2115 | |
402209ff JH |
2116 | /* If setting something that's a reg or part of one, |
2117 | see if that register's altered value will be live. */ | |
558389e3 | 2118 | |
402209ff | 2119 | if (code == SET) |
7a442791 | 2120 | { |
402209ff | 2121 | rtx r = SET_DEST (x); |
b02eea61 | 2122 | |
402209ff JH |
2123 | #ifdef HAVE_cc0 |
2124 | if (GET_CODE (r) == CC0) | |
2125 | return ! pbi->cc0_live; | |
2126 | #endif | |
b9f22704 | 2127 | |
402209ff JH |
2128 | /* A SET that is a subroutine call cannot be dead. */ |
2129 | if (GET_CODE (SET_SRC (x)) == CALL) | |
2130 | { | |
2131 | if (! call_ok) | |
2132 | return 0; | |
2133 | } | |
b02eea61 | 2134 | |
402209ff JH |
2135 | /* Don't eliminate loads from volatile memory or volatile asms. */ |
2136 | else if (volatile_refs_p (SET_SRC (x))) | |
2137 | return 0; | |
7a442791 | 2138 | |
402209ff | 2139 | if (GET_CODE (r) == MEM) |
7a442791 | 2140 | { |
402209ff | 2141 | rtx temp, canon_r; |
b9f22704 | 2142 | |
402209ff JH |
2143 | if (MEM_VOLATILE_P (r) || GET_MODE (r) == BLKmode) |
2144 | return 0; | |
0068fd96 | 2145 | |
402209ff | 2146 | canon_r = canon_rtx (r); |
0068fd96 | 2147 | |
402209ff JH |
2148 | /* Walk the set of memory locations we are currently tracking |
2149 | and see if one is an identical match to this memory location. | |
2150 | If so, this memory write is dead (remember, we're walking | |
2151 | backwards from the end of the block to the start). Since | |
2152 | rtx_equal_p does not check the alias set or flags, we also | |
2153 | must have the potential for them to conflict (anti_dependence). */ | |
2154 | for (temp = pbi->mem_set_list; temp != 0; temp = XEXP (temp, 1)) | |
2155 | if (anti_dependence (r, XEXP (temp, 0))) | |
2156 | { | |
2157 | rtx mem = XEXP (temp, 0); | |
0068fd96 | 2158 | |
402209ff JH |
2159 | if (rtx_equal_p (XEXP (canon_r, 0), XEXP (mem, 0)) |
2160 | && (GET_MODE_SIZE (GET_MODE (canon_r)) | |
2161 | <= GET_MODE_SIZE (GET_MODE (mem)))) | |
2162 | return 1; | |
7a442791 | 2163 | |
402209ff JH |
2164 | #ifdef AUTO_INC_DEC |
2165 | /* Check if memory reference matches an auto increment. Only | |
2166 | post increment/decrement or modify are valid. */ | |
2167 | if (GET_MODE (mem) == GET_MODE (r) | |
2168 | && (GET_CODE (XEXP (mem, 0)) == POST_DEC | |
2169 | || GET_CODE (XEXP (mem, 0)) == POST_INC | |
2170 | || GET_CODE (XEXP (mem, 0)) == POST_MODIFY) | |
2171 | && GET_MODE (XEXP (mem, 0)) == GET_MODE (r) | |
2172 | && rtx_equal_p (XEXP (XEXP (mem, 0), 0), XEXP (r, 0))) | |
2173 | return 1; | |
2174 | #endif | |
2175 | } | |
b02eea61 | 2176 | } |
d69d0316 | 2177 | else |
7a442791 | 2178 | { |
402209ff JH |
2179 | while (GET_CODE (r) == SUBREG |
2180 | || GET_CODE (r) == STRICT_LOW_PART | |
2181 | || GET_CODE (r) == ZERO_EXTRACT) | |
2182 | r = XEXP (r, 0); | |
b02eea61 | 2183 | |
402209ff | 2184 | if (GET_CODE (r) == REG) |
d69d0316 | 2185 | { |
402209ff | 2186 | int regno = REGNO (r); |
b02eea61 | 2187 | |
402209ff JH |
2188 | /* Obvious. */ |
2189 | if (REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2190 | return 0; | |
7a442791 | 2191 | |
402209ff JH |
2192 | /* If this is a hard register, verify that subsequent |
2193 | words are not needed. */ | |
2194 | if (regno < FIRST_PSEUDO_REGISTER) | |
2195 | { | |
2196 | int n = HARD_REGNO_NREGS (regno, GET_MODE (r)); | |
46fac664 | 2197 | |
402209ff JH |
2198 | while (--n > 0) |
2199 | if (REGNO_REG_SET_P (pbi->reg_live, regno+n)) | |
2200 | return 0; | |
2201 | } | |
46fac664 | 2202 | |
402209ff JH |
2203 | /* Don't delete insns to set global regs. */ |
2204 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2205 | return 0; | |
46fac664 | 2206 | |
402209ff JH |
2207 | /* Make sure insns to set the stack pointer aren't deleted. */ |
2208 | if (regno == STACK_POINTER_REGNUM) | |
2209 | return 0; | |
b02eea61 | 2210 | |
402209ff JH |
2211 | /* ??? These bits might be redundant with the force live bits |
2212 | in calculate_global_regs_live. We would delete from | |
2213 | sequential sets; whether this actually affects real code | |
2214 | for anything but the stack pointer I don't know. */ | |
2215 | /* Make sure insns to set the frame pointer aren't deleted. */ | |
2216 | if (regno == FRAME_POINTER_REGNUM | |
2217 | && (! reload_completed || frame_pointer_needed)) | |
2218 | return 0; | |
2219 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
2220 | if (regno == HARD_FRAME_POINTER_REGNUM | |
2221 | && (! reload_completed || frame_pointer_needed)) | |
2222 | return 0; | |
2223 | #endif | |
b02eea61 | 2224 | |
402209ff JH |
2225 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2226 | /* Make sure insns to set arg pointer are never deleted | |
2227 | (if the arg pointer isn't fixed, there will be a USE | |
2228 | for it, so we can treat it normally). */ | |
2229 | if (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2230 | return 0; | |
2231 | #endif | |
46fac664 | 2232 | |
402209ff JH |
2233 | /* Otherwise, the set is dead. */ |
2234 | return 1; | |
2235 | } | |
2236 | } | |
2237 | } | |
46fac664 | 2238 | |
402209ff JH |
2239 | /* If performing several activities, insn is dead if each activity |
2240 | is individually dead. Also, CLOBBERs and USEs can be ignored; a | |
2241 | CLOBBER or USE that's inside a PARALLEL doesn't make the insn | |
2242 | worth keeping. */ | |
2243 | else if (code == PARALLEL) | |
2244 | { | |
2245 | int i = XVECLEN (x, 0); | |
46fac664 | 2246 | |
402209ff JH |
2247 | for (i--; i >= 0; i--) |
2248 | if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER | |
2249 | && GET_CODE (XVECEXP (x, 0, i)) != USE | |
2250 | && ! insn_dead_p (pbi, XVECEXP (x, 0, i), call_ok, NULL_RTX)) | |
2251 | return 0; | |
46fac664 | 2252 | |
402209ff JH |
2253 | return 1; |
2254 | } | |
46fac664 | 2255 | |
402209ff JH |
2256 | /* A CLOBBER of a pseudo-register that is dead serves no purpose. That |
2257 | is not necessarily true for hard registers. */ | |
2258 | else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == REG | |
2259 | && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER | |
2260 | && ! REGNO_REG_SET_P (pbi->reg_live, REGNO (XEXP (x, 0)))) | |
2261 | return 1; | |
46fac664 | 2262 | |
402209ff JH |
2263 | /* We do not check other CLOBBER or USE here. An insn consisting of just |
2264 | a CLOBBER or just a USE should not be deleted. */ | |
2265 | return 0; | |
2266 | } | |
46fac664 | 2267 | |
402209ff JH |
2268 | /* If INSN is the last insn in a libcall, and assuming INSN is dead, |
2269 | return 1 if the entire library call is dead. | |
2270 | This is true if INSN copies a register (hard or pseudo) | |
2271 | and if the hard return reg of the call insn is dead. | |
2272 | (The caller should have tested the destination of the SET inside | |
2273 | INSN already for death.) | |
46fac664 | 2274 | |
402209ff JH |
2275 | If this insn doesn't just copy a register, then we don't |
2276 | have an ordinary libcall. In that case, cse could not have | |
2277 | managed to substitute the source for the dest later on, | |
2278 | so we can assume the libcall is dead. | |
46fac664 | 2279 | |
402209ff JH |
2280 | PBI is the block info giving pseudoregs live before this insn. |
2281 | NOTE is the REG_RETVAL note of the insn. */ | |
46fac664 | 2282 | |
402209ff | 2283 | static int |
6cf9ac28 | 2284 | libcall_dead_p (struct propagate_block_info *pbi, rtx note, rtx insn) |
402209ff JH |
2285 | { |
2286 | rtx x = single_set (insn); | |
46fac664 | 2287 | |
402209ff JH |
2288 | if (x) |
2289 | { | |
b3694847 | 2290 | rtx r = SET_SRC (x); |
46fac664 | 2291 | |
402209ff JH |
2292 | if (GET_CODE (r) == REG) |
2293 | { | |
2294 | rtx call = XEXP (note, 0); | |
2295 | rtx call_pat; | |
b3694847 | 2296 | int i; |
46fac664 | 2297 | |
402209ff JH |
2298 | /* Find the call insn. */ |
2299 | while (call != insn && GET_CODE (call) != CALL_INSN) | |
2300 | call = NEXT_INSN (call); | |
46fac664 | 2301 | |
402209ff JH |
2302 | /* If there is none, do nothing special, |
2303 | since ordinary death handling can understand these insns. */ | |
2304 | if (call == insn) | |
2305 | return 0; | |
b02eea61 | 2306 | |
402209ff JH |
2307 | /* See if the hard reg holding the value is dead. |
2308 | If this is a PARALLEL, find the call within it. */ | |
2309 | call_pat = PATTERN (call); | |
2310 | if (GET_CODE (call_pat) == PARALLEL) | |
46fac664 | 2311 | { |
402209ff JH |
2312 | for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--) |
2313 | if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET | |
2314 | && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL) | |
2315 | break; | |
2316 | ||
2317 | /* This may be a library call that is returning a value | |
2318 | via invisible pointer. Do nothing special, since | |
2319 | ordinary death handling can understand these insns. */ | |
2320 | if (i < 0) | |
2321 | return 0; | |
2322 | ||
2323 | call_pat = XVECEXP (call_pat, 0, i); | |
46fac664 | 2324 | } |
46fac664 | 2325 | |
402209ff | 2326 | return insn_dead_p (pbi, call_pat, 1, REG_NOTES (call)); |
46fac664 | 2327 | } |
46fac664 | 2328 | } |
402209ff JH |
2329 | return 1; |
2330 | } | |
46fac664 | 2331 | |
402209ff JH |
2332 | /* Return 1 if register REGNO was used before it was set, i.e. if it is |
2333 | live at function entry. Don't count global register variables, variables | |
2334 | in registers that can be used for function arg passing, or variables in | |
2335 | fixed hard registers. */ | |
b02eea61 | 2336 | |
402209ff | 2337 | int |
6cf9ac28 | 2338 | regno_uninitialized (unsigned int regno) |
402209ff | 2339 | { |
0b17ab2f | 2340 | if (n_basic_blocks == 0 |
402209ff JH |
2341 | || (regno < FIRST_PSEUDO_REGISTER |
2342 | && (global_regs[regno] | |
2343 | || fixed_regs[regno] | |
2344 | || FUNCTION_ARG_REGNO_P (regno)))) | |
2345 | return 0; | |
46fac664 | 2346 | |
cdd1f01b | 2347 | return REGNO_REG_SET_P (ENTRY_BLOCK_PTR->global_live_at_end, regno); |
46fac664 JH |
2348 | } |
2349 | ||
402209ff JH |
2350 | /* 1 if register REGNO was alive at a place where `setjmp' was called |
2351 | and was set more than once or is an argument. | |
2352 | Such regs may be clobbered by `longjmp'. */ | |
b02eea61 | 2353 | |
402209ff | 2354 | int |
6cf9ac28 | 2355 | regno_clobbered_at_setjmp (int regno) |
402209ff | 2356 | { |
0b17ab2f | 2357 | if (n_basic_blocks == 0) |
402209ff JH |
2358 | return 0; |
2359 | ||
2360 | return ((REG_N_SETS (regno) > 1 | |
cdd1f01b | 2361 | || REGNO_REG_SET_P (ENTRY_BLOCK_PTR->global_live_at_end, regno)) |
402209ff JH |
2362 | && REGNO_REG_SET_P (regs_live_at_setjmp, regno)); |
2363 | } | |
2364 | \f | |
2365 | /* Add MEM to PBI->MEM_SET_LIST. MEM should be canonical. Respect the | |
2366 | maximal list size; look for overlaps in mode and select the largest. */ | |
2367 | static void | |
6cf9ac28 | 2368 | add_to_mem_set_list (struct propagate_block_info *pbi, rtx mem) |
46fac664 | 2369 | { |
402209ff JH |
2370 | rtx i; |
2371 | ||
2372 | /* We don't know how large a BLKmode store is, so we must not | |
2373 | take them into consideration. */ | |
2374 | if (GET_MODE (mem) == BLKmode) | |
2375 | return; | |
2376 | ||
2377 | for (i = pbi->mem_set_list; i ; i = XEXP (i, 1)) | |
46fac664 | 2378 | { |
402209ff JH |
2379 | rtx e = XEXP (i, 0); |
2380 | if (rtx_equal_p (XEXP (mem, 0), XEXP (e, 0))) | |
46fac664 | 2381 | { |
402209ff | 2382 | if (GET_MODE_SIZE (GET_MODE (mem)) > GET_MODE_SIZE (GET_MODE (e))) |
b02eea61 | 2383 | { |
402209ff JH |
2384 | #ifdef AUTO_INC_DEC |
2385 | /* If we must store a copy of the mem, we can just modify | |
2386 | the mode of the stored copy. */ | |
2387 | if (pbi->flags & PROP_AUTOINC) | |
2388 | PUT_MODE (e, GET_MODE (mem)); | |
2389 | else | |
2390 | #endif | |
2391 | XEXP (i, 0) = mem; | |
b02eea61 | 2392 | } |
402209ff | 2393 | return; |
46fac664 | 2394 | } |
46fac664 | 2395 | } |
b02eea61 | 2396 | |
402209ff JH |
2397 | if (pbi->mem_set_list_len < MAX_MEM_SET_LIST_LEN) |
2398 | { | |
2399 | #ifdef AUTO_INC_DEC | |
2400 | /* Store a copy of mem, otherwise the address may be | |
2401 | scrogged by find_auto_inc. */ | |
2402 | if (pbi->flags & PROP_AUTOINC) | |
2403 | mem = shallow_copy_rtx (mem); | |
2404 | #endif | |
2405 | pbi->mem_set_list = alloc_EXPR_LIST (0, mem, pbi->mem_set_list); | |
2406 | pbi->mem_set_list_len++; | |
2407 | } | |
46fac664 JH |
2408 | } |
2409 | ||
402209ff JH |
2410 | /* INSN references memory, possibly using autoincrement addressing modes. |
2411 | Find any entries on the mem_set_list that need to be invalidated due | |
2412 | to an address change. */ | |
b02eea61 | 2413 | |
fe4b3c79 | 2414 | static int |
6cf9ac28 | 2415 | invalidate_mems_from_autoinc (rtx *px, void *data) |
46fac664 | 2416 | { |
fe4b3c79 JL |
2417 | rtx x = *px; |
2418 | struct propagate_block_info *pbi = data; | |
2419 | ||
2420 | if (GET_RTX_CLASS (GET_CODE (x)) == 'a') | |
2421 | { | |
2422 | invalidate_mems_from_set (pbi, XEXP (x, 0)); | |
2423 | return -1; | |
2424 | } | |
2425 | ||
2426 | return 0; | |
402209ff | 2427 | } |
46fac664 | 2428 | |
ff7cc307 | 2429 | /* EXP is a REG. Remove any dependent entries from pbi->mem_set_list. */ |
46fac664 | 2430 | |
402209ff | 2431 | static void |
6cf9ac28 | 2432 | invalidate_mems_from_set (struct propagate_block_info *pbi, rtx exp) |
402209ff JH |
2433 | { |
2434 | rtx temp = pbi->mem_set_list; | |
2435 | rtx prev = NULL_RTX; | |
2436 | rtx next; | |
46fac664 | 2437 | |
402209ff | 2438 | while (temp) |
46fac664 | 2439 | { |
402209ff JH |
2440 | next = XEXP (temp, 1); |
2441 | if (reg_overlap_mentioned_p (exp, XEXP (temp, 0))) | |
46fac664 | 2442 | { |
402209ff JH |
2443 | /* Splice this entry out of the list. */ |
2444 | if (prev) | |
2445 | XEXP (prev, 1) = next; | |
2446 | else | |
2447 | pbi->mem_set_list = next; | |
2448 | free_EXPR_LIST_node (temp); | |
2449 | pbi->mem_set_list_len--; | |
46fac664 | 2450 | } |
46fac664 | 2451 | else |
402209ff JH |
2452 | prev = temp; |
2453 | temp = next; | |
46fac664 | 2454 | } |
402209ff | 2455 | } |
46fac664 | 2456 | |
402209ff JH |
2457 | /* Process the registers that are set within X. Their bits are set to |
2458 | 1 in the regset DEAD, because they are dead prior to this insn. | |
b02eea61 | 2459 | |
402209ff | 2460 | If INSN is nonzero, it is the insn being processed. |
46fac664 | 2461 | |
402209ff | 2462 | FLAGS is the set of operations to perform. */ |
b02eea61 | 2463 | |
402209ff | 2464 | static void |
6cf9ac28 | 2465 | mark_set_regs (struct propagate_block_info *pbi, rtx x, rtx insn) |
46fac664 | 2466 | { |
402209ff JH |
2467 | rtx cond = NULL_RTX; |
2468 | rtx link; | |
2469 | enum rtx_code code; | |
46fac664 | 2470 | |
402209ff JH |
2471 | if (insn) |
2472 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2473 | { | |
2474 | if (REG_NOTE_KIND (link) == REG_INC) | |
2475 | mark_set_1 (pbi, SET, XEXP (link, 0), | |
2476 | (GET_CODE (x) == COND_EXEC | |
2477 | ? COND_EXEC_TEST (x) : NULL_RTX), | |
2478 | insn, pbi->flags); | |
2479 | } | |
2480 | retry: | |
2481 | switch (code = GET_CODE (x)) | |
46fac664 | 2482 | { |
402209ff JH |
2483 | case SET: |
2484 | case CLOBBER: | |
2485 | mark_set_1 (pbi, code, SET_DEST (x), cond, insn, pbi->flags); | |
2486 | return; | |
b02eea61 | 2487 | |
402209ff JH |
2488 | case COND_EXEC: |
2489 | cond = COND_EXEC_TEST (x); | |
2490 | x = COND_EXEC_CODE (x); | |
2491 | goto retry; | |
b02eea61 | 2492 | |
402209ff JH |
2493 | case PARALLEL: |
2494 | { | |
b3694847 SS |
2495 | int i; |
2496 | ||
402209ff JH |
2497 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
2498 | { | |
2499 | rtx sub = XVECEXP (x, 0, i); | |
2500 | switch (code = GET_CODE (sub)) | |
2501 | { | |
2502 | case COND_EXEC: | |
2503 | if (cond != NULL_RTX) | |
2504 | abort (); | |
b02eea61 | 2505 | |
402209ff JH |
2506 | cond = COND_EXEC_TEST (sub); |
2507 | sub = COND_EXEC_CODE (sub); | |
2508 | if (GET_CODE (sub) != SET && GET_CODE (sub) != CLOBBER) | |
2509 | break; | |
2510 | /* Fall through. */ | |
b02eea61 | 2511 | |
402209ff JH |
2512 | case SET: |
2513 | case CLOBBER: | |
2514 | mark_set_1 (pbi, code, SET_DEST (sub), cond, insn, pbi->flags); | |
2515 | break; | |
b02eea61 | 2516 | |
402209ff JH |
2517 | default: |
2518 | break; | |
2519 | } | |
2520 | } | |
2521 | break; | |
2522 | } | |
b02eea61 | 2523 | |
402209ff JH |
2524 | default: |
2525 | break; | |
46fac664 | 2526 | } |
46fac664 JH |
2527 | } |
2528 | ||
402209ff JH |
2529 | /* Process a single set, which appears in INSN. REG (which may not |
2530 | actually be a REG, it may also be a SUBREG, PARALLEL, etc.) is | |
2531 | being set using the CODE (which may be SET, CLOBBER, or COND_EXEC). | |
2532 | If the set is conditional (because it appear in a COND_EXEC), COND | |
2533 | will be the condition. */ | |
7a442791 | 2534 | |
402209ff | 2535 | static void |
6cf9ac28 | 2536 | mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx cond, rtx insn, int flags) |
336a6399 | 2537 | { |
402209ff JH |
2538 | int regno_first = -1, regno_last = -1; |
2539 | unsigned long not_dead = 0; | |
336a6399 RH |
2540 | int i; |
2541 | ||
402209ff JH |
2542 | /* Modifying just one hardware register of a multi-reg value or just a |
2543 | byte field of a register does not mean the value from before this insn | |
2544 | is now dead. Of course, if it was dead after it's unused now. */ | |
336a6399 | 2545 | |
402209ff | 2546 | switch (GET_CODE (reg)) |
336a6399 | 2547 | { |
402209ff JH |
2548 | case PARALLEL: |
2549 | /* Some targets place small structures in registers for return values of | |
2550 | functions. We have to detect this case specially here to get correct | |
2551 | flow information. */ | |
2552 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) | |
2553 | if (XEXP (XVECEXP (reg, 0, i), 0) != 0) | |
2554 | mark_set_1 (pbi, code, XEXP (XVECEXP (reg, 0, i), 0), cond, insn, | |
2555 | flags); | |
2556 | return; | |
2557 | ||
2558 | case ZERO_EXTRACT: | |
2559 | case SIGN_EXTRACT: | |
2560 | case STRICT_LOW_PART: | |
2561 | /* ??? Assumes STRICT_LOW_PART not used on multi-word registers. */ | |
2562 | do | |
2563 | reg = XEXP (reg, 0); | |
2564 | while (GET_CODE (reg) == SUBREG | |
2565 | || GET_CODE (reg) == ZERO_EXTRACT | |
2566 | || GET_CODE (reg) == SIGN_EXTRACT | |
2567 | || GET_CODE (reg) == STRICT_LOW_PART); | |
2568 | if (GET_CODE (reg) == MEM) | |
2569 | break; | |
2570 | not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, REGNO (reg)); | |
2571 | /* Fall through. */ | |
b02eea61 | 2572 | |
402209ff JH |
2573 | case REG: |
2574 | regno_last = regno_first = REGNO (reg); | |
2575 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
2576 | regno_last += HARD_REGNO_NREGS (regno_first, GET_MODE (reg)) - 1; | |
2577 | break; | |
b02eea61 | 2578 | |
402209ff JH |
2579 | case SUBREG: |
2580 | if (GET_CODE (SUBREG_REG (reg)) == REG) | |
7a442791 | 2581 | { |
402209ff JH |
2582 | enum machine_mode outer_mode = GET_MODE (reg); |
2583 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (reg)); | |
7a442791 | 2584 | |
402209ff JH |
2585 | /* Identify the range of registers affected. This is moderately |
2586 | tricky for hard registers. See alter_subreg. */ | |
b02eea61 | 2587 | |
402209ff JH |
2588 | regno_last = regno_first = REGNO (SUBREG_REG (reg)); |
2589 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
4793dca1 | 2590 | { |
402209ff JH |
2591 | regno_first += subreg_regno_offset (regno_first, inner_mode, |
2592 | SUBREG_BYTE (reg), | |
2593 | outer_mode); | |
2594 | regno_last = (regno_first | |
2595 | + HARD_REGNO_NREGS (regno_first, outer_mode) - 1); | |
3e28fe44 | 2596 | |
402209ff JH |
2597 | /* Since we've just adjusted the register number ranges, make |
2598 | sure REG matches. Otherwise some_was_live will be clear | |
2599 | when it shouldn't have been, and we'll create incorrect | |
2600 | REG_UNUSED notes. */ | |
2601 | reg = gen_rtx_REG (outer_mode, regno_first); | |
62828c00 | 2602 | } |
402209ff | 2603 | else |
d3a923ee | 2604 | { |
402209ff JH |
2605 | /* If the number of words in the subreg is less than the number |
2606 | of words in the full register, we have a well-defined partial | |
2607 | set. Otherwise the high bits are undefined. | |
d3a923ee | 2608 | |
402209ff JH |
2609 | This is only really applicable to pseudos, since we just took |
2610 | care of multi-word hard registers. */ | |
2611 | if (((GET_MODE_SIZE (outer_mode) | |
2612 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
2613 | < ((GET_MODE_SIZE (inner_mode) | |
2614 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
2615 | not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, | |
2616 | regno_first); | |
d3a923ee | 2617 | |
402209ff | 2618 | reg = SUBREG_REG (reg); |
d3a923ee | 2619 | } |
d3a923ee | 2620 | } |
402209ff JH |
2621 | else |
2622 | reg = SUBREG_REG (reg); | |
2623 | break; | |
c586192c | 2624 | |
402209ff JH |
2625 | default: |
2626 | break; | |
c586192c | 2627 | } |
c586192c | 2628 | |
402209ff JH |
2629 | /* If this set is a MEM, then it kills any aliased writes. |
2630 | If this set is a REG, then it kills any MEMs which use the reg. */ | |
5149f070 | 2631 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
e881bb1b | 2632 | { |
402209ff JH |
2633 | if (GET_CODE (reg) == REG) |
2634 | invalidate_mems_from_set (pbi, reg); | |
e881bb1b | 2635 | |
402209ff JH |
2636 | /* If the memory reference had embedded side effects (autoincrement |
2637 | address modes. Then we may need to kill some entries on the | |
2638 | memory set list. */ | |
2639 | if (insn && GET_CODE (reg) == MEM) | |
fe4b3c79 | 2640 | for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi); |
ccbaf064 | 2641 | |
402209ff JH |
2642 | if (GET_CODE (reg) == MEM && ! side_effects_p (reg) |
2643 | /* ??? With more effort we could track conditional memory life. */ | |
fe4b3c79 | 2644 | && ! cond) |
dd3f0101 | 2645 | add_to_mem_set_list (pbi, canon_rtx (reg)); |
ccbaf064 | 2646 | } |
f2a1bc02 | 2647 | |
402209ff JH |
2648 | if (GET_CODE (reg) == REG |
2649 | && ! (regno_first == FRAME_POINTER_REGNUM | |
2650 | && (! reload_completed || frame_pointer_needed)) | |
2651 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
2652 | && ! (regno_first == HARD_FRAME_POINTER_REGNUM | |
2653 | && (! reload_completed || frame_pointer_needed)) | |
2654 | #endif | |
2655 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
2656 | && ! (regno_first == ARG_POINTER_REGNUM && fixed_regs[regno_first]) | |
2657 | #endif | |
2658 | ) | |
f2a1bc02 | 2659 | { |
402209ff | 2660 | int some_was_live = 0, some_was_dead = 0; |
f2a1bc02 | 2661 | |
402209ff | 2662 | for (i = regno_first; i <= regno_last; ++i) |
f2a1bc02 | 2663 | { |
402209ff JH |
2664 | int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i); |
2665 | if (pbi->local_set) | |
f2a1bc02 | 2666 | { |
402209ff JH |
2667 | /* Order of the set operation matters here since both |
2668 | sets may be the same. */ | |
2669 | CLEAR_REGNO_REG_SET (pbi->cond_local_set, i); | |
2670 | if (cond != NULL_RTX | |
2671 | && ! REGNO_REG_SET_P (pbi->local_set, i)) | |
2672 | SET_REGNO_REG_SET (pbi->cond_local_set, i); | |
2673 | else | |
2674 | SET_REGNO_REG_SET (pbi->local_set, i); | |
f2a1bc02 | 2675 | } |
402209ff JH |
2676 | if (code != CLOBBER) |
2677 | SET_REGNO_REG_SET (pbi->new_set, i); | |
d3a923ee | 2678 | |
402209ff JH |
2679 | some_was_live |= needed_regno; |
2680 | some_was_dead |= ! needed_regno; | |
f2a1bc02 | 2681 | } |
402209ff JH |
2682 | |
2683 | #ifdef HAVE_conditional_execution | |
2684 | /* Consider conditional death in deciding that the register needs | |
2685 | a death note. */ | |
2686 | if (some_was_live && ! not_dead | |
2687 | /* The stack pointer is never dead. Well, not strictly true, | |
2688 | but it's very difficult to tell from here. Hopefully | |
2689 | combine_stack_adjustments will fix up the most egregious | |
2690 | errors. */ | |
2691 | && regno_first != STACK_POINTER_REGNUM) | |
d3a923ee | 2692 | { |
402209ff JH |
2693 | for (i = regno_first; i <= regno_last; ++i) |
2694 | if (! mark_regno_cond_dead (pbi, i, cond)) | |
2695 | not_dead |= ((unsigned long) 1) << (i - regno_first); | |
d3a923ee | 2696 | } |
402209ff | 2697 | #endif |
6ff71a97 | 2698 | |
402209ff JH |
2699 | /* Additional data to record if this is the final pass. */ |
2700 | if (flags & (PROP_LOG_LINKS | PROP_REG_INFO | |
2701 | | PROP_DEATH_NOTES | PROP_AUTOINC)) | |
f2a1bc02 | 2702 | { |
b3694847 | 2703 | rtx y; |
0b17ab2f | 2704 | int blocknum = pbi->bb->index; |
402209ff JH |
2705 | |
2706 | y = NULL_RTX; | |
2707 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
ca9fef16 | 2708 | { |
402209ff | 2709 | y = pbi->reg_next_use[regno_first]; |
ca9fef16 | 2710 | |
402209ff JH |
2711 | /* The next use is no longer next, since a store intervenes. */ |
2712 | for (i = regno_first; i <= regno_last; ++i) | |
2713 | pbi->reg_next_use[i] = 0; | |
2714 | } | |
6e64a52a | 2715 | |
402209ff | 2716 | if (flags & PROP_REG_INFO) |
46fac664 | 2717 | { |
402209ff JH |
2718 | for (i = regno_first; i <= regno_last; ++i) |
2719 | { | |
2720 | /* Count (weighted) references, stores, etc. This counts a | |
2721 | register twice if it is modified, but that is correct. */ | |
2722 | REG_N_SETS (i) += 1; | |
2723 | REG_N_REFS (i) += 1; | |
2724 | REG_FREQ (i) += REG_FREQ_FROM_BB (pbi->bb); | |
2725 | ||
2726 | /* The insns where a reg is live are normally counted | |
2727 | elsewhere, but we want the count to include the insn | |
2728 | where the reg is set, and the normal counting mechanism | |
2729 | would not count it. */ | |
2730 | REG_LIVE_LENGTH (i) += 1; | |
2731 | } | |
2732 | ||
2733 | /* If this is a hard reg, record this function uses the reg. */ | |
2734 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
6e64a52a | 2735 | { |
402209ff JH |
2736 | for (i = regno_first; i <= regno_last; i++) |
2737 | regs_ever_live[i] = 1; | |
6e64a52a JH |
2738 | } |
2739 | else | |
6e64a52a | 2740 | { |
402209ff JH |
2741 | /* Keep track of which basic blocks each reg appears in. */ |
2742 | if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN) | |
2743 | REG_BASIC_BLOCK (regno_first) = blocknum; | |
2744 | else if (REG_BASIC_BLOCK (regno_first) != blocknum) | |
2745 | REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL; | |
6e64a52a | 2746 | } |
402209ff | 2747 | } |
f2a1bc02 | 2748 | |
402209ff | 2749 | if (! some_was_dead) |
f2a1bc02 | 2750 | { |
402209ff JH |
2751 | if (flags & PROP_LOG_LINKS) |
2752 | { | |
2753 | /* Make a logical link from the next following insn | |
2754 | that uses this register, back to this insn. | |
2755 | The following insns have already been processed. | |
2756 | ||
2757 | We don't build a LOG_LINK for hard registers containing | |
2758 | in ASM_OPERANDs. If these registers get replaced, | |
2759 | we might wind up changing the semantics of the insn, | |
2760 | even if reload can make what appear to be valid | |
2761 | assignments later. */ | |
2762 | if (y && (BLOCK_NUM (y) == blocknum) | |
2763 | && (regno_first >= FIRST_PSEUDO_REGISTER | |
2764 | || asm_noperands (PATTERN (y)) < 0)) | |
2765 | LOG_LINKS (y) = alloc_INSN_LIST (insn, LOG_LINKS (y)); | |
2766 | } | |
34487bf8 | 2767 | } |
402209ff JH |
2768 | else if (not_dead) |
2769 | ; | |
2770 | else if (! some_was_live) | |
2771 | { | |
2772 | if (flags & PROP_REG_INFO) | |
2773 | REG_N_DEATHS (regno_first) += 1; | |
34487bf8 | 2774 | |
402209ff JH |
2775 | if (flags & PROP_DEATH_NOTES) |
2776 | { | |
2777 | /* Note that dead stores have already been deleted | |
2778 | when possible. If we get here, we have found a | |
2779 | dead store that cannot be eliminated (because the | |
2780 | same insn does something useful). Indicate this | |
2781 | by marking the reg being set as dying here. */ | |
2782 | REG_NOTES (insn) | |
2783 | = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); | |
2784 | } | |
2785 | } | |
2786 | else | |
34487bf8 | 2787 | { |
402209ff JH |
2788 | if (flags & PROP_DEATH_NOTES) |
2789 | { | |
2790 | /* This is a case where we have a multi-word hard register | |
2791 | and some, but not all, of the words of the register are | |
2792 | needed in subsequent insns. Write REG_UNUSED notes | |
2793 | for those parts that were not needed. This case should | |
2794 | be rare. */ | |
2795 | ||
2796 | for (i = regno_first; i <= regno_last; ++i) | |
2797 | if (! REGNO_REG_SET_P (pbi->reg_live, i)) | |
2798 | REG_NOTES (insn) | |
2799 | = alloc_EXPR_LIST (REG_UNUSED, | |
e50126e8 | 2800 | regno_reg_rtx[i], |
402209ff JH |
2801 | REG_NOTES (insn)); |
2802 | } | |
34487bf8 | 2803 | } |
34487bf8 | 2804 | } |
402209ff JH |
2805 | |
2806 | /* Mark the register as being dead. */ | |
2807 | if (some_was_live | |
2808 | /* The stack pointer is never dead. Well, not strictly true, | |
2809 | but it's very difficult to tell from here. Hopefully | |
2810 | combine_stack_adjustments will fix up the most egregious | |
2811 | errors. */ | |
2812 | && regno_first != STACK_POINTER_REGNUM) | |
34487bf8 | 2813 | { |
402209ff JH |
2814 | for (i = regno_first; i <= regno_last; ++i) |
2815 | if (!(not_dead & (((unsigned long) 1) << (i - regno_first)))) | |
2816 | CLEAR_REGNO_REG_SET (pbi->reg_live, i); | |
34487bf8 | 2817 | } |
402209ff JH |
2818 | } |
2819 | else if (GET_CODE (reg) == REG) | |
2820 | { | |
2821 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
2822 | pbi->reg_next_use[regno_first] = 0; | |
2823 | } | |
2824 | ||
2825 | /* If this is the last pass and this is a SCRATCH, show it will be dying | |
2826 | here and count it. */ | |
2827 | else if (GET_CODE (reg) == SCRATCH) | |
2828 | { | |
2829 | if (flags & PROP_DEATH_NOTES) | |
2830 | REG_NOTES (insn) | |
2831 | = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); | |
2832 | } | |
2833 | } | |
2834 | \f | |
2835 | #ifdef HAVE_conditional_execution | |
2836 | /* Mark REGNO conditionally dead. | |
2837 | Return true if the register is now unconditionally dead. */ | |
2838 | ||
2839 | static int | |
6cf9ac28 | 2840 | mark_regno_cond_dead (struct propagate_block_info *pbi, int regno, rtx cond) |
402209ff JH |
2841 | { |
2842 | /* If this is a store to a predicate register, the value of the | |
2843 | predicate is changing, we don't know that the predicate as seen | |
2844 | before is the same as that seen after. Flush all dependent | |
2845 | conditions from reg_cond_dead. This will make all such | |
2846 | conditionally live registers unconditionally live. */ | |
2847 | if (REGNO_REG_SET_P (pbi->reg_cond_reg, regno)) | |
2848 | flush_reg_cond_reg (pbi, regno); | |
2849 | ||
2850 | /* If this is an unconditional store, remove any conditional | |
2851 | life that may have existed. */ | |
2852 | if (cond == NULL_RTX) | |
2853 | splay_tree_remove (pbi->reg_cond_dead, regno); | |
2854 | else | |
2855 | { | |
2856 | splay_tree_node node; | |
2857 | struct reg_cond_life_info *rcli; | |
2858 | rtx ncond; | |
2859 | ||
2860 | /* Otherwise this is a conditional set. Record that fact. | |
2861 | It may have been conditionally used, or there may be a | |
2862 | subsequent set with a complimentary condition. */ | |
34487bf8 | 2863 | |
402209ff JH |
2864 | node = splay_tree_lookup (pbi->reg_cond_dead, regno); |
2865 | if (node == NULL) | |
34487bf8 | 2866 | { |
402209ff JH |
2867 | /* The register was unconditionally live previously. |
2868 | Record the current condition as the condition under | |
2869 | which it is dead. */ | |
703ad42b | 2870 | rcli = xmalloc (sizeof (*rcli)); |
402209ff JH |
2871 | rcli->condition = cond; |
2872 | rcli->stores = cond; | |
2873 | rcli->orig_condition = const0_rtx; | |
2874 | splay_tree_insert (pbi->reg_cond_dead, regno, | |
2875 | (splay_tree_value) rcli); | |
2876 | ||
2877 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); | |
2878 | ||
d6a7951f | 2879 | /* Not unconditionally dead. */ |
402209ff | 2880 | return 0; |
34487bf8 RH |
2881 | } |
2882 | else | |
2883 | { | |
402209ff JH |
2884 | /* The register was conditionally live previously. |
2885 | Add the new condition to the old. */ | |
2886 | rcli = (struct reg_cond_life_info *) node->value; | |
2887 | ncond = rcli->condition; | |
2888 | ncond = ior_reg_cond (ncond, cond, 1); | |
2889 | if (rcli->stores == const0_rtx) | |
2890 | rcli->stores = cond; | |
2891 | else if (rcli->stores != const1_rtx) | |
2892 | rcli->stores = ior_reg_cond (rcli->stores, cond, 1); | |
34487bf8 | 2893 | |
402209ff JH |
2894 | /* If the register is now unconditionally dead, remove the entry |
2895 | in the splay_tree. A register is unconditionally dead if the | |
2896 | dead condition ncond is true. A register is also unconditionally | |
2897 | dead if the sum of all conditional stores is an unconditional | |
2898 | store (stores is true), and the dead condition is identically the | |
2899 | same as the original dead condition initialized at the end of | |
2900 | the block. This is a pointer compare, not an rtx_equal_p | |
2901 | compare. */ | |
2902 | if (ncond == const1_rtx | |
2903 | || (ncond == rcli->orig_condition && rcli->stores == const1_rtx)) | |
2904 | splay_tree_remove (pbi->reg_cond_dead, regno); | |
2905 | else | |
2906 | { | |
2907 | rcli->condition = ncond; | |
34487bf8 | 2908 | |
402209ff | 2909 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); |
34487bf8 | 2910 | |
d6a7951f | 2911 | /* Not unconditionally dead. */ |
402209ff | 2912 | return 0; |
34487bf8 RH |
2913 | } |
2914 | } | |
2915 | } | |
2916 | ||
402209ff JH |
2917 | return 1; |
2918 | } | |
bce7bfe8 | 2919 | |
402209ff | 2920 | /* Called from splay_tree_delete for pbi->reg_cond_life. */ |
b9f22704 | 2921 | |
402209ff | 2922 | static void |
6cf9ac28 | 2923 | free_reg_cond_life_info (splay_tree_value value) |
402209ff JH |
2924 | { |
2925 | struct reg_cond_life_info *rcli = (struct reg_cond_life_info *) value; | |
2926 | free (rcli); | |
2927 | } | |
18ca529b | 2928 | |
402209ff | 2929 | /* Helper function for flush_reg_cond_reg. */ |
34487bf8 | 2930 | |
402209ff | 2931 | static int |
6cf9ac28 | 2932 | flush_reg_cond_reg_1 (splay_tree_node node, void *data) |
402209ff JH |
2933 | { |
2934 | struct reg_cond_life_info *rcli; | |
2935 | int *xdata = (int *) data; | |
2936 | unsigned int regno = xdata[0]; | |
34487bf8 | 2937 | |
402209ff JH |
2938 | /* Don't need to search if last flushed value was farther on in |
2939 | the in-order traversal. */ | |
2940 | if (xdata[1] >= (int) node->key) | |
2941 | return 0; | |
34487bf8 | 2942 | |
402209ff JH |
2943 | /* Splice out portions of the expression that refer to regno. */ |
2944 | rcli = (struct reg_cond_life_info *) node->value; | |
2945 | rcli->condition = elim_reg_cond (rcli->condition, regno); | |
2946 | if (rcli->stores != const0_rtx && rcli->stores != const1_rtx) | |
2947 | rcli->stores = elim_reg_cond (rcli->stores, regno); | |
0edd203b | 2948 | |
402209ff JH |
2949 | /* If the entire condition is now false, signal the node to be removed. */ |
2950 | if (rcli->condition == const0_rtx) | |
2951 | { | |
2952 | xdata[1] = node->key; | |
2953 | return -1; | |
34487bf8 | 2954 | } |
402209ff JH |
2955 | else if (rcli->condition == const1_rtx) |
2956 | abort (); | |
d3a923ee | 2957 | |
402209ff | 2958 | return 0; |
34487bf8 | 2959 | } |
410538ea | 2960 | |
402209ff | 2961 | /* Flush all (sub) expressions referring to REGNO from REG_COND_LIVE. */ |
410538ea | 2962 | |
402209ff | 2963 | static void |
6cf9ac28 | 2964 | flush_reg_cond_reg (struct propagate_block_info *pbi, int regno) |
402209ff JH |
2965 | { |
2966 | int pair[2]; | |
410538ea | 2967 | |
402209ff JH |
2968 | pair[0] = regno; |
2969 | pair[1] = -1; | |
2970 | while (splay_tree_foreach (pbi->reg_cond_dead, | |
2971 | flush_reg_cond_reg_1, pair) == -1) | |
2972 | splay_tree_remove (pbi->reg_cond_dead, pair[1]); | |
410538ea | 2973 | |
402209ff JH |
2974 | CLEAR_REGNO_REG_SET (pbi->reg_cond_reg, regno); |
2975 | } | |
410538ea | 2976 | |
402209ff JH |
2977 | /* Logical arithmetic on predicate conditions. IOR, NOT and AND. |
2978 | For ior/and, the ADD flag determines whether we want to add the new | |
2979 | condition X to the old one unconditionally. If it is zero, we will | |
2980 | only return a new expression if X allows us to simplify part of | |
b318748f | 2981 | OLD, otherwise we return NULL to the caller. |
402209ff JH |
2982 | If ADD is nonzero, we will return a new condition in all cases. The |
2983 | toplevel caller of one of these functions should always pass 1 for | |
2984 | ADD. */ | |
410538ea | 2985 | |
402209ff | 2986 | static rtx |
6cf9ac28 | 2987 | ior_reg_cond (rtx old, rtx x, int add) |
402209ff JH |
2988 | { |
2989 | rtx op0, op1; | |
410538ea | 2990 | |
402209ff | 2991 | if (GET_RTX_CLASS (GET_CODE (old)) == '<') |
410538ea | 2992 | { |
402209ff JH |
2993 | if (GET_RTX_CLASS (GET_CODE (x)) == '<' |
2994 | && REVERSE_CONDEXEC_PREDICATES_P (GET_CODE (x), GET_CODE (old)) | |
2995 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
2996 | return const1_rtx; | |
2997 | if (GET_CODE (x) == GET_CODE (old) | |
2998 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
2999 | return old; | |
3000 | if (! add) | |
b318748f | 3001 | return NULL; |
402209ff | 3002 | return gen_rtx_IOR (0, old, x); |
410538ea | 3003 | } |
c9bacfdb | 3004 | |
402209ff | 3005 | switch (GET_CODE (old)) |
410538ea | 3006 | { |
402209ff JH |
3007 | case IOR: |
3008 | op0 = ior_reg_cond (XEXP (old, 0), x, 0); | |
3009 | op1 = ior_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3010 | if (op0 != NULL || op1 != NULL) |
402209ff JH |
3011 | { |
3012 | if (op0 == const0_rtx) | |
b318748f | 3013 | return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x); |
402209ff | 3014 | if (op1 == const0_rtx) |
b318748f | 3015 | return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x); |
402209ff JH |
3016 | if (op0 == const1_rtx || op1 == const1_rtx) |
3017 | return const1_rtx; | |
b318748f JJ |
3018 | if (op0 == NULL) |
3019 | op0 = gen_rtx_IOR (0, XEXP (old, 0), x); | |
3020 | else if (rtx_equal_p (x, op0)) | |
3021 | /* (x | A) | x ~ (x | A). */ | |
3022 | return old; | |
3023 | if (op1 == NULL) | |
3024 | op1 = gen_rtx_IOR (0, XEXP (old, 1), x); | |
3025 | else if (rtx_equal_p (x, op1)) | |
3026 | /* (A | x) | x ~ (A | x). */ | |
3027 | return old; | |
402209ff JH |
3028 | return gen_rtx_IOR (0, op0, op1); |
3029 | } | |
3030 | if (! add) | |
b318748f | 3031 | return NULL; |
402209ff | 3032 | return gen_rtx_IOR (0, old, x); |
410538ea | 3033 | |
402209ff JH |
3034 | case AND: |
3035 | op0 = ior_reg_cond (XEXP (old, 0), x, 0); | |
3036 | op1 = ior_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3037 | if (op0 != NULL || op1 != NULL) |
410538ea | 3038 | { |
402209ff | 3039 | if (op0 == const1_rtx) |
b318748f | 3040 | return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x); |
402209ff | 3041 | if (op1 == const1_rtx) |
b318748f | 3042 | return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x); |
402209ff JH |
3043 | if (op0 == const0_rtx || op1 == const0_rtx) |
3044 | return const0_rtx; | |
b318748f JJ |
3045 | if (op0 == NULL) |
3046 | op0 = gen_rtx_IOR (0, XEXP (old, 0), x); | |
3047 | else if (rtx_equal_p (x, op0)) | |
3048 | /* (x & A) | x ~ x. */ | |
3049 | return op0; | |
3050 | if (op1 == NULL) | |
3051 | op1 = gen_rtx_IOR (0, XEXP (old, 1), x); | |
3052 | else if (rtx_equal_p (x, op1)) | |
3053 | /* (A & x) | x ~ x. */ | |
3054 | return op1; | |
402209ff | 3055 | return gen_rtx_AND (0, op0, op1); |
410538ea | 3056 | } |
402209ff | 3057 | if (! add) |
b318748f | 3058 | return NULL; |
402209ff | 3059 | return gen_rtx_IOR (0, old, x); |
410538ea | 3060 | |
402209ff JH |
3061 | case NOT: |
3062 | op0 = and_reg_cond (XEXP (old, 0), not_reg_cond (x), 0); | |
b318748f | 3063 | if (op0 != NULL) |
402209ff JH |
3064 | return not_reg_cond (op0); |
3065 | if (! add) | |
b318748f | 3066 | return NULL; |
402209ff | 3067 | return gen_rtx_IOR (0, old, x); |
c9bacfdb | 3068 | |
402209ff JH |
3069 | default: |
3070 | abort (); | |
410538ea AM |
3071 | } |
3072 | } | |
3073 | ||
402209ff | 3074 | static rtx |
6cf9ac28 | 3075 | not_reg_cond (rtx x) |
410538ea | 3076 | { |
402209ff | 3077 | enum rtx_code x_code; |
410538ea | 3078 | |
402209ff JH |
3079 | if (x == const0_rtx) |
3080 | return const1_rtx; | |
3081 | else if (x == const1_rtx) | |
3082 | return const0_rtx; | |
3083 | x_code = GET_CODE (x); | |
3084 | if (x_code == NOT) | |
3085 | return XEXP (x, 0); | |
3086 | if (GET_RTX_CLASS (x_code) == '<' | |
3087 | && GET_CODE (XEXP (x, 0)) == REG) | |
410538ea | 3088 | { |
402209ff JH |
3089 | if (XEXP (x, 1) != const0_rtx) |
3090 | abort (); | |
410538ea | 3091 | |
402209ff JH |
3092 | return gen_rtx_fmt_ee (reverse_condition (x_code), |
3093 | VOIDmode, XEXP (x, 0), const0_rtx); | |
410538ea | 3094 | } |
402209ff | 3095 | return gen_rtx_NOT (0, x); |
410538ea AM |
3096 | } |
3097 | ||
402209ff | 3098 | static rtx |
6cf9ac28 | 3099 | and_reg_cond (rtx old, rtx x, int add) |
410538ea | 3100 | { |
402209ff | 3101 | rtx op0, op1; |
410538ea | 3102 | |
402209ff | 3103 | if (GET_RTX_CLASS (GET_CODE (old)) == '<') |
410538ea | 3104 | { |
402209ff JH |
3105 | if (GET_RTX_CLASS (GET_CODE (x)) == '<' |
3106 | && GET_CODE (x) == reverse_condition (GET_CODE (old)) | |
3107 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
3108 | return const0_rtx; | |
3109 | if (GET_CODE (x) == GET_CODE (old) | |
3110 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
3111 | return old; | |
3112 | if (! add) | |
b318748f | 3113 | return NULL; |
402209ff JH |
3114 | return gen_rtx_AND (0, old, x); |
3115 | } | |
410538ea | 3116 | |
402209ff JH |
3117 | switch (GET_CODE (old)) |
3118 | { | |
3119 | case IOR: | |
3120 | op0 = and_reg_cond (XEXP (old, 0), x, 0); | |
3121 | op1 = and_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3122 | if (op0 != NULL || op1 != NULL) |
410538ea | 3123 | { |
402209ff | 3124 | if (op0 == const0_rtx) |
b318748f | 3125 | return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x); |
402209ff | 3126 | if (op1 == const0_rtx) |
b318748f | 3127 | return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x); |
402209ff JH |
3128 | if (op0 == const1_rtx || op1 == const1_rtx) |
3129 | return const1_rtx; | |
b318748f JJ |
3130 | if (op0 == NULL) |
3131 | op0 = gen_rtx_AND (0, XEXP (old, 0), x); | |
3132 | else if (rtx_equal_p (x, op0)) | |
3133 | /* (x | A) & x ~ x. */ | |
3134 | return op0; | |
3135 | if (op1 == NULL) | |
3136 | op1 = gen_rtx_AND (0, XEXP (old, 1), x); | |
3137 | else if (rtx_equal_p (x, op1)) | |
3138 | /* (A | x) & x ~ x. */ | |
3139 | return op1; | |
402209ff | 3140 | return gen_rtx_IOR (0, op0, op1); |
410538ea | 3141 | } |
402209ff | 3142 | if (! add) |
b318748f | 3143 | return NULL; |
402209ff JH |
3144 | return gen_rtx_AND (0, old, x); |
3145 | ||
3146 | case AND: | |
3147 | op0 = and_reg_cond (XEXP (old, 0), x, 0); | |
3148 | op1 = and_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3149 | if (op0 != NULL || op1 != NULL) |
410538ea | 3150 | { |
402209ff | 3151 | if (op0 == const1_rtx) |
b318748f | 3152 | return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x); |
402209ff | 3153 | if (op1 == const1_rtx) |
b318748f | 3154 | return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x); |
402209ff JH |
3155 | if (op0 == const0_rtx || op1 == const0_rtx) |
3156 | return const0_rtx; | |
b318748f JJ |
3157 | if (op0 == NULL) |
3158 | op0 = gen_rtx_AND (0, XEXP (old, 0), x); | |
3159 | else if (rtx_equal_p (x, op0)) | |
3160 | /* (x & A) & x ~ (x & A). */ | |
3161 | return old; | |
3162 | if (op1 == NULL) | |
3163 | op1 = gen_rtx_AND (0, XEXP (old, 1), x); | |
3164 | else if (rtx_equal_p (x, op1)) | |
3165 | /* (A & x) & x ~ (A & x). */ | |
3166 | return old; | |
402209ff | 3167 | return gen_rtx_AND (0, op0, op1); |
410538ea | 3168 | } |
402209ff | 3169 | if (! add) |
b318748f | 3170 | return NULL; |
402209ff | 3171 | return gen_rtx_AND (0, old, x); |
410538ea | 3172 | |
402209ff JH |
3173 | case NOT: |
3174 | op0 = ior_reg_cond (XEXP (old, 0), not_reg_cond (x), 0); | |
b318748f | 3175 | if (op0 != NULL) |
402209ff JH |
3176 | return not_reg_cond (op0); |
3177 | if (! add) | |
b318748f | 3178 | return NULL; |
402209ff | 3179 | return gen_rtx_AND (0, old, x); |
410538ea | 3180 | |
402209ff JH |
3181 | default: |
3182 | abort (); | |
c9bacfdb | 3183 | } |
410538ea AM |
3184 | } |
3185 | ||
402209ff JH |
3186 | /* Given a condition X, remove references to reg REGNO and return the |
3187 | new condition. The removal will be done so that all conditions | |
3188 | involving REGNO are considered to evaluate to false. This function | |
3189 | is used when the value of REGNO changes. */ | |
c9bacfdb | 3190 | |
402209ff | 3191 | static rtx |
6cf9ac28 | 3192 | elim_reg_cond (rtx x, unsigned int regno) |
410538ea | 3193 | { |
402209ff JH |
3194 | rtx op0, op1; |
3195 | ||
3196 | if (GET_RTX_CLASS (GET_CODE (x)) == '<') | |
410538ea | 3197 | { |
402209ff JH |
3198 | if (REGNO (XEXP (x, 0)) == regno) |
3199 | return const0_rtx; | |
3200 | return x; | |
410538ea | 3201 | } |
c9bacfdb | 3202 | |
402209ff JH |
3203 | switch (GET_CODE (x)) |
3204 | { | |
3205 | case AND: | |
3206 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3207 | op1 = elim_reg_cond (XEXP (x, 1), regno); | |
3208 | if (op0 == const0_rtx || op1 == const0_rtx) | |
3209 | return const0_rtx; | |
3210 | if (op0 == const1_rtx) | |
3211 | return op1; | |
3212 | if (op1 == const1_rtx) | |
3213 | return op0; | |
3214 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) | |
3215 | return x; | |
3216 | return gen_rtx_AND (0, op0, op1); | |
87fdf7ff | 3217 | |
402209ff JH |
3218 | case IOR: |
3219 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3220 | op1 = elim_reg_cond (XEXP (x, 1), regno); | |
3221 | if (op0 == const1_rtx || op1 == const1_rtx) | |
3222 | return const1_rtx; | |
3223 | if (op0 == const0_rtx) | |
3224 | return op1; | |
3225 | if (op1 == const0_rtx) | |
3226 | return op0; | |
3227 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) | |
3228 | return x; | |
3229 | return gen_rtx_IOR (0, op0, op1); | |
87fdf7ff | 3230 | |
402209ff JH |
3231 | case NOT: |
3232 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3233 | if (op0 == const0_rtx) | |
3234 | return const1_rtx; | |
3235 | if (op0 == const1_rtx) | |
3236 | return const0_rtx; | |
3237 | if (op0 != XEXP (x, 0)) | |
3238 | return not_reg_cond (op0); | |
3239 | return x; | |
87fdf7ff | 3240 | |
402209ff JH |
3241 | default: |
3242 | abort (); | |
3243 | } | |
87fdf7ff | 3244 | } |
402209ff JH |
3245 | #endif /* HAVE_conditional_execution */ |
3246 | \f | |
3247 | #ifdef AUTO_INC_DEC | |
87fdf7ff | 3248 | |
402209ff JH |
3249 | /* Try to substitute the auto-inc expression INC as the address inside |
3250 | MEM which occurs in INSN. Currently, the address of MEM is an expression | |
3251 | involving INCR_REG, and INCR is the next use of INCR_REG; it is an insn | |
3252 | that has a single set whose source is a PLUS of INCR_REG and something | |
3253 | else. */ | |
c9bacfdb | 3254 | |
87fdf7ff | 3255 | static void |
6cf9ac28 AJ |
3256 | attempt_auto_inc (struct propagate_block_info *pbi, rtx inc, rtx insn, |
3257 | rtx mem, rtx incr, rtx incr_reg) | |
87fdf7ff | 3258 | { |
402209ff JH |
3259 | int regno = REGNO (incr_reg); |
3260 | rtx set = single_set (incr); | |
3261 | rtx q = SET_DEST (set); | |
3262 | rtx y = SET_SRC (set); | |
3263 | int opnum = XEXP (y, 0) == incr_reg ? 0 : 1; | |
c9bacfdb | 3264 | |
402209ff JH |
3265 | /* Make sure this reg appears only once in this insn. */ |
3266 | if (count_occurrences (PATTERN (insn), incr_reg, 1) != 1) | |
3267 | return; | |
87fdf7ff | 3268 | |
402209ff JH |
3269 | if (dead_or_set_p (incr, incr_reg) |
3270 | /* Mustn't autoinc an eliminable register. */ | |
3271 | && (regno >= FIRST_PSEUDO_REGISTER | |
3272 | || ! TEST_HARD_REG_BIT (elim_reg_set, regno))) | |
3273 | { | |
3274 | /* This is the simple case. Try to make the auto-inc. If | |
3275 | we can't, we are done. Otherwise, we will do any | |
3276 | needed updates below. */ | |
3277 | if (! validate_change (insn, &XEXP (mem, 0), inc, 0)) | |
3278 | return; | |
3279 | } | |
3280 | else if (GET_CODE (q) == REG | |
3281 | /* PREV_INSN used here to check the semi-open interval | |
3282 | [insn,incr). */ | |
3283 | && ! reg_used_between_p (q, PREV_INSN (insn), incr) | |
3284 | /* We must also check for sets of q as q may be | |
3285 | a call clobbered hard register and there may | |
3286 | be a call between PREV_INSN (insn) and incr. */ | |
3287 | && ! reg_set_between_p (q, PREV_INSN (insn), incr)) | |
3288 | { | |
3289 | /* We have *p followed sometime later by q = p+size. | |
3290 | Both p and q must be live afterward, | |
3291 | and q is not used between INSN and its assignment. | |
3292 | Change it to q = p, ...*q..., q = q+size. | |
3293 | Then fall into the usual case. */ | |
3294 | rtx insns, temp; | |
d3a923ee | 3295 | |
402209ff JH |
3296 | start_sequence (); |
3297 | emit_move_insn (q, incr_reg); | |
3298 | insns = get_insns (); | |
3299 | end_sequence (); | |
87fdf7ff | 3300 | |
402209ff JH |
3301 | /* If we can't make the auto-inc, or can't make the |
3302 | replacement into Y, exit. There's no point in making | |
3303 | the change below if we can't do the auto-inc and doing | |
3304 | so is not correct in the pre-inc case. */ | |
87fdf7ff | 3305 | |
402209ff JH |
3306 | XEXP (inc, 0) = q; |
3307 | validate_change (insn, &XEXP (mem, 0), inc, 1); | |
3308 | validate_change (incr, &XEXP (y, opnum), q, 1); | |
3309 | if (! apply_change_group ()) | |
3310 | return; | |
f008a564 | 3311 | |
402209ff JH |
3312 | /* We now know we'll be doing this change, so emit the |
3313 | new insn(s) and do the updates. */ | |
2f937369 | 3314 | emit_insn_before (insns, insn); |
f008a564 | 3315 | |
402209ff JH |
3316 | if (pbi->bb->head == insn) |
3317 | pbi->bb->head = insns; | |
b53978a3 | 3318 | |
402209ff JH |
3319 | /* INCR will become a NOTE and INSN won't contain a |
3320 | use of INCR_REG. If a use of INCR_REG was just placed in | |
3321 | the insn before INSN, make that the next use. | |
3322 | Otherwise, invalidate it. */ | |
3323 | if (GET_CODE (PREV_INSN (insn)) == INSN | |
3324 | && GET_CODE (PATTERN (PREV_INSN (insn))) == SET | |
3325 | && SET_SRC (PATTERN (PREV_INSN (insn))) == incr_reg) | |
3326 | pbi->reg_next_use[regno] = PREV_INSN (insn); | |
3327 | else | |
3328 | pbi->reg_next_use[regno] = 0; | |
c9bacfdb | 3329 | |
402209ff JH |
3330 | incr_reg = q; |
3331 | regno = REGNO (q); | |
b53978a3 | 3332 | |
402209ff JH |
3333 | /* REGNO is now used in INCR which is below INSN, but |
3334 | it previously wasn't live here. If we don't mark | |
3335 | it as live, we'll put a REG_DEAD note for it | |
3336 | on this insn, which is incorrect. */ | |
3337 | SET_REGNO_REG_SET (pbi->reg_live, regno); | |
b53978a3 | 3338 | |
402209ff JH |
3339 | /* If there are any calls between INSN and INCR, show |
3340 | that REGNO now crosses them. */ | |
3341 | for (temp = insn; temp != incr; temp = NEXT_INSN (temp)) | |
3342 | if (GET_CODE (temp) == CALL_INSN) | |
3343 | REG_N_CALLS_CROSSED (regno)++; | |
c9bacfdb | 3344 | |
402209ff JH |
3345 | /* Invalidate alias info for Q since we just changed its value. */ |
3346 | clear_reg_alias_info (q); | |
b53978a3 | 3347 | } |
402209ff JH |
3348 | else |
3349 | return; | |
b53978a3 | 3350 | |
402209ff JH |
3351 | /* If we haven't returned, it means we were able to make the |
3352 | auto-inc, so update the status. First, record that this insn | |
3353 | has an implicit side effect. */ | |
f008a564 | 3354 | |
402209ff | 3355 | REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, incr_reg, REG_NOTES (insn)); |
f008a564 | 3356 | |
402209ff JH |
3357 | /* Modify the old increment-insn to simply copy |
3358 | the already-incremented value of our register. */ | |
3359 | if (! validate_change (incr, &SET_SRC (set), incr_reg, 0)) | |
3360 | abort (); | |
ca9fef16 | 3361 | |
402209ff JH |
3362 | /* If that makes it a no-op (copying the register into itself) delete |
3363 | it so it won't appear to be a "use" and a "set" of this | |
3364 | register. */ | |
3365 | if (REGNO (SET_DEST (set)) == REGNO (incr_reg)) | |
ca9fef16 | 3366 | { |
402209ff JH |
3367 | /* If the original source was dead, it's dead now. */ |
3368 | rtx note; | |
ca9fef16 | 3369 | |
402209ff JH |
3370 | while ((note = find_reg_note (incr, REG_DEAD, NULL_RTX)) != NULL_RTX) |
3371 | { | |
3372 | remove_note (incr, note); | |
3373 | if (XEXP (note, 0) != incr_reg) | |
3374 | CLEAR_REGNO_REG_SET (pbi->reg_live, REGNO (XEXP (note, 0))); | |
3375 | } | |
c9bacfdb | 3376 | |
402209ff JH |
3377 | PUT_CODE (incr, NOTE); |
3378 | NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED; | |
3379 | NOTE_SOURCE_FILE (incr) = 0; | |
3380 | } | |
f008a564 | 3381 | |
402209ff JH |
3382 | if (regno >= FIRST_PSEUDO_REGISTER) |
3383 | { | |
3384 | /* Count an extra reference to the reg. When a reg is | |
3385 | incremented, spilling it is worse, so we want to make | |
3386 | that less likely. */ | |
3387 | REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb); | |
f008a564 | 3388 | |
402209ff JH |
3389 | /* Count the increment as a setting of the register, |
3390 | even though it isn't a SET in rtl. */ | |
3391 | REG_N_SETS (regno)++; | |
3392 | } | |
f008a564 | 3393 | } |
402209ff JH |
3394 | |
3395 | /* X is a MEM found in INSN. See if we can convert it into an auto-increment | |
3396 | reference. */ | |
c9bacfdb | 3397 | |
21c7361e | 3398 | static void |
6cf9ac28 | 3399 | find_auto_inc (struct propagate_block_info *pbi, rtx x, rtx insn) |
4dc9341c | 3400 | { |
402209ff JH |
3401 | rtx addr = XEXP (x, 0); |
3402 | HOST_WIDE_INT offset = 0; | |
3403 | rtx set, y, incr, inc_val; | |
3404 | int regno; | |
3405 | int size = GET_MODE_SIZE (GET_MODE (x)); | |
4dc9341c | 3406 | |
402209ff | 3407 | if (GET_CODE (insn) == JUMP_INSN) |
135ebc36 MH |
3408 | return; |
3409 | ||
402209ff JH |
3410 | /* Here we detect use of an index register which might be good for |
3411 | postincrement, postdecrement, preincrement, or predecrement. */ | |
3412 | ||
3413 | if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
3414 | offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); | |
4dc9341c | 3415 | |
402209ff JH |
3416 | if (GET_CODE (addr) != REG) |
3417 | return; | |
c9bacfdb | 3418 | |
402209ff | 3419 | regno = REGNO (addr); |
135ebc36 | 3420 | |
402209ff JH |
3421 | /* Is the next use an increment that might make auto-increment? */ |
3422 | incr = pbi->reg_next_use[regno]; | |
3423 | if (incr == 0 || BLOCK_NUM (incr) != BLOCK_NUM (insn)) | |
3424 | return; | |
3425 | set = single_set (incr); | |
3426 | if (set == 0 || GET_CODE (set) != SET) | |
3427 | return; | |
3428 | y = SET_SRC (set); | |
4dc9341c | 3429 | |
402209ff | 3430 | if (GET_CODE (y) != PLUS) |
135ebc36 MH |
3431 | return; |
3432 | ||
402209ff JH |
3433 | if (REG_P (XEXP (y, 0)) && REGNO (XEXP (y, 0)) == REGNO (addr)) |
3434 | inc_val = XEXP (y, 1); | |
3435 | else if (REG_P (XEXP (y, 1)) && REGNO (XEXP (y, 1)) == REGNO (addr)) | |
3436 | inc_val = XEXP (y, 0); | |
3437 | else | |
3438 | return; | |
4dc9341c | 3439 | |
402209ff JH |
3440 | if (GET_CODE (inc_val) == CONST_INT) |
3441 | { | |
3442 | if (HAVE_POST_INCREMENT | |
3443 | && (INTVAL (inc_val) == size && offset == 0)) | |
3444 | attempt_auto_inc (pbi, gen_rtx_POST_INC (Pmode, addr), insn, x, | |
3445 | incr, addr); | |
3446 | else if (HAVE_POST_DECREMENT | |
3447 | && (INTVAL (inc_val) == -size && offset == 0)) | |
3448 | attempt_auto_inc (pbi, gen_rtx_POST_DEC (Pmode, addr), insn, x, | |
3449 | incr, addr); | |
3450 | else if (HAVE_PRE_INCREMENT | |
3451 | && (INTVAL (inc_val) == size && offset == size)) | |
3452 | attempt_auto_inc (pbi, gen_rtx_PRE_INC (Pmode, addr), insn, x, | |
3453 | incr, addr); | |
3454 | else if (HAVE_PRE_DECREMENT | |
3455 | && (INTVAL (inc_val) == -size && offset == -size)) | |
3456 | attempt_auto_inc (pbi, gen_rtx_PRE_DEC (Pmode, addr), insn, x, | |
3457 | incr, addr); | |
3458 | else if (HAVE_POST_MODIFY_DISP && offset == 0) | |
3459 | attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr, | |
3460 | gen_rtx_PLUS (Pmode, | |
3461 | addr, | |
3462 | inc_val)), | |
3463 | insn, x, incr, addr); | |
89c4b810 RE |
3464 | else if (HAVE_PRE_MODIFY_DISP && offset == INTVAL (inc_val)) |
3465 | attempt_auto_inc (pbi, gen_rtx_PRE_MODIFY (Pmode, addr, | |
3466 | gen_rtx_PLUS (Pmode, | |
3467 | addr, | |
3468 | inc_val)), | |
3469 | insn, x, incr, addr); | |
402209ff JH |
3470 | } |
3471 | else if (GET_CODE (inc_val) == REG | |
3472 | && ! reg_set_between_p (inc_val, PREV_INSN (insn), | |
3473 | NEXT_INSN (incr))) | |
135ebc36 | 3474 | |
402209ff JH |
3475 | { |
3476 | if (HAVE_POST_MODIFY_REG && offset == 0) | |
3477 | attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr, | |
3478 | gen_rtx_PLUS (Pmode, | |
3479 | addr, | |
3480 | inc_val)), | |
3481 | insn, x, incr, addr); | |
3482 | } | |
3483 | } | |
c9bacfdb | 3484 | |
402209ff JH |
3485 | #endif /* AUTO_INC_DEC */ |
3486 | \f | |
4dc9341c | 3487 | static void |
6cf9ac28 AJ |
3488 | mark_used_reg (struct propagate_block_info *pbi, rtx reg, |
3489 | rtx cond ATTRIBUTE_UNUSED, rtx insn) | |
4dc9341c | 3490 | { |
402209ff JH |
3491 | unsigned int regno_first, regno_last, i; |
3492 | int some_was_live, some_was_dead, some_not_set; | |
4dc9341c | 3493 | |
402209ff JH |
3494 | regno_last = regno_first = REGNO (reg); |
3495 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
3496 | regno_last += HARD_REGNO_NREGS (regno_first, GET_MODE (reg)) - 1; | |
4dc9341c | 3497 | |
402209ff JH |
3498 | /* Find out if any of this register is live after this instruction. */ |
3499 | some_was_live = some_was_dead = 0; | |
3500 | for (i = regno_first; i <= regno_last; ++i) | |
4dc9341c | 3501 | { |
402209ff JH |
3502 | int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i); |
3503 | some_was_live |= needed_regno; | |
3504 | some_was_dead |= ! needed_regno; | |
4dc9341c MH |
3505 | } |
3506 | ||
402209ff JH |
3507 | /* Find out if any of the register was set this insn. */ |
3508 | some_not_set = 0; | |
3509 | for (i = regno_first; i <= regno_last; ++i) | |
3510 | some_not_set |= ! REGNO_REG_SET_P (pbi->new_set, i); | |
3511 | ||
3512 | if (pbi->flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
c34d5374 | 3513 | { |
402209ff JH |
3514 | /* Record where each reg is used, so when the reg is set we know |
3515 | the next insn that uses it. */ | |
3516 | pbi->reg_next_use[regno_first] = insn; | |
c34d5374 | 3517 | } |
c9bacfdb | 3518 | |
402209ff JH |
3519 | if (pbi->flags & PROP_REG_INFO) |
3520 | { | |
3521 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
3522 | { | |
3523 | /* If this is a register we are going to try to eliminate, | |
3524 | don't mark it live here. If we are successful in | |
3525 | eliminating it, it need not be live unless it is used for | |
3526 | pseudos, in which case it will have been set live when it | |
3527 | was allocated to the pseudos. If the register will not | |
3528 | be eliminated, reload will set it live at that point. | |
4dc9341c | 3529 | |
402209ff JH |
3530 | Otherwise, record that this function uses this register. */ |
3531 | /* ??? The PPC backend tries to "eliminate" on the pic | |
3532 | register to itself. This should be fixed. In the mean | |
3533 | time, hack around it. */ | |
c9bacfdb | 3534 | |
402209ff JH |
3535 | if (! (TEST_HARD_REG_BIT (elim_reg_set, regno_first) |
3536 | && (regno_first == FRAME_POINTER_REGNUM | |
3537 | || regno_first == ARG_POINTER_REGNUM))) | |
3538 | for (i = regno_first; i <= regno_last; ++i) | |
3539 | regs_ever_live[i] = 1; | |
3540 | } | |
3541 | else | |
3542 | { | |
3543 | /* Keep track of which basic block each reg appears in. */ | |
6057c0e6 | 3544 | |
0b17ab2f | 3545 | int blocknum = pbi->bb->index; |
402209ff JH |
3546 | if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN) |
3547 | REG_BASIC_BLOCK (regno_first) = blocknum; | |
3548 | else if (REG_BASIC_BLOCK (regno_first) != blocknum) | |
3549 | REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL; | |
6057c0e6 | 3550 | |
402209ff JH |
3551 | /* Count (weighted) number of uses of each reg. */ |
3552 | REG_FREQ (regno_first) += REG_FREQ_FROM_BB (pbi->bb); | |
3553 | REG_N_REFS (regno_first)++; | |
3554 | } | |
3555 | } | |
6057c0e6 | 3556 | |
402209ff JH |
3557 | /* Record and count the insns in which a reg dies. If it is used in |
3558 | this insn and was dead below the insn then it dies in this insn. | |
3559 | If it was set in this insn, we do not make a REG_DEAD note; | |
3560 | likewise if we already made such a note. */ | |
3561 | if ((pbi->flags & (PROP_DEATH_NOTES | PROP_REG_INFO)) | |
3562 | && some_was_dead | |
3563 | && some_not_set) | |
3564 | { | |
3565 | /* Check for the case where the register dying partially | |
3566 | overlaps the register set by this insn. */ | |
3567 | if (regno_first != regno_last) | |
3568 | for (i = regno_first; i <= regno_last; ++i) | |
3569 | some_was_live |= REGNO_REG_SET_P (pbi->new_set, i); | |
4dc9341c | 3570 | |
402209ff JH |
3571 | /* If none of the words in X is needed, make a REG_DEAD note. |
3572 | Otherwise, we must make partial REG_DEAD notes. */ | |
3573 | if (! some_was_live) | |
3574 | { | |
3575 | if ((pbi->flags & PROP_DEATH_NOTES) | |
3576 | && ! find_regno_note (insn, REG_DEAD, regno_first)) | |
3577 | REG_NOTES (insn) | |
3578 | = alloc_EXPR_LIST (REG_DEAD, reg, REG_NOTES (insn)); | |
4dc9341c | 3579 | |
402209ff JH |
3580 | if (pbi->flags & PROP_REG_INFO) |
3581 | REG_N_DEATHS (regno_first)++; | |
3582 | } | |
3583 | else | |
3584 | { | |
3585 | /* Don't make a REG_DEAD note for a part of a register | |
3586 | that is set in the insn. */ | |
3587 | for (i = regno_first; i <= regno_last; ++i) | |
3588 | if (! REGNO_REG_SET_P (pbi->reg_live, i) | |
3589 | && ! dead_or_set_regno_p (insn, i)) | |
3590 | REG_NOTES (insn) | |
3591 | = alloc_EXPR_LIST (REG_DEAD, | |
e50126e8 | 3592 | regno_reg_rtx[i], |
402209ff JH |
3593 | REG_NOTES (insn)); |
3594 | } | |
3595 | } | |
4dc9341c | 3596 | |
402209ff JH |
3597 | /* Mark the register as being live. */ |
3598 | for (i = regno_first; i <= regno_last; ++i) | |
4dc9341c | 3599 | { |
9be40833 RH |
3600 | #ifdef HAVE_conditional_execution |
3601 | int this_was_live = REGNO_REG_SET_P (pbi->reg_live, i); | |
3602 | #endif | |
3603 | ||
402209ff | 3604 | SET_REGNO_REG_SET (pbi->reg_live, i); |
4dc9341c | 3605 | |
402209ff JH |
3606 | #ifdef HAVE_conditional_execution |
3607 | /* If this is a conditional use, record that fact. If it is later | |
3608 | conditionally set, we'll know to kill the register. */ | |
3609 | if (cond != NULL_RTX) | |
4dc9341c | 3610 | { |
402209ff JH |
3611 | splay_tree_node node; |
3612 | struct reg_cond_life_info *rcli; | |
3613 | rtx ncond; | |
3614 | ||
9be40833 | 3615 | if (this_was_live) |
402209ff JH |
3616 | { |
3617 | node = splay_tree_lookup (pbi->reg_cond_dead, i); | |
3618 | if (node == NULL) | |
3619 | { | |
3620 | /* The register was unconditionally live previously. | |
3621 | No need to do anything. */ | |
3622 | } | |
3623 | else | |
3624 | { | |
3625 | /* The register was conditionally live previously. | |
3626 | Subtract the new life cond from the old death cond. */ | |
3627 | rcli = (struct reg_cond_life_info *) node->value; | |
3628 | ncond = rcli->condition; | |
3629 | ncond = and_reg_cond (ncond, not_reg_cond (cond), 1); | |
4dc9341c | 3630 | |
402209ff JH |
3631 | /* If the register is now unconditionally live, |
3632 | remove the entry in the splay_tree. */ | |
3633 | if (ncond == const0_rtx) | |
3634 | splay_tree_remove (pbi->reg_cond_dead, i); | |
3635 | else | |
3636 | { | |
3637 | rcli->condition = ncond; | |
3638 | SET_REGNO_REG_SET (pbi->reg_cond_reg, | |
3639 | REGNO (XEXP (cond, 0))); | |
3640 | } | |
3641 | } | |
3642 | } | |
3643 | else | |
4dc9341c | 3644 | { |
402209ff JH |
3645 | /* The register was not previously live at all. Record |
3646 | the condition under which it is still dead. */ | |
703ad42b | 3647 | rcli = xmalloc (sizeof (*rcli)); |
402209ff JH |
3648 | rcli->condition = not_reg_cond (cond); |
3649 | rcli->stores = const0_rtx; | |
3650 | rcli->orig_condition = const0_rtx; | |
3651 | splay_tree_insert (pbi->reg_cond_dead, i, | |
3652 | (splay_tree_value) rcli); | |
4dc9341c | 3653 | |
402209ff | 3654 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); |
4dc9341c MH |
3655 | } |
3656 | } | |
9be40833 | 3657 | else if (this_was_live) |
4dc9341c | 3658 | { |
402209ff JH |
3659 | /* The register may have been conditionally live previously, but |
3660 | is now unconditionally live. Remove it from the conditionally | |
3661 | dead list, so that a conditional set won't cause us to think | |
3662 | it dead. */ | |
3663 | splay_tree_remove (pbi->reg_cond_dead, i); | |
4dc9341c | 3664 | } |
402209ff | 3665 | #endif |
4dc9341c MH |
3666 | } |
3667 | } | |
3668 | ||
402209ff JH |
3669 | /* Scan expression X and store a 1-bit in NEW_LIVE for each reg it uses. |
3670 | This is done assuming the registers needed from X are those that | |
3671 | have 1-bits in PBI->REG_LIVE. | |
6057c0e6 | 3672 | |
402209ff JH |
3673 | INSN is the containing instruction. If INSN is dead, this function |
3674 | is not called. */ | |
135ebc36 | 3675 | |
402209ff | 3676 | static void |
6cf9ac28 | 3677 | mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) |
135ebc36 | 3678 | { |
b3694847 SS |
3679 | RTX_CODE code; |
3680 | int regno; | |
402209ff | 3681 | int flags = pbi->flags; |
135ebc36 | 3682 | |
402209ff | 3683 | retry: |
5a133afd JH |
3684 | if (!x) |
3685 | return; | |
402209ff JH |
3686 | code = GET_CODE (x); |
3687 | switch (code) | |
135ebc36 | 3688 | { |
402209ff JH |
3689 | case LABEL_REF: |
3690 | case SYMBOL_REF: | |
3691 | case CONST_INT: | |
3692 | case CONST: | |
3693 | case CONST_DOUBLE: | |
69ef87e2 | 3694 | case CONST_VECTOR: |
402209ff JH |
3695 | case PC: |
3696 | case ADDR_VEC: | |
3697 | case ADDR_DIFF_VEC: | |
3698 | return; | |
4dc9341c | 3699 | |
402209ff JH |
3700 | #ifdef HAVE_cc0 |
3701 | case CC0: | |
3702 | pbi->cc0_live = 1; | |
3703 | return; | |
3704 | #endif | |
4dc9341c | 3705 | |
402209ff JH |
3706 | case CLOBBER: |
3707 | /* If we are clobbering a MEM, mark any registers inside the address | |
3708 | as being used. */ | |
3709 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
3710 | mark_used_regs (pbi, XEXP (XEXP (x, 0), 0), cond, insn); | |
3711 | return; | |
4dc9341c | 3712 | |
402209ff JH |
3713 | case MEM: |
3714 | /* Don't bother watching stores to mems if this is not the | |
3715 | final pass. We'll not be deleting dead stores this round. */ | |
5149f070 | 3716 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
4dc9341c | 3717 | { |
402209ff JH |
3718 | /* Invalidate the data for the last MEM stored, but only if MEM is |
3719 | something that can be stored into. */ | |
3720 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
3721 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))) | |
3722 | /* Needn't clear the memory set list. */ | |
3723 | ; | |
3724 | else | |
4dc9341c | 3725 | { |
402209ff JH |
3726 | rtx temp = pbi->mem_set_list; |
3727 | rtx prev = NULL_RTX; | |
3728 | rtx next; | |
3729 | ||
3730 | while (temp) | |
3731 | { | |
3732 | next = XEXP (temp, 1); | |
3733 | if (anti_dependence (XEXP (temp, 0), x)) | |
3734 | { | |
3735 | /* Splice temp out of the list. */ | |
3736 | if (prev) | |
3737 | XEXP (prev, 1) = next; | |
3738 | else | |
3739 | pbi->mem_set_list = next; | |
3740 | free_EXPR_LIST_node (temp); | |
3741 | pbi->mem_set_list_len--; | |
3742 | } | |
3743 | else | |
3744 | prev = temp; | |
3745 | temp = next; | |
3746 | } | |
4dc9341c | 3747 | } |
402209ff JH |
3748 | |
3749 | /* If the memory reference had embedded side effects (autoincrement | |
3750 | address modes. Then we may need to kill some entries on the | |
3751 | memory set list. */ | |
3752 | if (insn) | |
fe4b3c79 | 3753 | for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi); |
4dc9341c | 3754 | } |
4dc9341c | 3755 | |
402209ff JH |
3756 | #ifdef AUTO_INC_DEC |
3757 | if (flags & PROP_AUTOINC) | |
dd3f0101 | 3758 | find_auto_inc (pbi, x, insn); |
402209ff JH |
3759 | #endif |
3760 | break; | |
d59c5346 | 3761 | |
402209ff | 3762 | case SUBREG: |
cff9f8d5 | 3763 | #ifdef CANNOT_CHANGE_MODE_CLASS |
af166e5d ZD |
3764 | if ((flags & PROP_REG_INFO) |
3765 | && GET_CODE (SUBREG_REG (x)) == REG | |
cff9f8d5 | 3766 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
10a3fdd9 JH |
3767 | bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (x)) |
3768 | * MAX_MACHINE_MODE | |
3769 | + GET_MODE (x)); | |
402209ff | 3770 | #endif |
d59c5346 | 3771 | |
402209ff JH |
3772 | /* While we're here, optimize this case. */ |
3773 | x = SUBREG_REG (x); | |
3774 | if (GET_CODE (x) != REG) | |
3775 | goto retry; | |
3776 | /* Fall through. */ | |
d59c5346 | 3777 | |
402209ff JH |
3778 | case REG: |
3779 | /* See a register other than being set => mark it as needed. */ | |
3780 | mark_used_reg (pbi, x, cond, insn); | |
3781 | return; | |
d59c5346 | 3782 | |
402209ff JH |
3783 | case SET: |
3784 | { | |
b3694847 | 3785 | rtx testreg = SET_DEST (x); |
402209ff | 3786 | int mark_dest = 0; |
d59c5346 | 3787 | |
402209ff JH |
3788 | /* If storing into MEM, don't show it as being used. But do |
3789 | show the address as being used. */ | |
3790 | if (GET_CODE (testreg) == MEM) | |
3791 | { | |
3792 | #ifdef AUTO_INC_DEC | |
3793 | if (flags & PROP_AUTOINC) | |
3794 | find_auto_inc (pbi, testreg, insn); | |
3795 | #endif | |
3796 | mark_used_regs (pbi, XEXP (testreg, 0), cond, insn); | |
3797 | mark_used_regs (pbi, SET_SRC (x), cond, insn); | |
3798 | return; | |
3799 | } | |
d59c5346 | 3800 | |
402209ff JH |
3801 | /* Storing in STRICT_LOW_PART is like storing in a reg |
3802 | in that this SET might be dead, so ignore it in TESTREG. | |
3803 | but in some other ways it is like using the reg. | |
d59c5346 | 3804 | |
402209ff JH |
3805 | Storing in a SUBREG or a bit field is like storing the entire |
3806 | register in that if the register's value is not used | |
3807 | then this SET is not needed. */ | |
3808 | while (GET_CODE (testreg) == STRICT_LOW_PART | |
3809 | || GET_CODE (testreg) == ZERO_EXTRACT | |
3810 | || GET_CODE (testreg) == SIGN_EXTRACT | |
3811 | || GET_CODE (testreg) == SUBREG) | |
3812 | { | |
cff9f8d5 | 3813 | #ifdef CANNOT_CHANGE_MODE_CLASS |
af166e5d ZD |
3814 | if ((flags & PROP_REG_INFO) |
3815 | && GET_CODE (testreg) == SUBREG | |
402209ff | 3816 | && GET_CODE (SUBREG_REG (testreg)) == REG |
cff9f8d5 | 3817 | && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER) |
10a3fdd9 JH |
3818 | bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (testreg)) |
3819 | * MAX_MACHINE_MODE | |
3820 | + GET_MODE (testreg)); | |
402209ff | 3821 | #endif |
d59c5346 | 3822 | |
402209ff JH |
3823 | /* Modifying a single register in an alternate mode |
3824 | does not use any of the old value. But these other | |
3825 | ways of storing in a register do use the old value. */ | |
3826 | if (GET_CODE (testreg) == SUBREG | |
ec8e621d KG |
3827 | && !((REG_BYTES (SUBREG_REG (testreg)) |
3828 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD | |
3829 | > (REG_BYTES (testreg) | |
3830 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
402209ff JH |
3831 | ; |
3832 | else | |
3833 | mark_dest = 1; | |
d59c5346 | 3834 | |
402209ff JH |
3835 | testreg = XEXP (testreg, 0); |
3836 | } | |
d59c5346 | 3837 | |
402209ff JH |
3838 | /* If this is a store into a register or group of registers, |
3839 | recursively scan the value being stored. */ | |
d59c5346 | 3840 | |
402209ff JH |
3841 | if ((GET_CODE (testreg) == PARALLEL |
3842 | && GET_MODE (testreg) == BLKmode) | |
3843 | || (GET_CODE (testreg) == REG | |
3844 | && (regno = REGNO (testreg), | |
3845 | ! (regno == FRAME_POINTER_REGNUM | |
3846 | && (! reload_completed || frame_pointer_needed))) | |
3847 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
3848 | && ! (regno == HARD_FRAME_POINTER_REGNUM | |
3849 | && (! reload_completed || frame_pointer_needed)) | |
3850 | #endif | |
3851 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
3852 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
3853 | #endif | |
3854 | )) | |
3855 | { | |
3856 | if (mark_dest) | |
3857 | mark_used_regs (pbi, SET_DEST (x), cond, insn); | |
3858 | mark_used_regs (pbi, SET_SRC (x), cond, insn); | |
3859 | return; | |
3860 | } | |
3861 | } | |
3862 | break; | |
c9bacfdb | 3863 | |
402209ff JH |
3864 | case ASM_OPERANDS: |
3865 | case UNSPEC_VOLATILE: | |
3866 | case TRAP_IF: | |
3867 | case ASM_INPUT: | |
3868 | { | |
3869 | /* Traditional and volatile asm instructions must be considered to use | |
3870 | and clobber all hard registers, all pseudo-registers and all of | |
3871 | memory. So must TRAP_IF and UNSPEC_VOLATILE operations. | |
4dc9341c | 3872 | |
402209ff JH |
3873 | Consider for instance a volatile asm that changes the fpu rounding |
3874 | mode. An insn should not be moved across this even if it only uses | |
3875 | pseudo-regs because it might give an incorrectly rounded result. | |
4dc9341c | 3876 | |
402209ff JH |
3877 | ?!? Unfortunately, marking all hard registers as live causes massive |
3878 | problems for the register allocator and marking all pseudos as live | |
3879 | creates mountains of uninitialized variable warnings. | |
4dc9341c | 3880 | |
402209ff JH |
3881 | So for now, just clear the memory set list and mark any regs |
3882 | we can find in ASM_OPERANDS as used. */ | |
3883 | if (code != ASM_OPERANDS || MEM_VOLATILE_P (x)) | |
3884 | { | |
3885 | free_EXPR_LIST_list (&pbi->mem_set_list); | |
3886 | pbi->mem_set_list_len = 0; | |
3887 | } | |
c9bacfdb | 3888 | |
402209ff JH |
3889 | /* For all ASM_OPERANDS, we must traverse the vector of input operands. |
3890 | We can not just fall through here since then we would be confused | |
3891 | by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate | |
3892 | traditional asms unlike their normal usage. */ | |
3893 | if (code == ASM_OPERANDS) | |
3894 | { | |
3895 | int j; | |
628f05b4 | 3896 | |
402209ff JH |
3897 | for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++) |
3898 | mark_used_regs (pbi, ASM_OPERANDS_INPUT (x, j), cond, insn); | |
3899 | } | |
3900 | break; | |
3901 | } | |
628f05b4 | 3902 | |
402209ff JH |
3903 | case COND_EXEC: |
3904 | if (cond != NULL_RTX) | |
3905 | abort (); | |
c9bacfdb | 3906 | |
402209ff | 3907 | mark_used_regs (pbi, COND_EXEC_TEST (x), NULL_RTX, insn); |
c9bacfdb | 3908 | |
402209ff JH |
3909 | cond = COND_EXEC_TEST (x); |
3910 | x = COND_EXEC_CODE (x); | |
3911 | goto retry; | |
628f05b4 | 3912 | |
402209ff JH |
3913 | case PHI: |
3914 | /* We _do_not_ want to scan operands of phi nodes. Operands of | |
3915 | a phi function are evaluated only when control reaches this | |
3916 | block along a particular edge. Therefore, regs that appear | |
3917 | as arguments to phi should not be added to the global live at | |
3918 | start. */ | |
3919 | return; | |
c9bacfdb | 3920 | |
402209ff JH |
3921 | default: |
3922 | break; | |
4dc9341c | 3923 | } |
628f05b4 | 3924 | |
402209ff | 3925 | /* Recursively scan the operands of this expression. */ |
4dc9341c | 3926 | |
402209ff | 3927 | { |
b3694847 SS |
3928 | const char * const fmt = GET_RTX_FORMAT (code); |
3929 | int i; | |
4dc9341c | 3930 | |
402209ff JH |
3931 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
3932 | { | |
3933 | if (fmt[i] == 'e') | |
3934 | { | |
3935 | /* Tail recursive case: save a function call level. */ | |
3936 | if (i == 0) | |
3937 | { | |
3938 | x = XEXP (x, 0); | |
3939 | goto retry; | |
3940 | } | |
3941 | mark_used_regs (pbi, XEXP (x, i), cond, insn); | |
3942 | } | |
3943 | else if (fmt[i] == 'E') | |
3944 | { | |
b3694847 | 3945 | int j; |
402209ff JH |
3946 | for (j = 0; j < XVECLEN (x, i); j++) |
3947 | mark_used_regs (pbi, XVECEXP (x, i, j), cond, insn); | |
3948 | } | |
3949 | } | |
3950 | } | |
4dc9341c | 3951 | } |
402209ff JH |
3952 | \f |
3953 | #ifdef AUTO_INC_DEC | |
4dc9341c | 3954 | |
402209ff | 3955 | static int |
6cf9ac28 | 3956 | try_pre_increment_1 (struct propagate_block_info *pbi, rtx insn) |
402209ff JH |
3957 | { |
3958 | /* Find the next use of this reg. If in same basic block, | |
3959 | make it do pre-increment or pre-decrement if appropriate. */ | |
3960 | rtx x = single_set (insn); | |
3961 | HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1) | |
3962 | * INTVAL (XEXP (SET_SRC (x), 1))); | |
3963 | int regno = REGNO (SET_DEST (x)); | |
3964 | rtx y = pbi->reg_next_use[regno]; | |
3965 | if (y != 0 | |
3966 | && SET_DEST (x) != stack_pointer_rtx | |
3967 | && BLOCK_NUM (y) == BLOCK_NUM (insn) | |
3968 | /* Don't do this if the reg dies, or gets set in y; a standard addressing | |
3969 | mode would be better. */ | |
3970 | && ! dead_or_set_p (y, SET_DEST (x)) | |
3971 | && try_pre_increment (y, SET_DEST (x), amount)) | |
3972 | { | |
3973 | /* We have found a suitable auto-increment and already changed | |
3974 | insn Y to do it. So flush this increment instruction. */ | |
3dec4024 | 3975 | propagate_block_delete_insn (insn); |
b53978a3 | 3976 | |
402209ff JH |
3977 | /* Count a reference to this reg for the increment insn we are |
3978 | deleting. When a reg is incremented, spilling it is worse, | |
3979 | so we want to make that less likely. */ | |
3980 | if (regno >= FIRST_PSEUDO_REGISTER) | |
3981 | { | |
3982 | REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb); | |
3983 | REG_N_SETS (regno)++; | |
3984 | } | |
b53978a3 | 3985 | |
402209ff JH |
3986 | /* Flush any remembered memories depending on the value of |
3987 | the incremented register. */ | |
3988 | invalidate_mems_from_set (pbi, SET_DEST (x)); | |
b53978a3 | 3989 | |
402209ff JH |
3990 | return 1; |
3991 | } | |
3992 | return 0; | |
3993 | } | |
b53978a3 | 3994 | |
402209ff JH |
3995 | /* Try to change INSN so that it does pre-increment or pre-decrement |
3996 | addressing on register REG in order to add AMOUNT to REG. | |
3997 | AMOUNT is negative for pre-decrement. | |
3998 | Returns 1 if the change could be made. | |
3999 | This checks all about the validity of the result of modifying INSN. */ | |
b53978a3 | 4000 | |
402209ff | 4001 | static int |
6cf9ac28 | 4002 | try_pre_increment (rtx insn, rtx reg, HOST_WIDE_INT amount) |
b53978a3 | 4003 | { |
b3694847 | 4004 | rtx use; |
b53978a3 | 4005 | |
402209ff JH |
4006 | /* Nonzero if we can try to make a pre-increment or pre-decrement. |
4007 | For example, addl $4,r1; movl (r1),... can become movl +(r1),... */ | |
4008 | int pre_ok = 0; | |
4009 | /* Nonzero if we can try to make a post-increment or post-decrement. | |
4010 | For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,... | |
4011 | It is possible for both PRE_OK and POST_OK to be nonzero if the machine | |
4012 | supports both pre-inc and post-inc, or both pre-dec and post-dec. */ | |
4013 | int post_ok = 0; | |
b53978a3 | 4014 | |
402209ff JH |
4015 | /* Nonzero if the opportunity actually requires post-inc or post-dec. */ |
4016 | int do_post = 0; | |
b53978a3 | 4017 | |
402209ff JH |
4018 | /* From the sign of increment, see which possibilities are conceivable |
4019 | on this target machine. */ | |
4020 | if (HAVE_PRE_INCREMENT && amount > 0) | |
4021 | pre_ok = 1; | |
4022 | if (HAVE_POST_INCREMENT && amount > 0) | |
4023 | post_ok = 1; | |
b53978a3 | 4024 | |
402209ff JH |
4025 | if (HAVE_PRE_DECREMENT && amount < 0) |
4026 | pre_ok = 1; | |
4027 | if (HAVE_POST_DECREMENT && amount < 0) | |
4028 | post_ok = 1; | |
b53978a3 | 4029 | |
402209ff JH |
4030 | if (! (pre_ok || post_ok)) |
4031 | return 0; | |
b53978a3 | 4032 | |
402209ff JH |
4033 | /* It is not safe to add a side effect to a jump insn |
4034 | because if the incremented register is spilled and must be reloaded | |
4035 | there would be no way to store the incremented value back in memory. */ | |
c9bacfdb | 4036 | |
402209ff JH |
4037 | if (GET_CODE (insn) == JUMP_INSN) |
4038 | return 0; | |
b53978a3 | 4039 | |
402209ff JH |
4040 | use = 0; |
4041 | if (pre_ok) | |
4042 | use = find_use_as_address (PATTERN (insn), reg, 0); | |
60e8b9f0 | 4043 | if (post_ok && (use == 0 || use == (rtx) (size_t) 1)) |
b53978a3 | 4044 | { |
402209ff JH |
4045 | use = find_use_as_address (PATTERN (insn), reg, -amount); |
4046 | do_post = 1; | |
b53978a3 JO |
4047 | } |
4048 | ||
60e8b9f0 | 4049 | if (use == 0 || use == (rtx) (size_t) 1) |
402209ff JH |
4050 | return 0; |
4051 | ||
4052 | if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount)) | |
4053 | return 0; | |
b53978a3 | 4054 | |
402209ff JH |
4055 | /* See if this combination of instruction and addressing mode exists. */ |
4056 | if (! validate_change (insn, &XEXP (use, 0), | |
4057 | gen_rtx_fmt_e (amount > 0 | |
4058 | ? (do_post ? POST_INC : PRE_INC) | |
4059 | : (do_post ? POST_DEC : PRE_DEC), | |
4060 | Pmode, reg), 0)) | |
4061 | return 0; | |
b53978a3 | 4062 | |
402209ff JH |
4063 | /* Record that this insn now has an implicit side effect on X. */ |
4064 | REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, reg, REG_NOTES (insn)); | |
4065 | return 1; | |
b53978a3 JO |
4066 | } |
4067 | ||
402209ff JH |
4068 | #endif /* AUTO_INC_DEC */ |
4069 | \f | |
4070 | /* Find the place in the rtx X where REG is used as a memory address. | |
4071 | Return the MEM rtx that so uses it. | |
4072 | If PLUSCONST is nonzero, search instead for a memory address equivalent to | |
4073 | (plus REG (const_int PLUSCONST)). | |
5d6a16e2 | 4074 | |
402209ff JH |
4075 | If such an address does not appear, return 0. |
4076 | If REG appears more than once, or is used other than in such an address, | |
60e8b9f0 | 4077 | return (rtx) 1. */ |
5d6a16e2 | 4078 | |
402209ff | 4079 | rtx |
6cf9ac28 | 4080 | find_use_as_address (rtx x, rtx reg, HOST_WIDE_INT plusconst) |
5d6a16e2 | 4081 | { |
402209ff JH |
4082 | enum rtx_code code = GET_CODE (x); |
4083 | const char * const fmt = GET_RTX_FORMAT (code); | |
b3694847 SS |
4084 | int i; |
4085 | rtx value = 0; | |
4086 | rtx tem; | |
4a7da9b5 | 4087 | |
402209ff JH |
4088 | if (code == MEM && XEXP (x, 0) == reg && plusconst == 0) |
4089 | return x; | |
5d6a16e2 | 4090 | |
402209ff JH |
4091 | if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS |
4092 | && XEXP (XEXP (x, 0), 0) == reg | |
4093 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
4094 | && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) | |
4095 | return x; | |
ef120fc0 | 4096 | |
402209ff | 4097 | if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) |
5d6a16e2 | 4098 | { |
402209ff JH |
4099 | /* If REG occurs inside a MEM used in a bit-field reference, |
4100 | that is unacceptable. */ | |
4101 | if (find_use_as_address (XEXP (x, 0), reg, 0) != 0) | |
60e8b9f0 | 4102 | return (rtx) (size_t) 1; |
5d6a16e2 | 4103 | } |
5d6a16e2 | 4104 | |
402209ff | 4105 | if (x == reg) |
60e8b9f0 | 4106 | return (rtx) (size_t) 1; |
4dc9341c | 4107 | |
402209ff | 4108 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
4dc9341c | 4109 | { |
402209ff JH |
4110 | if (fmt[i] == 'e') |
4111 | { | |
4112 | tem = find_use_as_address (XEXP (x, i), reg, plusconst); | |
4113 | if (value == 0) | |
4114 | value = tem; | |
4115 | else if (tem != 0) | |
60e8b9f0 | 4116 | return (rtx) (size_t) 1; |
402209ff JH |
4117 | } |
4118 | else if (fmt[i] == 'E') | |
4dc9341c | 4119 | { |
b3694847 | 4120 | int j; |
402209ff | 4121 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
4dc9341c | 4122 | { |
402209ff JH |
4123 | tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst); |
4124 | if (value == 0) | |
4125 | value = tem; | |
4126 | else if (tem != 0) | |
60e8b9f0 | 4127 | return (rtx) (size_t) 1; |
4dc9341c MH |
4128 | } |
4129 | } | |
4130 | } | |
4dc9341c | 4131 | |
402209ff JH |
4132 | return value; |
4133 | } | |
4134 | \f | |
4135 | /* Write information about registers and basic blocks into FILE. | |
4136 | This is part of making a debugging dump. */ | |
c9bacfdb | 4137 | |
402209ff | 4138 | void |
6cf9ac28 | 4139 | dump_regset (regset r, FILE *outf) |
4dc9341c | 4140 | { |
402209ff JH |
4141 | int i; |
4142 | if (r == NULL) | |
3abd3239 | 4143 | { |
402209ff | 4144 | fputs (" (nil)", outf); |
3abd3239 MH |
4145 | return; |
4146 | } | |
4dc9341c | 4147 | |
402209ff | 4148 | EXECUTE_IF_SET_IN_REG_SET (r, 0, i, |
4dc9341c | 4149 | { |
402209ff JH |
4150 | fprintf (outf, " %d", i); |
4151 | if (i < FIRST_PSEUDO_REGISTER) | |
4152 | fprintf (outf, " [%s]", | |
4153 | reg_names[i]); | |
4154 | }); | |
4dc9341c MH |
4155 | } |
4156 | ||
fbe5a4a6 | 4157 | /* Print a human-readable representation of R on the standard error |
402209ff JH |
4158 | stream. This function is designed to be used from within the |
4159 | debugger. */ | |
c9bacfdb | 4160 | |
402209ff | 4161 | void |
6cf9ac28 | 4162 | debug_regset (regset r) |
4dc9341c | 4163 | { |
402209ff JH |
4164 | dump_regset (r, stderr); |
4165 | putc ('\n', stderr); | |
4dc9341c MH |
4166 | } |
4167 | ||
402209ff JH |
4168 | /* Recompute register set/reference counts immediately prior to register |
4169 | allocation. | |
5d6a16e2 | 4170 | |
402209ff JH |
4171 | This avoids problems with set/reference counts changing to/from values |
4172 | which have special meanings to the register allocators. | |
eab02feb | 4173 | |
402209ff JH |
4174 | Additionally, the reference counts are the primary component used by the |
4175 | register allocators to prioritize pseudos for allocation to hard regs. | |
4176 | More accurate reference counts generally lead to better register allocation. | |
eab02feb | 4177 | |
402209ff | 4178 | F is the first insn to be scanned. |
eab02feb | 4179 | |
402209ff JH |
4180 | LOOP_STEP denotes how much loop_depth should be incremented per |
4181 | loop nesting level in order to increase the ref count more for | |
4182 | references in a loop. | |
b9f22704 | 4183 | |
402209ff JH |
4184 | It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and |
4185 | possibly other information which is used by the register allocators. */ | |
eab02feb | 4186 | |
402209ff | 4187 | void |
6cf9ac28 | 4188 | recompute_reg_usage (rtx f ATTRIBUTE_UNUSED, int loop_step ATTRIBUTE_UNUSED) |
402209ff JH |
4189 | { |
4190 | allocate_reg_life_data (); | |
4191 | update_life_info (NULL, UPDATE_LIFE_LOCAL, PROP_REG_INFO); | |
eab02feb MH |
4192 | } |
4193 | ||
402209ff JH |
4194 | /* Optionally removes all the REG_DEAD and REG_UNUSED notes from a set of |
4195 | blocks. If BLOCKS is NULL, assume the universal set. Returns a count | |
4196 | of the number of registers that died. */ | |
d4b60170 | 4197 | |
c9bacfdb | 4198 | int |
6cf9ac28 | 4199 | count_or_remove_death_notes (sbitmap blocks, int kill) |
4dc9341c | 4200 | { |
e0082a72 ZD |
4201 | int count = 0; |
4202 | basic_block bb; | |
ce4bbac7 | 4203 | |
e0082a72 | 4204 | FOR_EACH_BB_REVERSE (bb) |
4dc9341c | 4205 | { |
402209ff | 4206 | rtx insn; |
5d6a16e2 | 4207 | |
e0082a72 | 4208 | if (blocks && ! TEST_BIT (blocks, bb->index)) |
402209ff | 4209 | continue; |
5d6a16e2 | 4210 | |
402209ff | 4211 | for (insn = bb->head;; insn = NEXT_INSN (insn)) |
4dc9341c | 4212 | { |
402209ff | 4213 | if (INSN_P (insn)) |
4dc9341c | 4214 | { |
402209ff JH |
4215 | rtx *pprev = ®_NOTES (insn); |
4216 | rtx link = *pprev; | |
4217 | ||
4218 | while (link) | |
4dc9341c | 4219 | { |
402209ff JH |
4220 | switch (REG_NOTE_KIND (link)) |
4221 | { | |
4222 | case REG_DEAD: | |
4223 | if (GET_CODE (XEXP (link, 0)) == REG) | |
4224 | { | |
4225 | rtx reg = XEXP (link, 0); | |
4226 | int n; | |
c9bacfdb | 4227 | |
402209ff JH |
4228 | if (REGNO (reg) >= FIRST_PSEUDO_REGISTER) |
4229 | n = 1; | |
4230 | else | |
4231 | n = HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg)); | |
4232 | count += n; | |
4233 | } | |
4234 | /* Fall through. */ | |
c9bacfdb | 4235 | |
402209ff JH |
4236 | case REG_UNUSED: |
4237 | if (kill) | |
4238 | { | |
4239 | rtx next = XEXP (link, 1); | |
4240 | free_EXPR_LIST_node (link); | |
4241 | *pprev = link = next; | |
4242 | break; | |
4243 | } | |
4244 | /* Fall through. */ | |
c9bacfdb | 4245 | |
402209ff JH |
4246 | default: |
4247 | pprev = &XEXP (link, 1); | |
4248 | link = *pprev; | |
4249 | break; | |
4250 | } | |
4dc9341c MH |
4251 | } |
4252 | } | |
c9bacfdb | 4253 | |
402209ff JH |
4254 | if (insn == bb->end) |
4255 | break; | |
5d6a16e2 | 4256 | } |
5a660bff | 4257 | } |
4dc9341c | 4258 | |
402209ff | 4259 | return count; |
4dc9341c | 4260 | } |
b932f770 JH |
4261 | /* Clear LOG_LINKS fields of insns in a selected blocks or whole chain |
4262 | if blocks is NULL. */ | |
efc9bd41 | 4263 | |
b932f770 | 4264 | static void |
6cf9ac28 | 4265 | clear_log_links (sbitmap blocks) |
d9d4fb43 | 4266 | { |
b932f770 JH |
4267 | rtx insn; |
4268 | int i; | |
1868b439 | 4269 | |
b932f770 | 4270 | if (!blocks) |
1868b439 | 4271 | { |
b932f770 JH |
4272 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) |
4273 | if (INSN_P (insn)) | |
e9cf0934 | 4274 | free_INSN_LIST_list (&LOG_LINKS (insn)); |
1868b439 | 4275 | } |
b932f770 JH |
4276 | else |
4277 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, | |
4278 | { | |
4279 | basic_block bb = BASIC_BLOCK (i); | |
16e99e29 | 4280 | |
b932f770 JH |
4281 | for (insn = bb->head; insn != NEXT_INSN (bb->end); |
4282 | insn = NEXT_INSN (insn)) | |
4283 | if (INSN_P (insn)) | |
e9cf0934 | 4284 | free_INSN_LIST_list (&LOG_LINKS (insn)); |
b932f770 | 4285 | }); |
d9d4fb43 | 4286 | } |
efc9bd41 RK |
4287 | |
4288 | /* Given a register bitmap, turn on the bits in a HARD_REG_SET that | |
4289 | correspond to the hard registers, if any, set in that map. This | |
4290 | could be done far more efficiently by having all sorts of special-cases | |
4291 | with moving single words, but probably isn't worth the trouble. */ | |
4292 | ||
4293 | void | |
6cf9ac28 | 4294 | reg_set_to_hard_reg_set (HARD_REG_SET *to, bitmap from) |
efc9bd41 RK |
4295 | { |
4296 | int i; | |
4297 | ||
4298 | EXECUTE_IF_SET_IN_BITMAP | |
4299 | (from, 0, i, | |
4300 | { | |
4301 | if (i >= FIRST_PSEUDO_REGISTER) | |
4302 | return; | |
4303 | SET_HARD_REG_BIT (*to, i); | |
4304 | }); | |
4305 | } |