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d7429b6a | 1 | /* Data flow analysis for GNU compiler. |
a5cad800 | 2 | Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc. |
d7429b6a RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
a35311b0 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
d7429b6a RK |
20 | |
21 | ||
22 | /* This file contains the data flow analysis pass of the compiler. | |
23 | It computes data flow information | |
24 | which tells combine_instructions which insns to consider combining | |
25 | and controls register allocation. | |
26 | ||
27 | Additional data flow information that is too bulky to record | |
28 | is generated during the analysis, and is used at that time to | |
29 | create autoincrement and autodecrement addressing. | |
30 | ||
31 | The first step is dividing the function into basic blocks. | |
32 | find_basic_blocks does this. Then life_analysis determines | |
33 | where each register is live and where it is dead. | |
34 | ||
35 | ** find_basic_blocks ** | |
36 | ||
37 | find_basic_blocks divides the current function's rtl | |
38 | into basic blocks. It records the beginnings and ends of the | |
39 | basic blocks in the vectors basic_block_head and basic_block_end, | |
40 | and the number of blocks in n_basic_blocks. | |
41 | ||
42 | find_basic_blocks also finds any unreachable loops | |
43 | and deletes them. | |
44 | ||
45 | ** life_analysis ** | |
46 | ||
47 | life_analysis is called immediately after find_basic_blocks. | |
48 | It uses the basic block information to determine where each | |
49 | hard or pseudo register is live. | |
50 | ||
51 | ** live-register info ** | |
52 | ||
53 | The information about where each register is live is in two parts: | |
54 | the REG_NOTES of insns, and the vector basic_block_live_at_start. | |
55 | ||
56 | basic_block_live_at_start has an element for each basic block, | |
57 | and the element is a bit-vector with a bit for each hard or pseudo | |
58 | register. The bit is 1 if the register is live at the beginning | |
59 | of the basic block. | |
60 | ||
61 | Two types of elements can be added to an insn's REG_NOTES. | |
62 | A REG_DEAD note is added to an insn's REG_NOTES for any register | |
63 | that meets both of two conditions: The value in the register is not | |
64 | needed in subsequent insns and the insn does not replace the value in | |
65 | the register (in the case of multi-word hard registers, the value in | |
66 | each register must be replaced by the insn to avoid a REG_DEAD note). | |
67 | ||
68 | In the vast majority of cases, an object in a REG_DEAD note will be | |
69 | used somewhere in the insn. The (rare) exception to this is if an | |
70 | insn uses a multi-word hard register and only some of the registers are | |
71 | needed in subsequent insns. In that case, REG_DEAD notes will be | |
72 | provided for those hard registers that are not subsequently needed. | |
73 | Partial REG_DEAD notes of this type do not occur when an insn sets | |
74 | only some of the hard registers used in such a multi-word operand; | |
75 | omitting REG_DEAD notes for objects stored in an insn is optional and | |
76 | the desire to do so does not justify the complexity of the partial | |
77 | REG_DEAD notes. | |
78 | ||
79 | REG_UNUSED notes are added for each register that is set by the insn | |
80 | but is unused subsequently (if every register set by the insn is unused | |
81 | and the insn does not reference memory or have some other side-effect, | |
82 | the insn is deleted instead). If only part of a multi-word hard | |
83 | register is used in a subsequent insn, REG_UNUSED notes are made for | |
84 | the parts that will not be used. | |
85 | ||
86 | To determine which registers are live after any insn, one can | |
87 | start from the beginning of the basic block and scan insns, noting | |
88 | which registers are set by each insn and which die there. | |
89 | ||
90 | ** Other actions of life_analysis ** | |
91 | ||
92 | life_analysis sets up the LOG_LINKS fields of insns because the | |
93 | information needed to do so is readily available. | |
94 | ||
95 | life_analysis deletes insns whose only effect is to store a value | |
96 | that is never used. | |
97 | ||
98 | life_analysis notices cases where a reference to a register as | |
99 | a memory address can be combined with a preceding or following | |
100 | incrementation or decrementation of the register. The separate | |
101 | instruction to increment or decrement is deleted and the address | |
102 | is changed to a POST_INC or similar rtx. | |
103 | ||
104 | Each time an incrementing or decrementing address is created, | |
105 | a REG_INC element is added to the insn's REG_NOTES list. | |
106 | ||
107 | life_analysis fills in certain vectors containing information about | |
108 | register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length, | |
fdb8a883 JW |
109 | reg_n_calls_crosses and reg_basic_block. |
110 | ||
111 | life_analysis sets current_function_sp_is_unchanging if the function | |
112 | doesn't modify the stack pointer. */ | |
d7429b6a | 113 | \f |
d7429b6a | 114 | #include "config.h" |
670ee920 | 115 | #include "system.h" |
d7429b6a RK |
116 | #include "rtl.h" |
117 | #include "basic-block.h" | |
118 | #include "insn-config.h" | |
119 | #include "regs.h" | |
120 | #include "hard-reg-set.h" | |
121 | #include "flags.h" | |
122 | #include "output.h" | |
3d195391 | 123 | #include "except.h" |
2e107e9e | 124 | #include "toplev.h" |
79c9824e | 125 | #include "recog.h" |
d7429b6a RK |
126 | |
127 | #include "obstack.h" | |
128 | #define obstack_chunk_alloc xmalloc | |
129 | #define obstack_chunk_free free | |
130 | ||
421382ac BS |
131 | #define XNMALLOC(TYPE, COUNT) ((TYPE *) xmalloc ((COUNT) * sizeof (TYPE))) |
132 | ||
7eb136d6 MM |
133 | /* The contents of the current function definition are allocated |
134 | in this obstack, and all are freed at the end of the function. | |
135 | For top-level functions, this is temporary_obstack. | |
136 | Separate obstacks are made for nested functions. */ | |
137 | ||
138 | extern struct obstack *function_obstack; | |
139 | ||
d7429b6a RK |
140 | /* List of labels that must never be deleted. */ |
141 | extern rtx forced_labels; | |
142 | ||
143 | /* Get the basic block number of an insn. | |
144 | This info should not be expected to remain available | |
145 | after the end of life_analysis. */ | |
146 | ||
147 | /* This is the limit of the allocated space in the following two arrays. */ | |
148 | ||
149 | static int max_uid_for_flow; | |
150 | ||
151 | #define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)] | |
152 | ||
153 | /* This is where the BLOCK_NUM values are really stored. | |
154 | This is set up by find_basic_blocks and used there and in life_analysis, | |
155 | and then freed. */ | |
156 | ||
5ece9746 | 157 | int *uid_block_number; |
d7429b6a RK |
158 | |
159 | /* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */ | |
160 | ||
161 | #define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)] | |
162 | static char *uid_volatile; | |
163 | ||
56744d1a JL |
164 | /* Nonzero if the second flow pass has completed. */ |
165 | int flow2_completed; | |
166 | ||
d7429b6a RK |
167 | /* Number of basic blocks in the current function. */ |
168 | ||
169 | int n_basic_blocks; | |
170 | ||
171 | /* Maximum register number used in this function, plus one. */ | |
172 | ||
173 | int max_regno; | |
174 | ||
b1f21e0a | 175 | /* Indexed by n, giving various register information */ |
d7429b6a | 176 | |
6feacd09 | 177 | varray_type reg_n_info; |
d7429b6a | 178 | |
a494747c MM |
179 | /* Size of the reg_n_info table. */ |
180 | ||
181 | unsigned int reg_n_max; | |
182 | ||
d7429b6a RK |
183 | /* Element N is the next insn that uses (hard or pseudo) register number N |
184 | within the current basic block; or zero, if there is no such insn. | |
185 | This is valid only during the final backward scan in propagate_block. */ | |
186 | ||
187 | static rtx *reg_next_use; | |
188 | ||
189 | /* Size of a regset for the current function, | |
190 | in (1) bytes and (2) elements. */ | |
191 | ||
192 | int regset_bytes; | |
193 | int regset_size; | |
194 | ||
195 | /* Element N is first insn in basic block N. | |
196 | This info lasts until we finish compiling the function. */ | |
197 | ||
3b413743 | 198 | rtx *x_basic_block_head; |
d7429b6a RK |
199 | |
200 | /* Element N is last insn in basic block N. | |
201 | This info lasts until we finish compiling the function. */ | |
202 | ||
3b413743 | 203 | rtx *x_basic_block_end; |
d7429b6a | 204 | |
4d1d8045 BS |
205 | /* Element N indicates whether basic block N can be reached through a |
206 | computed jump. */ | |
207 | ||
208 | char *basic_block_computed_jump_target; | |
209 | ||
d7429b6a RK |
210 | /* Element N is a regset describing the registers live |
211 | at the start of basic block N. | |
212 | This info lasts until we finish compiling the function. */ | |
213 | ||
214 | regset *basic_block_live_at_start; | |
215 | ||
216 | /* Regset of regs live when calls to `setjmp'-like functions happen. */ | |
217 | ||
218 | regset regs_live_at_setjmp; | |
219 | ||
220 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers | |
221 | that have to go in the same hard reg. | |
222 | The first two regs in the list are a pair, and the next two | |
223 | are another pair, etc. */ | |
224 | rtx regs_may_share; | |
225 | ||
421382ac BS |
226 | /* Pointer to head of predecessor/successor block list. */ |
227 | static int_list_block *flow_int_list_blocks; | |
228 | ||
229 | /* Element N is the list of successors of basic block N. */ | |
230 | static int_list_ptr *basic_block_succ; | |
d7429b6a | 231 | |
421382ac BS |
232 | /* Element N is the list of predecessors of basic block N. */ |
233 | static int_list_ptr *basic_block_pred; | |
d7429b6a RK |
234 | |
235 | /* Element N is depth within loops of the last insn in basic block number N. | |
236 | Freed after life_analysis. */ | |
237 | ||
238 | static short *basic_block_loop_depth; | |
239 | ||
d7429b6a RK |
240 | /* Depth within loops of basic block being scanned for lifetime analysis, |
241 | plus one. This is the weight attached to references to registers. */ | |
242 | ||
243 | static int loop_depth; | |
244 | ||
245 | /* During propagate_block, this is non-zero if the value of CC0 is live. */ | |
246 | ||
247 | static int cc0_live; | |
248 | ||
db3a887b CB |
249 | /* During propagate_block, this contains a list of all the MEMs we are |
250 | tracking for dead store elimination. */ | |
d7429b6a | 251 | |
db3a887b | 252 | static rtx mem_set_list; |
d7429b6a RK |
253 | |
254 | /* Set of registers that may be eliminable. These are handled specially | |
255 | in updating regs_ever_live. */ | |
256 | ||
257 | static HARD_REG_SET elim_reg_set; | |
258 | ||
259 | /* Forward declarations */ | |
4a7bd8e2 | 260 | static void find_basic_blocks_1 PROTO((rtx, rtx)); |
421382ac BS |
261 | static void add_edge PROTO((int, int)); |
262 | static void add_edge_to_label PROTO((int, rtx)); | |
dc2ede84 | 263 | static void make_edges PROTO((int)); |
421382ac BS |
264 | static void mark_label_ref PROTO((int, rtx)); |
265 | static void delete_unreachable_blocks PROTO((void)); | |
dc2ede84 | 266 | static int delete_block PROTO((int)); |
5ece9746 | 267 | static void life_analysis_1 PROTO((rtx, int)); |
e658434c RK |
268 | static void propagate_block PROTO((regset, rtx, rtx, int, |
269 | regset, int)); | |
dc2ede84 BS |
270 | static int set_noop_p PROTO((rtx)); |
271 | static int noop_move_p PROTO((rtx)); | |
272 | static void record_volatile_insns PROTO((rtx)); | |
273 | static void mark_regs_live_at_end PROTO((regset)); | |
e398aa80 | 274 | static int insn_dead_p PROTO((rtx, regset, int, rtx)); |
e658434c RK |
275 | static int libcall_dead_p PROTO((rtx, regset, rtx, rtx)); |
276 | static void mark_set_regs PROTO((regset, regset, rtx, | |
277 | rtx, regset)); | |
278 | static void mark_set_1 PROTO((regset, regset, rtx, | |
279 | rtx, regset)); | |
1d300e19 | 280 | #ifdef AUTO_INC_DEC |
e658434c | 281 | static void find_auto_inc PROTO((regset, rtx, rtx)); |
e658434c RK |
282 | static int try_pre_increment_1 PROTO((rtx)); |
283 | static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT)); | |
1d300e19 KG |
284 | #endif |
285 | static void mark_used_regs PROTO((regset, regset, rtx, int, rtx)); | |
e658434c | 286 | void dump_flow_info PROTO((FILE *)); |
5ece9746 JL |
287 | static void add_pred_succ PROTO ((int, int, int_list_ptr *, |
288 | int_list_ptr *, int *, int *)); | |
289 | static int_list_ptr alloc_int_list_node PROTO ((int_list_block **)); | |
290 | static int_list_ptr add_int_list_node PROTO ((int_list_block **, | |
291 | int_list **, int)); | |
04821e98 JL |
292 | static void init_regset_vector PROTO ((regset *, int, |
293 | struct obstack *)); | |
4c649323 JL |
294 | static void count_reg_sets_1 PROTO ((rtx)); |
295 | static void count_reg_sets PROTO ((rtx)); | |
296 | static void count_reg_references PROTO ((rtx)); | |
fdb8a883 | 297 | static void notice_stack_pointer_modification PROTO ((rtx, rtx)); |
d7429b6a | 298 | \f |
5ece9746 | 299 | /* Find basic blocks of the current function. |
d7429b6a | 300 | F is the first insn of the function and NREGS the number of register numbers |
c9852047 | 301 | in use. */ |
d7429b6a RK |
302 | |
303 | void | |
9265dacf | 304 | find_basic_blocks (f, nregs, file) |
d7429b6a RK |
305 | rtx f; |
306 | int nregs; | |
307 | FILE *file; | |
308 | { | |
309 | register rtx insn; | |
310 | register int i; | |
d7e4fe8b | 311 | rtx nonlocal_label_list = nonlocal_label_rtx_list (); |
2c3a56ad | 312 | int in_libcall_block = 0; |
d7429b6a | 313 | |
421382ac BS |
314 | /* Avoid leaking memory if this is called multiple times per compiled |
315 | function. */ | |
316 | free_bb_memory (); | |
317 | ||
d7429b6a RK |
318 | /* Count the basic blocks. Also find maximum insn uid value used. */ |
319 | ||
320 | { | |
27249135 | 321 | rtx prev_call = 0; |
d7429b6a RK |
322 | register RTX_CODE prev_code = JUMP_INSN; |
323 | register RTX_CODE code; | |
74d7ab55 | 324 | int eh_region = 0; |
c2b7e122 | 325 | int call_had_abnormal_edge = 0; |
d7429b6a | 326 | |
d7429b6a RK |
327 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) |
328 | { | |
2c3a56ad JL |
329 | /* Track when we are inside in LIBCALL block. */ |
330 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
331 | && find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
332 | in_libcall_block = 1; | |
333 | ||
d7429b6a | 334 | code = GET_CODE (insn); |
27249135 BS |
335 | |
336 | /* A basic block starts at label, or after something that can jump. */ | |
337 | if (code == CODE_LABEL | |
338 | || (GET_RTX_CLASS (code) == 'i' | |
339 | && (prev_code == JUMP_INSN | |
340 | || (prev_code == CALL_INSN && call_had_abnormal_edge) | |
341 | || prev_code == BARRIER))) | |
5c35539b | 342 | { |
27249135 BS |
343 | i++; |
344 | ||
345 | /* If the previous insn was a call that did not create an | |
346 | abnormal edge, we want to add a nop so that the CALL_INSN | |
3b413743 | 347 | itself is not at basic block end. This allows us to easily |
27249135 BS |
348 | distinguish between normal calls and those which create |
349 | abnormal edges in the flow graph. */ | |
350 | ||
351 | if (i > 0 && !call_had_abnormal_edge && prev_call != 0) | |
5c35539b | 352 | { |
27249135 BS |
353 | rtx nop = gen_rtx_USE (VOIDmode, const0_rtx); |
354 | emit_insn_after (nop, prev_call); | |
5c35539b RH |
355 | } |
356 | } | |
d06c6389 JW |
357 | /* We change the code of the CALL_INSN, so that it won't start a |
358 | new block. */ | |
359 | if (code == CALL_INSN && in_libcall_block) | |
8cfe18d6 RK |
360 | code = INSN; |
361 | ||
27249135 BS |
362 | /* Record whether this call created an edge. */ |
363 | if (code == CALL_INSN) | |
364 | { | |
365 | prev_call = insn; | |
366 | call_had_abnormal_edge = (nonlocal_label_list != 0 || eh_region); | |
367 | } | |
368 | else if (code != NOTE && code != BARRIER) | |
369 | prev_call = 0; | |
c2b7e122 | 370 | |
6b67ec08 | 371 | if (code != NOTE) |
d7429b6a | 372 | prev_code = code; |
74d7ab55 JM |
373 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG) |
374 | ++eh_region; | |
375 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END) | |
376 | --eh_region; | |
2c3a56ad JL |
377 | |
378 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
379 | && find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
380 | in_libcall_block = 0; | |
d7429b6a RK |
381 | } |
382 | } | |
383 | ||
5ece9746 JL |
384 | n_basic_blocks = i; |
385 | ||
27249135 | 386 | max_uid_for_flow = get_max_uid (); |
d7429b6a | 387 | #ifdef AUTO_INC_DEC |
5ece9746 JL |
388 | /* Leave space for insns life_analysis makes in some cases for auto-inc. |
389 | These cases are rare, so we don't need too much space. */ | |
d7429b6a RK |
390 | max_uid_for_flow += max_uid_for_flow / 10; |
391 | #endif | |
392 | ||
393 | /* Allocate some tables that last till end of compiling this function | |
394 | and some needed only in find_basic_blocks and life_analysis. */ | |
395 | ||
3b413743 RH |
396 | x_basic_block_head = XNMALLOC (rtx, n_basic_blocks); |
397 | x_basic_block_end = XNMALLOC (rtx, n_basic_blocks); | |
421382ac BS |
398 | basic_block_succ = XNMALLOC (int_list_ptr, n_basic_blocks); |
399 | basic_block_pred = XNMALLOC (int_list_ptr, n_basic_blocks); | |
400 | bzero ((char *)basic_block_succ, n_basic_blocks * sizeof (int_list_ptr)); | |
401 | bzero ((char *)basic_block_pred, n_basic_blocks * sizeof (int_list_ptr)); | |
402 | ||
4d1d8045 | 403 | basic_block_computed_jump_target = (char *) oballoc (n_basic_blocks); |
421382ac BS |
404 | basic_block_loop_depth = XNMALLOC (short, n_basic_blocks); |
405 | uid_block_number = XNMALLOC (int, (max_uid_for_flow + 1)); | |
406 | uid_volatile = XNMALLOC (char, (max_uid_for_flow + 1)); | |
d7429b6a RK |
407 | bzero (uid_volatile, max_uid_for_flow + 1); |
408 | ||
9265dacf | 409 | find_basic_blocks_1 (f, nonlocal_label_list); |
d7429b6a | 410 | } |
5ece9746 | 411 | |
dc2ede84 BS |
412 | /* For communication between find_basic_blocks_1 and its subroutines. */ |
413 | ||
414 | /* An array of CODE_LABELs, indexed by UID for the start of the active | |
415 | EH handler for each insn in F. */ | |
416 | static int *active_eh_region; | |
417 | static int *nested_eh_region; | |
418 | ||
419 | /* Element N nonzero if basic block N can actually be reached. */ | |
420 | ||
421 | static char *block_live_static; | |
422 | ||
423 | /* List of label_refs to all labels whose addresses are taken | |
424 | and used as data. */ | |
425 | static rtx label_value_list; | |
426 | ||
427 | /* a list of non-local labels in the function. */ | |
428 | static rtx nonlocal_label_list; | |
429 | ||
d7429b6a RK |
430 | /* Find all basic blocks of the function whose first insn is F. |
431 | Store the correct data in the tables that describe the basic blocks, | |
432 | set up the chains of references for each CODE_LABEL, and | |
d7e4fe8b RS |
433 | delete any entire basic blocks that cannot be reached. |
434 | ||
dc2ede84 | 435 | NONLOCAL_LABELS is a list of non-local labels in the function. |
5ece9746 | 436 | Blocks that are otherwise unreachable may be reachable with a non-local |
c9852047 | 437 | goto. */ |
d7429b6a RK |
438 | |
439 | static void | |
9265dacf | 440 | find_basic_blocks_1 (f, nonlocal_labels) |
dc2ede84 | 441 | rtx f, nonlocal_labels; |
d7429b6a RK |
442 | { |
443 | register rtx insn; | |
444 | register int i; | |
445 | register char *block_live = (char *) alloca (n_basic_blocks); | |
446 | register char *block_marked = (char *) alloca (n_basic_blocks); | |
dc2ede84 | 447 | rtx note, eh_note; |
e658434c | 448 | enum rtx_code prev_code, code; |
421382ac | 449 | int depth; |
2c3a56ad | 450 | int in_libcall_block = 0; |
5c35539b | 451 | int call_had_abnormal_edge = 0; |
d7429b6a | 452 | |
9a0d1e1b AM |
453 | active_eh_region = (int *) alloca ((max_uid_for_flow + 1) * sizeof (int)); |
454 | nested_eh_region = (int *) alloca ((max_label_num () + 1) * sizeof (int)); | |
dc2ede84 | 455 | nonlocal_label_list = nonlocal_labels; |
8329b5ec DE |
456 | |
457 | label_value_list = 0; | |
d7429b6a RK |
458 | block_live_static = block_live; |
459 | bzero (block_live, n_basic_blocks); | |
460 | bzero (block_marked, n_basic_blocks); | |
4d1d8045 | 461 | bzero (basic_block_computed_jump_target, n_basic_blocks); |
9a0d1e1b AM |
462 | bzero ((char *) active_eh_region, (max_uid_for_flow + 1) * sizeof (int)); |
463 | bzero ((char *) nested_eh_region, (max_label_num () + 1) * sizeof (int)); | |
4d1d8045 | 464 | current_function_has_computed_jump = 0; |
d7429b6a RK |
465 | |
466 | /* Initialize with just block 0 reachable and no blocks marked. */ | |
467 | if (n_basic_blocks > 0) | |
468 | block_live[0] = 1; | |
469 | ||
e658434c RK |
470 | /* Initialize the ref chain of each label to 0. Record where all the |
471 | blocks start and end and their depth in loops. For each insn, record | |
472 | the block it is in. Also mark as reachable any blocks headed by labels | |
473 | that must not be deleted. */ | |
d7429b6a | 474 | |
2ec1535d | 475 | for (eh_note = NULL_RTX, insn = f, i = -1, prev_code = JUMP_INSN, depth = 1; |
e658434c RK |
476 | insn; insn = NEXT_INSN (insn)) |
477 | { | |
2c3a56ad JL |
478 | |
479 | /* Track when we are inside in LIBCALL block. */ | |
480 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
481 | && find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
482 | in_libcall_block = 1; | |
483 | ||
e658434c RK |
484 | code = GET_CODE (insn); |
485 | if (code == NOTE) | |
486 | { | |
487 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
488 | depth++; | |
489 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
490 | depth--; | |
491 | } | |
d7429b6a | 492 | |
e658434c RK |
493 | /* A basic block starts at label, or after something that can jump. */ |
494 | else if (code == CODE_LABEL | |
495 | || (GET_RTX_CLASS (code) == 'i' | |
496 | && (prev_code == JUMP_INSN | |
5c35539b | 497 | || (prev_code == CALL_INSN && call_had_abnormal_edge) |
e658434c RK |
498 | || prev_code == BARRIER))) |
499 | { | |
3b413743 RH |
500 | BLOCK_HEAD (++i) = insn; |
501 | BLOCK_END (i) = insn; | |
e658434c RK |
502 | basic_block_loop_depth[i] = depth; |
503 | ||
504 | if (code == CODE_LABEL) | |
505 | { | |
5c35539b RH |
506 | LABEL_REFS (insn) = insn; |
507 | /* Any label that cannot be deleted | |
508 | is considered to start a reachable block. */ | |
509 | if (LABEL_PRESERVE_P (insn)) | |
510 | block_live[i] = 1; | |
511 | } | |
e658434c | 512 | } |
d7429b6a | 513 | |
e658434c RK |
514 | else if (GET_RTX_CLASS (code) == 'i') |
515 | { | |
3b413743 | 516 | BLOCK_END (i) = insn; |
e658434c | 517 | basic_block_loop_depth[i] = depth; |
42fa3cfb | 518 | } |
e658434c | 519 | |
42fa3cfb JW |
520 | if (GET_RTX_CLASS (code) == 'i') |
521 | { | |
e658434c RK |
522 | /* Make a list of all labels referred to other than by jumps. */ |
523 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
c708eef9 | 524 | if (REG_NOTE_KIND (note) == REG_LABEL |
71038426 | 525 | && XEXP (note, 0) != eh_return_stub_label) |
38a448ca RH |
526 | label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0), |
527 | label_value_list); | |
42fa3cfb | 528 | } |
d7429b6a | 529 | |
9a0d1e1b | 530 | /* Keep a lifo list of the currently active exception notes. */ |
2ec1535d JL |
531 | if (GET_CODE (insn) == NOTE) |
532 | { | |
533 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG) | |
534 | { | |
9a0d1e1b AM |
535 | if (eh_note) |
536 | nested_eh_region [NOTE_BLOCK_NUMBER (insn)] = | |
537 | NOTE_BLOCK_NUMBER (XEXP (eh_note, 0)); | |
538 | else | |
539 | nested_eh_region [NOTE_BLOCK_NUMBER (insn)] = 0; | |
540 | eh_note = gen_rtx_EXPR_LIST (VOIDmode, | |
541 | insn, eh_note); | |
2ec1535d JL |
542 | } |
543 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END) | |
544 | eh_note = XEXP (eh_note, 1); | |
545 | } | |
546 | /* If we encounter a CALL_INSN, note which exception handler it | |
547 | might pass control to. | |
548 | ||
549 | If doing asynchronous exceptions, record the active EH handler | |
550 | for every insn, since most insns can throw. */ | |
551 | else if (eh_note | |
552 | && (asynchronous_exceptions | |
553 | || (GET_CODE (insn) == CALL_INSN | |
2c3a56ad | 554 | && ! in_libcall_block))) |
dc2ede84 | 555 | active_eh_region[INSN_UID (insn)] = |
9a0d1e1b | 556 | NOTE_BLOCK_NUMBER (XEXP (eh_note, 0)); |
e658434c | 557 | BLOCK_NUM (insn) = i; |
d7e4fe8b | 558 | |
d06c6389 JW |
559 | /* We change the code of the CALL_INSN, so that it won't start a |
560 | new block. */ | |
561 | if (code == CALL_INSN && in_libcall_block) | |
562 | code = INSN; | |
563 | ||
5c35539b RH |
564 | /* Record whether this call created an edge. */ |
565 | if (code == CALL_INSN) | |
566 | call_had_abnormal_edge = (nonlocal_label_list != 0 || eh_note); | |
567 | ||
6b67ec08 | 568 | if (code != NOTE) |
e658434c | 569 | prev_code = code; |
2c3a56ad JL |
570 | |
571 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
572 | && find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
573 | in_libcall_block = 0; | |
e658434c RK |
574 | } |
575 | ||
421382ac | 576 | if (i + 1 != n_basic_blocks) |
e658434c | 577 | abort (); |
d7429b6a RK |
578 | |
579 | /* Now find which basic blocks can actually be reached | |
580 | and put all jump insns' LABEL_REFS onto the ref-chains | |
581 | of their target labels. */ | |
582 | ||
583 | if (n_basic_blocks > 0) | |
584 | { | |
585 | int something_marked = 1; | |
586 | ||
d7429b6a RK |
587 | /* Pass over all blocks, marking each block that is reachable |
588 | and has not yet been marked. | |
589 | Keep doing this until, in one pass, no blocks have been marked. | |
590 | Then blocks_live and blocks_marked are identical and correct. | |
591 | In addition, all jumps actually reachable have been marked. */ | |
592 | ||
593 | while (something_marked) | |
594 | { | |
595 | something_marked = 0; | |
596 | for (i = 0; i < n_basic_blocks; i++) | |
597 | if (block_live[i] && !block_marked[i]) | |
598 | { | |
421382ac BS |
599 | int_list_ptr p; |
600 | ||
d7429b6a RK |
601 | block_marked[i] = 1; |
602 | something_marked = 1; | |
2ec1535d | 603 | |
dc2ede84 | 604 | make_edges (i); |
421382ac BS |
605 | |
606 | for (p = basic_block_succ[i]; p; p = p->next) | |
607 | block_live[INT_LIST_VAL (p)] = 1; | |
d7429b6a RK |
608 | } |
609 | } | |
610 | ||
2ec1535d JL |
611 | /* This should never happen. If it does that means we've computed an |
612 | incorrect flow graph, which can lead to aborts/crashes later in the | |
613 | compiler or incorrect code generation. | |
af14ce9c | 614 | |
2ec1535d JL |
615 | We used to try and continue here, but that's just asking for trouble |
616 | later during the compile or at runtime. It's easier to debug the | |
617 | problem here than later! */ | |
af14ce9c | 618 | for (i = 1; i < n_basic_blocks; i++) |
421382ac | 619 | if (block_live[i] && basic_block_pred[i] == 0) |
2ec1535d | 620 | abort (); |
af14ce9c | 621 | |
96b106e5 | 622 | if (! reload_completed) |
421382ac | 623 | delete_unreachable_blocks (); |
d7429b6a RK |
624 | } |
625 | } | |
5ece9746 JL |
626 | |
627 | /* Record INSN's block number as BB. */ | |
628 | ||
629 | void | |
630 | set_block_num (insn, bb) | |
631 | rtx insn; | |
632 | int bb; | |
633 | { | |
634 | if (INSN_UID (insn) >= max_uid_for_flow) | |
635 | { | |
636 | /* Add one-eighth the size so we don't keep calling xrealloc. */ | |
637 | max_uid_for_flow = INSN_UID (insn) + (INSN_UID (insn) + 7) / 8; | |
638 | uid_block_number = (int *) | |
639 | xrealloc (uid_block_number, (max_uid_for_flow + 1) * sizeof (int)); | |
640 | } | |
641 | BLOCK_NUM (insn) = bb; | |
642 | } | |
d7429b6a | 643 | \f |
8329b5ec DE |
644 | /* Subroutines of find_basic_blocks. */ |
645 | ||
421382ac BS |
646 | void |
647 | free_bb_memory () | |
648 | { | |
649 | free_int_list (&flow_int_list_blocks); | |
650 | } | |
651 | ||
652 | /* Make an edge in the cfg from block PRED to block SUCC. */ | |
653 | static void | |
654 | add_edge (pred, succ) | |
655 | int pred, succ; | |
656 | { | |
657 | add_int_list_node (&flow_int_list_blocks, basic_block_pred + succ, pred); | |
658 | add_int_list_node (&flow_int_list_blocks, basic_block_succ + pred, succ); | |
659 | } | |
660 | ||
661 | /* Make an edge in the cfg from block PRED to the block starting with | |
662 | label LABEL. */ | |
663 | static void | |
664 | add_edge_to_label (pred, label) | |
665 | int pred; | |
666 | rtx label; | |
667 | { | |
668 | /* If the label was never emitted, this insn is junk, | |
669 | but avoid a crash trying to refer to BLOCK_NUM (label). | |
670 | This can happen as a result of a syntax error | |
671 | and a diagnostic has already been printed. */ | |
672 | if (INSN_UID (label) == 0) | |
673 | return; | |
674 | ||
675 | add_edge (pred, BLOCK_NUM (label)); | |
676 | } | |
677 | ||
678 | /* Check expression X for label references. If one is found, add an edge | |
679 | from basic block PRED to the block beginning with the label. */ | |
680 | ||
681 | static void | |
682 | mark_label_ref (pred, x) | |
683 | int pred; | |
684 | rtx x; | |
685 | { | |
686 | register RTX_CODE code; | |
687 | register int i; | |
688 | register char *fmt; | |
689 | ||
690 | code = GET_CODE (x); | |
691 | if (code == LABEL_REF) | |
692 | { | |
693 | add_edge_to_label (pred, XEXP (x, 0)); | |
694 | return; | |
695 | } | |
696 | ||
697 | fmt = GET_RTX_FORMAT (code); | |
698 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
699 | { | |
700 | if (fmt[i] == 'e') | |
701 | mark_label_ref (pred, XEXP (x, i)); | |
702 | if (fmt[i] == 'E') | |
703 | { | |
704 | register int j; | |
705 | for (j = 0; j < XVECLEN (x, i); j++) | |
706 | mark_label_ref (pred, XVECEXP (x, i, j)); | |
707 | } | |
708 | } | |
709 | } | |
710 | ||
dc2ede84 BS |
711 | /* For basic block I, make edges and mark live all blocks which are reachable |
712 | from it. */ | |
713 | static void | |
714 | make_edges (i) | |
715 | int i; | |
716 | { | |
717 | rtx insn, x; | |
e6cfb550 | 718 | rtx pending_eh_region = NULL_RTX; |
dc2ede84 | 719 | |
421382ac BS |
720 | /* See if control drops into the next block. */ |
721 | if (i + 1 < n_basic_blocks) | |
722 | { | |
3b413743 | 723 | for (insn = PREV_INSN (BLOCK_HEAD (i + 1)); |
421382ac BS |
724 | insn && GET_CODE (insn) == NOTE; insn = PREV_INSN (insn)) |
725 | ; | |
726 | ||
727 | if (insn && GET_CODE (insn) != BARRIER) | |
728 | add_edge (i, i + 1); | |
729 | } | |
730 | ||
3b413743 | 731 | insn = BLOCK_END (i); |
dc2ede84 | 732 | if (GET_CODE (insn) == JUMP_INSN) |
421382ac | 733 | mark_label_ref (i, PATTERN (insn)); |
dc2ede84 BS |
734 | |
735 | /* If we have any forced labels, mark them as potentially reachable from | |
736 | this block. */ | |
737 | for (x = forced_labels; x; x = XEXP (x, 1)) | |
738 | if (! LABEL_REF_NONLOCAL_P (x)) | |
421382ac | 739 | add_edge_to_label (i, XEXP (x, 0)); |
dc2ede84 BS |
740 | |
741 | /* Now scan the insns for this block, we may need to make edges for some of | |
742 | them to various non-obvious locations (exception handlers, nonlocal | |
743 | labels, etc). */ | |
3b413743 RH |
744 | for (insn = BLOCK_HEAD (i); |
745 | insn != NEXT_INSN (BLOCK_END (i)); | |
dc2ede84 BS |
746 | insn = NEXT_INSN (insn)) |
747 | { | |
748 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
749 | { | |
750 | rtx note; | |
751 | /* References to labels in non-jumping insns have REG_LABEL notes | |
752 | attached to them. | |
753 | ||
754 | This can happen for computed gotos; we don't care about them | |
755 | here since the values are also on the label_value_list and will | |
756 | be marked live if we find a live computed goto. | |
757 | ||
758 | This can also happen when we take the address of a label to pass | |
759 | as an argument to __throw. Note throw only uses the value to | |
760 | determine what handler should be called -- ie the label is not | |
761 | used as a jump target, it just marks regions in the code. | |
762 | ||
763 | In theory we should be able to ignore the REG_LABEL notes, but | |
764 | we have to make sure that the label and associated insns aren't | |
765 | marked dead, so we make the block in question live and create an | |
766 | edge from this insn to the label. This is not strictly correct, | |
767 | but it is close enough for now. | |
768 | ||
769 | See below for code that handles the eh_stub label specially. */ | |
770 | for (note = REG_NOTES (insn); | |
771 | note; | |
772 | note = XEXP (note, 1)) | |
773 | { | |
774 | if (REG_NOTE_KIND (note) == REG_LABEL | |
775 | && XEXP (note, 0) != eh_return_stub_label) | |
421382ac | 776 | add_edge_to_label (i, XEXP (note, 0)); |
dc2ede84 BS |
777 | } |
778 | ||
779 | /* If this is a computed jump, then mark it as reaching everything | |
780 | on the label_value_list and forced_labels list. */ | |
781 | if (computed_jump_p (insn)) | |
782 | { | |
783 | current_function_has_computed_jump = 1; | |
784 | for (x = label_value_list; x; x = XEXP (x, 1)) | |
785 | { | |
786 | int b = BLOCK_NUM (XEXP (x, 0)); | |
787 | basic_block_computed_jump_target[b] = 1; | |
421382ac | 788 | add_edge (i, b); |
dc2ede84 BS |
789 | } |
790 | ||
791 | for (x = forced_labels; x; x = XEXP (x, 1)) | |
792 | { | |
793 | int b = BLOCK_NUM (XEXP (x, 0)); | |
794 | basic_block_computed_jump_target[b] = 1; | |
421382ac | 795 | add_edge (i, b); |
dc2ede84 BS |
796 | } |
797 | } | |
798 | ||
e6cfb550 AM |
799 | /* If this is a call with an EH_RETHROW note, then we |
800 | know its a rethrow call, and we know exactly where | |
801 | this call can end up going. */ | |
802 | else if (GET_CODE (insn) == CALL_INSN | |
803 | && (note = find_reg_note (insn, REG_EH_RETHROW, NULL_RTX))) | |
804 | { | |
805 | int region = XINT (XEXP (note, 0), 0); | |
806 | /* if nested region is not 0, we know for sure it has been | |
807 | processed. If it is zero, we dont know whether its an | |
808 | outer region, or hasn't been seen yet, so defer it */ | |
809 | if (nested_eh_region[region] != 0) | |
810 | { | |
811 | /* start with the first region OUTSIDE the one specified | |
812 | in the rethrow parameter. (since a rethrow behaves | |
813 | as if a handler in the region didn't handle the | |
814 | exception, so the handlers for the next outer region | |
815 | are going to get a shot at it.*/ | |
816 | for ( region = nested_eh_region[region]; region; | |
817 | region = nested_eh_region[region]) | |
818 | { | |
819 | handler_info *ptr = get_first_handler (region); | |
820 | for ( ; ptr ; ptr = ptr->next) | |
821 | add_edge_to_label (i, ptr->handler_label); | |
822 | } | |
823 | } | |
824 | else | |
825 | { | |
826 | /* Push this region onto a list, and after we've done the | |
827 | whole procedure, we'll process everything on the list */ | |
828 | pending_eh_region = gen_rtx_EXPR_LIST (VOIDmode, insn, | |
829 | pending_eh_region); | |
830 | } | |
831 | } | |
832 | ||
dc2ede84 BS |
833 | /* If this is a CALL_INSN, then mark it as reaching the active EH |
834 | handler for this CALL_INSN. If we're handling asynchronous | |
835 | exceptions mark every insn as reaching the active EH handler. | |
836 | ||
837 | Also mark the CALL_INSN as reaching any nonlocal goto sites. */ | |
838 | else if (asynchronous_exceptions | |
839 | || (GET_CODE (insn) == CALL_INSN | |
840 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))) | |
841 | { | |
842 | if (active_eh_region[INSN_UID (insn)]) | |
843 | { | |
844 | int region; | |
845 | handler_info *ptr; | |
846 | region = active_eh_region[INSN_UID (insn)]; | |
421382ac | 847 | for ( ; region; region = nested_eh_region[region]) |
dc2ede84 BS |
848 | { |
849 | ptr = get_first_handler (region); | |
850 | for ( ; ptr ; ptr = ptr->next) | |
421382ac | 851 | add_edge_to_label (i, ptr->handler_label); |
dc2ede84 BS |
852 | } |
853 | } | |
854 | if (! asynchronous_exceptions) | |
855 | { | |
856 | for (x = nonlocal_label_list; x; x = XEXP (x, 1)) | |
421382ac | 857 | add_edge_to_label (i, XEXP (x, 0)); |
dc2ede84 BS |
858 | } |
859 | /* ??? This could be made smarter: in some cases it's possible | |
860 | to tell that certain calls will not do a nonlocal goto. | |
861 | ||
862 | For example, if the nested functions that do the nonlocal | |
863 | gotos do not have their addresses taken, then only calls to | |
864 | those functions or to other nested functions that use them | |
865 | could possibly do nonlocal gotos. */ | |
866 | } | |
867 | } | |
868 | } | |
e6cfb550 AM |
869 | |
870 | while (pending_eh_region != NULL_RTX) | |
871 | { | |
872 | rtx insn = XEXP (pending_eh_region, 0); | |
873 | rtx note = find_reg_note (insn, REG_EH_RETHROW, NULL_RTX); | |
874 | int region = XINT (XEXP (note, 0), 0); | |
875 | /* start with the first region OUTSIDE the one specified | |
876 | in the rethrow parameter */ | |
877 | for ( region = nested_eh_region[region]; region; | |
878 | region = nested_eh_region[region]) | |
879 | { | |
880 | handler_info *ptr = get_first_handler (region); | |
881 | for ( ; ptr ; ptr = ptr->next) | |
882 | add_edge_to_label (BLOCK_NUM (insn), ptr->handler_label); | |
883 | } | |
884 | pending_eh_region = XEXP (pending_eh_region, 1); | |
885 | } | |
886 | ||
dc2ede84 BS |
887 | /* We know something about the structure of the function __throw in |
888 | libgcc2.c. It is the only function that ever contains eh_stub labels. | |
889 | It modifies its return address so that the last block returns to one of | |
890 | the eh_stub labels within it. So we have to make additional edges in | |
891 | the flow graph. */ | |
892 | if (i + 1 == n_basic_blocks && eh_return_stub_label != 0) | |
421382ac | 893 | add_edge_to_label (i, eh_return_stub_label); |
d7429b6a | 894 | } |
8329b5ec | 895 | |
dc2ede84 BS |
896 | /* Now delete the code for any basic blocks that can't be reached. |
897 | They can occur because jump_optimize does not recognize unreachable loops | |
421382ac BS |
898 | as unreachable. */ |
899 | static void | |
dc2ede84 BS |
900 | delete_unreachable_blocks () |
901 | { | |
902 | int deleted_handler = 0; | |
903 | int deleted = 0; | |
421382ac | 904 | int i, j; |
dc2ede84 | 905 | rtx insn; |
421382ac | 906 | int *block_num_map = XNMALLOC (int, n_basic_blocks); |
dc2ede84 | 907 | |
421382ac | 908 | for (i = n_basic_blocks - 1; i >= 0; i--) |
dc2ede84 | 909 | if (! block_live_static[i]) |
421382ac BS |
910 | deleted_handler |= delete_block (i); |
911 | ||
912 | for (i = 0; i < n_basic_blocks; i++) | |
913 | if (block_live_static[i]) | |
914 | block_num_map[i] = i - deleted; | |
915 | else | |
dc2ede84 BS |
916 | { |
917 | deleted++; | |
421382ac | 918 | block_num_map[i] = -1; |
dc2ede84 BS |
919 | } |
920 | ||
421382ac BS |
921 | /* Eliminate all traces of the deleted blocks by renumbering the remaining |
922 | ones. */ | |
923 | for (i = j = 0; i < n_basic_blocks; i++) | |
924 | { | |
925 | int_list_ptr p; | |
926 | ||
927 | if (block_num_map[i] == -1) | |
928 | continue; | |
929 | ||
930 | for (p = basic_block_pred[i]; p; p = p->next) | |
931 | INT_LIST_VAL (p) = block_num_map[INT_LIST_VAL (p)]; | |
932 | for (p = basic_block_succ[i]; p; p = p->next) | |
933 | INT_LIST_VAL (p) = block_num_map[INT_LIST_VAL (p)]; | |
934 | ||
935 | if (i != j) | |
936 | { | |
3b413743 | 937 | rtx tmp = BLOCK_HEAD (i); |
421382ac BS |
938 | for (;;) |
939 | { | |
940 | BLOCK_NUM (tmp) = j; | |
3b413743 | 941 | if (tmp == BLOCK_END (i)) |
421382ac BS |
942 | break; |
943 | tmp = NEXT_INSN (tmp); | |
944 | } | |
3b413743 RH |
945 | BLOCK_HEAD (j) = BLOCK_HEAD (i); |
946 | BLOCK_END (j) = BLOCK_END (i); | |
421382ac BS |
947 | basic_block_pred[j] = basic_block_pred[i]; |
948 | basic_block_succ[j] = basic_block_succ[i]; | |
949 | basic_block_loop_depth[j] = basic_block_loop_depth[i]; | |
950 | basic_block_computed_jump_target[j] | |
951 | = basic_block_computed_jump_target[i]; | |
952 | } | |
953 | j++; | |
954 | } | |
955 | n_basic_blocks -= deleted; | |
956 | free (block_num_map); | |
957 | ||
dc2ede84 BS |
958 | /* If we deleted an exception handler, we may have EH region |
959 | begin/end blocks to remove as well. */ | |
960 | if (deleted_handler) | |
961 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
962 | if (GET_CODE (insn) == NOTE) | |
963 | { | |
421382ac BS |
964 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG || |
965 | NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END) | |
dc2ede84 BS |
966 | { |
967 | int num = CODE_LABEL_NUMBER (insn); | |
e6cfb550 AM |
968 | /* A NULL handler indicates a region is no longer needed, |
969 | unless its the target of a rethrow. */ | |
970 | if (get_first_handler (num) == NULL && !rethrow_used (num)) | |
dc2ede84 BS |
971 | { |
972 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
973 | NOTE_SOURCE_FILE (insn) = 0; | |
974 | } | |
975 | } | |
976 | } | |
dc2ede84 BS |
977 | } |
978 | ||
979 | /* Delete the insns in a (non-live) block. We physically delete every | |
3b413743 | 980 | non-note insn except the start and end (so BLOCK_HEAD/END needn't |
dc2ede84 BS |
981 | be updated), we turn the latter into NOTE_INSN_DELETED notes. |
982 | ||
983 | We use to "delete" the insns by turning them into notes, but we may be | |
984 | deleting lots of insns that subsequent passes would otherwise have to | |
985 | process. Secondly, lots of deleted blocks in a row can really slow down | |
986 | propagate_block since it will otherwise process insn-turned-notes multiple | |
987 | times when it looks for loop begin/end notes. | |
988 | ||
989 | Return nonzero if we deleted an exception handler. */ | |
990 | static int | |
991 | delete_block (i) | |
992 | int i; | |
993 | { | |
994 | int deleted_handler = 0; | |
995 | rtx insn; | |
421382ac BS |
996 | rtx kept_head = 0; |
997 | rtx kept_tail = 0; | |
998 | ||
999 | /* If the head of this block is a CODE_LABEL, then it might | |
1000 | be the label for an exception handler which can't be | |
1001 | reached. | |
dc2ede84 | 1002 | |
421382ac BS |
1003 | We need to remove the label from the exception_handler_label |
1004 | list and remove the associated NOTE_EH_REGION_BEG and | |
1005 | NOTE_EH_REGION_END notes. */ | |
3b413743 | 1006 | insn = BLOCK_HEAD (i); |
421382ac | 1007 | if (GET_CODE (insn) == CODE_LABEL) |
dc2ede84 | 1008 | { |
421382ac BS |
1009 | rtx x, *prev = &exception_handler_labels; |
1010 | ||
1011 | for (x = exception_handler_labels; x; x = XEXP (x, 1)) | |
dc2ede84 | 1012 | { |
421382ac BS |
1013 | if (XEXP (x, 0) == insn) |
1014 | { | |
1015 | /* Found a match, splice this label out of the | |
1016 | EH label list. */ | |
1017 | *prev = XEXP (x, 1); | |
1018 | XEXP (x, 1) = NULL_RTX; | |
1019 | XEXP (x, 0) = NULL_RTX; | |
1020 | ||
1021 | /* Remove the handler from all regions */ | |
1022 | remove_handler (insn); | |
1023 | deleted_handler = 1; | |
1024 | break; | |
1025 | } | |
1026 | prev = &XEXP (x, 1); | |
dc2ede84 BS |
1027 | } |
1028 | } | |
1029 | ||
421382ac BS |
1030 | /* Walk the insns of the block, building a chain of NOTEs that need to be |
1031 | kept. */ | |
3b413743 | 1032 | insn = BLOCK_HEAD (i); |
421382ac | 1033 | for (;;) |
dc2ede84 | 1034 | { |
dc2ede84 BS |
1035 | if (GET_CODE (insn) == BARRIER) |
1036 | abort (); | |
421382ac | 1037 | else if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED) |
dc2ede84 | 1038 | { |
421382ac BS |
1039 | if (kept_head == 0) |
1040 | kept_head = kept_tail = insn; | |
1041 | else | |
dc2ede84 | 1042 | { |
421382ac BS |
1043 | NEXT_INSN (kept_tail) = insn; |
1044 | PREV_INSN (insn) = kept_tail; | |
1045 | kept_tail = insn; | |
dc2ede84 BS |
1046 | } |
1047 | } | |
3b413743 | 1048 | if (insn == BLOCK_END (i)) |
421382ac BS |
1049 | break; |
1050 | insn = NEXT_INSN (insn); | |
dc2ede84 | 1051 | } |
421382ac BS |
1052 | insn = NEXT_INSN (insn); |
1053 | ||
dc2ede84 BS |
1054 | /* BARRIERs are between basic blocks, not part of one. |
1055 | Delete a BARRIER if the preceding jump is deleted. | |
1056 | We cannot alter a BARRIER into a NOTE | |
1057 | because it is too short; but we can really delete | |
1058 | it because it is not part of a basic block. */ | |
421382ac BS |
1059 | if (insn != 0 && GET_CODE (insn) == BARRIER) |
1060 | insn = NEXT_INSN (insn); | |
1061 | ||
1062 | /* Now unchain all of the block, and put the chain of kept notes in its | |
1063 | place. */ | |
1064 | if (kept_head == 0) | |
1065 | { | |
3b413743 | 1066 | NEXT_INSN (PREV_INSN (BLOCK_HEAD (i))) = insn; |
421382ac | 1067 | if (insn != 0) |
3b413743 | 1068 | PREV_INSN (insn) = PREV_INSN (BLOCK_HEAD (i)); |
e3f6ee23 | 1069 | else |
3b413743 | 1070 | set_last_insn (PREV_INSN (BLOCK_HEAD(i))); |
421382ac BS |
1071 | } |
1072 | else | |
1073 | { | |
3b413743 | 1074 | NEXT_INSN (PREV_INSN (BLOCK_HEAD (i))) = kept_head; |
421382ac BS |
1075 | if (insn != 0) |
1076 | PREV_INSN (insn) = kept_tail; | |
1077 | ||
3b413743 | 1078 | PREV_INSN (kept_head) = PREV_INSN (BLOCK_HEAD (i)); |
421382ac | 1079 | NEXT_INSN (kept_tail) = insn; |
b7f7462b JL |
1080 | |
1081 | /* This must happen after NEXT_INSN (kept_tail) has been reinitialized | |
1082 | since set_last_insn will abort if it detects a non-NULL NEXT_INSN | |
1083 | field in its argument. */ | |
1084 | if (insn == NULL_RTX) | |
1085 | set_last_insn (kept_tail); | |
421382ac | 1086 | } |
dc2ede84 BS |
1087 | |
1088 | /* Each time we delete some basic blocks, | |
1089 | see if there is a jump around them that is | |
1090 | being turned into a no-op. If so, delete it. */ | |
1091 | ||
1092 | if (block_live_static[i - 1]) | |
1093 | { | |
1094 | register int j; | |
1095 | for (j = i + 1; j < n_basic_blocks; j++) | |
1096 | if (block_live_static[j]) | |
1097 | { | |
1098 | rtx label; | |
3b413743 | 1099 | insn = BLOCK_END (i - 1); |
dc2ede84 BS |
1100 | if (GET_CODE (insn) == JUMP_INSN |
1101 | /* An unconditional jump is the only possibility | |
1102 | we must check for, since a conditional one | |
1103 | would make these blocks live. */ | |
1104 | && simplejump_p (insn) | |
1105 | && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1) | |
1106 | && INSN_UID (label) != 0 | |
1107 | && BLOCK_NUM (label) == j) | |
1108 | { | |
dc2ede84 BS |
1109 | PUT_CODE (insn, NOTE); |
1110 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1111 | NOTE_SOURCE_FILE (insn) = 0; | |
1112 | if (GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
1113 | abort (); | |
1114 | delete_insn (NEXT_INSN (insn)); | |
1115 | } | |
1116 | break; | |
1117 | } | |
1118 | } | |
1119 | ||
1120 | return deleted_handler; | |
1121 | } | |
d7429b6a | 1122 | \f |
5ece9746 JL |
1123 | /* Perform data flow analysis. |
1124 | F is the first insn of the function and NREGS the number of register numbers | |
1125 | in use. */ | |
1126 | ||
1127 | void | |
1128 | life_analysis (f, nregs, file) | |
1129 | rtx f; | |
1130 | int nregs; | |
1131 | FILE *file; | |
1132 | { | |
5ece9746 | 1133 | #ifdef ELIMINABLE_REGS |
ecb06768 | 1134 | register size_t i; |
5ece9746 JL |
1135 | static struct {int from, to; } eliminables[] = ELIMINABLE_REGS; |
1136 | #endif | |
1137 | ||
1138 | /* Record which registers will be eliminated. We use this in | |
1139 | mark_used_regs. */ | |
1140 | ||
1141 | CLEAR_HARD_REG_SET (elim_reg_set); | |
1142 | ||
1143 | #ifdef ELIMINABLE_REGS | |
1144 | for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++) | |
1145 | SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from); | |
1146 | #else | |
1147 | SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM); | |
1148 | #endif | |
1149 | ||
db3a887b CB |
1150 | /* We want alias analysis information for local dead store elimination. */ |
1151 | init_alias_analysis (); | |
5ece9746 | 1152 | life_analysis_1 (f, nregs); |
db3a887b CB |
1153 | end_alias_analysis (); |
1154 | ||
5ece9746 JL |
1155 | if (file) |
1156 | dump_flow_info (file); | |
1157 | ||
1158 | free_basic_block_vars (1); | |
1159 | } | |
1160 | ||
1161 | /* Free the variables allocated by find_basic_blocks. | |
1162 | ||
3b413743 | 1163 | KEEP_HEAD_END_P is non-zero if BLOCK_HEAD and BLOCK_END |
5ece9746 JL |
1164 | are not to be freed. */ |
1165 | ||
1166 | void | |
1167 | free_basic_block_vars (keep_head_end_p) | |
1168 | int keep_head_end_p; | |
1169 | { | |
5ece9746 JL |
1170 | if (basic_block_loop_depth) |
1171 | { | |
1172 | free (basic_block_loop_depth); | |
1173 | basic_block_loop_depth = 0; | |
1174 | } | |
1175 | if (uid_block_number) | |
1176 | { | |
1177 | free (uid_block_number); | |
1178 | uid_block_number = 0; | |
1179 | } | |
1180 | if (uid_volatile) | |
1181 | { | |
1182 | free (uid_volatile); | |
1183 | uid_volatile = 0; | |
1184 | } | |
1185 | ||
3b413743 | 1186 | if (! keep_head_end_p && x_basic_block_head) |
5ece9746 | 1187 | { |
3b413743 RH |
1188 | free (x_basic_block_head); |
1189 | x_basic_block_head = 0; | |
1190 | free (x_basic_block_end); | |
1191 | x_basic_block_end = 0; | |
5ece9746 JL |
1192 | } |
1193 | } | |
1194 | ||
dc2ede84 BS |
1195 | /* Return nonzero if the destination of SET equals the source. */ |
1196 | static int | |
1197 | set_noop_p (set) | |
1198 | rtx set; | |
1199 | { | |
1200 | rtx src = SET_SRC (set); | |
1201 | rtx dst = SET_DEST (set); | |
1202 | if (GET_CODE (src) == REG && GET_CODE (dst) == REG | |
1203 | && REGNO (src) == REGNO (dst)) | |
1204 | return 1; | |
1205 | if (GET_CODE (src) != SUBREG || GET_CODE (dst) != SUBREG | |
1206 | || SUBREG_WORD (src) != SUBREG_WORD (dst)) | |
1207 | return 0; | |
1208 | src = SUBREG_REG (src); | |
1209 | dst = SUBREG_REG (dst); | |
1210 | if (GET_CODE (src) == REG && GET_CODE (dst) == REG | |
1211 | && REGNO (src) == REGNO (dst)) | |
1212 | return 1; | |
1213 | return 0; | |
1214 | } | |
1215 | ||
1216 | /* Return nonzero if an insn consists only of SETs, each of which only sets a | |
1217 | value to itself. */ | |
1218 | static int | |
1219 | noop_move_p (insn) | |
1220 | rtx insn; | |
1221 | { | |
1222 | rtx pat = PATTERN (insn); | |
1223 | ||
1224 | /* Insns carrying these notes are useful later on. */ | |
1225 | if (find_reg_note (insn, REG_EQUAL, NULL_RTX)) | |
1226 | return 0; | |
1227 | ||
1228 | if (GET_CODE (pat) == SET && set_noop_p (pat)) | |
1229 | return 1; | |
1230 | ||
1231 | if (GET_CODE (pat) == PARALLEL) | |
1232 | { | |
1233 | int i; | |
1234 | /* If nothing but SETs of registers to themselves, | |
1235 | this insn can also be deleted. */ | |
1236 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
1237 | { | |
1238 | rtx tem = XVECEXP (pat, 0, i); | |
1239 | ||
1240 | if (GET_CODE (tem) == USE | |
1241 | || GET_CODE (tem) == CLOBBER) | |
1242 | continue; | |
1243 | ||
1244 | if (GET_CODE (tem) != SET || ! set_noop_p (tem)) | |
1245 | return 0; | |
1246 | } | |
1247 | ||
1248 | return 1; | |
1249 | } | |
1250 | return 0; | |
1251 | } | |
1252 | ||
fdb8a883 JW |
1253 | static void |
1254 | notice_stack_pointer_modification (x, pat) | |
1255 | rtx x; | |
1256 | rtx pat ATTRIBUTE_UNUSED; | |
1257 | { | |
1258 | if (x == stack_pointer_rtx | |
1259 | /* The stack pointer is only modified indirectly as the result | |
1260 | of a push until later in flow. See the comments in rtl.texi | |
1261 | regarding Embedded Side-Effects on Addresses. */ | |
1262 | || (GET_CODE (x) == MEM | |
1263 | && (GET_CODE (XEXP (x, 0)) == PRE_DEC | |
1264 | || GET_CODE (XEXP (x, 0)) == PRE_INC | |
1265 | || GET_CODE (XEXP (x, 0)) == POST_DEC | |
1266 | || GET_CODE (XEXP (x, 0)) == POST_INC) | |
1267 | && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx)) | |
1268 | current_function_sp_is_unchanging = 0; | |
1269 | } | |
1270 | ||
dc2ede84 BS |
1271 | /* Record which insns refer to any volatile memory |
1272 | or for any reason can't be deleted just because they are dead stores. | |
fdb8a883 JW |
1273 | Also, delete any insns that copy a register to itself. |
1274 | And see if the stack pointer is modified. */ | |
dc2ede84 BS |
1275 | static void |
1276 | record_volatile_insns (f) | |
1277 | rtx f; | |
1278 | { | |
1279 | rtx insn; | |
1280 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
1281 | { | |
1282 | enum rtx_code code1 = GET_CODE (insn); | |
1283 | if (code1 == CALL_INSN) | |
1284 | INSN_VOLATILE (insn) = 1; | |
1285 | else if (code1 == INSN || code1 == JUMP_INSN) | |
1286 | { | |
1287 | if (GET_CODE (PATTERN (insn)) != USE | |
1288 | && volatile_refs_p (PATTERN (insn))) | |
1289 | INSN_VOLATILE (insn) = 1; | |
1290 | ||
1291 | /* A SET that makes space on the stack cannot be dead. | |
1292 | (Such SETs occur only for allocating variable-size data, | |
1293 | so they will always have a PLUS or MINUS according to the | |
1294 | direction of stack growth.) | |
1295 | Even if this function never uses this stack pointer value, | |
1296 | signal handlers do! */ | |
1297 | else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET | |
1298 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1299 | #ifdef STACK_GROWS_DOWNWARD | |
1300 | && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS | |
1301 | #else | |
1302 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1303 | #endif | |
1304 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx) | |
1305 | INSN_VOLATILE (insn) = 1; | |
1306 | ||
1307 | /* Delete (in effect) any obvious no-op moves. */ | |
1308 | else if (noop_move_p (insn)) | |
1309 | { | |
1310 | PUT_CODE (insn, NOTE); | |
1311 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1312 | NOTE_SOURCE_FILE (insn) = 0; | |
1313 | } | |
1314 | } | |
fdb8a883 JW |
1315 | |
1316 | /* Check if insn modifies the stack pointer. */ | |
1317 | if ( current_function_sp_is_unchanging | |
1318 | && GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1319 | note_stores (PATTERN (insn), notice_stack_pointer_modification); | |
dc2ede84 BS |
1320 | } |
1321 | } | |
1322 | ||
1323 | /* Mark those regs which are needed at the end of the function as live | |
1324 | at the end of the last basic block. */ | |
1325 | static void | |
1326 | mark_regs_live_at_end (set) | |
1327 | regset set; | |
1328 | { | |
1329 | int i; | |
1330 | ||
1331 | #ifdef EXIT_IGNORE_STACK | |
1332 | if (! EXIT_IGNORE_STACK | |
1333 | || (! FRAME_POINTER_REQUIRED | |
1334 | && ! current_function_calls_alloca | |
fdb8a883 JW |
1335 | && flag_omit_frame_pointer) |
1336 | || current_function_sp_is_unchanging) | |
dc2ede84 BS |
1337 | #endif |
1338 | /* If exiting needs the right stack value, | |
1339 | consider the stack pointer live at the end of the function. */ | |
1340 | SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM); | |
1341 | ||
1342 | /* Mark the frame pointer is needed at the end of the function. If | |
1343 | we end up eliminating it, it will be removed from the live list | |
1344 | of each basic block by reload. */ | |
1345 | ||
1346 | SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM); | |
1347 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
1348 | /* If they are different, also mark the hard frame pointer as live */ | |
1349 | SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM); | |
1350 | #endif | |
1351 | ||
1352 | ||
1353 | /* Mark all global registers and all registers used by the epilogue | |
1354 | as being live at the end of the function since they may be | |
1355 | referenced by our caller. */ | |
1356 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1357 | if (global_regs[i] | |
1358 | #ifdef EPILOGUE_USES | |
1359 | || EPILOGUE_USES (i) | |
1360 | #endif | |
1361 | ) | |
1362 | SET_REGNO_REG_SET (set, i); | |
1363 | } | |
1364 | ||
d7429b6a RK |
1365 | /* Determine which registers are live at the start of each |
1366 | basic block of the function whose first insn is F. | |
1367 | NREGS is the number of registers used in F. | |
1368 | We allocate the vector basic_block_live_at_start | |
1369 | and the regsets that it points to, and fill them with the data. | |
1370 | regset_size and regset_bytes are also set here. */ | |
1371 | ||
1372 | static void | |
5ece9746 | 1373 | life_analysis_1 (f, nregs) |
d7429b6a RK |
1374 | rtx f; |
1375 | int nregs; | |
1376 | { | |
d7429b6a RK |
1377 | int first_pass; |
1378 | int changed; | |
1379 | /* For each basic block, a bitmask of regs | |
1380 | live on exit from the block. */ | |
1381 | regset *basic_block_live_at_end; | |
1382 | /* For each basic block, a bitmask of regs | |
1383 | live on entry to a successor-block of this block. | |
1384 | If this does not match basic_block_live_at_end, | |
1385 | that must be updated, and the block must be rescanned. */ | |
1386 | regset *basic_block_new_live_at_end; | |
1387 | /* For each basic block, a bitmask of regs | |
1388 | whose liveness at the end of the basic block | |
1389 | can make a difference in which regs are live on entry to the block. | |
1390 | These are the regs that are set within the basic block, | |
1391 | possibly excluding those that are used after they are set. */ | |
1392 | regset *basic_block_significant; | |
1393 | register int i; | |
6764d250 | 1394 | char save_regs_ever_live[FIRST_PSEUDO_REGISTER]; |
d7429b6a RK |
1395 | |
1396 | struct obstack flow_obstack; | |
1397 | ||
1398 | gcc_obstack_init (&flow_obstack); | |
1399 | ||
1400 | max_regno = nregs; | |
1401 | ||
6764d250 BS |
1402 | /* The post-reload life analysis have (on a global basis) the same registers |
1403 | live as was computed by reload itself. | |
1404 | ||
1405 | Otherwise elimination offsets and such may be incorrect. | |
1406 | ||
1407 | Reload will make some registers as live even though they do not appear | |
1408 | in the rtl. */ | |
1409 | if (reload_completed) | |
1410 | bcopy (regs_ever_live, save_regs_ever_live, (sizeof (regs_ever_live))); | |
1411 | ||
d7429b6a RK |
1412 | bzero (regs_ever_live, sizeof regs_ever_live); |
1413 | ||
1414 | /* Allocate and zero out many data structures | |
1415 | that will record the data from lifetime analysis. */ | |
1416 | ||
1417 | allocate_for_life_analysis (); | |
1418 | ||
1419 | reg_next_use = (rtx *) alloca (nregs * sizeof (rtx)); | |
4c9a05bc | 1420 | bzero ((char *) reg_next_use, nregs * sizeof (rtx)); |
d7429b6a RK |
1421 | |
1422 | /* Set up several regset-vectors used internally within this function. | |
1423 | Their meanings are documented above, with their declarations. */ | |
1424 | ||
4c9a05bc RK |
1425 | basic_block_live_at_end |
1426 | = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
1427 | ||
d7429b6a RK |
1428 | /* Don't use alloca since that leads to a crash rather than an error message |
1429 | if there isn't enough space. | |
1430 | Don't use oballoc since we may need to allocate other things during | |
1431 | this function on the temporary obstack. */ | |
67f0e213 | 1432 | init_regset_vector (basic_block_live_at_end, n_basic_blocks, &flow_obstack); |
d7429b6a | 1433 | |
4c9a05bc RK |
1434 | basic_block_new_live_at_end |
1435 | = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
67f0e213 | 1436 | init_regset_vector (basic_block_new_live_at_end, n_basic_blocks, |
7eb136d6 | 1437 | &flow_obstack); |
d7429b6a | 1438 | |
4c9a05bc RK |
1439 | basic_block_significant |
1440 | = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
67f0e213 | 1441 | init_regset_vector (basic_block_significant, n_basic_blocks, &flow_obstack); |
d7429b6a | 1442 | |
fdb8a883 JW |
1443 | /* Assume that the stack pointer is unchanging if alloca hasn't been used. |
1444 | This will be cleared by record_volatile_insns if it encounters an insn | |
1445 | which modifies the stack pointer. */ | |
1446 | current_function_sp_is_unchanging = !current_function_calls_alloca; | |
1447 | ||
dc2ede84 | 1448 | record_volatile_insns (f); |
fe0f9c4b RK |
1449 | |
1450 | if (n_basic_blocks > 0) | |
1451 | { | |
dc2ede84 BS |
1452 | mark_regs_live_at_end (basic_block_live_at_end[n_basic_blocks - 1]); |
1453 | COPY_REG_SET (basic_block_new_live_at_end[n_basic_blocks - 1], | |
1454 | basic_block_live_at_end[n_basic_blocks - 1]); | |
1455 | } | |
d7429b6a RK |
1456 | |
1457 | /* Propagate life info through the basic blocks | |
1458 | around the graph of basic blocks. | |
1459 | ||
1460 | This is a relaxation process: each time a new register | |
1461 | is live at the end of the basic block, we must scan the block | |
1462 | to determine which registers are, as a consequence, live at the beginning | |
1463 | of that block. These registers must then be marked live at the ends | |
1464 | of all the blocks that can transfer control to that block. | |
1465 | The process continues until it reaches a fixed point. */ | |
1466 | ||
1467 | first_pass = 1; | |
1468 | changed = 1; | |
1469 | while (changed) | |
1470 | { | |
1471 | changed = 0; | |
1472 | for (i = n_basic_blocks - 1; i >= 0; i--) | |
1473 | { | |
1474 | int consider = first_pass; | |
1475 | int must_rescan = first_pass; | |
1476 | register int j; | |
1477 | ||
1478 | if (!first_pass) | |
1479 | { | |
1480 | /* Set CONSIDER if this block needs thinking about at all | |
1481 | (that is, if the regs live now at the end of it | |
1482 | are not the same as were live at the end of it when | |
1483 | we last thought about it). | |
1484 | Set must_rescan if it needs to be thought about | |
1485 | instruction by instruction (that is, if any additional | |
1486 | reg that is live at the end now but was not live there before | |
1487 | is one of the significant regs of this basic block). */ | |
1488 | ||
b5835272 RK |
1489 | EXECUTE_IF_AND_COMPL_IN_REG_SET |
1490 | (basic_block_new_live_at_end[i], | |
1491 | basic_block_live_at_end[i], 0, j, | |
1492 | { | |
1493 | consider = 1; | |
b590bbfd | 1494 | if (REGNO_REG_SET_P (basic_block_significant[i], j)) |
b5835272 RK |
1495 | { |
1496 | must_rescan = 1; | |
1497 | goto done; | |
1498 | } | |
1499 | }); | |
916b1701 | 1500 | done: |
d7429b6a RK |
1501 | if (! consider) |
1502 | continue; | |
1503 | } | |
1504 | ||
1505 | /* The live_at_start of this block may be changing, | |
1506 | so another pass will be required after this one. */ | |
1507 | changed = 1; | |
1508 | ||
1509 | if (! must_rescan) | |
1510 | { | |
1511 | /* No complete rescan needed; | |
1512 | just record those variables newly known live at end | |
1513 | as live at start as well. */ | |
916b1701 MM |
1514 | IOR_AND_COMPL_REG_SET (basic_block_live_at_start[i], |
1515 | basic_block_new_live_at_end[i], | |
1516 | basic_block_live_at_end[i]); | |
1517 | ||
1518 | IOR_AND_COMPL_REG_SET (basic_block_live_at_end[i], | |
1519 | basic_block_new_live_at_end[i], | |
1520 | basic_block_live_at_end[i]); | |
d7429b6a RK |
1521 | } |
1522 | else | |
1523 | { | |
1524 | /* Update the basic_block_live_at_start | |
1525 | by propagation backwards through the block. */ | |
916b1701 MM |
1526 | COPY_REG_SET (basic_block_live_at_end[i], |
1527 | basic_block_new_live_at_end[i]); | |
1528 | COPY_REG_SET (basic_block_live_at_start[i], | |
1529 | basic_block_live_at_end[i]); | |
d7429b6a | 1530 | propagate_block (basic_block_live_at_start[i], |
3b413743 | 1531 | BLOCK_HEAD (i), BLOCK_END (i), 0, |
5f4f0e22 CH |
1532 | first_pass ? basic_block_significant[i] |
1533 | : (regset) 0, | |
d7429b6a RK |
1534 | i); |
1535 | } | |
1536 | ||
1537 | { | |
421382ac | 1538 | int_list_ptr p; |
af14ce9c | 1539 | |
d7429b6a | 1540 | /* Update the basic_block_new_live_at_end's of |
421382ac BS |
1541 | all the blocks that reach this one. */ |
1542 | for (p = basic_block_pred[i]; p; p = p->next) | |
1543 | { | |
1544 | register int from_block = INT_LIST_VAL (p); | |
1545 | IOR_REG_SET (basic_block_new_live_at_end[from_block], | |
1546 | basic_block_live_at_start[i]); | |
1547 | } | |
d7429b6a RK |
1548 | } |
1549 | #ifdef USE_C_ALLOCA | |
1550 | alloca (0); | |
1551 | #endif | |
1552 | } | |
1553 | first_pass = 0; | |
1554 | } | |
1555 | ||
1556 | /* The only pseudos that are live at the beginning of the function are | |
1557 | those that were not set anywhere in the function. local-alloc doesn't | |
1558 | know how to handle these correctly, so mark them as not local to any | |
1559 | one basic block. */ | |
1560 | ||
1561 | if (n_basic_blocks > 0) | |
916b1701 MM |
1562 | EXECUTE_IF_SET_IN_REG_SET (basic_block_live_at_start[0], |
1563 | FIRST_PSEUDO_REGISTER, i, | |
1564 | { | |
1565 | REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; | |
1566 | }); | |
d7429b6a RK |
1567 | |
1568 | /* Now the life information is accurate. | |
1569 | Make one more pass over each basic block | |
1570 | to delete dead stores, create autoincrement addressing | |
1571 | and record how many times each register is used, is set, or dies. | |
1572 | ||
1573 | To save time, we operate directly in basic_block_live_at_end[i], | |
1574 | thus destroying it (in fact, converting it into a copy of | |
1575 | basic_block_live_at_start[i]). This is ok now because | |
1576 | basic_block_live_at_end[i] is no longer used past this point. */ | |
1577 | ||
d7429b6a RK |
1578 | for (i = 0; i < n_basic_blocks; i++) |
1579 | { | |
1580 | propagate_block (basic_block_live_at_end[i], | |
3b413743 | 1581 | BLOCK_HEAD (i), BLOCK_END (i), 1, |
5f4f0e22 | 1582 | (regset) 0, i); |
d7429b6a RK |
1583 | #ifdef USE_C_ALLOCA |
1584 | alloca (0); | |
1585 | #endif | |
1586 | } | |
1587 | ||
1588 | #if 0 | |
1589 | /* Something live during a setjmp should not be put in a register | |
1590 | on certain machines which restore regs from stack frames | |
1591 | rather than from the jmpbuf. | |
1592 | But we don't need to do this for the user's variables, since | |
1593 | ANSI says only volatile variables need this. */ | |
1594 | #ifdef LONGJMP_RESTORE_FROM_STACK | |
916b1701 MM |
1595 | EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp, |
1596 | FIRST_PSEUDO_REGISTER, i, | |
1597 | { | |
1598 | if (regno_reg_rtx[i] != 0 | |
1599 | && ! REG_USERVAR_P (regno_reg_rtx[i])) | |
1600 | { | |
1601 | REG_LIVE_LENGTH (i) = -1; | |
1602 | REG_BASIC_BLOCK (i) = -1; | |
1603 | } | |
1604 | }); | |
d7429b6a RK |
1605 | #endif |
1606 | #endif | |
1607 | ||
1608 | /* We have a problem with any pseudoreg that | |
1609 | lives across the setjmp. ANSI says that if a | |
1610 | user variable does not change in value | |
1611 | between the setjmp and the longjmp, then the longjmp preserves it. | |
1612 | This includes longjmp from a place where the pseudo appears dead. | |
1613 | (In principle, the value still exists if it is in scope.) | |
1614 | If the pseudo goes in a hard reg, some other value may occupy | |
1615 | that hard reg where this pseudo is dead, thus clobbering the pseudo. | |
1616 | Conclusion: such a pseudo must not go in a hard reg. */ | |
916b1701 MM |
1617 | EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp, |
1618 | FIRST_PSEUDO_REGISTER, i, | |
1619 | { | |
1620 | if (regno_reg_rtx[i] != 0) | |
1621 | { | |
1622 | REG_LIVE_LENGTH (i) = -1; | |
1623 | REG_BASIC_BLOCK (i) = -1; | |
1624 | } | |
1625 | }); | |
d7429b6a | 1626 | |
6764d250 BS |
1627 | /* Restore regs_ever_live that was provided by reload. */ |
1628 | if (reload_completed) | |
1629 | bcopy (save_regs_ever_live, regs_ever_live, (sizeof (regs_ever_live))); | |
67f0e213 RK |
1630 | |
1631 | free_regset_vector (basic_block_live_at_end, n_basic_blocks); | |
1632 | free_regset_vector (basic_block_new_live_at_end, n_basic_blocks); | |
1633 | free_regset_vector (basic_block_significant, n_basic_blocks); | |
1634 | basic_block_live_at_end = (regset *)0; | |
1635 | basic_block_new_live_at_end = (regset *)0; | |
1636 | basic_block_significant = (regset *)0; | |
1637 | ||
5f4f0e22 | 1638 | obstack_free (&flow_obstack, NULL_PTR); |
d7429b6a RK |
1639 | } |
1640 | \f | |
1641 | /* Subroutines of life analysis. */ | |
1642 | ||
1643 | /* Allocate the permanent data structures that represent the results | |
1644 | of life analysis. Not static since used also for stupid life analysis. */ | |
1645 | ||
1646 | void | |
1647 | allocate_for_life_analysis () | |
1648 | { | |
1649 | register int i; | |
d7429b6a | 1650 | |
67f0e213 RK |
1651 | /* Recalculate the register space, in case it has grown. Old style |
1652 | vector oriented regsets would set regset_{size,bytes} here also. */ | |
1653 | allocate_reg_info (max_regno, FALSE, FALSE); | |
d7429b6a | 1654 | |
b1f21e0a MM |
1655 | /* Because both reg_scan and flow_analysis want to set up the REG_N_SETS |
1656 | information, explicitly reset it here. The allocation should have | |
1657 | already happened on the previous reg_scan pass. Make sure in case | |
1658 | some more registers were allocated. */ | |
d7429b6a | 1659 | for (i = 0; i < max_regno; i++) |
b1f21e0a | 1660 | REG_N_SETS (i) = 0; |
d7429b6a | 1661 | |
4c9a05bc RK |
1662 | basic_block_live_at_start |
1663 | = (regset *) oballoc (n_basic_blocks * sizeof (regset)); | |
67f0e213 | 1664 | init_regset_vector (basic_block_live_at_start, n_basic_blocks, |
7eb136d6 | 1665 | function_obstack); |
d7429b6a | 1666 | |
7eb136d6 MM |
1667 | regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (function_obstack); |
1668 | CLEAR_REG_SET (regs_live_at_setjmp); | |
d7429b6a RK |
1669 | } |
1670 | ||
67f0e213 RK |
1671 | /* Make each element of VECTOR point at a regset. The vector has |
1672 | NELTS elements, and space is allocated from the ALLOC_OBSTACK | |
1673 | obstack. */ | |
d7429b6a | 1674 | |
04821e98 | 1675 | static void |
67f0e213 | 1676 | init_regset_vector (vector, nelts, alloc_obstack) |
d7429b6a | 1677 | regset *vector; |
d7429b6a | 1678 | int nelts; |
7eb136d6 | 1679 | struct obstack *alloc_obstack; |
d7429b6a RK |
1680 | { |
1681 | register int i; | |
d7429b6a RK |
1682 | |
1683 | for (i = 0; i < nelts; i++) | |
1684 | { | |
7eb136d6 MM |
1685 | vector[i] = OBSTACK_ALLOC_REG_SET (alloc_obstack); |
1686 | CLEAR_REG_SET (vector[i]); | |
d7429b6a RK |
1687 | } |
1688 | } | |
e658434c | 1689 | |
67f0e213 RK |
1690 | /* Release any additional space allocated for each element of VECTOR point |
1691 | other than the regset header itself. The vector has NELTS elements. */ | |
1692 | ||
1693 | void | |
1694 | free_regset_vector (vector, nelts) | |
1695 | regset *vector; | |
1696 | int nelts; | |
1697 | { | |
1698 | register int i; | |
1699 | ||
1700 | for (i = 0; i < nelts; i++) | |
1701 | FREE_REG_SET (vector[i]); | |
1702 | } | |
1703 | ||
d7429b6a RK |
1704 | /* Compute the registers live at the beginning of a basic block |
1705 | from those live at the end. | |
1706 | ||
1707 | When called, OLD contains those live at the end. | |
1708 | On return, it contains those live at the beginning. | |
1709 | FIRST and LAST are the first and last insns of the basic block. | |
1710 | ||
1711 | FINAL is nonzero if we are doing the final pass which is not | |
1712 | for computing the life info (since that has already been done) | |
1713 | but for acting on it. On this pass, we delete dead stores, | |
1714 | set up the logical links and dead-variables lists of instructions, | |
1715 | and merge instructions for autoincrement and autodecrement addresses. | |
1716 | ||
1717 | SIGNIFICANT is nonzero only the first time for each basic block. | |
1718 | If it is nonzero, it points to a regset in which we store | |
1719 | a 1 for each register that is set within the block. | |
1720 | ||
1721 | BNUM is the number of the basic block. */ | |
1722 | ||
1723 | static void | |
1724 | propagate_block (old, first, last, final, significant, bnum) | |
1725 | register regset old; | |
1726 | rtx first; | |
1727 | rtx last; | |
1728 | int final; | |
1729 | regset significant; | |
1730 | int bnum; | |
1731 | { | |
1732 | register rtx insn; | |
1733 | rtx prev; | |
1734 | regset live; | |
1735 | regset dead; | |
1736 | ||
d7429b6a RK |
1737 | /* The loop depth may change in the middle of a basic block. Since we |
1738 | scan from end to beginning, we start with the depth at the end of the | |
1739 | current basic block, and adjust as we pass ends and starts of loops. */ | |
1740 | loop_depth = basic_block_loop_depth[bnum]; | |
1741 | ||
7eb136d6 MM |
1742 | dead = ALLOCA_REG_SET (); |
1743 | live = ALLOCA_REG_SET (); | |
d7429b6a RK |
1744 | |
1745 | cc0_live = 0; | |
db3a887b | 1746 | mem_set_list = NULL_RTX; |
d7429b6a RK |
1747 | |
1748 | /* Include any notes at the end of the block in the scan. | |
1749 | This is in case the block ends with a call to setjmp. */ | |
1750 | ||
1751 | while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE) | |
1752 | { | |
1753 | /* Look for loop boundaries, we are going forward here. */ | |
1754 | last = NEXT_INSN (last); | |
1755 | if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG) | |
1756 | loop_depth++; | |
1757 | else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END) | |
1758 | loop_depth--; | |
1759 | } | |
1760 | ||
1761 | if (final) | |
1762 | { | |
916b1701 | 1763 | register int i; |
d7429b6a | 1764 | |
d7429b6a | 1765 | /* Process the regs live at the end of the block. |
f8dd7f98 | 1766 | Mark them as not local to any one basic block. */ |
916b1701 MM |
1767 | EXECUTE_IF_SET_IN_REG_SET (old, 0, i, |
1768 | { | |
1769 | REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; | |
916b1701 | 1770 | }); |
d7429b6a RK |
1771 | } |
1772 | ||
1773 | /* Scan the block an insn at a time from end to beginning. */ | |
1774 | ||
1775 | for (insn = last; ; insn = prev) | |
1776 | { | |
1777 | prev = PREV_INSN (insn); | |
1778 | ||
8329b5ec | 1779 | if (GET_CODE (insn) == NOTE) |
d7429b6a | 1780 | { |
8329b5ec DE |
1781 | /* Look for loop boundaries, remembering that we are going |
1782 | backwards. */ | |
1783 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
1784 | loop_depth++; | |
1785 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
1786 | loop_depth--; | |
1787 | ||
1788 | /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. | |
1789 | Abort now rather than setting register status incorrectly. */ | |
1790 | if (loop_depth == 0) | |
1791 | abort (); | |
1792 | ||
1793 | /* If this is a call to `setjmp' et al, | |
1794 | warn if any non-volatile datum is live. */ | |
1795 | ||
1796 | if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP) | |
916b1701 | 1797 | IOR_REG_SET (regs_live_at_setjmp, old); |
d7429b6a RK |
1798 | } |
1799 | ||
1800 | /* Update the life-status of regs for this insn. | |
1801 | First DEAD gets which regs are set in this insn | |
1802 | then LIVE gets which regs are used in this insn. | |
1803 | Then the regs live before the insn | |
1804 | are those live after, with DEAD regs turned off, | |
1805 | and then LIVE regs turned on. */ | |
1806 | ||
8329b5ec | 1807 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
d7429b6a RK |
1808 | { |
1809 | register int i; | |
5f4f0e22 | 1810 | rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX); |
d7429b6a | 1811 | int insn_is_dead |
e398aa80 | 1812 | = (insn_dead_p (PATTERN (insn), old, 0, REG_NOTES (insn)) |
d7429b6a RK |
1813 | /* Don't delete something that refers to volatile storage! */ |
1814 | && ! INSN_VOLATILE (insn)); | |
1815 | int libcall_is_dead | |
1816 | = (insn_is_dead && note != 0 | |
1817 | && libcall_dead_p (PATTERN (insn), old, note, insn)); | |
1818 | ||
1819 | /* If an instruction consists of just dead store(s) on final pass, | |
1820 | "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED. | |
1821 | We could really delete it with delete_insn, but that | |
1822 | can cause trouble for first or last insn in a basic block. */ | |
b590bbfd | 1823 | if (final && insn_is_dead) |
d7429b6a RK |
1824 | { |
1825 | PUT_CODE (insn, NOTE); | |
1826 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1827 | NOTE_SOURCE_FILE (insn) = 0; | |
1828 | ||
e5df1ea3 RK |
1829 | /* CC0 is now known to be dead. Either this insn used it, |
1830 | in which case it doesn't anymore, or clobbered it, | |
1831 | so the next insn can't use it. */ | |
1832 | cc0_live = 0; | |
1833 | ||
d7429b6a RK |
1834 | /* If this insn is copying the return value from a library call, |
1835 | delete the entire library call. */ | |
1836 | if (libcall_is_dead) | |
1837 | { | |
1838 | rtx first = XEXP (note, 0); | |
1839 | rtx p = insn; | |
1840 | while (INSN_DELETED_P (first)) | |
1841 | first = NEXT_INSN (first); | |
1842 | while (p != first) | |
1843 | { | |
1844 | p = PREV_INSN (p); | |
1845 | PUT_CODE (p, NOTE); | |
1846 | NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED; | |
1847 | NOTE_SOURCE_FILE (p) = 0; | |
1848 | } | |
1849 | } | |
1850 | goto flushed; | |
1851 | } | |
1852 | ||
916b1701 MM |
1853 | CLEAR_REG_SET (dead); |
1854 | CLEAR_REG_SET (live); | |
d7429b6a RK |
1855 | |
1856 | /* See if this is an increment or decrement that can be | |
1857 | merged into a following memory address. */ | |
1858 | #ifdef AUTO_INC_DEC | |
1859 | { | |
956d6950 JL |
1860 | register rtx x = single_set (insn); |
1861 | ||
d7429b6a | 1862 | /* Does this instruction increment or decrement a register? */ |
6764d250 BS |
1863 | if (!reload_completed |
1864 | && final && x != 0 | |
d7429b6a RK |
1865 | && GET_CODE (SET_DEST (x)) == REG |
1866 | && (GET_CODE (SET_SRC (x)) == PLUS | |
1867 | || GET_CODE (SET_SRC (x)) == MINUS) | |
1868 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) | |
1869 | && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT | |
1870 | /* Ok, look for a following memory ref we can combine with. | |
1871 | If one is found, change the memory ref to a PRE_INC | |
1872 | or PRE_DEC, cancel this insn, and return 1. | |
1873 | Return 0 if nothing has been done. */ | |
1874 | && try_pre_increment_1 (insn)) | |
1875 | goto flushed; | |
1876 | } | |
1877 | #endif /* AUTO_INC_DEC */ | |
1878 | ||
1879 | /* If this is not the final pass, and this insn is copying the | |
1880 | value of a library call and it's dead, don't scan the | |
1881 | insns that perform the library call, so that the call's | |
1882 | arguments are not marked live. */ | |
1883 | if (libcall_is_dead) | |
1884 | { | |
1885 | /* Mark the dest reg as `significant'. */ | |
5f4f0e22 | 1886 | mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant); |
d7429b6a RK |
1887 | |
1888 | insn = XEXP (note, 0); | |
1889 | prev = PREV_INSN (insn); | |
1890 | } | |
1891 | else if (GET_CODE (PATTERN (insn)) == SET | |
1892 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1893 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1894 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx | |
1895 | && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT) | |
1896 | /* We have an insn to pop a constant amount off the stack. | |
1897 | (Such insns use PLUS regardless of the direction of the stack, | |
1898 | and any insn to adjust the stack by a constant is always a pop.) | |
1899 | These insns, if not dead stores, have no effect on life. */ | |
1900 | ; | |
1901 | else | |
1902 | { | |
f8dd7f98 BS |
1903 | /* Any regs live at the time of a call instruction |
1904 | must not go in a register clobbered by calls. | |
1905 | Find all regs now live and record this for them. */ | |
1906 | ||
1907 | if (GET_CODE (insn) == CALL_INSN && final) | |
1908 | EXECUTE_IF_SET_IN_REG_SET (old, 0, i, | |
1909 | { | |
1910 | REG_N_CALLS_CROSSED (i)++; | |
1911 | }); | |
1912 | ||
d7429b6a RK |
1913 | /* LIVE gets the regs used in INSN; |
1914 | DEAD gets those set by it. Dead insns don't make anything | |
1915 | live. */ | |
1916 | ||
5f4f0e22 CH |
1917 | mark_set_regs (old, dead, PATTERN (insn), |
1918 | final ? insn : NULL_RTX, significant); | |
d7429b6a RK |
1919 | |
1920 | /* If an insn doesn't use CC0, it becomes dead since we | |
1921 | assume that every insn clobbers it. So show it dead here; | |
1922 | mark_used_regs will set it live if it is referenced. */ | |
1923 | cc0_live = 0; | |
1924 | ||
1925 | if (! insn_is_dead) | |
1926 | mark_used_regs (old, live, PATTERN (insn), final, insn); | |
1927 | ||
1928 | /* Sometimes we may have inserted something before INSN (such as | |
1929 | a move) when we make an auto-inc. So ensure we will scan | |
1930 | those insns. */ | |
1931 | #ifdef AUTO_INC_DEC | |
1932 | prev = PREV_INSN (insn); | |
1933 | #endif | |
1934 | ||
1935 | if (! insn_is_dead && GET_CODE (insn) == CALL_INSN) | |
1936 | { | |
1937 | register int i; | |
1938 | ||
6b67ec08 RK |
1939 | rtx note; |
1940 | ||
1941 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
1942 | note; | |
1943 | note = XEXP (note, 1)) | |
1944 | if (GET_CODE (XEXP (note, 0)) == USE) | |
1945 | mark_used_regs (old, live, SET_DEST (XEXP (note, 0)), | |
1946 | final, insn); | |
1947 | ||
d7429b6a | 1948 | /* Each call clobbers all call-clobbered regs that are not |
e4329280 | 1949 | global or fixed. Note that the function-value reg is a |
d7429b6a RK |
1950 | call-clobbered reg, and mark_set_regs has already had |
1951 | a chance to handle it. */ | |
1952 | ||
1953 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e4329280 RK |
1954 | if (call_used_regs[i] && ! global_regs[i] |
1955 | && ! fixed_regs[i]) | |
916b1701 | 1956 | SET_REGNO_REG_SET (dead, i); |
d7429b6a RK |
1957 | |
1958 | /* The stack ptr is used (honorarily) by a CALL insn. */ | |
916b1701 | 1959 | SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM); |
d7429b6a RK |
1960 | |
1961 | /* Calls may also reference any of the global registers, | |
1962 | so they are made live. */ | |
d7429b6a RK |
1963 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
1964 | if (global_regs[i]) | |
9b316aa2 | 1965 | mark_used_regs (old, live, |
38a448ca | 1966 | gen_rtx_REG (reg_raw_mode[i], i), |
9b316aa2 | 1967 | final, insn); |
d7429b6a RK |
1968 | |
1969 | /* Calls also clobber memory. */ | |
db3a887b | 1970 | mem_set_list = NULL_RTX; |
d7429b6a RK |
1971 | } |
1972 | ||
1973 | /* Update OLD for the registers used or set. */ | |
916b1701 MM |
1974 | AND_COMPL_REG_SET (old, dead); |
1975 | IOR_REG_SET (old, live); | |
d7429b6a | 1976 | |
d7429b6a RK |
1977 | } |
1978 | ||
f8dd7f98 BS |
1979 | /* On final pass, update counts of how many insns each reg is live |
1980 | at. */ | |
d7429b6a | 1981 | if (final) |
f8dd7f98 BS |
1982 | EXECUTE_IF_SET_IN_REG_SET (old, 0, i, |
1983 | { REG_LIVE_LENGTH (i)++; }); | |
d7429b6a RK |
1984 | } |
1985 | flushed: ; | |
1986 | if (insn == first) | |
1987 | break; | |
1988 | } | |
1989 | ||
67f0e213 RK |
1990 | FREE_REG_SET (dead); |
1991 | FREE_REG_SET (live); | |
d7429b6a RK |
1992 | } |
1993 | \f | |
1994 | /* Return 1 if X (the body of an insn, or part of it) is just dead stores | |
1995 | (SET expressions whose destinations are registers dead after the insn). | |
1996 | NEEDED is the regset that says which regs are alive after the insn. | |
1997 | ||
e398aa80 R |
1998 | Unless CALL_OK is non-zero, an insn is needed if it contains a CALL. |
1999 | ||
2000 | If X is the entire body of an insn, NOTES contains the reg notes | |
2001 | pertaining to the insn. */ | |
d7429b6a RK |
2002 | |
2003 | static int | |
e398aa80 | 2004 | insn_dead_p (x, needed, call_ok, notes) |
d7429b6a RK |
2005 | rtx x; |
2006 | regset needed; | |
2007 | int call_ok; | |
e398aa80 | 2008 | rtx notes ATTRIBUTE_UNUSED; |
d7429b6a | 2009 | { |
e5e809f4 JL |
2010 | enum rtx_code code = GET_CODE (x); |
2011 | ||
e398aa80 R |
2012 | #ifdef AUTO_INC_DEC |
2013 | /* If flow is invoked after reload, we must take existing AUTO_INC | |
2014 | expresions into account. */ | |
2015 | if (reload_completed) | |
2016 | { | |
2017 | for ( ; notes; notes = XEXP (notes, 1)) | |
2018 | { | |
2019 | if (REG_NOTE_KIND (notes) == REG_INC) | |
2020 | { | |
2021 | int regno = REGNO (XEXP (notes, 0)); | |
2022 | ||
2023 | /* Don't delete insns to set global regs. */ | |
2024 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2025 | || REGNO_REG_SET_P (needed, regno)) | |
2026 | return 0; | |
2027 | } | |
2028 | } | |
2029 | } | |
2030 | #endif | |
2031 | ||
d7429b6a RK |
2032 | /* If setting something that's a reg or part of one, |
2033 | see if that register's altered value will be live. */ | |
2034 | ||
2035 | if (code == SET) | |
2036 | { | |
e5e809f4 JL |
2037 | rtx r = SET_DEST (x); |
2038 | ||
d7429b6a RK |
2039 | /* A SET that is a subroutine call cannot be dead. */ |
2040 | if (! call_ok && GET_CODE (SET_SRC (x)) == CALL) | |
2041 | return 0; | |
2042 | ||
2043 | #ifdef HAVE_cc0 | |
2044 | if (GET_CODE (r) == CC0) | |
2045 | return ! cc0_live; | |
2046 | #endif | |
2047 | ||
db3a887b CB |
2048 | if (GET_CODE (r) == MEM && ! MEM_VOLATILE_P (r)) |
2049 | { | |
2050 | rtx temp; | |
2051 | /* Walk the set of memory locations we are currently tracking | |
2052 | and see if one is an identical match to this memory location. | |
2053 | If so, this memory write is dead (remember, we're walking | |
2054 | backwards from the end of the block to the start. */ | |
2055 | temp = mem_set_list; | |
2056 | while (temp) | |
2057 | { | |
2058 | if (rtx_equal_p (XEXP (temp, 0), r)) | |
2059 | return 1; | |
2060 | temp = XEXP (temp, 1); | |
2061 | } | |
2062 | } | |
d7429b6a | 2063 | |
e5e809f4 JL |
2064 | while (GET_CODE (r) == SUBREG || GET_CODE (r) == STRICT_LOW_PART |
2065 | || GET_CODE (r) == ZERO_EXTRACT) | |
d7429b6a RK |
2066 | r = SUBREG_REG (r); |
2067 | ||
2068 | if (GET_CODE (r) == REG) | |
2069 | { | |
e5e809f4 | 2070 | int regno = REGNO (r); |
d7429b6a | 2071 | |
d8c8b8e3 | 2072 | /* Don't delete insns to set global regs. */ |
d7429b6a RK |
2073 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) |
2074 | /* Make sure insns to set frame pointer aren't deleted. */ | |
2075 | || regno == FRAME_POINTER_REGNUM | |
73a187c1 DE |
2076 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
2077 | || regno == HARD_FRAME_POINTER_REGNUM | |
2078 | #endif | |
d7e4fe8b RS |
2079 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2080 | /* Make sure insns to set arg pointer are never deleted | |
2081 | (if the arg pointer isn't fixed, there will be a USE for | |
0f41302f | 2082 | it, so we can treat it normally). */ |
d7e4fe8b RS |
2083 | || (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) |
2084 | #endif | |
916b1701 | 2085 | || REGNO_REG_SET_P (needed, regno)) |
d7429b6a RK |
2086 | return 0; |
2087 | ||
2088 | /* If this is a hard register, verify that subsequent words are | |
2089 | not needed. */ | |
2090 | if (regno < FIRST_PSEUDO_REGISTER) | |
2091 | { | |
2092 | int n = HARD_REGNO_NREGS (regno, GET_MODE (r)); | |
2093 | ||
2094 | while (--n > 0) | |
916b1701 | 2095 | if (REGNO_REG_SET_P (needed, regno+n)) |
d7429b6a RK |
2096 | return 0; |
2097 | } | |
2098 | ||
2099 | return 1; | |
2100 | } | |
2101 | } | |
e5e809f4 | 2102 | |
d7429b6a RK |
2103 | /* If performing several activities, |
2104 | insn is dead if each activity is individually dead. | |
2105 | Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE | |
2106 | that's inside a PARALLEL doesn't make the insn worth keeping. */ | |
2107 | else if (code == PARALLEL) | |
2108 | { | |
e5e809f4 JL |
2109 | int i = XVECLEN (x, 0); |
2110 | ||
d7429b6a | 2111 | for (i--; i >= 0; i--) |
e5e809f4 JL |
2112 | if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER |
2113 | && GET_CODE (XVECEXP (x, 0, i)) != USE | |
e398aa80 | 2114 | && ! insn_dead_p (XVECEXP (x, 0, i), needed, call_ok, NULL_RTX)) |
e5e809f4 JL |
2115 | return 0; |
2116 | ||
d7429b6a RK |
2117 | return 1; |
2118 | } | |
e5e809f4 JL |
2119 | |
2120 | /* A CLOBBER of a pseudo-register that is dead serves no purpose. That | |
2121 | is not necessarily true for hard registers. */ | |
2122 | else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == REG | |
2123 | && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER | |
2124 | && ! REGNO_REG_SET_P (needed, REGNO (XEXP (x, 0)))) | |
2125 | return 1; | |
2126 | ||
2127 | /* We do not check other CLOBBER or USE here. An insn consisting of just | |
2128 | a CLOBBER or just a USE should not be deleted. */ | |
d7429b6a RK |
2129 | return 0; |
2130 | } | |
2131 | ||
2132 | /* If X is the pattern of the last insn in a libcall, and assuming X is dead, | |
2133 | return 1 if the entire library call is dead. | |
2134 | This is true if X copies a register (hard or pseudo) | |
2135 | and if the hard return reg of the call insn is dead. | |
2136 | (The caller should have tested the destination of X already for death.) | |
2137 | ||
2138 | If this insn doesn't just copy a register, then we don't | |
2139 | have an ordinary libcall. In that case, cse could not have | |
2140 | managed to substitute the source for the dest later on, | |
2141 | so we can assume the libcall is dead. | |
2142 | ||
2143 | NEEDED is the bit vector of pseudoregs live before this insn. | |
2144 | NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */ | |
2145 | ||
2146 | static int | |
2147 | libcall_dead_p (x, needed, note, insn) | |
2148 | rtx x; | |
2149 | regset needed; | |
2150 | rtx note; | |
2151 | rtx insn; | |
2152 | { | |
2153 | register RTX_CODE code = GET_CODE (x); | |
2154 | ||
2155 | if (code == SET) | |
2156 | { | |
2157 | register rtx r = SET_SRC (x); | |
2158 | if (GET_CODE (r) == REG) | |
2159 | { | |
2160 | rtx call = XEXP (note, 0); | |
e398aa80 | 2161 | rtx call_pat; |
d7429b6a RK |
2162 | register int i; |
2163 | ||
2164 | /* Find the call insn. */ | |
2165 | while (call != insn && GET_CODE (call) != CALL_INSN) | |
2166 | call = NEXT_INSN (call); | |
2167 | ||
2168 | /* If there is none, do nothing special, | |
2169 | since ordinary death handling can understand these insns. */ | |
2170 | if (call == insn) | |
2171 | return 0; | |
2172 | ||
2173 | /* See if the hard reg holding the value is dead. | |
2174 | If this is a PARALLEL, find the call within it. */ | |
e398aa80 R |
2175 | call_pat = PATTERN (call); |
2176 | if (GET_CODE (call_pat) == PARALLEL) | |
d7429b6a | 2177 | { |
e398aa80 R |
2178 | for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--) |
2179 | if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET | |
2180 | && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL) | |
d7429b6a RK |
2181 | break; |
2182 | ||
761a5bcd JW |
2183 | /* This may be a library call that is returning a value |
2184 | via invisible pointer. Do nothing special, since | |
2185 | ordinary death handling can understand these insns. */ | |
d7429b6a | 2186 | if (i < 0) |
761a5bcd | 2187 | return 0; |
d7429b6a | 2188 | |
e398aa80 | 2189 | call_pat = XVECEXP (call_pat, 0, i); |
d7429b6a RK |
2190 | } |
2191 | ||
e398aa80 | 2192 | return insn_dead_p (call_pat, needed, 1, REG_NOTES (call)); |
d7429b6a RK |
2193 | } |
2194 | } | |
2195 | return 1; | |
2196 | } | |
2197 | ||
bd80fbde RH |
2198 | /* Return 1 if register REGNO was used before it was set, i.e. if it is |
2199 | live at function entry. Don't count global register variables, variables | |
2200 | in registers that can be used for function arg passing, or variables in | |
2201 | fixed hard registers. */ | |
d7429b6a RK |
2202 | |
2203 | int | |
2204 | regno_uninitialized (regno) | |
2205 | int regno; | |
2206 | { | |
b0b7b46a | 2207 | if (n_basic_blocks == 0 |
6a45254e | 2208 | || (regno < FIRST_PSEUDO_REGISTER |
bd80fbde RH |
2209 | && (global_regs[regno] |
2210 | || fixed_regs[regno] | |
2211 | || FUNCTION_ARG_REGNO_P (regno)))) | |
d7429b6a RK |
2212 | return 0; |
2213 | ||
916b1701 | 2214 | return REGNO_REG_SET_P (basic_block_live_at_start[0], regno); |
d7429b6a RK |
2215 | } |
2216 | ||
2217 | /* 1 if register REGNO was alive at a place where `setjmp' was called | |
2218 | and was set more than once or is an argument. | |
2219 | Such regs may be clobbered by `longjmp'. */ | |
2220 | ||
2221 | int | |
2222 | regno_clobbered_at_setjmp (regno) | |
2223 | int regno; | |
2224 | { | |
2225 | if (n_basic_blocks == 0) | |
2226 | return 0; | |
2227 | ||
b1f21e0a | 2228 | return ((REG_N_SETS (regno) > 1 |
916b1701 MM |
2229 | || REGNO_REG_SET_P (basic_block_live_at_start[0], regno)) |
2230 | && REGNO_REG_SET_P (regs_live_at_setjmp, regno)); | |
d7429b6a RK |
2231 | } |
2232 | \f | |
2233 | /* Process the registers that are set within X. | |
2234 | Their bits are set to 1 in the regset DEAD, | |
2235 | because they are dead prior to this insn. | |
2236 | ||
2237 | If INSN is nonzero, it is the insn being processed | |
2238 | and the fact that it is nonzero implies this is the FINAL pass | |
2239 | in propagate_block. In this case, various info about register | |
2240 | usage is stored, LOG_LINKS fields of insns are set up. */ | |
2241 | ||
d7429b6a RK |
2242 | static void |
2243 | mark_set_regs (needed, dead, x, insn, significant) | |
2244 | regset needed; | |
2245 | regset dead; | |
2246 | rtx x; | |
2247 | rtx insn; | |
2248 | regset significant; | |
2249 | { | |
2250 | register RTX_CODE code = GET_CODE (x); | |
2251 | ||
2252 | if (code == SET || code == CLOBBER) | |
2253 | mark_set_1 (needed, dead, x, insn, significant); | |
2254 | else if (code == PARALLEL) | |
2255 | { | |
2256 | register int i; | |
2257 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
2258 | { | |
2259 | code = GET_CODE (XVECEXP (x, 0, i)); | |
2260 | if (code == SET || code == CLOBBER) | |
2261 | mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant); | |
2262 | } | |
2263 | } | |
2264 | } | |
2265 | ||
2266 | /* Process a single SET rtx, X. */ | |
2267 | ||
2268 | static void | |
2269 | mark_set_1 (needed, dead, x, insn, significant) | |
2270 | regset needed; | |
2271 | regset dead; | |
2272 | rtx x; | |
2273 | rtx insn; | |
2274 | regset significant; | |
2275 | { | |
2276 | register int regno; | |
2277 | register rtx reg = SET_DEST (x); | |
2278 | ||
86465af7 DM |
2279 | /* Some targets place small structures in registers for |
2280 | return values of functions. We have to detect this | |
2281 | case specially here to get correct flow information. */ | |
2282 | if (GET_CODE (reg) == PARALLEL | |
2283 | && GET_MODE (reg) == BLKmode) | |
2284 | { | |
2285 | register int i; | |
2286 | ||
2287 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) | |
2288 | mark_set_1 (needed, dead, XVECEXP (reg, 0, i), insn, significant); | |
2289 | return; | |
2290 | } | |
2291 | ||
d7429b6a RK |
2292 | /* Modifying just one hardware register of a multi-reg value |
2293 | or just a byte field of a register | |
2294 | does not mean the value from before this insn is now dead. | |
2295 | But it does mean liveness of that register at the end of the block | |
2296 | is significant. | |
2297 | ||
2298 | Within mark_set_1, however, we treat it as if the register is | |
2299 | indeed modified. mark_used_regs will, however, also treat this | |
2300 | register as being used. Thus, we treat these insns as setting a | |
2301 | new value for the register as a function of its old value. This | |
2302 | cases LOG_LINKS to be made appropriately and this will help combine. */ | |
2303 | ||
2304 | while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT | |
2305 | || GET_CODE (reg) == SIGN_EXTRACT | |
2306 | || GET_CODE (reg) == STRICT_LOW_PART) | |
2307 | reg = XEXP (reg, 0); | |
2308 | ||
db3a887b CB |
2309 | /* If this set is a MEM, then it kills any aliased writes. |
2310 | If this set is a REG, then it kills any MEMs which use the reg. */ | |
d7429b6a | 2311 | if (GET_CODE (reg) == MEM |
db3a887b CB |
2312 | || GET_CODE (reg) == REG) |
2313 | { | |
2314 | rtx temp = mem_set_list; | |
2315 | rtx prev = NULL_RTX; | |
2316 | ||
2317 | while (temp) | |
2318 | { | |
2319 | if ((GET_CODE (reg) == MEM | |
2320 | && output_dependence (XEXP (temp, 0), reg)) | |
2321 | || (GET_CODE (reg) == REG | |
2322 | && reg_overlap_mentioned_p (reg, XEXP (temp, 0)))) | |
2323 | { | |
2324 | /* Splice this entry out of the list. */ | |
2325 | if (prev) | |
2326 | XEXP (prev, 1) = XEXP (temp, 1); | |
2327 | else | |
2328 | mem_set_list = XEXP (temp, 1); | |
2329 | } | |
2330 | else | |
2331 | prev = temp; | |
2332 | temp = XEXP (temp, 1); | |
2333 | } | |
2334 | } | |
d7429b6a RK |
2335 | |
2336 | if (GET_CODE (reg) == MEM && ! side_effects_p (reg) | |
2337 | /* There are no REG_INC notes for SP, so we can't assume we'll see | |
2338 | everything that invalidates it. To be safe, don't eliminate any | |
2339 | stores though SP; none of them should be redundant anyway. */ | |
2340 | && ! reg_mentioned_p (stack_pointer_rtx, reg)) | |
db3a887b | 2341 | mem_set_list = gen_rtx_EXPR_LIST (VOIDmode, reg, mem_set_list); |
d7429b6a RK |
2342 | |
2343 | if (GET_CODE (reg) == REG | |
2344 | && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM) | |
73a187c1 DE |
2345 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
2346 | && regno != HARD_FRAME_POINTER_REGNUM | |
2347 | #endif | |
d7e4fe8b RS |
2348 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2349 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2350 | #endif | |
d7429b6a RK |
2351 | && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])) |
2352 | /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */ | |
2353 | { | |
916b1701 MM |
2354 | int some_needed = REGNO_REG_SET_P (needed, regno); |
2355 | int some_not_needed = ! some_needed; | |
d7429b6a RK |
2356 | |
2357 | /* Mark it as a significant register for this basic block. */ | |
2358 | if (significant) | |
916b1701 | 2359 | SET_REGNO_REG_SET (significant, regno); |
d7429b6a | 2360 | |
38e01259 | 2361 | /* Mark it as dead before this insn. */ |
916b1701 | 2362 | SET_REGNO_REG_SET (dead, regno); |
d7429b6a RK |
2363 | |
2364 | /* A hard reg in a wide mode may really be multiple registers. | |
2365 | If so, mark all of them just like the first. */ | |
2366 | if (regno < FIRST_PSEUDO_REGISTER) | |
2367 | { | |
2368 | int n; | |
2369 | ||
2370 | /* Nothing below is needed for the stack pointer; get out asap. | |
2371 | Eg, log links aren't needed, since combine won't use them. */ | |
2372 | if (regno == STACK_POINTER_REGNUM) | |
2373 | return; | |
2374 | ||
2375 | n = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
2376 | while (--n > 0) | |
2377 | { | |
916b1701 MM |
2378 | int regno_n = regno + n; |
2379 | int needed_regno = REGNO_REG_SET_P (needed, regno_n); | |
d7429b6a | 2380 | if (significant) |
916b1701 | 2381 | SET_REGNO_REG_SET (significant, regno_n); |
cb9e8ad1 | 2382 | |
916b1701 MM |
2383 | SET_REGNO_REG_SET (dead, regno_n); |
2384 | some_needed |= needed_regno; | |
2385 | some_not_needed |= ! needed_regno; | |
d7429b6a RK |
2386 | } |
2387 | } | |
2388 | /* Additional data to record if this is the final pass. */ | |
2389 | if (insn) | |
2390 | { | |
2391 | register rtx y = reg_next_use[regno]; | |
2392 | register int blocknum = BLOCK_NUM (insn); | |
2393 | ||
2394 | /* If this is a hard reg, record this function uses the reg. */ | |
2395 | ||
2396 | if (regno < FIRST_PSEUDO_REGISTER) | |
2397 | { | |
2398 | register int i; | |
2399 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
2400 | ||
2401 | for (i = regno; i < endregno; i++) | |
2402 | { | |
93514916 JW |
2403 | /* The next use is no longer "next", since a store |
2404 | intervenes. */ | |
2405 | reg_next_use[i] = 0; | |
2406 | ||
d7429b6a | 2407 | regs_ever_live[i] = 1; |
b1f21e0a | 2408 | REG_N_SETS (i)++; |
d7429b6a RK |
2409 | } |
2410 | } | |
2411 | else | |
2412 | { | |
93514916 JW |
2413 | /* The next use is no longer "next", since a store |
2414 | intervenes. */ | |
2415 | reg_next_use[regno] = 0; | |
2416 | ||
d7429b6a RK |
2417 | /* Keep track of which basic blocks each reg appears in. */ |
2418 | ||
b1f21e0a MM |
2419 | if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN) |
2420 | REG_BASIC_BLOCK (regno) = blocknum; | |
2421 | else if (REG_BASIC_BLOCK (regno) != blocknum) | |
2422 | REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL; | |
d7429b6a RK |
2423 | |
2424 | /* Count (weighted) references, stores, etc. This counts a | |
2425 | register twice if it is modified, but that is correct. */ | |
b1f21e0a | 2426 | REG_N_SETS (regno)++; |
d7429b6a | 2427 | |
b1f21e0a | 2428 | REG_N_REFS (regno) += loop_depth; |
d7429b6a RK |
2429 | |
2430 | /* The insns where a reg is live are normally counted | |
2431 | elsewhere, but we want the count to include the insn | |
2432 | where the reg is set, and the normal counting mechanism | |
2433 | would not count it. */ | |
b1f21e0a | 2434 | REG_LIVE_LENGTH (regno)++; |
d7429b6a RK |
2435 | } |
2436 | ||
cb9e8ad1 | 2437 | if (! some_not_needed) |
d7429b6a RK |
2438 | { |
2439 | /* Make a logical link from the next following insn | |
2440 | that uses this register, back to this insn. | |
2441 | The following insns have already been processed. | |
2442 | ||
2443 | We don't build a LOG_LINK for hard registers containing | |
2444 | in ASM_OPERANDs. If these registers get replaced, | |
2445 | we might wind up changing the semantics of the insn, | |
2446 | even if reload can make what appear to be valid assignments | |
2447 | later. */ | |
2448 | if (y && (BLOCK_NUM (y) == blocknum) | |
2449 | && (regno >= FIRST_PSEUDO_REGISTER | |
2450 | || asm_noperands (PATTERN (y)) < 0)) | |
2451 | LOG_LINKS (y) | |
38a448ca | 2452 | = gen_rtx_INSN_LIST (VOIDmode, insn, LOG_LINKS (y)); |
d7429b6a RK |
2453 | } |
2454 | else if (! some_needed) | |
2455 | { | |
2456 | /* Note that dead stores have already been deleted when possible | |
2457 | If we get here, we have found a dead store that cannot | |
2458 | be eliminated (because the same insn does something useful). | |
2459 | Indicate this by marking the reg being set as dying here. */ | |
2460 | REG_NOTES (insn) | |
38a448ca | 2461 | = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); |
b1f21e0a | 2462 | REG_N_DEATHS (REGNO (reg))++; |
d7429b6a RK |
2463 | } |
2464 | else | |
2465 | { | |
2466 | /* This is a case where we have a multi-word hard register | |
2467 | and some, but not all, of the words of the register are | |
2468 | needed in subsequent insns. Write REG_UNUSED notes | |
2469 | for those parts that were not needed. This case should | |
2470 | be rare. */ | |
2471 | ||
2472 | int i; | |
2473 | ||
2474 | for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1; | |
2475 | i >= 0; i--) | |
916b1701 | 2476 | if (!REGNO_REG_SET_P (needed, regno + i)) |
d7429b6a | 2477 | REG_NOTES (insn) |
38a448ca RH |
2478 | = gen_rtx_EXPR_LIST (REG_UNUSED, |
2479 | gen_rtx_REG (reg_raw_mode[regno + i], | |
2480 | regno + i), | |
2481 | REG_NOTES (insn)); | |
d7429b6a RK |
2482 | } |
2483 | } | |
2484 | } | |
8244fc4f RS |
2485 | else if (GET_CODE (reg) == REG) |
2486 | reg_next_use[regno] = 0; | |
d7429b6a RK |
2487 | |
2488 | /* If this is the last pass and this is a SCRATCH, show it will be dying | |
2489 | here and count it. */ | |
2490 | else if (GET_CODE (reg) == SCRATCH && insn != 0) | |
2491 | { | |
2492 | REG_NOTES (insn) | |
38a448ca | 2493 | = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); |
d7429b6a RK |
2494 | } |
2495 | } | |
2496 | \f | |
2497 | #ifdef AUTO_INC_DEC | |
2498 | ||
2499 | /* X is a MEM found in INSN. See if we can convert it into an auto-increment | |
2500 | reference. */ | |
2501 | ||
2502 | static void | |
2503 | find_auto_inc (needed, x, insn) | |
2504 | regset needed; | |
2505 | rtx x; | |
2506 | rtx insn; | |
2507 | { | |
2508 | rtx addr = XEXP (x, 0); | |
e658434c | 2509 | HOST_WIDE_INT offset = 0; |
05ed5d57 | 2510 | rtx set; |
d7429b6a RK |
2511 | |
2512 | /* Here we detect use of an index register which might be good for | |
2513 | postincrement, postdecrement, preincrement, or predecrement. */ | |
2514 | ||
2515 | if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
2516 | offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); | |
2517 | ||
2518 | if (GET_CODE (addr) == REG) | |
2519 | { | |
2520 | register rtx y; | |
2521 | register int size = GET_MODE_SIZE (GET_MODE (x)); | |
2522 | rtx use; | |
2523 | rtx incr; | |
2524 | int regno = REGNO (addr); | |
2525 | ||
2526 | /* Is the next use an increment that might make auto-increment? */ | |
05ed5d57 RK |
2527 | if ((incr = reg_next_use[regno]) != 0 |
2528 | && (set = single_set (incr)) != 0 | |
2529 | && GET_CODE (set) == SET | |
d7429b6a RK |
2530 | && BLOCK_NUM (incr) == BLOCK_NUM (insn) |
2531 | /* Can't add side effects to jumps; if reg is spilled and | |
2532 | reloaded, there's no way to store back the altered value. */ | |
2533 | && GET_CODE (insn) != JUMP_INSN | |
05ed5d57 | 2534 | && (y = SET_SRC (set), GET_CODE (y) == PLUS) |
d7429b6a RK |
2535 | && XEXP (y, 0) == addr |
2536 | && GET_CODE (XEXP (y, 1)) == CONST_INT | |
940da324 JL |
2537 | && ((HAVE_POST_INCREMENT |
2538 | && (INTVAL (XEXP (y, 1)) == size && offset == 0)) | |
2539 | || (HAVE_POST_DECREMENT | |
2540 | && (INTVAL (XEXP (y, 1)) == - size && offset == 0)) | |
2541 | || (HAVE_PRE_INCREMENT | |
2542 | && (INTVAL (XEXP (y, 1)) == size && offset == size)) | |
2543 | || (HAVE_PRE_DECREMENT | |
2544 | && (INTVAL (XEXP (y, 1)) == - size && offset == - size))) | |
d7429b6a RK |
2545 | /* Make sure this reg appears only once in this insn. */ |
2546 | && (use = find_use_as_address (PATTERN (insn), addr, offset), | |
2547 | use != 0 && use != (rtx) 1)) | |
2548 | { | |
05ed5d57 | 2549 | rtx q = SET_DEST (set); |
7280c2a4 RK |
2550 | enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size |
2551 | ? (offset ? PRE_INC : POST_INC) | |
2552 | : (offset ? PRE_DEC : POST_DEC)); | |
d7429b6a RK |
2553 | |
2554 | if (dead_or_set_p (incr, addr)) | |
7280c2a4 RK |
2555 | { |
2556 | /* This is the simple case. Try to make the auto-inc. If | |
2557 | we can't, we are done. Otherwise, we will do any | |
2558 | needed updates below. */ | |
2559 | if (! validate_change (insn, &XEXP (x, 0), | |
38a448ca | 2560 | gen_rtx_fmt_e (inc_code, Pmode, addr), |
7280c2a4 RK |
2561 | 0)) |
2562 | return; | |
2563 | } | |
5175ad37 DE |
2564 | else if (GET_CODE (q) == REG |
2565 | /* PREV_INSN used here to check the semi-open interval | |
2566 | [insn,incr). */ | |
b24884cd JL |
2567 | && ! reg_used_between_p (q, PREV_INSN (insn), incr) |
2568 | /* We must also check for sets of q as q may be | |
2569 | a call clobbered hard register and there may | |
2570 | be a call between PREV_INSN (insn) and incr. */ | |
2571 | && ! reg_set_between_p (q, PREV_INSN (insn), incr)) | |
d7429b6a | 2572 | { |
5175ad37 | 2573 | /* We have *p followed sometime later by q = p+size. |
d7429b6a | 2574 | Both p and q must be live afterward, |
9ec36da5 | 2575 | and q is not used between INSN and its assignment. |
d7429b6a RK |
2576 | Change it to q = p, ...*q..., q = q+size. |
2577 | Then fall into the usual case. */ | |
2578 | rtx insns, temp; | |
2579 | ||
2580 | start_sequence (); | |
2581 | emit_move_insn (q, addr); | |
2582 | insns = get_insns (); | |
2583 | end_sequence (); | |
2584 | ||
2585 | /* If anything in INSNS have UID's that don't fit within the | |
2586 | extra space we allocate earlier, we can't make this auto-inc. | |
2587 | This should never happen. */ | |
2588 | for (temp = insns; temp; temp = NEXT_INSN (temp)) | |
2589 | { | |
2590 | if (INSN_UID (temp) > max_uid_for_flow) | |
2591 | return; | |
2592 | BLOCK_NUM (temp) = BLOCK_NUM (insn); | |
2593 | } | |
2594 | ||
7280c2a4 RK |
2595 | /* If we can't make the auto-inc, or can't make the |
2596 | replacement into Y, exit. There's no point in making | |
2597 | the change below if we can't do the auto-inc and doing | |
2598 | so is not correct in the pre-inc case. */ | |
2599 | ||
2600 | validate_change (insn, &XEXP (x, 0), | |
38a448ca | 2601 | gen_rtx_fmt_e (inc_code, Pmode, q), |
7280c2a4 RK |
2602 | 1); |
2603 | validate_change (incr, &XEXP (y, 0), q, 1); | |
2604 | if (! apply_change_group ()) | |
2605 | return; | |
2606 | ||
2607 | /* We now know we'll be doing this change, so emit the | |
2608 | new insn(s) and do the updates. */ | |
d7429b6a | 2609 | emit_insns_before (insns, insn); |
e8b641a1 | 2610 | |
3b413743 RH |
2611 | if (BLOCK_HEAD (BLOCK_NUM (insn)) == insn) |
2612 | BLOCK_HEAD (BLOCK_NUM (insn)) = insns; | |
e8b641a1 | 2613 | |
d7429b6a RK |
2614 | /* INCR will become a NOTE and INSN won't contain a |
2615 | use of ADDR. If a use of ADDR was just placed in | |
2616 | the insn before INSN, make that the next use. | |
2617 | Otherwise, invalidate it. */ | |
2618 | if (GET_CODE (PREV_INSN (insn)) == INSN | |
2619 | && GET_CODE (PATTERN (PREV_INSN (insn))) == SET | |
2620 | && SET_SRC (PATTERN (PREV_INSN (insn))) == addr) | |
2621 | reg_next_use[regno] = PREV_INSN (insn); | |
2622 | else | |
2623 | reg_next_use[regno] = 0; | |
2624 | ||
2625 | addr = q; | |
2626 | regno = REGNO (q); | |
d7429b6a RK |
2627 | |
2628 | /* REGNO is now used in INCR which is below INSN, but | |
2629 | it previously wasn't live here. If we don't mark | |
2630 | it as needed, we'll put a REG_DEAD note for it | |
2631 | on this insn, which is incorrect. */ | |
916b1701 | 2632 | SET_REGNO_REG_SET (needed, regno); |
d7429b6a RK |
2633 | |
2634 | /* If there are any calls between INSN and INCR, show | |
2635 | that REGNO now crosses them. */ | |
2636 | for (temp = insn; temp != incr; temp = NEXT_INSN (temp)) | |
2637 | if (GET_CODE (temp) == CALL_INSN) | |
b1f21e0a | 2638 | REG_N_CALLS_CROSSED (regno)++; |
d7429b6a | 2639 | } |
02df8aba RK |
2640 | else |
2641 | return; | |
d7429b6a | 2642 | |
7280c2a4 RK |
2643 | /* If we haven't returned, it means we were able to make the |
2644 | auto-inc, so update the status. First, record that this insn | |
2645 | has an implicit side effect. */ | |
2646 | ||
2647 | REG_NOTES (insn) | |
38a448ca | 2648 | = gen_rtx_EXPR_LIST (REG_INC, addr, REG_NOTES (insn)); |
7280c2a4 RK |
2649 | |
2650 | /* Modify the old increment-insn to simply copy | |
2651 | the already-incremented value of our register. */ | |
2652 | if (! validate_change (incr, &SET_SRC (set), addr, 0)) | |
2653 | abort (); | |
2654 | ||
2655 | /* If that makes it a no-op (copying the register into itself) delete | |
2656 | it so it won't appear to be a "use" and a "set" of this | |
2657 | register. */ | |
2658 | if (SET_DEST (set) == addr) | |
d7429b6a | 2659 | { |
7280c2a4 RK |
2660 | PUT_CODE (incr, NOTE); |
2661 | NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED; | |
2662 | NOTE_SOURCE_FILE (incr) = 0; | |
2663 | } | |
d7429b6a | 2664 | |
7280c2a4 RK |
2665 | if (regno >= FIRST_PSEUDO_REGISTER) |
2666 | { | |
2667 | /* Count an extra reference to the reg. When a reg is | |
2668 | incremented, spilling it is worse, so we want to make | |
2669 | that less likely. */ | |
b1f21e0a | 2670 | REG_N_REFS (regno) += loop_depth; |
7280c2a4 RK |
2671 | |
2672 | /* Count the increment as a setting of the register, | |
2673 | even though it isn't a SET in rtl. */ | |
b1f21e0a | 2674 | REG_N_SETS (regno)++; |
d7429b6a RK |
2675 | } |
2676 | } | |
2677 | } | |
2678 | } | |
2679 | #endif /* AUTO_INC_DEC */ | |
2680 | \f | |
2681 | /* Scan expression X and store a 1-bit in LIVE for each reg it uses. | |
2682 | This is done assuming the registers needed from X | |
2683 | are those that have 1-bits in NEEDED. | |
2684 | ||
2685 | On the final pass, FINAL is 1. This means try for autoincrement | |
2686 | and count the uses and deaths of each pseudo-reg. | |
2687 | ||
2688 | INSN is the containing instruction. If INSN is dead, this function is not | |
2689 | called. */ | |
2690 | ||
2691 | static void | |
2692 | mark_used_regs (needed, live, x, final, insn) | |
2693 | regset needed; | |
2694 | regset live; | |
2695 | rtx x; | |
d7429b6a | 2696 | int final; |
e658434c | 2697 | rtx insn; |
d7429b6a RK |
2698 | { |
2699 | register RTX_CODE code; | |
2700 | register int regno; | |
2701 | int i; | |
2702 | ||
2703 | retry: | |
2704 | code = GET_CODE (x); | |
2705 | switch (code) | |
2706 | { | |
2707 | case LABEL_REF: | |
2708 | case SYMBOL_REF: | |
2709 | case CONST_INT: | |
2710 | case CONST: | |
2711 | case CONST_DOUBLE: | |
2712 | case PC: | |
d7429b6a RK |
2713 | case ADDR_VEC: |
2714 | case ADDR_DIFF_VEC: | |
2715 | case ASM_INPUT: | |
2716 | return; | |
2717 | ||
2718 | #ifdef HAVE_cc0 | |
2719 | case CC0: | |
2720 | cc0_live = 1; | |
2721 | return; | |
2722 | #endif | |
2723 | ||
2f1553a4 RK |
2724 | case CLOBBER: |
2725 | /* If we are clobbering a MEM, mark any registers inside the address | |
2726 | as being used. */ | |
2727 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
2728 | mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn); | |
2729 | return; | |
2730 | ||
d7429b6a | 2731 | case MEM: |
7eb136d6 MM |
2732 | /* Invalidate the data for the last MEM stored, but only if MEM is |
2733 | something that can be stored into. */ | |
2734 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
2735 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))) | |
db3a887b | 2736 | ; /* needn't clear the memory set list */ |
7eb136d6 | 2737 | else |
db3a887b CB |
2738 | { |
2739 | rtx temp = mem_set_list; | |
2740 | rtx prev = NULL_RTX; | |
2741 | ||
2742 | while (temp) | |
2743 | { | |
063cd522 | 2744 | if (anti_dependence (XEXP (temp, 0), x)) |
db3a887b CB |
2745 | { |
2746 | /* Splice temp out of the list. */ | |
2747 | if (prev) | |
2748 | XEXP (prev, 1) = XEXP (temp, 1); | |
2749 | else | |
2750 | mem_set_list = XEXP (temp, 1); | |
2751 | } | |
2752 | else | |
2753 | prev = temp; | |
2754 | temp = XEXP (temp, 1); | |
2755 | } | |
2756 | } | |
d7429b6a RK |
2757 | |
2758 | #ifdef AUTO_INC_DEC | |
2759 | if (final) | |
2760 | find_auto_inc (needed, x, insn); | |
2761 | #endif | |
2762 | break; | |
2763 | ||
80f8f04a RK |
2764 | case SUBREG: |
2765 | if (GET_CODE (SUBREG_REG (x)) == REG | |
2766 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER | |
2767 | && (GET_MODE_SIZE (GET_MODE (x)) | |
88285acf | 2768 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) |
b1f21e0a | 2769 | REG_CHANGES_SIZE (REGNO (SUBREG_REG (x))) = 1; |
80f8f04a RK |
2770 | |
2771 | /* While we're here, optimize this case. */ | |
2772 | x = SUBREG_REG (x); | |
2773 | ||
e100a3bb | 2774 | /* In case the SUBREG is not of a register, don't optimize */ |
ce79abf3 | 2775 | if (GET_CODE (x) != REG) |
e100a3bb MM |
2776 | { |
2777 | mark_used_regs (needed, live, x, final, insn); | |
2778 | return; | |
2779 | } | |
ce79abf3 | 2780 | |
0f41302f | 2781 | /* ... fall through ... */ |
80f8f04a | 2782 | |
d7429b6a RK |
2783 | case REG: |
2784 | /* See a register other than being set | |
2785 | => mark it as needed. */ | |
2786 | ||
2787 | regno = REGNO (x); | |
2788 | { | |
67f0e213 RK |
2789 | int some_needed = REGNO_REG_SET_P (needed, regno); |
2790 | int some_not_needed = ! some_needed; | |
d7429b6a | 2791 | |
916b1701 | 2792 | SET_REGNO_REG_SET (live, regno); |
cb9e8ad1 | 2793 | |
d7429b6a RK |
2794 | /* A hard reg in a wide mode may really be multiple registers. |
2795 | If so, mark all of them just like the first. */ | |
2796 | if (regno < FIRST_PSEUDO_REGISTER) | |
2797 | { | |
2798 | int n; | |
2799 | ||
d7e4fe8b | 2800 | /* For stack ptr or fixed arg pointer, |
d7429b6a RK |
2801 | nothing below can be necessary, so waste no more time. */ |
2802 | if (regno == STACK_POINTER_REGNUM | |
73a187c1 DE |
2803 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
2804 | || regno == HARD_FRAME_POINTER_REGNUM | |
2805 | #endif | |
d7e4fe8b RS |
2806 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2807 | || (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2808 | #endif | |
d7429b6a RK |
2809 | || regno == FRAME_POINTER_REGNUM) |
2810 | { | |
2811 | /* If this is a register we are going to try to eliminate, | |
2812 | don't mark it live here. If we are successful in | |
2813 | eliminating it, it need not be live unless it is used for | |
2814 | pseudos, in which case it will have been set live when | |
2815 | it was allocated to the pseudos. If the register will not | |
2816 | be eliminated, reload will set it live at that point. */ | |
2817 | ||
2818 | if (! TEST_HARD_REG_BIT (elim_reg_set, regno)) | |
2819 | regs_ever_live[regno] = 1; | |
2820 | return; | |
2821 | } | |
2822 | /* No death notes for global register variables; | |
2823 | their values are live after this function exits. */ | |
2824 | if (global_regs[regno]) | |
d8c8b8e3 RS |
2825 | { |
2826 | if (final) | |
2827 | reg_next_use[regno] = insn; | |
2828 | return; | |
2829 | } | |
d7429b6a RK |
2830 | |
2831 | n = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
2832 | while (--n > 0) | |
2833 | { | |
916b1701 MM |
2834 | int regno_n = regno + n; |
2835 | int needed_regno = REGNO_REG_SET_P (needed, regno_n); | |
cb9e8ad1 | 2836 | |
916b1701 MM |
2837 | SET_REGNO_REG_SET (live, regno_n); |
2838 | some_needed |= needed_regno; | |
931c6c7a | 2839 | some_not_needed |= ! needed_regno; |
d7429b6a RK |
2840 | } |
2841 | } | |
2842 | if (final) | |
2843 | { | |
2844 | /* Record where each reg is used, so when the reg | |
2845 | is set we know the next insn that uses it. */ | |
2846 | ||
2847 | reg_next_use[regno] = insn; | |
2848 | ||
2849 | if (regno < FIRST_PSEUDO_REGISTER) | |
2850 | { | |
2851 | /* If a hard reg is being used, | |
2852 | record that this function does use it. */ | |
2853 | ||
2854 | i = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
2855 | if (i == 0) | |
2856 | i = 1; | |
2857 | do | |
2858 | regs_ever_live[regno + --i] = 1; | |
2859 | while (i > 0); | |
2860 | } | |
2861 | else | |
2862 | { | |
2863 | /* Keep track of which basic block each reg appears in. */ | |
2864 | ||
2865 | register int blocknum = BLOCK_NUM (insn); | |
2866 | ||
b1f21e0a MM |
2867 | if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN) |
2868 | REG_BASIC_BLOCK (regno) = blocknum; | |
2869 | else if (REG_BASIC_BLOCK (regno) != blocknum) | |
2870 | REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL; | |
d7429b6a RK |
2871 | |
2872 | /* Count (weighted) number of uses of each reg. */ | |
2873 | ||
b1f21e0a | 2874 | REG_N_REFS (regno) += loop_depth; |
d7429b6a RK |
2875 | } |
2876 | ||
2877 | /* Record and count the insns in which a reg dies. | |
2878 | If it is used in this insn and was dead below the insn | |
2879 | then it dies in this insn. If it was set in this insn, | |
2880 | we do not make a REG_DEAD note; likewise if we already | |
2881 | made such a note. */ | |
2882 | ||
cb9e8ad1 | 2883 | if (some_not_needed |
d7429b6a RK |
2884 | && ! dead_or_set_p (insn, x) |
2885 | #if 0 | |
2886 | && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
2887 | #endif | |
2888 | ) | |
2889 | { | |
ab28041e JW |
2890 | /* Check for the case where the register dying partially |
2891 | overlaps the register set by this insn. */ | |
2892 | if (regno < FIRST_PSEUDO_REGISTER | |
2893 | && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1) | |
2894 | { | |
480eac3b | 2895 | int n = HARD_REGNO_NREGS (regno, GET_MODE (x)); |
ab28041e JW |
2896 | while (--n >= 0) |
2897 | some_needed |= dead_or_set_regno_p (insn, regno + n); | |
2898 | } | |
2899 | ||
d7429b6a RK |
2900 | /* If none of the words in X is needed, make a REG_DEAD |
2901 | note. Otherwise, we must make partial REG_DEAD notes. */ | |
2902 | if (! some_needed) | |
2903 | { | |
2904 | REG_NOTES (insn) | |
38a448ca | 2905 | = gen_rtx_EXPR_LIST (REG_DEAD, x, REG_NOTES (insn)); |
b1f21e0a | 2906 | REG_N_DEATHS (regno)++; |
d7429b6a RK |
2907 | } |
2908 | else | |
2909 | { | |
2910 | int i; | |
2911 | ||
2912 | /* Don't make a REG_DEAD note for a part of a register | |
2913 | that is set in the insn. */ | |
2914 | ||
2915 | for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1; | |
2916 | i >= 0; i--) | |
916b1701 | 2917 | if (!REGNO_REG_SET_P (needed, regno + i) |
d7429b6a RK |
2918 | && ! dead_or_set_regno_p (insn, regno + i)) |
2919 | REG_NOTES (insn) | |
38a448ca RH |
2920 | = gen_rtx_EXPR_LIST (REG_DEAD, |
2921 | gen_rtx_REG (reg_raw_mode[regno + i], | |
2922 | regno + i), | |
2923 | REG_NOTES (insn)); | |
d7429b6a RK |
2924 | } |
2925 | } | |
2926 | } | |
2927 | } | |
2928 | return; | |
2929 | ||
2930 | case SET: | |
2931 | { | |
2932 | register rtx testreg = SET_DEST (x); | |
2933 | int mark_dest = 0; | |
2934 | ||
2935 | /* If storing into MEM, don't show it as being used. But do | |
2936 | show the address as being used. */ | |
2937 | if (GET_CODE (testreg) == MEM) | |
2938 | { | |
2939 | #ifdef AUTO_INC_DEC | |
2940 | if (final) | |
2941 | find_auto_inc (needed, testreg, insn); | |
2942 | #endif | |
2943 | mark_used_regs (needed, live, XEXP (testreg, 0), final, insn); | |
2944 | mark_used_regs (needed, live, SET_SRC (x), final, insn); | |
2945 | return; | |
2946 | } | |
2947 | ||
2948 | /* Storing in STRICT_LOW_PART is like storing in a reg | |
2949 | in that this SET might be dead, so ignore it in TESTREG. | |
2950 | but in some other ways it is like using the reg. | |
2951 | ||
2952 | Storing in a SUBREG or a bit field is like storing the entire | |
2953 | register in that if the register's value is not used | |
2954 | then this SET is not needed. */ | |
2955 | while (GET_CODE (testreg) == STRICT_LOW_PART | |
2956 | || GET_CODE (testreg) == ZERO_EXTRACT | |
2957 | || GET_CODE (testreg) == SIGN_EXTRACT | |
2958 | || GET_CODE (testreg) == SUBREG) | |
2959 | { | |
88285acf RK |
2960 | if (GET_CODE (testreg) == SUBREG |
2961 | && GET_CODE (SUBREG_REG (testreg)) == REG | |
2962 | && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER | |
2963 | && (GET_MODE_SIZE (GET_MODE (testreg)) | |
2964 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg))))) | |
b1f21e0a | 2965 | REG_CHANGES_SIZE (REGNO (SUBREG_REG (testreg))) = 1; |
88285acf | 2966 | |
d7429b6a RK |
2967 | /* Modifying a single register in an alternate mode |
2968 | does not use any of the old value. But these other | |
2969 | ways of storing in a register do use the old value. */ | |
2970 | if (GET_CODE (testreg) == SUBREG | |
2971 | && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg))) | |
2972 | ; | |
2973 | else | |
2974 | mark_dest = 1; | |
2975 | ||
2976 | testreg = XEXP (testreg, 0); | |
2977 | } | |
2978 | ||
2979 | /* If this is a store into a register, | |
2980 | recursively scan the value being stored. */ | |
2981 | ||
86465af7 DM |
2982 | if ((GET_CODE (testreg) == PARALLEL |
2983 | && GET_MODE (testreg) == BLKmode) | |
2984 | || (GET_CODE (testreg) == REG | |
2985 | && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM) | |
73a187c1 | 2986 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
86465af7 | 2987 | && regno != HARD_FRAME_POINTER_REGNUM |
73a187c1 | 2988 | #endif |
d7e4fe8b | 2989 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
86465af7 | 2990 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) |
d7e4fe8b | 2991 | #endif |
86465af7 | 2992 | )) |
d8c8b8e3 RS |
2993 | /* We used to exclude global_regs here, but that seems wrong. |
2994 | Storing in them is like storing in mem. */ | |
d7429b6a RK |
2995 | { |
2996 | mark_used_regs (needed, live, SET_SRC (x), final, insn); | |
2997 | if (mark_dest) | |
2998 | mark_used_regs (needed, live, SET_DEST (x), final, insn); | |
2999 | return; | |
3000 | } | |
3001 | } | |
3002 | break; | |
3003 | ||
3004 | case RETURN: | |
3005 | /* If exiting needs the right stack value, consider this insn as | |
3006 | using the stack pointer. In any event, consider it as using | |
632c9d9e | 3007 | all global registers and all registers used by return. */ |
d7429b6a RK |
3008 | |
3009 | #ifdef EXIT_IGNORE_STACK | |
3010 | if (! EXIT_IGNORE_STACK | |
0200b5ed JL |
3011 | || (! FRAME_POINTER_REQUIRED |
3012 | && ! current_function_calls_alloca | |
bfc5000a JL |
3013 | && flag_omit_frame_pointer) |
3014 | || current_function_sp_is_unchanging) | |
d7429b6a | 3015 | #endif |
916b1701 | 3016 | SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM); |
d7429b6a RK |
3017 | |
3018 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
632c9d9e MS |
3019 | if (global_regs[i] |
3020 | #ifdef EPILOGUE_USES | |
3021 | || EPILOGUE_USES (i) | |
3022 | #endif | |
3023 | ) | |
916b1701 | 3024 | SET_REGNO_REG_SET (live, i); |
d7429b6a | 3025 | break; |
e9a25f70 JL |
3026 | |
3027 | default: | |
3028 | break; | |
d7429b6a RK |
3029 | } |
3030 | ||
3031 | /* Recursively scan the operands of this expression. */ | |
3032 | ||
3033 | { | |
3034 | register char *fmt = GET_RTX_FORMAT (code); | |
3035 | register int i; | |
3036 | ||
3037 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3038 | { | |
3039 | if (fmt[i] == 'e') | |
3040 | { | |
3041 | /* Tail recursive case: save a function call level. */ | |
3042 | if (i == 0) | |
3043 | { | |
3044 | x = XEXP (x, 0); | |
3045 | goto retry; | |
3046 | } | |
3047 | mark_used_regs (needed, live, XEXP (x, i), final, insn); | |
3048 | } | |
3049 | else if (fmt[i] == 'E') | |
3050 | { | |
3051 | register int j; | |
3052 | for (j = 0; j < XVECLEN (x, i); j++) | |
3053 | mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn); | |
3054 | } | |
3055 | } | |
3056 | } | |
3057 | } | |
3058 | \f | |
3059 | #ifdef AUTO_INC_DEC | |
3060 | ||
3061 | static int | |
3062 | try_pre_increment_1 (insn) | |
3063 | rtx insn; | |
3064 | { | |
3065 | /* Find the next use of this reg. If in same basic block, | |
3066 | make it do pre-increment or pre-decrement if appropriate. */ | |
956d6950 | 3067 | rtx x = single_set (insn); |
5f4f0e22 | 3068 | HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1) |
d7429b6a RK |
3069 | * INTVAL (XEXP (SET_SRC (x), 1))); |
3070 | int regno = REGNO (SET_DEST (x)); | |
3071 | rtx y = reg_next_use[regno]; | |
3072 | if (y != 0 | |
3073 | && BLOCK_NUM (y) == BLOCK_NUM (insn) | |
89861c38 | 3074 | /* Don't do this if the reg dies, or gets set in y; a standard addressing |
0f41302f | 3075 | mode would be better. */ |
89861c38 | 3076 | && ! dead_or_set_p (y, SET_DEST (x)) |
956d6950 | 3077 | && try_pre_increment (y, SET_DEST (x), amount)) |
d7429b6a RK |
3078 | { |
3079 | /* We have found a suitable auto-increment | |
3080 | and already changed insn Y to do it. | |
3081 | So flush this increment-instruction. */ | |
3082 | PUT_CODE (insn, NOTE); | |
3083 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
3084 | NOTE_SOURCE_FILE (insn) = 0; | |
3085 | /* Count a reference to this reg for the increment | |
3086 | insn we are deleting. When a reg is incremented. | |
3087 | spilling it is worse, so we want to make that | |
3088 | less likely. */ | |
3089 | if (regno >= FIRST_PSEUDO_REGISTER) | |
3090 | { | |
b1f21e0a MM |
3091 | REG_N_REFS (regno) += loop_depth; |
3092 | REG_N_SETS (regno)++; | |
d7429b6a RK |
3093 | } |
3094 | return 1; | |
3095 | } | |
3096 | return 0; | |
3097 | } | |
3098 | ||
3099 | /* Try to change INSN so that it does pre-increment or pre-decrement | |
3100 | addressing on register REG in order to add AMOUNT to REG. | |
3101 | AMOUNT is negative for pre-decrement. | |
3102 | Returns 1 if the change could be made. | |
3103 | This checks all about the validity of the result of modifying INSN. */ | |
3104 | ||
3105 | static int | |
3106 | try_pre_increment (insn, reg, amount) | |
3107 | rtx insn, reg; | |
5f4f0e22 | 3108 | HOST_WIDE_INT amount; |
d7429b6a RK |
3109 | { |
3110 | register rtx use; | |
3111 | ||
3112 | /* Nonzero if we can try to make a pre-increment or pre-decrement. | |
3113 | For example, addl $4,r1; movl (r1),... can become movl +(r1),... */ | |
3114 | int pre_ok = 0; | |
3115 | /* Nonzero if we can try to make a post-increment or post-decrement. | |
3116 | For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,... | |
3117 | It is possible for both PRE_OK and POST_OK to be nonzero if the machine | |
3118 | supports both pre-inc and post-inc, or both pre-dec and post-dec. */ | |
3119 | int post_ok = 0; | |
3120 | ||
3121 | /* Nonzero if the opportunity actually requires post-inc or post-dec. */ | |
3122 | int do_post = 0; | |
3123 | ||
3124 | /* From the sign of increment, see which possibilities are conceivable | |
3125 | on this target machine. */ | |
940da324 | 3126 | if (HAVE_PRE_INCREMENT && amount > 0) |
d7429b6a | 3127 | pre_ok = 1; |
940da324 | 3128 | if (HAVE_POST_INCREMENT && amount > 0) |
d7429b6a | 3129 | post_ok = 1; |
d7429b6a | 3130 | |
940da324 | 3131 | if (HAVE_PRE_DECREMENT && amount < 0) |
d7429b6a | 3132 | pre_ok = 1; |
940da324 | 3133 | if (HAVE_POST_DECREMENT && amount < 0) |
d7429b6a | 3134 | post_ok = 1; |
d7429b6a RK |
3135 | |
3136 | if (! (pre_ok || post_ok)) | |
3137 | return 0; | |
3138 | ||
3139 | /* It is not safe to add a side effect to a jump insn | |
3140 | because if the incremented register is spilled and must be reloaded | |
3141 | there would be no way to store the incremented value back in memory. */ | |
3142 | ||
3143 | if (GET_CODE (insn) == JUMP_INSN) | |
3144 | return 0; | |
3145 | ||
3146 | use = 0; | |
3147 | if (pre_ok) | |
3148 | use = find_use_as_address (PATTERN (insn), reg, 0); | |
3149 | if (post_ok && (use == 0 || use == (rtx) 1)) | |
3150 | { | |
3151 | use = find_use_as_address (PATTERN (insn), reg, -amount); | |
3152 | do_post = 1; | |
3153 | } | |
3154 | ||
3155 | if (use == 0 || use == (rtx) 1) | |
3156 | return 0; | |
3157 | ||
3158 | if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount)) | |
3159 | return 0; | |
3160 | ||
a0fbc3a9 SC |
3161 | /* See if this combination of instruction and addressing mode exists. */ |
3162 | if (! validate_change (insn, &XEXP (use, 0), | |
38a448ca RH |
3163 | gen_rtx_fmt_e (amount > 0 |
3164 | ? (do_post ? POST_INC : PRE_INC) | |
3165 | : (do_post ? POST_DEC : PRE_DEC), | |
3166 | Pmode, reg), 0)) | |
a0fbc3a9 | 3167 | return 0; |
d7429b6a RK |
3168 | |
3169 | /* Record that this insn now has an implicit side effect on X. */ | |
38a448ca | 3170 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg, REG_NOTES (insn)); |
d7429b6a RK |
3171 | return 1; |
3172 | } | |
3173 | ||
3174 | #endif /* AUTO_INC_DEC */ | |
3175 | \f | |
3176 | /* Find the place in the rtx X where REG is used as a memory address. | |
3177 | Return the MEM rtx that so uses it. | |
3178 | If PLUSCONST is nonzero, search instead for a memory address equivalent to | |
3179 | (plus REG (const_int PLUSCONST)). | |
3180 | ||
3181 | If such an address does not appear, return 0. | |
3182 | If REG appears more than once, or is used other than in such an address, | |
3183 | return (rtx)1. */ | |
3184 | ||
8c660648 | 3185 | rtx |
d7429b6a RK |
3186 | find_use_as_address (x, reg, plusconst) |
3187 | register rtx x; | |
3188 | rtx reg; | |
e658434c | 3189 | HOST_WIDE_INT plusconst; |
d7429b6a RK |
3190 | { |
3191 | enum rtx_code code = GET_CODE (x); | |
3192 | char *fmt = GET_RTX_FORMAT (code); | |
3193 | register int i; | |
3194 | register rtx value = 0; | |
3195 | register rtx tem; | |
3196 | ||
3197 | if (code == MEM && XEXP (x, 0) == reg && plusconst == 0) | |
3198 | return x; | |
3199 | ||
3200 | if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS | |
3201 | && XEXP (XEXP (x, 0), 0) == reg | |
3202 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
3203 | && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) | |
3204 | return x; | |
3205 | ||
3206 | if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) | |
3207 | { | |
3208 | /* If REG occurs inside a MEM used in a bit-field reference, | |
3209 | that is unacceptable. */ | |
3210 | if (find_use_as_address (XEXP (x, 0), reg, 0) != 0) | |
6fa5c106 | 3211 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
3212 | } |
3213 | ||
3214 | if (x == reg) | |
6fa5c106 | 3215 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
3216 | |
3217 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3218 | { | |
3219 | if (fmt[i] == 'e') | |
3220 | { | |
3221 | tem = find_use_as_address (XEXP (x, i), reg, plusconst); | |
3222 | if (value == 0) | |
3223 | value = tem; | |
3224 | else if (tem != 0) | |
6fa5c106 | 3225 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
3226 | } |
3227 | if (fmt[i] == 'E') | |
3228 | { | |
3229 | register int j; | |
3230 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
3231 | { | |
3232 | tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst); | |
3233 | if (value == 0) | |
3234 | value = tem; | |
3235 | else if (tem != 0) | |
6fa5c106 | 3236 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
3237 | } |
3238 | } | |
3239 | } | |
3240 | ||
3241 | return value; | |
3242 | } | |
3243 | \f | |
3244 | /* Write information about registers and basic blocks into FILE. | |
3245 | This is part of making a debugging dump. */ | |
3246 | ||
3247 | void | |
3248 | dump_flow_info (file) | |
3249 | FILE *file; | |
3250 | { | |
3251 | register int i; | |
3252 | static char *reg_class_names[] = REG_CLASS_NAMES; | |
3253 | ||
3254 | fprintf (file, "%d registers.\n", max_regno); | |
3255 | ||
3256 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
b1f21e0a | 3257 | if (REG_N_REFS (i)) |
d7429b6a | 3258 | { |
e4600702 | 3259 | enum reg_class class, altclass; |
d7429b6a | 3260 | fprintf (file, "\nRegister %d used %d times across %d insns", |
b1f21e0a MM |
3261 | i, REG_N_REFS (i), REG_LIVE_LENGTH (i)); |
3262 | if (REG_BASIC_BLOCK (i) >= 0) | |
3263 | fprintf (file, " in block %d", REG_BASIC_BLOCK (i)); | |
6fc4610b MM |
3264 | if (REG_N_SETS (i)) |
3265 | fprintf (file, "; set %d time%s", REG_N_SETS (i), | |
3266 | (REG_N_SETS (i) == 1) ? "" : "s"); | |
3267 | if (REG_USERVAR_P (regno_reg_rtx[i])) | |
3268 | fprintf (file, "; user var"); | |
b1f21e0a MM |
3269 | if (REG_N_DEATHS (i) != 1) |
3270 | fprintf (file, "; dies in %d places", REG_N_DEATHS (i)); | |
3271 | if (REG_N_CALLS_CROSSED (i) == 1) | |
d7429b6a | 3272 | fprintf (file, "; crosses 1 call"); |
b1f21e0a MM |
3273 | else if (REG_N_CALLS_CROSSED (i)) |
3274 | fprintf (file, "; crosses %d calls", REG_N_CALLS_CROSSED (i)); | |
d7429b6a RK |
3275 | if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD) |
3276 | fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i)); | |
3277 | class = reg_preferred_class (i); | |
e4600702 RK |
3278 | altclass = reg_alternate_class (i); |
3279 | if (class != GENERAL_REGS || altclass != ALL_REGS) | |
d7429b6a | 3280 | { |
e4600702 RK |
3281 | if (altclass == ALL_REGS || class == ALL_REGS) |
3282 | fprintf (file, "; pref %s", reg_class_names[(int) class]); | |
3283 | else if (altclass == NO_REGS) | |
d7429b6a RK |
3284 | fprintf (file, "; %s or none", reg_class_names[(int) class]); |
3285 | else | |
e4600702 RK |
3286 | fprintf (file, "; pref %s, else %s", |
3287 | reg_class_names[(int) class], | |
3288 | reg_class_names[(int) altclass]); | |
d7429b6a RK |
3289 | } |
3290 | if (REGNO_POINTER_FLAG (i)) | |
3291 | fprintf (file, "; pointer"); | |
3292 | fprintf (file, ".\n"); | |
3293 | } | |
3294 | fprintf (file, "\n%d basic blocks.\n", n_basic_blocks); | |
421382ac | 3295 | dump_bb_data (file, basic_block_pred, basic_block_succ, 1); |
d7429b6a | 3296 | } |
3e28fe44 MM |
3297 | |
3298 | \f | |
3299 | /* Like print_rtl, but also print out live information for the start of each | |
3300 | basic block. */ | |
3301 | ||
3302 | void | |
3303 | print_rtl_with_bb (outf, rtx_first) | |
3304 | FILE *outf; | |
3305 | rtx rtx_first; | |
3306 | { | |
3307 | register rtx tmp_rtx; | |
3308 | ||
3309 | if (rtx_first == 0) | |
3310 | fprintf (outf, "(nil)\n"); | |
3311 | ||
3312 | else | |
3313 | { | |
3314 | int i, bb; | |
3315 | enum bb_state { NOT_IN_BB, IN_ONE_BB, IN_MULTIPLE_BB }; | |
3316 | int max_uid = get_max_uid (); | |
adfc539e PDM |
3317 | int *start = (int *) alloca (max_uid * sizeof (int)); |
3318 | int *end = (int *) alloca (max_uid * sizeof (int)); | |
2a92c071 GS |
3319 | enum bb_state *in_bb_p = (enum bb_state *) |
3320 | alloca (max_uid * sizeof (enum bb_state)); | |
3e28fe44 MM |
3321 | |
3322 | for (i = 0; i < max_uid; i++) | |
3323 | { | |
3324 | start[i] = end[i] = -1; | |
3325 | in_bb_p[i] = NOT_IN_BB; | |
3326 | } | |
3327 | ||
3328 | for (i = n_basic_blocks-1; i >= 0; i--) | |
3329 | { | |
3330 | rtx x; | |
3b413743 RH |
3331 | start[INSN_UID (BLOCK_HEAD (i))] = i; |
3332 | end[INSN_UID (BLOCK_END (i))] = i; | |
3333 | for (x = BLOCK_HEAD (i); x != NULL_RTX; x = NEXT_INSN (x)) | |
3e28fe44 | 3334 | { |
1791f8e2 MM |
3335 | in_bb_p[ INSN_UID(x)] |
3336 | = (in_bb_p[ INSN_UID(x)] == NOT_IN_BB) | |
3b33f637 | 3337 | ? IN_ONE_BB : IN_MULTIPLE_BB; |
3b413743 | 3338 | if (x == BLOCK_END (i)) |
3e28fe44 MM |
3339 | break; |
3340 | } | |
3341 | } | |
3342 | ||
3343 | for (tmp_rtx = rtx_first; NULL != tmp_rtx; tmp_rtx = NEXT_INSN (tmp_rtx)) | |
3344 | { | |
b707b450 R |
3345 | int did_output; |
3346 | ||
3e28fe44 MM |
3347 | if ((bb = start[INSN_UID (tmp_rtx)]) >= 0) |
3348 | { | |
3349 | fprintf (outf, ";; Start of basic block %d, registers live:", | |
3350 | bb); | |
3351 | ||
3352 | EXECUTE_IF_SET_IN_REG_SET (basic_block_live_at_start[bb], 0, i, | |
3353 | { | |
3354 | fprintf (outf, " %d", i); | |
3355 | if (i < FIRST_PSEUDO_REGISTER) | |
3356 | fprintf (outf, " [%s]", | |
3357 | reg_names[i]); | |
3358 | }); | |
3359 | putc ('\n', outf); | |
3360 | } | |
3361 | ||
3362 | if (in_bb_p[ INSN_UID(tmp_rtx)] == NOT_IN_BB | |
3363 | && GET_CODE (tmp_rtx) != NOTE | |
3364 | && GET_CODE (tmp_rtx) != BARRIER) | |
3365 | fprintf (outf, ";; Insn is not within a basic block\n"); | |
3366 | else if (in_bb_p[ INSN_UID(tmp_rtx)] == IN_MULTIPLE_BB) | |
3367 | fprintf (outf, ";; Insn is in multiple basic blocks\n"); | |
3368 | ||
b707b450 | 3369 | did_output = print_rtl_single (outf, tmp_rtx); |
3e28fe44 MM |
3370 | |
3371 | if ((bb = end[INSN_UID (tmp_rtx)]) >= 0) | |
3372 | fprintf (outf, ";; End of basic block %d\n", bb); | |
3373 | ||
b707b450 | 3374 | if (did_output) |
9ec36da5 | 3375 | putc ('\n', outf); |
3e28fe44 MM |
3376 | } |
3377 | } | |
3378 | } | |
5ece9746 JL |
3379 | |
3380 | \f | |
3381 | /* Integer list support. */ | |
3382 | ||
3383 | /* Allocate a node from list *HEAD_PTR. */ | |
3384 | ||
3385 | static int_list_ptr | |
3386 | alloc_int_list_node (head_ptr) | |
3387 | int_list_block **head_ptr; | |
3388 | { | |
3389 | struct int_list_block *first_blk = *head_ptr; | |
3390 | ||
3391 | if (first_blk == NULL || first_blk->nodes_left <= 0) | |
3392 | { | |
3393 | first_blk = (struct int_list_block *) xmalloc (sizeof (struct int_list_block)); | |
3394 | first_blk->nodes_left = INT_LIST_NODES_IN_BLK; | |
3395 | first_blk->next = *head_ptr; | |
3396 | *head_ptr = first_blk; | |
3397 | } | |
3398 | ||
3399 | first_blk->nodes_left--; | |
3400 | return &first_blk->nodes[first_blk->nodes_left]; | |
3401 | } | |
3402 | ||
3403 | /* Pointer to head of predecessor/successor block list. */ | |
3404 | static int_list_block *pred_int_list_blocks; | |
3405 | ||
3406 | /* Add a new node to integer list LIST with value VAL. | |
3407 | LIST is a pointer to a list object to allow for different implementations. | |
3408 | If *LIST is initially NULL, the list is empty. | |
3409 | The caller must not care whether the element is added to the front or | |
3410 | to the end of the list (to allow for different implementations). */ | |
3411 | ||
3412 | static int_list_ptr | |
3413 | add_int_list_node (blk_list, list, val) | |
3414 | int_list_block **blk_list; | |
3415 | int_list **list; | |
3416 | int val; | |
3417 | { | |
3418 | int_list_ptr p = alloc_int_list_node (blk_list); | |
3419 | ||
3420 | p->val = val; | |
3421 | p->next = *list; | |
3422 | *list = p; | |
3423 | return p; | |
3424 | } | |
3425 | ||
3426 | /* Free the blocks of lists at BLK_LIST. */ | |
3427 | ||
3428 | void | |
3429 | free_int_list (blk_list) | |
3430 | int_list_block **blk_list; | |
3431 | { | |
3432 | int_list_block *p, *next; | |
3433 | ||
3434 | for (p = *blk_list; p != NULL; p = next) | |
3435 | { | |
3436 | next = p->next; | |
3437 | free (p); | |
3438 | } | |
3439 | ||
3440 | /* Mark list as empty for the next function we compile. */ | |
3441 | *blk_list = NULL; | |
3442 | } | |
3443 | \f | |
3444 | /* Predecessor/successor computation. */ | |
3445 | ||
3446 | /* Mark PRED_BB a precessor of SUCC_BB, | |
3447 | and conversely SUCC_BB a successor of PRED_BB. */ | |
3448 | ||
3449 | static void | |
3450 | add_pred_succ (pred_bb, succ_bb, s_preds, s_succs, num_preds, num_succs) | |
3451 | int pred_bb; | |
3452 | int succ_bb; | |
3453 | int_list_ptr *s_preds; | |
3454 | int_list_ptr *s_succs; | |
3455 | int *num_preds; | |
3456 | int *num_succs; | |
3457 | { | |
3458 | if (succ_bb != EXIT_BLOCK) | |
3459 | { | |
3460 | add_int_list_node (&pred_int_list_blocks, &s_preds[succ_bb], pred_bb); | |
3461 | num_preds[succ_bb]++; | |
3462 | } | |
3463 | if (pred_bb != ENTRY_BLOCK) | |
3464 | { | |
3465 | add_int_list_node (&pred_int_list_blocks, &s_succs[pred_bb], succ_bb); | |
3466 | num_succs[pred_bb]++; | |
3467 | } | |
3468 | } | |
3469 | ||
3470 | /* Compute the predecessors and successors for each block. */ | |
743bb12d | 3471 | void |
5ece9746 JL |
3472 | compute_preds_succs (s_preds, s_succs, num_preds, num_succs) |
3473 | int_list_ptr *s_preds; | |
3474 | int_list_ptr *s_succs; | |
3475 | int *num_preds; | |
3476 | int *num_succs; | |
3477 | { | |
421382ac | 3478 | int bb; |
5ece9746 JL |
3479 | |
3480 | bzero ((char *) s_preds, n_basic_blocks * sizeof (int_list_ptr)); | |
3481 | bzero ((char *) s_succs, n_basic_blocks * sizeof (int_list_ptr)); | |
3482 | bzero ((char *) num_preds, n_basic_blocks * sizeof (int)); | |
3483 | bzero ((char *) num_succs, n_basic_blocks * sizeof (int)); | |
3484 | ||
421382ac BS |
3485 | /* It's somewhat stupid to simply copy the information. The passes |
3486 | which use this function ought to be changed to refer directly to | |
3487 | basic_block_succ and its relatives. */ | |
5ece9746 JL |
3488 | for (bb = 0; bb < n_basic_blocks; bb++) |
3489 | { | |
421382ac BS |
3490 | rtx jump = BLOCK_END (bb); |
3491 | enum rtx_code code = GET_CODE (jump); | |
3492 | int_list_ptr p; | |
5ece9746 | 3493 | |
421382ac BS |
3494 | for (p = basic_block_succ[bb]; p; p = p->next) |
3495 | add_pred_succ (bb, INT_LIST_VAL (p), s_preds, s_succs, num_preds, | |
3496 | num_succs); | |
5ece9746 | 3497 | |
5ece9746 JL |
3498 | /* If this is a RETURN insn or a conditional jump in the last |
3499 | basic block, or a non-jump insn in the last basic block, then | |
3500 | this block reaches the exit block. */ | |
421382ac BS |
3501 | if ((code == JUMP_INSN && GET_CODE (PATTERN (jump)) == RETURN) |
3502 | || (((code == JUMP_INSN | |
5ece9746 | 3503 | && condjump_p (jump) && !simplejump_p (jump)) |
421382ac BS |
3504 | || code != JUMP_INSN) |
3505 | && bb == n_basic_blocks - 1)) | |
5ece9746 | 3506 | add_pred_succ (bb, EXIT_BLOCK, s_preds, s_succs, num_preds, num_succs); |
5ece9746 JL |
3507 | } |
3508 | ||
3509 | add_pred_succ (ENTRY_BLOCK, 0, s_preds, s_succs, num_preds, num_succs); | |
5ece9746 JL |
3510 | } |
3511 | ||
3512 | void | |
421382ac | 3513 | dump_bb_data (file, preds, succs, live_info) |
5ece9746 JL |
3514 | FILE *file; |
3515 | int_list_ptr *preds; | |
3516 | int_list_ptr *succs; | |
421382ac | 3517 | int live_info; |
5ece9746 JL |
3518 | { |
3519 | int bb; | |
3520 | int_list_ptr p; | |
3521 | ||
3522 | fprintf (file, "BB data\n\n"); | |
3523 | for (bb = 0; bb < n_basic_blocks; bb++) | |
3524 | { | |
3525 | fprintf (file, "BB %d, start %d, end %d\n", bb, | |
3526 | INSN_UID (BLOCK_HEAD (bb)), INSN_UID (BLOCK_END (bb))); | |
3527 | fprintf (file, " preds:"); | |
3528 | for (p = preds[bb]; p != NULL; p = p->next) | |
3529 | { | |
3530 | int pred_bb = INT_LIST_VAL (p); | |
3531 | if (pred_bb == ENTRY_BLOCK) | |
3532 | fprintf (file, " entry"); | |
3533 | else | |
3534 | fprintf (file, " %d", pred_bb); | |
3535 | } | |
3536 | fprintf (file, "\n"); | |
3537 | fprintf (file, " succs:"); | |
3538 | for (p = succs[bb]; p != NULL; p = p->next) | |
3539 | { | |
3540 | int succ_bb = INT_LIST_VAL (p); | |
3541 | if (succ_bb == EXIT_BLOCK) | |
3542 | fprintf (file, " exit"); | |
3543 | else | |
3544 | fprintf (file, " %d", succ_bb); | |
3545 | } | |
421382ac BS |
3546 | if (live_info) |
3547 | { | |
3548 | int regno; | |
3549 | fprintf (file, "\nRegisters live at start:"); | |
3550 | for (regno = 0; regno < max_regno; regno++) | |
3551 | if (REGNO_REG_SET_P (basic_block_live_at_start[bb], regno)) | |
3552 | fprintf (file, " %d", regno); | |
3553 | fprintf (file, "\n"); | |
3554 | } | |
5ece9746 JL |
3555 | fprintf (file, "\n"); |
3556 | } | |
3557 | fprintf (file, "\n"); | |
3558 | } | |
3559 | ||
3560 | /* Free basic block data storage. */ | |
3561 | ||
3562 | void | |
3563 | free_bb_mem () | |
3564 | { | |
3565 | free_int_list (&pred_int_list_blocks); | |
3566 | } | |
5e89e58b | 3567 | |
5ece9746 JL |
3568 | /* Compute dominator relationships. */ |
3569 | void | |
3570 | compute_dominators (dominators, post_dominators, s_preds, s_succs) | |
3571 | sbitmap *dominators; | |
3572 | sbitmap *post_dominators; | |
3573 | int_list_ptr *s_preds; | |
3574 | int_list_ptr *s_succs; | |
3575 | { | |
3576 | int bb, changed, passes; | |
3577 | sbitmap *temp_bitmap; | |
3578 | ||
3579 | temp_bitmap = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks); | |
3580 | sbitmap_vector_ones (dominators, n_basic_blocks); | |
3581 | sbitmap_vector_ones (post_dominators, n_basic_blocks); | |
3582 | sbitmap_vector_zero (temp_bitmap, n_basic_blocks); | |
3583 | ||
3584 | sbitmap_zero (dominators[0]); | |
3585 | SET_BIT (dominators[0], 0); | |
3586 | ||
3587 | sbitmap_zero (post_dominators[n_basic_blocks-1]); | |
3588 | SET_BIT (post_dominators[n_basic_blocks-1], 0); | |
3589 | ||
3590 | passes = 0; | |
3591 | changed = 1; | |
3592 | while (changed) | |
3593 | { | |
3594 | changed = 0; | |
3595 | for (bb = 1; bb < n_basic_blocks; bb++) | |
3596 | { | |
3597 | sbitmap_intersect_of_predecessors (temp_bitmap[bb], dominators, | |
3598 | bb, s_preds); | |
3599 | SET_BIT (temp_bitmap[bb], bb); | |
3600 | changed |= sbitmap_a_and_b (dominators[bb], | |
3601 | dominators[bb], | |
3602 | temp_bitmap[bb]); | |
3603 | sbitmap_intersect_of_successors (temp_bitmap[bb], post_dominators, | |
3604 | bb, s_succs); | |
3605 | SET_BIT (temp_bitmap[bb], bb); | |
3606 | changed |= sbitmap_a_and_b (post_dominators[bb], | |
3607 | post_dominators[bb], | |
3608 | temp_bitmap[bb]); | |
3609 | } | |
3610 | passes++; | |
3611 | } | |
3612 | ||
3613 | free (temp_bitmap); | |
3614 | } | |
4c649323 JL |
3615 | |
3616 | /* Count for a single SET rtx, X. */ | |
3617 | ||
3618 | static void | |
3619 | count_reg_sets_1 (x) | |
3620 | rtx x; | |
3621 | { | |
3622 | register int regno; | |
3623 | register rtx reg = SET_DEST (x); | |
3624 | ||
3625 | /* Find the register that's set/clobbered. */ | |
3626 | while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT | |
3627 | || GET_CODE (reg) == SIGN_EXTRACT | |
3628 | || GET_CODE (reg) == STRICT_LOW_PART) | |
3629 | reg = XEXP (reg, 0); | |
3630 | ||
86465af7 DM |
3631 | if (GET_CODE (reg) == PARALLEL |
3632 | && GET_MODE (reg) == BLKmode) | |
3633 | { | |
3634 | register int i; | |
3635 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) | |
3636 | count_reg_sets_1 (XVECEXP (reg, 0, i)); | |
3637 | return; | |
3638 | } | |
3639 | ||
4c649323 JL |
3640 | if (GET_CODE (reg) == REG) |
3641 | { | |
3642 | regno = REGNO (reg); | |
3643 | if (regno >= FIRST_PSEUDO_REGISTER) | |
3644 | { | |
3645 | /* Count (weighted) references, stores, etc. This counts a | |
3646 | register twice if it is modified, but that is correct. */ | |
3647 | REG_N_SETS (regno)++; | |
3648 | ||
3649 | REG_N_REFS (regno) += loop_depth; | |
3650 | } | |
3651 | } | |
3652 | } | |
3653 | ||
3654 | /* Increment REG_N_SETS for each SET or CLOBBER found in X; also increment | |
3655 | REG_N_REFS by the current loop depth for each SET or CLOBBER found. */ | |
3656 | ||
3657 | static void | |
3658 | count_reg_sets (x) | |
3659 | rtx x; | |
3660 | { | |
3661 | register RTX_CODE code = GET_CODE (x); | |
3662 | ||
3663 | if (code == SET || code == CLOBBER) | |
3664 | count_reg_sets_1 (x); | |
3665 | else if (code == PARALLEL) | |
3666 | { | |
3667 | register int i; | |
3668 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
3669 | { | |
3670 | code = GET_CODE (XVECEXP (x, 0, i)); | |
3671 | if (code == SET || code == CLOBBER) | |
3672 | count_reg_sets_1 (XVECEXP (x, 0, i)); | |
3673 | } | |
3674 | } | |
3675 | } | |
3676 | ||
3677 | /* Increment REG_N_REFS by the current loop depth each register reference | |
3678 | found in X. */ | |
3679 | ||
3680 | static void | |
3681 | count_reg_references (x) | |
3682 | rtx x; | |
3683 | { | |
3684 | register RTX_CODE code; | |
4c649323 JL |
3685 | |
3686 | retry: | |
3687 | code = GET_CODE (x); | |
3688 | switch (code) | |
3689 | { | |
3690 | case LABEL_REF: | |
3691 | case SYMBOL_REF: | |
3692 | case CONST_INT: | |
3693 | case CONST: | |
3694 | case CONST_DOUBLE: | |
3695 | case PC: | |
3696 | case ADDR_VEC: | |
3697 | case ADDR_DIFF_VEC: | |
3698 | case ASM_INPUT: | |
3699 | return; | |
3700 | ||
3701 | #ifdef HAVE_cc0 | |
3702 | case CC0: | |
3703 | return; | |
3704 | #endif | |
3705 | ||
3706 | case CLOBBER: | |
3707 | /* If we are clobbering a MEM, mark any registers inside the address | |
3708 | as being used. */ | |
3709 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
3710 | count_reg_references (XEXP (XEXP (x, 0), 0)); | |
3711 | return; | |
3712 | ||
3713 | case SUBREG: | |
3714 | /* While we're here, optimize this case. */ | |
3715 | x = SUBREG_REG (x); | |
3716 | ||
3717 | /* In case the SUBREG is not of a register, don't optimize */ | |
3718 | if (GET_CODE (x) != REG) | |
3719 | { | |
3720 | count_reg_references (x); | |
3721 | return; | |
3722 | } | |
3723 | ||
3724 | /* ... fall through ... */ | |
3725 | ||
3726 | case REG: | |
3727 | if (REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
3728 | REG_N_REFS (REGNO (x)) += loop_depth; | |
3729 | return; | |
3730 | ||
3731 | case SET: | |
3732 | { | |
3733 | register rtx testreg = SET_DEST (x); | |
3734 | int mark_dest = 0; | |
3735 | ||
3736 | /* If storing into MEM, don't show it as being used. But do | |
3737 | show the address as being used. */ | |
3738 | if (GET_CODE (testreg) == MEM) | |
3739 | { | |
3740 | count_reg_references (XEXP (testreg, 0)); | |
3741 | count_reg_references (SET_SRC (x)); | |
3742 | return; | |
3743 | } | |
3744 | ||
3745 | /* Storing in STRICT_LOW_PART is like storing in a reg | |
3746 | in that this SET might be dead, so ignore it in TESTREG. | |
3747 | but in some other ways it is like using the reg. | |
3748 | ||
3749 | Storing in a SUBREG or a bit field is like storing the entire | |
3750 | register in that if the register's value is not used | |
3751 | then this SET is not needed. */ | |
3752 | while (GET_CODE (testreg) == STRICT_LOW_PART | |
3753 | || GET_CODE (testreg) == ZERO_EXTRACT | |
3754 | || GET_CODE (testreg) == SIGN_EXTRACT | |
3755 | || GET_CODE (testreg) == SUBREG) | |
3756 | { | |
3757 | /* Modifying a single register in an alternate mode | |
3758 | does not use any of the old value. But these other | |
3759 | ways of storing in a register do use the old value. */ | |
3760 | if (GET_CODE (testreg) == SUBREG | |
3761 | && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg))) | |
3762 | ; | |
3763 | else | |
3764 | mark_dest = 1; | |
3765 | ||
3766 | testreg = XEXP (testreg, 0); | |
3767 | } | |
3768 | ||
3769 | /* If this is a store into a register, | |
3770 | recursively scan the value being stored. */ | |
3771 | ||
86465af7 DM |
3772 | if ((GET_CODE (testreg) == PARALLEL |
3773 | && GET_MODE (testreg) == BLKmode) | |
3774 | || GET_CODE (testreg) == REG) | |
4c649323 JL |
3775 | { |
3776 | count_reg_references (SET_SRC (x)); | |
3777 | if (mark_dest) | |
3778 | count_reg_references (SET_DEST (x)); | |
3779 | return; | |
3780 | } | |
3781 | } | |
3782 | break; | |
3783 | ||
3784 | default: | |
3785 | break; | |
3786 | } | |
3787 | ||
3788 | /* Recursively scan the operands of this expression. */ | |
3789 | ||
3790 | { | |
3791 | register char *fmt = GET_RTX_FORMAT (code); | |
3792 | register int i; | |
3793 | ||
3794 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3795 | { | |
3796 | if (fmt[i] == 'e') | |
3797 | { | |
3798 | /* Tail recursive case: save a function call level. */ | |
3799 | if (i == 0) | |
3800 | { | |
3801 | x = XEXP (x, 0); | |
3802 | goto retry; | |
3803 | } | |
3804 | count_reg_references (XEXP (x, i)); | |
3805 | } | |
3806 | else if (fmt[i] == 'E') | |
3807 | { | |
3808 | register int j; | |
3809 | for (j = 0; j < XVECLEN (x, i); j++) | |
3810 | count_reg_references (XVECEXP (x, i, j)); | |
3811 | } | |
3812 | } | |
3813 | } | |
3814 | } | |
3815 | ||
3816 | /* Recompute register set/reference counts immediately prior to register | |
3817 | allocation. | |
3818 | ||
3819 | This avoids problems with set/reference counts changing to/from values | |
3820 | which have special meanings to the register allocators. | |
3821 | ||
3822 | Additionally, the reference counts are the primary component used by the | |
3823 | register allocators to prioritize pseudos for allocation to hard regs. | |
3824 | More accurate reference counts generally lead to better register allocation. | |
3825 | ||
213c4983 R |
3826 | F is the first insn to be scanned. |
3827 | LOOP_STEP denotes how much loop_depth should be incremented per | |
3828 | loop nesting level in order to increase the ref count more for references | |
3829 | in a loop. | |
3830 | ||
4c649323 JL |
3831 | It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and |
3832 | possibly other information which is used by the register allocators. */ | |
3833 | ||
762a1d90 | 3834 | void |
213c4983 | 3835 | recompute_reg_usage (f, loop_step) |
4c649323 | 3836 | rtx f; |
213c4983 | 3837 | int loop_step; |
4c649323 JL |
3838 | { |
3839 | rtx insn; | |
3840 | int i, max_reg; | |
3841 | ||
3842 | /* Clear out the old data. */ | |
3843 | max_reg = max_reg_num (); | |
3844 | for (i = FIRST_PSEUDO_REGISTER; i < max_reg; i++) | |
3845 | { | |
3846 | REG_N_SETS (i) = 0; | |
3847 | REG_N_REFS (i) = 0; | |
3848 | } | |
3849 | ||
3850 | /* Scan each insn in the chain and count how many times each register is | |
3851 | set/used. */ | |
3852 | loop_depth = 1; | |
3853 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
3854 | { | |
3855 | /* Keep track of loop depth. */ | |
3856 | if (GET_CODE (insn) == NOTE) | |
3857 | { | |
3858 | /* Look for loop boundaries. */ | |
3859 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
213c4983 | 3860 | loop_depth -= loop_step; |
4c649323 | 3861 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) |
213c4983 | 3862 | loop_depth += loop_step; |
4c649323 JL |
3863 | |
3864 | /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. | |
3865 | Abort now rather than setting register status incorrectly. */ | |
3866 | if (loop_depth == 0) | |
3867 | abort (); | |
3868 | } | |
3869 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
3870 | { | |
3871 | rtx links; | |
3872 | ||
3873 | /* This call will increment REG_N_SETS for each SET or CLOBBER | |
3874 | of a register in INSN. It will also increment REG_N_REFS | |
3875 | by the loop depth for each set of a register in INSN. */ | |
3876 | count_reg_sets (PATTERN (insn)); | |
3877 | ||
3878 | /* count_reg_sets does not detect autoincrement address modes, so | |
3879 | detect them here by looking at the notes attached to INSN. */ | |
3880 | for (links = REG_NOTES (insn); links; links = XEXP (links, 1)) | |
3881 | { | |
3882 | if (REG_NOTE_KIND (links) == REG_INC) | |
3883 | /* Count (weighted) references, stores, etc. This counts a | |
3884 | register twice if it is modified, but that is correct. */ | |
3885 | REG_N_SETS (REGNO (XEXP (links, 0)))++; | |
3886 | } | |
3887 | ||
3888 | /* This call will increment REG_N_REFS by the current loop depth for | |
3889 | each reference to a register in INSN. */ | |
3890 | count_reg_references (PATTERN (insn)); | |
3891 | ||
3892 | /* count_reg_references will not include counts for arguments to | |
3893 | function calls, so detect them here by examining the | |
3894 | CALL_INSN_FUNCTION_USAGE data. */ | |
3895 | if (GET_CODE (insn) == CALL_INSN) | |
3896 | { | |
3897 | rtx note; | |
3898 | ||
3899 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
3900 | note; | |
3901 | note = XEXP (note, 1)) | |
3902 | if (GET_CODE (XEXP (note, 0)) == USE) | |
3903 | count_reg_references (SET_DEST (XEXP (note, 0))); | |
3904 | } | |
3905 | } | |
3906 | } | |
3907 | } |