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d7429b6a 1/* Data flow analysis for GNU compiler.
081f5e7e 2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
d7429b6a
RK
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
a35311b0
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
d7429b6a
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20
21
22/* This file contains the data flow analysis pass of the compiler.
23 It computes data flow information
24 which tells combine_instructions which insns to consider combining
25 and controls register allocation.
26
27 Additional data flow information that is too bulky to record
28 is generated during the analysis, and is used at that time to
29 create autoincrement and autodecrement addressing.
30
31 The first step is dividing the function into basic blocks.
32 find_basic_blocks does this. Then life_analysis determines
33 where each register is live and where it is dead.
34
35 ** find_basic_blocks **
36
37 find_basic_blocks divides the current function's rtl
38 into basic blocks. It records the beginnings and ends of the
39 basic blocks in the vectors basic_block_head and basic_block_end,
40 and the number of blocks in n_basic_blocks.
41
42 find_basic_blocks also finds any unreachable loops
43 and deletes them.
44
45 ** life_analysis **
46
47 life_analysis is called immediately after find_basic_blocks.
48 It uses the basic block information to determine where each
49 hard or pseudo register is live.
50
51 ** live-register info **
52
53 The information about where each register is live is in two parts:
54 the REG_NOTES of insns, and the vector basic_block_live_at_start.
55
56 basic_block_live_at_start has an element for each basic block,
57 and the element is a bit-vector with a bit for each hard or pseudo
58 register. The bit is 1 if the register is live at the beginning
59 of the basic block.
60
61 Two types of elements can be added to an insn's REG_NOTES.
62 A REG_DEAD note is added to an insn's REG_NOTES for any register
63 that meets both of two conditions: The value in the register is not
64 needed in subsequent insns and the insn does not replace the value in
65 the register (in the case of multi-word hard registers, the value in
66 each register must be replaced by the insn to avoid a REG_DEAD note).
67
68 In the vast majority of cases, an object in a REG_DEAD note will be
69 used somewhere in the insn. The (rare) exception to this is if an
70 insn uses a multi-word hard register and only some of the registers are
71 needed in subsequent insns. In that case, REG_DEAD notes will be
72 provided for those hard registers that are not subsequently needed.
73 Partial REG_DEAD notes of this type do not occur when an insn sets
74 only some of the hard registers used in such a multi-word operand;
75 omitting REG_DEAD notes for objects stored in an insn is optional and
76 the desire to do so does not justify the complexity of the partial
77 REG_DEAD notes.
78
79 REG_UNUSED notes are added for each register that is set by the insn
80 but is unused subsequently (if every register set by the insn is unused
81 and the insn does not reference memory or have some other side-effect,
82 the insn is deleted instead). If only part of a multi-word hard
83 register is used in a subsequent insn, REG_UNUSED notes are made for
84 the parts that will not be used.
85
86 To determine which registers are live after any insn, one can
87 start from the beginning of the basic block and scan insns, noting
88 which registers are set by each insn and which die there.
89
90 ** Other actions of life_analysis **
91
92 life_analysis sets up the LOG_LINKS fields of insns because the
93 information needed to do so is readily available.
94
95 life_analysis deletes insns whose only effect is to store a value
96 that is never used.
97
98 life_analysis notices cases where a reference to a register as
99 a memory address can be combined with a preceding or following
100 incrementation or decrementation of the register. The separate
101 instruction to increment or decrement is deleted and the address
102 is changed to a POST_INC or similar rtx.
103
104 Each time an incrementing or decrementing address is created,
105 a REG_INC element is added to the insn's REG_NOTES list.
106
107 life_analysis fills in certain vectors containing information about
108 register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length,
fdb8a883
JW
109 reg_n_calls_crosses and reg_basic_block.
110
111 life_analysis sets current_function_sp_is_unchanging if the function
112 doesn't modify the stack pointer. */
d7429b6a 113\f
d7429b6a 114#include "config.h"
670ee920 115#include "system.h"
d7429b6a
RK
116#include "rtl.h"
117#include "basic-block.h"
118#include "insn-config.h"
119#include "regs.h"
120#include "hard-reg-set.h"
121#include "flags.h"
122#include "output.h"
3d195391 123#include "except.h"
2e107e9e 124#include "toplev.h"
79c9824e 125#include "recog.h"
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126
127#include "obstack.h"
128#define obstack_chunk_alloc xmalloc
129#define obstack_chunk_free free
130
421382ac
BS
131#define XNMALLOC(TYPE, COUNT) ((TYPE *) xmalloc ((COUNT) * sizeof (TYPE)))
132
7eb136d6
MM
133/* The contents of the current function definition are allocated
134 in this obstack, and all are freed at the end of the function.
135 For top-level functions, this is temporary_obstack.
136 Separate obstacks are made for nested functions. */
137
138extern struct obstack *function_obstack;
139
d7429b6a
RK
140/* List of labels that must never be deleted. */
141extern rtx forced_labels;
142
143/* Get the basic block number of an insn.
144 This info should not be expected to remain available
145 after the end of life_analysis. */
146
147/* This is the limit of the allocated space in the following two arrays. */
148
149static int max_uid_for_flow;
150
151#define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)]
152
153/* This is where the BLOCK_NUM values are really stored.
154 This is set up by find_basic_blocks and used there and in life_analysis,
155 and then freed. */
156
5ece9746 157int *uid_block_number;
d7429b6a
RK
158
159/* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
160
161#define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)]
162static char *uid_volatile;
163
56744d1a
JL
164/* Nonzero if the second flow pass has completed. */
165int flow2_completed;
166
d7429b6a
RK
167/* Number of basic blocks in the current function. */
168
169int n_basic_blocks;
170
171/* Maximum register number used in this function, plus one. */
172
173int max_regno;
174
b1f21e0a 175/* Indexed by n, giving various register information */
d7429b6a 176
6feacd09 177varray_type reg_n_info;
d7429b6a 178
a494747c
MM
179/* Size of the reg_n_info table. */
180
181unsigned int reg_n_max;
182
d7429b6a
RK
183/* Element N is the next insn that uses (hard or pseudo) register number N
184 within the current basic block; or zero, if there is no such insn.
185 This is valid only during the final backward scan in propagate_block. */
186
187static rtx *reg_next_use;
188
189/* Size of a regset for the current function,
190 in (1) bytes and (2) elements. */
191
192int regset_bytes;
193int regset_size;
194
195/* Element N is first insn in basic block N.
196 This info lasts until we finish compiling the function. */
197
198rtx *basic_block_head;
199
200/* Element N is last insn in basic block N.
201 This info lasts until we finish compiling the function. */
202
203rtx *basic_block_end;
204
4d1d8045
BS
205/* Element N indicates whether basic block N can be reached through a
206 computed jump. */
207
208char *basic_block_computed_jump_target;
209
d7429b6a
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210/* Element N is a regset describing the registers live
211 at the start of basic block N.
212 This info lasts until we finish compiling the function. */
213
214regset *basic_block_live_at_start;
215
216/* Regset of regs live when calls to `setjmp'-like functions happen. */
217
218regset regs_live_at_setjmp;
219
220/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
221 that have to go in the same hard reg.
222 The first two regs in the list are a pair, and the next two
223 are another pair, etc. */
224rtx regs_may_share;
225
421382ac
BS
226/* Pointer to head of predecessor/successor block list. */
227static int_list_block *flow_int_list_blocks;
228
229/* Element N is the list of successors of basic block N. */
230static int_list_ptr *basic_block_succ;
d7429b6a 231
421382ac
BS
232/* Element N is the list of predecessors of basic block N. */
233static int_list_ptr *basic_block_pred;
d7429b6a
RK
234
235/* Element N is depth within loops of the last insn in basic block number N.
236 Freed after life_analysis. */
237
238static short *basic_block_loop_depth;
239
d7429b6a
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240/* Depth within loops of basic block being scanned for lifetime analysis,
241 plus one. This is the weight attached to references to registers. */
242
243static int loop_depth;
244
245/* During propagate_block, this is non-zero if the value of CC0 is live. */
246
247static int cc0_live;
248
249/* During propagate_block, this contains the last MEM stored into. It
250 is used to eliminate consecutive stores to the same location. */
251
252static rtx last_mem_set;
253
254/* Set of registers that may be eliminable. These are handled specially
255 in updating regs_ever_live. */
256
257static HARD_REG_SET elim_reg_set;
258
259/* Forward declarations */
4a7bd8e2 260static void find_basic_blocks_1 PROTO((rtx, rtx));
421382ac
BS
261static void add_edge PROTO((int, int));
262static void add_edge_to_label PROTO((int, rtx));
dc2ede84 263static void make_edges PROTO((int));
421382ac
BS
264static void mark_label_ref PROTO((int, rtx));
265static void delete_unreachable_blocks PROTO((void));
dc2ede84 266static int delete_block PROTO((int));
5ece9746 267static void life_analysis_1 PROTO((rtx, int));
e658434c
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268static void propagate_block PROTO((regset, rtx, rtx, int,
269 regset, int));
dc2ede84
BS
270static int set_noop_p PROTO((rtx));
271static int noop_move_p PROTO((rtx));
272static void record_volatile_insns PROTO((rtx));
273static void mark_regs_live_at_end PROTO((regset));
e398aa80 274static int insn_dead_p PROTO((rtx, regset, int, rtx));
e658434c
RK
275static int libcall_dead_p PROTO((rtx, regset, rtx, rtx));
276static void mark_set_regs PROTO((regset, regset, rtx,
277 rtx, regset));
278static void mark_set_1 PROTO((regset, regset, rtx,
279 rtx, regset));
1d300e19 280#ifdef AUTO_INC_DEC
e658434c 281static void find_auto_inc PROTO((regset, rtx, rtx));
e658434c
RK
282static int try_pre_increment_1 PROTO((rtx));
283static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT));
1d300e19
KG
284#endif
285static void mark_used_regs PROTO((regset, regset, rtx, int, rtx));
e658434c 286void dump_flow_info PROTO((FILE *));
5ece9746
JL
287static void add_pred_succ PROTO ((int, int, int_list_ptr *,
288 int_list_ptr *, int *, int *));
289static int_list_ptr alloc_int_list_node PROTO ((int_list_block **));
290static int_list_ptr add_int_list_node PROTO ((int_list_block **,
291 int_list **, int));
04821e98
JL
292static void init_regset_vector PROTO ((regset *, int,
293 struct obstack *));
4c649323
JL
294static void count_reg_sets_1 PROTO ((rtx));
295static void count_reg_sets PROTO ((rtx));
296static void count_reg_references PROTO ((rtx));
fdb8a883 297static void notice_stack_pointer_modification PROTO ((rtx, rtx));
d7429b6a 298\f
5ece9746 299/* Find basic blocks of the current function.
d7429b6a 300 F is the first insn of the function and NREGS the number of register numbers
5ece9746
JL
301 in use.
302 LIVE_REACHABLE_P is non-zero if the caller needs all live blocks to
303 be reachable. This turns on a kludge that causes the control flow
304 information to be inaccurate and not suitable for passes like GCSE. */
d7429b6a
RK
305
306void
9265dacf 307find_basic_blocks (f, nregs, file)
d7429b6a
RK
308 rtx f;
309 int nregs;
310 FILE *file;
311{
312 register rtx insn;
313 register int i;
d7e4fe8b 314 rtx nonlocal_label_list = nonlocal_label_rtx_list ();
2c3a56ad 315 int in_libcall_block = 0;
d7429b6a 316
421382ac
BS
317 /* Avoid leaking memory if this is called multiple times per compiled
318 function. */
319 free_bb_memory ();
320
d7429b6a
RK
321 /* Count the basic blocks. Also find maximum insn uid value used. */
322
323 {
27249135 324 rtx prev_call = 0;
d7429b6a
RK
325 register RTX_CODE prev_code = JUMP_INSN;
326 register RTX_CODE code;
74d7ab55 327 int eh_region = 0;
c2b7e122 328 int call_had_abnormal_edge = 0;
d7429b6a 329
d7429b6a
RK
330 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
331 {
2c3a56ad
JL
332 /* Track when we are inside in LIBCALL block. */
333 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
334 && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
335 in_libcall_block = 1;
336
d7429b6a 337 code = GET_CODE (insn);
27249135
BS
338
339 /* A basic block starts at label, or after something that can jump. */
340 if (code == CODE_LABEL
341 || (GET_RTX_CLASS (code) == 'i'
342 && (prev_code == JUMP_INSN
343 || (prev_code == CALL_INSN && call_had_abnormal_edge)
344 || prev_code == BARRIER)))
5c35539b 345 {
27249135
BS
346 i++;
347
348 /* If the previous insn was a call that did not create an
349 abnormal edge, we want to add a nop so that the CALL_INSN
350 itself is not at basic_block_end. This allows us to easily
351 distinguish between normal calls and those which create
352 abnormal edges in the flow graph. */
353
354 if (i > 0 && !call_had_abnormal_edge && prev_call != 0)
5c35539b 355 {
27249135
BS
356 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
357 emit_insn_after (nop, prev_call);
5c35539b
RH
358 }
359 }
d06c6389
JW
360 /* We change the code of the CALL_INSN, so that it won't start a
361 new block. */
362 if (code == CALL_INSN && in_libcall_block)
8cfe18d6
RK
363 code = INSN;
364
27249135
BS
365 /* Record whether this call created an edge. */
366 if (code == CALL_INSN)
367 {
368 prev_call = insn;
369 call_had_abnormal_edge = (nonlocal_label_list != 0 || eh_region);
370 }
371 else if (code != NOTE && code != BARRIER)
372 prev_call = 0;
c2b7e122 373
6b67ec08 374 if (code != NOTE)
d7429b6a 375 prev_code = code;
74d7ab55
JM
376 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG)
377 ++eh_region;
378 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
379 --eh_region;
2c3a56ad
JL
380
381 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
382 && find_reg_note (insn, REG_RETVAL, NULL_RTX))
383 in_libcall_block = 0;
d7429b6a
RK
384 }
385 }
386
5ece9746
JL
387 n_basic_blocks = i;
388
27249135 389 max_uid_for_flow = get_max_uid ();
d7429b6a 390#ifdef AUTO_INC_DEC
5ece9746
JL
391 /* Leave space for insns life_analysis makes in some cases for auto-inc.
392 These cases are rare, so we don't need too much space. */
d7429b6a
RK
393 max_uid_for_flow += max_uid_for_flow / 10;
394#endif
395
396 /* Allocate some tables that last till end of compiling this function
397 and some needed only in find_basic_blocks and life_analysis. */
398
421382ac
BS
399 basic_block_head = XNMALLOC (rtx, n_basic_blocks);
400 basic_block_end = XNMALLOC (rtx, n_basic_blocks);
401 basic_block_succ = XNMALLOC (int_list_ptr, n_basic_blocks);
402 basic_block_pred = XNMALLOC (int_list_ptr, n_basic_blocks);
403 bzero ((char *)basic_block_succ, n_basic_blocks * sizeof (int_list_ptr));
404 bzero ((char *)basic_block_pred, n_basic_blocks * sizeof (int_list_ptr));
405
4d1d8045 406 basic_block_computed_jump_target = (char *) oballoc (n_basic_blocks);
421382ac
BS
407 basic_block_loop_depth = XNMALLOC (short, n_basic_blocks);
408 uid_block_number = XNMALLOC (int, (max_uid_for_flow + 1));
409 uid_volatile = XNMALLOC (char, (max_uid_for_flow + 1));
d7429b6a
RK
410 bzero (uid_volatile, max_uid_for_flow + 1);
411
9265dacf 412 find_basic_blocks_1 (f, nonlocal_label_list);
d7429b6a 413}
5ece9746 414
dc2ede84
BS
415/* For communication between find_basic_blocks_1 and its subroutines. */
416
417/* An array of CODE_LABELs, indexed by UID for the start of the active
418 EH handler for each insn in F. */
419static int *active_eh_region;
420static int *nested_eh_region;
421
422/* Element N nonzero if basic block N can actually be reached. */
423
424static char *block_live_static;
425
426/* List of label_refs to all labels whose addresses are taken
427 and used as data. */
428static rtx label_value_list;
429
430/* a list of non-local labels in the function. */
431static rtx nonlocal_label_list;
432
d7429b6a
RK
433/* Find all basic blocks of the function whose first insn is F.
434 Store the correct data in the tables that describe the basic blocks,
435 set up the chains of references for each CODE_LABEL, and
d7e4fe8b
RS
436 delete any entire basic blocks that cannot be reached.
437
dc2ede84 438 NONLOCAL_LABELS is a list of non-local labels in the function.
5ece9746
JL
439 Blocks that are otherwise unreachable may be reachable with a non-local
440 goto.
441 LIVE_REACHABLE_P is non-zero if the caller needs all live blocks to
442 be reachable. This turns on a kludge that causes the control flow
443 information to be inaccurate and not suitable for passes like GCSE. */
d7429b6a
RK
444
445static void
9265dacf 446find_basic_blocks_1 (f, nonlocal_labels)
dc2ede84 447 rtx f, nonlocal_labels;
d7429b6a
RK
448{
449 register rtx insn;
450 register int i;
451 register char *block_live = (char *) alloca (n_basic_blocks);
452 register char *block_marked = (char *) alloca (n_basic_blocks);
dc2ede84 453 rtx note, eh_note;
e658434c 454 enum rtx_code prev_code, code;
421382ac 455 int depth;
2c3a56ad 456 int in_libcall_block = 0;
5c35539b 457 int call_had_abnormal_edge = 0;
d7429b6a 458
9a0d1e1b
AM
459 active_eh_region = (int *) alloca ((max_uid_for_flow + 1) * sizeof (int));
460 nested_eh_region = (int *) alloca ((max_label_num () + 1) * sizeof (int));
dc2ede84 461 nonlocal_label_list = nonlocal_labels;
8329b5ec
DE
462
463 label_value_list = 0;
d7429b6a
RK
464 block_live_static = block_live;
465 bzero (block_live, n_basic_blocks);
466 bzero (block_marked, n_basic_blocks);
4d1d8045 467 bzero (basic_block_computed_jump_target, n_basic_blocks);
9a0d1e1b
AM
468 bzero ((char *) active_eh_region, (max_uid_for_flow + 1) * sizeof (int));
469 bzero ((char *) nested_eh_region, (max_label_num () + 1) * sizeof (int));
4d1d8045 470 current_function_has_computed_jump = 0;
d7429b6a
RK
471
472 /* Initialize with just block 0 reachable and no blocks marked. */
473 if (n_basic_blocks > 0)
474 block_live[0] = 1;
475
e658434c
RK
476 /* Initialize the ref chain of each label to 0. Record where all the
477 blocks start and end and their depth in loops. For each insn, record
478 the block it is in. Also mark as reachable any blocks headed by labels
479 that must not be deleted. */
d7429b6a 480
2ec1535d 481 for (eh_note = NULL_RTX, insn = f, i = -1, prev_code = JUMP_INSN, depth = 1;
e658434c
RK
482 insn; insn = NEXT_INSN (insn))
483 {
2c3a56ad
JL
484
485 /* Track when we are inside in LIBCALL block. */
486 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
487 && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
488 in_libcall_block = 1;
489
e658434c
RK
490 code = GET_CODE (insn);
491 if (code == NOTE)
492 {
493 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
494 depth++;
495 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
496 depth--;
497 }
d7429b6a 498
e658434c
RK
499 /* A basic block starts at label, or after something that can jump. */
500 else if (code == CODE_LABEL
501 || (GET_RTX_CLASS (code) == 'i'
502 && (prev_code == JUMP_INSN
5c35539b 503 || (prev_code == CALL_INSN && call_had_abnormal_edge)
e658434c
RK
504 || prev_code == BARRIER)))
505 {
506 basic_block_head[++i] = insn;
507 basic_block_end[i] = insn;
508 basic_block_loop_depth[i] = depth;
509
510 if (code == CODE_LABEL)
511 {
5c35539b
RH
512 LABEL_REFS (insn) = insn;
513 /* Any label that cannot be deleted
514 is considered to start a reachable block. */
515 if (LABEL_PRESERVE_P (insn))
516 block_live[i] = 1;
517 }
e658434c 518 }
d7429b6a 519
e658434c
RK
520 else if (GET_RTX_CLASS (code) == 'i')
521 {
522 basic_block_end[i] = insn;
523 basic_block_loop_depth[i] = depth;
42fa3cfb 524 }
e658434c 525
42fa3cfb
JW
526 if (GET_RTX_CLASS (code) == 'i')
527 {
e658434c
RK
528 /* Make a list of all labels referred to other than by jumps. */
529 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
c708eef9 530 if (REG_NOTE_KIND (note) == REG_LABEL
71038426 531 && XEXP (note, 0) != eh_return_stub_label)
38a448ca
RH
532 label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
533 label_value_list);
42fa3cfb 534 }
d7429b6a 535
9a0d1e1b 536 /* Keep a lifo list of the currently active exception notes. */
2ec1535d
JL
537 if (GET_CODE (insn) == NOTE)
538 {
539 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG)
540 {
9a0d1e1b
AM
541 if (eh_note)
542 nested_eh_region [NOTE_BLOCK_NUMBER (insn)] =
543 NOTE_BLOCK_NUMBER (XEXP (eh_note, 0));
544 else
545 nested_eh_region [NOTE_BLOCK_NUMBER (insn)] = 0;
546 eh_note = gen_rtx_EXPR_LIST (VOIDmode,
547 insn, eh_note);
2ec1535d
JL
548 }
549 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
550 eh_note = XEXP (eh_note, 1);
551 }
552 /* If we encounter a CALL_INSN, note which exception handler it
553 might pass control to.
554
555 If doing asynchronous exceptions, record the active EH handler
556 for every insn, since most insns can throw. */
557 else if (eh_note
558 && (asynchronous_exceptions
559 || (GET_CODE (insn) == CALL_INSN
2c3a56ad 560 && ! in_libcall_block)))
dc2ede84 561 active_eh_region[INSN_UID (insn)] =
9a0d1e1b 562 NOTE_BLOCK_NUMBER (XEXP (eh_note, 0));
e658434c 563 BLOCK_NUM (insn) = i;
d7e4fe8b 564
d06c6389
JW
565 /* We change the code of the CALL_INSN, so that it won't start a
566 new block. */
567 if (code == CALL_INSN && in_libcall_block)
568 code = INSN;
569
5c35539b
RH
570 /* Record whether this call created an edge. */
571 if (code == CALL_INSN)
572 call_had_abnormal_edge = (nonlocal_label_list != 0 || eh_note);
573
6b67ec08 574 if (code != NOTE)
e658434c 575 prev_code = code;
2c3a56ad
JL
576
577 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
578 && find_reg_note (insn, REG_RETVAL, NULL_RTX))
579 in_libcall_block = 0;
e658434c
RK
580 }
581
421382ac 582 if (i + 1 != n_basic_blocks)
e658434c 583 abort ();
d7429b6a
RK
584
585 /* Now find which basic blocks can actually be reached
586 and put all jump insns' LABEL_REFS onto the ref-chains
587 of their target labels. */
588
589 if (n_basic_blocks > 0)
590 {
591 int something_marked = 1;
592
d7429b6a
RK
593 /* Pass over all blocks, marking each block that is reachable
594 and has not yet been marked.
595 Keep doing this until, in one pass, no blocks have been marked.
596 Then blocks_live and blocks_marked are identical and correct.
597 In addition, all jumps actually reachable have been marked. */
598
599 while (something_marked)
600 {
601 something_marked = 0;
602 for (i = 0; i < n_basic_blocks; i++)
603 if (block_live[i] && !block_marked[i])
604 {
421382ac
BS
605 int_list_ptr p;
606
d7429b6a
RK
607 block_marked[i] = 1;
608 something_marked = 1;
2ec1535d 609
dc2ede84 610 make_edges (i);
421382ac
BS
611
612 for (p = basic_block_succ[i]; p; p = p->next)
613 block_live[INT_LIST_VAL (p)] = 1;
d7429b6a
RK
614 }
615 }
616
2ec1535d
JL
617 /* This should never happen. If it does that means we've computed an
618 incorrect flow graph, which can lead to aborts/crashes later in the
619 compiler or incorrect code generation.
af14ce9c 620
2ec1535d
JL
621 We used to try and continue here, but that's just asking for trouble
622 later during the compile or at runtime. It's easier to debug the
623 problem here than later! */
af14ce9c 624 for (i = 1; i < n_basic_blocks; i++)
421382ac 625 if (block_live[i] && basic_block_pred[i] == 0)
2ec1535d 626 abort ();
af14ce9c 627
96b106e5 628 if (! reload_completed)
421382ac 629 delete_unreachable_blocks ();
d7429b6a
RK
630 }
631}
5ece9746
JL
632
633/* Record INSN's block number as BB. */
634
635void
636set_block_num (insn, bb)
637 rtx insn;
638 int bb;
639{
640 if (INSN_UID (insn) >= max_uid_for_flow)
641 {
642 /* Add one-eighth the size so we don't keep calling xrealloc. */
643 max_uid_for_flow = INSN_UID (insn) + (INSN_UID (insn) + 7) / 8;
644 uid_block_number = (int *)
645 xrealloc (uid_block_number, (max_uid_for_flow + 1) * sizeof (int));
646 }
647 BLOCK_NUM (insn) = bb;
648}
d7429b6a 649\f
8329b5ec
DE
650/* Subroutines of find_basic_blocks. */
651
421382ac
BS
652void
653free_bb_memory ()
654{
655 free_int_list (&flow_int_list_blocks);
656}
657
658/* Make an edge in the cfg from block PRED to block SUCC. */
659static void
660add_edge (pred, succ)
661 int pred, succ;
662{
663 add_int_list_node (&flow_int_list_blocks, basic_block_pred + succ, pred);
664 add_int_list_node (&flow_int_list_blocks, basic_block_succ + pred, succ);
665}
666
667/* Make an edge in the cfg from block PRED to the block starting with
668 label LABEL. */
669static void
670add_edge_to_label (pred, label)
671 int pred;
672 rtx label;
673{
674 /* If the label was never emitted, this insn is junk,
675 but avoid a crash trying to refer to BLOCK_NUM (label).
676 This can happen as a result of a syntax error
677 and a diagnostic has already been printed. */
678 if (INSN_UID (label) == 0)
679 return;
680
681 add_edge (pred, BLOCK_NUM (label));
682}
683
684/* Check expression X for label references. If one is found, add an edge
685 from basic block PRED to the block beginning with the label. */
686
687static void
688mark_label_ref (pred, x)
689 int pred;
690 rtx x;
691{
692 register RTX_CODE code;
693 register int i;
694 register char *fmt;
695
696 code = GET_CODE (x);
697 if (code == LABEL_REF)
698 {
699 add_edge_to_label (pred, XEXP (x, 0));
700 return;
701 }
702
703 fmt = GET_RTX_FORMAT (code);
704 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
705 {
706 if (fmt[i] == 'e')
707 mark_label_ref (pred, XEXP (x, i));
708 if (fmt[i] == 'E')
709 {
710 register int j;
711 for (j = 0; j < XVECLEN (x, i); j++)
712 mark_label_ref (pred, XVECEXP (x, i, j));
713 }
714 }
715}
716
dc2ede84
BS
717/* For basic block I, make edges and mark live all blocks which are reachable
718 from it. */
719static void
720make_edges (i)
721 int i;
722{
723 rtx insn, x;
724
421382ac
BS
725 /* See if control drops into the next block. */
726 if (i + 1 < n_basic_blocks)
727 {
728 for (insn = PREV_INSN (basic_block_head[i + 1]);
729 insn && GET_CODE (insn) == NOTE; insn = PREV_INSN (insn))
730 ;
731
732 if (insn && GET_CODE (insn) != BARRIER)
733 add_edge (i, i + 1);
734 }
735
dc2ede84
BS
736 insn = basic_block_end[i];
737 if (GET_CODE (insn) == JUMP_INSN)
421382ac 738 mark_label_ref (i, PATTERN (insn));
dc2ede84
BS
739
740 /* If we have any forced labels, mark them as potentially reachable from
741 this block. */
742 for (x = forced_labels; x; x = XEXP (x, 1))
743 if (! LABEL_REF_NONLOCAL_P (x))
421382ac 744 add_edge_to_label (i, XEXP (x, 0));
dc2ede84
BS
745
746 /* Now scan the insns for this block, we may need to make edges for some of
747 them to various non-obvious locations (exception handlers, nonlocal
748 labels, etc). */
749 for (insn = basic_block_head[i];
750 insn != NEXT_INSN (basic_block_end[i]);
751 insn = NEXT_INSN (insn))
752 {
753 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
754 {
755 rtx note;
756 /* References to labels in non-jumping insns have REG_LABEL notes
757 attached to them.
758
759 This can happen for computed gotos; we don't care about them
760 here since the values are also on the label_value_list and will
761 be marked live if we find a live computed goto.
762
763 This can also happen when we take the address of a label to pass
764 as an argument to __throw. Note throw only uses the value to
765 determine what handler should be called -- ie the label is not
766 used as a jump target, it just marks regions in the code.
767
768 In theory we should be able to ignore the REG_LABEL notes, but
769 we have to make sure that the label and associated insns aren't
770 marked dead, so we make the block in question live and create an
771 edge from this insn to the label. This is not strictly correct,
772 but it is close enough for now.
773
774 See below for code that handles the eh_stub label specially. */
775 for (note = REG_NOTES (insn);
776 note;
777 note = XEXP (note, 1))
778 {
779 if (REG_NOTE_KIND (note) == REG_LABEL
780 && XEXP (note, 0) != eh_return_stub_label)
421382ac 781 add_edge_to_label (i, XEXP (note, 0));
dc2ede84
BS
782 }
783
784 /* If this is a computed jump, then mark it as reaching everything
785 on the label_value_list and forced_labels list. */
786 if (computed_jump_p (insn))
787 {
788 current_function_has_computed_jump = 1;
789 for (x = label_value_list; x; x = XEXP (x, 1))
790 {
791 int b = BLOCK_NUM (XEXP (x, 0));
792 basic_block_computed_jump_target[b] = 1;
421382ac 793 add_edge (i, b);
dc2ede84
BS
794 }
795
796 for (x = forced_labels; x; x = XEXP (x, 1))
797 {
798 int b = BLOCK_NUM (XEXP (x, 0));
799 basic_block_computed_jump_target[b] = 1;
421382ac 800 add_edge (i, b);
dc2ede84
BS
801 }
802 }
803
804 /* If this is a CALL_INSN, then mark it as reaching the active EH
805 handler for this CALL_INSN. If we're handling asynchronous
806 exceptions mark every insn as reaching the active EH handler.
807
808 Also mark the CALL_INSN as reaching any nonlocal goto sites. */
809 else if (asynchronous_exceptions
810 || (GET_CODE (insn) == CALL_INSN
811 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)))
812 {
813 if (active_eh_region[INSN_UID (insn)])
814 {
815 int region;
816 handler_info *ptr;
817 region = active_eh_region[INSN_UID (insn)];
421382ac 818 for ( ; region; region = nested_eh_region[region])
dc2ede84
BS
819 {
820 ptr = get_first_handler (region);
821 for ( ; ptr ; ptr = ptr->next)
421382ac 822 add_edge_to_label (i, ptr->handler_label);
dc2ede84
BS
823 }
824 }
825 if (! asynchronous_exceptions)
826 {
827 for (x = nonlocal_label_list; x; x = XEXP (x, 1))
421382ac 828 add_edge_to_label (i, XEXP (x, 0));
dc2ede84
BS
829 }
830 /* ??? This could be made smarter: in some cases it's possible
831 to tell that certain calls will not do a nonlocal goto.
832
833 For example, if the nested functions that do the nonlocal
834 gotos do not have their addresses taken, then only calls to
835 those functions or to other nested functions that use them
836 could possibly do nonlocal gotos. */
837 }
838 }
839 }
840 /* We know something about the structure of the function __throw in
841 libgcc2.c. It is the only function that ever contains eh_stub labels.
842 It modifies its return address so that the last block returns to one of
843 the eh_stub labels within it. So we have to make additional edges in
844 the flow graph. */
845 if (i + 1 == n_basic_blocks && eh_return_stub_label != 0)
421382ac 846 add_edge_to_label (i, eh_return_stub_label);
d7429b6a 847}
8329b5ec 848
dc2ede84
BS
849/* Now delete the code for any basic blocks that can't be reached.
850 They can occur because jump_optimize does not recognize unreachable loops
421382ac
BS
851 as unreachable. */
852static void
dc2ede84
BS
853delete_unreachable_blocks ()
854{
855 int deleted_handler = 0;
856 int deleted = 0;
421382ac 857 int i, j;
dc2ede84 858 rtx insn;
421382ac 859 int *block_num_map = XNMALLOC (int, n_basic_blocks);
dc2ede84 860
421382ac 861 for (i = n_basic_blocks - 1; i >= 0; i--)
dc2ede84 862 if (! block_live_static[i])
421382ac
BS
863 deleted_handler |= delete_block (i);
864
865 for (i = 0; i < n_basic_blocks; i++)
866 if (block_live_static[i])
867 block_num_map[i] = i - deleted;
868 else
dc2ede84
BS
869 {
870 deleted++;
421382ac 871 block_num_map[i] = -1;
dc2ede84
BS
872 }
873
421382ac
BS
874 /* Eliminate all traces of the deleted blocks by renumbering the remaining
875 ones. */
876 for (i = j = 0; i < n_basic_blocks; i++)
877 {
878 int_list_ptr p;
879
880 if (block_num_map[i] == -1)
881 continue;
882
883 for (p = basic_block_pred[i]; p; p = p->next)
884 INT_LIST_VAL (p) = block_num_map[INT_LIST_VAL (p)];
885 for (p = basic_block_succ[i]; p; p = p->next)
886 INT_LIST_VAL (p) = block_num_map[INT_LIST_VAL (p)];
887
888 if (i != j)
889 {
890 rtx tmp = basic_block_head[i];
891 for (;;)
892 {
893 BLOCK_NUM (tmp) = j;
894 if (tmp == basic_block_end[i])
895 break;
896 tmp = NEXT_INSN (tmp);
897 }
898 basic_block_head[j] = basic_block_head[i];
899 basic_block_end[j] = basic_block_end[i];
900 basic_block_pred[j] = basic_block_pred[i];
901 basic_block_succ[j] = basic_block_succ[i];
902 basic_block_loop_depth[j] = basic_block_loop_depth[i];
903 basic_block_computed_jump_target[j]
904 = basic_block_computed_jump_target[i];
905 }
906 j++;
907 }
908 n_basic_blocks -= deleted;
909 free (block_num_map);
910
dc2ede84
BS
911 /* If we deleted an exception handler, we may have EH region
912 begin/end blocks to remove as well. */
913 if (deleted_handler)
914 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
915 if (GET_CODE (insn) == NOTE)
916 {
421382ac
BS
917 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG ||
918 NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
dc2ede84
BS
919 {
920 int num = CODE_LABEL_NUMBER (insn);
921 /* A NULL handler indicates a region is no longer needed */
922 if (get_first_handler (num) == NULL)
923 {
924 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
925 NOTE_SOURCE_FILE (insn) = 0;
926 }
927 }
928 }
dc2ede84
BS
929}
930
931/* Delete the insns in a (non-live) block. We physically delete every
932 non-note insn except the start and end (so basic_block_head/end needn't
933 be updated), we turn the latter into NOTE_INSN_DELETED notes.
934
935 We use to "delete" the insns by turning them into notes, but we may be
936 deleting lots of insns that subsequent passes would otherwise have to
937 process. Secondly, lots of deleted blocks in a row can really slow down
938 propagate_block since it will otherwise process insn-turned-notes multiple
939 times when it looks for loop begin/end notes.
940
941 Return nonzero if we deleted an exception handler. */
942static int
943delete_block (i)
944 int i;
945{
946 int deleted_handler = 0;
947 rtx insn;
421382ac
BS
948 rtx kept_head = 0;
949 rtx kept_tail = 0;
950
951 /* If the head of this block is a CODE_LABEL, then it might
952 be the label for an exception handler which can't be
953 reached.
dc2ede84 954
421382ac
BS
955 We need to remove the label from the exception_handler_label
956 list and remove the associated NOTE_EH_REGION_BEG and
957 NOTE_EH_REGION_END notes. */
958 insn = basic_block_head[i];
959 if (GET_CODE (insn) == CODE_LABEL)
dc2ede84 960 {
421382ac
BS
961 rtx x, *prev = &exception_handler_labels;
962
963 for (x = exception_handler_labels; x; x = XEXP (x, 1))
dc2ede84 964 {
421382ac
BS
965 if (XEXP (x, 0) == insn)
966 {
967 /* Found a match, splice this label out of the
968 EH label list. */
969 *prev = XEXP (x, 1);
970 XEXP (x, 1) = NULL_RTX;
971 XEXP (x, 0) = NULL_RTX;
972
973 /* Remove the handler from all regions */
974 remove_handler (insn);
975 deleted_handler = 1;
976 break;
977 }
978 prev = &XEXP (x, 1);
dc2ede84
BS
979 }
980 }
981
421382ac
BS
982 /* Walk the insns of the block, building a chain of NOTEs that need to be
983 kept. */
dc2ede84 984 insn = basic_block_head[i];
421382ac 985 for (;;)
dc2ede84 986 {
dc2ede84
BS
987 if (GET_CODE (insn) == BARRIER)
988 abort ();
421382ac 989 else if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED)
dc2ede84 990 {
421382ac
BS
991 if (kept_head == 0)
992 kept_head = kept_tail = insn;
993 else
dc2ede84 994 {
421382ac
BS
995 NEXT_INSN (kept_tail) = insn;
996 PREV_INSN (insn) = kept_tail;
997 kept_tail = insn;
dc2ede84
BS
998 }
999 }
421382ac
BS
1000 if (insn == basic_block_end[i])
1001 break;
1002 insn = NEXT_INSN (insn);
dc2ede84 1003 }
421382ac
BS
1004 insn = NEXT_INSN (insn);
1005
dc2ede84
BS
1006 /* BARRIERs are between basic blocks, not part of one.
1007 Delete a BARRIER if the preceding jump is deleted.
1008 We cannot alter a BARRIER into a NOTE
1009 because it is too short; but we can really delete
1010 it because it is not part of a basic block. */
421382ac
BS
1011 if (insn != 0 && GET_CODE (insn) == BARRIER)
1012 insn = NEXT_INSN (insn);
1013
1014 /* Now unchain all of the block, and put the chain of kept notes in its
1015 place. */
1016 if (kept_head == 0)
1017 {
1018 NEXT_INSN (PREV_INSN (basic_block_head[i])) = insn;
1019 if (insn != 0)
1020 PREV_INSN (insn) = PREV_INSN (basic_block_head[i]);
e3f6ee23
JL
1021 else
1022 set_last_insn (PREV_INSN (basic_block_head[i]));
421382ac
BS
1023 }
1024 else
1025 {
1026 NEXT_INSN (PREV_INSN (basic_block_head[i])) = kept_head;
1027 if (insn != 0)
1028 PREV_INSN (insn) = kept_tail;
1029
1030 PREV_INSN (kept_head) = PREV_INSN (basic_block_head[i]);
1031 NEXT_INSN (kept_tail) = insn;
b7f7462b
JL
1032
1033 /* This must happen after NEXT_INSN (kept_tail) has been reinitialized
1034 since set_last_insn will abort if it detects a non-NULL NEXT_INSN
1035 field in its argument. */
1036 if (insn == NULL_RTX)
1037 set_last_insn (kept_tail);
421382ac 1038 }
dc2ede84
BS
1039
1040 /* Each time we delete some basic blocks,
1041 see if there is a jump around them that is
1042 being turned into a no-op. If so, delete it. */
1043
1044 if (block_live_static[i - 1])
1045 {
1046 register int j;
1047 for (j = i + 1; j < n_basic_blocks; j++)
1048 if (block_live_static[j])
1049 {
1050 rtx label;
1051 insn = basic_block_end[i - 1];
1052 if (GET_CODE (insn) == JUMP_INSN
1053 /* An unconditional jump is the only possibility
1054 we must check for, since a conditional one
1055 would make these blocks live. */
1056 && simplejump_p (insn)
1057 && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1)
1058 && INSN_UID (label) != 0
1059 && BLOCK_NUM (label) == j)
1060 {
dc2ede84
BS
1061 PUT_CODE (insn, NOTE);
1062 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1063 NOTE_SOURCE_FILE (insn) = 0;
1064 if (GET_CODE (NEXT_INSN (insn)) != BARRIER)
1065 abort ();
1066 delete_insn (NEXT_INSN (insn));
1067 }
1068 break;
1069 }
1070 }
1071
1072 return deleted_handler;
1073}
d7429b6a 1074\f
5ece9746
JL
1075/* Perform data flow analysis.
1076 F is the first insn of the function and NREGS the number of register numbers
1077 in use. */
1078
1079void
1080life_analysis (f, nregs, file)
1081 rtx f;
1082 int nregs;
1083 FILE *file;
1084{
5ece9746 1085#ifdef ELIMINABLE_REGS
ecb06768 1086 register size_t i;
5ece9746
JL
1087 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
1088#endif
1089
1090 /* Record which registers will be eliminated. We use this in
1091 mark_used_regs. */
1092
1093 CLEAR_HARD_REG_SET (elim_reg_set);
1094
1095#ifdef ELIMINABLE_REGS
1096 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
1097 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
1098#else
1099 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
1100#endif
1101
1102 life_analysis_1 (f, nregs);
1103 if (file)
1104 dump_flow_info (file);
1105
1106 free_basic_block_vars (1);
1107}
1108
1109/* Free the variables allocated by find_basic_blocks.
1110
1111 KEEP_HEAD_END_P is non-zero if basic_block_head and basic_block_end
1112 are not to be freed. */
1113
1114void
1115free_basic_block_vars (keep_head_end_p)
1116 int keep_head_end_p;
1117{
5ece9746
JL
1118 if (basic_block_loop_depth)
1119 {
1120 free (basic_block_loop_depth);
1121 basic_block_loop_depth = 0;
1122 }
1123 if (uid_block_number)
1124 {
1125 free (uid_block_number);
1126 uid_block_number = 0;
1127 }
1128 if (uid_volatile)
1129 {
1130 free (uid_volatile);
1131 uid_volatile = 0;
1132 }
1133
1134 if (! keep_head_end_p && basic_block_head)
1135 {
1136 free (basic_block_head);
1137 basic_block_head = 0;
1138 free (basic_block_end);
1139 basic_block_end = 0;
1140 }
1141}
1142
dc2ede84
BS
1143/* Return nonzero if the destination of SET equals the source. */
1144static int
1145set_noop_p (set)
1146 rtx set;
1147{
1148 rtx src = SET_SRC (set);
1149 rtx dst = SET_DEST (set);
1150 if (GET_CODE (src) == REG && GET_CODE (dst) == REG
1151 && REGNO (src) == REGNO (dst))
1152 return 1;
1153 if (GET_CODE (src) != SUBREG || GET_CODE (dst) != SUBREG
1154 || SUBREG_WORD (src) != SUBREG_WORD (dst))
1155 return 0;
1156 src = SUBREG_REG (src);
1157 dst = SUBREG_REG (dst);
1158 if (GET_CODE (src) == REG && GET_CODE (dst) == REG
1159 && REGNO (src) == REGNO (dst))
1160 return 1;
1161 return 0;
1162}
1163
1164/* Return nonzero if an insn consists only of SETs, each of which only sets a
1165 value to itself. */
1166static int
1167noop_move_p (insn)
1168 rtx insn;
1169{
1170 rtx pat = PATTERN (insn);
1171
1172 /* Insns carrying these notes are useful later on. */
1173 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
1174 return 0;
1175
1176 if (GET_CODE (pat) == SET && set_noop_p (pat))
1177 return 1;
1178
1179 if (GET_CODE (pat) == PARALLEL)
1180 {
1181 int i;
1182 /* If nothing but SETs of registers to themselves,
1183 this insn can also be deleted. */
1184 for (i = 0; i < XVECLEN (pat, 0); i++)
1185 {
1186 rtx tem = XVECEXP (pat, 0, i);
1187
1188 if (GET_CODE (tem) == USE
1189 || GET_CODE (tem) == CLOBBER)
1190 continue;
1191
1192 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
1193 return 0;
1194 }
1195
1196 return 1;
1197 }
1198 return 0;
1199}
1200
fdb8a883
JW
1201static void
1202notice_stack_pointer_modification (x, pat)
1203 rtx x;
1204 rtx pat ATTRIBUTE_UNUSED;
1205{
1206 if (x == stack_pointer_rtx
1207 /* The stack pointer is only modified indirectly as the result
1208 of a push until later in flow. See the comments in rtl.texi
1209 regarding Embedded Side-Effects on Addresses. */
1210 || (GET_CODE (x) == MEM
1211 && (GET_CODE (XEXP (x, 0)) == PRE_DEC
1212 || GET_CODE (XEXP (x, 0)) == PRE_INC
1213 || GET_CODE (XEXP (x, 0)) == POST_DEC
1214 || GET_CODE (XEXP (x, 0)) == POST_INC)
1215 && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx))
1216 current_function_sp_is_unchanging = 0;
1217}
1218
dc2ede84
BS
1219/* Record which insns refer to any volatile memory
1220 or for any reason can't be deleted just because they are dead stores.
fdb8a883
JW
1221 Also, delete any insns that copy a register to itself.
1222 And see if the stack pointer is modified. */
dc2ede84
BS
1223static void
1224record_volatile_insns (f)
1225 rtx f;
1226{
1227 rtx insn;
1228 for (insn = f; insn; insn = NEXT_INSN (insn))
1229 {
1230 enum rtx_code code1 = GET_CODE (insn);
1231 if (code1 == CALL_INSN)
1232 INSN_VOLATILE (insn) = 1;
1233 else if (code1 == INSN || code1 == JUMP_INSN)
1234 {
1235 if (GET_CODE (PATTERN (insn)) != USE
1236 && volatile_refs_p (PATTERN (insn)))
1237 INSN_VOLATILE (insn) = 1;
1238
1239 /* A SET that makes space on the stack cannot be dead.
1240 (Such SETs occur only for allocating variable-size data,
1241 so they will always have a PLUS or MINUS according to the
1242 direction of stack growth.)
1243 Even if this function never uses this stack pointer value,
1244 signal handlers do! */
1245 else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET
1246 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1247#ifdef STACK_GROWS_DOWNWARD
1248 && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS
1249#else
1250 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1251#endif
1252 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx)
1253 INSN_VOLATILE (insn) = 1;
1254
1255 /* Delete (in effect) any obvious no-op moves. */
1256 else if (noop_move_p (insn))
1257 {
1258 PUT_CODE (insn, NOTE);
1259 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1260 NOTE_SOURCE_FILE (insn) = 0;
1261 }
1262 }
fdb8a883
JW
1263
1264 /* Check if insn modifies the stack pointer. */
1265 if ( current_function_sp_is_unchanging
1266 && GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1267 note_stores (PATTERN (insn), notice_stack_pointer_modification);
dc2ede84
BS
1268 }
1269}
1270
1271/* Mark those regs which are needed at the end of the function as live
1272 at the end of the last basic block. */
1273static void
1274mark_regs_live_at_end (set)
1275 regset set;
1276{
1277 int i;
1278
1279#ifdef EXIT_IGNORE_STACK
1280 if (! EXIT_IGNORE_STACK
1281 || (! FRAME_POINTER_REQUIRED
1282 && ! current_function_calls_alloca
fdb8a883
JW
1283 && flag_omit_frame_pointer)
1284 || current_function_sp_is_unchanging)
dc2ede84
BS
1285#endif
1286 /* If exiting needs the right stack value,
1287 consider the stack pointer live at the end of the function. */
1288 SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM);
1289
1290 /* Mark the frame pointer is needed at the end of the function. If
1291 we end up eliminating it, it will be removed from the live list
1292 of each basic block by reload. */
1293
1294 SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM);
1295#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1296 /* If they are different, also mark the hard frame pointer as live */
1297 SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM);
1298#endif
1299
1300
1301 /* Mark all global registers and all registers used by the epilogue
1302 as being live at the end of the function since they may be
1303 referenced by our caller. */
1304 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1305 if (global_regs[i]
1306#ifdef EPILOGUE_USES
1307 || EPILOGUE_USES (i)
1308#endif
1309 )
1310 SET_REGNO_REG_SET (set, i);
1311}
1312
d7429b6a
RK
1313/* Determine which registers are live at the start of each
1314 basic block of the function whose first insn is F.
1315 NREGS is the number of registers used in F.
1316 We allocate the vector basic_block_live_at_start
1317 and the regsets that it points to, and fill them with the data.
1318 regset_size and regset_bytes are also set here. */
1319
1320static void
5ece9746 1321life_analysis_1 (f, nregs)
d7429b6a
RK
1322 rtx f;
1323 int nregs;
1324{
d7429b6a
RK
1325 int first_pass;
1326 int changed;
1327 /* For each basic block, a bitmask of regs
1328 live on exit from the block. */
1329 regset *basic_block_live_at_end;
1330 /* For each basic block, a bitmask of regs
1331 live on entry to a successor-block of this block.
1332 If this does not match basic_block_live_at_end,
1333 that must be updated, and the block must be rescanned. */
1334 regset *basic_block_new_live_at_end;
1335 /* For each basic block, a bitmask of regs
1336 whose liveness at the end of the basic block
1337 can make a difference in which regs are live on entry to the block.
1338 These are the regs that are set within the basic block,
1339 possibly excluding those that are used after they are set. */
1340 regset *basic_block_significant;
1341 register int i;
6764d250 1342 char save_regs_ever_live[FIRST_PSEUDO_REGISTER];
d7429b6a
RK
1343
1344 struct obstack flow_obstack;
1345
1346 gcc_obstack_init (&flow_obstack);
1347
1348 max_regno = nregs;
1349
6764d250
BS
1350 /* The post-reload life analysis have (on a global basis) the same registers
1351 live as was computed by reload itself.
1352
1353 Otherwise elimination offsets and such may be incorrect.
1354
1355 Reload will make some registers as live even though they do not appear
1356 in the rtl. */
1357 if (reload_completed)
1358 bcopy (regs_ever_live, save_regs_ever_live, (sizeof (regs_ever_live)));
1359
d7429b6a
RK
1360 bzero (regs_ever_live, sizeof regs_ever_live);
1361
1362 /* Allocate and zero out many data structures
1363 that will record the data from lifetime analysis. */
1364
1365 allocate_for_life_analysis ();
1366
1367 reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
4c9a05bc 1368 bzero ((char *) reg_next_use, nregs * sizeof (rtx));
d7429b6a
RK
1369
1370 /* Set up several regset-vectors used internally within this function.
1371 Their meanings are documented above, with their declarations. */
1372
4c9a05bc
RK
1373 basic_block_live_at_end
1374 = (regset *) alloca (n_basic_blocks * sizeof (regset));
1375
d7429b6a
RK
1376 /* Don't use alloca since that leads to a crash rather than an error message
1377 if there isn't enough space.
1378 Don't use oballoc since we may need to allocate other things during
1379 this function on the temporary obstack. */
67f0e213 1380 init_regset_vector (basic_block_live_at_end, n_basic_blocks, &flow_obstack);
d7429b6a 1381
4c9a05bc
RK
1382 basic_block_new_live_at_end
1383 = (regset *) alloca (n_basic_blocks * sizeof (regset));
67f0e213 1384 init_regset_vector (basic_block_new_live_at_end, n_basic_blocks,
7eb136d6 1385 &flow_obstack);
d7429b6a 1386
4c9a05bc
RK
1387 basic_block_significant
1388 = (regset *) alloca (n_basic_blocks * sizeof (regset));
67f0e213 1389 init_regset_vector (basic_block_significant, n_basic_blocks, &flow_obstack);
d7429b6a 1390
fdb8a883
JW
1391 /* Assume that the stack pointer is unchanging if alloca hasn't been used.
1392 This will be cleared by record_volatile_insns if it encounters an insn
1393 which modifies the stack pointer. */
1394 current_function_sp_is_unchanging = !current_function_calls_alloca;
1395
dc2ede84 1396 record_volatile_insns (f);
fe0f9c4b
RK
1397
1398 if (n_basic_blocks > 0)
1399 {
dc2ede84
BS
1400 mark_regs_live_at_end (basic_block_live_at_end[n_basic_blocks - 1]);
1401 COPY_REG_SET (basic_block_new_live_at_end[n_basic_blocks - 1],
1402 basic_block_live_at_end[n_basic_blocks - 1]);
1403 }
d7429b6a
RK
1404
1405 /* Propagate life info through the basic blocks
1406 around the graph of basic blocks.
1407
1408 This is a relaxation process: each time a new register
1409 is live at the end of the basic block, we must scan the block
1410 to determine which registers are, as a consequence, live at the beginning
1411 of that block. These registers must then be marked live at the ends
1412 of all the blocks that can transfer control to that block.
1413 The process continues until it reaches a fixed point. */
1414
1415 first_pass = 1;
1416 changed = 1;
1417 while (changed)
1418 {
1419 changed = 0;
1420 for (i = n_basic_blocks - 1; i >= 0; i--)
1421 {
1422 int consider = first_pass;
1423 int must_rescan = first_pass;
1424 register int j;
1425
1426 if (!first_pass)
1427 {
1428 /* Set CONSIDER if this block needs thinking about at all
1429 (that is, if the regs live now at the end of it
1430 are not the same as were live at the end of it when
1431 we last thought about it).
1432 Set must_rescan if it needs to be thought about
1433 instruction by instruction (that is, if any additional
1434 reg that is live at the end now but was not live there before
1435 is one of the significant regs of this basic block). */
1436
b5835272
RK
1437 EXECUTE_IF_AND_COMPL_IN_REG_SET
1438 (basic_block_new_live_at_end[i],
1439 basic_block_live_at_end[i], 0, j,
1440 {
1441 consider = 1;
b590bbfd 1442 if (REGNO_REG_SET_P (basic_block_significant[i], j))
b5835272
RK
1443 {
1444 must_rescan = 1;
1445 goto done;
1446 }
1447 });
916b1701 1448 done:
d7429b6a
RK
1449 if (! consider)
1450 continue;
1451 }
1452
1453 /* The live_at_start of this block may be changing,
1454 so another pass will be required after this one. */
1455 changed = 1;
1456
1457 if (! must_rescan)
1458 {
1459 /* No complete rescan needed;
1460 just record those variables newly known live at end
1461 as live at start as well. */
916b1701
MM
1462 IOR_AND_COMPL_REG_SET (basic_block_live_at_start[i],
1463 basic_block_new_live_at_end[i],
1464 basic_block_live_at_end[i]);
1465
1466 IOR_AND_COMPL_REG_SET (basic_block_live_at_end[i],
1467 basic_block_new_live_at_end[i],
1468 basic_block_live_at_end[i]);
d7429b6a
RK
1469 }
1470 else
1471 {
1472 /* Update the basic_block_live_at_start
1473 by propagation backwards through the block. */
916b1701
MM
1474 COPY_REG_SET (basic_block_live_at_end[i],
1475 basic_block_new_live_at_end[i]);
1476 COPY_REG_SET (basic_block_live_at_start[i],
1477 basic_block_live_at_end[i]);
d7429b6a
RK
1478 propagate_block (basic_block_live_at_start[i],
1479 basic_block_head[i], basic_block_end[i], 0,
5f4f0e22
CH
1480 first_pass ? basic_block_significant[i]
1481 : (regset) 0,
d7429b6a
RK
1482 i);
1483 }
1484
1485 {
421382ac 1486 int_list_ptr p;
af14ce9c 1487
d7429b6a 1488 /* Update the basic_block_new_live_at_end's of
421382ac
BS
1489 all the blocks that reach this one. */
1490 for (p = basic_block_pred[i]; p; p = p->next)
1491 {
1492 register int from_block = INT_LIST_VAL (p);
1493 IOR_REG_SET (basic_block_new_live_at_end[from_block],
1494 basic_block_live_at_start[i]);
1495 }
d7429b6a
RK
1496 }
1497#ifdef USE_C_ALLOCA
1498 alloca (0);
1499#endif
1500 }
1501 first_pass = 0;
1502 }
1503
1504 /* The only pseudos that are live at the beginning of the function are
1505 those that were not set anywhere in the function. local-alloc doesn't
1506 know how to handle these correctly, so mark them as not local to any
1507 one basic block. */
1508
1509 if (n_basic_blocks > 0)
916b1701
MM
1510 EXECUTE_IF_SET_IN_REG_SET (basic_block_live_at_start[0],
1511 FIRST_PSEUDO_REGISTER, i,
1512 {
1513 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
1514 });
d7429b6a
RK
1515
1516 /* Now the life information is accurate.
1517 Make one more pass over each basic block
1518 to delete dead stores, create autoincrement addressing
1519 and record how many times each register is used, is set, or dies.
1520
1521 To save time, we operate directly in basic_block_live_at_end[i],
1522 thus destroying it (in fact, converting it into a copy of
1523 basic_block_live_at_start[i]). This is ok now because
1524 basic_block_live_at_end[i] is no longer used past this point. */
1525
d7429b6a
RK
1526 for (i = 0; i < n_basic_blocks; i++)
1527 {
1528 propagate_block (basic_block_live_at_end[i],
5f4f0e22
CH
1529 basic_block_head[i], basic_block_end[i], 1,
1530 (regset) 0, i);
d7429b6a
RK
1531#ifdef USE_C_ALLOCA
1532 alloca (0);
1533#endif
1534 }
1535
1536#if 0
1537 /* Something live during a setjmp should not be put in a register
1538 on certain machines which restore regs from stack frames
1539 rather than from the jmpbuf.
1540 But we don't need to do this for the user's variables, since
1541 ANSI says only volatile variables need this. */
1542#ifdef LONGJMP_RESTORE_FROM_STACK
916b1701
MM
1543 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
1544 FIRST_PSEUDO_REGISTER, i,
1545 {
1546 if (regno_reg_rtx[i] != 0
1547 && ! REG_USERVAR_P (regno_reg_rtx[i]))
1548 {
1549 REG_LIVE_LENGTH (i) = -1;
1550 REG_BASIC_BLOCK (i) = -1;
1551 }
1552 });
d7429b6a
RK
1553#endif
1554#endif
1555
1556 /* We have a problem with any pseudoreg that
1557 lives across the setjmp. ANSI says that if a
1558 user variable does not change in value
1559 between the setjmp and the longjmp, then the longjmp preserves it.
1560 This includes longjmp from a place where the pseudo appears dead.
1561 (In principle, the value still exists if it is in scope.)
1562 If the pseudo goes in a hard reg, some other value may occupy
1563 that hard reg where this pseudo is dead, thus clobbering the pseudo.
1564 Conclusion: such a pseudo must not go in a hard reg. */
916b1701
MM
1565 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
1566 FIRST_PSEUDO_REGISTER, i,
1567 {
1568 if (regno_reg_rtx[i] != 0)
1569 {
1570 REG_LIVE_LENGTH (i) = -1;
1571 REG_BASIC_BLOCK (i) = -1;
1572 }
1573 });
d7429b6a 1574
6764d250
BS
1575 /* Restore regs_ever_live that was provided by reload. */
1576 if (reload_completed)
1577 bcopy (save_regs_ever_live, regs_ever_live, (sizeof (regs_ever_live)));
67f0e213
RK
1578
1579 free_regset_vector (basic_block_live_at_end, n_basic_blocks);
1580 free_regset_vector (basic_block_new_live_at_end, n_basic_blocks);
1581 free_regset_vector (basic_block_significant, n_basic_blocks);
1582 basic_block_live_at_end = (regset *)0;
1583 basic_block_new_live_at_end = (regset *)0;
1584 basic_block_significant = (regset *)0;
1585
5f4f0e22 1586 obstack_free (&flow_obstack, NULL_PTR);
d7429b6a
RK
1587}
1588\f
1589/* Subroutines of life analysis. */
1590
1591/* Allocate the permanent data structures that represent the results
1592 of life analysis. Not static since used also for stupid life analysis. */
1593
1594void
1595allocate_for_life_analysis ()
1596{
1597 register int i;
d7429b6a 1598
67f0e213
RK
1599 /* Recalculate the register space, in case it has grown. Old style
1600 vector oriented regsets would set regset_{size,bytes} here also. */
1601 allocate_reg_info (max_regno, FALSE, FALSE);
d7429b6a 1602
b1f21e0a
MM
1603 /* Because both reg_scan and flow_analysis want to set up the REG_N_SETS
1604 information, explicitly reset it here. The allocation should have
1605 already happened on the previous reg_scan pass. Make sure in case
1606 some more registers were allocated. */
d7429b6a 1607 for (i = 0; i < max_regno; i++)
b1f21e0a 1608 REG_N_SETS (i) = 0;
d7429b6a 1609
4c9a05bc
RK
1610 basic_block_live_at_start
1611 = (regset *) oballoc (n_basic_blocks * sizeof (regset));
67f0e213 1612 init_regset_vector (basic_block_live_at_start, n_basic_blocks,
7eb136d6 1613 function_obstack);
d7429b6a 1614
7eb136d6
MM
1615 regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (function_obstack);
1616 CLEAR_REG_SET (regs_live_at_setjmp);
d7429b6a
RK
1617}
1618
67f0e213
RK
1619/* Make each element of VECTOR point at a regset. The vector has
1620 NELTS elements, and space is allocated from the ALLOC_OBSTACK
1621 obstack. */
d7429b6a 1622
04821e98 1623static void
67f0e213 1624init_regset_vector (vector, nelts, alloc_obstack)
d7429b6a 1625 regset *vector;
d7429b6a 1626 int nelts;
7eb136d6 1627 struct obstack *alloc_obstack;
d7429b6a
RK
1628{
1629 register int i;
d7429b6a
RK
1630
1631 for (i = 0; i < nelts; i++)
1632 {
7eb136d6
MM
1633 vector[i] = OBSTACK_ALLOC_REG_SET (alloc_obstack);
1634 CLEAR_REG_SET (vector[i]);
d7429b6a
RK
1635 }
1636}
e658434c 1637
67f0e213
RK
1638/* Release any additional space allocated for each element of VECTOR point
1639 other than the regset header itself. The vector has NELTS elements. */
1640
1641void
1642free_regset_vector (vector, nelts)
1643 regset *vector;
1644 int nelts;
1645{
1646 register int i;
1647
1648 for (i = 0; i < nelts; i++)
1649 FREE_REG_SET (vector[i]);
1650}
1651
d7429b6a
RK
1652/* Compute the registers live at the beginning of a basic block
1653 from those live at the end.
1654
1655 When called, OLD contains those live at the end.
1656 On return, it contains those live at the beginning.
1657 FIRST and LAST are the first and last insns of the basic block.
1658
1659 FINAL is nonzero if we are doing the final pass which is not
1660 for computing the life info (since that has already been done)
1661 but for acting on it. On this pass, we delete dead stores,
1662 set up the logical links and dead-variables lists of instructions,
1663 and merge instructions for autoincrement and autodecrement addresses.
1664
1665 SIGNIFICANT is nonzero only the first time for each basic block.
1666 If it is nonzero, it points to a regset in which we store
1667 a 1 for each register that is set within the block.
1668
1669 BNUM is the number of the basic block. */
1670
1671static void
1672propagate_block (old, first, last, final, significant, bnum)
1673 register regset old;
1674 rtx first;
1675 rtx last;
1676 int final;
1677 regset significant;
1678 int bnum;
1679{
1680 register rtx insn;
1681 rtx prev;
1682 regset live;
1683 regset dead;
1684
d7429b6a
RK
1685 /* The loop depth may change in the middle of a basic block. Since we
1686 scan from end to beginning, we start with the depth at the end of the
1687 current basic block, and adjust as we pass ends and starts of loops. */
1688 loop_depth = basic_block_loop_depth[bnum];
1689
7eb136d6
MM
1690 dead = ALLOCA_REG_SET ();
1691 live = ALLOCA_REG_SET ();
d7429b6a
RK
1692
1693 cc0_live = 0;
1694 last_mem_set = 0;
1695
1696 /* Include any notes at the end of the block in the scan.
1697 This is in case the block ends with a call to setjmp. */
1698
1699 while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE)
1700 {
1701 /* Look for loop boundaries, we are going forward here. */
1702 last = NEXT_INSN (last);
1703 if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG)
1704 loop_depth++;
1705 else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END)
1706 loop_depth--;
1707 }
1708
1709 if (final)
1710 {
916b1701 1711 register int i;
d7429b6a 1712
d7429b6a 1713 /* Process the regs live at the end of the block.
f8dd7f98 1714 Mark them as not local to any one basic block. */
916b1701
MM
1715 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
1716 {
1717 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
916b1701 1718 });
d7429b6a
RK
1719 }
1720
1721 /* Scan the block an insn at a time from end to beginning. */
1722
1723 for (insn = last; ; insn = prev)
1724 {
1725 prev = PREV_INSN (insn);
1726
8329b5ec 1727 if (GET_CODE (insn) == NOTE)
d7429b6a 1728 {
8329b5ec
DE
1729 /* Look for loop boundaries, remembering that we are going
1730 backwards. */
1731 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1732 loop_depth++;
1733 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1734 loop_depth--;
1735
1736 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
1737 Abort now rather than setting register status incorrectly. */
1738 if (loop_depth == 0)
1739 abort ();
1740
1741 /* If this is a call to `setjmp' et al,
1742 warn if any non-volatile datum is live. */
1743
1744 if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
916b1701 1745 IOR_REG_SET (regs_live_at_setjmp, old);
d7429b6a
RK
1746 }
1747
1748 /* Update the life-status of regs for this insn.
1749 First DEAD gets which regs are set in this insn
1750 then LIVE gets which regs are used in this insn.
1751 Then the regs live before the insn
1752 are those live after, with DEAD regs turned off,
1753 and then LIVE regs turned on. */
1754
8329b5ec 1755 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
d7429b6a
RK
1756 {
1757 register int i;
5f4f0e22 1758 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
d7429b6a 1759 int insn_is_dead
e398aa80 1760 = (insn_dead_p (PATTERN (insn), old, 0, REG_NOTES (insn))
d7429b6a
RK
1761 /* Don't delete something that refers to volatile storage! */
1762 && ! INSN_VOLATILE (insn));
1763 int libcall_is_dead
1764 = (insn_is_dead && note != 0
1765 && libcall_dead_p (PATTERN (insn), old, note, insn));
1766
1767 /* If an instruction consists of just dead store(s) on final pass,
1768 "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
1769 We could really delete it with delete_insn, but that
1770 can cause trouble for first or last insn in a basic block. */
b590bbfd 1771 if (final && insn_is_dead)
d7429b6a
RK
1772 {
1773 PUT_CODE (insn, NOTE);
1774 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1775 NOTE_SOURCE_FILE (insn) = 0;
1776
e5df1ea3
RK
1777 /* CC0 is now known to be dead. Either this insn used it,
1778 in which case it doesn't anymore, or clobbered it,
1779 so the next insn can't use it. */
1780 cc0_live = 0;
1781
d7429b6a
RK
1782 /* If this insn is copying the return value from a library call,
1783 delete the entire library call. */
1784 if (libcall_is_dead)
1785 {
1786 rtx first = XEXP (note, 0);
1787 rtx p = insn;
1788 while (INSN_DELETED_P (first))
1789 first = NEXT_INSN (first);
1790 while (p != first)
1791 {
1792 p = PREV_INSN (p);
1793 PUT_CODE (p, NOTE);
1794 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
1795 NOTE_SOURCE_FILE (p) = 0;
1796 }
1797 }
1798 goto flushed;
1799 }
1800
916b1701
MM
1801 CLEAR_REG_SET (dead);
1802 CLEAR_REG_SET (live);
d7429b6a
RK
1803
1804 /* See if this is an increment or decrement that can be
1805 merged into a following memory address. */
1806#ifdef AUTO_INC_DEC
1807 {
956d6950
JL
1808 register rtx x = single_set (insn);
1809
d7429b6a 1810 /* Does this instruction increment or decrement a register? */
6764d250
BS
1811 if (!reload_completed
1812 && final && x != 0
d7429b6a
RK
1813 && GET_CODE (SET_DEST (x)) == REG
1814 && (GET_CODE (SET_SRC (x)) == PLUS
1815 || GET_CODE (SET_SRC (x)) == MINUS)
1816 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
1817 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1818 /* Ok, look for a following memory ref we can combine with.
1819 If one is found, change the memory ref to a PRE_INC
1820 or PRE_DEC, cancel this insn, and return 1.
1821 Return 0 if nothing has been done. */
1822 && try_pre_increment_1 (insn))
1823 goto flushed;
1824 }
1825#endif /* AUTO_INC_DEC */
1826
1827 /* If this is not the final pass, and this insn is copying the
1828 value of a library call and it's dead, don't scan the
1829 insns that perform the library call, so that the call's
1830 arguments are not marked live. */
1831 if (libcall_is_dead)
1832 {
1833 /* Mark the dest reg as `significant'. */
5f4f0e22 1834 mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant);
d7429b6a
RK
1835
1836 insn = XEXP (note, 0);
1837 prev = PREV_INSN (insn);
1838 }
1839 else if (GET_CODE (PATTERN (insn)) == SET
1840 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1841 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1842 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
1843 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
1844 /* We have an insn to pop a constant amount off the stack.
1845 (Such insns use PLUS regardless of the direction of the stack,
1846 and any insn to adjust the stack by a constant is always a pop.)
1847 These insns, if not dead stores, have no effect on life. */
1848 ;
1849 else
1850 {
f8dd7f98
BS
1851 /* Any regs live at the time of a call instruction
1852 must not go in a register clobbered by calls.
1853 Find all regs now live and record this for them. */
1854
1855 if (GET_CODE (insn) == CALL_INSN && final)
1856 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
1857 {
1858 REG_N_CALLS_CROSSED (i)++;
1859 });
1860
d7429b6a
RK
1861 /* LIVE gets the regs used in INSN;
1862 DEAD gets those set by it. Dead insns don't make anything
1863 live. */
1864
5f4f0e22
CH
1865 mark_set_regs (old, dead, PATTERN (insn),
1866 final ? insn : NULL_RTX, significant);
d7429b6a
RK
1867
1868 /* If an insn doesn't use CC0, it becomes dead since we
1869 assume that every insn clobbers it. So show it dead here;
1870 mark_used_regs will set it live if it is referenced. */
1871 cc0_live = 0;
1872
1873 if (! insn_is_dead)
1874 mark_used_regs (old, live, PATTERN (insn), final, insn);
1875
1876 /* Sometimes we may have inserted something before INSN (such as
1877 a move) when we make an auto-inc. So ensure we will scan
1878 those insns. */
1879#ifdef AUTO_INC_DEC
1880 prev = PREV_INSN (insn);
1881#endif
1882
1883 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
1884 {
1885 register int i;
1886
6b67ec08
RK
1887 rtx note;
1888
1889 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1890 note;
1891 note = XEXP (note, 1))
1892 if (GET_CODE (XEXP (note, 0)) == USE)
1893 mark_used_regs (old, live, SET_DEST (XEXP (note, 0)),
1894 final, insn);
1895
d7429b6a 1896 /* Each call clobbers all call-clobbered regs that are not
e4329280 1897 global or fixed. Note that the function-value reg is a
d7429b6a
RK
1898 call-clobbered reg, and mark_set_regs has already had
1899 a chance to handle it. */
1900
1901 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e4329280
RK
1902 if (call_used_regs[i] && ! global_regs[i]
1903 && ! fixed_regs[i])
916b1701 1904 SET_REGNO_REG_SET (dead, i);
d7429b6a
RK
1905
1906 /* The stack ptr is used (honorarily) by a CALL insn. */
916b1701 1907 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
1908
1909 /* Calls may also reference any of the global registers,
1910 so they are made live. */
d7429b6a
RK
1911 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1912 if (global_regs[i])
9b316aa2 1913 mark_used_regs (old, live,
38a448ca 1914 gen_rtx_REG (reg_raw_mode[i], i),
9b316aa2 1915 final, insn);
d7429b6a
RK
1916
1917 /* Calls also clobber memory. */
1918 last_mem_set = 0;
1919 }
1920
1921 /* Update OLD for the registers used or set. */
916b1701
MM
1922 AND_COMPL_REG_SET (old, dead);
1923 IOR_REG_SET (old, live);
d7429b6a 1924
d7429b6a
RK
1925 }
1926
f8dd7f98
BS
1927 /* On final pass, update counts of how many insns each reg is live
1928 at. */
d7429b6a 1929 if (final)
f8dd7f98
BS
1930 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
1931 { REG_LIVE_LENGTH (i)++; });
d7429b6a
RK
1932 }
1933 flushed: ;
1934 if (insn == first)
1935 break;
1936 }
1937
67f0e213
RK
1938 FREE_REG_SET (dead);
1939 FREE_REG_SET (live);
d7429b6a
RK
1940}
1941\f
1942/* Return 1 if X (the body of an insn, or part of it) is just dead stores
1943 (SET expressions whose destinations are registers dead after the insn).
1944 NEEDED is the regset that says which regs are alive after the insn.
1945
e398aa80
R
1946 Unless CALL_OK is non-zero, an insn is needed if it contains a CALL.
1947
1948 If X is the entire body of an insn, NOTES contains the reg notes
1949 pertaining to the insn. */
d7429b6a
RK
1950
1951static int
e398aa80 1952insn_dead_p (x, needed, call_ok, notes)
d7429b6a
RK
1953 rtx x;
1954 regset needed;
1955 int call_ok;
e398aa80 1956 rtx notes ATTRIBUTE_UNUSED;
d7429b6a 1957{
e5e809f4
JL
1958 enum rtx_code code = GET_CODE (x);
1959
e398aa80
R
1960#ifdef AUTO_INC_DEC
1961 /* If flow is invoked after reload, we must take existing AUTO_INC
1962 expresions into account. */
1963 if (reload_completed)
1964 {
1965 for ( ; notes; notes = XEXP (notes, 1))
1966 {
1967 if (REG_NOTE_KIND (notes) == REG_INC)
1968 {
1969 int regno = REGNO (XEXP (notes, 0));
1970
1971 /* Don't delete insns to set global regs. */
1972 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1973 || REGNO_REG_SET_P (needed, regno))
1974 return 0;
1975 }
1976 }
1977 }
1978#endif
1979
d7429b6a
RK
1980 /* If setting something that's a reg or part of one,
1981 see if that register's altered value will be live. */
1982
1983 if (code == SET)
1984 {
e5e809f4
JL
1985 rtx r = SET_DEST (x);
1986
d7429b6a
RK
1987 /* A SET that is a subroutine call cannot be dead. */
1988 if (! call_ok && GET_CODE (SET_SRC (x)) == CALL)
1989 return 0;
1990
1991#ifdef HAVE_cc0
1992 if (GET_CODE (r) == CC0)
1993 return ! cc0_live;
1994#endif
1995
1996 if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r)
1997 && rtx_equal_p (r, last_mem_set))
1998 return 1;
1999
e5e809f4
JL
2000 while (GET_CODE (r) == SUBREG || GET_CODE (r) == STRICT_LOW_PART
2001 || GET_CODE (r) == ZERO_EXTRACT)
d7429b6a
RK
2002 r = SUBREG_REG (r);
2003
2004 if (GET_CODE (r) == REG)
2005 {
e5e809f4 2006 int regno = REGNO (r);
d7429b6a 2007
d8c8b8e3 2008 /* Don't delete insns to set global regs. */
d7429b6a
RK
2009 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2010 /* Make sure insns to set frame pointer aren't deleted. */
2011 || regno == FRAME_POINTER_REGNUM
73a187c1
DE
2012#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2013 || regno == HARD_FRAME_POINTER_REGNUM
2014#endif
d7e4fe8b
RS
2015#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2016 /* Make sure insns to set arg pointer are never deleted
2017 (if the arg pointer isn't fixed, there will be a USE for
0f41302f 2018 it, so we can treat it normally). */
d7e4fe8b
RS
2019 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2020#endif
916b1701 2021 || REGNO_REG_SET_P (needed, regno))
d7429b6a
RK
2022 return 0;
2023
2024 /* If this is a hard register, verify that subsequent words are
2025 not needed. */
2026 if (regno < FIRST_PSEUDO_REGISTER)
2027 {
2028 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
2029
2030 while (--n > 0)
916b1701 2031 if (REGNO_REG_SET_P (needed, regno+n))
d7429b6a
RK
2032 return 0;
2033 }
2034
2035 return 1;
2036 }
2037 }
e5e809f4 2038
d7429b6a
RK
2039 /* If performing several activities,
2040 insn is dead if each activity is individually dead.
2041 Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
2042 that's inside a PARALLEL doesn't make the insn worth keeping. */
2043 else if (code == PARALLEL)
2044 {
e5e809f4
JL
2045 int i = XVECLEN (x, 0);
2046
d7429b6a 2047 for (i--; i >= 0; i--)
e5e809f4
JL
2048 if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER
2049 && GET_CODE (XVECEXP (x, 0, i)) != USE
e398aa80 2050 && ! insn_dead_p (XVECEXP (x, 0, i), needed, call_ok, NULL_RTX))
e5e809f4
JL
2051 return 0;
2052
d7429b6a
RK
2053 return 1;
2054 }
e5e809f4
JL
2055
2056 /* A CLOBBER of a pseudo-register that is dead serves no purpose. That
2057 is not necessarily true for hard registers. */
2058 else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == REG
2059 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER
2060 && ! REGNO_REG_SET_P (needed, REGNO (XEXP (x, 0))))
2061 return 1;
2062
2063 /* We do not check other CLOBBER or USE here. An insn consisting of just
2064 a CLOBBER or just a USE should not be deleted. */
d7429b6a
RK
2065 return 0;
2066}
2067
2068/* If X is the pattern of the last insn in a libcall, and assuming X is dead,
2069 return 1 if the entire library call is dead.
2070 This is true if X copies a register (hard or pseudo)
2071 and if the hard return reg of the call insn is dead.
2072 (The caller should have tested the destination of X already for death.)
2073
2074 If this insn doesn't just copy a register, then we don't
2075 have an ordinary libcall. In that case, cse could not have
2076 managed to substitute the source for the dest later on,
2077 so we can assume the libcall is dead.
2078
2079 NEEDED is the bit vector of pseudoregs live before this insn.
2080 NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */
2081
2082static int
2083libcall_dead_p (x, needed, note, insn)
2084 rtx x;
2085 regset needed;
2086 rtx note;
2087 rtx insn;
2088{
2089 register RTX_CODE code = GET_CODE (x);
2090
2091 if (code == SET)
2092 {
2093 register rtx r = SET_SRC (x);
2094 if (GET_CODE (r) == REG)
2095 {
2096 rtx call = XEXP (note, 0);
e398aa80 2097 rtx call_pat;
d7429b6a
RK
2098 register int i;
2099
2100 /* Find the call insn. */
2101 while (call != insn && GET_CODE (call) != CALL_INSN)
2102 call = NEXT_INSN (call);
2103
2104 /* If there is none, do nothing special,
2105 since ordinary death handling can understand these insns. */
2106 if (call == insn)
2107 return 0;
2108
2109 /* See if the hard reg holding the value is dead.
2110 If this is a PARALLEL, find the call within it. */
e398aa80
R
2111 call_pat = PATTERN (call);
2112 if (GET_CODE (call_pat) == PARALLEL)
d7429b6a 2113 {
e398aa80
R
2114 for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--)
2115 if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET
2116 && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL)
d7429b6a
RK
2117 break;
2118
761a5bcd
JW
2119 /* This may be a library call that is returning a value
2120 via invisible pointer. Do nothing special, since
2121 ordinary death handling can understand these insns. */
d7429b6a 2122 if (i < 0)
761a5bcd 2123 return 0;
d7429b6a 2124
e398aa80 2125 call_pat = XVECEXP (call_pat, 0, i);
d7429b6a
RK
2126 }
2127
e398aa80 2128 return insn_dead_p (call_pat, needed, 1, REG_NOTES (call));
d7429b6a
RK
2129 }
2130 }
2131 return 1;
2132}
2133
bd80fbde
RH
2134/* Return 1 if register REGNO was used before it was set, i.e. if it is
2135 live at function entry. Don't count global register variables, variables
2136 in registers that can be used for function arg passing, or variables in
2137 fixed hard registers. */
d7429b6a
RK
2138
2139int
2140regno_uninitialized (regno)
2141 int regno;
2142{
b0b7b46a 2143 if (n_basic_blocks == 0
6a45254e 2144 || (regno < FIRST_PSEUDO_REGISTER
bd80fbde
RH
2145 && (global_regs[regno]
2146 || fixed_regs[regno]
2147 || FUNCTION_ARG_REGNO_P (regno))))
d7429b6a
RK
2148 return 0;
2149
916b1701 2150 return REGNO_REG_SET_P (basic_block_live_at_start[0], regno);
d7429b6a
RK
2151}
2152
2153/* 1 if register REGNO was alive at a place where `setjmp' was called
2154 and was set more than once or is an argument.
2155 Such regs may be clobbered by `longjmp'. */
2156
2157int
2158regno_clobbered_at_setjmp (regno)
2159 int regno;
2160{
2161 if (n_basic_blocks == 0)
2162 return 0;
2163
b1f21e0a 2164 return ((REG_N_SETS (regno) > 1
916b1701
MM
2165 || REGNO_REG_SET_P (basic_block_live_at_start[0], regno))
2166 && REGNO_REG_SET_P (regs_live_at_setjmp, regno));
d7429b6a
RK
2167}
2168\f
2169/* Process the registers that are set within X.
2170 Their bits are set to 1 in the regset DEAD,
2171 because they are dead prior to this insn.
2172
2173 If INSN is nonzero, it is the insn being processed
2174 and the fact that it is nonzero implies this is the FINAL pass
2175 in propagate_block. In this case, various info about register
2176 usage is stored, LOG_LINKS fields of insns are set up. */
2177
d7429b6a
RK
2178static void
2179mark_set_regs (needed, dead, x, insn, significant)
2180 regset needed;
2181 regset dead;
2182 rtx x;
2183 rtx insn;
2184 regset significant;
2185{
2186 register RTX_CODE code = GET_CODE (x);
2187
2188 if (code == SET || code == CLOBBER)
2189 mark_set_1 (needed, dead, x, insn, significant);
2190 else if (code == PARALLEL)
2191 {
2192 register int i;
2193 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
2194 {
2195 code = GET_CODE (XVECEXP (x, 0, i));
2196 if (code == SET || code == CLOBBER)
2197 mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
2198 }
2199 }
2200}
2201
2202/* Process a single SET rtx, X. */
2203
2204static void
2205mark_set_1 (needed, dead, x, insn, significant)
2206 regset needed;
2207 regset dead;
2208 rtx x;
2209 rtx insn;
2210 regset significant;
2211{
2212 register int regno;
2213 register rtx reg = SET_DEST (x);
2214
86465af7
DM
2215 /* Some targets place small structures in registers for
2216 return values of functions. We have to detect this
2217 case specially here to get correct flow information. */
2218 if (GET_CODE (reg) == PARALLEL
2219 && GET_MODE (reg) == BLKmode)
2220 {
2221 register int i;
2222
2223 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
2224 mark_set_1 (needed, dead, XVECEXP (reg, 0, i), insn, significant);
2225 return;
2226 }
2227
d7429b6a
RK
2228 /* Modifying just one hardware register of a multi-reg value
2229 or just a byte field of a register
2230 does not mean the value from before this insn is now dead.
2231 But it does mean liveness of that register at the end of the block
2232 is significant.
2233
2234 Within mark_set_1, however, we treat it as if the register is
2235 indeed modified. mark_used_regs will, however, also treat this
2236 register as being used. Thus, we treat these insns as setting a
2237 new value for the register as a function of its old value. This
2238 cases LOG_LINKS to be made appropriately and this will help combine. */
2239
2240 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
2241 || GET_CODE (reg) == SIGN_EXTRACT
2242 || GET_CODE (reg) == STRICT_LOW_PART)
2243 reg = XEXP (reg, 0);
2244
2245 /* If we are writing into memory or into a register mentioned in the
2246 address of the last thing stored into memory, show we don't know
2247 what the last store was. If we are writing memory, save the address
2248 unless it is volatile. */
2249 if (GET_CODE (reg) == MEM
2250 || (GET_CODE (reg) == REG
2251 && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set)))
2252 last_mem_set = 0;
2253
2254 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
2255 /* There are no REG_INC notes for SP, so we can't assume we'll see
2256 everything that invalidates it. To be safe, don't eliminate any
2257 stores though SP; none of them should be redundant anyway. */
2258 && ! reg_mentioned_p (stack_pointer_rtx, reg))
2259 last_mem_set = reg;
2260
2261 if (GET_CODE (reg) == REG
2262 && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
2263#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2264 && regno != HARD_FRAME_POINTER_REGNUM
2265#endif
d7e4fe8b
RS
2266#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2267 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2268#endif
d7429b6a
RK
2269 && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
2270 /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
2271 {
916b1701
MM
2272 int some_needed = REGNO_REG_SET_P (needed, regno);
2273 int some_not_needed = ! some_needed;
d7429b6a
RK
2274
2275 /* Mark it as a significant register for this basic block. */
2276 if (significant)
916b1701 2277 SET_REGNO_REG_SET (significant, regno);
d7429b6a 2278
38e01259 2279 /* Mark it as dead before this insn. */
916b1701 2280 SET_REGNO_REG_SET (dead, regno);
d7429b6a
RK
2281
2282 /* A hard reg in a wide mode may really be multiple registers.
2283 If so, mark all of them just like the first. */
2284 if (regno < FIRST_PSEUDO_REGISTER)
2285 {
2286 int n;
2287
2288 /* Nothing below is needed for the stack pointer; get out asap.
2289 Eg, log links aren't needed, since combine won't use them. */
2290 if (regno == STACK_POINTER_REGNUM)
2291 return;
2292
2293 n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
2294 while (--n > 0)
2295 {
916b1701
MM
2296 int regno_n = regno + n;
2297 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
d7429b6a 2298 if (significant)
916b1701 2299 SET_REGNO_REG_SET (significant, regno_n);
cb9e8ad1 2300
916b1701
MM
2301 SET_REGNO_REG_SET (dead, regno_n);
2302 some_needed |= needed_regno;
2303 some_not_needed |= ! needed_regno;
d7429b6a
RK
2304 }
2305 }
2306 /* Additional data to record if this is the final pass. */
2307 if (insn)
2308 {
2309 register rtx y = reg_next_use[regno];
2310 register int blocknum = BLOCK_NUM (insn);
2311
2312 /* If this is a hard reg, record this function uses the reg. */
2313
2314 if (regno < FIRST_PSEUDO_REGISTER)
2315 {
2316 register int i;
2317 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
2318
2319 for (i = regno; i < endregno; i++)
2320 {
93514916
JW
2321 /* The next use is no longer "next", since a store
2322 intervenes. */
2323 reg_next_use[i] = 0;
2324
d7429b6a 2325 regs_ever_live[i] = 1;
b1f21e0a 2326 REG_N_SETS (i)++;
d7429b6a
RK
2327 }
2328 }
2329 else
2330 {
93514916
JW
2331 /* The next use is no longer "next", since a store
2332 intervenes. */
2333 reg_next_use[regno] = 0;
2334
d7429b6a
RK
2335 /* Keep track of which basic blocks each reg appears in. */
2336
b1f21e0a
MM
2337 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
2338 REG_BASIC_BLOCK (regno) = blocknum;
2339 else if (REG_BASIC_BLOCK (regno) != blocknum)
2340 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
2341
2342 /* Count (weighted) references, stores, etc. This counts a
2343 register twice if it is modified, but that is correct. */
b1f21e0a 2344 REG_N_SETS (regno)++;
d7429b6a 2345
b1f21e0a 2346 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
2347
2348 /* The insns where a reg is live are normally counted
2349 elsewhere, but we want the count to include the insn
2350 where the reg is set, and the normal counting mechanism
2351 would not count it. */
b1f21e0a 2352 REG_LIVE_LENGTH (regno)++;
d7429b6a
RK
2353 }
2354
cb9e8ad1 2355 if (! some_not_needed)
d7429b6a
RK
2356 {
2357 /* Make a logical link from the next following insn
2358 that uses this register, back to this insn.
2359 The following insns have already been processed.
2360
2361 We don't build a LOG_LINK for hard registers containing
2362 in ASM_OPERANDs. If these registers get replaced,
2363 we might wind up changing the semantics of the insn,
2364 even if reload can make what appear to be valid assignments
2365 later. */
2366 if (y && (BLOCK_NUM (y) == blocknum)
2367 && (regno >= FIRST_PSEUDO_REGISTER
2368 || asm_noperands (PATTERN (y)) < 0))
2369 LOG_LINKS (y)
38a448ca 2370 = gen_rtx_INSN_LIST (VOIDmode, insn, LOG_LINKS (y));
d7429b6a
RK
2371 }
2372 else if (! some_needed)
2373 {
2374 /* Note that dead stores have already been deleted when possible
2375 If we get here, we have found a dead store that cannot
2376 be eliminated (because the same insn does something useful).
2377 Indicate this by marking the reg being set as dying here. */
2378 REG_NOTES (insn)
38a448ca 2379 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
b1f21e0a 2380 REG_N_DEATHS (REGNO (reg))++;
d7429b6a
RK
2381 }
2382 else
2383 {
2384 /* This is a case where we have a multi-word hard register
2385 and some, but not all, of the words of the register are
2386 needed in subsequent insns. Write REG_UNUSED notes
2387 for those parts that were not needed. This case should
2388 be rare. */
2389
2390 int i;
2391
2392 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
2393 i >= 0; i--)
916b1701 2394 if (!REGNO_REG_SET_P (needed, regno + i))
d7429b6a 2395 REG_NOTES (insn)
38a448ca
RH
2396 = gen_rtx_EXPR_LIST (REG_UNUSED,
2397 gen_rtx_REG (reg_raw_mode[regno + i],
2398 regno + i),
2399 REG_NOTES (insn));
d7429b6a
RK
2400 }
2401 }
2402 }
8244fc4f
RS
2403 else if (GET_CODE (reg) == REG)
2404 reg_next_use[regno] = 0;
d7429b6a
RK
2405
2406 /* If this is the last pass and this is a SCRATCH, show it will be dying
2407 here and count it. */
2408 else if (GET_CODE (reg) == SCRATCH && insn != 0)
2409 {
2410 REG_NOTES (insn)
38a448ca 2411 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
d7429b6a
RK
2412 }
2413}
2414\f
2415#ifdef AUTO_INC_DEC
2416
2417/* X is a MEM found in INSN. See if we can convert it into an auto-increment
2418 reference. */
2419
2420static void
2421find_auto_inc (needed, x, insn)
2422 regset needed;
2423 rtx x;
2424 rtx insn;
2425{
2426 rtx addr = XEXP (x, 0);
e658434c 2427 HOST_WIDE_INT offset = 0;
05ed5d57 2428 rtx set;
d7429b6a
RK
2429
2430 /* Here we detect use of an index register which might be good for
2431 postincrement, postdecrement, preincrement, or predecrement. */
2432
2433 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2434 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
2435
2436 if (GET_CODE (addr) == REG)
2437 {
2438 register rtx y;
2439 register int size = GET_MODE_SIZE (GET_MODE (x));
2440 rtx use;
2441 rtx incr;
2442 int regno = REGNO (addr);
2443
2444 /* Is the next use an increment that might make auto-increment? */
05ed5d57
RK
2445 if ((incr = reg_next_use[regno]) != 0
2446 && (set = single_set (incr)) != 0
2447 && GET_CODE (set) == SET
d7429b6a
RK
2448 && BLOCK_NUM (incr) == BLOCK_NUM (insn)
2449 /* Can't add side effects to jumps; if reg is spilled and
2450 reloaded, there's no way to store back the altered value. */
2451 && GET_CODE (insn) != JUMP_INSN
05ed5d57 2452 && (y = SET_SRC (set), GET_CODE (y) == PLUS)
d7429b6a
RK
2453 && XEXP (y, 0) == addr
2454 && GET_CODE (XEXP (y, 1)) == CONST_INT
940da324
JL
2455 && ((HAVE_POST_INCREMENT
2456 && (INTVAL (XEXP (y, 1)) == size && offset == 0))
2457 || (HAVE_POST_DECREMENT
2458 && (INTVAL (XEXP (y, 1)) == - size && offset == 0))
2459 || (HAVE_PRE_INCREMENT
2460 && (INTVAL (XEXP (y, 1)) == size && offset == size))
2461 || (HAVE_PRE_DECREMENT
2462 && (INTVAL (XEXP (y, 1)) == - size && offset == - size)))
d7429b6a
RK
2463 /* Make sure this reg appears only once in this insn. */
2464 && (use = find_use_as_address (PATTERN (insn), addr, offset),
2465 use != 0 && use != (rtx) 1))
2466 {
05ed5d57 2467 rtx q = SET_DEST (set);
7280c2a4
RK
2468 enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size
2469 ? (offset ? PRE_INC : POST_INC)
2470 : (offset ? PRE_DEC : POST_DEC));
d7429b6a
RK
2471
2472 if (dead_or_set_p (incr, addr))
7280c2a4
RK
2473 {
2474 /* This is the simple case. Try to make the auto-inc. If
2475 we can't, we are done. Otherwise, we will do any
2476 needed updates below. */
2477 if (! validate_change (insn, &XEXP (x, 0),
38a448ca 2478 gen_rtx_fmt_e (inc_code, Pmode, addr),
7280c2a4
RK
2479 0))
2480 return;
2481 }
5175ad37
DE
2482 else if (GET_CODE (q) == REG
2483 /* PREV_INSN used here to check the semi-open interval
2484 [insn,incr). */
b24884cd
JL
2485 && ! reg_used_between_p (q, PREV_INSN (insn), incr)
2486 /* We must also check for sets of q as q may be
2487 a call clobbered hard register and there may
2488 be a call between PREV_INSN (insn) and incr. */
2489 && ! reg_set_between_p (q, PREV_INSN (insn), incr))
d7429b6a 2490 {
5175ad37 2491 /* We have *p followed sometime later by q = p+size.
d7429b6a 2492 Both p and q must be live afterward,
9ec36da5 2493 and q is not used between INSN and its assignment.
d7429b6a
RK
2494 Change it to q = p, ...*q..., q = q+size.
2495 Then fall into the usual case. */
2496 rtx insns, temp;
2497
2498 start_sequence ();
2499 emit_move_insn (q, addr);
2500 insns = get_insns ();
2501 end_sequence ();
2502
2503 /* If anything in INSNS have UID's that don't fit within the
2504 extra space we allocate earlier, we can't make this auto-inc.
2505 This should never happen. */
2506 for (temp = insns; temp; temp = NEXT_INSN (temp))
2507 {
2508 if (INSN_UID (temp) > max_uid_for_flow)
2509 return;
2510 BLOCK_NUM (temp) = BLOCK_NUM (insn);
2511 }
2512
7280c2a4
RK
2513 /* If we can't make the auto-inc, or can't make the
2514 replacement into Y, exit. There's no point in making
2515 the change below if we can't do the auto-inc and doing
2516 so is not correct in the pre-inc case. */
2517
2518 validate_change (insn, &XEXP (x, 0),
38a448ca 2519 gen_rtx_fmt_e (inc_code, Pmode, q),
7280c2a4
RK
2520 1);
2521 validate_change (incr, &XEXP (y, 0), q, 1);
2522 if (! apply_change_group ())
2523 return;
2524
2525 /* We now know we'll be doing this change, so emit the
2526 new insn(s) and do the updates. */
d7429b6a 2527 emit_insns_before (insns, insn);
e8b641a1
RK
2528
2529 if (basic_block_head[BLOCK_NUM (insn)] == insn)
2530 basic_block_head[BLOCK_NUM (insn)] = insns;
2531
d7429b6a
RK
2532 /* INCR will become a NOTE and INSN won't contain a
2533 use of ADDR. If a use of ADDR was just placed in
2534 the insn before INSN, make that the next use.
2535 Otherwise, invalidate it. */
2536 if (GET_CODE (PREV_INSN (insn)) == INSN
2537 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
2538 && SET_SRC (PATTERN (PREV_INSN (insn))) == addr)
2539 reg_next_use[regno] = PREV_INSN (insn);
2540 else
2541 reg_next_use[regno] = 0;
2542
2543 addr = q;
2544 regno = REGNO (q);
d7429b6a
RK
2545
2546 /* REGNO is now used in INCR which is below INSN, but
2547 it previously wasn't live here. If we don't mark
2548 it as needed, we'll put a REG_DEAD note for it
2549 on this insn, which is incorrect. */
916b1701 2550 SET_REGNO_REG_SET (needed, regno);
d7429b6a
RK
2551
2552 /* If there are any calls between INSN and INCR, show
2553 that REGNO now crosses them. */
2554 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
2555 if (GET_CODE (temp) == CALL_INSN)
b1f21e0a 2556 REG_N_CALLS_CROSSED (regno)++;
d7429b6a 2557 }
02df8aba
RK
2558 else
2559 return;
d7429b6a 2560
7280c2a4
RK
2561 /* If we haven't returned, it means we were able to make the
2562 auto-inc, so update the status. First, record that this insn
2563 has an implicit side effect. */
2564
2565 REG_NOTES (insn)
38a448ca 2566 = gen_rtx_EXPR_LIST (REG_INC, addr, REG_NOTES (insn));
7280c2a4
RK
2567
2568 /* Modify the old increment-insn to simply copy
2569 the already-incremented value of our register. */
2570 if (! validate_change (incr, &SET_SRC (set), addr, 0))
2571 abort ();
2572
2573 /* If that makes it a no-op (copying the register into itself) delete
2574 it so it won't appear to be a "use" and a "set" of this
2575 register. */
2576 if (SET_DEST (set) == addr)
d7429b6a 2577 {
7280c2a4
RK
2578 PUT_CODE (incr, NOTE);
2579 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
2580 NOTE_SOURCE_FILE (incr) = 0;
2581 }
d7429b6a 2582
7280c2a4
RK
2583 if (regno >= FIRST_PSEUDO_REGISTER)
2584 {
2585 /* Count an extra reference to the reg. When a reg is
2586 incremented, spilling it is worse, so we want to make
2587 that less likely. */
b1f21e0a 2588 REG_N_REFS (regno) += loop_depth;
7280c2a4
RK
2589
2590 /* Count the increment as a setting of the register,
2591 even though it isn't a SET in rtl. */
b1f21e0a 2592 REG_N_SETS (regno)++;
d7429b6a
RK
2593 }
2594 }
2595 }
2596}
2597#endif /* AUTO_INC_DEC */
2598\f
2599/* Scan expression X and store a 1-bit in LIVE for each reg it uses.
2600 This is done assuming the registers needed from X
2601 are those that have 1-bits in NEEDED.
2602
2603 On the final pass, FINAL is 1. This means try for autoincrement
2604 and count the uses and deaths of each pseudo-reg.
2605
2606 INSN is the containing instruction. If INSN is dead, this function is not
2607 called. */
2608
2609static void
2610mark_used_regs (needed, live, x, final, insn)
2611 regset needed;
2612 regset live;
2613 rtx x;
d7429b6a 2614 int final;
e658434c 2615 rtx insn;
d7429b6a
RK
2616{
2617 register RTX_CODE code;
2618 register int regno;
2619 int i;
2620
2621 retry:
2622 code = GET_CODE (x);
2623 switch (code)
2624 {
2625 case LABEL_REF:
2626 case SYMBOL_REF:
2627 case CONST_INT:
2628 case CONST:
2629 case CONST_DOUBLE:
2630 case PC:
d7429b6a
RK
2631 case ADDR_VEC:
2632 case ADDR_DIFF_VEC:
2633 case ASM_INPUT:
2634 return;
2635
2636#ifdef HAVE_cc0
2637 case CC0:
2638 cc0_live = 1;
2639 return;
2640#endif
2641
2f1553a4
RK
2642 case CLOBBER:
2643 /* If we are clobbering a MEM, mark any registers inside the address
2644 as being used. */
2645 if (GET_CODE (XEXP (x, 0)) == MEM)
2646 mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn);
2647 return;
2648
d7429b6a 2649 case MEM:
7eb136d6
MM
2650 /* Invalidate the data for the last MEM stored, but only if MEM is
2651 something that can be stored into. */
2652 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2653 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
2654 ; /* needn't clear last_mem_set */
2655 else
2656 last_mem_set = 0;
d7429b6a
RK
2657
2658#ifdef AUTO_INC_DEC
2659 if (final)
2660 find_auto_inc (needed, x, insn);
2661#endif
2662 break;
2663
80f8f04a
RK
2664 case SUBREG:
2665 if (GET_CODE (SUBREG_REG (x)) == REG
2666 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
2667 && (GET_MODE_SIZE (GET_MODE (x))
88285acf 2668 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
b1f21e0a 2669 REG_CHANGES_SIZE (REGNO (SUBREG_REG (x))) = 1;
80f8f04a
RK
2670
2671 /* While we're here, optimize this case. */
2672 x = SUBREG_REG (x);
2673
e100a3bb 2674 /* In case the SUBREG is not of a register, don't optimize */
ce79abf3 2675 if (GET_CODE (x) != REG)
e100a3bb
MM
2676 {
2677 mark_used_regs (needed, live, x, final, insn);
2678 return;
2679 }
ce79abf3 2680
0f41302f 2681 /* ... fall through ... */
80f8f04a 2682
d7429b6a
RK
2683 case REG:
2684 /* See a register other than being set
2685 => mark it as needed. */
2686
2687 regno = REGNO (x);
2688 {
67f0e213
RK
2689 int some_needed = REGNO_REG_SET_P (needed, regno);
2690 int some_not_needed = ! some_needed;
d7429b6a 2691
916b1701 2692 SET_REGNO_REG_SET (live, regno);
cb9e8ad1 2693
d7429b6a
RK
2694 /* A hard reg in a wide mode may really be multiple registers.
2695 If so, mark all of them just like the first. */
2696 if (regno < FIRST_PSEUDO_REGISTER)
2697 {
2698 int n;
2699
d7e4fe8b 2700 /* For stack ptr or fixed arg pointer,
d7429b6a
RK
2701 nothing below can be necessary, so waste no more time. */
2702 if (regno == STACK_POINTER_REGNUM
73a187c1
DE
2703#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2704 || regno == HARD_FRAME_POINTER_REGNUM
2705#endif
d7e4fe8b
RS
2706#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2707 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2708#endif
d7429b6a
RK
2709 || regno == FRAME_POINTER_REGNUM)
2710 {
2711 /* If this is a register we are going to try to eliminate,
2712 don't mark it live here. If we are successful in
2713 eliminating it, it need not be live unless it is used for
2714 pseudos, in which case it will have been set live when
2715 it was allocated to the pseudos. If the register will not
2716 be eliminated, reload will set it live at that point. */
2717
2718 if (! TEST_HARD_REG_BIT (elim_reg_set, regno))
2719 regs_ever_live[regno] = 1;
2720 return;
2721 }
2722 /* No death notes for global register variables;
2723 their values are live after this function exits. */
2724 if (global_regs[regno])
d8c8b8e3
RS
2725 {
2726 if (final)
2727 reg_next_use[regno] = insn;
2728 return;
2729 }
d7429b6a
RK
2730
2731 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
2732 while (--n > 0)
2733 {
916b1701
MM
2734 int regno_n = regno + n;
2735 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
cb9e8ad1 2736
916b1701
MM
2737 SET_REGNO_REG_SET (live, regno_n);
2738 some_needed |= needed_regno;
931c6c7a 2739 some_not_needed |= ! needed_regno;
d7429b6a
RK
2740 }
2741 }
2742 if (final)
2743 {
2744 /* Record where each reg is used, so when the reg
2745 is set we know the next insn that uses it. */
2746
2747 reg_next_use[regno] = insn;
2748
2749 if (regno < FIRST_PSEUDO_REGISTER)
2750 {
2751 /* If a hard reg is being used,
2752 record that this function does use it. */
2753
2754 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
2755 if (i == 0)
2756 i = 1;
2757 do
2758 regs_ever_live[regno + --i] = 1;
2759 while (i > 0);
2760 }
2761 else
2762 {
2763 /* Keep track of which basic block each reg appears in. */
2764
2765 register int blocknum = BLOCK_NUM (insn);
2766
b1f21e0a
MM
2767 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
2768 REG_BASIC_BLOCK (regno) = blocknum;
2769 else if (REG_BASIC_BLOCK (regno) != blocknum)
2770 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
2771
2772 /* Count (weighted) number of uses of each reg. */
2773
b1f21e0a 2774 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
2775 }
2776
2777 /* Record and count the insns in which a reg dies.
2778 If it is used in this insn and was dead below the insn
2779 then it dies in this insn. If it was set in this insn,
2780 we do not make a REG_DEAD note; likewise if we already
2781 made such a note. */
2782
cb9e8ad1 2783 if (some_not_needed
d7429b6a
RK
2784 && ! dead_or_set_p (insn, x)
2785#if 0
2786 && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
2787#endif
2788 )
2789 {
ab28041e
JW
2790 /* Check for the case where the register dying partially
2791 overlaps the register set by this insn. */
2792 if (regno < FIRST_PSEUDO_REGISTER
2793 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
2794 {
480eac3b 2795 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
ab28041e
JW
2796 while (--n >= 0)
2797 some_needed |= dead_or_set_regno_p (insn, regno + n);
2798 }
2799
d7429b6a
RK
2800 /* If none of the words in X is needed, make a REG_DEAD
2801 note. Otherwise, we must make partial REG_DEAD notes. */
2802 if (! some_needed)
2803 {
2804 REG_NOTES (insn)
38a448ca 2805 = gen_rtx_EXPR_LIST (REG_DEAD, x, REG_NOTES (insn));
b1f21e0a 2806 REG_N_DEATHS (regno)++;
d7429b6a
RK
2807 }
2808 else
2809 {
2810 int i;
2811
2812 /* Don't make a REG_DEAD note for a part of a register
2813 that is set in the insn. */
2814
2815 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
2816 i >= 0; i--)
916b1701 2817 if (!REGNO_REG_SET_P (needed, regno + i)
d7429b6a
RK
2818 && ! dead_or_set_regno_p (insn, regno + i))
2819 REG_NOTES (insn)
38a448ca
RH
2820 = gen_rtx_EXPR_LIST (REG_DEAD,
2821 gen_rtx_REG (reg_raw_mode[regno + i],
2822 regno + i),
2823 REG_NOTES (insn));
d7429b6a
RK
2824 }
2825 }
2826 }
2827 }
2828 return;
2829
2830 case SET:
2831 {
2832 register rtx testreg = SET_DEST (x);
2833 int mark_dest = 0;
2834
2835 /* If storing into MEM, don't show it as being used. But do
2836 show the address as being used. */
2837 if (GET_CODE (testreg) == MEM)
2838 {
2839#ifdef AUTO_INC_DEC
2840 if (final)
2841 find_auto_inc (needed, testreg, insn);
2842#endif
2843 mark_used_regs (needed, live, XEXP (testreg, 0), final, insn);
2844 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2845 return;
2846 }
2847
2848 /* Storing in STRICT_LOW_PART is like storing in a reg
2849 in that this SET might be dead, so ignore it in TESTREG.
2850 but in some other ways it is like using the reg.
2851
2852 Storing in a SUBREG or a bit field is like storing the entire
2853 register in that if the register's value is not used
2854 then this SET is not needed. */
2855 while (GET_CODE (testreg) == STRICT_LOW_PART
2856 || GET_CODE (testreg) == ZERO_EXTRACT
2857 || GET_CODE (testreg) == SIGN_EXTRACT
2858 || GET_CODE (testreg) == SUBREG)
2859 {
88285acf
RK
2860 if (GET_CODE (testreg) == SUBREG
2861 && GET_CODE (SUBREG_REG (testreg)) == REG
2862 && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER
2863 && (GET_MODE_SIZE (GET_MODE (testreg))
2864 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg)))))
b1f21e0a 2865 REG_CHANGES_SIZE (REGNO (SUBREG_REG (testreg))) = 1;
88285acf 2866
d7429b6a
RK
2867 /* Modifying a single register in an alternate mode
2868 does not use any of the old value. But these other
2869 ways of storing in a register do use the old value. */
2870 if (GET_CODE (testreg) == SUBREG
2871 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
2872 ;
2873 else
2874 mark_dest = 1;
2875
2876 testreg = XEXP (testreg, 0);
2877 }
2878
2879 /* If this is a store into a register,
2880 recursively scan the value being stored. */
2881
86465af7
DM
2882 if ((GET_CODE (testreg) == PARALLEL
2883 && GET_MODE (testreg) == BLKmode)
2884 || (GET_CODE (testreg) == REG
2885 && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
73a187c1 2886#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
86465af7 2887 && regno != HARD_FRAME_POINTER_REGNUM
73a187c1 2888#endif
d7e4fe8b 2889#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
86465af7 2890 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
d7e4fe8b 2891#endif
86465af7 2892 ))
d8c8b8e3
RS
2893 /* We used to exclude global_regs here, but that seems wrong.
2894 Storing in them is like storing in mem. */
d7429b6a
RK
2895 {
2896 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2897 if (mark_dest)
2898 mark_used_regs (needed, live, SET_DEST (x), final, insn);
2899 return;
2900 }
2901 }
2902 break;
2903
2904 case RETURN:
2905 /* If exiting needs the right stack value, consider this insn as
2906 using the stack pointer. In any event, consider it as using
632c9d9e 2907 all global registers and all registers used by return. */
d7429b6a
RK
2908
2909#ifdef EXIT_IGNORE_STACK
2910 if (! EXIT_IGNORE_STACK
0200b5ed
JL
2911 || (! FRAME_POINTER_REQUIRED
2912 && ! current_function_calls_alloca
bfc5000a
JL
2913 && flag_omit_frame_pointer)
2914 || current_function_sp_is_unchanging)
d7429b6a 2915#endif
916b1701 2916 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
2917
2918 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
632c9d9e
MS
2919 if (global_regs[i]
2920#ifdef EPILOGUE_USES
2921 || EPILOGUE_USES (i)
2922#endif
2923 )
916b1701 2924 SET_REGNO_REG_SET (live, i);
d7429b6a 2925 break;
e9a25f70
JL
2926
2927 default:
2928 break;
d7429b6a
RK
2929 }
2930
2931 /* Recursively scan the operands of this expression. */
2932
2933 {
2934 register char *fmt = GET_RTX_FORMAT (code);
2935 register int i;
2936
2937 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2938 {
2939 if (fmt[i] == 'e')
2940 {
2941 /* Tail recursive case: save a function call level. */
2942 if (i == 0)
2943 {
2944 x = XEXP (x, 0);
2945 goto retry;
2946 }
2947 mark_used_regs (needed, live, XEXP (x, i), final, insn);
2948 }
2949 else if (fmt[i] == 'E')
2950 {
2951 register int j;
2952 for (j = 0; j < XVECLEN (x, i); j++)
2953 mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
2954 }
2955 }
2956 }
2957}
2958\f
2959#ifdef AUTO_INC_DEC
2960
2961static int
2962try_pre_increment_1 (insn)
2963 rtx insn;
2964{
2965 /* Find the next use of this reg. If in same basic block,
2966 make it do pre-increment or pre-decrement if appropriate. */
956d6950 2967 rtx x = single_set (insn);
5f4f0e22 2968 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
d7429b6a
RK
2969 * INTVAL (XEXP (SET_SRC (x), 1)));
2970 int regno = REGNO (SET_DEST (x));
2971 rtx y = reg_next_use[regno];
2972 if (y != 0
2973 && BLOCK_NUM (y) == BLOCK_NUM (insn)
89861c38 2974 /* Don't do this if the reg dies, or gets set in y; a standard addressing
0f41302f 2975 mode would be better. */
89861c38 2976 && ! dead_or_set_p (y, SET_DEST (x))
956d6950 2977 && try_pre_increment (y, SET_DEST (x), amount))
d7429b6a
RK
2978 {
2979 /* We have found a suitable auto-increment
2980 and already changed insn Y to do it.
2981 So flush this increment-instruction. */
2982 PUT_CODE (insn, NOTE);
2983 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2984 NOTE_SOURCE_FILE (insn) = 0;
2985 /* Count a reference to this reg for the increment
2986 insn we are deleting. When a reg is incremented.
2987 spilling it is worse, so we want to make that
2988 less likely. */
2989 if (regno >= FIRST_PSEUDO_REGISTER)
2990 {
b1f21e0a
MM
2991 REG_N_REFS (regno) += loop_depth;
2992 REG_N_SETS (regno)++;
d7429b6a
RK
2993 }
2994 return 1;
2995 }
2996 return 0;
2997}
2998
2999/* Try to change INSN so that it does pre-increment or pre-decrement
3000 addressing on register REG in order to add AMOUNT to REG.
3001 AMOUNT is negative for pre-decrement.
3002 Returns 1 if the change could be made.
3003 This checks all about the validity of the result of modifying INSN. */
3004
3005static int
3006try_pre_increment (insn, reg, amount)
3007 rtx insn, reg;
5f4f0e22 3008 HOST_WIDE_INT amount;
d7429b6a
RK
3009{
3010 register rtx use;
3011
3012 /* Nonzero if we can try to make a pre-increment or pre-decrement.
3013 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
3014 int pre_ok = 0;
3015 /* Nonzero if we can try to make a post-increment or post-decrement.
3016 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
3017 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
3018 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
3019 int post_ok = 0;
3020
3021 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
3022 int do_post = 0;
3023
3024 /* From the sign of increment, see which possibilities are conceivable
3025 on this target machine. */
940da324 3026 if (HAVE_PRE_INCREMENT && amount > 0)
d7429b6a 3027 pre_ok = 1;
940da324 3028 if (HAVE_POST_INCREMENT && amount > 0)
d7429b6a 3029 post_ok = 1;
d7429b6a 3030
940da324 3031 if (HAVE_PRE_DECREMENT && amount < 0)
d7429b6a 3032 pre_ok = 1;
940da324 3033 if (HAVE_POST_DECREMENT && amount < 0)
d7429b6a 3034 post_ok = 1;
d7429b6a
RK
3035
3036 if (! (pre_ok || post_ok))
3037 return 0;
3038
3039 /* It is not safe to add a side effect to a jump insn
3040 because if the incremented register is spilled and must be reloaded
3041 there would be no way to store the incremented value back in memory. */
3042
3043 if (GET_CODE (insn) == JUMP_INSN)
3044 return 0;
3045
3046 use = 0;
3047 if (pre_ok)
3048 use = find_use_as_address (PATTERN (insn), reg, 0);
3049 if (post_ok && (use == 0 || use == (rtx) 1))
3050 {
3051 use = find_use_as_address (PATTERN (insn), reg, -amount);
3052 do_post = 1;
3053 }
3054
3055 if (use == 0 || use == (rtx) 1)
3056 return 0;
3057
3058 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
3059 return 0;
3060
a0fbc3a9
SC
3061 /* See if this combination of instruction and addressing mode exists. */
3062 if (! validate_change (insn, &XEXP (use, 0),
38a448ca
RH
3063 gen_rtx_fmt_e (amount > 0
3064 ? (do_post ? POST_INC : PRE_INC)
3065 : (do_post ? POST_DEC : PRE_DEC),
3066 Pmode, reg), 0))
a0fbc3a9 3067 return 0;
d7429b6a
RK
3068
3069 /* Record that this insn now has an implicit side effect on X. */
38a448ca 3070 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg, REG_NOTES (insn));
d7429b6a
RK
3071 return 1;
3072}
3073
3074#endif /* AUTO_INC_DEC */
3075\f
3076/* Find the place in the rtx X where REG is used as a memory address.
3077 Return the MEM rtx that so uses it.
3078 If PLUSCONST is nonzero, search instead for a memory address equivalent to
3079 (plus REG (const_int PLUSCONST)).
3080
3081 If such an address does not appear, return 0.
3082 If REG appears more than once, or is used other than in such an address,
3083 return (rtx)1. */
3084
8c660648 3085rtx
d7429b6a
RK
3086find_use_as_address (x, reg, plusconst)
3087 register rtx x;
3088 rtx reg;
e658434c 3089 HOST_WIDE_INT plusconst;
d7429b6a
RK
3090{
3091 enum rtx_code code = GET_CODE (x);
3092 char *fmt = GET_RTX_FORMAT (code);
3093 register int i;
3094 register rtx value = 0;
3095 register rtx tem;
3096
3097 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
3098 return x;
3099
3100 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
3101 && XEXP (XEXP (x, 0), 0) == reg
3102 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3103 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
3104 return x;
3105
3106 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
3107 {
3108 /* If REG occurs inside a MEM used in a bit-field reference,
3109 that is unacceptable. */
3110 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
6fa5c106 3111 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
3112 }
3113
3114 if (x == reg)
6fa5c106 3115 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
3116
3117 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3118 {
3119 if (fmt[i] == 'e')
3120 {
3121 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
3122 if (value == 0)
3123 value = tem;
3124 else if (tem != 0)
6fa5c106 3125 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
3126 }
3127 if (fmt[i] == 'E')
3128 {
3129 register int j;
3130 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3131 {
3132 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
3133 if (value == 0)
3134 value = tem;
3135 else if (tem != 0)
6fa5c106 3136 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
3137 }
3138 }
3139 }
3140
3141 return value;
3142}
3143\f
3144/* Write information about registers and basic blocks into FILE.
3145 This is part of making a debugging dump. */
3146
3147void
3148dump_flow_info (file)
3149 FILE *file;
3150{
3151 register int i;
3152 static char *reg_class_names[] = REG_CLASS_NAMES;
3153
3154 fprintf (file, "%d registers.\n", max_regno);
3155
3156 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
b1f21e0a 3157 if (REG_N_REFS (i))
d7429b6a 3158 {
e4600702 3159 enum reg_class class, altclass;
d7429b6a 3160 fprintf (file, "\nRegister %d used %d times across %d insns",
b1f21e0a
MM
3161 i, REG_N_REFS (i), REG_LIVE_LENGTH (i));
3162 if (REG_BASIC_BLOCK (i) >= 0)
3163 fprintf (file, " in block %d", REG_BASIC_BLOCK (i));
6fc4610b
MM
3164 if (REG_N_SETS (i))
3165 fprintf (file, "; set %d time%s", REG_N_SETS (i),
3166 (REG_N_SETS (i) == 1) ? "" : "s");
3167 if (REG_USERVAR_P (regno_reg_rtx[i]))
3168 fprintf (file, "; user var");
b1f21e0a
MM
3169 if (REG_N_DEATHS (i) != 1)
3170 fprintf (file, "; dies in %d places", REG_N_DEATHS (i));
3171 if (REG_N_CALLS_CROSSED (i) == 1)
d7429b6a 3172 fprintf (file, "; crosses 1 call");
b1f21e0a
MM
3173 else if (REG_N_CALLS_CROSSED (i))
3174 fprintf (file, "; crosses %d calls", REG_N_CALLS_CROSSED (i));
d7429b6a
RK
3175 if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
3176 fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
3177 class = reg_preferred_class (i);
e4600702
RK
3178 altclass = reg_alternate_class (i);
3179 if (class != GENERAL_REGS || altclass != ALL_REGS)
d7429b6a 3180 {
e4600702
RK
3181 if (altclass == ALL_REGS || class == ALL_REGS)
3182 fprintf (file, "; pref %s", reg_class_names[(int) class]);
3183 else if (altclass == NO_REGS)
d7429b6a
RK
3184 fprintf (file, "; %s or none", reg_class_names[(int) class]);
3185 else
e4600702
RK
3186 fprintf (file, "; pref %s, else %s",
3187 reg_class_names[(int) class],
3188 reg_class_names[(int) altclass]);
d7429b6a
RK
3189 }
3190 if (REGNO_POINTER_FLAG (i))
3191 fprintf (file, "; pointer");
3192 fprintf (file, ".\n");
3193 }
3194 fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
421382ac 3195 dump_bb_data (file, basic_block_pred, basic_block_succ, 1);
d7429b6a 3196}
3e28fe44
MM
3197
3198\f
3199/* Like print_rtl, but also print out live information for the start of each
3200 basic block. */
3201
3202void
3203print_rtl_with_bb (outf, rtx_first)
3204 FILE *outf;
3205 rtx rtx_first;
3206{
3207 register rtx tmp_rtx;
3208
3209 if (rtx_first == 0)
3210 fprintf (outf, "(nil)\n");
3211
3212 else
3213 {
3214 int i, bb;
3215 enum bb_state { NOT_IN_BB, IN_ONE_BB, IN_MULTIPLE_BB };
3216 int max_uid = get_max_uid ();
adfc539e
PDM
3217 int *start = (int *) alloca (max_uid * sizeof (int));
3218 int *end = (int *) alloca (max_uid * sizeof (int));
2a92c071
GS
3219 enum bb_state *in_bb_p = (enum bb_state *)
3220 alloca (max_uid * sizeof (enum bb_state));
3e28fe44
MM
3221
3222 for (i = 0; i < max_uid; i++)
3223 {
3224 start[i] = end[i] = -1;
3225 in_bb_p[i] = NOT_IN_BB;
3226 }
3227
3228 for (i = n_basic_blocks-1; i >= 0; i--)
3229 {
3230 rtx x;
3231 start[INSN_UID (basic_block_head[i])] = i;
3232 end[INSN_UID (basic_block_end[i])] = i;
3233 for (x = basic_block_head[i]; x != NULL_RTX; x = NEXT_INSN (x))
3234 {
1791f8e2
MM
3235 in_bb_p[ INSN_UID(x)]
3236 = (in_bb_p[ INSN_UID(x)] == NOT_IN_BB)
3b33f637 3237 ? IN_ONE_BB : IN_MULTIPLE_BB;
3e28fe44
MM
3238 if (x == basic_block_end[i])
3239 break;
3240 }
3241 }
3242
3243 for (tmp_rtx = rtx_first; NULL != tmp_rtx; tmp_rtx = NEXT_INSN (tmp_rtx))
3244 {
b707b450
R
3245 int did_output;
3246
3e28fe44
MM
3247 if ((bb = start[INSN_UID (tmp_rtx)]) >= 0)
3248 {
3249 fprintf (outf, ";; Start of basic block %d, registers live:",
3250 bb);
3251
3252 EXECUTE_IF_SET_IN_REG_SET (basic_block_live_at_start[bb], 0, i,
3253 {
3254 fprintf (outf, " %d", i);
3255 if (i < FIRST_PSEUDO_REGISTER)
3256 fprintf (outf, " [%s]",
3257 reg_names[i]);
3258 });
3259 putc ('\n', outf);
3260 }
3261
3262 if (in_bb_p[ INSN_UID(tmp_rtx)] == NOT_IN_BB
3263 && GET_CODE (tmp_rtx) != NOTE
3264 && GET_CODE (tmp_rtx) != BARRIER)
3265 fprintf (outf, ";; Insn is not within a basic block\n");
3266 else if (in_bb_p[ INSN_UID(tmp_rtx)] == IN_MULTIPLE_BB)
3267 fprintf (outf, ";; Insn is in multiple basic blocks\n");
3268
b707b450 3269 did_output = print_rtl_single (outf, tmp_rtx);
3e28fe44
MM
3270
3271 if ((bb = end[INSN_UID (tmp_rtx)]) >= 0)
3272 fprintf (outf, ";; End of basic block %d\n", bb);
3273
b707b450 3274 if (did_output)
9ec36da5 3275 putc ('\n', outf);
3e28fe44
MM
3276 }
3277 }
3278}
5ece9746
JL
3279
3280\f
3281/* Integer list support. */
3282
3283/* Allocate a node from list *HEAD_PTR. */
3284
3285static int_list_ptr
3286alloc_int_list_node (head_ptr)
3287 int_list_block **head_ptr;
3288{
3289 struct int_list_block *first_blk = *head_ptr;
3290
3291 if (first_blk == NULL || first_blk->nodes_left <= 0)
3292 {
3293 first_blk = (struct int_list_block *) xmalloc (sizeof (struct int_list_block));
3294 first_blk->nodes_left = INT_LIST_NODES_IN_BLK;
3295 first_blk->next = *head_ptr;
3296 *head_ptr = first_blk;
3297 }
3298
3299 first_blk->nodes_left--;
3300 return &first_blk->nodes[first_blk->nodes_left];
3301}
3302
3303/* Pointer to head of predecessor/successor block list. */
3304static int_list_block *pred_int_list_blocks;
3305
3306/* Add a new node to integer list LIST with value VAL.
3307 LIST is a pointer to a list object to allow for different implementations.
3308 If *LIST is initially NULL, the list is empty.
3309 The caller must not care whether the element is added to the front or
3310 to the end of the list (to allow for different implementations). */
3311
3312static int_list_ptr
3313add_int_list_node (blk_list, list, val)
3314 int_list_block **blk_list;
3315 int_list **list;
3316 int val;
3317{
3318 int_list_ptr p = alloc_int_list_node (blk_list);
3319
3320 p->val = val;
3321 p->next = *list;
3322 *list = p;
3323 return p;
3324}
3325
3326/* Free the blocks of lists at BLK_LIST. */
3327
3328void
3329free_int_list (blk_list)
3330 int_list_block **blk_list;
3331{
3332 int_list_block *p, *next;
3333
3334 for (p = *blk_list; p != NULL; p = next)
3335 {
3336 next = p->next;
3337 free (p);
3338 }
3339
3340 /* Mark list as empty for the next function we compile. */
3341 *blk_list = NULL;
3342}
3343\f
3344/* Predecessor/successor computation. */
3345
3346/* Mark PRED_BB a precessor of SUCC_BB,
3347 and conversely SUCC_BB a successor of PRED_BB. */
3348
3349static void
3350add_pred_succ (pred_bb, succ_bb, s_preds, s_succs, num_preds, num_succs)
3351 int pred_bb;
3352 int succ_bb;
3353 int_list_ptr *s_preds;
3354 int_list_ptr *s_succs;
3355 int *num_preds;
3356 int *num_succs;
3357{
3358 if (succ_bb != EXIT_BLOCK)
3359 {
3360 add_int_list_node (&pred_int_list_blocks, &s_preds[succ_bb], pred_bb);
3361 num_preds[succ_bb]++;
3362 }
3363 if (pred_bb != ENTRY_BLOCK)
3364 {
3365 add_int_list_node (&pred_int_list_blocks, &s_succs[pred_bb], succ_bb);
3366 num_succs[pred_bb]++;
3367 }
3368}
3369
3370/* Compute the predecessors and successors for each block. */
743bb12d 3371void
5ece9746
JL
3372compute_preds_succs (s_preds, s_succs, num_preds, num_succs)
3373 int_list_ptr *s_preds;
3374 int_list_ptr *s_succs;
3375 int *num_preds;
3376 int *num_succs;
3377{
421382ac 3378 int bb;
5ece9746
JL
3379
3380 bzero ((char *) s_preds, n_basic_blocks * sizeof (int_list_ptr));
3381 bzero ((char *) s_succs, n_basic_blocks * sizeof (int_list_ptr));
3382 bzero ((char *) num_preds, n_basic_blocks * sizeof (int));
3383 bzero ((char *) num_succs, n_basic_blocks * sizeof (int));
3384
421382ac
BS
3385 /* It's somewhat stupid to simply copy the information. The passes
3386 which use this function ought to be changed to refer directly to
3387 basic_block_succ and its relatives. */
5ece9746
JL
3388 for (bb = 0; bb < n_basic_blocks; bb++)
3389 {
421382ac
BS
3390 rtx jump = BLOCK_END (bb);
3391 enum rtx_code code = GET_CODE (jump);
3392 int_list_ptr p;
5ece9746 3393
421382ac
BS
3394 for (p = basic_block_succ[bb]; p; p = p->next)
3395 add_pred_succ (bb, INT_LIST_VAL (p), s_preds, s_succs, num_preds,
3396 num_succs);
5ece9746 3397
5ece9746
JL
3398 /* If this is a RETURN insn or a conditional jump in the last
3399 basic block, or a non-jump insn in the last basic block, then
3400 this block reaches the exit block. */
421382ac
BS
3401 if ((code == JUMP_INSN && GET_CODE (PATTERN (jump)) == RETURN)
3402 || (((code == JUMP_INSN
5ece9746 3403 && condjump_p (jump) && !simplejump_p (jump))
421382ac
BS
3404 || code != JUMP_INSN)
3405 && bb == n_basic_blocks - 1))
5ece9746 3406 add_pred_succ (bb, EXIT_BLOCK, s_preds, s_succs, num_preds, num_succs);
5ece9746
JL
3407 }
3408
3409 add_pred_succ (ENTRY_BLOCK, 0, s_preds, s_succs, num_preds, num_succs);
5ece9746
JL
3410}
3411
3412void
421382ac 3413dump_bb_data (file, preds, succs, live_info)
5ece9746
JL
3414 FILE *file;
3415 int_list_ptr *preds;
3416 int_list_ptr *succs;
421382ac 3417 int live_info;
5ece9746
JL
3418{
3419 int bb;
3420 int_list_ptr p;
3421
3422 fprintf (file, "BB data\n\n");
3423 for (bb = 0; bb < n_basic_blocks; bb++)
3424 {
3425 fprintf (file, "BB %d, start %d, end %d\n", bb,
3426 INSN_UID (BLOCK_HEAD (bb)), INSN_UID (BLOCK_END (bb)));
3427 fprintf (file, " preds:");
3428 for (p = preds[bb]; p != NULL; p = p->next)
3429 {
3430 int pred_bb = INT_LIST_VAL (p);
3431 if (pred_bb == ENTRY_BLOCK)
3432 fprintf (file, " entry");
3433 else
3434 fprintf (file, " %d", pred_bb);
3435 }
3436 fprintf (file, "\n");
3437 fprintf (file, " succs:");
3438 for (p = succs[bb]; p != NULL; p = p->next)
3439 {
3440 int succ_bb = INT_LIST_VAL (p);
3441 if (succ_bb == EXIT_BLOCK)
3442 fprintf (file, " exit");
3443 else
3444 fprintf (file, " %d", succ_bb);
3445 }
421382ac
BS
3446 if (live_info)
3447 {
3448 int regno;
3449 fprintf (file, "\nRegisters live at start:");
3450 for (regno = 0; regno < max_regno; regno++)
3451 if (REGNO_REG_SET_P (basic_block_live_at_start[bb], regno))
3452 fprintf (file, " %d", regno);
3453 fprintf (file, "\n");
3454 }
5ece9746
JL
3455 fprintf (file, "\n");
3456 }
3457 fprintf (file, "\n");
3458}
3459
3522e0f2
JL
3460void
3461dump_sbitmap (file, bmap)
3462 FILE *file;
3463 sbitmap bmap;
3464{
3465 int i,j,n;
3466 int set_size = bmap->size;
3467 int total_bits = bmap->n_bits;
3468
3469 fprintf (file, " ");
3470 for (i = n = 0; i < set_size && n < total_bits; i++)
3471 {
3472 for (j = 0; j < SBITMAP_ELT_BITS && n < total_bits; j++, n++)
3473 {
3474 if (n != 0 && n % 10 == 0)
3475 fprintf (file, " ");
3476 fprintf (file, "%d", (bmap->elms[i] & (1L << j)) != 0);
3477 }
3478 }
3479 fprintf (file, "\n");
3480}
3481
3482void
3483dump_sbitmap_vector (file, title, subtitle, bmaps, n_maps)
3484 FILE *file;
3485 char *title, *subtitle;
3486 sbitmap *bmaps;
3487 int n_maps;
3488{
3489 int bb;
3490
3491 fprintf (file, "%s\n", title);
3492 for (bb = 0; bb < n_maps; bb++)
3493 {
3494 fprintf (file, "%s %d\n", subtitle, bb);
3495 dump_sbitmap (file, bmaps[bb]);
3496 }
3497 fprintf (file, "\n");
3498}
3499
5ece9746
JL
3500/* Free basic block data storage. */
3501
3502void
3503free_bb_mem ()
3504{
3505 free_int_list (&pred_int_list_blocks);
3506}
3507\f
3508/* Bitmap manipulation routines. */
3509
3510/* Allocate a simple bitmap of N_ELMS bits. */
3511
3512sbitmap
3513sbitmap_alloc (n_elms)
3514 int n_elms;
3515{
3516 int bytes, size, amt;
3517 sbitmap bmap;
3518
3519 size = SBITMAP_SET_SIZE (n_elms);
3520 bytes = size * sizeof (SBITMAP_ELT_TYPE);
3521 amt = (sizeof (struct simple_bitmap_def)
3522 + bytes - sizeof (SBITMAP_ELT_TYPE));
3523 bmap = (sbitmap) xmalloc (amt);
3524 bmap->n_bits = n_elms;
3525 bmap->size = size;
3526 bmap->bytes = bytes;
3527 return bmap;
3528}
3529
3530/* Allocate a vector of N_VECS bitmaps of N_ELMS bits. */
3531
3532sbitmap *
3533sbitmap_vector_alloc (n_vecs, n_elms)
3534 int n_vecs, n_elms;
3535{
a9a05945 3536 int i, bytes, offset, elm_bytes, size, amt, vector_bytes;
5ece9746
JL
3537 sbitmap *bitmap_vector;
3538
3539 size = SBITMAP_SET_SIZE (n_elms);
3540 bytes = size * sizeof (SBITMAP_ELT_TYPE);
3541 elm_bytes = (sizeof (struct simple_bitmap_def)
3542 + bytes - sizeof (SBITMAP_ELT_TYPE));
a9a05945 3543 vector_bytes = n_vecs * sizeof (sbitmap *);
5ece9746 3544
a9a05945
DE
3545 /* Round up `vector_bytes' to account for the alignment requirements
3546 of an sbitmap. One could allocate the vector-table and set of sbitmaps
3547 separately, but that requires maintaining two pointers or creating
3548 a cover struct to hold both pointers (so our result is still just
3549 one pointer). Neither is a bad idea, but this is simpler for now. */
3550 {
3551 /* Based on DEFAULT_ALIGNMENT computation in obstack.c. */
3552 struct { char x; SBITMAP_ELT_TYPE y; } align;
3553 int alignment = (char *) & align.y - & align.x;
3554 vector_bytes = (vector_bytes + alignment - 1) & ~ (alignment - 1);
3555 }
3556
3557 amt = vector_bytes + (n_vecs * elm_bytes);
3558 bitmap_vector = (sbitmap *) xmalloc (amt);
5ece9746 3559
a9a05945 3560 for (i = 0, offset = vector_bytes;
5ece9746
JL
3561 i < n_vecs;
3562 i++, offset += elm_bytes)
3563 {
3564 sbitmap b = (sbitmap) ((char *) bitmap_vector + offset);
3565 bitmap_vector[i] = b;
3566 b->n_bits = n_elms;
3567 b->size = size;
3568 b->bytes = bytes;
3569 }
3570
3571 return bitmap_vector;
3572}
3573
3574/* Copy sbitmap SRC to DST. */
3575
3576void
3577sbitmap_copy (dst, src)
3578 sbitmap dst, src;
3579{
79c9824e 3580 bcopy ((PTR) src->elms, (PTR) dst->elms, sizeof (SBITMAP_ELT_TYPE) * dst->size);
5ece9746
JL
3581}
3582
3583/* Zero all elements in a bitmap. */
3584
3585void
3586sbitmap_zero (bmap)
3587 sbitmap bmap;
3588{
3589 bzero ((char *) bmap->elms, bmap->bytes);
3590}
3591
3592/* Set to ones all elements in a bitmap. */
3593
3594void
3595sbitmap_ones (bmap)
3596 sbitmap bmap;
3597{
3598 memset (bmap->elms, -1, bmap->bytes);
3599}
3600
3601/* Zero a vector of N_VECS bitmaps. */
3602
3603void
3604sbitmap_vector_zero (bmap, n_vecs)
3605 sbitmap *bmap;
3606 int n_vecs;
3607{
3608 int i;
3609
3610 for (i = 0; i < n_vecs; i++)
3611 sbitmap_zero (bmap[i]);
3612}
3613
3614/* Set to ones a vector of N_VECS bitmaps. */
3615
3616void
3617sbitmap_vector_ones (bmap, n_vecs)
3618 sbitmap *bmap;
3619 int n_vecs;
3620{
3621 int i;
3622
3623 for (i = 0; i < n_vecs; i++)
3624 sbitmap_ones (bmap[i]);
3625}
3626
3627/* Set DST to be A union (B - C).
3628 DST = A | (B & ~C).
3629 Return non-zero if any change is made. */
3630
3631int
3632sbitmap_union_of_diff (dst, a, b, c)
3633 sbitmap dst, a, b, c;
3634{
3635 int i,changed;
3636 sbitmap_ptr dstp, ap, bp, cp;
3637
3638 changed = 0;
3639 dstp = dst->elms;
3640 ap = a->elms;
3641 bp = b->elms;
3642 cp = c->elms;
3643 for (i = 0; i < dst->size; i++)
3644 {
3645 SBITMAP_ELT_TYPE tmp = *ap | (*bp & ~*cp);
3646 if (*dstp != tmp)
3647 changed = 1;
3648 *dstp = tmp;
3649 dstp++; ap++; bp++; cp++;
3650 }
3651 return changed;
3652}
3653
3654/* Set bitmap DST to the bitwise negation of the bitmap SRC. */
3655
3656void
3657sbitmap_not (dst, src)
3658 sbitmap dst, src;
3659{
3660 int i;
3661 sbitmap_ptr dstp, ap;
3662
3663 dstp = dst->elms;
3664 ap = src->elms;
3665 for (i = 0; i < dst->size; i++)
3666 {
3667 SBITMAP_ELT_TYPE tmp = ~(*ap);
3668 *dstp = tmp;
3669 dstp++; ap++;
3670 }
3671}
3672
3673/* Set the bits in DST to be the difference between the bits
3674 in A and the bits in B. i.e. dst = a - b.
3675 The - operator is implemented as a & (~b). */
3676
3677void
3678sbitmap_difference (dst, a, b)
3679 sbitmap dst, a, b;
3680{
3681 int i;
3682 sbitmap_ptr dstp, ap, bp;
3683
3684 dstp = dst->elms;
3685 ap = a->elms;
3686 bp = b->elms;
3687 for (i = 0; i < dst->size; i++)
3688 *dstp++ = *ap++ & (~*bp++);
3689}
3690
3691/* Set DST to be (A and B)).
3692 Return non-zero if any change is made. */
3693
3694int
3695sbitmap_a_and_b (dst, a, b)
3696 sbitmap dst, a, b;
3697{
3698 int i,changed;
3699 sbitmap_ptr dstp, ap, bp;
3700
3701 changed = 0;
3702 dstp = dst->elms;
3703 ap = a->elms;
3704 bp = b->elms;
3705 for (i = 0; i < dst->size; i++)
3706 {
3707 SBITMAP_ELT_TYPE tmp = *ap & *bp;
3708 if (*dstp != tmp)
3709 changed = 1;
3710 *dstp = tmp;
3711 dstp++; ap++; bp++;
3712 }
3713 return changed;
3714}
3715/* Set DST to be (A or B)).
3716 Return non-zero if any change is made. */
3717
3718int
3719sbitmap_a_or_b (dst, a, b)
3720 sbitmap dst, a, b;
3721{
3722 int i,changed;
3723 sbitmap_ptr dstp, ap, bp;
3724
3725 changed = 0;
3726 dstp = dst->elms;
3727 ap = a->elms;
3728 bp = b->elms;
3729 for (i = 0; i < dst->size; i++)
3730 {
3731 SBITMAP_ELT_TYPE tmp = *ap | *bp;
3732 if (*dstp != tmp)
3733 changed = 1;
3734 *dstp = tmp;
3735 dstp++; ap++; bp++;
3736 }
3737 return changed;
3738}
3739
3740/* Set DST to be (A or (B and C)).
3741 Return non-zero if any change is made. */
3742
3743int
3744sbitmap_a_or_b_and_c (dst, a, b, c)
3745 sbitmap dst, a, b, c;
3746{
3747 int i,changed;
3748 sbitmap_ptr dstp, ap, bp, cp;
3749
3750 changed = 0;
3751 dstp = dst->elms;
3752 ap = a->elms;
3753 bp = b->elms;
3754 cp = c->elms;
3755 for (i = 0; i < dst->size; i++)
3756 {
3757 SBITMAP_ELT_TYPE tmp = *ap | (*bp & *cp);
3758 if (*dstp != tmp)
3759 changed = 1;
3760 *dstp = tmp;
3761 dstp++; ap++; bp++; cp++;
3762 }
3763 return changed;
3764}
3765
3766/* Set DST to be (A ann (B or C)).
3767 Return non-zero if any change is made. */
3768
3769int
3770sbitmap_a_and_b_or_c (dst, a, b, c)
3771 sbitmap dst, a, b, c;
3772{
3773 int i,changed;
3774 sbitmap_ptr dstp, ap, bp, cp;
3775
3776 changed = 0;
3777 dstp = dst->elms;
3778 ap = a->elms;
3779 bp = b->elms;
3780 cp = c->elms;
3781 for (i = 0; i < dst->size; i++)
3782 {
3783 SBITMAP_ELT_TYPE tmp = *ap & (*bp | *cp);
3784 if (*dstp != tmp)
3785 changed = 1;
3786 *dstp = tmp;
3787 dstp++; ap++; bp++; cp++;
3788 }
3789 return changed;
3790}
3791
3792/* Set the bitmap DST to the intersection of SRC of all predecessors or
3793 successors of block number BB (PRED_SUCC says which). */
3794
3795void
3796sbitmap_intersect_of_predsucc (dst, src, bb, pred_succ)
3797 sbitmap dst;
3798 sbitmap *src;
3799 int bb;
3800 int_list_ptr *pred_succ;
3801{
3802 int_list_ptr ps;
3803 int ps_bb;
3804 int set_size = dst->size;
3805
3806 ps = pred_succ[bb];
3807
3808 /* It is possible that there are no predecessors(/successors).
3809 This can happen for example in unreachable code. */
3810
3811 if (ps == NULL)
3812 {
3813 /* In APL-speak this is the `and' reduction of the empty set and thus
3814 the result is the identity for `and'. */
3815 sbitmap_ones (dst);
3816 return;
3817 }
3818
3819 /* Set result to first predecessor/successor. */
3820
3821 for ( ; ps != NULL; ps = ps->next)
3822 {
3823 ps_bb = INT_LIST_VAL (ps);
3824 if (ps_bb == ENTRY_BLOCK || ps_bb == EXIT_BLOCK)
3825 continue;
3826 sbitmap_copy (dst, src[ps_bb]);
3827 /* Break out since we're only doing first predecessor. */
3828 break;
3829 }
3830 if (ps == NULL)
3831 return;
3832
3833 /* Now do the remaining predecessors/successors. */
3834
3835 for (ps = ps->next; ps != NULL; ps = ps->next)
3836 {
3837 int i;
3838 sbitmap_ptr p,r;
3839
3840 ps_bb = INT_LIST_VAL (ps);
3841 if (ps_bb == ENTRY_BLOCK || ps_bb == EXIT_BLOCK)
3842 continue;
3843
3844 p = src[ps_bb]->elms;
3845 r = dst->elms;
3846
3847 for (i = 0; i < set_size; i++)
3848 *r++ &= *p++;
3849 }
3850}
3851
3852/* Set the bitmap DST to the intersection of SRC of all predecessors
3853 of block number BB. */
3854
3855void
3856sbitmap_intersect_of_predecessors (dst, src, bb, s_preds)
3857 sbitmap dst;
3858 sbitmap *src;
3859 int bb;
3860 int_list_ptr *s_preds;
3861{
3862 sbitmap_intersect_of_predsucc (dst, src, bb, s_preds);
3863}
3864
3865/* Set the bitmap DST to the intersection of SRC of all successors
3866 of block number BB. */
3867
3868void
3869sbitmap_intersect_of_successors (dst, src, bb, s_succs)
3870 sbitmap dst;
3871 sbitmap *src;
3872 int bb;
3873 int_list_ptr *s_succs;
3874{
3875 sbitmap_intersect_of_predsucc (dst, src, bb, s_succs);
3876}
3877
3878/* Set the bitmap DST to the union of SRC of all predecessors/successors of
3879 block number BB. */
3880
3881void
3882sbitmap_union_of_predsucc (dst, src, bb, pred_succ)
3883 sbitmap dst;
3884 sbitmap *src;
3885 int bb;
3886 int_list_ptr *pred_succ;
3887{
3888 int_list_ptr ps;
3889 int ps_bb;
3890 int set_size = dst->size;
3891
3892 ps = pred_succ[bb];
3893
3894 /* It is possible that there are no predecessors(/successors).
3895 This can happen for example in unreachable code. */
3896
3897 if (ps == NULL)
3898 {
3899 /* In APL-speak this is the `or' reduction of the empty set and thus
3900 the result is the identity for `or'. */
3901 sbitmap_zero (dst);
3902 return;
3903 }
3904
3905 /* Set result to first predecessor/successor. */
3906
3907 for ( ; ps != NULL; ps = ps->next)
3908 {
3909 ps_bb = INT_LIST_VAL (ps);
3910 if (ps_bb == ENTRY_BLOCK || ps_bb == EXIT_BLOCK)
3911 continue;
3912 sbitmap_copy (dst, src[ps_bb]);
3913 /* Break out since we're only doing first predecessor. */
3914 break;
3915 }
3916 if (ps == NULL)
3917 return;
3918
3919 /* Now do the remaining predecessors/successors. */
3920
3921 for (ps = ps->next; ps != NULL; ps = ps->next)
3922 {
3923 int i;
3924 sbitmap_ptr p,r;
3925
3926 ps_bb = INT_LIST_VAL (ps);
3927 if (ps_bb == ENTRY_BLOCK || ps_bb == EXIT_BLOCK)
3928 continue;
3929
3930 p = src[ps_bb]->elms;
3931 r = dst->elms;
3932
3933 for (i = 0; i < set_size; i++)
3934 *r++ |= *p++;
3935 }
3936}
3937
3938/* Set the bitmap DST to the union of SRC of all predecessors of
3939 block number BB. */
3940
3941void
3942sbitmap_union_of_predecessors (dst, src, bb, s_preds)
3943 sbitmap dst;
3944 sbitmap *src;
3945 int bb;
3946 int_list_ptr *s_preds;
3947{
3948 sbitmap_union_of_predsucc (dst, src, bb, s_preds);
3949}
3950
5e89e58b
JL
3951/* Set the bitmap DST to the union of SRC of all predecessors of
3952 block number BB. */
3953
3954void
3955sbitmap_union_of_successors (dst, src, bb, s_succ)
3956 sbitmap dst;
3957 sbitmap *src;
3958 int bb;
3959 int_list_ptr *s_succ;
3960{
3961 sbitmap_union_of_predsucc (dst, src, bb, s_succ);
3962}
3963
5ece9746
JL
3964/* Compute dominator relationships. */
3965void
3966compute_dominators (dominators, post_dominators, s_preds, s_succs)
3967 sbitmap *dominators;
3968 sbitmap *post_dominators;
3969 int_list_ptr *s_preds;
3970 int_list_ptr *s_succs;
3971{
3972 int bb, changed, passes;
3973 sbitmap *temp_bitmap;
3974
3975 temp_bitmap = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks);
3976 sbitmap_vector_ones (dominators, n_basic_blocks);
3977 sbitmap_vector_ones (post_dominators, n_basic_blocks);
3978 sbitmap_vector_zero (temp_bitmap, n_basic_blocks);
3979
3980 sbitmap_zero (dominators[0]);
3981 SET_BIT (dominators[0], 0);
3982
3983 sbitmap_zero (post_dominators[n_basic_blocks-1]);
3984 SET_BIT (post_dominators[n_basic_blocks-1], 0);
3985
3986 passes = 0;
3987 changed = 1;
3988 while (changed)
3989 {
3990 changed = 0;
3991 for (bb = 1; bb < n_basic_blocks; bb++)
3992 {
3993 sbitmap_intersect_of_predecessors (temp_bitmap[bb], dominators,
3994 bb, s_preds);
3995 SET_BIT (temp_bitmap[bb], bb);
3996 changed |= sbitmap_a_and_b (dominators[bb],
3997 dominators[bb],
3998 temp_bitmap[bb]);
3999 sbitmap_intersect_of_successors (temp_bitmap[bb], post_dominators,
4000 bb, s_succs);
4001 SET_BIT (temp_bitmap[bb], bb);
4002 changed |= sbitmap_a_and_b (post_dominators[bb],
4003 post_dominators[bb],
4004 temp_bitmap[bb]);
4005 }
4006 passes++;
4007 }
4008
4009 free (temp_bitmap);
4010}
4c649323
JL
4011
4012/* Count for a single SET rtx, X. */
4013
4014static void
4015count_reg_sets_1 (x)
4016 rtx x;
4017{
4018 register int regno;
4019 register rtx reg = SET_DEST (x);
4020
4021 /* Find the register that's set/clobbered. */
4022 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
4023 || GET_CODE (reg) == SIGN_EXTRACT
4024 || GET_CODE (reg) == STRICT_LOW_PART)
4025 reg = XEXP (reg, 0);
4026
86465af7
DM
4027 if (GET_CODE (reg) == PARALLEL
4028 && GET_MODE (reg) == BLKmode)
4029 {
4030 register int i;
4031 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
4032 count_reg_sets_1 (XVECEXP (reg, 0, i));
4033 return;
4034 }
4035
4c649323
JL
4036 if (GET_CODE (reg) == REG)
4037 {
4038 regno = REGNO (reg);
4039 if (regno >= FIRST_PSEUDO_REGISTER)
4040 {
4041 /* Count (weighted) references, stores, etc. This counts a
4042 register twice if it is modified, but that is correct. */
4043 REG_N_SETS (regno)++;
4044
4045 REG_N_REFS (regno) += loop_depth;
4046 }
4047 }
4048}
4049
4050/* Increment REG_N_SETS for each SET or CLOBBER found in X; also increment
4051 REG_N_REFS by the current loop depth for each SET or CLOBBER found. */
4052
4053static void
4054count_reg_sets (x)
4055 rtx x;
4056{
4057 register RTX_CODE code = GET_CODE (x);
4058
4059 if (code == SET || code == CLOBBER)
4060 count_reg_sets_1 (x);
4061 else if (code == PARALLEL)
4062 {
4063 register int i;
4064 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4065 {
4066 code = GET_CODE (XVECEXP (x, 0, i));
4067 if (code == SET || code == CLOBBER)
4068 count_reg_sets_1 (XVECEXP (x, 0, i));
4069 }
4070 }
4071}
4072
4073/* Increment REG_N_REFS by the current loop depth each register reference
4074 found in X. */
4075
4076static void
4077count_reg_references (x)
4078 rtx x;
4079{
4080 register RTX_CODE code;
4c649323
JL
4081
4082 retry:
4083 code = GET_CODE (x);
4084 switch (code)
4085 {
4086 case LABEL_REF:
4087 case SYMBOL_REF:
4088 case CONST_INT:
4089 case CONST:
4090 case CONST_DOUBLE:
4091 case PC:
4092 case ADDR_VEC:
4093 case ADDR_DIFF_VEC:
4094 case ASM_INPUT:
4095 return;
4096
4097#ifdef HAVE_cc0
4098 case CC0:
4099 return;
4100#endif
4101
4102 case CLOBBER:
4103 /* If we are clobbering a MEM, mark any registers inside the address
4104 as being used. */
4105 if (GET_CODE (XEXP (x, 0)) == MEM)
4106 count_reg_references (XEXP (XEXP (x, 0), 0));
4107 return;
4108
4109 case SUBREG:
4110 /* While we're here, optimize this case. */
4111 x = SUBREG_REG (x);
4112
4113 /* In case the SUBREG is not of a register, don't optimize */
4114 if (GET_CODE (x) != REG)
4115 {
4116 count_reg_references (x);
4117 return;
4118 }
4119
4120 /* ... fall through ... */
4121
4122 case REG:
4123 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
4124 REG_N_REFS (REGNO (x)) += loop_depth;
4125 return;
4126
4127 case SET:
4128 {
4129 register rtx testreg = SET_DEST (x);
4130 int mark_dest = 0;
4131
4132 /* If storing into MEM, don't show it as being used. But do
4133 show the address as being used. */
4134 if (GET_CODE (testreg) == MEM)
4135 {
4136 count_reg_references (XEXP (testreg, 0));
4137 count_reg_references (SET_SRC (x));
4138 return;
4139 }
4140
4141 /* Storing in STRICT_LOW_PART is like storing in a reg
4142 in that this SET might be dead, so ignore it in TESTREG.
4143 but in some other ways it is like using the reg.
4144
4145 Storing in a SUBREG or a bit field is like storing the entire
4146 register in that if the register's value is not used
4147 then this SET is not needed. */
4148 while (GET_CODE (testreg) == STRICT_LOW_PART
4149 || GET_CODE (testreg) == ZERO_EXTRACT
4150 || GET_CODE (testreg) == SIGN_EXTRACT
4151 || GET_CODE (testreg) == SUBREG)
4152 {
4153 /* Modifying a single register in an alternate mode
4154 does not use any of the old value. But these other
4155 ways of storing in a register do use the old value. */
4156 if (GET_CODE (testreg) == SUBREG
4157 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
4158 ;
4159 else
4160 mark_dest = 1;
4161
4162 testreg = XEXP (testreg, 0);
4163 }
4164
4165 /* If this is a store into a register,
4166 recursively scan the value being stored. */
4167
86465af7
DM
4168 if ((GET_CODE (testreg) == PARALLEL
4169 && GET_MODE (testreg) == BLKmode)
4170 || GET_CODE (testreg) == REG)
4c649323
JL
4171 {
4172 count_reg_references (SET_SRC (x));
4173 if (mark_dest)
4174 count_reg_references (SET_DEST (x));
4175 return;
4176 }
4177 }
4178 break;
4179
4180 default:
4181 break;
4182 }
4183
4184 /* Recursively scan the operands of this expression. */
4185
4186 {
4187 register char *fmt = GET_RTX_FORMAT (code);
4188 register int i;
4189
4190 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4191 {
4192 if (fmt[i] == 'e')
4193 {
4194 /* Tail recursive case: save a function call level. */
4195 if (i == 0)
4196 {
4197 x = XEXP (x, 0);
4198 goto retry;
4199 }
4200 count_reg_references (XEXP (x, i));
4201 }
4202 else if (fmt[i] == 'E')
4203 {
4204 register int j;
4205 for (j = 0; j < XVECLEN (x, i); j++)
4206 count_reg_references (XVECEXP (x, i, j));
4207 }
4208 }
4209 }
4210}
4211
4212/* Recompute register set/reference counts immediately prior to register
4213 allocation.
4214
4215 This avoids problems with set/reference counts changing to/from values
4216 which have special meanings to the register allocators.
4217
4218 Additionally, the reference counts are the primary component used by the
4219 register allocators to prioritize pseudos for allocation to hard regs.
4220 More accurate reference counts generally lead to better register allocation.
4221
4222 It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and
4223 possibly other information which is used by the register allocators. */
4224
762a1d90 4225void
4c649323
JL
4226recompute_reg_usage (f)
4227 rtx f;
4228{
4229 rtx insn;
4230 int i, max_reg;
4231
4232 /* Clear out the old data. */
4233 max_reg = max_reg_num ();
4234 for (i = FIRST_PSEUDO_REGISTER; i < max_reg; i++)
4235 {
4236 REG_N_SETS (i) = 0;
4237 REG_N_REFS (i) = 0;
4238 }
4239
4240 /* Scan each insn in the chain and count how many times each register is
4241 set/used. */
4242 loop_depth = 1;
4243 for (insn = f; insn; insn = NEXT_INSN (insn))
4244 {
4245 /* Keep track of loop depth. */
4246 if (GET_CODE (insn) == NOTE)
4247 {
4248 /* Look for loop boundaries. */
4249 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
4250 loop_depth--;
4251 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
4252 loop_depth++;
4253
4254 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
4255 Abort now rather than setting register status incorrectly. */
4256 if (loop_depth == 0)
4257 abort ();
4258 }
4259 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4260 {
4261 rtx links;
4262
4263 /* This call will increment REG_N_SETS for each SET or CLOBBER
4264 of a register in INSN. It will also increment REG_N_REFS
4265 by the loop depth for each set of a register in INSN. */
4266 count_reg_sets (PATTERN (insn));
4267
4268 /* count_reg_sets does not detect autoincrement address modes, so
4269 detect them here by looking at the notes attached to INSN. */
4270 for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
4271 {
4272 if (REG_NOTE_KIND (links) == REG_INC)
4273 /* Count (weighted) references, stores, etc. This counts a
4274 register twice if it is modified, but that is correct. */
4275 REG_N_SETS (REGNO (XEXP (links, 0)))++;
4276 }
4277
4278 /* This call will increment REG_N_REFS by the current loop depth for
4279 each reference to a register in INSN. */
4280 count_reg_references (PATTERN (insn));
4281
4282 /* count_reg_references will not include counts for arguments to
4283 function calls, so detect them here by examining the
4284 CALL_INSN_FUNCTION_USAGE data. */
4285 if (GET_CODE (insn) == CALL_INSN)
4286 {
4287 rtx note;
4288
4289 for (note = CALL_INSN_FUNCTION_USAGE (insn);
4290 note;
4291 note = XEXP (note, 1))
4292 if (GET_CODE (XEXP (note, 0)) == USE)
4293 count_reg_references (SET_DEST (XEXP (note, 0)));
4294 }
4295 }
4296 }
4297}
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