]> gcc.gnu.org Git - gcc.git/blame - gcc/flow.c
reg-stack.c: Update comment, include varray.h.
[gcc.git] / gcc / flow.c
CommitLineData
d7429b6a 1/* Data flow analysis for GNU compiler.
a5cad800 2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc.
d7429b6a
RK
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
a35311b0
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
d7429b6a
RK
20
21
e881bb1b
RH
22/* This file contains the data flow analysis pass of the compiler. It
23 computes data flow information which tells combine_instructions
24 which insns to consider combining and controls register allocation.
d7429b6a 25
e881bb1b
RH
26 Additional data flow information that is too bulky to record is
27 generated during the analysis, and is used at that time to create
28 autoincrement and autodecrement addressing.
d7429b6a
RK
29
30 The first step is dividing the function into basic blocks.
31 find_basic_blocks does this. Then life_analysis determines
32 where each register is live and where it is dead.
33
34 ** find_basic_blocks **
35
e881bb1b
RH
36 find_basic_blocks divides the current function's rtl into basic
37 blocks and constructs the CFG. The blocks are recorded in the
38 basic_block_info array; the CFG exists in the edge structures
39 referenced by the blocks.
d7429b6a 40
e881bb1b 41 find_basic_blocks also finds any unreachable loops and deletes them.
d7429b6a
RK
42
43 ** life_analysis **
44
45 life_analysis is called immediately after find_basic_blocks.
46 It uses the basic block information to determine where each
47 hard or pseudo register is live.
48
49 ** live-register info **
50
51 The information about where each register is live is in two parts:
e881bb1b 52 the REG_NOTES of insns, and the vector basic_block->global_live_at_start.
d7429b6a 53
e881bb1b
RH
54 basic_block->global_live_at_start has an element for each basic
55 block, and the element is a bit-vector with a bit for each hard or
56 pseudo register. The bit is 1 if the register is live at the
57 beginning of the basic block.
d7429b6a
RK
58
59 Two types of elements can be added to an insn's REG_NOTES.
60 A REG_DEAD note is added to an insn's REG_NOTES for any register
61 that meets both of two conditions: The value in the register is not
62 needed in subsequent insns and the insn does not replace the value in
63 the register (in the case of multi-word hard registers, the value in
64 each register must be replaced by the insn to avoid a REG_DEAD note).
65
66 In the vast majority of cases, an object in a REG_DEAD note will be
67 used somewhere in the insn. The (rare) exception to this is if an
68 insn uses a multi-word hard register and only some of the registers are
69 needed in subsequent insns. In that case, REG_DEAD notes will be
70 provided for those hard registers that are not subsequently needed.
71 Partial REG_DEAD notes of this type do not occur when an insn sets
72 only some of the hard registers used in such a multi-word operand;
73 omitting REG_DEAD notes for objects stored in an insn is optional and
74 the desire to do so does not justify the complexity of the partial
75 REG_DEAD notes.
76
77 REG_UNUSED notes are added for each register that is set by the insn
78 but is unused subsequently (if every register set by the insn is unused
79 and the insn does not reference memory or have some other side-effect,
80 the insn is deleted instead). If only part of a multi-word hard
81 register is used in a subsequent insn, REG_UNUSED notes are made for
82 the parts that will not be used.
83
84 To determine which registers are live after any insn, one can
85 start from the beginning of the basic block and scan insns, noting
86 which registers are set by each insn and which die there.
87
88 ** Other actions of life_analysis **
89
90 life_analysis sets up the LOG_LINKS fields of insns because the
91 information needed to do so is readily available.
92
93 life_analysis deletes insns whose only effect is to store a value
94 that is never used.
95
96 life_analysis notices cases where a reference to a register as
97 a memory address can be combined with a preceding or following
98 incrementation or decrementation of the register. The separate
99 instruction to increment or decrement is deleted and the address
100 is changed to a POST_INC or similar rtx.
101
102 Each time an incrementing or decrementing address is created,
103 a REG_INC element is added to the insn's REG_NOTES list.
104
105 life_analysis fills in certain vectors containing information about
106 register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length,
fdb8a883
JW
107 reg_n_calls_crosses and reg_basic_block.
108
109 life_analysis sets current_function_sp_is_unchanging if the function
110 doesn't modify the stack pointer. */
e881bb1b
RH
111
112/* TODO:
113
114 Split out from life_analysis:
115 - local property discovery (bb->local_live, bb->local_set)
116 - global property computation
117 - log links creation
118 - pre/post modify transformation
119*/
d7429b6a 120\f
d7429b6a 121#include "config.h"
670ee920 122#include "system.h"
d7429b6a
RK
123#include "rtl.h"
124#include "basic-block.h"
125#include "insn-config.h"
126#include "regs.h"
127#include "hard-reg-set.h"
128#include "flags.h"
129#include "output.h"
3d195391 130#include "except.h"
2e107e9e 131#include "toplev.h"
79c9824e 132#include "recog.h"
e881bb1b 133#include "insn-flags.h"
d7429b6a
RK
134
135#include "obstack.h"
136#define obstack_chunk_alloc xmalloc
137#define obstack_chunk_free free
138
e881bb1b
RH
139
140/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
141 the stack pointer does not matter. The value is tested only in
142 functions that have frame pointers.
143 No definition is equivalent to always zero. */
144#ifndef EXIT_IGNORE_STACK
145#define EXIT_IGNORE_STACK 0
146#endif
147
421382ac 148
7eb136d6
MM
149/* The contents of the current function definition are allocated
150 in this obstack, and all are freed at the end of the function.
151 For top-level functions, this is temporary_obstack.
152 Separate obstacks are made for nested functions. */
153
154extern struct obstack *function_obstack;
155
d7429b6a
RK
156/* List of labels that must never be deleted. */
157extern rtx forced_labels;
158
e881bb1b 159/* Number of basic blocks in the current function. */
d7429b6a 160
e881bb1b 161int n_basic_blocks;
d7429b6a 162
e881bb1b 163/* The basic block array. */
d7429b6a 164
e881bb1b 165varray_type basic_block_info;
d7429b6a 166
e881bb1b 167/* The special entry and exit blocks. */
d7429b6a 168
e881bb1b
RH
169struct basic_block_def entry_exit_blocks[2] =
170{
171 {
172 NULL, /* head */
173 NULL, /* end */
174 NULL, /* pred */
175 NULL, /* succ */
176 NULL, /* local_set */
177 NULL, /* global_live_at_start */
178 NULL, /* global_live_at_end */
179 NULL, /* aux */
180 ENTRY_BLOCK, /* index */
181 0 /* loop_depth */
182 },
183 {
184 NULL, /* head */
185 NULL, /* end */
186 NULL, /* pred */
187 NULL, /* succ */
188 NULL, /* local_set */
189 NULL, /* global_live_at_start */
190 NULL, /* global_live_at_end */
191 NULL, /* aux */
192 EXIT_BLOCK, /* index */
193 0 /* loop_depth */
194 }
195};
d7429b6a 196
56744d1a
JL
197/* Nonzero if the second flow pass has completed. */
198int flow2_completed;
199
d7429b6a
RK
200/* Maximum register number used in this function, plus one. */
201
202int max_regno;
203
b1f21e0a 204/* Indexed by n, giving various register information */
d7429b6a 205
6feacd09 206varray_type reg_n_info;
d7429b6a 207
a494747c
MM
208/* Size of the reg_n_info table. */
209
210unsigned int reg_n_max;
211
d7429b6a
RK
212/* Element N is the next insn that uses (hard or pseudo) register number N
213 within the current basic block; or zero, if there is no such insn.
214 This is valid only during the final backward scan in propagate_block. */
215
216static rtx *reg_next_use;
217
218/* Size of a regset for the current function,
219 in (1) bytes and (2) elements. */
220
221int regset_bytes;
222int regset_size;
223
d7429b6a 224/* Regset of regs live when calls to `setjmp'-like functions happen. */
e881bb1b 225/* ??? Does this exist only for the setjmp-clobbered warning message? */
d7429b6a
RK
226
227regset regs_live_at_setjmp;
228
229/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
230 that have to go in the same hard reg.
231 The first two regs in the list are a pair, and the next two
232 are another pair, etc. */
233rtx regs_may_share;
234
d7429b6a
RK
235/* Depth within loops of basic block being scanned for lifetime analysis,
236 plus one. This is the weight attached to references to registers. */
237
238static int loop_depth;
239
240/* During propagate_block, this is non-zero if the value of CC0 is live. */
241
242static int cc0_live;
243
db3a887b 244/* During propagate_block, this contains a list of all the MEMs we are
40b5a77c
JL
245 tracking for dead store elimination.
246
247 ?!? Note we leak memory by not free-ing items on this list. We need to
248 write some generic routines to operate on memory lists since cse, gcse,
249 loop, sched, flow and possibly other passes all need to do basically the
250 same operations on these lists. */
d7429b6a 251
db3a887b 252static rtx mem_set_list;
d7429b6a
RK
253
254/* Set of registers that may be eliminable. These are handled specially
255 in updating regs_ever_live. */
256
257static HARD_REG_SET elim_reg_set;
258
e881bb1b
RH
259/* The basic block structure for every insn, indexed by uid. */
260
261varray_type basic_block_for_insn;
262
263/* The labels mentioned in non-jump rtl. Valid during find_basic_blocks. */
264/* ??? Should probably be using LABEL_NUSES instead. It would take a
265 bit of surgery to be able to use or co-opt the routines in jump. */
266
267static rtx label_value_list;
268
269/* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
270
271#define INSN_VOLATILE(INSN) bitmap_bit_p (uid_volatile, INSN_UID (INSN))
272#define SET_INSN_VOLATILE(INSN) bitmap_set_bit (uid_volatile, INSN_UID (INSN))
273static bitmap uid_volatile;
274
d7429b6a 275/* Forward declarations */
e881bb1b
RH
276static int count_basic_blocks PROTO((rtx));
277static rtx find_basic_blocks_1 PROTO((rtx, rtx*));
278static void create_basic_block PROTO((int, rtx, rtx, rtx));
279static void compute_bb_for_insn PROTO((varray_type, int));
280static void clear_edges PROTO((void));
281static void make_edges PROTO((rtx, rtx*));
282static void make_edge PROTO((basic_block, basic_block, int));
283static void make_label_edge PROTO((basic_block, rtx, int));
284static void mark_critical_edges PROTO((void));
285
286static void commit_one_edge_insertion PROTO((edge));
287
421382ac 288static void delete_unreachable_blocks PROTO((void));
e881bb1b 289static void delete_eh_regions PROTO((void));
eeea333e 290static int can_delete_note_p PROTO((rtx));
e881bb1b
RH
291static void delete_insn_chain PROTO((rtx, rtx));
292static int delete_block PROTO((basic_block));
293static void expunge_block PROTO((basic_block));
294static rtx flow_delete_insn PROTO((rtx));
295static int can_delete_label_p PROTO((rtx));
296static void merge_blocks_nomove PROTO((basic_block, basic_block));
297static int merge_blocks PROTO((edge,basic_block,basic_block));
298static void tidy_fallthru_edge PROTO((edge,basic_block,basic_block));
299static void calculate_loop_depth PROTO((rtx));
300
dc2ede84
BS
301static int set_noop_p PROTO((rtx));
302static int noop_move_p PROTO((rtx));
e881bb1b 303static void notice_stack_pointer_modification PROTO ((rtx, rtx));
dc2ede84
BS
304static void record_volatile_insns PROTO((rtx));
305static void mark_regs_live_at_end PROTO((regset));
11f246f6 306static void life_analysis_1 PROTO((rtx, int, int));
e881bb1b
RH
307static void init_regset_vector PROTO ((regset *, int,
308 struct obstack *));
309static void propagate_block PROTO((regset, rtx, rtx, int,
11f246f6 310 regset, int, int));
e398aa80 311static int insn_dead_p PROTO((rtx, regset, int, rtx));
e658434c
RK
312static int libcall_dead_p PROTO((rtx, regset, rtx, rtx));
313static void mark_set_regs PROTO((regset, regset, rtx,
314 rtx, regset));
315static void mark_set_1 PROTO((regset, regset, rtx,
316 rtx, regset));
1d300e19 317#ifdef AUTO_INC_DEC
e658434c 318static void find_auto_inc PROTO((regset, rtx, rtx));
e658434c
RK
319static int try_pre_increment_1 PROTO((rtx));
320static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT));
1d300e19
KG
321#endif
322static void mark_used_regs PROTO((regset, regset, rtx, int, rtx));
e658434c 323void dump_flow_info PROTO((FILE *));
e881bb1b
RH
324static void dump_edge_info PROTO((FILE *, edge, int));
325
5ece9746
JL
326static int_list_ptr alloc_int_list_node PROTO ((int_list_block **));
327static int_list_ptr add_int_list_node PROTO ((int_list_block **,
328 int_list **, int));
e881bb1b
RH
329
330static void add_pred_succ PROTO ((int, int, int_list_ptr *,
331 int_list_ptr *, int *, int *));
332
4c649323
JL
333static void count_reg_sets_1 PROTO ((rtx));
334static void count_reg_sets PROTO ((rtx));
335static void count_reg_references PROTO ((rtx));
fdb8a883 336static void notice_stack_pointer_modification PROTO ((rtx, rtx));
15e088b2 337static void invalidate_mems_from_autoinc PROTO ((rtx));
34487bf8 338void verify_flow_info PROTO ((void));
d7429b6a 339\f
5ece9746 340/* Find basic blocks of the current function.
e881bb1b
RH
341 F is the first insn of the function and NREGS the number of register
342 numbers in use. */
d7429b6a
RK
343
344void
359da67d 345find_basic_blocks (f, nregs, file, do_cleanup)
d7429b6a 346 rtx f;
e881bb1b
RH
347 int nregs ATTRIBUTE_UNUSED;
348 FILE *file ATTRIBUTE_UNUSED;
359da67d 349 int do_cleanup;
d7429b6a 350{
e881bb1b
RH
351 rtx *bb_eh_end;
352 int max_uid;
d7429b6a 353
e881bb1b
RH
354 /* Flush out existing data. */
355 if (basic_block_info != NULL)
356 {
357 int i;
421382ac 358
e881bb1b 359 clear_edges ();
d7429b6a 360
e881bb1b
RH
361 /* Clear bb->aux on all extant basic blocks. We'll use this as a
362 tag for reuse during create_basic_block, just in case some pass
363 copies around basic block notes improperly. */
364 for (i = 0; i < n_basic_blocks; ++i)
365 BASIC_BLOCK (i)->aux = NULL;
d7429b6a 366
e881bb1b
RH
367 VARRAY_FREE (basic_block_info);
368 }
27249135 369
e881bb1b 370 n_basic_blocks = count_basic_blocks (f);
27249135 371
e881bb1b
RH
372 /* Size the basic block table. The actual structures will be allocated
373 by find_basic_blocks_1, since we want to keep the structure pointers
374 stable across calls to find_basic_blocks. */
375 /* ??? This whole issue would be much simpler if we called find_basic_blocks
376 exactly once, and thereafter we don't have a single long chain of
377 instructions at all until close to the end of compilation when we
378 actually lay them out. */
8cfe18d6 379
e881bb1b
RH
380 VARRAY_BB_INIT (basic_block_info, n_basic_blocks, "basic_block_info");
381
382 /* An array to record the active exception region at the end of each
383 basic block. It is filled in by find_basic_blocks_1 for make_edges. */
384 bb_eh_end = (rtx *) alloca (n_basic_blocks * sizeof (rtx));
d7429b6a 385
e881bb1b 386 label_value_list = find_basic_blocks_1 (f, bb_eh_end);
088e7160 387
e881bb1b
RH
388 /* Record the block to which an insn belongs. */
389 /* ??? This should be done another way, by which (perhaps) a label is
390 tagged directly with the basic block that it starts. It is used for
391 more than that currently, but IMO that is the only valid use. */
392
393 max_uid = get_max_uid ();
d7429b6a 394#ifdef AUTO_INC_DEC
5ece9746
JL
395 /* Leave space for insns life_analysis makes in some cases for auto-inc.
396 These cases are rare, so we don't need too much space. */
e881bb1b 397 max_uid += max_uid / 10;
d7429b6a
RK
398#endif
399
e881bb1b
RH
400 VARRAY_BB_INIT (basic_block_for_insn, max_uid, "basic_block_for_insn");
401 compute_bb_for_insn (basic_block_for_insn, max_uid);
402
403 /* Discover the edges of our cfg. */
d7429b6a 404
e881bb1b 405 make_edges (label_value_list, bb_eh_end);
421382ac 406
e881bb1b 407 /* Delete unreachable blocks. */
d7429b6a 408
359da67d
RH
409 if (do_cleanup)
410 delete_unreachable_blocks ();
e881bb1b
RH
411
412 /* Mark critical edges. */
413
414 mark_critical_edges ();
415
416 /* Discover the loop depth at the start of each basic block to aid
417 register allocation. */
418 calculate_loop_depth (f);
419
420 /* Kill the data we won't maintain. */
421 label_value_list = 0;
34487bf8
RH
422
423#ifdef ENABLE_CHECKING
424 verify_flow_info ();
425#endif
d7429b6a 426}
5ece9746 427
e881bb1b 428/* Count the basic blocks of the function. */
dc2ede84 429
e881bb1b
RH
430static int
431count_basic_blocks (f)
432 rtx f;
433{
434 register rtx insn;
435 register RTX_CODE prev_code;
436 register int count = 0;
437 int eh_region = 0;
438 int in_libcall_block = 0;
439 int call_had_abnormal_edge = 0;
440 rtx prev_call = NULL_RTX;
dc2ede84 441
e881bb1b
RH
442 prev_code = JUMP_INSN;
443 for (insn = f; insn; insn = NEXT_INSN (insn))
444 {
445 register RTX_CODE code = GET_CODE (insn);
446
447 /* Track when we are inside in LIBCALL block. */
448 if (GET_RTX_CLASS (code) == 'i'
449 && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
450 in_libcall_block = 1;
451
452 if (code == CODE_LABEL
453 || (GET_RTX_CLASS (code) == 'i'
454 && (prev_code == JUMP_INSN
455 || prev_code == BARRIER
456 || (prev_code == CALL_INSN && call_had_abnormal_edge))))
457 {
458 count++;
dc2ede84 459
e881bb1b
RH
460 /* If the previous insn was a call that did not create an
461 abnormal edge, we want to add a nop so that the CALL_INSN
462 itself is not at basic_block_end. This allows us to
463 easily distinguish between normal calls and those which
464 create abnormal edges in the flow graph. */
dc2ede84 465
e881bb1b
RH
466 if (count > 0 && prev_call != 0 && !call_had_abnormal_edge)
467 {
468 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
469 emit_insn_after (nop, prev_call);
470 }
471 }
dc2ede84 472
e881bb1b
RH
473 /* Record whether this call created an edge. */
474 if (code == CALL_INSN)
475 {
476 prev_call = insn;
477 call_had_abnormal_edge = 0;
478 if (nonlocal_goto_handler_labels)
479 call_had_abnormal_edge = !in_libcall_block;
480 else if (eh_region)
481 {
482 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
483 if (!note || XINT (XEXP (note, 0), 0) != 0)
484 call_had_abnormal_edge = 1;
485 }
486 }
487 else if (code != NOTE)
488 prev_call = NULL_RTX;
489
490 if (code != NOTE)
491 prev_code = code;
492 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG)
493 ++eh_region;
494 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
495 --eh_region;
496
497 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
498 && find_reg_note (insn, REG_RETVAL, NULL_RTX))
499 in_libcall_block = 0;
500 }
501
502 /* The rest of the compiler works a bit smoother when we don't have to
503 check for the edge case of do-nothing functions with no basic blocks. */
504 if (count == 0)
505 {
506 emit_insn (gen_rtx_USE (VOIDmode, const0_rtx));
507 count = 1;
508 }
509
510 return count;
511}
dc2ede84 512
d7429b6a
RK
513/* Find all basic blocks of the function whose first insn is F.
514 Store the correct data in the tables that describe the basic blocks,
515 set up the chains of references for each CODE_LABEL, and
d7e4fe8b
RS
516 delete any entire basic blocks that cannot be reached.
517
e881bb1b
RH
518 NONLOCAL_LABEL_LIST is a list of non-local labels in the function. Blocks
519 that are otherwise unreachable may be reachable with a non-local goto.
d7429b6a 520
e881bb1b
RH
521 BB_EH_END is an array in which we record the list of exception regions
522 active at the end of every basic block. */
8329b5ec 523
e881bb1b
RH
524static rtx
525find_basic_blocks_1 (f, bb_eh_end)
526 rtx f;
527 rtx *bb_eh_end;
528{
529 register rtx insn, next;
530 int in_libcall_block = 0;
531 int call_has_abnormal_edge = 0;
532 int i = 0;
533 rtx bb_note = NULL_RTX;
534 rtx eh_list = NULL_RTX;
535 rtx label_value_list = NULL_RTX;
536 rtx head = NULL_RTX;
537 rtx end = NULL_RTX;
538
539 /* We process the instructions in a slightly different way than we did
540 previously. This is so that we see a NOTE_BASIC_BLOCK after we have
541 closed out the previous block, so that it gets attached at the proper
542 place. Since this form should be equivalent to the previous,
543 find_basic_blocks_0 continues to use the old form as a check. */
d7429b6a 544
e881bb1b
RH
545 for (insn = f; insn; insn = next)
546 {
547 enum rtx_code code = GET_CODE (insn);
d7429b6a 548
e881bb1b 549 next = NEXT_INSN (insn);
d7429b6a 550
e881bb1b
RH
551 /* Track when we are inside in LIBCALL block. */
552 if (GET_RTX_CLASS (code) == 'i'
553 && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
554 in_libcall_block = 1;
d7429b6a 555
e881bb1b 556 if (code == CALL_INSN)
e658434c 557 {
e881bb1b
RH
558 /* Record whether this call created an edge. */
559 call_has_abnormal_edge = 0;
560 if (nonlocal_goto_handler_labels)
561 call_has_abnormal_edge = !in_libcall_block;
562 else if (eh_list)
e658434c 563 {
e881bb1b
RH
564 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
565 if (!note || XINT (XEXP (note, 0), 0) != 0)
566 call_has_abnormal_edge = 1;
5c35539b 567 }
e658434c 568 }
d7429b6a 569
e881bb1b 570 switch (code)
e658434c 571 {
e881bb1b
RH
572 case NOTE:
573 {
574 int kind = NOTE_LINE_NUMBER (insn);
575
576 /* Keep a LIFO list of the currently active exception notes. */
577 if (kind == NOTE_INSN_EH_REGION_BEG)
578 eh_list = gen_rtx_INSN_LIST (VOIDmode, insn, eh_list);
579 else if (kind == NOTE_INSN_EH_REGION_END)
580 eh_list = XEXP (eh_list, 1);
581
582 /* Look for basic block notes with which to keep the
583 basic_block_info pointers stable. Unthread the note now;
584 we'll put it back at the right place in create_basic_block.
585 Or not at all if we've already found a note in this block. */
586 else if (kind == NOTE_INSN_BASIC_BLOCK)
587 {
588 if (bb_note == NULL_RTX)
589 bb_note = insn;
590 next = flow_delete_insn (insn);
591 }
e658434c 592
e881bb1b
RH
593 break;
594 }
d7429b6a 595
e881bb1b
RH
596 case CODE_LABEL:
597 /* A basic block starts at a label. If we've closed one off due
598 to a barrier or some such, no need to do it again. */
599 if (head != NULL_RTX)
2ec1535d 600 {
e881bb1b
RH
601 /* While we now have edge lists with which other portions of
602 the compiler might determine a call ending a basic block
603 does not imply an abnormal edge, it will be a bit before
604 everything can be updated. So continue to emit a noop at
605 the end of such a block. */
606 if (GET_CODE (end) == CALL_INSN)
607 {
608 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
609 end = emit_insn_after (nop, end);
610 }
611
612 bb_eh_end[i] = eh_list;
613 create_basic_block (i++, head, end, bb_note);
614 bb_note = NULL_RTX;
2ec1535d 615 }
e881bb1b
RH
616 head = end = insn;
617 break;
d06c6389 618
e881bb1b
RH
619 case JUMP_INSN:
620 /* A basic block ends at a jump. */
621 if (head == NULL_RTX)
622 head = insn;
623 else
624 {
625 /* ??? Make a special check for table jumps. The way this
626 happens is truely and amazingly gross. We are about to
627 create a basic block that contains just a code label and
628 an addr*vec jump insn. Worse, an addr_diff_vec creates
629 its own natural loop.
5c35539b 630
e881bb1b
RH
631 Prevent this bit of brain damage, pasting things together
632 correctly in make_edges.
2c3a56ad 633
e881bb1b
RH
634 The correct solution involves emitting the table directly
635 on the tablejump instruction as a note, or JUMP_LABEL. */
e658434c 636
e881bb1b
RH
637 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
638 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
639 {
640 head = end = NULL;
641 n_basic_blocks--;
642 break;
643 }
644 }
645 end = insn;
646 goto new_bb_inclusive;
d7429b6a 647
e881bb1b
RH
648 case BARRIER:
649 /* A basic block ends at a barrier. It may be that an unconditional
650 jump already closed the basic block -- no need to do it again. */
651 if (head == NULL_RTX)
652 break;
d7429b6a 653
e881bb1b
RH
654 /* While we now have edge lists with which other portions of the
655 compiler might determine a call ending a basic block does not
656 imply an abnormal edge, it will be a bit before everything can
657 be updated. So continue to emit a noop at the end of such a
658 block. */
659 if (GET_CODE (end) == CALL_INSN)
660 {
661 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
662 end = emit_insn_after (nop, end);
663 }
664 goto new_bb_exclusive;
665
666 case CALL_INSN:
667 /* A basic block ends at a call that can either throw or
668 do a non-local goto. */
669 if (call_has_abnormal_edge)
670 {
671 new_bb_inclusive:
672 if (head == NULL_RTX)
673 head = insn;
674 end = insn;
675
676 new_bb_exclusive:
677 bb_eh_end[i] = eh_list;
678 create_basic_block (i++, head, end, bb_note);
679 head = end = NULL_RTX;
680 bb_note = NULL_RTX;
681 break;
682 }
683 /* FALLTHRU */
d7429b6a 684
e881bb1b
RH
685 default:
686 if (GET_RTX_CLASS (code) == 'i')
687 {
688 if (head == NULL_RTX)
689 head = insn;
690 end = insn;
691 }
692 break;
693 }
d7429b6a 694
e881bb1b 695 if (GET_RTX_CLASS (code) == 'i')
d7429b6a 696 {
e881bb1b 697 rtx note;
421382ac 698
e881bb1b
RH
699 /* Make a list of all labels referred to other than by jumps
700 (which just don't have the REG_LABEL notes).
2ec1535d 701
e881bb1b
RH
702 Make a special exception for labels followed by an ADDR*VEC,
703 as this would be a part of the tablejump setup code.
421382ac 704
e881bb1b
RH
705 Make a special exception for the eh_return_stub_label, which
706 we know isn't part of any otherwise visible control flow. */
707
708 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
709 if (REG_NOTE_KIND (note) == REG_LABEL)
710 {
711 rtx lab = XEXP (note, 0), next;
712
713 if (lab == eh_return_stub_label)
714 ;
715 else if ((next = next_nonnote_insn (lab)) != NULL
716 && GET_CODE (next) == JUMP_INSN
717 && (GET_CODE (PATTERN (next)) == ADDR_VEC
718 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC))
719 ;
720 else
721 label_value_list
722 = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
723 label_value_list);
d7429b6a 724 }
e881bb1b
RH
725
726 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
727 in_libcall_block = 0;
d7429b6a 728 }
e881bb1b 729 }
d7429b6a 730
e881bb1b
RH
731 if (head != NULL_RTX)
732 {
733 bb_eh_end[i] = eh_list;
734 create_basic_block (i++, head, end, bb_note);
735 }
af14ce9c 736
e881bb1b
RH
737 if (i != n_basic_blocks)
738 abort ();
af14ce9c 739
e881bb1b 740 return label_value_list;
d7429b6a 741}
5ece9746 742
e881bb1b
RH
743/* Create a new basic block consisting of the instructions between
744 HEAD and END inclusive. Reuses the note and basic block struct
745 in BB_NOTE, if any. */
5ece9746 746
e881bb1b
RH
747static void
748create_basic_block (index, head, end, bb_note)
749 int index;
750 rtx head, end, bb_note;
5ece9746 751{
e881bb1b
RH
752 basic_block bb;
753
754 if (bb_note
b3bf5bde 755 && ! RTX_INTEGRATED_P (bb_note)
e881bb1b
RH
756 && (bb = NOTE_BASIC_BLOCK (bb_note)) != NULL
757 && bb->aux == NULL)
5ece9746 758 {
e881bb1b
RH
759 /* If we found an existing note, thread it back onto the chain. */
760
761 if (GET_CODE (head) == CODE_LABEL)
762 add_insn_after (bb_note, head);
763 else
764 {
765 add_insn_before (bb_note, head);
766 head = bb_note;
767 }
5ece9746 768 }
e881bb1b
RH
769 else
770 {
771 /* Otherwise we must create a note and a basic block structure.
772 Since we allow basic block structs in rtl, give the struct
773 the same lifetime by allocating it off the function obstack
774 rather than using malloc. */
8329b5ec 775
e881bb1b
RH
776 bb = (basic_block) obstack_alloc (function_obstack, sizeof (*bb));
777 memset (bb, 0, sizeof (*bb));
421382ac 778
e881bb1b
RH
779 if (GET_CODE (head) == CODE_LABEL)
780 bb_note = emit_note_after (NOTE_INSN_BASIC_BLOCK, head);
781 else
782 {
783 bb_note = emit_note_before (NOTE_INSN_BASIC_BLOCK, head);
784 head = bb_note;
785 }
786 NOTE_BASIC_BLOCK (bb_note) = bb;
787 }
788
eeea333e
RH
789 /* Always include the bb note in the block. */
790 if (NEXT_INSN (end) == bb_note)
791 end = bb_note;
792
e881bb1b
RH
793 bb->head = head;
794 bb->end = end;
795 bb->index = index;
796 BASIC_BLOCK (index) = bb;
797
798 /* Tag the block so that we know it has been used when considering
799 other basic block notes. */
800 bb->aux = bb;
421382ac 801}
e881bb1b
RH
802\f
803/* Records the basic block struct in BB_FOR_INSN, for every instruction
804 indexed by INSN_UID. MAX is the size of the array. */
421382ac 805
421382ac 806static void
e881bb1b
RH
807compute_bb_for_insn (bb_for_insn, max)
808 varray_type bb_for_insn;
809 int max;
421382ac 810{
e881bb1b 811 int i;
421382ac 812
e881bb1b
RH
813 for (i = 0; i < n_basic_blocks; ++i)
814 {
815 basic_block bb = BASIC_BLOCK (i);
816 rtx insn, end;
817
818 end = bb->end;
819 insn = bb->head;
820 while (1)
821 {
822 int uid = INSN_UID (insn);
823 if (uid < max)
824 VARRAY_BB (bb_for_insn, uid) = bb;
825 if (insn == end)
826 break;
827 insn = NEXT_INSN (insn);
828 }
829 }
421382ac
BS
830}
831
e881bb1b 832/* Free the memory associated with the edge structures. */
421382ac
BS
833
834static void
e881bb1b 835clear_edges ()
421382ac 836{
e881bb1b
RH
837 int i;
838 edge n, e;
421382ac 839
e881bb1b 840 for (i = 0; i < n_basic_blocks; ++i)
421382ac 841 {
e881bb1b 842 basic_block bb = BASIC_BLOCK (i);
421382ac 843
e881bb1b 844 for (e = bb->succ; e ; e = n)
421382ac 845 {
e881bb1b
RH
846 n = e->succ_next;
847 free (e);
421382ac 848 }
e881bb1b
RH
849
850 bb->succ = 0;
851 bb->pred = 0;
852 }
853
854 for (e = ENTRY_BLOCK_PTR->succ; e ; e = n)
855 {
856 n = e->succ_next;
857 free (e);
421382ac 858 }
e881bb1b
RH
859
860 ENTRY_BLOCK_PTR->succ = 0;
861 EXIT_BLOCK_PTR->pred = 0;
421382ac
BS
862}
863
e881bb1b
RH
864/* Identify the edges between basic blocks.
865
866 NONLOCAL_LABEL_LIST is a list of non-local labels in the function. Blocks
867 that are otherwise unreachable may be reachable with a non-local goto.
868
869 BB_EH_END is an array indexed by basic block number in which we record
870 the list of exception regions active at the end of the basic block. */
871
dc2ede84 872static void
e881bb1b
RH
873make_edges (label_value_list, bb_eh_end)
874 rtx label_value_list;
875 rtx *bb_eh_end;
dc2ede84 876{
e881bb1b
RH
877 int i;
878
879 /* Assume no computed jump; revise as we create edges. */
880 current_function_has_computed_jump = 0;
881
882 /* By nature of the way these get numbered, block 0 is always the entry. */
883 make_edge (ENTRY_BLOCK_PTR, BASIC_BLOCK (0), EDGE_FALLTHRU);
dc2ede84 884
e881bb1b 885 for (i = 0; i < n_basic_blocks; ++i)
421382ac 886 {
e881bb1b
RH
887 basic_block bb = BASIC_BLOCK (i);
888 rtx insn, x, eh_list;
889 enum rtx_code code;
4b523fc4 890 int force_fallthru = 0;
421382ac 891
e881bb1b
RH
892 /* If we have asynchronous exceptions, scan the notes for all exception
893 regions active in the block. In the normal case, we only need the
894 one active at the end of the block, which is bb_eh_end[i]. */
421382ac 895
e881bb1b
RH
896 eh_list = bb_eh_end[i];
897 if (asynchronous_exceptions)
dc2ede84 898 {
e881bb1b 899 for (insn = bb->end; insn != bb->head; insn = PREV_INSN (insn))
dc2ede84 900 {
e881bb1b
RH
901 if (GET_CODE (insn) == NOTE
902 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
903 eh_list = gen_rtx_INSN_LIST (VOIDmode, insn, eh_list);
dc2ede84 904 }
e881bb1b 905 }
dc2ede84 906
e881bb1b
RH
907 /* Now examine the last instruction of the block, and discover the
908 ways we can leave the block. */
909
910 insn = bb->end;
911 code = GET_CODE (insn);
912
913 /* A branch. */
914 if (code == JUMP_INSN)
915 {
916 rtx tmp;
917
918 /* ??? Recognize a tablejump and do the right thing. */
919 if ((tmp = JUMP_LABEL (insn)) != NULL_RTX
920 && (tmp = NEXT_INSN (tmp)) != NULL_RTX
921 && GET_CODE (tmp) == JUMP_INSN
922 && (GET_CODE (PATTERN (tmp)) == ADDR_VEC
923 || GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC))
924 {
925 rtvec vec;
926 int j;
927
928 if (GET_CODE (PATTERN (tmp)) == ADDR_VEC)
929 vec = XVEC (PATTERN (tmp), 0);
930 else
931 vec = XVEC (PATTERN (tmp), 1);
932
933 for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
934 make_label_edge (bb, XEXP (RTVEC_ELT (vec, j), 0), 0);
4b523fc4
RE
935
936 /* Some targets (eg, ARM) emit a conditional jump that also
937 contains the out-of-range target. Scan for these and
938 add an edge if necessary. */
939 if ((tmp = single_set (insn)) != NULL
940 && SET_DEST (tmp) == pc_rtx
941 && GET_CODE (SET_SRC (tmp)) == IF_THEN_ELSE
942 && GET_CODE (XEXP (SET_SRC (tmp), 2)) == LABEL_REF)
943 make_label_edge (bb, XEXP (XEXP (SET_SRC (tmp), 2), 0), 0);
944
945#ifdef CASE_DROPS_THROUGH
946 /* Silly VAXen. The ADDR_VEC is going to be in the way of
947 us naturally detecting fallthru into the next block. */
948 force_fallthru = 1;
949#endif
e881bb1b
RH
950 }
951
952 /* If this is a computed jump, then mark it as reaching
953 everything on the label_value_list and forced_labels list. */
954 else if (computed_jump_p (insn))
955 {
dc2ede84 956 current_function_has_computed_jump = 1;
dc2ede84 957
e881bb1b
RH
958 for (x = label_value_list; x; x = XEXP (x, 1))
959 make_label_edge (bb, XEXP (x, 0), EDGE_ABNORMAL);
960
dc2ede84 961 for (x = forced_labels; x; x = XEXP (x, 1))
e881bb1b 962 make_label_edge (bb, XEXP (x, 0), EDGE_ABNORMAL);
dc2ede84
BS
963 }
964
e881bb1b
RH
965 /* Returns create an exit out. */
966 else if (returnjump_p (insn))
967 make_edge (bb, EXIT_BLOCK_PTR, 0);
968
969 /* Otherwise, we have a plain conditional or unconditional jump. */
970 else
dc2ede84 971 {
e881bb1b
RH
972 if (! JUMP_LABEL (insn))
973 abort ();
974 make_label_edge (bb, JUMP_LABEL (insn), 0);
975 }
976 }
977
978 /* If this is a CALL_INSN, then mark it as reaching the active EH
979 handler for this CALL_INSN. If we're handling asynchronous
980 exceptions then any insn can reach any of the active handlers.
b472794d 981
e881bb1b 982 Also mark the CALL_INSN as reaching any nonlocal goto handler. */
b472794d 983
e881bb1b
RH
984 else if (code == CALL_INSN || asynchronous_exceptions)
985 {
986 int is_call = (code == CALL_INSN ? EDGE_ABNORMAL_CALL : 0);
987 handler_info *ptr;
988
989 /* Use REG_EH_RETHROW and REG_EH_REGION if available. */
990 /* ??? REG_EH_REGION is not generated presently. Is it
991 inteded that there be multiple notes for the regions?
992 or is my eh_list collection redundant with handler linking? */
993
994 x = find_reg_note (insn, REG_EH_RETHROW, 0);
995 if (!x)
996 x = find_reg_note (insn, REG_EH_REGION, 0);
997 if (x)
998 {
999 if (XINT (XEXP (x, 0), 0) != 0)
dc2ede84 1000 {
e881bb1b
RH
1001 ptr = get_first_handler (XINT (XEXP (x, 0), 0));
1002 while (ptr)
dc2ede84 1003 {
e881bb1b
RH
1004 make_label_edge (bb, ptr->handler_label,
1005 EDGE_ABNORMAL | EDGE_EH | is_call);
1006 ptr = ptr->next;
dc2ede84
BS
1007 }
1008 }
e881bb1b
RH
1009 }
1010 else
1011 {
1012 for (x = eh_list; x; x = XEXP (x, 1))
dc2ede84 1013 {
e881bb1b
RH
1014 ptr = get_first_handler (NOTE_BLOCK_NUMBER (XEXP (x, 0)));
1015 while (ptr)
1016 {
1017 make_label_edge (bb, ptr->handler_label,
1018 EDGE_ABNORMAL | EDGE_EH | is_call);
1019 ptr = ptr->next;
1020 }
dc2ede84 1021 }
e881bb1b
RH
1022 }
1023
1024 if (code == CALL_INSN && nonlocal_goto_handler_labels)
1025 {
dc2ede84
BS
1026 /* ??? This could be made smarter: in some cases it's possible
1027 to tell that certain calls will not do a nonlocal goto.
1028
1029 For example, if the nested functions that do the nonlocal
1030 gotos do not have their addresses taken, then only calls to
1031 those functions or to other nested functions that use them
1032 could possibly do nonlocal gotos. */
e881bb1b
RH
1033
1034 for (x = nonlocal_goto_handler_labels; x ; x = XEXP (x, 1))
1035 make_label_edge (bb, XEXP (x, 0),
1036 EDGE_ABNORMAL | EDGE_ABNORMAL_CALL);
dc2ede84
BS
1037 }
1038 }
e881bb1b
RH
1039
1040 /* We know something about the structure of the function __throw in
1041 libgcc2.c. It is the only function that ever contains eh_stub
1042 labels. It modifies its return address so that the last block
1043 returns to one of the eh_stub labels within it. So we have to
1044 make additional edges in the flow graph. */
1045 if (i + 1 == n_basic_blocks && eh_return_stub_label != 0)
1046 make_label_edge (bb, eh_return_stub_label, EDGE_EH);
1047
1048 /* Find out if we can drop through to the next block. */
1049 insn = next_nonnote_insn (insn);
4b523fc4 1050 if (!insn || (i + 1 == n_basic_blocks && force_fallthru))
e881bb1b
RH
1051 make_edge (bb, EXIT_BLOCK_PTR, EDGE_FALLTHRU);
1052 else if (i + 1 < n_basic_blocks)
1053 {
1054 rtx tmp = BLOCK_HEAD (i + 1);
1055 if (GET_CODE (tmp) == NOTE)
1056 tmp = next_nonnote_insn (tmp);
4b523fc4 1057 if (force_fallthru || insn == tmp)
e881bb1b
RH
1058 make_edge (bb, BASIC_BLOCK (i + 1), EDGE_FALLTHRU);
1059 }
dc2ede84 1060 }
e881bb1b
RH
1061}
1062
1063/* Create an edge between two basic blocks. FLAGS are auxiliary information
1064 about the edge that is accumulated between calls. */
1065
1066static void
1067make_edge (src, dst, flags)
1068 basic_block src, dst;
1069 int flags;
1070{
1071 edge e;
1072
1073 /* Make sure we don't add duplicate edges. */
1074
1075 for (e = src->succ; e ; e = e->succ_next)
1076 if (e->dest == dst)
1077 {
1078 e->flags |= flags;
1079 return;
1080 }
1081
1082 e = (edge) xcalloc (1, sizeof (*e));
1083
1084 e->succ_next = src->succ;
1085 e->pred_next = dst->pred;
1086 e->src = src;
1087 e->dest = dst;
1088 e->flags = flags;
1089
1090 src->succ = e;
1091 dst->pred = e;
1092}
1093
1094/* Create an edge from a basic block to a label. */
1095
1096static void
1097make_label_edge (src, label, flags)
1098 basic_block src;
1099 rtx label;
1100 int flags;
1101{
1102 if (GET_CODE (label) != CODE_LABEL)
1103 abort ();
1104
1105 /* If the label was never emitted, this insn is junk, but avoid a
1106 crash trying to refer to BLOCK_FOR_INSN (label). This can happen
1107 as a result of a syntax error and a diagnostic has already been
1108 printed. */
1109
1110 if (INSN_UID (label) == 0)
1111 return;
1112
1113 make_edge (src, BLOCK_FOR_INSN (label), flags);
1114}
e6cfb550 1115
e881bb1b
RH
1116/* Identify critical edges and set the bits appropriately. */
1117static void
1118mark_critical_edges ()
1119{
1120 int i, n = n_basic_blocks;
1121 basic_block bb;
1122
1123 /* We begin with the entry block. This is not terribly important now,
1124 but could be if a front end (Fortran) implemented alternate entry
1125 points. */
1126 bb = ENTRY_BLOCK_PTR;
1127 i = -1;
1128
1129 while (1)
e6cfb550 1130 {
e881bb1b
RH
1131 edge e;
1132
1133 /* (1) Critical edges must have a source with multiple successors. */
1134 if (bb->succ && bb->succ->succ_next)
1135 {
1136 for (e = bb->succ; e ; e = e->succ_next)
1137 {
1138 /* (2) Critical edges must have a destination with multiple
1139 predecessors. Note that we know there is at least one
1140 predecessor -- the edge we followed to get here. */
1141 if (e->dest->pred->pred_next)
1142 e->flags |= EDGE_CRITICAL;
1143 else
1144 e->flags &= ~EDGE_CRITICAL;
1145 }
1146 }
1147 else
1148 {
1149 for (e = bb->succ; e ; e = e->succ_next)
1150 e->flags &= ~EDGE_CRITICAL;
1151 }
1152
1153 if (++i >= n)
1154 break;
1155 bb = BASIC_BLOCK (i);
e6cfb550 1156 }
e881bb1b
RH
1157}
1158\f
1159/* Split a (typically critical) edge. Return the new block.
1160 Abort on abnormal edges.
1161
1162 ??? The code generally expects to be called on critical edges.
1163 The case of a block ending in an unconditional jump to a
1164 block with multiple predecessors is not handled optimally. */
1165
1166basic_block
1167split_edge (edge_in)
1168 edge edge_in;
1169{
1170 basic_block old_pred, bb, old_succ;
1171 edge edge_out;
1172 rtx bb_note;
1173 int i;
1174
1175 /* Abnormal edges cannot be split. */
1176 if ((edge_in->flags & EDGE_ABNORMAL) != 0)
1177 abort ();
1178
1179 old_pred = edge_in->src;
1180 old_succ = edge_in->dest;
1181
1182 /* Remove the existing edge from the destination's pred list. */
1183 {
1184 edge *pp;
1185 for (pp = &old_succ->pred; *pp != edge_in; pp = &(*pp)->pred_next)
1186 continue;
1187 *pp = edge_in->pred_next;
1e7d57a3 1188 edge_in->pred_next = NULL;
e881bb1b
RH
1189 }
1190
1191 /* Create the new structures. */
1192 bb = (basic_block) obstack_alloc (function_obstack, sizeof (*bb));
1193 edge_out = (edge) xcalloc (1, sizeof (*edge_out));
1194
1195 memset (bb, 0, sizeof (*bb));
1196 bb->local_set = OBSTACK_ALLOC_REG_SET (function_obstack);
1197 bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (function_obstack);
1198 bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (function_obstack);
1199
1200 /* ??? This info is likely going to be out of date very soon. */
1201 CLEAR_REG_SET (bb->local_set);
1202 if (old_succ->global_live_at_start)
1203 {
1204 COPY_REG_SET (bb->global_live_at_start, old_succ->global_live_at_start);
1205 COPY_REG_SET (bb->global_live_at_end, old_succ->global_live_at_start);
1206 }
1207 else
1208 {
1209 CLEAR_REG_SET (bb->global_live_at_start);
1210 CLEAR_REG_SET (bb->global_live_at_end);
1211 }
1212
1213 /* Wire them up. */
1214 bb->pred = edge_in;
1215 bb->succ = edge_out;
1e7d57a3 1216
e881bb1b 1217 edge_in->dest = bb;
1e7d57a3
JH
1218 edge_in->flags &= ~EDGE_CRITICAL;
1219
1220 edge_out->pred_next = old_succ->pred;
1221 edge_out->succ_next = NULL;
e881bb1b
RH
1222 edge_out->src = bb;
1223 edge_out->dest = old_succ;
1e7d57a3
JH
1224 edge_out->flags = EDGE_FALLTHRU;
1225 edge_out->probability = REG_BR_PROB_BASE;
1226
1227 old_succ->pred = edge_out;
e881bb1b
RH
1228
1229 /* Tricky case -- if there existed a fallthru into the successor
1230 (and we're not it) we must add a new unconditional jump around
1231 the new block we're actually interested in.
1232
1233 Further, if that edge is critical, this means a second new basic
1234 block must be created to hold it. In order to simplify correct
1235 insn placement, do this before we touch the existing basic block
1236 ordering for the block we were really wanting. */
1237 if ((edge_in->flags & EDGE_FALLTHRU) == 0)
1238 {
1239 edge e;
1e7d57a3 1240 for (e = edge_out->pred_next; e ; e = e->pred_next)
e881bb1b
RH
1241 if (e->flags & EDGE_FALLTHRU)
1242 break;
1243
1244 if (e)
1245 {
1246 basic_block jump_block;
1247 rtx pos;
1248
1249 if ((e->flags & EDGE_CRITICAL) == 0)
1250 {
1251 /* Non critical -- we can simply add a jump to the end
1252 of the existing predecessor. */
1253 jump_block = e->src;
e881bb1b
RH
1254 }
1255 else
1256 {
1257 /* We need a new block to hold the jump. The simplest
1258 way to do the bulk of the work here is to recursively
1259 call ourselves. */
1260 jump_block = split_edge (e);
1261 e = jump_block->succ;
e881bb1b
RH
1262 }
1263
1e7d57a3
JH
1264 /* Now add the jump insn ... */
1265 pos = emit_jump_insn_after (gen_jump (old_succ->head),
1266 jump_block->end);
e881bb1b
RH
1267 jump_block->end = pos;
1268 emit_barrier_after (pos);
1e7d57a3
JH
1269
1270 /* ... let jump know that label is in use, ... */
1271 ++LABEL_NUSES (old_succ->head);
088e7160 1272
e881bb1b
RH
1273 /* ... and clear fallthru on the outgoing edge. */
1274 e->flags &= ~EDGE_FALLTHRU;
1275
1276 /* Continue splitting the interesting edge. */
1277 }
1278 }
1279
1280 /* Place the new block just in front of the successor. */
1281 VARRAY_GROW (basic_block_info, ++n_basic_blocks);
1282 for (i = n_basic_blocks - 1; i > old_succ->index; --i)
1283 {
1284 basic_block tmp = BASIC_BLOCK (i - 1);
1285 BASIC_BLOCK (i) = tmp;
1286 tmp->index = i;
1287 }
1288 BASIC_BLOCK (i) = bb;
1289 bb->index = i;
1290
1291 /* Create the basic block note. */
1292 bb_note = emit_note_before (NOTE_INSN_BASIC_BLOCK, old_succ->head);
1293 NOTE_BASIC_BLOCK (bb_note) = bb;
1294 bb->head = bb->end = bb_note;
1295
1296 /* Not quite simple -- for non-fallthru edges, we must adjust the
1297 predecessor's jump instruction to target our new block. */
1298 if ((edge_in->flags & EDGE_FALLTHRU) == 0)
1299 {
1300 rtx tmp, insn = old_pred->end;
1301 rtx old_label = old_succ->head;
1302 rtx new_label = gen_label_rtx ();
1303
1304 if (GET_CODE (insn) != JUMP_INSN)
1305 abort ();
1306
1307 /* ??? Recognize a tablejump and adjust all matching cases. */
1308 if ((tmp = JUMP_LABEL (insn)) != NULL_RTX
1309 && (tmp = NEXT_INSN (tmp)) != NULL_RTX
1310 && GET_CODE (tmp) == JUMP_INSN
1311 && (GET_CODE (PATTERN (tmp)) == ADDR_VEC
1312 || GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC))
1313 {
1314 rtvec vec;
1315 int j;
1316
1317 if (GET_CODE (PATTERN (tmp)) == ADDR_VEC)
1318 vec = XVEC (PATTERN (tmp), 0);
1319 else
1320 vec = XVEC (PATTERN (tmp), 1);
1321
1322 for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
1323 if (XEXP (RTVEC_ELT (vec, j), 0) == old_label)
1324 {
1325 RTVEC_ELT (vec, j) = gen_rtx_LABEL_REF (VOIDmode, new_label);
1326 --LABEL_NUSES (old_label);
1327 ++LABEL_NUSES (new_label);
1328 }
1329 }
1330 else
1331 {
1332 /* This would have indicated an abnormal edge. */
1333 if (computed_jump_p (insn))
1334 abort ();
1335
1336 /* A return instruction can't be redirected. */
1337 if (returnjump_p (insn))
1338 abort ();
1339
1340 /* If the insn doesn't go where we think, we're confused. */
1341 if (JUMP_LABEL (insn) != old_label)
1342 abort ();
1343
1344 redirect_jump (insn, new_label);
1345 }
1346
1347 emit_label_before (new_label, bb_note);
1348 bb->head = new_label;
1349 }
1350
e881bb1b
RH
1351 return bb;
1352}
1353
1354/* Queue instructions for insertion on an edge between two basic blocks.
1355 The new instructions and basic blocks (if any) will not appear in the
1356 CFG until commit_edge_insertions is called. */
1357
1358void
1359insert_insn_on_edge (pattern, e)
1360 rtx pattern;
1361 edge e;
1362{
1363 /* We cannot insert instructions on an abnormal critical edge.
1364 It will be easier to find the culprit if we die now. */
1365 if ((e->flags & (EDGE_ABNORMAL|EDGE_CRITICAL))
1366 == (EDGE_ABNORMAL|EDGE_CRITICAL))
1367 abort ();
1368
1369 if (e->insns == NULL_RTX)
1370 start_sequence ();
1371 else
1372 push_to_sequence (e->insns);
1373
1374 emit_insn (pattern);
1375
1376 e->insns = get_insns ();
1377 end_sequence();
1378}
1379
1380/* Update the CFG for the instructions queued on edge E. */
1381
1382static void
1383commit_one_edge_insertion (e)
1384 edge e;
1385{
1386 rtx before = NULL_RTX, after = NULL_RTX, tmp;
1387 basic_block bb;
1388
1389 /* Figure out where to put these things. If the destination has
1390 one predecessor, insert there. Except for the exit block. */
1391 if (e->dest->pred->pred_next == NULL
1392 && e->dest != EXIT_BLOCK_PTR)
1393 {
1394 bb = e->dest;
1395
1396 /* Get the location correct wrt a code label, and "nice" wrt
1397 a basic block note, and before everything else. */
1398 tmp = bb->head;
1399 if (GET_CODE (tmp) == CODE_LABEL)
1400 tmp = NEXT_INSN (tmp);
1401 if (GET_CODE (tmp) == NOTE
1402 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BASIC_BLOCK)
1403 tmp = NEXT_INSN (tmp);
1404 if (tmp == bb->head)
1405 before = tmp;
1406 else
1407 after = PREV_INSN (tmp);
1408 }
1409
1410 /* If the source has one successor and the edge is not abnormal,
1411 insert there. Except for the entry block. */
1412 else if ((e->flags & EDGE_ABNORMAL) == 0
1413 && e->src->succ->succ_next == NULL
1414 && e->src != ENTRY_BLOCK_PTR)
1415 {
1416 bb = e->src;
1417 if (GET_CODE (bb->end) == JUMP_INSN)
1418 {
1419 /* ??? Is it possible to wind up with non-simple jumps? Perhaps
1420 a jump with delay slots already filled? */
1421 if (! simplejump_p (bb->end))
1422 abort ();
1423
1424 before = bb->end;
1425 }
1426 else
1427 {
1428 /* We'd better be fallthru, or we've lost track of what's what. */
1429 if ((e->flags & EDGE_FALLTHRU) == 0)
1430 abort ();
1431
1432 after = bb->end;
1433 }
1434 }
1435
1436 /* Otherwise we must split the edge. */
1437 else
1438 {
1439 bb = split_edge (e);
1440 after = bb->end;
1441 }
1442
1443 /* Now that we've found the spot, do the insertion. */
1444 tmp = e->insns;
1445 e->insns = NULL_RTX;
1446 if (before)
1447 {
1448 emit_insns_before (tmp, before);
1449 if (before == bb->head)
1450 bb->head = before;
1451 }
1452 else
1453 {
1454 tmp = emit_insns_after (tmp, after);
1455 if (after == bb->end)
1456 bb->end = tmp;
1457 }
1458}
1459
1460/* Update the CFG for all queued instructions. */
1461
1462void
1463commit_edge_insertions ()
1464{
1465 int i;
1466 basic_block bb;
1467
1468 i = -1;
1469 bb = ENTRY_BLOCK_PTR;
1470 while (1)
1471 {
1472 edge e, next;
1473
1474 for (e = bb->succ; e ; e = next)
1475 {
1476 next = e->succ_next;
1477 if (e->insns)
1478 commit_one_edge_insertion (e);
1479 }
1480
1481 if (++i >= n_basic_blocks)
1482 break;
1483 bb = BASIC_BLOCK (i);
1484 }
1485}
1486\f
1487/* Delete all unreachable basic blocks. */
1488
1489static void
1490delete_unreachable_blocks ()
1491{
1492 basic_block *worklist, *tos;
1493 int deleted_handler;
1494 edge e;
1495 int i, n;
1496
1497 n = n_basic_blocks;
1498 tos = worklist = (basic_block *) alloca (sizeof (basic_block) * n);
1499
1500 /* Use basic_block->aux as a marker. Clear them all. */
1501
1502 for (i = 0; i < n; ++i)
1503 BASIC_BLOCK (i)->aux = NULL;
1504
1505 /* Add our starting points to the worklist. Almost always there will
1506 be only one. It isn't inconcievable that we might one day directly
1507 support Fortran alternate entry points. */
1508
1509 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
aa3d4bf9
RH
1510 {
1511 *tos++ = e->dest;
1512
1513 /* Mark the block with a handy non-null value. */
1514 e->dest->aux = e;
1515 }
e881bb1b
RH
1516
1517 /* Iterate: find everything reachable from what we've already seen. */
1518
1519 while (tos != worklist)
1520 {
1521 basic_block b = *--tos;
1522
e881bb1b
RH
1523 for (e = b->succ; e ; e = e->succ_next)
1524 if (!e->dest->aux)
aa3d4bf9
RH
1525 {
1526 *tos++ = e->dest;
1527 e->dest->aux = e;
1528 }
e881bb1b
RH
1529 }
1530
1531 /* Delete all unreachable basic blocks. Count down so that we don't
1532 interfere with the block renumbering that happens in delete_block. */
1533
1534 deleted_handler = 0;
1535
1536 for (i = n - 1; i >= 0; --i)
1537 {
1538 basic_block b = BASIC_BLOCK (i);
1539
1540 if (b->aux != NULL)
1541 /* This block was found. Tidy up the mark. */
1542 b->aux = NULL;
1543 else
1544 deleted_handler |= delete_block (b);
1545 }
1546
1547 /* Fix up edges that now fall through, or rather should now fall through
1548 but previously required a jump around now deleted blocks. Simplify
1549 the search by only examining blocks numerically adjacent, since this
1550 is how find_basic_blocks created them. */
1551
1552 for (i = 1; i < n_basic_blocks; ++i)
1553 {
1554 basic_block b = BASIC_BLOCK (i - 1);
1555 basic_block c = BASIC_BLOCK (i);
1556 edge s;
1557
abb3f0a9
JL
1558 /* We care about simple conditional or unconditional jumps with
1559 a single successor.
1560
1561 If we had a conditional branch to the next instruction when
1562 find_basic_blocks was called, then there will only be one
1563 out edge for the block which ended with the conditional
1564 branch (since we do not create duplicate edges).
1565
4f282ba1
JL
1566 Furthermore, the edge will be marked as a fallthru because we
1567 merge the flags for the duplicate edges. So we do not want to
1568 check that the edge is not a FALLTHRU edge. */
e881bb1b
RH
1569 if ((s = b->succ) != NULL
1570 && s->succ_next == NULL
abb3f0a9 1571 && s->dest == c)
e881bb1b
RH
1572 tidy_fallthru_edge (s, b, c);
1573 }
1574
1575 /* Attempt to merge blocks as made possible by edge removal. If a block
1576 has only one successor, and the successor has only one predecessor,
1577 they may be combined. */
1578
1579 for (i = 0; i < n_basic_blocks; )
1580 {
1581 basic_block c, b = BASIC_BLOCK (i);
1582 edge s;
1583
1584 /* A loop because chains of blocks might be combineable. */
1585 while ((s = b->succ) != NULL
1586 && s->succ_next == NULL
1587 && (c = s->dest) != EXIT_BLOCK_PTR
1588 && c->pred->pred_next == NULL
1589 && merge_blocks (s, b, c))
1590 continue;
1591
1592 /* Don't get confused by the index shift caused by deleting blocks. */
1593 i = b->index + 1;
1594 }
1595
1596 /* If we deleted an exception handler, we may have EH region begin/end
1597 blocks to remove as well. */
1598 if (deleted_handler)
1599 delete_eh_regions ();
1600}
1601
1602/* Find EH regions for which there is no longer a handler, and delete them. */
1603
1604static void
1605delete_eh_regions ()
1606{
1607 rtx insn;
1608
1609 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1610 if (GET_CODE (insn) == NOTE)
1611 {
1612 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG) ||
1613 (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END))
1614 {
1615 int num = CODE_LABEL_NUMBER (insn);
1616 /* A NULL handler indicates a region is no longer needed */
1617 if (get_first_handler (num) == NULL)
1618 {
1619 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1620 NOTE_SOURCE_FILE (insn) = 0;
1621 }
1622 }
1623 }
1624}
1625
1626/* Return true if NOTE is not one of the ones that must be kept paired,
1627 so that we may simply delete them. */
1628
1629static int
eeea333e 1630can_delete_note_p (note)
e881bb1b
RH
1631 rtx note;
1632{
1633 return (NOTE_LINE_NUMBER (note) == NOTE_INSN_DELETED
1634 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BASIC_BLOCK);
1635}
1636
1637/* Unlink a chain of insns between START and FINISH, leaving notes
1638 that must be paired. */
1639
1640static void
1641delete_insn_chain (start, finish)
1642 rtx start, finish;
1643{
1644 /* Unchain the insns one by one. It would be quicker to delete all
1645 of these with a single unchaining, rather than one at a time, but
1646 we need to keep the NOTE's. */
1647
1648 rtx next;
1649
1650 while (1)
1651 {
1652 next = NEXT_INSN (start);
eeea333e
RH
1653 if (GET_CODE (start) == NOTE && !can_delete_note_p (start))
1654 ;
1655 else if (GET_CODE (start) == CODE_LABEL && !can_delete_label_p (start))
1656 ;
1657 else
e881bb1b
RH
1658 next = flow_delete_insn (start);
1659
1660 if (start == finish)
1661 break;
1662 start = next;
1663 }
1664}
1665
1666/* Delete the insns in a (non-live) block. We physically delete every
1667 non-deleted-note insn, and update the flow graph appropriately.
1668
1669 Return nonzero if we deleted an exception handler. */
1670
1671/* ??? Preserving all such notes strikes me as wrong. It would be nice
1672 to post-process the stream to remove empty blocks, loops, ranges, etc. */
1673
1674static int
1675delete_block (b)
1676 basic_block b;
1677{
1678 int deleted_handler = 0;
1679 rtx insn, end;
1680
1681 /* If the head of this block is a CODE_LABEL, then it might be the
1682 label for an exception handler which can't be reached.
1683
1684 We need to remove the label from the exception_handler_label list
1685 and remove the associated NOTE_EH_REGION_BEG and NOTE_EH_REGION_END
1686 notes. */
1687
1688 insn = b->head;
088e7160 1689
e881bb1b
RH
1690 if (GET_CODE (insn) == CODE_LABEL)
1691 {
1692 rtx x, *prev = &exception_handler_labels;
1693
1694 for (x = exception_handler_labels; x; x = XEXP (x, 1))
1695 {
1696 if (XEXP (x, 0) == insn)
1697 {
1698 /* Found a match, splice this label out of the EH label list. */
1699 *prev = XEXP (x, 1);
1700 XEXP (x, 1) = NULL_RTX;
1701 XEXP (x, 0) = NULL_RTX;
1702
1703 /* Remove the handler from all regions */
1704 remove_handler (insn);
1705 deleted_handler = 1;
1706 break;
1707 }
1708 prev = &XEXP (x, 1);
1709 }
1710
1711 /* This label may be referenced by code solely for its value, or
1712 referenced by static data, or something. We have determined
1713 that it is not reachable, but cannot delete the label itself.
1714 Save code space and continue to delete the balance of the block,
1715 along with properly updating the cfg. */
1716 if (!can_delete_label_p (insn))
1717 {
1718 /* If we've only got one of these, skip the whole deleting
1719 insns thing. */
1720 if (insn == b->end)
1721 goto no_delete_insns;
1722 insn = NEXT_INSN (insn);
1723 }
1724 }
1725
1726 /* Selectively unlink the insn chain. Include any BARRIER that may
1727 follow the basic block. */
1728 end = next_nonnote_insn (b->end);
1729 if (!end || GET_CODE (end) != BARRIER)
1730 end = b->end;
1731 delete_insn_chain (insn, end);
1732
1733no_delete_insns:
1734
1735 /* Remove the edges into and out of this block. Note that there may
1736 indeed be edges in, if we are removing an unreachable loop. */
1737 {
1738 edge e, next, *q;
1739
1740 for (e = b->pred; e ; e = next)
1741 {
1742 for (q = &e->src->succ; *q != e; q = &(*q)->succ_next)
1743 continue;
1744 *q = e->succ_next;
1745 next = e->pred_next;
1746 free (e);
1747 }
1748 for (e = b->succ; e ; e = next)
1749 {
1750 for (q = &e->dest->pred; *q != e; q = &(*q)->pred_next)
1751 continue;
1752 *q = e->pred_next;
1753 next = e->succ_next;
1754 free (e);
1755 }
1756
1757 b->pred = NULL;
1758 b->succ = NULL;
1759 }
1760
1761 /* Remove the basic block from the array, and compact behind it. */
1762 expunge_block (b);
1763
1764 return deleted_handler;
1765}
1766
1767/* Remove block B from the basic block array and compact behind it. */
1768
1769static void
1770expunge_block (b)
1771 basic_block b;
1772{
1773 int i, n = n_basic_blocks;
1774
1775 for (i = b->index; i + 1 < n; ++i)
1776 {
1777 basic_block x = BASIC_BLOCK (i + 1);
1778 BASIC_BLOCK (i) = x;
1779 x->index = i;
1780 }
1781
1782 basic_block_info->num_elements--;
1783 n_basic_blocks--;
1784}
1785
1786/* Delete INSN by patching it out. Return the next insn. */
1787
1788static rtx
1789flow_delete_insn (insn)
1790 rtx insn;
1791{
1792 rtx prev = PREV_INSN (insn);
1793 rtx next = NEXT_INSN (insn);
1794
1795 PREV_INSN (insn) = NULL_RTX;
1796 NEXT_INSN (insn) = NULL_RTX;
1797
1798 if (prev)
1799 NEXT_INSN (prev) = next;
1800 if (next)
1801 PREV_INSN (next) = prev;
1802 else
1803 set_last_insn (prev);
e6cfb550 1804
e881bb1b
RH
1805 /* If deleting a jump, decrement the use count of the label. Deleting
1806 the label itself should happen in the normal course of block merging. */
1807 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
1808 LABEL_NUSES (JUMP_LABEL (insn))--;
1809
1810 return next;
d7429b6a 1811}
8329b5ec 1812
e881bb1b
RH
1813/* True if a given label can be deleted. */
1814
1815static int
1816can_delete_label_p (label)
1817 rtx label;
dc2ede84 1818{
e881bb1b 1819 rtx x;
dc2ede84 1820
e881bb1b
RH
1821 if (LABEL_PRESERVE_P (label))
1822 return 0;
421382ac 1823
e881bb1b
RH
1824 for (x = forced_labels; x ; x = XEXP (x, 1))
1825 if (label == XEXP (x, 0))
1826 return 0;
1827 for (x = label_value_list; x ; x = XEXP (x, 1))
1828 if (label == XEXP (x, 0))
1829 return 0;
1830 for (x = exception_handler_labels; x ; x = XEXP (x, 1))
1831 if (label == XEXP (x, 0))
1832 return 0;
dc2ede84 1833
abb3f0a9 1834 /* User declared labels must be preserved. */
088e7160 1835 if (LABEL_NAME (label) != 0)
abb3f0a9 1836 return 0;
088e7160 1837
e881bb1b
RH
1838 return 1;
1839}
421382ac 1840
e881bb1b
RH
1841/* Blocks A and B are to be merged into a single block. The insns
1842 are already contiguous, hence `nomove'. */
421382ac 1843
e881bb1b
RH
1844static void
1845merge_blocks_nomove (a, b)
1846 basic_block a, b;
1847{
1848 edge e;
f5c14c21
RH
1849 rtx b_head, b_end, a_end;
1850 int b_empty = 0;
1851
1852 /* If there was a CODE_LABEL beginning B, delete it. */
1853 b_head = b->head;
1854 b_end = b->end;
1855 if (GET_CODE (b_head) == CODE_LABEL)
1856 {
1857 /* Detect basic blocks with nothing but a label. This can happen
1858 in particular at the end of a function. */
1859 if (b_head == b_end)
1860 b_empty = 1;
1861 b_head = flow_delete_insn (b_head);
1862 }
1863
1864 /* Delete the basic block note. */
1865 if (GET_CODE (b_head) == NOTE
1866 && NOTE_LINE_NUMBER (b_head) == NOTE_INSN_BASIC_BLOCK)
1867 {
1868 if (b_head == b_end)
1869 b_empty = 1;
1870 b_head = flow_delete_insn (b_head);
1871 }
421382ac 1872
e881bb1b 1873 /* If there was a jump out of A, delete it. */
f5c14c21
RH
1874 a_end = a->end;
1875 if (GET_CODE (a_end) == JUMP_INSN)
e881bb1b 1876 {
f5c14c21 1877 rtx prev;
86879c21 1878
f5c14c21
RH
1879 prev = prev_nonnote_insn (a_end);
1880 if (!prev)
1881 prev = a->head;
86879c21
JL
1882
1883#ifdef HAVE_cc0
f5c14c21
RH
1884 /* If this was a conditional jump, we need to also delete
1885 the insn that set cc0. */
86879c21 1886
f5c14c21
RH
1887 if (prev && sets_cc0_p (prev))
1888 {
1889 rtx tmp = prev;
1890 prev = prev_nonnote_insn (prev);
1891 if (!prev)
1892 prev = a->head;
e881bb1b 1893 flow_delete_insn (tmp);
421382ac 1894 }
f5c14c21
RH
1895#endif
1896
1897 /* Note that a->head != a->end, since we should have at least a
1898 bb note plus the jump, so prev != insn. */
1899 flow_delete_insn (a_end);
1900 a_end = prev;
421382ac 1901 }
421382ac 1902
e881bb1b
RH
1903 /* By definition, there should only be one successor of A, and that is
1904 B. Free that edge struct. */
1905 free (a->succ);
1906
1907 /* Adjust the edges out of B for the new owner. */
1908 for (e = b->succ; e ; e = e->succ_next)
1909 e->src = a;
1910 a->succ = b->succ;
1911
e881bb1b 1912 /* Reassociate the insns of B with A. */
f5c14c21 1913 if (!b_empty)
e881bb1b 1914 {
f5c14c21
RH
1915 BLOCK_FOR_INSN (b_head) = a;
1916 while (b_head != b_end)
dc2ede84 1917 {
f5c14c21
RH
1918 b_head = NEXT_INSN (b_head);
1919 BLOCK_FOR_INSN (b_head) = a;
dc2ede84 1920 }
f5c14c21 1921 a_end = b_head;
e881bb1b 1922 }
f5c14c21 1923 a->end = a_end;
e881bb1b
RH
1924
1925 /* Compact the basic block array. */
1926 expunge_block (b);
dc2ede84
BS
1927}
1928
e881bb1b
RH
1929/* Attempt to merge basic blocks that are potentially non-adjacent.
1930 Return true iff the attempt succeeded. */
dc2ede84 1931
dc2ede84 1932static int
e881bb1b
RH
1933merge_blocks (e, b, c)
1934 edge e;
1935 basic_block b, c;
dc2ede84 1936{
e881bb1b
RH
1937 /* If B has a fallthru edge to C, no need to move anything. */
1938 if (!(e->flags & EDGE_FALLTHRU))
1939 {
1940 /* ??? From here on out we must make sure to not munge nesting
1941 of exception regions and lexical blocks. Need to think about
1942 these cases before this gets implemented. */
1943 return 0;
1944
1945 /* If C has an outgoing fallthru, and B does not have an incoming
1946 fallthru, move B before C. The later clause is somewhat arbitrary,
1947 but avoids modifying blocks other than the two we've been given. */
1948
1949 /* Otherwise, move C after B. If C had a fallthru, which doesn't
1950 happen to be the physical successor to B, insert an unconditional
1951 branch. If C already ended with a conditional branch, the new
1952 jump must go in a new basic block D. */
1953 }
dc2ede84 1954
34487bf8
RH
1955 /* If a label still appears somewhere and we cannot delete the label,
1956 then we cannot merge the blocks. The edge was tidied already. */
1957 {
1958 rtx insn, stop = NEXT_INSN (c->head);
1959 for (insn = NEXT_INSN (b->end); insn != stop; insn = NEXT_INSN (insn))
1960 if (GET_CODE (insn) == CODE_LABEL && !can_delete_label_p (insn))
1961 return 0;
1962 }
421382ac 1963
e881bb1b
RH
1964 merge_blocks_nomove (b, c);
1965 return 1;
1966}
421382ac 1967
e881bb1b
RH
1968/* The given edge should potentially a fallthru edge. If that is in
1969 fact true, delete the unconditional jump and barriers that are in
1970 the way. */
1971
1972static void
1973tidy_fallthru_edge (e, b, c)
1974 edge e;
1975 basic_block b, c;
1976{
eeea333e 1977 rtx q;
e881bb1b
RH
1978
1979 /* ??? In a late-running flow pass, other folks may have deleted basic
1980 blocks by nopping out blocks, leaving multiple BARRIERs between here
1981 and the target label. They ought to be chastized and fixed.
1982
eeea333e
RH
1983 We can also wind up with a sequence of undeletable labels between
1984 one block and the next.
dc2ede84 1985
eeea333e
RH
1986 So search through a sequence of barriers, labels, and notes for
1987 the head of block C and assert that we really do fall through. */
421382ac 1988
eeea333e 1989 if (next_real_insn (b->end) != next_real_insn (PREV_INSN (c->head)))
e881bb1b 1990 return;
421382ac 1991
e881bb1b
RH
1992 /* Remove what will soon cease being the jump insn from the source block.
1993 If block B consisted only of this single jump, turn it into a deleted
1994 note. */
1995 q = b->end;
1996 if (GET_CODE (q) == JUMP_INSN)
421382ac 1997 {
86a1db60
RH
1998#ifdef HAVE_cc0
1999 /* If this was a conditional jump, we need to also delete
2000 the insn that set cc0. */
2001 if (! simplejump_p (q) && condjump_p (q))
2002 q = PREV_INSN (q);
2003#endif
2004
e881bb1b
RH
2005 if (b->head == q)
2006 {
2007 PUT_CODE (q, NOTE);
2008 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
2009 NOTE_SOURCE_FILE (q) = 0;
2010 }
e3f6ee23 2011 else
e881bb1b 2012 b->end = q = PREV_INSN (q);
421382ac 2013 }
421382ac 2014
e881bb1b 2015 /* Selectively unlink the sequence. */
86a1db60
RH
2016 if (q != PREV_INSN (c->head))
2017 delete_insn_chain (NEXT_INSN (q), PREV_INSN (c->head));
b7f7462b 2018
e881bb1b
RH
2019 e->flags |= EDGE_FALLTHRU;
2020}
dc2ede84 2021
e881bb1b
RH
2022/* Discover and record the loop depth at the head of each basic block. */
2023
2024static void
2025calculate_loop_depth (insns)
2026 rtx insns;
2027{
2028 basic_block bb;
2029 rtx insn;
2030 int i = 0, depth = 1;
dc2ede84 2031
e881bb1b
RH
2032 bb = BASIC_BLOCK (i);
2033 for (insn = insns; insn ; insn = NEXT_INSN (insn))
dc2ede84 2034 {
e881bb1b
RH
2035 if (insn == bb->head)
2036 {
2037 bb->loop_depth = depth;
2038 if (++i >= n_basic_blocks)
dc2ede84 2039 break;
e881bb1b
RH
2040 bb = BASIC_BLOCK (i);
2041 }
dc2ede84 2042
e881bb1b
RH
2043 if (GET_CODE (insn) == NOTE)
2044 {
2045 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2046 depth++;
2047 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2048 depth--;
2049
2050 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. */
2051 if (depth == 0)
2052 abort ();
2053 }
2054 }
dc2ede84 2055}
d7429b6a 2056\f
5ece9746
JL
2057/* Perform data flow analysis.
2058 F is the first insn of the function and NREGS the number of register numbers
2059 in use. */
2060
2061void
11f246f6 2062life_analysis (f, nregs, file, remove_dead_code)
5ece9746
JL
2063 rtx f;
2064 int nregs;
2065 FILE *file;
11f246f6 2066 int remove_dead_code;
5ece9746 2067{
5ece9746 2068#ifdef ELIMINABLE_REGS
ecb06768 2069 register size_t i;
5ece9746
JL
2070 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
2071#endif
2072
2073 /* Record which registers will be eliminated. We use this in
2074 mark_used_regs. */
2075
2076 CLEAR_HARD_REG_SET (elim_reg_set);
2077
2078#ifdef ELIMINABLE_REGS
2079 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
2080 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
2081#else
2082 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
2083#endif
2084
e881bb1b
RH
2085 /* Allocate a bitmap to be filled in by record_volatile_insns. */
2086 uid_volatile = BITMAP_ALLOCA ();
2087
db3a887b
CB
2088 /* We want alias analysis information for local dead store elimination. */
2089 init_alias_analysis ();
11f246f6 2090 life_analysis_1 (f, nregs, remove_dead_code);
db3a887b
CB
2091 end_alias_analysis ();
2092
5ece9746
JL
2093 if (file)
2094 dump_flow_info (file);
2095
e881bb1b 2096 BITMAP_FREE (uid_volatile);
5ece9746
JL
2097 free_basic_block_vars (1);
2098}
2099
2100/* Free the variables allocated by find_basic_blocks.
2101
e881bb1b 2102 KEEP_HEAD_END_P is non-zero if basic_block_info is not to be freed. */
5ece9746
JL
2103
2104void
2105free_basic_block_vars (keep_head_end_p)
2106 int keep_head_end_p;
2107{
e881bb1b 2108 if (basic_block_for_insn)
5ece9746 2109 {
e881bb1b
RH
2110 VARRAY_FREE (basic_block_for_insn);
2111 basic_block_for_insn = NULL;
5ece9746
JL
2112 }
2113
e881bb1b 2114 if (! keep_head_end_p)
5ece9746 2115 {
e881bb1b
RH
2116 clear_edges ();
2117 VARRAY_FREE (basic_block_info);
2118 n_basic_blocks = 0;
359da67d
RH
2119
2120 ENTRY_BLOCK_PTR->aux = NULL;
2121 ENTRY_BLOCK_PTR->global_live_at_end = NULL;
2122 EXIT_BLOCK_PTR->aux = NULL;
2123 EXIT_BLOCK_PTR->global_live_at_start = NULL;
5ece9746
JL
2124 }
2125}
2126
dc2ede84
BS
2127/* Return nonzero if the destination of SET equals the source. */
2128static int
2129set_noop_p (set)
2130 rtx set;
2131{
2132 rtx src = SET_SRC (set);
2133 rtx dst = SET_DEST (set);
2134 if (GET_CODE (src) == REG && GET_CODE (dst) == REG
2135 && REGNO (src) == REGNO (dst))
2136 return 1;
2137 if (GET_CODE (src) != SUBREG || GET_CODE (dst) != SUBREG
2138 || SUBREG_WORD (src) != SUBREG_WORD (dst))
2139 return 0;
2140 src = SUBREG_REG (src);
2141 dst = SUBREG_REG (dst);
2142 if (GET_CODE (src) == REG && GET_CODE (dst) == REG
2143 && REGNO (src) == REGNO (dst))
2144 return 1;
2145 return 0;
2146}
2147
2148/* Return nonzero if an insn consists only of SETs, each of which only sets a
2149 value to itself. */
2150static int
2151noop_move_p (insn)
2152 rtx insn;
2153{
2154 rtx pat = PATTERN (insn);
2155
2156 /* Insns carrying these notes are useful later on. */
2157 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
2158 return 0;
2159
2160 if (GET_CODE (pat) == SET && set_noop_p (pat))
2161 return 1;
2162
2163 if (GET_CODE (pat) == PARALLEL)
2164 {
2165 int i;
2166 /* If nothing but SETs of registers to themselves,
2167 this insn can also be deleted. */
2168 for (i = 0; i < XVECLEN (pat, 0); i++)
2169 {
2170 rtx tem = XVECEXP (pat, 0, i);
2171
2172 if (GET_CODE (tem) == USE
2173 || GET_CODE (tem) == CLOBBER)
2174 continue;
2175
2176 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
2177 return 0;
2178 }
2179
2180 return 1;
2181 }
2182 return 0;
2183}
2184
fdb8a883
JW
2185static void
2186notice_stack_pointer_modification (x, pat)
2187 rtx x;
2188 rtx pat ATTRIBUTE_UNUSED;
2189{
2190 if (x == stack_pointer_rtx
2191 /* The stack pointer is only modified indirectly as the result
2192 of a push until later in flow. See the comments in rtl.texi
2193 regarding Embedded Side-Effects on Addresses. */
2194 || (GET_CODE (x) == MEM
2195 && (GET_CODE (XEXP (x, 0)) == PRE_DEC
2196 || GET_CODE (XEXP (x, 0)) == PRE_INC
2197 || GET_CODE (XEXP (x, 0)) == POST_DEC
2198 || GET_CODE (XEXP (x, 0)) == POST_INC)
2199 && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx))
2200 current_function_sp_is_unchanging = 0;
2201}
2202
dc2ede84
BS
2203/* Record which insns refer to any volatile memory
2204 or for any reason can't be deleted just because they are dead stores.
fdb8a883
JW
2205 Also, delete any insns that copy a register to itself.
2206 And see if the stack pointer is modified. */
dc2ede84
BS
2207static void
2208record_volatile_insns (f)
2209 rtx f;
2210{
2211 rtx insn;
2212 for (insn = f; insn; insn = NEXT_INSN (insn))
2213 {
2214 enum rtx_code code1 = GET_CODE (insn);
2215 if (code1 == CALL_INSN)
e881bb1b 2216 SET_INSN_VOLATILE (insn);
dc2ede84
BS
2217 else if (code1 == INSN || code1 == JUMP_INSN)
2218 {
2219 if (GET_CODE (PATTERN (insn)) != USE
2220 && volatile_refs_p (PATTERN (insn)))
e881bb1b 2221 SET_INSN_VOLATILE (insn);
dc2ede84
BS
2222
2223 /* A SET that makes space on the stack cannot be dead.
2224 (Such SETs occur only for allocating variable-size data,
2225 so they will always have a PLUS or MINUS according to the
2226 direction of stack growth.)
2227 Even if this function never uses this stack pointer value,
2228 signal handlers do! */
2229 else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET
2230 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
2231#ifdef STACK_GROWS_DOWNWARD
2232 && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS
2233#else
2234 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
2235#endif
2236 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx)
e881bb1b 2237 SET_INSN_VOLATILE (insn);
dc2ede84
BS
2238
2239 /* Delete (in effect) any obvious no-op moves. */
2240 else if (noop_move_p (insn))
2241 {
2242 PUT_CODE (insn, NOTE);
2243 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2244 NOTE_SOURCE_FILE (insn) = 0;
2245 }
2246 }
fdb8a883
JW
2247
2248 /* Check if insn modifies the stack pointer. */
2249 if ( current_function_sp_is_unchanging
2250 && GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2251 note_stores (PATTERN (insn), notice_stack_pointer_modification);
dc2ede84
BS
2252 }
2253}
2254
2255/* Mark those regs which are needed at the end of the function as live
2256 at the end of the last basic block. */
2257static void
2258mark_regs_live_at_end (set)
2259 regset set;
2260{
2261 int i;
2262
e881bb1b
RH
2263 /* If exiting needs the right stack value, consider the stack pointer
2264 live at the end of the function. */
dc2ede84
BS
2265 if (! EXIT_IGNORE_STACK
2266 || (! FRAME_POINTER_REQUIRED
2267 && ! current_function_calls_alloca
fdb8a883
JW
2268 && flag_omit_frame_pointer)
2269 || current_function_sp_is_unchanging)
e881bb1b
RH
2270 {
2271 SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM);
2272 }
dc2ede84 2273
e881bb1b 2274 /* Mark the frame pointer if needed at the end of the function. If
dc2ede84
BS
2275 we end up eliminating it, it will be removed from the live list
2276 of each basic block by reload. */
2277
2278 SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM);
2279#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2280 /* If they are different, also mark the hard frame pointer as live */
2281 SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM);
2282#endif
2283
e881bb1b 2284 /* Mark all global registers, and all registers used by the epilogue
dc2ede84
BS
2285 as being live at the end of the function since they may be
2286 referenced by our caller. */
2287 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2288 if (global_regs[i]
2289#ifdef EPILOGUE_USES
2290 || EPILOGUE_USES (i)
2291#endif
2292 )
2293 SET_REGNO_REG_SET (set, i);
e881bb1b
RH
2294
2295 /* ??? Mark function return value here rather than as uses. */
dc2ede84
BS
2296}
2297
d7429b6a
RK
2298/* Determine which registers are live at the start of each
2299 basic block of the function whose first insn is F.
2300 NREGS is the number of registers used in F.
2301 We allocate the vector basic_block_live_at_start
2302 and the regsets that it points to, and fill them with the data.
2303 regset_size and regset_bytes are also set here. */
2304
2305static void
11f246f6 2306life_analysis_1 (f, nregs, remove_dead_code)
d7429b6a
RK
2307 rtx f;
2308 int nregs;
11f246f6 2309 int remove_dead_code;
d7429b6a 2310{
d7429b6a
RK
2311 int first_pass;
2312 int changed;
d7429b6a 2313 register int i;
6764d250 2314 char save_regs_ever_live[FIRST_PSEUDO_REGISTER];
e881bb1b 2315 regset *new_live_at_end;
d7429b6a
RK
2316
2317 struct obstack flow_obstack;
2318
2319 gcc_obstack_init (&flow_obstack);
2320
2321 max_regno = nregs;
2322
d7429b6a
RK
2323 /* Allocate and zero out many data structures
2324 that will record the data from lifetime analysis. */
2325
359da67d
RH
2326 allocate_reg_life_data ();
2327 allocate_bb_life_data ();
d7429b6a
RK
2328
2329 reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
e881bb1b 2330 memset (reg_next_use, 0, nregs * sizeof (rtx));
d7429b6a 2331
e881bb1b 2332 /* Set up regset-vectors used internally within this function.
d7429b6a
RK
2333 Their meanings are documented above, with their declarations. */
2334
e881bb1b
RH
2335 new_live_at_end = (regset *) alloca ((n_basic_blocks + 1) * sizeof (regset));
2336 init_regset_vector (new_live_at_end, n_basic_blocks + 1, &flow_obstack);
4c9a05bc 2337
e881bb1b
RH
2338 /* Stick these vectors into the AUX field of the basic block, so that
2339 we don't have to keep going through the index. */
d7429b6a 2340
e881bb1b
RH
2341 for (i = 0; i < n_basic_blocks; ++i)
2342 BASIC_BLOCK (i)->aux = new_live_at_end[i];
2343 ENTRY_BLOCK_PTR->aux = new_live_at_end[i];
d7429b6a 2344
fdb8a883
JW
2345 /* Assume that the stack pointer is unchanging if alloca hasn't been used.
2346 This will be cleared by record_volatile_insns if it encounters an insn
2347 which modifies the stack pointer. */
2348 current_function_sp_is_unchanging = !current_function_calls_alloca;
2349
dc2ede84 2350 record_volatile_insns (f);
fe0f9c4b
RK
2351
2352 if (n_basic_blocks > 0)
2353 {
e881bb1b
RH
2354 regset theend;
2355 register edge e;
2356
2357 theend = EXIT_BLOCK_PTR->global_live_at_start;
2358 mark_regs_live_at_end (theend);
2359
2360 /* Propogate this exit data to each of EXIT's predecessors. */
2361 for (e = EXIT_BLOCK_PTR->pred; e ; e = e->pred_next)
2362 {
2363 COPY_REG_SET (e->src->global_live_at_end, theend);
2364 COPY_REG_SET ((regset) e->src->aux, theend);
2365 }
dc2ede84 2366 }
d7429b6a 2367
e881bb1b
RH
2368 /* The post-reload life analysis have (on a global basis) the same registers
2369 live as was computed by reload itself.
2370
2371 Otherwise elimination offsets and such may be incorrect.
2372
2373 Reload will make some registers as live even though they do not appear
2374 in the rtl. */
2375 if (reload_completed)
2376 memcpy (save_regs_ever_live, regs_ever_live, sizeof (regs_ever_live));
2377 memset (regs_ever_live, 0, sizeof regs_ever_live);
2378
d7429b6a
RK
2379 /* Propagate life info through the basic blocks
2380 around the graph of basic blocks.
2381
2382 This is a relaxation process: each time a new register
2383 is live at the end of the basic block, we must scan the block
2384 to determine which registers are, as a consequence, live at the beginning
2385 of that block. These registers must then be marked live at the ends
2386 of all the blocks that can transfer control to that block.
2387 The process continues until it reaches a fixed point. */
2388
2389 first_pass = 1;
2390 changed = 1;
2391 while (changed)
2392 {
2393 changed = 0;
2394 for (i = n_basic_blocks - 1; i >= 0; i--)
2395 {
e881bb1b 2396 basic_block bb = BASIC_BLOCK (i);
d7429b6a
RK
2397 int consider = first_pass;
2398 int must_rescan = first_pass;
2399 register int j;
2400
2401 if (!first_pass)
2402 {
2403 /* Set CONSIDER if this block needs thinking about at all
2404 (that is, if the regs live now at the end of it
2405 are not the same as were live at the end of it when
2406 we last thought about it).
2407 Set must_rescan if it needs to be thought about
2408 instruction by instruction (that is, if any additional
2409 reg that is live at the end now but was not live there before
2410 is one of the significant regs of this basic block). */
2411
b5835272 2412 EXECUTE_IF_AND_COMPL_IN_REG_SET
e881bb1b 2413 ((regset) bb->aux, bb->global_live_at_end, 0, j,
b5835272
RK
2414 {
2415 consider = 1;
e881bb1b 2416 if (REGNO_REG_SET_P (bb->local_set, j))
b5835272
RK
2417 {
2418 must_rescan = 1;
2419 goto done;
2420 }
2421 });
916b1701 2422 done:
d7429b6a
RK
2423 if (! consider)
2424 continue;
2425 }
2426
2427 /* The live_at_start of this block may be changing,
2428 so another pass will be required after this one. */
2429 changed = 1;
2430
2431 if (! must_rescan)
2432 {
2433 /* No complete rescan needed;
2434 just record those variables newly known live at end
2435 as live at start as well. */
e881bb1b
RH
2436 IOR_AND_COMPL_REG_SET (bb->global_live_at_start,
2437 (regset) bb->aux,
2438 bb->global_live_at_end);
916b1701 2439
e881bb1b
RH
2440 IOR_AND_COMPL_REG_SET (bb->global_live_at_end,
2441 (regset) bb->aux,
2442 bb->global_live_at_end);
d7429b6a
RK
2443 }
2444 else
2445 {
2446 /* Update the basic_block_live_at_start
2447 by propagation backwards through the block. */
e881bb1b
RH
2448 COPY_REG_SET (bb->global_live_at_end, (regset) bb->aux);
2449 COPY_REG_SET (bb->global_live_at_start,
2450 bb->global_live_at_end);
2451 propagate_block (bb->global_live_at_start,
2452 bb->head, bb->end, 0,
2453 first_pass ? bb->local_set : (regset) 0,
11f246f6 2454 i, remove_dead_code);
d7429b6a
RK
2455 }
2456
e881bb1b 2457 /* Update the new_live_at_end's of the block's predecessors. */
d7429b6a 2458 {
e881bb1b 2459 register edge e;
af14ce9c 2460
e881bb1b
RH
2461 for (e = bb->pred; e ; e = e->pred_next)
2462 IOR_REG_SET ((regset) e->src->aux, bb->global_live_at_start);
d7429b6a 2463 }
e881bb1b 2464
d7429b6a
RK
2465#ifdef USE_C_ALLOCA
2466 alloca (0);
2467#endif
2468 }
2469 first_pass = 0;
2470 }
2471
2472 /* The only pseudos that are live at the beginning of the function are
2473 those that were not set anywhere in the function. local-alloc doesn't
2474 know how to handle these correctly, so mark them as not local to any
2475 one basic block. */
2476
2477 if (n_basic_blocks > 0)
e881bb1b 2478 EXECUTE_IF_SET_IN_REG_SET (BASIC_BLOCK (0)->global_live_at_start,
916b1701
MM
2479 FIRST_PSEUDO_REGISTER, i,
2480 {
2481 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
2482 });
d7429b6a 2483
e881bb1b
RH
2484 /* Now the life information is accurate. Make one more pass over each
2485 basic block to delete dead stores, create autoincrement addressing
2486 and record how many times each register is used, is set, or dies. */
d7429b6a 2487
d7429b6a
RK
2488 for (i = 0; i < n_basic_blocks; i++)
2489 {
e881bb1b
RH
2490 basic_block bb = BASIC_BLOCK (i);
2491
2492 /* We start with global_live_at_end to determine which stores are
2493 dead. This process is destructive, and we wish to preserve the
2494 contents of global_live_at_end for posterity. Fortunately,
2495 new_live_at_end, due to the way we converged on a solution,
2496 contains a duplicate of global_live_at_end that we can kill. */
11f246f6 2497 propagate_block ((regset) bb->aux, bb->head, bb->end, 1, (regset) 0, i, remove_dead_code);
e881bb1b 2498
d7429b6a
RK
2499#ifdef USE_C_ALLOCA
2500 alloca (0);
2501#endif
2502 }
2503
e881bb1b
RH
2504 /* We have a problem with any pseudoreg that lives across the setjmp.
2505 ANSI says that if a user variable does not change in value between
2506 the setjmp and the longjmp, then the longjmp preserves it. This
2507 includes longjmp from a place where the pseudo appears dead.
d7429b6a
RK
2508 (In principle, the value still exists if it is in scope.)
2509 If the pseudo goes in a hard reg, some other value may occupy
2510 that hard reg where this pseudo is dead, thus clobbering the pseudo.
2511 Conclusion: such a pseudo must not go in a hard reg. */
916b1701
MM
2512 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
2513 FIRST_PSEUDO_REGISTER, i,
2514 {
2515 if (regno_reg_rtx[i] != 0)
2516 {
2517 REG_LIVE_LENGTH (i) = -1;
2518 REG_BASIC_BLOCK (i) = -1;
2519 }
2520 });
d7429b6a 2521
6764d250
BS
2522 /* Restore regs_ever_live that was provided by reload. */
2523 if (reload_completed)
e881bb1b 2524 memcpy (regs_ever_live, save_regs_ever_live, sizeof (regs_ever_live));
67f0e213 2525
e881bb1b 2526 free_regset_vector (new_live_at_end, n_basic_blocks);
5f4f0e22 2527 obstack_free (&flow_obstack, NULL_PTR);
e881bb1b
RH
2528
2529 for (i = 0; i < n_basic_blocks; ++i)
2530 BASIC_BLOCK (i)->aux = NULL;
2531 ENTRY_BLOCK_PTR->aux = NULL;
d7429b6a
RK
2532}
2533\f
2534/* Subroutines of life analysis. */
2535
2536/* Allocate the permanent data structures that represent the results
2537 of life analysis. Not static since used also for stupid life analysis. */
2538
2539void
359da67d 2540allocate_bb_life_data ()
d7429b6a
RK
2541{
2542 register int i;
d7429b6a 2543
e881bb1b
RH
2544 for (i = 0; i < n_basic_blocks; i++)
2545 {
2546 basic_block bb = BASIC_BLOCK (i);
2547
2548 bb->local_set = OBSTACK_ALLOC_REG_SET (function_obstack);
2549 bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (function_obstack);
2550 bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (function_obstack);
2551 }
2552
2553 ENTRY_BLOCK_PTR->global_live_at_end
2554 = OBSTACK_ALLOC_REG_SET (function_obstack);
2555 EXIT_BLOCK_PTR->global_live_at_start
2556 = OBSTACK_ALLOC_REG_SET (function_obstack);
d7429b6a 2557
7eb136d6 2558 regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (function_obstack);
359da67d
RH
2559}
2560
2561void
2562allocate_reg_life_data ()
2563{
2564 int i;
2565
2566 /* Recalculate the register space, in case it has grown. Old style
2567 vector oriented regsets would set regset_{size,bytes} here also. */
2568 allocate_reg_info (max_regno, FALSE, FALSE);
2569
2570 /* Because both reg_scan and flow_analysis want to set up the REG_N_SETS
2571 information, explicitly reset it here. The allocation should have
2572 already happened on the previous reg_scan pass. Make sure in case
2573 some more registers were allocated. */
2574 for (i = 0; i < max_regno; i++)
2575 REG_N_SETS (i) = 0;
d7429b6a
RK
2576}
2577
67f0e213
RK
2578/* Make each element of VECTOR point at a regset. The vector has
2579 NELTS elements, and space is allocated from the ALLOC_OBSTACK
2580 obstack. */
d7429b6a 2581
04821e98 2582static void
67f0e213 2583init_regset_vector (vector, nelts, alloc_obstack)
d7429b6a 2584 regset *vector;
d7429b6a 2585 int nelts;
7eb136d6 2586 struct obstack *alloc_obstack;
d7429b6a
RK
2587{
2588 register int i;
d7429b6a
RK
2589
2590 for (i = 0; i < nelts; i++)
2591 {
7eb136d6
MM
2592 vector[i] = OBSTACK_ALLOC_REG_SET (alloc_obstack);
2593 CLEAR_REG_SET (vector[i]);
d7429b6a
RK
2594 }
2595}
e658434c 2596
67f0e213
RK
2597/* Release any additional space allocated for each element of VECTOR point
2598 other than the regset header itself. The vector has NELTS elements. */
2599
2600void
2601free_regset_vector (vector, nelts)
2602 regset *vector;
2603 int nelts;
2604{
2605 register int i;
2606
2607 for (i = 0; i < nelts; i++)
2608 FREE_REG_SET (vector[i]);
2609}
2610
d7429b6a
RK
2611/* Compute the registers live at the beginning of a basic block
2612 from those live at the end.
2613
2614 When called, OLD contains those live at the end.
2615 On return, it contains those live at the beginning.
2616 FIRST and LAST are the first and last insns of the basic block.
2617
2618 FINAL is nonzero if we are doing the final pass which is not
2619 for computing the life info (since that has already been done)
2620 but for acting on it. On this pass, we delete dead stores,
2621 set up the logical links and dead-variables lists of instructions,
2622 and merge instructions for autoincrement and autodecrement addresses.
2623
2624 SIGNIFICANT is nonzero only the first time for each basic block.
2625 If it is nonzero, it points to a regset in which we store
2626 a 1 for each register that is set within the block.
2627
2628 BNUM is the number of the basic block. */
2629
2630static void
11f246f6 2631propagate_block (old, first, last, final, significant, bnum, remove_dead_code)
d7429b6a
RK
2632 register regset old;
2633 rtx first;
2634 rtx last;
2635 int final;
2636 regset significant;
2637 int bnum;
11f246f6 2638 int remove_dead_code;
d7429b6a
RK
2639{
2640 register rtx insn;
2641 rtx prev;
2642 regset live;
2643 regset dead;
2644
e881bb1b
RH
2645 /* Find the loop depth for this block. Ignore loop level changes in the
2646 middle of the basic block -- for register allocation purposes, the
2647 important uses will be in the blocks wholely contained within the loop
2648 not in the loop pre-header or post-trailer. */
2649 loop_depth = BASIC_BLOCK (bnum)->loop_depth;
d7429b6a 2650
7eb136d6
MM
2651 dead = ALLOCA_REG_SET ();
2652 live = ALLOCA_REG_SET ();
d7429b6a
RK
2653
2654 cc0_live = 0;
db3a887b 2655 mem_set_list = NULL_RTX;
d7429b6a 2656
d7429b6a
RK
2657 if (final)
2658 {
916b1701 2659 register int i;
d7429b6a 2660
d7429b6a 2661 /* Process the regs live at the end of the block.
f8dd7f98 2662 Mark them as not local to any one basic block. */
916b1701
MM
2663 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
2664 {
2665 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
916b1701 2666 });
d7429b6a
RK
2667 }
2668
2669 /* Scan the block an insn at a time from end to beginning. */
2670
2671 for (insn = last; ; insn = prev)
2672 {
2673 prev = PREV_INSN (insn);
2674
8329b5ec 2675 if (GET_CODE (insn) == NOTE)
d7429b6a 2676 {
8329b5ec
DE
2677 /* If this is a call to `setjmp' et al,
2678 warn if any non-volatile datum is live. */
2679
2680 if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
916b1701 2681 IOR_REG_SET (regs_live_at_setjmp, old);
d7429b6a
RK
2682 }
2683
2684 /* Update the life-status of regs for this insn.
2685 First DEAD gets which regs are set in this insn
2686 then LIVE gets which regs are used in this insn.
2687 Then the regs live before the insn
2688 are those live after, with DEAD regs turned off,
2689 and then LIVE regs turned on. */
2690
8329b5ec 2691 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
d7429b6a
RK
2692 {
2693 register int i;
5f4f0e22 2694 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
11f246f6
JH
2695 int insn_is_dead = 0;
2696 int libcall_is_dead = 0;
2697
2698 if (remove_dead_code)
2699 {
2700 insn_is_dead = (insn_dead_p (PATTERN (insn), old, 0, REG_NOTES (insn))
2701 /* Don't delete something that refers to volatile storage! */
2702 && ! INSN_VOLATILE (insn));
2703 libcall_is_dead = (insn_is_dead && note != 0
2704 && libcall_dead_p (PATTERN (insn), old, note, insn));
2705 }
d7429b6a
RK
2706
2707 /* If an instruction consists of just dead store(s) on final pass,
2708 "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
2709 We could really delete it with delete_insn, but that
2710 can cause trouble for first or last insn in a basic block. */
b590bbfd 2711 if (final && insn_is_dead)
d7429b6a
RK
2712 {
2713 PUT_CODE (insn, NOTE);
2714 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2715 NOTE_SOURCE_FILE (insn) = 0;
2716
e5df1ea3
RK
2717 /* CC0 is now known to be dead. Either this insn used it,
2718 in which case it doesn't anymore, or clobbered it,
2719 so the next insn can't use it. */
2720 cc0_live = 0;
2721
d7429b6a
RK
2722 /* If this insn is copying the return value from a library call,
2723 delete the entire library call. */
2724 if (libcall_is_dead)
2725 {
2726 rtx first = XEXP (note, 0);
2727 rtx p = insn;
2728 while (INSN_DELETED_P (first))
2729 first = NEXT_INSN (first);
2730 while (p != first)
2731 {
2732 p = PREV_INSN (p);
2733 PUT_CODE (p, NOTE);
2734 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
2735 NOTE_SOURCE_FILE (p) = 0;
2736 }
2737 }
2738 goto flushed;
2739 }
2740
916b1701
MM
2741 CLEAR_REG_SET (dead);
2742 CLEAR_REG_SET (live);
d7429b6a
RK
2743
2744 /* See if this is an increment or decrement that can be
2745 merged into a following memory address. */
2746#ifdef AUTO_INC_DEC
2747 {
956d6950
JL
2748 register rtx x = single_set (insn);
2749
d7429b6a 2750 /* Does this instruction increment or decrement a register? */
6764d250
BS
2751 if (!reload_completed
2752 && final && x != 0
d7429b6a
RK
2753 && GET_CODE (SET_DEST (x)) == REG
2754 && (GET_CODE (SET_SRC (x)) == PLUS
2755 || GET_CODE (SET_SRC (x)) == MINUS)
2756 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
2757 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
2758 /* Ok, look for a following memory ref we can combine with.
2759 If one is found, change the memory ref to a PRE_INC
2760 or PRE_DEC, cancel this insn, and return 1.
2761 Return 0 if nothing has been done. */
2762 && try_pre_increment_1 (insn))
2763 goto flushed;
2764 }
2765#endif /* AUTO_INC_DEC */
2766
2767 /* If this is not the final pass, and this insn is copying the
2768 value of a library call and it's dead, don't scan the
2769 insns that perform the library call, so that the call's
2770 arguments are not marked live. */
2771 if (libcall_is_dead)
2772 {
2773 /* Mark the dest reg as `significant'. */
5f4f0e22 2774 mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant);
d7429b6a
RK
2775
2776 insn = XEXP (note, 0);
2777 prev = PREV_INSN (insn);
2778 }
2779 else if (GET_CODE (PATTERN (insn)) == SET
2780 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
2781 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
2782 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
2783 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
2784 /* We have an insn to pop a constant amount off the stack.
2785 (Such insns use PLUS regardless of the direction of the stack,
2786 and any insn to adjust the stack by a constant is always a pop.)
2787 These insns, if not dead stores, have no effect on life. */
2788 ;
2789 else
2790 {
f8dd7f98
BS
2791 /* Any regs live at the time of a call instruction
2792 must not go in a register clobbered by calls.
2793 Find all regs now live and record this for them. */
2794
2795 if (GET_CODE (insn) == CALL_INSN && final)
2796 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
2797 {
2798 REG_N_CALLS_CROSSED (i)++;
2799 });
2800
d7429b6a
RK
2801 /* LIVE gets the regs used in INSN;
2802 DEAD gets those set by it. Dead insns don't make anything
2803 live. */
2804
5f4f0e22
CH
2805 mark_set_regs (old, dead, PATTERN (insn),
2806 final ? insn : NULL_RTX, significant);
d7429b6a
RK
2807
2808 /* If an insn doesn't use CC0, it becomes dead since we
2809 assume that every insn clobbers it. So show it dead here;
2810 mark_used_regs will set it live if it is referenced. */
2811 cc0_live = 0;
2812
2813 if (! insn_is_dead)
2814 mark_used_regs (old, live, PATTERN (insn), final, insn);
2815
2816 /* Sometimes we may have inserted something before INSN (such as
2817 a move) when we make an auto-inc. So ensure we will scan
2818 those insns. */
2819#ifdef AUTO_INC_DEC
2820 prev = PREV_INSN (insn);
2821#endif
2822
2823 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
2824 {
2825 register int i;
2826
6b67ec08
RK
2827 rtx note;
2828
2829 for (note = CALL_INSN_FUNCTION_USAGE (insn);
2830 note;
2831 note = XEXP (note, 1))
2832 if (GET_CODE (XEXP (note, 0)) == USE)
2833 mark_used_regs (old, live, SET_DEST (XEXP (note, 0)),
2834 final, insn);
2835
d7429b6a 2836 /* Each call clobbers all call-clobbered regs that are not
e4329280 2837 global or fixed. Note that the function-value reg is a
d7429b6a
RK
2838 call-clobbered reg, and mark_set_regs has already had
2839 a chance to handle it. */
2840
2841 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e4329280
RK
2842 if (call_used_regs[i] && ! global_regs[i]
2843 && ! fixed_regs[i])
916b1701 2844 SET_REGNO_REG_SET (dead, i);
d7429b6a
RK
2845
2846 /* The stack ptr is used (honorarily) by a CALL insn. */
916b1701 2847 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
2848
2849 /* Calls may also reference any of the global registers,
2850 so they are made live. */
d7429b6a
RK
2851 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2852 if (global_regs[i])
9b316aa2 2853 mark_used_regs (old, live,
38a448ca 2854 gen_rtx_REG (reg_raw_mode[i], i),
9b316aa2 2855 final, insn);
d7429b6a
RK
2856
2857 /* Calls also clobber memory. */
db3a887b 2858 mem_set_list = NULL_RTX;
d7429b6a
RK
2859 }
2860
2861 /* Update OLD for the registers used or set. */
916b1701
MM
2862 AND_COMPL_REG_SET (old, dead);
2863 IOR_REG_SET (old, live);
d7429b6a 2864
d7429b6a
RK
2865 }
2866
f8dd7f98
BS
2867 /* On final pass, update counts of how many insns each reg is live
2868 at. */
d7429b6a 2869 if (final)
f8dd7f98
BS
2870 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
2871 { REG_LIVE_LENGTH (i)++; });
d7429b6a
RK
2872 }
2873 flushed: ;
2874 if (insn == first)
2875 break;
2876 }
2877
67f0e213
RK
2878 FREE_REG_SET (dead);
2879 FREE_REG_SET (live);
d7429b6a
RK
2880}
2881\f
2882/* Return 1 if X (the body of an insn, or part of it) is just dead stores
2883 (SET expressions whose destinations are registers dead after the insn).
2884 NEEDED is the regset that says which regs are alive after the insn.
2885
e398aa80
R
2886 Unless CALL_OK is non-zero, an insn is needed if it contains a CALL.
2887
2888 If X is the entire body of an insn, NOTES contains the reg notes
2889 pertaining to the insn. */
d7429b6a
RK
2890
2891static int
e398aa80 2892insn_dead_p (x, needed, call_ok, notes)
d7429b6a
RK
2893 rtx x;
2894 regset needed;
2895 int call_ok;
e398aa80 2896 rtx notes ATTRIBUTE_UNUSED;
d7429b6a 2897{
e5e809f4
JL
2898 enum rtx_code code = GET_CODE (x);
2899
e398aa80
R
2900#ifdef AUTO_INC_DEC
2901 /* If flow is invoked after reload, we must take existing AUTO_INC
2902 expresions into account. */
2903 if (reload_completed)
2904 {
2905 for ( ; notes; notes = XEXP (notes, 1))
2906 {
2907 if (REG_NOTE_KIND (notes) == REG_INC)
2908 {
2909 int regno = REGNO (XEXP (notes, 0));
2910
2911 /* Don't delete insns to set global regs. */
2912 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2913 || REGNO_REG_SET_P (needed, regno))
2914 return 0;
2915 }
2916 }
2917 }
2918#endif
2919
d7429b6a
RK
2920 /* If setting something that's a reg or part of one,
2921 see if that register's altered value will be live. */
2922
2923 if (code == SET)
2924 {
e5e809f4
JL
2925 rtx r = SET_DEST (x);
2926
d7429b6a
RK
2927 /* A SET that is a subroutine call cannot be dead. */
2928 if (! call_ok && GET_CODE (SET_SRC (x)) == CALL)
2929 return 0;
2930
2931#ifdef HAVE_cc0
2932 if (GET_CODE (r) == CC0)
2933 return ! cc0_live;
2934#endif
2935
db3a887b
CB
2936 if (GET_CODE (r) == MEM && ! MEM_VOLATILE_P (r))
2937 {
2938 rtx temp;
2939 /* Walk the set of memory locations we are currently tracking
2940 and see if one is an identical match to this memory location.
2941 If so, this memory write is dead (remember, we're walking
2942 backwards from the end of the block to the start. */
2943 temp = mem_set_list;
2944 while (temp)
2945 {
2946 if (rtx_equal_p (XEXP (temp, 0), r))
2947 return 1;
2948 temp = XEXP (temp, 1);
2949 }
2950 }
d7429b6a 2951
e5e809f4
JL
2952 while (GET_CODE (r) == SUBREG || GET_CODE (r) == STRICT_LOW_PART
2953 || GET_CODE (r) == ZERO_EXTRACT)
d7429b6a
RK
2954 r = SUBREG_REG (r);
2955
2956 if (GET_CODE (r) == REG)
2957 {
e5e809f4 2958 int regno = REGNO (r);
d7429b6a 2959
d8c8b8e3 2960 /* Don't delete insns to set global regs. */
d7429b6a
RK
2961 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2962 /* Make sure insns to set frame pointer aren't deleted. */
2963 || regno == FRAME_POINTER_REGNUM
73a187c1
DE
2964#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2965 || regno == HARD_FRAME_POINTER_REGNUM
2966#endif
d7e4fe8b
RS
2967#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2968 /* Make sure insns to set arg pointer are never deleted
2969 (if the arg pointer isn't fixed, there will be a USE for
0f41302f 2970 it, so we can treat it normally). */
d7e4fe8b
RS
2971 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2972#endif
916b1701 2973 || REGNO_REG_SET_P (needed, regno))
d7429b6a
RK
2974 return 0;
2975
2976 /* If this is a hard register, verify that subsequent words are
2977 not needed. */
2978 if (regno < FIRST_PSEUDO_REGISTER)
2979 {
2980 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
2981
2982 while (--n > 0)
916b1701 2983 if (REGNO_REG_SET_P (needed, regno+n))
d7429b6a
RK
2984 return 0;
2985 }
2986
2987 return 1;
2988 }
2989 }
e5e809f4 2990
d7429b6a
RK
2991 /* If performing several activities,
2992 insn is dead if each activity is individually dead.
2993 Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
2994 that's inside a PARALLEL doesn't make the insn worth keeping. */
2995 else if (code == PARALLEL)
2996 {
e5e809f4
JL
2997 int i = XVECLEN (x, 0);
2998
d7429b6a 2999 for (i--; i >= 0; i--)
e5e809f4
JL
3000 if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER
3001 && GET_CODE (XVECEXP (x, 0, i)) != USE
e398aa80 3002 && ! insn_dead_p (XVECEXP (x, 0, i), needed, call_ok, NULL_RTX))
e5e809f4
JL
3003 return 0;
3004
d7429b6a
RK
3005 return 1;
3006 }
e5e809f4
JL
3007
3008 /* A CLOBBER of a pseudo-register that is dead serves no purpose. That
3009 is not necessarily true for hard registers. */
3010 else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == REG
3011 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER
3012 && ! REGNO_REG_SET_P (needed, REGNO (XEXP (x, 0))))
3013 return 1;
3014
3015 /* We do not check other CLOBBER or USE here. An insn consisting of just
3016 a CLOBBER or just a USE should not be deleted. */
d7429b6a
RK
3017 return 0;
3018}
3019
3020/* If X is the pattern of the last insn in a libcall, and assuming X is dead,
3021 return 1 if the entire library call is dead.
3022 This is true if X copies a register (hard or pseudo)
3023 and if the hard return reg of the call insn is dead.
3024 (The caller should have tested the destination of X already for death.)
3025
3026 If this insn doesn't just copy a register, then we don't
3027 have an ordinary libcall. In that case, cse could not have
3028 managed to substitute the source for the dest later on,
3029 so we can assume the libcall is dead.
3030
3031 NEEDED is the bit vector of pseudoregs live before this insn.
3032 NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */
3033
3034static int
3035libcall_dead_p (x, needed, note, insn)
3036 rtx x;
3037 regset needed;
3038 rtx note;
3039 rtx insn;
3040{
3041 register RTX_CODE code = GET_CODE (x);
3042
3043 if (code == SET)
3044 {
3045 register rtx r = SET_SRC (x);
3046 if (GET_CODE (r) == REG)
3047 {
3048 rtx call = XEXP (note, 0);
e398aa80 3049 rtx call_pat;
d7429b6a
RK
3050 register int i;
3051
3052 /* Find the call insn. */
3053 while (call != insn && GET_CODE (call) != CALL_INSN)
3054 call = NEXT_INSN (call);
3055
3056 /* If there is none, do nothing special,
3057 since ordinary death handling can understand these insns. */
3058 if (call == insn)
3059 return 0;
3060
3061 /* See if the hard reg holding the value is dead.
3062 If this is a PARALLEL, find the call within it. */
e398aa80
R
3063 call_pat = PATTERN (call);
3064 if (GET_CODE (call_pat) == PARALLEL)
d7429b6a 3065 {
e398aa80
R
3066 for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--)
3067 if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET
3068 && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL)
d7429b6a
RK
3069 break;
3070
761a5bcd
JW
3071 /* This may be a library call that is returning a value
3072 via invisible pointer. Do nothing special, since
3073 ordinary death handling can understand these insns. */
d7429b6a 3074 if (i < 0)
761a5bcd 3075 return 0;
d7429b6a 3076
e398aa80 3077 call_pat = XVECEXP (call_pat, 0, i);
d7429b6a
RK
3078 }
3079
e398aa80 3080 return insn_dead_p (call_pat, needed, 1, REG_NOTES (call));
d7429b6a
RK
3081 }
3082 }
3083 return 1;
3084}
3085
bd80fbde
RH
3086/* Return 1 if register REGNO was used before it was set, i.e. if it is
3087 live at function entry. Don't count global register variables, variables
3088 in registers that can be used for function arg passing, or variables in
3089 fixed hard registers. */
d7429b6a
RK
3090
3091int
3092regno_uninitialized (regno)
3093 int regno;
3094{
b0b7b46a 3095 if (n_basic_blocks == 0
6a45254e 3096 || (regno < FIRST_PSEUDO_REGISTER
bd80fbde
RH
3097 && (global_regs[regno]
3098 || fixed_regs[regno]
3099 || FUNCTION_ARG_REGNO_P (regno))))
d7429b6a
RK
3100 return 0;
3101
e881bb1b 3102 return REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, regno);
d7429b6a
RK
3103}
3104
3105/* 1 if register REGNO was alive at a place where `setjmp' was called
3106 and was set more than once or is an argument.
3107 Such regs may be clobbered by `longjmp'. */
3108
3109int
3110regno_clobbered_at_setjmp (regno)
3111 int regno;
3112{
3113 if (n_basic_blocks == 0)
3114 return 0;
3115
b1f21e0a 3116 return ((REG_N_SETS (regno) > 1
e881bb1b 3117 || REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, regno))
916b1701 3118 && REGNO_REG_SET_P (regs_live_at_setjmp, regno));
d7429b6a
RK
3119}
3120\f
15e088b2
JL
3121/* INSN references memory, possibly using autoincrement addressing modes.
3122 Find any entries on the mem_set_list that need to be invalidated due
3123 to an address change. */
3124static void
3125invalidate_mems_from_autoinc (insn)
3126 rtx insn;
3127{
3128 rtx note = REG_NOTES (insn);
3129 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
3130 {
3131 if (REG_NOTE_KIND (note) == REG_INC)
3132 {
3133 rtx temp = mem_set_list;
3134 rtx prev = NULL_RTX;
3135
3136 while (temp)
3137 {
3138 if (reg_overlap_mentioned_p (XEXP (note, 0), XEXP (temp, 0)))
3139 {
3140 /* Splice temp out of list. */
3141 if (prev)
3142 XEXP (prev, 1) = XEXP (temp, 1);
3143 else
3144 mem_set_list = XEXP (temp, 1);
3145 }
3146 else
3147 prev = temp;
3148 temp = XEXP (temp, 1);
3149 }
3150 }
3151 }
3152}
3153
d7429b6a
RK
3154/* Process the registers that are set within X.
3155 Their bits are set to 1 in the regset DEAD,
3156 because they are dead prior to this insn.
3157
3158 If INSN is nonzero, it is the insn being processed
3159 and the fact that it is nonzero implies this is the FINAL pass
3160 in propagate_block. In this case, various info about register
3161 usage is stored, LOG_LINKS fields of insns are set up. */
3162
d7429b6a
RK
3163static void
3164mark_set_regs (needed, dead, x, insn, significant)
3165 regset needed;
3166 regset dead;
3167 rtx x;
3168 rtx insn;
3169 regset significant;
3170{
3171 register RTX_CODE code = GET_CODE (x);
3172
3173 if (code == SET || code == CLOBBER)
3174 mark_set_1 (needed, dead, x, insn, significant);
3175 else if (code == PARALLEL)
3176 {
3177 register int i;
3178 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3179 {
3180 code = GET_CODE (XVECEXP (x, 0, i));
3181 if (code == SET || code == CLOBBER)
3182 mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
3183 }
3184 }
3185}
3186
3187/* Process a single SET rtx, X. */
3188
3189static void
3190mark_set_1 (needed, dead, x, insn, significant)
3191 regset needed;
3192 regset dead;
3193 rtx x;
3194 rtx insn;
3195 regset significant;
3196{
3197 register int regno;
3198 register rtx reg = SET_DEST (x);
3199
86465af7
DM
3200 /* Some targets place small structures in registers for
3201 return values of functions. We have to detect this
3202 case specially here to get correct flow information. */
3203 if (GET_CODE (reg) == PARALLEL
3204 && GET_MODE (reg) == BLKmode)
3205 {
3206 register int i;
3207
3208 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
3209 mark_set_1 (needed, dead, XVECEXP (reg, 0, i), insn, significant);
3210 return;
3211 }
3212
d7429b6a
RK
3213 /* Modifying just one hardware register of a multi-reg value
3214 or just a byte field of a register
3215 does not mean the value from before this insn is now dead.
3216 But it does mean liveness of that register at the end of the block
3217 is significant.
3218
3219 Within mark_set_1, however, we treat it as if the register is
3220 indeed modified. mark_used_regs will, however, also treat this
3221 register as being used. Thus, we treat these insns as setting a
3222 new value for the register as a function of its old value. This
3223 cases LOG_LINKS to be made appropriately and this will help combine. */
3224
3225 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
3226 || GET_CODE (reg) == SIGN_EXTRACT
3227 || GET_CODE (reg) == STRICT_LOW_PART)
3228 reg = XEXP (reg, 0);
3229
db3a887b
CB
3230 /* If this set is a MEM, then it kills any aliased writes.
3231 If this set is a REG, then it kills any MEMs which use the reg. */
d7429b6a 3232 if (GET_CODE (reg) == MEM
db3a887b
CB
3233 || GET_CODE (reg) == REG)
3234 {
3235 rtx temp = mem_set_list;
3236 rtx prev = NULL_RTX;
3237
3238 while (temp)
3239 {
3240 if ((GET_CODE (reg) == MEM
3241 && output_dependence (XEXP (temp, 0), reg))
3242 || (GET_CODE (reg) == REG
3243 && reg_overlap_mentioned_p (reg, XEXP (temp, 0))))
3244 {
3245 /* Splice this entry out of the list. */
3246 if (prev)
3247 XEXP (prev, 1) = XEXP (temp, 1);
3248 else
3249 mem_set_list = XEXP (temp, 1);
3250 }
3251 else
3252 prev = temp;
3253 temp = XEXP (temp, 1);
3254 }
3255 }
15e088b2
JL
3256
3257 /* If the memory reference had embedded side effects (autoincrement
3258 address modes. Then we may need to kill some entries on the
3259 memory set list. */
3260 if (insn && GET_CODE (reg) == MEM)
3261 invalidate_mems_from_autoinc (insn);
3262
d7429b6a
RK
3263 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
3264 /* There are no REG_INC notes for SP, so we can't assume we'll see
3265 everything that invalidates it. To be safe, don't eliminate any
3266 stores though SP; none of them should be redundant anyway. */
3267 && ! reg_mentioned_p (stack_pointer_rtx, reg))
db3a887b 3268 mem_set_list = gen_rtx_EXPR_LIST (VOIDmode, reg, mem_set_list);
d7429b6a
RK
3269
3270 if (GET_CODE (reg) == REG
3271 && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
3272#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
3273 && regno != HARD_FRAME_POINTER_REGNUM
3274#endif
d7e4fe8b
RS
3275#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3276 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
3277#endif
d7429b6a
RK
3278 && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
3279 /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
3280 {
916b1701
MM
3281 int some_needed = REGNO_REG_SET_P (needed, regno);
3282 int some_not_needed = ! some_needed;
d7429b6a
RK
3283
3284 /* Mark it as a significant register for this basic block. */
3285 if (significant)
916b1701 3286 SET_REGNO_REG_SET (significant, regno);
d7429b6a 3287
38e01259 3288 /* Mark it as dead before this insn. */
916b1701 3289 SET_REGNO_REG_SET (dead, regno);
d7429b6a
RK
3290
3291 /* A hard reg in a wide mode may really be multiple registers.
3292 If so, mark all of them just like the first. */
3293 if (regno < FIRST_PSEUDO_REGISTER)
3294 {
3295 int n;
3296
3297 /* Nothing below is needed for the stack pointer; get out asap.
3298 Eg, log links aren't needed, since combine won't use them. */
3299 if (regno == STACK_POINTER_REGNUM)
3300 return;
3301
3302 n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
3303 while (--n > 0)
3304 {
916b1701
MM
3305 int regno_n = regno + n;
3306 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
d7429b6a 3307 if (significant)
916b1701 3308 SET_REGNO_REG_SET (significant, regno_n);
cb9e8ad1 3309
916b1701
MM
3310 SET_REGNO_REG_SET (dead, regno_n);
3311 some_needed |= needed_regno;
3312 some_not_needed |= ! needed_regno;
d7429b6a
RK
3313 }
3314 }
3315 /* Additional data to record if this is the final pass. */
3316 if (insn)
3317 {
3318 register rtx y = reg_next_use[regno];
3319 register int blocknum = BLOCK_NUM (insn);
3320
3321 /* If this is a hard reg, record this function uses the reg. */
3322
3323 if (regno < FIRST_PSEUDO_REGISTER)
3324 {
3325 register int i;
3326 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
3327
3328 for (i = regno; i < endregno; i++)
3329 {
93514916
JW
3330 /* The next use is no longer "next", since a store
3331 intervenes. */
3332 reg_next_use[i] = 0;
3333
d7429b6a 3334 regs_ever_live[i] = 1;
b1f21e0a 3335 REG_N_SETS (i)++;
d7429b6a
RK
3336 }
3337 }
3338 else
3339 {
93514916
JW
3340 /* The next use is no longer "next", since a store
3341 intervenes. */
3342 reg_next_use[regno] = 0;
3343
d7429b6a
RK
3344 /* Keep track of which basic blocks each reg appears in. */
3345
b1f21e0a
MM
3346 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
3347 REG_BASIC_BLOCK (regno) = blocknum;
3348 else if (REG_BASIC_BLOCK (regno) != blocknum)
3349 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
3350
3351 /* Count (weighted) references, stores, etc. This counts a
3352 register twice if it is modified, but that is correct. */
b1f21e0a 3353 REG_N_SETS (regno)++;
d7429b6a 3354
b1f21e0a 3355 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
3356
3357 /* The insns where a reg is live are normally counted
3358 elsewhere, but we want the count to include the insn
3359 where the reg is set, and the normal counting mechanism
3360 would not count it. */
b1f21e0a 3361 REG_LIVE_LENGTH (regno)++;
d7429b6a
RK
3362 }
3363
cb9e8ad1 3364 if (! some_not_needed)
d7429b6a
RK
3365 {
3366 /* Make a logical link from the next following insn
3367 that uses this register, back to this insn.
3368 The following insns have already been processed.
3369
3370 We don't build a LOG_LINK for hard registers containing
3371 in ASM_OPERANDs. If these registers get replaced,
3372 we might wind up changing the semantics of the insn,
3373 even if reload can make what appear to be valid assignments
3374 later. */
3375 if (y && (BLOCK_NUM (y) == blocknum)
3376 && (regno >= FIRST_PSEUDO_REGISTER
3377 || asm_noperands (PATTERN (y)) < 0))
3378 LOG_LINKS (y)
38a448ca 3379 = gen_rtx_INSN_LIST (VOIDmode, insn, LOG_LINKS (y));
d7429b6a
RK
3380 }
3381 else if (! some_needed)
3382 {
3383 /* Note that dead stores have already been deleted when possible
3384 If we get here, we have found a dead store that cannot
3385 be eliminated (because the same insn does something useful).
3386 Indicate this by marking the reg being set as dying here. */
3387 REG_NOTES (insn)
38a448ca 3388 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
b1f21e0a 3389 REG_N_DEATHS (REGNO (reg))++;
d7429b6a
RK
3390 }
3391 else
3392 {
3393 /* This is a case where we have a multi-word hard register
3394 and some, but not all, of the words of the register are
3395 needed in subsequent insns. Write REG_UNUSED notes
3396 for those parts that were not needed. This case should
3397 be rare. */
3398
3399 int i;
3400
3401 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
3402 i >= 0; i--)
916b1701 3403 if (!REGNO_REG_SET_P (needed, regno + i))
d7429b6a 3404 REG_NOTES (insn)
38a448ca
RH
3405 = gen_rtx_EXPR_LIST (REG_UNUSED,
3406 gen_rtx_REG (reg_raw_mode[regno + i],
3407 regno + i),
3408 REG_NOTES (insn));
d7429b6a
RK
3409 }
3410 }
3411 }
8244fc4f
RS
3412 else if (GET_CODE (reg) == REG)
3413 reg_next_use[regno] = 0;
d7429b6a
RK
3414
3415 /* If this is the last pass and this is a SCRATCH, show it will be dying
3416 here and count it. */
3417 else if (GET_CODE (reg) == SCRATCH && insn != 0)
3418 {
3419 REG_NOTES (insn)
38a448ca 3420 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
d7429b6a
RK
3421 }
3422}
3423\f
3424#ifdef AUTO_INC_DEC
3425
3426/* X is a MEM found in INSN. See if we can convert it into an auto-increment
3427 reference. */
3428
3429static void
3430find_auto_inc (needed, x, insn)
3431 regset needed;
3432 rtx x;
3433 rtx insn;
3434{
3435 rtx addr = XEXP (x, 0);
e658434c 3436 HOST_WIDE_INT offset = 0;
05ed5d57 3437 rtx set;
d7429b6a
RK
3438
3439 /* Here we detect use of an index register which might be good for
3440 postincrement, postdecrement, preincrement, or predecrement. */
3441
3442 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
3443 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
3444
3445 if (GET_CODE (addr) == REG)
3446 {
3447 register rtx y;
3448 register int size = GET_MODE_SIZE (GET_MODE (x));
3449 rtx use;
3450 rtx incr;
3451 int regno = REGNO (addr);
3452
3453 /* Is the next use an increment that might make auto-increment? */
05ed5d57
RK
3454 if ((incr = reg_next_use[regno]) != 0
3455 && (set = single_set (incr)) != 0
3456 && GET_CODE (set) == SET
d7429b6a
RK
3457 && BLOCK_NUM (incr) == BLOCK_NUM (insn)
3458 /* Can't add side effects to jumps; if reg is spilled and
3459 reloaded, there's no way to store back the altered value. */
3460 && GET_CODE (insn) != JUMP_INSN
05ed5d57 3461 && (y = SET_SRC (set), GET_CODE (y) == PLUS)
d7429b6a
RK
3462 && XEXP (y, 0) == addr
3463 && GET_CODE (XEXP (y, 1)) == CONST_INT
940da324
JL
3464 && ((HAVE_POST_INCREMENT
3465 && (INTVAL (XEXP (y, 1)) == size && offset == 0))
3466 || (HAVE_POST_DECREMENT
3467 && (INTVAL (XEXP (y, 1)) == - size && offset == 0))
3468 || (HAVE_PRE_INCREMENT
3469 && (INTVAL (XEXP (y, 1)) == size && offset == size))
3470 || (HAVE_PRE_DECREMENT
3471 && (INTVAL (XEXP (y, 1)) == - size && offset == - size)))
d7429b6a
RK
3472 /* Make sure this reg appears only once in this insn. */
3473 && (use = find_use_as_address (PATTERN (insn), addr, offset),
3474 use != 0 && use != (rtx) 1))
3475 {
05ed5d57 3476 rtx q = SET_DEST (set);
7280c2a4
RK
3477 enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size
3478 ? (offset ? PRE_INC : POST_INC)
3479 : (offset ? PRE_DEC : POST_DEC));
d7429b6a
RK
3480
3481 if (dead_or_set_p (incr, addr))
7280c2a4
RK
3482 {
3483 /* This is the simple case. Try to make the auto-inc. If
3484 we can't, we are done. Otherwise, we will do any
3485 needed updates below. */
3486 if (! validate_change (insn, &XEXP (x, 0),
38a448ca 3487 gen_rtx_fmt_e (inc_code, Pmode, addr),
7280c2a4
RK
3488 0))
3489 return;
3490 }
5175ad37
DE
3491 else if (GET_CODE (q) == REG
3492 /* PREV_INSN used here to check the semi-open interval
3493 [insn,incr). */
b24884cd
JL
3494 && ! reg_used_between_p (q, PREV_INSN (insn), incr)
3495 /* We must also check for sets of q as q may be
3496 a call clobbered hard register and there may
3497 be a call between PREV_INSN (insn) and incr. */
3498 && ! reg_set_between_p (q, PREV_INSN (insn), incr))
d7429b6a 3499 {
5175ad37 3500 /* We have *p followed sometime later by q = p+size.
d7429b6a 3501 Both p and q must be live afterward,
9ec36da5 3502 and q is not used between INSN and its assignment.
d7429b6a
RK
3503 Change it to q = p, ...*q..., q = q+size.
3504 Then fall into the usual case. */
3505 rtx insns, temp;
e881bb1b 3506 basic_block bb;
d7429b6a
RK
3507
3508 start_sequence ();
3509 emit_move_insn (q, addr);
3510 insns = get_insns ();
3511 end_sequence ();
3512
e881bb1b 3513 bb = BLOCK_FOR_INSN (insn);
d7429b6a 3514 for (temp = insns; temp; temp = NEXT_INSN (temp))
e881bb1b 3515 set_block_for_insn (temp, bb);
d7429b6a 3516
7280c2a4
RK
3517 /* If we can't make the auto-inc, or can't make the
3518 replacement into Y, exit. There's no point in making
3519 the change below if we can't do the auto-inc and doing
3520 so is not correct in the pre-inc case. */
3521
3522 validate_change (insn, &XEXP (x, 0),
38a448ca 3523 gen_rtx_fmt_e (inc_code, Pmode, q),
7280c2a4
RK
3524 1);
3525 validate_change (incr, &XEXP (y, 0), q, 1);
3526 if (! apply_change_group ())
3527 return;
3528
3529 /* We now know we'll be doing this change, so emit the
3530 new insn(s) and do the updates. */
d7429b6a 3531 emit_insns_before (insns, insn);
e8b641a1 3532
e881bb1b
RH
3533 if (BLOCK_FOR_INSN (insn)->head == insn)
3534 BLOCK_FOR_INSN (insn)->head = insns;
e8b641a1 3535
d7429b6a
RK
3536 /* INCR will become a NOTE and INSN won't contain a
3537 use of ADDR. If a use of ADDR was just placed in
3538 the insn before INSN, make that the next use.
3539 Otherwise, invalidate it. */
3540 if (GET_CODE (PREV_INSN (insn)) == INSN
3541 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
3542 && SET_SRC (PATTERN (PREV_INSN (insn))) == addr)
3543 reg_next_use[regno] = PREV_INSN (insn);
3544 else
3545 reg_next_use[regno] = 0;
3546
3547 addr = q;
3548 regno = REGNO (q);
d7429b6a
RK
3549
3550 /* REGNO is now used in INCR which is below INSN, but
3551 it previously wasn't live here. If we don't mark
3552 it as needed, we'll put a REG_DEAD note for it
3553 on this insn, which is incorrect. */
916b1701 3554 SET_REGNO_REG_SET (needed, regno);
d7429b6a
RK
3555
3556 /* If there are any calls between INSN and INCR, show
3557 that REGNO now crosses them. */
3558 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
3559 if (GET_CODE (temp) == CALL_INSN)
b1f21e0a 3560 REG_N_CALLS_CROSSED (regno)++;
d7429b6a 3561 }
02df8aba
RK
3562 else
3563 return;
d7429b6a 3564
7280c2a4
RK
3565 /* If we haven't returned, it means we were able to make the
3566 auto-inc, so update the status. First, record that this insn
3567 has an implicit side effect. */
3568
3569 REG_NOTES (insn)
38a448ca 3570 = gen_rtx_EXPR_LIST (REG_INC, addr, REG_NOTES (insn));
7280c2a4
RK
3571
3572 /* Modify the old increment-insn to simply copy
3573 the already-incremented value of our register. */
3574 if (! validate_change (incr, &SET_SRC (set), addr, 0))
3575 abort ();
3576
3577 /* If that makes it a no-op (copying the register into itself) delete
3578 it so it won't appear to be a "use" and a "set" of this
3579 register. */
3580 if (SET_DEST (set) == addr)
d7429b6a 3581 {
7280c2a4
RK
3582 PUT_CODE (incr, NOTE);
3583 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
3584 NOTE_SOURCE_FILE (incr) = 0;
3585 }
d7429b6a 3586
7280c2a4
RK
3587 if (regno >= FIRST_PSEUDO_REGISTER)
3588 {
3589 /* Count an extra reference to the reg. When a reg is
3590 incremented, spilling it is worse, so we want to make
3591 that less likely. */
b1f21e0a 3592 REG_N_REFS (regno) += loop_depth;
7280c2a4
RK
3593
3594 /* Count the increment as a setting of the register,
3595 even though it isn't a SET in rtl. */
b1f21e0a 3596 REG_N_SETS (regno)++;
d7429b6a
RK
3597 }
3598 }
3599 }
3600}
3601#endif /* AUTO_INC_DEC */
3602\f
3603/* Scan expression X and store a 1-bit in LIVE for each reg it uses.
3604 This is done assuming the registers needed from X
3605 are those that have 1-bits in NEEDED.
3606
3607 On the final pass, FINAL is 1. This means try for autoincrement
3608 and count the uses and deaths of each pseudo-reg.
3609
3610 INSN is the containing instruction. If INSN is dead, this function is not
3611 called. */
3612
3613static void
3614mark_used_regs (needed, live, x, final, insn)
3615 regset needed;
3616 regset live;
3617 rtx x;
d7429b6a 3618 int final;
e658434c 3619 rtx insn;
d7429b6a
RK
3620{
3621 register RTX_CODE code;
3622 register int regno;
3623 int i;
3624
3625 retry:
3626 code = GET_CODE (x);
3627 switch (code)
3628 {
3629 case LABEL_REF:
3630 case SYMBOL_REF:
3631 case CONST_INT:
3632 case CONST:
3633 case CONST_DOUBLE:
3634 case PC:
d7429b6a
RK
3635 case ADDR_VEC:
3636 case ADDR_DIFF_VEC:
d7429b6a
RK
3637 return;
3638
3639#ifdef HAVE_cc0
3640 case CC0:
3641 cc0_live = 1;
3642 return;
3643#endif
3644
2f1553a4
RK
3645 case CLOBBER:
3646 /* If we are clobbering a MEM, mark any registers inside the address
3647 as being used. */
3648 if (GET_CODE (XEXP (x, 0)) == MEM)
3649 mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn);
3650 return;
3651
d7429b6a 3652 case MEM:
7eb136d6
MM
3653 /* Invalidate the data for the last MEM stored, but only if MEM is
3654 something that can be stored into. */
3655 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3656 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
db3a887b 3657 ; /* needn't clear the memory set list */
7eb136d6 3658 else
db3a887b
CB
3659 {
3660 rtx temp = mem_set_list;
3661 rtx prev = NULL_RTX;
3662
3663 while (temp)
3664 {
063cd522 3665 if (anti_dependence (XEXP (temp, 0), x))
db3a887b
CB
3666 {
3667 /* Splice temp out of the list. */
3668 if (prev)
3669 XEXP (prev, 1) = XEXP (temp, 1);
3670 else
3671 mem_set_list = XEXP (temp, 1);
3672 }
3673 else
3674 prev = temp;
3675 temp = XEXP (temp, 1);
3676 }
3677 }
d7429b6a 3678
15e088b2
JL
3679 /* If the memory reference had embedded side effects (autoincrement
3680 address modes. Then we may need to kill some entries on the
3681 memory set list. */
3682 if (insn)
3683 invalidate_mems_from_autoinc (insn);
3684
d7429b6a
RK
3685#ifdef AUTO_INC_DEC
3686 if (final)
3687 find_auto_inc (needed, x, insn);
3688#endif
3689 break;
3690
80f8f04a
RK
3691 case SUBREG:
3692 if (GET_CODE (SUBREG_REG (x)) == REG
3693 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
3694 && (GET_MODE_SIZE (GET_MODE (x))
88285acf 3695 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
b1f21e0a 3696 REG_CHANGES_SIZE (REGNO (SUBREG_REG (x))) = 1;
80f8f04a
RK
3697
3698 /* While we're here, optimize this case. */
3699 x = SUBREG_REG (x);
3700
e100a3bb 3701 /* In case the SUBREG is not of a register, don't optimize */
ce79abf3 3702 if (GET_CODE (x) != REG)
e100a3bb
MM
3703 {
3704 mark_used_regs (needed, live, x, final, insn);
3705 return;
3706 }
ce79abf3 3707
0f41302f 3708 /* ... fall through ... */
80f8f04a 3709
d7429b6a
RK
3710 case REG:
3711 /* See a register other than being set
3712 => mark it as needed. */
3713
3714 regno = REGNO (x);
3715 {
67f0e213
RK
3716 int some_needed = REGNO_REG_SET_P (needed, regno);
3717 int some_not_needed = ! some_needed;
d7429b6a 3718
916b1701 3719 SET_REGNO_REG_SET (live, regno);
cb9e8ad1 3720
d7429b6a
RK
3721 /* A hard reg in a wide mode may really be multiple registers.
3722 If so, mark all of them just like the first. */
3723 if (regno < FIRST_PSEUDO_REGISTER)
3724 {
3725 int n;
3726
d7e4fe8b 3727 /* For stack ptr or fixed arg pointer,
d7429b6a
RK
3728 nothing below can be necessary, so waste no more time. */
3729 if (regno == STACK_POINTER_REGNUM
73a187c1
DE
3730#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
3731 || regno == HARD_FRAME_POINTER_REGNUM
3732#endif
d7e4fe8b
RS
3733#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3734 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
3735#endif
d7429b6a
RK
3736 || regno == FRAME_POINTER_REGNUM)
3737 {
3738 /* If this is a register we are going to try to eliminate,
3739 don't mark it live here. If we are successful in
3740 eliminating it, it need not be live unless it is used for
3741 pseudos, in which case it will have been set live when
3742 it was allocated to the pseudos. If the register will not
3743 be eliminated, reload will set it live at that point. */
3744
3745 if (! TEST_HARD_REG_BIT (elim_reg_set, regno))
3746 regs_ever_live[regno] = 1;
3747 return;
3748 }
3749 /* No death notes for global register variables;
3750 their values are live after this function exits. */
3751 if (global_regs[regno])
d8c8b8e3
RS
3752 {
3753 if (final)
3754 reg_next_use[regno] = insn;
3755 return;
3756 }
d7429b6a
RK
3757
3758 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
3759 while (--n > 0)
3760 {
916b1701
MM
3761 int regno_n = regno + n;
3762 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
cb9e8ad1 3763
916b1701
MM
3764 SET_REGNO_REG_SET (live, regno_n);
3765 some_needed |= needed_regno;
931c6c7a 3766 some_not_needed |= ! needed_regno;
d7429b6a
RK
3767 }
3768 }
3769 if (final)
3770 {
3771 /* Record where each reg is used, so when the reg
3772 is set we know the next insn that uses it. */
3773
3774 reg_next_use[regno] = insn;
3775
3776 if (regno < FIRST_PSEUDO_REGISTER)
3777 {
3778 /* If a hard reg is being used,
3779 record that this function does use it. */
3780
3781 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
3782 if (i == 0)
3783 i = 1;
3784 do
3785 regs_ever_live[regno + --i] = 1;
3786 while (i > 0);
3787 }
3788 else
3789 {
3790 /* Keep track of which basic block each reg appears in. */
3791
3792 register int blocknum = BLOCK_NUM (insn);
3793
b1f21e0a
MM
3794 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
3795 REG_BASIC_BLOCK (regno) = blocknum;
3796 else if (REG_BASIC_BLOCK (regno) != blocknum)
3797 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
3798
3799 /* Count (weighted) number of uses of each reg. */
3800
b1f21e0a 3801 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
3802 }
3803
3804 /* Record and count the insns in which a reg dies.
3805 If it is used in this insn and was dead below the insn
3806 then it dies in this insn. If it was set in this insn,
3807 we do not make a REG_DEAD note; likewise if we already
3808 made such a note. */
3809
cb9e8ad1 3810 if (some_not_needed
d7429b6a
RK
3811 && ! dead_or_set_p (insn, x)
3812#if 0
3813 && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
3814#endif
3815 )
3816 {
ab28041e
JW
3817 /* Check for the case where the register dying partially
3818 overlaps the register set by this insn. */
3819 if (regno < FIRST_PSEUDO_REGISTER
3820 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
3821 {
480eac3b 3822 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
ab28041e
JW
3823 while (--n >= 0)
3824 some_needed |= dead_or_set_regno_p (insn, regno + n);
3825 }
3826
d7429b6a
RK
3827 /* If none of the words in X is needed, make a REG_DEAD
3828 note. Otherwise, we must make partial REG_DEAD notes. */
3829 if (! some_needed)
3830 {
3831 REG_NOTES (insn)
38a448ca 3832 = gen_rtx_EXPR_LIST (REG_DEAD, x, REG_NOTES (insn));
b1f21e0a 3833 REG_N_DEATHS (regno)++;
d7429b6a
RK
3834 }
3835 else
3836 {
3837 int i;
3838
3839 /* Don't make a REG_DEAD note for a part of a register
3840 that is set in the insn. */
3841
3842 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
3843 i >= 0; i--)
916b1701 3844 if (!REGNO_REG_SET_P (needed, regno + i)
d7429b6a
RK
3845 && ! dead_or_set_regno_p (insn, regno + i))
3846 REG_NOTES (insn)
38a448ca
RH
3847 = gen_rtx_EXPR_LIST (REG_DEAD,
3848 gen_rtx_REG (reg_raw_mode[regno + i],
3849 regno + i),
3850 REG_NOTES (insn));
d7429b6a
RK
3851 }
3852 }
3853 }
3854 }
3855 return;
3856
3857 case SET:
3858 {
3859 register rtx testreg = SET_DEST (x);
3860 int mark_dest = 0;
3861
3862 /* If storing into MEM, don't show it as being used. But do
3863 show the address as being used. */
3864 if (GET_CODE (testreg) == MEM)
3865 {
3866#ifdef AUTO_INC_DEC
3867 if (final)
3868 find_auto_inc (needed, testreg, insn);
3869#endif
3870 mark_used_regs (needed, live, XEXP (testreg, 0), final, insn);
3871 mark_used_regs (needed, live, SET_SRC (x), final, insn);
3872 return;
3873 }
3874
3875 /* Storing in STRICT_LOW_PART is like storing in a reg
3876 in that this SET might be dead, so ignore it in TESTREG.
3877 but in some other ways it is like using the reg.
3878
3879 Storing in a SUBREG or a bit field is like storing the entire
3880 register in that if the register's value is not used
3881 then this SET is not needed. */
3882 while (GET_CODE (testreg) == STRICT_LOW_PART
3883 || GET_CODE (testreg) == ZERO_EXTRACT
3884 || GET_CODE (testreg) == SIGN_EXTRACT
3885 || GET_CODE (testreg) == SUBREG)
3886 {
88285acf
RK
3887 if (GET_CODE (testreg) == SUBREG
3888 && GET_CODE (SUBREG_REG (testreg)) == REG
3889 && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER
3890 && (GET_MODE_SIZE (GET_MODE (testreg))
3891 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg)))))
b1f21e0a 3892 REG_CHANGES_SIZE (REGNO (SUBREG_REG (testreg))) = 1;
88285acf 3893
d7429b6a
RK
3894 /* Modifying a single register in an alternate mode
3895 does not use any of the old value. But these other
3896 ways of storing in a register do use the old value. */
3897 if (GET_CODE (testreg) == SUBREG
3898 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
3899 ;
3900 else
3901 mark_dest = 1;
3902
3903 testreg = XEXP (testreg, 0);
3904 }
3905
3906 /* If this is a store into a register,
3907 recursively scan the value being stored. */
3908
86465af7
DM
3909 if ((GET_CODE (testreg) == PARALLEL
3910 && GET_MODE (testreg) == BLKmode)
3911 || (GET_CODE (testreg) == REG
3912 && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
73a187c1 3913#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
86465af7 3914 && regno != HARD_FRAME_POINTER_REGNUM
73a187c1 3915#endif
d7e4fe8b 3916#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
86465af7 3917 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
d7e4fe8b 3918#endif
86465af7 3919 ))
d8c8b8e3
RS
3920 /* We used to exclude global_regs here, but that seems wrong.
3921 Storing in them is like storing in mem. */
d7429b6a
RK
3922 {
3923 mark_used_regs (needed, live, SET_SRC (x), final, insn);
3924 if (mark_dest)
3925 mark_used_regs (needed, live, SET_DEST (x), final, insn);
3926 return;
3927 }
3928 }
3929 break;
3930
3931 case RETURN:
3932 /* If exiting needs the right stack value, consider this insn as
3933 using the stack pointer. In any event, consider it as using
632c9d9e 3934 all global registers and all registers used by return. */
d7429b6a 3935 if (! EXIT_IGNORE_STACK
0200b5ed
JL
3936 || (! FRAME_POINTER_REQUIRED
3937 && ! current_function_calls_alloca
bfc5000a
JL
3938 && flag_omit_frame_pointer)
3939 || current_function_sp_is_unchanging)
916b1701 3940 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
3941
3942 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
632c9d9e
MS
3943 if (global_regs[i]
3944#ifdef EPILOGUE_USES
3945 || EPILOGUE_USES (i)
3946#endif
3947 )
916b1701 3948 SET_REGNO_REG_SET (live, i);
d7429b6a 3949 break;
e9a25f70 3950
40b5a77c
JL
3951 case ASM_OPERANDS:
3952 case UNSPEC_VOLATILE:
3953 case TRAP_IF:
3954 case ASM_INPUT:
3955 {
3956 /* Traditional and volatile asm instructions must be considered to use
3957 and clobber all hard registers, all pseudo-registers and all of
3958 memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
3959
3960 Consider for instance a volatile asm that changes the fpu rounding
3961 mode. An insn should not be moved across this even if it only uses
3962 pseudo-regs because it might give an incorrectly rounded result.
3963
3964 ?!? Unfortunately, marking all hard registers as live causes massive
3965 problems for the register allocator and marking all pseudos as live
3966 creates mountains of uninitialized variable warnings.
3967
3968 So for now, just clear the memory set list and mark any regs
3969 we can find in ASM_OPERANDS as used. */
3970 if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
3971 mem_set_list = NULL_RTX;
3972
3973 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
3974 We can not just fall through here since then we would be confused
3975 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
3976 traditional asms unlike their normal usage. */
3977 if (code == ASM_OPERANDS)
3978 {
3979 int j;
3980
3981 for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
3982 mark_used_regs (needed, live, ASM_OPERANDS_INPUT (x, j),
3983 final, insn);
3984 }
3985 break;
3986 }
3987
3988
e9a25f70
JL
3989 default:
3990 break;
d7429b6a
RK
3991 }
3992
3993 /* Recursively scan the operands of this expression. */
3994
3995 {
3996 register char *fmt = GET_RTX_FORMAT (code);
3997 register int i;
3998
3999 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4000 {
4001 if (fmt[i] == 'e')
4002 {
4003 /* Tail recursive case: save a function call level. */
4004 if (i == 0)
4005 {
4006 x = XEXP (x, 0);
4007 goto retry;
4008 }
4009 mark_used_regs (needed, live, XEXP (x, i), final, insn);
4010 }
4011 else if (fmt[i] == 'E')
4012 {
4013 register int j;
4014 for (j = 0; j < XVECLEN (x, i); j++)
4015 mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
4016 }
4017 }
4018 }
4019}
4020\f
4021#ifdef AUTO_INC_DEC
4022
4023static int
4024try_pre_increment_1 (insn)
4025 rtx insn;
4026{
4027 /* Find the next use of this reg. If in same basic block,
4028 make it do pre-increment or pre-decrement if appropriate. */
956d6950 4029 rtx x = single_set (insn);
5f4f0e22 4030 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
d7429b6a
RK
4031 * INTVAL (XEXP (SET_SRC (x), 1)));
4032 int regno = REGNO (SET_DEST (x));
4033 rtx y = reg_next_use[regno];
4034 if (y != 0
4035 && BLOCK_NUM (y) == BLOCK_NUM (insn)
89861c38 4036 /* Don't do this if the reg dies, or gets set in y; a standard addressing
0f41302f 4037 mode would be better. */
89861c38 4038 && ! dead_or_set_p (y, SET_DEST (x))
956d6950 4039 && try_pre_increment (y, SET_DEST (x), amount))
d7429b6a
RK
4040 {
4041 /* We have found a suitable auto-increment
4042 and already changed insn Y to do it.
4043 So flush this increment-instruction. */
4044 PUT_CODE (insn, NOTE);
4045 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
4046 NOTE_SOURCE_FILE (insn) = 0;
4047 /* Count a reference to this reg for the increment
4048 insn we are deleting. When a reg is incremented.
4049 spilling it is worse, so we want to make that
4050 less likely. */
4051 if (regno >= FIRST_PSEUDO_REGISTER)
4052 {
b1f21e0a
MM
4053 REG_N_REFS (regno) += loop_depth;
4054 REG_N_SETS (regno)++;
d7429b6a
RK
4055 }
4056 return 1;
4057 }
4058 return 0;
4059}
4060
4061/* Try to change INSN so that it does pre-increment or pre-decrement
4062 addressing on register REG in order to add AMOUNT to REG.
4063 AMOUNT is negative for pre-decrement.
4064 Returns 1 if the change could be made.
4065 This checks all about the validity of the result of modifying INSN. */
4066
4067static int
4068try_pre_increment (insn, reg, amount)
4069 rtx insn, reg;
5f4f0e22 4070 HOST_WIDE_INT amount;
d7429b6a
RK
4071{
4072 register rtx use;
4073
4074 /* Nonzero if we can try to make a pre-increment or pre-decrement.
4075 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
4076 int pre_ok = 0;
4077 /* Nonzero if we can try to make a post-increment or post-decrement.
4078 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
4079 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
4080 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
4081 int post_ok = 0;
4082
4083 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
4084 int do_post = 0;
4085
4086 /* From the sign of increment, see which possibilities are conceivable
4087 on this target machine. */
940da324 4088 if (HAVE_PRE_INCREMENT && amount > 0)
d7429b6a 4089 pre_ok = 1;
940da324 4090 if (HAVE_POST_INCREMENT && amount > 0)
d7429b6a 4091 post_ok = 1;
d7429b6a 4092
940da324 4093 if (HAVE_PRE_DECREMENT && amount < 0)
d7429b6a 4094 pre_ok = 1;
940da324 4095 if (HAVE_POST_DECREMENT && amount < 0)
d7429b6a 4096 post_ok = 1;
d7429b6a
RK
4097
4098 if (! (pre_ok || post_ok))
4099 return 0;
4100
4101 /* It is not safe to add a side effect to a jump insn
4102 because if the incremented register is spilled and must be reloaded
4103 there would be no way to store the incremented value back in memory. */
4104
4105 if (GET_CODE (insn) == JUMP_INSN)
4106 return 0;
4107
4108 use = 0;
4109 if (pre_ok)
4110 use = find_use_as_address (PATTERN (insn), reg, 0);
4111 if (post_ok && (use == 0 || use == (rtx) 1))
4112 {
4113 use = find_use_as_address (PATTERN (insn), reg, -amount);
4114 do_post = 1;
4115 }
4116
4117 if (use == 0 || use == (rtx) 1)
4118 return 0;
4119
4120 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
4121 return 0;
4122
a0fbc3a9
SC
4123 /* See if this combination of instruction and addressing mode exists. */
4124 if (! validate_change (insn, &XEXP (use, 0),
38a448ca
RH
4125 gen_rtx_fmt_e (amount > 0
4126 ? (do_post ? POST_INC : PRE_INC)
4127 : (do_post ? POST_DEC : PRE_DEC),
4128 Pmode, reg), 0))
a0fbc3a9 4129 return 0;
d7429b6a
RK
4130
4131 /* Record that this insn now has an implicit side effect on X. */
38a448ca 4132 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg, REG_NOTES (insn));
d7429b6a
RK
4133 return 1;
4134}
4135
4136#endif /* AUTO_INC_DEC */
4137\f
4138/* Find the place in the rtx X where REG is used as a memory address.
4139 Return the MEM rtx that so uses it.
4140 If PLUSCONST is nonzero, search instead for a memory address equivalent to
4141 (plus REG (const_int PLUSCONST)).
4142
4143 If such an address does not appear, return 0.
4144 If REG appears more than once, or is used other than in such an address,
4145 return (rtx)1. */
4146
8c660648 4147rtx
d7429b6a
RK
4148find_use_as_address (x, reg, plusconst)
4149 register rtx x;
4150 rtx reg;
e658434c 4151 HOST_WIDE_INT plusconst;
d7429b6a
RK
4152{
4153 enum rtx_code code = GET_CODE (x);
4154 char *fmt = GET_RTX_FORMAT (code);
4155 register int i;
4156 register rtx value = 0;
4157 register rtx tem;
4158
4159 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
4160 return x;
4161
4162 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
4163 && XEXP (XEXP (x, 0), 0) == reg
4164 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
4165 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
4166 return x;
4167
4168 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
4169 {
4170 /* If REG occurs inside a MEM used in a bit-field reference,
4171 that is unacceptable. */
4172 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
6fa5c106 4173 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4174 }
4175
4176 if (x == reg)
6fa5c106 4177 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4178
4179 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4180 {
4181 if (fmt[i] == 'e')
4182 {
4183 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
4184 if (value == 0)
4185 value = tem;
4186 else if (tem != 0)
6fa5c106 4187 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4188 }
4189 if (fmt[i] == 'E')
4190 {
4191 register int j;
4192 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4193 {
4194 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
4195 if (value == 0)
4196 value = tem;
4197 else if (tem != 0)
6fa5c106 4198 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4199 }
4200 }
4201 }
4202
4203 return value;
4204}
4205\f
4206/* Write information about registers and basic blocks into FILE.
4207 This is part of making a debugging dump. */
4208
4209void
4210dump_flow_info (file)
4211 FILE *file;
4212{
4213 register int i;
4214 static char *reg_class_names[] = REG_CLASS_NAMES;
4215
4216 fprintf (file, "%d registers.\n", max_regno);
d7429b6a 4217 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
b1f21e0a 4218 if (REG_N_REFS (i))
d7429b6a 4219 {
e4600702 4220 enum reg_class class, altclass;
d7429b6a 4221 fprintf (file, "\nRegister %d used %d times across %d insns",
b1f21e0a
MM
4222 i, REG_N_REFS (i), REG_LIVE_LENGTH (i));
4223 if (REG_BASIC_BLOCK (i) >= 0)
4224 fprintf (file, " in block %d", REG_BASIC_BLOCK (i));
6fc4610b
MM
4225 if (REG_N_SETS (i))
4226 fprintf (file, "; set %d time%s", REG_N_SETS (i),
4227 (REG_N_SETS (i) == 1) ? "" : "s");
4228 if (REG_USERVAR_P (regno_reg_rtx[i]))
4229 fprintf (file, "; user var");
b1f21e0a
MM
4230 if (REG_N_DEATHS (i) != 1)
4231 fprintf (file, "; dies in %d places", REG_N_DEATHS (i));
4232 if (REG_N_CALLS_CROSSED (i) == 1)
d7429b6a 4233 fprintf (file, "; crosses 1 call");
b1f21e0a
MM
4234 else if (REG_N_CALLS_CROSSED (i))
4235 fprintf (file, "; crosses %d calls", REG_N_CALLS_CROSSED (i));
d7429b6a
RK
4236 if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
4237 fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
4238 class = reg_preferred_class (i);
e4600702
RK
4239 altclass = reg_alternate_class (i);
4240 if (class != GENERAL_REGS || altclass != ALL_REGS)
d7429b6a 4241 {
e4600702
RK
4242 if (altclass == ALL_REGS || class == ALL_REGS)
4243 fprintf (file, "; pref %s", reg_class_names[(int) class]);
4244 else if (altclass == NO_REGS)
d7429b6a
RK
4245 fprintf (file, "; %s or none", reg_class_names[(int) class]);
4246 else
e4600702
RK
4247 fprintf (file, "; pref %s, else %s",
4248 reg_class_names[(int) class],
4249 reg_class_names[(int) altclass]);
d7429b6a
RK
4250 }
4251 if (REGNO_POINTER_FLAG (i))
4252 fprintf (file, "; pointer");
4253 fprintf (file, ".\n");
4254 }
e881bb1b 4255
d7429b6a 4256 fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
e881bb1b
RH
4257 for (i = 0; i < n_basic_blocks; i++)
4258 {
4259 register basic_block bb = BASIC_BLOCK (i);
4260 register int regno;
4261 register edge e;
4262
4263 fprintf (file, "\nBasic block %d: first insn %d, last %d.\n",
4264 i, INSN_UID (bb->head), INSN_UID (bb->end));
4265
4266 fprintf (file, "Predecessors: ");
4267 for (e = bb->pred; e ; e = e->pred_next)
4268 dump_edge_info (file, e, 0);
4269
4270 fprintf (file, "\nSuccessors: ");
4271 for (e = bb->succ; e ; e = e->succ_next)
4272 dump_edge_info (file, e, 1);
4273
4274 fprintf (file, "\nRegisters live at start:");
4275 if (bb->global_live_at_start)
4276 {
4277 for (regno = 0; regno < max_regno; regno++)
4278 if (REGNO_REG_SET_P (bb->global_live_at_start, regno))
4279 fprintf (file, " %d", regno);
4280 }
4281 else
4282 fprintf (file, " n/a");
4283
4284 fprintf (file, "\nRegisters live at end:");
4285 if (bb->global_live_at_end)
4286 {
4287 for (regno = 0; regno < max_regno; regno++)
4288 if (REGNO_REG_SET_P (bb->global_live_at_end, regno))
4289 fprintf (file, " %d", regno);
4290 }
4291 else
4292 fprintf (file, " n/a");
4293
4294 putc('\n', file);
4295 }
4296
4297 putc('\n', file);
4298}
4299
4300static void
4301dump_edge_info (file, e, do_succ)
4302 FILE *file;
4303 edge e;
4304 int do_succ;
4305{
4306 basic_block side = (do_succ ? e->dest : e->src);
4307
4308 if (side == ENTRY_BLOCK_PTR)
4309 fputs (" ENTRY", file);
4310 else if (side == EXIT_BLOCK_PTR)
4311 fputs (" EXIT", file);
4312 else
4313 fprintf (file, " %d", side->index);
4314
4315 if (e->flags)
4316 {
4317 static char * bitnames[] = {
4318 "fallthru", "crit", "ab", "abcall", "eh", "fake"
4319 };
4320 int comma = 0;
4321 int i, flags = e->flags;
4322
4323 fputc (' ', file);
4324 fputc ('(', file);
4325 for (i = 0; flags; i++)
4326 if (flags & (1 << i))
4327 {
4328 flags &= ~(1 << i);
4329
4330 if (comma)
4331 fputc (',', file);
4332 if (i < (int)(sizeof (bitnames) / sizeof (*bitnames)))
4333 fputs (bitnames[i], file);
4334 else
4335 fprintf (file, "%d", i);
4336 comma = 1;
4337 }
4338 fputc (')', file);
4339 }
d7429b6a 4340}
3e28fe44
MM
4341
4342\f
4343/* Like print_rtl, but also print out live information for the start of each
4344 basic block. */
4345
4346void
4347print_rtl_with_bb (outf, rtx_first)
4348 FILE *outf;
4349 rtx rtx_first;
4350{
4351 register rtx tmp_rtx;
4352
4353 if (rtx_first == 0)
4354 fprintf (outf, "(nil)\n");
3e28fe44
MM
4355 else
4356 {
e881bb1b 4357 int i;
3e28fe44
MM
4358 enum bb_state { NOT_IN_BB, IN_ONE_BB, IN_MULTIPLE_BB };
4359 int max_uid = get_max_uid ();
54ea1de9
KG
4360 basic_block *start = (basic_block *)
4361 alloca (max_uid * sizeof (basic_block));
4362 basic_block *end = (basic_block *)
4363 alloca (max_uid * sizeof (basic_block));
2a92c071
GS
4364 enum bb_state *in_bb_p = (enum bb_state *)
4365 alloca (max_uid * sizeof (enum bb_state));
3e28fe44 4366
e881bb1b
RH
4367 memset (start, 0, max_uid * sizeof (basic_block));
4368 memset (end, 0, max_uid * sizeof (basic_block));
4369 memset (in_bb_p, 0, max_uid * sizeof (enum bb_state));
3e28fe44 4370
e881bb1b 4371 for (i = n_basic_blocks - 1; i >= 0; i--)
3e28fe44 4372 {
e881bb1b 4373 basic_block bb = BASIC_BLOCK (i);
3e28fe44 4374 rtx x;
e881bb1b
RH
4375
4376 start[INSN_UID (bb->head)] = bb;
4377 end[INSN_UID (bb->end)] = bb;
4378 for (x = bb->head; x != NULL_RTX; x = NEXT_INSN (x))
3e28fe44 4379 {
e881bb1b
RH
4380 enum bb_state state = IN_MULTIPLE_BB;
4381 if (in_bb_p[INSN_UID(x)] == NOT_IN_BB)
4382 state = IN_ONE_BB;
4383 in_bb_p[INSN_UID(x)] = state;
4384
4385 if (x == bb->end)
3e28fe44
MM
4386 break;
4387 }
4388 }
4389
4390 for (tmp_rtx = rtx_first; NULL != tmp_rtx; tmp_rtx = NEXT_INSN (tmp_rtx))
4391 {
b707b450 4392 int did_output;
e881bb1b 4393 basic_block bb;
b707b450 4394
e881bb1b 4395 if ((bb = start[INSN_UID (tmp_rtx)]) != NULL)
3e28fe44
MM
4396 {
4397 fprintf (outf, ";; Start of basic block %d, registers live:",
e881bb1b 4398 bb->index);
3e28fe44 4399
e881bb1b 4400 EXECUTE_IF_SET_IN_REG_SET (bb->global_live_at_start, 0, i,
3e28fe44
MM
4401 {
4402 fprintf (outf, " %d", i);
4403 if (i < FIRST_PSEUDO_REGISTER)
4404 fprintf (outf, " [%s]",
4405 reg_names[i]);
4406 });
4407 putc ('\n', outf);
4408 }
4409
ab87f8c8 4410 if (in_bb_p[INSN_UID(tmp_rtx)] == NOT_IN_BB
3e28fe44 4411 && GET_CODE (tmp_rtx) != NOTE
ab87f8c8
JL
4412 && GET_CODE (tmp_rtx) != BARRIER
4413 && ! obey_regdecls)
3e28fe44 4414 fprintf (outf, ";; Insn is not within a basic block\n");
e881bb1b 4415 else if (in_bb_p[INSN_UID(tmp_rtx)] == IN_MULTIPLE_BB)
3e28fe44
MM
4416 fprintf (outf, ";; Insn is in multiple basic blocks\n");
4417
b707b450 4418 did_output = print_rtl_single (outf, tmp_rtx);
3e28fe44 4419
e881bb1b
RH
4420 if ((bb = end[INSN_UID (tmp_rtx)]) != NULL)
4421 fprintf (outf, ";; End of basic block %d\n", bb->index);
3e28fe44 4422
b707b450 4423 if (did_output)
9ec36da5 4424 putc ('\n', outf);
3e28fe44
MM
4425 }
4426 }
4427}
5ece9746
JL
4428
4429\f
4430/* Integer list support. */
4431
4432/* Allocate a node from list *HEAD_PTR. */
4433
4434static int_list_ptr
4435alloc_int_list_node (head_ptr)
4436 int_list_block **head_ptr;
4437{
4438 struct int_list_block *first_blk = *head_ptr;
4439
4440 if (first_blk == NULL || first_blk->nodes_left <= 0)
4441 {
4442 first_blk = (struct int_list_block *) xmalloc (sizeof (struct int_list_block));
4443 first_blk->nodes_left = INT_LIST_NODES_IN_BLK;
4444 first_blk->next = *head_ptr;
4445 *head_ptr = first_blk;
4446 }
4447
4448 first_blk->nodes_left--;
4449 return &first_blk->nodes[first_blk->nodes_left];
4450}
4451
4452/* Pointer to head of predecessor/successor block list. */
4453static int_list_block *pred_int_list_blocks;
4454
4455/* Add a new node to integer list LIST with value VAL.
4456 LIST is a pointer to a list object to allow for different implementations.
4457 If *LIST is initially NULL, the list is empty.
4458 The caller must not care whether the element is added to the front or
4459 to the end of the list (to allow for different implementations). */
4460
4461static int_list_ptr
4462add_int_list_node (blk_list, list, val)
4463 int_list_block **blk_list;
4464 int_list **list;
4465 int val;
4466{
4467 int_list_ptr p = alloc_int_list_node (blk_list);
4468
4469 p->val = val;
4470 p->next = *list;
4471 *list = p;
4472 return p;
4473}
4474
4475/* Free the blocks of lists at BLK_LIST. */
4476
4477void
4478free_int_list (blk_list)
4479 int_list_block **blk_list;
4480{
4481 int_list_block *p, *next;
4482
4483 for (p = *blk_list; p != NULL; p = next)
4484 {
4485 next = p->next;
4486 free (p);
4487 }
4488
4489 /* Mark list as empty for the next function we compile. */
4490 *blk_list = NULL;
4491}
4492\f
4493/* Predecessor/successor computation. */
4494
4495/* Mark PRED_BB a precessor of SUCC_BB,
4496 and conversely SUCC_BB a successor of PRED_BB. */
4497
4498static void
4499add_pred_succ (pred_bb, succ_bb, s_preds, s_succs, num_preds, num_succs)
4500 int pred_bb;
4501 int succ_bb;
4502 int_list_ptr *s_preds;
4503 int_list_ptr *s_succs;
4504 int *num_preds;
4505 int *num_succs;
4506{
4507 if (succ_bb != EXIT_BLOCK)
4508 {
4509 add_int_list_node (&pred_int_list_blocks, &s_preds[succ_bb], pred_bb);
4510 num_preds[succ_bb]++;
4511 }
4512 if (pred_bb != ENTRY_BLOCK)
4513 {
4514 add_int_list_node (&pred_int_list_blocks, &s_succs[pred_bb], succ_bb);
4515 num_succs[pred_bb]++;
4516 }
4517}
4518
e881bb1b
RH
4519/* Convert edge lists into pred/succ lists for backward compatibility. */
4520
743bb12d 4521void
5ece9746
JL
4522compute_preds_succs (s_preds, s_succs, num_preds, num_succs)
4523 int_list_ptr *s_preds;
4524 int_list_ptr *s_succs;
4525 int *num_preds;
4526 int *num_succs;
4527{
e881bb1b
RH
4528 int i, n = n_basic_blocks;
4529 edge e;
5ece9746 4530
e881bb1b
RH
4531 memset (s_preds, 0, n_basic_blocks * sizeof (int_list_ptr));
4532 memset (s_succs, 0, n_basic_blocks * sizeof (int_list_ptr));
4533 memset (num_preds, 0, n_basic_blocks * sizeof (int));
4534 memset (num_succs, 0, n_basic_blocks * sizeof (int));
5ece9746 4535
e881bb1b 4536 for (i = 0; i < n; ++i)
5ece9746 4537 {
e881bb1b
RH
4538 basic_block bb = BASIC_BLOCK (i);
4539
4540 for (e = bb->succ; e ; e = e->succ_next)
4541 add_pred_succ (i, e->dest->index, s_preds, s_succs,
4542 num_preds, num_succs);
5ece9746
JL
4543 }
4544
e881bb1b
RH
4545 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
4546 add_pred_succ (ENTRY_BLOCK, e->dest->index, s_preds, s_succs,
4547 num_preds, num_succs);
5ece9746
JL
4548}
4549
4550void
421382ac 4551dump_bb_data (file, preds, succs, live_info)
5ece9746
JL
4552 FILE *file;
4553 int_list_ptr *preds;
4554 int_list_ptr *succs;
421382ac 4555 int live_info;
5ece9746
JL
4556{
4557 int bb;
4558 int_list_ptr p;
4559
4560 fprintf (file, "BB data\n\n");
4561 for (bb = 0; bb < n_basic_blocks; bb++)
4562 {
4563 fprintf (file, "BB %d, start %d, end %d\n", bb,
4564 INSN_UID (BLOCK_HEAD (bb)), INSN_UID (BLOCK_END (bb)));
4565 fprintf (file, " preds:");
4566 for (p = preds[bb]; p != NULL; p = p->next)
4567 {
4568 int pred_bb = INT_LIST_VAL (p);
4569 if (pred_bb == ENTRY_BLOCK)
4570 fprintf (file, " entry");
4571 else
4572 fprintf (file, " %d", pred_bb);
4573 }
4574 fprintf (file, "\n");
4575 fprintf (file, " succs:");
4576 for (p = succs[bb]; p != NULL; p = p->next)
4577 {
4578 int succ_bb = INT_LIST_VAL (p);
4579 if (succ_bb == EXIT_BLOCK)
4580 fprintf (file, " exit");
4581 else
4582 fprintf (file, " %d", succ_bb);
4583 }
421382ac
BS
4584 if (live_info)
4585 {
4586 int regno;
4587 fprintf (file, "\nRegisters live at start:");
4588 for (regno = 0; regno < max_regno; regno++)
e881bb1b 4589 if (REGNO_REG_SET_P (BASIC_BLOCK (bb)->global_live_at_start, regno))
421382ac
BS
4590 fprintf (file, " %d", regno);
4591 fprintf (file, "\n");
4592 }
5ece9746
JL
4593 fprintf (file, "\n");
4594 }
4595 fprintf (file, "\n");
4596}
4597
4598/* Free basic block data storage. */
4599
4600void
4601free_bb_mem ()
4602{
4603 free_int_list (&pred_int_list_blocks);
4604}
5e89e58b 4605
5ece9746
JL
4606/* Compute dominator relationships. */
4607void
4608compute_dominators (dominators, post_dominators, s_preds, s_succs)
4609 sbitmap *dominators;
4610 sbitmap *post_dominators;
4611 int_list_ptr *s_preds;
4612 int_list_ptr *s_succs;
4613{
4614 int bb, changed, passes;
4615 sbitmap *temp_bitmap;
4616
4617 temp_bitmap = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks);
4618 sbitmap_vector_ones (dominators, n_basic_blocks);
4619 sbitmap_vector_ones (post_dominators, n_basic_blocks);
4620 sbitmap_vector_zero (temp_bitmap, n_basic_blocks);
4621
4622 sbitmap_zero (dominators[0]);
4623 SET_BIT (dominators[0], 0);
4624
e881bb1b
RH
4625 sbitmap_zero (post_dominators[n_basic_blocks - 1]);
4626 SET_BIT (post_dominators[n_basic_blocks - 1], 0);
5ece9746
JL
4627
4628 passes = 0;
4629 changed = 1;
4630 while (changed)
4631 {
4632 changed = 0;
4633 for (bb = 1; bb < n_basic_blocks; bb++)
4634 {
4635 sbitmap_intersect_of_predecessors (temp_bitmap[bb], dominators,
4636 bb, s_preds);
4637 SET_BIT (temp_bitmap[bb], bb);
4638 changed |= sbitmap_a_and_b (dominators[bb],
4639 dominators[bb],
4640 temp_bitmap[bb]);
4641 sbitmap_intersect_of_successors (temp_bitmap[bb], post_dominators,
4642 bb, s_succs);
4643 SET_BIT (temp_bitmap[bb], bb);
4644 changed |= sbitmap_a_and_b (post_dominators[bb],
4645 post_dominators[bb],
4646 temp_bitmap[bb]);
4647 }
4648 passes++;
4649 }
4650
4651 free (temp_bitmap);
4652}
4c649323 4653
422d0fb0
RH
4654/* Given DOMINATORS, compute the immediate dominators into IDOM. */
4655
4656void
4657compute_immediate_dominators (idom, dominators)
4658 int *idom;
4659 sbitmap *dominators;
4660{
4661 sbitmap *tmp;
4662 int b;
4663
4664 tmp = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks);
4665
4666 /* Begin with tmp(n) = dom(n) - { n }. */
4667 for (b = n_basic_blocks; --b >= 0; )
4668 {
4669 sbitmap_copy (tmp[b], dominators[b]);
4670 RESET_BIT (tmp[b], b);
4671 }
4672
4673 /* Subtract out all of our dominator's dominators. */
4674 for (b = n_basic_blocks; --b >= 0; )
4675 {
4676 sbitmap tmp_b = tmp[b];
4677 int s;
4678
4679 for (s = n_basic_blocks; --s >= 0; )
4680 if (TEST_BIT (tmp_b, s))
4681 sbitmap_difference (tmp_b, tmp_b, tmp[s]);
4682 }
4683
4684 /* Find the one bit set in the bitmap and put it in the output array. */
4685 for (b = n_basic_blocks; --b >= 0; )
4686 {
4687 int t;
4688 EXECUTE_IF_SET_IN_SBITMAP (tmp[b], 0, t, { idom[b] = t; });
4689 }
4690
4691 sbitmap_vector_free (tmp);
4692}
4693
4c649323
JL
4694/* Count for a single SET rtx, X. */
4695
4696static void
4697count_reg_sets_1 (x)
4698 rtx x;
4699{
4700 register int regno;
4701 register rtx reg = SET_DEST (x);
4702
4703 /* Find the register that's set/clobbered. */
4704 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
4705 || GET_CODE (reg) == SIGN_EXTRACT
4706 || GET_CODE (reg) == STRICT_LOW_PART)
4707 reg = XEXP (reg, 0);
4708
86465af7
DM
4709 if (GET_CODE (reg) == PARALLEL
4710 && GET_MODE (reg) == BLKmode)
4711 {
4712 register int i;
4713 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
4714 count_reg_sets_1 (XVECEXP (reg, 0, i));
4715 return;
4716 }
4717
4c649323
JL
4718 if (GET_CODE (reg) == REG)
4719 {
4720 regno = REGNO (reg);
4721 if (regno >= FIRST_PSEUDO_REGISTER)
4722 {
4723 /* Count (weighted) references, stores, etc. This counts a
4724 register twice if it is modified, but that is correct. */
4725 REG_N_SETS (regno)++;
4726
4727 REG_N_REFS (regno) += loop_depth;
4728 }
4729 }
4730}
4731
4732/* Increment REG_N_SETS for each SET or CLOBBER found in X; also increment
4733 REG_N_REFS by the current loop depth for each SET or CLOBBER found. */
4734
4735static void
4736count_reg_sets (x)
4737 rtx x;
4738{
4739 register RTX_CODE code = GET_CODE (x);
4740
4741 if (code == SET || code == CLOBBER)
4742 count_reg_sets_1 (x);
4743 else if (code == PARALLEL)
4744 {
4745 register int i;
4746 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4747 {
4748 code = GET_CODE (XVECEXP (x, 0, i));
4749 if (code == SET || code == CLOBBER)
4750 count_reg_sets_1 (XVECEXP (x, 0, i));
4751 }
4752 }
4753}
4754
4755/* Increment REG_N_REFS by the current loop depth each register reference
4756 found in X. */
4757
4758static void
4759count_reg_references (x)
4760 rtx x;
4761{
4762 register RTX_CODE code;
4c649323
JL
4763
4764 retry:
4765 code = GET_CODE (x);
4766 switch (code)
4767 {
4768 case LABEL_REF:
4769 case SYMBOL_REF:
4770 case CONST_INT:
4771 case CONST:
4772 case CONST_DOUBLE:
4773 case PC:
4774 case ADDR_VEC:
4775 case ADDR_DIFF_VEC:
4776 case ASM_INPUT:
4777 return;
4778
4779#ifdef HAVE_cc0
4780 case CC0:
4781 return;
4782#endif
4783
4784 case CLOBBER:
4785 /* If we are clobbering a MEM, mark any registers inside the address
4786 as being used. */
4787 if (GET_CODE (XEXP (x, 0)) == MEM)
4788 count_reg_references (XEXP (XEXP (x, 0), 0));
4789 return;
4790
4791 case SUBREG:
4792 /* While we're here, optimize this case. */
4793 x = SUBREG_REG (x);
4794
4795 /* In case the SUBREG is not of a register, don't optimize */
4796 if (GET_CODE (x) != REG)
4797 {
4798 count_reg_references (x);
4799 return;
4800 }
4801
4802 /* ... fall through ... */
4803
4804 case REG:
4805 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
4806 REG_N_REFS (REGNO (x)) += loop_depth;
4807 return;
4808
4809 case SET:
4810 {
4811 register rtx testreg = SET_DEST (x);
4812 int mark_dest = 0;
4813
4814 /* If storing into MEM, don't show it as being used. But do
4815 show the address as being used. */
4816 if (GET_CODE (testreg) == MEM)
4817 {
4818 count_reg_references (XEXP (testreg, 0));
4819 count_reg_references (SET_SRC (x));
4820 return;
4821 }
4822
4823 /* Storing in STRICT_LOW_PART is like storing in a reg
4824 in that this SET might be dead, so ignore it in TESTREG.
4825 but in some other ways it is like using the reg.
4826
4827 Storing in a SUBREG or a bit field is like storing the entire
4828 register in that if the register's value is not used
4829 then this SET is not needed. */
4830 while (GET_CODE (testreg) == STRICT_LOW_PART
4831 || GET_CODE (testreg) == ZERO_EXTRACT
4832 || GET_CODE (testreg) == SIGN_EXTRACT
4833 || GET_CODE (testreg) == SUBREG)
4834 {
4835 /* Modifying a single register in an alternate mode
4836 does not use any of the old value. But these other
4837 ways of storing in a register do use the old value. */
4838 if (GET_CODE (testreg) == SUBREG
4839 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
4840 ;
4841 else
4842 mark_dest = 1;
4843
4844 testreg = XEXP (testreg, 0);
4845 }
4846
4847 /* If this is a store into a register,
4848 recursively scan the value being stored. */
4849
86465af7
DM
4850 if ((GET_CODE (testreg) == PARALLEL
4851 && GET_MODE (testreg) == BLKmode)
4852 || GET_CODE (testreg) == REG)
4c649323
JL
4853 {
4854 count_reg_references (SET_SRC (x));
4855 if (mark_dest)
4856 count_reg_references (SET_DEST (x));
4857 return;
4858 }
4859 }
4860 break;
4861
4862 default:
4863 break;
4864 }
4865
4866 /* Recursively scan the operands of this expression. */
4867
4868 {
4869 register char *fmt = GET_RTX_FORMAT (code);
4870 register int i;
4871
4872 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4873 {
4874 if (fmt[i] == 'e')
4875 {
4876 /* Tail recursive case: save a function call level. */
4877 if (i == 0)
4878 {
4879 x = XEXP (x, 0);
4880 goto retry;
4881 }
4882 count_reg_references (XEXP (x, i));
4883 }
4884 else if (fmt[i] == 'E')
4885 {
4886 register int j;
4887 for (j = 0; j < XVECLEN (x, i); j++)
4888 count_reg_references (XVECEXP (x, i, j));
4889 }
4890 }
4891 }
4892}
4893
4894/* Recompute register set/reference counts immediately prior to register
4895 allocation.
4896
4897 This avoids problems with set/reference counts changing to/from values
4898 which have special meanings to the register allocators.
4899
4900 Additionally, the reference counts are the primary component used by the
4901 register allocators to prioritize pseudos for allocation to hard regs.
4902 More accurate reference counts generally lead to better register allocation.
4903
213c4983
R
4904 F is the first insn to be scanned.
4905 LOOP_STEP denotes how much loop_depth should be incremented per
4906 loop nesting level in order to increase the ref count more for references
4907 in a loop.
4908
4c649323
JL
4909 It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and
4910 possibly other information which is used by the register allocators. */
4911
762a1d90 4912void
213c4983 4913recompute_reg_usage (f, loop_step)
4c649323 4914 rtx f;
213c4983 4915 int loop_step;
4c649323
JL
4916{
4917 rtx insn;
4918 int i, max_reg;
4919
4920 /* Clear out the old data. */
4921 max_reg = max_reg_num ();
4922 for (i = FIRST_PSEUDO_REGISTER; i < max_reg; i++)
4923 {
4924 REG_N_SETS (i) = 0;
4925 REG_N_REFS (i) = 0;
4926 }
4927
4928 /* Scan each insn in the chain and count how many times each register is
4929 set/used. */
4930 loop_depth = 1;
4931 for (insn = f; insn; insn = NEXT_INSN (insn))
4932 {
4933 /* Keep track of loop depth. */
4934 if (GET_CODE (insn) == NOTE)
4935 {
4936 /* Look for loop boundaries. */
4937 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
213c4983 4938 loop_depth -= loop_step;
4c649323 4939 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
213c4983 4940 loop_depth += loop_step;
4c649323
JL
4941
4942 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
4943 Abort now rather than setting register status incorrectly. */
4944 if (loop_depth == 0)
4945 abort ();
4946 }
4947 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4948 {
4949 rtx links;
4950
4951 /* This call will increment REG_N_SETS for each SET or CLOBBER
4952 of a register in INSN. It will also increment REG_N_REFS
4953 by the loop depth for each set of a register in INSN. */
4954 count_reg_sets (PATTERN (insn));
4955
4956 /* count_reg_sets does not detect autoincrement address modes, so
4957 detect them here by looking at the notes attached to INSN. */
4958 for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
4959 {
4960 if (REG_NOTE_KIND (links) == REG_INC)
4961 /* Count (weighted) references, stores, etc. This counts a
4962 register twice if it is modified, but that is correct. */
4963 REG_N_SETS (REGNO (XEXP (links, 0)))++;
4964 }
4965
4966 /* This call will increment REG_N_REFS by the current loop depth for
4967 each reference to a register in INSN. */
4968 count_reg_references (PATTERN (insn));
4969
4970 /* count_reg_references will not include counts for arguments to
4971 function calls, so detect them here by examining the
4972 CALL_INSN_FUNCTION_USAGE data. */
4973 if (GET_CODE (insn) == CALL_INSN)
4974 {
4975 rtx note;
4976
4977 for (note = CALL_INSN_FUNCTION_USAGE (insn);
4978 note;
4979 note = XEXP (note, 1))
4980 if (GET_CODE (XEXP (note, 0)) == USE)
4981 count_reg_references (SET_DEST (XEXP (note, 0)));
4982 }
4983 }
4984 }
4985}
e881bb1b
RH
4986
4987/* Record INSN's block as BB. */
4988
4989void
4990set_block_for_insn (insn, bb)
4991 rtx insn;
4992 basic_block bb;
4993{
4994 size_t uid = INSN_UID (insn);
4995 if (uid >= basic_block_for_insn->num_elements)
4996 {
4997 int new_size;
4998
4999 /* Add one-eighth the size so we don't keep calling xrealloc. */
5000 new_size = uid + (uid + 7) / 8;
5001
5002 VARRAY_GROW (basic_block_for_insn, new_size);
5003 }
5004 VARRAY_BB (basic_block_for_insn, uid) = bb;
5005}
5006
5007/* Record INSN's block number as BB. */
5008/* ??? This has got to go. */
5009
5010void
5011set_block_num (insn, bb)
5012 rtx insn;
5013 int bb;
5014{
5015 set_block_for_insn (insn, BASIC_BLOCK (bb));
5016}
34487bf8
RH
5017\f
5018/* Verify the CFG consistency. This function check some CFG invariants and
5019 aborts when something is wrong. Hope that this function will help to
5020 convert many optimization passes to preserve CFG consistent.
5021
5022 Currently it does following checks:
5023
5024 - test head/end pointers
5025 - overlapping of basic blocks
5026 - edge list corectness
5027 - headers of basic blocks (the NOTE_INSN_BASIC_BLOCK note)
5028 - tails of basic blocks (ensure that boundary is necesary)
5029 - scans body of the basic block for JUMP_INSN, CODE_LABEL
5030 and NOTE_INSN_BASIC_BLOCK
5031 - check that all insns are in the basic blocks
5032 (except the switch handling code, barriers and notes)
5033
5034 In future it can be extended check a lot of other stuff as well
5035 (reachability of basic blocks, life information, etc. etc.). */
5036
5037void
5038verify_flow_info ()
5039{
5040 const int max_uid = get_max_uid ();
5041 const rtx rtx_first = get_insns ();
5042 basic_block *bb_info;
5043 rtx x;
5044 int i;
5045
5046 bb_info = (basic_block *) alloca (max_uid * sizeof (basic_block));
5047 memset (bb_info, 0, max_uid * sizeof (basic_block));
5048
5049 /* First pass check head/end pointers and set bb_info array used by
5050 later passes. */
5051 for (i = n_basic_blocks - 1; i >= 0; i--)
5052 {
5053 basic_block bb = BASIC_BLOCK (i);
5054
5055 /* Check the head pointer and make sure that it is pointing into
5056 insn list. */
5057 for (x = rtx_first; x != NULL_RTX; x = NEXT_INSN (x))
5058 if (x == bb->head)
5059 break;
5060 if (!x)
5061 {
5062 fatal ("verify_flow_info: Head insn %d for block %d not found in the insn stream.\n",
5063 INSN_UID (bb->head), bb->index);
5064 }
5065
5066 /* Check the end pointer and make sure that it is pointing into
5067 insn list. */
5068 for (x = bb->head; x != NULL_RTX; x = NEXT_INSN (x))
5069 {
5070 if (bb_info[INSN_UID (x)] != NULL)
5071 {
5072 fatal ("verify_flow_info: Insn %d is in multiple basic blocks (%d and %d)",
5073 INSN_UID (x), bb->index, bb_info[INSN_UID (x)]->index);
5074 }
5075 bb_info[INSN_UID (x)] = bb;
5076
5077 if (x == bb->end)
5078 break;
5079 }
5080 if (!x)
5081 {
5082 fatal ("verify_flow_info: End insn %d for block %d not found in the insn stream.\n",
5083 INSN_UID (bb->end), bb->index);
5084 }
5085 }
5086
5087 /* Now check the basic blocks (boundaries etc.) */
5088 for (i = n_basic_blocks - 1; i >= 0; i--)
5089 {
5090 basic_block bb = BASIC_BLOCK (i);
5091 /* Check corectness of edge lists */
5092 edge e;
5093
5094 e = bb->succ;
5095 while (e)
5096 {
5097 if (e->src != bb)
5098 {
5099 fprintf (stderr, "verify_flow_info: Basic block %d succ edge is corrupted\n",
5100 bb->index);
5101 fprintf (stderr, "Predecessor: ");
5102 dump_edge_info (stderr, e, 0);
5103 fprintf (stderr, "\nSuccessor: ");
5104 dump_edge_info (stderr, e, 1);
5105 fflush (stderr);
5106 abort ();
5107 }
5108 if (e->dest != EXIT_BLOCK_PTR)
5109 {
5110 edge e2 = e->dest->pred;
5111 while (e2 && e2 != e)
5112 e2 = e2->pred_next;
5113 if (!e2)
5114 {
5115 fatal ("verify_flow_info: Basic block %i edge lists are corrupted\n",
5116 bb->index);
5117 }
5118 }
5119 e = e->succ_next;
5120 }
5121
5122 e = bb->pred;
5123 while (e)
5124 {
5125 if (e->dest != bb)
5126 {
5127 fprintf (stderr, "verify_flow_info: Basic block %d pred edge is corrupted\n",
5128 bb->index);
5129 fprintf (stderr, "Predecessor: ");
5130 dump_edge_info (stderr, e, 0);
5131 fprintf (stderr, "\nSuccessor: ");
5132 dump_edge_info (stderr, e, 1);
5133 fflush (stderr);
5134 abort ();
5135 }
5136 if (e->src != ENTRY_BLOCK_PTR)
5137 {
5138 edge e2 = e->src->succ;
5139 while (e2 && e2 != e)
5140 e2 = e2->succ_next;
5141 if (!e2)
5142 {
5143 fatal ("verify_flow_info: Basic block %i edge lists are corrupted\n",
5144 bb->index);
5145 }
5146 }
5147 e = e->pred_next;
5148 }
5149
5150 /* OK pointers are correct. Now check the header of basic
5151 block. It ought to contain optional CODE_LABEL followed
5152 by NOTE_BASIC_BLOCK. */
5153 x = bb->head;
5154 if (GET_CODE (x) == CODE_LABEL)
5155 {
5156 if (bb->end == x)
5157 {
5158 fatal ("verify_flow_info: Basic block contains only CODE_LABEL and no NOTE_INSN_BASIC_BLOCK note\n");
5159 }
5160 x = NEXT_INSN (x);
5161 }
5162 if (GET_CODE (x) != NOTE
5163 || NOTE_LINE_NUMBER (x) != NOTE_INSN_BASIC_BLOCK
5164 || NOTE_BASIC_BLOCK (x) != bb)
5165 {
5166 fatal ("verify_flow_info: NOTE_INSN_BASIC_BLOCK is missing for block %d\n",
5167 bb->index);
5168 }
5169
5170 if (bb->end == x)
5171 {
5172 /* Do checks for empty blocks here */
5173 }
5174 else
5175 {
5176 x = NEXT_INSN (x);
5177 while (x)
5178 {
5179 if (GET_CODE (x) == NOTE
5180 && NOTE_LINE_NUMBER (x) == NOTE_INSN_BASIC_BLOCK)
5181 {
5182 fatal ("verify_flow_info: NOTE_INSN_BASIC_BLOCK %d in the middle of basic block %d\n",
5183 INSN_UID (x), bb->index);
5184 }
5185
5186 if (x == bb->end)
5187 break;
5188
5189 if (GET_CODE (x) == JUMP_INSN
5190 || GET_CODE (x) == CODE_LABEL
5191 || GET_CODE (x) == BARRIER)
5192 {
5193 fatal_insn ("verify_flow_info: Incorrect insn in the middle of basic block %d\n",
5194 x, bb->index);
5195 }
5196
5197 x = NEXT_INSN (x);
5198 }
5199 }
5200 }
5201
5202 x = rtx_first;
5203 while (x)
5204 {
5205 if (!bb_info[INSN_UID (x)])
5206 {
5207 switch (GET_CODE (x))
5208 {
5209 case BARRIER:
5210 case NOTE:
5211 break;
5212
5213 case CODE_LABEL:
5214 /* An addr_vec is placed outside any block block. */
5215 if (NEXT_INSN (x)
5216 && GET_CODE (NEXT_INSN (x)) == JUMP_INSN
5217 && (GET_CODE (PATTERN (NEXT_INSN (x))) == ADDR_DIFF_VEC
5218 || GET_CODE (PATTERN (NEXT_INSN (x))) == ADDR_VEC))
5219 {
5220 x = NEXT_INSN (x);
5221 }
5222
5223 /* But in any case, non-deletable labels can appear anywhere. */
5224 break;
5225
5226 default:
5227 fatal_insn ("verify_flow_info: Insn outside basic block\n", x);
5228 }
5229 }
5230
5231 x = NEXT_INSN (x);
5232 }
5233}
This page took 1.325077 seconds and 5 git commands to generate.