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d7429b6a 1/* Data flow analysis for GNU compiler.
6a45254e 2 Copyright (C) 1987, 88, 92-96, 1997 Free Software Foundation, Inc.
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
d7429b6a
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20
21
22/* This file contains the data flow analysis pass of the compiler.
23 It computes data flow information
24 which tells combine_instructions which insns to consider combining
25 and controls register allocation.
26
27 Additional data flow information that is too bulky to record
28 is generated during the analysis, and is used at that time to
29 create autoincrement and autodecrement addressing.
30
31 The first step is dividing the function into basic blocks.
32 find_basic_blocks does this. Then life_analysis determines
33 where each register is live and where it is dead.
34
35 ** find_basic_blocks **
36
37 find_basic_blocks divides the current function's rtl
38 into basic blocks. It records the beginnings and ends of the
39 basic blocks in the vectors basic_block_head and basic_block_end,
40 and the number of blocks in n_basic_blocks.
41
42 find_basic_blocks also finds any unreachable loops
43 and deletes them.
44
45 ** life_analysis **
46
47 life_analysis is called immediately after find_basic_blocks.
48 It uses the basic block information to determine where each
49 hard or pseudo register is live.
50
51 ** live-register info **
52
53 The information about where each register is live is in two parts:
54 the REG_NOTES of insns, and the vector basic_block_live_at_start.
55
56 basic_block_live_at_start has an element for each basic block,
57 and the element is a bit-vector with a bit for each hard or pseudo
58 register. The bit is 1 if the register is live at the beginning
59 of the basic block.
60
61 Two types of elements can be added to an insn's REG_NOTES.
62 A REG_DEAD note is added to an insn's REG_NOTES for any register
63 that meets both of two conditions: The value in the register is not
64 needed in subsequent insns and the insn does not replace the value in
65 the register (in the case of multi-word hard registers, the value in
66 each register must be replaced by the insn to avoid a REG_DEAD note).
67
68 In the vast majority of cases, an object in a REG_DEAD note will be
69 used somewhere in the insn. The (rare) exception to this is if an
70 insn uses a multi-word hard register and only some of the registers are
71 needed in subsequent insns. In that case, REG_DEAD notes will be
72 provided for those hard registers that are not subsequently needed.
73 Partial REG_DEAD notes of this type do not occur when an insn sets
74 only some of the hard registers used in such a multi-word operand;
75 omitting REG_DEAD notes for objects stored in an insn is optional and
76 the desire to do so does not justify the complexity of the partial
77 REG_DEAD notes.
78
79 REG_UNUSED notes are added for each register that is set by the insn
80 but is unused subsequently (if every register set by the insn is unused
81 and the insn does not reference memory or have some other side-effect,
82 the insn is deleted instead). If only part of a multi-word hard
83 register is used in a subsequent insn, REG_UNUSED notes are made for
84 the parts that will not be used.
85
86 To determine which registers are live after any insn, one can
87 start from the beginning of the basic block and scan insns, noting
88 which registers are set by each insn and which die there.
89
90 ** Other actions of life_analysis **
91
92 life_analysis sets up the LOG_LINKS fields of insns because the
93 information needed to do so is readily available.
94
95 life_analysis deletes insns whose only effect is to store a value
96 that is never used.
97
98 life_analysis notices cases where a reference to a register as
99 a memory address can be combined with a preceding or following
100 incrementation or decrementation of the register. The separate
101 instruction to increment or decrement is deleted and the address
102 is changed to a POST_INC or similar rtx.
103
104 Each time an incrementing or decrementing address is created,
105 a REG_INC element is added to the insn's REG_NOTES list.
106
107 life_analysis fills in certain vectors containing information about
108 register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length,
109 reg_n_calls_crosses and reg_basic_block. */
110\f
111#include <stdio.h>
112#include "config.h"
113#include "rtl.h"
114#include "basic-block.h"
115#include "insn-config.h"
116#include "regs.h"
117#include "hard-reg-set.h"
118#include "flags.h"
119#include "output.h"
3d195391 120#include "except.h"
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121
122#include "obstack.h"
123#define obstack_chunk_alloc xmalloc
124#define obstack_chunk_free free
125
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126/* The contents of the current function definition are allocated
127 in this obstack, and all are freed at the end of the function.
128 For top-level functions, this is temporary_obstack.
129 Separate obstacks are made for nested functions. */
130
131extern struct obstack *function_obstack;
132
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133/* List of labels that must never be deleted. */
134extern rtx forced_labels;
135
136/* Get the basic block number of an insn.
137 This info should not be expected to remain available
138 after the end of life_analysis. */
139
140/* This is the limit of the allocated space in the following two arrays. */
141
142static int max_uid_for_flow;
143
144#define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)]
145
146/* This is where the BLOCK_NUM values are really stored.
147 This is set up by find_basic_blocks and used there and in life_analysis,
148 and then freed. */
149
6ac271be 150static int *uid_block_number;
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151
152/* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
153
154#define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)]
155static char *uid_volatile;
156
157/* Number of basic blocks in the current function. */
158
159int n_basic_blocks;
160
161/* Maximum register number used in this function, plus one. */
162
163int max_regno;
164
0f41302f
MS
165/* Maximum number of SCRATCH rtx's used in any basic block of this
166 function. */
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167
168int max_scratch;
169
170/* Number of SCRATCH rtx's in the current block. */
171
172static int num_scratch;
173
b1f21e0a 174/* Indexed by n, giving various register information */
d7429b6a 175
b1f21e0a 176reg_info *reg_n_info;
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177
178/* Element N is the next insn that uses (hard or pseudo) register number N
179 within the current basic block; or zero, if there is no such insn.
180 This is valid only during the final backward scan in propagate_block. */
181
182static rtx *reg_next_use;
183
184/* Size of a regset for the current function,
185 in (1) bytes and (2) elements. */
186
187int regset_bytes;
188int regset_size;
189
190/* Element N is first insn in basic block N.
191 This info lasts until we finish compiling the function. */
192
193rtx *basic_block_head;
194
195/* Element N is last insn in basic block N.
196 This info lasts until we finish compiling the function. */
197
198rtx *basic_block_end;
199
200/* Element N is a regset describing the registers live
201 at the start of basic block N.
202 This info lasts until we finish compiling the function. */
203
204regset *basic_block_live_at_start;
205
206/* Regset of regs live when calls to `setjmp'-like functions happen. */
207
208regset regs_live_at_setjmp;
209
210/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
211 that have to go in the same hard reg.
212 The first two regs in the list are a pair, and the next two
213 are another pair, etc. */
214rtx regs_may_share;
215
216/* Element N is nonzero if control can drop into basic block N
217 from the preceding basic block. Freed after life_analysis. */
218
219static char *basic_block_drops_in;
220
221/* Element N is depth within loops of the last insn in basic block number N.
222 Freed after life_analysis. */
223
224static short *basic_block_loop_depth;
225
226/* Element N nonzero if basic block N can actually be reached.
227 Vector exists only during find_basic_blocks. */
228
229static char *block_live_static;
230
231/* Depth within loops of basic block being scanned for lifetime analysis,
232 plus one. This is the weight attached to references to registers. */
233
234static int loop_depth;
235
236/* During propagate_block, this is non-zero if the value of CC0 is live. */
237
238static int cc0_live;
239
240/* During propagate_block, this contains the last MEM stored into. It
241 is used to eliminate consecutive stores to the same location. */
242
243static rtx last_mem_set;
244
245/* Set of registers that may be eliminable. These are handled specially
246 in updating regs_ever_live. */
247
248static HARD_REG_SET elim_reg_set;
249
250/* Forward declarations */
e658434c 251static void find_basic_blocks PROTO((rtx, rtx));
fa5b4208 252static int jmp_uses_reg_or_mem PROTO((rtx));
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253static void mark_label_ref PROTO((rtx, rtx, int));
254static void life_analysis PROTO((rtx, int));
255void allocate_for_life_analysis PROTO((void));
7eb136d6 256static void init_regset_vector PROTO((regset *, int, int, struct obstack *));
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257static void propagate_block PROTO((regset, rtx, rtx, int,
258 regset, int));
8329b5ec 259static rtx flow_delete_insn PROTO((rtx));
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260static int insn_dead_p PROTO((rtx, regset, int));
261static int libcall_dead_p PROTO((rtx, regset, rtx, rtx));
262static void mark_set_regs PROTO((regset, regset, rtx,
263 rtx, regset));
264static void mark_set_1 PROTO((regset, regset, rtx,
265 rtx, regset));
266static void find_auto_inc PROTO((regset, rtx, rtx));
267static void mark_used_regs PROTO((regset, regset, rtx, int, rtx));
268static int try_pre_increment_1 PROTO((rtx));
269static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT));
913db40d 270static rtx find_use_as_address PROTO((rtx, rtx, HOST_WIDE_INT));
e658434c 271void dump_flow_info PROTO((FILE *));
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272\f
273/* Find basic blocks of the current function and perform data flow analysis.
274 F is the first insn of the function and NREGS the number of register numbers
275 in use. */
276
277void
278flow_analysis (f, nregs, file)
279 rtx f;
280 int nregs;
281 FILE *file;
282{
283 register rtx insn;
284 register int i;
d7e4fe8b 285 rtx nonlocal_label_list = nonlocal_label_rtx_list ();
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286
287#ifdef ELIMINABLE_REGS
288 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
289#endif
290
291 /* Record which registers will be eliminated. We use this in
0f41302f 292 mark_used_regs. */
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293
294 CLEAR_HARD_REG_SET (elim_reg_set);
295
296#ifdef ELIMINABLE_REGS
297 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
298 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
299#else
300 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
301#endif
302
303 /* Count the basic blocks. Also find maximum insn uid value used. */
304
305 {
306 register RTX_CODE prev_code = JUMP_INSN;
307 register RTX_CODE code;
308
309 max_uid_for_flow = 0;
310
311 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
312 {
313 code = GET_CODE (insn);
314 if (INSN_UID (insn) > max_uid_for_flow)
315 max_uid_for_flow = INSN_UID (insn);
316 if (code == CODE_LABEL
d7e4fe8b
RS
317 || (GET_RTX_CLASS (code) == 'i'
318 && (prev_code == JUMP_INSN
319 || (prev_code == CALL_INSN
6b67ec08 320 && nonlocal_label_list != 0)
d7e4fe8b 321 || prev_code == BARRIER)))
d7429b6a 322 i++;
8cfe18d6 323
2dd4cace 324 if (code == CALL_INSN && find_reg_note (insn, REG_RETVAL, NULL_RTX))
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325 code = INSN;
326
6b67ec08 327 if (code != NOTE)
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328 prev_code = code;
329 }
330 }
331
332#ifdef AUTO_INC_DEC
333 /* Leave space for insns we make in some cases for auto-inc. These cases
334 are rare, so we don't need too much space. */
335 max_uid_for_flow += max_uid_for_flow / 10;
336#endif
337
338 /* Allocate some tables that last till end of compiling this function
339 and some needed only in find_basic_blocks and life_analysis. */
340
341 n_basic_blocks = i;
342 basic_block_head = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
343 basic_block_end = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
344 basic_block_drops_in = (char *) alloca (n_basic_blocks);
345 basic_block_loop_depth = (short *) alloca (n_basic_blocks * sizeof (short));
346 uid_block_number
6ac271be 347 = (int *) alloca ((max_uid_for_flow + 1) * sizeof (int));
d7429b6a
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348 uid_volatile = (char *) alloca (max_uid_for_flow + 1);
349 bzero (uid_volatile, max_uid_for_flow + 1);
350
d7e4fe8b 351 find_basic_blocks (f, nonlocal_label_list);
d7429b6a
RK
352 life_analysis (f, nregs);
353 if (file)
354 dump_flow_info (file);
355
356 basic_block_drops_in = 0;
357 uid_block_number = 0;
358 basic_block_loop_depth = 0;
359}
360\f
361/* Find all basic blocks of the function whose first insn is F.
362 Store the correct data in the tables that describe the basic blocks,
363 set up the chains of references for each CODE_LABEL, and
d7e4fe8b
RS
364 delete any entire basic blocks that cannot be reached.
365
366 NONLOCAL_LABEL_LIST is the same local variable from flow_analysis. */
d7429b6a
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367
368static void
d7e4fe8b
RS
369find_basic_blocks (f, nonlocal_label_list)
370 rtx f, nonlocal_label_list;
d7429b6a
RK
371{
372 register rtx insn;
373 register int i;
374 register char *block_live = (char *) alloca (n_basic_blocks);
375 register char *block_marked = (char *) alloca (n_basic_blocks);
376 /* List of label_refs to all labels whose addresses are taken
377 and used as data. */
8329b5ec 378 rtx label_value_list;
812059fe 379 int label_value_list_marked_live;
e658434c
RK
380 rtx x, note;
381 enum rtx_code prev_code, code;
8329b5ec 382 int depth, pass;
d7429b6a 383
8329b5ec
DE
384 pass = 1;
385 restart:
386
387 label_value_list = 0;
812059fe 388 label_value_list_marked_live = 0;
d7429b6a
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389 block_live_static = block_live;
390 bzero (block_live, n_basic_blocks);
391 bzero (block_marked, n_basic_blocks);
392
393 /* Initialize with just block 0 reachable and no blocks marked. */
394 if (n_basic_blocks > 0)
395 block_live[0] = 1;
396
e658434c
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397 /* Initialize the ref chain of each label to 0. Record where all the
398 blocks start and end and their depth in loops. For each insn, record
399 the block it is in. Also mark as reachable any blocks headed by labels
400 that must not be deleted. */
d7429b6a 401
e658434c
RK
402 for (insn = f, i = -1, prev_code = JUMP_INSN, depth = 1;
403 insn; insn = NEXT_INSN (insn))
404 {
405 code = GET_CODE (insn);
406 if (code == NOTE)
407 {
408 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
409 depth++;
410 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
411 depth--;
412 }
d7429b6a 413
e658434c
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414 /* A basic block starts at label, or after something that can jump. */
415 else if (code == CODE_LABEL
416 || (GET_RTX_CLASS (code) == 'i'
417 && (prev_code == JUMP_INSN
418 || (prev_code == CALL_INSN
8cfe18d6
RK
419 && nonlocal_label_list != 0
420 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
e658434c
RK
421 || prev_code == BARRIER)))
422 {
423 basic_block_head[++i] = insn;
424 basic_block_end[i] = insn;
425 basic_block_loop_depth[i] = depth;
426
427 if (code == CODE_LABEL)
428 {
d7429b6a
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429 LABEL_REFS (insn) = insn;
430 /* Any label that cannot be deleted
431 is considered to start a reachable block. */
432 if (LABEL_PRESERVE_P (insn))
433 block_live[i] = 1;
434 }
e658434c 435 }
d7429b6a 436
e658434c
RK
437 else if (GET_RTX_CLASS (code) == 'i')
438 {
439 basic_block_end[i] = insn;
440 basic_block_loop_depth[i] = depth;
42fa3cfb 441 }
e658434c 442
42fa3cfb
JW
443 if (GET_RTX_CLASS (code) == 'i')
444 {
e658434c
RK
445 /* Make a list of all labels referred to other than by jumps. */
446 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
447 if (REG_NOTE_KIND (note) == REG_LABEL)
d7429b6a
RK
448 label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0),
449 label_value_list);
42fa3cfb 450 }
d7429b6a 451
e658434c 452 BLOCK_NUM (insn) = i;
d7e4fe8b 453
6b67ec08 454 if (code != NOTE)
e658434c
RK
455 prev_code = code;
456 }
457
2aec79e2
DE
458 /* During the second pass, `n_basic_blocks' is only an upper bound.
459 Only perform the sanity check for the first pass, and on the second
460 pass ensure `n_basic_blocks' is set to the correct value. */
461 if (pass == 1 && i + 1 != n_basic_blocks)
e658434c 462 abort ();
2aec79e2 463 n_basic_blocks = i + 1;
d7429b6a 464
e658434c
RK
465 for (x = forced_labels; x; x = XEXP (x, 1))
466 if (! LABEL_REF_NONLOCAL_P (x))
467 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
d7e4fe8b 468
3d195391
MS
469 for (x = exception_handler_labels; x; x = XEXP (x, 1))
470 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
471
d7429b6a
RK
472 /* Record which basic blocks control can drop in to. */
473
e658434c
RK
474 for (i = 0; i < n_basic_blocks; i++)
475 {
476 for (insn = PREV_INSN (basic_block_head[i]);
477 insn && GET_CODE (insn) == NOTE; insn = PREV_INSN (insn))
478 ;
479
480 basic_block_drops_in[i] = insn && GET_CODE (insn) != BARRIER;
481 }
d7429b6a
RK
482
483 /* Now find which basic blocks can actually be reached
484 and put all jump insns' LABEL_REFS onto the ref-chains
485 of their target labels. */
486
487 if (n_basic_blocks > 0)
488 {
489 int something_marked = 1;
8329b5ec 490 int deleted;
d7429b6a 491
e658434c
RK
492 /* Find all indirect jump insns and mark them as possibly jumping to all
493 the labels whose addresses are explicitly used. This is because,
494 when there are computed gotos, we can't tell which labels they jump
495 to, of all the possibilities.
496
497 Tablejumps and casesi insns are OK and we can recognize them by
498 a (use (label_ref)). */
d7429b6a
RK
499
500 for (insn = f; insn; insn = NEXT_INSN (insn))
e658434c 501 if (GET_CODE (insn) == JUMP_INSN)
d7429b6a 502 {
e658434c
RK
503 rtx pat = PATTERN (insn);
504 int computed_jump = 0;
505
506 if (GET_CODE (pat) == PARALLEL)
507 {
508 int len = XVECLEN (pat, 0);
509 int has_use_labelref = 0;
510
511 for (i = len - 1; i >= 0; i--)
512 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
513 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
514 == LABEL_REF))
515 has_use_labelref = 1;
516
517 if (! has_use_labelref)
518 for (i = len - 1; i >= 0; i--)
519 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
520 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
fa5b4208 521 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
e658434c
RK
522 computed_jump = 1;
523 }
524 else if (GET_CODE (pat) == SET
525 && SET_DEST (pat) == pc_rtx
fa5b4208 526 && jmp_uses_reg_or_mem (SET_SRC (pat)))
e658434c
RK
527 computed_jump = 1;
528
529 if (computed_jump)
530 {
812059fe
MS
531 if (label_value_list_marked_live == 0)
532 {
533 label_value_list_marked_live = 1;
534
535 /* This could be made smarter by only considering
536 these live, if the computed goto is live. */
537
538 /* Don't delete the labels (in this function) that
539 are referenced by non-jump instructions. */
540
541 for (x = label_value_list; x; x = XEXP (x, 1))
542 if (! LABEL_REF_NONLOCAL_P (x))
543 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
544 }
545
e658434c
RK
546 for (x = label_value_list; x; x = XEXP (x, 1))
547 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
548 insn, 0);
549
550 for (x = forced_labels; x; x = XEXP (x, 1))
551 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
d7429b6a 552 insn, 0);
e658434c 553 }
d7429b6a
RK
554 }
555
d7e4fe8b
RS
556 /* Find all call insns and mark them as possibly jumping
557 to all the nonlocal goto handler labels. */
558
559 for (insn = f; insn; insn = NEXT_INSN (insn))
8cfe18d6
RK
560 if (GET_CODE (insn) == CALL_INSN
561 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
d7e4fe8b 562 {
d7e4fe8b 563 for (x = nonlocal_label_list; x; x = XEXP (x, 1))
275c7080
JW
564 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
565 insn, 0);
e658434c 566
d7e4fe8b
RS
567 /* ??? This could be made smarter:
568 in some cases it's possible to tell that certain
569 calls will not do a nonlocal goto.
570
571 For example, if the nested functions that do the
572 nonlocal gotos do not have their addresses taken, then
573 only calls to those functions or to other nested
574 functions that use them could possibly do nonlocal
575 gotos. */
576 }
577
812059fe
MS
578 /* All blocks associated with labels in label_value_list are
579 trivially considered as marked live, if the list is empty.
580 We do this to speed up the below code. */
581
582 if (label_value_list == 0)
583 label_value_list_marked_live = 1;
584
d7429b6a
RK
585 /* Pass over all blocks, marking each block that is reachable
586 and has not yet been marked.
587 Keep doing this until, in one pass, no blocks have been marked.
588 Then blocks_live and blocks_marked are identical and correct.
589 In addition, all jumps actually reachable have been marked. */
590
591 while (something_marked)
592 {
593 something_marked = 0;
594 for (i = 0; i < n_basic_blocks; i++)
595 if (block_live[i] && !block_marked[i])
596 {
597 block_marked[i] = 1;
598 something_marked = 1;
599 if (i + 1 < n_basic_blocks && basic_block_drops_in[i + 1])
600 block_live[i + 1] = 1;
601 insn = basic_block_end[i];
602 if (GET_CODE (insn) == JUMP_INSN)
603 mark_label_ref (PATTERN (insn), insn, 0);
812059fe
MS
604
605 if (label_value_list_marked_live == 0)
606 /* Now that we know that this block is live, mark as
607 live, all the blocks that we might be able to get
608 to as live. */
609
610 for (insn = basic_block_head[i];
c13210e9 611 insn != NEXT_INSN (basic_block_end[i]);
812059fe
MS
612 insn = NEXT_INSN (insn))
613 {
614 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
615 {
616 for (note = REG_NOTES (insn);
617 note;
618 note = XEXP (note, 1))
619 if (REG_NOTE_KIND (note) == REG_LABEL)
620 {
621 x = XEXP (note, 0);
622 block_live[BLOCK_NUM (x)] = 1;
623 }
624 }
625 }
d7429b6a
RK
626 }
627 }
628
af14ce9c
RK
629 /* ??? See if we have a "live" basic block that is not reachable.
630 This can happen if it is headed by a label that is preserved or
631 in one of the label lists, but no call or computed jump is in
632 the loop. It's not clear if we can delete the block or not,
633 but don't for now. However, we will mess up register status if
634 it remains unreachable, so add a fake reachability from the
635 previous block. */
636
637 for (i = 1; i < n_basic_blocks; i++)
638 if (block_live[i] && ! basic_block_drops_in[i]
639 && GET_CODE (basic_block_head[i]) == CODE_LABEL
640 && LABEL_REFS (basic_block_head[i]) == basic_block_head[i])
641 basic_block_drops_in[i] = 1;
642
d7429b6a
RK
643 /* Now delete the code for any basic blocks that can't be reached.
644 They can occur because jump_optimize does not recognize
645 unreachable loops as unreachable. */
646
8329b5ec 647 deleted = 0;
d7429b6a
RK
648 for (i = 0; i < n_basic_blocks; i++)
649 if (!block_live[i])
650 {
8329b5ec
DE
651 deleted++;
652
653 /* Delete the insns in a (non-live) block. We physically delete
654 every non-note insn except the start and end (so
655 basic_block_head/end needn't be updated), we turn the latter
656 into NOTE_INSN_DELETED notes.
657 We use to "delete" the insns by turning them into notes, but
658 we may be deleting lots of insns that subsequent passes would
659 otherwise have to process. Secondly, lots of deleted blocks in
660 a row can really slow down propagate_block since it will
661 otherwise process insn-turned-notes multiple times when it
662 looks for loop begin/end notes. */
663 if (basic_block_head[i] != basic_block_end[i])
664 {
49b6c81e
DE
665 /* It would be quicker to delete all of these with a single
666 unchaining, rather than one at a time, but we need to keep
667 the NOTE's. */
8329b5ec
DE
668 insn = NEXT_INSN (basic_block_head[i]);
669 while (insn != basic_block_end[i])
670 {
671 if (GET_CODE (insn) == BARRIER)
672 abort ();
673 else if (GET_CODE (insn) != NOTE)
674 insn = flow_delete_insn (insn);
675 else
676 insn = NEXT_INSN (insn);
677 }
678 }
d7429b6a 679 insn = basic_block_head[i];
8329b5ec 680 if (GET_CODE (insn) != NOTE)
d7429b6a 681 {
8329b5ec 682 /* Turn the head into a deleted insn note. */
d7429b6a
RK
683 if (GET_CODE (insn) == BARRIER)
684 abort ();
8329b5ec
DE
685 PUT_CODE (insn, NOTE);
686 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
687 NOTE_SOURCE_FILE (insn) = 0;
688 }
689 insn = basic_block_end[i];
690 if (GET_CODE (insn) != NOTE)
691 {
692 /* Turn the tail into a deleted insn note. */
693 if (GET_CODE (insn) == BARRIER)
694 abort ();
695 PUT_CODE (insn, NOTE);
696 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
697 NOTE_SOURCE_FILE (insn) = 0;
d7429b6a 698 }
8329b5ec
DE
699 /* BARRIERs are between basic blocks, not part of one.
700 Delete a BARRIER if the preceding jump is deleted.
701 We cannot alter a BARRIER into a NOTE
702 because it is too short; but we can really delete
703 it because it is not part of a basic block. */
704 if (NEXT_INSN (insn) != 0
705 && GET_CODE (NEXT_INSN (insn)) == BARRIER)
706 delete_insn (NEXT_INSN (insn));
707
d7429b6a
RK
708 /* Each time we delete some basic blocks,
709 see if there is a jump around them that is
710 being turned into a no-op. If so, delete it. */
711
712 if (block_live[i - 1])
713 {
714 register int j;
8329b5ec 715 for (j = i + 1; j < n_basic_blocks; j++)
d7429b6a
RK
716 if (block_live[j])
717 {
718 rtx label;
719 insn = basic_block_end[i - 1];
720 if (GET_CODE (insn) == JUMP_INSN
721 /* An unconditional jump is the only possibility
722 we must check for, since a conditional one
723 would make these blocks live. */
724 && simplejump_p (insn)
725 && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1)
726 && INSN_UID (label) != 0
727 && BLOCK_NUM (label) == j)
728 {
729 PUT_CODE (insn, NOTE);
730 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
731 NOTE_SOURCE_FILE (insn) = 0;
732 if (GET_CODE (NEXT_INSN (insn)) != BARRIER)
733 abort ();
734 delete_insn (NEXT_INSN (insn));
735 }
736 break;
737 }
738 }
739 }
8329b5ec 740
9faa82d8 741 /* There are pathological cases where one function calling hundreds of
8329b5ec
DE
742 nested inline functions can generate lots and lots of unreachable
743 blocks that jump can't delete. Since we don't use sparse matrices
744 a lot of memory will be needed to compile such functions.
745 Implementing sparse matrices is a fair bit of work and it is not
746 clear that they win more than they lose (we don't want to
747 unnecessarily slow down compilation of normal code). By making
9faa82d8 748 another pass for the pathological case, we can greatly speed up
8329b5ec
DE
749 their compilation without hurting normal code. This works because
750 all the insns in the unreachable blocks have either been deleted or
49b6c81e
DE
751 turned into notes.
752 Note that we're talking about reducing memory usage by 10's of
753 megabytes and reducing compilation time by several minutes. */
8329b5ec
DE
754 /* ??? The choice of when to make another pass is a bit arbitrary,
755 and was derived from empirical data. */
756 if (pass == 1
49b6c81e 757 && deleted > 200)
8329b5ec
DE
758 {
759 pass++;
760 n_basic_blocks -= deleted;
2aec79e2
DE
761 /* `n_basic_blocks' may not be correct at this point: two previously
762 separate blocks may now be merged. That's ok though as we
763 recalculate it during the second pass. It certainly can't be
764 any larger than the current value. */
8329b5ec
DE
765 goto restart;
766 }
d7429b6a
RK
767 }
768}
769\f
8329b5ec
DE
770/* Subroutines of find_basic_blocks. */
771
fa5b4208
RK
772/* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is
773 not in the constant pool and not in the condition of an IF_THEN_ELSE. */
e658434c
RK
774
775static int
fa5b4208 776jmp_uses_reg_or_mem (x)
e658434c
RK
777 rtx x;
778{
779 enum rtx_code code = GET_CODE (x);
780 int i, j;
781 char *fmt;
782
fa5b4208
RK
783 switch (code)
784 {
785 case CONST:
786 case LABEL_REF:
787 case PC:
788 return 0;
789
790 case REG:
791 return 1;
792
793 case MEM:
794 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
795 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
796
797 case IF_THEN_ELSE:
798 return (jmp_uses_reg_or_mem (XEXP (x, 1))
799 || jmp_uses_reg_or_mem (XEXP (x, 2)));
800
801 case PLUS: case MINUS: case MULT:
802 return (jmp_uses_reg_or_mem (XEXP (x, 0))
803 || jmp_uses_reg_or_mem (XEXP (x, 1)));
804 }
e658434c
RK
805
806 fmt = GET_RTX_FORMAT (code);
807 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
808 {
809 if (fmt[i] == 'e'
fa5b4208 810 && jmp_uses_reg_or_mem (XEXP (x, i)))
e658434c
RK
811 return 1;
812
813 if (fmt[i] == 'E')
814 for (j = 0; j < XVECLEN (x, i); j++)
fa5b4208 815 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j)))
e658434c
RK
816 return 1;
817 }
818
819 return 0;
820}
8329b5ec 821
d7429b6a
RK
822/* Check expression X for label references;
823 if one is found, add INSN to the label's chain of references.
824
825 CHECKDUP means check for and avoid creating duplicate references
826 from the same insn. Such duplicates do no serious harm but
827 can slow life analysis. CHECKDUP is set only when duplicates
828 are likely. */
829
830static void
831mark_label_ref (x, insn, checkdup)
832 rtx x, insn;
833 int checkdup;
834{
835 register RTX_CODE code;
836 register int i;
837 register char *fmt;
838
839 /* We can be called with NULL when scanning label_value_list. */
840 if (x == 0)
841 return;
842
843 code = GET_CODE (x);
844 if (code == LABEL_REF)
845 {
846 register rtx label = XEXP (x, 0);
847 register rtx y;
848 if (GET_CODE (label) != CODE_LABEL)
849 abort ();
850 /* If the label was never emitted, this insn is junk,
851 but avoid a crash trying to refer to BLOCK_NUM (label).
852 This can happen as a result of a syntax error
853 and a diagnostic has already been printed. */
854 if (INSN_UID (label) == 0)
855 return;
856 CONTAINING_INSN (x) = insn;
857 /* if CHECKDUP is set, check for duplicate ref from same insn
858 and don't insert. */
859 if (checkdup)
860 for (y = LABEL_REFS (label); y != label; y = LABEL_NEXTREF (y))
861 if (CONTAINING_INSN (y) == insn)
862 return;
863 LABEL_NEXTREF (x) = LABEL_REFS (label);
864 LABEL_REFS (label) = x;
865 block_live_static[BLOCK_NUM (label)] = 1;
866 return;
867 }
868
869 fmt = GET_RTX_FORMAT (code);
870 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
871 {
872 if (fmt[i] == 'e')
873 mark_label_ref (XEXP (x, i), insn, 0);
874 if (fmt[i] == 'E')
875 {
876 register int j;
877 for (j = 0; j < XVECLEN (x, i); j++)
878 mark_label_ref (XVECEXP (x, i, j), insn, 1);
879 }
880 }
881}
8329b5ec
DE
882
883/* Delete INSN by patching it out.
884 Return the next insn. */
885
886static rtx
887flow_delete_insn (insn)
888 rtx insn;
889{
890 /* ??? For the moment we assume we don't have to watch for NULLs here
891 since the start/end of basic blocks aren't deleted like this. */
892 NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
893 PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
894 return NEXT_INSN (insn);
895}
d7429b6a
RK
896\f
897/* Determine which registers are live at the start of each
898 basic block of the function whose first insn is F.
899 NREGS is the number of registers used in F.
900 We allocate the vector basic_block_live_at_start
901 and the regsets that it points to, and fill them with the data.
902 regset_size and regset_bytes are also set here. */
903
904static void
905life_analysis (f, nregs)
906 rtx f;
907 int nregs;
908{
d7429b6a
RK
909 int first_pass;
910 int changed;
911 /* For each basic block, a bitmask of regs
912 live on exit from the block. */
913 regset *basic_block_live_at_end;
914 /* For each basic block, a bitmask of regs
915 live on entry to a successor-block of this block.
916 If this does not match basic_block_live_at_end,
917 that must be updated, and the block must be rescanned. */
918 regset *basic_block_new_live_at_end;
919 /* For each basic block, a bitmask of regs
920 whose liveness at the end of the basic block
921 can make a difference in which regs are live on entry to the block.
922 These are the regs that are set within the basic block,
923 possibly excluding those that are used after they are set. */
924 regset *basic_block_significant;
925 register int i;
926 rtx insn;
927
928 struct obstack flow_obstack;
929
930 gcc_obstack_init (&flow_obstack);
931
932 max_regno = nregs;
933
934 bzero (regs_ever_live, sizeof regs_ever_live);
935
936 /* Allocate and zero out many data structures
937 that will record the data from lifetime analysis. */
938
939 allocate_for_life_analysis ();
940
941 reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
4c9a05bc 942 bzero ((char *) reg_next_use, nregs * sizeof (rtx));
d7429b6a
RK
943
944 /* Set up several regset-vectors used internally within this function.
945 Their meanings are documented above, with their declarations. */
946
4c9a05bc
RK
947 basic_block_live_at_end
948 = (regset *) alloca (n_basic_blocks * sizeof (regset));
949
d7429b6a
RK
950 /* Don't use alloca since that leads to a crash rather than an error message
951 if there isn't enough space.
952 Don't use oballoc since we may need to allocate other things during
953 this function on the temporary obstack. */
7eb136d6
MM
954 init_regset_vector (basic_block_live_at_end, n_basic_blocks, regset_bytes,
955 &flow_obstack);
d7429b6a 956
4c9a05bc
RK
957 basic_block_new_live_at_end
958 = (regset *) alloca (n_basic_blocks * sizeof (regset));
7eb136d6
MM
959 init_regset_vector (basic_block_new_live_at_end, n_basic_blocks, regset_bytes,
960 &flow_obstack);
d7429b6a 961
4c9a05bc
RK
962 basic_block_significant
963 = (regset *) alloca (n_basic_blocks * sizeof (regset));
7eb136d6
MM
964 init_regset_vector (basic_block_significant, n_basic_blocks, regset_bytes,
965 &flow_obstack);
d7429b6a
RK
966
967 /* Record which insns refer to any volatile memory
968 or for any reason can't be deleted just because they are dead stores.
0f41302f 969 Also, delete any insns that copy a register to itself. */
d7429b6a
RK
970
971 for (insn = f; insn; insn = NEXT_INSN (insn))
972 {
973 enum rtx_code code1 = GET_CODE (insn);
974 if (code1 == CALL_INSN)
975 INSN_VOLATILE (insn) = 1;
976 else if (code1 == INSN || code1 == JUMP_INSN)
977 {
978 /* Delete (in effect) any obvious no-op moves. */
979 if (GET_CODE (PATTERN (insn)) == SET
980 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
981 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
db3cf6fb
MS
982 && (REGNO (SET_DEST (PATTERN (insn)))
983 == REGNO (SET_SRC (PATTERN (insn))))
d7429b6a 984 /* Insns carrying these notes are useful later on. */
5f4f0e22 985 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
d7429b6a
RK
986 {
987 PUT_CODE (insn, NOTE);
988 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
989 NOTE_SOURCE_FILE (insn) = 0;
990 }
ac684a20
JL
991 /* Delete (in effect) any obvious no-op moves. */
992 else if (GET_CODE (PATTERN (insn)) == SET
993 && GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG
994 && GET_CODE (SUBREG_REG (SET_DEST (PATTERN (insn)))) == REG
995 && GET_CODE (SET_SRC (PATTERN (insn))) == SUBREG
996 && GET_CODE (SUBREG_REG (SET_SRC (PATTERN (insn)))) == REG
db3cf6fb
MS
997 && (REGNO (SUBREG_REG (SET_DEST (PATTERN (insn))))
998 == REGNO (SUBREG_REG (SET_SRC (PATTERN (insn)))))
ac684a20
JL
999 && SUBREG_WORD (SET_DEST (PATTERN (insn))) ==
1000 SUBREG_WORD (SET_SRC (PATTERN (insn)))
1001 /* Insns carrying these notes are useful later on. */
1002 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
1003 {
1004 PUT_CODE (insn, NOTE);
1005 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1006 NOTE_SOURCE_FILE (insn) = 0;
1007 }
d7429b6a
RK
1008 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1009 {
1010 /* If nothing but SETs of registers to themselves,
1011 this insn can also be deleted. */
1012 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1013 {
1014 rtx tem = XVECEXP (PATTERN (insn), 0, i);
1015
1016 if (GET_CODE (tem) == USE
1017 || GET_CODE (tem) == CLOBBER)
1018 continue;
1019
1020 if (GET_CODE (tem) != SET
1021 || GET_CODE (SET_DEST (tem)) != REG
1022 || GET_CODE (SET_SRC (tem)) != REG
1023 || REGNO (SET_DEST (tem)) != REGNO (SET_SRC (tem)))
1024 break;
1025 }
1026
1027 if (i == XVECLEN (PATTERN (insn), 0)
1028 /* Insns carrying these notes are useful later on. */
5f4f0e22 1029 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
d7429b6a
RK
1030 {
1031 PUT_CODE (insn, NOTE);
1032 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1033 NOTE_SOURCE_FILE (insn) = 0;
1034 }
1035 else
1036 INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
1037 }
1038 else if (GET_CODE (PATTERN (insn)) != USE)
1039 INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
1040 /* A SET that makes space on the stack cannot be dead.
1041 (Such SETs occur only for allocating variable-size data,
1042 so they will always have a PLUS or MINUS according to the
1043 direction of stack growth.)
1044 Even if this function never uses this stack pointer value,
1045 signal handlers do! */
1046 else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET
1047 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1048#ifdef STACK_GROWS_DOWNWARD
1049 && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS
1050#else
1051 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1052#endif
1053 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx)
1054 INSN_VOLATILE (insn) = 1;
1055 }
1056 }
1057
1058 if (n_basic_blocks > 0)
1059#ifdef EXIT_IGNORE_STACK
1060 if (! EXIT_IGNORE_STACK
1061 || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer))
1062#endif
1063 {
1064 /* If exiting needs the right stack value,
1065 consider the stack pointer live at the end of the function. */
916b1701
MM
1066 SET_REGNO_REG_SET (basic_block_live_at_end[n_basic_blocks - 1],
1067 STACK_POINTER_REGNUM);
1068 SET_REGNO_REG_SET (basic_block_new_live_at_end[n_basic_blocks - 1],
1069 STACK_POINTER_REGNUM);
d7429b6a
RK
1070 }
1071
fe0f9c4b
RK
1072 /* Mark the frame pointer is needed at the end of the function. If
1073 we end up eliminating it, it will be removed from the live list
1074 of each basic block by reload. */
1075
1076 if (n_basic_blocks > 0)
1077 {
916b1701
MM
1078 SET_REGNO_REG_SET (basic_block_live_at_end[n_basic_blocks - 1],
1079 FRAME_POINTER_REGNUM);
1080 SET_REGNO_REG_SET (basic_block_new_live_at_end[n_basic_blocks - 1],
1081 FRAME_POINTER_REGNUM);
73a187c1
DE
1082#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1083 /* If they are different, also mark the hard frame pointer as live */
916b1701
MM
1084 SET_REGNO_REG_SET (basic_block_live_at_end[n_basic_blocks - 1],
1085 HARD_FRAME_POINTER_REGNUM);
1086 SET_REGNO_REG_SET (basic_block_new_live_at_end[n_basic_blocks - 1],
1087 HARD_FRAME_POINTER_REGNUM);
73a187c1 1088#endif
fe0f9c4b
RK
1089 }
1090
632c9d9e
MS
1091 /* Mark all global registers and all registers used by the epilogue
1092 as being live at the end of the function since they may be
1093 referenced by our caller. */
d7429b6a
RK
1094
1095 if (n_basic_blocks > 0)
1096 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
632c9d9e
MS
1097 if (global_regs[i]
1098#ifdef EPILOGUE_USES
1099 || EPILOGUE_USES (i)
1100#endif
1101 )
d7429b6a 1102 {
916b1701
MM
1103 SET_REGNO_REG_SET (basic_block_live_at_end[n_basic_blocks - 1], i);
1104 SET_REGNO_REG_SET (basic_block_new_live_at_end[n_basic_blocks - 1], i);
d7429b6a
RK
1105 }
1106
1107 /* Propagate life info through the basic blocks
1108 around the graph of basic blocks.
1109
1110 This is a relaxation process: each time a new register
1111 is live at the end of the basic block, we must scan the block
1112 to determine which registers are, as a consequence, live at the beginning
1113 of that block. These registers must then be marked live at the ends
1114 of all the blocks that can transfer control to that block.
1115 The process continues until it reaches a fixed point. */
1116
1117 first_pass = 1;
1118 changed = 1;
1119 while (changed)
1120 {
1121 changed = 0;
1122 for (i = n_basic_blocks - 1; i >= 0; i--)
1123 {
1124 int consider = first_pass;
1125 int must_rescan = first_pass;
1126 register int j;
1127
1128 if (!first_pass)
1129 {
1130 /* Set CONSIDER if this block needs thinking about at all
1131 (that is, if the regs live now at the end of it
1132 are not the same as were live at the end of it when
1133 we last thought about it).
1134 Set must_rescan if it needs to be thought about
1135 instruction by instruction (that is, if any additional
1136 reg that is live at the end now but was not live there before
1137 is one of the significant regs of this basic block). */
1138
916b1701
MM
1139 EXECUTE_IF_AND_COMPL_IN_REG_SET (basic_block_new_live_at_end[i],
1140 basic_block_live_at_end[i],
1141 0, j,
1142 {
1143 consider = 1;
1144 if (REGNO_REG_SET_P (basic_block_significant[i], j))
1145 {
1146 must_rescan = 1;
1147 goto done;
1148 }
1149 });
1150 done:
d7429b6a
RK
1151 if (! consider)
1152 continue;
1153 }
1154
1155 /* The live_at_start of this block may be changing,
1156 so another pass will be required after this one. */
1157 changed = 1;
1158
1159 if (! must_rescan)
1160 {
1161 /* No complete rescan needed;
1162 just record those variables newly known live at end
1163 as live at start as well. */
916b1701
MM
1164 IOR_AND_COMPL_REG_SET (basic_block_live_at_start[i],
1165 basic_block_new_live_at_end[i],
1166 basic_block_live_at_end[i]);
1167
1168 IOR_AND_COMPL_REG_SET (basic_block_live_at_end[i],
1169 basic_block_new_live_at_end[i],
1170 basic_block_live_at_end[i]);
d7429b6a
RK
1171 }
1172 else
1173 {
1174 /* Update the basic_block_live_at_start
1175 by propagation backwards through the block. */
916b1701
MM
1176 COPY_REG_SET (basic_block_live_at_end[i],
1177 basic_block_new_live_at_end[i]);
1178 COPY_REG_SET (basic_block_live_at_start[i],
1179 basic_block_live_at_end[i]);
d7429b6a
RK
1180 propagate_block (basic_block_live_at_start[i],
1181 basic_block_head[i], basic_block_end[i], 0,
5f4f0e22
CH
1182 first_pass ? basic_block_significant[i]
1183 : (regset) 0,
d7429b6a
RK
1184 i);
1185 }
1186
1187 {
1188 register rtx jump, head;
af14ce9c 1189
d7429b6a
RK
1190 /* Update the basic_block_new_live_at_end's of the block
1191 that falls through into this one (if any). */
1192 head = basic_block_head[i];
d7429b6a 1193 if (basic_block_drops_in[i])
916b1701
MM
1194 IOR_REG_SET (basic_block_new_live_at_end[i-1],
1195 basic_block_live_at_start[i]);
af14ce9c 1196
d7429b6a
RK
1197 /* Update the basic_block_new_live_at_end's of
1198 all the blocks that jump to this one. */
1199 if (GET_CODE (head) == CODE_LABEL)
1200 for (jump = LABEL_REFS (head);
1201 jump != head;
1202 jump = LABEL_NEXTREF (jump))
1203 {
1204 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
916b1701
MM
1205 IOR_REG_SET (basic_block_new_live_at_end[from_block],
1206 basic_block_live_at_start[i]);
d7429b6a
RK
1207 }
1208 }
1209#ifdef USE_C_ALLOCA
1210 alloca (0);
1211#endif
1212 }
1213 first_pass = 0;
1214 }
1215
1216 /* The only pseudos that are live at the beginning of the function are
1217 those that were not set anywhere in the function. local-alloc doesn't
1218 know how to handle these correctly, so mark them as not local to any
1219 one basic block. */
1220
1221 if (n_basic_blocks > 0)
916b1701
MM
1222 EXECUTE_IF_SET_IN_REG_SET (basic_block_live_at_start[0],
1223 FIRST_PSEUDO_REGISTER, i,
1224 {
1225 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
1226 });
d7429b6a
RK
1227
1228 /* Now the life information is accurate.
1229 Make one more pass over each basic block
1230 to delete dead stores, create autoincrement addressing
1231 and record how many times each register is used, is set, or dies.
1232
1233 To save time, we operate directly in basic_block_live_at_end[i],
1234 thus destroying it (in fact, converting it into a copy of
1235 basic_block_live_at_start[i]). This is ok now because
1236 basic_block_live_at_end[i] is no longer used past this point. */
1237
1238 max_scratch = 0;
1239
1240 for (i = 0; i < n_basic_blocks; i++)
1241 {
1242 propagate_block (basic_block_live_at_end[i],
5f4f0e22
CH
1243 basic_block_head[i], basic_block_end[i], 1,
1244 (regset) 0, i);
d7429b6a
RK
1245#ifdef USE_C_ALLOCA
1246 alloca (0);
1247#endif
1248 }
1249
1250#if 0
1251 /* Something live during a setjmp should not be put in a register
1252 on certain machines which restore regs from stack frames
1253 rather than from the jmpbuf.
1254 But we don't need to do this for the user's variables, since
1255 ANSI says only volatile variables need this. */
1256#ifdef LONGJMP_RESTORE_FROM_STACK
916b1701
MM
1257 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
1258 FIRST_PSEUDO_REGISTER, i,
1259 {
1260 if (regno_reg_rtx[i] != 0
1261 && ! REG_USERVAR_P (regno_reg_rtx[i]))
1262 {
1263 REG_LIVE_LENGTH (i) = -1;
1264 REG_BASIC_BLOCK (i) = -1;
1265 }
1266 });
d7429b6a
RK
1267#endif
1268#endif
1269
1270 /* We have a problem with any pseudoreg that
1271 lives across the setjmp. ANSI says that if a
1272 user variable does not change in value
1273 between the setjmp and the longjmp, then the longjmp preserves it.
1274 This includes longjmp from a place where the pseudo appears dead.
1275 (In principle, the value still exists if it is in scope.)
1276 If the pseudo goes in a hard reg, some other value may occupy
1277 that hard reg where this pseudo is dead, thus clobbering the pseudo.
1278 Conclusion: such a pseudo must not go in a hard reg. */
916b1701
MM
1279 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
1280 FIRST_PSEUDO_REGISTER, i,
1281 {
1282 if (regno_reg_rtx[i] != 0)
1283 {
1284 REG_LIVE_LENGTH (i) = -1;
1285 REG_BASIC_BLOCK (i) = -1;
1286 }
1287 });
d7429b6a 1288
5f4f0e22 1289 obstack_free (&flow_obstack, NULL_PTR);
d7429b6a
RK
1290}
1291\f
1292/* Subroutines of life analysis. */
1293
1294/* Allocate the permanent data structures that represent the results
1295 of life analysis. Not static since used also for stupid life analysis. */
1296
1297void
1298allocate_for_life_analysis ()
1299{
1300 register int i;
d7429b6a
RK
1301
1302 regset_size = ((max_regno + REGSET_ELT_BITS - 1) / REGSET_ELT_BITS);
0f41302f 1303 regset_bytes = regset_size * sizeof (*(regset) 0);
d7429b6a 1304
b1f21e0a
MM
1305 /* Because both reg_scan and flow_analysis want to set up the REG_N_SETS
1306 information, explicitly reset it here. The allocation should have
1307 already happened on the previous reg_scan pass. Make sure in case
1308 some more registers were allocated. */
39379e67 1309 allocate_reg_info (max_regno, FALSE, FALSE);
d7429b6a 1310
d7429b6a 1311 for (i = 0; i < max_regno; i++)
b1f21e0a 1312 REG_N_SETS (i) = 0;
d7429b6a 1313
4c9a05bc
RK
1314 basic_block_live_at_start
1315 = (regset *) oballoc (n_basic_blocks * sizeof (regset));
7eb136d6
MM
1316 init_regset_vector (basic_block_live_at_start, n_basic_blocks, regset_bytes,
1317 function_obstack);
d7429b6a 1318
7eb136d6
MM
1319 regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (function_obstack);
1320 CLEAR_REG_SET (regs_live_at_setjmp);
d7429b6a
RK
1321}
1322
1323/* Make each element of VECTOR point at a regset,
1324 taking the space for all those regsets from SPACE.
1325 SPACE is of type regset, but it is really as long as NELTS regsets.
1326 BYTES_PER_ELT is the number of bytes in one regset. */
1327
1328static void
7eb136d6 1329init_regset_vector (vector, nelts, bytes_per_elt, alloc_obstack)
d7429b6a 1330 regset *vector;
d7429b6a
RK
1331 int nelts;
1332 int bytes_per_elt;
7eb136d6 1333 struct obstack *alloc_obstack;
d7429b6a
RK
1334{
1335 register int i;
d7429b6a
RK
1336
1337 for (i = 0; i < nelts; i++)
1338 {
7eb136d6
MM
1339 vector[i] = OBSTACK_ALLOC_REG_SET (alloc_obstack);
1340 CLEAR_REG_SET (vector[i]);
d7429b6a
RK
1341 }
1342}
e658434c 1343
d7429b6a
RK
1344/* Compute the registers live at the beginning of a basic block
1345 from those live at the end.
1346
1347 When called, OLD contains those live at the end.
1348 On return, it contains those live at the beginning.
1349 FIRST and LAST are the first and last insns of the basic block.
1350
1351 FINAL is nonzero if we are doing the final pass which is not
1352 for computing the life info (since that has already been done)
1353 but for acting on it. On this pass, we delete dead stores,
1354 set up the logical links and dead-variables lists of instructions,
1355 and merge instructions for autoincrement and autodecrement addresses.
1356
1357 SIGNIFICANT is nonzero only the first time for each basic block.
1358 If it is nonzero, it points to a regset in which we store
1359 a 1 for each register that is set within the block.
1360
1361 BNUM is the number of the basic block. */
1362
1363static void
1364propagate_block (old, first, last, final, significant, bnum)
1365 register regset old;
1366 rtx first;
1367 rtx last;
1368 int final;
1369 regset significant;
1370 int bnum;
1371{
1372 register rtx insn;
1373 rtx prev;
1374 regset live;
1375 regset dead;
1376
1377 /* The following variables are used only if FINAL is nonzero. */
1378 /* This vector gets one element for each reg that has been live
1379 at any point in the basic block that has been scanned so far.
916b1701
MM
1380 SOMETIMES_MAX says how many elements are in use so far. */
1381 register int *regs_sometimes_live;
d7429b6a
RK
1382 int sometimes_max = 0;
1383 /* This regset has 1 for each reg that we have seen live so far.
1384 It and REGS_SOMETIMES_LIVE are updated together. */
1385 regset maxlive;
1386
1387 /* The loop depth may change in the middle of a basic block. Since we
1388 scan from end to beginning, we start with the depth at the end of the
1389 current basic block, and adjust as we pass ends and starts of loops. */
1390 loop_depth = basic_block_loop_depth[bnum];
1391
7eb136d6
MM
1392 dead = ALLOCA_REG_SET ();
1393 live = ALLOCA_REG_SET ();
d7429b6a
RK
1394
1395 cc0_live = 0;
1396 last_mem_set = 0;
1397
1398 /* Include any notes at the end of the block in the scan.
1399 This is in case the block ends with a call to setjmp. */
1400
1401 while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE)
1402 {
1403 /* Look for loop boundaries, we are going forward here. */
1404 last = NEXT_INSN (last);
1405 if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG)
1406 loop_depth++;
1407 else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END)
1408 loop_depth--;
1409 }
1410
1411 if (final)
1412 {
916b1701 1413 register int i;
d7429b6a
RK
1414
1415 num_scratch = 0;
7eb136d6 1416 maxlive = ALLOCA_REG_SET ();
916b1701
MM
1417 COPY_REG_SET (maxlive, old);
1418 regs_sometimes_live = (int *) alloca (max_regno * sizeof (int));
d7429b6a
RK
1419
1420 /* Process the regs live at the end of the block.
1421 Enter them in MAXLIVE and REGS_SOMETIMES_LIVE.
916b1701
MM
1422 Also mark them as not local to any one basic block. */
1423 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
1424 {
1425 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
1426 regs_sometimes_live[sometimes_max] = i;
1427 sometimes_max++;
1428 });
d7429b6a
RK
1429 }
1430
1431 /* Scan the block an insn at a time from end to beginning. */
1432
1433 for (insn = last; ; insn = prev)
1434 {
1435 prev = PREV_INSN (insn);
1436
8329b5ec 1437 if (GET_CODE (insn) == NOTE)
d7429b6a 1438 {
8329b5ec
DE
1439 /* Look for loop boundaries, remembering that we are going
1440 backwards. */
1441 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1442 loop_depth++;
1443 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1444 loop_depth--;
1445
1446 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
1447 Abort now rather than setting register status incorrectly. */
1448 if (loop_depth == 0)
1449 abort ();
1450
1451 /* If this is a call to `setjmp' et al,
1452 warn if any non-volatile datum is live. */
1453
1454 if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
916b1701 1455 IOR_REG_SET (regs_live_at_setjmp, old);
d7429b6a
RK
1456 }
1457
1458 /* Update the life-status of regs for this insn.
1459 First DEAD gets which regs are set in this insn
1460 then LIVE gets which regs are used in this insn.
1461 Then the regs live before the insn
1462 are those live after, with DEAD regs turned off,
1463 and then LIVE regs turned on. */
1464
8329b5ec 1465 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
d7429b6a
RK
1466 {
1467 register int i;
5f4f0e22 1468 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
d7429b6a
RK
1469 int insn_is_dead
1470 = (insn_dead_p (PATTERN (insn), old, 0)
1471 /* Don't delete something that refers to volatile storage! */
1472 && ! INSN_VOLATILE (insn));
1473 int libcall_is_dead
1474 = (insn_is_dead && note != 0
1475 && libcall_dead_p (PATTERN (insn), old, note, insn));
1476
1477 /* If an instruction consists of just dead store(s) on final pass,
1478 "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
1479 We could really delete it with delete_insn, but that
1480 can cause trouble for first or last insn in a basic block. */
1481 if (final && insn_is_dead)
1482 {
1483 PUT_CODE (insn, NOTE);
1484 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1485 NOTE_SOURCE_FILE (insn) = 0;
1486
e5df1ea3
RK
1487 /* CC0 is now known to be dead. Either this insn used it,
1488 in which case it doesn't anymore, or clobbered it,
1489 so the next insn can't use it. */
1490 cc0_live = 0;
1491
d7429b6a
RK
1492 /* If this insn is copying the return value from a library call,
1493 delete the entire library call. */
1494 if (libcall_is_dead)
1495 {
1496 rtx first = XEXP (note, 0);
1497 rtx p = insn;
1498 while (INSN_DELETED_P (first))
1499 first = NEXT_INSN (first);
1500 while (p != first)
1501 {
1502 p = PREV_INSN (p);
1503 PUT_CODE (p, NOTE);
1504 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
1505 NOTE_SOURCE_FILE (p) = 0;
1506 }
1507 }
1508 goto flushed;
1509 }
1510
916b1701
MM
1511 CLEAR_REG_SET (dead);
1512 CLEAR_REG_SET (live);
d7429b6a
RK
1513
1514 /* See if this is an increment or decrement that can be
1515 merged into a following memory address. */
1516#ifdef AUTO_INC_DEC
1517 {
1518 register rtx x = PATTERN (insn);
1519 /* Does this instruction increment or decrement a register? */
1520 if (final && GET_CODE (x) == SET
1521 && GET_CODE (SET_DEST (x)) == REG
1522 && (GET_CODE (SET_SRC (x)) == PLUS
1523 || GET_CODE (SET_SRC (x)) == MINUS)
1524 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
1525 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1526 /* Ok, look for a following memory ref we can combine with.
1527 If one is found, change the memory ref to a PRE_INC
1528 or PRE_DEC, cancel this insn, and return 1.
1529 Return 0 if nothing has been done. */
1530 && try_pre_increment_1 (insn))
1531 goto flushed;
1532 }
1533#endif /* AUTO_INC_DEC */
1534
1535 /* If this is not the final pass, and this insn is copying the
1536 value of a library call and it's dead, don't scan the
1537 insns that perform the library call, so that the call's
1538 arguments are not marked live. */
1539 if (libcall_is_dead)
1540 {
1541 /* Mark the dest reg as `significant'. */
5f4f0e22 1542 mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant);
d7429b6a
RK
1543
1544 insn = XEXP (note, 0);
1545 prev = PREV_INSN (insn);
1546 }
1547 else if (GET_CODE (PATTERN (insn)) == SET
1548 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1549 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1550 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
1551 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
1552 /* We have an insn to pop a constant amount off the stack.
1553 (Such insns use PLUS regardless of the direction of the stack,
1554 and any insn to adjust the stack by a constant is always a pop.)
1555 These insns, if not dead stores, have no effect on life. */
1556 ;
1557 else
1558 {
1559 /* LIVE gets the regs used in INSN;
1560 DEAD gets those set by it. Dead insns don't make anything
1561 live. */
1562
5f4f0e22
CH
1563 mark_set_regs (old, dead, PATTERN (insn),
1564 final ? insn : NULL_RTX, significant);
d7429b6a
RK
1565
1566 /* If an insn doesn't use CC0, it becomes dead since we
1567 assume that every insn clobbers it. So show it dead here;
1568 mark_used_regs will set it live if it is referenced. */
1569 cc0_live = 0;
1570
1571 if (! insn_is_dead)
1572 mark_used_regs (old, live, PATTERN (insn), final, insn);
1573
1574 /* Sometimes we may have inserted something before INSN (such as
1575 a move) when we make an auto-inc. So ensure we will scan
1576 those insns. */
1577#ifdef AUTO_INC_DEC
1578 prev = PREV_INSN (insn);
1579#endif
1580
1581 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
1582 {
1583 register int i;
1584
6b67ec08
RK
1585 rtx note;
1586
1587 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1588 note;
1589 note = XEXP (note, 1))
1590 if (GET_CODE (XEXP (note, 0)) == USE)
1591 mark_used_regs (old, live, SET_DEST (XEXP (note, 0)),
1592 final, insn);
1593
d7429b6a 1594 /* Each call clobbers all call-clobbered regs that are not
e4329280 1595 global or fixed. Note that the function-value reg is a
d7429b6a
RK
1596 call-clobbered reg, and mark_set_regs has already had
1597 a chance to handle it. */
1598
1599 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e4329280
RK
1600 if (call_used_regs[i] && ! global_regs[i]
1601 && ! fixed_regs[i])
916b1701 1602 SET_REGNO_REG_SET (dead, i);
d7429b6a
RK
1603
1604 /* The stack ptr is used (honorarily) by a CALL insn. */
916b1701 1605 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
1606
1607 /* Calls may also reference any of the global registers,
1608 so they are made live. */
d7429b6a
RK
1609 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1610 if (global_regs[i])
9b316aa2
RK
1611 mark_used_regs (old, live,
1612 gen_rtx (REG, reg_raw_mode[i], i),
1613 final, insn);
d7429b6a
RK
1614
1615 /* Calls also clobber memory. */
1616 last_mem_set = 0;
1617 }
1618
1619 /* Update OLD for the registers used or set. */
916b1701
MM
1620 AND_COMPL_REG_SET (old, dead);
1621 IOR_REG_SET (old, live);
d7429b6a
RK
1622
1623 if (GET_CODE (insn) == CALL_INSN && final)
1624 {
1625 /* Any regs live at the time of a call instruction
1626 must not go in a register clobbered by calls.
1627 Find all regs now live and record this for them. */
1628
916b1701 1629 register int *p = regs_sometimes_live;
d7429b6a
RK
1630
1631 for (i = 0; i < sometimes_max; i++, p++)
916b1701
MM
1632 if (REGNO_REG_SET_P (old, *p))
1633 REG_N_CALLS_CROSSED (*p)++;
d7429b6a
RK
1634 }
1635 }
1636
1637 /* On final pass, add any additional sometimes-live regs
1638 into MAXLIVE and REGS_SOMETIMES_LIVE.
1639 Also update counts of how many insns each reg is live at. */
1640
1641 if (final)
1642 {
916b1701
MM
1643 register int regno;
1644 register int *p;
d7429b6a 1645
916b1701
MM
1646 EXECUTE_IF_AND_COMPL_IN_REG_SET (live, maxlive, 0, regno,
1647 {
1648 regs_sometimes_live[sometimes_max++] = regno;
1649 SET_REGNO_REG_SET (maxlive, regno);
1650 });
d7429b6a 1651
916b1701
MM
1652 p = regs_sometimes_live;
1653 for (i = 0; i < sometimes_max; i++)
1654 {
1655 regno = *p++;
1656 if (REGNO_REG_SET_P (old, regno))
1657 REG_LIVE_LENGTH (regno)++;
1658 }
d7429b6a
RK
1659 }
1660 }
1661 flushed: ;
1662 if (insn == first)
1663 break;
1664 }
1665
1666 if (num_scratch > max_scratch)
1667 max_scratch = num_scratch;
1668}
1669\f
1670/* Return 1 if X (the body of an insn, or part of it) is just dead stores
1671 (SET expressions whose destinations are registers dead after the insn).
1672 NEEDED is the regset that says which regs are alive after the insn.
1673
1674 Unless CALL_OK is non-zero, an insn is needed if it contains a CALL. */
1675
1676static int
1677insn_dead_p (x, needed, call_ok)
1678 rtx x;
1679 regset needed;
1680 int call_ok;
1681{
1682 register RTX_CODE code = GET_CODE (x);
1683 /* If setting something that's a reg or part of one,
1684 see if that register's altered value will be live. */
1685
1686 if (code == SET)
1687 {
1688 register rtx r = SET_DEST (x);
1689 /* A SET that is a subroutine call cannot be dead. */
1690 if (! call_ok && GET_CODE (SET_SRC (x)) == CALL)
1691 return 0;
1692
1693#ifdef HAVE_cc0
1694 if (GET_CODE (r) == CC0)
1695 return ! cc0_live;
1696#endif
1697
1698 if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r)
1699 && rtx_equal_p (r, last_mem_set))
1700 return 1;
1701
1702 while (GET_CODE (r) == SUBREG
1703 || GET_CODE (r) == STRICT_LOW_PART
1704 || GET_CODE (r) == ZERO_EXTRACT
1705 || GET_CODE (r) == SIGN_EXTRACT)
1706 r = SUBREG_REG (r);
1707
1708 if (GET_CODE (r) == REG)
1709 {
1710 register int regno = REGNO (r);
d7429b6a 1711
d8c8b8e3 1712 /* Don't delete insns to set global regs. */
d7429b6a
RK
1713 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1714 /* Make sure insns to set frame pointer aren't deleted. */
1715 || regno == FRAME_POINTER_REGNUM
73a187c1
DE
1716#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1717 || regno == HARD_FRAME_POINTER_REGNUM
1718#endif
d7e4fe8b
RS
1719#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1720 /* Make sure insns to set arg pointer are never deleted
1721 (if the arg pointer isn't fixed, there will be a USE for
0f41302f 1722 it, so we can treat it normally). */
d7e4fe8b
RS
1723 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
1724#endif
916b1701 1725 || REGNO_REG_SET_P (needed, regno))
d7429b6a
RK
1726 return 0;
1727
1728 /* If this is a hard register, verify that subsequent words are
1729 not needed. */
1730 if (regno < FIRST_PSEUDO_REGISTER)
1731 {
1732 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
1733
1734 while (--n > 0)
916b1701 1735 if (REGNO_REG_SET_P (needed, regno+n))
d7429b6a
RK
1736 return 0;
1737 }
1738
1739 return 1;
1740 }
1741 }
1742 /* If performing several activities,
1743 insn is dead if each activity is individually dead.
1744 Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
1745 that's inside a PARALLEL doesn't make the insn worth keeping. */
1746 else if (code == PARALLEL)
1747 {
1748 register int i = XVECLEN (x, 0);
1749 for (i--; i >= 0; i--)
1750 {
1751 rtx elt = XVECEXP (x, 0, i);
1752 if (!insn_dead_p (elt, needed, call_ok)
1753 && GET_CODE (elt) != CLOBBER
1754 && GET_CODE (elt) != USE)
1755 return 0;
1756 }
1757 return 1;
1758 }
1759 /* We do not check CLOBBER or USE here.
1760 An insn consisting of just a CLOBBER or just a USE
1761 should not be deleted. */
1762 return 0;
1763}
1764
1765/* If X is the pattern of the last insn in a libcall, and assuming X is dead,
1766 return 1 if the entire library call is dead.
1767 This is true if X copies a register (hard or pseudo)
1768 and if the hard return reg of the call insn is dead.
1769 (The caller should have tested the destination of X already for death.)
1770
1771 If this insn doesn't just copy a register, then we don't
1772 have an ordinary libcall. In that case, cse could not have
1773 managed to substitute the source for the dest later on,
1774 so we can assume the libcall is dead.
1775
1776 NEEDED is the bit vector of pseudoregs live before this insn.
1777 NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */
1778
1779static int
1780libcall_dead_p (x, needed, note, insn)
1781 rtx x;
1782 regset needed;
1783 rtx note;
1784 rtx insn;
1785{
1786 register RTX_CODE code = GET_CODE (x);
1787
1788 if (code == SET)
1789 {
1790 register rtx r = SET_SRC (x);
1791 if (GET_CODE (r) == REG)
1792 {
1793 rtx call = XEXP (note, 0);
1794 register int i;
1795
1796 /* Find the call insn. */
1797 while (call != insn && GET_CODE (call) != CALL_INSN)
1798 call = NEXT_INSN (call);
1799
1800 /* If there is none, do nothing special,
1801 since ordinary death handling can understand these insns. */
1802 if (call == insn)
1803 return 0;
1804
1805 /* See if the hard reg holding the value is dead.
1806 If this is a PARALLEL, find the call within it. */
1807 call = PATTERN (call);
1808 if (GET_CODE (call) == PARALLEL)
1809 {
1810 for (i = XVECLEN (call, 0) - 1; i >= 0; i--)
1811 if (GET_CODE (XVECEXP (call, 0, i)) == SET
1812 && GET_CODE (SET_SRC (XVECEXP (call, 0, i))) == CALL)
1813 break;
1814
761a5bcd
JW
1815 /* This may be a library call that is returning a value
1816 via invisible pointer. Do nothing special, since
1817 ordinary death handling can understand these insns. */
d7429b6a 1818 if (i < 0)
761a5bcd 1819 return 0;
d7429b6a
RK
1820
1821 call = XVECEXP (call, 0, i);
1822 }
1823
1824 return insn_dead_p (call, needed, 1);
1825 }
1826 }
1827 return 1;
1828}
1829
1830/* Return 1 if register REGNO was used before it was set.
944e5f77 1831 In other words, if it is live at function entry.
6a45254e
RK
1832 Don't count global register variables or variables in registers
1833 that can be used for function arg passing, though. */
d7429b6a
RK
1834
1835int
1836regno_uninitialized (regno)
1837 int regno;
1838{
b0b7b46a 1839 if (n_basic_blocks == 0
6a45254e
RK
1840 || (regno < FIRST_PSEUDO_REGISTER
1841 && (global_regs[regno] || FUNCTION_ARG_REGNO_P (regno))))
d7429b6a
RK
1842 return 0;
1843
916b1701 1844 return REGNO_REG_SET_P (basic_block_live_at_start[0], regno);
d7429b6a
RK
1845}
1846
1847/* 1 if register REGNO was alive at a place where `setjmp' was called
1848 and was set more than once or is an argument.
1849 Such regs may be clobbered by `longjmp'. */
1850
1851int
1852regno_clobbered_at_setjmp (regno)
1853 int regno;
1854{
1855 if (n_basic_blocks == 0)
1856 return 0;
1857
b1f21e0a 1858 return ((REG_N_SETS (regno) > 1
916b1701
MM
1859 || REGNO_REG_SET_P (basic_block_live_at_start[0], regno))
1860 && REGNO_REG_SET_P (regs_live_at_setjmp, regno));
d7429b6a
RK
1861}
1862\f
1863/* Process the registers that are set within X.
1864 Their bits are set to 1 in the regset DEAD,
1865 because they are dead prior to this insn.
1866
1867 If INSN is nonzero, it is the insn being processed
1868 and the fact that it is nonzero implies this is the FINAL pass
1869 in propagate_block. In this case, various info about register
1870 usage is stored, LOG_LINKS fields of insns are set up. */
1871
d7429b6a
RK
1872static void
1873mark_set_regs (needed, dead, x, insn, significant)
1874 regset needed;
1875 regset dead;
1876 rtx x;
1877 rtx insn;
1878 regset significant;
1879{
1880 register RTX_CODE code = GET_CODE (x);
1881
1882 if (code == SET || code == CLOBBER)
1883 mark_set_1 (needed, dead, x, insn, significant);
1884 else if (code == PARALLEL)
1885 {
1886 register int i;
1887 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1888 {
1889 code = GET_CODE (XVECEXP (x, 0, i));
1890 if (code == SET || code == CLOBBER)
1891 mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
1892 }
1893 }
1894}
1895
1896/* Process a single SET rtx, X. */
1897
1898static void
1899mark_set_1 (needed, dead, x, insn, significant)
1900 regset needed;
1901 regset dead;
1902 rtx x;
1903 rtx insn;
1904 regset significant;
1905{
1906 register int regno;
1907 register rtx reg = SET_DEST (x);
1908
1909 /* Modifying just one hardware register of a multi-reg value
1910 or just a byte field of a register
1911 does not mean the value from before this insn is now dead.
1912 But it does mean liveness of that register at the end of the block
1913 is significant.
1914
1915 Within mark_set_1, however, we treat it as if the register is
1916 indeed modified. mark_used_regs will, however, also treat this
1917 register as being used. Thus, we treat these insns as setting a
1918 new value for the register as a function of its old value. This
1919 cases LOG_LINKS to be made appropriately and this will help combine. */
1920
1921 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
1922 || GET_CODE (reg) == SIGN_EXTRACT
1923 || GET_CODE (reg) == STRICT_LOW_PART)
1924 reg = XEXP (reg, 0);
1925
1926 /* If we are writing into memory or into a register mentioned in the
1927 address of the last thing stored into memory, show we don't know
1928 what the last store was. If we are writing memory, save the address
1929 unless it is volatile. */
1930 if (GET_CODE (reg) == MEM
1931 || (GET_CODE (reg) == REG
1932 && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set)))
1933 last_mem_set = 0;
1934
1935 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
1936 /* There are no REG_INC notes for SP, so we can't assume we'll see
1937 everything that invalidates it. To be safe, don't eliminate any
1938 stores though SP; none of them should be redundant anyway. */
1939 && ! reg_mentioned_p (stack_pointer_rtx, reg))
1940 last_mem_set = reg;
1941
1942 if (GET_CODE (reg) == REG
1943 && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
1944#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1945 && regno != HARD_FRAME_POINTER_REGNUM
1946#endif
d7e4fe8b
RS
1947#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1948 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
1949#endif
d7429b6a
RK
1950 && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
1951 /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
1952 {
916b1701
MM
1953 int some_needed = REGNO_REG_SET_P (needed, regno);
1954 int some_not_needed = ! some_needed;
d7429b6a
RK
1955
1956 /* Mark it as a significant register for this basic block. */
1957 if (significant)
916b1701 1958 SET_REGNO_REG_SET (significant, regno);
d7429b6a
RK
1959
1960 /* Mark it as as dead before this insn. */
916b1701 1961 SET_REGNO_REG_SET (dead, regno);
d7429b6a
RK
1962
1963 /* A hard reg in a wide mode may really be multiple registers.
1964 If so, mark all of them just like the first. */
1965 if (regno < FIRST_PSEUDO_REGISTER)
1966 {
1967 int n;
1968
1969 /* Nothing below is needed for the stack pointer; get out asap.
1970 Eg, log links aren't needed, since combine won't use them. */
1971 if (regno == STACK_POINTER_REGNUM)
1972 return;
1973
1974 n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1975 while (--n > 0)
1976 {
916b1701
MM
1977 int regno_n = regno + n;
1978 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
d7429b6a 1979 if (significant)
916b1701 1980 SET_REGNO_REG_SET (significant, regno_n);
cb9e8ad1 1981
916b1701
MM
1982 SET_REGNO_REG_SET (dead, regno_n);
1983 some_needed |= needed_regno;
1984 some_not_needed |= ! needed_regno;
d7429b6a
RK
1985 }
1986 }
1987 /* Additional data to record if this is the final pass. */
1988 if (insn)
1989 {
1990 register rtx y = reg_next_use[regno];
1991 register int blocknum = BLOCK_NUM (insn);
1992
1993 /* If this is a hard reg, record this function uses the reg. */
1994
1995 if (regno < FIRST_PSEUDO_REGISTER)
1996 {
1997 register int i;
1998 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1999
2000 for (i = regno; i < endregno; i++)
2001 {
93514916
JW
2002 /* The next use is no longer "next", since a store
2003 intervenes. */
2004 reg_next_use[i] = 0;
2005
d7429b6a 2006 regs_ever_live[i] = 1;
b1f21e0a 2007 REG_N_SETS (i)++;
d7429b6a
RK
2008 }
2009 }
2010 else
2011 {
93514916
JW
2012 /* The next use is no longer "next", since a store
2013 intervenes. */
2014 reg_next_use[regno] = 0;
2015
d7429b6a
RK
2016 /* Keep track of which basic blocks each reg appears in. */
2017
b1f21e0a
MM
2018 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
2019 REG_BASIC_BLOCK (regno) = blocknum;
2020 else if (REG_BASIC_BLOCK (regno) != blocknum)
2021 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
2022
2023 /* Count (weighted) references, stores, etc. This counts a
2024 register twice if it is modified, but that is correct. */
b1f21e0a 2025 REG_N_SETS (regno)++;
d7429b6a 2026
b1f21e0a 2027 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
2028
2029 /* The insns where a reg is live are normally counted
2030 elsewhere, but we want the count to include the insn
2031 where the reg is set, and the normal counting mechanism
2032 would not count it. */
b1f21e0a 2033 REG_LIVE_LENGTH (regno)++;
d7429b6a
RK
2034 }
2035
cb9e8ad1 2036 if (! some_not_needed)
d7429b6a
RK
2037 {
2038 /* Make a logical link from the next following insn
2039 that uses this register, back to this insn.
2040 The following insns have already been processed.
2041
2042 We don't build a LOG_LINK for hard registers containing
2043 in ASM_OPERANDs. If these registers get replaced,
2044 we might wind up changing the semantics of the insn,
2045 even if reload can make what appear to be valid assignments
2046 later. */
2047 if (y && (BLOCK_NUM (y) == blocknum)
2048 && (regno >= FIRST_PSEUDO_REGISTER
2049 || asm_noperands (PATTERN (y)) < 0))
2050 LOG_LINKS (y)
2051 = gen_rtx (INSN_LIST, VOIDmode, insn, LOG_LINKS (y));
2052 }
2053 else if (! some_needed)
2054 {
2055 /* Note that dead stores have already been deleted when possible
2056 If we get here, we have found a dead store that cannot
2057 be eliminated (because the same insn does something useful).
2058 Indicate this by marking the reg being set as dying here. */
2059 REG_NOTES (insn)
2060 = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn));
b1f21e0a 2061 REG_N_DEATHS (REGNO (reg))++;
d7429b6a
RK
2062 }
2063 else
2064 {
2065 /* This is a case where we have a multi-word hard register
2066 and some, but not all, of the words of the register are
2067 needed in subsequent insns. Write REG_UNUSED notes
2068 for those parts that were not needed. This case should
2069 be rare. */
2070
2071 int i;
2072
2073 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
2074 i >= 0; i--)
916b1701 2075 if (!REGNO_REG_SET_P (needed, regno + i))
d7429b6a
RK
2076 REG_NOTES (insn)
2077 = gen_rtx (EXPR_LIST, REG_UNUSED,
04227afa
DE
2078 gen_rtx (REG, reg_raw_mode[regno + i],
2079 regno + i),
d7429b6a
RK
2080 REG_NOTES (insn));
2081 }
2082 }
2083 }
8244fc4f
RS
2084 else if (GET_CODE (reg) == REG)
2085 reg_next_use[regno] = 0;
d7429b6a
RK
2086
2087 /* If this is the last pass and this is a SCRATCH, show it will be dying
2088 here and count it. */
2089 else if (GET_CODE (reg) == SCRATCH && insn != 0)
2090 {
2091 REG_NOTES (insn)
2092 = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn));
2093 num_scratch++;
2094 }
2095}
2096\f
2097#ifdef AUTO_INC_DEC
2098
2099/* X is a MEM found in INSN. See if we can convert it into an auto-increment
2100 reference. */
2101
2102static void
2103find_auto_inc (needed, x, insn)
2104 regset needed;
2105 rtx x;
2106 rtx insn;
2107{
2108 rtx addr = XEXP (x, 0);
e658434c 2109 HOST_WIDE_INT offset = 0;
05ed5d57 2110 rtx set;
d7429b6a
RK
2111
2112 /* Here we detect use of an index register which might be good for
2113 postincrement, postdecrement, preincrement, or predecrement. */
2114
2115 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2116 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
2117
2118 if (GET_CODE (addr) == REG)
2119 {
2120 register rtx y;
2121 register int size = GET_MODE_SIZE (GET_MODE (x));
2122 rtx use;
2123 rtx incr;
2124 int regno = REGNO (addr);
2125
2126 /* Is the next use an increment that might make auto-increment? */
05ed5d57
RK
2127 if ((incr = reg_next_use[regno]) != 0
2128 && (set = single_set (incr)) != 0
2129 && GET_CODE (set) == SET
d7429b6a
RK
2130 && BLOCK_NUM (incr) == BLOCK_NUM (insn)
2131 /* Can't add side effects to jumps; if reg is spilled and
2132 reloaded, there's no way to store back the altered value. */
2133 && GET_CODE (insn) != JUMP_INSN
05ed5d57 2134 && (y = SET_SRC (set), GET_CODE (y) == PLUS)
d7429b6a
RK
2135 && XEXP (y, 0) == addr
2136 && GET_CODE (XEXP (y, 1)) == CONST_INT
2137 && (0
2138#ifdef HAVE_POST_INCREMENT
2139 || (INTVAL (XEXP (y, 1)) == size && offset == 0)
2140#endif
2141#ifdef HAVE_POST_DECREMENT
2142 || (INTVAL (XEXP (y, 1)) == - size && offset == 0)
2143#endif
2144#ifdef HAVE_PRE_INCREMENT
2145 || (INTVAL (XEXP (y, 1)) == size && offset == size)
2146#endif
2147#ifdef HAVE_PRE_DECREMENT
2148 || (INTVAL (XEXP (y, 1)) == - size && offset == - size)
2149#endif
2150 )
2151 /* Make sure this reg appears only once in this insn. */
2152 && (use = find_use_as_address (PATTERN (insn), addr, offset),
2153 use != 0 && use != (rtx) 1))
2154 {
05ed5d57 2155 rtx q = SET_DEST (set);
7280c2a4
RK
2156 enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size
2157 ? (offset ? PRE_INC : POST_INC)
2158 : (offset ? PRE_DEC : POST_DEC));
d7429b6a
RK
2159
2160 if (dead_or_set_p (incr, addr))
7280c2a4
RK
2161 {
2162 /* This is the simple case. Try to make the auto-inc. If
2163 we can't, we are done. Otherwise, we will do any
2164 needed updates below. */
2165 if (! validate_change (insn, &XEXP (x, 0),
2166 gen_rtx (inc_code, Pmode, addr),
2167 0))
2168 return;
2169 }
5175ad37
DE
2170 else if (GET_CODE (q) == REG
2171 /* PREV_INSN used here to check the semi-open interval
2172 [insn,incr). */
b24884cd
JL
2173 && ! reg_used_between_p (q, PREV_INSN (insn), incr)
2174 /* We must also check for sets of q as q may be
2175 a call clobbered hard register and there may
2176 be a call between PREV_INSN (insn) and incr. */
2177 && ! reg_set_between_p (q, PREV_INSN (insn), incr))
d7429b6a 2178 {
5175ad37 2179 /* We have *p followed sometime later by q = p+size.
d7429b6a 2180 Both p and q must be live afterward,
5175ad37 2181 and q is not used between INSN and it's assignment.
d7429b6a
RK
2182 Change it to q = p, ...*q..., q = q+size.
2183 Then fall into the usual case. */
2184 rtx insns, temp;
2185
2186 start_sequence ();
2187 emit_move_insn (q, addr);
2188 insns = get_insns ();
2189 end_sequence ();
2190
2191 /* If anything in INSNS have UID's that don't fit within the
2192 extra space we allocate earlier, we can't make this auto-inc.
2193 This should never happen. */
2194 for (temp = insns; temp; temp = NEXT_INSN (temp))
2195 {
2196 if (INSN_UID (temp) > max_uid_for_flow)
2197 return;
2198 BLOCK_NUM (temp) = BLOCK_NUM (insn);
2199 }
2200
7280c2a4
RK
2201 /* If we can't make the auto-inc, or can't make the
2202 replacement into Y, exit. There's no point in making
2203 the change below if we can't do the auto-inc and doing
2204 so is not correct in the pre-inc case. */
2205
2206 validate_change (insn, &XEXP (x, 0),
2207 gen_rtx (inc_code, Pmode, q),
2208 1);
2209 validate_change (incr, &XEXP (y, 0), q, 1);
2210 if (! apply_change_group ())
2211 return;
2212
2213 /* We now know we'll be doing this change, so emit the
2214 new insn(s) and do the updates. */
d7429b6a 2215 emit_insns_before (insns, insn);
e8b641a1
RK
2216
2217 if (basic_block_head[BLOCK_NUM (insn)] == insn)
2218 basic_block_head[BLOCK_NUM (insn)] = insns;
2219
d7429b6a
RK
2220 /* INCR will become a NOTE and INSN won't contain a
2221 use of ADDR. If a use of ADDR was just placed in
2222 the insn before INSN, make that the next use.
2223 Otherwise, invalidate it. */
2224 if (GET_CODE (PREV_INSN (insn)) == INSN
2225 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
2226 && SET_SRC (PATTERN (PREV_INSN (insn))) == addr)
2227 reg_next_use[regno] = PREV_INSN (insn);
2228 else
2229 reg_next_use[regno] = 0;
2230
2231 addr = q;
2232 regno = REGNO (q);
d7429b6a
RK
2233
2234 /* REGNO is now used in INCR which is below INSN, but
2235 it previously wasn't live here. If we don't mark
2236 it as needed, we'll put a REG_DEAD note for it
2237 on this insn, which is incorrect. */
916b1701 2238 SET_REGNO_REG_SET (needed, regno);
d7429b6a
RK
2239
2240 /* If there are any calls between INSN and INCR, show
2241 that REGNO now crosses them. */
2242 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
2243 if (GET_CODE (temp) == CALL_INSN)
b1f21e0a 2244 REG_N_CALLS_CROSSED (regno)++;
d7429b6a 2245 }
02df8aba
RK
2246 else
2247 return;
d7429b6a 2248
7280c2a4
RK
2249 /* If we haven't returned, it means we were able to make the
2250 auto-inc, so update the status. First, record that this insn
2251 has an implicit side effect. */
2252
2253 REG_NOTES (insn)
2254 = gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn));
2255
2256 /* Modify the old increment-insn to simply copy
2257 the already-incremented value of our register. */
2258 if (! validate_change (incr, &SET_SRC (set), addr, 0))
2259 abort ();
2260
2261 /* If that makes it a no-op (copying the register into itself) delete
2262 it so it won't appear to be a "use" and a "set" of this
2263 register. */
2264 if (SET_DEST (set) == addr)
d7429b6a 2265 {
7280c2a4
RK
2266 PUT_CODE (incr, NOTE);
2267 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
2268 NOTE_SOURCE_FILE (incr) = 0;
2269 }
d7429b6a 2270
7280c2a4
RK
2271 if (regno >= FIRST_PSEUDO_REGISTER)
2272 {
2273 /* Count an extra reference to the reg. When a reg is
2274 incremented, spilling it is worse, so we want to make
2275 that less likely. */
b1f21e0a 2276 REG_N_REFS (regno) += loop_depth;
7280c2a4
RK
2277
2278 /* Count the increment as a setting of the register,
2279 even though it isn't a SET in rtl. */
b1f21e0a 2280 REG_N_SETS (regno)++;
d7429b6a
RK
2281 }
2282 }
2283 }
2284}
2285#endif /* AUTO_INC_DEC */
2286\f
2287/* Scan expression X and store a 1-bit in LIVE for each reg it uses.
2288 This is done assuming the registers needed from X
2289 are those that have 1-bits in NEEDED.
2290
2291 On the final pass, FINAL is 1. This means try for autoincrement
2292 and count the uses and deaths of each pseudo-reg.
2293
2294 INSN is the containing instruction. If INSN is dead, this function is not
2295 called. */
2296
2297static void
2298mark_used_regs (needed, live, x, final, insn)
2299 regset needed;
2300 regset live;
2301 rtx x;
d7429b6a 2302 int final;
e658434c 2303 rtx insn;
d7429b6a
RK
2304{
2305 register RTX_CODE code;
2306 register int regno;
2307 int i;
2308
2309 retry:
2310 code = GET_CODE (x);
2311 switch (code)
2312 {
2313 case LABEL_REF:
2314 case SYMBOL_REF:
2315 case CONST_INT:
2316 case CONST:
2317 case CONST_DOUBLE:
2318 case PC:
d7429b6a
RK
2319 case ADDR_VEC:
2320 case ADDR_DIFF_VEC:
2321 case ASM_INPUT:
2322 return;
2323
2324#ifdef HAVE_cc0
2325 case CC0:
2326 cc0_live = 1;
2327 return;
2328#endif
2329
2f1553a4
RK
2330 case CLOBBER:
2331 /* If we are clobbering a MEM, mark any registers inside the address
2332 as being used. */
2333 if (GET_CODE (XEXP (x, 0)) == MEM)
2334 mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn);
2335 return;
2336
d7429b6a 2337 case MEM:
7eb136d6
MM
2338 /* CYGNUS LOCAL dje/8176 */
2339 /* Invalidate the data for the last MEM stored, but only if MEM is
2340 something that can be stored into. */
2341 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2342 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
2343 ; /* needn't clear last_mem_set */
2344 else
2345 last_mem_set = 0;
2346 /* END CYGNUS LOCAL */
d7429b6a
RK
2347
2348#ifdef AUTO_INC_DEC
2349 if (final)
2350 find_auto_inc (needed, x, insn);
2351#endif
2352 break;
2353
80f8f04a
RK
2354 case SUBREG:
2355 if (GET_CODE (SUBREG_REG (x)) == REG
2356 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
2357 && (GET_MODE_SIZE (GET_MODE (x))
88285acf 2358 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
b1f21e0a 2359 REG_CHANGES_SIZE (REGNO (SUBREG_REG (x))) = 1;
80f8f04a
RK
2360
2361 /* While we're here, optimize this case. */
2362 x = SUBREG_REG (x);
2363
e100a3bb 2364 /* In case the SUBREG is not of a register, don't optimize */
ce79abf3 2365 if (GET_CODE (x) != REG)
e100a3bb
MM
2366 {
2367 mark_used_regs (needed, live, x, final, insn);
2368 return;
2369 }
ce79abf3 2370
0f41302f 2371 /* ... fall through ... */
80f8f04a 2372
d7429b6a
RK
2373 case REG:
2374 /* See a register other than being set
2375 => mark it as needed. */
2376
2377 regno = REGNO (x);
2378 {
916b1701
MM
2379 REGSET_ELT_TYPE some_needed = REGNO_REG_SET_P (needed, regno);
2380 REGSET_ELT_TYPE some_not_needed = ! some_needed;
d7429b6a 2381
916b1701 2382 SET_REGNO_REG_SET (live, regno);
cb9e8ad1 2383
d7429b6a
RK
2384 /* A hard reg in a wide mode may really be multiple registers.
2385 If so, mark all of them just like the first. */
2386 if (regno < FIRST_PSEUDO_REGISTER)
2387 {
2388 int n;
2389
d7e4fe8b 2390 /* For stack ptr or fixed arg pointer,
d7429b6a
RK
2391 nothing below can be necessary, so waste no more time. */
2392 if (regno == STACK_POINTER_REGNUM
73a187c1
DE
2393#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2394 || regno == HARD_FRAME_POINTER_REGNUM
2395#endif
d7e4fe8b
RS
2396#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2397 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2398#endif
d7429b6a
RK
2399 || regno == FRAME_POINTER_REGNUM)
2400 {
2401 /* If this is a register we are going to try to eliminate,
2402 don't mark it live here. If we are successful in
2403 eliminating it, it need not be live unless it is used for
2404 pseudos, in which case it will have been set live when
2405 it was allocated to the pseudos. If the register will not
2406 be eliminated, reload will set it live at that point. */
2407
2408 if (! TEST_HARD_REG_BIT (elim_reg_set, regno))
2409 regs_ever_live[regno] = 1;
2410 return;
2411 }
2412 /* No death notes for global register variables;
2413 their values are live after this function exits. */
2414 if (global_regs[regno])
d8c8b8e3
RS
2415 {
2416 if (final)
2417 reg_next_use[regno] = insn;
2418 return;
2419 }
d7429b6a
RK
2420
2421 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
2422 while (--n > 0)
2423 {
916b1701
MM
2424 int regno_n = regno + n;
2425 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
cb9e8ad1 2426
916b1701
MM
2427 SET_REGNO_REG_SET (live, regno_n);
2428 some_needed |= needed_regno;
931c6c7a 2429 some_not_needed |= ! needed_regno;
d7429b6a
RK
2430 }
2431 }
2432 if (final)
2433 {
2434 /* Record where each reg is used, so when the reg
2435 is set we know the next insn that uses it. */
2436
2437 reg_next_use[regno] = insn;
2438
2439 if (regno < FIRST_PSEUDO_REGISTER)
2440 {
2441 /* If a hard reg is being used,
2442 record that this function does use it. */
2443
2444 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
2445 if (i == 0)
2446 i = 1;
2447 do
2448 regs_ever_live[regno + --i] = 1;
2449 while (i > 0);
2450 }
2451 else
2452 {
2453 /* Keep track of which basic block each reg appears in. */
2454
2455 register int blocknum = BLOCK_NUM (insn);
2456
b1f21e0a
MM
2457 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
2458 REG_BASIC_BLOCK (regno) = blocknum;
2459 else if (REG_BASIC_BLOCK (regno) != blocknum)
2460 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
2461
2462 /* Count (weighted) number of uses of each reg. */
2463
b1f21e0a 2464 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
2465 }
2466
2467 /* Record and count the insns in which a reg dies.
2468 If it is used in this insn and was dead below the insn
2469 then it dies in this insn. If it was set in this insn,
2470 we do not make a REG_DEAD note; likewise if we already
2471 made such a note. */
2472
cb9e8ad1 2473 if (some_not_needed
d7429b6a
RK
2474 && ! dead_or_set_p (insn, x)
2475#if 0
2476 && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
2477#endif
2478 )
2479 {
ab28041e
JW
2480 /* Check for the case where the register dying partially
2481 overlaps the register set by this insn. */
2482 if (regno < FIRST_PSEUDO_REGISTER
2483 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
2484 {
480eac3b 2485 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
ab28041e
JW
2486 while (--n >= 0)
2487 some_needed |= dead_or_set_regno_p (insn, regno + n);
2488 }
2489
d7429b6a
RK
2490 /* If none of the words in X is needed, make a REG_DEAD
2491 note. Otherwise, we must make partial REG_DEAD notes. */
2492 if (! some_needed)
2493 {
2494 REG_NOTES (insn)
2495 = gen_rtx (EXPR_LIST, REG_DEAD, x, REG_NOTES (insn));
b1f21e0a 2496 REG_N_DEATHS (regno)++;
d7429b6a
RK
2497 }
2498 else
2499 {
2500 int i;
2501
2502 /* Don't make a REG_DEAD note for a part of a register
2503 that is set in the insn. */
2504
2505 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
2506 i >= 0; i--)
916b1701 2507 if (!REGNO_REG_SET_P (needed, regno + i)
d7429b6a
RK
2508 && ! dead_or_set_regno_p (insn, regno + i))
2509 REG_NOTES (insn)
2510 = gen_rtx (EXPR_LIST, REG_DEAD,
04227afa
DE
2511 gen_rtx (REG, reg_raw_mode[regno + i],
2512 regno + i),
d7429b6a
RK
2513 REG_NOTES (insn));
2514 }
2515 }
2516 }
2517 }
2518 return;
2519
2520 case SET:
2521 {
2522 register rtx testreg = SET_DEST (x);
2523 int mark_dest = 0;
2524
2525 /* If storing into MEM, don't show it as being used. But do
2526 show the address as being used. */
2527 if (GET_CODE (testreg) == MEM)
2528 {
2529#ifdef AUTO_INC_DEC
2530 if (final)
2531 find_auto_inc (needed, testreg, insn);
2532#endif
2533 mark_used_regs (needed, live, XEXP (testreg, 0), final, insn);
2534 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2535 return;
2536 }
2537
2538 /* Storing in STRICT_LOW_PART is like storing in a reg
2539 in that this SET might be dead, so ignore it in TESTREG.
2540 but in some other ways it is like using the reg.
2541
2542 Storing in a SUBREG or a bit field is like storing the entire
2543 register in that if the register's value is not used
2544 then this SET is not needed. */
2545 while (GET_CODE (testreg) == STRICT_LOW_PART
2546 || GET_CODE (testreg) == ZERO_EXTRACT
2547 || GET_CODE (testreg) == SIGN_EXTRACT
2548 || GET_CODE (testreg) == SUBREG)
2549 {
88285acf
RK
2550 if (GET_CODE (testreg) == SUBREG
2551 && GET_CODE (SUBREG_REG (testreg)) == REG
2552 && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER
2553 && (GET_MODE_SIZE (GET_MODE (testreg))
2554 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg)))))
b1f21e0a 2555 REG_CHANGES_SIZE (REGNO (SUBREG_REG (testreg))) = 1;
88285acf 2556
d7429b6a
RK
2557 /* Modifying a single register in an alternate mode
2558 does not use any of the old value. But these other
2559 ways of storing in a register do use the old value. */
2560 if (GET_CODE (testreg) == SUBREG
2561 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
2562 ;
2563 else
2564 mark_dest = 1;
2565
2566 testreg = XEXP (testreg, 0);
2567 }
2568
2569 /* If this is a store into a register,
2570 recursively scan the value being stored. */
2571
2572 if (GET_CODE (testreg) == REG
2573 && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
2574#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2575 && regno != HARD_FRAME_POINTER_REGNUM
2576#endif
d7e4fe8b
RS
2577#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2578 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2579#endif
d8c8b8e3
RS
2580 )
2581 /* We used to exclude global_regs here, but that seems wrong.
2582 Storing in them is like storing in mem. */
d7429b6a
RK
2583 {
2584 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2585 if (mark_dest)
2586 mark_used_regs (needed, live, SET_DEST (x), final, insn);
2587 return;
2588 }
2589 }
2590 break;
2591
2592 case RETURN:
2593 /* If exiting needs the right stack value, consider this insn as
2594 using the stack pointer. In any event, consider it as using
632c9d9e 2595 all global registers and all registers used by return. */
d7429b6a
RK
2596
2597#ifdef EXIT_IGNORE_STACK
2598 if (! EXIT_IGNORE_STACK
2599 || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer))
2600#endif
916b1701 2601 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
2602
2603 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
632c9d9e
MS
2604 if (global_regs[i]
2605#ifdef EPILOGUE_USES
2606 || EPILOGUE_USES (i)
2607#endif
2608 )
916b1701 2609 SET_REGNO_REG_SET (live, i);
d7429b6a
RK
2610 break;
2611 }
2612
2613 /* Recursively scan the operands of this expression. */
2614
2615 {
2616 register char *fmt = GET_RTX_FORMAT (code);
2617 register int i;
2618
2619 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2620 {
2621 if (fmt[i] == 'e')
2622 {
2623 /* Tail recursive case: save a function call level. */
2624 if (i == 0)
2625 {
2626 x = XEXP (x, 0);
2627 goto retry;
2628 }
2629 mark_used_regs (needed, live, XEXP (x, i), final, insn);
2630 }
2631 else if (fmt[i] == 'E')
2632 {
2633 register int j;
2634 for (j = 0; j < XVECLEN (x, i); j++)
2635 mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
2636 }
2637 }
2638 }
2639}
2640\f
2641#ifdef AUTO_INC_DEC
2642
2643static int
2644try_pre_increment_1 (insn)
2645 rtx insn;
2646{
2647 /* Find the next use of this reg. If in same basic block,
2648 make it do pre-increment or pre-decrement if appropriate. */
2649 rtx x = PATTERN (insn);
5f4f0e22 2650 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
d7429b6a
RK
2651 * INTVAL (XEXP (SET_SRC (x), 1)));
2652 int regno = REGNO (SET_DEST (x));
2653 rtx y = reg_next_use[regno];
2654 if (y != 0
2655 && BLOCK_NUM (y) == BLOCK_NUM (insn)
89861c38 2656 /* Don't do this if the reg dies, or gets set in y; a standard addressing
0f41302f 2657 mode would be better. */
89861c38 2658 && ! dead_or_set_p (y, SET_DEST (x))
d7429b6a
RK
2659 && try_pre_increment (y, SET_DEST (PATTERN (insn)),
2660 amount))
2661 {
2662 /* We have found a suitable auto-increment
2663 and already changed insn Y to do it.
2664 So flush this increment-instruction. */
2665 PUT_CODE (insn, NOTE);
2666 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2667 NOTE_SOURCE_FILE (insn) = 0;
2668 /* Count a reference to this reg for the increment
2669 insn we are deleting. When a reg is incremented.
2670 spilling it is worse, so we want to make that
2671 less likely. */
2672 if (regno >= FIRST_PSEUDO_REGISTER)
2673 {
b1f21e0a
MM
2674 REG_N_REFS (regno) += loop_depth;
2675 REG_N_SETS (regno)++;
d7429b6a
RK
2676 }
2677 return 1;
2678 }
2679 return 0;
2680}
2681
2682/* Try to change INSN so that it does pre-increment or pre-decrement
2683 addressing on register REG in order to add AMOUNT to REG.
2684 AMOUNT is negative for pre-decrement.
2685 Returns 1 if the change could be made.
2686 This checks all about the validity of the result of modifying INSN. */
2687
2688static int
2689try_pre_increment (insn, reg, amount)
2690 rtx insn, reg;
5f4f0e22 2691 HOST_WIDE_INT amount;
d7429b6a
RK
2692{
2693 register rtx use;
2694
2695 /* Nonzero if we can try to make a pre-increment or pre-decrement.
2696 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
2697 int pre_ok = 0;
2698 /* Nonzero if we can try to make a post-increment or post-decrement.
2699 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
2700 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
2701 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
2702 int post_ok = 0;
2703
2704 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
2705 int do_post = 0;
2706
2707 /* From the sign of increment, see which possibilities are conceivable
2708 on this target machine. */
2709#ifdef HAVE_PRE_INCREMENT
2710 if (amount > 0)
2711 pre_ok = 1;
2712#endif
2713#ifdef HAVE_POST_INCREMENT
2714 if (amount > 0)
2715 post_ok = 1;
2716#endif
2717
2718#ifdef HAVE_PRE_DECREMENT
2719 if (amount < 0)
2720 pre_ok = 1;
2721#endif
2722#ifdef HAVE_POST_DECREMENT
2723 if (amount < 0)
2724 post_ok = 1;
2725#endif
2726
2727 if (! (pre_ok || post_ok))
2728 return 0;
2729
2730 /* It is not safe to add a side effect to a jump insn
2731 because if the incremented register is spilled and must be reloaded
2732 there would be no way to store the incremented value back in memory. */
2733
2734 if (GET_CODE (insn) == JUMP_INSN)
2735 return 0;
2736
2737 use = 0;
2738 if (pre_ok)
2739 use = find_use_as_address (PATTERN (insn), reg, 0);
2740 if (post_ok && (use == 0 || use == (rtx) 1))
2741 {
2742 use = find_use_as_address (PATTERN (insn), reg, -amount);
2743 do_post = 1;
2744 }
2745
2746 if (use == 0 || use == (rtx) 1)
2747 return 0;
2748
2749 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
2750 return 0;
2751
a0fbc3a9
SC
2752 /* See if this combination of instruction and addressing mode exists. */
2753 if (! validate_change (insn, &XEXP (use, 0),
2754 gen_rtx (amount > 0
2755 ? (do_post ? POST_INC : PRE_INC)
2756 : (do_post ? POST_DEC : PRE_DEC),
2757 Pmode, reg), 0))
2758 return 0;
d7429b6a
RK
2759
2760 /* Record that this insn now has an implicit side effect on X. */
2761 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn));
2762 return 1;
2763}
2764
2765#endif /* AUTO_INC_DEC */
2766\f
2767/* Find the place in the rtx X where REG is used as a memory address.
2768 Return the MEM rtx that so uses it.
2769 If PLUSCONST is nonzero, search instead for a memory address equivalent to
2770 (plus REG (const_int PLUSCONST)).
2771
2772 If such an address does not appear, return 0.
2773 If REG appears more than once, or is used other than in such an address,
2774 return (rtx)1. */
2775
913db40d 2776static rtx
d7429b6a
RK
2777find_use_as_address (x, reg, plusconst)
2778 register rtx x;
2779 rtx reg;
e658434c 2780 HOST_WIDE_INT plusconst;
d7429b6a
RK
2781{
2782 enum rtx_code code = GET_CODE (x);
2783 char *fmt = GET_RTX_FORMAT (code);
2784 register int i;
2785 register rtx value = 0;
2786 register rtx tem;
2787
2788 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
2789 return x;
2790
2791 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
2792 && XEXP (XEXP (x, 0), 0) == reg
2793 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2794 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
2795 return x;
2796
2797 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
2798 {
2799 /* If REG occurs inside a MEM used in a bit-field reference,
2800 that is unacceptable. */
2801 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
6fa5c106 2802 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2803 }
2804
2805 if (x == reg)
6fa5c106 2806 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2807
2808 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2809 {
2810 if (fmt[i] == 'e')
2811 {
2812 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
2813 if (value == 0)
2814 value = tem;
2815 else if (tem != 0)
6fa5c106 2816 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2817 }
2818 if (fmt[i] == 'E')
2819 {
2820 register int j;
2821 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2822 {
2823 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
2824 if (value == 0)
2825 value = tem;
2826 else if (tem != 0)
6fa5c106 2827 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2828 }
2829 }
2830 }
2831
2832 return value;
2833}
2834\f
2835/* Write information about registers and basic blocks into FILE.
2836 This is part of making a debugging dump. */
2837
2838void
2839dump_flow_info (file)
2840 FILE *file;
2841{
2842 register int i;
2843 static char *reg_class_names[] = REG_CLASS_NAMES;
2844
2845 fprintf (file, "%d registers.\n", max_regno);
2846
2847 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
b1f21e0a 2848 if (REG_N_REFS (i))
d7429b6a 2849 {
e4600702 2850 enum reg_class class, altclass;
d7429b6a 2851 fprintf (file, "\nRegister %d used %d times across %d insns",
b1f21e0a
MM
2852 i, REG_N_REFS (i), REG_LIVE_LENGTH (i));
2853 if (REG_BASIC_BLOCK (i) >= 0)
2854 fprintf (file, " in block %d", REG_BASIC_BLOCK (i));
2855 if (REG_N_DEATHS (i) != 1)
2856 fprintf (file, "; dies in %d places", REG_N_DEATHS (i));
2857 if (REG_N_CALLS_CROSSED (i) == 1)
d7429b6a 2858 fprintf (file, "; crosses 1 call");
b1f21e0a
MM
2859 else if (REG_N_CALLS_CROSSED (i))
2860 fprintf (file, "; crosses %d calls", REG_N_CALLS_CROSSED (i));
d7429b6a
RK
2861 if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
2862 fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
2863 class = reg_preferred_class (i);
e4600702
RK
2864 altclass = reg_alternate_class (i);
2865 if (class != GENERAL_REGS || altclass != ALL_REGS)
d7429b6a 2866 {
e4600702
RK
2867 if (altclass == ALL_REGS || class == ALL_REGS)
2868 fprintf (file, "; pref %s", reg_class_names[(int) class]);
2869 else if (altclass == NO_REGS)
d7429b6a
RK
2870 fprintf (file, "; %s or none", reg_class_names[(int) class]);
2871 else
e4600702
RK
2872 fprintf (file, "; pref %s, else %s",
2873 reg_class_names[(int) class],
2874 reg_class_names[(int) altclass]);
d7429b6a
RK
2875 }
2876 if (REGNO_POINTER_FLAG (i))
2877 fprintf (file, "; pointer");
2878 fprintf (file, ".\n");
2879 }
2880 fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
2881 for (i = 0; i < n_basic_blocks; i++)
2882 {
2883 register rtx head, jump;
2884 register int regno;
2885 fprintf (file, "\nBasic block %d: first insn %d, last %d.\n",
2886 i,
2887 INSN_UID (basic_block_head[i]),
2888 INSN_UID (basic_block_end[i]));
2889 /* The control flow graph's storage is freed
2890 now when flow_analysis returns.
2891 Don't try to print it if it is gone. */
2892 if (basic_block_drops_in)
2893 {
2894 fprintf (file, "Reached from blocks: ");
2895 head = basic_block_head[i];
2896 if (GET_CODE (head) == CODE_LABEL)
2897 for (jump = LABEL_REFS (head);
2898 jump != head;
2899 jump = LABEL_NEXTREF (jump))
2900 {
2901 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2902 fprintf (file, " %d", from_block);
2903 }
2904 if (basic_block_drops_in[i])
2905 fprintf (file, " previous");
2906 }
2907 fprintf (file, "\nRegisters live at start:");
2908 for (regno = 0; regno < max_regno; regno++)
916b1701
MM
2909 if (REGNO_REG_SET_P (basic_block_live_at_start[i], regno))
2910 fprintf (file, " %d", regno);
d7429b6a
RK
2911 fprintf (file, "\n");
2912 }
2913 fprintf (file, "\n");
2914}
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