]> gcc.gnu.org Git - gcc.git/blame - gcc/flow.c
Give my new email address.
[gcc.git] / gcc / flow.c
CommitLineData
d7429b6a 1/* Data flow analysis for GNU compiler.
a5cad800 2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc.
d7429b6a
RK
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
a35311b0
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
d7429b6a
RK
20
21
e881bb1b
RH
22/* This file contains the data flow analysis pass of the compiler. It
23 computes data flow information which tells combine_instructions
24 which insns to consider combining and controls register allocation.
d7429b6a 25
e881bb1b
RH
26 Additional data flow information that is too bulky to record is
27 generated during the analysis, and is used at that time to create
28 autoincrement and autodecrement addressing.
d7429b6a
RK
29
30 The first step is dividing the function into basic blocks.
31 find_basic_blocks does this. Then life_analysis determines
32 where each register is live and where it is dead.
33
34 ** find_basic_blocks **
35
e881bb1b
RH
36 find_basic_blocks divides the current function's rtl into basic
37 blocks and constructs the CFG. The blocks are recorded in the
38 basic_block_info array; the CFG exists in the edge structures
39 referenced by the blocks.
d7429b6a 40
e881bb1b 41 find_basic_blocks also finds any unreachable loops and deletes them.
d7429b6a
RK
42
43 ** life_analysis **
44
45 life_analysis is called immediately after find_basic_blocks.
46 It uses the basic block information to determine where each
47 hard or pseudo register is live.
48
49 ** live-register info **
50
51 The information about where each register is live is in two parts:
e881bb1b 52 the REG_NOTES of insns, and the vector basic_block->global_live_at_start.
d7429b6a 53
e881bb1b
RH
54 basic_block->global_live_at_start has an element for each basic
55 block, and the element is a bit-vector with a bit for each hard or
56 pseudo register. The bit is 1 if the register is live at the
57 beginning of the basic block.
d7429b6a
RK
58
59 Two types of elements can be added to an insn's REG_NOTES.
60 A REG_DEAD note is added to an insn's REG_NOTES for any register
61 that meets both of two conditions: The value in the register is not
62 needed in subsequent insns and the insn does not replace the value in
63 the register (in the case of multi-word hard registers, the value in
64 each register must be replaced by the insn to avoid a REG_DEAD note).
65
66 In the vast majority of cases, an object in a REG_DEAD note will be
67 used somewhere in the insn. The (rare) exception to this is if an
68 insn uses a multi-word hard register and only some of the registers are
69 needed in subsequent insns. In that case, REG_DEAD notes will be
70 provided for those hard registers that are not subsequently needed.
71 Partial REG_DEAD notes of this type do not occur when an insn sets
72 only some of the hard registers used in such a multi-word operand;
73 omitting REG_DEAD notes for objects stored in an insn is optional and
74 the desire to do so does not justify the complexity of the partial
75 REG_DEAD notes.
76
77 REG_UNUSED notes are added for each register that is set by the insn
78 but is unused subsequently (if every register set by the insn is unused
79 and the insn does not reference memory or have some other side-effect,
80 the insn is deleted instead). If only part of a multi-word hard
81 register is used in a subsequent insn, REG_UNUSED notes are made for
82 the parts that will not be used.
83
84 To determine which registers are live after any insn, one can
85 start from the beginning of the basic block and scan insns, noting
86 which registers are set by each insn and which die there.
87
88 ** Other actions of life_analysis **
89
90 life_analysis sets up the LOG_LINKS fields of insns because the
91 information needed to do so is readily available.
92
93 life_analysis deletes insns whose only effect is to store a value
94 that is never used.
95
96 life_analysis notices cases where a reference to a register as
97 a memory address can be combined with a preceding or following
98 incrementation or decrementation of the register. The separate
99 instruction to increment or decrement is deleted and the address
100 is changed to a POST_INC or similar rtx.
101
102 Each time an incrementing or decrementing address is created,
103 a REG_INC element is added to the insn's REG_NOTES list.
104
105 life_analysis fills in certain vectors containing information about
106 register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length,
fdb8a883
JW
107 reg_n_calls_crosses and reg_basic_block.
108
109 life_analysis sets current_function_sp_is_unchanging if the function
110 doesn't modify the stack pointer. */
e881bb1b
RH
111
112/* TODO:
113
114 Split out from life_analysis:
115 - local property discovery (bb->local_live, bb->local_set)
116 - global property computation
117 - log links creation
118 - pre/post modify transformation
119*/
d7429b6a 120\f
d7429b6a 121#include "config.h"
670ee920 122#include "system.h"
d7429b6a
RK
123#include "rtl.h"
124#include "basic-block.h"
125#include "insn-config.h"
126#include "regs.h"
127#include "hard-reg-set.h"
128#include "flags.h"
129#include "output.h"
3d195391 130#include "except.h"
2e107e9e 131#include "toplev.h"
79c9824e 132#include "recog.h"
e881bb1b 133#include "insn-flags.h"
d7429b6a
RK
134
135#include "obstack.h"
136#define obstack_chunk_alloc xmalloc
137#define obstack_chunk_free free
138
e881bb1b
RH
139
140/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
141 the stack pointer does not matter. The value is tested only in
142 functions that have frame pointers.
143 No definition is equivalent to always zero. */
144#ifndef EXIT_IGNORE_STACK
145#define EXIT_IGNORE_STACK 0
146#endif
147
421382ac 148
7eb136d6
MM
149/* The contents of the current function definition are allocated
150 in this obstack, and all are freed at the end of the function.
151 For top-level functions, this is temporary_obstack.
152 Separate obstacks are made for nested functions. */
153
154extern struct obstack *function_obstack;
155
d7429b6a
RK
156/* List of labels that must never be deleted. */
157extern rtx forced_labels;
158
e881bb1b 159/* Number of basic blocks in the current function. */
d7429b6a 160
e881bb1b 161int n_basic_blocks;
d7429b6a 162
e881bb1b 163/* The basic block array. */
d7429b6a 164
e881bb1b 165varray_type basic_block_info;
d7429b6a 166
e881bb1b 167/* The special entry and exit blocks. */
d7429b6a 168
e881bb1b
RH
169struct basic_block_def entry_exit_blocks[2] =
170{
171 {
172 NULL, /* head */
173 NULL, /* end */
174 NULL, /* pred */
175 NULL, /* succ */
176 NULL, /* local_set */
177 NULL, /* global_live_at_start */
178 NULL, /* global_live_at_end */
179 NULL, /* aux */
180 ENTRY_BLOCK, /* index */
181 0 /* loop_depth */
182 },
183 {
184 NULL, /* head */
185 NULL, /* end */
186 NULL, /* pred */
187 NULL, /* succ */
188 NULL, /* local_set */
189 NULL, /* global_live_at_start */
190 NULL, /* global_live_at_end */
191 NULL, /* aux */
192 EXIT_BLOCK, /* index */
193 0 /* loop_depth */
194 }
195};
d7429b6a 196
56744d1a
JL
197/* Nonzero if the second flow pass has completed. */
198int flow2_completed;
199
d7429b6a
RK
200/* Maximum register number used in this function, plus one. */
201
202int max_regno;
203
b1f21e0a 204/* Indexed by n, giving various register information */
d7429b6a 205
6feacd09 206varray_type reg_n_info;
d7429b6a 207
a494747c
MM
208/* Size of the reg_n_info table. */
209
210unsigned int reg_n_max;
211
d7429b6a
RK
212/* Element N is the next insn that uses (hard or pseudo) register number N
213 within the current basic block; or zero, if there is no such insn.
214 This is valid only during the final backward scan in propagate_block. */
215
216static rtx *reg_next_use;
217
218/* Size of a regset for the current function,
219 in (1) bytes and (2) elements. */
220
221int regset_bytes;
222int regset_size;
223
d7429b6a 224/* Regset of regs live when calls to `setjmp'-like functions happen. */
e881bb1b 225/* ??? Does this exist only for the setjmp-clobbered warning message? */
d7429b6a
RK
226
227regset regs_live_at_setjmp;
228
229/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
230 that have to go in the same hard reg.
231 The first two regs in the list are a pair, and the next two
232 are another pair, etc. */
233rtx regs_may_share;
234
d7429b6a
RK
235/* Depth within loops of basic block being scanned for lifetime analysis,
236 plus one. This is the weight attached to references to registers. */
237
238static int loop_depth;
239
240/* During propagate_block, this is non-zero if the value of CC0 is live. */
241
242static int cc0_live;
243
db3a887b
CB
244/* During propagate_block, this contains a list of all the MEMs we are
245 tracking for dead store elimination. */
d7429b6a 246
db3a887b 247static rtx mem_set_list;
d7429b6a
RK
248
249/* Set of registers that may be eliminable. These are handled specially
250 in updating regs_ever_live. */
251
252static HARD_REG_SET elim_reg_set;
253
e881bb1b
RH
254/* The basic block structure for every insn, indexed by uid. */
255
256varray_type basic_block_for_insn;
257
258/* The labels mentioned in non-jump rtl. Valid during find_basic_blocks. */
259/* ??? Should probably be using LABEL_NUSES instead. It would take a
260 bit of surgery to be able to use or co-opt the routines in jump. */
261
262static rtx label_value_list;
263
264/* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
265
266#define INSN_VOLATILE(INSN) bitmap_bit_p (uid_volatile, INSN_UID (INSN))
267#define SET_INSN_VOLATILE(INSN) bitmap_set_bit (uid_volatile, INSN_UID (INSN))
268static bitmap uid_volatile;
269
d7429b6a 270/* Forward declarations */
e881bb1b
RH
271static int count_basic_blocks PROTO((rtx));
272static rtx find_basic_blocks_1 PROTO((rtx, rtx*));
273static void create_basic_block PROTO((int, rtx, rtx, rtx));
274static void compute_bb_for_insn PROTO((varray_type, int));
275static void clear_edges PROTO((void));
276static void make_edges PROTO((rtx, rtx*));
277static void make_edge PROTO((basic_block, basic_block, int));
278static void make_label_edge PROTO((basic_block, rtx, int));
279static void mark_critical_edges PROTO((void));
280
281static void commit_one_edge_insertion PROTO((edge));
282
421382ac 283static void delete_unreachable_blocks PROTO((void));
e881bb1b
RH
284static void delete_eh_regions PROTO((void));
285static void delete_insn_chain PROTO((rtx, rtx));
286static int delete_block PROTO((basic_block));
287static void expunge_block PROTO((basic_block));
288static rtx flow_delete_insn PROTO((rtx));
289static int can_delete_label_p PROTO((rtx));
290static void merge_blocks_nomove PROTO((basic_block, basic_block));
291static int merge_blocks PROTO((edge,basic_block,basic_block));
292static void tidy_fallthru_edge PROTO((edge,basic_block,basic_block));
293static void calculate_loop_depth PROTO((rtx));
294
dc2ede84
BS
295static int set_noop_p PROTO((rtx));
296static int noop_move_p PROTO((rtx));
e881bb1b 297static void notice_stack_pointer_modification PROTO ((rtx, rtx));
dc2ede84
BS
298static void record_volatile_insns PROTO((rtx));
299static void mark_regs_live_at_end PROTO((regset));
e881bb1b
RH
300static void life_analysis_1 PROTO((rtx, int));
301static void init_regset_vector PROTO ((regset *, int,
302 struct obstack *));
303static void propagate_block PROTO((regset, rtx, rtx, int,
304 regset, int));
e398aa80 305static int insn_dead_p PROTO((rtx, regset, int, rtx));
e658434c
RK
306static int libcall_dead_p PROTO((rtx, regset, rtx, rtx));
307static void mark_set_regs PROTO((regset, regset, rtx,
308 rtx, regset));
309static void mark_set_1 PROTO((regset, regset, rtx,
310 rtx, regset));
1d300e19 311#ifdef AUTO_INC_DEC
e658434c 312static void find_auto_inc PROTO((regset, rtx, rtx));
e658434c
RK
313static int try_pre_increment_1 PROTO((rtx));
314static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT));
1d300e19
KG
315#endif
316static void mark_used_regs PROTO((regset, regset, rtx, int, rtx));
e658434c 317void dump_flow_info PROTO((FILE *));
e881bb1b
RH
318static void dump_edge_info PROTO((FILE *, edge, int));
319
5ece9746
JL
320static int_list_ptr alloc_int_list_node PROTO ((int_list_block **));
321static int_list_ptr add_int_list_node PROTO ((int_list_block **,
322 int_list **, int));
e881bb1b
RH
323
324static void add_pred_succ PROTO ((int, int, int_list_ptr *,
325 int_list_ptr *, int *, int *));
326
4c649323
JL
327static void count_reg_sets_1 PROTO ((rtx));
328static void count_reg_sets PROTO ((rtx));
329static void count_reg_references PROTO ((rtx));
fdb8a883 330static void notice_stack_pointer_modification PROTO ((rtx, rtx));
15e088b2 331static void invalidate_mems_from_autoinc PROTO ((rtx));
d7429b6a 332\f
5ece9746 333/* Find basic blocks of the current function.
e881bb1b
RH
334 F is the first insn of the function and NREGS the number of register
335 numbers in use. */
d7429b6a
RK
336
337void
9265dacf 338find_basic_blocks (f, nregs, file)
d7429b6a 339 rtx f;
e881bb1b
RH
340 int nregs ATTRIBUTE_UNUSED;
341 FILE *file ATTRIBUTE_UNUSED;
d7429b6a 342{
e881bb1b
RH
343 rtx *bb_eh_end;
344 int max_uid;
d7429b6a 345
e881bb1b
RH
346 /* Flush out existing data. */
347 if (basic_block_info != NULL)
348 {
349 int i;
421382ac 350
e881bb1b 351 clear_edges ();
d7429b6a 352
e881bb1b
RH
353 /* Clear bb->aux on all extant basic blocks. We'll use this as a
354 tag for reuse during create_basic_block, just in case some pass
355 copies around basic block notes improperly. */
356 for (i = 0; i < n_basic_blocks; ++i)
357 BASIC_BLOCK (i)->aux = NULL;
d7429b6a 358
e881bb1b
RH
359 VARRAY_FREE (basic_block_info);
360 }
27249135 361
e881bb1b 362 n_basic_blocks = count_basic_blocks (f);
27249135 363
e881bb1b
RH
364 /* Size the basic block table. The actual structures will be allocated
365 by find_basic_blocks_1, since we want to keep the structure pointers
366 stable across calls to find_basic_blocks. */
367 /* ??? This whole issue would be much simpler if we called find_basic_blocks
368 exactly once, and thereafter we don't have a single long chain of
369 instructions at all until close to the end of compilation when we
370 actually lay them out. */
8cfe18d6 371
e881bb1b
RH
372 VARRAY_BB_INIT (basic_block_info, n_basic_blocks, "basic_block_info");
373
374 /* An array to record the active exception region at the end of each
375 basic block. It is filled in by find_basic_blocks_1 for make_edges. */
376 bb_eh_end = (rtx *) alloca (n_basic_blocks * sizeof (rtx));
d7429b6a 377
e881bb1b 378 label_value_list = find_basic_blocks_1 (f, bb_eh_end);
5ece9746 379
e881bb1b
RH
380 /* Record the block to which an insn belongs. */
381 /* ??? This should be done another way, by which (perhaps) a label is
382 tagged directly with the basic block that it starts. It is used for
383 more than that currently, but IMO that is the only valid use. */
384
385 max_uid = get_max_uid ();
d7429b6a 386#ifdef AUTO_INC_DEC
5ece9746
JL
387 /* Leave space for insns life_analysis makes in some cases for auto-inc.
388 These cases are rare, so we don't need too much space. */
e881bb1b 389 max_uid += max_uid / 10;
d7429b6a
RK
390#endif
391
e881bb1b
RH
392 VARRAY_BB_INIT (basic_block_for_insn, max_uid, "basic_block_for_insn");
393 compute_bb_for_insn (basic_block_for_insn, max_uid);
394
395 /* Discover the edges of our cfg. */
d7429b6a 396
e881bb1b 397 make_edges (label_value_list, bb_eh_end);
421382ac 398
e881bb1b
RH
399 /* Delete unreachable blocks. */
400 /* ??? Do this conditionally, or make this another entry point? */
d7429b6a 401
e881bb1b
RH
402 delete_unreachable_blocks ();
403
404 /* Mark critical edges. */
405
406 mark_critical_edges ();
407
408 /* Discover the loop depth at the start of each basic block to aid
409 register allocation. */
410 calculate_loop_depth (f);
411
412 /* Kill the data we won't maintain. */
413 label_value_list = 0;
d7429b6a 414}
5ece9746 415
e881bb1b 416/* Count the basic blocks of the function. */
dc2ede84 417
e881bb1b
RH
418static int
419count_basic_blocks (f)
420 rtx f;
421{
422 register rtx insn;
423 register RTX_CODE prev_code;
424 register int count = 0;
425 int eh_region = 0;
426 int in_libcall_block = 0;
427 int call_had_abnormal_edge = 0;
428 rtx prev_call = NULL_RTX;
dc2ede84 429
e881bb1b
RH
430 prev_code = JUMP_INSN;
431 for (insn = f; insn; insn = NEXT_INSN (insn))
432 {
433 register RTX_CODE code = GET_CODE (insn);
434
435 /* Track when we are inside in LIBCALL block. */
436 if (GET_RTX_CLASS (code) == 'i'
437 && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
438 in_libcall_block = 1;
439
440 if (code == CODE_LABEL
441 || (GET_RTX_CLASS (code) == 'i'
442 && (prev_code == JUMP_INSN
443 || prev_code == BARRIER
444 || (prev_code == CALL_INSN && call_had_abnormal_edge))))
445 {
446 count++;
dc2ede84 447
e881bb1b
RH
448 /* If the previous insn was a call that did not create an
449 abnormal edge, we want to add a nop so that the CALL_INSN
450 itself is not at basic_block_end. This allows us to
451 easily distinguish between normal calls and those which
452 create abnormal edges in the flow graph. */
dc2ede84 453
e881bb1b
RH
454 if (count > 0 && prev_call != 0 && !call_had_abnormal_edge)
455 {
456 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
457 emit_insn_after (nop, prev_call);
458 }
459 }
dc2ede84 460
e881bb1b
RH
461 /* Record whether this call created an edge. */
462 if (code == CALL_INSN)
463 {
464 prev_call = insn;
465 call_had_abnormal_edge = 0;
466 if (nonlocal_goto_handler_labels)
467 call_had_abnormal_edge = !in_libcall_block;
468 else if (eh_region)
469 {
470 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
471 if (!note || XINT (XEXP (note, 0), 0) != 0)
472 call_had_abnormal_edge = 1;
473 }
474 }
475 else if (code != NOTE)
476 prev_call = NULL_RTX;
477
478 if (code != NOTE)
479 prev_code = code;
480 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG)
481 ++eh_region;
482 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
483 --eh_region;
484
485 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
486 && find_reg_note (insn, REG_RETVAL, NULL_RTX))
487 in_libcall_block = 0;
488 }
489
490 /* The rest of the compiler works a bit smoother when we don't have to
491 check for the edge case of do-nothing functions with no basic blocks. */
492 if (count == 0)
493 {
494 emit_insn (gen_rtx_USE (VOIDmode, const0_rtx));
495 count = 1;
496 }
497
498 return count;
499}
dc2ede84 500
d7429b6a
RK
501/* Find all basic blocks of the function whose first insn is F.
502 Store the correct data in the tables that describe the basic blocks,
503 set up the chains of references for each CODE_LABEL, and
d7e4fe8b
RS
504 delete any entire basic blocks that cannot be reached.
505
e881bb1b
RH
506 NONLOCAL_LABEL_LIST is a list of non-local labels in the function. Blocks
507 that are otherwise unreachable may be reachable with a non-local goto.
d7429b6a 508
e881bb1b
RH
509 BB_EH_END is an array in which we record the list of exception regions
510 active at the end of every basic block. */
8329b5ec 511
e881bb1b
RH
512static rtx
513find_basic_blocks_1 (f, bb_eh_end)
514 rtx f;
515 rtx *bb_eh_end;
516{
517 register rtx insn, next;
518 int in_libcall_block = 0;
519 int call_has_abnormal_edge = 0;
520 int i = 0;
521 rtx bb_note = NULL_RTX;
522 rtx eh_list = NULL_RTX;
523 rtx label_value_list = NULL_RTX;
524 rtx head = NULL_RTX;
525 rtx end = NULL_RTX;
526
527 /* We process the instructions in a slightly different way than we did
528 previously. This is so that we see a NOTE_BASIC_BLOCK after we have
529 closed out the previous block, so that it gets attached at the proper
530 place. Since this form should be equivalent to the previous,
531 find_basic_blocks_0 continues to use the old form as a check. */
d7429b6a 532
e881bb1b
RH
533 for (insn = f; insn; insn = next)
534 {
535 enum rtx_code code = GET_CODE (insn);
d7429b6a 536
e881bb1b 537 next = NEXT_INSN (insn);
d7429b6a 538
e881bb1b
RH
539 /* Track when we are inside in LIBCALL block. */
540 if (GET_RTX_CLASS (code) == 'i'
541 && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
542 in_libcall_block = 1;
d7429b6a 543
e881bb1b 544 if (code == CALL_INSN)
e658434c 545 {
e881bb1b
RH
546 /* Record whether this call created an edge. */
547 call_has_abnormal_edge = 0;
548 if (nonlocal_goto_handler_labels)
549 call_has_abnormal_edge = !in_libcall_block;
550 else if (eh_list)
e658434c 551 {
e881bb1b
RH
552 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
553 if (!note || XINT (XEXP (note, 0), 0) != 0)
554 call_has_abnormal_edge = 1;
5c35539b 555 }
e658434c 556 }
d7429b6a 557
e881bb1b 558 switch (code)
e658434c 559 {
e881bb1b
RH
560 case NOTE:
561 {
562 int kind = NOTE_LINE_NUMBER (insn);
563
564 /* Keep a LIFO list of the currently active exception notes. */
565 if (kind == NOTE_INSN_EH_REGION_BEG)
566 eh_list = gen_rtx_INSN_LIST (VOIDmode, insn, eh_list);
567 else if (kind == NOTE_INSN_EH_REGION_END)
568 eh_list = XEXP (eh_list, 1);
569
570 /* Look for basic block notes with which to keep the
571 basic_block_info pointers stable. Unthread the note now;
572 we'll put it back at the right place in create_basic_block.
573 Or not at all if we've already found a note in this block. */
574 else if (kind == NOTE_INSN_BASIC_BLOCK)
575 {
576 if (bb_note == NULL_RTX)
577 bb_note = insn;
578 next = flow_delete_insn (insn);
579 }
e658434c 580
e881bb1b
RH
581 break;
582 }
d7429b6a 583
e881bb1b
RH
584 case CODE_LABEL:
585 /* A basic block starts at a label. If we've closed one off due
586 to a barrier or some such, no need to do it again. */
587 if (head != NULL_RTX)
2ec1535d 588 {
e881bb1b
RH
589 /* While we now have edge lists with which other portions of
590 the compiler might determine a call ending a basic block
591 does not imply an abnormal edge, it will be a bit before
592 everything can be updated. So continue to emit a noop at
593 the end of such a block. */
594 if (GET_CODE (end) == CALL_INSN)
595 {
596 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
597 end = emit_insn_after (nop, end);
598 }
599
600 bb_eh_end[i] = eh_list;
601 create_basic_block (i++, head, end, bb_note);
602 bb_note = NULL_RTX;
2ec1535d 603 }
e881bb1b
RH
604 head = end = insn;
605 break;
d06c6389 606
e881bb1b
RH
607 case JUMP_INSN:
608 /* A basic block ends at a jump. */
609 if (head == NULL_RTX)
610 head = insn;
611 else
612 {
613 /* ??? Make a special check for table jumps. The way this
614 happens is truely and amazingly gross. We are about to
615 create a basic block that contains just a code label and
616 an addr*vec jump insn. Worse, an addr_diff_vec creates
617 its own natural loop.
5c35539b 618
e881bb1b
RH
619 Prevent this bit of brain damage, pasting things together
620 correctly in make_edges.
2c3a56ad 621
e881bb1b
RH
622 The correct solution involves emitting the table directly
623 on the tablejump instruction as a note, or JUMP_LABEL. */
e658434c 624
e881bb1b
RH
625 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
626 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
627 {
628 head = end = NULL;
629 n_basic_blocks--;
630 break;
631 }
632 }
633 end = insn;
634 goto new_bb_inclusive;
d7429b6a 635
e881bb1b
RH
636 case BARRIER:
637 /* A basic block ends at a barrier. It may be that an unconditional
638 jump already closed the basic block -- no need to do it again. */
639 if (head == NULL_RTX)
640 break;
d7429b6a 641
e881bb1b
RH
642 /* While we now have edge lists with which other portions of the
643 compiler might determine a call ending a basic block does not
644 imply an abnormal edge, it will be a bit before everything can
645 be updated. So continue to emit a noop at the end of such a
646 block. */
647 if (GET_CODE (end) == CALL_INSN)
648 {
649 rtx nop = gen_rtx_USE (VOIDmode, const0_rtx);
650 end = emit_insn_after (nop, end);
651 }
652 goto new_bb_exclusive;
653
654 case CALL_INSN:
655 /* A basic block ends at a call that can either throw or
656 do a non-local goto. */
657 if (call_has_abnormal_edge)
658 {
659 new_bb_inclusive:
660 if (head == NULL_RTX)
661 head = insn;
662 end = insn;
663
664 new_bb_exclusive:
665 bb_eh_end[i] = eh_list;
666 create_basic_block (i++, head, end, bb_note);
667 head = end = NULL_RTX;
668 bb_note = NULL_RTX;
669 break;
670 }
671 /* FALLTHRU */
d7429b6a 672
e881bb1b
RH
673 default:
674 if (GET_RTX_CLASS (code) == 'i')
675 {
676 if (head == NULL_RTX)
677 head = insn;
678 end = insn;
679 }
680 break;
681 }
d7429b6a 682
e881bb1b 683 if (GET_RTX_CLASS (code) == 'i')
d7429b6a 684 {
e881bb1b 685 rtx note;
421382ac 686
e881bb1b
RH
687 /* Make a list of all labels referred to other than by jumps
688 (which just don't have the REG_LABEL notes).
2ec1535d 689
e881bb1b
RH
690 Make a special exception for labels followed by an ADDR*VEC,
691 as this would be a part of the tablejump setup code.
421382ac 692
e881bb1b
RH
693 Make a special exception for the eh_return_stub_label, which
694 we know isn't part of any otherwise visible control flow. */
695
696 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
697 if (REG_NOTE_KIND (note) == REG_LABEL)
698 {
699 rtx lab = XEXP (note, 0), next;
700
701 if (lab == eh_return_stub_label)
702 ;
703 else if ((next = next_nonnote_insn (lab)) != NULL
704 && GET_CODE (next) == JUMP_INSN
705 && (GET_CODE (PATTERN (next)) == ADDR_VEC
706 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC))
707 ;
708 else
709 label_value_list
710 = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
711 label_value_list);
d7429b6a 712 }
e881bb1b
RH
713
714 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
715 in_libcall_block = 0;
d7429b6a 716 }
e881bb1b 717 }
d7429b6a 718
e881bb1b
RH
719 if (head != NULL_RTX)
720 {
721 bb_eh_end[i] = eh_list;
722 create_basic_block (i++, head, end, bb_note);
723 }
af14ce9c 724
e881bb1b
RH
725 if (i != n_basic_blocks)
726 abort ();
af14ce9c 727
e881bb1b 728 return label_value_list;
d7429b6a 729}
5ece9746 730
e881bb1b
RH
731/* Create a new basic block consisting of the instructions between
732 HEAD and END inclusive. Reuses the note and basic block struct
733 in BB_NOTE, if any. */
5ece9746 734
e881bb1b
RH
735static void
736create_basic_block (index, head, end, bb_note)
737 int index;
738 rtx head, end, bb_note;
5ece9746 739{
e881bb1b
RH
740 basic_block bb;
741
742 if (bb_note
b3bf5bde 743 && ! RTX_INTEGRATED_P (bb_note)
e881bb1b
RH
744 && (bb = NOTE_BASIC_BLOCK (bb_note)) != NULL
745 && bb->aux == NULL)
5ece9746 746 {
e881bb1b
RH
747 /* If we found an existing note, thread it back onto the chain. */
748
749 if (GET_CODE (head) == CODE_LABEL)
750 add_insn_after (bb_note, head);
751 else
752 {
753 add_insn_before (bb_note, head);
754 head = bb_note;
755 }
5ece9746 756 }
e881bb1b
RH
757 else
758 {
759 /* Otherwise we must create a note and a basic block structure.
760 Since we allow basic block structs in rtl, give the struct
761 the same lifetime by allocating it off the function obstack
762 rather than using malloc. */
8329b5ec 763
e881bb1b
RH
764 bb = (basic_block) obstack_alloc (function_obstack, sizeof (*bb));
765 memset (bb, 0, sizeof (*bb));
421382ac 766
e881bb1b
RH
767 if (GET_CODE (head) == CODE_LABEL)
768 bb_note = emit_note_after (NOTE_INSN_BASIC_BLOCK, head);
769 else
770 {
771 bb_note = emit_note_before (NOTE_INSN_BASIC_BLOCK, head);
772 head = bb_note;
773 }
774 NOTE_BASIC_BLOCK (bb_note) = bb;
775 }
776
777 bb->head = head;
778 bb->end = end;
779 bb->index = index;
780 BASIC_BLOCK (index) = bb;
781
782 /* Tag the block so that we know it has been used when considering
783 other basic block notes. */
784 bb->aux = bb;
421382ac 785}
e881bb1b
RH
786\f
787/* Records the basic block struct in BB_FOR_INSN, for every instruction
788 indexed by INSN_UID. MAX is the size of the array. */
421382ac 789
421382ac 790static void
e881bb1b
RH
791compute_bb_for_insn (bb_for_insn, max)
792 varray_type bb_for_insn;
793 int max;
421382ac 794{
e881bb1b 795 int i;
421382ac 796
e881bb1b
RH
797 for (i = 0; i < n_basic_blocks; ++i)
798 {
799 basic_block bb = BASIC_BLOCK (i);
800 rtx insn, end;
801
802 end = bb->end;
803 insn = bb->head;
804 while (1)
805 {
806 int uid = INSN_UID (insn);
807 if (uid < max)
808 VARRAY_BB (bb_for_insn, uid) = bb;
809 if (insn == end)
810 break;
811 insn = NEXT_INSN (insn);
812 }
813 }
421382ac
BS
814}
815
e881bb1b 816/* Free the memory associated with the edge structures. */
421382ac
BS
817
818static void
e881bb1b 819clear_edges ()
421382ac 820{
e881bb1b
RH
821 int i;
822 edge n, e;
421382ac 823
e881bb1b 824 for (i = 0; i < n_basic_blocks; ++i)
421382ac 825 {
e881bb1b 826 basic_block bb = BASIC_BLOCK (i);
421382ac 827
e881bb1b 828 for (e = bb->succ; e ; e = n)
421382ac 829 {
e881bb1b
RH
830 n = e->succ_next;
831 free (e);
421382ac 832 }
e881bb1b
RH
833
834 bb->succ = 0;
835 bb->pred = 0;
836 }
837
838 for (e = ENTRY_BLOCK_PTR->succ; e ; e = n)
839 {
840 n = e->succ_next;
841 free (e);
421382ac 842 }
e881bb1b
RH
843
844 ENTRY_BLOCK_PTR->succ = 0;
845 EXIT_BLOCK_PTR->pred = 0;
421382ac
BS
846}
847
e881bb1b
RH
848/* Identify the edges between basic blocks.
849
850 NONLOCAL_LABEL_LIST is a list of non-local labels in the function. Blocks
851 that are otherwise unreachable may be reachable with a non-local goto.
852
853 BB_EH_END is an array indexed by basic block number in which we record
854 the list of exception regions active at the end of the basic block. */
855
dc2ede84 856static void
e881bb1b
RH
857make_edges (label_value_list, bb_eh_end)
858 rtx label_value_list;
859 rtx *bb_eh_end;
dc2ede84 860{
e881bb1b
RH
861 int i;
862
863 /* Assume no computed jump; revise as we create edges. */
864 current_function_has_computed_jump = 0;
865
866 /* By nature of the way these get numbered, block 0 is always the entry. */
867 make_edge (ENTRY_BLOCK_PTR, BASIC_BLOCK (0), EDGE_FALLTHRU);
dc2ede84 868
e881bb1b 869 for (i = 0; i < n_basic_blocks; ++i)
421382ac 870 {
e881bb1b
RH
871 basic_block bb = BASIC_BLOCK (i);
872 rtx insn, x, eh_list;
873 enum rtx_code code;
4b523fc4 874 int force_fallthru = 0;
421382ac 875
e881bb1b
RH
876 /* If we have asynchronous exceptions, scan the notes for all exception
877 regions active in the block. In the normal case, we only need the
878 one active at the end of the block, which is bb_eh_end[i]. */
421382ac 879
e881bb1b
RH
880 eh_list = bb_eh_end[i];
881 if (asynchronous_exceptions)
dc2ede84 882 {
e881bb1b 883 for (insn = bb->end; insn != bb->head; insn = PREV_INSN (insn))
dc2ede84 884 {
e881bb1b
RH
885 if (GET_CODE (insn) == NOTE
886 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
887 eh_list = gen_rtx_INSN_LIST (VOIDmode, insn, eh_list);
dc2ede84 888 }
e881bb1b 889 }
dc2ede84 890
e881bb1b
RH
891 /* Now examine the last instruction of the block, and discover the
892 ways we can leave the block. */
893
894 insn = bb->end;
895 code = GET_CODE (insn);
896
897 /* A branch. */
898 if (code == JUMP_INSN)
899 {
900 rtx tmp;
901
902 /* ??? Recognize a tablejump and do the right thing. */
903 if ((tmp = JUMP_LABEL (insn)) != NULL_RTX
904 && (tmp = NEXT_INSN (tmp)) != NULL_RTX
905 && GET_CODE (tmp) == JUMP_INSN
906 && (GET_CODE (PATTERN (tmp)) == ADDR_VEC
907 || GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC))
908 {
909 rtvec vec;
910 int j;
911
912 if (GET_CODE (PATTERN (tmp)) == ADDR_VEC)
913 vec = XVEC (PATTERN (tmp), 0);
914 else
915 vec = XVEC (PATTERN (tmp), 1);
916
917 for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
918 make_label_edge (bb, XEXP (RTVEC_ELT (vec, j), 0), 0);
4b523fc4
RE
919
920 /* Some targets (eg, ARM) emit a conditional jump that also
921 contains the out-of-range target. Scan for these and
922 add an edge if necessary. */
923 if ((tmp = single_set (insn)) != NULL
924 && SET_DEST (tmp) == pc_rtx
925 && GET_CODE (SET_SRC (tmp)) == IF_THEN_ELSE
926 && GET_CODE (XEXP (SET_SRC (tmp), 2)) == LABEL_REF)
927 make_label_edge (bb, XEXP (XEXP (SET_SRC (tmp), 2), 0), 0);
928
929#ifdef CASE_DROPS_THROUGH
930 /* Silly VAXen. The ADDR_VEC is going to be in the way of
931 us naturally detecting fallthru into the next block. */
932 force_fallthru = 1;
933#endif
e881bb1b
RH
934 }
935
936 /* If this is a computed jump, then mark it as reaching
937 everything on the label_value_list and forced_labels list. */
938 else if (computed_jump_p (insn))
939 {
dc2ede84 940 current_function_has_computed_jump = 1;
dc2ede84 941
e881bb1b
RH
942 for (x = label_value_list; x; x = XEXP (x, 1))
943 make_label_edge (bb, XEXP (x, 0), EDGE_ABNORMAL);
944
dc2ede84 945 for (x = forced_labels; x; x = XEXP (x, 1))
e881bb1b 946 make_label_edge (bb, XEXP (x, 0), EDGE_ABNORMAL);
dc2ede84
BS
947 }
948
e881bb1b
RH
949 /* Returns create an exit out. */
950 else if (returnjump_p (insn))
951 make_edge (bb, EXIT_BLOCK_PTR, 0);
952
953 /* Otherwise, we have a plain conditional or unconditional jump. */
954 else
dc2ede84 955 {
e881bb1b
RH
956 if (! JUMP_LABEL (insn))
957 abort ();
958 make_label_edge (bb, JUMP_LABEL (insn), 0);
959 }
960 }
961
962 /* If this is a CALL_INSN, then mark it as reaching the active EH
963 handler for this CALL_INSN. If we're handling asynchronous
964 exceptions then any insn can reach any of the active handlers.
b472794d 965
e881bb1b 966 Also mark the CALL_INSN as reaching any nonlocal goto handler. */
b472794d 967
e881bb1b
RH
968 else if (code == CALL_INSN || asynchronous_exceptions)
969 {
970 int is_call = (code == CALL_INSN ? EDGE_ABNORMAL_CALL : 0);
971 handler_info *ptr;
972
973 /* Use REG_EH_RETHROW and REG_EH_REGION if available. */
974 /* ??? REG_EH_REGION is not generated presently. Is it
975 inteded that there be multiple notes for the regions?
976 or is my eh_list collection redundant with handler linking? */
977
978 x = find_reg_note (insn, REG_EH_RETHROW, 0);
979 if (!x)
980 x = find_reg_note (insn, REG_EH_REGION, 0);
981 if (x)
982 {
983 if (XINT (XEXP (x, 0), 0) != 0)
dc2ede84 984 {
e881bb1b
RH
985 ptr = get_first_handler (XINT (XEXP (x, 0), 0));
986 while (ptr)
dc2ede84 987 {
e881bb1b
RH
988 make_label_edge (bb, ptr->handler_label,
989 EDGE_ABNORMAL | EDGE_EH | is_call);
990 ptr = ptr->next;
dc2ede84
BS
991 }
992 }
e881bb1b
RH
993 }
994 else
995 {
996 for (x = eh_list; x; x = XEXP (x, 1))
dc2ede84 997 {
e881bb1b
RH
998 ptr = get_first_handler (NOTE_BLOCK_NUMBER (XEXP (x, 0)));
999 while (ptr)
1000 {
1001 make_label_edge (bb, ptr->handler_label,
1002 EDGE_ABNORMAL | EDGE_EH | is_call);
1003 ptr = ptr->next;
1004 }
dc2ede84 1005 }
e881bb1b
RH
1006 }
1007
1008 if (code == CALL_INSN && nonlocal_goto_handler_labels)
1009 {
dc2ede84
BS
1010 /* ??? This could be made smarter: in some cases it's possible
1011 to tell that certain calls will not do a nonlocal goto.
1012
1013 For example, if the nested functions that do the nonlocal
1014 gotos do not have their addresses taken, then only calls to
1015 those functions or to other nested functions that use them
1016 could possibly do nonlocal gotos. */
e881bb1b
RH
1017
1018 for (x = nonlocal_goto_handler_labels; x ; x = XEXP (x, 1))
1019 make_label_edge (bb, XEXP (x, 0),
1020 EDGE_ABNORMAL | EDGE_ABNORMAL_CALL);
dc2ede84
BS
1021 }
1022 }
e881bb1b
RH
1023
1024 /* We know something about the structure of the function __throw in
1025 libgcc2.c. It is the only function that ever contains eh_stub
1026 labels. It modifies its return address so that the last block
1027 returns to one of the eh_stub labels within it. So we have to
1028 make additional edges in the flow graph. */
1029 if (i + 1 == n_basic_blocks && eh_return_stub_label != 0)
1030 make_label_edge (bb, eh_return_stub_label, EDGE_EH);
1031
1032 /* Find out if we can drop through to the next block. */
1033 insn = next_nonnote_insn (insn);
4b523fc4 1034 if (!insn || (i + 1 == n_basic_blocks && force_fallthru))
e881bb1b
RH
1035 make_edge (bb, EXIT_BLOCK_PTR, EDGE_FALLTHRU);
1036 else if (i + 1 < n_basic_blocks)
1037 {
1038 rtx tmp = BLOCK_HEAD (i + 1);
1039 if (GET_CODE (tmp) == NOTE)
1040 tmp = next_nonnote_insn (tmp);
4b523fc4 1041 if (force_fallthru || insn == tmp)
e881bb1b
RH
1042 make_edge (bb, BASIC_BLOCK (i + 1), EDGE_FALLTHRU);
1043 }
dc2ede84 1044 }
e881bb1b
RH
1045}
1046
1047/* Create an edge between two basic blocks. FLAGS are auxiliary information
1048 about the edge that is accumulated between calls. */
1049
1050static void
1051make_edge (src, dst, flags)
1052 basic_block src, dst;
1053 int flags;
1054{
1055 edge e;
1056
1057 /* Make sure we don't add duplicate edges. */
1058
1059 for (e = src->succ; e ; e = e->succ_next)
1060 if (e->dest == dst)
1061 {
1062 e->flags |= flags;
1063 return;
1064 }
1065
1066 e = (edge) xcalloc (1, sizeof (*e));
1067
1068 e->succ_next = src->succ;
1069 e->pred_next = dst->pred;
1070 e->src = src;
1071 e->dest = dst;
1072 e->flags = flags;
1073
1074 src->succ = e;
1075 dst->pred = e;
1076}
1077
1078/* Create an edge from a basic block to a label. */
1079
1080static void
1081make_label_edge (src, label, flags)
1082 basic_block src;
1083 rtx label;
1084 int flags;
1085{
1086 if (GET_CODE (label) != CODE_LABEL)
1087 abort ();
1088
1089 /* If the label was never emitted, this insn is junk, but avoid a
1090 crash trying to refer to BLOCK_FOR_INSN (label). This can happen
1091 as a result of a syntax error and a diagnostic has already been
1092 printed. */
1093
1094 if (INSN_UID (label) == 0)
1095 return;
1096
1097 make_edge (src, BLOCK_FOR_INSN (label), flags);
1098}
e6cfb550 1099
e881bb1b
RH
1100/* Identify critical edges and set the bits appropriately. */
1101static void
1102mark_critical_edges ()
1103{
1104 int i, n = n_basic_blocks;
1105 basic_block bb;
1106
1107 /* We begin with the entry block. This is not terribly important now,
1108 but could be if a front end (Fortran) implemented alternate entry
1109 points. */
1110 bb = ENTRY_BLOCK_PTR;
1111 i = -1;
1112
1113 while (1)
e6cfb550 1114 {
e881bb1b
RH
1115 edge e;
1116
1117 /* (1) Critical edges must have a source with multiple successors. */
1118 if (bb->succ && bb->succ->succ_next)
1119 {
1120 for (e = bb->succ; e ; e = e->succ_next)
1121 {
1122 /* (2) Critical edges must have a destination with multiple
1123 predecessors. Note that we know there is at least one
1124 predecessor -- the edge we followed to get here. */
1125 if (e->dest->pred->pred_next)
1126 e->flags |= EDGE_CRITICAL;
1127 else
1128 e->flags &= ~EDGE_CRITICAL;
1129 }
1130 }
1131 else
1132 {
1133 for (e = bb->succ; e ; e = e->succ_next)
1134 e->flags &= ~EDGE_CRITICAL;
1135 }
1136
1137 if (++i >= n)
1138 break;
1139 bb = BASIC_BLOCK (i);
e6cfb550 1140 }
e881bb1b
RH
1141}
1142\f
1143/* Split a (typically critical) edge. Return the new block.
1144 Abort on abnormal edges.
1145
1146 ??? The code generally expects to be called on critical edges.
1147 The case of a block ending in an unconditional jump to a
1148 block with multiple predecessors is not handled optimally. */
1149
1150basic_block
1151split_edge (edge_in)
1152 edge edge_in;
1153{
1154 basic_block old_pred, bb, old_succ;
1155 edge edge_out;
1156 rtx bb_note;
1157 int i;
1158
1159 /* Abnormal edges cannot be split. */
1160 if ((edge_in->flags & EDGE_ABNORMAL) != 0)
1161 abort ();
1162
1163 old_pred = edge_in->src;
1164 old_succ = edge_in->dest;
1165
1166 /* Remove the existing edge from the destination's pred list. */
1167 {
1168 edge *pp;
1169 for (pp = &old_succ->pred; *pp != edge_in; pp = &(*pp)->pred_next)
1170 continue;
1171 *pp = edge_in->pred_next;
1172 }
1173
1174 /* Create the new structures. */
1175 bb = (basic_block) obstack_alloc (function_obstack, sizeof (*bb));
1176 edge_out = (edge) xcalloc (1, sizeof (*edge_out));
1177
1178 memset (bb, 0, sizeof (*bb));
1179 bb->local_set = OBSTACK_ALLOC_REG_SET (function_obstack);
1180 bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (function_obstack);
1181 bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (function_obstack);
1182
1183 /* ??? This info is likely going to be out of date very soon. */
1184 CLEAR_REG_SET (bb->local_set);
1185 if (old_succ->global_live_at_start)
1186 {
1187 COPY_REG_SET (bb->global_live_at_start, old_succ->global_live_at_start);
1188 COPY_REG_SET (bb->global_live_at_end, old_succ->global_live_at_start);
1189 }
1190 else
1191 {
1192 CLEAR_REG_SET (bb->global_live_at_start);
1193 CLEAR_REG_SET (bb->global_live_at_end);
1194 }
1195
1196 /* Wire them up. */
1197 bb->pred = edge_in;
1198 bb->succ = edge_out;
1199 edge_in->dest = bb;
1200 edge_out->src = bb;
1201 edge_out->dest = old_succ;
1202
1203 /* Tricky case -- if there existed a fallthru into the successor
1204 (and we're not it) we must add a new unconditional jump around
1205 the new block we're actually interested in.
1206
1207 Further, if that edge is critical, this means a second new basic
1208 block must be created to hold it. In order to simplify correct
1209 insn placement, do this before we touch the existing basic block
1210 ordering for the block we were really wanting. */
1211 if ((edge_in->flags & EDGE_FALLTHRU) == 0)
1212 {
1213 edge e;
1214 for (e = old_succ->pred; e ; e = e->pred_next)
1215 if (e->flags & EDGE_FALLTHRU)
1216 break;
1217
1218 if (e)
1219 {
1220 basic_block jump_block;
1221 rtx pos;
1222
1223 if ((e->flags & EDGE_CRITICAL) == 0)
1224 {
1225 /* Non critical -- we can simply add a jump to the end
1226 of the existing predecessor. */
1227 jump_block = e->src;
1228 pos = jump_block->end;
1229 }
1230 else
1231 {
1232 /* We need a new block to hold the jump. The simplest
1233 way to do the bulk of the work here is to recursively
1234 call ourselves. */
1235 jump_block = split_edge (e);
1236 e = jump_block->succ;
1237 pos = jump_block->head;
1238 }
1239
1240 /* Now add the jump insn... */
1241 pos = emit_jump_insn_after (gen_jump (old_succ->head), pos);
1242 jump_block->end = pos;
1243 emit_barrier_after (pos);
1244
1245 /* ... and clear fallthru on the outgoing edge. */
1246 e->flags &= ~EDGE_FALLTHRU;
1247
1248 /* Continue splitting the interesting edge. */
1249 }
1250 }
1251
1252 /* Place the new block just in front of the successor. */
1253 VARRAY_GROW (basic_block_info, ++n_basic_blocks);
1254 for (i = n_basic_blocks - 1; i > old_succ->index; --i)
1255 {
1256 basic_block tmp = BASIC_BLOCK (i - 1);
1257 BASIC_BLOCK (i) = tmp;
1258 tmp->index = i;
1259 }
1260 BASIC_BLOCK (i) = bb;
1261 bb->index = i;
1262
1263 /* Create the basic block note. */
1264 bb_note = emit_note_before (NOTE_INSN_BASIC_BLOCK, old_succ->head);
1265 NOTE_BASIC_BLOCK (bb_note) = bb;
1266 bb->head = bb->end = bb_note;
1267
1268 /* Not quite simple -- for non-fallthru edges, we must adjust the
1269 predecessor's jump instruction to target our new block. */
1270 if ((edge_in->flags & EDGE_FALLTHRU) == 0)
1271 {
1272 rtx tmp, insn = old_pred->end;
1273 rtx old_label = old_succ->head;
1274 rtx new_label = gen_label_rtx ();
1275
1276 if (GET_CODE (insn) != JUMP_INSN)
1277 abort ();
1278
1279 /* ??? Recognize a tablejump and adjust all matching cases. */
1280 if ((tmp = JUMP_LABEL (insn)) != NULL_RTX
1281 && (tmp = NEXT_INSN (tmp)) != NULL_RTX
1282 && GET_CODE (tmp) == JUMP_INSN
1283 && (GET_CODE (PATTERN (tmp)) == ADDR_VEC
1284 || GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC))
1285 {
1286 rtvec vec;
1287 int j;
1288
1289 if (GET_CODE (PATTERN (tmp)) == ADDR_VEC)
1290 vec = XVEC (PATTERN (tmp), 0);
1291 else
1292 vec = XVEC (PATTERN (tmp), 1);
1293
1294 for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
1295 if (XEXP (RTVEC_ELT (vec, j), 0) == old_label)
1296 {
1297 RTVEC_ELT (vec, j) = gen_rtx_LABEL_REF (VOIDmode, new_label);
1298 --LABEL_NUSES (old_label);
1299 ++LABEL_NUSES (new_label);
1300 }
1301 }
1302 else
1303 {
1304 /* This would have indicated an abnormal edge. */
1305 if (computed_jump_p (insn))
1306 abort ();
1307
1308 /* A return instruction can't be redirected. */
1309 if (returnjump_p (insn))
1310 abort ();
1311
1312 /* If the insn doesn't go where we think, we're confused. */
1313 if (JUMP_LABEL (insn) != old_label)
1314 abort ();
1315
1316 redirect_jump (insn, new_label);
1317 }
1318
1319 emit_label_before (new_label, bb_note);
1320 bb->head = new_label;
1321 }
1322
1323 /* In all cases, the new block falls through to the successor. */
1324 edge_out->flags = EDGE_FALLTHRU;
1325
1326 return bb;
1327}
1328
1329/* Queue instructions for insertion on an edge between two basic blocks.
1330 The new instructions and basic blocks (if any) will not appear in the
1331 CFG until commit_edge_insertions is called. */
1332
1333void
1334insert_insn_on_edge (pattern, e)
1335 rtx pattern;
1336 edge e;
1337{
1338 /* We cannot insert instructions on an abnormal critical edge.
1339 It will be easier to find the culprit if we die now. */
1340 if ((e->flags & (EDGE_ABNORMAL|EDGE_CRITICAL))
1341 == (EDGE_ABNORMAL|EDGE_CRITICAL))
1342 abort ();
1343
1344 if (e->insns == NULL_RTX)
1345 start_sequence ();
1346 else
1347 push_to_sequence (e->insns);
1348
1349 emit_insn (pattern);
1350
1351 e->insns = get_insns ();
1352 end_sequence();
1353}
1354
1355/* Update the CFG for the instructions queued on edge E. */
1356
1357static void
1358commit_one_edge_insertion (e)
1359 edge e;
1360{
1361 rtx before = NULL_RTX, after = NULL_RTX, tmp;
1362 basic_block bb;
1363
1364 /* Figure out where to put these things. If the destination has
1365 one predecessor, insert there. Except for the exit block. */
1366 if (e->dest->pred->pred_next == NULL
1367 && e->dest != EXIT_BLOCK_PTR)
1368 {
1369 bb = e->dest;
1370
1371 /* Get the location correct wrt a code label, and "nice" wrt
1372 a basic block note, and before everything else. */
1373 tmp = bb->head;
1374 if (GET_CODE (tmp) == CODE_LABEL)
1375 tmp = NEXT_INSN (tmp);
1376 if (GET_CODE (tmp) == NOTE
1377 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BASIC_BLOCK)
1378 tmp = NEXT_INSN (tmp);
1379 if (tmp == bb->head)
1380 before = tmp;
1381 else
1382 after = PREV_INSN (tmp);
1383 }
1384
1385 /* If the source has one successor and the edge is not abnormal,
1386 insert there. Except for the entry block. */
1387 else if ((e->flags & EDGE_ABNORMAL) == 0
1388 && e->src->succ->succ_next == NULL
1389 && e->src != ENTRY_BLOCK_PTR)
1390 {
1391 bb = e->src;
1392 if (GET_CODE (bb->end) == JUMP_INSN)
1393 {
1394 /* ??? Is it possible to wind up with non-simple jumps? Perhaps
1395 a jump with delay slots already filled? */
1396 if (! simplejump_p (bb->end))
1397 abort ();
1398
1399 before = bb->end;
1400 }
1401 else
1402 {
1403 /* We'd better be fallthru, or we've lost track of what's what. */
1404 if ((e->flags & EDGE_FALLTHRU) == 0)
1405 abort ();
1406
1407 after = bb->end;
1408 }
1409 }
1410
1411 /* Otherwise we must split the edge. */
1412 else
1413 {
1414 bb = split_edge (e);
1415 after = bb->end;
1416 }
1417
1418 /* Now that we've found the spot, do the insertion. */
1419 tmp = e->insns;
1420 e->insns = NULL_RTX;
1421 if (before)
1422 {
1423 emit_insns_before (tmp, before);
1424 if (before == bb->head)
1425 bb->head = before;
1426 }
1427 else
1428 {
1429 tmp = emit_insns_after (tmp, after);
1430 if (after == bb->end)
1431 bb->end = tmp;
1432 }
1433}
1434
1435/* Update the CFG for all queued instructions. */
1436
1437void
1438commit_edge_insertions ()
1439{
1440 int i;
1441 basic_block bb;
1442
1443 i = -1;
1444 bb = ENTRY_BLOCK_PTR;
1445 while (1)
1446 {
1447 edge e, next;
1448
1449 for (e = bb->succ; e ; e = next)
1450 {
1451 next = e->succ_next;
1452 if (e->insns)
1453 commit_one_edge_insertion (e);
1454 }
1455
1456 if (++i >= n_basic_blocks)
1457 break;
1458 bb = BASIC_BLOCK (i);
1459 }
1460}
1461\f
1462/* Delete all unreachable basic blocks. */
1463
1464static void
1465delete_unreachable_blocks ()
1466{
1467 basic_block *worklist, *tos;
1468 int deleted_handler;
1469 edge e;
1470 int i, n;
1471
1472 n = n_basic_blocks;
1473 tos = worklist = (basic_block *) alloca (sizeof (basic_block) * n);
1474
1475 /* Use basic_block->aux as a marker. Clear them all. */
1476
1477 for (i = 0; i < n; ++i)
1478 BASIC_BLOCK (i)->aux = NULL;
1479
1480 /* Add our starting points to the worklist. Almost always there will
1481 be only one. It isn't inconcievable that we might one day directly
1482 support Fortran alternate entry points. */
1483
1484 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
aa3d4bf9
RH
1485 {
1486 *tos++ = e->dest;
1487
1488 /* Mark the block with a handy non-null value. */
1489 e->dest->aux = e;
1490 }
e881bb1b
RH
1491
1492 /* Iterate: find everything reachable from what we've already seen. */
1493
1494 while (tos != worklist)
1495 {
1496 basic_block b = *--tos;
1497
e881bb1b
RH
1498 for (e = b->succ; e ; e = e->succ_next)
1499 if (!e->dest->aux)
aa3d4bf9
RH
1500 {
1501 *tos++ = e->dest;
1502 e->dest->aux = e;
1503 }
e881bb1b
RH
1504 }
1505
1506 /* Delete all unreachable basic blocks. Count down so that we don't
1507 interfere with the block renumbering that happens in delete_block. */
1508
1509 deleted_handler = 0;
1510
1511 for (i = n - 1; i >= 0; --i)
1512 {
1513 basic_block b = BASIC_BLOCK (i);
1514
1515 if (b->aux != NULL)
1516 /* This block was found. Tidy up the mark. */
1517 b->aux = NULL;
1518 else
1519 deleted_handler |= delete_block (b);
1520 }
1521
1522 /* Fix up edges that now fall through, or rather should now fall through
1523 but previously required a jump around now deleted blocks. Simplify
1524 the search by only examining blocks numerically adjacent, since this
1525 is how find_basic_blocks created them. */
1526
1527 for (i = 1; i < n_basic_blocks; ++i)
1528 {
1529 basic_block b = BASIC_BLOCK (i - 1);
1530 basic_block c = BASIC_BLOCK (i);
1531 edge s;
1532
1533 /* We only need care for simple unconditional jumps, which implies
1534 a single successor. */
1535 if ((s = b->succ) != NULL
1536 && s->succ_next == NULL
1537 && s->dest == c
1538 && ! (s->flags & EDGE_FALLTHRU))
1539 tidy_fallthru_edge (s, b, c);
1540 }
1541
1542 /* Attempt to merge blocks as made possible by edge removal. If a block
1543 has only one successor, and the successor has only one predecessor,
1544 they may be combined. */
1545
1546 for (i = 0; i < n_basic_blocks; )
1547 {
1548 basic_block c, b = BASIC_BLOCK (i);
1549 edge s;
1550
1551 /* A loop because chains of blocks might be combineable. */
1552 while ((s = b->succ) != NULL
1553 && s->succ_next == NULL
1554 && (c = s->dest) != EXIT_BLOCK_PTR
1555 && c->pred->pred_next == NULL
1556 && merge_blocks (s, b, c))
1557 continue;
1558
1559 /* Don't get confused by the index shift caused by deleting blocks. */
1560 i = b->index + 1;
1561 }
1562
1563 /* If we deleted an exception handler, we may have EH region begin/end
1564 blocks to remove as well. */
1565 if (deleted_handler)
1566 delete_eh_regions ();
1567}
1568
1569/* Find EH regions for which there is no longer a handler, and delete them. */
1570
1571static void
1572delete_eh_regions ()
1573{
1574 rtx insn;
1575
1576 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1577 if (GET_CODE (insn) == NOTE)
1578 {
1579 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG) ||
1580 (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END))
1581 {
1582 int num = CODE_LABEL_NUMBER (insn);
1583 /* A NULL handler indicates a region is no longer needed */
1584 if (get_first_handler (num) == NULL)
1585 {
1586 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1587 NOTE_SOURCE_FILE (insn) = 0;
1588 }
1589 }
1590 }
1591}
1592
1593/* Return true if NOTE is not one of the ones that must be kept paired,
1594 so that we may simply delete them. */
1595
1596static int
1597delete_note_p (note)
1598 rtx note;
1599{
1600 return (NOTE_LINE_NUMBER (note) == NOTE_INSN_DELETED
1601 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BASIC_BLOCK);
1602}
1603
1604/* Unlink a chain of insns between START and FINISH, leaving notes
1605 that must be paired. */
1606
1607static void
1608delete_insn_chain (start, finish)
1609 rtx start, finish;
1610{
1611 /* Unchain the insns one by one. It would be quicker to delete all
1612 of these with a single unchaining, rather than one at a time, but
1613 we need to keep the NOTE's. */
1614
1615 rtx next;
1616
1617 while (1)
1618 {
1619 next = NEXT_INSN (start);
1620 if (GET_CODE (start) != NOTE || delete_note_p (start))
1621 next = flow_delete_insn (start);
1622
1623 if (start == finish)
1624 break;
1625 start = next;
1626 }
1627}
1628
1629/* Delete the insns in a (non-live) block. We physically delete every
1630 non-deleted-note insn, and update the flow graph appropriately.
1631
1632 Return nonzero if we deleted an exception handler. */
1633
1634/* ??? Preserving all such notes strikes me as wrong. It would be nice
1635 to post-process the stream to remove empty blocks, loops, ranges, etc. */
1636
1637static int
1638delete_block (b)
1639 basic_block b;
1640{
1641 int deleted_handler = 0;
1642 rtx insn, end;
1643
1644 /* If the head of this block is a CODE_LABEL, then it might be the
1645 label for an exception handler which can't be reached.
1646
1647 We need to remove the label from the exception_handler_label list
1648 and remove the associated NOTE_EH_REGION_BEG and NOTE_EH_REGION_END
1649 notes. */
1650
1651 insn = b->head;
1652 if (GET_CODE (insn) == CODE_LABEL)
1653 {
1654 rtx x, *prev = &exception_handler_labels;
1655
1656 for (x = exception_handler_labels; x; x = XEXP (x, 1))
1657 {
1658 if (XEXP (x, 0) == insn)
1659 {
1660 /* Found a match, splice this label out of the EH label list. */
1661 *prev = XEXP (x, 1);
1662 XEXP (x, 1) = NULL_RTX;
1663 XEXP (x, 0) = NULL_RTX;
1664
1665 /* Remove the handler from all regions */
1666 remove_handler (insn);
1667 deleted_handler = 1;
1668 break;
1669 }
1670 prev = &XEXP (x, 1);
1671 }
1672
1673 /* This label may be referenced by code solely for its value, or
1674 referenced by static data, or something. We have determined
1675 that it is not reachable, but cannot delete the label itself.
1676 Save code space and continue to delete the balance of the block,
1677 along with properly updating the cfg. */
1678 if (!can_delete_label_p (insn))
1679 {
1680 /* If we've only got one of these, skip the whole deleting
1681 insns thing. */
1682 if (insn == b->end)
1683 goto no_delete_insns;
1684 insn = NEXT_INSN (insn);
1685 }
1686 }
1687
1688 /* Selectively unlink the insn chain. Include any BARRIER that may
1689 follow the basic block. */
1690 end = next_nonnote_insn (b->end);
1691 if (!end || GET_CODE (end) != BARRIER)
1692 end = b->end;
1693 delete_insn_chain (insn, end);
1694
1695no_delete_insns:
1696
1697 /* Remove the edges into and out of this block. Note that there may
1698 indeed be edges in, if we are removing an unreachable loop. */
1699 {
1700 edge e, next, *q;
1701
1702 for (e = b->pred; e ; e = next)
1703 {
1704 for (q = &e->src->succ; *q != e; q = &(*q)->succ_next)
1705 continue;
1706 *q = e->succ_next;
1707 next = e->pred_next;
1708 free (e);
1709 }
1710 for (e = b->succ; e ; e = next)
1711 {
1712 for (q = &e->dest->pred; *q != e; q = &(*q)->pred_next)
1713 continue;
1714 *q = e->pred_next;
1715 next = e->succ_next;
1716 free (e);
1717 }
1718
1719 b->pred = NULL;
1720 b->succ = NULL;
1721 }
1722
1723 /* Remove the basic block from the array, and compact behind it. */
1724 expunge_block (b);
1725
1726 return deleted_handler;
1727}
1728
1729/* Remove block B from the basic block array and compact behind it. */
1730
1731static void
1732expunge_block (b)
1733 basic_block b;
1734{
1735 int i, n = n_basic_blocks;
1736
1737 for (i = b->index; i + 1 < n; ++i)
1738 {
1739 basic_block x = BASIC_BLOCK (i + 1);
1740 BASIC_BLOCK (i) = x;
1741 x->index = i;
1742 }
1743
1744 basic_block_info->num_elements--;
1745 n_basic_blocks--;
1746}
1747
1748/* Delete INSN by patching it out. Return the next insn. */
1749
1750static rtx
1751flow_delete_insn (insn)
1752 rtx insn;
1753{
1754 rtx prev = PREV_INSN (insn);
1755 rtx next = NEXT_INSN (insn);
1756
1757 PREV_INSN (insn) = NULL_RTX;
1758 NEXT_INSN (insn) = NULL_RTX;
1759
1760 if (prev)
1761 NEXT_INSN (prev) = next;
1762 if (next)
1763 PREV_INSN (next) = prev;
1764 else
1765 set_last_insn (prev);
e6cfb550 1766
e881bb1b
RH
1767 /* If deleting a jump, decrement the use count of the label. Deleting
1768 the label itself should happen in the normal course of block merging. */
1769 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
1770 LABEL_NUSES (JUMP_LABEL (insn))--;
1771
1772 return next;
d7429b6a 1773}
8329b5ec 1774
e881bb1b
RH
1775/* True if a given label can be deleted. */
1776
1777static int
1778can_delete_label_p (label)
1779 rtx label;
dc2ede84 1780{
e881bb1b 1781 rtx x;
dc2ede84 1782
e881bb1b
RH
1783 if (LABEL_PRESERVE_P (label))
1784 return 0;
421382ac 1785
e881bb1b
RH
1786 for (x = forced_labels; x ; x = XEXP (x, 1))
1787 if (label == XEXP (x, 0))
1788 return 0;
1789 for (x = label_value_list; x ; x = XEXP (x, 1))
1790 if (label == XEXP (x, 0))
1791 return 0;
1792 for (x = exception_handler_labels; x ; x = XEXP (x, 1))
1793 if (label == XEXP (x, 0))
1794 return 0;
dc2ede84 1795
e881bb1b
RH
1796 return 1;
1797}
421382ac 1798
e881bb1b
RH
1799/* Blocks A and B are to be merged into a single block. The insns
1800 are already contiguous, hence `nomove'. */
421382ac 1801
e881bb1b
RH
1802static void
1803merge_blocks_nomove (a, b)
1804 basic_block a, b;
1805{
1806 edge e;
1807 rtx insn;
1808 int done = 0;
421382ac 1809
e881bb1b
RH
1810 /* If there was a jump out of A, delete it. */
1811 if (GET_CODE (a->end) == JUMP_INSN)
1812 {
1813 /* If the jump was the only insn in A, turn the jump into a deleted
1814 note, since we may yet not be able to merge the blocks. */
1815 if (a->end == a->head)
421382ac 1816 {
e881bb1b
RH
1817 PUT_CODE (a->head, NOTE);
1818 NOTE_LINE_NUMBER (a->head) = NOTE_INSN_DELETED;
1819 NOTE_SOURCE_FILE (a->head) = 0;
1820 }
1821 else
1822 {
1823 rtx tmp = a->end;
86879c21 1824
e881bb1b 1825 a->end = prev_nonnote_insn (tmp);
86879c21
JL
1826
1827#ifdef HAVE_cc0
1828 /* If this was a conditional jump, we need to also delete
1829 the insn that set cc0. */
1830 if (! simplejump_p (tmp) && condjump_p (tmp))
1831 {
1832 PUT_CODE (PREV_INSN (tmp), NOTE);
1833 NOTE_LINE_NUMBER (PREV_INSN (tmp)) = NOTE_INSN_DELETED;
1834 NOTE_SOURCE_FILE (PREV_INSN (tmp)) = 0;
1835 }
1836#endif
1837
e881bb1b 1838 flow_delete_insn (tmp);
421382ac 1839 }
421382ac 1840 }
421382ac 1841
e881bb1b
RH
1842 /* By definition, there should only be one successor of A, and that is
1843 B. Free that edge struct. */
1844 free (a->succ);
1845
1846 /* Adjust the edges out of B for the new owner. */
1847 for (e = b->succ; e ; e = e->succ_next)
1848 e->src = a;
1849 a->succ = b->succ;
1850
1851 /* If there was a CODE_LABEL beginning B, delete it. */
1852 insn = b->head;
1853 if (GET_CODE (insn) == CODE_LABEL)
1854 {
1855 /* Detect basic blocks with nothing but a label. This can happen
1856 in particular at the end of a function. */
1857 if (insn == b->end)
1858 done = 1;
1859 insn = flow_delete_insn (insn);
1860 }
1861
1862 /* Delete the basic block note. */
1863 if (GET_CODE (insn) == NOTE
1864 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK)
1865 {
1866 if (insn == b->end)
1867 done = 1;
1868 insn = flow_delete_insn (insn);
1869 }
1870
1871 /* Reassociate the insns of B with A. */
1872 if (!done)
1873 {
1874 BLOCK_FOR_INSN (insn) = a;
1875 while (insn != b->end)
dc2ede84 1876 {
e881bb1b
RH
1877 insn = NEXT_INSN (insn);
1878 BLOCK_FOR_INSN (insn) = a;
dc2ede84 1879 }
e881bb1b
RH
1880 a->end = insn;
1881 }
1882
1883 /* Compact the basic block array. */
1884 expunge_block (b);
dc2ede84
BS
1885}
1886
e881bb1b
RH
1887/* Attempt to merge basic blocks that are potentially non-adjacent.
1888 Return true iff the attempt succeeded. */
dc2ede84 1889
dc2ede84 1890static int
e881bb1b
RH
1891merge_blocks (e, b, c)
1892 edge e;
1893 basic_block b, c;
dc2ede84 1894{
e881bb1b
RH
1895 /* If B has a fallthru edge to C, no need to move anything. */
1896 if (!(e->flags & EDGE_FALLTHRU))
1897 {
1898 /* ??? From here on out we must make sure to not munge nesting
1899 of exception regions and lexical blocks. Need to think about
1900 these cases before this gets implemented. */
1901 return 0;
1902
1903 /* If C has an outgoing fallthru, and B does not have an incoming
1904 fallthru, move B before C. The later clause is somewhat arbitrary,
1905 but avoids modifying blocks other than the two we've been given. */
1906
1907 /* Otherwise, move C after B. If C had a fallthru, which doesn't
1908 happen to be the physical successor to B, insert an unconditional
1909 branch. If C already ended with a conditional branch, the new
1910 jump must go in a new basic block D. */
1911 }
dc2ede84 1912
e881bb1b
RH
1913 /* If a label still appears somewhere, we cannot delete the label, which
1914 means we cannot merge the blocks. We have still won a tad by tidying
1915 the interface between the two blocks. */
1916 if (GET_CODE (c->head) == CODE_LABEL
1917 && ! can_delete_label_p (c->head))
dc2ede84 1918 {
e881bb1b
RH
1919 tidy_fallthru_edge (e, b, c);
1920 return 0;
1921 }
421382ac 1922
e881bb1b
RH
1923 merge_blocks_nomove (b, c);
1924 return 1;
1925}
421382ac 1926
e881bb1b
RH
1927/* The given edge should potentially a fallthru edge. If that is in
1928 fact true, delete the unconditional jump and barriers that are in
1929 the way. */
1930
1931static void
1932tidy_fallthru_edge (e, b, c)
1933 edge e;
1934 basic_block b, c;
1935{
86a1db60 1936 rtx q, h;
e881bb1b
RH
1937
1938 /* ??? In a late-running flow pass, other folks may have deleted basic
1939 blocks by nopping out blocks, leaving multiple BARRIERs between here
1940 and the target label. They ought to be chastized and fixed.
1941
1942 In the mean time, search for the last barrier in a sequence of
1943 barriers and notes. */
dc2ede84 1944
e881bb1b 1945 q = NEXT_INSN (b->end);
86a1db60
RH
1946 if (q && GET_CODE (q) == NOTE)
1947 q = next_nonnote_insn (q);
1948 while (q && GET_CODE (q) == BARRIER)
1949 q = next_nonnote_insn (q);
421382ac 1950
e881bb1b
RH
1951 /* Assert that we now actually do fall through. */
1952 h = c->head;
1953 if (GET_CODE (h) == NOTE)
1954 h = next_nonnote_insn (h);
1955 if (q != h)
1956 return;
421382ac 1957
e881bb1b
RH
1958 /* Remove what will soon cease being the jump insn from the source block.
1959 If block B consisted only of this single jump, turn it into a deleted
1960 note. */
1961 q = b->end;
1962 if (GET_CODE (q) == JUMP_INSN)
421382ac 1963 {
86a1db60
RH
1964#ifdef HAVE_cc0
1965 /* If this was a conditional jump, we need to also delete
1966 the insn that set cc0. */
1967 if (! simplejump_p (q) && condjump_p (q))
1968 q = PREV_INSN (q);
1969#endif
1970
e881bb1b
RH
1971 if (b->head == q)
1972 {
1973 PUT_CODE (q, NOTE);
1974 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1975 NOTE_SOURCE_FILE (q) = 0;
1976 }
e3f6ee23 1977 else
e881bb1b 1978 b->end = q = PREV_INSN (q);
421382ac 1979 }
421382ac 1980
e881bb1b 1981 /* Selectively unlink the sequence. */
86a1db60
RH
1982 if (q != PREV_INSN (c->head))
1983 delete_insn_chain (NEXT_INSN (q), PREV_INSN (c->head));
b7f7462b 1984
e881bb1b
RH
1985 e->flags |= EDGE_FALLTHRU;
1986}
dc2ede84 1987
e881bb1b
RH
1988/* Discover and record the loop depth at the head of each basic block. */
1989
1990static void
1991calculate_loop_depth (insns)
1992 rtx insns;
1993{
1994 basic_block bb;
1995 rtx insn;
1996 int i = 0, depth = 1;
dc2ede84 1997
e881bb1b
RH
1998 bb = BASIC_BLOCK (i);
1999 for (insn = insns; insn ; insn = NEXT_INSN (insn))
dc2ede84 2000 {
e881bb1b
RH
2001 if (insn == bb->head)
2002 {
2003 bb->loop_depth = depth;
2004 if (++i >= n_basic_blocks)
dc2ede84 2005 break;
e881bb1b
RH
2006 bb = BASIC_BLOCK (i);
2007 }
dc2ede84 2008
e881bb1b
RH
2009 if (GET_CODE (insn) == NOTE)
2010 {
2011 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2012 depth++;
2013 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2014 depth--;
2015
2016 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. */
2017 if (depth == 0)
2018 abort ();
2019 }
2020 }
dc2ede84 2021}
d7429b6a 2022\f
5ece9746
JL
2023/* Perform data flow analysis.
2024 F is the first insn of the function and NREGS the number of register numbers
2025 in use. */
2026
2027void
2028life_analysis (f, nregs, file)
2029 rtx f;
2030 int nregs;
2031 FILE *file;
2032{
5ece9746 2033#ifdef ELIMINABLE_REGS
ecb06768 2034 register size_t i;
5ece9746
JL
2035 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
2036#endif
2037
2038 /* Record which registers will be eliminated. We use this in
2039 mark_used_regs. */
2040
2041 CLEAR_HARD_REG_SET (elim_reg_set);
2042
2043#ifdef ELIMINABLE_REGS
2044 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
2045 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
2046#else
2047 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
2048#endif
2049
e881bb1b
RH
2050 /* Allocate a bitmap to be filled in by record_volatile_insns. */
2051 uid_volatile = BITMAP_ALLOCA ();
2052
db3a887b
CB
2053 /* We want alias analysis information for local dead store elimination. */
2054 init_alias_analysis ();
5ece9746 2055 life_analysis_1 (f, nregs);
db3a887b
CB
2056 end_alias_analysis ();
2057
5ece9746
JL
2058 if (file)
2059 dump_flow_info (file);
2060
e881bb1b 2061 BITMAP_FREE (uid_volatile);
5ece9746
JL
2062 free_basic_block_vars (1);
2063}
2064
2065/* Free the variables allocated by find_basic_blocks.
2066
e881bb1b 2067 KEEP_HEAD_END_P is non-zero if basic_block_info is not to be freed. */
5ece9746
JL
2068
2069void
2070free_basic_block_vars (keep_head_end_p)
2071 int keep_head_end_p;
2072{
e881bb1b 2073 if (basic_block_for_insn)
5ece9746 2074 {
e881bb1b
RH
2075 VARRAY_FREE (basic_block_for_insn);
2076 basic_block_for_insn = NULL;
5ece9746
JL
2077 }
2078
e881bb1b 2079 if (! keep_head_end_p)
5ece9746 2080 {
e881bb1b
RH
2081 clear_edges ();
2082 VARRAY_FREE (basic_block_info);
2083 n_basic_blocks = 0;
5ece9746
JL
2084 }
2085}
2086
dc2ede84
BS
2087/* Return nonzero if the destination of SET equals the source. */
2088static int
2089set_noop_p (set)
2090 rtx set;
2091{
2092 rtx src = SET_SRC (set);
2093 rtx dst = SET_DEST (set);
2094 if (GET_CODE (src) == REG && GET_CODE (dst) == REG
2095 && REGNO (src) == REGNO (dst))
2096 return 1;
2097 if (GET_CODE (src) != SUBREG || GET_CODE (dst) != SUBREG
2098 || SUBREG_WORD (src) != SUBREG_WORD (dst))
2099 return 0;
2100 src = SUBREG_REG (src);
2101 dst = SUBREG_REG (dst);
2102 if (GET_CODE (src) == REG && GET_CODE (dst) == REG
2103 && REGNO (src) == REGNO (dst))
2104 return 1;
2105 return 0;
2106}
2107
2108/* Return nonzero if an insn consists only of SETs, each of which only sets a
2109 value to itself. */
2110static int
2111noop_move_p (insn)
2112 rtx insn;
2113{
2114 rtx pat = PATTERN (insn);
2115
2116 /* Insns carrying these notes are useful later on. */
2117 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
2118 return 0;
2119
2120 if (GET_CODE (pat) == SET && set_noop_p (pat))
2121 return 1;
2122
2123 if (GET_CODE (pat) == PARALLEL)
2124 {
2125 int i;
2126 /* If nothing but SETs of registers to themselves,
2127 this insn can also be deleted. */
2128 for (i = 0; i < XVECLEN (pat, 0); i++)
2129 {
2130 rtx tem = XVECEXP (pat, 0, i);
2131
2132 if (GET_CODE (tem) == USE
2133 || GET_CODE (tem) == CLOBBER)
2134 continue;
2135
2136 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
2137 return 0;
2138 }
2139
2140 return 1;
2141 }
2142 return 0;
2143}
2144
fdb8a883
JW
2145static void
2146notice_stack_pointer_modification (x, pat)
2147 rtx x;
2148 rtx pat ATTRIBUTE_UNUSED;
2149{
2150 if (x == stack_pointer_rtx
2151 /* The stack pointer is only modified indirectly as the result
2152 of a push until later in flow. See the comments in rtl.texi
2153 regarding Embedded Side-Effects on Addresses. */
2154 || (GET_CODE (x) == MEM
2155 && (GET_CODE (XEXP (x, 0)) == PRE_DEC
2156 || GET_CODE (XEXP (x, 0)) == PRE_INC
2157 || GET_CODE (XEXP (x, 0)) == POST_DEC
2158 || GET_CODE (XEXP (x, 0)) == POST_INC)
2159 && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx))
2160 current_function_sp_is_unchanging = 0;
2161}
2162
dc2ede84
BS
2163/* Record which insns refer to any volatile memory
2164 or for any reason can't be deleted just because they are dead stores.
fdb8a883
JW
2165 Also, delete any insns that copy a register to itself.
2166 And see if the stack pointer is modified. */
dc2ede84
BS
2167static void
2168record_volatile_insns (f)
2169 rtx f;
2170{
2171 rtx insn;
2172 for (insn = f; insn; insn = NEXT_INSN (insn))
2173 {
2174 enum rtx_code code1 = GET_CODE (insn);
2175 if (code1 == CALL_INSN)
e881bb1b 2176 SET_INSN_VOLATILE (insn);
dc2ede84
BS
2177 else if (code1 == INSN || code1 == JUMP_INSN)
2178 {
2179 if (GET_CODE (PATTERN (insn)) != USE
2180 && volatile_refs_p (PATTERN (insn)))
e881bb1b 2181 SET_INSN_VOLATILE (insn);
dc2ede84
BS
2182
2183 /* A SET that makes space on the stack cannot be dead.
2184 (Such SETs occur only for allocating variable-size data,
2185 so they will always have a PLUS or MINUS according to the
2186 direction of stack growth.)
2187 Even if this function never uses this stack pointer value,
2188 signal handlers do! */
2189 else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET
2190 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
2191#ifdef STACK_GROWS_DOWNWARD
2192 && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS
2193#else
2194 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
2195#endif
2196 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx)
e881bb1b 2197 SET_INSN_VOLATILE (insn);
dc2ede84
BS
2198
2199 /* Delete (in effect) any obvious no-op moves. */
2200 else if (noop_move_p (insn))
2201 {
2202 PUT_CODE (insn, NOTE);
2203 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2204 NOTE_SOURCE_FILE (insn) = 0;
2205 }
2206 }
fdb8a883
JW
2207
2208 /* Check if insn modifies the stack pointer. */
2209 if ( current_function_sp_is_unchanging
2210 && GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2211 note_stores (PATTERN (insn), notice_stack_pointer_modification);
dc2ede84
BS
2212 }
2213}
2214
2215/* Mark those regs which are needed at the end of the function as live
2216 at the end of the last basic block. */
2217static void
2218mark_regs_live_at_end (set)
2219 regset set;
2220{
2221 int i;
2222
e881bb1b
RH
2223 /* If exiting needs the right stack value, consider the stack pointer
2224 live at the end of the function. */
dc2ede84
BS
2225 if (! EXIT_IGNORE_STACK
2226 || (! FRAME_POINTER_REQUIRED
2227 && ! current_function_calls_alloca
fdb8a883
JW
2228 && flag_omit_frame_pointer)
2229 || current_function_sp_is_unchanging)
e881bb1b
RH
2230 {
2231 SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM);
2232 }
dc2ede84 2233
e881bb1b 2234 /* Mark the frame pointer if needed at the end of the function. If
dc2ede84
BS
2235 we end up eliminating it, it will be removed from the live list
2236 of each basic block by reload. */
2237
2238 SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM);
2239#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2240 /* If they are different, also mark the hard frame pointer as live */
2241 SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM);
2242#endif
2243
e881bb1b 2244 /* Mark all global registers, and all registers used by the epilogue
dc2ede84
BS
2245 as being live at the end of the function since they may be
2246 referenced by our caller. */
2247 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2248 if (global_regs[i]
2249#ifdef EPILOGUE_USES
2250 || EPILOGUE_USES (i)
2251#endif
2252 )
2253 SET_REGNO_REG_SET (set, i);
e881bb1b
RH
2254
2255 /* ??? Mark function return value here rather than as uses. */
dc2ede84
BS
2256}
2257
d7429b6a
RK
2258/* Determine which registers are live at the start of each
2259 basic block of the function whose first insn is F.
2260 NREGS is the number of registers used in F.
2261 We allocate the vector basic_block_live_at_start
2262 and the regsets that it points to, and fill them with the data.
2263 regset_size and regset_bytes are also set here. */
2264
2265static void
5ece9746 2266life_analysis_1 (f, nregs)
d7429b6a
RK
2267 rtx f;
2268 int nregs;
2269{
d7429b6a
RK
2270 int first_pass;
2271 int changed;
d7429b6a 2272 register int i;
6764d250 2273 char save_regs_ever_live[FIRST_PSEUDO_REGISTER];
e881bb1b 2274 regset *new_live_at_end;
d7429b6a
RK
2275
2276 struct obstack flow_obstack;
2277
2278 gcc_obstack_init (&flow_obstack);
2279
2280 max_regno = nregs;
2281
d7429b6a
RK
2282 /* Allocate and zero out many data structures
2283 that will record the data from lifetime analysis. */
2284
2285 allocate_for_life_analysis ();
2286
2287 reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
e881bb1b 2288 memset (reg_next_use, 0, nregs * sizeof (rtx));
d7429b6a 2289
e881bb1b 2290 /* Set up regset-vectors used internally within this function.
d7429b6a
RK
2291 Their meanings are documented above, with their declarations. */
2292
e881bb1b
RH
2293 new_live_at_end = (regset *) alloca ((n_basic_blocks + 1) * sizeof (regset));
2294 init_regset_vector (new_live_at_end, n_basic_blocks + 1, &flow_obstack);
4c9a05bc 2295
e881bb1b
RH
2296 /* Stick these vectors into the AUX field of the basic block, so that
2297 we don't have to keep going through the index. */
d7429b6a 2298
e881bb1b
RH
2299 for (i = 0; i < n_basic_blocks; ++i)
2300 BASIC_BLOCK (i)->aux = new_live_at_end[i];
2301 ENTRY_BLOCK_PTR->aux = new_live_at_end[i];
d7429b6a 2302
fdb8a883
JW
2303 /* Assume that the stack pointer is unchanging if alloca hasn't been used.
2304 This will be cleared by record_volatile_insns if it encounters an insn
2305 which modifies the stack pointer. */
2306 current_function_sp_is_unchanging = !current_function_calls_alloca;
2307
dc2ede84 2308 record_volatile_insns (f);
fe0f9c4b
RK
2309
2310 if (n_basic_blocks > 0)
2311 {
e881bb1b
RH
2312 regset theend;
2313 register edge e;
2314
2315 theend = EXIT_BLOCK_PTR->global_live_at_start;
2316 mark_regs_live_at_end (theend);
2317
2318 /* Propogate this exit data to each of EXIT's predecessors. */
2319 for (e = EXIT_BLOCK_PTR->pred; e ; e = e->pred_next)
2320 {
2321 COPY_REG_SET (e->src->global_live_at_end, theend);
2322 COPY_REG_SET ((regset) e->src->aux, theend);
2323 }
dc2ede84 2324 }
d7429b6a 2325
e881bb1b
RH
2326 /* The post-reload life analysis have (on a global basis) the same registers
2327 live as was computed by reload itself.
2328
2329 Otherwise elimination offsets and such may be incorrect.
2330
2331 Reload will make some registers as live even though they do not appear
2332 in the rtl. */
2333 if (reload_completed)
2334 memcpy (save_regs_ever_live, regs_ever_live, sizeof (regs_ever_live));
2335 memset (regs_ever_live, 0, sizeof regs_ever_live);
2336
d7429b6a
RK
2337 /* Propagate life info through the basic blocks
2338 around the graph of basic blocks.
2339
2340 This is a relaxation process: each time a new register
2341 is live at the end of the basic block, we must scan the block
2342 to determine which registers are, as a consequence, live at the beginning
2343 of that block. These registers must then be marked live at the ends
2344 of all the blocks that can transfer control to that block.
2345 The process continues until it reaches a fixed point. */
2346
2347 first_pass = 1;
2348 changed = 1;
2349 while (changed)
2350 {
2351 changed = 0;
2352 for (i = n_basic_blocks - 1; i >= 0; i--)
2353 {
e881bb1b 2354 basic_block bb = BASIC_BLOCK (i);
d7429b6a
RK
2355 int consider = first_pass;
2356 int must_rescan = first_pass;
2357 register int j;
2358
2359 if (!first_pass)
2360 {
2361 /* Set CONSIDER if this block needs thinking about at all
2362 (that is, if the regs live now at the end of it
2363 are not the same as were live at the end of it when
2364 we last thought about it).
2365 Set must_rescan if it needs to be thought about
2366 instruction by instruction (that is, if any additional
2367 reg that is live at the end now but was not live there before
2368 is one of the significant regs of this basic block). */
2369
b5835272 2370 EXECUTE_IF_AND_COMPL_IN_REG_SET
e881bb1b 2371 ((regset) bb->aux, bb->global_live_at_end, 0, j,
b5835272
RK
2372 {
2373 consider = 1;
e881bb1b 2374 if (REGNO_REG_SET_P (bb->local_set, j))
b5835272
RK
2375 {
2376 must_rescan = 1;
2377 goto done;
2378 }
2379 });
916b1701 2380 done:
d7429b6a
RK
2381 if (! consider)
2382 continue;
2383 }
2384
2385 /* The live_at_start of this block may be changing,
2386 so another pass will be required after this one. */
2387 changed = 1;
2388
2389 if (! must_rescan)
2390 {
2391 /* No complete rescan needed;
2392 just record those variables newly known live at end
2393 as live at start as well. */
e881bb1b
RH
2394 IOR_AND_COMPL_REG_SET (bb->global_live_at_start,
2395 (regset) bb->aux,
2396 bb->global_live_at_end);
916b1701 2397
e881bb1b
RH
2398 IOR_AND_COMPL_REG_SET (bb->global_live_at_end,
2399 (regset) bb->aux,
2400 bb->global_live_at_end);
d7429b6a
RK
2401 }
2402 else
2403 {
2404 /* Update the basic_block_live_at_start
2405 by propagation backwards through the block. */
e881bb1b
RH
2406 COPY_REG_SET (bb->global_live_at_end, (regset) bb->aux);
2407 COPY_REG_SET (bb->global_live_at_start,
2408 bb->global_live_at_end);
2409 propagate_block (bb->global_live_at_start,
2410 bb->head, bb->end, 0,
2411 first_pass ? bb->local_set : (regset) 0,
d7429b6a
RK
2412 i);
2413 }
2414
e881bb1b 2415 /* Update the new_live_at_end's of the block's predecessors. */
d7429b6a 2416 {
e881bb1b 2417 register edge e;
af14ce9c 2418
e881bb1b
RH
2419 for (e = bb->pred; e ; e = e->pred_next)
2420 IOR_REG_SET ((regset) e->src->aux, bb->global_live_at_start);
d7429b6a 2421 }
e881bb1b 2422
d7429b6a
RK
2423#ifdef USE_C_ALLOCA
2424 alloca (0);
2425#endif
2426 }
2427 first_pass = 0;
2428 }
2429
2430 /* The only pseudos that are live at the beginning of the function are
2431 those that were not set anywhere in the function. local-alloc doesn't
2432 know how to handle these correctly, so mark them as not local to any
2433 one basic block. */
2434
2435 if (n_basic_blocks > 0)
e881bb1b 2436 EXECUTE_IF_SET_IN_REG_SET (BASIC_BLOCK (0)->global_live_at_start,
916b1701
MM
2437 FIRST_PSEUDO_REGISTER, i,
2438 {
2439 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
2440 });
d7429b6a 2441
e881bb1b
RH
2442 /* Now the life information is accurate. Make one more pass over each
2443 basic block to delete dead stores, create autoincrement addressing
2444 and record how many times each register is used, is set, or dies. */
d7429b6a 2445
d7429b6a
RK
2446 for (i = 0; i < n_basic_blocks; i++)
2447 {
e881bb1b
RH
2448 basic_block bb = BASIC_BLOCK (i);
2449
2450 /* We start with global_live_at_end to determine which stores are
2451 dead. This process is destructive, and we wish to preserve the
2452 contents of global_live_at_end for posterity. Fortunately,
2453 new_live_at_end, due to the way we converged on a solution,
2454 contains a duplicate of global_live_at_end that we can kill. */
2455 propagate_block ((regset) bb->aux, bb->head, bb->end, 1, (regset) 0, i);
2456
d7429b6a
RK
2457#ifdef USE_C_ALLOCA
2458 alloca (0);
2459#endif
2460 }
2461
e881bb1b
RH
2462 /* We have a problem with any pseudoreg that lives across the setjmp.
2463 ANSI says that if a user variable does not change in value between
2464 the setjmp and the longjmp, then the longjmp preserves it. This
2465 includes longjmp from a place where the pseudo appears dead.
d7429b6a
RK
2466 (In principle, the value still exists if it is in scope.)
2467 If the pseudo goes in a hard reg, some other value may occupy
2468 that hard reg where this pseudo is dead, thus clobbering the pseudo.
2469 Conclusion: such a pseudo must not go in a hard reg. */
916b1701
MM
2470 EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp,
2471 FIRST_PSEUDO_REGISTER, i,
2472 {
2473 if (regno_reg_rtx[i] != 0)
2474 {
2475 REG_LIVE_LENGTH (i) = -1;
2476 REG_BASIC_BLOCK (i) = -1;
2477 }
2478 });
d7429b6a 2479
6764d250
BS
2480 /* Restore regs_ever_live that was provided by reload. */
2481 if (reload_completed)
e881bb1b 2482 memcpy (regs_ever_live, save_regs_ever_live, sizeof (regs_ever_live));
67f0e213 2483
e881bb1b 2484 free_regset_vector (new_live_at_end, n_basic_blocks);
5f4f0e22 2485 obstack_free (&flow_obstack, NULL_PTR);
e881bb1b
RH
2486
2487 for (i = 0; i < n_basic_blocks; ++i)
2488 BASIC_BLOCK (i)->aux = NULL;
2489 ENTRY_BLOCK_PTR->aux = NULL;
d7429b6a
RK
2490}
2491\f
2492/* Subroutines of life analysis. */
2493
2494/* Allocate the permanent data structures that represent the results
2495 of life analysis. Not static since used also for stupid life analysis. */
2496
2497void
2498allocate_for_life_analysis ()
2499{
2500 register int i;
d7429b6a 2501
67f0e213
RK
2502 /* Recalculate the register space, in case it has grown. Old style
2503 vector oriented regsets would set regset_{size,bytes} here also. */
2504 allocate_reg_info (max_regno, FALSE, FALSE);
d7429b6a 2505
b1f21e0a
MM
2506 /* Because both reg_scan and flow_analysis want to set up the REG_N_SETS
2507 information, explicitly reset it here. The allocation should have
2508 already happened on the previous reg_scan pass. Make sure in case
2509 some more registers were allocated. */
d7429b6a 2510 for (i = 0; i < max_regno; i++)
b1f21e0a 2511 REG_N_SETS (i) = 0;
d7429b6a 2512
e881bb1b
RH
2513 for (i = 0; i < n_basic_blocks; i++)
2514 {
2515 basic_block bb = BASIC_BLOCK (i);
2516
2517 bb->local_set = OBSTACK_ALLOC_REG_SET (function_obstack);
2518 bb->global_live_at_start = OBSTACK_ALLOC_REG_SET (function_obstack);
2519 bb->global_live_at_end = OBSTACK_ALLOC_REG_SET (function_obstack);
2520 }
2521
2522 ENTRY_BLOCK_PTR->global_live_at_end
2523 = OBSTACK_ALLOC_REG_SET (function_obstack);
2524 EXIT_BLOCK_PTR->global_live_at_start
2525 = OBSTACK_ALLOC_REG_SET (function_obstack);
d7429b6a 2526
7eb136d6
MM
2527 regs_live_at_setjmp = OBSTACK_ALLOC_REG_SET (function_obstack);
2528 CLEAR_REG_SET (regs_live_at_setjmp);
d7429b6a
RK
2529}
2530
67f0e213
RK
2531/* Make each element of VECTOR point at a regset. The vector has
2532 NELTS elements, and space is allocated from the ALLOC_OBSTACK
2533 obstack. */
d7429b6a 2534
04821e98 2535static void
67f0e213 2536init_regset_vector (vector, nelts, alloc_obstack)
d7429b6a 2537 regset *vector;
d7429b6a 2538 int nelts;
7eb136d6 2539 struct obstack *alloc_obstack;
d7429b6a
RK
2540{
2541 register int i;
d7429b6a
RK
2542
2543 for (i = 0; i < nelts; i++)
2544 {
7eb136d6
MM
2545 vector[i] = OBSTACK_ALLOC_REG_SET (alloc_obstack);
2546 CLEAR_REG_SET (vector[i]);
d7429b6a
RK
2547 }
2548}
e658434c 2549
67f0e213
RK
2550/* Release any additional space allocated for each element of VECTOR point
2551 other than the regset header itself. The vector has NELTS elements. */
2552
2553void
2554free_regset_vector (vector, nelts)
2555 regset *vector;
2556 int nelts;
2557{
2558 register int i;
2559
2560 for (i = 0; i < nelts; i++)
2561 FREE_REG_SET (vector[i]);
2562}
2563
d7429b6a
RK
2564/* Compute the registers live at the beginning of a basic block
2565 from those live at the end.
2566
2567 When called, OLD contains those live at the end.
2568 On return, it contains those live at the beginning.
2569 FIRST and LAST are the first and last insns of the basic block.
2570
2571 FINAL is nonzero if we are doing the final pass which is not
2572 for computing the life info (since that has already been done)
2573 but for acting on it. On this pass, we delete dead stores,
2574 set up the logical links and dead-variables lists of instructions,
2575 and merge instructions for autoincrement and autodecrement addresses.
2576
2577 SIGNIFICANT is nonzero only the first time for each basic block.
2578 If it is nonzero, it points to a regset in which we store
2579 a 1 for each register that is set within the block.
2580
2581 BNUM is the number of the basic block. */
2582
2583static void
2584propagate_block (old, first, last, final, significant, bnum)
2585 register regset old;
2586 rtx first;
2587 rtx last;
2588 int final;
2589 regset significant;
2590 int bnum;
2591{
2592 register rtx insn;
2593 rtx prev;
2594 regset live;
2595 regset dead;
2596
e881bb1b
RH
2597 /* Find the loop depth for this block. Ignore loop level changes in the
2598 middle of the basic block -- for register allocation purposes, the
2599 important uses will be in the blocks wholely contained within the loop
2600 not in the loop pre-header or post-trailer. */
2601 loop_depth = BASIC_BLOCK (bnum)->loop_depth;
d7429b6a 2602
7eb136d6
MM
2603 dead = ALLOCA_REG_SET ();
2604 live = ALLOCA_REG_SET ();
d7429b6a
RK
2605
2606 cc0_live = 0;
db3a887b 2607 mem_set_list = NULL_RTX;
d7429b6a 2608
d7429b6a
RK
2609 if (final)
2610 {
916b1701 2611 register int i;
d7429b6a 2612
d7429b6a 2613 /* Process the regs live at the end of the block.
f8dd7f98 2614 Mark them as not local to any one basic block. */
916b1701
MM
2615 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
2616 {
2617 REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL;
916b1701 2618 });
d7429b6a
RK
2619 }
2620
2621 /* Scan the block an insn at a time from end to beginning. */
2622
2623 for (insn = last; ; insn = prev)
2624 {
2625 prev = PREV_INSN (insn);
2626
8329b5ec 2627 if (GET_CODE (insn) == NOTE)
d7429b6a 2628 {
8329b5ec
DE
2629 /* If this is a call to `setjmp' et al,
2630 warn if any non-volatile datum is live. */
2631
2632 if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
916b1701 2633 IOR_REG_SET (regs_live_at_setjmp, old);
d7429b6a
RK
2634 }
2635
2636 /* Update the life-status of regs for this insn.
2637 First DEAD gets which regs are set in this insn
2638 then LIVE gets which regs are used in this insn.
2639 Then the regs live before the insn
2640 are those live after, with DEAD regs turned off,
2641 and then LIVE regs turned on. */
2642
8329b5ec 2643 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
d7429b6a
RK
2644 {
2645 register int i;
5f4f0e22 2646 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
d7429b6a 2647 int insn_is_dead
e398aa80 2648 = (insn_dead_p (PATTERN (insn), old, 0, REG_NOTES (insn))
d7429b6a
RK
2649 /* Don't delete something that refers to volatile storage! */
2650 && ! INSN_VOLATILE (insn));
2651 int libcall_is_dead
2652 = (insn_is_dead && note != 0
2653 && libcall_dead_p (PATTERN (insn), old, note, insn));
2654
2655 /* If an instruction consists of just dead store(s) on final pass,
2656 "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
2657 We could really delete it with delete_insn, but that
2658 can cause trouble for first or last insn in a basic block. */
b590bbfd 2659 if (final && insn_is_dead)
d7429b6a
RK
2660 {
2661 PUT_CODE (insn, NOTE);
2662 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2663 NOTE_SOURCE_FILE (insn) = 0;
2664
e5df1ea3
RK
2665 /* CC0 is now known to be dead. Either this insn used it,
2666 in which case it doesn't anymore, or clobbered it,
2667 so the next insn can't use it. */
2668 cc0_live = 0;
2669
d7429b6a
RK
2670 /* If this insn is copying the return value from a library call,
2671 delete the entire library call. */
2672 if (libcall_is_dead)
2673 {
2674 rtx first = XEXP (note, 0);
2675 rtx p = insn;
2676 while (INSN_DELETED_P (first))
2677 first = NEXT_INSN (first);
2678 while (p != first)
2679 {
2680 p = PREV_INSN (p);
2681 PUT_CODE (p, NOTE);
2682 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
2683 NOTE_SOURCE_FILE (p) = 0;
2684 }
2685 }
2686 goto flushed;
2687 }
2688
916b1701
MM
2689 CLEAR_REG_SET (dead);
2690 CLEAR_REG_SET (live);
d7429b6a
RK
2691
2692 /* See if this is an increment or decrement that can be
2693 merged into a following memory address. */
2694#ifdef AUTO_INC_DEC
2695 {
956d6950
JL
2696 register rtx x = single_set (insn);
2697
d7429b6a 2698 /* Does this instruction increment or decrement a register? */
6764d250
BS
2699 if (!reload_completed
2700 && final && x != 0
d7429b6a
RK
2701 && GET_CODE (SET_DEST (x)) == REG
2702 && (GET_CODE (SET_SRC (x)) == PLUS
2703 || GET_CODE (SET_SRC (x)) == MINUS)
2704 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
2705 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
2706 /* Ok, look for a following memory ref we can combine with.
2707 If one is found, change the memory ref to a PRE_INC
2708 or PRE_DEC, cancel this insn, and return 1.
2709 Return 0 if nothing has been done. */
2710 && try_pre_increment_1 (insn))
2711 goto flushed;
2712 }
2713#endif /* AUTO_INC_DEC */
2714
2715 /* If this is not the final pass, and this insn is copying the
2716 value of a library call and it's dead, don't scan the
2717 insns that perform the library call, so that the call's
2718 arguments are not marked live. */
2719 if (libcall_is_dead)
2720 {
2721 /* Mark the dest reg as `significant'. */
5f4f0e22 2722 mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant);
d7429b6a
RK
2723
2724 insn = XEXP (note, 0);
2725 prev = PREV_INSN (insn);
2726 }
2727 else if (GET_CODE (PATTERN (insn)) == SET
2728 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
2729 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
2730 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
2731 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
2732 /* We have an insn to pop a constant amount off the stack.
2733 (Such insns use PLUS regardless of the direction of the stack,
2734 and any insn to adjust the stack by a constant is always a pop.)
2735 These insns, if not dead stores, have no effect on life. */
2736 ;
2737 else
2738 {
f8dd7f98
BS
2739 /* Any regs live at the time of a call instruction
2740 must not go in a register clobbered by calls.
2741 Find all regs now live and record this for them. */
2742
2743 if (GET_CODE (insn) == CALL_INSN && final)
2744 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
2745 {
2746 REG_N_CALLS_CROSSED (i)++;
2747 });
2748
d7429b6a
RK
2749 /* LIVE gets the regs used in INSN;
2750 DEAD gets those set by it. Dead insns don't make anything
2751 live. */
2752
5f4f0e22
CH
2753 mark_set_regs (old, dead, PATTERN (insn),
2754 final ? insn : NULL_RTX, significant);
d7429b6a
RK
2755
2756 /* If an insn doesn't use CC0, it becomes dead since we
2757 assume that every insn clobbers it. So show it dead here;
2758 mark_used_regs will set it live if it is referenced. */
2759 cc0_live = 0;
2760
2761 if (! insn_is_dead)
2762 mark_used_regs (old, live, PATTERN (insn), final, insn);
2763
2764 /* Sometimes we may have inserted something before INSN (such as
2765 a move) when we make an auto-inc. So ensure we will scan
2766 those insns. */
2767#ifdef AUTO_INC_DEC
2768 prev = PREV_INSN (insn);
2769#endif
2770
2771 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
2772 {
2773 register int i;
2774
6b67ec08
RK
2775 rtx note;
2776
2777 for (note = CALL_INSN_FUNCTION_USAGE (insn);
2778 note;
2779 note = XEXP (note, 1))
2780 if (GET_CODE (XEXP (note, 0)) == USE)
2781 mark_used_regs (old, live, SET_DEST (XEXP (note, 0)),
2782 final, insn);
2783
d7429b6a 2784 /* Each call clobbers all call-clobbered regs that are not
e4329280 2785 global or fixed. Note that the function-value reg is a
d7429b6a
RK
2786 call-clobbered reg, and mark_set_regs has already had
2787 a chance to handle it. */
2788
2789 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e4329280
RK
2790 if (call_used_regs[i] && ! global_regs[i]
2791 && ! fixed_regs[i])
916b1701 2792 SET_REGNO_REG_SET (dead, i);
d7429b6a
RK
2793
2794 /* The stack ptr is used (honorarily) by a CALL insn. */
916b1701 2795 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
2796
2797 /* Calls may also reference any of the global registers,
2798 so they are made live. */
d7429b6a
RK
2799 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2800 if (global_regs[i])
9b316aa2 2801 mark_used_regs (old, live,
38a448ca 2802 gen_rtx_REG (reg_raw_mode[i], i),
9b316aa2 2803 final, insn);
d7429b6a
RK
2804
2805 /* Calls also clobber memory. */
db3a887b 2806 mem_set_list = NULL_RTX;
d7429b6a
RK
2807 }
2808
2809 /* Update OLD for the registers used or set. */
916b1701
MM
2810 AND_COMPL_REG_SET (old, dead);
2811 IOR_REG_SET (old, live);
d7429b6a 2812
d7429b6a
RK
2813 }
2814
f8dd7f98
BS
2815 /* On final pass, update counts of how many insns each reg is live
2816 at. */
d7429b6a 2817 if (final)
f8dd7f98
BS
2818 EXECUTE_IF_SET_IN_REG_SET (old, 0, i,
2819 { REG_LIVE_LENGTH (i)++; });
d7429b6a
RK
2820 }
2821 flushed: ;
2822 if (insn == first)
2823 break;
2824 }
2825
67f0e213
RK
2826 FREE_REG_SET (dead);
2827 FREE_REG_SET (live);
d7429b6a
RK
2828}
2829\f
2830/* Return 1 if X (the body of an insn, or part of it) is just dead stores
2831 (SET expressions whose destinations are registers dead after the insn).
2832 NEEDED is the regset that says which regs are alive after the insn.
2833
e398aa80
R
2834 Unless CALL_OK is non-zero, an insn is needed if it contains a CALL.
2835
2836 If X is the entire body of an insn, NOTES contains the reg notes
2837 pertaining to the insn. */
d7429b6a
RK
2838
2839static int
e398aa80 2840insn_dead_p (x, needed, call_ok, notes)
d7429b6a
RK
2841 rtx x;
2842 regset needed;
2843 int call_ok;
e398aa80 2844 rtx notes ATTRIBUTE_UNUSED;
d7429b6a 2845{
e5e809f4
JL
2846 enum rtx_code code = GET_CODE (x);
2847
e398aa80
R
2848#ifdef AUTO_INC_DEC
2849 /* If flow is invoked after reload, we must take existing AUTO_INC
2850 expresions into account. */
2851 if (reload_completed)
2852 {
2853 for ( ; notes; notes = XEXP (notes, 1))
2854 {
2855 if (REG_NOTE_KIND (notes) == REG_INC)
2856 {
2857 int regno = REGNO (XEXP (notes, 0));
2858
2859 /* Don't delete insns to set global regs. */
2860 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2861 || REGNO_REG_SET_P (needed, regno))
2862 return 0;
2863 }
2864 }
2865 }
2866#endif
2867
d7429b6a
RK
2868 /* If setting something that's a reg or part of one,
2869 see if that register's altered value will be live. */
2870
2871 if (code == SET)
2872 {
e5e809f4
JL
2873 rtx r = SET_DEST (x);
2874
d7429b6a
RK
2875 /* A SET that is a subroutine call cannot be dead. */
2876 if (! call_ok && GET_CODE (SET_SRC (x)) == CALL)
2877 return 0;
2878
2879#ifdef HAVE_cc0
2880 if (GET_CODE (r) == CC0)
2881 return ! cc0_live;
2882#endif
2883
db3a887b
CB
2884 if (GET_CODE (r) == MEM && ! MEM_VOLATILE_P (r))
2885 {
2886 rtx temp;
2887 /* Walk the set of memory locations we are currently tracking
2888 and see if one is an identical match to this memory location.
2889 If so, this memory write is dead (remember, we're walking
2890 backwards from the end of the block to the start. */
2891 temp = mem_set_list;
2892 while (temp)
2893 {
2894 if (rtx_equal_p (XEXP (temp, 0), r))
2895 return 1;
2896 temp = XEXP (temp, 1);
2897 }
2898 }
d7429b6a 2899
e5e809f4
JL
2900 while (GET_CODE (r) == SUBREG || GET_CODE (r) == STRICT_LOW_PART
2901 || GET_CODE (r) == ZERO_EXTRACT)
d7429b6a
RK
2902 r = SUBREG_REG (r);
2903
2904 if (GET_CODE (r) == REG)
2905 {
e5e809f4 2906 int regno = REGNO (r);
d7429b6a 2907
d8c8b8e3 2908 /* Don't delete insns to set global regs. */
d7429b6a
RK
2909 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2910 /* Make sure insns to set frame pointer aren't deleted. */
2911 || regno == FRAME_POINTER_REGNUM
73a187c1
DE
2912#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2913 || regno == HARD_FRAME_POINTER_REGNUM
2914#endif
d7e4fe8b
RS
2915#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2916 /* Make sure insns to set arg pointer are never deleted
2917 (if the arg pointer isn't fixed, there will be a USE for
0f41302f 2918 it, so we can treat it normally). */
d7e4fe8b
RS
2919 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2920#endif
916b1701 2921 || REGNO_REG_SET_P (needed, regno))
d7429b6a
RK
2922 return 0;
2923
2924 /* If this is a hard register, verify that subsequent words are
2925 not needed. */
2926 if (regno < FIRST_PSEUDO_REGISTER)
2927 {
2928 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
2929
2930 while (--n > 0)
916b1701 2931 if (REGNO_REG_SET_P (needed, regno+n))
d7429b6a
RK
2932 return 0;
2933 }
2934
2935 return 1;
2936 }
2937 }
e5e809f4 2938
d7429b6a
RK
2939 /* If performing several activities,
2940 insn is dead if each activity is individually dead.
2941 Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
2942 that's inside a PARALLEL doesn't make the insn worth keeping. */
2943 else if (code == PARALLEL)
2944 {
e5e809f4
JL
2945 int i = XVECLEN (x, 0);
2946
d7429b6a 2947 for (i--; i >= 0; i--)
e5e809f4
JL
2948 if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER
2949 && GET_CODE (XVECEXP (x, 0, i)) != USE
e398aa80 2950 && ! insn_dead_p (XVECEXP (x, 0, i), needed, call_ok, NULL_RTX))
e5e809f4
JL
2951 return 0;
2952
d7429b6a
RK
2953 return 1;
2954 }
e5e809f4
JL
2955
2956 /* A CLOBBER of a pseudo-register that is dead serves no purpose. That
2957 is not necessarily true for hard registers. */
2958 else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == REG
2959 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER
2960 && ! REGNO_REG_SET_P (needed, REGNO (XEXP (x, 0))))
2961 return 1;
2962
2963 /* We do not check other CLOBBER or USE here. An insn consisting of just
2964 a CLOBBER or just a USE should not be deleted. */
d7429b6a
RK
2965 return 0;
2966}
2967
2968/* If X is the pattern of the last insn in a libcall, and assuming X is dead,
2969 return 1 if the entire library call is dead.
2970 This is true if X copies a register (hard or pseudo)
2971 and if the hard return reg of the call insn is dead.
2972 (The caller should have tested the destination of X already for death.)
2973
2974 If this insn doesn't just copy a register, then we don't
2975 have an ordinary libcall. In that case, cse could not have
2976 managed to substitute the source for the dest later on,
2977 so we can assume the libcall is dead.
2978
2979 NEEDED is the bit vector of pseudoregs live before this insn.
2980 NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */
2981
2982static int
2983libcall_dead_p (x, needed, note, insn)
2984 rtx x;
2985 regset needed;
2986 rtx note;
2987 rtx insn;
2988{
2989 register RTX_CODE code = GET_CODE (x);
2990
2991 if (code == SET)
2992 {
2993 register rtx r = SET_SRC (x);
2994 if (GET_CODE (r) == REG)
2995 {
2996 rtx call = XEXP (note, 0);
e398aa80 2997 rtx call_pat;
d7429b6a
RK
2998 register int i;
2999
3000 /* Find the call insn. */
3001 while (call != insn && GET_CODE (call) != CALL_INSN)
3002 call = NEXT_INSN (call);
3003
3004 /* If there is none, do nothing special,
3005 since ordinary death handling can understand these insns. */
3006 if (call == insn)
3007 return 0;
3008
3009 /* See if the hard reg holding the value is dead.
3010 If this is a PARALLEL, find the call within it. */
e398aa80
R
3011 call_pat = PATTERN (call);
3012 if (GET_CODE (call_pat) == PARALLEL)
d7429b6a 3013 {
e398aa80
R
3014 for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--)
3015 if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET
3016 && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL)
d7429b6a
RK
3017 break;
3018
761a5bcd
JW
3019 /* This may be a library call that is returning a value
3020 via invisible pointer. Do nothing special, since
3021 ordinary death handling can understand these insns. */
d7429b6a 3022 if (i < 0)
761a5bcd 3023 return 0;
d7429b6a 3024
e398aa80 3025 call_pat = XVECEXP (call_pat, 0, i);
d7429b6a
RK
3026 }
3027
e398aa80 3028 return insn_dead_p (call_pat, needed, 1, REG_NOTES (call));
d7429b6a
RK
3029 }
3030 }
3031 return 1;
3032}
3033
bd80fbde
RH
3034/* Return 1 if register REGNO was used before it was set, i.e. if it is
3035 live at function entry. Don't count global register variables, variables
3036 in registers that can be used for function arg passing, or variables in
3037 fixed hard registers. */
d7429b6a
RK
3038
3039int
3040regno_uninitialized (regno)
3041 int regno;
3042{
b0b7b46a 3043 if (n_basic_blocks == 0
6a45254e 3044 || (regno < FIRST_PSEUDO_REGISTER
bd80fbde
RH
3045 && (global_regs[regno]
3046 || fixed_regs[regno]
3047 || FUNCTION_ARG_REGNO_P (regno))))
d7429b6a
RK
3048 return 0;
3049
e881bb1b 3050 return REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, regno);
d7429b6a
RK
3051}
3052
3053/* 1 if register REGNO was alive at a place where `setjmp' was called
3054 and was set more than once or is an argument.
3055 Such regs may be clobbered by `longjmp'. */
3056
3057int
3058regno_clobbered_at_setjmp (regno)
3059 int regno;
3060{
3061 if (n_basic_blocks == 0)
3062 return 0;
3063
b1f21e0a 3064 return ((REG_N_SETS (regno) > 1
e881bb1b 3065 || REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, regno))
916b1701 3066 && REGNO_REG_SET_P (regs_live_at_setjmp, regno));
d7429b6a
RK
3067}
3068\f
15e088b2
JL
3069/* INSN references memory, possibly using autoincrement addressing modes.
3070 Find any entries on the mem_set_list that need to be invalidated due
3071 to an address change. */
3072static void
3073invalidate_mems_from_autoinc (insn)
3074 rtx insn;
3075{
3076 rtx note = REG_NOTES (insn);
3077 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
3078 {
3079 if (REG_NOTE_KIND (note) == REG_INC)
3080 {
3081 rtx temp = mem_set_list;
3082 rtx prev = NULL_RTX;
3083
3084 while (temp)
3085 {
3086 if (reg_overlap_mentioned_p (XEXP (note, 0), XEXP (temp, 0)))
3087 {
3088 /* Splice temp out of list. */
3089 if (prev)
3090 XEXP (prev, 1) = XEXP (temp, 1);
3091 else
3092 mem_set_list = XEXP (temp, 1);
3093 }
3094 else
3095 prev = temp;
3096 temp = XEXP (temp, 1);
3097 }
3098 }
3099 }
3100}
3101
d7429b6a
RK
3102/* Process the registers that are set within X.
3103 Their bits are set to 1 in the regset DEAD,
3104 because they are dead prior to this insn.
3105
3106 If INSN is nonzero, it is the insn being processed
3107 and the fact that it is nonzero implies this is the FINAL pass
3108 in propagate_block. In this case, various info about register
3109 usage is stored, LOG_LINKS fields of insns are set up. */
3110
d7429b6a
RK
3111static void
3112mark_set_regs (needed, dead, x, insn, significant)
3113 regset needed;
3114 regset dead;
3115 rtx x;
3116 rtx insn;
3117 regset significant;
3118{
3119 register RTX_CODE code = GET_CODE (x);
3120
3121 if (code == SET || code == CLOBBER)
3122 mark_set_1 (needed, dead, x, insn, significant);
3123 else if (code == PARALLEL)
3124 {
3125 register int i;
3126 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3127 {
3128 code = GET_CODE (XVECEXP (x, 0, i));
3129 if (code == SET || code == CLOBBER)
3130 mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
3131 }
3132 }
3133}
3134
3135/* Process a single SET rtx, X. */
3136
3137static void
3138mark_set_1 (needed, dead, x, insn, significant)
3139 regset needed;
3140 regset dead;
3141 rtx x;
3142 rtx insn;
3143 regset significant;
3144{
3145 register int regno;
3146 register rtx reg = SET_DEST (x);
3147
86465af7
DM
3148 /* Some targets place small structures in registers for
3149 return values of functions. We have to detect this
3150 case specially here to get correct flow information. */
3151 if (GET_CODE (reg) == PARALLEL
3152 && GET_MODE (reg) == BLKmode)
3153 {
3154 register int i;
3155
3156 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
3157 mark_set_1 (needed, dead, XVECEXP (reg, 0, i), insn, significant);
3158 return;
3159 }
3160
d7429b6a
RK
3161 /* Modifying just one hardware register of a multi-reg value
3162 or just a byte field of a register
3163 does not mean the value from before this insn is now dead.
3164 But it does mean liveness of that register at the end of the block
3165 is significant.
3166
3167 Within mark_set_1, however, we treat it as if the register is
3168 indeed modified. mark_used_regs will, however, also treat this
3169 register as being used. Thus, we treat these insns as setting a
3170 new value for the register as a function of its old value. This
3171 cases LOG_LINKS to be made appropriately and this will help combine. */
3172
3173 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
3174 || GET_CODE (reg) == SIGN_EXTRACT
3175 || GET_CODE (reg) == STRICT_LOW_PART)
3176 reg = XEXP (reg, 0);
3177
db3a887b
CB
3178 /* If this set is a MEM, then it kills any aliased writes.
3179 If this set is a REG, then it kills any MEMs which use the reg. */
d7429b6a 3180 if (GET_CODE (reg) == MEM
db3a887b
CB
3181 || GET_CODE (reg) == REG)
3182 {
3183 rtx temp = mem_set_list;
3184 rtx prev = NULL_RTX;
3185
3186 while (temp)
3187 {
3188 if ((GET_CODE (reg) == MEM
3189 && output_dependence (XEXP (temp, 0), reg))
3190 || (GET_CODE (reg) == REG
3191 && reg_overlap_mentioned_p (reg, XEXP (temp, 0))))
3192 {
3193 /* Splice this entry out of the list. */
3194 if (prev)
3195 XEXP (prev, 1) = XEXP (temp, 1);
3196 else
3197 mem_set_list = XEXP (temp, 1);
3198 }
3199 else
3200 prev = temp;
3201 temp = XEXP (temp, 1);
3202 }
3203 }
15e088b2
JL
3204
3205 /* If the memory reference had embedded side effects (autoincrement
3206 address modes. Then we may need to kill some entries on the
3207 memory set list. */
3208 if (insn && GET_CODE (reg) == MEM)
3209 invalidate_mems_from_autoinc (insn);
3210
d7429b6a
RK
3211 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
3212 /* There are no REG_INC notes for SP, so we can't assume we'll see
3213 everything that invalidates it. To be safe, don't eliminate any
3214 stores though SP; none of them should be redundant anyway. */
3215 && ! reg_mentioned_p (stack_pointer_rtx, reg))
db3a887b 3216 mem_set_list = gen_rtx_EXPR_LIST (VOIDmode, reg, mem_set_list);
d7429b6a
RK
3217
3218 if (GET_CODE (reg) == REG
3219 && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
3220#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
3221 && regno != HARD_FRAME_POINTER_REGNUM
3222#endif
d7e4fe8b
RS
3223#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3224 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
3225#endif
d7429b6a
RK
3226 && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
3227 /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
3228 {
916b1701
MM
3229 int some_needed = REGNO_REG_SET_P (needed, regno);
3230 int some_not_needed = ! some_needed;
d7429b6a
RK
3231
3232 /* Mark it as a significant register for this basic block. */
3233 if (significant)
916b1701 3234 SET_REGNO_REG_SET (significant, regno);
d7429b6a 3235
38e01259 3236 /* Mark it as dead before this insn. */
916b1701 3237 SET_REGNO_REG_SET (dead, regno);
d7429b6a
RK
3238
3239 /* A hard reg in a wide mode may really be multiple registers.
3240 If so, mark all of them just like the first. */
3241 if (regno < FIRST_PSEUDO_REGISTER)
3242 {
3243 int n;
3244
3245 /* Nothing below is needed for the stack pointer; get out asap.
3246 Eg, log links aren't needed, since combine won't use them. */
3247 if (regno == STACK_POINTER_REGNUM)
3248 return;
3249
3250 n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
3251 while (--n > 0)
3252 {
916b1701
MM
3253 int regno_n = regno + n;
3254 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
d7429b6a 3255 if (significant)
916b1701 3256 SET_REGNO_REG_SET (significant, regno_n);
cb9e8ad1 3257
916b1701
MM
3258 SET_REGNO_REG_SET (dead, regno_n);
3259 some_needed |= needed_regno;
3260 some_not_needed |= ! needed_regno;
d7429b6a
RK
3261 }
3262 }
3263 /* Additional data to record if this is the final pass. */
3264 if (insn)
3265 {
3266 register rtx y = reg_next_use[regno];
3267 register int blocknum = BLOCK_NUM (insn);
3268
3269 /* If this is a hard reg, record this function uses the reg. */
3270
3271 if (regno < FIRST_PSEUDO_REGISTER)
3272 {
3273 register int i;
3274 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
3275
3276 for (i = regno; i < endregno; i++)
3277 {
93514916
JW
3278 /* The next use is no longer "next", since a store
3279 intervenes. */
3280 reg_next_use[i] = 0;
3281
d7429b6a 3282 regs_ever_live[i] = 1;
b1f21e0a 3283 REG_N_SETS (i)++;
d7429b6a
RK
3284 }
3285 }
3286 else
3287 {
93514916
JW
3288 /* The next use is no longer "next", since a store
3289 intervenes. */
3290 reg_next_use[regno] = 0;
3291
d7429b6a
RK
3292 /* Keep track of which basic blocks each reg appears in. */
3293
b1f21e0a
MM
3294 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
3295 REG_BASIC_BLOCK (regno) = blocknum;
3296 else if (REG_BASIC_BLOCK (regno) != blocknum)
3297 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
3298
3299 /* Count (weighted) references, stores, etc. This counts a
3300 register twice if it is modified, but that is correct. */
b1f21e0a 3301 REG_N_SETS (regno)++;
d7429b6a 3302
b1f21e0a 3303 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
3304
3305 /* The insns where a reg is live are normally counted
3306 elsewhere, but we want the count to include the insn
3307 where the reg is set, and the normal counting mechanism
3308 would not count it. */
b1f21e0a 3309 REG_LIVE_LENGTH (regno)++;
d7429b6a
RK
3310 }
3311
cb9e8ad1 3312 if (! some_not_needed)
d7429b6a
RK
3313 {
3314 /* Make a logical link from the next following insn
3315 that uses this register, back to this insn.
3316 The following insns have already been processed.
3317
3318 We don't build a LOG_LINK for hard registers containing
3319 in ASM_OPERANDs. If these registers get replaced,
3320 we might wind up changing the semantics of the insn,
3321 even if reload can make what appear to be valid assignments
3322 later. */
3323 if (y && (BLOCK_NUM (y) == blocknum)
3324 && (regno >= FIRST_PSEUDO_REGISTER
3325 || asm_noperands (PATTERN (y)) < 0))
3326 LOG_LINKS (y)
38a448ca 3327 = gen_rtx_INSN_LIST (VOIDmode, insn, LOG_LINKS (y));
d7429b6a
RK
3328 }
3329 else if (! some_needed)
3330 {
3331 /* Note that dead stores have already been deleted when possible
3332 If we get here, we have found a dead store that cannot
3333 be eliminated (because the same insn does something useful).
3334 Indicate this by marking the reg being set as dying here. */
3335 REG_NOTES (insn)
38a448ca 3336 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
b1f21e0a 3337 REG_N_DEATHS (REGNO (reg))++;
d7429b6a
RK
3338 }
3339 else
3340 {
3341 /* This is a case where we have a multi-word hard register
3342 and some, but not all, of the words of the register are
3343 needed in subsequent insns. Write REG_UNUSED notes
3344 for those parts that were not needed. This case should
3345 be rare. */
3346
3347 int i;
3348
3349 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
3350 i >= 0; i--)
916b1701 3351 if (!REGNO_REG_SET_P (needed, regno + i))
d7429b6a 3352 REG_NOTES (insn)
38a448ca
RH
3353 = gen_rtx_EXPR_LIST (REG_UNUSED,
3354 gen_rtx_REG (reg_raw_mode[regno + i],
3355 regno + i),
3356 REG_NOTES (insn));
d7429b6a
RK
3357 }
3358 }
3359 }
8244fc4f
RS
3360 else if (GET_CODE (reg) == REG)
3361 reg_next_use[regno] = 0;
d7429b6a
RK
3362
3363 /* If this is the last pass and this is a SCRATCH, show it will be dying
3364 here and count it. */
3365 else if (GET_CODE (reg) == SCRATCH && insn != 0)
3366 {
3367 REG_NOTES (insn)
38a448ca 3368 = gen_rtx_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn));
d7429b6a
RK
3369 }
3370}
3371\f
3372#ifdef AUTO_INC_DEC
3373
3374/* X is a MEM found in INSN. See if we can convert it into an auto-increment
3375 reference. */
3376
3377static void
3378find_auto_inc (needed, x, insn)
3379 regset needed;
3380 rtx x;
3381 rtx insn;
3382{
3383 rtx addr = XEXP (x, 0);
e658434c 3384 HOST_WIDE_INT offset = 0;
05ed5d57 3385 rtx set;
d7429b6a
RK
3386
3387 /* Here we detect use of an index register which might be good for
3388 postincrement, postdecrement, preincrement, or predecrement. */
3389
3390 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
3391 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
3392
3393 if (GET_CODE (addr) == REG)
3394 {
3395 register rtx y;
3396 register int size = GET_MODE_SIZE (GET_MODE (x));
3397 rtx use;
3398 rtx incr;
3399 int regno = REGNO (addr);
3400
3401 /* Is the next use an increment that might make auto-increment? */
05ed5d57
RK
3402 if ((incr = reg_next_use[regno]) != 0
3403 && (set = single_set (incr)) != 0
3404 && GET_CODE (set) == SET
d7429b6a
RK
3405 && BLOCK_NUM (incr) == BLOCK_NUM (insn)
3406 /* Can't add side effects to jumps; if reg is spilled and
3407 reloaded, there's no way to store back the altered value. */
3408 && GET_CODE (insn) != JUMP_INSN
05ed5d57 3409 && (y = SET_SRC (set), GET_CODE (y) == PLUS)
d7429b6a
RK
3410 && XEXP (y, 0) == addr
3411 && GET_CODE (XEXP (y, 1)) == CONST_INT
940da324
JL
3412 && ((HAVE_POST_INCREMENT
3413 && (INTVAL (XEXP (y, 1)) == size && offset == 0))
3414 || (HAVE_POST_DECREMENT
3415 && (INTVAL (XEXP (y, 1)) == - size && offset == 0))
3416 || (HAVE_PRE_INCREMENT
3417 && (INTVAL (XEXP (y, 1)) == size && offset == size))
3418 || (HAVE_PRE_DECREMENT
3419 && (INTVAL (XEXP (y, 1)) == - size && offset == - size)))
d7429b6a
RK
3420 /* Make sure this reg appears only once in this insn. */
3421 && (use = find_use_as_address (PATTERN (insn), addr, offset),
3422 use != 0 && use != (rtx) 1))
3423 {
05ed5d57 3424 rtx q = SET_DEST (set);
7280c2a4
RK
3425 enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size
3426 ? (offset ? PRE_INC : POST_INC)
3427 : (offset ? PRE_DEC : POST_DEC));
d7429b6a
RK
3428
3429 if (dead_or_set_p (incr, addr))
7280c2a4
RK
3430 {
3431 /* This is the simple case. Try to make the auto-inc. If
3432 we can't, we are done. Otherwise, we will do any
3433 needed updates below. */
3434 if (! validate_change (insn, &XEXP (x, 0),
38a448ca 3435 gen_rtx_fmt_e (inc_code, Pmode, addr),
7280c2a4
RK
3436 0))
3437 return;
3438 }
5175ad37
DE
3439 else if (GET_CODE (q) == REG
3440 /* PREV_INSN used here to check the semi-open interval
3441 [insn,incr). */
b24884cd
JL
3442 && ! reg_used_between_p (q, PREV_INSN (insn), incr)
3443 /* We must also check for sets of q as q may be
3444 a call clobbered hard register and there may
3445 be a call between PREV_INSN (insn) and incr. */
3446 && ! reg_set_between_p (q, PREV_INSN (insn), incr))
d7429b6a 3447 {
5175ad37 3448 /* We have *p followed sometime later by q = p+size.
d7429b6a 3449 Both p and q must be live afterward,
9ec36da5 3450 and q is not used between INSN and its assignment.
d7429b6a
RK
3451 Change it to q = p, ...*q..., q = q+size.
3452 Then fall into the usual case. */
3453 rtx insns, temp;
e881bb1b 3454 basic_block bb;
d7429b6a
RK
3455
3456 start_sequence ();
3457 emit_move_insn (q, addr);
3458 insns = get_insns ();
3459 end_sequence ();
3460
e881bb1b 3461 bb = BLOCK_FOR_INSN (insn);
d7429b6a 3462 for (temp = insns; temp; temp = NEXT_INSN (temp))
e881bb1b 3463 set_block_for_insn (temp, bb);
d7429b6a 3464
7280c2a4
RK
3465 /* If we can't make the auto-inc, or can't make the
3466 replacement into Y, exit. There's no point in making
3467 the change below if we can't do the auto-inc and doing
3468 so is not correct in the pre-inc case. */
3469
3470 validate_change (insn, &XEXP (x, 0),
38a448ca 3471 gen_rtx_fmt_e (inc_code, Pmode, q),
7280c2a4
RK
3472 1);
3473 validate_change (incr, &XEXP (y, 0), q, 1);
3474 if (! apply_change_group ())
3475 return;
3476
3477 /* We now know we'll be doing this change, so emit the
3478 new insn(s) and do the updates. */
d7429b6a 3479 emit_insns_before (insns, insn);
e8b641a1 3480
e881bb1b
RH
3481 if (BLOCK_FOR_INSN (insn)->head == insn)
3482 BLOCK_FOR_INSN (insn)->head = insns;
e8b641a1 3483
d7429b6a
RK
3484 /* INCR will become a NOTE and INSN won't contain a
3485 use of ADDR. If a use of ADDR was just placed in
3486 the insn before INSN, make that the next use.
3487 Otherwise, invalidate it. */
3488 if (GET_CODE (PREV_INSN (insn)) == INSN
3489 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
3490 && SET_SRC (PATTERN (PREV_INSN (insn))) == addr)
3491 reg_next_use[regno] = PREV_INSN (insn);
3492 else
3493 reg_next_use[regno] = 0;
3494
3495 addr = q;
3496 regno = REGNO (q);
d7429b6a
RK
3497
3498 /* REGNO is now used in INCR which is below INSN, but
3499 it previously wasn't live here. If we don't mark
3500 it as needed, we'll put a REG_DEAD note for it
3501 on this insn, which is incorrect. */
916b1701 3502 SET_REGNO_REG_SET (needed, regno);
d7429b6a
RK
3503
3504 /* If there are any calls between INSN and INCR, show
3505 that REGNO now crosses them. */
3506 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
3507 if (GET_CODE (temp) == CALL_INSN)
b1f21e0a 3508 REG_N_CALLS_CROSSED (regno)++;
d7429b6a 3509 }
02df8aba
RK
3510 else
3511 return;
d7429b6a 3512
7280c2a4
RK
3513 /* If we haven't returned, it means we were able to make the
3514 auto-inc, so update the status. First, record that this insn
3515 has an implicit side effect. */
3516
3517 REG_NOTES (insn)
38a448ca 3518 = gen_rtx_EXPR_LIST (REG_INC, addr, REG_NOTES (insn));
7280c2a4
RK
3519
3520 /* Modify the old increment-insn to simply copy
3521 the already-incremented value of our register. */
3522 if (! validate_change (incr, &SET_SRC (set), addr, 0))
3523 abort ();
3524
3525 /* If that makes it a no-op (copying the register into itself) delete
3526 it so it won't appear to be a "use" and a "set" of this
3527 register. */
3528 if (SET_DEST (set) == addr)
d7429b6a 3529 {
7280c2a4
RK
3530 PUT_CODE (incr, NOTE);
3531 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
3532 NOTE_SOURCE_FILE (incr) = 0;
3533 }
d7429b6a 3534
7280c2a4
RK
3535 if (regno >= FIRST_PSEUDO_REGISTER)
3536 {
3537 /* Count an extra reference to the reg. When a reg is
3538 incremented, spilling it is worse, so we want to make
3539 that less likely. */
b1f21e0a 3540 REG_N_REFS (regno) += loop_depth;
7280c2a4
RK
3541
3542 /* Count the increment as a setting of the register,
3543 even though it isn't a SET in rtl. */
b1f21e0a 3544 REG_N_SETS (regno)++;
d7429b6a
RK
3545 }
3546 }
3547 }
3548}
3549#endif /* AUTO_INC_DEC */
3550\f
3551/* Scan expression X and store a 1-bit in LIVE for each reg it uses.
3552 This is done assuming the registers needed from X
3553 are those that have 1-bits in NEEDED.
3554
3555 On the final pass, FINAL is 1. This means try for autoincrement
3556 and count the uses and deaths of each pseudo-reg.
3557
3558 INSN is the containing instruction. If INSN is dead, this function is not
3559 called. */
3560
3561static void
3562mark_used_regs (needed, live, x, final, insn)
3563 regset needed;
3564 regset live;
3565 rtx x;
d7429b6a 3566 int final;
e658434c 3567 rtx insn;
d7429b6a
RK
3568{
3569 register RTX_CODE code;
3570 register int regno;
3571 int i;
3572
3573 retry:
3574 code = GET_CODE (x);
3575 switch (code)
3576 {
3577 case LABEL_REF:
3578 case SYMBOL_REF:
3579 case CONST_INT:
3580 case CONST:
3581 case CONST_DOUBLE:
3582 case PC:
d7429b6a
RK
3583 case ADDR_VEC:
3584 case ADDR_DIFF_VEC:
3585 case ASM_INPUT:
3586 return;
3587
3588#ifdef HAVE_cc0
3589 case CC0:
3590 cc0_live = 1;
3591 return;
3592#endif
3593
2f1553a4
RK
3594 case CLOBBER:
3595 /* If we are clobbering a MEM, mark any registers inside the address
3596 as being used. */
3597 if (GET_CODE (XEXP (x, 0)) == MEM)
3598 mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn);
3599 return;
3600
d7429b6a 3601 case MEM:
7eb136d6
MM
3602 /* Invalidate the data for the last MEM stored, but only if MEM is
3603 something that can be stored into. */
3604 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3605 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
db3a887b 3606 ; /* needn't clear the memory set list */
7eb136d6 3607 else
db3a887b
CB
3608 {
3609 rtx temp = mem_set_list;
3610 rtx prev = NULL_RTX;
3611
3612 while (temp)
3613 {
063cd522 3614 if (anti_dependence (XEXP (temp, 0), x))
db3a887b
CB
3615 {
3616 /* Splice temp out of the list. */
3617 if (prev)
3618 XEXP (prev, 1) = XEXP (temp, 1);
3619 else
3620 mem_set_list = XEXP (temp, 1);
3621 }
3622 else
3623 prev = temp;
3624 temp = XEXP (temp, 1);
3625 }
3626 }
d7429b6a 3627
15e088b2
JL
3628 /* If the memory reference had embedded side effects (autoincrement
3629 address modes. Then we may need to kill some entries on the
3630 memory set list. */
3631 if (insn)
3632 invalidate_mems_from_autoinc (insn);
3633
d7429b6a
RK
3634#ifdef AUTO_INC_DEC
3635 if (final)
3636 find_auto_inc (needed, x, insn);
3637#endif
3638 break;
3639
80f8f04a
RK
3640 case SUBREG:
3641 if (GET_CODE (SUBREG_REG (x)) == REG
3642 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
3643 && (GET_MODE_SIZE (GET_MODE (x))
88285acf 3644 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
b1f21e0a 3645 REG_CHANGES_SIZE (REGNO (SUBREG_REG (x))) = 1;
80f8f04a
RK
3646
3647 /* While we're here, optimize this case. */
3648 x = SUBREG_REG (x);
3649
e100a3bb 3650 /* In case the SUBREG is not of a register, don't optimize */
ce79abf3 3651 if (GET_CODE (x) != REG)
e100a3bb
MM
3652 {
3653 mark_used_regs (needed, live, x, final, insn);
3654 return;
3655 }
ce79abf3 3656
0f41302f 3657 /* ... fall through ... */
80f8f04a 3658
d7429b6a
RK
3659 case REG:
3660 /* See a register other than being set
3661 => mark it as needed. */
3662
3663 regno = REGNO (x);
3664 {
67f0e213
RK
3665 int some_needed = REGNO_REG_SET_P (needed, regno);
3666 int some_not_needed = ! some_needed;
d7429b6a 3667
916b1701 3668 SET_REGNO_REG_SET (live, regno);
cb9e8ad1 3669
d7429b6a
RK
3670 /* A hard reg in a wide mode may really be multiple registers.
3671 If so, mark all of them just like the first. */
3672 if (regno < FIRST_PSEUDO_REGISTER)
3673 {
3674 int n;
3675
d7e4fe8b 3676 /* For stack ptr or fixed arg pointer,
d7429b6a
RK
3677 nothing below can be necessary, so waste no more time. */
3678 if (regno == STACK_POINTER_REGNUM
73a187c1
DE
3679#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
3680 || regno == HARD_FRAME_POINTER_REGNUM
3681#endif
d7e4fe8b
RS
3682#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3683 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
3684#endif
d7429b6a
RK
3685 || regno == FRAME_POINTER_REGNUM)
3686 {
3687 /* If this is a register we are going to try to eliminate,
3688 don't mark it live here. If we are successful in
3689 eliminating it, it need not be live unless it is used for
3690 pseudos, in which case it will have been set live when
3691 it was allocated to the pseudos. If the register will not
3692 be eliminated, reload will set it live at that point. */
3693
3694 if (! TEST_HARD_REG_BIT (elim_reg_set, regno))
3695 regs_ever_live[regno] = 1;
3696 return;
3697 }
3698 /* No death notes for global register variables;
3699 their values are live after this function exits. */
3700 if (global_regs[regno])
d8c8b8e3
RS
3701 {
3702 if (final)
3703 reg_next_use[regno] = insn;
3704 return;
3705 }
d7429b6a
RK
3706
3707 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
3708 while (--n > 0)
3709 {
916b1701
MM
3710 int regno_n = regno + n;
3711 int needed_regno = REGNO_REG_SET_P (needed, regno_n);
cb9e8ad1 3712
916b1701
MM
3713 SET_REGNO_REG_SET (live, regno_n);
3714 some_needed |= needed_regno;
931c6c7a 3715 some_not_needed |= ! needed_regno;
d7429b6a
RK
3716 }
3717 }
3718 if (final)
3719 {
3720 /* Record where each reg is used, so when the reg
3721 is set we know the next insn that uses it. */
3722
3723 reg_next_use[regno] = insn;
3724
3725 if (regno < FIRST_PSEUDO_REGISTER)
3726 {
3727 /* If a hard reg is being used,
3728 record that this function does use it. */
3729
3730 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
3731 if (i == 0)
3732 i = 1;
3733 do
3734 regs_ever_live[regno + --i] = 1;
3735 while (i > 0);
3736 }
3737 else
3738 {
3739 /* Keep track of which basic block each reg appears in. */
3740
3741 register int blocknum = BLOCK_NUM (insn);
3742
b1f21e0a
MM
3743 if (REG_BASIC_BLOCK (regno) == REG_BLOCK_UNKNOWN)
3744 REG_BASIC_BLOCK (regno) = blocknum;
3745 else if (REG_BASIC_BLOCK (regno) != blocknum)
3746 REG_BASIC_BLOCK (regno) = REG_BLOCK_GLOBAL;
d7429b6a
RK
3747
3748 /* Count (weighted) number of uses of each reg. */
3749
b1f21e0a 3750 REG_N_REFS (regno) += loop_depth;
d7429b6a
RK
3751 }
3752
3753 /* Record and count the insns in which a reg dies.
3754 If it is used in this insn and was dead below the insn
3755 then it dies in this insn. If it was set in this insn,
3756 we do not make a REG_DEAD note; likewise if we already
3757 made such a note. */
3758
cb9e8ad1 3759 if (some_not_needed
d7429b6a
RK
3760 && ! dead_or_set_p (insn, x)
3761#if 0
3762 && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
3763#endif
3764 )
3765 {
ab28041e
JW
3766 /* Check for the case where the register dying partially
3767 overlaps the register set by this insn. */
3768 if (regno < FIRST_PSEUDO_REGISTER
3769 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
3770 {
480eac3b 3771 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
ab28041e
JW
3772 while (--n >= 0)
3773 some_needed |= dead_or_set_regno_p (insn, regno + n);
3774 }
3775
d7429b6a
RK
3776 /* If none of the words in X is needed, make a REG_DEAD
3777 note. Otherwise, we must make partial REG_DEAD notes. */
3778 if (! some_needed)
3779 {
3780 REG_NOTES (insn)
38a448ca 3781 = gen_rtx_EXPR_LIST (REG_DEAD, x, REG_NOTES (insn));
b1f21e0a 3782 REG_N_DEATHS (regno)++;
d7429b6a
RK
3783 }
3784 else
3785 {
3786 int i;
3787
3788 /* Don't make a REG_DEAD note for a part of a register
3789 that is set in the insn. */
3790
3791 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
3792 i >= 0; i--)
916b1701 3793 if (!REGNO_REG_SET_P (needed, regno + i)
d7429b6a
RK
3794 && ! dead_or_set_regno_p (insn, regno + i))
3795 REG_NOTES (insn)
38a448ca
RH
3796 = gen_rtx_EXPR_LIST (REG_DEAD,
3797 gen_rtx_REG (reg_raw_mode[regno + i],
3798 regno + i),
3799 REG_NOTES (insn));
d7429b6a
RK
3800 }
3801 }
3802 }
3803 }
3804 return;
3805
3806 case SET:
3807 {
3808 register rtx testreg = SET_DEST (x);
3809 int mark_dest = 0;
3810
3811 /* If storing into MEM, don't show it as being used. But do
3812 show the address as being used. */
3813 if (GET_CODE (testreg) == MEM)
3814 {
3815#ifdef AUTO_INC_DEC
3816 if (final)
3817 find_auto_inc (needed, testreg, insn);
3818#endif
3819 mark_used_regs (needed, live, XEXP (testreg, 0), final, insn);
3820 mark_used_regs (needed, live, SET_SRC (x), final, insn);
3821 return;
3822 }
3823
3824 /* Storing in STRICT_LOW_PART is like storing in a reg
3825 in that this SET might be dead, so ignore it in TESTREG.
3826 but in some other ways it is like using the reg.
3827
3828 Storing in a SUBREG or a bit field is like storing the entire
3829 register in that if the register's value is not used
3830 then this SET is not needed. */
3831 while (GET_CODE (testreg) == STRICT_LOW_PART
3832 || GET_CODE (testreg) == ZERO_EXTRACT
3833 || GET_CODE (testreg) == SIGN_EXTRACT
3834 || GET_CODE (testreg) == SUBREG)
3835 {
88285acf
RK
3836 if (GET_CODE (testreg) == SUBREG
3837 && GET_CODE (SUBREG_REG (testreg)) == REG
3838 && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER
3839 && (GET_MODE_SIZE (GET_MODE (testreg))
3840 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg)))))
b1f21e0a 3841 REG_CHANGES_SIZE (REGNO (SUBREG_REG (testreg))) = 1;
88285acf 3842
d7429b6a
RK
3843 /* Modifying a single register in an alternate mode
3844 does not use any of the old value. But these other
3845 ways of storing in a register do use the old value. */
3846 if (GET_CODE (testreg) == SUBREG
3847 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
3848 ;
3849 else
3850 mark_dest = 1;
3851
3852 testreg = XEXP (testreg, 0);
3853 }
3854
3855 /* If this is a store into a register,
3856 recursively scan the value being stored. */
3857
86465af7
DM
3858 if ((GET_CODE (testreg) == PARALLEL
3859 && GET_MODE (testreg) == BLKmode)
3860 || (GET_CODE (testreg) == REG
3861 && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
73a187c1 3862#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
86465af7 3863 && regno != HARD_FRAME_POINTER_REGNUM
73a187c1 3864#endif
d7e4fe8b 3865#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
86465af7 3866 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
d7e4fe8b 3867#endif
86465af7 3868 ))
d8c8b8e3
RS
3869 /* We used to exclude global_regs here, but that seems wrong.
3870 Storing in them is like storing in mem. */
d7429b6a
RK
3871 {
3872 mark_used_regs (needed, live, SET_SRC (x), final, insn);
3873 if (mark_dest)
3874 mark_used_regs (needed, live, SET_DEST (x), final, insn);
3875 return;
3876 }
3877 }
3878 break;
3879
3880 case RETURN:
3881 /* If exiting needs the right stack value, consider this insn as
3882 using the stack pointer. In any event, consider it as using
632c9d9e 3883 all global registers and all registers used by return. */
d7429b6a 3884 if (! EXIT_IGNORE_STACK
0200b5ed
JL
3885 || (! FRAME_POINTER_REQUIRED
3886 && ! current_function_calls_alloca
bfc5000a
JL
3887 && flag_omit_frame_pointer)
3888 || current_function_sp_is_unchanging)
916b1701 3889 SET_REGNO_REG_SET (live, STACK_POINTER_REGNUM);
d7429b6a
RK
3890
3891 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
632c9d9e
MS
3892 if (global_regs[i]
3893#ifdef EPILOGUE_USES
3894 || EPILOGUE_USES (i)
3895#endif
3896 )
916b1701 3897 SET_REGNO_REG_SET (live, i);
d7429b6a 3898 break;
e9a25f70
JL
3899
3900 default:
3901 break;
d7429b6a
RK
3902 }
3903
3904 /* Recursively scan the operands of this expression. */
3905
3906 {
3907 register char *fmt = GET_RTX_FORMAT (code);
3908 register int i;
3909
3910 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3911 {
3912 if (fmt[i] == 'e')
3913 {
3914 /* Tail recursive case: save a function call level. */
3915 if (i == 0)
3916 {
3917 x = XEXP (x, 0);
3918 goto retry;
3919 }
3920 mark_used_regs (needed, live, XEXP (x, i), final, insn);
3921 }
3922 else if (fmt[i] == 'E')
3923 {
3924 register int j;
3925 for (j = 0; j < XVECLEN (x, i); j++)
3926 mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
3927 }
3928 }
3929 }
3930}
3931\f
3932#ifdef AUTO_INC_DEC
3933
3934static int
3935try_pre_increment_1 (insn)
3936 rtx insn;
3937{
3938 /* Find the next use of this reg. If in same basic block,
3939 make it do pre-increment or pre-decrement if appropriate. */
956d6950 3940 rtx x = single_set (insn);
5f4f0e22 3941 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
d7429b6a
RK
3942 * INTVAL (XEXP (SET_SRC (x), 1)));
3943 int regno = REGNO (SET_DEST (x));
3944 rtx y = reg_next_use[regno];
3945 if (y != 0
3946 && BLOCK_NUM (y) == BLOCK_NUM (insn)
89861c38 3947 /* Don't do this if the reg dies, or gets set in y; a standard addressing
0f41302f 3948 mode would be better. */
89861c38 3949 && ! dead_or_set_p (y, SET_DEST (x))
956d6950 3950 && try_pre_increment (y, SET_DEST (x), amount))
d7429b6a
RK
3951 {
3952 /* We have found a suitable auto-increment
3953 and already changed insn Y to do it.
3954 So flush this increment-instruction. */
3955 PUT_CODE (insn, NOTE);
3956 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
3957 NOTE_SOURCE_FILE (insn) = 0;
3958 /* Count a reference to this reg for the increment
3959 insn we are deleting. When a reg is incremented.
3960 spilling it is worse, so we want to make that
3961 less likely. */
3962 if (regno >= FIRST_PSEUDO_REGISTER)
3963 {
b1f21e0a
MM
3964 REG_N_REFS (regno) += loop_depth;
3965 REG_N_SETS (regno)++;
d7429b6a
RK
3966 }
3967 return 1;
3968 }
3969 return 0;
3970}
3971
3972/* Try to change INSN so that it does pre-increment or pre-decrement
3973 addressing on register REG in order to add AMOUNT to REG.
3974 AMOUNT is negative for pre-decrement.
3975 Returns 1 if the change could be made.
3976 This checks all about the validity of the result of modifying INSN. */
3977
3978static int
3979try_pre_increment (insn, reg, amount)
3980 rtx insn, reg;
5f4f0e22 3981 HOST_WIDE_INT amount;
d7429b6a
RK
3982{
3983 register rtx use;
3984
3985 /* Nonzero if we can try to make a pre-increment or pre-decrement.
3986 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
3987 int pre_ok = 0;
3988 /* Nonzero if we can try to make a post-increment or post-decrement.
3989 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
3990 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
3991 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
3992 int post_ok = 0;
3993
3994 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
3995 int do_post = 0;
3996
3997 /* From the sign of increment, see which possibilities are conceivable
3998 on this target machine. */
940da324 3999 if (HAVE_PRE_INCREMENT && amount > 0)
d7429b6a 4000 pre_ok = 1;
940da324 4001 if (HAVE_POST_INCREMENT && amount > 0)
d7429b6a 4002 post_ok = 1;
d7429b6a 4003
940da324 4004 if (HAVE_PRE_DECREMENT && amount < 0)
d7429b6a 4005 pre_ok = 1;
940da324 4006 if (HAVE_POST_DECREMENT && amount < 0)
d7429b6a 4007 post_ok = 1;
d7429b6a
RK
4008
4009 if (! (pre_ok || post_ok))
4010 return 0;
4011
4012 /* It is not safe to add a side effect to a jump insn
4013 because if the incremented register is spilled and must be reloaded
4014 there would be no way to store the incremented value back in memory. */
4015
4016 if (GET_CODE (insn) == JUMP_INSN)
4017 return 0;
4018
4019 use = 0;
4020 if (pre_ok)
4021 use = find_use_as_address (PATTERN (insn), reg, 0);
4022 if (post_ok && (use == 0 || use == (rtx) 1))
4023 {
4024 use = find_use_as_address (PATTERN (insn), reg, -amount);
4025 do_post = 1;
4026 }
4027
4028 if (use == 0 || use == (rtx) 1)
4029 return 0;
4030
4031 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
4032 return 0;
4033
a0fbc3a9
SC
4034 /* See if this combination of instruction and addressing mode exists. */
4035 if (! validate_change (insn, &XEXP (use, 0),
38a448ca
RH
4036 gen_rtx_fmt_e (amount > 0
4037 ? (do_post ? POST_INC : PRE_INC)
4038 : (do_post ? POST_DEC : PRE_DEC),
4039 Pmode, reg), 0))
a0fbc3a9 4040 return 0;
d7429b6a
RK
4041
4042 /* Record that this insn now has an implicit side effect on X. */
38a448ca 4043 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg, REG_NOTES (insn));
d7429b6a
RK
4044 return 1;
4045}
4046
4047#endif /* AUTO_INC_DEC */
4048\f
4049/* Find the place in the rtx X where REG is used as a memory address.
4050 Return the MEM rtx that so uses it.
4051 If PLUSCONST is nonzero, search instead for a memory address equivalent to
4052 (plus REG (const_int PLUSCONST)).
4053
4054 If such an address does not appear, return 0.
4055 If REG appears more than once, or is used other than in such an address,
4056 return (rtx)1. */
4057
8c660648 4058rtx
d7429b6a
RK
4059find_use_as_address (x, reg, plusconst)
4060 register rtx x;
4061 rtx reg;
e658434c 4062 HOST_WIDE_INT plusconst;
d7429b6a
RK
4063{
4064 enum rtx_code code = GET_CODE (x);
4065 char *fmt = GET_RTX_FORMAT (code);
4066 register int i;
4067 register rtx value = 0;
4068 register rtx tem;
4069
4070 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
4071 return x;
4072
4073 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
4074 && XEXP (XEXP (x, 0), 0) == reg
4075 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
4076 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
4077 return x;
4078
4079 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
4080 {
4081 /* If REG occurs inside a MEM used in a bit-field reference,
4082 that is unacceptable. */
4083 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
6fa5c106 4084 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4085 }
4086
4087 if (x == reg)
6fa5c106 4088 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4089
4090 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4091 {
4092 if (fmt[i] == 'e')
4093 {
4094 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
4095 if (value == 0)
4096 value = tem;
4097 else if (tem != 0)
6fa5c106 4098 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4099 }
4100 if (fmt[i] == 'E')
4101 {
4102 register int j;
4103 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4104 {
4105 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
4106 if (value == 0)
4107 value = tem;
4108 else if (tem != 0)
6fa5c106 4109 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
4110 }
4111 }
4112 }
4113
4114 return value;
4115}
4116\f
4117/* Write information about registers and basic blocks into FILE.
4118 This is part of making a debugging dump. */
4119
4120void
4121dump_flow_info (file)
4122 FILE *file;
4123{
4124 register int i;
4125 static char *reg_class_names[] = REG_CLASS_NAMES;
4126
4127 fprintf (file, "%d registers.\n", max_regno);
d7429b6a 4128 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
b1f21e0a 4129 if (REG_N_REFS (i))
d7429b6a 4130 {
e4600702 4131 enum reg_class class, altclass;
d7429b6a 4132 fprintf (file, "\nRegister %d used %d times across %d insns",
b1f21e0a
MM
4133 i, REG_N_REFS (i), REG_LIVE_LENGTH (i));
4134 if (REG_BASIC_BLOCK (i) >= 0)
4135 fprintf (file, " in block %d", REG_BASIC_BLOCK (i));
6fc4610b
MM
4136 if (REG_N_SETS (i))
4137 fprintf (file, "; set %d time%s", REG_N_SETS (i),
4138 (REG_N_SETS (i) == 1) ? "" : "s");
4139 if (REG_USERVAR_P (regno_reg_rtx[i]))
4140 fprintf (file, "; user var");
b1f21e0a
MM
4141 if (REG_N_DEATHS (i) != 1)
4142 fprintf (file, "; dies in %d places", REG_N_DEATHS (i));
4143 if (REG_N_CALLS_CROSSED (i) == 1)
d7429b6a 4144 fprintf (file, "; crosses 1 call");
b1f21e0a
MM
4145 else if (REG_N_CALLS_CROSSED (i))
4146 fprintf (file, "; crosses %d calls", REG_N_CALLS_CROSSED (i));
d7429b6a
RK
4147 if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
4148 fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
4149 class = reg_preferred_class (i);
e4600702
RK
4150 altclass = reg_alternate_class (i);
4151 if (class != GENERAL_REGS || altclass != ALL_REGS)
d7429b6a 4152 {
e4600702
RK
4153 if (altclass == ALL_REGS || class == ALL_REGS)
4154 fprintf (file, "; pref %s", reg_class_names[(int) class]);
4155 else if (altclass == NO_REGS)
d7429b6a
RK
4156 fprintf (file, "; %s or none", reg_class_names[(int) class]);
4157 else
e4600702
RK
4158 fprintf (file, "; pref %s, else %s",
4159 reg_class_names[(int) class],
4160 reg_class_names[(int) altclass]);
d7429b6a
RK
4161 }
4162 if (REGNO_POINTER_FLAG (i))
4163 fprintf (file, "; pointer");
4164 fprintf (file, ".\n");
4165 }
e881bb1b 4166
d7429b6a 4167 fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
e881bb1b
RH
4168 for (i = 0; i < n_basic_blocks; i++)
4169 {
4170 register basic_block bb = BASIC_BLOCK (i);
4171 register int regno;
4172 register edge e;
4173
4174 fprintf (file, "\nBasic block %d: first insn %d, last %d.\n",
4175 i, INSN_UID (bb->head), INSN_UID (bb->end));
4176
4177 fprintf (file, "Predecessors: ");
4178 for (e = bb->pred; e ; e = e->pred_next)
4179 dump_edge_info (file, e, 0);
4180
4181 fprintf (file, "\nSuccessors: ");
4182 for (e = bb->succ; e ; e = e->succ_next)
4183 dump_edge_info (file, e, 1);
4184
4185 fprintf (file, "\nRegisters live at start:");
4186 if (bb->global_live_at_start)
4187 {
4188 for (regno = 0; regno < max_regno; regno++)
4189 if (REGNO_REG_SET_P (bb->global_live_at_start, regno))
4190 fprintf (file, " %d", regno);
4191 }
4192 else
4193 fprintf (file, " n/a");
4194
4195 fprintf (file, "\nRegisters live at end:");
4196 if (bb->global_live_at_end)
4197 {
4198 for (regno = 0; regno < max_regno; regno++)
4199 if (REGNO_REG_SET_P (bb->global_live_at_end, regno))
4200 fprintf (file, " %d", regno);
4201 }
4202 else
4203 fprintf (file, " n/a");
4204
4205 putc('\n', file);
4206 }
4207
4208 putc('\n', file);
4209}
4210
4211static void
4212dump_edge_info (file, e, do_succ)
4213 FILE *file;
4214 edge e;
4215 int do_succ;
4216{
4217 basic_block side = (do_succ ? e->dest : e->src);
4218
4219 if (side == ENTRY_BLOCK_PTR)
4220 fputs (" ENTRY", file);
4221 else if (side == EXIT_BLOCK_PTR)
4222 fputs (" EXIT", file);
4223 else
4224 fprintf (file, " %d", side->index);
4225
4226 if (e->flags)
4227 {
4228 static char * bitnames[] = {
4229 "fallthru", "crit", "ab", "abcall", "eh", "fake"
4230 };
4231 int comma = 0;
4232 int i, flags = e->flags;
4233
4234 fputc (' ', file);
4235 fputc ('(', file);
4236 for (i = 0; flags; i++)
4237 if (flags & (1 << i))
4238 {
4239 flags &= ~(1 << i);
4240
4241 if (comma)
4242 fputc (',', file);
4243 if (i < (int)(sizeof (bitnames) / sizeof (*bitnames)))
4244 fputs (bitnames[i], file);
4245 else
4246 fprintf (file, "%d", i);
4247 comma = 1;
4248 }
4249 fputc (')', file);
4250 }
d7429b6a 4251}
3e28fe44
MM
4252
4253\f
4254/* Like print_rtl, but also print out live information for the start of each
4255 basic block. */
4256
4257void
4258print_rtl_with_bb (outf, rtx_first)
4259 FILE *outf;
4260 rtx rtx_first;
4261{
4262 register rtx tmp_rtx;
4263
4264 if (rtx_first == 0)
4265 fprintf (outf, "(nil)\n");
3e28fe44
MM
4266 else
4267 {
e881bb1b 4268 int i;
3e28fe44
MM
4269 enum bb_state { NOT_IN_BB, IN_ONE_BB, IN_MULTIPLE_BB };
4270 int max_uid = get_max_uid ();
54ea1de9
KG
4271 basic_block *start = (basic_block *)
4272 alloca (max_uid * sizeof (basic_block));
4273 basic_block *end = (basic_block *)
4274 alloca (max_uid * sizeof (basic_block));
2a92c071
GS
4275 enum bb_state *in_bb_p = (enum bb_state *)
4276 alloca (max_uid * sizeof (enum bb_state));
3e28fe44 4277
e881bb1b
RH
4278 memset (start, 0, max_uid * sizeof (basic_block));
4279 memset (end, 0, max_uid * sizeof (basic_block));
4280 memset (in_bb_p, 0, max_uid * sizeof (enum bb_state));
3e28fe44 4281
e881bb1b 4282 for (i = n_basic_blocks - 1; i >= 0; i--)
3e28fe44 4283 {
e881bb1b 4284 basic_block bb = BASIC_BLOCK (i);
3e28fe44 4285 rtx x;
e881bb1b
RH
4286
4287 start[INSN_UID (bb->head)] = bb;
4288 end[INSN_UID (bb->end)] = bb;
4289 for (x = bb->head; x != NULL_RTX; x = NEXT_INSN (x))
3e28fe44 4290 {
e881bb1b
RH
4291 enum bb_state state = IN_MULTIPLE_BB;
4292 if (in_bb_p[INSN_UID(x)] == NOT_IN_BB)
4293 state = IN_ONE_BB;
4294 in_bb_p[INSN_UID(x)] = state;
4295
4296 if (x == bb->end)
3e28fe44
MM
4297 break;
4298 }
4299 }
4300
4301 for (tmp_rtx = rtx_first; NULL != tmp_rtx; tmp_rtx = NEXT_INSN (tmp_rtx))
4302 {
b707b450 4303 int did_output;
e881bb1b 4304 basic_block bb;
b707b450 4305
e881bb1b 4306 if ((bb = start[INSN_UID (tmp_rtx)]) != NULL)
3e28fe44
MM
4307 {
4308 fprintf (outf, ";; Start of basic block %d, registers live:",
e881bb1b 4309 bb->index);
3e28fe44 4310
e881bb1b 4311 EXECUTE_IF_SET_IN_REG_SET (bb->global_live_at_start, 0, i,
3e28fe44
MM
4312 {
4313 fprintf (outf, " %d", i);
4314 if (i < FIRST_PSEUDO_REGISTER)
4315 fprintf (outf, " [%s]",
4316 reg_names[i]);
4317 });
4318 putc ('\n', outf);
4319 }
4320
ab87f8c8 4321 if (in_bb_p[INSN_UID(tmp_rtx)] == NOT_IN_BB
3e28fe44 4322 && GET_CODE (tmp_rtx) != NOTE
ab87f8c8
JL
4323 && GET_CODE (tmp_rtx) != BARRIER
4324 && ! obey_regdecls)
3e28fe44 4325 fprintf (outf, ";; Insn is not within a basic block\n");
e881bb1b 4326 else if (in_bb_p[INSN_UID(tmp_rtx)] == IN_MULTIPLE_BB)
3e28fe44
MM
4327 fprintf (outf, ";; Insn is in multiple basic blocks\n");
4328
b707b450 4329 did_output = print_rtl_single (outf, tmp_rtx);
3e28fe44 4330
e881bb1b
RH
4331 if ((bb = end[INSN_UID (tmp_rtx)]) != NULL)
4332 fprintf (outf, ";; End of basic block %d\n", bb->index);
3e28fe44 4333
b707b450 4334 if (did_output)
9ec36da5 4335 putc ('\n', outf);
3e28fe44
MM
4336 }
4337 }
4338}
5ece9746
JL
4339
4340\f
4341/* Integer list support. */
4342
4343/* Allocate a node from list *HEAD_PTR. */
4344
4345static int_list_ptr
4346alloc_int_list_node (head_ptr)
4347 int_list_block **head_ptr;
4348{
4349 struct int_list_block *first_blk = *head_ptr;
4350
4351 if (first_blk == NULL || first_blk->nodes_left <= 0)
4352 {
4353 first_blk = (struct int_list_block *) xmalloc (sizeof (struct int_list_block));
4354 first_blk->nodes_left = INT_LIST_NODES_IN_BLK;
4355 first_blk->next = *head_ptr;
4356 *head_ptr = first_blk;
4357 }
4358
4359 first_blk->nodes_left--;
4360 return &first_blk->nodes[first_blk->nodes_left];
4361}
4362
4363/* Pointer to head of predecessor/successor block list. */
4364static int_list_block *pred_int_list_blocks;
4365
4366/* Add a new node to integer list LIST with value VAL.
4367 LIST is a pointer to a list object to allow for different implementations.
4368 If *LIST is initially NULL, the list is empty.
4369 The caller must not care whether the element is added to the front or
4370 to the end of the list (to allow for different implementations). */
4371
4372static int_list_ptr
4373add_int_list_node (blk_list, list, val)
4374 int_list_block **blk_list;
4375 int_list **list;
4376 int val;
4377{
4378 int_list_ptr p = alloc_int_list_node (blk_list);
4379
4380 p->val = val;
4381 p->next = *list;
4382 *list = p;
4383 return p;
4384}
4385
4386/* Free the blocks of lists at BLK_LIST. */
4387
4388void
4389free_int_list (blk_list)
4390 int_list_block **blk_list;
4391{
4392 int_list_block *p, *next;
4393
4394 for (p = *blk_list; p != NULL; p = next)
4395 {
4396 next = p->next;
4397 free (p);
4398 }
4399
4400 /* Mark list as empty for the next function we compile. */
4401 *blk_list = NULL;
4402}
4403\f
4404/* Predecessor/successor computation. */
4405
4406/* Mark PRED_BB a precessor of SUCC_BB,
4407 and conversely SUCC_BB a successor of PRED_BB. */
4408
4409static void
4410add_pred_succ (pred_bb, succ_bb, s_preds, s_succs, num_preds, num_succs)
4411 int pred_bb;
4412 int succ_bb;
4413 int_list_ptr *s_preds;
4414 int_list_ptr *s_succs;
4415 int *num_preds;
4416 int *num_succs;
4417{
4418 if (succ_bb != EXIT_BLOCK)
4419 {
4420 add_int_list_node (&pred_int_list_blocks, &s_preds[succ_bb], pred_bb);
4421 num_preds[succ_bb]++;
4422 }
4423 if (pred_bb != ENTRY_BLOCK)
4424 {
4425 add_int_list_node (&pred_int_list_blocks, &s_succs[pred_bb], succ_bb);
4426 num_succs[pred_bb]++;
4427 }
4428}
4429
e881bb1b
RH
4430/* Convert edge lists into pred/succ lists for backward compatibility. */
4431
743bb12d 4432void
5ece9746
JL
4433compute_preds_succs (s_preds, s_succs, num_preds, num_succs)
4434 int_list_ptr *s_preds;
4435 int_list_ptr *s_succs;
4436 int *num_preds;
4437 int *num_succs;
4438{
e881bb1b
RH
4439 int i, n = n_basic_blocks;
4440 edge e;
5ece9746 4441
e881bb1b
RH
4442 memset (s_preds, 0, n_basic_blocks * sizeof (int_list_ptr));
4443 memset (s_succs, 0, n_basic_blocks * sizeof (int_list_ptr));
4444 memset (num_preds, 0, n_basic_blocks * sizeof (int));
4445 memset (num_succs, 0, n_basic_blocks * sizeof (int));
5ece9746 4446
e881bb1b 4447 for (i = 0; i < n; ++i)
5ece9746 4448 {
e881bb1b
RH
4449 basic_block bb = BASIC_BLOCK (i);
4450
4451 for (e = bb->succ; e ; e = e->succ_next)
4452 add_pred_succ (i, e->dest->index, s_preds, s_succs,
4453 num_preds, num_succs);
5ece9746
JL
4454 }
4455
e881bb1b
RH
4456 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
4457 add_pred_succ (ENTRY_BLOCK, e->dest->index, s_preds, s_succs,
4458 num_preds, num_succs);
5ece9746
JL
4459}
4460
4461void
421382ac 4462dump_bb_data (file, preds, succs, live_info)
5ece9746
JL
4463 FILE *file;
4464 int_list_ptr *preds;
4465 int_list_ptr *succs;
421382ac 4466 int live_info;
5ece9746
JL
4467{
4468 int bb;
4469 int_list_ptr p;
4470
4471 fprintf (file, "BB data\n\n");
4472 for (bb = 0; bb < n_basic_blocks; bb++)
4473 {
4474 fprintf (file, "BB %d, start %d, end %d\n", bb,
4475 INSN_UID (BLOCK_HEAD (bb)), INSN_UID (BLOCK_END (bb)));
4476 fprintf (file, " preds:");
4477 for (p = preds[bb]; p != NULL; p = p->next)
4478 {
4479 int pred_bb = INT_LIST_VAL (p);
4480 if (pred_bb == ENTRY_BLOCK)
4481 fprintf (file, " entry");
4482 else
4483 fprintf (file, " %d", pred_bb);
4484 }
4485 fprintf (file, "\n");
4486 fprintf (file, " succs:");
4487 for (p = succs[bb]; p != NULL; p = p->next)
4488 {
4489 int succ_bb = INT_LIST_VAL (p);
4490 if (succ_bb == EXIT_BLOCK)
4491 fprintf (file, " exit");
4492 else
4493 fprintf (file, " %d", succ_bb);
4494 }
421382ac
BS
4495 if (live_info)
4496 {
4497 int regno;
4498 fprintf (file, "\nRegisters live at start:");
4499 for (regno = 0; regno < max_regno; regno++)
e881bb1b 4500 if (REGNO_REG_SET_P (BASIC_BLOCK (bb)->global_live_at_start, regno))
421382ac
BS
4501 fprintf (file, " %d", regno);
4502 fprintf (file, "\n");
4503 }
5ece9746
JL
4504 fprintf (file, "\n");
4505 }
4506 fprintf (file, "\n");
4507}
4508
4509/* Free basic block data storage. */
4510
4511void
4512free_bb_mem ()
4513{
4514 free_int_list (&pred_int_list_blocks);
4515}
5e89e58b 4516
5ece9746
JL
4517/* Compute dominator relationships. */
4518void
4519compute_dominators (dominators, post_dominators, s_preds, s_succs)
4520 sbitmap *dominators;
4521 sbitmap *post_dominators;
4522 int_list_ptr *s_preds;
4523 int_list_ptr *s_succs;
4524{
4525 int bb, changed, passes;
4526 sbitmap *temp_bitmap;
4527
4528 temp_bitmap = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks);
4529 sbitmap_vector_ones (dominators, n_basic_blocks);
4530 sbitmap_vector_ones (post_dominators, n_basic_blocks);
4531 sbitmap_vector_zero (temp_bitmap, n_basic_blocks);
4532
4533 sbitmap_zero (dominators[0]);
4534 SET_BIT (dominators[0], 0);
4535
e881bb1b
RH
4536 sbitmap_zero (post_dominators[n_basic_blocks - 1]);
4537 SET_BIT (post_dominators[n_basic_blocks - 1], 0);
5ece9746
JL
4538
4539 passes = 0;
4540 changed = 1;
4541 while (changed)
4542 {
4543 changed = 0;
4544 for (bb = 1; bb < n_basic_blocks; bb++)
4545 {
4546 sbitmap_intersect_of_predecessors (temp_bitmap[bb], dominators,
4547 bb, s_preds);
4548 SET_BIT (temp_bitmap[bb], bb);
4549 changed |= sbitmap_a_and_b (dominators[bb],
4550 dominators[bb],
4551 temp_bitmap[bb]);
4552 sbitmap_intersect_of_successors (temp_bitmap[bb], post_dominators,
4553 bb, s_succs);
4554 SET_BIT (temp_bitmap[bb], bb);
4555 changed |= sbitmap_a_and_b (post_dominators[bb],
4556 post_dominators[bb],
4557 temp_bitmap[bb]);
4558 }
4559 passes++;
4560 }
4561
4562 free (temp_bitmap);
4563}
4c649323 4564
422d0fb0
RH
4565/* Given DOMINATORS, compute the immediate dominators into IDOM. */
4566
4567void
4568compute_immediate_dominators (idom, dominators)
4569 int *idom;
4570 sbitmap *dominators;
4571{
4572 sbitmap *tmp;
4573 int b;
4574
4575 tmp = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks);
4576
4577 /* Begin with tmp(n) = dom(n) - { n }. */
4578 for (b = n_basic_blocks; --b >= 0; )
4579 {
4580 sbitmap_copy (tmp[b], dominators[b]);
4581 RESET_BIT (tmp[b], b);
4582 }
4583
4584 /* Subtract out all of our dominator's dominators. */
4585 for (b = n_basic_blocks; --b >= 0; )
4586 {
4587 sbitmap tmp_b = tmp[b];
4588 int s;
4589
4590 for (s = n_basic_blocks; --s >= 0; )
4591 if (TEST_BIT (tmp_b, s))
4592 sbitmap_difference (tmp_b, tmp_b, tmp[s]);
4593 }
4594
4595 /* Find the one bit set in the bitmap and put it in the output array. */
4596 for (b = n_basic_blocks; --b >= 0; )
4597 {
4598 int t;
4599 EXECUTE_IF_SET_IN_SBITMAP (tmp[b], 0, t, { idom[b] = t; });
4600 }
4601
4602 sbitmap_vector_free (tmp);
4603}
4604
4c649323
JL
4605/* Count for a single SET rtx, X. */
4606
4607static void
4608count_reg_sets_1 (x)
4609 rtx x;
4610{
4611 register int regno;
4612 register rtx reg = SET_DEST (x);
4613
4614 /* Find the register that's set/clobbered. */
4615 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
4616 || GET_CODE (reg) == SIGN_EXTRACT
4617 || GET_CODE (reg) == STRICT_LOW_PART)
4618 reg = XEXP (reg, 0);
4619
86465af7
DM
4620 if (GET_CODE (reg) == PARALLEL
4621 && GET_MODE (reg) == BLKmode)
4622 {
4623 register int i;
4624 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
4625 count_reg_sets_1 (XVECEXP (reg, 0, i));
4626 return;
4627 }
4628
4c649323
JL
4629 if (GET_CODE (reg) == REG)
4630 {
4631 regno = REGNO (reg);
4632 if (regno >= FIRST_PSEUDO_REGISTER)
4633 {
4634 /* Count (weighted) references, stores, etc. This counts a
4635 register twice if it is modified, but that is correct. */
4636 REG_N_SETS (regno)++;
4637
4638 REG_N_REFS (regno) += loop_depth;
4639 }
4640 }
4641}
4642
4643/* Increment REG_N_SETS for each SET or CLOBBER found in X; also increment
4644 REG_N_REFS by the current loop depth for each SET or CLOBBER found. */
4645
4646static void
4647count_reg_sets (x)
4648 rtx x;
4649{
4650 register RTX_CODE code = GET_CODE (x);
4651
4652 if (code == SET || code == CLOBBER)
4653 count_reg_sets_1 (x);
4654 else if (code == PARALLEL)
4655 {
4656 register int i;
4657 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4658 {
4659 code = GET_CODE (XVECEXP (x, 0, i));
4660 if (code == SET || code == CLOBBER)
4661 count_reg_sets_1 (XVECEXP (x, 0, i));
4662 }
4663 }
4664}
4665
4666/* Increment REG_N_REFS by the current loop depth each register reference
4667 found in X. */
4668
4669static void
4670count_reg_references (x)
4671 rtx x;
4672{
4673 register RTX_CODE code;
4c649323
JL
4674
4675 retry:
4676 code = GET_CODE (x);
4677 switch (code)
4678 {
4679 case LABEL_REF:
4680 case SYMBOL_REF:
4681 case CONST_INT:
4682 case CONST:
4683 case CONST_DOUBLE:
4684 case PC:
4685 case ADDR_VEC:
4686 case ADDR_DIFF_VEC:
4687 case ASM_INPUT:
4688 return;
4689
4690#ifdef HAVE_cc0
4691 case CC0:
4692 return;
4693#endif
4694
4695 case CLOBBER:
4696 /* If we are clobbering a MEM, mark any registers inside the address
4697 as being used. */
4698 if (GET_CODE (XEXP (x, 0)) == MEM)
4699 count_reg_references (XEXP (XEXP (x, 0), 0));
4700 return;
4701
4702 case SUBREG:
4703 /* While we're here, optimize this case. */
4704 x = SUBREG_REG (x);
4705
4706 /* In case the SUBREG is not of a register, don't optimize */
4707 if (GET_CODE (x) != REG)
4708 {
4709 count_reg_references (x);
4710 return;
4711 }
4712
4713 /* ... fall through ... */
4714
4715 case REG:
4716 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
4717 REG_N_REFS (REGNO (x)) += loop_depth;
4718 return;
4719
4720 case SET:
4721 {
4722 register rtx testreg = SET_DEST (x);
4723 int mark_dest = 0;
4724
4725 /* If storing into MEM, don't show it as being used. But do
4726 show the address as being used. */
4727 if (GET_CODE (testreg) == MEM)
4728 {
4729 count_reg_references (XEXP (testreg, 0));
4730 count_reg_references (SET_SRC (x));
4731 return;
4732 }
4733
4734 /* Storing in STRICT_LOW_PART is like storing in a reg
4735 in that this SET might be dead, so ignore it in TESTREG.
4736 but in some other ways it is like using the reg.
4737
4738 Storing in a SUBREG or a bit field is like storing the entire
4739 register in that if the register's value is not used
4740 then this SET is not needed. */
4741 while (GET_CODE (testreg) == STRICT_LOW_PART
4742 || GET_CODE (testreg) == ZERO_EXTRACT
4743 || GET_CODE (testreg) == SIGN_EXTRACT
4744 || GET_CODE (testreg) == SUBREG)
4745 {
4746 /* Modifying a single register in an alternate mode
4747 does not use any of the old value. But these other
4748 ways of storing in a register do use the old value. */
4749 if (GET_CODE (testreg) == SUBREG
4750 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
4751 ;
4752 else
4753 mark_dest = 1;
4754
4755 testreg = XEXP (testreg, 0);
4756 }
4757
4758 /* If this is a store into a register,
4759 recursively scan the value being stored. */
4760
86465af7
DM
4761 if ((GET_CODE (testreg) == PARALLEL
4762 && GET_MODE (testreg) == BLKmode)
4763 || GET_CODE (testreg) == REG)
4c649323
JL
4764 {
4765 count_reg_references (SET_SRC (x));
4766 if (mark_dest)
4767 count_reg_references (SET_DEST (x));
4768 return;
4769 }
4770 }
4771 break;
4772
4773 default:
4774 break;
4775 }
4776
4777 /* Recursively scan the operands of this expression. */
4778
4779 {
4780 register char *fmt = GET_RTX_FORMAT (code);
4781 register int i;
4782
4783 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4784 {
4785 if (fmt[i] == 'e')
4786 {
4787 /* Tail recursive case: save a function call level. */
4788 if (i == 0)
4789 {
4790 x = XEXP (x, 0);
4791 goto retry;
4792 }
4793 count_reg_references (XEXP (x, i));
4794 }
4795 else if (fmt[i] == 'E')
4796 {
4797 register int j;
4798 for (j = 0; j < XVECLEN (x, i); j++)
4799 count_reg_references (XVECEXP (x, i, j));
4800 }
4801 }
4802 }
4803}
4804
4805/* Recompute register set/reference counts immediately prior to register
4806 allocation.
4807
4808 This avoids problems with set/reference counts changing to/from values
4809 which have special meanings to the register allocators.
4810
4811 Additionally, the reference counts are the primary component used by the
4812 register allocators to prioritize pseudos for allocation to hard regs.
4813 More accurate reference counts generally lead to better register allocation.
4814
213c4983
R
4815 F is the first insn to be scanned.
4816 LOOP_STEP denotes how much loop_depth should be incremented per
4817 loop nesting level in order to increase the ref count more for references
4818 in a loop.
4819
4c649323
JL
4820 It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and
4821 possibly other information which is used by the register allocators. */
4822
762a1d90 4823void
213c4983 4824recompute_reg_usage (f, loop_step)
4c649323 4825 rtx f;
213c4983 4826 int loop_step;
4c649323
JL
4827{
4828 rtx insn;
4829 int i, max_reg;
4830
4831 /* Clear out the old data. */
4832 max_reg = max_reg_num ();
4833 for (i = FIRST_PSEUDO_REGISTER; i < max_reg; i++)
4834 {
4835 REG_N_SETS (i) = 0;
4836 REG_N_REFS (i) = 0;
4837 }
4838
4839 /* Scan each insn in the chain and count how many times each register is
4840 set/used. */
4841 loop_depth = 1;
4842 for (insn = f; insn; insn = NEXT_INSN (insn))
4843 {
4844 /* Keep track of loop depth. */
4845 if (GET_CODE (insn) == NOTE)
4846 {
4847 /* Look for loop boundaries. */
4848 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
213c4983 4849 loop_depth -= loop_step;
4c649323 4850 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
213c4983 4851 loop_depth += loop_step;
4c649323
JL
4852
4853 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
4854 Abort now rather than setting register status incorrectly. */
4855 if (loop_depth == 0)
4856 abort ();
4857 }
4858 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4859 {
4860 rtx links;
4861
4862 /* This call will increment REG_N_SETS for each SET or CLOBBER
4863 of a register in INSN. It will also increment REG_N_REFS
4864 by the loop depth for each set of a register in INSN. */
4865 count_reg_sets (PATTERN (insn));
4866
4867 /* count_reg_sets does not detect autoincrement address modes, so
4868 detect them here by looking at the notes attached to INSN. */
4869 for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
4870 {
4871 if (REG_NOTE_KIND (links) == REG_INC)
4872 /* Count (weighted) references, stores, etc. This counts a
4873 register twice if it is modified, but that is correct. */
4874 REG_N_SETS (REGNO (XEXP (links, 0)))++;
4875 }
4876
4877 /* This call will increment REG_N_REFS by the current loop depth for
4878 each reference to a register in INSN. */
4879 count_reg_references (PATTERN (insn));
4880
4881 /* count_reg_references will not include counts for arguments to
4882 function calls, so detect them here by examining the
4883 CALL_INSN_FUNCTION_USAGE data. */
4884 if (GET_CODE (insn) == CALL_INSN)
4885 {
4886 rtx note;
4887
4888 for (note = CALL_INSN_FUNCTION_USAGE (insn);
4889 note;
4890 note = XEXP (note, 1))
4891 if (GET_CODE (XEXP (note, 0)) == USE)
4892 count_reg_references (SET_DEST (XEXP (note, 0)));
4893 }
4894 }
4895 }
4896}
e881bb1b
RH
4897
4898/* Record INSN's block as BB. */
4899
4900void
4901set_block_for_insn (insn, bb)
4902 rtx insn;
4903 basic_block bb;
4904{
4905 size_t uid = INSN_UID (insn);
4906 if (uid >= basic_block_for_insn->num_elements)
4907 {
4908 int new_size;
4909
4910 /* Add one-eighth the size so we don't keep calling xrealloc. */
4911 new_size = uid + (uid + 7) / 8;
4912
4913 VARRAY_GROW (basic_block_for_insn, new_size);
4914 }
4915 VARRAY_BB (basic_block_for_insn, uid) = bb;
4916}
4917
4918/* Record INSN's block number as BB. */
4919/* ??? This has got to go. */
4920
4921void
4922set_block_num (insn, bb)
4923 rtx insn;
4924 int bb;
4925{
4926 set_block_for_insn (insn, BASIC_BLOCK (bb));
4927}
This page took 1.235859 seconds and 5 git commands to generate.