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d7429b6a | 1 | /* Data flow analysis for GNU compiler. |
fa5b4208 | 2 | Copyright (C) 1987, 88, 92, 93, 94, 95, 1996 Free Software Foundation, Inc. |
d7429b6a RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
a35311b0 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
d7429b6a RK |
20 | |
21 | ||
22 | /* This file contains the data flow analysis pass of the compiler. | |
23 | It computes data flow information | |
24 | which tells combine_instructions which insns to consider combining | |
25 | and controls register allocation. | |
26 | ||
27 | Additional data flow information that is too bulky to record | |
28 | is generated during the analysis, and is used at that time to | |
29 | create autoincrement and autodecrement addressing. | |
30 | ||
31 | The first step is dividing the function into basic blocks. | |
32 | find_basic_blocks does this. Then life_analysis determines | |
33 | where each register is live and where it is dead. | |
34 | ||
35 | ** find_basic_blocks ** | |
36 | ||
37 | find_basic_blocks divides the current function's rtl | |
38 | into basic blocks. It records the beginnings and ends of the | |
39 | basic blocks in the vectors basic_block_head and basic_block_end, | |
40 | and the number of blocks in n_basic_blocks. | |
41 | ||
42 | find_basic_blocks also finds any unreachable loops | |
43 | and deletes them. | |
44 | ||
45 | ** life_analysis ** | |
46 | ||
47 | life_analysis is called immediately after find_basic_blocks. | |
48 | It uses the basic block information to determine where each | |
49 | hard or pseudo register is live. | |
50 | ||
51 | ** live-register info ** | |
52 | ||
53 | The information about where each register is live is in two parts: | |
54 | the REG_NOTES of insns, and the vector basic_block_live_at_start. | |
55 | ||
56 | basic_block_live_at_start has an element for each basic block, | |
57 | and the element is a bit-vector with a bit for each hard or pseudo | |
58 | register. The bit is 1 if the register is live at the beginning | |
59 | of the basic block. | |
60 | ||
61 | Two types of elements can be added to an insn's REG_NOTES. | |
62 | A REG_DEAD note is added to an insn's REG_NOTES for any register | |
63 | that meets both of two conditions: The value in the register is not | |
64 | needed in subsequent insns and the insn does not replace the value in | |
65 | the register (in the case of multi-word hard registers, the value in | |
66 | each register must be replaced by the insn to avoid a REG_DEAD note). | |
67 | ||
68 | In the vast majority of cases, an object in a REG_DEAD note will be | |
69 | used somewhere in the insn. The (rare) exception to this is if an | |
70 | insn uses a multi-word hard register and only some of the registers are | |
71 | needed in subsequent insns. In that case, REG_DEAD notes will be | |
72 | provided for those hard registers that are not subsequently needed. | |
73 | Partial REG_DEAD notes of this type do not occur when an insn sets | |
74 | only some of the hard registers used in such a multi-word operand; | |
75 | omitting REG_DEAD notes for objects stored in an insn is optional and | |
76 | the desire to do so does not justify the complexity of the partial | |
77 | REG_DEAD notes. | |
78 | ||
79 | REG_UNUSED notes are added for each register that is set by the insn | |
80 | but is unused subsequently (if every register set by the insn is unused | |
81 | and the insn does not reference memory or have some other side-effect, | |
82 | the insn is deleted instead). If only part of a multi-word hard | |
83 | register is used in a subsequent insn, REG_UNUSED notes are made for | |
84 | the parts that will not be used. | |
85 | ||
86 | To determine which registers are live after any insn, one can | |
87 | start from the beginning of the basic block and scan insns, noting | |
88 | which registers are set by each insn and which die there. | |
89 | ||
90 | ** Other actions of life_analysis ** | |
91 | ||
92 | life_analysis sets up the LOG_LINKS fields of insns because the | |
93 | information needed to do so is readily available. | |
94 | ||
95 | life_analysis deletes insns whose only effect is to store a value | |
96 | that is never used. | |
97 | ||
98 | life_analysis notices cases where a reference to a register as | |
99 | a memory address can be combined with a preceding or following | |
100 | incrementation or decrementation of the register. The separate | |
101 | instruction to increment or decrement is deleted and the address | |
102 | is changed to a POST_INC or similar rtx. | |
103 | ||
104 | Each time an incrementing or decrementing address is created, | |
105 | a REG_INC element is added to the insn's REG_NOTES list. | |
106 | ||
107 | life_analysis fills in certain vectors containing information about | |
108 | register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length, | |
109 | reg_n_calls_crosses and reg_basic_block. */ | |
110 | \f | |
111 | #include <stdio.h> | |
112 | #include "config.h" | |
113 | #include "rtl.h" | |
114 | #include "basic-block.h" | |
115 | #include "insn-config.h" | |
116 | #include "regs.h" | |
117 | #include "hard-reg-set.h" | |
118 | #include "flags.h" | |
119 | #include "output.h" | |
120 | ||
121 | #include "obstack.h" | |
122 | #define obstack_chunk_alloc xmalloc | |
123 | #define obstack_chunk_free free | |
124 | ||
d7429b6a RK |
125 | /* List of labels that must never be deleted. */ |
126 | extern rtx forced_labels; | |
127 | ||
128 | /* Get the basic block number of an insn. | |
129 | This info should not be expected to remain available | |
130 | after the end of life_analysis. */ | |
131 | ||
132 | /* This is the limit of the allocated space in the following two arrays. */ | |
133 | ||
134 | static int max_uid_for_flow; | |
135 | ||
136 | #define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)] | |
137 | ||
138 | /* This is where the BLOCK_NUM values are really stored. | |
139 | This is set up by find_basic_blocks and used there and in life_analysis, | |
140 | and then freed. */ | |
141 | ||
6ac271be | 142 | static int *uid_block_number; |
d7429b6a RK |
143 | |
144 | /* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */ | |
145 | ||
146 | #define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)] | |
147 | static char *uid_volatile; | |
148 | ||
149 | /* Number of basic blocks in the current function. */ | |
150 | ||
151 | int n_basic_blocks; | |
152 | ||
153 | /* Maximum register number used in this function, plus one. */ | |
154 | ||
155 | int max_regno; | |
156 | ||
0f41302f MS |
157 | /* Maximum number of SCRATCH rtx's used in any basic block of this |
158 | function. */ | |
d7429b6a RK |
159 | |
160 | int max_scratch; | |
161 | ||
162 | /* Number of SCRATCH rtx's in the current block. */ | |
163 | ||
164 | static int num_scratch; | |
165 | ||
166 | /* Indexed by n, gives number of basic block that (REG n) is used in. | |
167 | If the value is REG_BLOCK_GLOBAL (-2), | |
168 | it means (REG n) is used in more than one basic block. | |
169 | REG_BLOCK_UNKNOWN (-1) means it hasn't been seen yet so we don't know. | |
170 | This information remains valid for the rest of the compilation | |
171 | of the current function; it is used to control register allocation. */ | |
172 | ||
6ac271be | 173 | int *reg_basic_block; |
d7429b6a RK |
174 | |
175 | /* Indexed by n, gives number of times (REG n) is used or set, each | |
176 | weighted by its loop-depth. | |
177 | This information remains valid for the rest of the compilation | |
178 | of the current function; it is used to control register allocation. */ | |
179 | ||
180 | int *reg_n_refs; | |
181 | ||
9faa82d8 | 182 | /* Indexed by N; says whether a pseudo register N was ever used |
80f8f04a RK |
183 | within a SUBREG that changes the size of the reg. Some machines prohibit |
184 | such objects to be in certain (usually floating-point) registers. */ | |
185 | ||
186 | char *reg_changes_size; | |
187 | ||
d7429b6a RK |
188 | /* Indexed by N, gives number of places register N dies. |
189 | This information remains valid for the rest of the compilation | |
190 | of the current function; it is used to control register allocation. */ | |
191 | ||
192 | short *reg_n_deaths; | |
193 | ||
194 | /* Indexed by N, gives 1 if that reg is live across any CALL_INSNs. | |
195 | This information remains valid for the rest of the compilation | |
196 | of the current function; it is used to control register allocation. */ | |
197 | ||
198 | int *reg_n_calls_crossed; | |
199 | ||
200 | /* Total number of instructions at which (REG n) is live. | |
201 | The larger this is, the less priority (REG n) gets for | |
202 | allocation in a real register. | |
203 | This information remains valid for the rest of the compilation | |
204 | of the current function; it is used to control register allocation. | |
205 | ||
206 | local-alloc.c may alter this number to change the priority. | |
207 | ||
208 | Negative values are special. | |
209 | -1 is used to mark a pseudo reg which has a constant or memory equivalent | |
210 | and is used infrequently enough that it should not get a hard register. | |
211 | -2 is used to mark a pseudo reg for a parameter, when a frame pointer | |
cfb2c0b1 | 212 | is not required. global.c makes an allocno for this but does |
d7429b6a RK |
213 | not try to assign a hard register to it. */ |
214 | ||
215 | int *reg_live_length; | |
216 | ||
217 | /* Element N is the next insn that uses (hard or pseudo) register number N | |
218 | within the current basic block; or zero, if there is no such insn. | |
219 | This is valid only during the final backward scan in propagate_block. */ | |
220 | ||
221 | static rtx *reg_next_use; | |
222 | ||
223 | /* Size of a regset for the current function, | |
224 | in (1) bytes and (2) elements. */ | |
225 | ||
226 | int regset_bytes; | |
227 | int regset_size; | |
228 | ||
229 | /* Element N is first insn in basic block N. | |
230 | This info lasts until we finish compiling the function. */ | |
231 | ||
232 | rtx *basic_block_head; | |
233 | ||
234 | /* Element N is last insn in basic block N. | |
235 | This info lasts until we finish compiling the function. */ | |
236 | ||
237 | rtx *basic_block_end; | |
238 | ||
239 | /* Element N is a regset describing the registers live | |
240 | at the start of basic block N. | |
241 | This info lasts until we finish compiling the function. */ | |
242 | ||
243 | regset *basic_block_live_at_start; | |
244 | ||
245 | /* Regset of regs live when calls to `setjmp'-like functions happen. */ | |
246 | ||
247 | regset regs_live_at_setjmp; | |
248 | ||
249 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers | |
250 | that have to go in the same hard reg. | |
251 | The first two regs in the list are a pair, and the next two | |
252 | are another pair, etc. */ | |
253 | rtx regs_may_share; | |
254 | ||
255 | /* Element N is nonzero if control can drop into basic block N | |
256 | from the preceding basic block. Freed after life_analysis. */ | |
257 | ||
258 | static char *basic_block_drops_in; | |
259 | ||
260 | /* Element N is depth within loops of the last insn in basic block number N. | |
261 | Freed after life_analysis. */ | |
262 | ||
263 | static short *basic_block_loop_depth; | |
264 | ||
265 | /* Element N nonzero if basic block N can actually be reached. | |
266 | Vector exists only during find_basic_blocks. */ | |
267 | ||
268 | static char *block_live_static; | |
269 | ||
270 | /* Depth within loops of basic block being scanned for lifetime analysis, | |
271 | plus one. This is the weight attached to references to registers. */ | |
272 | ||
273 | static int loop_depth; | |
274 | ||
275 | /* During propagate_block, this is non-zero if the value of CC0 is live. */ | |
276 | ||
277 | static int cc0_live; | |
278 | ||
279 | /* During propagate_block, this contains the last MEM stored into. It | |
280 | is used to eliminate consecutive stores to the same location. */ | |
281 | ||
282 | static rtx last_mem_set; | |
283 | ||
284 | /* Set of registers that may be eliminable. These are handled specially | |
285 | in updating regs_ever_live. */ | |
286 | ||
287 | static HARD_REG_SET elim_reg_set; | |
288 | ||
289 | /* Forward declarations */ | |
e658434c | 290 | static void find_basic_blocks PROTO((rtx, rtx)); |
fa5b4208 | 291 | static int jmp_uses_reg_or_mem PROTO((rtx)); |
e658434c RK |
292 | static void mark_label_ref PROTO((rtx, rtx, int)); |
293 | static void life_analysis PROTO((rtx, int)); | |
294 | void allocate_for_life_analysis PROTO((void)); | |
295 | static void init_regset_vector PROTO((regset *, regset, int, int)); | |
296 | static void propagate_block PROTO((regset, rtx, rtx, int, | |
297 | regset, int)); | |
8329b5ec | 298 | static rtx flow_delete_insn PROTO((rtx)); |
e658434c RK |
299 | static int insn_dead_p PROTO((rtx, regset, int)); |
300 | static int libcall_dead_p PROTO((rtx, regset, rtx, rtx)); | |
301 | static void mark_set_regs PROTO((regset, regset, rtx, | |
302 | rtx, regset)); | |
303 | static void mark_set_1 PROTO((regset, regset, rtx, | |
304 | rtx, regset)); | |
305 | static void find_auto_inc PROTO((regset, rtx, rtx)); | |
306 | static void mark_used_regs PROTO((regset, regset, rtx, int, rtx)); | |
307 | static int try_pre_increment_1 PROTO((rtx)); | |
308 | static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT)); | |
309 | static rtx find_use_as_address PROTO((rtx, rtx, HOST_WIDE_INT)); | |
310 | void dump_flow_info PROTO((FILE *)); | |
d7429b6a RK |
311 | \f |
312 | /* Find basic blocks of the current function and perform data flow analysis. | |
313 | F is the first insn of the function and NREGS the number of register numbers | |
314 | in use. */ | |
315 | ||
316 | void | |
317 | flow_analysis (f, nregs, file) | |
318 | rtx f; | |
319 | int nregs; | |
320 | FILE *file; | |
321 | { | |
322 | register rtx insn; | |
323 | register int i; | |
d7e4fe8b | 324 | rtx nonlocal_label_list = nonlocal_label_rtx_list (); |
d7429b6a RK |
325 | |
326 | #ifdef ELIMINABLE_REGS | |
327 | static struct {int from, to; } eliminables[] = ELIMINABLE_REGS; | |
328 | #endif | |
329 | ||
330 | /* Record which registers will be eliminated. We use this in | |
0f41302f | 331 | mark_used_regs. */ |
d7429b6a RK |
332 | |
333 | CLEAR_HARD_REG_SET (elim_reg_set); | |
334 | ||
335 | #ifdef ELIMINABLE_REGS | |
336 | for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++) | |
337 | SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from); | |
338 | #else | |
339 | SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM); | |
340 | #endif | |
341 | ||
342 | /* Count the basic blocks. Also find maximum insn uid value used. */ | |
343 | ||
344 | { | |
345 | register RTX_CODE prev_code = JUMP_INSN; | |
346 | register RTX_CODE code; | |
347 | ||
348 | max_uid_for_flow = 0; | |
349 | ||
350 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
351 | { | |
352 | code = GET_CODE (insn); | |
353 | if (INSN_UID (insn) > max_uid_for_flow) | |
354 | max_uid_for_flow = INSN_UID (insn); | |
355 | if (code == CODE_LABEL | |
d7e4fe8b RS |
356 | || (GET_RTX_CLASS (code) == 'i' |
357 | && (prev_code == JUMP_INSN | |
358 | || (prev_code == CALL_INSN | |
6b67ec08 | 359 | && nonlocal_label_list != 0) |
d7e4fe8b | 360 | || prev_code == BARRIER))) |
d7429b6a | 361 | i++; |
8cfe18d6 | 362 | |
2dd4cace | 363 | if (code == CALL_INSN && find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
8cfe18d6 RK |
364 | code = INSN; |
365 | ||
6b67ec08 | 366 | if (code != NOTE) |
d7429b6a RK |
367 | prev_code = code; |
368 | } | |
369 | } | |
370 | ||
371 | #ifdef AUTO_INC_DEC | |
372 | /* Leave space for insns we make in some cases for auto-inc. These cases | |
373 | are rare, so we don't need too much space. */ | |
374 | max_uid_for_flow += max_uid_for_flow / 10; | |
375 | #endif | |
376 | ||
377 | /* Allocate some tables that last till end of compiling this function | |
378 | and some needed only in find_basic_blocks and life_analysis. */ | |
379 | ||
380 | n_basic_blocks = i; | |
381 | basic_block_head = (rtx *) oballoc (n_basic_blocks * sizeof (rtx)); | |
382 | basic_block_end = (rtx *) oballoc (n_basic_blocks * sizeof (rtx)); | |
383 | basic_block_drops_in = (char *) alloca (n_basic_blocks); | |
384 | basic_block_loop_depth = (short *) alloca (n_basic_blocks * sizeof (short)); | |
385 | uid_block_number | |
6ac271be | 386 | = (int *) alloca ((max_uid_for_flow + 1) * sizeof (int)); |
d7429b6a RK |
387 | uid_volatile = (char *) alloca (max_uid_for_flow + 1); |
388 | bzero (uid_volatile, max_uid_for_flow + 1); | |
389 | ||
d7e4fe8b | 390 | find_basic_blocks (f, nonlocal_label_list); |
d7429b6a RK |
391 | life_analysis (f, nregs); |
392 | if (file) | |
393 | dump_flow_info (file); | |
394 | ||
395 | basic_block_drops_in = 0; | |
396 | uid_block_number = 0; | |
397 | basic_block_loop_depth = 0; | |
398 | } | |
399 | \f | |
400 | /* Find all basic blocks of the function whose first insn is F. | |
401 | Store the correct data in the tables that describe the basic blocks, | |
402 | set up the chains of references for each CODE_LABEL, and | |
d7e4fe8b RS |
403 | delete any entire basic blocks that cannot be reached. |
404 | ||
405 | NONLOCAL_LABEL_LIST is the same local variable from flow_analysis. */ | |
d7429b6a RK |
406 | |
407 | static void | |
d7e4fe8b RS |
408 | find_basic_blocks (f, nonlocal_label_list) |
409 | rtx f, nonlocal_label_list; | |
d7429b6a RK |
410 | { |
411 | register rtx insn; | |
412 | register int i; | |
413 | register char *block_live = (char *) alloca (n_basic_blocks); | |
414 | register char *block_marked = (char *) alloca (n_basic_blocks); | |
415 | /* List of label_refs to all labels whose addresses are taken | |
416 | and used as data. */ | |
8329b5ec | 417 | rtx label_value_list; |
e658434c RK |
418 | rtx x, note; |
419 | enum rtx_code prev_code, code; | |
8329b5ec | 420 | int depth, pass; |
d7429b6a | 421 | |
8329b5ec DE |
422 | pass = 1; |
423 | restart: | |
424 | ||
425 | label_value_list = 0; | |
d7429b6a RK |
426 | block_live_static = block_live; |
427 | bzero (block_live, n_basic_blocks); | |
428 | bzero (block_marked, n_basic_blocks); | |
429 | ||
430 | /* Initialize with just block 0 reachable and no blocks marked. */ | |
431 | if (n_basic_blocks > 0) | |
432 | block_live[0] = 1; | |
433 | ||
e658434c RK |
434 | /* Initialize the ref chain of each label to 0. Record where all the |
435 | blocks start and end and their depth in loops. For each insn, record | |
436 | the block it is in. Also mark as reachable any blocks headed by labels | |
437 | that must not be deleted. */ | |
d7429b6a | 438 | |
e658434c RK |
439 | for (insn = f, i = -1, prev_code = JUMP_INSN, depth = 1; |
440 | insn; insn = NEXT_INSN (insn)) | |
441 | { | |
442 | code = GET_CODE (insn); | |
443 | if (code == NOTE) | |
444 | { | |
445 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
446 | depth++; | |
447 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
448 | depth--; | |
449 | } | |
d7429b6a | 450 | |
e658434c RK |
451 | /* A basic block starts at label, or after something that can jump. */ |
452 | else if (code == CODE_LABEL | |
453 | || (GET_RTX_CLASS (code) == 'i' | |
454 | && (prev_code == JUMP_INSN | |
455 | || (prev_code == CALL_INSN | |
8cfe18d6 RK |
456 | && nonlocal_label_list != 0 |
457 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
e658434c RK |
458 | || prev_code == BARRIER))) |
459 | { | |
460 | basic_block_head[++i] = insn; | |
461 | basic_block_end[i] = insn; | |
462 | basic_block_loop_depth[i] = depth; | |
463 | ||
464 | if (code == CODE_LABEL) | |
465 | { | |
d7429b6a RK |
466 | LABEL_REFS (insn) = insn; |
467 | /* Any label that cannot be deleted | |
468 | is considered to start a reachable block. */ | |
469 | if (LABEL_PRESERVE_P (insn)) | |
470 | block_live[i] = 1; | |
471 | } | |
e658434c | 472 | } |
d7429b6a | 473 | |
e658434c RK |
474 | else if (GET_RTX_CLASS (code) == 'i') |
475 | { | |
476 | basic_block_end[i] = insn; | |
477 | basic_block_loop_depth[i] = depth; | |
42fa3cfb | 478 | } |
e658434c | 479 | |
42fa3cfb JW |
480 | if (GET_RTX_CLASS (code) == 'i') |
481 | { | |
e658434c RK |
482 | /* Make a list of all labels referred to other than by jumps. */ |
483 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
484 | if (REG_NOTE_KIND (note) == REG_LABEL) | |
d7429b6a RK |
485 | label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0), |
486 | label_value_list); | |
42fa3cfb | 487 | } |
d7429b6a | 488 | |
e658434c | 489 | BLOCK_NUM (insn) = i; |
d7e4fe8b | 490 | |
6b67ec08 | 491 | if (code != NOTE) |
e658434c RK |
492 | prev_code = code; |
493 | } | |
494 | ||
2aec79e2 DE |
495 | /* During the second pass, `n_basic_blocks' is only an upper bound. |
496 | Only perform the sanity check for the first pass, and on the second | |
497 | pass ensure `n_basic_blocks' is set to the correct value. */ | |
498 | if (pass == 1 && i + 1 != n_basic_blocks) | |
e658434c | 499 | abort (); |
2aec79e2 | 500 | n_basic_blocks = i + 1; |
d7429b6a | 501 | |
37548fa3 RS |
502 | /* Don't delete the labels (in this function) |
503 | that are referenced by non-jump instructions. */ | |
e658434c RK |
504 | |
505 | for (x = label_value_list; x; x = XEXP (x, 1)) | |
506 | if (! LABEL_REF_NONLOCAL_P (x)) | |
507 | block_live[BLOCK_NUM (XEXP (x, 0))] = 1; | |
508 | ||
509 | for (x = forced_labels; x; x = XEXP (x, 1)) | |
510 | if (! LABEL_REF_NONLOCAL_P (x)) | |
511 | block_live[BLOCK_NUM (XEXP (x, 0))] = 1; | |
d7e4fe8b | 512 | |
d7429b6a RK |
513 | /* Record which basic blocks control can drop in to. */ |
514 | ||
e658434c RK |
515 | for (i = 0; i < n_basic_blocks; i++) |
516 | { | |
517 | for (insn = PREV_INSN (basic_block_head[i]); | |
518 | insn && GET_CODE (insn) == NOTE; insn = PREV_INSN (insn)) | |
519 | ; | |
520 | ||
521 | basic_block_drops_in[i] = insn && GET_CODE (insn) != BARRIER; | |
522 | } | |
d7429b6a RK |
523 | |
524 | /* Now find which basic blocks can actually be reached | |
525 | and put all jump insns' LABEL_REFS onto the ref-chains | |
526 | of their target labels. */ | |
527 | ||
528 | if (n_basic_blocks > 0) | |
529 | { | |
530 | int something_marked = 1; | |
8329b5ec | 531 | int deleted; |
d7429b6a | 532 | |
e658434c RK |
533 | /* Find all indirect jump insns and mark them as possibly jumping to all |
534 | the labels whose addresses are explicitly used. This is because, | |
535 | when there are computed gotos, we can't tell which labels they jump | |
536 | to, of all the possibilities. | |
537 | ||
538 | Tablejumps and casesi insns are OK and we can recognize them by | |
539 | a (use (label_ref)). */ | |
d7429b6a RK |
540 | |
541 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
e658434c | 542 | if (GET_CODE (insn) == JUMP_INSN) |
d7429b6a | 543 | { |
e658434c RK |
544 | rtx pat = PATTERN (insn); |
545 | int computed_jump = 0; | |
546 | ||
547 | if (GET_CODE (pat) == PARALLEL) | |
548 | { | |
549 | int len = XVECLEN (pat, 0); | |
550 | int has_use_labelref = 0; | |
551 | ||
552 | for (i = len - 1; i >= 0; i--) | |
553 | if (GET_CODE (XVECEXP (pat, 0, i)) == USE | |
554 | && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) | |
555 | == LABEL_REF)) | |
556 | has_use_labelref = 1; | |
557 | ||
558 | if (! has_use_labelref) | |
559 | for (i = len - 1; i >= 0; i--) | |
560 | if (GET_CODE (XVECEXP (pat, 0, i)) == SET | |
561 | && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx | |
fa5b4208 | 562 | && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) |
e658434c RK |
563 | computed_jump = 1; |
564 | } | |
565 | else if (GET_CODE (pat) == SET | |
566 | && SET_DEST (pat) == pc_rtx | |
fa5b4208 | 567 | && jmp_uses_reg_or_mem (SET_SRC (pat))) |
e658434c RK |
568 | computed_jump = 1; |
569 | ||
570 | if (computed_jump) | |
571 | { | |
572 | for (x = label_value_list; x; x = XEXP (x, 1)) | |
573 | mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)), | |
574 | insn, 0); | |
575 | ||
576 | for (x = forced_labels; x; x = XEXP (x, 1)) | |
577 | mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)), | |
d7429b6a | 578 | insn, 0); |
e658434c | 579 | } |
d7429b6a RK |
580 | } |
581 | ||
d7e4fe8b RS |
582 | /* Find all call insns and mark them as possibly jumping |
583 | to all the nonlocal goto handler labels. */ | |
584 | ||
585 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
8cfe18d6 RK |
586 | if (GET_CODE (insn) == CALL_INSN |
587 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
d7e4fe8b | 588 | { |
d7e4fe8b | 589 | for (x = nonlocal_label_list; x; x = XEXP (x, 1)) |
275c7080 JW |
590 | mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)), |
591 | insn, 0); | |
e658434c | 592 | |
d7e4fe8b RS |
593 | /* ??? This could be made smarter: |
594 | in some cases it's possible to tell that certain | |
595 | calls will not do a nonlocal goto. | |
596 | ||
597 | For example, if the nested functions that do the | |
598 | nonlocal gotos do not have their addresses taken, then | |
599 | only calls to those functions or to other nested | |
600 | functions that use them could possibly do nonlocal | |
601 | gotos. */ | |
602 | } | |
603 | ||
d7429b6a RK |
604 | /* Pass over all blocks, marking each block that is reachable |
605 | and has not yet been marked. | |
606 | Keep doing this until, in one pass, no blocks have been marked. | |
607 | Then blocks_live and blocks_marked are identical and correct. | |
608 | In addition, all jumps actually reachable have been marked. */ | |
609 | ||
610 | while (something_marked) | |
611 | { | |
612 | something_marked = 0; | |
613 | for (i = 0; i < n_basic_blocks; i++) | |
614 | if (block_live[i] && !block_marked[i]) | |
615 | { | |
616 | block_marked[i] = 1; | |
617 | something_marked = 1; | |
618 | if (i + 1 < n_basic_blocks && basic_block_drops_in[i + 1]) | |
619 | block_live[i + 1] = 1; | |
620 | insn = basic_block_end[i]; | |
621 | if (GET_CODE (insn) == JUMP_INSN) | |
622 | mark_label_ref (PATTERN (insn), insn, 0); | |
623 | } | |
624 | } | |
625 | ||
af14ce9c RK |
626 | /* ??? See if we have a "live" basic block that is not reachable. |
627 | This can happen if it is headed by a label that is preserved or | |
628 | in one of the label lists, but no call or computed jump is in | |
629 | the loop. It's not clear if we can delete the block or not, | |
630 | but don't for now. However, we will mess up register status if | |
631 | it remains unreachable, so add a fake reachability from the | |
632 | previous block. */ | |
633 | ||
634 | for (i = 1; i < n_basic_blocks; i++) | |
635 | if (block_live[i] && ! basic_block_drops_in[i] | |
636 | && GET_CODE (basic_block_head[i]) == CODE_LABEL | |
637 | && LABEL_REFS (basic_block_head[i]) == basic_block_head[i]) | |
638 | basic_block_drops_in[i] = 1; | |
639 | ||
d7429b6a RK |
640 | /* Now delete the code for any basic blocks that can't be reached. |
641 | They can occur because jump_optimize does not recognize | |
642 | unreachable loops as unreachable. */ | |
643 | ||
8329b5ec | 644 | deleted = 0; |
d7429b6a RK |
645 | for (i = 0; i < n_basic_blocks; i++) |
646 | if (!block_live[i]) | |
647 | { | |
8329b5ec DE |
648 | deleted++; |
649 | ||
650 | /* Delete the insns in a (non-live) block. We physically delete | |
651 | every non-note insn except the start and end (so | |
652 | basic_block_head/end needn't be updated), we turn the latter | |
653 | into NOTE_INSN_DELETED notes. | |
654 | We use to "delete" the insns by turning them into notes, but | |
655 | we may be deleting lots of insns that subsequent passes would | |
656 | otherwise have to process. Secondly, lots of deleted blocks in | |
657 | a row can really slow down propagate_block since it will | |
658 | otherwise process insn-turned-notes multiple times when it | |
659 | looks for loop begin/end notes. */ | |
660 | if (basic_block_head[i] != basic_block_end[i]) | |
661 | { | |
49b6c81e DE |
662 | /* It would be quicker to delete all of these with a single |
663 | unchaining, rather than one at a time, but we need to keep | |
664 | the NOTE's. */ | |
8329b5ec DE |
665 | insn = NEXT_INSN (basic_block_head[i]); |
666 | while (insn != basic_block_end[i]) | |
667 | { | |
668 | if (GET_CODE (insn) == BARRIER) | |
669 | abort (); | |
670 | else if (GET_CODE (insn) != NOTE) | |
671 | insn = flow_delete_insn (insn); | |
672 | else | |
673 | insn = NEXT_INSN (insn); | |
674 | } | |
675 | } | |
d7429b6a | 676 | insn = basic_block_head[i]; |
8329b5ec | 677 | if (GET_CODE (insn) != NOTE) |
d7429b6a | 678 | { |
8329b5ec | 679 | /* Turn the head into a deleted insn note. */ |
d7429b6a RK |
680 | if (GET_CODE (insn) == BARRIER) |
681 | abort (); | |
8329b5ec DE |
682 | PUT_CODE (insn, NOTE); |
683 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
684 | NOTE_SOURCE_FILE (insn) = 0; | |
685 | } | |
686 | insn = basic_block_end[i]; | |
687 | if (GET_CODE (insn) != NOTE) | |
688 | { | |
689 | /* Turn the tail into a deleted insn note. */ | |
690 | if (GET_CODE (insn) == BARRIER) | |
691 | abort (); | |
692 | PUT_CODE (insn, NOTE); | |
693 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
694 | NOTE_SOURCE_FILE (insn) = 0; | |
d7429b6a | 695 | } |
8329b5ec DE |
696 | /* BARRIERs are between basic blocks, not part of one. |
697 | Delete a BARRIER if the preceding jump is deleted. | |
698 | We cannot alter a BARRIER into a NOTE | |
699 | because it is too short; but we can really delete | |
700 | it because it is not part of a basic block. */ | |
701 | if (NEXT_INSN (insn) != 0 | |
702 | && GET_CODE (NEXT_INSN (insn)) == BARRIER) | |
703 | delete_insn (NEXT_INSN (insn)); | |
704 | ||
d7429b6a RK |
705 | /* Each time we delete some basic blocks, |
706 | see if there is a jump around them that is | |
707 | being turned into a no-op. If so, delete it. */ | |
708 | ||
709 | if (block_live[i - 1]) | |
710 | { | |
711 | register int j; | |
8329b5ec | 712 | for (j = i + 1; j < n_basic_blocks; j++) |
d7429b6a RK |
713 | if (block_live[j]) |
714 | { | |
715 | rtx label; | |
716 | insn = basic_block_end[i - 1]; | |
717 | if (GET_CODE (insn) == JUMP_INSN | |
718 | /* An unconditional jump is the only possibility | |
719 | we must check for, since a conditional one | |
720 | would make these blocks live. */ | |
721 | && simplejump_p (insn) | |
722 | && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1) | |
723 | && INSN_UID (label) != 0 | |
724 | && BLOCK_NUM (label) == j) | |
725 | { | |
726 | PUT_CODE (insn, NOTE); | |
727 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
728 | NOTE_SOURCE_FILE (insn) = 0; | |
729 | if (GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
730 | abort (); | |
731 | delete_insn (NEXT_INSN (insn)); | |
732 | } | |
733 | break; | |
734 | } | |
735 | } | |
736 | } | |
8329b5ec | 737 | |
9faa82d8 | 738 | /* There are pathological cases where one function calling hundreds of |
8329b5ec DE |
739 | nested inline functions can generate lots and lots of unreachable |
740 | blocks that jump can't delete. Since we don't use sparse matrices | |
741 | a lot of memory will be needed to compile such functions. | |
742 | Implementing sparse matrices is a fair bit of work and it is not | |
743 | clear that they win more than they lose (we don't want to | |
744 | unnecessarily slow down compilation of normal code). By making | |
9faa82d8 | 745 | another pass for the pathological case, we can greatly speed up |
8329b5ec DE |
746 | their compilation without hurting normal code. This works because |
747 | all the insns in the unreachable blocks have either been deleted or | |
49b6c81e DE |
748 | turned into notes. |
749 | Note that we're talking about reducing memory usage by 10's of | |
750 | megabytes and reducing compilation time by several minutes. */ | |
8329b5ec DE |
751 | /* ??? The choice of when to make another pass is a bit arbitrary, |
752 | and was derived from empirical data. */ | |
753 | if (pass == 1 | |
49b6c81e | 754 | && deleted > 200) |
8329b5ec DE |
755 | { |
756 | pass++; | |
757 | n_basic_blocks -= deleted; | |
2aec79e2 DE |
758 | /* `n_basic_blocks' may not be correct at this point: two previously |
759 | separate blocks may now be merged. That's ok though as we | |
760 | recalculate it during the second pass. It certainly can't be | |
761 | any larger than the current value. */ | |
8329b5ec DE |
762 | goto restart; |
763 | } | |
d7429b6a RK |
764 | } |
765 | } | |
766 | \f | |
8329b5ec DE |
767 | /* Subroutines of find_basic_blocks. */ |
768 | ||
fa5b4208 RK |
769 | /* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is |
770 | not in the constant pool and not in the condition of an IF_THEN_ELSE. */ | |
e658434c RK |
771 | |
772 | static int | |
fa5b4208 | 773 | jmp_uses_reg_or_mem (x) |
e658434c RK |
774 | rtx x; |
775 | { | |
776 | enum rtx_code code = GET_CODE (x); | |
777 | int i, j; | |
778 | char *fmt; | |
779 | ||
fa5b4208 RK |
780 | switch (code) |
781 | { | |
782 | case CONST: | |
783 | case LABEL_REF: | |
784 | case PC: | |
785 | return 0; | |
786 | ||
787 | case REG: | |
788 | return 1; | |
789 | ||
790 | case MEM: | |
791 | return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
792 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); | |
793 | ||
794 | case IF_THEN_ELSE: | |
795 | return (jmp_uses_reg_or_mem (XEXP (x, 1)) | |
796 | || jmp_uses_reg_or_mem (XEXP (x, 2))); | |
797 | ||
798 | case PLUS: case MINUS: case MULT: | |
799 | return (jmp_uses_reg_or_mem (XEXP (x, 0)) | |
800 | || jmp_uses_reg_or_mem (XEXP (x, 1))); | |
801 | } | |
e658434c RK |
802 | |
803 | fmt = GET_RTX_FORMAT (code); | |
804 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
805 | { | |
806 | if (fmt[i] == 'e' | |
fa5b4208 | 807 | && jmp_uses_reg_or_mem (XEXP (x, i))) |
e658434c RK |
808 | return 1; |
809 | ||
810 | if (fmt[i] == 'E') | |
811 | for (j = 0; j < XVECLEN (x, i); j++) | |
fa5b4208 | 812 | if (jmp_uses_reg_or_mem (XVECEXP (x, i, j))) |
e658434c RK |
813 | return 1; |
814 | } | |
815 | ||
816 | return 0; | |
817 | } | |
8329b5ec | 818 | |
d7429b6a RK |
819 | /* Check expression X for label references; |
820 | if one is found, add INSN to the label's chain of references. | |
821 | ||
822 | CHECKDUP means check for and avoid creating duplicate references | |
823 | from the same insn. Such duplicates do no serious harm but | |
824 | can slow life analysis. CHECKDUP is set only when duplicates | |
825 | are likely. */ | |
826 | ||
827 | static void | |
828 | mark_label_ref (x, insn, checkdup) | |
829 | rtx x, insn; | |
830 | int checkdup; | |
831 | { | |
832 | register RTX_CODE code; | |
833 | register int i; | |
834 | register char *fmt; | |
835 | ||
836 | /* We can be called with NULL when scanning label_value_list. */ | |
837 | if (x == 0) | |
838 | return; | |
839 | ||
840 | code = GET_CODE (x); | |
841 | if (code == LABEL_REF) | |
842 | { | |
843 | register rtx label = XEXP (x, 0); | |
844 | register rtx y; | |
845 | if (GET_CODE (label) != CODE_LABEL) | |
846 | abort (); | |
847 | /* If the label was never emitted, this insn is junk, | |
848 | but avoid a crash trying to refer to BLOCK_NUM (label). | |
849 | This can happen as a result of a syntax error | |
850 | and a diagnostic has already been printed. */ | |
851 | if (INSN_UID (label) == 0) | |
852 | return; | |
853 | CONTAINING_INSN (x) = insn; | |
854 | /* if CHECKDUP is set, check for duplicate ref from same insn | |
855 | and don't insert. */ | |
856 | if (checkdup) | |
857 | for (y = LABEL_REFS (label); y != label; y = LABEL_NEXTREF (y)) | |
858 | if (CONTAINING_INSN (y) == insn) | |
859 | return; | |
860 | LABEL_NEXTREF (x) = LABEL_REFS (label); | |
861 | LABEL_REFS (label) = x; | |
862 | block_live_static[BLOCK_NUM (label)] = 1; | |
863 | return; | |
864 | } | |
865 | ||
866 | fmt = GET_RTX_FORMAT (code); | |
867 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
868 | { | |
869 | if (fmt[i] == 'e') | |
870 | mark_label_ref (XEXP (x, i), insn, 0); | |
871 | if (fmt[i] == 'E') | |
872 | { | |
873 | register int j; | |
874 | for (j = 0; j < XVECLEN (x, i); j++) | |
875 | mark_label_ref (XVECEXP (x, i, j), insn, 1); | |
876 | } | |
877 | } | |
878 | } | |
8329b5ec DE |
879 | |
880 | /* Delete INSN by patching it out. | |
881 | Return the next insn. */ | |
882 | ||
883 | static rtx | |
884 | flow_delete_insn (insn) | |
885 | rtx insn; | |
886 | { | |
887 | /* ??? For the moment we assume we don't have to watch for NULLs here | |
888 | since the start/end of basic blocks aren't deleted like this. */ | |
889 | NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn); | |
890 | PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn); | |
891 | return NEXT_INSN (insn); | |
892 | } | |
d7429b6a RK |
893 | \f |
894 | /* Determine which registers are live at the start of each | |
895 | basic block of the function whose first insn is F. | |
896 | NREGS is the number of registers used in F. | |
897 | We allocate the vector basic_block_live_at_start | |
898 | and the regsets that it points to, and fill them with the data. | |
899 | regset_size and regset_bytes are also set here. */ | |
900 | ||
901 | static void | |
902 | life_analysis (f, nregs) | |
903 | rtx f; | |
904 | int nregs; | |
905 | { | |
906 | register regset tem; | |
907 | int first_pass; | |
908 | int changed; | |
909 | /* For each basic block, a bitmask of regs | |
910 | live on exit from the block. */ | |
911 | regset *basic_block_live_at_end; | |
912 | /* For each basic block, a bitmask of regs | |
913 | live on entry to a successor-block of this block. | |
914 | If this does not match basic_block_live_at_end, | |
915 | that must be updated, and the block must be rescanned. */ | |
916 | regset *basic_block_new_live_at_end; | |
917 | /* For each basic block, a bitmask of regs | |
918 | whose liveness at the end of the basic block | |
919 | can make a difference in which regs are live on entry to the block. | |
920 | These are the regs that are set within the basic block, | |
921 | possibly excluding those that are used after they are set. */ | |
922 | regset *basic_block_significant; | |
923 | register int i; | |
924 | rtx insn; | |
925 | ||
926 | struct obstack flow_obstack; | |
927 | ||
928 | gcc_obstack_init (&flow_obstack); | |
929 | ||
930 | max_regno = nregs; | |
931 | ||
932 | bzero (regs_ever_live, sizeof regs_ever_live); | |
933 | ||
934 | /* Allocate and zero out many data structures | |
935 | that will record the data from lifetime analysis. */ | |
936 | ||
937 | allocate_for_life_analysis (); | |
938 | ||
939 | reg_next_use = (rtx *) alloca (nregs * sizeof (rtx)); | |
4c9a05bc | 940 | bzero ((char *) reg_next_use, nregs * sizeof (rtx)); |
d7429b6a RK |
941 | |
942 | /* Set up several regset-vectors used internally within this function. | |
943 | Their meanings are documented above, with their declarations. */ | |
944 | ||
4c9a05bc RK |
945 | basic_block_live_at_end |
946 | = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
947 | ||
d7429b6a RK |
948 | /* Don't use alloca since that leads to a crash rather than an error message |
949 | if there isn't enough space. | |
950 | Don't use oballoc since we may need to allocate other things during | |
951 | this function on the temporary obstack. */ | |
952 | tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes); | |
4c9a05bc RK |
953 | bzero ((char *) tem, n_basic_blocks * regset_bytes); |
954 | init_regset_vector (basic_block_live_at_end, tem, | |
955 | n_basic_blocks, regset_bytes); | |
d7429b6a | 956 | |
4c9a05bc RK |
957 | basic_block_new_live_at_end |
958 | = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
d7429b6a | 959 | tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes); |
4c9a05bc RK |
960 | bzero ((char *) tem, n_basic_blocks * regset_bytes); |
961 | init_regset_vector (basic_block_new_live_at_end, tem, | |
962 | n_basic_blocks, regset_bytes); | |
d7429b6a | 963 | |
4c9a05bc RK |
964 | basic_block_significant |
965 | = (regset *) alloca (n_basic_blocks * sizeof (regset)); | |
d7429b6a | 966 | tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes); |
4c9a05bc RK |
967 | bzero ((char *) tem, n_basic_blocks * regset_bytes); |
968 | init_regset_vector (basic_block_significant, tem, | |
969 | n_basic_blocks, regset_bytes); | |
d7429b6a RK |
970 | |
971 | /* Record which insns refer to any volatile memory | |
972 | or for any reason can't be deleted just because they are dead stores. | |
0f41302f | 973 | Also, delete any insns that copy a register to itself. */ |
d7429b6a RK |
974 | |
975 | for (insn = f; insn; insn = NEXT_INSN (insn)) | |
976 | { | |
977 | enum rtx_code code1 = GET_CODE (insn); | |
978 | if (code1 == CALL_INSN) | |
979 | INSN_VOLATILE (insn) = 1; | |
980 | else if (code1 == INSN || code1 == JUMP_INSN) | |
981 | { | |
982 | /* Delete (in effect) any obvious no-op moves. */ | |
983 | if (GET_CODE (PATTERN (insn)) == SET | |
984 | && GET_CODE (SET_DEST (PATTERN (insn))) == REG | |
985 | && GET_CODE (SET_SRC (PATTERN (insn))) == REG | |
986 | && REGNO (SET_DEST (PATTERN (insn))) == | |
987 | REGNO (SET_SRC (PATTERN (insn))) | |
988 | /* Insns carrying these notes are useful later on. */ | |
5f4f0e22 | 989 | && ! find_reg_note (insn, REG_EQUAL, NULL_RTX)) |
d7429b6a RK |
990 | { |
991 | PUT_CODE (insn, NOTE); | |
992 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
993 | NOTE_SOURCE_FILE (insn) = 0; | |
994 | } | |
995 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
996 | { | |
997 | /* If nothing but SETs of registers to themselves, | |
998 | this insn can also be deleted. */ | |
999 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
1000 | { | |
1001 | rtx tem = XVECEXP (PATTERN (insn), 0, i); | |
1002 | ||
1003 | if (GET_CODE (tem) == USE | |
1004 | || GET_CODE (tem) == CLOBBER) | |
1005 | continue; | |
1006 | ||
1007 | if (GET_CODE (tem) != SET | |
1008 | || GET_CODE (SET_DEST (tem)) != REG | |
1009 | || GET_CODE (SET_SRC (tem)) != REG | |
1010 | || REGNO (SET_DEST (tem)) != REGNO (SET_SRC (tem))) | |
1011 | break; | |
1012 | } | |
1013 | ||
1014 | if (i == XVECLEN (PATTERN (insn), 0) | |
1015 | /* Insns carrying these notes are useful later on. */ | |
5f4f0e22 | 1016 | && ! find_reg_note (insn, REG_EQUAL, NULL_RTX)) |
d7429b6a RK |
1017 | { |
1018 | PUT_CODE (insn, NOTE); | |
1019 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1020 | NOTE_SOURCE_FILE (insn) = 0; | |
1021 | } | |
1022 | else | |
1023 | INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn)); | |
1024 | } | |
1025 | else if (GET_CODE (PATTERN (insn)) != USE) | |
1026 | INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn)); | |
1027 | /* A SET that makes space on the stack cannot be dead. | |
1028 | (Such SETs occur only for allocating variable-size data, | |
1029 | so they will always have a PLUS or MINUS according to the | |
1030 | direction of stack growth.) | |
1031 | Even if this function never uses this stack pointer value, | |
1032 | signal handlers do! */ | |
1033 | else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET | |
1034 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1035 | #ifdef STACK_GROWS_DOWNWARD | |
1036 | && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS | |
1037 | #else | |
1038 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1039 | #endif | |
1040 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx) | |
1041 | INSN_VOLATILE (insn) = 1; | |
1042 | } | |
1043 | } | |
1044 | ||
1045 | if (n_basic_blocks > 0) | |
1046 | #ifdef EXIT_IGNORE_STACK | |
1047 | if (! EXIT_IGNORE_STACK | |
1048 | || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer)) | |
1049 | #endif | |
1050 | { | |
1051 | /* If exiting needs the right stack value, | |
1052 | consider the stack pointer live at the end of the function. */ | |
1053 | basic_block_live_at_end[n_basic_blocks - 1] | |
1054 | [STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
efb07da7 | 1055 | |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS); |
d7429b6a RK |
1056 | basic_block_new_live_at_end[n_basic_blocks - 1] |
1057 | [STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
efb07da7 | 1058 | |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS); |
d7429b6a RK |
1059 | } |
1060 | ||
fe0f9c4b RK |
1061 | /* Mark the frame pointer is needed at the end of the function. If |
1062 | we end up eliminating it, it will be removed from the live list | |
1063 | of each basic block by reload. */ | |
1064 | ||
1065 | if (n_basic_blocks > 0) | |
1066 | { | |
1067 | basic_block_live_at_end[n_basic_blocks - 1] | |
1068 | [FRAME_POINTER_REGNUM / REGSET_ELT_BITS] | |
1069 | |= (REGSET_ELT_TYPE) 1 << (FRAME_POINTER_REGNUM % REGSET_ELT_BITS); | |
1070 | basic_block_new_live_at_end[n_basic_blocks - 1] | |
1071 | [FRAME_POINTER_REGNUM / REGSET_ELT_BITS] | |
1072 | |= (REGSET_ELT_TYPE) 1 << (FRAME_POINTER_REGNUM % REGSET_ELT_BITS); | |
73a187c1 DE |
1073 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
1074 | /* If they are different, also mark the hard frame pointer as live */ | |
1075 | basic_block_live_at_end[n_basic_blocks - 1] | |
1076 | [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS] | |
1077 | |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM | |
1078 | % REGSET_ELT_BITS); | |
1079 | basic_block_new_live_at_end[n_basic_blocks - 1] | |
1080 | [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS] | |
1081 | |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM | |
1082 | % REGSET_ELT_BITS); | |
1083 | #endif | |
fe0f9c4b RK |
1084 | } |
1085 | ||
d7429b6a RK |
1086 | /* Mark all global registers as being live at the end of the function |
1087 | since they may be referenced by our caller. */ | |
1088 | ||
1089 | if (n_basic_blocks > 0) | |
1090 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1091 | if (global_regs[i]) | |
1092 | { | |
1093 | basic_block_live_at_end[n_basic_blocks - 1] | |
efb07da7 RK |
1094 | [i / REGSET_ELT_BITS] |
1095 | |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS); | |
d7429b6a | 1096 | basic_block_new_live_at_end[n_basic_blocks - 1] |
efb07da7 RK |
1097 | [i / REGSET_ELT_BITS] |
1098 | |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS); | |
d7429b6a RK |
1099 | } |
1100 | ||
1101 | /* Propagate life info through the basic blocks | |
1102 | around the graph of basic blocks. | |
1103 | ||
1104 | This is a relaxation process: each time a new register | |
1105 | is live at the end of the basic block, we must scan the block | |
1106 | to determine which registers are, as a consequence, live at the beginning | |
1107 | of that block. These registers must then be marked live at the ends | |
1108 | of all the blocks that can transfer control to that block. | |
1109 | The process continues until it reaches a fixed point. */ | |
1110 | ||
1111 | first_pass = 1; | |
1112 | changed = 1; | |
1113 | while (changed) | |
1114 | { | |
1115 | changed = 0; | |
1116 | for (i = n_basic_blocks - 1; i >= 0; i--) | |
1117 | { | |
1118 | int consider = first_pass; | |
1119 | int must_rescan = first_pass; | |
1120 | register int j; | |
1121 | ||
1122 | if (!first_pass) | |
1123 | { | |
1124 | /* Set CONSIDER if this block needs thinking about at all | |
1125 | (that is, if the regs live now at the end of it | |
1126 | are not the same as were live at the end of it when | |
1127 | we last thought about it). | |
1128 | Set must_rescan if it needs to be thought about | |
1129 | instruction by instruction (that is, if any additional | |
1130 | reg that is live at the end now but was not live there before | |
1131 | is one of the significant regs of this basic block). */ | |
1132 | ||
1133 | for (j = 0; j < regset_size; j++) | |
1134 | { | |
5f4f0e22 CH |
1135 | register REGSET_ELT_TYPE x |
1136 | = (basic_block_new_live_at_end[i][j] | |
1137 | & ~basic_block_live_at_end[i][j]); | |
d7429b6a RK |
1138 | if (x) |
1139 | consider = 1; | |
1140 | if (x & basic_block_significant[i][j]) | |
1141 | { | |
1142 | must_rescan = 1; | |
1143 | consider = 1; | |
1144 | break; | |
1145 | } | |
1146 | } | |
1147 | ||
1148 | if (! consider) | |
1149 | continue; | |
1150 | } | |
1151 | ||
1152 | /* The live_at_start of this block may be changing, | |
1153 | so another pass will be required after this one. */ | |
1154 | changed = 1; | |
1155 | ||
1156 | if (! must_rescan) | |
1157 | { | |
1158 | /* No complete rescan needed; | |
1159 | just record those variables newly known live at end | |
1160 | as live at start as well. */ | |
1161 | for (j = 0; j < regset_size; j++) | |
1162 | { | |
5f4f0e22 CH |
1163 | register REGSET_ELT_TYPE x |
1164 | = (basic_block_new_live_at_end[i][j] | |
1165 | & ~basic_block_live_at_end[i][j]); | |
d7429b6a RK |
1166 | basic_block_live_at_start[i][j] |= x; |
1167 | basic_block_live_at_end[i][j] |= x; | |
1168 | } | |
1169 | } | |
1170 | else | |
1171 | { | |
1172 | /* Update the basic_block_live_at_start | |
1173 | by propagation backwards through the block. */ | |
4c9a05bc RK |
1174 | bcopy ((char *) basic_block_new_live_at_end[i], |
1175 | (char *) basic_block_live_at_end[i], regset_bytes); | |
1176 | bcopy ((char *) basic_block_live_at_end[i], | |
1177 | (char *) basic_block_live_at_start[i], regset_bytes); | |
d7429b6a RK |
1178 | propagate_block (basic_block_live_at_start[i], |
1179 | basic_block_head[i], basic_block_end[i], 0, | |
5f4f0e22 CH |
1180 | first_pass ? basic_block_significant[i] |
1181 | : (regset) 0, | |
d7429b6a RK |
1182 | i); |
1183 | } | |
1184 | ||
1185 | { | |
1186 | register rtx jump, head; | |
af14ce9c | 1187 | |
d7429b6a RK |
1188 | /* Update the basic_block_new_live_at_end's of the block |
1189 | that falls through into this one (if any). */ | |
1190 | head = basic_block_head[i]; | |
d7429b6a RK |
1191 | if (basic_block_drops_in[i]) |
1192 | { | |
d7429b6a RK |
1193 | register int j; |
1194 | for (j = 0; j < regset_size; j++) | |
af14ce9c | 1195 | basic_block_new_live_at_end[i-1][j] |
d7429b6a RK |
1196 | |= basic_block_live_at_start[i][j]; |
1197 | } | |
af14ce9c | 1198 | |
d7429b6a RK |
1199 | /* Update the basic_block_new_live_at_end's of |
1200 | all the blocks that jump to this one. */ | |
1201 | if (GET_CODE (head) == CODE_LABEL) | |
1202 | for (jump = LABEL_REFS (head); | |
1203 | jump != head; | |
1204 | jump = LABEL_NEXTREF (jump)) | |
1205 | { | |
1206 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
1207 | register int j; | |
1208 | for (j = 0; j < regset_size; j++) | |
1209 | basic_block_new_live_at_end[from_block][j] | |
1210 | |= basic_block_live_at_start[i][j]; | |
1211 | } | |
1212 | } | |
1213 | #ifdef USE_C_ALLOCA | |
1214 | alloca (0); | |
1215 | #endif | |
1216 | } | |
1217 | first_pass = 0; | |
1218 | } | |
1219 | ||
1220 | /* The only pseudos that are live at the beginning of the function are | |
1221 | those that were not set anywhere in the function. local-alloc doesn't | |
1222 | know how to handle these correctly, so mark them as not local to any | |
1223 | one basic block. */ | |
1224 | ||
1225 | if (n_basic_blocks > 0) | |
1226 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1227 | if (basic_block_live_at_start[0][i / REGSET_ELT_BITS] | |
5f4f0e22 | 1228 | & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS))) |
d7429b6a RK |
1229 | reg_basic_block[i] = REG_BLOCK_GLOBAL; |
1230 | ||
1231 | /* Now the life information is accurate. | |
1232 | Make one more pass over each basic block | |
1233 | to delete dead stores, create autoincrement addressing | |
1234 | and record how many times each register is used, is set, or dies. | |
1235 | ||
1236 | To save time, we operate directly in basic_block_live_at_end[i], | |
1237 | thus destroying it (in fact, converting it into a copy of | |
1238 | basic_block_live_at_start[i]). This is ok now because | |
1239 | basic_block_live_at_end[i] is no longer used past this point. */ | |
1240 | ||
1241 | max_scratch = 0; | |
1242 | ||
1243 | for (i = 0; i < n_basic_blocks; i++) | |
1244 | { | |
1245 | propagate_block (basic_block_live_at_end[i], | |
5f4f0e22 CH |
1246 | basic_block_head[i], basic_block_end[i], 1, |
1247 | (regset) 0, i); | |
d7429b6a RK |
1248 | #ifdef USE_C_ALLOCA |
1249 | alloca (0); | |
1250 | #endif | |
1251 | } | |
1252 | ||
1253 | #if 0 | |
1254 | /* Something live during a setjmp should not be put in a register | |
1255 | on certain machines which restore regs from stack frames | |
1256 | rather than from the jmpbuf. | |
1257 | But we don't need to do this for the user's variables, since | |
1258 | ANSI says only volatile variables need this. */ | |
1259 | #ifdef LONGJMP_RESTORE_FROM_STACK | |
1260 | for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) | |
5f4f0e22 CH |
1261 | if (regs_live_at_setjmp[i / REGSET_ELT_BITS] |
1262 | & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)) | |
d7429b6a RK |
1263 | && regno_reg_rtx[i] != 0 && ! REG_USERVAR_P (regno_reg_rtx[i])) |
1264 | { | |
1265 | reg_live_length[i] = -1; | |
1266 | reg_basic_block[i] = -1; | |
1267 | } | |
1268 | #endif | |
1269 | #endif | |
1270 | ||
1271 | /* We have a problem with any pseudoreg that | |
1272 | lives across the setjmp. ANSI says that if a | |
1273 | user variable does not change in value | |
1274 | between the setjmp and the longjmp, then the longjmp preserves it. | |
1275 | This includes longjmp from a place where the pseudo appears dead. | |
1276 | (In principle, the value still exists if it is in scope.) | |
1277 | If the pseudo goes in a hard reg, some other value may occupy | |
1278 | that hard reg where this pseudo is dead, thus clobbering the pseudo. | |
1279 | Conclusion: such a pseudo must not go in a hard reg. */ | |
1280 | for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) | |
5f4f0e22 CH |
1281 | if ((regs_live_at_setjmp[i / REGSET_ELT_BITS] |
1282 | & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS))) | |
d7429b6a RK |
1283 | && regno_reg_rtx[i] != 0) |
1284 | { | |
1285 | reg_live_length[i] = -1; | |
1286 | reg_basic_block[i] = -1; | |
1287 | } | |
1288 | ||
5f4f0e22 | 1289 | obstack_free (&flow_obstack, NULL_PTR); |
d7429b6a RK |
1290 | } |
1291 | \f | |
1292 | /* Subroutines of life analysis. */ | |
1293 | ||
1294 | /* Allocate the permanent data structures that represent the results | |
1295 | of life analysis. Not static since used also for stupid life analysis. */ | |
1296 | ||
1297 | void | |
1298 | allocate_for_life_analysis () | |
1299 | { | |
1300 | register int i; | |
1301 | register regset tem; | |
1302 | ||
1303 | regset_size = ((max_regno + REGSET_ELT_BITS - 1) / REGSET_ELT_BITS); | |
0f41302f | 1304 | regset_bytes = regset_size * sizeof (*(regset) 0); |
d7429b6a RK |
1305 | |
1306 | reg_n_refs = (int *) oballoc (max_regno * sizeof (int)); | |
4c9a05bc | 1307 | bzero ((char *) reg_n_refs, max_regno * sizeof (int)); |
d7429b6a RK |
1308 | |
1309 | reg_n_sets = (short *) oballoc (max_regno * sizeof (short)); | |
4c9a05bc | 1310 | bzero ((char *) reg_n_sets, max_regno * sizeof (short)); |
d7429b6a RK |
1311 | |
1312 | reg_n_deaths = (short *) oballoc (max_regno * sizeof (short)); | |
4c9a05bc | 1313 | bzero ((char *) reg_n_deaths, max_regno * sizeof (short)); |
d7429b6a | 1314 | |
80f8f04a RK |
1315 | reg_changes_size = (char *) oballoc (max_regno * sizeof (char)); |
1316 | bzero (reg_changes_size, max_regno * sizeof (char));; | |
1317 | ||
d7429b6a | 1318 | reg_live_length = (int *) oballoc (max_regno * sizeof (int)); |
4c9a05bc | 1319 | bzero ((char *) reg_live_length, max_regno * sizeof (int)); |
d7429b6a RK |
1320 | |
1321 | reg_n_calls_crossed = (int *) oballoc (max_regno * sizeof (int)); | |
4c9a05bc | 1322 | bzero ((char *) reg_n_calls_crossed, max_regno * sizeof (int)); |
d7429b6a | 1323 | |
6ac271be | 1324 | reg_basic_block = (int *) oballoc (max_regno * sizeof (int)); |
d7429b6a RK |
1325 | for (i = 0; i < max_regno; i++) |
1326 | reg_basic_block[i] = REG_BLOCK_UNKNOWN; | |
1327 | ||
4c9a05bc RK |
1328 | basic_block_live_at_start |
1329 | = (regset *) oballoc (n_basic_blocks * sizeof (regset)); | |
d7429b6a | 1330 | tem = (regset) oballoc (n_basic_blocks * regset_bytes); |
4c9a05bc RK |
1331 | bzero ((char *) tem, n_basic_blocks * regset_bytes); |
1332 | init_regset_vector (basic_block_live_at_start, tem, | |
1333 | n_basic_blocks, regset_bytes); | |
d7429b6a RK |
1334 | |
1335 | regs_live_at_setjmp = (regset) oballoc (regset_bytes); | |
4c9a05bc | 1336 | bzero ((char *) regs_live_at_setjmp, regset_bytes); |
d7429b6a RK |
1337 | } |
1338 | ||
1339 | /* Make each element of VECTOR point at a regset, | |
1340 | taking the space for all those regsets from SPACE. | |
1341 | SPACE is of type regset, but it is really as long as NELTS regsets. | |
1342 | BYTES_PER_ELT is the number of bytes in one regset. */ | |
1343 | ||
1344 | static void | |
1345 | init_regset_vector (vector, space, nelts, bytes_per_elt) | |
1346 | regset *vector; | |
1347 | regset space; | |
1348 | int nelts; | |
1349 | int bytes_per_elt; | |
1350 | { | |
1351 | register int i; | |
1352 | register regset p = space; | |
1353 | ||
1354 | for (i = 0; i < nelts; i++) | |
1355 | { | |
1356 | vector[i] = p; | |
1357 | p += bytes_per_elt / sizeof (*p); | |
1358 | } | |
1359 | } | |
e658434c | 1360 | |
d7429b6a RK |
1361 | /* Compute the registers live at the beginning of a basic block |
1362 | from those live at the end. | |
1363 | ||
1364 | When called, OLD contains those live at the end. | |
1365 | On return, it contains those live at the beginning. | |
1366 | FIRST and LAST are the first and last insns of the basic block. | |
1367 | ||
1368 | FINAL is nonzero if we are doing the final pass which is not | |
1369 | for computing the life info (since that has already been done) | |
1370 | but for acting on it. On this pass, we delete dead stores, | |
1371 | set up the logical links and dead-variables lists of instructions, | |
1372 | and merge instructions for autoincrement and autodecrement addresses. | |
1373 | ||
1374 | SIGNIFICANT is nonzero only the first time for each basic block. | |
1375 | If it is nonzero, it points to a regset in which we store | |
1376 | a 1 for each register that is set within the block. | |
1377 | ||
1378 | BNUM is the number of the basic block. */ | |
1379 | ||
1380 | static void | |
1381 | propagate_block (old, first, last, final, significant, bnum) | |
1382 | register regset old; | |
1383 | rtx first; | |
1384 | rtx last; | |
1385 | int final; | |
1386 | regset significant; | |
1387 | int bnum; | |
1388 | { | |
1389 | register rtx insn; | |
1390 | rtx prev; | |
1391 | regset live; | |
1392 | regset dead; | |
1393 | ||
1394 | /* The following variables are used only if FINAL is nonzero. */ | |
1395 | /* This vector gets one element for each reg that has been live | |
1396 | at any point in the basic block that has been scanned so far. | |
1397 | SOMETIMES_MAX says how many elements are in use so far. | |
1398 | In each element, OFFSET is the byte-number within a regset | |
1399 | for the register described by the element, and BIT is a mask | |
1400 | for that register's bit within the byte. */ | |
5a13dfdd | 1401 | register struct sometimes { short offset; short bit; } *regs_sometimes_live; |
d7429b6a RK |
1402 | int sometimes_max = 0; |
1403 | /* This regset has 1 for each reg that we have seen live so far. | |
1404 | It and REGS_SOMETIMES_LIVE are updated together. */ | |
1405 | regset maxlive; | |
1406 | ||
1407 | /* The loop depth may change in the middle of a basic block. Since we | |
1408 | scan from end to beginning, we start with the depth at the end of the | |
1409 | current basic block, and adjust as we pass ends and starts of loops. */ | |
1410 | loop_depth = basic_block_loop_depth[bnum]; | |
1411 | ||
1412 | dead = (regset) alloca (regset_bytes); | |
1413 | live = (regset) alloca (regset_bytes); | |
1414 | ||
1415 | cc0_live = 0; | |
1416 | last_mem_set = 0; | |
1417 | ||
1418 | /* Include any notes at the end of the block in the scan. | |
1419 | This is in case the block ends with a call to setjmp. */ | |
1420 | ||
1421 | while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE) | |
1422 | { | |
1423 | /* Look for loop boundaries, we are going forward here. */ | |
1424 | last = NEXT_INSN (last); | |
1425 | if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG) | |
1426 | loop_depth++; | |
1427 | else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END) | |
1428 | loop_depth--; | |
1429 | } | |
1430 | ||
1431 | if (final) | |
1432 | { | |
5f4f0e22 CH |
1433 | register int i, offset; |
1434 | REGSET_ELT_TYPE bit; | |
d7429b6a RK |
1435 | |
1436 | num_scratch = 0; | |
1437 | maxlive = (regset) alloca (regset_bytes); | |
4c9a05bc | 1438 | bcopy ((char *) old, (char *) maxlive, regset_bytes); |
d7429b6a | 1439 | regs_sometimes_live |
5a13dfdd | 1440 | = (struct sometimes *) alloca (max_regno * sizeof (struct sometimes)); |
d7429b6a RK |
1441 | |
1442 | /* Process the regs live at the end of the block. | |
1443 | Enter them in MAXLIVE and REGS_SOMETIMES_LIVE. | |
1444 | Also mark them as not local to any one basic block. */ | |
1445 | ||
1446 | for (offset = 0, i = 0; offset < regset_size; offset++) | |
1447 | for (bit = 1; bit; bit <<= 1, i++) | |
1448 | { | |
1449 | if (i == max_regno) | |
1450 | break; | |
1451 | if (old[offset] & bit) | |
1452 | { | |
1453 | reg_basic_block[i] = REG_BLOCK_GLOBAL; | |
1454 | regs_sometimes_live[sometimes_max].offset = offset; | |
1455 | regs_sometimes_live[sometimes_max].bit = i % REGSET_ELT_BITS; | |
1456 | sometimes_max++; | |
1457 | } | |
1458 | } | |
1459 | } | |
1460 | ||
1461 | /* Scan the block an insn at a time from end to beginning. */ | |
1462 | ||
1463 | for (insn = last; ; insn = prev) | |
1464 | { | |
1465 | prev = PREV_INSN (insn); | |
1466 | ||
8329b5ec | 1467 | if (GET_CODE (insn) == NOTE) |
d7429b6a | 1468 | { |
8329b5ec DE |
1469 | /* Look for loop boundaries, remembering that we are going |
1470 | backwards. */ | |
1471 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
1472 | loop_depth++; | |
1473 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
1474 | loop_depth--; | |
1475 | ||
1476 | /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. | |
1477 | Abort now rather than setting register status incorrectly. */ | |
1478 | if (loop_depth == 0) | |
1479 | abort (); | |
1480 | ||
1481 | /* If this is a call to `setjmp' et al, | |
1482 | warn if any non-volatile datum is live. */ | |
1483 | ||
1484 | if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP) | |
1485 | { | |
1486 | int i; | |
1487 | for (i = 0; i < regset_size; i++) | |
1488 | regs_live_at_setjmp[i] |= old[i]; | |
1489 | } | |
d7429b6a RK |
1490 | } |
1491 | ||
1492 | /* Update the life-status of regs for this insn. | |
1493 | First DEAD gets which regs are set in this insn | |
1494 | then LIVE gets which regs are used in this insn. | |
1495 | Then the regs live before the insn | |
1496 | are those live after, with DEAD regs turned off, | |
1497 | and then LIVE regs turned on. */ | |
1498 | ||
8329b5ec | 1499 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
d7429b6a RK |
1500 | { |
1501 | register int i; | |
5f4f0e22 | 1502 | rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX); |
d7429b6a RK |
1503 | int insn_is_dead |
1504 | = (insn_dead_p (PATTERN (insn), old, 0) | |
1505 | /* Don't delete something that refers to volatile storage! */ | |
1506 | && ! INSN_VOLATILE (insn)); | |
1507 | int libcall_is_dead | |
1508 | = (insn_is_dead && note != 0 | |
1509 | && libcall_dead_p (PATTERN (insn), old, note, insn)); | |
1510 | ||
1511 | /* If an instruction consists of just dead store(s) on final pass, | |
1512 | "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED. | |
1513 | We could really delete it with delete_insn, but that | |
1514 | can cause trouble for first or last insn in a basic block. */ | |
1515 | if (final && insn_is_dead) | |
1516 | { | |
1517 | PUT_CODE (insn, NOTE); | |
1518 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1519 | NOTE_SOURCE_FILE (insn) = 0; | |
1520 | ||
e5df1ea3 RK |
1521 | /* CC0 is now known to be dead. Either this insn used it, |
1522 | in which case it doesn't anymore, or clobbered it, | |
1523 | so the next insn can't use it. */ | |
1524 | cc0_live = 0; | |
1525 | ||
d7429b6a RK |
1526 | /* If this insn is copying the return value from a library call, |
1527 | delete the entire library call. */ | |
1528 | if (libcall_is_dead) | |
1529 | { | |
1530 | rtx first = XEXP (note, 0); | |
1531 | rtx p = insn; | |
1532 | while (INSN_DELETED_P (first)) | |
1533 | first = NEXT_INSN (first); | |
1534 | while (p != first) | |
1535 | { | |
1536 | p = PREV_INSN (p); | |
1537 | PUT_CODE (p, NOTE); | |
1538 | NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED; | |
1539 | NOTE_SOURCE_FILE (p) = 0; | |
1540 | } | |
1541 | } | |
1542 | goto flushed; | |
1543 | } | |
1544 | ||
1545 | for (i = 0; i < regset_size; i++) | |
1546 | { | |
1547 | dead[i] = 0; /* Faster than bzero here */ | |
1548 | live[i] = 0; /* since regset_size is usually small */ | |
1549 | } | |
1550 | ||
1551 | /* See if this is an increment or decrement that can be | |
1552 | merged into a following memory address. */ | |
1553 | #ifdef AUTO_INC_DEC | |
1554 | { | |
1555 | register rtx x = PATTERN (insn); | |
1556 | /* Does this instruction increment or decrement a register? */ | |
1557 | if (final && GET_CODE (x) == SET | |
1558 | && GET_CODE (SET_DEST (x)) == REG | |
1559 | && (GET_CODE (SET_SRC (x)) == PLUS | |
1560 | || GET_CODE (SET_SRC (x)) == MINUS) | |
1561 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) | |
1562 | && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT | |
1563 | /* Ok, look for a following memory ref we can combine with. | |
1564 | If one is found, change the memory ref to a PRE_INC | |
1565 | or PRE_DEC, cancel this insn, and return 1. | |
1566 | Return 0 if nothing has been done. */ | |
1567 | && try_pre_increment_1 (insn)) | |
1568 | goto flushed; | |
1569 | } | |
1570 | #endif /* AUTO_INC_DEC */ | |
1571 | ||
1572 | /* If this is not the final pass, and this insn is copying the | |
1573 | value of a library call and it's dead, don't scan the | |
1574 | insns that perform the library call, so that the call's | |
1575 | arguments are not marked live. */ | |
1576 | if (libcall_is_dead) | |
1577 | { | |
1578 | /* Mark the dest reg as `significant'. */ | |
5f4f0e22 | 1579 | mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant); |
d7429b6a RK |
1580 | |
1581 | insn = XEXP (note, 0); | |
1582 | prev = PREV_INSN (insn); | |
1583 | } | |
1584 | else if (GET_CODE (PATTERN (insn)) == SET | |
1585 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1586 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1587 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx | |
1588 | && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT) | |
1589 | /* We have an insn to pop a constant amount off the stack. | |
1590 | (Such insns use PLUS regardless of the direction of the stack, | |
1591 | and any insn to adjust the stack by a constant is always a pop.) | |
1592 | These insns, if not dead stores, have no effect on life. */ | |
1593 | ; | |
1594 | else | |
1595 | { | |
1596 | /* LIVE gets the regs used in INSN; | |
1597 | DEAD gets those set by it. Dead insns don't make anything | |
1598 | live. */ | |
1599 | ||
5f4f0e22 CH |
1600 | mark_set_regs (old, dead, PATTERN (insn), |
1601 | final ? insn : NULL_RTX, significant); | |
d7429b6a RK |
1602 | |
1603 | /* If an insn doesn't use CC0, it becomes dead since we | |
1604 | assume that every insn clobbers it. So show it dead here; | |
1605 | mark_used_regs will set it live if it is referenced. */ | |
1606 | cc0_live = 0; | |
1607 | ||
1608 | if (! insn_is_dead) | |
1609 | mark_used_regs (old, live, PATTERN (insn), final, insn); | |
1610 | ||
1611 | /* Sometimes we may have inserted something before INSN (such as | |
1612 | a move) when we make an auto-inc. So ensure we will scan | |
1613 | those insns. */ | |
1614 | #ifdef AUTO_INC_DEC | |
1615 | prev = PREV_INSN (insn); | |
1616 | #endif | |
1617 | ||
1618 | if (! insn_is_dead && GET_CODE (insn) == CALL_INSN) | |
1619 | { | |
1620 | register int i; | |
1621 | ||
6b67ec08 RK |
1622 | rtx note; |
1623 | ||
1624 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
1625 | note; | |
1626 | note = XEXP (note, 1)) | |
1627 | if (GET_CODE (XEXP (note, 0)) == USE) | |
1628 | mark_used_regs (old, live, SET_DEST (XEXP (note, 0)), | |
1629 | final, insn); | |
1630 | ||
d7429b6a | 1631 | /* Each call clobbers all call-clobbered regs that are not |
e4329280 | 1632 | global or fixed. Note that the function-value reg is a |
d7429b6a RK |
1633 | call-clobbered reg, and mark_set_regs has already had |
1634 | a chance to handle it. */ | |
1635 | ||
1636 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e4329280 RK |
1637 | if (call_used_regs[i] && ! global_regs[i] |
1638 | && ! fixed_regs[i]) | |
d7429b6a | 1639 | dead[i / REGSET_ELT_BITS] |
5f4f0e22 | 1640 | |= ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)); |
d7429b6a RK |
1641 | |
1642 | /* The stack ptr is used (honorarily) by a CALL insn. */ | |
1643 | live[STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
5f4f0e22 CH |
1644 | |= ((REGSET_ELT_TYPE) 1 |
1645 | << (STACK_POINTER_REGNUM % REGSET_ELT_BITS)); | |
d7429b6a RK |
1646 | |
1647 | /* Calls may also reference any of the global registers, | |
1648 | so they are made live. */ | |
d7429b6a RK |
1649 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
1650 | if (global_regs[i]) | |
9b316aa2 RK |
1651 | mark_used_regs (old, live, |
1652 | gen_rtx (REG, reg_raw_mode[i], i), | |
1653 | final, insn); | |
d7429b6a RK |
1654 | |
1655 | /* Calls also clobber memory. */ | |
1656 | last_mem_set = 0; | |
1657 | } | |
1658 | ||
1659 | /* Update OLD for the registers used or set. */ | |
1660 | for (i = 0; i < regset_size; i++) | |
1661 | { | |
1662 | old[i] &= ~dead[i]; | |
1663 | old[i] |= live[i]; | |
1664 | } | |
1665 | ||
1666 | if (GET_CODE (insn) == CALL_INSN && final) | |
1667 | { | |
1668 | /* Any regs live at the time of a call instruction | |
1669 | must not go in a register clobbered by calls. | |
1670 | Find all regs now live and record this for them. */ | |
1671 | ||
5a13dfdd | 1672 | register struct sometimes *p = regs_sometimes_live; |
d7429b6a RK |
1673 | |
1674 | for (i = 0; i < sometimes_max; i++, p++) | |
efb07da7 | 1675 | if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit)) |
d7429b6a RK |
1676 | reg_n_calls_crossed[p->offset * REGSET_ELT_BITS + p->bit]+= 1; |
1677 | } | |
1678 | } | |
1679 | ||
1680 | /* On final pass, add any additional sometimes-live regs | |
1681 | into MAXLIVE and REGS_SOMETIMES_LIVE. | |
1682 | Also update counts of how many insns each reg is live at. */ | |
1683 | ||
1684 | if (final) | |
1685 | { | |
1686 | for (i = 0; i < regset_size; i++) | |
1687 | { | |
5f4f0e22 | 1688 | register REGSET_ELT_TYPE diff = live[i] & ~maxlive[i]; |
d7429b6a RK |
1689 | |
1690 | if (diff) | |
1691 | { | |
1692 | register int regno; | |
1693 | maxlive[i] |= diff; | |
1694 | for (regno = 0; diff && regno < REGSET_ELT_BITS; regno++) | |
5f4f0e22 | 1695 | if (diff & ((REGSET_ELT_TYPE) 1 << regno)) |
d7429b6a RK |
1696 | { |
1697 | regs_sometimes_live[sometimes_max].offset = i; | |
1698 | regs_sometimes_live[sometimes_max].bit = regno; | |
5f4f0e22 | 1699 | diff &= ~ ((REGSET_ELT_TYPE) 1 << regno); |
d7429b6a RK |
1700 | sometimes_max++; |
1701 | } | |
1702 | } | |
1703 | } | |
1704 | ||
1705 | { | |
5a13dfdd | 1706 | register struct sometimes *p = regs_sometimes_live; |
d7429b6a RK |
1707 | for (i = 0; i < sometimes_max; i++, p++) |
1708 | { | |
5f4f0e22 | 1709 | if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit)) |
d7429b6a RK |
1710 | reg_live_length[p->offset * REGSET_ELT_BITS + p->bit]++; |
1711 | } | |
1712 | } | |
1713 | } | |
1714 | } | |
1715 | flushed: ; | |
1716 | if (insn == first) | |
1717 | break; | |
1718 | } | |
1719 | ||
1720 | if (num_scratch > max_scratch) | |
1721 | max_scratch = num_scratch; | |
1722 | } | |
1723 | \f | |
1724 | /* Return 1 if X (the body of an insn, or part of it) is just dead stores | |
1725 | (SET expressions whose destinations are registers dead after the insn). | |
1726 | NEEDED is the regset that says which regs are alive after the insn. | |
1727 | ||
1728 | Unless CALL_OK is non-zero, an insn is needed if it contains a CALL. */ | |
1729 | ||
1730 | static int | |
1731 | insn_dead_p (x, needed, call_ok) | |
1732 | rtx x; | |
1733 | regset needed; | |
1734 | int call_ok; | |
1735 | { | |
1736 | register RTX_CODE code = GET_CODE (x); | |
1737 | /* If setting something that's a reg or part of one, | |
1738 | see if that register's altered value will be live. */ | |
1739 | ||
1740 | if (code == SET) | |
1741 | { | |
1742 | register rtx r = SET_DEST (x); | |
1743 | /* A SET that is a subroutine call cannot be dead. */ | |
1744 | if (! call_ok && GET_CODE (SET_SRC (x)) == CALL) | |
1745 | return 0; | |
1746 | ||
1747 | #ifdef HAVE_cc0 | |
1748 | if (GET_CODE (r) == CC0) | |
1749 | return ! cc0_live; | |
1750 | #endif | |
1751 | ||
1752 | if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r) | |
1753 | && rtx_equal_p (r, last_mem_set)) | |
1754 | return 1; | |
1755 | ||
1756 | while (GET_CODE (r) == SUBREG | |
1757 | || GET_CODE (r) == STRICT_LOW_PART | |
1758 | || GET_CODE (r) == ZERO_EXTRACT | |
1759 | || GET_CODE (r) == SIGN_EXTRACT) | |
1760 | r = SUBREG_REG (r); | |
1761 | ||
1762 | if (GET_CODE (r) == REG) | |
1763 | { | |
1764 | register int regno = REGNO (r); | |
1765 | register int offset = regno / REGSET_ELT_BITS; | |
5f4f0e22 CH |
1766 | register REGSET_ELT_TYPE bit |
1767 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
d7429b6a | 1768 | |
d8c8b8e3 | 1769 | /* Don't delete insns to set global regs. */ |
d7429b6a RK |
1770 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) |
1771 | /* Make sure insns to set frame pointer aren't deleted. */ | |
1772 | || regno == FRAME_POINTER_REGNUM | |
73a187c1 DE |
1773 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
1774 | || regno == HARD_FRAME_POINTER_REGNUM | |
1775 | #endif | |
d7e4fe8b RS |
1776 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
1777 | /* Make sure insns to set arg pointer are never deleted | |
1778 | (if the arg pointer isn't fixed, there will be a USE for | |
0f41302f | 1779 | it, so we can treat it normally). */ |
d7e4fe8b RS |
1780 | || (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) |
1781 | #endif | |
d7429b6a RK |
1782 | || (needed[offset] & bit) != 0) |
1783 | return 0; | |
1784 | ||
1785 | /* If this is a hard register, verify that subsequent words are | |
1786 | not needed. */ | |
1787 | if (regno < FIRST_PSEUDO_REGISTER) | |
1788 | { | |
1789 | int n = HARD_REGNO_NREGS (regno, GET_MODE (r)); | |
1790 | ||
1791 | while (--n > 0) | |
1792 | if ((needed[(regno + n) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
1793 | & ((REGSET_ELT_TYPE) 1 |
1794 | << ((regno + n) % REGSET_ELT_BITS))) != 0) | |
d7429b6a RK |
1795 | return 0; |
1796 | } | |
1797 | ||
1798 | return 1; | |
1799 | } | |
1800 | } | |
1801 | /* If performing several activities, | |
1802 | insn is dead if each activity is individually dead. | |
1803 | Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE | |
1804 | that's inside a PARALLEL doesn't make the insn worth keeping. */ | |
1805 | else if (code == PARALLEL) | |
1806 | { | |
1807 | register int i = XVECLEN (x, 0); | |
1808 | for (i--; i >= 0; i--) | |
1809 | { | |
1810 | rtx elt = XVECEXP (x, 0, i); | |
1811 | if (!insn_dead_p (elt, needed, call_ok) | |
1812 | && GET_CODE (elt) != CLOBBER | |
1813 | && GET_CODE (elt) != USE) | |
1814 | return 0; | |
1815 | } | |
1816 | return 1; | |
1817 | } | |
1818 | /* We do not check CLOBBER or USE here. | |
1819 | An insn consisting of just a CLOBBER or just a USE | |
1820 | should not be deleted. */ | |
1821 | return 0; | |
1822 | } | |
1823 | ||
1824 | /* If X is the pattern of the last insn in a libcall, and assuming X is dead, | |
1825 | return 1 if the entire library call is dead. | |
1826 | This is true if X copies a register (hard or pseudo) | |
1827 | and if the hard return reg of the call insn is dead. | |
1828 | (The caller should have tested the destination of X already for death.) | |
1829 | ||
1830 | If this insn doesn't just copy a register, then we don't | |
1831 | have an ordinary libcall. In that case, cse could not have | |
1832 | managed to substitute the source for the dest later on, | |
1833 | so we can assume the libcall is dead. | |
1834 | ||
1835 | NEEDED is the bit vector of pseudoregs live before this insn. | |
1836 | NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */ | |
1837 | ||
1838 | static int | |
1839 | libcall_dead_p (x, needed, note, insn) | |
1840 | rtx x; | |
1841 | regset needed; | |
1842 | rtx note; | |
1843 | rtx insn; | |
1844 | { | |
1845 | register RTX_CODE code = GET_CODE (x); | |
1846 | ||
1847 | if (code == SET) | |
1848 | { | |
1849 | register rtx r = SET_SRC (x); | |
1850 | if (GET_CODE (r) == REG) | |
1851 | { | |
1852 | rtx call = XEXP (note, 0); | |
1853 | register int i; | |
1854 | ||
1855 | /* Find the call insn. */ | |
1856 | while (call != insn && GET_CODE (call) != CALL_INSN) | |
1857 | call = NEXT_INSN (call); | |
1858 | ||
1859 | /* If there is none, do nothing special, | |
1860 | since ordinary death handling can understand these insns. */ | |
1861 | if (call == insn) | |
1862 | return 0; | |
1863 | ||
1864 | /* See if the hard reg holding the value is dead. | |
1865 | If this is a PARALLEL, find the call within it. */ | |
1866 | call = PATTERN (call); | |
1867 | if (GET_CODE (call) == PARALLEL) | |
1868 | { | |
1869 | for (i = XVECLEN (call, 0) - 1; i >= 0; i--) | |
1870 | if (GET_CODE (XVECEXP (call, 0, i)) == SET | |
1871 | && GET_CODE (SET_SRC (XVECEXP (call, 0, i))) == CALL) | |
1872 | break; | |
1873 | ||
761a5bcd JW |
1874 | /* This may be a library call that is returning a value |
1875 | via invisible pointer. Do nothing special, since | |
1876 | ordinary death handling can understand these insns. */ | |
d7429b6a | 1877 | if (i < 0) |
761a5bcd | 1878 | return 0; |
d7429b6a RK |
1879 | |
1880 | call = XVECEXP (call, 0, i); | |
1881 | } | |
1882 | ||
1883 | return insn_dead_p (call, needed, 1); | |
1884 | } | |
1885 | } | |
1886 | return 1; | |
1887 | } | |
1888 | ||
1889 | /* Return 1 if register REGNO was used before it was set. | |
944e5f77 | 1890 | In other words, if it is live at function entry. |
abc95ed3 | 1891 | Don't count global register variables, though. */ |
d7429b6a RK |
1892 | |
1893 | int | |
1894 | regno_uninitialized (regno) | |
1895 | int regno; | |
1896 | { | |
b0b7b46a RS |
1897 | if (n_basic_blocks == 0 |
1898 | || (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])) | |
d7429b6a RK |
1899 | return 0; |
1900 | ||
1901 | return (basic_block_live_at_start[0][regno / REGSET_ELT_BITS] | |
5f4f0e22 | 1902 | & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))); |
d7429b6a RK |
1903 | } |
1904 | ||
1905 | /* 1 if register REGNO was alive at a place where `setjmp' was called | |
1906 | and was set more than once or is an argument. | |
1907 | Such regs may be clobbered by `longjmp'. */ | |
1908 | ||
1909 | int | |
1910 | regno_clobbered_at_setjmp (regno) | |
1911 | int regno; | |
1912 | { | |
1913 | if (n_basic_blocks == 0) | |
1914 | return 0; | |
1915 | ||
1916 | return ((reg_n_sets[regno] > 1 | |
1917 | || (basic_block_live_at_start[0][regno / REGSET_ELT_BITS] | |
5f4f0e22 | 1918 | & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS)))) |
d7429b6a | 1919 | && (regs_live_at_setjmp[regno / REGSET_ELT_BITS] |
5f4f0e22 | 1920 | & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS)))); |
d7429b6a RK |
1921 | } |
1922 | \f | |
1923 | /* Process the registers that are set within X. | |
1924 | Their bits are set to 1 in the regset DEAD, | |
1925 | because they are dead prior to this insn. | |
1926 | ||
1927 | If INSN is nonzero, it is the insn being processed | |
1928 | and the fact that it is nonzero implies this is the FINAL pass | |
1929 | in propagate_block. In this case, various info about register | |
1930 | usage is stored, LOG_LINKS fields of insns are set up. */ | |
1931 | ||
d7429b6a RK |
1932 | static void |
1933 | mark_set_regs (needed, dead, x, insn, significant) | |
1934 | regset needed; | |
1935 | regset dead; | |
1936 | rtx x; | |
1937 | rtx insn; | |
1938 | regset significant; | |
1939 | { | |
1940 | register RTX_CODE code = GET_CODE (x); | |
1941 | ||
1942 | if (code == SET || code == CLOBBER) | |
1943 | mark_set_1 (needed, dead, x, insn, significant); | |
1944 | else if (code == PARALLEL) | |
1945 | { | |
1946 | register int i; | |
1947 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1948 | { | |
1949 | code = GET_CODE (XVECEXP (x, 0, i)); | |
1950 | if (code == SET || code == CLOBBER) | |
1951 | mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant); | |
1952 | } | |
1953 | } | |
1954 | } | |
1955 | ||
1956 | /* Process a single SET rtx, X. */ | |
1957 | ||
1958 | static void | |
1959 | mark_set_1 (needed, dead, x, insn, significant) | |
1960 | regset needed; | |
1961 | regset dead; | |
1962 | rtx x; | |
1963 | rtx insn; | |
1964 | regset significant; | |
1965 | { | |
1966 | register int regno; | |
1967 | register rtx reg = SET_DEST (x); | |
1968 | ||
1969 | /* Modifying just one hardware register of a multi-reg value | |
1970 | or just a byte field of a register | |
1971 | does not mean the value from before this insn is now dead. | |
1972 | But it does mean liveness of that register at the end of the block | |
1973 | is significant. | |
1974 | ||
1975 | Within mark_set_1, however, we treat it as if the register is | |
1976 | indeed modified. mark_used_regs will, however, also treat this | |
1977 | register as being used. Thus, we treat these insns as setting a | |
1978 | new value for the register as a function of its old value. This | |
1979 | cases LOG_LINKS to be made appropriately and this will help combine. */ | |
1980 | ||
1981 | while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT | |
1982 | || GET_CODE (reg) == SIGN_EXTRACT | |
1983 | || GET_CODE (reg) == STRICT_LOW_PART) | |
1984 | reg = XEXP (reg, 0); | |
1985 | ||
1986 | /* If we are writing into memory or into a register mentioned in the | |
1987 | address of the last thing stored into memory, show we don't know | |
1988 | what the last store was. If we are writing memory, save the address | |
1989 | unless it is volatile. */ | |
1990 | if (GET_CODE (reg) == MEM | |
1991 | || (GET_CODE (reg) == REG | |
1992 | && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set))) | |
1993 | last_mem_set = 0; | |
1994 | ||
1995 | if (GET_CODE (reg) == MEM && ! side_effects_p (reg) | |
1996 | /* There are no REG_INC notes for SP, so we can't assume we'll see | |
1997 | everything that invalidates it. To be safe, don't eliminate any | |
1998 | stores though SP; none of them should be redundant anyway. */ | |
1999 | && ! reg_mentioned_p (stack_pointer_rtx, reg)) | |
2000 | last_mem_set = reg; | |
2001 | ||
2002 | if (GET_CODE (reg) == REG | |
2003 | && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM) | |
73a187c1 DE |
2004 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
2005 | && regno != HARD_FRAME_POINTER_REGNUM | |
2006 | #endif | |
d7e4fe8b RS |
2007 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2008 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2009 | #endif | |
d7429b6a RK |
2010 | && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])) |
2011 | /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */ | |
2012 | { | |
2013 | register int offset = regno / REGSET_ELT_BITS; | |
5f4f0e22 CH |
2014 | register REGSET_ELT_TYPE bit |
2015 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
5f4f0e22 | 2016 | REGSET_ELT_TYPE some_needed = (needed[offset] & bit); |
cb9e8ad1 | 2017 | REGSET_ELT_TYPE some_not_needed = (~ needed[offset]) & bit; |
d7429b6a RK |
2018 | |
2019 | /* Mark it as a significant register for this basic block. */ | |
2020 | if (significant) | |
2021 | significant[offset] |= bit; | |
2022 | ||
2023 | /* Mark it as as dead before this insn. */ | |
2024 | dead[offset] |= bit; | |
2025 | ||
2026 | /* A hard reg in a wide mode may really be multiple registers. | |
2027 | If so, mark all of them just like the first. */ | |
2028 | if (regno < FIRST_PSEUDO_REGISTER) | |
2029 | { | |
2030 | int n; | |
2031 | ||
2032 | /* Nothing below is needed for the stack pointer; get out asap. | |
2033 | Eg, log links aren't needed, since combine won't use them. */ | |
2034 | if (regno == STACK_POINTER_REGNUM) | |
2035 | return; | |
2036 | ||
2037 | n = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
2038 | while (--n > 0) | |
2039 | { | |
cb9e8ad1 RK |
2040 | REGSET_ELT_TYPE n_bit |
2041 | = (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS); | |
2042 | ||
d7429b6a | 2043 | if (significant) |
cb9e8ad1 RK |
2044 | significant[(regno + n) / REGSET_ELT_BITS] |= n_bit; |
2045 | ||
2046 | dead[(regno + n) / REGSET_ELT_BITS] |= n_bit; | |
5f4f0e22 | 2047 | some_needed |
cb9e8ad1 RK |
2048 | |= (needed[(regno + n) / REGSET_ELT_BITS] & n_bit); |
2049 | some_not_needed | |
2050 | |= ((~ needed[(regno + n) / REGSET_ELT_BITS]) & n_bit); | |
d7429b6a RK |
2051 | } |
2052 | } | |
2053 | /* Additional data to record if this is the final pass. */ | |
2054 | if (insn) | |
2055 | { | |
2056 | register rtx y = reg_next_use[regno]; | |
2057 | register int blocknum = BLOCK_NUM (insn); | |
2058 | ||
2059 | /* If this is a hard reg, record this function uses the reg. */ | |
2060 | ||
2061 | if (regno < FIRST_PSEUDO_REGISTER) | |
2062 | { | |
2063 | register int i; | |
2064 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
2065 | ||
2066 | for (i = regno; i < endregno; i++) | |
2067 | { | |
93514916 JW |
2068 | /* The next use is no longer "next", since a store |
2069 | intervenes. */ | |
2070 | reg_next_use[i] = 0; | |
2071 | ||
d7429b6a RK |
2072 | regs_ever_live[i] = 1; |
2073 | reg_n_sets[i]++; | |
2074 | } | |
2075 | } | |
2076 | else | |
2077 | { | |
93514916 JW |
2078 | /* The next use is no longer "next", since a store |
2079 | intervenes. */ | |
2080 | reg_next_use[regno] = 0; | |
2081 | ||
d7429b6a RK |
2082 | /* Keep track of which basic blocks each reg appears in. */ |
2083 | ||
2084 | if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN) | |
2085 | reg_basic_block[regno] = blocknum; | |
2086 | else if (reg_basic_block[regno] != blocknum) | |
2087 | reg_basic_block[regno] = REG_BLOCK_GLOBAL; | |
2088 | ||
2089 | /* Count (weighted) references, stores, etc. This counts a | |
2090 | register twice if it is modified, but that is correct. */ | |
2091 | reg_n_sets[regno]++; | |
2092 | ||
2093 | reg_n_refs[regno] += loop_depth; | |
2094 | ||
2095 | /* The insns where a reg is live are normally counted | |
2096 | elsewhere, but we want the count to include the insn | |
2097 | where the reg is set, and the normal counting mechanism | |
2098 | would not count it. */ | |
2099 | reg_live_length[regno]++; | |
2100 | } | |
2101 | ||
cb9e8ad1 | 2102 | if (! some_not_needed) |
d7429b6a RK |
2103 | { |
2104 | /* Make a logical link from the next following insn | |
2105 | that uses this register, back to this insn. | |
2106 | The following insns have already been processed. | |
2107 | ||
2108 | We don't build a LOG_LINK for hard registers containing | |
2109 | in ASM_OPERANDs. If these registers get replaced, | |
2110 | we might wind up changing the semantics of the insn, | |
2111 | even if reload can make what appear to be valid assignments | |
2112 | later. */ | |
2113 | if (y && (BLOCK_NUM (y) == blocknum) | |
2114 | && (regno >= FIRST_PSEUDO_REGISTER | |
2115 | || asm_noperands (PATTERN (y)) < 0)) | |
2116 | LOG_LINKS (y) | |
2117 | = gen_rtx (INSN_LIST, VOIDmode, insn, LOG_LINKS (y)); | |
2118 | } | |
2119 | else if (! some_needed) | |
2120 | { | |
2121 | /* Note that dead stores have already been deleted when possible | |
2122 | If we get here, we have found a dead store that cannot | |
2123 | be eliminated (because the same insn does something useful). | |
2124 | Indicate this by marking the reg being set as dying here. */ | |
2125 | REG_NOTES (insn) | |
2126 | = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn)); | |
2127 | reg_n_deaths[REGNO (reg)]++; | |
2128 | } | |
2129 | else | |
2130 | { | |
2131 | /* This is a case where we have a multi-word hard register | |
2132 | and some, but not all, of the words of the register are | |
2133 | needed in subsequent insns. Write REG_UNUSED notes | |
2134 | for those parts that were not needed. This case should | |
2135 | be rare. */ | |
2136 | ||
2137 | int i; | |
2138 | ||
2139 | for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1; | |
2140 | i >= 0; i--) | |
2141 | if ((needed[(regno + i) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
2142 | & ((REGSET_ELT_TYPE) 1 |
2143 | << ((regno + i) % REGSET_ELT_BITS))) == 0) | |
d7429b6a RK |
2144 | REG_NOTES (insn) |
2145 | = gen_rtx (EXPR_LIST, REG_UNUSED, | |
04227afa DE |
2146 | gen_rtx (REG, reg_raw_mode[regno + i], |
2147 | regno + i), | |
d7429b6a RK |
2148 | REG_NOTES (insn)); |
2149 | } | |
2150 | } | |
2151 | } | |
8244fc4f RS |
2152 | else if (GET_CODE (reg) == REG) |
2153 | reg_next_use[regno] = 0; | |
d7429b6a RK |
2154 | |
2155 | /* If this is the last pass and this is a SCRATCH, show it will be dying | |
2156 | here and count it. */ | |
2157 | else if (GET_CODE (reg) == SCRATCH && insn != 0) | |
2158 | { | |
2159 | REG_NOTES (insn) | |
2160 | = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn)); | |
2161 | num_scratch++; | |
2162 | } | |
2163 | } | |
2164 | \f | |
2165 | #ifdef AUTO_INC_DEC | |
2166 | ||
2167 | /* X is a MEM found in INSN. See if we can convert it into an auto-increment | |
2168 | reference. */ | |
2169 | ||
2170 | static void | |
2171 | find_auto_inc (needed, x, insn) | |
2172 | regset needed; | |
2173 | rtx x; | |
2174 | rtx insn; | |
2175 | { | |
2176 | rtx addr = XEXP (x, 0); | |
e658434c | 2177 | HOST_WIDE_INT offset = 0; |
05ed5d57 | 2178 | rtx set; |
d7429b6a RK |
2179 | |
2180 | /* Here we detect use of an index register which might be good for | |
2181 | postincrement, postdecrement, preincrement, or predecrement. */ | |
2182 | ||
2183 | if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
2184 | offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); | |
2185 | ||
2186 | if (GET_CODE (addr) == REG) | |
2187 | { | |
2188 | register rtx y; | |
2189 | register int size = GET_MODE_SIZE (GET_MODE (x)); | |
2190 | rtx use; | |
2191 | rtx incr; | |
2192 | int regno = REGNO (addr); | |
2193 | ||
2194 | /* Is the next use an increment that might make auto-increment? */ | |
05ed5d57 RK |
2195 | if ((incr = reg_next_use[regno]) != 0 |
2196 | && (set = single_set (incr)) != 0 | |
2197 | && GET_CODE (set) == SET | |
d7429b6a RK |
2198 | && BLOCK_NUM (incr) == BLOCK_NUM (insn) |
2199 | /* Can't add side effects to jumps; if reg is spilled and | |
2200 | reloaded, there's no way to store back the altered value. */ | |
2201 | && GET_CODE (insn) != JUMP_INSN | |
05ed5d57 | 2202 | && (y = SET_SRC (set), GET_CODE (y) == PLUS) |
d7429b6a RK |
2203 | && XEXP (y, 0) == addr |
2204 | && GET_CODE (XEXP (y, 1)) == CONST_INT | |
2205 | && (0 | |
2206 | #ifdef HAVE_POST_INCREMENT | |
2207 | || (INTVAL (XEXP (y, 1)) == size && offset == 0) | |
2208 | #endif | |
2209 | #ifdef HAVE_POST_DECREMENT | |
2210 | || (INTVAL (XEXP (y, 1)) == - size && offset == 0) | |
2211 | #endif | |
2212 | #ifdef HAVE_PRE_INCREMENT | |
2213 | || (INTVAL (XEXP (y, 1)) == size && offset == size) | |
2214 | #endif | |
2215 | #ifdef HAVE_PRE_DECREMENT | |
2216 | || (INTVAL (XEXP (y, 1)) == - size && offset == - size) | |
2217 | #endif | |
2218 | ) | |
2219 | /* Make sure this reg appears only once in this insn. */ | |
2220 | && (use = find_use_as_address (PATTERN (insn), addr, offset), | |
2221 | use != 0 && use != (rtx) 1)) | |
2222 | { | |
05ed5d57 | 2223 | rtx q = SET_DEST (set); |
7280c2a4 RK |
2224 | enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size |
2225 | ? (offset ? PRE_INC : POST_INC) | |
2226 | : (offset ? PRE_DEC : POST_DEC)); | |
d7429b6a RK |
2227 | |
2228 | if (dead_or_set_p (incr, addr)) | |
7280c2a4 RK |
2229 | { |
2230 | /* This is the simple case. Try to make the auto-inc. If | |
2231 | we can't, we are done. Otherwise, we will do any | |
2232 | needed updates below. */ | |
2233 | if (! validate_change (insn, &XEXP (x, 0), | |
2234 | gen_rtx (inc_code, Pmode, addr), | |
2235 | 0)) | |
2236 | return; | |
2237 | } | |
5175ad37 DE |
2238 | else if (GET_CODE (q) == REG |
2239 | /* PREV_INSN used here to check the semi-open interval | |
2240 | [insn,incr). */ | |
b24884cd JL |
2241 | && ! reg_used_between_p (q, PREV_INSN (insn), incr) |
2242 | /* We must also check for sets of q as q may be | |
2243 | a call clobbered hard register and there may | |
2244 | be a call between PREV_INSN (insn) and incr. */ | |
2245 | && ! reg_set_between_p (q, PREV_INSN (insn), incr)) | |
d7429b6a | 2246 | { |
5175ad37 | 2247 | /* We have *p followed sometime later by q = p+size. |
d7429b6a | 2248 | Both p and q must be live afterward, |
5175ad37 | 2249 | and q is not used between INSN and it's assignment. |
d7429b6a RK |
2250 | Change it to q = p, ...*q..., q = q+size. |
2251 | Then fall into the usual case. */ | |
2252 | rtx insns, temp; | |
2253 | ||
2254 | start_sequence (); | |
2255 | emit_move_insn (q, addr); | |
2256 | insns = get_insns (); | |
2257 | end_sequence (); | |
2258 | ||
2259 | /* If anything in INSNS have UID's that don't fit within the | |
2260 | extra space we allocate earlier, we can't make this auto-inc. | |
2261 | This should never happen. */ | |
2262 | for (temp = insns; temp; temp = NEXT_INSN (temp)) | |
2263 | { | |
2264 | if (INSN_UID (temp) > max_uid_for_flow) | |
2265 | return; | |
2266 | BLOCK_NUM (temp) = BLOCK_NUM (insn); | |
2267 | } | |
2268 | ||
7280c2a4 RK |
2269 | /* If we can't make the auto-inc, or can't make the |
2270 | replacement into Y, exit. There's no point in making | |
2271 | the change below if we can't do the auto-inc and doing | |
2272 | so is not correct in the pre-inc case. */ | |
2273 | ||
2274 | validate_change (insn, &XEXP (x, 0), | |
2275 | gen_rtx (inc_code, Pmode, q), | |
2276 | 1); | |
2277 | validate_change (incr, &XEXP (y, 0), q, 1); | |
2278 | if (! apply_change_group ()) | |
2279 | return; | |
2280 | ||
2281 | /* We now know we'll be doing this change, so emit the | |
2282 | new insn(s) and do the updates. */ | |
d7429b6a | 2283 | emit_insns_before (insns, insn); |
e8b641a1 RK |
2284 | |
2285 | if (basic_block_head[BLOCK_NUM (insn)] == insn) | |
2286 | basic_block_head[BLOCK_NUM (insn)] = insns; | |
2287 | ||
d7429b6a RK |
2288 | /* INCR will become a NOTE and INSN won't contain a |
2289 | use of ADDR. If a use of ADDR was just placed in | |
2290 | the insn before INSN, make that the next use. | |
2291 | Otherwise, invalidate it. */ | |
2292 | if (GET_CODE (PREV_INSN (insn)) == INSN | |
2293 | && GET_CODE (PATTERN (PREV_INSN (insn))) == SET | |
2294 | && SET_SRC (PATTERN (PREV_INSN (insn))) == addr) | |
2295 | reg_next_use[regno] = PREV_INSN (insn); | |
2296 | else | |
2297 | reg_next_use[regno] = 0; | |
2298 | ||
2299 | addr = q; | |
2300 | regno = REGNO (q); | |
d7429b6a RK |
2301 | |
2302 | /* REGNO is now used in INCR which is below INSN, but | |
2303 | it previously wasn't live here. If we don't mark | |
2304 | it as needed, we'll put a REG_DEAD note for it | |
2305 | on this insn, which is incorrect. */ | |
2306 | needed[regno / REGSET_ELT_BITS] | |
5f4f0e22 | 2307 | |= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); |
d7429b6a RK |
2308 | |
2309 | /* If there are any calls between INSN and INCR, show | |
2310 | that REGNO now crosses them. */ | |
2311 | for (temp = insn; temp != incr; temp = NEXT_INSN (temp)) | |
2312 | if (GET_CODE (temp) == CALL_INSN) | |
2313 | reg_n_calls_crossed[regno]++; | |
2314 | } | |
02df8aba RK |
2315 | else |
2316 | return; | |
d7429b6a | 2317 | |
7280c2a4 RK |
2318 | /* If we haven't returned, it means we were able to make the |
2319 | auto-inc, so update the status. First, record that this insn | |
2320 | has an implicit side effect. */ | |
2321 | ||
2322 | REG_NOTES (insn) | |
2323 | = gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn)); | |
2324 | ||
2325 | /* Modify the old increment-insn to simply copy | |
2326 | the already-incremented value of our register. */ | |
2327 | if (! validate_change (incr, &SET_SRC (set), addr, 0)) | |
2328 | abort (); | |
2329 | ||
2330 | /* If that makes it a no-op (copying the register into itself) delete | |
2331 | it so it won't appear to be a "use" and a "set" of this | |
2332 | register. */ | |
2333 | if (SET_DEST (set) == addr) | |
d7429b6a | 2334 | { |
7280c2a4 RK |
2335 | PUT_CODE (incr, NOTE); |
2336 | NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED; | |
2337 | NOTE_SOURCE_FILE (incr) = 0; | |
2338 | } | |
d7429b6a | 2339 | |
7280c2a4 RK |
2340 | if (regno >= FIRST_PSEUDO_REGISTER) |
2341 | { | |
2342 | /* Count an extra reference to the reg. When a reg is | |
2343 | incremented, spilling it is worse, so we want to make | |
2344 | that less likely. */ | |
2345 | reg_n_refs[regno] += loop_depth; | |
2346 | ||
2347 | /* Count the increment as a setting of the register, | |
2348 | even though it isn't a SET in rtl. */ | |
2349 | reg_n_sets[regno]++; | |
d7429b6a RK |
2350 | } |
2351 | } | |
2352 | } | |
2353 | } | |
2354 | #endif /* AUTO_INC_DEC */ | |
2355 | \f | |
2356 | /* Scan expression X and store a 1-bit in LIVE for each reg it uses. | |
2357 | This is done assuming the registers needed from X | |
2358 | are those that have 1-bits in NEEDED. | |
2359 | ||
2360 | On the final pass, FINAL is 1. This means try for autoincrement | |
2361 | and count the uses and deaths of each pseudo-reg. | |
2362 | ||
2363 | INSN is the containing instruction. If INSN is dead, this function is not | |
2364 | called. */ | |
2365 | ||
2366 | static void | |
2367 | mark_used_regs (needed, live, x, final, insn) | |
2368 | regset needed; | |
2369 | regset live; | |
2370 | rtx x; | |
d7429b6a | 2371 | int final; |
e658434c | 2372 | rtx insn; |
d7429b6a RK |
2373 | { |
2374 | register RTX_CODE code; | |
2375 | register int regno; | |
2376 | int i; | |
2377 | ||
2378 | retry: | |
2379 | code = GET_CODE (x); | |
2380 | switch (code) | |
2381 | { | |
2382 | case LABEL_REF: | |
2383 | case SYMBOL_REF: | |
2384 | case CONST_INT: | |
2385 | case CONST: | |
2386 | case CONST_DOUBLE: | |
2387 | case PC: | |
d7429b6a RK |
2388 | case ADDR_VEC: |
2389 | case ADDR_DIFF_VEC: | |
2390 | case ASM_INPUT: | |
2391 | return; | |
2392 | ||
2393 | #ifdef HAVE_cc0 | |
2394 | case CC0: | |
2395 | cc0_live = 1; | |
2396 | return; | |
2397 | #endif | |
2398 | ||
2f1553a4 RK |
2399 | case CLOBBER: |
2400 | /* If we are clobbering a MEM, mark any registers inside the address | |
2401 | as being used. */ | |
2402 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
2403 | mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn); | |
2404 | return; | |
2405 | ||
d7429b6a RK |
2406 | case MEM: |
2407 | /* Invalidate the data for the last MEM stored. We could do this only | |
2408 | if the addresses conflict, but this doesn't seem worthwhile. */ | |
2409 | last_mem_set = 0; | |
2410 | ||
2411 | #ifdef AUTO_INC_DEC | |
2412 | if (final) | |
2413 | find_auto_inc (needed, x, insn); | |
2414 | #endif | |
2415 | break; | |
2416 | ||
80f8f04a RK |
2417 | case SUBREG: |
2418 | if (GET_CODE (SUBREG_REG (x)) == REG | |
2419 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER | |
2420 | && (GET_MODE_SIZE (GET_MODE (x)) | |
88285acf | 2421 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) |
80f8f04a RK |
2422 | reg_changes_size[REGNO (SUBREG_REG (x))] = 1; |
2423 | ||
2424 | /* While we're here, optimize this case. */ | |
2425 | x = SUBREG_REG (x); | |
2426 | ||
e100a3bb | 2427 | /* In case the SUBREG is not of a register, don't optimize */ |
ce79abf3 | 2428 | if (GET_CODE (x) != REG) |
e100a3bb MM |
2429 | { |
2430 | mark_used_regs (needed, live, x, final, insn); | |
2431 | return; | |
2432 | } | |
ce79abf3 | 2433 | |
0f41302f | 2434 | /* ... fall through ... */ |
80f8f04a | 2435 | |
d7429b6a RK |
2436 | case REG: |
2437 | /* See a register other than being set | |
2438 | => mark it as needed. */ | |
2439 | ||
2440 | regno = REGNO (x); | |
2441 | { | |
2442 | register int offset = regno / REGSET_ELT_BITS; | |
5f4f0e22 CH |
2443 | register REGSET_ELT_TYPE bit |
2444 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
26300dcd | 2445 | REGSET_ELT_TYPE some_needed = needed[offset] & bit; |
cb9e8ad1 | 2446 | REGSET_ELT_TYPE some_not_needed = (~ needed[offset]) & bit; |
d7429b6a RK |
2447 | |
2448 | live[offset] |= bit; | |
cb9e8ad1 | 2449 | |
d7429b6a RK |
2450 | /* A hard reg in a wide mode may really be multiple registers. |
2451 | If so, mark all of them just like the first. */ | |
2452 | if (regno < FIRST_PSEUDO_REGISTER) | |
2453 | { | |
2454 | int n; | |
2455 | ||
d7e4fe8b | 2456 | /* For stack ptr or fixed arg pointer, |
d7429b6a RK |
2457 | nothing below can be necessary, so waste no more time. */ |
2458 | if (regno == STACK_POINTER_REGNUM | |
73a187c1 DE |
2459 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
2460 | || regno == HARD_FRAME_POINTER_REGNUM | |
2461 | #endif | |
d7e4fe8b RS |
2462 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2463 | || (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2464 | #endif | |
d7429b6a RK |
2465 | || regno == FRAME_POINTER_REGNUM) |
2466 | { | |
2467 | /* If this is a register we are going to try to eliminate, | |
2468 | don't mark it live here. If we are successful in | |
2469 | eliminating it, it need not be live unless it is used for | |
2470 | pseudos, in which case it will have been set live when | |
2471 | it was allocated to the pseudos. If the register will not | |
2472 | be eliminated, reload will set it live at that point. */ | |
2473 | ||
2474 | if (! TEST_HARD_REG_BIT (elim_reg_set, regno)) | |
2475 | regs_ever_live[regno] = 1; | |
2476 | return; | |
2477 | } | |
2478 | /* No death notes for global register variables; | |
2479 | their values are live after this function exits. */ | |
2480 | if (global_regs[regno]) | |
d8c8b8e3 RS |
2481 | { |
2482 | if (final) | |
2483 | reg_next_use[regno] = insn; | |
2484 | return; | |
2485 | } | |
d7429b6a RK |
2486 | |
2487 | n = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
2488 | while (--n > 0) | |
2489 | { | |
cb9e8ad1 RK |
2490 | REGSET_ELT_TYPE n_bit |
2491 | = (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS); | |
2492 | ||
2493 | live[(regno + n) / REGSET_ELT_BITS] |= n_bit; | |
2494 | some_needed |= (needed[(regno + n) / REGSET_ELT_BITS] & n_bit); | |
2495 | some_not_needed | |
2496 | |= ((~ needed[(regno + n) / REGSET_ELT_BITS]) & n_bit); | |
d7429b6a RK |
2497 | } |
2498 | } | |
2499 | if (final) | |
2500 | { | |
2501 | /* Record where each reg is used, so when the reg | |
2502 | is set we know the next insn that uses it. */ | |
2503 | ||
2504 | reg_next_use[regno] = insn; | |
2505 | ||
2506 | if (regno < FIRST_PSEUDO_REGISTER) | |
2507 | { | |
2508 | /* If a hard reg is being used, | |
2509 | record that this function does use it. */ | |
2510 | ||
2511 | i = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
2512 | if (i == 0) | |
2513 | i = 1; | |
2514 | do | |
2515 | regs_ever_live[regno + --i] = 1; | |
2516 | while (i > 0); | |
2517 | } | |
2518 | else | |
2519 | { | |
2520 | /* Keep track of which basic block each reg appears in. */ | |
2521 | ||
2522 | register int blocknum = BLOCK_NUM (insn); | |
2523 | ||
2524 | if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN) | |
2525 | reg_basic_block[regno] = blocknum; | |
2526 | else if (reg_basic_block[regno] != blocknum) | |
2527 | reg_basic_block[regno] = REG_BLOCK_GLOBAL; | |
2528 | ||
2529 | /* Count (weighted) number of uses of each reg. */ | |
2530 | ||
2531 | reg_n_refs[regno] += loop_depth; | |
2532 | } | |
2533 | ||
2534 | /* Record and count the insns in which a reg dies. | |
2535 | If it is used in this insn and was dead below the insn | |
2536 | then it dies in this insn. If it was set in this insn, | |
2537 | we do not make a REG_DEAD note; likewise if we already | |
2538 | made such a note. */ | |
2539 | ||
cb9e8ad1 | 2540 | if (some_not_needed |
d7429b6a RK |
2541 | && ! dead_or_set_p (insn, x) |
2542 | #if 0 | |
2543 | && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
2544 | #endif | |
2545 | ) | |
2546 | { | |
ab28041e JW |
2547 | /* Check for the case where the register dying partially |
2548 | overlaps the register set by this insn. */ | |
2549 | if (regno < FIRST_PSEUDO_REGISTER | |
2550 | && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1) | |
2551 | { | |
480eac3b | 2552 | int n = HARD_REGNO_NREGS (regno, GET_MODE (x)); |
ab28041e JW |
2553 | while (--n >= 0) |
2554 | some_needed |= dead_or_set_regno_p (insn, regno + n); | |
2555 | } | |
2556 | ||
d7429b6a RK |
2557 | /* If none of the words in X is needed, make a REG_DEAD |
2558 | note. Otherwise, we must make partial REG_DEAD notes. */ | |
2559 | if (! some_needed) | |
2560 | { | |
2561 | REG_NOTES (insn) | |
2562 | = gen_rtx (EXPR_LIST, REG_DEAD, x, REG_NOTES (insn)); | |
2563 | reg_n_deaths[regno]++; | |
2564 | } | |
2565 | else | |
2566 | { | |
2567 | int i; | |
2568 | ||
2569 | /* Don't make a REG_DEAD note for a part of a register | |
2570 | that is set in the insn. */ | |
2571 | ||
2572 | for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1; | |
2573 | i >= 0; i--) | |
2574 | if ((needed[(regno + i) / REGSET_ELT_BITS] | |
5f4f0e22 CH |
2575 | & ((REGSET_ELT_TYPE) 1 |
2576 | << ((regno + i) % REGSET_ELT_BITS))) == 0 | |
d7429b6a RK |
2577 | && ! dead_or_set_regno_p (insn, regno + i)) |
2578 | REG_NOTES (insn) | |
2579 | = gen_rtx (EXPR_LIST, REG_DEAD, | |
04227afa DE |
2580 | gen_rtx (REG, reg_raw_mode[regno + i], |
2581 | regno + i), | |
d7429b6a RK |
2582 | REG_NOTES (insn)); |
2583 | } | |
2584 | } | |
2585 | } | |
2586 | } | |
2587 | return; | |
2588 | ||
2589 | case SET: | |
2590 | { | |
2591 | register rtx testreg = SET_DEST (x); | |
2592 | int mark_dest = 0; | |
2593 | ||
2594 | /* If storing into MEM, don't show it as being used. But do | |
2595 | show the address as being used. */ | |
2596 | if (GET_CODE (testreg) == MEM) | |
2597 | { | |
2598 | #ifdef AUTO_INC_DEC | |
2599 | if (final) | |
2600 | find_auto_inc (needed, testreg, insn); | |
2601 | #endif | |
2602 | mark_used_regs (needed, live, XEXP (testreg, 0), final, insn); | |
2603 | mark_used_regs (needed, live, SET_SRC (x), final, insn); | |
2604 | return; | |
2605 | } | |
2606 | ||
2607 | /* Storing in STRICT_LOW_PART is like storing in a reg | |
2608 | in that this SET might be dead, so ignore it in TESTREG. | |
2609 | but in some other ways it is like using the reg. | |
2610 | ||
2611 | Storing in a SUBREG or a bit field is like storing the entire | |
2612 | register in that if the register's value is not used | |
2613 | then this SET is not needed. */ | |
2614 | while (GET_CODE (testreg) == STRICT_LOW_PART | |
2615 | || GET_CODE (testreg) == ZERO_EXTRACT | |
2616 | || GET_CODE (testreg) == SIGN_EXTRACT | |
2617 | || GET_CODE (testreg) == SUBREG) | |
2618 | { | |
88285acf RK |
2619 | if (GET_CODE (testreg) == SUBREG |
2620 | && GET_CODE (SUBREG_REG (testreg)) == REG | |
2621 | && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER | |
2622 | && (GET_MODE_SIZE (GET_MODE (testreg)) | |
2623 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg))))) | |
2624 | reg_changes_size[REGNO (SUBREG_REG (testreg))] = 1; | |
2625 | ||
d7429b6a RK |
2626 | /* Modifying a single register in an alternate mode |
2627 | does not use any of the old value. But these other | |
2628 | ways of storing in a register do use the old value. */ | |
2629 | if (GET_CODE (testreg) == SUBREG | |
2630 | && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg))) | |
2631 | ; | |
2632 | else | |
2633 | mark_dest = 1; | |
2634 | ||
2635 | testreg = XEXP (testreg, 0); | |
2636 | } | |
2637 | ||
2638 | /* If this is a store into a register, | |
2639 | recursively scan the value being stored. */ | |
2640 | ||
2641 | if (GET_CODE (testreg) == REG | |
2642 | && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM) | |
73a187c1 DE |
2643 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
2644 | && regno != HARD_FRAME_POINTER_REGNUM | |
2645 | #endif | |
d7e4fe8b RS |
2646 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2647 | && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2648 | #endif | |
d8c8b8e3 RS |
2649 | ) |
2650 | /* We used to exclude global_regs here, but that seems wrong. | |
2651 | Storing in them is like storing in mem. */ | |
d7429b6a RK |
2652 | { |
2653 | mark_used_regs (needed, live, SET_SRC (x), final, insn); | |
2654 | if (mark_dest) | |
2655 | mark_used_regs (needed, live, SET_DEST (x), final, insn); | |
2656 | return; | |
2657 | } | |
2658 | } | |
2659 | break; | |
2660 | ||
2661 | case RETURN: | |
2662 | /* If exiting needs the right stack value, consider this insn as | |
2663 | using the stack pointer. In any event, consider it as using | |
2664 | all global registers. */ | |
2665 | ||
2666 | #ifdef EXIT_IGNORE_STACK | |
2667 | if (! EXIT_IGNORE_STACK | |
2668 | || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer)) | |
2669 | #endif | |
2670 | live[STACK_POINTER_REGNUM / REGSET_ELT_BITS] | |
5f4f0e22 | 2671 | |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS); |
d7429b6a RK |
2672 | |
2673 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
2674 | if (global_regs[i]) | |
5f4f0e22 CH |
2675 | live[i / REGSET_ELT_BITS] |
2676 | |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS); | |
d7429b6a RK |
2677 | break; |
2678 | } | |
2679 | ||
2680 | /* Recursively scan the operands of this expression. */ | |
2681 | ||
2682 | { | |
2683 | register char *fmt = GET_RTX_FORMAT (code); | |
2684 | register int i; | |
2685 | ||
2686 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2687 | { | |
2688 | if (fmt[i] == 'e') | |
2689 | { | |
2690 | /* Tail recursive case: save a function call level. */ | |
2691 | if (i == 0) | |
2692 | { | |
2693 | x = XEXP (x, 0); | |
2694 | goto retry; | |
2695 | } | |
2696 | mark_used_regs (needed, live, XEXP (x, i), final, insn); | |
2697 | } | |
2698 | else if (fmt[i] == 'E') | |
2699 | { | |
2700 | register int j; | |
2701 | for (j = 0; j < XVECLEN (x, i); j++) | |
2702 | mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn); | |
2703 | } | |
2704 | } | |
2705 | } | |
2706 | } | |
2707 | \f | |
2708 | #ifdef AUTO_INC_DEC | |
2709 | ||
2710 | static int | |
2711 | try_pre_increment_1 (insn) | |
2712 | rtx insn; | |
2713 | { | |
2714 | /* Find the next use of this reg. If in same basic block, | |
2715 | make it do pre-increment or pre-decrement if appropriate. */ | |
2716 | rtx x = PATTERN (insn); | |
5f4f0e22 | 2717 | HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1) |
d7429b6a RK |
2718 | * INTVAL (XEXP (SET_SRC (x), 1))); |
2719 | int regno = REGNO (SET_DEST (x)); | |
2720 | rtx y = reg_next_use[regno]; | |
2721 | if (y != 0 | |
2722 | && BLOCK_NUM (y) == BLOCK_NUM (insn) | |
89861c38 | 2723 | /* Don't do this if the reg dies, or gets set in y; a standard addressing |
0f41302f | 2724 | mode would be better. */ |
89861c38 | 2725 | && ! dead_or_set_p (y, SET_DEST (x)) |
d7429b6a RK |
2726 | && try_pre_increment (y, SET_DEST (PATTERN (insn)), |
2727 | amount)) | |
2728 | { | |
2729 | /* We have found a suitable auto-increment | |
2730 | and already changed insn Y to do it. | |
2731 | So flush this increment-instruction. */ | |
2732 | PUT_CODE (insn, NOTE); | |
2733 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
2734 | NOTE_SOURCE_FILE (insn) = 0; | |
2735 | /* Count a reference to this reg for the increment | |
2736 | insn we are deleting. When a reg is incremented. | |
2737 | spilling it is worse, so we want to make that | |
2738 | less likely. */ | |
2739 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2740 | { | |
2741 | reg_n_refs[regno] += loop_depth; | |
2742 | reg_n_sets[regno]++; | |
2743 | } | |
2744 | return 1; | |
2745 | } | |
2746 | return 0; | |
2747 | } | |
2748 | ||
2749 | /* Try to change INSN so that it does pre-increment or pre-decrement | |
2750 | addressing on register REG in order to add AMOUNT to REG. | |
2751 | AMOUNT is negative for pre-decrement. | |
2752 | Returns 1 if the change could be made. | |
2753 | This checks all about the validity of the result of modifying INSN. */ | |
2754 | ||
2755 | static int | |
2756 | try_pre_increment (insn, reg, amount) | |
2757 | rtx insn, reg; | |
5f4f0e22 | 2758 | HOST_WIDE_INT amount; |
d7429b6a RK |
2759 | { |
2760 | register rtx use; | |
2761 | ||
2762 | /* Nonzero if we can try to make a pre-increment or pre-decrement. | |
2763 | For example, addl $4,r1; movl (r1),... can become movl +(r1),... */ | |
2764 | int pre_ok = 0; | |
2765 | /* Nonzero if we can try to make a post-increment or post-decrement. | |
2766 | For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,... | |
2767 | It is possible for both PRE_OK and POST_OK to be nonzero if the machine | |
2768 | supports both pre-inc and post-inc, or both pre-dec and post-dec. */ | |
2769 | int post_ok = 0; | |
2770 | ||
2771 | /* Nonzero if the opportunity actually requires post-inc or post-dec. */ | |
2772 | int do_post = 0; | |
2773 | ||
2774 | /* From the sign of increment, see which possibilities are conceivable | |
2775 | on this target machine. */ | |
2776 | #ifdef HAVE_PRE_INCREMENT | |
2777 | if (amount > 0) | |
2778 | pre_ok = 1; | |
2779 | #endif | |
2780 | #ifdef HAVE_POST_INCREMENT | |
2781 | if (amount > 0) | |
2782 | post_ok = 1; | |
2783 | #endif | |
2784 | ||
2785 | #ifdef HAVE_PRE_DECREMENT | |
2786 | if (amount < 0) | |
2787 | pre_ok = 1; | |
2788 | #endif | |
2789 | #ifdef HAVE_POST_DECREMENT | |
2790 | if (amount < 0) | |
2791 | post_ok = 1; | |
2792 | #endif | |
2793 | ||
2794 | if (! (pre_ok || post_ok)) | |
2795 | return 0; | |
2796 | ||
2797 | /* It is not safe to add a side effect to a jump insn | |
2798 | because if the incremented register is spilled and must be reloaded | |
2799 | there would be no way to store the incremented value back in memory. */ | |
2800 | ||
2801 | if (GET_CODE (insn) == JUMP_INSN) | |
2802 | return 0; | |
2803 | ||
2804 | use = 0; | |
2805 | if (pre_ok) | |
2806 | use = find_use_as_address (PATTERN (insn), reg, 0); | |
2807 | if (post_ok && (use == 0 || use == (rtx) 1)) | |
2808 | { | |
2809 | use = find_use_as_address (PATTERN (insn), reg, -amount); | |
2810 | do_post = 1; | |
2811 | } | |
2812 | ||
2813 | if (use == 0 || use == (rtx) 1) | |
2814 | return 0; | |
2815 | ||
2816 | if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount)) | |
2817 | return 0; | |
2818 | ||
a0fbc3a9 SC |
2819 | /* See if this combination of instruction and addressing mode exists. */ |
2820 | if (! validate_change (insn, &XEXP (use, 0), | |
2821 | gen_rtx (amount > 0 | |
2822 | ? (do_post ? POST_INC : PRE_INC) | |
2823 | : (do_post ? POST_DEC : PRE_DEC), | |
2824 | Pmode, reg), 0)) | |
2825 | return 0; | |
d7429b6a RK |
2826 | |
2827 | /* Record that this insn now has an implicit side effect on X. */ | |
2828 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn)); | |
2829 | return 1; | |
2830 | } | |
2831 | ||
2832 | #endif /* AUTO_INC_DEC */ | |
2833 | \f | |
2834 | /* Find the place in the rtx X where REG is used as a memory address. | |
2835 | Return the MEM rtx that so uses it. | |
2836 | If PLUSCONST is nonzero, search instead for a memory address equivalent to | |
2837 | (plus REG (const_int PLUSCONST)). | |
2838 | ||
2839 | If such an address does not appear, return 0. | |
2840 | If REG appears more than once, or is used other than in such an address, | |
2841 | return (rtx)1. */ | |
2842 | ||
2843 | static rtx | |
2844 | find_use_as_address (x, reg, plusconst) | |
2845 | register rtx x; | |
2846 | rtx reg; | |
e658434c | 2847 | HOST_WIDE_INT plusconst; |
d7429b6a RK |
2848 | { |
2849 | enum rtx_code code = GET_CODE (x); | |
2850 | char *fmt = GET_RTX_FORMAT (code); | |
2851 | register int i; | |
2852 | register rtx value = 0; | |
2853 | register rtx tem; | |
2854 | ||
2855 | if (code == MEM && XEXP (x, 0) == reg && plusconst == 0) | |
2856 | return x; | |
2857 | ||
2858 | if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS | |
2859 | && XEXP (XEXP (x, 0), 0) == reg | |
2860 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
2861 | && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) | |
2862 | return x; | |
2863 | ||
2864 | if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) | |
2865 | { | |
2866 | /* If REG occurs inside a MEM used in a bit-field reference, | |
2867 | that is unacceptable. */ | |
2868 | if (find_use_as_address (XEXP (x, 0), reg, 0) != 0) | |
6fa5c106 | 2869 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2870 | } |
2871 | ||
2872 | if (x == reg) | |
6fa5c106 | 2873 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2874 | |
2875 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2876 | { | |
2877 | if (fmt[i] == 'e') | |
2878 | { | |
2879 | tem = find_use_as_address (XEXP (x, i), reg, plusconst); | |
2880 | if (value == 0) | |
2881 | value = tem; | |
2882 | else if (tem != 0) | |
6fa5c106 | 2883 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2884 | } |
2885 | if (fmt[i] == 'E') | |
2886 | { | |
2887 | register int j; | |
2888 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2889 | { | |
2890 | tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst); | |
2891 | if (value == 0) | |
2892 | value = tem; | |
2893 | else if (tem != 0) | |
6fa5c106 | 2894 | return (rtx) (HOST_WIDE_INT) 1; |
d7429b6a RK |
2895 | } |
2896 | } | |
2897 | } | |
2898 | ||
2899 | return value; | |
2900 | } | |
2901 | \f | |
2902 | /* Write information about registers and basic blocks into FILE. | |
2903 | This is part of making a debugging dump. */ | |
2904 | ||
2905 | void | |
2906 | dump_flow_info (file) | |
2907 | FILE *file; | |
2908 | { | |
2909 | register int i; | |
2910 | static char *reg_class_names[] = REG_CLASS_NAMES; | |
2911 | ||
2912 | fprintf (file, "%d registers.\n", max_regno); | |
2913 | ||
2914 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
2915 | if (reg_n_refs[i]) | |
2916 | { | |
e4600702 | 2917 | enum reg_class class, altclass; |
d7429b6a RK |
2918 | fprintf (file, "\nRegister %d used %d times across %d insns", |
2919 | i, reg_n_refs[i], reg_live_length[i]); | |
2920 | if (reg_basic_block[i] >= 0) | |
2921 | fprintf (file, " in block %d", reg_basic_block[i]); | |
2922 | if (reg_n_deaths[i] != 1) | |
2923 | fprintf (file, "; dies in %d places", reg_n_deaths[i]); | |
2924 | if (reg_n_calls_crossed[i] == 1) | |
2925 | fprintf (file, "; crosses 1 call"); | |
2926 | else if (reg_n_calls_crossed[i]) | |
2927 | fprintf (file, "; crosses %d calls", reg_n_calls_crossed[i]); | |
2928 | if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD) | |
2929 | fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i)); | |
2930 | class = reg_preferred_class (i); | |
e4600702 RK |
2931 | altclass = reg_alternate_class (i); |
2932 | if (class != GENERAL_REGS || altclass != ALL_REGS) | |
d7429b6a | 2933 | { |
e4600702 RK |
2934 | if (altclass == ALL_REGS || class == ALL_REGS) |
2935 | fprintf (file, "; pref %s", reg_class_names[(int) class]); | |
2936 | else if (altclass == NO_REGS) | |
d7429b6a RK |
2937 | fprintf (file, "; %s or none", reg_class_names[(int) class]); |
2938 | else | |
e4600702 RK |
2939 | fprintf (file, "; pref %s, else %s", |
2940 | reg_class_names[(int) class], | |
2941 | reg_class_names[(int) altclass]); | |
d7429b6a RK |
2942 | } |
2943 | if (REGNO_POINTER_FLAG (i)) | |
2944 | fprintf (file, "; pointer"); | |
2945 | fprintf (file, ".\n"); | |
2946 | } | |
2947 | fprintf (file, "\n%d basic blocks.\n", n_basic_blocks); | |
2948 | for (i = 0; i < n_basic_blocks; i++) | |
2949 | { | |
2950 | register rtx head, jump; | |
2951 | register int regno; | |
2952 | fprintf (file, "\nBasic block %d: first insn %d, last %d.\n", | |
2953 | i, | |
2954 | INSN_UID (basic_block_head[i]), | |
2955 | INSN_UID (basic_block_end[i])); | |
2956 | /* The control flow graph's storage is freed | |
2957 | now when flow_analysis returns. | |
2958 | Don't try to print it if it is gone. */ | |
2959 | if (basic_block_drops_in) | |
2960 | { | |
2961 | fprintf (file, "Reached from blocks: "); | |
2962 | head = basic_block_head[i]; | |
2963 | if (GET_CODE (head) == CODE_LABEL) | |
2964 | for (jump = LABEL_REFS (head); | |
2965 | jump != head; | |
2966 | jump = LABEL_NEXTREF (jump)) | |
2967 | { | |
2968 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
2969 | fprintf (file, " %d", from_block); | |
2970 | } | |
2971 | if (basic_block_drops_in[i]) | |
2972 | fprintf (file, " previous"); | |
2973 | } | |
2974 | fprintf (file, "\nRegisters live at start:"); | |
2975 | for (regno = 0; regno < max_regno; regno++) | |
2976 | { | |
2977 | register int offset = regno / REGSET_ELT_BITS; | |
efb07da7 RK |
2978 | register REGSET_ELT_TYPE bit |
2979 | = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS); | |
d7429b6a RK |
2980 | if (basic_block_live_at_start[i][offset] & bit) |
2981 | fprintf (file, " %d", regno); | |
2982 | } | |
2983 | fprintf (file, "\n"); | |
2984 | } | |
2985 | fprintf (file, "\n"); | |
2986 | } |