]> gcc.gnu.org Git - gcc.git/blame - gcc/flow.c
Edit to add a missing $(exeext) for CCCP.
[gcc.git] / gcc / flow.c
CommitLineData
d7429b6a 1/* Data flow analysis for GNU compiler.
88285acf 2 Copyright (C) 1987, 88, 92, 93, 94, 1995 Free Software Foundation, Inc.
d7429b6a
RK
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
a35311b0
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
d7429b6a
RK
20
21
22/* This file contains the data flow analysis pass of the compiler.
23 It computes data flow information
24 which tells combine_instructions which insns to consider combining
25 and controls register allocation.
26
27 Additional data flow information that is too bulky to record
28 is generated during the analysis, and is used at that time to
29 create autoincrement and autodecrement addressing.
30
31 The first step is dividing the function into basic blocks.
32 find_basic_blocks does this. Then life_analysis determines
33 where each register is live and where it is dead.
34
35 ** find_basic_blocks **
36
37 find_basic_blocks divides the current function's rtl
38 into basic blocks. It records the beginnings and ends of the
39 basic blocks in the vectors basic_block_head and basic_block_end,
40 and the number of blocks in n_basic_blocks.
41
42 find_basic_blocks also finds any unreachable loops
43 and deletes them.
44
45 ** life_analysis **
46
47 life_analysis is called immediately after find_basic_blocks.
48 It uses the basic block information to determine where each
49 hard or pseudo register is live.
50
51 ** live-register info **
52
53 The information about where each register is live is in two parts:
54 the REG_NOTES of insns, and the vector basic_block_live_at_start.
55
56 basic_block_live_at_start has an element for each basic block,
57 and the element is a bit-vector with a bit for each hard or pseudo
58 register. The bit is 1 if the register is live at the beginning
59 of the basic block.
60
61 Two types of elements can be added to an insn's REG_NOTES.
62 A REG_DEAD note is added to an insn's REG_NOTES for any register
63 that meets both of two conditions: The value in the register is not
64 needed in subsequent insns and the insn does not replace the value in
65 the register (in the case of multi-word hard registers, the value in
66 each register must be replaced by the insn to avoid a REG_DEAD note).
67
68 In the vast majority of cases, an object in a REG_DEAD note will be
69 used somewhere in the insn. The (rare) exception to this is if an
70 insn uses a multi-word hard register and only some of the registers are
71 needed in subsequent insns. In that case, REG_DEAD notes will be
72 provided for those hard registers that are not subsequently needed.
73 Partial REG_DEAD notes of this type do not occur when an insn sets
74 only some of the hard registers used in such a multi-word operand;
75 omitting REG_DEAD notes for objects stored in an insn is optional and
76 the desire to do so does not justify the complexity of the partial
77 REG_DEAD notes.
78
79 REG_UNUSED notes are added for each register that is set by the insn
80 but is unused subsequently (if every register set by the insn is unused
81 and the insn does not reference memory or have some other side-effect,
82 the insn is deleted instead). If only part of a multi-word hard
83 register is used in a subsequent insn, REG_UNUSED notes are made for
84 the parts that will not be used.
85
86 To determine which registers are live after any insn, one can
87 start from the beginning of the basic block and scan insns, noting
88 which registers are set by each insn and which die there.
89
90 ** Other actions of life_analysis **
91
92 life_analysis sets up the LOG_LINKS fields of insns because the
93 information needed to do so is readily available.
94
95 life_analysis deletes insns whose only effect is to store a value
96 that is never used.
97
98 life_analysis notices cases where a reference to a register as
99 a memory address can be combined with a preceding or following
100 incrementation or decrementation of the register. The separate
101 instruction to increment or decrement is deleted and the address
102 is changed to a POST_INC or similar rtx.
103
104 Each time an incrementing or decrementing address is created,
105 a REG_INC element is added to the insn's REG_NOTES list.
106
107 life_analysis fills in certain vectors containing information about
108 register usage: reg_n_refs, reg_n_deaths, reg_n_sets, reg_live_length,
109 reg_n_calls_crosses and reg_basic_block. */
110\f
111#include <stdio.h>
112#include "config.h"
113#include "rtl.h"
114#include "basic-block.h"
115#include "insn-config.h"
116#include "regs.h"
117#include "hard-reg-set.h"
118#include "flags.h"
119#include "output.h"
120
121#include "obstack.h"
122#define obstack_chunk_alloc xmalloc
123#define obstack_chunk_free free
124
d7429b6a
RK
125/* List of labels that must never be deleted. */
126extern rtx forced_labels;
127
128/* Get the basic block number of an insn.
129 This info should not be expected to remain available
130 after the end of life_analysis. */
131
132/* This is the limit of the allocated space in the following two arrays. */
133
134static int max_uid_for_flow;
135
136#define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)]
137
138/* This is where the BLOCK_NUM values are really stored.
139 This is set up by find_basic_blocks and used there and in life_analysis,
140 and then freed. */
141
6ac271be 142static int *uid_block_number;
d7429b6a
RK
143
144/* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
145
146#define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)]
147static char *uid_volatile;
148
149/* Number of basic blocks in the current function. */
150
151int n_basic_blocks;
152
153/* Maximum register number used in this function, plus one. */
154
155int max_regno;
156
157/* Maximum number of SCRATCH rtx's used in any basic block of this function. */
158
159int max_scratch;
160
161/* Number of SCRATCH rtx's in the current block. */
162
163static int num_scratch;
164
165/* Indexed by n, gives number of basic block that (REG n) is used in.
166 If the value is REG_BLOCK_GLOBAL (-2),
167 it means (REG n) is used in more than one basic block.
168 REG_BLOCK_UNKNOWN (-1) means it hasn't been seen yet so we don't know.
169 This information remains valid for the rest of the compilation
170 of the current function; it is used to control register allocation. */
171
6ac271be 172int *reg_basic_block;
d7429b6a
RK
173
174/* Indexed by n, gives number of times (REG n) is used or set, each
175 weighted by its loop-depth.
176 This information remains valid for the rest of the compilation
177 of the current function; it is used to control register allocation. */
178
179int *reg_n_refs;
180
9faa82d8 181/* Indexed by N; says whether a pseudo register N was ever used
80f8f04a
RK
182 within a SUBREG that changes the size of the reg. Some machines prohibit
183 such objects to be in certain (usually floating-point) registers. */
184
185char *reg_changes_size;
186
d7429b6a
RK
187/* Indexed by N, gives number of places register N dies.
188 This information remains valid for the rest of the compilation
189 of the current function; it is used to control register allocation. */
190
191short *reg_n_deaths;
192
193/* Indexed by N, gives 1 if that reg is live across any CALL_INSNs.
194 This information remains valid for the rest of the compilation
195 of the current function; it is used to control register allocation. */
196
197int *reg_n_calls_crossed;
198
199/* Total number of instructions at which (REG n) is live.
200 The larger this is, the less priority (REG n) gets for
201 allocation in a real register.
202 This information remains valid for the rest of the compilation
203 of the current function; it is used to control register allocation.
204
205 local-alloc.c may alter this number to change the priority.
206
207 Negative values are special.
208 -1 is used to mark a pseudo reg which has a constant or memory equivalent
209 and is used infrequently enough that it should not get a hard register.
210 -2 is used to mark a pseudo reg for a parameter, when a frame pointer
cfb2c0b1 211 is not required. global.c makes an allocno for this but does
d7429b6a
RK
212 not try to assign a hard register to it. */
213
214int *reg_live_length;
215
216/* Element N is the next insn that uses (hard or pseudo) register number N
217 within the current basic block; or zero, if there is no such insn.
218 This is valid only during the final backward scan in propagate_block. */
219
220static rtx *reg_next_use;
221
222/* Size of a regset for the current function,
223 in (1) bytes and (2) elements. */
224
225int regset_bytes;
226int regset_size;
227
228/* Element N is first insn in basic block N.
229 This info lasts until we finish compiling the function. */
230
231rtx *basic_block_head;
232
233/* Element N is last insn in basic block N.
234 This info lasts until we finish compiling the function. */
235
236rtx *basic_block_end;
237
238/* Element N is a regset describing the registers live
239 at the start of basic block N.
240 This info lasts until we finish compiling the function. */
241
242regset *basic_block_live_at_start;
243
244/* Regset of regs live when calls to `setjmp'-like functions happen. */
245
246regset regs_live_at_setjmp;
247
248/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
249 that have to go in the same hard reg.
250 The first two regs in the list are a pair, and the next two
251 are another pair, etc. */
252rtx regs_may_share;
253
254/* Element N is nonzero if control can drop into basic block N
255 from the preceding basic block. Freed after life_analysis. */
256
257static char *basic_block_drops_in;
258
259/* Element N is depth within loops of the last insn in basic block number N.
260 Freed after life_analysis. */
261
262static short *basic_block_loop_depth;
263
264/* Element N nonzero if basic block N can actually be reached.
265 Vector exists only during find_basic_blocks. */
266
267static char *block_live_static;
268
269/* Depth within loops of basic block being scanned for lifetime analysis,
270 plus one. This is the weight attached to references to registers. */
271
272static int loop_depth;
273
274/* During propagate_block, this is non-zero if the value of CC0 is live. */
275
276static int cc0_live;
277
278/* During propagate_block, this contains the last MEM stored into. It
279 is used to eliminate consecutive stores to the same location. */
280
281static rtx last_mem_set;
282
283/* Set of registers that may be eliminable. These are handled specially
284 in updating regs_ever_live. */
285
286static HARD_REG_SET elim_reg_set;
287
288/* Forward declarations */
e658434c
RK
289static void find_basic_blocks PROTO((rtx, rtx));
290static int uses_reg_or_mem PROTO((rtx));
291static void mark_label_ref PROTO((rtx, rtx, int));
292static void life_analysis PROTO((rtx, int));
293void allocate_for_life_analysis PROTO((void));
294static void init_regset_vector PROTO((regset *, regset, int, int));
295static void propagate_block PROTO((regset, rtx, rtx, int,
296 regset, int));
8329b5ec 297static rtx flow_delete_insn PROTO((rtx));
e658434c
RK
298static int insn_dead_p PROTO((rtx, regset, int));
299static int libcall_dead_p PROTO((rtx, regset, rtx, rtx));
300static void mark_set_regs PROTO((regset, regset, rtx,
301 rtx, regset));
302static void mark_set_1 PROTO((regset, regset, rtx,
303 rtx, regset));
304static void find_auto_inc PROTO((regset, rtx, rtx));
305static void mark_used_regs PROTO((regset, regset, rtx, int, rtx));
306static int try_pre_increment_1 PROTO((rtx));
307static int try_pre_increment PROTO((rtx, rtx, HOST_WIDE_INT));
308static rtx find_use_as_address PROTO((rtx, rtx, HOST_WIDE_INT));
309void dump_flow_info PROTO((FILE *));
d7429b6a
RK
310\f
311/* Find basic blocks of the current function and perform data flow analysis.
312 F is the first insn of the function and NREGS the number of register numbers
313 in use. */
314
315void
316flow_analysis (f, nregs, file)
317 rtx f;
318 int nregs;
319 FILE *file;
320{
321 register rtx insn;
322 register int i;
d7e4fe8b 323 rtx nonlocal_label_list = nonlocal_label_rtx_list ();
d7429b6a
RK
324
325#ifdef ELIMINABLE_REGS
326 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
327#endif
328
329 /* Record which registers will be eliminated. We use this in
330 mark_used_regs. */
331
332 CLEAR_HARD_REG_SET (elim_reg_set);
333
334#ifdef ELIMINABLE_REGS
335 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
336 SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from);
337#else
338 SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM);
339#endif
340
341 /* Count the basic blocks. Also find maximum insn uid value used. */
342
343 {
344 register RTX_CODE prev_code = JUMP_INSN;
345 register RTX_CODE code;
346
347 max_uid_for_flow = 0;
348
349 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
350 {
351 code = GET_CODE (insn);
352 if (INSN_UID (insn) > max_uid_for_flow)
353 max_uid_for_flow = INSN_UID (insn);
354 if (code == CODE_LABEL
d7e4fe8b
RS
355 || (GET_RTX_CLASS (code) == 'i'
356 && (prev_code == JUMP_INSN
357 || (prev_code == CALL_INSN
6b67ec08 358 && nonlocal_label_list != 0)
d7e4fe8b 359 || prev_code == BARRIER)))
d7429b6a 360 i++;
6b67ec08 361 if (code != NOTE)
d7429b6a
RK
362 prev_code = code;
363 }
364 }
365
366#ifdef AUTO_INC_DEC
367 /* Leave space for insns we make in some cases for auto-inc. These cases
368 are rare, so we don't need too much space. */
369 max_uid_for_flow += max_uid_for_flow / 10;
370#endif
371
372 /* Allocate some tables that last till end of compiling this function
373 and some needed only in find_basic_blocks and life_analysis. */
374
375 n_basic_blocks = i;
376 basic_block_head = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
377 basic_block_end = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
378 basic_block_drops_in = (char *) alloca (n_basic_blocks);
379 basic_block_loop_depth = (short *) alloca (n_basic_blocks * sizeof (short));
380 uid_block_number
6ac271be 381 = (int *) alloca ((max_uid_for_flow + 1) * sizeof (int));
d7429b6a
RK
382 uid_volatile = (char *) alloca (max_uid_for_flow + 1);
383 bzero (uid_volatile, max_uid_for_flow + 1);
384
d7e4fe8b 385 find_basic_blocks (f, nonlocal_label_list);
d7429b6a
RK
386 life_analysis (f, nregs);
387 if (file)
388 dump_flow_info (file);
389
390 basic_block_drops_in = 0;
391 uid_block_number = 0;
392 basic_block_loop_depth = 0;
393}
394\f
395/* Find all basic blocks of the function whose first insn is F.
396 Store the correct data in the tables that describe the basic blocks,
397 set up the chains of references for each CODE_LABEL, and
d7e4fe8b
RS
398 delete any entire basic blocks that cannot be reached.
399
400 NONLOCAL_LABEL_LIST is the same local variable from flow_analysis. */
d7429b6a
RK
401
402static void
d7e4fe8b
RS
403find_basic_blocks (f, nonlocal_label_list)
404 rtx f, nonlocal_label_list;
d7429b6a
RK
405{
406 register rtx insn;
407 register int i;
408 register char *block_live = (char *) alloca (n_basic_blocks);
409 register char *block_marked = (char *) alloca (n_basic_blocks);
410 /* List of label_refs to all labels whose addresses are taken
411 and used as data. */
8329b5ec 412 rtx label_value_list;
e658434c
RK
413 rtx x, note;
414 enum rtx_code prev_code, code;
8329b5ec 415 int depth, pass;
d7429b6a 416
8329b5ec
DE
417 pass = 1;
418 restart:
419
420 label_value_list = 0;
d7429b6a
RK
421 block_live_static = block_live;
422 bzero (block_live, n_basic_blocks);
423 bzero (block_marked, n_basic_blocks);
424
425 /* Initialize with just block 0 reachable and no blocks marked. */
426 if (n_basic_blocks > 0)
427 block_live[0] = 1;
428
e658434c
RK
429 /* Initialize the ref chain of each label to 0. Record where all the
430 blocks start and end and their depth in loops. For each insn, record
431 the block it is in. Also mark as reachable any blocks headed by labels
432 that must not be deleted. */
d7429b6a 433
e658434c
RK
434 for (insn = f, i = -1, prev_code = JUMP_INSN, depth = 1;
435 insn; insn = NEXT_INSN (insn))
436 {
437 code = GET_CODE (insn);
438 if (code == NOTE)
439 {
440 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
441 depth++;
442 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
443 depth--;
444 }
d7429b6a 445
e658434c
RK
446 /* A basic block starts at label, or after something that can jump. */
447 else if (code == CODE_LABEL
448 || (GET_RTX_CLASS (code) == 'i'
449 && (prev_code == JUMP_INSN
450 || (prev_code == CALL_INSN
6b67ec08 451 && nonlocal_label_list != 0)
e658434c
RK
452 || prev_code == BARRIER)))
453 {
454 basic_block_head[++i] = insn;
455 basic_block_end[i] = insn;
456 basic_block_loop_depth[i] = depth;
457
458 if (code == CODE_LABEL)
459 {
d7429b6a
RK
460 LABEL_REFS (insn) = insn;
461 /* Any label that cannot be deleted
462 is considered to start a reachable block. */
463 if (LABEL_PRESERVE_P (insn))
464 block_live[i] = 1;
465 }
e658434c 466 }
d7429b6a 467
e658434c
RK
468 else if (GET_RTX_CLASS (code) == 'i')
469 {
470 basic_block_end[i] = insn;
471 basic_block_loop_depth[i] = depth;
42fa3cfb 472 }
e658434c 473
42fa3cfb
JW
474 if (GET_RTX_CLASS (code) == 'i')
475 {
e658434c
RK
476 /* Make a list of all labels referred to other than by jumps. */
477 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
478 if (REG_NOTE_KIND (note) == REG_LABEL)
d7429b6a
RK
479 label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0),
480 label_value_list);
42fa3cfb 481 }
d7429b6a 482
e658434c 483 BLOCK_NUM (insn) = i;
d7e4fe8b 484
6b67ec08 485 if (code != NOTE)
e658434c
RK
486 prev_code = code;
487 }
488
2aec79e2
DE
489 /* During the second pass, `n_basic_blocks' is only an upper bound.
490 Only perform the sanity check for the first pass, and on the second
491 pass ensure `n_basic_blocks' is set to the correct value. */
492 if (pass == 1 && i + 1 != n_basic_blocks)
e658434c 493 abort ();
2aec79e2 494 n_basic_blocks = i + 1;
d7429b6a 495
37548fa3
RS
496 /* Don't delete the labels (in this function)
497 that are referenced by non-jump instructions. */
e658434c
RK
498
499 for (x = label_value_list; x; x = XEXP (x, 1))
500 if (! LABEL_REF_NONLOCAL_P (x))
501 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
502
503 for (x = forced_labels; x; x = XEXP (x, 1))
504 if (! LABEL_REF_NONLOCAL_P (x))
505 block_live[BLOCK_NUM (XEXP (x, 0))] = 1;
d7e4fe8b 506
d7429b6a
RK
507 /* Record which basic blocks control can drop in to. */
508
e658434c
RK
509 for (i = 0; i < n_basic_blocks; i++)
510 {
511 for (insn = PREV_INSN (basic_block_head[i]);
512 insn && GET_CODE (insn) == NOTE; insn = PREV_INSN (insn))
513 ;
514
515 basic_block_drops_in[i] = insn && GET_CODE (insn) != BARRIER;
516 }
d7429b6a
RK
517
518 /* Now find which basic blocks can actually be reached
519 and put all jump insns' LABEL_REFS onto the ref-chains
520 of their target labels. */
521
522 if (n_basic_blocks > 0)
523 {
524 int something_marked = 1;
8329b5ec 525 int deleted;
d7429b6a 526
e658434c
RK
527 /* Find all indirect jump insns and mark them as possibly jumping to all
528 the labels whose addresses are explicitly used. This is because,
529 when there are computed gotos, we can't tell which labels they jump
530 to, of all the possibilities.
531
532 Tablejumps and casesi insns are OK and we can recognize them by
533 a (use (label_ref)). */
d7429b6a
RK
534
535 for (insn = f; insn; insn = NEXT_INSN (insn))
e658434c 536 if (GET_CODE (insn) == JUMP_INSN)
d7429b6a 537 {
e658434c
RK
538 rtx pat = PATTERN (insn);
539 int computed_jump = 0;
540
541 if (GET_CODE (pat) == PARALLEL)
542 {
543 int len = XVECLEN (pat, 0);
544 int has_use_labelref = 0;
545
546 for (i = len - 1; i >= 0; i--)
547 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
548 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
549 == LABEL_REF))
550 has_use_labelref = 1;
551
552 if (! has_use_labelref)
553 for (i = len - 1; i >= 0; i--)
554 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
555 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
556 && uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
557 computed_jump = 1;
558 }
559 else if (GET_CODE (pat) == SET
560 && SET_DEST (pat) == pc_rtx
561 && uses_reg_or_mem (SET_SRC (pat)))
562 computed_jump = 1;
563
564 if (computed_jump)
565 {
566 for (x = label_value_list; x; x = XEXP (x, 1))
567 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
568 insn, 0);
569
570 for (x = forced_labels; x; x = XEXP (x, 1))
571 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
d7429b6a 572 insn, 0);
e658434c 573 }
d7429b6a
RK
574 }
575
d7e4fe8b
RS
576 /* Find all call insns and mark them as possibly jumping
577 to all the nonlocal goto handler labels. */
578
579 for (insn = f; insn; insn = NEXT_INSN (insn))
580 if (GET_CODE (insn) == CALL_INSN)
581 {
d7e4fe8b 582 for (x = nonlocal_label_list; x; x = XEXP (x, 1))
275c7080
JW
583 mark_label_ref (gen_rtx (LABEL_REF, VOIDmode, XEXP (x, 0)),
584 insn, 0);
e658434c 585
d7e4fe8b
RS
586 /* ??? This could be made smarter:
587 in some cases it's possible to tell that certain
588 calls will not do a nonlocal goto.
589
590 For example, if the nested functions that do the
591 nonlocal gotos do not have their addresses taken, then
592 only calls to those functions or to other nested
593 functions that use them could possibly do nonlocal
594 gotos. */
595 }
596
d7429b6a
RK
597 /* Pass over all blocks, marking each block that is reachable
598 and has not yet been marked.
599 Keep doing this until, in one pass, no blocks have been marked.
600 Then blocks_live and blocks_marked are identical and correct.
601 In addition, all jumps actually reachable have been marked. */
602
603 while (something_marked)
604 {
605 something_marked = 0;
606 for (i = 0; i < n_basic_blocks; i++)
607 if (block_live[i] && !block_marked[i])
608 {
609 block_marked[i] = 1;
610 something_marked = 1;
611 if (i + 1 < n_basic_blocks && basic_block_drops_in[i + 1])
612 block_live[i + 1] = 1;
613 insn = basic_block_end[i];
614 if (GET_CODE (insn) == JUMP_INSN)
615 mark_label_ref (PATTERN (insn), insn, 0);
616 }
617 }
618
af14ce9c
RK
619 /* ??? See if we have a "live" basic block that is not reachable.
620 This can happen if it is headed by a label that is preserved or
621 in one of the label lists, but no call or computed jump is in
622 the loop. It's not clear if we can delete the block or not,
623 but don't for now. However, we will mess up register status if
624 it remains unreachable, so add a fake reachability from the
625 previous block. */
626
627 for (i = 1; i < n_basic_blocks; i++)
628 if (block_live[i] && ! basic_block_drops_in[i]
629 && GET_CODE (basic_block_head[i]) == CODE_LABEL
630 && LABEL_REFS (basic_block_head[i]) == basic_block_head[i])
631 basic_block_drops_in[i] = 1;
632
d7429b6a
RK
633 /* Now delete the code for any basic blocks that can't be reached.
634 They can occur because jump_optimize does not recognize
635 unreachable loops as unreachable. */
636
8329b5ec 637 deleted = 0;
d7429b6a
RK
638 for (i = 0; i < n_basic_blocks; i++)
639 if (!block_live[i])
640 {
8329b5ec
DE
641 deleted++;
642
643 /* Delete the insns in a (non-live) block. We physically delete
644 every non-note insn except the start and end (so
645 basic_block_head/end needn't be updated), we turn the latter
646 into NOTE_INSN_DELETED notes.
647 We use to "delete" the insns by turning them into notes, but
648 we may be deleting lots of insns that subsequent passes would
649 otherwise have to process. Secondly, lots of deleted blocks in
650 a row can really slow down propagate_block since it will
651 otherwise process insn-turned-notes multiple times when it
652 looks for loop begin/end notes. */
653 if (basic_block_head[i] != basic_block_end[i])
654 {
49b6c81e
DE
655 /* It would be quicker to delete all of these with a single
656 unchaining, rather than one at a time, but we need to keep
657 the NOTE's. */
8329b5ec
DE
658 insn = NEXT_INSN (basic_block_head[i]);
659 while (insn != basic_block_end[i])
660 {
661 if (GET_CODE (insn) == BARRIER)
662 abort ();
663 else if (GET_CODE (insn) != NOTE)
664 insn = flow_delete_insn (insn);
665 else
666 insn = NEXT_INSN (insn);
667 }
668 }
d7429b6a 669 insn = basic_block_head[i];
8329b5ec 670 if (GET_CODE (insn) != NOTE)
d7429b6a 671 {
8329b5ec 672 /* Turn the head into a deleted insn note. */
d7429b6a
RK
673 if (GET_CODE (insn) == BARRIER)
674 abort ();
8329b5ec
DE
675 PUT_CODE (insn, NOTE);
676 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
677 NOTE_SOURCE_FILE (insn) = 0;
678 }
679 insn = basic_block_end[i];
680 if (GET_CODE (insn) != NOTE)
681 {
682 /* Turn the tail into a deleted insn note. */
683 if (GET_CODE (insn) == BARRIER)
684 abort ();
685 PUT_CODE (insn, NOTE);
686 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
687 NOTE_SOURCE_FILE (insn) = 0;
d7429b6a 688 }
8329b5ec
DE
689 /* BARRIERs are between basic blocks, not part of one.
690 Delete a BARRIER if the preceding jump is deleted.
691 We cannot alter a BARRIER into a NOTE
692 because it is too short; but we can really delete
693 it because it is not part of a basic block. */
694 if (NEXT_INSN (insn) != 0
695 && GET_CODE (NEXT_INSN (insn)) == BARRIER)
696 delete_insn (NEXT_INSN (insn));
697
d7429b6a
RK
698 /* Each time we delete some basic blocks,
699 see if there is a jump around them that is
700 being turned into a no-op. If so, delete it. */
701
702 if (block_live[i - 1])
703 {
704 register int j;
8329b5ec 705 for (j = i + 1; j < n_basic_blocks; j++)
d7429b6a
RK
706 if (block_live[j])
707 {
708 rtx label;
709 insn = basic_block_end[i - 1];
710 if (GET_CODE (insn) == JUMP_INSN
711 /* An unconditional jump is the only possibility
712 we must check for, since a conditional one
713 would make these blocks live. */
714 && simplejump_p (insn)
715 && (label = XEXP (SET_SRC (PATTERN (insn)), 0), 1)
716 && INSN_UID (label) != 0
717 && BLOCK_NUM (label) == j)
718 {
719 PUT_CODE (insn, NOTE);
720 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
721 NOTE_SOURCE_FILE (insn) = 0;
722 if (GET_CODE (NEXT_INSN (insn)) != BARRIER)
723 abort ();
724 delete_insn (NEXT_INSN (insn));
725 }
726 break;
727 }
728 }
729 }
8329b5ec 730
9faa82d8 731 /* There are pathological cases where one function calling hundreds of
8329b5ec
DE
732 nested inline functions can generate lots and lots of unreachable
733 blocks that jump can't delete. Since we don't use sparse matrices
734 a lot of memory will be needed to compile such functions.
735 Implementing sparse matrices is a fair bit of work and it is not
736 clear that they win more than they lose (we don't want to
737 unnecessarily slow down compilation of normal code). By making
9faa82d8 738 another pass for the pathological case, we can greatly speed up
8329b5ec
DE
739 their compilation without hurting normal code. This works because
740 all the insns in the unreachable blocks have either been deleted or
49b6c81e
DE
741 turned into notes.
742 Note that we're talking about reducing memory usage by 10's of
743 megabytes and reducing compilation time by several minutes. */
8329b5ec
DE
744 /* ??? The choice of when to make another pass is a bit arbitrary,
745 and was derived from empirical data. */
746 if (pass == 1
49b6c81e 747 && deleted > 200)
8329b5ec
DE
748 {
749 pass++;
750 n_basic_blocks -= deleted;
2aec79e2
DE
751 /* `n_basic_blocks' may not be correct at this point: two previously
752 separate blocks may now be merged. That's ok though as we
753 recalculate it during the second pass. It certainly can't be
754 any larger than the current value. */
8329b5ec
DE
755 goto restart;
756 }
d7429b6a
RK
757 }
758}
759\f
8329b5ec
DE
760/* Subroutines of find_basic_blocks. */
761
e658434c
RK
762/* Return 1 if X contain a REG or MEM that is not in the constant pool. */
763
764static int
765uses_reg_or_mem (x)
766 rtx x;
767{
768 enum rtx_code code = GET_CODE (x);
769 int i, j;
770 char *fmt;
771
772 if (code == REG
773 || (code == MEM
774 && ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
775 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))))
776 return 1;
777
778 fmt = GET_RTX_FORMAT (code);
779 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
780 {
781 if (fmt[i] == 'e'
782 && uses_reg_or_mem (XEXP (x, i)))
783 return 1;
784
785 if (fmt[i] == 'E')
786 for (j = 0; j < XVECLEN (x, i); j++)
787 if (uses_reg_or_mem (XVECEXP (x, i, j)))
788 return 1;
789 }
790
791 return 0;
792}
8329b5ec 793
d7429b6a
RK
794/* Check expression X for label references;
795 if one is found, add INSN to the label's chain of references.
796
797 CHECKDUP means check for and avoid creating duplicate references
798 from the same insn. Such duplicates do no serious harm but
799 can slow life analysis. CHECKDUP is set only when duplicates
800 are likely. */
801
802static void
803mark_label_ref (x, insn, checkdup)
804 rtx x, insn;
805 int checkdup;
806{
807 register RTX_CODE code;
808 register int i;
809 register char *fmt;
810
811 /* We can be called with NULL when scanning label_value_list. */
812 if (x == 0)
813 return;
814
815 code = GET_CODE (x);
816 if (code == LABEL_REF)
817 {
818 register rtx label = XEXP (x, 0);
819 register rtx y;
820 if (GET_CODE (label) != CODE_LABEL)
821 abort ();
822 /* If the label was never emitted, this insn is junk,
823 but avoid a crash trying to refer to BLOCK_NUM (label).
824 This can happen as a result of a syntax error
825 and a diagnostic has already been printed. */
826 if (INSN_UID (label) == 0)
827 return;
828 CONTAINING_INSN (x) = insn;
829 /* if CHECKDUP is set, check for duplicate ref from same insn
830 and don't insert. */
831 if (checkdup)
832 for (y = LABEL_REFS (label); y != label; y = LABEL_NEXTREF (y))
833 if (CONTAINING_INSN (y) == insn)
834 return;
835 LABEL_NEXTREF (x) = LABEL_REFS (label);
836 LABEL_REFS (label) = x;
837 block_live_static[BLOCK_NUM (label)] = 1;
838 return;
839 }
840
841 fmt = GET_RTX_FORMAT (code);
842 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
843 {
844 if (fmt[i] == 'e')
845 mark_label_ref (XEXP (x, i), insn, 0);
846 if (fmt[i] == 'E')
847 {
848 register int j;
849 for (j = 0; j < XVECLEN (x, i); j++)
850 mark_label_ref (XVECEXP (x, i, j), insn, 1);
851 }
852 }
853}
8329b5ec
DE
854
855/* Delete INSN by patching it out.
856 Return the next insn. */
857
858static rtx
859flow_delete_insn (insn)
860 rtx insn;
861{
862 /* ??? For the moment we assume we don't have to watch for NULLs here
863 since the start/end of basic blocks aren't deleted like this. */
864 NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
865 PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
866 return NEXT_INSN (insn);
867}
d7429b6a
RK
868\f
869/* Determine which registers are live at the start of each
870 basic block of the function whose first insn is F.
871 NREGS is the number of registers used in F.
872 We allocate the vector basic_block_live_at_start
873 and the regsets that it points to, and fill them with the data.
874 regset_size and regset_bytes are also set here. */
875
876static void
877life_analysis (f, nregs)
878 rtx f;
879 int nregs;
880{
881 register regset tem;
882 int first_pass;
883 int changed;
884 /* For each basic block, a bitmask of regs
885 live on exit from the block. */
886 regset *basic_block_live_at_end;
887 /* For each basic block, a bitmask of regs
888 live on entry to a successor-block of this block.
889 If this does not match basic_block_live_at_end,
890 that must be updated, and the block must be rescanned. */
891 regset *basic_block_new_live_at_end;
892 /* For each basic block, a bitmask of regs
893 whose liveness at the end of the basic block
894 can make a difference in which regs are live on entry to the block.
895 These are the regs that are set within the basic block,
896 possibly excluding those that are used after they are set. */
897 regset *basic_block_significant;
898 register int i;
899 rtx insn;
900
901 struct obstack flow_obstack;
902
903 gcc_obstack_init (&flow_obstack);
904
905 max_regno = nregs;
906
907 bzero (regs_ever_live, sizeof regs_ever_live);
908
909 /* Allocate and zero out many data structures
910 that will record the data from lifetime analysis. */
911
912 allocate_for_life_analysis ();
913
914 reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
4c9a05bc 915 bzero ((char *) reg_next_use, nregs * sizeof (rtx));
d7429b6a
RK
916
917 /* Set up several regset-vectors used internally within this function.
918 Their meanings are documented above, with their declarations. */
919
4c9a05bc
RK
920 basic_block_live_at_end
921 = (regset *) alloca (n_basic_blocks * sizeof (regset));
922
d7429b6a
RK
923 /* Don't use alloca since that leads to a crash rather than an error message
924 if there isn't enough space.
925 Don't use oballoc since we may need to allocate other things during
926 this function on the temporary obstack. */
927 tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes);
4c9a05bc
RK
928 bzero ((char *) tem, n_basic_blocks * regset_bytes);
929 init_regset_vector (basic_block_live_at_end, tem,
930 n_basic_blocks, regset_bytes);
d7429b6a 931
4c9a05bc
RK
932 basic_block_new_live_at_end
933 = (regset *) alloca (n_basic_blocks * sizeof (regset));
d7429b6a 934 tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes);
4c9a05bc
RK
935 bzero ((char *) tem, n_basic_blocks * regset_bytes);
936 init_regset_vector (basic_block_new_live_at_end, tem,
937 n_basic_blocks, regset_bytes);
d7429b6a 938
4c9a05bc
RK
939 basic_block_significant
940 = (regset *) alloca (n_basic_blocks * sizeof (regset));
d7429b6a 941 tem = (regset) obstack_alloc (&flow_obstack, n_basic_blocks * regset_bytes);
4c9a05bc
RK
942 bzero ((char *) tem, n_basic_blocks * regset_bytes);
943 init_regset_vector (basic_block_significant, tem,
944 n_basic_blocks, regset_bytes);
d7429b6a
RK
945
946 /* Record which insns refer to any volatile memory
947 or for any reason can't be deleted just because they are dead stores.
948 Also, delete any insns that copy a register to itself. */
949
950 for (insn = f; insn; insn = NEXT_INSN (insn))
951 {
952 enum rtx_code code1 = GET_CODE (insn);
953 if (code1 == CALL_INSN)
954 INSN_VOLATILE (insn) = 1;
955 else if (code1 == INSN || code1 == JUMP_INSN)
956 {
957 /* Delete (in effect) any obvious no-op moves. */
958 if (GET_CODE (PATTERN (insn)) == SET
959 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
960 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
961 && REGNO (SET_DEST (PATTERN (insn))) ==
962 REGNO (SET_SRC (PATTERN (insn)))
963 /* Insns carrying these notes are useful later on. */
5f4f0e22 964 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
d7429b6a
RK
965 {
966 PUT_CODE (insn, NOTE);
967 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
968 NOTE_SOURCE_FILE (insn) = 0;
969 }
970 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
971 {
972 /* If nothing but SETs of registers to themselves,
973 this insn can also be deleted. */
974 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
975 {
976 rtx tem = XVECEXP (PATTERN (insn), 0, i);
977
978 if (GET_CODE (tem) == USE
979 || GET_CODE (tem) == CLOBBER)
980 continue;
981
982 if (GET_CODE (tem) != SET
983 || GET_CODE (SET_DEST (tem)) != REG
984 || GET_CODE (SET_SRC (tem)) != REG
985 || REGNO (SET_DEST (tem)) != REGNO (SET_SRC (tem)))
986 break;
987 }
988
989 if (i == XVECLEN (PATTERN (insn), 0)
990 /* Insns carrying these notes are useful later on. */
5f4f0e22 991 && ! find_reg_note (insn, REG_EQUAL, NULL_RTX))
d7429b6a
RK
992 {
993 PUT_CODE (insn, NOTE);
994 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
995 NOTE_SOURCE_FILE (insn) = 0;
996 }
997 else
998 INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
999 }
1000 else if (GET_CODE (PATTERN (insn)) != USE)
1001 INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
1002 /* A SET that makes space on the stack cannot be dead.
1003 (Such SETs occur only for allocating variable-size data,
1004 so they will always have a PLUS or MINUS according to the
1005 direction of stack growth.)
1006 Even if this function never uses this stack pointer value,
1007 signal handlers do! */
1008 else if (code1 == INSN && GET_CODE (PATTERN (insn)) == SET
1009 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1010#ifdef STACK_GROWS_DOWNWARD
1011 && GET_CODE (SET_SRC (PATTERN (insn))) == MINUS
1012#else
1013 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1014#endif
1015 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx)
1016 INSN_VOLATILE (insn) = 1;
1017 }
1018 }
1019
1020 if (n_basic_blocks > 0)
1021#ifdef EXIT_IGNORE_STACK
1022 if (! EXIT_IGNORE_STACK
1023 || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer))
1024#endif
1025 {
1026 /* If exiting needs the right stack value,
1027 consider the stack pointer live at the end of the function. */
1028 basic_block_live_at_end[n_basic_blocks - 1]
1029 [STACK_POINTER_REGNUM / REGSET_ELT_BITS]
efb07da7 1030 |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
d7429b6a
RK
1031 basic_block_new_live_at_end[n_basic_blocks - 1]
1032 [STACK_POINTER_REGNUM / REGSET_ELT_BITS]
efb07da7 1033 |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
d7429b6a
RK
1034 }
1035
fe0f9c4b
RK
1036 /* Mark the frame pointer is needed at the end of the function. If
1037 we end up eliminating it, it will be removed from the live list
1038 of each basic block by reload. */
1039
1040 if (n_basic_blocks > 0)
1041 {
1042 basic_block_live_at_end[n_basic_blocks - 1]
1043 [FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1044 |= (REGSET_ELT_TYPE) 1 << (FRAME_POINTER_REGNUM % REGSET_ELT_BITS);
1045 basic_block_new_live_at_end[n_basic_blocks - 1]
1046 [FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1047 |= (REGSET_ELT_TYPE) 1 << (FRAME_POINTER_REGNUM % REGSET_ELT_BITS);
73a187c1
DE
1048#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1049 /* If they are different, also mark the hard frame pointer as live */
1050 basic_block_live_at_end[n_basic_blocks - 1]
1051 [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1052 |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM
1053 % REGSET_ELT_BITS);
1054 basic_block_new_live_at_end[n_basic_blocks - 1]
1055 [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS]
1056 |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM
1057 % REGSET_ELT_BITS);
1058#endif
fe0f9c4b
RK
1059 }
1060
d7429b6a
RK
1061 /* Mark all global registers as being live at the end of the function
1062 since they may be referenced by our caller. */
1063
1064 if (n_basic_blocks > 0)
1065 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1066 if (global_regs[i])
1067 {
1068 basic_block_live_at_end[n_basic_blocks - 1]
efb07da7
RK
1069 [i / REGSET_ELT_BITS]
1070 |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
d7429b6a 1071 basic_block_new_live_at_end[n_basic_blocks - 1]
efb07da7
RK
1072 [i / REGSET_ELT_BITS]
1073 |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
d7429b6a
RK
1074 }
1075
1076 /* Propagate life info through the basic blocks
1077 around the graph of basic blocks.
1078
1079 This is a relaxation process: each time a new register
1080 is live at the end of the basic block, we must scan the block
1081 to determine which registers are, as a consequence, live at the beginning
1082 of that block. These registers must then be marked live at the ends
1083 of all the blocks that can transfer control to that block.
1084 The process continues until it reaches a fixed point. */
1085
1086 first_pass = 1;
1087 changed = 1;
1088 while (changed)
1089 {
1090 changed = 0;
1091 for (i = n_basic_blocks - 1; i >= 0; i--)
1092 {
1093 int consider = first_pass;
1094 int must_rescan = first_pass;
1095 register int j;
1096
1097 if (!first_pass)
1098 {
1099 /* Set CONSIDER if this block needs thinking about at all
1100 (that is, if the regs live now at the end of it
1101 are not the same as were live at the end of it when
1102 we last thought about it).
1103 Set must_rescan if it needs to be thought about
1104 instruction by instruction (that is, if any additional
1105 reg that is live at the end now but was not live there before
1106 is one of the significant regs of this basic block). */
1107
1108 for (j = 0; j < regset_size; j++)
1109 {
5f4f0e22
CH
1110 register REGSET_ELT_TYPE x
1111 = (basic_block_new_live_at_end[i][j]
1112 & ~basic_block_live_at_end[i][j]);
d7429b6a
RK
1113 if (x)
1114 consider = 1;
1115 if (x & basic_block_significant[i][j])
1116 {
1117 must_rescan = 1;
1118 consider = 1;
1119 break;
1120 }
1121 }
1122
1123 if (! consider)
1124 continue;
1125 }
1126
1127 /* The live_at_start of this block may be changing,
1128 so another pass will be required after this one. */
1129 changed = 1;
1130
1131 if (! must_rescan)
1132 {
1133 /* No complete rescan needed;
1134 just record those variables newly known live at end
1135 as live at start as well. */
1136 for (j = 0; j < regset_size; j++)
1137 {
5f4f0e22
CH
1138 register REGSET_ELT_TYPE x
1139 = (basic_block_new_live_at_end[i][j]
1140 & ~basic_block_live_at_end[i][j]);
d7429b6a
RK
1141 basic_block_live_at_start[i][j] |= x;
1142 basic_block_live_at_end[i][j] |= x;
1143 }
1144 }
1145 else
1146 {
1147 /* Update the basic_block_live_at_start
1148 by propagation backwards through the block. */
4c9a05bc
RK
1149 bcopy ((char *) basic_block_new_live_at_end[i],
1150 (char *) basic_block_live_at_end[i], regset_bytes);
1151 bcopy ((char *) basic_block_live_at_end[i],
1152 (char *) basic_block_live_at_start[i], regset_bytes);
d7429b6a
RK
1153 propagate_block (basic_block_live_at_start[i],
1154 basic_block_head[i], basic_block_end[i], 0,
5f4f0e22
CH
1155 first_pass ? basic_block_significant[i]
1156 : (regset) 0,
d7429b6a
RK
1157 i);
1158 }
1159
1160 {
1161 register rtx jump, head;
af14ce9c 1162
d7429b6a
RK
1163 /* Update the basic_block_new_live_at_end's of the block
1164 that falls through into this one (if any). */
1165 head = basic_block_head[i];
d7429b6a
RK
1166 if (basic_block_drops_in[i])
1167 {
d7429b6a
RK
1168 register int j;
1169 for (j = 0; j < regset_size; j++)
af14ce9c 1170 basic_block_new_live_at_end[i-1][j]
d7429b6a
RK
1171 |= basic_block_live_at_start[i][j];
1172 }
af14ce9c 1173
d7429b6a
RK
1174 /* Update the basic_block_new_live_at_end's of
1175 all the blocks that jump to this one. */
1176 if (GET_CODE (head) == CODE_LABEL)
1177 for (jump = LABEL_REFS (head);
1178 jump != head;
1179 jump = LABEL_NEXTREF (jump))
1180 {
1181 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
1182 register int j;
1183 for (j = 0; j < regset_size; j++)
1184 basic_block_new_live_at_end[from_block][j]
1185 |= basic_block_live_at_start[i][j];
1186 }
1187 }
1188#ifdef USE_C_ALLOCA
1189 alloca (0);
1190#endif
1191 }
1192 first_pass = 0;
1193 }
1194
1195 /* The only pseudos that are live at the beginning of the function are
1196 those that were not set anywhere in the function. local-alloc doesn't
1197 know how to handle these correctly, so mark them as not local to any
1198 one basic block. */
1199
1200 if (n_basic_blocks > 0)
1201 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1202 if (basic_block_live_at_start[0][i / REGSET_ELT_BITS]
5f4f0e22 1203 & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)))
d7429b6a
RK
1204 reg_basic_block[i] = REG_BLOCK_GLOBAL;
1205
1206 /* Now the life information is accurate.
1207 Make one more pass over each basic block
1208 to delete dead stores, create autoincrement addressing
1209 and record how many times each register is used, is set, or dies.
1210
1211 To save time, we operate directly in basic_block_live_at_end[i],
1212 thus destroying it (in fact, converting it into a copy of
1213 basic_block_live_at_start[i]). This is ok now because
1214 basic_block_live_at_end[i] is no longer used past this point. */
1215
1216 max_scratch = 0;
1217
1218 for (i = 0; i < n_basic_blocks; i++)
1219 {
1220 propagate_block (basic_block_live_at_end[i],
5f4f0e22
CH
1221 basic_block_head[i], basic_block_end[i], 1,
1222 (regset) 0, i);
d7429b6a
RK
1223#ifdef USE_C_ALLOCA
1224 alloca (0);
1225#endif
1226 }
1227
1228#if 0
1229 /* Something live during a setjmp should not be put in a register
1230 on certain machines which restore regs from stack frames
1231 rather than from the jmpbuf.
1232 But we don't need to do this for the user's variables, since
1233 ANSI says only volatile variables need this. */
1234#ifdef LONGJMP_RESTORE_FROM_STACK
1235 for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
5f4f0e22
CH
1236 if (regs_live_at_setjmp[i / REGSET_ELT_BITS]
1237 & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS))
d7429b6a
RK
1238 && regno_reg_rtx[i] != 0 && ! REG_USERVAR_P (regno_reg_rtx[i]))
1239 {
1240 reg_live_length[i] = -1;
1241 reg_basic_block[i] = -1;
1242 }
1243#endif
1244#endif
1245
1246 /* We have a problem with any pseudoreg that
1247 lives across the setjmp. ANSI says that if a
1248 user variable does not change in value
1249 between the setjmp and the longjmp, then the longjmp preserves it.
1250 This includes longjmp from a place where the pseudo appears dead.
1251 (In principle, the value still exists if it is in scope.)
1252 If the pseudo goes in a hard reg, some other value may occupy
1253 that hard reg where this pseudo is dead, thus clobbering the pseudo.
1254 Conclusion: such a pseudo must not go in a hard reg. */
1255 for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
5f4f0e22
CH
1256 if ((regs_live_at_setjmp[i / REGSET_ELT_BITS]
1257 & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)))
d7429b6a
RK
1258 && regno_reg_rtx[i] != 0)
1259 {
1260 reg_live_length[i] = -1;
1261 reg_basic_block[i] = -1;
1262 }
1263
5f4f0e22 1264 obstack_free (&flow_obstack, NULL_PTR);
d7429b6a
RK
1265}
1266\f
1267/* Subroutines of life analysis. */
1268
1269/* Allocate the permanent data structures that represent the results
1270 of life analysis. Not static since used also for stupid life analysis. */
1271
1272void
1273allocate_for_life_analysis ()
1274{
1275 register int i;
1276 register regset tem;
1277
1278 regset_size = ((max_regno + REGSET_ELT_BITS - 1) / REGSET_ELT_BITS);
1279 regset_bytes = regset_size * sizeof (*(regset)0);
1280
1281 reg_n_refs = (int *) oballoc (max_regno * sizeof (int));
4c9a05bc 1282 bzero ((char *) reg_n_refs, max_regno * sizeof (int));
d7429b6a
RK
1283
1284 reg_n_sets = (short *) oballoc (max_regno * sizeof (short));
4c9a05bc 1285 bzero ((char *) reg_n_sets, max_regno * sizeof (short));
d7429b6a
RK
1286
1287 reg_n_deaths = (short *) oballoc (max_regno * sizeof (short));
4c9a05bc 1288 bzero ((char *) reg_n_deaths, max_regno * sizeof (short));
d7429b6a 1289
80f8f04a
RK
1290 reg_changes_size = (char *) oballoc (max_regno * sizeof (char));
1291 bzero (reg_changes_size, max_regno * sizeof (char));;
1292
d7429b6a 1293 reg_live_length = (int *) oballoc (max_regno * sizeof (int));
4c9a05bc 1294 bzero ((char *) reg_live_length, max_regno * sizeof (int));
d7429b6a
RK
1295
1296 reg_n_calls_crossed = (int *) oballoc (max_regno * sizeof (int));
4c9a05bc 1297 bzero ((char *) reg_n_calls_crossed, max_regno * sizeof (int));
d7429b6a 1298
6ac271be 1299 reg_basic_block = (int *) oballoc (max_regno * sizeof (int));
d7429b6a
RK
1300 for (i = 0; i < max_regno; i++)
1301 reg_basic_block[i] = REG_BLOCK_UNKNOWN;
1302
4c9a05bc
RK
1303 basic_block_live_at_start
1304 = (regset *) oballoc (n_basic_blocks * sizeof (regset));
d7429b6a 1305 tem = (regset) oballoc (n_basic_blocks * regset_bytes);
4c9a05bc
RK
1306 bzero ((char *) tem, n_basic_blocks * regset_bytes);
1307 init_regset_vector (basic_block_live_at_start, tem,
1308 n_basic_blocks, regset_bytes);
d7429b6a
RK
1309
1310 regs_live_at_setjmp = (regset) oballoc (regset_bytes);
4c9a05bc 1311 bzero ((char *) regs_live_at_setjmp, regset_bytes);
d7429b6a
RK
1312}
1313
1314/* Make each element of VECTOR point at a regset,
1315 taking the space for all those regsets from SPACE.
1316 SPACE is of type regset, but it is really as long as NELTS regsets.
1317 BYTES_PER_ELT is the number of bytes in one regset. */
1318
1319static void
1320init_regset_vector (vector, space, nelts, bytes_per_elt)
1321 regset *vector;
1322 regset space;
1323 int nelts;
1324 int bytes_per_elt;
1325{
1326 register int i;
1327 register regset p = space;
1328
1329 for (i = 0; i < nelts; i++)
1330 {
1331 vector[i] = p;
1332 p += bytes_per_elt / sizeof (*p);
1333 }
1334}
e658434c 1335
d7429b6a
RK
1336/* Compute the registers live at the beginning of a basic block
1337 from those live at the end.
1338
1339 When called, OLD contains those live at the end.
1340 On return, it contains those live at the beginning.
1341 FIRST and LAST are the first and last insns of the basic block.
1342
1343 FINAL is nonzero if we are doing the final pass which is not
1344 for computing the life info (since that has already been done)
1345 but for acting on it. On this pass, we delete dead stores,
1346 set up the logical links and dead-variables lists of instructions,
1347 and merge instructions for autoincrement and autodecrement addresses.
1348
1349 SIGNIFICANT is nonzero only the first time for each basic block.
1350 If it is nonzero, it points to a regset in which we store
1351 a 1 for each register that is set within the block.
1352
1353 BNUM is the number of the basic block. */
1354
1355static void
1356propagate_block (old, first, last, final, significant, bnum)
1357 register regset old;
1358 rtx first;
1359 rtx last;
1360 int final;
1361 regset significant;
1362 int bnum;
1363{
1364 register rtx insn;
1365 rtx prev;
1366 regset live;
1367 regset dead;
1368
1369 /* The following variables are used only if FINAL is nonzero. */
1370 /* This vector gets one element for each reg that has been live
1371 at any point in the basic block that has been scanned so far.
1372 SOMETIMES_MAX says how many elements are in use so far.
1373 In each element, OFFSET is the byte-number within a regset
1374 for the register described by the element, and BIT is a mask
1375 for that register's bit within the byte. */
5a13dfdd 1376 register struct sometimes { short offset; short bit; } *regs_sometimes_live;
d7429b6a
RK
1377 int sometimes_max = 0;
1378 /* This regset has 1 for each reg that we have seen live so far.
1379 It and REGS_SOMETIMES_LIVE are updated together. */
1380 regset maxlive;
1381
1382 /* The loop depth may change in the middle of a basic block. Since we
1383 scan from end to beginning, we start with the depth at the end of the
1384 current basic block, and adjust as we pass ends and starts of loops. */
1385 loop_depth = basic_block_loop_depth[bnum];
1386
1387 dead = (regset) alloca (regset_bytes);
1388 live = (regset) alloca (regset_bytes);
1389
1390 cc0_live = 0;
1391 last_mem_set = 0;
1392
1393 /* Include any notes at the end of the block in the scan.
1394 This is in case the block ends with a call to setjmp. */
1395
1396 while (NEXT_INSN (last) != 0 && GET_CODE (NEXT_INSN (last)) == NOTE)
1397 {
1398 /* Look for loop boundaries, we are going forward here. */
1399 last = NEXT_INSN (last);
1400 if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_BEG)
1401 loop_depth++;
1402 else if (NOTE_LINE_NUMBER (last) == NOTE_INSN_LOOP_END)
1403 loop_depth--;
1404 }
1405
1406 if (final)
1407 {
5f4f0e22
CH
1408 register int i, offset;
1409 REGSET_ELT_TYPE bit;
d7429b6a
RK
1410
1411 num_scratch = 0;
1412 maxlive = (regset) alloca (regset_bytes);
4c9a05bc 1413 bcopy ((char *) old, (char *) maxlive, regset_bytes);
d7429b6a 1414 regs_sometimes_live
5a13dfdd 1415 = (struct sometimes *) alloca (max_regno * sizeof (struct sometimes));
d7429b6a
RK
1416
1417 /* Process the regs live at the end of the block.
1418 Enter them in MAXLIVE and REGS_SOMETIMES_LIVE.
1419 Also mark them as not local to any one basic block. */
1420
1421 for (offset = 0, i = 0; offset < regset_size; offset++)
1422 for (bit = 1; bit; bit <<= 1, i++)
1423 {
1424 if (i == max_regno)
1425 break;
1426 if (old[offset] & bit)
1427 {
1428 reg_basic_block[i] = REG_BLOCK_GLOBAL;
1429 regs_sometimes_live[sometimes_max].offset = offset;
1430 regs_sometimes_live[sometimes_max].bit = i % REGSET_ELT_BITS;
1431 sometimes_max++;
1432 }
1433 }
1434 }
1435
1436 /* Scan the block an insn at a time from end to beginning. */
1437
1438 for (insn = last; ; insn = prev)
1439 {
1440 prev = PREV_INSN (insn);
1441
8329b5ec 1442 if (GET_CODE (insn) == NOTE)
d7429b6a 1443 {
8329b5ec
DE
1444 /* Look for loop boundaries, remembering that we are going
1445 backwards. */
1446 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1447 loop_depth++;
1448 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1449 loop_depth--;
1450
1451 /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error.
1452 Abort now rather than setting register status incorrectly. */
1453 if (loop_depth == 0)
1454 abort ();
1455
1456 /* If this is a call to `setjmp' et al,
1457 warn if any non-volatile datum is live. */
1458
1459 if (final && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
1460 {
1461 int i;
1462 for (i = 0; i < regset_size; i++)
1463 regs_live_at_setjmp[i] |= old[i];
1464 }
d7429b6a
RK
1465 }
1466
1467 /* Update the life-status of regs for this insn.
1468 First DEAD gets which regs are set in this insn
1469 then LIVE gets which regs are used in this insn.
1470 Then the regs live before the insn
1471 are those live after, with DEAD regs turned off,
1472 and then LIVE regs turned on. */
1473
8329b5ec 1474 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
d7429b6a
RK
1475 {
1476 register int i;
5f4f0e22 1477 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
d7429b6a
RK
1478 int insn_is_dead
1479 = (insn_dead_p (PATTERN (insn), old, 0)
1480 /* Don't delete something that refers to volatile storage! */
1481 && ! INSN_VOLATILE (insn));
1482 int libcall_is_dead
1483 = (insn_is_dead && note != 0
1484 && libcall_dead_p (PATTERN (insn), old, note, insn));
1485
1486 /* If an instruction consists of just dead store(s) on final pass,
1487 "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
1488 We could really delete it with delete_insn, but that
1489 can cause trouble for first or last insn in a basic block. */
1490 if (final && insn_is_dead)
1491 {
1492 PUT_CODE (insn, NOTE);
1493 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1494 NOTE_SOURCE_FILE (insn) = 0;
1495
e5df1ea3
RK
1496 /* CC0 is now known to be dead. Either this insn used it,
1497 in which case it doesn't anymore, or clobbered it,
1498 so the next insn can't use it. */
1499 cc0_live = 0;
1500
d7429b6a
RK
1501 /* If this insn is copying the return value from a library call,
1502 delete the entire library call. */
1503 if (libcall_is_dead)
1504 {
1505 rtx first = XEXP (note, 0);
1506 rtx p = insn;
1507 while (INSN_DELETED_P (first))
1508 first = NEXT_INSN (first);
1509 while (p != first)
1510 {
1511 p = PREV_INSN (p);
1512 PUT_CODE (p, NOTE);
1513 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
1514 NOTE_SOURCE_FILE (p) = 0;
1515 }
1516 }
1517 goto flushed;
1518 }
1519
1520 for (i = 0; i < regset_size; i++)
1521 {
1522 dead[i] = 0; /* Faster than bzero here */
1523 live[i] = 0; /* since regset_size is usually small */
1524 }
1525
1526 /* See if this is an increment or decrement that can be
1527 merged into a following memory address. */
1528#ifdef AUTO_INC_DEC
1529 {
1530 register rtx x = PATTERN (insn);
1531 /* Does this instruction increment or decrement a register? */
1532 if (final && GET_CODE (x) == SET
1533 && GET_CODE (SET_DEST (x)) == REG
1534 && (GET_CODE (SET_SRC (x)) == PLUS
1535 || GET_CODE (SET_SRC (x)) == MINUS)
1536 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
1537 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1538 /* Ok, look for a following memory ref we can combine with.
1539 If one is found, change the memory ref to a PRE_INC
1540 or PRE_DEC, cancel this insn, and return 1.
1541 Return 0 if nothing has been done. */
1542 && try_pre_increment_1 (insn))
1543 goto flushed;
1544 }
1545#endif /* AUTO_INC_DEC */
1546
1547 /* If this is not the final pass, and this insn is copying the
1548 value of a library call and it's dead, don't scan the
1549 insns that perform the library call, so that the call's
1550 arguments are not marked live. */
1551 if (libcall_is_dead)
1552 {
1553 /* Mark the dest reg as `significant'. */
5f4f0e22 1554 mark_set_regs (old, dead, PATTERN (insn), NULL_RTX, significant);
d7429b6a
RK
1555
1556 insn = XEXP (note, 0);
1557 prev = PREV_INSN (insn);
1558 }
1559 else if (GET_CODE (PATTERN (insn)) == SET
1560 && SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1561 && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1562 && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
1563 && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
1564 /* We have an insn to pop a constant amount off the stack.
1565 (Such insns use PLUS regardless of the direction of the stack,
1566 and any insn to adjust the stack by a constant is always a pop.)
1567 These insns, if not dead stores, have no effect on life. */
1568 ;
1569 else
1570 {
1571 /* LIVE gets the regs used in INSN;
1572 DEAD gets those set by it. Dead insns don't make anything
1573 live. */
1574
5f4f0e22
CH
1575 mark_set_regs (old, dead, PATTERN (insn),
1576 final ? insn : NULL_RTX, significant);
d7429b6a
RK
1577
1578 /* If an insn doesn't use CC0, it becomes dead since we
1579 assume that every insn clobbers it. So show it dead here;
1580 mark_used_regs will set it live if it is referenced. */
1581 cc0_live = 0;
1582
1583 if (! insn_is_dead)
1584 mark_used_regs (old, live, PATTERN (insn), final, insn);
1585
1586 /* Sometimes we may have inserted something before INSN (such as
1587 a move) when we make an auto-inc. So ensure we will scan
1588 those insns. */
1589#ifdef AUTO_INC_DEC
1590 prev = PREV_INSN (insn);
1591#endif
1592
1593 if (! insn_is_dead && GET_CODE (insn) == CALL_INSN)
1594 {
1595 register int i;
1596
6b67ec08
RK
1597 rtx note;
1598
1599 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1600 note;
1601 note = XEXP (note, 1))
1602 if (GET_CODE (XEXP (note, 0)) == USE)
1603 mark_used_regs (old, live, SET_DEST (XEXP (note, 0)),
1604 final, insn);
1605
d7429b6a
RK
1606 /* Each call clobbers all call-clobbered regs that are not
1607 global. Note that the function-value reg is a
1608 call-clobbered reg, and mark_set_regs has already had
1609 a chance to handle it. */
1610
1611 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1612 if (call_used_regs[i] && ! global_regs[i])
1613 dead[i / REGSET_ELT_BITS]
5f4f0e22 1614 |= ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS));
d7429b6a
RK
1615
1616 /* The stack ptr is used (honorarily) by a CALL insn. */
1617 live[STACK_POINTER_REGNUM / REGSET_ELT_BITS]
5f4f0e22
CH
1618 |= ((REGSET_ELT_TYPE) 1
1619 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS));
d7429b6a
RK
1620
1621 /* Calls may also reference any of the global registers,
1622 so they are made live. */
d7429b6a
RK
1623 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1624 if (global_regs[i])
9b316aa2
RK
1625 mark_used_regs (old, live,
1626 gen_rtx (REG, reg_raw_mode[i], i),
1627 final, insn);
d7429b6a
RK
1628
1629 /* Calls also clobber memory. */
1630 last_mem_set = 0;
1631 }
1632
1633 /* Update OLD for the registers used or set. */
1634 for (i = 0; i < regset_size; i++)
1635 {
1636 old[i] &= ~dead[i];
1637 old[i] |= live[i];
1638 }
1639
1640 if (GET_CODE (insn) == CALL_INSN && final)
1641 {
1642 /* Any regs live at the time of a call instruction
1643 must not go in a register clobbered by calls.
1644 Find all regs now live and record this for them. */
1645
5a13dfdd 1646 register struct sometimes *p = regs_sometimes_live;
d7429b6a
RK
1647
1648 for (i = 0; i < sometimes_max; i++, p++)
efb07da7 1649 if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit))
d7429b6a
RK
1650 reg_n_calls_crossed[p->offset * REGSET_ELT_BITS + p->bit]+= 1;
1651 }
1652 }
1653
1654 /* On final pass, add any additional sometimes-live regs
1655 into MAXLIVE and REGS_SOMETIMES_LIVE.
1656 Also update counts of how many insns each reg is live at. */
1657
1658 if (final)
1659 {
1660 for (i = 0; i < regset_size; i++)
1661 {
5f4f0e22 1662 register REGSET_ELT_TYPE diff = live[i] & ~maxlive[i];
d7429b6a
RK
1663
1664 if (diff)
1665 {
1666 register int regno;
1667 maxlive[i] |= diff;
1668 for (regno = 0; diff && regno < REGSET_ELT_BITS; regno++)
5f4f0e22 1669 if (diff & ((REGSET_ELT_TYPE) 1 << regno))
d7429b6a
RK
1670 {
1671 regs_sometimes_live[sometimes_max].offset = i;
1672 regs_sometimes_live[sometimes_max].bit = regno;
5f4f0e22 1673 diff &= ~ ((REGSET_ELT_TYPE) 1 << regno);
d7429b6a
RK
1674 sometimes_max++;
1675 }
1676 }
1677 }
1678
1679 {
5a13dfdd 1680 register struct sometimes *p = regs_sometimes_live;
d7429b6a
RK
1681 for (i = 0; i < sometimes_max; i++, p++)
1682 {
5f4f0e22 1683 if (old[p->offset] & ((REGSET_ELT_TYPE) 1 << p->bit))
d7429b6a
RK
1684 reg_live_length[p->offset * REGSET_ELT_BITS + p->bit]++;
1685 }
1686 }
1687 }
1688 }
1689 flushed: ;
1690 if (insn == first)
1691 break;
1692 }
1693
1694 if (num_scratch > max_scratch)
1695 max_scratch = num_scratch;
1696}
1697\f
1698/* Return 1 if X (the body of an insn, or part of it) is just dead stores
1699 (SET expressions whose destinations are registers dead after the insn).
1700 NEEDED is the regset that says which regs are alive after the insn.
1701
1702 Unless CALL_OK is non-zero, an insn is needed if it contains a CALL. */
1703
1704static int
1705insn_dead_p (x, needed, call_ok)
1706 rtx x;
1707 regset needed;
1708 int call_ok;
1709{
1710 register RTX_CODE code = GET_CODE (x);
1711 /* If setting something that's a reg or part of one,
1712 see if that register's altered value will be live. */
1713
1714 if (code == SET)
1715 {
1716 register rtx r = SET_DEST (x);
1717 /* A SET that is a subroutine call cannot be dead. */
1718 if (! call_ok && GET_CODE (SET_SRC (x)) == CALL)
1719 return 0;
1720
1721#ifdef HAVE_cc0
1722 if (GET_CODE (r) == CC0)
1723 return ! cc0_live;
1724#endif
1725
1726 if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r)
1727 && rtx_equal_p (r, last_mem_set))
1728 return 1;
1729
1730 while (GET_CODE (r) == SUBREG
1731 || GET_CODE (r) == STRICT_LOW_PART
1732 || GET_CODE (r) == ZERO_EXTRACT
1733 || GET_CODE (r) == SIGN_EXTRACT)
1734 r = SUBREG_REG (r);
1735
1736 if (GET_CODE (r) == REG)
1737 {
1738 register int regno = REGNO (r);
1739 register int offset = regno / REGSET_ELT_BITS;
5f4f0e22
CH
1740 register REGSET_ELT_TYPE bit
1741 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
d7429b6a 1742
d8c8b8e3 1743 /* Don't delete insns to set global regs. */
d7429b6a
RK
1744 if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1745 /* Make sure insns to set frame pointer aren't deleted. */
1746 || regno == FRAME_POINTER_REGNUM
73a187c1
DE
1747#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1748 || regno == HARD_FRAME_POINTER_REGNUM
1749#endif
d7e4fe8b
RS
1750#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1751 /* Make sure insns to set arg pointer are never deleted
1752 (if the arg pointer isn't fixed, there will be a USE for
1753 it, so we can treat it normally). */
1754 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
1755#endif
d7429b6a
RK
1756 || (needed[offset] & bit) != 0)
1757 return 0;
1758
1759 /* If this is a hard register, verify that subsequent words are
1760 not needed. */
1761 if (regno < FIRST_PSEUDO_REGISTER)
1762 {
1763 int n = HARD_REGNO_NREGS (regno, GET_MODE (r));
1764
1765 while (--n > 0)
1766 if ((needed[(regno + n) / REGSET_ELT_BITS]
5f4f0e22
CH
1767 & ((REGSET_ELT_TYPE) 1
1768 << ((regno + n) % REGSET_ELT_BITS))) != 0)
d7429b6a
RK
1769 return 0;
1770 }
1771
1772 return 1;
1773 }
1774 }
1775 /* If performing several activities,
1776 insn is dead if each activity is individually dead.
1777 Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
1778 that's inside a PARALLEL doesn't make the insn worth keeping. */
1779 else if (code == PARALLEL)
1780 {
1781 register int i = XVECLEN (x, 0);
1782 for (i--; i >= 0; i--)
1783 {
1784 rtx elt = XVECEXP (x, 0, i);
1785 if (!insn_dead_p (elt, needed, call_ok)
1786 && GET_CODE (elt) != CLOBBER
1787 && GET_CODE (elt) != USE)
1788 return 0;
1789 }
1790 return 1;
1791 }
1792 /* We do not check CLOBBER or USE here.
1793 An insn consisting of just a CLOBBER or just a USE
1794 should not be deleted. */
1795 return 0;
1796}
1797
1798/* If X is the pattern of the last insn in a libcall, and assuming X is dead,
1799 return 1 if the entire library call is dead.
1800 This is true if X copies a register (hard or pseudo)
1801 and if the hard return reg of the call insn is dead.
1802 (The caller should have tested the destination of X already for death.)
1803
1804 If this insn doesn't just copy a register, then we don't
1805 have an ordinary libcall. In that case, cse could not have
1806 managed to substitute the source for the dest later on,
1807 so we can assume the libcall is dead.
1808
1809 NEEDED is the bit vector of pseudoregs live before this insn.
1810 NOTE is the REG_RETVAL note of the insn. INSN is the insn itself. */
1811
1812static int
1813libcall_dead_p (x, needed, note, insn)
1814 rtx x;
1815 regset needed;
1816 rtx note;
1817 rtx insn;
1818{
1819 register RTX_CODE code = GET_CODE (x);
1820
1821 if (code == SET)
1822 {
1823 register rtx r = SET_SRC (x);
1824 if (GET_CODE (r) == REG)
1825 {
1826 rtx call = XEXP (note, 0);
1827 register int i;
1828
1829 /* Find the call insn. */
1830 while (call != insn && GET_CODE (call) != CALL_INSN)
1831 call = NEXT_INSN (call);
1832
1833 /* If there is none, do nothing special,
1834 since ordinary death handling can understand these insns. */
1835 if (call == insn)
1836 return 0;
1837
1838 /* See if the hard reg holding the value is dead.
1839 If this is a PARALLEL, find the call within it. */
1840 call = PATTERN (call);
1841 if (GET_CODE (call) == PARALLEL)
1842 {
1843 for (i = XVECLEN (call, 0) - 1; i >= 0; i--)
1844 if (GET_CODE (XVECEXP (call, 0, i)) == SET
1845 && GET_CODE (SET_SRC (XVECEXP (call, 0, i))) == CALL)
1846 break;
1847
761a5bcd
JW
1848 /* This may be a library call that is returning a value
1849 via invisible pointer. Do nothing special, since
1850 ordinary death handling can understand these insns. */
d7429b6a 1851 if (i < 0)
761a5bcd 1852 return 0;
d7429b6a
RK
1853
1854 call = XVECEXP (call, 0, i);
1855 }
1856
1857 return insn_dead_p (call, needed, 1);
1858 }
1859 }
1860 return 1;
1861}
1862
1863/* Return 1 if register REGNO was used before it was set.
944e5f77
RS
1864 In other words, if it is live at function entry.
1865 Don't count global regster variables, though. */
d7429b6a
RK
1866
1867int
1868regno_uninitialized (regno)
1869 int regno;
1870{
b0b7b46a
RS
1871 if (n_basic_blocks == 0
1872 || (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
d7429b6a
RK
1873 return 0;
1874
1875 return (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
5f4f0e22 1876 & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS)));
d7429b6a
RK
1877}
1878
1879/* 1 if register REGNO was alive at a place where `setjmp' was called
1880 and was set more than once or is an argument.
1881 Such regs may be clobbered by `longjmp'. */
1882
1883int
1884regno_clobbered_at_setjmp (regno)
1885 int regno;
1886{
1887 if (n_basic_blocks == 0)
1888 return 0;
1889
1890 return ((reg_n_sets[regno] > 1
1891 || (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
5f4f0e22 1892 & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))))
d7429b6a 1893 && (regs_live_at_setjmp[regno / REGSET_ELT_BITS]
5f4f0e22 1894 & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))));
d7429b6a
RK
1895}
1896\f
1897/* Process the registers that are set within X.
1898 Their bits are set to 1 in the regset DEAD,
1899 because they are dead prior to this insn.
1900
1901 If INSN is nonzero, it is the insn being processed
1902 and the fact that it is nonzero implies this is the FINAL pass
1903 in propagate_block. In this case, various info about register
1904 usage is stored, LOG_LINKS fields of insns are set up. */
1905
d7429b6a
RK
1906static void
1907mark_set_regs (needed, dead, x, insn, significant)
1908 regset needed;
1909 regset dead;
1910 rtx x;
1911 rtx insn;
1912 regset significant;
1913{
1914 register RTX_CODE code = GET_CODE (x);
1915
1916 if (code == SET || code == CLOBBER)
1917 mark_set_1 (needed, dead, x, insn, significant);
1918 else if (code == PARALLEL)
1919 {
1920 register int i;
1921 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1922 {
1923 code = GET_CODE (XVECEXP (x, 0, i));
1924 if (code == SET || code == CLOBBER)
1925 mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
1926 }
1927 }
1928}
1929
1930/* Process a single SET rtx, X. */
1931
1932static void
1933mark_set_1 (needed, dead, x, insn, significant)
1934 regset needed;
1935 regset dead;
1936 rtx x;
1937 rtx insn;
1938 regset significant;
1939{
1940 register int regno;
1941 register rtx reg = SET_DEST (x);
1942
1943 /* Modifying just one hardware register of a multi-reg value
1944 or just a byte field of a register
1945 does not mean the value from before this insn is now dead.
1946 But it does mean liveness of that register at the end of the block
1947 is significant.
1948
1949 Within mark_set_1, however, we treat it as if the register is
1950 indeed modified. mark_used_regs will, however, also treat this
1951 register as being used. Thus, we treat these insns as setting a
1952 new value for the register as a function of its old value. This
1953 cases LOG_LINKS to be made appropriately and this will help combine. */
1954
1955 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
1956 || GET_CODE (reg) == SIGN_EXTRACT
1957 || GET_CODE (reg) == STRICT_LOW_PART)
1958 reg = XEXP (reg, 0);
1959
1960 /* If we are writing into memory or into a register mentioned in the
1961 address of the last thing stored into memory, show we don't know
1962 what the last store was. If we are writing memory, save the address
1963 unless it is volatile. */
1964 if (GET_CODE (reg) == MEM
1965 || (GET_CODE (reg) == REG
1966 && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set)))
1967 last_mem_set = 0;
1968
1969 if (GET_CODE (reg) == MEM && ! side_effects_p (reg)
1970 /* There are no REG_INC notes for SP, so we can't assume we'll see
1971 everything that invalidates it. To be safe, don't eliminate any
1972 stores though SP; none of them should be redundant anyway. */
1973 && ! reg_mentioned_p (stack_pointer_rtx, reg))
1974 last_mem_set = reg;
1975
1976 if (GET_CODE (reg) == REG
1977 && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
1978#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
1979 && regno != HARD_FRAME_POINTER_REGNUM
1980#endif
d7e4fe8b
RS
1981#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1982 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
1983#endif
d7429b6a
RK
1984 && ! (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]))
1985 /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
1986 {
1987 register int offset = regno / REGSET_ELT_BITS;
5f4f0e22
CH
1988 register REGSET_ELT_TYPE bit
1989 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
1990 REGSET_ELT_TYPE all_needed = (needed[offset] & bit);
1991 REGSET_ELT_TYPE some_needed = (needed[offset] & bit);
d7429b6a
RK
1992
1993 /* Mark it as a significant register for this basic block. */
1994 if (significant)
1995 significant[offset] |= bit;
1996
1997 /* Mark it as as dead before this insn. */
1998 dead[offset] |= bit;
1999
2000 /* A hard reg in a wide mode may really be multiple registers.
2001 If so, mark all of them just like the first. */
2002 if (regno < FIRST_PSEUDO_REGISTER)
2003 {
2004 int n;
2005
2006 /* Nothing below is needed for the stack pointer; get out asap.
2007 Eg, log links aren't needed, since combine won't use them. */
2008 if (regno == STACK_POINTER_REGNUM)
2009 return;
2010
2011 n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
2012 while (--n > 0)
2013 {
2014 if (significant)
2015 significant[(regno + n) / REGSET_ELT_BITS]
5f4f0e22 2016 |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS);
d7429b6a 2017 dead[(regno + n) / REGSET_ELT_BITS]
5f4f0e22
CH
2018 |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS);
2019 some_needed
2020 |= (needed[(regno + n) / REGSET_ELT_BITS]
2021 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
2022 all_needed
2023 &= (needed[(regno + n) / REGSET_ELT_BITS]
2024 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
d7429b6a
RK
2025 }
2026 }
2027 /* Additional data to record if this is the final pass. */
2028 if (insn)
2029 {
2030 register rtx y = reg_next_use[regno];
2031 register int blocknum = BLOCK_NUM (insn);
2032
2033 /* If this is a hard reg, record this function uses the reg. */
2034
2035 if (regno < FIRST_PSEUDO_REGISTER)
2036 {
2037 register int i;
2038 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
2039
2040 for (i = regno; i < endregno; i++)
2041 {
93514916
JW
2042 /* The next use is no longer "next", since a store
2043 intervenes. */
2044 reg_next_use[i] = 0;
2045
d7429b6a
RK
2046 regs_ever_live[i] = 1;
2047 reg_n_sets[i]++;
2048 }
2049 }
2050 else
2051 {
93514916
JW
2052 /* The next use is no longer "next", since a store
2053 intervenes. */
2054 reg_next_use[regno] = 0;
2055
d7429b6a
RK
2056 /* Keep track of which basic blocks each reg appears in. */
2057
2058 if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN)
2059 reg_basic_block[regno] = blocknum;
2060 else if (reg_basic_block[regno] != blocknum)
2061 reg_basic_block[regno] = REG_BLOCK_GLOBAL;
2062
2063 /* Count (weighted) references, stores, etc. This counts a
2064 register twice if it is modified, but that is correct. */
2065 reg_n_sets[regno]++;
2066
2067 reg_n_refs[regno] += loop_depth;
2068
2069 /* The insns where a reg is live are normally counted
2070 elsewhere, but we want the count to include the insn
2071 where the reg is set, and the normal counting mechanism
2072 would not count it. */
2073 reg_live_length[regno]++;
2074 }
2075
d7429b6a
RK
2076 if (all_needed)
2077 {
2078 /* Make a logical link from the next following insn
2079 that uses this register, back to this insn.
2080 The following insns have already been processed.
2081
2082 We don't build a LOG_LINK for hard registers containing
2083 in ASM_OPERANDs. If these registers get replaced,
2084 we might wind up changing the semantics of the insn,
2085 even if reload can make what appear to be valid assignments
2086 later. */
2087 if (y && (BLOCK_NUM (y) == blocknum)
2088 && (regno >= FIRST_PSEUDO_REGISTER
2089 || asm_noperands (PATTERN (y)) < 0))
2090 LOG_LINKS (y)
2091 = gen_rtx (INSN_LIST, VOIDmode, insn, LOG_LINKS (y));
2092 }
2093 else if (! some_needed)
2094 {
2095 /* Note that dead stores have already been deleted when possible
2096 If we get here, we have found a dead store that cannot
2097 be eliminated (because the same insn does something useful).
2098 Indicate this by marking the reg being set as dying here. */
2099 REG_NOTES (insn)
2100 = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn));
2101 reg_n_deaths[REGNO (reg)]++;
2102 }
2103 else
2104 {
2105 /* This is a case where we have a multi-word hard register
2106 and some, but not all, of the words of the register are
2107 needed in subsequent insns. Write REG_UNUSED notes
2108 for those parts that were not needed. This case should
2109 be rare. */
2110
2111 int i;
2112
2113 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
2114 i >= 0; i--)
2115 if ((needed[(regno + i) / REGSET_ELT_BITS]
5f4f0e22
CH
2116 & ((REGSET_ELT_TYPE) 1
2117 << ((regno + i) % REGSET_ELT_BITS))) == 0)
d7429b6a
RK
2118 REG_NOTES (insn)
2119 = gen_rtx (EXPR_LIST, REG_UNUSED,
04227afa
DE
2120 gen_rtx (REG, reg_raw_mode[regno + i],
2121 regno + i),
d7429b6a
RK
2122 REG_NOTES (insn));
2123 }
2124 }
2125 }
8244fc4f
RS
2126 else if (GET_CODE (reg) == REG)
2127 reg_next_use[regno] = 0;
d7429b6a
RK
2128
2129 /* If this is the last pass and this is a SCRATCH, show it will be dying
2130 here and count it. */
2131 else if (GET_CODE (reg) == SCRATCH && insn != 0)
2132 {
2133 REG_NOTES (insn)
2134 = gen_rtx (EXPR_LIST, REG_UNUSED, reg, REG_NOTES (insn));
2135 num_scratch++;
2136 }
2137}
2138\f
2139#ifdef AUTO_INC_DEC
2140
2141/* X is a MEM found in INSN. See if we can convert it into an auto-increment
2142 reference. */
2143
2144static void
2145find_auto_inc (needed, x, insn)
2146 regset needed;
2147 rtx x;
2148 rtx insn;
2149{
2150 rtx addr = XEXP (x, 0);
e658434c 2151 HOST_WIDE_INT offset = 0;
05ed5d57 2152 rtx set;
d7429b6a
RK
2153
2154 /* Here we detect use of an index register which might be good for
2155 postincrement, postdecrement, preincrement, or predecrement. */
2156
2157 if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2158 offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0);
2159
2160 if (GET_CODE (addr) == REG)
2161 {
2162 register rtx y;
2163 register int size = GET_MODE_SIZE (GET_MODE (x));
2164 rtx use;
2165 rtx incr;
2166 int regno = REGNO (addr);
2167
2168 /* Is the next use an increment that might make auto-increment? */
05ed5d57
RK
2169 if ((incr = reg_next_use[regno]) != 0
2170 && (set = single_set (incr)) != 0
2171 && GET_CODE (set) == SET
d7429b6a
RK
2172 && BLOCK_NUM (incr) == BLOCK_NUM (insn)
2173 /* Can't add side effects to jumps; if reg is spilled and
2174 reloaded, there's no way to store back the altered value. */
2175 && GET_CODE (insn) != JUMP_INSN
05ed5d57 2176 && (y = SET_SRC (set), GET_CODE (y) == PLUS)
d7429b6a
RK
2177 && XEXP (y, 0) == addr
2178 && GET_CODE (XEXP (y, 1)) == CONST_INT
2179 && (0
2180#ifdef HAVE_POST_INCREMENT
2181 || (INTVAL (XEXP (y, 1)) == size && offset == 0)
2182#endif
2183#ifdef HAVE_POST_DECREMENT
2184 || (INTVAL (XEXP (y, 1)) == - size && offset == 0)
2185#endif
2186#ifdef HAVE_PRE_INCREMENT
2187 || (INTVAL (XEXP (y, 1)) == size && offset == size)
2188#endif
2189#ifdef HAVE_PRE_DECREMENT
2190 || (INTVAL (XEXP (y, 1)) == - size && offset == - size)
2191#endif
2192 )
2193 /* Make sure this reg appears only once in this insn. */
2194 && (use = find_use_as_address (PATTERN (insn), addr, offset),
2195 use != 0 && use != (rtx) 1))
2196 {
05ed5d57 2197 rtx q = SET_DEST (set);
7280c2a4
RK
2198 enum rtx_code inc_code = (INTVAL (XEXP (y, 1)) == size
2199 ? (offset ? PRE_INC : POST_INC)
2200 : (offset ? PRE_DEC : POST_DEC));
d7429b6a
RK
2201
2202 if (dead_or_set_p (incr, addr))
7280c2a4
RK
2203 {
2204 /* This is the simple case. Try to make the auto-inc. If
2205 we can't, we are done. Otherwise, we will do any
2206 needed updates below. */
2207 if (! validate_change (insn, &XEXP (x, 0),
2208 gen_rtx (inc_code, Pmode, addr),
2209 0))
2210 return;
2211 }
5175ad37
DE
2212 else if (GET_CODE (q) == REG
2213 /* PREV_INSN used here to check the semi-open interval
2214 [insn,incr). */
2215 && ! reg_used_between_p (q, PREV_INSN (insn), incr))
d7429b6a 2216 {
5175ad37 2217 /* We have *p followed sometime later by q = p+size.
d7429b6a 2218 Both p and q must be live afterward,
5175ad37 2219 and q is not used between INSN and it's assignment.
d7429b6a
RK
2220 Change it to q = p, ...*q..., q = q+size.
2221 Then fall into the usual case. */
2222 rtx insns, temp;
2223
2224 start_sequence ();
2225 emit_move_insn (q, addr);
2226 insns = get_insns ();
2227 end_sequence ();
2228
2229 /* If anything in INSNS have UID's that don't fit within the
2230 extra space we allocate earlier, we can't make this auto-inc.
2231 This should never happen. */
2232 for (temp = insns; temp; temp = NEXT_INSN (temp))
2233 {
2234 if (INSN_UID (temp) > max_uid_for_flow)
2235 return;
2236 BLOCK_NUM (temp) = BLOCK_NUM (insn);
2237 }
2238
7280c2a4
RK
2239 /* If we can't make the auto-inc, or can't make the
2240 replacement into Y, exit. There's no point in making
2241 the change below if we can't do the auto-inc and doing
2242 so is not correct in the pre-inc case. */
2243
2244 validate_change (insn, &XEXP (x, 0),
2245 gen_rtx (inc_code, Pmode, q),
2246 1);
2247 validate_change (incr, &XEXP (y, 0), q, 1);
2248 if (! apply_change_group ())
2249 return;
2250
2251 /* We now know we'll be doing this change, so emit the
2252 new insn(s) and do the updates. */
d7429b6a 2253 emit_insns_before (insns, insn);
e8b641a1
RK
2254
2255 if (basic_block_head[BLOCK_NUM (insn)] == insn)
2256 basic_block_head[BLOCK_NUM (insn)] = insns;
2257
d7429b6a
RK
2258 /* INCR will become a NOTE and INSN won't contain a
2259 use of ADDR. If a use of ADDR was just placed in
2260 the insn before INSN, make that the next use.
2261 Otherwise, invalidate it. */
2262 if (GET_CODE (PREV_INSN (insn)) == INSN
2263 && GET_CODE (PATTERN (PREV_INSN (insn))) == SET
2264 && SET_SRC (PATTERN (PREV_INSN (insn))) == addr)
2265 reg_next_use[regno] = PREV_INSN (insn);
2266 else
2267 reg_next_use[regno] = 0;
2268
2269 addr = q;
2270 regno = REGNO (q);
d7429b6a
RK
2271
2272 /* REGNO is now used in INCR which is below INSN, but
2273 it previously wasn't live here. If we don't mark
2274 it as needed, we'll put a REG_DEAD note for it
2275 on this insn, which is incorrect. */
2276 needed[regno / REGSET_ELT_BITS]
5f4f0e22 2277 |= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
d7429b6a
RK
2278
2279 /* If there are any calls between INSN and INCR, show
2280 that REGNO now crosses them. */
2281 for (temp = insn; temp != incr; temp = NEXT_INSN (temp))
2282 if (GET_CODE (temp) == CALL_INSN)
2283 reg_n_calls_crossed[regno]++;
2284 }
02df8aba
RK
2285 else
2286 return;
d7429b6a 2287
7280c2a4
RK
2288 /* If we haven't returned, it means we were able to make the
2289 auto-inc, so update the status. First, record that this insn
2290 has an implicit side effect. */
2291
2292 REG_NOTES (insn)
2293 = gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn));
2294
2295 /* Modify the old increment-insn to simply copy
2296 the already-incremented value of our register. */
2297 if (! validate_change (incr, &SET_SRC (set), addr, 0))
2298 abort ();
2299
2300 /* If that makes it a no-op (copying the register into itself) delete
2301 it so it won't appear to be a "use" and a "set" of this
2302 register. */
2303 if (SET_DEST (set) == addr)
d7429b6a 2304 {
7280c2a4
RK
2305 PUT_CODE (incr, NOTE);
2306 NOTE_LINE_NUMBER (incr) = NOTE_INSN_DELETED;
2307 NOTE_SOURCE_FILE (incr) = 0;
2308 }
d7429b6a 2309
7280c2a4
RK
2310 if (regno >= FIRST_PSEUDO_REGISTER)
2311 {
2312 /* Count an extra reference to the reg. When a reg is
2313 incremented, spilling it is worse, so we want to make
2314 that less likely. */
2315 reg_n_refs[regno] += loop_depth;
2316
2317 /* Count the increment as a setting of the register,
2318 even though it isn't a SET in rtl. */
2319 reg_n_sets[regno]++;
d7429b6a
RK
2320 }
2321 }
2322 }
2323}
2324#endif /* AUTO_INC_DEC */
2325\f
2326/* Scan expression X and store a 1-bit in LIVE for each reg it uses.
2327 This is done assuming the registers needed from X
2328 are those that have 1-bits in NEEDED.
2329
2330 On the final pass, FINAL is 1. This means try for autoincrement
2331 and count the uses and deaths of each pseudo-reg.
2332
2333 INSN is the containing instruction. If INSN is dead, this function is not
2334 called. */
2335
2336static void
2337mark_used_regs (needed, live, x, final, insn)
2338 regset needed;
2339 regset live;
2340 rtx x;
d7429b6a 2341 int final;
e658434c 2342 rtx insn;
d7429b6a
RK
2343{
2344 register RTX_CODE code;
2345 register int regno;
2346 int i;
2347
2348 retry:
2349 code = GET_CODE (x);
2350 switch (code)
2351 {
2352 case LABEL_REF:
2353 case SYMBOL_REF:
2354 case CONST_INT:
2355 case CONST:
2356 case CONST_DOUBLE:
2357 case PC:
d7429b6a
RK
2358 case ADDR_VEC:
2359 case ADDR_DIFF_VEC:
2360 case ASM_INPUT:
2361 return;
2362
2363#ifdef HAVE_cc0
2364 case CC0:
2365 cc0_live = 1;
2366 return;
2367#endif
2368
2f1553a4
RK
2369 case CLOBBER:
2370 /* If we are clobbering a MEM, mark any registers inside the address
2371 as being used. */
2372 if (GET_CODE (XEXP (x, 0)) == MEM)
2373 mark_used_regs (needed, live, XEXP (XEXP (x, 0), 0), final, insn);
2374 return;
2375
d7429b6a
RK
2376 case MEM:
2377 /* Invalidate the data for the last MEM stored. We could do this only
2378 if the addresses conflict, but this doesn't seem worthwhile. */
2379 last_mem_set = 0;
2380
2381#ifdef AUTO_INC_DEC
2382 if (final)
2383 find_auto_inc (needed, x, insn);
2384#endif
2385 break;
2386
80f8f04a
RK
2387 case SUBREG:
2388 if (GET_CODE (SUBREG_REG (x)) == REG
2389 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
2390 && (GET_MODE_SIZE (GET_MODE (x))
88285acf 2391 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
80f8f04a
RK
2392 reg_changes_size[REGNO (SUBREG_REG (x))] = 1;
2393
2394 /* While we're here, optimize this case. */
2395 x = SUBREG_REG (x);
2396
e100a3bb 2397 /* In case the SUBREG is not of a register, don't optimize */
ce79abf3 2398 if (GET_CODE (x) != REG)
e100a3bb
MM
2399 {
2400 mark_used_regs (needed, live, x, final, insn);
2401 return;
2402 }
ce79abf3 2403
80f8f04a
RK
2404 /* ... fall through ... */
2405
d7429b6a
RK
2406 case REG:
2407 /* See a register other than being set
2408 => mark it as needed. */
2409
2410 regno = REGNO (x);
2411 {
2412 register int offset = regno / REGSET_ELT_BITS;
5f4f0e22
CH
2413 register REGSET_ELT_TYPE bit
2414 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
26300dcd
RK
2415 REGSET_ELT_TYPE all_needed = needed[offset] & bit;
2416 REGSET_ELT_TYPE some_needed = needed[offset] & bit;
d7429b6a
RK
2417
2418 live[offset] |= bit;
2419 /* A hard reg in a wide mode may really be multiple registers.
2420 If so, mark all of them just like the first. */
2421 if (regno < FIRST_PSEUDO_REGISTER)
2422 {
2423 int n;
2424
d7e4fe8b 2425 /* For stack ptr or fixed arg pointer,
d7429b6a
RK
2426 nothing below can be necessary, so waste no more time. */
2427 if (regno == STACK_POINTER_REGNUM
73a187c1
DE
2428#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2429 || regno == HARD_FRAME_POINTER_REGNUM
2430#endif
d7e4fe8b
RS
2431#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2432 || (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2433#endif
d7429b6a
RK
2434 || regno == FRAME_POINTER_REGNUM)
2435 {
2436 /* If this is a register we are going to try to eliminate,
2437 don't mark it live here. If we are successful in
2438 eliminating it, it need not be live unless it is used for
2439 pseudos, in which case it will have been set live when
2440 it was allocated to the pseudos. If the register will not
2441 be eliminated, reload will set it live at that point. */
2442
2443 if (! TEST_HARD_REG_BIT (elim_reg_set, regno))
2444 regs_ever_live[regno] = 1;
2445 return;
2446 }
2447 /* No death notes for global register variables;
2448 their values are live after this function exits. */
2449 if (global_regs[regno])
d8c8b8e3
RS
2450 {
2451 if (final)
2452 reg_next_use[regno] = insn;
2453 return;
2454 }
d7429b6a
RK
2455
2456 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
2457 while (--n > 0)
2458 {
2459 live[(regno + n) / REGSET_ELT_BITS]
5f4f0e22
CH
2460 |= (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS);
2461 some_needed
2462 |= (needed[(regno + n) / REGSET_ELT_BITS]
2463 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
2464 all_needed
2465 &= (needed[(regno + n) / REGSET_ELT_BITS]
2466 & (REGSET_ELT_TYPE) 1 << ((regno + n) % REGSET_ELT_BITS));
d7429b6a
RK
2467 }
2468 }
2469 if (final)
2470 {
2471 /* Record where each reg is used, so when the reg
2472 is set we know the next insn that uses it. */
2473
2474 reg_next_use[regno] = insn;
2475
2476 if (regno < FIRST_PSEUDO_REGISTER)
2477 {
2478 /* If a hard reg is being used,
2479 record that this function does use it. */
2480
2481 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
2482 if (i == 0)
2483 i = 1;
2484 do
2485 regs_ever_live[regno + --i] = 1;
2486 while (i > 0);
2487 }
2488 else
2489 {
2490 /* Keep track of which basic block each reg appears in. */
2491
2492 register int blocknum = BLOCK_NUM (insn);
2493
2494 if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN)
2495 reg_basic_block[regno] = blocknum;
2496 else if (reg_basic_block[regno] != blocknum)
2497 reg_basic_block[regno] = REG_BLOCK_GLOBAL;
2498
2499 /* Count (weighted) number of uses of each reg. */
2500
2501 reg_n_refs[regno] += loop_depth;
2502 }
2503
2504 /* Record and count the insns in which a reg dies.
2505 If it is used in this insn and was dead below the insn
2506 then it dies in this insn. If it was set in this insn,
2507 we do not make a REG_DEAD note; likewise if we already
2508 made such a note. */
2509
2510 if (! all_needed
2511 && ! dead_or_set_p (insn, x)
2512#if 0
2513 && (regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
2514#endif
2515 )
2516 {
ab28041e
JW
2517 /* Check for the case where the register dying partially
2518 overlaps the register set by this insn. */
2519 if (regno < FIRST_PSEUDO_REGISTER
2520 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
2521 {
480eac3b 2522 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
ab28041e
JW
2523 while (--n >= 0)
2524 some_needed |= dead_or_set_regno_p (insn, regno + n);
2525 }
2526
d7429b6a
RK
2527 /* If none of the words in X is needed, make a REG_DEAD
2528 note. Otherwise, we must make partial REG_DEAD notes. */
2529 if (! some_needed)
2530 {
2531 REG_NOTES (insn)
2532 = gen_rtx (EXPR_LIST, REG_DEAD, x, REG_NOTES (insn));
2533 reg_n_deaths[regno]++;
2534 }
2535 else
2536 {
2537 int i;
2538
2539 /* Don't make a REG_DEAD note for a part of a register
2540 that is set in the insn. */
2541
2542 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
2543 i >= 0; i--)
2544 if ((needed[(regno + i) / REGSET_ELT_BITS]
5f4f0e22
CH
2545 & ((REGSET_ELT_TYPE) 1
2546 << ((regno + i) % REGSET_ELT_BITS))) == 0
d7429b6a
RK
2547 && ! dead_or_set_regno_p (insn, regno + i))
2548 REG_NOTES (insn)
2549 = gen_rtx (EXPR_LIST, REG_DEAD,
04227afa
DE
2550 gen_rtx (REG, reg_raw_mode[regno + i],
2551 regno + i),
d7429b6a
RK
2552 REG_NOTES (insn));
2553 }
2554 }
2555 }
2556 }
2557 return;
2558
2559 case SET:
2560 {
2561 register rtx testreg = SET_DEST (x);
2562 int mark_dest = 0;
2563
2564 /* If storing into MEM, don't show it as being used. But do
2565 show the address as being used. */
2566 if (GET_CODE (testreg) == MEM)
2567 {
2568#ifdef AUTO_INC_DEC
2569 if (final)
2570 find_auto_inc (needed, testreg, insn);
2571#endif
2572 mark_used_regs (needed, live, XEXP (testreg, 0), final, insn);
2573 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2574 return;
2575 }
2576
2577 /* Storing in STRICT_LOW_PART is like storing in a reg
2578 in that this SET might be dead, so ignore it in TESTREG.
2579 but in some other ways it is like using the reg.
2580
2581 Storing in a SUBREG or a bit field is like storing the entire
2582 register in that if the register's value is not used
2583 then this SET is not needed. */
2584 while (GET_CODE (testreg) == STRICT_LOW_PART
2585 || GET_CODE (testreg) == ZERO_EXTRACT
2586 || GET_CODE (testreg) == SIGN_EXTRACT
2587 || GET_CODE (testreg) == SUBREG)
2588 {
88285acf
RK
2589 if (GET_CODE (testreg) == SUBREG
2590 && GET_CODE (SUBREG_REG (testreg)) == REG
2591 && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER
2592 && (GET_MODE_SIZE (GET_MODE (testreg))
2593 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (testreg)))))
2594 reg_changes_size[REGNO (SUBREG_REG (testreg))] = 1;
2595
d7429b6a
RK
2596 /* Modifying a single register in an alternate mode
2597 does not use any of the old value. But these other
2598 ways of storing in a register do use the old value. */
2599 if (GET_CODE (testreg) == SUBREG
2600 && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
2601 ;
2602 else
2603 mark_dest = 1;
2604
2605 testreg = XEXP (testreg, 0);
2606 }
2607
2608 /* If this is a store into a register,
2609 recursively scan the value being stored. */
2610
2611 if (GET_CODE (testreg) == REG
2612 && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
73a187c1
DE
2613#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
2614 && regno != HARD_FRAME_POINTER_REGNUM
2615#endif
d7e4fe8b
RS
2616#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2617 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2618#endif
d8c8b8e3
RS
2619 )
2620 /* We used to exclude global_regs here, but that seems wrong.
2621 Storing in them is like storing in mem. */
d7429b6a
RK
2622 {
2623 mark_used_regs (needed, live, SET_SRC (x), final, insn);
2624 if (mark_dest)
2625 mark_used_regs (needed, live, SET_DEST (x), final, insn);
2626 return;
2627 }
2628 }
2629 break;
2630
2631 case RETURN:
2632 /* If exiting needs the right stack value, consider this insn as
2633 using the stack pointer. In any event, consider it as using
2634 all global registers. */
2635
2636#ifdef EXIT_IGNORE_STACK
2637 if (! EXIT_IGNORE_STACK
2638 || (! FRAME_POINTER_REQUIRED && flag_omit_frame_pointer))
2639#endif
2640 live[STACK_POINTER_REGNUM / REGSET_ELT_BITS]
5f4f0e22 2641 |= (REGSET_ELT_TYPE) 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
d7429b6a
RK
2642
2643 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2644 if (global_regs[i])
5f4f0e22
CH
2645 live[i / REGSET_ELT_BITS]
2646 |= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
d7429b6a
RK
2647 break;
2648 }
2649
2650 /* Recursively scan the operands of this expression. */
2651
2652 {
2653 register char *fmt = GET_RTX_FORMAT (code);
2654 register int i;
2655
2656 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2657 {
2658 if (fmt[i] == 'e')
2659 {
2660 /* Tail recursive case: save a function call level. */
2661 if (i == 0)
2662 {
2663 x = XEXP (x, 0);
2664 goto retry;
2665 }
2666 mark_used_regs (needed, live, XEXP (x, i), final, insn);
2667 }
2668 else if (fmt[i] == 'E')
2669 {
2670 register int j;
2671 for (j = 0; j < XVECLEN (x, i); j++)
2672 mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
2673 }
2674 }
2675 }
2676}
2677\f
2678#ifdef AUTO_INC_DEC
2679
2680static int
2681try_pre_increment_1 (insn)
2682 rtx insn;
2683{
2684 /* Find the next use of this reg. If in same basic block,
2685 make it do pre-increment or pre-decrement if appropriate. */
2686 rtx x = PATTERN (insn);
5f4f0e22 2687 HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
d7429b6a
RK
2688 * INTVAL (XEXP (SET_SRC (x), 1)));
2689 int regno = REGNO (SET_DEST (x));
2690 rtx y = reg_next_use[regno];
2691 if (y != 0
2692 && BLOCK_NUM (y) == BLOCK_NUM (insn)
89861c38
RK
2693 /* Don't do this if the reg dies, or gets set in y; a standard addressing
2694 mode would be better. */
2695 && ! dead_or_set_p (y, SET_DEST (x))
d7429b6a
RK
2696 && try_pre_increment (y, SET_DEST (PATTERN (insn)),
2697 amount))
2698 {
2699 /* We have found a suitable auto-increment
2700 and already changed insn Y to do it.
2701 So flush this increment-instruction. */
2702 PUT_CODE (insn, NOTE);
2703 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2704 NOTE_SOURCE_FILE (insn) = 0;
2705 /* Count a reference to this reg for the increment
2706 insn we are deleting. When a reg is incremented.
2707 spilling it is worse, so we want to make that
2708 less likely. */
2709 if (regno >= FIRST_PSEUDO_REGISTER)
2710 {
2711 reg_n_refs[regno] += loop_depth;
2712 reg_n_sets[regno]++;
2713 }
2714 return 1;
2715 }
2716 return 0;
2717}
2718
2719/* Try to change INSN so that it does pre-increment or pre-decrement
2720 addressing on register REG in order to add AMOUNT to REG.
2721 AMOUNT is negative for pre-decrement.
2722 Returns 1 if the change could be made.
2723 This checks all about the validity of the result of modifying INSN. */
2724
2725static int
2726try_pre_increment (insn, reg, amount)
2727 rtx insn, reg;
5f4f0e22 2728 HOST_WIDE_INT amount;
d7429b6a
RK
2729{
2730 register rtx use;
2731
2732 /* Nonzero if we can try to make a pre-increment or pre-decrement.
2733 For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
2734 int pre_ok = 0;
2735 /* Nonzero if we can try to make a post-increment or post-decrement.
2736 For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
2737 It is possible for both PRE_OK and POST_OK to be nonzero if the machine
2738 supports both pre-inc and post-inc, or both pre-dec and post-dec. */
2739 int post_ok = 0;
2740
2741 /* Nonzero if the opportunity actually requires post-inc or post-dec. */
2742 int do_post = 0;
2743
2744 /* From the sign of increment, see which possibilities are conceivable
2745 on this target machine. */
2746#ifdef HAVE_PRE_INCREMENT
2747 if (amount > 0)
2748 pre_ok = 1;
2749#endif
2750#ifdef HAVE_POST_INCREMENT
2751 if (amount > 0)
2752 post_ok = 1;
2753#endif
2754
2755#ifdef HAVE_PRE_DECREMENT
2756 if (amount < 0)
2757 pre_ok = 1;
2758#endif
2759#ifdef HAVE_POST_DECREMENT
2760 if (amount < 0)
2761 post_ok = 1;
2762#endif
2763
2764 if (! (pre_ok || post_ok))
2765 return 0;
2766
2767 /* It is not safe to add a side effect to a jump insn
2768 because if the incremented register is spilled and must be reloaded
2769 there would be no way to store the incremented value back in memory. */
2770
2771 if (GET_CODE (insn) == JUMP_INSN)
2772 return 0;
2773
2774 use = 0;
2775 if (pre_ok)
2776 use = find_use_as_address (PATTERN (insn), reg, 0);
2777 if (post_ok && (use == 0 || use == (rtx) 1))
2778 {
2779 use = find_use_as_address (PATTERN (insn), reg, -amount);
2780 do_post = 1;
2781 }
2782
2783 if (use == 0 || use == (rtx) 1)
2784 return 0;
2785
2786 if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
2787 return 0;
2788
a0fbc3a9
SC
2789 /* See if this combination of instruction and addressing mode exists. */
2790 if (! validate_change (insn, &XEXP (use, 0),
2791 gen_rtx (amount > 0
2792 ? (do_post ? POST_INC : PRE_INC)
2793 : (do_post ? POST_DEC : PRE_DEC),
2794 Pmode, reg), 0))
2795 return 0;
d7429b6a
RK
2796
2797 /* Record that this insn now has an implicit side effect on X. */
2798 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn));
2799 return 1;
2800}
2801
2802#endif /* AUTO_INC_DEC */
2803\f
2804/* Find the place in the rtx X where REG is used as a memory address.
2805 Return the MEM rtx that so uses it.
2806 If PLUSCONST is nonzero, search instead for a memory address equivalent to
2807 (plus REG (const_int PLUSCONST)).
2808
2809 If such an address does not appear, return 0.
2810 If REG appears more than once, or is used other than in such an address,
2811 return (rtx)1. */
2812
2813static rtx
2814find_use_as_address (x, reg, plusconst)
2815 register rtx x;
2816 rtx reg;
e658434c 2817 HOST_WIDE_INT plusconst;
d7429b6a
RK
2818{
2819 enum rtx_code code = GET_CODE (x);
2820 char *fmt = GET_RTX_FORMAT (code);
2821 register int i;
2822 register rtx value = 0;
2823 register rtx tem;
2824
2825 if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
2826 return x;
2827
2828 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
2829 && XEXP (XEXP (x, 0), 0) == reg
2830 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2831 && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
2832 return x;
2833
2834 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
2835 {
2836 /* If REG occurs inside a MEM used in a bit-field reference,
2837 that is unacceptable. */
2838 if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
6fa5c106 2839 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2840 }
2841
2842 if (x == reg)
6fa5c106 2843 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2844
2845 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2846 {
2847 if (fmt[i] == 'e')
2848 {
2849 tem = find_use_as_address (XEXP (x, i), reg, plusconst);
2850 if (value == 0)
2851 value = tem;
2852 else if (tem != 0)
6fa5c106 2853 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2854 }
2855 if (fmt[i] == 'E')
2856 {
2857 register int j;
2858 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2859 {
2860 tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
2861 if (value == 0)
2862 value = tem;
2863 else if (tem != 0)
6fa5c106 2864 return (rtx) (HOST_WIDE_INT) 1;
d7429b6a
RK
2865 }
2866 }
2867 }
2868
2869 return value;
2870}
2871\f
2872/* Write information about registers and basic blocks into FILE.
2873 This is part of making a debugging dump. */
2874
2875void
2876dump_flow_info (file)
2877 FILE *file;
2878{
2879 register int i;
2880 static char *reg_class_names[] = REG_CLASS_NAMES;
2881
2882 fprintf (file, "%d registers.\n", max_regno);
2883
2884 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
2885 if (reg_n_refs[i])
2886 {
e4600702 2887 enum reg_class class, altclass;
d7429b6a
RK
2888 fprintf (file, "\nRegister %d used %d times across %d insns",
2889 i, reg_n_refs[i], reg_live_length[i]);
2890 if (reg_basic_block[i] >= 0)
2891 fprintf (file, " in block %d", reg_basic_block[i]);
2892 if (reg_n_deaths[i] != 1)
2893 fprintf (file, "; dies in %d places", reg_n_deaths[i]);
2894 if (reg_n_calls_crossed[i] == 1)
2895 fprintf (file, "; crosses 1 call");
2896 else if (reg_n_calls_crossed[i])
2897 fprintf (file, "; crosses %d calls", reg_n_calls_crossed[i]);
2898 if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
2899 fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
2900 class = reg_preferred_class (i);
e4600702
RK
2901 altclass = reg_alternate_class (i);
2902 if (class != GENERAL_REGS || altclass != ALL_REGS)
d7429b6a 2903 {
e4600702
RK
2904 if (altclass == ALL_REGS || class == ALL_REGS)
2905 fprintf (file, "; pref %s", reg_class_names[(int) class]);
2906 else if (altclass == NO_REGS)
d7429b6a
RK
2907 fprintf (file, "; %s or none", reg_class_names[(int) class]);
2908 else
e4600702
RK
2909 fprintf (file, "; pref %s, else %s",
2910 reg_class_names[(int) class],
2911 reg_class_names[(int) altclass]);
d7429b6a
RK
2912 }
2913 if (REGNO_POINTER_FLAG (i))
2914 fprintf (file, "; pointer");
2915 fprintf (file, ".\n");
2916 }
2917 fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
2918 for (i = 0; i < n_basic_blocks; i++)
2919 {
2920 register rtx head, jump;
2921 register int regno;
2922 fprintf (file, "\nBasic block %d: first insn %d, last %d.\n",
2923 i,
2924 INSN_UID (basic_block_head[i]),
2925 INSN_UID (basic_block_end[i]));
2926 /* The control flow graph's storage is freed
2927 now when flow_analysis returns.
2928 Don't try to print it if it is gone. */
2929 if (basic_block_drops_in)
2930 {
2931 fprintf (file, "Reached from blocks: ");
2932 head = basic_block_head[i];
2933 if (GET_CODE (head) == CODE_LABEL)
2934 for (jump = LABEL_REFS (head);
2935 jump != head;
2936 jump = LABEL_NEXTREF (jump))
2937 {
2938 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2939 fprintf (file, " %d", from_block);
2940 }
2941 if (basic_block_drops_in[i])
2942 fprintf (file, " previous");
2943 }
2944 fprintf (file, "\nRegisters live at start:");
2945 for (regno = 0; regno < max_regno; regno++)
2946 {
2947 register int offset = regno / REGSET_ELT_BITS;
efb07da7
RK
2948 register REGSET_ELT_TYPE bit
2949 = (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
d7429b6a
RK
2950 if (basic_block_live_at_start[i][offset] & bit)
2951 fprintf (file, " %d", regno);
2952 }
2953 fprintf (file, "\n");
2954 }
2955 fprintf (file, "\n");
2956}
This page took 0.572969 seconds and 5 git commands to generate.