]>
Commit | Line | Data |
---|---|---|
3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
b660f82f | 3 | 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
3cf2715d DE |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
3cf2715d | 21 | |
3cf2715d DE |
22 | /* This is the final pass of the compiler. |
23 | It looks at the rtl code for a function and outputs assembler code. | |
24 | ||
25 | Call `final_start_function' to output the assembler code for function entry, | |
26 | `final' to output assembler code for some RTL code, | |
27 | `final_end_function' to output assembler code for function exit. | |
28 | If a function is compiled in several pieces, each piece is | |
29 | output separately with `final'. | |
30 | ||
31 | Some optimizations are also done at this level. | |
32 | Move instructions that were made unnecessary by good register allocation | |
33 | are detected and omitted from the output. (Though most of these | |
34 | are removed by the last jump pass.) | |
35 | ||
36 | Instructions to set the condition codes are omitted when it can be | |
37 | seen that the condition codes already had the desired values. | |
38 | ||
39 | In some cases it is sufficient if the inherited condition codes | |
40 | have related values, but this may require the following insn | |
41 | (the one that tests the condition codes) to be modified. | |
42 | ||
43 | The code for the function prologue and epilogue are generated | |
44 | directly as assembler code by the macros FUNCTION_PROLOGUE and | |
45 | FUNCTION_EPILOGUE. Those instructions never exist as rtl. */ | |
46 | ||
47 | #include "config.h" | |
670ee920 | 48 | #include "system.h" |
3cf2715d DE |
49 | |
50 | #include "tree.h" | |
51 | #include "rtl.h" | |
6baf1cc8 | 52 | #include "tm_p.h" |
3cf2715d DE |
53 | #include "regs.h" |
54 | #include "insn-config.h" | |
3cf2715d | 55 | #include "insn-attr.h" |
3cf2715d DE |
56 | #include "recog.h" |
57 | #include "conditions.h" | |
58 | #include "flags.h" | |
59 | #include "real.h" | |
60 | #include "hard-reg-set.h" | |
3cf2715d | 61 | #include "output.h" |
3d195391 | 62 | #include "except.h" |
49ad7cfa | 63 | #include "function.h" |
10f0ad3d | 64 | #include "toplev.h" |
d6f4ec51 | 65 | #include "reload.h" |
ab87f8c8 | 66 | #include "intl.h" |
be1bb652 | 67 | #include "basic-block.h" |
3cf2715d DE |
68 | |
69 | /* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */ | |
70 | #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO) | |
76ead72b | 71 | #include "dbxout.h" |
c7391272 | 72 | #if defined (USG) || !defined (HAVE_STAB_H) |
3cf2715d DE |
73 | #include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */ |
74 | #else | |
9ec36da5 JL |
75 | #include <stab.h> |
76 | #endif | |
77 | ||
3cf2715d DE |
78 | #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */ |
79 | ||
80 | #ifdef XCOFF_DEBUGGING_INFO | |
81 | #include "xcoffout.h" | |
82 | #endif | |
83 | ||
76ead72b RL |
84 | #ifdef DWARF_DEBUGGING_INFO |
85 | #include "dwarfout.h" | |
86 | #endif | |
87 | ||
88 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) | |
89 | #include "dwarf2out.h" | |
90 | #endif | |
91 | ||
92 | #ifdef SDB_DEBUGGING_INFO | |
93 | #include "sdbout.h" | |
94 | #endif | |
95 | ||
3cf2715d DE |
96 | /* .stabd code for line number. */ |
97 | #ifndef N_SLINE | |
98 | #define N_SLINE 0x44 | |
99 | #endif | |
100 | ||
101 | /* .stabs code for included file name. */ | |
102 | #ifndef N_SOL | |
103 | #define N_SOL 0x84 | |
104 | #endif | |
105 | ||
3cf2715d DE |
106 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
107 | null default for it to save conditionalization later. */ | |
108 | #ifndef CC_STATUS_INIT | |
109 | #define CC_STATUS_INIT | |
110 | #endif | |
111 | ||
112 | /* How to start an assembler comment. */ | |
113 | #ifndef ASM_COMMENT_START | |
114 | #define ASM_COMMENT_START ";#" | |
115 | #endif | |
116 | ||
117 | /* Is the given character a logical line separator for the assembler? */ | |
118 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
119 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') | |
120 | #endif | |
121 | ||
75197b37 BS |
122 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
123 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
124 | #endif | |
125 | ||
3cf2715d | 126 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
127 | static rtx debug_insn; |
128 | rtx current_output_insn; | |
3cf2715d DE |
129 | |
130 | /* Line number of last NOTE. */ | |
131 | static int last_linenum; | |
132 | ||
eac40081 RK |
133 | /* Highest line number in current block. */ |
134 | static int high_block_linenum; | |
135 | ||
136 | /* Likewise for function. */ | |
137 | static int high_function_linenum; | |
138 | ||
3cf2715d | 139 | /* Filename of last NOTE. */ |
3cce094d | 140 | static const char *last_filename; |
3cf2715d DE |
141 | |
142 | /* Number of basic blocks seen so far; | |
143 | used if profile_block_flag is set. */ | |
144 | static int count_basic_blocks; | |
145 | ||
9e2f9a7f | 146 | /* Number of instrumented arcs when profile_arc_flag is set. */ |
51891abe | 147 | extern int count_instrumented_edges; |
9e2f9a7f | 148 | |
fc470718 R |
149 | extern int length_unit_log; /* This is defined in insn-attrtab.c. */ |
150 | ||
3cf2715d DE |
151 | /* Nonzero while outputting an `asm' with operands. |
152 | This means that inconsistencies are the user's fault, so don't abort. | |
153 | The precise value is the insn being output, to pass to error_for_asm. */ | |
154 | static rtx this_is_asm_operands; | |
155 | ||
156 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 157 | static unsigned int insn_noperands; |
3cf2715d DE |
158 | |
159 | /* Compare optimization flag. */ | |
160 | ||
161 | static rtx last_ignored_compare = 0; | |
162 | ||
163 | /* Flag indicating this insn is the start of a new basic block. */ | |
164 | ||
165 | static int new_block = 1; | |
166 | ||
3cf2715d DE |
167 | /* Assign a unique number to each insn that is output. |
168 | This can be used to generate unique local labels. */ | |
169 | ||
170 | static int insn_counter = 0; | |
171 | ||
172 | #ifdef HAVE_cc0 | |
173 | /* This variable contains machine-dependent flags (defined in tm.h) | |
174 | set and examined by output routines | |
175 | that describe how to interpret the condition codes properly. */ | |
176 | ||
177 | CC_STATUS cc_status; | |
178 | ||
179 | /* During output of an insn, this contains a copy of cc_status | |
180 | from before the insn. */ | |
181 | ||
182 | CC_STATUS cc_prev_status; | |
183 | #endif | |
184 | ||
185 | /* Indexed by hardware reg number, is 1 if that register is ever | |
186 | used in the current function. | |
187 | ||
188 | In life_analysis, or in stupid_life_analysis, this is set | |
189 | up to record the hard regs used explicitly. Reload adds | |
190 | in the hard regs used for holding pseudo regs. Final uses | |
191 | it to generate the code in the function prologue and epilogue | |
192 | to save and restore registers as needed. */ | |
193 | ||
194 | char regs_ever_live[FIRST_PSEUDO_REGISTER]; | |
195 | ||
196 | /* Nonzero means current function must be given a frame pointer. | |
197 | Set in stmt.c if anything is allocated on the stack there. | |
198 | Set in reload1.c if anything is allocated on the stack there. */ | |
199 | ||
200 | int frame_pointer_needed; | |
201 | ||
8480e480 CC |
202 | /* Assign unique numbers to labels generated for profiling. */ |
203 | ||
204 | int profile_label_no; | |
205 | ||
18c038b9 | 206 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
207 | |
208 | static int block_depth; | |
209 | ||
210 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
211 | ||
212 | static int app_on; | |
213 | ||
214 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
215 | Zero otherwise. */ | |
216 | ||
217 | rtx final_sequence; | |
218 | ||
219 | #ifdef ASSEMBLER_DIALECT | |
220 | ||
221 | /* Number of the assembler dialect to use, starting at 0. */ | |
222 | static int dialect_number; | |
223 | #endif | |
224 | ||
225 | /* Indexed by line number, nonzero if there is a note for that line. */ | |
226 | ||
227 | static char *line_note_exists; | |
228 | ||
afe48e06 RH |
229 | #ifdef HAVE_conditional_execution |
230 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ | |
231 | rtx current_insn_predicate; | |
232 | #endif | |
233 | ||
3cf2715d DE |
234 | /* Linked list to hold line numbers for each basic block. */ |
235 | ||
f5d927c0 KH |
236 | struct bb_list |
237 | { | |
3cf2715d DE |
238 | struct bb_list *next; /* pointer to next basic block */ |
239 | int line_num; /* line number */ | |
240 | int file_label_num; /* LPBC<n> label # for stored filename */ | |
241 | int func_label_num; /* LPBC<n> label # for stored function name */ | |
242 | }; | |
243 | ||
244 | static struct bb_list *bb_head = 0; /* Head of basic block list */ | |
245 | static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */ | |
246 | static int bb_file_label_num = -1; /* Current label # for file */ | |
247 | static int bb_func_label_num = -1; /* Current label # for func */ | |
248 | ||
249 | /* Linked list to hold the strings for each file and function name output. */ | |
250 | ||
f5d927c0 KH |
251 | struct bb_str |
252 | { | |
3cf2715d | 253 | struct bb_str *next; /* pointer to next string */ |
9b3142b3 | 254 | const char *string; /* string */ |
3cf2715d DE |
255 | int label_num; /* label number */ |
256 | int length; /* string length */ | |
257 | }; | |
258 | ||
3cf2715d DE |
259 | static struct bb_str *sbb_head = 0; /* Head of string list. */ |
260 | static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */ | |
261 | static int sbb_label_num = 0; /* Last label used */ | |
262 | ||
1d300e19 | 263 | #ifdef HAVE_ATTR_length |
711d877c KG |
264 | static int asm_insn_count PARAMS ((rtx)); |
265 | #endif | |
266 | static void profile_function PARAMS ((FILE *)); | |
267 | static void profile_after_prologue PARAMS ((FILE *)); | |
268 | static void add_bb PARAMS ((FILE *)); | |
269 | static int add_bb_string PARAMS ((const char *, int)); | |
270 | static void output_source_line PARAMS ((FILE *, rtx)); | |
271 | static rtx walk_alter_subreg PARAMS ((rtx)); | |
272 | static void output_asm_name PARAMS ((void)); | |
273 | static void output_operand PARAMS ((rtx, int)); | |
e9a25f70 | 274 | #ifdef LEAF_REGISTERS |
711d877c | 275 | static void leaf_renumber_regs PARAMS ((rtx)); |
e9a25f70 JL |
276 | #endif |
277 | #ifdef HAVE_cc0 | |
711d877c | 278 | static int alter_cond PARAMS ((rtx)); |
e9a25f70 | 279 | #endif |
ca3075bd | 280 | #ifndef ADDR_VEC_ALIGN |
711d877c | 281 | static int final_addr_vec_align PARAMS ((rtx)); |
ca3075bd | 282 | #endif |
7bdb32b9 | 283 | #ifdef HAVE_ATTR_length |
711d877c | 284 | static int align_fuzz PARAMS ((rtx, rtx, int, unsigned)); |
7bdb32b9 | 285 | #endif |
3cf2715d DE |
286 | \f |
287 | /* Initialize data in final at the beginning of a compilation. */ | |
288 | ||
289 | void | |
290 | init_final (filename) | |
6a651371 | 291 | const char *filename ATTRIBUTE_UNUSED; |
3cf2715d | 292 | { |
3cf2715d | 293 | app_on = 0; |
3cf2715d DE |
294 | final_sequence = 0; |
295 | ||
296 | #ifdef ASSEMBLER_DIALECT | |
297 | dialect_number = ASSEMBLER_DIALECT; | |
298 | #endif | |
299 | } | |
300 | ||
301 | /* Called at end of source file, | |
302 | to output the block-profiling table for this entire compilation. */ | |
303 | ||
304 | void | |
305 | end_final (filename) | |
f5d927c0 | 306 | const char *filename; |
3cf2715d DE |
307 | { |
308 | int i; | |
309 | ||
9e2f9a7f | 310 | if (profile_block_flag || profile_arc_flag) |
3cf2715d DE |
311 | { |
312 | char name[20]; | |
313 | int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
9e2f9a7f | 314 | int size, rounded; |
3cf2715d DE |
315 | struct bb_list *ptr; |
316 | struct bb_str *sptr; | |
9e2f9a7f DE |
317 | int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT; |
318 | int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT; | |
319 | ||
320 | if (profile_block_flag) | |
321 | size = long_bytes * count_basic_blocks; | |
322 | else | |
51891abe | 323 | size = long_bytes * count_instrumented_edges; |
9e2f9a7f | 324 | rounded = size; |
3cf2715d DE |
325 | |
326 | rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; | |
327 | rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
328 | * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); | |
329 | ||
330 | data_section (); | |
331 | ||
47431dff RK |
332 | /* Output the main header, of 11 words: |
333 | 0: 1 if this file is initialized, else 0. | |
3cf2715d DE |
334 | 1: address of file name (LPBX1). |
335 | 2: address of table of counts (LPBX2). | |
336 | 3: number of counts in the table. | |
337 | 4: always 0, for compatibility with Sun. | |
338 | ||
339 | The following are GNU extensions: | |
340 | ||
341 | 5: address of table of start addrs of basic blocks (LPBX3). | |
342 | 6: Number of bytes in this header. | |
343 | 7: address of table of function names (LPBX4). | |
344 | 8: address of table of line numbers (LPBX5) or 0. | |
47431dff | 345 | 9: address of table of file names (LPBX6) or 0. |
0f41302f | 346 | 10: space reserved for basic block profiling. */ |
3cf2715d DE |
347 | |
348 | ASM_OUTPUT_ALIGN (asm_out_file, align); | |
349 | ||
350 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0); | |
351 | /* zero word */ | |
9e2f9a7f | 352 | assemble_integer (const0_rtx, long_bytes, 1); |
3cf2715d DE |
353 | |
354 | /* address of filename */ | |
355 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1); | |
38a448ca | 356 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1); |
3cf2715d DE |
357 | |
358 | /* address of count table */ | |
359 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2); | |
38a448ca | 360 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1); |
3cf2715d | 361 | |
9e2f9a7f DE |
362 | /* count of the # of basic blocks or # of instrumented arcs */ |
363 | if (profile_block_flag) | |
364 | assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1); | |
365 | else | |
51891abe | 366 | assemble_integer (GEN_INT (count_instrumented_edges), long_bytes, 1); |
3cf2715d DE |
367 | |
368 | /* zero word (link field) */ | |
9e2f9a7f | 369 | assemble_integer (const0_rtx, pointer_bytes, 1); |
3cf2715d DE |
370 | |
371 | /* address of basic block start address table */ | |
9e2f9a7f DE |
372 | if (profile_block_flag) |
373 | { | |
374 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3); | |
38a448ca | 375 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, |
9e2f9a7f DE |
376 | 1); |
377 | } | |
378 | else | |
379 | assemble_integer (const0_rtx, pointer_bytes, 1); | |
3cf2715d DE |
380 | |
381 | /* byte count for extended structure. */ | |
d7502074 | 382 | assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1); |
3cf2715d DE |
383 | |
384 | /* address of function name table */ | |
9e2f9a7f DE |
385 | if (profile_block_flag) |
386 | { | |
387 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4); | |
38a448ca | 388 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, |
9e2f9a7f DE |
389 | 1); |
390 | } | |
391 | else | |
392 | assemble_integer (const0_rtx, pointer_bytes, 1); | |
3cf2715d DE |
393 | |
394 | /* address of line number and filename tables if debugging. */ | |
9e2f9a7f | 395 | if (write_symbols != NO_DEBUG && profile_block_flag) |
3cf2715d DE |
396 | { |
397 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5); | |
c5c76735 JL |
398 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
399 | pointer_bytes, 1); | |
3cf2715d | 400 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6); |
c5c76735 JL |
401 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
402 | pointer_bytes, 1); | |
3cf2715d DE |
403 | } |
404 | else | |
405 | { | |
9e2f9a7f DE |
406 | assemble_integer (const0_rtx, pointer_bytes, 1); |
407 | assemble_integer (const0_rtx, pointer_bytes, 1); | |
3cf2715d DE |
408 | } |
409 | ||
47431dff RK |
410 | /* space for extension ptr (link field) */ |
411 | assemble_integer (const0_rtx, UNITS_PER_WORD, 1); | |
412 | ||
3cf2715d DE |
413 | /* Output the file name changing the suffix to .d for Sun tcov |
414 | compatibility. */ | |
415 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1); | |
416 | { | |
67e23d2f JW |
417 | char *cwd = getpwd (); |
418 | int len = strlen (filename) + strlen (cwd) + 1; | |
419 | char *data_file = (char *) alloca (len + 4); | |
420 | ||
421 | strcpy (data_file, cwd); | |
422 | strcat (data_file, "/"); | |
423 | strcat (data_file, filename); | |
3cf2715d | 424 | strip_off_ending (data_file, len); |
9e2f9a7f DE |
425 | if (profile_block_flag) |
426 | strcat (data_file, ".d"); | |
427 | else | |
428 | strcat (data_file, ".da"); | |
3cf2715d DE |
429 | assemble_string (data_file, strlen (data_file) + 1); |
430 | } | |
431 | ||
432 | /* Make space for the table of counts. */ | |
2786cbad | 433 | if (size == 0) |
3cf2715d DE |
434 | { |
435 | /* Realign data section. */ | |
436 | ASM_OUTPUT_ALIGN (asm_out_file, align); | |
437 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2); | |
438 | if (size != 0) | |
439 | assemble_zeros (size); | |
440 | } | |
441 | else | |
442 | { | |
443 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2); | |
444 | #ifdef ASM_OUTPUT_SHARED_LOCAL | |
445 | if (flag_shared_data) | |
446 | ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded); | |
447 | else | |
448 | #endif | |
e9a25f70 | 449 | #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL |
f5d927c0 KH |
450 | ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, |
451 | size, BIGGEST_ALIGNMENT); | |
e9a25f70 | 452 | #else |
3cf2715d DE |
453 | #ifdef ASM_OUTPUT_ALIGNED_LOCAL |
454 | ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size, | |
455 | BIGGEST_ALIGNMENT); | |
456 | #else | |
457 | ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded); | |
e9a25f70 | 458 | #endif |
3cf2715d DE |
459 | #endif |
460 | } | |
461 | ||
462 | /* Output any basic block strings */ | |
9e2f9a7f | 463 | if (profile_block_flag) |
3cf2715d | 464 | { |
9e2f9a7f DE |
465 | readonly_data_section (); |
466 | if (sbb_head) | |
3cf2715d | 467 | { |
9e2f9a7f DE |
468 | ASM_OUTPUT_ALIGN (asm_out_file, align); |
469 | for (sptr = sbb_head; sptr != 0; sptr = sptr->next) | |
470 | { | |
471 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC", | |
472 | sptr->label_num); | |
473 | assemble_string (sptr->string, sptr->length); | |
474 | } | |
3cf2715d DE |
475 | } |
476 | } | |
477 | ||
478 | /* Output the table of addresses. */ | |
9e2f9a7f | 479 | if (profile_block_flag) |
3cf2715d | 480 | { |
9e2f9a7f DE |
481 | /* Realign in new section */ |
482 | ASM_OUTPUT_ALIGN (asm_out_file, align); | |
483 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3); | |
484 | for (i = 0; i < count_basic_blocks; i++) | |
485 | { | |
486 | ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i); | |
38a448ca | 487 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
9e2f9a7f DE |
488 | pointer_bytes, 1); |
489 | } | |
3cf2715d DE |
490 | } |
491 | ||
492 | /* Output the table of function names. */ | |
9e2f9a7f | 493 | if (profile_block_flag) |
3cf2715d | 494 | { |
9e2f9a7f DE |
495 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4); |
496 | for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++) | |
3cf2715d | 497 | { |
9e2f9a7f DE |
498 | if (ptr->func_label_num >= 0) |
499 | { | |
500 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBC", | |
501 | ptr->func_label_num); | |
38a448ca | 502 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
9e2f9a7f DE |
503 | pointer_bytes, 1); |
504 | } | |
505 | else | |
506 | assemble_integer (const0_rtx, pointer_bytes, 1); | |
3cf2715d | 507 | } |
3cf2715d | 508 | |
f5d927c0 | 509 | for (; i < count_basic_blocks; i++) |
9e2f9a7f DE |
510 | assemble_integer (const0_rtx, pointer_bytes, 1); |
511 | } | |
3cf2715d | 512 | |
9e2f9a7f | 513 | if (write_symbols != NO_DEBUG && profile_block_flag) |
3cf2715d DE |
514 | { |
515 | /* Output the table of line numbers. */ | |
516 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5); | |
517 | for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++) | |
9e2f9a7f | 518 | assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1); |
3cf2715d | 519 | |
f5d927c0 | 520 | for (; i < count_basic_blocks; i++) |
9e2f9a7f | 521 | assemble_integer (const0_rtx, long_bytes, 1); |
3cf2715d DE |
522 | |
523 | /* Output the table of file names. */ | |
524 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6); | |
525 | for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++) | |
526 | { | |
527 | if (ptr->file_label_num >= 0) | |
528 | { | |
9e2f9a7f DE |
529 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBC", |
530 | ptr->file_label_num); | |
38a448ca | 531 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
9e2f9a7f | 532 | pointer_bytes, 1); |
3cf2715d DE |
533 | } |
534 | else | |
9e2f9a7f | 535 | assemble_integer (const0_rtx, pointer_bytes, 1); |
3cf2715d DE |
536 | } |
537 | ||
f5d927c0 | 538 | for (; i < count_basic_blocks; i++) |
9e2f9a7f | 539 | assemble_integer (const0_rtx, pointer_bytes, 1); |
3cf2715d DE |
540 | } |
541 | ||
542 | /* End with the address of the table of addresses, | |
543 | so we can find it easily, as the last word in the file's text. */ | |
9e2f9a7f DE |
544 | if (profile_block_flag) |
545 | { | |
546 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3); | |
38a448ca | 547 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, |
9e2f9a7f DE |
548 | 1); |
549 | } | |
3cf2715d DE |
550 | } |
551 | } | |
552 | ||
553 | /* Enable APP processing of subsequent output. | |
554 | Used before the output from an `asm' statement. */ | |
555 | ||
556 | void | |
557 | app_enable () | |
558 | { | |
559 | if (! app_on) | |
560 | { | |
51723711 | 561 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
562 | app_on = 1; |
563 | } | |
564 | } | |
565 | ||
566 | /* Disable APP processing of subsequent output. | |
567 | Called from varasm.c before most kinds of output. */ | |
568 | ||
569 | void | |
570 | app_disable () | |
571 | { | |
572 | if (app_on) | |
573 | { | |
51723711 | 574 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
575 | app_on = 0; |
576 | } | |
577 | } | |
578 | \f | |
f5d927c0 | 579 | /* Return the number of slots filled in the current |
3cf2715d DE |
580 | delayed branch sequence (we don't count the insn needing the |
581 | delay slot). Zero if not in a delayed branch sequence. */ | |
582 | ||
583 | #ifdef DELAY_SLOTS | |
584 | int | |
585 | dbr_sequence_length () | |
586 | { | |
587 | if (final_sequence != 0) | |
588 | return XVECLEN (final_sequence, 0) - 1; | |
589 | else | |
590 | return 0; | |
591 | } | |
592 | #endif | |
593 | \f | |
594 | /* The next two pages contain routines used to compute the length of an insn | |
595 | and to shorten branches. */ | |
596 | ||
597 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
598 | `insn_current_length'. */ | |
599 | ||
600 | static short *insn_lengths; | |
9d98a694 AO |
601 | |
602 | #ifdef HAVE_ATTR_length | |
603 | varray_type insn_addresses_; | |
604 | #endif | |
3cf2715d | 605 | |
ea3cbda5 R |
606 | /* Max uid for which the above arrays are valid. */ |
607 | static int insn_lengths_max_uid; | |
608 | ||
3cf2715d DE |
609 | /* Address of insn being processed. Used by `insn_current_length'. */ |
610 | int insn_current_address; | |
611 | ||
fc470718 R |
612 | /* Address of insn being processed in previous iteration. */ |
613 | int insn_last_address; | |
614 | ||
615 | /* konwn invariant alignment of insn being processed. */ | |
616 | int insn_current_align; | |
617 | ||
95707627 R |
618 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
619 | gives the next following alignment insn that increases the known | |
620 | alignment, or NULL_RTX if there is no such insn. | |
621 | For any alignment obtained this way, we can again index uid_align with | |
622 | its uid to obtain the next following align that in turn increases the | |
623 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
624 | for each insn we'll call the alignment chain of this insn in the following | |
625 | comments. */ | |
626 | ||
f5d927c0 KH |
627 | struct label_alignment |
628 | { | |
9e423e6d JW |
629 | short alignment; |
630 | short max_skip; | |
631 | }; | |
632 | ||
633 | static rtx *uid_align; | |
634 | static int *uid_shuid; | |
635 | static struct label_alignment *label_align; | |
95707627 | 636 | |
3cf2715d DE |
637 | /* Indicate that branch shortening hasn't yet been done. */ |
638 | ||
639 | void | |
640 | init_insn_lengths () | |
641 | { | |
95707627 R |
642 | if (label_align) |
643 | { | |
644 | free (label_align); | |
645 | label_align = 0; | |
646 | } | |
647 | if (uid_shuid) | |
648 | { | |
649 | free (uid_shuid); | |
650 | uid_shuid = 0; | |
651 | } | |
652 | if (insn_lengths) | |
653 | { | |
654 | free (insn_lengths); | |
655 | insn_lengths = 0; | |
ea3cbda5 | 656 | insn_lengths_max_uid = 0; |
95707627 | 657 | } |
9d98a694 AO |
658 | #ifdef HAVE_ATTR_length |
659 | INSN_ADDRESSES_FREE (); | |
660 | #endif | |
95707627 R |
661 | if (uid_align) |
662 | { | |
663 | free (uid_align); | |
664 | uid_align = 0; | |
665 | } | |
3cf2715d DE |
666 | } |
667 | ||
668 | /* Obtain the current length of an insn. If branch shortening has been done, | |
669 | get its actual length. Otherwise, get its maximum length. */ | |
670 | ||
671 | int | |
672 | get_attr_length (insn) | |
7bdb32b9 | 673 | rtx insn ATTRIBUTE_UNUSED; |
3cf2715d DE |
674 | { |
675 | #ifdef HAVE_ATTR_length | |
676 | rtx body; | |
677 | int i; | |
678 | int length = 0; | |
679 | ||
ea3cbda5 | 680 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
681 | return insn_lengths[INSN_UID (insn)]; |
682 | else | |
683 | switch (GET_CODE (insn)) | |
684 | { | |
685 | case NOTE: | |
686 | case BARRIER: | |
687 | case CODE_LABEL: | |
688 | return 0; | |
689 | ||
690 | case CALL_INSN: | |
691 | length = insn_default_length (insn); | |
692 | break; | |
693 | ||
694 | case JUMP_INSN: | |
695 | body = PATTERN (insn); | |
696 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
697 | { | |
fc470718 R |
698 | /* Alignment is machine-dependent and should be handled by |
699 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
700 | } |
701 | else | |
702 | length = insn_default_length (insn); | |
703 | break; | |
704 | ||
705 | case INSN: | |
706 | body = PATTERN (insn); | |
707 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
708 | return 0; | |
709 | ||
710 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
711 | length = asm_insn_count (body) * insn_default_length (insn); | |
712 | else if (GET_CODE (body) == SEQUENCE) | |
713 | for (i = 0; i < XVECLEN (body, 0); i++) | |
714 | length += get_attr_length (XVECEXP (body, 0, i)); | |
715 | else | |
716 | length = insn_default_length (insn); | |
e9a25f70 JL |
717 | break; |
718 | ||
719 | default: | |
720 | break; | |
3cf2715d DE |
721 | } |
722 | ||
723 | #ifdef ADJUST_INSN_LENGTH | |
724 | ADJUST_INSN_LENGTH (insn, length); | |
725 | #endif | |
726 | return length; | |
727 | #else /* not HAVE_ATTR_length */ | |
728 | return 0; | |
729 | #endif /* not HAVE_ATTR_length */ | |
730 | } | |
731 | \f | |
fc470718 R |
732 | /* Code to handle alignment inside shorten_branches. */ |
733 | ||
734 | /* Here is an explanation how the algorithm in align_fuzz can give | |
735 | proper results: | |
736 | ||
737 | Call a sequence of instructions beginning with alignment point X | |
738 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 739 | is used in an expression, it means the alignment value of the |
fc470718 | 740 | alignment point. |
f5d927c0 | 741 | |
fc470718 R |
742 | Call the distance between the start of the first insn of block X, and |
743 | the end of the last insn of block X `IX', for the `inner size of X'. | |
744 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 745 | |
fc470718 R |
746 | Likewise with the next alignment-delimited block following X, which we |
747 | shall call block Y. | |
f5d927c0 | 748 | |
fc470718 R |
749 | Call the distance between the start of the first insn of block X, and |
750 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 751 | |
fc470718 | 752 | The estimated padding is then OX - IX. |
f5d927c0 | 753 | |
fc470718 | 754 | OX can be safely estimated as |
f5d927c0 | 755 | |
fc470718 R |
756 | if (X >= Y) |
757 | OX = round_up(IX, Y) | |
758 | else | |
759 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 760 | |
fc470718 R |
761 | Clearly est(IX) >= real(IX), because that only depends on the |
762 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 763 | |
fc470718 R |
764 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
765 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 766 | |
fc470718 R |
767 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
768 | for branch ranges starting before X, so we can just round what we have. | |
769 | But when X < Y, we don't know anything about the, so to speak, | |
770 | `middle bits', so we have to assume the worst when aligning up from an | |
771 | address mod X to one mod Y, which is Y - X. */ | |
772 | ||
773 | #ifndef LABEL_ALIGN | |
efa3896a | 774 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
775 | #endif |
776 | ||
9e423e6d | 777 | #ifndef LABEL_ALIGN_MAX_SKIP |
efa3896a | 778 | #define LABEL_ALIGN_MAX_SKIP (align_labels-1) |
9e423e6d JW |
779 | #endif |
780 | ||
fc470718 | 781 | #ifndef LOOP_ALIGN |
efa3896a | 782 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
783 | #endif |
784 | ||
9e423e6d | 785 | #ifndef LOOP_ALIGN_MAX_SKIP |
efa3896a | 786 | #define LOOP_ALIGN_MAX_SKIP (align_loops-1) |
9e423e6d JW |
787 | #endif |
788 | ||
fc470718 | 789 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
efa3896a | 790 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log |
fc470718 R |
791 | #endif |
792 | ||
9e423e6d | 793 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
efa3896a | 794 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1) |
9e423e6d JW |
795 | #endif |
796 | ||
fc470718 | 797 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 798 | static int |
fc470718 R |
799 | final_addr_vec_align (addr_vec) |
800 | rtx addr_vec; | |
801 | { | |
2a841588 | 802 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
803 | |
804 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
805 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 806 | return exact_log2 (align); |
fc470718 R |
807 | |
808 | } | |
f5d927c0 | 809 | |
fc470718 R |
810 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
811 | #endif | |
812 | ||
813 | #ifndef INSN_LENGTH_ALIGNMENT | |
814 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
815 | #endif | |
816 | ||
fc470718 R |
817 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
818 | ||
de7987a6 | 819 | static int min_labelno, max_labelno; |
fc470718 R |
820 | |
821 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
822 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
823 | ||
824 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
825 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
826 | |
827 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 828 | |
fc470718 R |
829 | int |
830 | label_to_alignment (label) | |
831 | rtx label; | |
832 | { | |
833 | return LABEL_TO_ALIGNMENT (label); | |
834 | } | |
835 | ||
836 | #ifdef HAVE_ATTR_length | |
837 | /* The differences in addresses | |
838 | between a branch and its target might grow or shrink depending on | |
839 | the alignment the start insn of the range (the branch for a forward | |
840 | branch or the label for a backward branch) starts out on; if these | |
841 | differences are used naively, they can even oscillate infinitely. | |
842 | We therefore want to compute a 'worst case' address difference that | |
843 | is independent of the alignment the start insn of the range end | |
844 | up on, and that is at least as large as the actual difference. | |
845 | The function align_fuzz calculates the amount we have to add to the | |
846 | naively computed difference, by traversing the part of the alignment | |
847 | chain of the start insn of the range that is in front of the end insn | |
848 | of the range, and considering for each alignment the maximum amount | |
849 | that it might contribute to a size increase. | |
850 | ||
851 | For casesi tables, we also want to know worst case minimum amounts of | |
852 | address difference, in case a machine description wants to introduce | |
853 | some common offset that is added to all offsets in a table. | |
854 | For this purpose, align_fuzz with a growth argument of 0 comuptes the | |
855 | appropriate adjustment. */ | |
856 | ||
fc470718 R |
857 | /* Compute the maximum delta by which the difference of the addresses of |
858 | START and END might grow / shrink due to a different address for start | |
859 | which changes the size of alignment insns between START and END. | |
860 | KNOWN_ALIGN_LOG is the alignment known for START. | |
861 | GROWTH should be ~0 if the objective is to compute potential code size | |
862 | increase, and 0 if the objective is to compute potential shrink. | |
863 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 864 | |
ca3075bd | 865 | static int |
687d0ab6 | 866 | align_fuzz (start, end, known_align_log, growth) |
fc470718 R |
867 | rtx start, end; |
868 | int known_align_log; | |
869 | unsigned growth; | |
870 | { | |
871 | int uid = INSN_UID (start); | |
872 | rtx align_label; | |
873 | int known_align = 1 << known_align_log; | |
874 | int end_shuid = INSN_SHUID (end); | |
875 | int fuzz = 0; | |
876 | ||
877 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
878 | { | |
879 | int align_addr, new_align; | |
880 | ||
881 | uid = INSN_UID (align_label); | |
9d98a694 | 882 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
883 | if (uid_shuid[uid] > end_shuid) |
884 | break; | |
885 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
886 | new_align = 1 << known_align_log; | |
887 | if (new_align < known_align) | |
888 | continue; | |
889 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
890 | known_align = new_align; | |
891 | } | |
892 | return fuzz; | |
893 | } | |
894 | ||
895 | /* Compute a worst-case reference address of a branch so that it | |
896 | can be safely used in the presence of aligned labels. Since the | |
897 | size of the branch itself is unknown, the size of the branch is | |
898 | not included in the range. I.e. for a forward branch, the reference | |
899 | address is the end address of the branch as known from the previous | |
900 | branch shortening pass, minus a value to account for possible size | |
901 | increase due to alignment. For a backward branch, it is the start | |
902 | address of the branch as known from the current pass, plus a value | |
903 | to account for possible size increase due to alignment. | |
904 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
905 | to exclude the branch size. */ | |
f5d927c0 | 906 | |
fc470718 R |
907 | int |
908 | insn_current_reference_address (branch) | |
909 | rtx branch; | |
910 | { | |
5527bf14 RH |
911 | rtx dest, seq; |
912 | int seq_uid; | |
913 | ||
914 | if (! INSN_ADDRESSES_SET_P ()) | |
915 | return 0; | |
916 | ||
917 | seq = NEXT_INSN (PREV_INSN (branch)); | |
918 | seq_uid = INSN_UID (seq); | |
fc470718 R |
919 | if (GET_CODE (branch) != JUMP_INSN) |
920 | /* This can happen for example on the PA; the objective is to know the | |
921 | offset to address something in front of the start of the function. | |
922 | Thus, we can treat it like a backward branch. | |
923 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
924 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
925 | return insn_current_address; | |
926 | dest = JUMP_LABEL (branch); | |
5527bf14 | 927 | |
afc6898e BS |
928 | /* BRANCH has no proper alignment chain set, so use SEQ. |
929 | BRANCH also has no INSN_SHUID. */ | |
930 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 931 | { |
f5d927c0 | 932 | /* Forward branch. */ |
fc470718 | 933 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 934 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
935 | } |
936 | else | |
937 | { | |
f5d927c0 | 938 | /* Backward branch. */ |
fc470718 | 939 | return (insn_current_address |
923f7cf9 | 940 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
941 | } |
942 | } | |
943 | #endif /* HAVE_ATTR_length */ | |
944 | \f | |
3cf2715d DE |
945 | /* Make a pass over all insns and compute their actual lengths by shortening |
946 | any branches of variable length if possible. */ | |
947 | ||
948 | /* Give a default value for the lowest address in a function. */ | |
949 | ||
950 | #ifndef FIRST_INSN_ADDRESS | |
951 | #define FIRST_INSN_ADDRESS 0 | |
952 | #endif | |
953 | ||
fc470718 R |
954 | /* shorten_branches might be called multiple times: for example, the SH |
955 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
956 | In order to do this, it needs proper length information, which it obtains | |
957 | by calling shorten_branches. This cannot be collapsed with | |
958 | shorten_branches itself into a single pass unless we also want to intergate | |
959 | reorg.c, since the branch splitting exposes new instructions with delay | |
960 | slots. */ | |
961 | ||
3cf2715d DE |
962 | void |
963 | shorten_branches (first) | |
7bdb32b9 | 964 | rtx first ATTRIBUTE_UNUSED; |
3cf2715d | 965 | { |
3cf2715d | 966 | rtx insn; |
fc470718 R |
967 | int max_uid; |
968 | int i; | |
fc470718 | 969 | int max_log; |
9e423e6d | 970 | int max_skip; |
fc470718 R |
971 | #ifdef HAVE_ATTR_length |
972 | #define MAX_CODE_ALIGN 16 | |
973 | rtx seq; | |
3cf2715d | 974 | int something_changed = 1; |
3cf2715d DE |
975 | char *varying_length; |
976 | rtx body; | |
977 | int uid; | |
fc470718 | 978 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 979 | |
3d14e82f JW |
980 | /* In order to make sure that all instructions have valid length info, |
981 | we must split them before we compute the address/length info. */ | |
982 | ||
983 | for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 984 | if (INSN_P (insn)) |
fc470718 R |
985 | { |
986 | rtx old = insn; | |
1b4d9ecd RE |
987 | /* Don't split the insn if it has been deleted. */ |
988 | if (! INSN_DELETED_P (old)) | |
989 | insn = try_split (PATTERN (old), old, 1); | |
fc470718 R |
990 | /* When not optimizing, the old insn will be still left around |
991 | with only the 'deleted' bit set. Transform it into a note | |
992 | to avoid confusion of subsequent processing. */ | |
993 | if (INSN_DELETED_P (old)) | |
f5d927c0 KH |
994 | { |
995 | PUT_CODE (old, NOTE); | |
996 | NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED; | |
997 | NOTE_SOURCE_FILE (old) = 0; | |
998 | } | |
fc470718 R |
999 | } |
1000 | #endif | |
3d14e82f | 1001 | |
fc470718 R |
1002 | /* We must do some computations even when not actually shortening, in |
1003 | order to get the alignment information for the labels. */ | |
1004 | ||
95707627 R |
1005 | init_insn_lengths (); |
1006 | ||
fc470718 R |
1007 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
1008 | max_uid = get_max_uid (); | |
1009 | ||
1010 | max_labelno = max_label_num (); | |
1011 | min_labelno = get_first_label_num (); | |
d0f3d9c2 | 1012 | label_align = (struct label_alignment *) |
3de90026 | 1013 | xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment)); |
fc470718 | 1014 | |
fc470718 R |
1015 | uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid); |
1016 | ||
1017 | /* Initialize label_align and set up uid_shuid to be strictly | |
1018 | monotonically rising with insn order. */ | |
e2faec75 R |
1019 | /* We use max_log here to keep track of the maximum alignment we want to |
1020 | impose on the next CODE_LABEL (or the current one if we are processing | |
1021 | the CODE_LABEL itself). */ | |
f5d927c0 | 1022 | |
9e423e6d JW |
1023 | max_log = 0; |
1024 | max_skip = 0; | |
1025 | ||
1026 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
1027 | { |
1028 | int log; | |
1029 | ||
1030 | INSN_SHUID (insn) = i++; | |
2c3c49de | 1031 | if (INSN_P (insn)) |
e2faec75 R |
1032 | { |
1033 | /* reorg might make the first insn of a loop being run once only, | |
1034 | and delete the label in front of it. Then we want to apply | |
1035 | the loop alignment to the new label created by reorg, which | |
1036 | is separated by the former loop start insn from the | |
1037 | NOTE_INSN_LOOP_BEG. */ | |
1038 | } | |
fc470718 R |
1039 | else if (GET_CODE (insn) == CODE_LABEL) |
1040 | { | |
1041 | rtx next; | |
1042 | ||
1043 | log = LABEL_ALIGN (insn); | |
1044 | if (max_log < log) | |
9e423e6d JW |
1045 | { |
1046 | max_log = log; | |
1047 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
1048 | } | |
fc470718 | 1049 | next = NEXT_INSN (insn); |
75197b37 BS |
1050 | /* ADDR_VECs only take room if read-only data goes into the text |
1051 | section. */ | |
1052 | if (JUMP_TABLES_IN_TEXT_SECTION | |
1053 | #if !defined(READONLY_DATA_SECTION) | |
1054 | || 1 | |
fc470718 | 1055 | #endif |
75197b37 BS |
1056 | ) |
1057 | if (next && GET_CODE (next) == JUMP_INSN) | |
1058 | { | |
1059 | rtx nextbody = PATTERN (next); | |
1060 | if (GET_CODE (nextbody) == ADDR_VEC | |
1061 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
1062 | { | |
1063 | log = ADDR_VEC_ALIGN (next); | |
1064 | if (max_log < log) | |
1065 | { | |
1066 | max_log = log; | |
1067 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
1068 | } | |
1069 | } | |
1070 | } | |
fc470718 | 1071 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 1072 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 1073 | max_log = 0; |
9e423e6d | 1074 | max_skip = 0; |
fc470718 R |
1075 | } |
1076 | else if (GET_CODE (insn) == BARRIER) | |
1077 | { | |
1078 | rtx label; | |
1079 | ||
2c3c49de | 1080 | for (label = insn; label && ! INSN_P (label); |
fc470718 R |
1081 | label = NEXT_INSN (label)) |
1082 | if (GET_CODE (label) == CODE_LABEL) | |
1083 | { | |
1084 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
1085 | if (max_log < log) | |
9e423e6d JW |
1086 | { |
1087 | max_log = log; | |
1088 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
1089 | } | |
fc470718 R |
1090 | break; |
1091 | } | |
1092 | } | |
e2faec75 R |
1093 | /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL |
1094 | sequences in order to handle reorg output efficiently. */ | |
fc470718 R |
1095 | else if (GET_CODE (insn) == NOTE |
1096 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
1097 | { | |
1098 | rtx label; | |
edd6ede7 | 1099 | int nest = 0; |
fc470718 | 1100 | |
edd6ede7 R |
1101 | /* Search for the label that starts the loop. |
1102 | Don't skip past the end of the loop, since that could | |
1103 | lead to putting an alignment where it does not belong. | |
1104 | However, a label after a nested (non-)loop would be OK. */ | |
e2faec75 | 1105 | for (label = insn; label; label = NEXT_INSN (label)) |
edd6ede7 R |
1106 | { |
1107 | if (GET_CODE (label) == NOTE | |
1108 | && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG) | |
1109 | nest++; | |
1110 | else if (GET_CODE (label) == NOTE | |
1111 | && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END | |
1112 | && --nest == 0) | |
fc470718 | 1113 | break; |
edd6ede7 R |
1114 | else if (GET_CODE (label) == CODE_LABEL) |
1115 | { | |
2148624a | 1116 | log = LOOP_ALIGN (label); |
edd6ede7 R |
1117 | if (max_log < log) |
1118 | { | |
1119 | max_log = log; | |
1120 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
1121 | } | |
1122 | break; | |
1123 | } | |
1124 | } | |
fc470718 R |
1125 | } |
1126 | else | |
1127 | continue; | |
1128 | } | |
1129 | #ifdef HAVE_ATTR_length | |
1130 | ||
1131 | /* Allocate the rest of the arrays. */ | |
fc470718 | 1132 | insn_lengths = (short *) xmalloc (max_uid * sizeof (short)); |
ea3cbda5 | 1133 | insn_lengths_max_uid = max_uid; |
af035616 R |
1134 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1135 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 1136 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1137 | |
3de90026 | 1138 | varying_length = (char *) xcalloc (max_uid, sizeof (char)); |
fc470718 R |
1139 | |
1140 | /* Initialize uid_align. We scan instructions | |
1141 | from end to start, and keep in align_tab[n] the last seen insn | |
1142 | that does an alignment of at least n+1, i.e. the successor | |
1143 | in the alignment chain for an insn that does / has a known | |
1144 | alignment of n. */ | |
3de90026 | 1145 | uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align); |
fc470718 | 1146 | |
f5d927c0 | 1147 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1148 | align_tab[i] = NULL_RTX; |
1149 | seq = get_last_insn (); | |
33f7f353 | 1150 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1151 | { |
1152 | int uid = INSN_UID (seq); | |
1153 | int log; | |
fc470718 R |
1154 | log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0); |
1155 | uid_align[uid] = align_tab[0]; | |
fc470718 R |
1156 | if (log) |
1157 | { | |
1158 | /* Found an alignment label. */ | |
1159 | uid_align[uid] = align_tab[log]; | |
1160 | for (i = log - 1; i >= 0; i--) | |
1161 | align_tab[i] = seq; | |
1162 | } | |
33f7f353 JR |
1163 | } |
1164 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1165 | if (optimize) | |
1166 | { | |
1167 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1168 | label fields. */ | |
1169 | ||
1170 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1171 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1172 | int rel; | |
1173 | ||
1174 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1175 | { |
33f7f353 JR |
1176 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1177 | int len, i, min, max, insn_shuid; | |
1178 | int min_align; | |
1179 | addr_diff_vec_flags flags; | |
1180 | ||
1181 | if (GET_CODE (insn) != JUMP_INSN | |
1182 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) | |
1183 | continue; | |
1184 | pat = PATTERN (insn); | |
1185 | len = XVECLEN (pat, 1); | |
1186 | if (len <= 0) | |
1187 | abort (); | |
1188 | min_align = MAX_CODE_ALIGN; | |
1189 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1190 | { | |
1191 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1192 | int shuid = INSN_SHUID (lab); | |
1193 | if (shuid < min) | |
1194 | { | |
1195 | min = shuid; | |
1196 | min_lab = lab; | |
1197 | } | |
1198 | if (shuid > max) | |
1199 | { | |
1200 | max = shuid; | |
1201 | max_lab = lab; | |
1202 | } | |
1203 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1204 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1205 | } | |
1206 | XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab); | |
1207 | XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab); | |
1208 | insn_shuid = INSN_SHUID (insn); | |
1209 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
1210 | flags.min_align = min_align; | |
1211 | flags.base_after_vec = rel > insn_shuid; | |
1212 | flags.min_after_vec = min > insn_shuid; | |
1213 | flags.max_after_vec = max > insn_shuid; | |
1214 | flags.min_after_base = min > rel; | |
1215 | flags.max_after_base = max > rel; | |
1216 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
1217 | } |
1218 | } | |
33f7f353 | 1219 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1220 | |
3cf2715d DE |
1221 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
1222 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; | |
1223 | insn != 0; | |
1224 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1225 | { | |
1226 | uid = INSN_UID (insn); | |
fc470718 | 1227 | |
3cf2715d | 1228 | insn_lengths[uid] = 0; |
fc470718 R |
1229 | |
1230 | if (GET_CODE (insn) == CODE_LABEL) | |
1231 | { | |
1232 | int log = LABEL_TO_ALIGNMENT (insn); | |
1233 | if (log) | |
1234 | { | |
1235 | int align = 1 << log; | |
ecb06768 | 1236 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1237 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1238 | } |
1239 | } | |
1240 | ||
9d98a694 | 1241 | INSN_ADDRESSES (uid) = insn_current_address; |
f5d927c0 | 1242 | |
3cf2715d DE |
1243 | if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER |
1244 | || GET_CODE (insn) == CODE_LABEL) | |
1245 | continue; | |
04da53bd R |
1246 | if (INSN_DELETED_P (insn)) |
1247 | continue; | |
3cf2715d DE |
1248 | |
1249 | body = PATTERN (insn); | |
1250 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1251 | { |
1252 | /* This only takes room if read-only data goes into the text | |
1253 | section. */ | |
75197b37 BS |
1254 | if (JUMP_TABLES_IN_TEXT_SECTION |
1255 | #if !defined(READONLY_DATA_SECTION) | |
1256 | || 1 | |
1257 | #endif | |
1258 | ) | |
1259 | insn_lengths[uid] = (XVECLEN (body, | |
1260 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1261 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1262 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1263 | } |
a30caf5c | 1264 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1265 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1266 | else if (GET_CODE (body) == SEQUENCE) | |
1267 | { | |
1268 | int i; | |
1269 | int const_delay_slots; | |
1270 | #ifdef DELAY_SLOTS | |
1271 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1272 | #else | |
1273 | const_delay_slots = 0; | |
1274 | #endif | |
1275 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1276 | if the shortening could change the number of delay slots | |
0f41302f | 1277 | of the branch. */ |
3cf2715d DE |
1278 | for (i = 0; i < XVECLEN (body, 0); i++) |
1279 | { | |
1280 | rtx inner_insn = XVECEXP (body, 0, i); | |
1281 | int inner_uid = INSN_UID (inner_insn); | |
1282 | int inner_length; | |
1283 | ||
a30caf5c DC |
1284 | if (GET_CODE (body) == ASM_INPUT |
1285 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1286 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1287 | * insn_default_length (inner_insn)); | |
1288 | else | |
1289 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1290 | |
3cf2715d DE |
1291 | insn_lengths[inner_uid] = inner_length; |
1292 | if (const_delay_slots) | |
1293 | { | |
1294 | if ((varying_length[inner_uid] | |
1295 | = insn_variable_length_p (inner_insn)) != 0) | |
1296 | varying_length[uid] = 1; | |
9d98a694 AO |
1297 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1298 | + insn_lengths[uid]); | |
3cf2715d DE |
1299 | } |
1300 | else | |
1301 | varying_length[inner_uid] = 0; | |
1302 | insn_lengths[uid] += inner_length; | |
1303 | } | |
1304 | } | |
1305 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1306 | { | |
1307 | insn_lengths[uid] = insn_default_length (insn); | |
1308 | varying_length[uid] = insn_variable_length_p (insn); | |
1309 | } | |
1310 | ||
1311 | /* If needed, do any adjustment. */ | |
1312 | #ifdef ADJUST_INSN_LENGTH | |
1313 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c VM |
1314 | if (insn_lengths[uid] < 0) |
1315 | fatal_insn ("Negative insn length", insn); | |
3cf2715d DE |
1316 | #endif |
1317 | } | |
1318 | ||
1319 | /* Now loop over all the insns finding varying length insns. For each, | |
1320 | get the current insn length. If it has changed, reflect the change. | |
1321 | When nothing changes for a full pass, we are done. */ | |
1322 | ||
1323 | while (something_changed) | |
1324 | { | |
1325 | something_changed = 0; | |
fc470718 | 1326 | insn_current_align = MAX_CODE_ALIGN - 1; |
3cf2715d DE |
1327 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; |
1328 | insn != 0; | |
1329 | insn = NEXT_INSN (insn)) | |
1330 | { | |
1331 | int new_length; | |
b729186a | 1332 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1333 | int tmp_length; |
b729186a | 1334 | #endif |
fc470718 | 1335 | int length_align; |
3cf2715d DE |
1336 | |
1337 | uid = INSN_UID (insn); | |
fc470718 R |
1338 | |
1339 | if (GET_CODE (insn) == CODE_LABEL) | |
1340 | { | |
1341 | int log = LABEL_TO_ALIGNMENT (insn); | |
1342 | if (log > insn_current_align) | |
1343 | { | |
1344 | int align = 1 << log; | |
ecb06768 | 1345 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1346 | insn_lengths[uid] = new_address - insn_current_address; |
1347 | insn_current_align = log; | |
1348 | insn_current_address = new_address; | |
1349 | } | |
1350 | else | |
1351 | insn_lengths[uid] = 0; | |
9d98a694 | 1352 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1353 | continue; |
1354 | } | |
1355 | ||
1356 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1357 | if (length_align < insn_current_align) | |
1358 | insn_current_align = length_align; | |
1359 | ||
9d98a694 AO |
1360 | insn_last_address = INSN_ADDRESSES (uid); |
1361 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1362 | |
5e75ef4a | 1363 | #ifdef CASE_VECTOR_SHORTEN_MODE |
33f7f353 JR |
1364 | if (optimize && GET_CODE (insn) == JUMP_INSN |
1365 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
1366 | { | |
33f7f353 JR |
1367 | rtx body = PATTERN (insn); |
1368 | int old_length = insn_lengths[uid]; | |
1369 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1370 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1371 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
1372 | addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body); | |
9d98a694 AO |
1373 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1374 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1375 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1376 | rtx prev; |
1377 | int rel_align = 0; | |
1378 | ||
1379 | /* Try to find a known alignment for rel_lab. */ | |
1380 | for (prev = rel_lab; | |
1381 | prev | |
1382 | && ! insn_lengths[INSN_UID (prev)] | |
1383 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1384 | prev = PREV_INSN (prev)) | |
1385 | if (varying_length[INSN_UID (prev)] & 2) | |
1386 | { | |
1387 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1388 | break; | |
1389 | } | |
1390 | ||
1391 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1392 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1393 | /* Anything after INSN has still addresses from the last | |
1394 | pass; adjust these so that they reflect our current | |
1395 | estimate for this pass. */ | |
1396 | if (flags.base_after_vec) | |
1397 | rel_addr += insn_current_address - insn_last_address; | |
1398 | if (flags.min_after_vec) | |
1399 | min_addr += insn_current_address - insn_last_address; | |
1400 | if (flags.max_after_vec) | |
1401 | max_addr += insn_current_address - insn_last_address; | |
1402 | /* We want to know the worst case, i.e. lowest possible value | |
1403 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1404 | its offset is positive, and we have to be wary of code shrink; | |
1405 | otherwise, it is negative, and we have to be vary of code | |
1406 | size increase. */ | |
1407 | if (flags.min_after_base) | |
1408 | { | |
1409 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1410 | changes we are about to make can change the alignment | |
1411 | within the observed offset, therefore we have to break | |
1412 | it up into two parts that are independent. */ | |
1413 | if (! flags.base_after_vec && flags.min_after_vec) | |
1414 | { | |
1415 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1416 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1417 | } | |
1418 | else | |
1419 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1420 | } | |
1421 | else | |
1422 | { | |
1423 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1424 | { | |
1425 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1426 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1427 | } | |
1428 | else | |
1429 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1430 | } | |
1431 | /* Likewise, determine the highest lowest possible value | |
1432 | for the offset of MAX_LAB. */ | |
1433 | if (flags.max_after_base) | |
1434 | { | |
1435 | if (! flags.base_after_vec && flags.max_after_vec) | |
1436 | { | |
1437 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1438 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1439 | } | |
1440 | else | |
1441 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1442 | } | |
1443 | else | |
1444 | { | |
1445 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1446 | { | |
1447 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1448 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1449 | } | |
1450 | else | |
1451 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1452 | } | |
1453 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1454 | max_addr - rel_addr, | |
1455 | body)); | |
75197b37 BS |
1456 | if (JUMP_TABLES_IN_TEXT_SECTION |
1457 | #if !defined(READONLY_DATA_SECTION) | |
1458 | || 1 | |
33f7f353 | 1459 | #endif |
75197b37 BS |
1460 | ) |
1461 | { | |
1462 | insn_lengths[uid] | |
1463 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1464 | insn_current_address += insn_lengths[uid]; | |
1465 | if (insn_lengths[uid] != old_length) | |
1466 | something_changed = 1; | |
1467 | } | |
1468 | ||
33f7f353 | 1469 | continue; |
33f7f353 | 1470 | } |
5e75ef4a JL |
1471 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1472 | ||
1473 | if (! (varying_length[uid])) | |
3cf2715d DE |
1474 | { |
1475 | insn_current_address += insn_lengths[uid]; | |
1476 | continue; | |
1477 | } | |
1478 | if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1479 | { | |
1480 | int i; | |
f5d927c0 | 1481 | |
3cf2715d DE |
1482 | body = PATTERN (insn); |
1483 | new_length = 0; | |
1484 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1485 | { | |
1486 | rtx inner_insn = XVECEXP (body, 0, i); | |
1487 | int inner_uid = INSN_UID (inner_insn); | |
1488 | int inner_length; | |
1489 | ||
9d98a694 | 1490 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1491 | |
1492 | /* insn_current_length returns 0 for insns with a | |
1493 | non-varying length. */ | |
1494 | if (! varying_length[inner_uid]) | |
1495 | inner_length = insn_lengths[inner_uid]; | |
1496 | else | |
1497 | inner_length = insn_current_length (inner_insn); | |
1498 | ||
1499 | if (inner_length != insn_lengths[inner_uid]) | |
1500 | { | |
1501 | insn_lengths[inner_uid] = inner_length; | |
1502 | something_changed = 1; | |
1503 | } | |
1504 | insn_current_address += insn_lengths[inner_uid]; | |
1505 | new_length += inner_length; | |
1506 | } | |
1507 | } | |
1508 | else | |
1509 | { | |
1510 | new_length = insn_current_length (insn); | |
1511 | insn_current_address += new_length; | |
1512 | } | |
1513 | ||
3cf2715d DE |
1514 | #ifdef ADJUST_INSN_LENGTH |
1515 | /* If needed, do any adjustment. */ | |
1516 | tmp_length = new_length; | |
1517 | ADJUST_INSN_LENGTH (insn, new_length); | |
1518 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1519 | #endif |
1520 | ||
1521 | if (new_length != insn_lengths[uid]) | |
1522 | { | |
1523 | insn_lengths[uid] = new_length; | |
1524 | something_changed = 1; | |
1525 | } | |
1526 | } | |
bb4aaf18 TG |
1527 | /* For a non-optimizing compile, do only a single pass. */ |
1528 | if (!optimize) | |
1529 | break; | |
3cf2715d | 1530 | } |
fc470718 R |
1531 | |
1532 | free (varying_length); | |
1533 | ||
3cf2715d DE |
1534 | #endif /* HAVE_ATTR_length */ |
1535 | } | |
1536 | ||
1537 | #ifdef HAVE_ATTR_length | |
1538 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1539 | the number of machine instructions likely to be generated for this insn. | |
1540 | This is used to compute its length. */ | |
1541 | ||
1542 | static int | |
1543 | asm_insn_count (body) | |
1544 | rtx body; | |
1545 | { | |
3cce094d | 1546 | const char *template; |
3cf2715d DE |
1547 | int count = 1; |
1548 | ||
5d0930ea DE |
1549 | if (GET_CODE (body) == ASM_INPUT) |
1550 | template = XSTR (body, 0); | |
1551 | else | |
1552 | template = decode_asm_operands (body, NULL_PTR, NULL_PTR, | |
1553 | NULL_PTR, NULL_PTR); | |
1554 | ||
f5d927c0 KH |
1555 | for (; *template; template++) |
1556 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') | |
3cf2715d DE |
1557 | count++; |
1558 | ||
1559 | return count; | |
1560 | } | |
1561 | #endif | |
1562 | \f | |
1563 | /* Output assembler code for the start of a function, | |
1564 | and initialize some of the variables in this file | |
1565 | for the new function. The label for the function and associated | |
1566 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1567 | ||
1568 | FIRST is the first insn of the rtl for the function being compiled. | |
1569 | FILE is the file to write assembler code to. | |
1570 | OPTIMIZE is nonzero if we should eliminate redundant | |
1571 | test and compare insns. */ | |
1572 | ||
1573 | void | |
1574 | final_start_function (first, file, optimize) | |
1575 | rtx first; | |
1576 | FILE *file; | |
6a651371 | 1577 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d DE |
1578 | { |
1579 | block_depth = 0; | |
1580 | ||
1581 | this_is_asm_operands = 0; | |
1582 | ||
1583 | #ifdef NON_SAVING_SETJMP | |
1584 | /* A function that calls setjmp should save and restore all the | |
1585 | call-saved registers on a system where longjmp clobbers them. */ | |
1586 | if (NON_SAVING_SETJMP && current_function_calls_setjmp) | |
1587 | { | |
1588 | int i; | |
1589 | ||
1590 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
252f342a | 1591 | if (!call_used_regs[i]) |
3cf2715d DE |
1592 | regs_ever_live[i] = 1; |
1593 | } | |
1594 | #endif | |
f5d927c0 | 1595 | |
3cf2715d DE |
1596 | /* Initial line number is supposed to be output |
1597 | before the function's prologue and label | |
1598 | so that the function's address will not appear to be | |
1599 | in the last statement of the preceding function. */ | |
1600 | if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED) | |
5fad6898 RK |
1601 | last_linenum = high_block_linenum = high_function_linenum |
1602 | = NOTE_LINE_NUMBER (first); | |
eac40081 | 1603 | |
c5cec899 | 1604 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
d291dd49 | 1605 | /* Output DWARF definition of the function. */ |
0021b564 | 1606 | if (dwarf2out_do_frame ()) |
9a666dda | 1607 | dwarf2out_begin_prologue (); |
00262c8a ML |
1608 | else |
1609 | current_function_func_begin_label = 0; | |
d291dd49 JM |
1610 | #endif |
1611 | ||
5fad6898 RK |
1612 | /* For SDB and XCOFF, the function beginning must be marked between |
1613 | the function label and the prologue. We always need this, even when | |
3c734272 | 1614 | -g1 was used. Defer on MIPS systems so that parameter descriptions |
0f41302f | 1615 | follow function entry. */ |
3c734272 | 1616 | #if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO) |
5fad6898 RK |
1617 | if (write_symbols == SDB_DEBUG) |
1618 | sdbout_begin_function (last_linenum); | |
1619 | else | |
2e2bbce2 | 1620 | #endif |
3cf2715d | 1621 | #ifdef XCOFF_DEBUGGING_INFO |
5fad6898 RK |
1622 | if (write_symbols == XCOFF_DEBUG) |
1623 | xcoffout_begin_function (file, last_linenum); | |
1624 | else | |
f5d927c0 | 1625 | #endif |
5fad6898 RK |
1626 | /* But only output line number for other debug info types if -g2 |
1627 | or better. */ | |
1628 | if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED) | |
1629 | output_source_line (file, first); | |
3cf2715d DE |
1630 | |
1631 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1632 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1633 | leaf_renumber_regs (first); |
1634 | #endif | |
1635 | ||
1636 | /* The Sun386i and perhaps other machines don't work right | |
1637 | if the profiling code comes after the prologue. */ | |
1638 | #ifdef PROFILE_BEFORE_PROLOGUE | |
1639 | if (profile_flag) | |
1640 | profile_function (file); | |
1641 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1642 | ||
0021b564 JM |
1643 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1644 | if (dwarf2out_do_frame ()) | |
1645 | dwarf2out_frame_debug (NULL_RTX); | |
1646 | #endif | |
1647 | ||
18c038b9 MM |
1648 | /* If debugging, assign block numbers to all of the blocks in this |
1649 | function. */ | |
1650 | if (write_symbols) | |
1651 | { | |
1652 | number_blocks (current_function_decl); | |
3ac79482 | 1653 | remove_unnecessary_notes (); |
18c038b9 MM |
1654 | /* We never actually put out begin/end notes for the top-level |
1655 | block in the function. But, conceptually, that block is | |
1656 | always needed. */ | |
1657 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1658 | } | |
1659 | ||
3cf2715d DE |
1660 | #ifdef FUNCTION_PROLOGUE |
1661 | /* First output the function prologue: code to set up the stack frame. */ | |
1662 | FUNCTION_PROLOGUE (file, get_frame_size ()); | |
1663 | #endif | |
1664 | ||
3cf2715d DE |
1665 | /* If the machine represents the prologue as RTL, the profiling code must |
1666 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1667 | #ifdef HAVE_prologue | |
1668 | if (! HAVE_prologue) | |
1669 | #endif | |
1670 | profile_after_prologue (file); | |
1671 | ||
1672 | profile_label_no++; | |
1673 | ||
1674 | /* If we are doing basic block profiling, remember a printable version | |
1675 | of the function name. */ | |
1676 | if (profile_block_flag) | |
1677 | { | |
f5d927c0 KH |
1678 | bb_func_label_num = |
1679 | add_bb_string ((*decl_printable_name) (current_function_decl, 2), | |
1680 | FALSE); | |
3cf2715d DE |
1681 | } |
1682 | } | |
1683 | ||
1684 | static void | |
1685 | profile_after_prologue (file) | |
7bdb32b9 | 1686 | FILE *file ATTRIBUTE_UNUSED; |
3cf2715d DE |
1687 | { |
1688 | #ifdef FUNCTION_BLOCK_PROFILER | |
1689 | if (profile_block_flag) | |
1690 | { | |
47431dff | 1691 | FUNCTION_BLOCK_PROFILER (file, count_basic_blocks); |
3cf2715d DE |
1692 | } |
1693 | #endif /* FUNCTION_BLOCK_PROFILER */ | |
1694 | ||
1695 | #ifndef PROFILE_BEFORE_PROLOGUE | |
1696 | if (profile_flag) | |
1697 | profile_function (file); | |
1698 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1699 | } | |
1700 | ||
1701 | static void | |
1702 | profile_function (file) | |
1703 | FILE *file; | |
1704 | { | |
dcacfa04 | 1705 | #ifndef NO_PROFILE_COUNTERS |
9e2f9a7f | 1706 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); |
dcacfa04 | 1707 | #endif |
b729186a JL |
1708 | #if defined(ASM_OUTPUT_REG_PUSH) |
1709 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM) | |
3cf2715d | 1710 | int sval = current_function_returns_struct; |
b729186a JL |
1711 | #endif |
1712 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) | |
3cf2715d | 1713 | int cxt = current_function_needs_context; |
b729186a JL |
1714 | #endif |
1715 | #endif /* ASM_OUTPUT_REG_PUSH */ | |
3cf2715d | 1716 | |
dcacfa04 | 1717 | #ifndef NO_PROFILE_COUNTERS |
3cf2715d DE |
1718 | data_section (); |
1719 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); | |
1720 | ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no); | |
9e2f9a7f | 1721 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1); |
dcacfa04 | 1722 | #endif |
3cf2715d | 1723 | |
499df339 | 1724 | function_section (current_function_decl); |
3cf2715d | 1725 | |
65ed39df | 1726 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1727 | if (sval) |
1728 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1729 | #else | |
65ed39df | 1730 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1731 | if (sval) |
51723711 KG |
1732 | { |
1733 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM); | |
1734 | } | |
3cf2715d DE |
1735 | #endif |
1736 | #endif | |
1737 | ||
65ed39df | 1738 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1739 | if (cxt) |
1740 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1741 | #else | |
65ed39df | 1742 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1743 | if (cxt) |
51723711 KG |
1744 | { |
1745 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); | |
1746 | } | |
3cf2715d DE |
1747 | #endif |
1748 | #endif | |
3cf2715d DE |
1749 | |
1750 | FUNCTION_PROFILER (file, profile_label_no); | |
1751 | ||
65ed39df | 1752 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1753 | if (cxt) |
1754 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1755 | #else | |
65ed39df | 1756 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1757 | if (cxt) |
51723711 KG |
1758 | { |
1759 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); | |
1760 | } | |
3cf2715d DE |
1761 | #endif |
1762 | #endif | |
3cf2715d | 1763 | |
65ed39df | 1764 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1765 | if (sval) |
1766 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1767 | #else | |
65ed39df | 1768 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1769 | if (sval) |
51723711 KG |
1770 | { |
1771 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM); | |
1772 | } | |
3cf2715d DE |
1773 | #endif |
1774 | #endif | |
1775 | } | |
1776 | ||
1777 | /* Output assembler code for the end of a function. | |
1778 | For clarity, args are same as those of `final_start_function' | |
1779 | even though not all of them are needed. */ | |
1780 | ||
1781 | void | |
1782 | final_end_function (first, file, optimize) | |
6a651371 | 1783 | rtx first ATTRIBUTE_UNUSED; |
fbd40359 | 1784 | FILE *file ATTRIBUTE_UNUSED; |
6a651371 | 1785 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d | 1786 | { |
be1bb652 | 1787 | app_disable (); |
3cf2715d DE |
1788 | |
1789 | #ifdef SDB_DEBUGGING_INFO | |
1790 | if (write_symbols == SDB_DEBUG) | |
eac40081 | 1791 | sdbout_end_function (high_function_linenum); |
3cf2715d DE |
1792 | #endif |
1793 | ||
1794 | #ifdef DWARF_DEBUGGING_INFO | |
1795 | if (write_symbols == DWARF_DEBUG) | |
1796 | dwarfout_end_function (); | |
1797 | #endif | |
1798 | ||
1799 | #ifdef XCOFF_DEBUGGING_INFO | |
1800 | if (write_symbols == XCOFF_DEBUG) | |
eac40081 | 1801 | xcoffout_end_function (file, high_function_linenum); |
3cf2715d DE |
1802 | #endif |
1803 | ||
1804 | #ifdef FUNCTION_EPILOGUE | |
1805 | /* Finally, output the function epilogue: | |
1806 | code to restore the stack frame and return to the caller. */ | |
1807 | FUNCTION_EPILOGUE (file, get_frame_size ()); | |
1808 | #endif | |
1809 | ||
1810 | #ifdef SDB_DEBUGGING_INFO | |
1811 | if (write_symbols == SDB_DEBUG) | |
1812 | sdbout_end_epilogue (); | |
1813 | #endif | |
1814 | ||
1815 | #ifdef DWARF_DEBUGGING_INFO | |
1816 | if (write_symbols == DWARF_DEBUG) | |
1817 | dwarfout_end_epilogue (); | |
1818 | #endif | |
1819 | ||
c5cec899 | 1820 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
0021b564 | 1821 | if (dwarf2out_do_frame ()) |
9a666dda JM |
1822 | dwarf2out_end_epilogue (); |
1823 | #endif | |
1824 | ||
3cf2715d DE |
1825 | #ifdef XCOFF_DEBUGGING_INFO |
1826 | if (write_symbols == XCOFF_DEBUG) | |
1827 | xcoffout_end_epilogue (file); | |
1828 | #endif | |
1829 | ||
1830 | bb_func_label_num = -1; /* not in function, nuke label # */ | |
1831 | ||
ce152ef8 AM |
1832 | #ifdef IA64_UNWIND_INFO |
1833 | output_function_exception_table (); | |
1834 | #endif | |
1835 | ||
3cf2715d DE |
1836 | /* If FUNCTION_EPILOGUE is not defined, then the function body |
1837 | itself contains return instructions wherever needed. */ | |
1838 | } | |
1839 | \f | |
1840 | /* Add a block to the linked list that remembers the current line/file/function | |
1841 | for basic block profiling. Emit the label in front of the basic block and | |
1842 | the instructions that increment the count field. */ | |
1843 | ||
1844 | static void | |
1845 | add_bb (file) | |
1846 | FILE *file; | |
1847 | { | |
f5d927c0 KH |
1848 | struct bb_list *ptr = |
1849 | (struct bb_list *) permalloc (sizeof (struct bb_list)); | |
3cf2715d DE |
1850 | |
1851 | /* Add basic block to linked list. */ | |
1852 | ptr->next = 0; | |
1853 | ptr->line_num = last_linenum; | |
1854 | ptr->file_label_num = bb_file_label_num; | |
1855 | ptr->func_label_num = bb_func_label_num; | |
1856 | *bb_tail = ptr; | |
1857 | bb_tail = &ptr->next; | |
1858 | ||
1859 | /* Enable the table of basic-block use counts | |
1860 | to point at the code it applies to. */ | |
1861 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks); | |
1862 | ||
1863 | /* Before first insn of this basic block, increment the | |
1864 | count of times it was entered. */ | |
1865 | #ifdef BLOCK_PROFILER | |
1866 | BLOCK_PROFILER (file, count_basic_blocks); | |
9e2f9a7f DE |
1867 | #endif |
1868 | #ifdef HAVE_cc0 | |
3cf2715d DE |
1869 | CC_STATUS_INIT; |
1870 | #endif | |
1871 | ||
1872 | new_block = 0; | |
1873 | count_basic_blocks++; | |
1874 | } | |
1875 | ||
1876 | /* Add a string to be used for basic block profiling. */ | |
1877 | ||
1878 | static int | |
1879 | add_bb_string (string, perm_p) | |
9b3142b3 | 1880 | const char *string; |
3cf2715d DE |
1881 | int perm_p; |
1882 | { | |
1883 | int len; | |
1884 | struct bb_str *ptr = 0; | |
1885 | ||
1886 | if (!string) | |
1887 | { | |
1888 | string = "<unknown>"; | |
1889 | perm_p = TRUE; | |
1890 | } | |
1891 | ||
1892 | /* Allocate a new string if the current string isn't permanent. If | |
1893 | the string is permanent search for the same string in other | |
1894 | allocations. */ | |
1895 | ||
1896 | len = strlen (string) + 1; | |
1897 | if (!perm_p) | |
1898 | { | |
1899 | char *p = (char *) permalloc (len); | |
4e135bdd | 1900 | memcpy (p, string, len); |
3cf2715d DE |
1901 | string = p; |
1902 | } | |
1903 | else | |
0f41302f | 1904 | for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next) |
3cf2715d DE |
1905 | if (ptr->string == string) |
1906 | break; | |
1907 | ||
1908 | /* Allocate a new string block if we need to. */ | |
1909 | if (!ptr) | |
1910 | { | |
1911 | ptr = (struct bb_str *) permalloc (sizeof (*ptr)); | |
1912 | ptr->next = 0; | |
1913 | ptr->length = len; | |
1914 | ptr->label_num = sbb_label_num++; | |
1915 | ptr->string = string; | |
1916 | *sbb_tail = ptr; | |
1917 | sbb_tail = &ptr->next; | |
1918 | } | |
1919 | ||
1920 | return ptr->label_num; | |
1921 | } | |
3cf2715d DE |
1922 | \f |
1923 | /* Output assembler code for some insns: all or part of a function. | |
1924 | For description of args, see `final_start_function', above. | |
1925 | ||
1926 | PRESCAN is 1 if we are not really outputting, | |
1927 | just scanning as if we were outputting. | |
1928 | Prescanning deletes and rearranges insns just like ordinary output. | |
1929 | PRESCAN is -2 if we are outputting after having prescanned. | |
1930 | In this case, don't try to delete or rearrange insns | |
1931 | because that has already been done. | |
1932 | Prescanning is done only on certain machines. */ | |
1933 | ||
1934 | void | |
1935 | final (first, file, optimize, prescan) | |
1936 | rtx first; | |
1937 | FILE *file; | |
1938 | int optimize; | |
1939 | int prescan; | |
1940 | { | |
1941 | register rtx insn; | |
1942 | int max_line = 0; | |
a8c3510c | 1943 | int max_uid = 0; |
3cf2715d DE |
1944 | |
1945 | last_ignored_compare = 0; | |
1946 | new_block = 1; | |
1947 | ||
3d195391 MS |
1948 | check_exception_handler_labels (); |
1949 | ||
3cf2715d DE |
1950 | /* Make a map indicating which line numbers appear in this function. |
1951 | When producing SDB debugging info, delete troublesome line number | |
1952 | notes from inlined functions in other files as well as duplicate | |
1953 | line number notes. */ | |
1954 | #ifdef SDB_DEBUGGING_INFO | |
1955 | if (write_symbols == SDB_DEBUG) | |
1956 | { | |
1957 | rtx last = 0; | |
1958 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1959 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) | |
1960 | { | |
1961 | if ((RTX_INTEGRATED_P (insn) | |
1962 | && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0) | |
1963 | || (last != 0 | |
1964 | && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) | |
1965 | && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last))) | |
1966 | { | |
1967 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1968 | NOTE_SOURCE_FILE (insn) = 0; | |
1969 | continue; | |
1970 | } | |
1971 | last = insn; | |
1972 | if (NOTE_LINE_NUMBER (insn) > max_line) | |
1973 | max_line = NOTE_LINE_NUMBER (insn); | |
1974 | } | |
1975 | } | |
1976 | else | |
1977 | #endif | |
1978 | { | |
1979 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1980 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line) | |
1981 | max_line = NOTE_LINE_NUMBER (insn); | |
1982 | } | |
1983 | ||
bedda2da | 1984 | line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char)); |
3cf2715d DE |
1985 | |
1986 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
a8c3510c AM |
1987 | { |
1988 | if (INSN_UID (insn) > max_uid) /* find largest UID */ | |
f5d927c0 | 1989 | max_uid = INSN_UID (insn); |
a8c3510c | 1990 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) |
f5d927c0 | 1991 | line_note_exists[NOTE_LINE_NUMBER (insn)] = 1; |
9ef4c6ef JC |
1992 | #ifdef HAVE_cc0 |
1993 | /* If CC tracking across branches is enabled, record the insn which | |
1994 | jumps to each branch only reached from one place. */ | |
7ad7f828 | 1995 | if (optimize && GET_CODE (insn) == JUMP_INSN) |
9ef4c6ef JC |
1996 | { |
1997 | rtx lab = JUMP_LABEL (insn); | |
1998 | if (lab && LABEL_NUSES (lab) == 1) | |
1999 | { | |
2000 | LABEL_REFS (lab) = insn; | |
2001 | } | |
2002 | } | |
2003 | #endif | |
a8c3510c AM |
2004 | } |
2005 | ||
f5d927c0 KH |
2006 | /* Initialize insn_eh_region table if eh is being used. */ |
2007 | ||
a8c3510c | 2008 | init_insn_eh_region (first, max_uid); |
3cf2715d DE |
2009 | |
2010 | init_recog (); | |
2011 | ||
2012 | CC_STATUS_INIT; | |
2013 | ||
2014 | /* Output the insns. */ | |
2015 | for (insn = NEXT_INSN (first); insn;) | |
2f16edb1 TG |
2016 | { |
2017 | #ifdef HAVE_ATTR_length | |
9d98a694 | 2018 | if (INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 RH |
2019 | { |
2020 | #ifdef STACK_REGS | |
2021 | /* Irritatingly, the reg-stack pass is creating new instructions | |
2022 | and because of REG_DEAD note abuse it has to run after | |
2023 | shorten_branches. Fake address of -1 then. */ | |
2024 | insn_current_address = -1; | |
2025 | #else | |
2026 | /* This can be triggered by bugs elsewhere in the compiler if | |
2027 | new insns are created after init_insn_lengths is called. */ | |
2028 | abort (); | |
2f16edb1 | 2029 | #endif |
0ac76ad9 RH |
2030 | } |
2031 | else | |
9d98a694 | 2032 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
2033 | #endif /* HAVE_ATTR_length */ |
2034 | ||
2f16edb1 TG |
2035 | insn = final_scan_insn (insn, file, optimize, prescan, 0); |
2036 | } | |
3cf2715d DE |
2037 | |
2038 | /* Do basic-block profiling here | |
2039 | if the last insn was a conditional branch. */ | |
2040 | if (profile_block_flag && new_block) | |
2041 | add_bb (file); | |
a8c3510c AM |
2042 | |
2043 | free_insn_eh_region (); | |
bedda2da MM |
2044 | free (line_note_exists); |
2045 | line_note_exists = NULL; | |
3cf2715d DE |
2046 | } |
2047 | \f | |
4bbf910e RH |
2048 | const char * |
2049 | get_insn_template (code, insn) | |
2050 | int code; | |
2051 | rtx insn; | |
2052 | { | |
2053 | const void *output = insn_data[code].output; | |
2054 | switch (insn_data[code].output_format) | |
2055 | { | |
2056 | case INSN_OUTPUT_FORMAT_SINGLE: | |
2057 | return (const char *) output; | |
2058 | case INSN_OUTPUT_FORMAT_MULTI: | |
f5d927c0 | 2059 | return ((const char *const *) output)[which_alternative]; |
4bbf910e RH |
2060 | case INSN_OUTPUT_FORMAT_FUNCTION: |
2061 | if (insn == NULL) | |
2062 | abort (); | |
f5d927c0 | 2063 | return (*(insn_output_fn) output) (recog_data.operand, insn); |
4bbf910e RH |
2064 | |
2065 | default: | |
2066 | abort (); | |
2067 | } | |
2068 | } | |
f5d927c0 | 2069 | |
3cf2715d DE |
2070 | /* The final scan for one insn, INSN. |
2071 | Args are same as in `final', except that INSN | |
2072 | is the insn being scanned. | |
2073 | Value returned is the next insn to be scanned. | |
2074 | ||
2075 | NOPEEPHOLES is the flag to disallow peephole processing (currently | |
2076 | used for within delayed branch sequence output). */ | |
2077 | ||
2078 | rtx | |
2079 | final_scan_insn (insn, file, optimize, prescan, nopeepholes) | |
2080 | rtx insn; | |
2081 | FILE *file; | |
272df862 | 2082 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d | 2083 | int prescan; |
272df862 | 2084 | int nopeepholes ATTRIBUTE_UNUSED; |
3cf2715d | 2085 | { |
90ca38bb MM |
2086 | #ifdef HAVE_cc0 |
2087 | rtx set; | |
2088 | #endif | |
2089 | ||
3cf2715d DE |
2090 | insn_counter++; |
2091 | ||
2092 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2093 | template of "#") while not optimizing. */ | |
2094 | if (INSN_DELETED_P (insn)) | |
2095 | return NEXT_INSN (insn); | |
2096 | ||
2097 | switch (GET_CODE (insn)) | |
2098 | { | |
2099 | case NOTE: | |
2100 | if (prescan > 0) | |
2101 | break; | |
2102 | ||
be1bb652 RH |
2103 | switch (NOTE_LINE_NUMBER (insn)) |
2104 | { | |
2105 | case NOTE_INSN_DELETED: | |
2106 | case NOTE_INSN_LOOP_BEG: | |
2107 | case NOTE_INSN_LOOP_END: | |
2108 | case NOTE_INSN_LOOP_CONT: | |
2109 | case NOTE_INSN_LOOP_VTOP: | |
2110 | case NOTE_INSN_FUNCTION_END: | |
2111 | case NOTE_INSN_SETJMP: | |
2112 | case NOTE_INSN_REPEATED_LINE_NUMBER: | |
2113 | case NOTE_INSN_RANGE_BEG: | |
2114 | case NOTE_INSN_RANGE_END: | |
2115 | case NOTE_INSN_LIVE: | |
2116 | case NOTE_INSN_EXPECTED_VALUE: | |
2117 | break; | |
3cf2715d | 2118 | |
be1bb652 | 2119 | case NOTE_INSN_BASIC_BLOCK: |
ad0fc698 JW |
2120 | #ifdef IA64_UNWIND_INFO |
2121 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
2122 | #endif | |
be1bb652 RH |
2123 | if (flag_debug_asm) |
2124 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
2125 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); | |
2126 | break; | |
3cf2715d | 2127 | |
be1bb652 | 2128 | case NOTE_INSN_EH_REGION_BEG: |
531073e7 | 2129 | if (! USING_SJLJ_EXCEPTIONS) |
be1bb652 RH |
2130 | { |
2131 | ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn)); | |
3d195391 | 2132 | #ifdef ASM_OUTPUT_EH_REGION_BEG |
be1bb652 | 2133 | ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn)); |
3d195391 | 2134 | #endif |
be1bb652 | 2135 | } |
3d195391 | 2136 | break; |
3d195391 | 2137 | |
be1bb652 | 2138 | case NOTE_INSN_EH_REGION_END: |
531073e7 | 2139 | if (! USING_SJLJ_EXCEPTIONS) |
be1bb652 RH |
2140 | { |
2141 | ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn)); | |
461fc4de | 2142 | add_eh_table_entry (NOTE_EH_HANDLER (insn)); |
3d195391 | 2143 | #ifdef ASM_OUTPUT_EH_REGION_END |
be1bb652 | 2144 | ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn)); |
3d195391 | 2145 | #endif |
be1bb652 | 2146 | } |
3d195391 | 2147 | break; |
3d195391 | 2148 | |
be1bb652 | 2149 | case NOTE_INSN_PROLOGUE_END: |
3cf2715d DE |
2150 | #ifdef FUNCTION_END_PROLOGUE |
2151 | FUNCTION_END_PROLOGUE (file); | |
2152 | #endif | |
2153 | profile_after_prologue (file); | |
2154 | break; | |
3cf2715d | 2155 | |
be1bb652 | 2156 | case NOTE_INSN_EPILOGUE_BEG: |
3cf2715d | 2157 | #ifdef FUNCTION_BEGIN_EPILOGUE |
3cf2715d | 2158 | FUNCTION_BEGIN_EPILOGUE (file); |
3cf2715d | 2159 | #endif |
be1bb652 | 2160 | break; |
3cf2715d | 2161 | |
be1bb652 | 2162 | case NOTE_INSN_FUNCTION_BEG: |
3c734272 RK |
2163 | #if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO) |
2164 | /* MIPS stabs require the parameter descriptions to be after the | |
0f41302f | 2165 | function entry point rather than before. */ |
3c734272 | 2166 | if (write_symbols == SDB_DEBUG) |
be1bb652 RH |
2167 | { |
2168 | app_disable (); | |
2169 | sdbout_begin_function (last_linenum); | |
2170 | } | |
3c734272 | 2171 | #endif |
3cf2715d | 2172 | #ifdef DWARF_DEBUGGING_INFO |
2e2bbce2 RK |
2173 | /* This outputs a marker where the function body starts, so it |
2174 | must be after the prologue. */ | |
3cf2715d | 2175 | if (write_symbols == DWARF_DEBUG) |
be1bb652 RH |
2176 | { |
2177 | app_disable (); | |
2178 | dwarfout_begin_function (); | |
2179 | } | |
3cf2715d DE |
2180 | #endif |
2181 | break; | |
be1bb652 RH |
2182 | |
2183 | case NOTE_INSN_BLOCK_BEG: | |
2184 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2185 | || debug_info_level == DINFO_LEVEL_VERBOSE |
3cf2715d | 2186 | || write_symbols == DWARF_DEBUG |
be1bb652 RH |
2187 | || write_symbols == DWARF2_DEBUG) |
2188 | { | |
2189 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2190 | |
be1bb652 RH |
2191 | app_disable (); |
2192 | ++block_depth; | |
2193 | high_block_linenum = last_linenum; | |
eac40081 | 2194 | |
be1bb652 | 2195 | /* Output debugging info about the symbol-block beginning. */ |
3cf2715d | 2196 | #ifdef SDB_DEBUGGING_INFO |
be1bb652 RH |
2197 | if (write_symbols == SDB_DEBUG) |
2198 | sdbout_begin_block (file, last_linenum, n); | |
3cf2715d DE |
2199 | #endif |
2200 | #ifdef XCOFF_DEBUGGING_INFO | |
be1bb652 RH |
2201 | if (write_symbols == XCOFF_DEBUG) |
2202 | xcoffout_begin_block (file, last_linenum, n); | |
3cf2715d DE |
2203 | #endif |
2204 | #ifdef DBX_DEBUGGING_INFO | |
be1bb652 RH |
2205 | if (write_symbols == DBX_DEBUG) |
2206 | ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", n); | |
3cf2715d DE |
2207 | #endif |
2208 | #ifdef DWARF_DEBUGGING_INFO | |
be1bb652 RH |
2209 | if (write_symbols == DWARF_DEBUG) |
2210 | dwarfout_begin_block (n); | |
3cf2715d | 2211 | #endif |
9a666dda | 2212 | #ifdef DWARF2_DEBUGGING_INFO |
be1bb652 RH |
2213 | if (write_symbols == DWARF2_DEBUG) |
2214 | dwarf2out_begin_block (n); | |
9a666dda | 2215 | #endif |
3cf2715d | 2216 | |
be1bb652 RH |
2217 | /* Mark this block as output. */ |
2218 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
2219 | } | |
2220 | break; | |
18c038b9 | 2221 | |
be1bb652 RH |
2222 | case NOTE_INSN_BLOCK_END: |
2223 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2224 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
2225 | || write_symbols == DWARF_DEBUG | |
2226 | || write_symbols == DWARF2_DEBUG) | |
2227 | { | |
2228 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2229 | |
be1bb652 RH |
2230 | app_disable (); |
2231 | ||
2232 | /* End of a symbol-block. */ | |
2233 | --block_depth; | |
2234 | if (block_depth < 0) | |
2235 | abort (); | |
3cf2715d DE |
2236 | |
2237 | #ifdef XCOFF_DEBUGGING_INFO | |
be1bb652 RH |
2238 | if (write_symbols == XCOFF_DEBUG) |
2239 | xcoffout_end_block (file, high_block_linenum, n); | |
3cf2715d DE |
2240 | #endif |
2241 | #ifdef DBX_DEBUGGING_INFO | |
be1bb652 RH |
2242 | if (write_symbols == DBX_DEBUG) |
2243 | ASM_OUTPUT_INTERNAL_LABEL (file, "LBE", n); | |
3cf2715d DE |
2244 | #endif |
2245 | #ifdef SDB_DEBUGGING_INFO | |
be1bb652 RH |
2246 | if (write_symbols == SDB_DEBUG) |
2247 | sdbout_end_block (file, high_block_linenum, n); | |
3cf2715d DE |
2248 | #endif |
2249 | #ifdef DWARF_DEBUGGING_INFO | |
be1bb652 RH |
2250 | if (write_symbols == DWARF_DEBUG) |
2251 | dwarfout_end_block (n); | |
9a666dda JM |
2252 | #endif |
2253 | #ifdef DWARF2_DEBUGGING_INFO | |
be1bb652 RH |
2254 | if (write_symbols == DWARF2_DEBUG) |
2255 | dwarf2out_end_block (n); | |
3cf2715d | 2256 | #endif |
be1bb652 RH |
2257 | } |
2258 | break; | |
2259 | ||
2260 | case NOTE_INSN_DELETED_LABEL: | |
2261 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2262 | the label could be proved to be unreachable, though still | |
2263 | referenced (in the form of having its address taken. */ | |
8215347e | 2264 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2265 | break; |
3cf2715d | 2266 | |
21835d9b JJ |
2267 | case 0: |
2268 | break; | |
2269 | ||
be1bb652 RH |
2270 | default: |
2271 | if (NOTE_LINE_NUMBER (insn) <= 0) | |
2272 | abort (); | |
3cf2715d | 2273 | |
be1bb652 RH |
2274 | /* This note is a line-number. */ |
2275 | { | |
2276 | register rtx note; | |
2277 | int note_after = 0; | |
2278 | ||
f5d927c0 | 2279 | /* If there is anything real after this note, output it. |
be1bb652 RH |
2280 | If another line note follows, omit this one. */ |
2281 | for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note)) | |
2282 | { | |
2283 | if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL) | |
3cf2715d | 2284 | break; |
3cf2715d | 2285 | |
be1bb652 RH |
2286 | /* These types of notes can be significant |
2287 | so make sure the preceding line number stays. */ | |
2288 | else if (GET_CODE (note) == NOTE | |
2289 | && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG | |
2290 | || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END | |
2291 | || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG)) | |
2292 | break; | |
2293 | else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0) | |
2294 | { | |
2295 | /* Another line note follows; we can delete this note | |
2296 | if no intervening line numbers have notes elsewhere. */ | |
2297 | int num; | |
2298 | for (num = NOTE_LINE_NUMBER (insn) + 1; | |
2299 | num < NOTE_LINE_NUMBER (note); | |
2300 | num++) | |
2301 | if (line_note_exists[num]) | |
2302 | break; | |
2303 | ||
2304 | if (num >= NOTE_LINE_NUMBER (note)) | |
2305 | note_after = 1; | |
2306 | break; | |
2307 | } | |
2308 | } | |
2309 | ||
2310 | /* Output this line note if it is the first or the last line | |
2311 | note in a row. */ | |
2312 | if (!note_after) | |
2313 | output_source_line (file, insn); | |
2314 | } | |
f5d927c0 | 2315 | break; |
3cf2715d DE |
2316 | } |
2317 | break; | |
2318 | ||
2319 | case BARRIER: | |
f73ad30e | 2320 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2321 | if (dwarf2out_do_frame ()) |
be1bb652 | 2322 | dwarf2out_frame_debug (insn); |
3cf2715d DE |
2323 | #endif |
2324 | break; | |
2325 | ||
2326 | case CODE_LABEL: | |
1dd8faa8 R |
2327 | /* The target port might emit labels in the output function for |
2328 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2329 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2330 | { | |
2331 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2332 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2333 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2334 | #endif |
fc470718 | 2335 | |
1dd8faa8 | 2336 | if (align && NEXT_INSN (insn)) |
9e423e6d JW |
2337 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
2338 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); | |
2339 | #else | |
de7987a6 | 2340 | ASM_OUTPUT_ALIGN (file, align); |
9e423e6d | 2341 | #endif |
de7987a6 | 2342 | } |
9ef4c6ef | 2343 | #ifdef HAVE_cc0 |
3cf2715d | 2344 | CC_STATUS_INIT; |
9ef4c6ef JC |
2345 | /* If this label is reached from only one place, set the condition |
2346 | codes from the instruction just before the branch. */ | |
7ad7f828 JC |
2347 | |
2348 | /* Disabled because some insns set cc_status in the C output code | |
2349 | and NOTICE_UPDATE_CC alone can set incorrect status. */ | |
2350 | if (0 /* optimize && LABEL_NUSES (insn) == 1*/) | |
9ef4c6ef JC |
2351 | { |
2352 | rtx jump = LABEL_REFS (insn); | |
2353 | rtx barrier = prev_nonnote_insn (insn); | |
2354 | rtx prev; | |
2355 | /* If the LABEL_REFS field of this label has been set to point | |
2356 | at a branch, the predecessor of the branch is a regular | |
2357 | insn, and that branch is the only way to reach this label, | |
2358 | set the condition codes based on the branch and its | |
2359 | predecessor. */ | |
2360 | if (barrier && GET_CODE (barrier) == BARRIER | |
2361 | && jump && GET_CODE (jump) == JUMP_INSN | |
2362 | && (prev = prev_nonnote_insn (jump)) | |
2363 | && GET_CODE (prev) == INSN) | |
2364 | { | |
2365 | NOTICE_UPDATE_CC (PATTERN (prev), prev); | |
2366 | NOTICE_UPDATE_CC (PATTERN (jump), jump); | |
2367 | } | |
2368 | } | |
2369 | #endif | |
3cf2715d DE |
2370 | if (prescan > 0) |
2371 | break; | |
2372 | new_block = 1; | |
03ffa171 RK |
2373 | |
2374 | #ifdef FINAL_PRESCAN_LABEL | |
2375 | FINAL_PRESCAN_INSN (insn, NULL_PTR, 0); | |
2376 | #endif | |
2377 | ||
3cf2715d DE |
2378 | #ifdef SDB_DEBUGGING_INFO |
2379 | if (write_symbols == SDB_DEBUG && LABEL_NAME (insn)) | |
2380 | sdbout_label (insn); | |
3cf2715d DE |
2381 | #endif |
2382 | if (app_on) | |
2383 | { | |
51723711 | 2384 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2385 | app_on = 0; |
2386 | } | |
2387 | if (NEXT_INSN (insn) != 0 | |
2388 | && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN) | |
2389 | { | |
2390 | rtx nextbody = PATTERN (NEXT_INSN (insn)); | |
2391 | ||
2392 | /* If this label is followed by a jump-table, | |
2393 | make sure we put the label in the read-only section. Also | |
2394 | possibly write the label and jump table together. */ | |
2395 | ||
2396 | if (GET_CODE (nextbody) == ADDR_VEC | |
2397 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
2398 | { | |
e0d80184 DM |
2399 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2400 | /* In this case, the case vector is being moved by the | |
2401 | target, so don't output the label at all. Leave that | |
2402 | to the back end macros. */ | |
2403 | #else | |
75197b37 BS |
2404 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2405 | { | |
2406 | readonly_data_section (); | |
3cf2715d | 2407 | #ifdef READONLY_DATA_SECTION |
75197b37 BS |
2408 | ASM_OUTPUT_ALIGN (file, |
2409 | exact_log2 (BIGGEST_ALIGNMENT | |
2410 | / BITS_PER_UNIT)); | |
3cf2715d | 2411 | #endif /* READONLY_DATA_SECTION */ |
75197b37 BS |
2412 | } |
2413 | else | |
2414 | function_section (current_function_decl); | |
2415 | ||
3cf2715d DE |
2416 | #ifdef ASM_OUTPUT_CASE_LABEL |
2417 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), | |
2418 | NEXT_INSN (insn)); | |
2419 | #else | |
f5d927c0 KH |
2420 | if (LABEL_ALTERNATE_NAME (insn)) |
2421 | ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn); | |
2422 | else | |
2423 | ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); | |
e0d80184 | 2424 | #endif |
3cf2715d DE |
2425 | #endif |
2426 | break; | |
2427 | } | |
2428 | } | |
8cd0faaf | 2429 | if (LABEL_ALTERNATE_NAME (insn)) |
f5d927c0 | 2430 | ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn); |
8cd0faaf | 2431 | else |
f5d927c0 | 2432 | ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2433 | break; |
2434 | ||
2435 | default: | |
2436 | { | |
51723711 | 2437 | register rtx body = PATTERN (insn); |
3cf2715d | 2438 | int insn_code_number; |
9b3142b3 | 2439 | const char *template; |
b729186a | 2440 | #ifdef HAVE_cc0 |
3cf2715d | 2441 | rtx note; |
b729186a | 2442 | #endif |
3cf2715d DE |
2443 | |
2444 | /* An INSN, JUMP_INSN or CALL_INSN. | |
2445 | First check for special kinds that recog doesn't recognize. */ | |
2446 | ||
2447 | if (GET_CODE (body) == USE /* These are just declarations */ | |
2448 | || GET_CODE (body) == CLOBBER) | |
2449 | break; | |
2450 | ||
2451 | #ifdef HAVE_cc0 | |
2452 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2453 | the setting of the condition code was done in the delay slot | |
2454 | of the insn that branched here. So recover the cc status | |
2455 | from the insn that set it. */ | |
2456 | ||
2457 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
2458 | if (note) | |
2459 | { | |
2460 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2461 | cc_prev_status = cc_status; | |
2462 | } | |
2463 | #endif | |
2464 | ||
2465 | /* Detect insns that are really jump-tables | |
2466 | and output them as such. */ | |
2467 | ||
2468 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2469 | { | |
7f7f8214 | 2470 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
3cf2715d | 2471 | register int vlen, idx; |
7f7f8214 | 2472 | #endif |
3cf2715d DE |
2473 | |
2474 | if (prescan > 0) | |
2475 | break; | |
2476 | ||
2477 | if (app_on) | |
2478 | { | |
51723711 | 2479 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2480 | app_on = 0; |
2481 | } | |
2482 | ||
e0d80184 DM |
2483 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2484 | if (GET_CODE (body) == ADDR_VEC) | |
2485 | { | |
2486 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2487 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2488 | #else | |
f5d927c0 | 2489 | abort (); |
e0d80184 DM |
2490 | #endif |
2491 | } | |
2492 | else | |
2493 | { | |
2494 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2495 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2496 | #else | |
f5d927c0 | 2497 | abort (); |
e0d80184 DM |
2498 | #endif |
2499 | } | |
2500 | #else | |
3cf2715d DE |
2501 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2502 | for (idx = 0; idx < vlen; idx++) | |
2503 | { | |
2504 | if (GET_CODE (body) == ADDR_VEC) | |
2505 | { | |
2506 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2507 | ASM_OUTPUT_ADDR_VEC_ELT | |
2508 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2509 | #else | |
2510 | abort (); | |
2511 | #endif | |
2512 | } | |
2513 | else | |
2514 | { | |
2515 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2516 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2517 | (file, | |
33f7f353 | 2518 | body, |
3cf2715d DE |
2519 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2520 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2521 | #else | |
2522 | abort (); | |
2523 | #endif | |
2524 | } | |
2525 | } | |
2526 | #ifdef ASM_OUTPUT_CASE_END | |
2527 | ASM_OUTPUT_CASE_END (file, | |
2528 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2529 | insn); | |
e0d80184 | 2530 | #endif |
3cf2715d DE |
2531 | #endif |
2532 | ||
4d1065ed | 2533 | function_section (current_function_decl); |
3cf2715d DE |
2534 | |
2535 | break; | |
2536 | } | |
2537 | ||
2538 | /* Do basic-block profiling when we reach a new block. | |
2539 | Done here to avoid jump tables. */ | |
2540 | if (profile_block_flag && new_block) | |
2541 | add_bb (file); | |
2542 | ||
2543 | if (GET_CODE (body) == ASM_INPUT) | |
2544 | { | |
2545 | /* There's no telling what that did to the condition codes. */ | |
2546 | CC_STATUS_INIT; | |
2547 | if (prescan > 0) | |
2548 | break; | |
2549 | if (! app_on) | |
2550 | { | |
51723711 | 2551 | fputs (ASM_APP_ON, file); |
3cf2715d DE |
2552 | app_on = 1; |
2553 | } | |
2554 | fprintf (asm_out_file, "\t%s\n", XSTR (body, 0)); | |
2555 | break; | |
2556 | } | |
2557 | ||
2558 | /* Detect `asm' construct with operands. */ | |
2559 | if (asm_noperands (body) >= 0) | |
2560 | { | |
22bf4422 | 2561 | unsigned int noperands = asm_noperands (body); |
3cf2715d | 2562 | rtx *ops = (rtx *) alloca (noperands * sizeof (rtx)); |
3cce094d | 2563 | const char *string; |
3cf2715d DE |
2564 | |
2565 | /* There's no telling what that did to the condition codes. */ | |
2566 | CC_STATUS_INIT; | |
2567 | if (prescan > 0) | |
2568 | break; | |
2569 | ||
2570 | if (! app_on) | |
2571 | { | |
51723711 | 2572 | fputs (ASM_APP_ON, file); |
3cf2715d DE |
2573 | app_on = 1; |
2574 | } | |
2575 | ||
2576 | /* Get out the operand values. */ | |
2577 | string = decode_asm_operands (body, ops, NULL_PTR, | |
2578 | NULL_PTR, NULL_PTR); | |
2579 | /* Inhibit aborts on what would otherwise be compiler bugs. */ | |
2580 | insn_noperands = noperands; | |
2581 | this_is_asm_operands = insn; | |
2582 | ||
2583 | /* Output the insn using them. */ | |
2584 | output_asm_insn (string, ops); | |
2585 | this_is_asm_operands = 0; | |
2586 | break; | |
2587 | } | |
2588 | ||
2589 | if (prescan <= 0 && app_on) | |
2590 | { | |
51723711 | 2591 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2592 | app_on = 0; |
2593 | } | |
2594 | ||
2595 | if (GET_CODE (body) == SEQUENCE) | |
2596 | { | |
2597 | /* A delayed-branch sequence */ | |
2598 | register int i; | |
2599 | rtx next; | |
2600 | ||
2601 | if (prescan > 0) | |
2602 | break; | |
2603 | final_sequence = body; | |
2604 | ||
2605 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2606 | force the restoration of a comparison that was previously | |
2607 | thought unnecessary. If that happens, cancel this sequence | |
2608 | and cause that insn to be restored. */ | |
2609 | ||
2610 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1); | |
2611 | if (next != XVECEXP (body, 0, 1)) | |
2612 | { | |
2613 | final_sequence = 0; | |
2614 | return next; | |
2615 | } | |
2616 | ||
2617 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2618 | { |
2619 | rtx insn = XVECEXP (body, 0, i); | |
2620 | rtx next = NEXT_INSN (insn); | |
2621 | /* We loop in case any instruction in a delay slot gets | |
2622 | split. */ | |
2623 | do | |
2624 | insn = final_scan_insn (insn, file, 0, prescan, 1); | |
2625 | while (insn != next); | |
2626 | } | |
3cf2715d DE |
2627 | #ifdef DBR_OUTPUT_SEQEND |
2628 | DBR_OUTPUT_SEQEND (file); | |
2629 | #endif | |
2630 | final_sequence = 0; | |
2631 | ||
2632 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2633 | insns in the delay slot are actually executed before the | |
2634 | called function. Hence we don't preserve any CC-setting | |
2635 | actions in these insns and the CC must be marked as being | |
2636 | clobbered by the function. */ | |
2637 | if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN) | |
b729186a JL |
2638 | { |
2639 | CC_STATUS_INIT; | |
2640 | } | |
3cf2715d DE |
2641 | |
2642 | /* Following a conditional branch sequence, we have a new basic | |
2643 | block. */ | |
2644 | if (profile_block_flag) | |
2645 | { | |
2646 | rtx insn = XVECEXP (body, 0, 0); | |
2647 | rtx body = PATTERN (insn); | |
2648 | ||
2649 | if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET | |
2650 | && GET_CODE (SET_SRC (body)) != LABEL_REF) | |
2651 | || (GET_CODE (insn) == JUMP_INSN | |
2652 | && GET_CODE (body) == PARALLEL | |
2653 | && GET_CODE (XVECEXP (body, 0, 0)) == SET | |
2654 | && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)) | |
2655 | new_block = 1; | |
2656 | } | |
2657 | break; | |
2658 | } | |
2659 | ||
2660 | /* We have a real machine instruction as rtl. */ | |
2661 | ||
2662 | body = PATTERN (insn); | |
2663 | ||
2664 | #ifdef HAVE_cc0 | |
f5d927c0 | 2665 | set = single_set (insn); |
b88c92cc | 2666 | |
3cf2715d DE |
2667 | /* Check for redundant test and compare instructions |
2668 | (when the condition codes are already set up as desired). | |
2669 | This is done only when optimizing; if not optimizing, | |
2670 | it should be possible for the user to alter a variable | |
2671 | with the debugger in between statements | |
2672 | and the next statement should reexamine the variable | |
2673 | to compute the condition codes. */ | |
2674 | ||
30f5e9f5 | 2675 | if (optimize) |
3cf2715d | 2676 | { |
b88c92cc | 2677 | #if 0 |
f5d927c0 | 2678 | rtx set = single_set (insn); |
b88c92cc | 2679 | #endif |
30f5e9f5 RK |
2680 | |
2681 | if (set | |
2682 | && GET_CODE (SET_DEST (set)) == CC0 | |
2683 | && insn != last_ignored_compare) | |
3cf2715d | 2684 | { |
30f5e9f5 RK |
2685 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
2686 | SET_SRC (set) = alter_subreg (SET_SRC (set)); | |
2687 | else if (GET_CODE (SET_SRC (set)) == COMPARE) | |
2688 | { | |
2689 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2690 | XEXP (SET_SRC (set), 0) | |
2691 | = alter_subreg (XEXP (SET_SRC (set), 0)); | |
2692 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) | |
2693 | XEXP (SET_SRC (set), 1) | |
2694 | = alter_subreg (XEXP (SET_SRC (set), 1)); | |
2695 | } | |
2696 | if ((cc_status.value1 != 0 | |
2697 | && rtx_equal_p (SET_SRC (set), cc_status.value1)) | |
2698 | || (cc_status.value2 != 0 | |
2699 | && rtx_equal_p (SET_SRC (set), cc_status.value2))) | |
3cf2715d | 2700 | { |
30f5e9f5 RK |
2701 | /* Don't delete insn if it has an addressing side-effect. */ |
2702 | if (! FIND_REG_INC_NOTE (insn, 0) | |
2703 | /* or if anything in it is volatile. */ | |
2704 | && ! volatile_refs_p (PATTERN (insn))) | |
2705 | { | |
2706 | /* We don't really delete the insn; just ignore it. */ | |
2707 | last_ignored_compare = insn; | |
2708 | break; | |
2709 | } | |
3cf2715d DE |
2710 | } |
2711 | } | |
2712 | } | |
2713 | #endif | |
2714 | ||
2715 | /* Following a conditional branch, we have a new basic block. | |
2716 | But if we are inside a sequence, the new block starts after the | |
2717 | last insn of the sequence. */ | |
2718 | if (profile_block_flag && final_sequence == 0 | |
2719 | && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET | |
2720 | && GET_CODE (SET_SRC (body)) != LABEL_REF) | |
2721 | || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL | |
2722 | && GET_CODE (XVECEXP (body, 0, 0)) == SET | |
2723 | && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))) | |
2724 | new_block = 1; | |
2725 | ||
2726 | #ifndef STACK_REGS | |
2727 | /* Don't bother outputting obvious no-ops, even without -O. | |
2728 | This optimization is fast and doesn't interfere with debugging. | |
2729 | Don't do this if the insn is in a delay slot, since this | |
2730 | will cause an improper number of delay insns to be written. */ | |
2731 | if (final_sequence == 0 | |
2732 | && prescan >= 0 | |
2733 | && GET_CODE (insn) == INSN && GET_CODE (body) == SET | |
2734 | && GET_CODE (SET_SRC (body)) == REG | |
2735 | && GET_CODE (SET_DEST (body)) == REG | |
2736 | && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body))) | |
2737 | break; | |
2738 | #endif | |
2739 | ||
2740 | #ifdef HAVE_cc0 | |
2741 | /* If this is a conditional branch, maybe modify it | |
2742 | if the cc's are in a nonstandard state | |
2743 | so that it accomplishes the same thing that it would | |
2744 | do straightforwardly if the cc's were set up normally. */ | |
2745 | ||
2746 | if (cc_status.flags != 0 | |
2747 | && GET_CODE (insn) == JUMP_INSN | |
2748 | && GET_CODE (body) == SET | |
2749 | && SET_DEST (body) == pc_rtx | |
2750 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
de2b56f9 | 2751 | && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<' |
fff752ad | 2752 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx |
3cf2715d DE |
2753 | /* This is done during prescan; it is not done again |
2754 | in final scan when prescan has been done. */ | |
2755 | && prescan >= 0) | |
2756 | { | |
2757 | /* This function may alter the contents of its argument | |
2758 | and clear some of the cc_status.flags bits. | |
2759 | It may also return 1 meaning condition now always true | |
2760 | or -1 meaning condition now always false | |
2761 | or 2 meaning condition nontrivial but altered. */ | |
2762 | register int result = alter_cond (XEXP (SET_SRC (body), 0)); | |
2763 | /* If condition now has fixed value, replace the IF_THEN_ELSE | |
2764 | with its then-operand or its else-operand. */ | |
2765 | if (result == 1) | |
2766 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2767 | if (result == -1) | |
2768 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2769 | ||
2770 | /* The jump is now either unconditional or a no-op. | |
2771 | If it has become a no-op, don't try to output it. | |
2772 | (It would not be recognized.) */ | |
2773 | if (SET_SRC (body) == pc_rtx) | |
2774 | { | |
2775 | PUT_CODE (insn, NOTE); | |
2776 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
2777 | NOTE_SOURCE_FILE (insn) = 0; | |
2778 | break; | |
2779 | } | |
2780 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2781 | /* Replace (set (pc) (return)) with (return). */ | |
2782 | PATTERN (insn) = body = SET_SRC (body); | |
2783 | ||
2784 | /* Rerecognize the instruction if it has changed. */ | |
2785 | if (result != 0) | |
2786 | INSN_CODE (insn) = -1; | |
2787 | } | |
2788 | ||
2789 | /* Make same adjustments to instructions that examine the | |
462da2af SC |
2790 | condition codes without jumping and instructions that |
2791 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2792 | |
2793 | if (cc_status.flags != 0 | |
b88c92cc | 2794 | && set != 0) |
3cf2715d | 2795 | { |
462da2af | 2796 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2797 | |
462da2af | 2798 | if (GET_CODE (insn) != JUMP_INSN |
b88c92cc | 2799 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2800 | { |
b88c92cc RK |
2801 | cond_rtx = XEXP (SET_SRC (set), 0); |
2802 | then_rtx = XEXP (SET_SRC (set), 1); | |
2803 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2804 | } |
2805 | else | |
2806 | { | |
b88c92cc | 2807 | cond_rtx = SET_SRC (set); |
462da2af SC |
2808 | then_rtx = const_true_rtx; |
2809 | else_rtx = const0_rtx; | |
2810 | } | |
f5d927c0 | 2811 | |
462da2af | 2812 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2813 | { |
2814 | case GTU: | |
2815 | case GT: | |
2816 | case LTU: | |
2817 | case LT: | |
2818 | case GEU: | |
2819 | case GE: | |
2820 | case LEU: | |
2821 | case LE: | |
2822 | case EQ: | |
2823 | case NE: | |
2824 | { | |
2825 | register int result; | |
462da2af | 2826 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2827 | break; |
462da2af | 2828 | result = alter_cond (cond_rtx); |
3cf2715d | 2829 | if (result == 1) |
b88c92cc | 2830 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2831 | else if (result == -1) |
b88c92cc | 2832 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2833 | else if (result == 2) |
2834 | INSN_CODE (insn) = -1; | |
b88c92cc | 2835 | if (SET_DEST (set) == SET_SRC (set)) |
462da2af SC |
2836 | { |
2837 | PUT_CODE (insn, NOTE); | |
2838 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
2839 | NOTE_SOURCE_FILE (insn) = 0; | |
462da2af | 2840 | } |
3cf2715d | 2841 | } |
e9a25f70 JL |
2842 | break; |
2843 | ||
2844 | default: | |
2845 | break; | |
3cf2715d DE |
2846 | } |
2847 | } | |
462da2af | 2848 | |
3cf2715d DE |
2849 | #endif |
2850 | ||
ede7cd44 | 2851 | #ifdef HAVE_peephole |
3cf2715d DE |
2852 | /* Do machine-specific peephole optimizations if desired. */ |
2853 | ||
2854 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2855 | { | |
2856 | rtx next = peephole (insn); | |
2857 | /* When peepholing, if there were notes within the peephole, | |
2858 | emit them before the peephole. */ | |
2859 | if (next != 0 && next != NEXT_INSN (insn)) | |
2860 | { | |
2861 | rtx prev = PREV_INSN (insn); | |
2862 | rtx note; | |
2863 | ||
2864 | for (note = NEXT_INSN (insn); note != next; | |
2865 | note = NEXT_INSN (note)) | |
2866 | final_scan_insn (note, file, optimize, prescan, nopeepholes); | |
2867 | ||
2868 | /* In case this is prescan, put the notes | |
2869 | in proper position for later rescan. */ | |
2870 | note = NEXT_INSN (insn); | |
2871 | PREV_INSN (note) = prev; | |
2872 | NEXT_INSN (prev) = note; | |
2873 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2874 | PREV_INSN (insn) = PREV_INSN (next); | |
2875 | NEXT_INSN (insn) = next; | |
2876 | PREV_INSN (next) = insn; | |
2877 | } | |
2878 | ||
2879 | /* PEEPHOLE might have changed this. */ | |
2880 | body = PATTERN (insn); | |
2881 | } | |
ede7cd44 | 2882 | #endif |
3cf2715d DE |
2883 | |
2884 | /* Try to recognize the instruction. | |
2885 | If successful, verify that the operands satisfy the | |
2886 | constraints for the instruction. Crash if they don't, | |
2887 | since `reload' should have changed them so that they do. */ | |
2888 | ||
2889 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2890 | cleanup_subreg_operands (insn); |
3cf2715d | 2891 | |
c349e40b SC |
2892 | /* Dump the insn in the assembly for debugging. */ |
2893 | if (flag_dump_rtl_in_asm) | |
2894 | { | |
2895 | print_rtx_head = ASM_COMMENT_START; | |
2896 | print_rtl_single (asm_out_file, insn); | |
2897 | print_rtx_head = ""; | |
2898 | } | |
2899 | ||
6c698a6d | 2900 | if (! constrain_operands_cached (1)) |
3cf2715d | 2901 | fatal_insn_not_found (insn); |
3cf2715d DE |
2902 | |
2903 | /* Some target machines need to prescan each insn before | |
2904 | it is output. */ | |
2905 | ||
2906 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2907 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2908 | #endif |
2909 | ||
afe48e06 RH |
2910 | #ifdef HAVE_conditional_execution |
2911 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
2912 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); | |
2913 | else | |
2914 | current_insn_predicate = NULL_RTX; | |
2915 | #endif | |
2916 | ||
3cf2715d DE |
2917 | #ifdef HAVE_cc0 |
2918 | cc_prev_status = cc_status; | |
2919 | ||
2920 | /* Update `cc_status' for this instruction. | |
2921 | The instruction's output routine may change it further. | |
2922 | If the output routine for a jump insn needs to depend | |
2923 | on the cc status, it should look at cc_prev_status. */ | |
2924 | ||
2925 | NOTICE_UPDATE_CC (body, insn); | |
2926 | #endif | |
2927 | ||
b1a9f6a0 | 2928 | current_output_insn = debug_insn = insn; |
3cf2715d | 2929 | |
f73ad30e | 2930 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2931 | if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ()) |
b57d9225 JM |
2932 | dwarf2out_frame_debug (insn); |
2933 | #endif | |
2934 | ||
4bbf910e RH |
2935 | /* Find the proper template for this insn. */ |
2936 | template = get_insn_template (insn_code_number, insn); | |
3cf2715d | 2937 | |
4bbf910e RH |
2938 | /* If the C code returns 0, it means that it is a jump insn |
2939 | which follows a deleted test insn, and that test insn | |
2940 | needs to be reinserted. */ | |
3cf2715d DE |
2941 | if (template == 0) |
2942 | { | |
efd0378b HPN |
2943 | rtx prev; |
2944 | ||
4bbf910e RH |
2945 | if (prev_nonnote_insn (insn) != last_ignored_compare) |
2946 | abort (); | |
2947 | new_block = 0; | |
efd0378b HPN |
2948 | |
2949 | /* We have already processed the notes between the setter and | |
2950 | the user. Make sure we don't process them again, this is | |
2951 | particularly important if one of the notes is a block | |
2952 | scope note or an EH note. */ | |
2953 | for (prev = insn; | |
2954 | prev != last_ignored_compare; | |
2955 | prev = PREV_INSN (prev)) | |
2956 | { | |
2957 | if (GET_CODE (prev) == NOTE) | |
2958 | { | |
2959 | NOTE_LINE_NUMBER (prev) = NOTE_INSN_DELETED; | |
2960 | NOTE_SOURCE_FILE (prev) = 0; | |
2961 | } | |
2962 | } | |
2963 | ||
2964 | return prev; | |
3cf2715d DE |
2965 | } |
2966 | ||
2967 | /* If the template is the string "#", it means that this insn must | |
2968 | be split. */ | |
2969 | if (template[0] == '#' && template[1] == '\0') | |
2970 | { | |
2971 | rtx new = try_split (body, insn, 0); | |
2972 | ||
2973 | /* If we didn't split the insn, go away. */ | |
2974 | if (new == insn && PATTERN (new) == body) | |
cf879efa | 2975 | fatal_insn ("Could not split insn", insn); |
f5d927c0 | 2976 | |
3d14e82f JW |
2977 | #ifdef HAVE_ATTR_length |
2978 | /* This instruction should have been split in shorten_branches, | |
2979 | to ensure that we would have valid length info for the | |
2980 | splitees. */ | |
2981 | abort (); | |
2982 | #endif | |
2983 | ||
3cf2715d DE |
2984 | new_block = 0; |
2985 | return new; | |
2986 | } | |
f5d927c0 | 2987 | |
3cf2715d DE |
2988 | if (prescan > 0) |
2989 | break; | |
2990 | ||
ce152ef8 AM |
2991 | #ifdef IA64_UNWIND_INFO |
2992 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
2993 | #endif | |
3cf2715d DE |
2994 | /* Output assembler code from the template. */ |
2995 | ||
1ccbefce | 2996 | output_asm_insn (template, recog_data.operand); |
3cf2715d | 2997 | |
0021b564 | 2998 | #if defined (DWARF2_UNWIND_INFO) |
0021b564 | 2999 | #if defined (HAVE_prologue) |
fbfa55b0 RH |
3000 | if (GET_CODE (insn) == INSN && dwarf2out_do_frame ()) |
3001 | dwarf2out_frame_debug (insn); | |
3002 | #else | |
3003 | if (!ACCUMULATE_OUTGOING_ARGS | |
3004 | && GET_CODE (insn) == INSN | |
3005 | && dwarf2out_do_frame ()) | |
3006 | dwarf2out_frame_debug (insn); | |
0021b564 JM |
3007 | #endif |
3008 | #endif | |
469ac993 | 3009 | |
3cf2715d DE |
3010 | #if 0 |
3011 | /* It's not at all clear why we did this and doing so interferes | |
3012 | with tests we'd like to do to use REG_WAS_0 notes, so let's try | |
3013 | with this out. */ | |
3014 | ||
3015 | /* Mark this insn as having been output. */ | |
3016 | INSN_DELETED_P (insn) = 1; | |
3017 | #endif | |
3018 | ||
b1a9f6a0 | 3019 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
3020 | } |
3021 | } | |
3022 | return NEXT_INSN (insn); | |
3023 | } | |
3024 | \f | |
3025 | /* Output debugging info to the assembler file FILE | |
3026 | based on the NOTE-insn INSN, assumed to be a line number. */ | |
3027 | ||
3028 | static void | |
3029 | output_source_line (file, insn) | |
6a651371 | 3030 | FILE *file ATTRIBUTE_UNUSED; |
3cf2715d DE |
3031 | rtx insn; |
3032 | { | |
3cce094d | 3033 | register const char *filename = NOTE_SOURCE_FILE (insn); |
3cf2715d DE |
3034 | |
3035 | /* Remember filename for basic block profiling. | |
3036 | Filenames are allocated on the permanent obstack | |
3037 | or are passed in ARGV, so we don't have to save | |
3038 | the string. */ | |
3039 | ||
3040 | if (profile_block_flag && last_filename != filename) | |
3041 | bb_file_label_num = add_bb_string (filename, TRUE); | |
3042 | ||
3043 | last_filename = filename; | |
3044 | last_linenum = NOTE_LINE_NUMBER (insn); | |
eac40081 RK |
3045 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3046 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3cf2715d DE |
3047 | |
3048 | if (write_symbols != NO_DEBUG) | |
3049 | { | |
3050 | #ifdef SDB_DEBUGGING_INFO | |
3051 | if (write_symbols == SDB_DEBUG | |
3052 | #if 0 /* People like having line numbers even in wrong file! */ | |
3053 | /* COFF can't handle multiple source files--lose, lose. */ | |
3054 | && !strcmp (filename, main_input_filename) | |
3055 | #endif | |
3056 | /* COFF relative line numbers must be positive. */ | |
3057 | && last_linenum > sdb_begin_function_line) | |
3058 | { | |
3059 | #ifdef ASM_OUTPUT_SOURCE_LINE | |
3060 | ASM_OUTPUT_SOURCE_LINE (file, last_linenum); | |
3061 | #else | |
3062 | fprintf (file, "\t.ln\t%d\n", | |
3063 | ((sdb_begin_function_line > -1) | |
3064 | ? last_linenum - sdb_begin_function_line : 1)); | |
3065 | #endif | |
3066 | } | |
3067 | #endif | |
3068 | ||
3069 | #if defined (DBX_DEBUGGING_INFO) | |
3070 | if (write_symbols == DBX_DEBUG) | |
3071 | dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn)); | |
3072 | #endif | |
3073 | ||
3074 | #if defined (XCOFF_DEBUGGING_INFO) | |
3075 | if (write_symbols == XCOFF_DEBUG) | |
3076 | xcoffout_source_line (file, filename, insn); | |
3077 | #endif | |
3078 | ||
3079 | #ifdef DWARF_DEBUGGING_INFO | |
3080 | if (write_symbols == DWARF_DEBUG) | |
3081 | dwarfout_line (filename, NOTE_LINE_NUMBER (insn)); | |
3082 | #endif | |
9a666dda JM |
3083 | |
3084 | #ifdef DWARF2_DEBUGGING_INFO | |
3085 | if (write_symbols == DWARF2_DEBUG) | |
3086 | dwarf2out_line (filename, NOTE_LINE_NUMBER (insn)); | |
3087 | #endif | |
3cf2715d DE |
3088 | } |
3089 | } | |
3090 | \f | |
0304f787 JL |
3091 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3092 | directly to the desired hard register. */ | |
f5d927c0 | 3093 | |
0304f787 JL |
3094 | void |
3095 | cleanup_subreg_operands (insn) | |
3096 | rtx insn; | |
3097 | { | |
f62a15e3 | 3098 | int i; |
6c698a6d | 3099 | extract_insn_cached (insn); |
1ccbefce | 3100 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3101 | { |
1ccbefce | 3102 | if (GET_CODE (recog_data.operand[i]) == SUBREG) |
f5d927c0 | 3103 | recog_data.operand[i] = alter_subreg (recog_data.operand[i]); |
1ccbefce | 3104 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 BS |
3105 | || GET_CODE (recog_data.operand[i]) == MULT |
3106 | || GET_CODE (recog_data.operand[i]) == MEM) | |
f5d927c0 | 3107 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]); |
0304f787 JL |
3108 | } |
3109 | ||
1ccbefce | 3110 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3111 | { |
1ccbefce | 3112 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
f5d927c0 | 3113 | *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]); |
1ccbefce | 3114 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 BS |
3115 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3116 | || GET_CODE (*recog_data.dup_loc[i]) == MEM) | |
f5d927c0 | 3117 | *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]); |
0304f787 JL |
3118 | } |
3119 | } | |
3120 | ||
3cf2715d DE |
3121 | /* If X is a SUBREG, replace it with a REG or a MEM, |
3122 | based on the thing it is a subreg of. */ | |
3123 | ||
3124 | rtx | |
3125 | alter_subreg (x) | |
3126 | register rtx x; | |
3127 | { | |
3128 | register rtx y = SUBREG_REG (x); | |
f5963e61 | 3129 | |
3cf2715d DE |
3130 | if (GET_CODE (y) == SUBREG) |
3131 | y = alter_subreg (y); | |
3132 | ||
f5963e61 JL |
3133 | /* If reload is operating, we may be replacing inside this SUBREG. |
3134 | Check for that and make a new one if so. */ | |
3135 | if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0) | |
3136 | x = copy_rtx (x); | |
3137 | ||
3cf2715d DE |
3138 | if (GET_CODE (y) == REG) |
3139 | { | |
ef178af3 | 3140 | int regno; |
ce4d78eb RH |
3141 | /* If the word size is larger than the size of this register, |
3142 | adjust the register number to compensate. */ | |
3143 | /* ??? Note that this just catches stragglers created by/for | |
3144 | integrate. It would be better if we either caught these | |
3145 | earlier, or kept _all_ subregs until now and eliminate | |
3146 | gen_lowpart and friends. */ | |
3147 | ||
ce4d78eb | 3148 | #ifdef ALTER_HARD_SUBREG |
f5d927c0 KH |
3149 | regno = ALTER_HARD_SUBREG (GET_MODE (x), SUBREG_WORD (x), |
3150 | GET_MODE (y), REGNO (y)); | |
ce4d78eb | 3151 | #else |
ef178af3 | 3152 | regno = REGNO (y) + SUBREG_WORD (x); |
ce4d78eb | 3153 | #endif |
ef178af3 ZW |
3154 | PUT_CODE (x, REG); |
3155 | REGNO (x) = regno; | |
08394eef | 3156 | ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y); |
0304f787 JL |
3157 | /* This field has a different meaning for REGs and SUBREGs. Make sure |
3158 | to clear it! */ | |
3159 | x->used = 0; | |
3cf2715d DE |
3160 | } |
3161 | else if (GET_CODE (y) == MEM) | |
3162 | { | |
3163 | register int offset = SUBREG_WORD (x) * UNITS_PER_WORD; | |
bf49b139 | 3164 | |
f76b9db2 ILT |
3165 | if (BYTES_BIG_ENDIAN) |
3166 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))) | |
3167 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y)))); | |
3cf2715d | 3168 | PUT_CODE (x, MEM); |
c6df88cb | 3169 | MEM_COPY_ATTRIBUTES (x, y); |
3cf2715d DE |
3170 | XEXP (x, 0) = plus_constant (XEXP (y, 0), offset); |
3171 | } | |
3172 | ||
3173 | return x; | |
3174 | } | |
3175 | ||
3176 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3177 | ||
3178 | static rtx | |
3179 | walk_alter_subreg (x) | |
3180 | rtx x; | |
3181 | { | |
3182 | switch (GET_CODE (x)) | |
3183 | { | |
3184 | case PLUS: | |
3185 | case MULT: | |
3186 | XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0)); | |
3187 | XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1)); | |
3188 | break; | |
3189 | ||
3190 | case MEM: | |
3191 | XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0)); | |
3192 | break; | |
3193 | ||
3194 | case SUBREG: | |
3195 | return alter_subreg (x); | |
f5d927c0 | 3196 | |
e9a25f70 JL |
3197 | default: |
3198 | break; | |
3cf2715d DE |
3199 | } |
3200 | ||
3201 | return x; | |
3202 | } | |
3203 | \f | |
3204 | #ifdef HAVE_cc0 | |
3205 | ||
3206 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3207 | as required by the bits that are set in cc_status.flags. | |
3208 | Not all of the bits there can be handled at this level in all cases. | |
3209 | ||
3210 | The value is normally 0. | |
3211 | 1 means that the condition has become always true. | |
3212 | -1 means that the condition has become always false. | |
3213 | 2 means that COND has been altered. */ | |
3214 | ||
3215 | static int | |
3216 | alter_cond (cond) | |
3217 | register rtx cond; | |
3218 | { | |
3219 | int value = 0; | |
3220 | ||
3221 | if (cc_status.flags & CC_REVERSED) | |
3222 | { | |
3223 | value = 2; | |
3224 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3225 | } | |
3226 | ||
3227 | if (cc_status.flags & CC_INVERTED) | |
3228 | { | |
3229 | value = 2; | |
3230 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3231 | } | |
3232 | ||
3233 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3234 | switch (GET_CODE (cond)) | |
3235 | { | |
3236 | case LE: | |
3237 | case LEU: | |
3238 | case GEU: | |
3239 | /* Jump becomes unconditional. */ | |
3240 | return 1; | |
3241 | ||
3242 | case GT: | |
3243 | case GTU: | |
3244 | case LTU: | |
3245 | /* Jump becomes no-op. */ | |
3246 | return -1; | |
3247 | ||
3248 | case GE: | |
3249 | PUT_CODE (cond, EQ); | |
3250 | value = 2; | |
3251 | break; | |
3252 | ||
3253 | case LT: | |
3254 | PUT_CODE (cond, NE); | |
3255 | value = 2; | |
3256 | break; | |
f5d927c0 | 3257 | |
e9a25f70 JL |
3258 | default: |
3259 | break; | |
3cf2715d DE |
3260 | } |
3261 | ||
3262 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3263 | switch (GET_CODE (cond)) | |
3264 | { | |
3265 | case GE: | |
3266 | case GEU: | |
3267 | /* Jump becomes unconditional. */ | |
3268 | return 1; | |
3269 | ||
3270 | case LT: | |
3271 | case LTU: | |
3272 | /* Jump becomes no-op. */ | |
3273 | return -1; | |
3274 | ||
3275 | case LE: | |
3276 | case LEU: | |
3277 | PUT_CODE (cond, EQ); | |
3278 | value = 2; | |
3279 | break; | |
3280 | ||
3281 | case GT: | |
3282 | case GTU: | |
3283 | PUT_CODE (cond, NE); | |
3284 | value = 2; | |
3285 | break; | |
f5d927c0 | 3286 | |
e9a25f70 JL |
3287 | default: |
3288 | break; | |
3cf2715d DE |
3289 | } |
3290 | ||
3291 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3292 | switch (GET_CODE (cond)) | |
3293 | { | |
3294 | case GEU: | |
3295 | /* Jump becomes unconditional. */ | |
3296 | return 1; | |
3297 | ||
3298 | case LEU: | |
3299 | PUT_CODE (cond, EQ); | |
3300 | value = 2; | |
3301 | break; | |
3302 | ||
3303 | case GTU: | |
3304 | PUT_CODE (cond, NE); | |
3305 | value = 2; | |
3306 | break; | |
3307 | ||
3308 | case LTU: | |
3309 | /* Jump becomes no-op. */ | |
3310 | return -1; | |
f5d927c0 | 3311 | |
e9a25f70 JL |
3312 | default: |
3313 | break; | |
3cf2715d DE |
3314 | } |
3315 | ||
3316 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3317 | switch (GET_CODE (cond)) | |
3318 | { | |
e9a25f70 | 3319 | default: |
3cf2715d DE |
3320 | abort (); |
3321 | ||
3322 | case NE: | |
3323 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3324 | value = 2; | |
3325 | break; | |
3326 | ||
3327 | case EQ: | |
3328 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3329 | value = 2; | |
3330 | break; | |
3331 | } | |
3332 | ||
3333 | if (cc_status.flags & CC_NOT_SIGNED) | |
3334 | /* The flags are valid if signed condition operators are converted | |
3335 | to unsigned. */ | |
3336 | switch (GET_CODE (cond)) | |
3337 | { | |
3338 | case LE: | |
3339 | PUT_CODE (cond, LEU); | |
3340 | value = 2; | |
3341 | break; | |
3342 | ||
3343 | case LT: | |
3344 | PUT_CODE (cond, LTU); | |
3345 | value = 2; | |
3346 | break; | |
3347 | ||
3348 | case GT: | |
3349 | PUT_CODE (cond, GTU); | |
3350 | value = 2; | |
3351 | break; | |
3352 | ||
3353 | case GE: | |
3354 | PUT_CODE (cond, GEU); | |
3355 | value = 2; | |
3356 | break; | |
e9a25f70 JL |
3357 | |
3358 | default: | |
3359 | break; | |
3cf2715d DE |
3360 | } |
3361 | ||
3362 | return value; | |
3363 | } | |
3364 | #endif | |
3365 | \f | |
3366 | /* Report inconsistency between the assembler template and the operands. | |
3367 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3368 | ||
3369 | void | |
ab87f8c8 JL |
3370 | output_operand_lossage (msgid) |
3371 | const char *msgid; | |
3cf2715d DE |
3372 | { |
3373 | if (this_is_asm_operands) | |
ab87f8c8 | 3374 | error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid)); |
3cf2715d | 3375 | else |
651a788e | 3376 | internal_error ("output_operand: %s", _(msgid)); |
3cf2715d DE |
3377 | } |
3378 | \f | |
3379 | /* Output of assembler code from a template, and its subroutines. */ | |
3380 | ||
3381 | /* Output text from TEMPLATE to the assembler output file, | |
3382 | obeying %-directions to substitute operands taken from | |
3383 | the vector OPERANDS. | |
3384 | ||
3385 | %N (for N a digit) means print operand N in usual manner. | |
3386 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3387 | and print the label name with no punctuation. | |
3388 | %cN means require operand N to be a constant | |
3389 | and print the constant expression with no punctuation. | |
3390 | %aN means expect operand N to be a memory address | |
3391 | (not a memory reference!) and print a reference | |
3392 | to that address. | |
3393 | %nN means expect operand N to be a constant | |
3394 | and print a constant expression for minus the value | |
3395 | of the operand, with no other punctuation. */ | |
3396 | ||
cb649530 RK |
3397 | static void |
3398 | output_asm_name () | |
3399 | { | |
3400 | if (flag_print_asm_name) | |
3401 | { | |
3402 | /* Annotate the assembly with a comment describing the pattern and | |
3403 | alternative used. */ | |
3404 | if (debug_insn) | |
3405 | { | |
3406 | register int num = INSN_CODE (debug_insn); | |
f5d927c0 | 3407 | fprintf (asm_out_file, "\t%s %d\t%s", |
a995e389 RH |
3408 | ASM_COMMENT_START, INSN_UID (debug_insn), |
3409 | insn_data[num].name); | |
3410 | if (insn_data[num].n_alternatives > 1) | |
cb649530 | 3411 | fprintf (asm_out_file, "/%d", which_alternative + 1); |
1db9f6ce | 3412 | #ifdef HAVE_ATTR_length |
a995e389 RH |
3413 | fprintf (asm_out_file, "\t[length = %d]", |
3414 | get_attr_length (debug_insn)); | |
1db9f6ce | 3415 | #endif |
cb649530 RK |
3416 | /* Clear this so only the first assembler insn |
3417 | of any rtl insn will get the special comment for -dp. */ | |
3418 | debug_insn = 0; | |
3419 | } | |
3420 | } | |
3421 | } | |
3422 | ||
3cf2715d DE |
3423 | void |
3424 | output_asm_insn (template, operands) | |
9b3142b3 | 3425 | const char *template; |
3cf2715d DE |
3426 | rtx *operands; |
3427 | { | |
9b3142b3 | 3428 | register const char *p; |
b729186a | 3429 | register int c; |
3cf2715d DE |
3430 | |
3431 | /* An insn may return a null string template | |
3432 | in a case where no assembler code is needed. */ | |
3433 | if (*template == 0) | |
3434 | return; | |
3435 | ||
3436 | p = template; | |
3437 | putc ('\t', asm_out_file); | |
3438 | ||
3439 | #ifdef ASM_OUTPUT_OPCODE | |
3440 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3441 | #endif | |
3442 | ||
b729186a | 3443 | while ((c = *p++)) |
3cf2715d DE |
3444 | switch (c) |
3445 | { | |
3cf2715d | 3446 | case '\n': |
cb649530 | 3447 | output_asm_name (); |
3cf2715d | 3448 | putc (c, asm_out_file); |
cb649530 | 3449 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3450 | while ((c = *p) == '\t') |
3451 | { | |
3452 | putc (c, asm_out_file); | |
3453 | p++; | |
3454 | } | |
3455 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3456 | #endif |
cb649530 | 3457 | break; |
3cf2715d DE |
3458 | |
3459 | #ifdef ASSEMBLER_DIALECT | |
3460 | case '{': | |
b729186a JL |
3461 | { |
3462 | register int i; | |
f5d927c0 | 3463 | |
b729186a JL |
3464 | /* If we want the first dialect, do nothing. Otherwise, skip |
3465 | DIALECT_NUMBER of strings ending with '|'. */ | |
3466 | for (i = 0; i < dialect_number; i++) | |
3467 | { | |
463a8384 | 3468 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3469 | ; |
463a8384 BS |
3470 | if (*p == '}') |
3471 | break; | |
b729186a JL |
3472 | if (*p == '|') |
3473 | p++; | |
3474 | } | |
3475 | } | |
3cf2715d DE |
3476 | break; |
3477 | ||
3478 | case '|': | |
3479 | /* Skip to close brace. */ | |
3480 | while (*p && *p++ != '}') | |
3481 | ; | |
3482 | break; | |
3483 | ||
3484 | case '}': | |
3485 | break; | |
3486 | #endif | |
3487 | ||
3488 | case '%': | |
3489 | /* %% outputs a single %. */ | |
3490 | if (*p == '%') | |
3491 | { | |
3492 | p++; | |
3493 | putc (c, asm_out_file); | |
3494 | } | |
3495 | /* %= outputs a number which is unique to each insn in the entire | |
3496 | compilation. This is useful for making local labels that are | |
3497 | referred to more than once in a given insn. */ | |
3498 | else if (*p == '=') | |
3499 | { | |
3500 | p++; | |
3501 | fprintf (asm_out_file, "%d", insn_counter); | |
3502 | } | |
3503 | /* % followed by a letter and some digits | |
3504 | outputs an operand in a special way depending on the letter. | |
3505 | Letters `acln' are implemented directly. | |
3506 | Other letters are passed to `output_operand' so that | |
3507 | the PRINT_OPERAND macro can define them. */ | |
f5d927c0 | 3508 | else if (ISLOWER (*p) || ISUPPER (*p)) |
3cf2715d DE |
3509 | { |
3510 | int letter = *p++; | |
3511 | c = atoi (p); | |
3512 | ||
3513 | if (! (*p >= '0' && *p <= '9')) | |
3514 | output_operand_lossage ("operand number missing after %-letter"); | |
22bf4422 | 3515 | else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands)) |
3cf2715d DE |
3516 | output_operand_lossage ("operand number out of range"); |
3517 | else if (letter == 'l') | |
3518 | output_asm_label (operands[c]); | |
3519 | else if (letter == 'a') | |
3520 | output_address (operands[c]); | |
3521 | else if (letter == 'c') | |
3522 | { | |
3523 | if (CONSTANT_ADDRESS_P (operands[c])) | |
3524 | output_addr_const (asm_out_file, operands[c]); | |
3525 | else | |
3526 | output_operand (operands[c], 'c'); | |
3527 | } | |
3528 | else if (letter == 'n') | |
3529 | { | |
3530 | if (GET_CODE (operands[c]) == CONST_INT) | |
21e3a81b | 3531 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
3cf2715d DE |
3532 | - INTVAL (operands[c])); |
3533 | else | |
3534 | { | |
3535 | putc ('-', asm_out_file); | |
3536 | output_addr_const (asm_out_file, operands[c]); | |
3537 | } | |
3538 | } | |
3539 | else | |
3540 | output_operand (operands[c], letter); | |
f5d927c0 KH |
3541 | |
3542 | while ((c = *p) >= '0' && c <= '9') | |
3543 | p++; | |
3cf2715d DE |
3544 | } |
3545 | /* % followed by a digit outputs an operand the default way. */ | |
3546 | else if (*p >= '0' && *p <= '9') | |
3547 | { | |
3548 | c = atoi (p); | |
f5d927c0 KH |
3549 | if (this_is_asm_operands |
3550 | && (c < 0 || (unsigned int) c >= insn_noperands)) | |
3cf2715d DE |
3551 | output_operand_lossage ("operand number out of range"); |
3552 | else | |
3553 | output_operand (operands[c], 0); | |
f5d927c0 KH |
3554 | while ((c = *p) >= '0' && c <= '9') |
3555 | p++; | |
3cf2715d DE |
3556 | } |
3557 | /* % followed by punctuation: output something for that | |
3558 | punctuation character alone, with no operand. | |
3559 | The PRINT_OPERAND macro decides what is actually done. */ | |
3560 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3561 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3562 | output_operand (NULL_RTX, *p++); |
3563 | #endif | |
3564 | else | |
3565 | output_operand_lossage ("invalid %%-code"); | |
3566 | break; | |
3567 | ||
3568 | default: | |
3569 | putc (c, asm_out_file); | |
3570 | } | |
3571 | ||
cb649530 | 3572 | output_asm_name (); |
3cf2715d DE |
3573 | |
3574 | putc ('\n', asm_out_file); | |
3575 | } | |
3576 | \f | |
3577 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3578 | ||
3579 | void | |
3580 | output_asm_label (x) | |
3581 | rtx x; | |
3582 | { | |
3583 | char buf[256]; | |
3584 | ||
3585 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 RH |
3586 | x = XEXP (x, 0); |
3587 | if (GET_CODE (x) == CODE_LABEL | |
3588 | || (GET_CODE (x) == NOTE | |
3589 | && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) | |
3cf2715d DE |
3590 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3591 | else | |
3592 | output_operand_lossage ("`%l' operand isn't a label"); | |
3593 | ||
3594 | assemble_name (asm_out_file, buf); | |
3595 | } | |
3596 | ||
3597 | /* Print operand X using machine-dependent assembler syntax. | |
3598 | The macro PRINT_OPERAND is defined just to control this function. | |
3599 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3600 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3601 | between the % and the digits. | |
3602 | When CODE is a non-letter, X is 0. | |
3603 | ||
3604 | The meanings of the letters are machine-dependent and controlled | |
3605 | by PRINT_OPERAND. */ | |
3606 | ||
3607 | static void | |
3608 | output_operand (x, code) | |
3609 | rtx x; | |
962f1324 | 3610 | int code ATTRIBUTE_UNUSED; |
3cf2715d DE |
3611 | { |
3612 | if (x && GET_CODE (x) == SUBREG) | |
3613 | x = alter_subreg (x); | |
3614 | ||
3615 | /* If X is a pseudo-register, abort now rather than writing trash to the | |
3616 | assembler file. */ | |
3617 | ||
3618 | if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
3619 | abort (); | |
3620 | ||
3621 | PRINT_OPERAND (asm_out_file, x, code); | |
3622 | } | |
3623 | ||
3624 | /* Print a memory reference operand for address X | |
3625 | using machine-dependent assembler syntax. | |
3626 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3627 | ||
3628 | void | |
3629 | output_address (x) | |
3630 | rtx x; | |
3631 | { | |
3632 | walk_alter_subreg (x); | |
3633 | PRINT_OPERAND_ADDRESS (asm_out_file, x); | |
3634 | } | |
3635 | \f | |
3636 | /* Print an integer constant expression in assembler syntax. | |
3637 | Addition and subtraction are the only arithmetic | |
3638 | that may appear in these expressions. */ | |
3639 | ||
3640 | void | |
3641 | output_addr_const (file, x) | |
3642 | FILE *file; | |
3643 | rtx x; | |
3644 | { | |
3645 | char buf[256]; | |
3646 | ||
3647 | restart: | |
3648 | switch (GET_CODE (x)) | |
3649 | { | |
3650 | case PC: | |
3651 | if (flag_pic) | |
3652 | putc ('.', file); | |
3653 | else | |
3654 | abort (); | |
3655 | break; | |
3656 | ||
3657 | case SYMBOL_REF: | |
99c8c61c AO |
3658 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3659 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3660 | #else | |
3cf2715d | 3661 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3662 | #endif |
3cf2715d DE |
3663 | break; |
3664 | ||
3665 | case LABEL_REF: | |
422be3c3 AO |
3666 | x = XEXP (x, 0); |
3667 | /* Fall through. */ | |
3cf2715d DE |
3668 | case CODE_LABEL: |
3669 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
3670 | assemble_name (file, buf); | |
3671 | break; | |
3672 | ||
3673 | case CONST_INT: | |
21e3a81b | 3674 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3675 | break; |
3676 | ||
3677 | case CONST: | |
3678 | /* This used to output parentheses around the expression, | |
3679 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3680 | output_addr_const (file, XEXP (x, 0)); | |
3681 | break; | |
3682 | ||
3683 | case CONST_DOUBLE: | |
3684 | if (GET_MODE (x) == VOIDmode) | |
3685 | { | |
3686 | /* We can use %d if the number is one word and positive. */ | |
3687 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3688 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3cf2715d | 3689 | CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); |
f5d927c0 | 3690 | else if (CONST_DOUBLE_LOW (x) < 0) |
21e3a81b | 3691 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); |
3cf2715d | 3692 | else |
21e3a81b | 3693 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3694 | } |
3695 | else | |
3696 | /* We can't handle floating point constants; | |
3697 | PRINT_OPERAND must handle them. */ | |
3698 | output_operand_lossage ("floating constant misused"); | |
3699 | break; | |
3700 | ||
3701 | case PLUS: | |
3702 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3703 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3704 | { | |
3705 | output_addr_const (file, XEXP (x, 1)); | |
3706 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3707 | fprintf (file, "+"); | |
3708 | output_addr_const (file, XEXP (x, 0)); | |
3709 | } | |
3710 | else | |
3711 | { | |
3712 | output_addr_const (file, XEXP (x, 0)); | |
08106825 AO |
3713 | if (GET_CODE (XEXP (x, 1)) != CONST_INT |
3714 | || INTVAL (XEXP (x, 1)) >= 0) | |
3cf2715d DE |
3715 | fprintf (file, "+"); |
3716 | output_addr_const (file, XEXP (x, 1)); | |
3717 | } | |
3718 | break; | |
3719 | ||
3720 | case MINUS: | |
3721 | /* Avoid outputting things like x-x or x+5-x, | |
3722 | since some assemblers can't handle that. */ | |
3723 | x = simplify_subtraction (x); | |
3724 | if (GET_CODE (x) != MINUS) | |
3725 | goto restart; | |
3726 | ||
3727 | output_addr_const (file, XEXP (x, 0)); | |
3728 | fprintf (file, "-"); | |
422be3c3 AO |
3729 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT |
3730 | && INTVAL (XEXP (x, 1)) < 0) | |
3731 | || GET_CODE (XEXP (x, 1)) != CONST_INT) | |
3cf2715d | 3732 | { |
b6c8689d | 3733 | fprintf (file, "%s", ASM_OPEN_PAREN); |
3cf2715d | 3734 | output_addr_const (file, XEXP (x, 1)); |
b6c8689d | 3735 | fprintf (file, "%s", ASM_CLOSE_PAREN); |
3cf2715d DE |
3736 | } |
3737 | else | |
3738 | output_addr_const (file, XEXP (x, 1)); | |
3739 | break; | |
3740 | ||
3741 | case ZERO_EXTEND: | |
3742 | case SIGN_EXTEND: | |
3743 | output_addr_const (file, XEXP (x, 0)); | |
3744 | break; | |
3745 | ||
3746 | default: | |
422be3c3 AO |
3747 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3748 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3749 | break; | |
3750 | ||
3751 | fail: | |
3752 | #endif | |
3cf2715d DE |
3753 | output_operand_lossage ("invalid expression as operand"); |
3754 | } | |
3755 | } | |
3756 | \f | |
3757 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3758 | %R prints the value of REGISTER_PREFIX. | |
3759 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3760 | %U prints the value of USER_LABEL_PREFIX. | |
3761 | %I prints the value of IMMEDIATE_PREFIX. | |
3762 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
3763 | Also supported are %d, %x, %s, %e, %f, %g and %%. | |
3764 | ||
3765 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3766 | ||
3767 | void | |
711d877c | 3768 | asm_fprintf VPARAMS ((FILE *file, const char *p, ...)) |
3cf2715d | 3769 | { |
5148a72b | 3770 | #ifndef ANSI_PROTOTYPES |
3cf2715d | 3771 | FILE *file; |
87e11268 | 3772 | const char *p; |
3cf2715d DE |
3773 | #endif |
3774 | va_list argptr; | |
3775 | char buf[10]; | |
3776 | char *q, c; | |
3cf2715d DE |
3777 | |
3778 | VA_START (argptr, p); | |
3779 | ||
5148a72b | 3780 | #ifndef ANSI_PROTOTYPES |
0f41302f | 3781 | file = va_arg (argptr, FILE *); |
87e11268 | 3782 | p = va_arg (argptr, const char *); |
3cf2715d DE |
3783 | #endif |
3784 | ||
3785 | buf[0] = '%'; | |
3786 | ||
b729186a | 3787 | while ((c = *p++)) |
3cf2715d DE |
3788 | switch (c) |
3789 | { | |
3790 | #ifdef ASSEMBLER_DIALECT | |
3791 | case '{': | |
b729186a JL |
3792 | { |
3793 | int i; | |
3cf2715d | 3794 | |
b729186a JL |
3795 | /* If we want the first dialect, do nothing. Otherwise, skip |
3796 | DIALECT_NUMBER of strings ending with '|'. */ | |
3797 | for (i = 0; i < dialect_number; i++) | |
3798 | { | |
3799 | while (*p && *p++ != '|') | |
3800 | ; | |
3801 | ||
3802 | if (*p == '|') | |
3803 | p++; | |
f5d927c0 | 3804 | } |
b729186a | 3805 | } |
3cf2715d DE |
3806 | break; |
3807 | ||
3808 | case '|': | |
3809 | /* Skip to close brace. */ | |
3810 | while (*p && *p++ != '}') | |
3811 | ; | |
3812 | break; | |
3813 | ||
3814 | case '}': | |
3815 | break; | |
3816 | #endif | |
3817 | ||
3818 | case '%': | |
3819 | c = *p++; | |
3820 | q = &buf[1]; | |
3821 | while ((c >= '0' && c <= '9') || c == '.') | |
3822 | { | |
3823 | *q++ = c; | |
3824 | c = *p++; | |
3825 | } | |
3826 | switch (c) | |
3827 | { | |
3828 | case '%': | |
3829 | fprintf (file, "%%"); | |
3830 | break; | |
3831 | ||
3832 | case 'd': case 'i': case 'u': | |
3833 | case 'x': case 'p': case 'X': | |
3834 | case 'o': | |
3835 | *q++ = c; | |
3836 | *q = 0; | |
3837 | fprintf (file, buf, va_arg (argptr, int)); | |
3838 | break; | |
3839 | ||
3840 | case 'w': | |
3841 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases, | |
3842 | but we do not check for those cases. It means that the value | |
3843 | is a HOST_WIDE_INT, which may be either `int' or `long'. */ | |
3844 | ||
21e3a81b RK |
3845 | #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT |
3846 | #else | |
3847 | #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG | |
3848 | *q++ = 'l'; | |
3849 | #else | |
3850 | *q++ = 'l'; | |
3cf2715d | 3851 | *q++ = 'l'; |
21e3a81b | 3852 | #endif |
3cf2715d DE |
3853 | #endif |
3854 | ||
3855 | *q++ = *p++; | |
3856 | *q = 0; | |
3857 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3858 | break; | |
3859 | ||
3860 | case 'l': | |
3861 | *q++ = c; | |
3862 | *q++ = *p++; | |
3863 | *q = 0; | |
3864 | fprintf (file, buf, va_arg (argptr, long)); | |
3865 | break; | |
3866 | ||
3867 | case 'e': | |
3868 | case 'f': | |
3869 | case 'g': | |
3870 | *q++ = c; | |
3871 | *q = 0; | |
3872 | fprintf (file, buf, va_arg (argptr, double)); | |
3873 | break; | |
3874 | ||
3875 | case 's': | |
3876 | *q++ = c; | |
3877 | *q = 0; | |
3878 | fprintf (file, buf, va_arg (argptr, char *)); | |
3879 | break; | |
3880 | ||
3881 | case 'O': | |
3882 | #ifdef ASM_OUTPUT_OPCODE | |
3883 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3884 | #endif | |
3885 | break; | |
3886 | ||
3887 | case 'R': | |
3888 | #ifdef REGISTER_PREFIX | |
3889 | fprintf (file, "%s", REGISTER_PREFIX); | |
3890 | #endif | |
3891 | break; | |
3892 | ||
3893 | case 'I': | |
3894 | #ifdef IMMEDIATE_PREFIX | |
3895 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3896 | #endif | |
3897 | break; | |
3898 | ||
3899 | case 'L': | |
3900 | #ifdef LOCAL_LABEL_PREFIX | |
3901 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3902 | #endif | |
3903 | break; | |
3904 | ||
3905 | case 'U': | |
19283265 | 3906 | fputs (user_label_prefix, file); |
3cf2715d DE |
3907 | break; |
3908 | ||
fe0503ea NC |
3909 | #ifdef ASM_FPRINTF_EXTENSIONS |
3910 | /* Upper case letters are reserved for general use by asm_fprintf | |
3911 | and so are not available to target specific code. In order to | |
3912 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3913 | they are defined here. As they get turned into real extensions | |
3914 | to asm_fprintf they should be removed from this list. */ | |
3915 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3916 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3917 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3918 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3919 | break; | |
f5d927c0 | 3920 | |
fe0503ea NC |
3921 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3922 | #endif | |
3cf2715d DE |
3923 | default: |
3924 | abort (); | |
3925 | } | |
3926 | break; | |
3927 | ||
3928 | default: | |
3929 | fputc (c, file); | |
3930 | } | |
f0305a2b | 3931 | va_end (argptr); |
3cf2715d DE |
3932 | } |
3933 | \f | |
3934 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3935 | into two rtx's for single words, | |
3936 | storing in *FIRST the word that comes first in memory in the target | |
3937 | and in *SECOND the other. */ | |
3938 | ||
3939 | void | |
3940 | split_double (value, first, second) | |
3941 | rtx value; | |
3942 | rtx *first, *second; | |
3943 | { | |
3944 | if (GET_CODE (value) == CONST_INT) | |
3945 | { | |
5a1a6efd | 3946 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3947 | { |
5a1a6efd | 3948 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3949 | Extract the bits from it into two word-sized pieces. |
3950 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3951 | unsigned HOST_WIDE_INT low, high; |
3952 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3953 | ||
3954 | /* Set sign_bit to the most significant bit of a word. */ | |
3955 | sign_bit = 1; | |
3956 | sign_bit <<= BITS_PER_WORD - 1; | |
3957 | ||
3958 | /* Set mask so that all bits of the word are set. We could | |
3959 | have used 1 << BITS_PER_WORD instead of basing the | |
3960 | calculation on sign_bit. However, on machines where | |
3961 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3962 | compiler warning, even though the code would never be | |
3963 | executed. */ | |
3964 | mask = sign_bit << 1; | |
3965 | mask--; | |
3966 | ||
3967 | /* Set sign_extend as any remaining bits. */ | |
3968 | sign_extend = ~mask; | |
f5d927c0 | 3969 | |
7f251dee AO |
3970 | /* Pick the lower word and sign-extend it. */ |
3971 | low = INTVAL (value); | |
3972 | low &= mask; | |
3973 | if (low & sign_bit) | |
3974 | low |= sign_extend; | |
3975 | ||
3976 | /* Pick the higher word, shifted to the least significant | |
3977 | bits, and sign-extend it. */ | |
3978 | high = INTVAL (value); | |
3979 | high >>= BITS_PER_WORD - 1; | |
3980 | high >>= 1; | |
3981 | high &= mask; | |
3982 | if (high & sign_bit) | |
3983 | high |= sign_extend; | |
3984 | ||
3985 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3986 | if (WORDS_BIG_ENDIAN) |
3987 | { | |
7f251dee AO |
3988 | *first = GEN_INT (high); |
3989 | *second = GEN_INT (low); | |
5a1a6efd RK |
3990 | } |
3991 | else | |
3992 | { | |
7f251dee AO |
3993 | *first = GEN_INT (low); |
3994 | *second = GEN_INT (high); | |
5a1a6efd | 3995 | } |
f76b9db2 ILT |
3996 | } |
3997 | else | |
3998 | { | |
5a1a6efd RK |
3999 | /* The rule for using CONST_INT for a wider mode |
4000 | is that we regard the value as signed. | |
4001 | So sign-extend it. */ | |
4002 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
4003 | if (WORDS_BIG_ENDIAN) | |
4004 | { | |
4005 | *first = high; | |
4006 | *second = value; | |
4007 | } | |
4008 | else | |
4009 | { | |
4010 | *first = value; | |
4011 | *second = high; | |
4012 | } | |
f76b9db2 | 4013 | } |
3cf2715d DE |
4014 | } |
4015 | else if (GET_CODE (value) != CONST_DOUBLE) | |
4016 | { | |
f76b9db2 ILT |
4017 | if (WORDS_BIG_ENDIAN) |
4018 | { | |
4019 | *first = const0_rtx; | |
4020 | *second = value; | |
4021 | } | |
4022 | else | |
4023 | { | |
4024 | *first = value; | |
4025 | *second = const0_rtx; | |
4026 | } | |
3cf2715d DE |
4027 | } |
4028 | else if (GET_MODE (value) == VOIDmode | |
4029 | /* This is the old way we did CONST_DOUBLE integers. */ | |
4030 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
4031 | { | |
4032 | /* In an integer, the words are defined as most and least significant. | |
4033 | So order them by the target's convention. */ | |
f76b9db2 ILT |
4034 | if (WORDS_BIG_ENDIAN) |
4035 | { | |
4036 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
4037 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
4038 | } | |
4039 | else | |
4040 | { | |
4041 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
4042 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
4043 | } | |
3cf2715d DE |
4044 | } |
4045 | else | |
4046 | { | |
4047 | #ifdef REAL_ARITHMETIC | |
f5d927c0 KH |
4048 | REAL_VALUE_TYPE r; |
4049 | long l[2]; | |
3cf2715d DE |
4050 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
4051 | ||
4052 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
4053 | format, splits up the floating point double and outputs | |
4054 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 4055 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
4056 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
4057 | ||
b5a3eb84 JW |
4058 | /* If 32 bits is an entire word for the target, but not for the host, |
4059 | then sign-extend on the host so that the number will look the same | |
4060 | way on the host that it would on the target. See for instance | |
4061 | simplify_unary_operation. The #if is needed to avoid compiler | |
4062 | warnings. */ | |
4063 | ||
4064 | #if HOST_BITS_PER_LONG > 32 | |
4065 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
4066 | { | |
4067 | if (l[0] & ((long) 1 << 31)) | |
4068 | l[0] |= ((long) (-1) << 32); | |
4069 | if (l[1] & ((long) 1 << 31)) | |
4070 | l[1] |= ((long) (-1) << 32); | |
4071 | } | |
4072 | #endif | |
4073 | ||
3cf2715d DE |
4074 | *first = GEN_INT ((HOST_WIDE_INT) l[0]); |
4075 | *second = GEN_INT ((HOST_WIDE_INT) l[1]); | |
4076 | #else | |
4077 | if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT | |
4078 | || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) | |
4079 | && ! flag_pretend_float) | |
7f251dee | 4080 | abort (); |
3cf2715d | 4081 | |
f76b9db2 ILT |
4082 | if ( |
4083 | #ifdef HOST_WORDS_BIG_ENDIAN | |
4084 | WORDS_BIG_ENDIAN | |
3cf2715d | 4085 | #else |
f76b9db2 | 4086 | ! WORDS_BIG_ENDIAN |
3cf2715d | 4087 | #endif |
f76b9db2 ILT |
4088 | ) |
4089 | { | |
4090 | /* Host and target agree => no need to swap. */ | |
4091 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
4092 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
4093 | } | |
4094 | else | |
4095 | { | |
4096 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
4097 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
4098 | } | |
3cf2715d DE |
4099 | #endif /* no REAL_ARITHMETIC */ |
4100 | } | |
4101 | } | |
4102 | \f | |
4103 | /* Return nonzero if this function has no function calls. */ | |
4104 | ||
4105 | int | |
4106 | leaf_function_p () | |
4107 | { | |
4108 | rtx insn; | |
b660f82f | 4109 | rtx link; |
3cf2715d | 4110 | |
9e2f9a7f | 4111 | if (profile_flag || profile_block_flag || profile_arc_flag) |
3cf2715d DE |
4112 | return 0; |
4113 | ||
4114 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4115 | { | |
7d167afd JJ |
4116 | if (GET_CODE (insn) == CALL_INSN |
4117 | && ! SIBLING_CALL_P (insn)) | |
3cf2715d DE |
4118 | return 0; |
4119 | if (GET_CODE (insn) == INSN | |
4120 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
0a1c58a2 JL |
4121 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN |
4122 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
4123 | return 0; |
4124 | } | |
b660f82f JW |
4125 | for (link = current_function_epilogue_delay_list; |
4126 | link; | |
4127 | link = XEXP (link, 1)) | |
3cf2715d | 4128 | { |
b660f82f JW |
4129 | insn = XEXP (link, 0); |
4130 | ||
4131 | if (GET_CODE (insn) == CALL_INSN | |
7d167afd | 4132 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4133 | return 0; |
b660f82f JW |
4134 | if (GET_CODE (insn) == INSN |
4135 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
4136 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN | |
4137 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
4138 | return 0; |
4139 | } | |
4140 | ||
4141 | return 1; | |
4142 | } | |
4143 | ||
4144 | /* On some machines, a function with no call insns | |
4145 | can run faster if it doesn't create its own register window. | |
4146 | When output, the leaf function should use only the "output" | |
4147 | registers. Ordinarily, the function would be compiled to use | |
4148 | the "input" registers to find its arguments; it is a candidate | |
4149 | for leaf treatment if it uses only the "input" registers. | |
4150 | Leaf function treatment means renumbering so the function | |
4151 | uses the "output" registers instead. */ | |
4152 | ||
4153 | #ifdef LEAF_REGISTERS | |
4154 | ||
3cf2715d DE |
4155 | /* Return 1 if this function uses only the registers that can be |
4156 | safely renumbered. */ | |
4157 | ||
4158 | int | |
4159 | only_leaf_regs_used () | |
4160 | { | |
4161 | int i; | |
7d167afd | 4162 | char *permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4163 | |
4164 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e5e809f4 JL |
4165 | if ((regs_ever_live[i] || global_regs[i]) |
4166 | && ! permitted_reg_in_leaf_functions[i]) | |
4167 | return 0; | |
4168 | ||
4169 | if (current_function_uses_pic_offset_table | |
4170 | && pic_offset_table_rtx != 0 | |
4171 | && GET_CODE (pic_offset_table_rtx) == REG | |
4172 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) | |
4173 | return 0; | |
4174 | ||
3cf2715d DE |
4175 | return 1; |
4176 | } | |
4177 | ||
4178 | /* Scan all instructions and renumber all registers into those | |
4179 | available in leaf functions. */ | |
4180 | ||
4181 | static void | |
4182 | leaf_renumber_regs (first) | |
4183 | rtx first; | |
4184 | { | |
4185 | rtx insn; | |
4186 | ||
4187 | /* Renumber only the actual patterns. | |
4188 | The reg-notes can contain frame pointer refs, | |
4189 | and renumbering them could crash, and should not be needed. */ | |
4190 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4191 | if (INSN_P (insn)) |
3cf2715d | 4192 | leaf_renumber_regs_insn (PATTERN (insn)); |
f5d927c0 KH |
4193 | for (insn = current_function_epilogue_delay_list; |
4194 | insn; | |
4195 | insn = XEXP (insn, 1)) | |
2c3c49de | 4196 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
4197 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
4198 | } | |
4199 | ||
4200 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4201 | available in leaf functions. */ | |
4202 | ||
4203 | void | |
4204 | leaf_renumber_regs_insn (in_rtx) | |
4205 | register rtx in_rtx; | |
4206 | { | |
4207 | register int i, j; | |
6f7d635c | 4208 | register const char *format_ptr; |
3cf2715d DE |
4209 | |
4210 | if (in_rtx == 0) | |
4211 | return; | |
4212 | ||
4213 | /* Renumber all input-registers into output-registers. | |
4214 | renumbered_regs would be 1 for an output-register; | |
4215 | they */ | |
4216 | ||
4217 | if (GET_CODE (in_rtx) == REG) | |
4218 | { | |
4219 | int newreg; | |
4220 | ||
4221 | /* Don't renumber the same reg twice. */ | |
4222 | if (in_rtx->used) | |
4223 | return; | |
4224 | ||
4225 | newreg = REGNO (in_rtx); | |
4226 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4227 | to reach here as part of a REG_NOTE. */ | |
4228 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4229 | { | |
4230 | in_rtx->used = 1; | |
4231 | return; | |
4232 | } | |
4233 | newreg = LEAF_REG_REMAP (newreg); | |
4234 | if (newreg < 0) | |
4235 | abort (); | |
4236 | regs_ever_live[REGNO (in_rtx)] = 0; | |
4237 | regs_ever_live[newreg] = 1; | |
4238 | REGNO (in_rtx) = newreg; | |
4239 | in_rtx->used = 1; | |
4240 | } | |
4241 | ||
2c3c49de | 4242 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4243 | { |
4244 | /* Inside a SEQUENCE, we find insns. | |
4245 | Renumber just the patterns of these insns, | |
4246 | just as we do for the top-level insns. */ | |
4247 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4248 | return; | |
4249 | } | |
4250 | ||
4251 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4252 | ||
4253 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4254 | switch (*format_ptr++) | |
4255 | { | |
4256 | case 'e': | |
4257 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4258 | break; | |
4259 | ||
4260 | case 'E': | |
4261 | if (NULL != XVEC (in_rtx, i)) | |
4262 | { | |
4263 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4264 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4265 | } | |
4266 | break; | |
4267 | ||
4268 | case 'S': | |
4269 | case 's': | |
4270 | case '0': | |
4271 | case 'i': | |
4272 | case 'w': | |
4273 | case 'n': | |
4274 | case 'u': | |
4275 | break; | |
4276 | ||
4277 | default: | |
4278 | abort (); | |
4279 | } | |
4280 | } | |
4281 | #endif |