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3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
3b708058
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2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
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4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
940d9d63
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19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
3cf2715d
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21
22
23/* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly as assembler code by the macros FUNCTION_PROLOGUE and
46 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
47
48#include "config.h"
670ee920 49#include "system.h"
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50
51#include "tree.h"
52#include "rtl.h"
6baf1cc8 53#include "tm_p.h"
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54#include "regs.h"
55#include "insn-config.h"
56#include "insn-flags.h"
57#include "insn-attr.h"
58#include "insn-codes.h"
59#include "recog.h"
60#include "conditions.h"
61#include "flags.h"
62#include "real.h"
63#include "hard-reg-set.h"
64#include "defaults.h"
65#include "output.h"
3d195391 66#include "except.h"
49ad7cfa 67#include "function.h"
10f0ad3d 68#include "toplev.h"
d6f4ec51 69#include "reload.h"
ab87f8c8 70#include "intl.h"
be1bb652 71#include "basic-block.h"
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72
73/* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
74#if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
76ead72b 75#include "dbxout.h"
c7391272 76#if defined (USG) || !defined (HAVE_STAB_H)
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77#include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
78#else
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79#include <stab.h>
80#endif
81
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82#endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
83
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84#ifndef ACCUMULATE_OUTGOING_ARGS
85#define ACCUMULATE_OUTGOING_ARGS 0
86#endif
87
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88#ifdef XCOFF_DEBUGGING_INFO
89#include "xcoffout.h"
90#endif
91
76ead72b
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92#ifdef DWARF_DEBUGGING_INFO
93#include "dwarfout.h"
94#endif
95
96#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
97#include "dwarf2out.h"
98#endif
99
100#ifdef SDB_DEBUGGING_INFO
101#include "sdbout.h"
102#endif
103
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104/* .stabd code for line number. */
105#ifndef N_SLINE
106#define N_SLINE 0x44
107#endif
108
109/* .stabs code for included file name. */
110#ifndef N_SOL
111#define N_SOL 0x84
112#endif
113
114#ifndef INT_TYPE_SIZE
115#define INT_TYPE_SIZE BITS_PER_WORD
116#endif
117
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118#ifndef LONG_TYPE_SIZE
119#define LONG_TYPE_SIZE BITS_PER_WORD
120#endif
121
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122/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
123 null default for it to save conditionalization later. */
124#ifndef CC_STATUS_INIT
125#define CC_STATUS_INIT
126#endif
127
128/* How to start an assembler comment. */
129#ifndef ASM_COMMENT_START
130#define ASM_COMMENT_START ";#"
131#endif
132
133/* Is the given character a logical line separator for the assembler? */
134#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
135#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
136#endif
137
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138#ifndef JUMP_TABLES_IN_TEXT_SECTION
139#define JUMP_TABLES_IN_TEXT_SECTION 0
140#endif
141
3cf2715d 142/* Last insn processed by final_scan_insn. */
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143static rtx debug_insn;
144rtx current_output_insn;
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145
146/* Line number of last NOTE. */
147static int last_linenum;
148
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149/* Highest line number in current block. */
150static int high_block_linenum;
151
152/* Likewise for function. */
153static int high_function_linenum;
154
3cf2715d 155/* Filename of last NOTE. */
3cce094d 156static const char *last_filename;
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157
158/* Number of basic blocks seen so far;
159 used if profile_block_flag is set. */
160static int count_basic_blocks;
161
9e2f9a7f 162/* Number of instrumented arcs when profile_arc_flag is set. */
51891abe 163extern int count_instrumented_edges;
9e2f9a7f 164
fc470718
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165extern int length_unit_log; /* This is defined in insn-attrtab.c. */
166
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167/* Nonzero while outputting an `asm' with operands.
168 This means that inconsistencies are the user's fault, so don't abort.
169 The precise value is the insn being output, to pass to error_for_asm. */
170static rtx this_is_asm_operands;
171
172/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 173static unsigned int insn_noperands;
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174
175/* Compare optimization flag. */
176
177static rtx last_ignored_compare = 0;
178
179/* Flag indicating this insn is the start of a new basic block. */
180
181static int new_block = 1;
182
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183/* Assign a unique number to each insn that is output.
184 This can be used to generate unique local labels. */
185
186static int insn_counter = 0;
187
188#ifdef HAVE_cc0
189/* This variable contains machine-dependent flags (defined in tm.h)
190 set and examined by output routines
191 that describe how to interpret the condition codes properly. */
192
193CC_STATUS cc_status;
194
195/* During output of an insn, this contains a copy of cc_status
196 from before the insn. */
197
198CC_STATUS cc_prev_status;
199#endif
200
201/* Indexed by hardware reg number, is 1 if that register is ever
202 used in the current function.
203
204 In life_analysis, or in stupid_life_analysis, this is set
205 up to record the hard regs used explicitly. Reload adds
206 in the hard regs used for holding pseudo regs. Final uses
207 it to generate the code in the function prologue and epilogue
208 to save and restore registers as needed. */
209
210char regs_ever_live[FIRST_PSEUDO_REGISTER];
211
212/* Nonzero means current function must be given a frame pointer.
213 Set in stmt.c if anything is allocated on the stack there.
214 Set in reload1.c if anything is allocated on the stack there. */
215
216int frame_pointer_needed;
217
218/* Assign unique numbers to labels generated for profiling. */
219
220int profile_label_no;
221
18c038b9 222/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
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223
224static int block_depth;
225
226/* Nonzero if have enabled APP processing of our assembler output. */
227
228static int app_on;
229
230/* If we are outputting an insn sequence, this contains the sequence rtx.
231 Zero otherwise. */
232
233rtx final_sequence;
234
235#ifdef ASSEMBLER_DIALECT
236
237/* Number of the assembler dialect to use, starting at 0. */
238static int dialect_number;
239#endif
240
241/* Indexed by line number, nonzero if there is a note for that line. */
242
243static char *line_note_exists;
244
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245#ifdef HAVE_conditional_execution
246/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
247rtx current_insn_predicate;
248#endif
249
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250/* Linked list to hold line numbers for each basic block. */
251
252struct bb_list {
253 struct bb_list *next; /* pointer to next basic block */
254 int line_num; /* line number */
255 int file_label_num; /* LPBC<n> label # for stored filename */
256 int func_label_num; /* LPBC<n> label # for stored function name */
257};
258
259static struct bb_list *bb_head = 0; /* Head of basic block list */
260static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
261static int bb_file_label_num = -1; /* Current label # for file */
262static int bb_func_label_num = -1; /* Current label # for func */
263
264/* Linked list to hold the strings for each file and function name output. */
265
266struct bb_str {
267 struct bb_str *next; /* pointer to next string */
9b3142b3 268 const char *string; /* string */
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269 int label_num; /* label number */
270 int length; /* string length */
271};
272
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273static struct bb_str *sbb_head = 0; /* Head of string list. */
274static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
275static int sbb_label_num = 0; /* Last label used */
276
1d300e19 277#ifdef HAVE_ATTR_length
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278static int asm_insn_count PARAMS ((rtx));
279#endif
280static void profile_function PARAMS ((FILE *));
281static void profile_after_prologue PARAMS ((FILE *));
282static void add_bb PARAMS ((FILE *));
283static int add_bb_string PARAMS ((const char *, int));
284static void output_source_line PARAMS ((FILE *, rtx));
285static rtx walk_alter_subreg PARAMS ((rtx));
286static void output_asm_name PARAMS ((void));
287static void output_operand PARAMS ((rtx, int));
e9a25f70 288#ifdef LEAF_REGISTERS
711d877c 289static void leaf_renumber_regs PARAMS ((rtx));
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290#endif
291#ifdef HAVE_cc0
711d877c 292static int alter_cond PARAMS ((rtx));
e9a25f70 293#endif
ca3075bd 294#ifndef ADDR_VEC_ALIGN
711d877c 295static int final_addr_vec_align PARAMS ((rtx));
ca3075bd 296#endif
7bdb32b9 297#ifdef HAVE_ATTR_length
711d877c 298static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
7bdb32b9 299#endif
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300\f
301/* Initialize data in final at the beginning of a compilation. */
302
303void
304init_final (filename)
6a651371 305 const char *filename ATTRIBUTE_UNUSED;
3cf2715d 306{
3cf2715d 307 app_on = 0;
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308 final_sequence = 0;
309
310#ifdef ASSEMBLER_DIALECT
311 dialect_number = ASSEMBLER_DIALECT;
312#endif
313}
314
315/* Called at end of source file,
316 to output the block-profiling table for this entire compilation. */
317
318void
319end_final (filename)
87e11268 320 const char *filename;
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321{
322 int i;
323
9e2f9a7f 324 if (profile_block_flag || profile_arc_flag)
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325 {
326 char name[20];
327 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
9e2f9a7f 328 int size, rounded;
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329 struct bb_list *ptr;
330 struct bb_str *sptr;
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DE
331 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
332 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
333
334 if (profile_block_flag)
335 size = long_bytes * count_basic_blocks;
336 else
51891abe 337 size = long_bytes * count_instrumented_edges;
9e2f9a7f 338 rounded = size;
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339
340 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
341 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
342 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
343
344 data_section ();
345
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RK
346 /* Output the main header, of 11 words:
347 0: 1 if this file is initialized, else 0.
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348 1: address of file name (LPBX1).
349 2: address of table of counts (LPBX2).
350 3: number of counts in the table.
351 4: always 0, for compatibility with Sun.
352
353 The following are GNU extensions:
354
355 5: address of table of start addrs of basic blocks (LPBX3).
356 6: Number of bytes in this header.
357 7: address of table of function names (LPBX4).
358 8: address of table of line numbers (LPBX5) or 0.
47431dff 359 9: address of table of file names (LPBX6) or 0.
0f41302f 360 10: space reserved for basic block profiling. */
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361
362 ASM_OUTPUT_ALIGN (asm_out_file, align);
363
364 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
365 /* zero word */
9e2f9a7f 366 assemble_integer (const0_rtx, long_bytes, 1);
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367
368 /* address of filename */
369 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
38a448ca 370 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
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371
372 /* address of count table */
373 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
38a448ca 374 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 375
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376 /* count of the # of basic blocks or # of instrumented arcs */
377 if (profile_block_flag)
378 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
379 else
51891abe 380 assemble_integer (GEN_INT (count_instrumented_edges), long_bytes, 1);
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381
382 /* zero word (link field) */
9e2f9a7f 383 assemble_integer (const0_rtx, pointer_bytes, 1);
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384
385 /* address of basic block start address table */
9e2f9a7f
DE
386 if (profile_block_flag)
387 {
388 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 389 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
390 1);
391 }
392 else
393 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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394
395 /* byte count for extended structure. */
d7502074 396 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1);
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397
398 /* address of function name table */
9e2f9a7f
DE
399 if (profile_block_flag)
400 {
401 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
38a448ca 402 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
403 1);
404 }
405 else
406 assemble_integer (const0_rtx, pointer_bytes, 1);
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407
408 /* address of line number and filename tables if debugging. */
9e2f9a7f 409 if (write_symbols != NO_DEBUG && profile_block_flag)
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410 {
411 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
c5c76735
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412 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
413 pointer_bytes, 1);
3cf2715d 414 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
c5c76735
JL
415 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
416 pointer_bytes, 1);
3cf2715d
DE
417 }
418 else
419 {
9e2f9a7f
DE
420 assemble_integer (const0_rtx, pointer_bytes, 1);
421 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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422 }
423
47431dff
RK
424 /* space for extension ptr (link field) */
425 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
426
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427 /* Output the file name changing the suffix to .d for Sun tcov
428 compatibility. */
429 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
430 {
67e23d2f
JW
431 char *cwd = getpwd ();
432 int len = strlen (filename) + strlen (cwd) + 1;
433 char *data_file = (char *) alloca (len + 4);
434
435 strcpy (data_file, cwd);
436 strcat (data_file, "/");
437 strcat (data_file, filename);
3cf2715d 438 strip_off_ending (data_file, len);
9e2f9a7f
DE
439 if (profile_block_flag)
440 strcat (data_file, ".d");
441 else
442 strcat (data_file, ".da");
3cf2715d
DE
443 assemble_string (data_file, strlen (data_file) + 1);
444 }
445
446 /* Make space for the table of counts. */
2786cbad 447 if (size == 0)
3cf2715d
DE
448 {
449 /* Realign data section. */
450 ASM_OUTPUT_ALIGN (asm_out_file, align);
451 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
452 if (size != 0)
453 assemble_zeros (size);
454 }
455 else
456 {
457 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
458#ifdef ASM_OUTPUT_SHARED_LOCAL
459 if (flag_shared_data)
460 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
461 else
462#endif
e9a25f70
JL
463#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
464 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
465 BIGGEST_ALIGNMENT);
466#else
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467#ifdef ASM_OUTPUT_ALIGNED_LOCAL
468 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
469 BIGGEST_ALIGNMENT);
470#else
471 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
e9a25f70 472#endif
3cf2715d
DE
473#endif
474 }
475
476 /* Output any basic block strings */
9e2f9a7f 477 if (profile_block_flag)
3cf2715d 478 {
9e2f9a7f
DE
479 readonly_data_section ();
480 if (sbb_head)
3cf2715d 481 {
9e2f9a7f
DE
482 ASM_OUTPUT_ALIGN (asm_out_file, align);
483 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
484 {
485 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
486 sptr->label_num);
487 assemble_string (sptr->string, sptr->length);
488 }
3cf2715d
DE
489 }
490 }
491
492 /* Output the table of addresses. */
9e2f9a7f 493 if (profile_block_flag)
3cf2715d 494 {
9e2f9a7f
DE
495 /* Realign in new section */
496 ASM_OUTPUT_ALIGN (asm_out_file, align);
497 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
498 for (i = 0; i < count_basic_blocks; i++)
499 {
500 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
38a448ca 501 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
502 pointer_bytes, 1);
503 }
3cf2715d
DE
504 }
505
506 /* Output the table of function names. */
9e2f9a7f 507 if (profile_block_flag)
3cf2715d 508 {
9e2f9a7f
DE
509 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
510 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
3cf2715d 511 {
9e2f9a7f
DE
512 if (ptr->func_label_num >= 0)
513 {
514 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
515 ptr->func_label_num);
38a448ca 516 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
517 pointer_bytes, 1);
518 }
519 else
520 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d 521 }
3cf2715d 522
9e2f9a7f
DE
523 for ( ; i < count_basic_blocks; i++)
524 assemble_integer (const0_rtx, pointer_bytes, 1);
525 }
3cf2715d 526
9e2f9a7f 527 if (write_symbols != NO_DEBUG && profile_block_flag)
3cf2715d
DE
528 {
529 /* Output the table of line numbers. */
530 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
531 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
9e2f9a7f 532 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
3cf2715d
DE
533
534 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 535 assemble_integer (const0_rtx, long_bytes, 1);
3cf2715d
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536
537 /* Output the table of file names. */
538 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
539 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
540 {
541 if (ptr->file_label_num >= 0)
542 {
9e2f9a7f
DE
543 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
544 ptr->file_label_num);
38a448ca 545 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f 546 pointer_bytes, 1);
3cf2715d
DE
547 }
548 else
9e2f9a7f 549 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
550 }
551
552 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 553 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
554 }
555
556 /* End with the address of the table of addresses,
557 so we can find it easily, as the last word in the file's text. */
9e2f9a7f
DE
558 if (profile_block_flag)
559 {
560 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 561 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
562 1);
563 }
3cf2715d
DE
564 }
565}
566
567/* Enable APP processing of subsequent output.
568 Used before the output from an `asm' statement. */
569
570void
571app_enable ()
572{
573 if (! app_on)
574 {
51723711 575 fputs (ASM_APP_ON, asm_out_file);
3cf2715d
DE
576 app_on = 1;
577 }
578}
579
580/* Disable APP processing of subsequent output.
581 Called from varasm.c before most kinds of output. */
582
583void
584app_disable ()
585{
586 if (app_on)
587 {
51723711 588 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
DE
589 app_on = 0;
590 }
591}
592\f
593/* Return the number of slots filled in the current
594 delayed branch sequence (we don't count the insn needing the
595 delay slot). Zero if not in a delayed branch sequence. */
596
597#ifdef DELAY_SLOTS
598int
599dbr_sequence_length ()
600{
601 if (final_sequence != 0)
602 return XVECLEN (final_sequence, 0) - 1;
603 else
604 return 0;
605}
606#endif
607\f
608/* The next two pages contain routines used to compute the length of an insn
609 and to shorten branches. */
610
611/* Arrays for insn lengths, and addresses. The latter is referenced by
612 `insn_current_length'. */
613
614static short *insn_lengths;
615int *insn_addresses;
616
ea3cbda5
R
617/* Max uid for which the above arrays are valid. */
618static int insn_lengths_max_uid;
619
3cf2715d
DE
620/* Address of insn being processed. Used by `insn_current_length'. */
621int insn_current_address;
622
fc470718
R
623/* Address of insn being processed in previous iteration. */
624int insn_last_address;
625
626/* konwn invariant alignment of insn being processed. */
627int insn_current_align;
628
95707627
R
629/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
630 gives the next following alignment insn that increases the known
631 alignment, or NULL_RTX if there is no such insn.
632 For any alignment obtained this way, we can again index uid_align with
633 its uid to obtain the next following align that in turn increases the
634 alignment, till we reach NULL_RTX; the sequence obtained this way
635 for each insn we'll call the alignment chain of this insn in the following
636 comments. */
637
9e423e6d
JW
638struct label_alignment {
639 short alignment;
640 short max_skip;
641};
642
643static rtx *uid_align;
644static int *uid_shuid;
645static struct label_alignment *label_align;
95707627 646
3cf2715d
DE
647/* Indicate that branch shortening hasn't yet been done. */
648
649void
650init_insn_lengths ()
651{
95707627
R
652 if (label_align)
653 {
654 free (label_align);
655 label_align = 0;
656 }
657 if (uid_shuid)
658 {
659 free (uid_shuid);
660 uid_shuid = 0;
661 }
662 if (insn_lengths)
663 {
664 free (insn_lengths);
665 insn_lengths = 0;
ea3cbda5 666 insn_lengths_max_uid = 0;
95707627
R
667 }
668 if (insn_addresses)
669 {
670 free (insn_addresses);
671 insn_addresses = 0;
672 }
673 if (uid_align)
674 {
675 free (uid_align);
676 uid_align = 0;
677 }
3cf2715d
DE
678}
679
680/* Obtain the current length of an insn. If branch shortening has been done,
681 get its actual length. Otherwise, get its maximum length. */
682
683int
684get_attr_length (insn)
7bdb32b9 685 rtx insn ATTRIBUTE_UNUSED;
3cf2715d
DE
686{
687#ifdef HAVE_ATTR_length
688 rtx body;
689 int i;
690 int length = 0;
691
ea3cbda5 692 if (insn_lengths_max_uid > INSN_UID (insn))
3cf2715d
DE
693 return insn_lengths[INSN_UID (insn)];
694 else
695 switch (GET_CODE (insn))
696 {
697 case NOTE:
698 case BARRIER:
699 case CODE_LABEL:
700 return 0;
701
702 case CALL_INSN:
703 length = insn_default_length (insn);
704 break;
705
706 case JUMP_INSN:
707 body = PATTERN (insn);
708 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
709 {
fc470718
R
710 /* Alignment is machine-dependent and should be handled by
711 ADDR_VEC_ALIGN. */
3cf2715d
DE
712 }
713 else
714 length = insn_default_length (insn);
715 break;
716
717 case INSN:
718 body = PATTERN (insn);
719 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
720 return 0;
721
722 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
723 length = asm_insn_count (body) * insn_default_length (insn);
724 else if (GET_CODE (body) == SEQUENCE)
725 for (i = 0; i < XVECLEN (body, 0); i++)
726 length += get_attr_length (XVECEXP (body, 0, i));
727 else
728 length = insn_default_length (insn);
e9a25f70
JL
729 break;
730
731 default:
732 break;
3cf2715d
DE
733 }
734
735#ifdef ADJUST_INSN_LENGTH
736 ADJUST_INSN_LENGTH (insn, length);
737#endif
738 return length;
739#else /* not HAVE_ATTR_length */
740 return 0;
741#endif /* not HAVE_ATTR_length */
742}
743\f
fc470718
R
744/* Code to handle alignment inside shorten_branches. */
745
746/* Here is an explanation how the algorithm in align_fuzz can give
747 proper results:
748
749 Call a sequence of instructions beginning with alignment point X
750 and continuing until the next alignment point `block X'. When `X'
751 is used in an expression, it means the alignment value of the
752 alignment point.
753
754 Call the distance between the start of the first insn of block X, and
755 the end of the last insn of block X `IX', for the `inner size of X'.
756 This is clearly the sum of the instruction lengths.
757
758 Likewise with the next alignment-delimited block following X, which we
759 shall call block Y.
760
761 Call the distance between the start of the first insn of block X, and
762 the start of the first insn of block Y `OX', for the `outer size of X'.
763
764 The estimated padding is then OX - IX.
765
766 OX can be safely estimated as
767
768 if (X >= Y)
769 OX = round_up(IX, Y)
770 else
771 OX = round_up(IX, X) + Y - X
772
773 Clearly est(IX) >= real(IX), because that only depends on the
774 instruction lengths, and those being overestimated is a given.
775
776 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
777 we needn't worry about that when thinking about OX.
778
779 When X >= Y, the alignment provided by Y adds no uncertainty factor
780 for branch ranges starting before X, so we can just round what we have.
781 But when X < Y, we don't know anything about the, so to speak,
782 `middle bits', so we have to assume the worst when aligning up from an
783 address mod X to one mod Y, which is Y - X. */
784
785#ifndef LABEL_ALIGN
efa3896a 786#define LABEL_ALIGN(LABEL) align_labels_log
fc470718
R
787#endif
788
9e423e6d 789#ifndef LABEL_ALIGN_MAX_SKIP
efa3896a 790#define LABEL_ALIGN_MAX_SKIP (align_labels-1)
9e423e6d
JW
791#endif
792
fc470718 793#ifndef LOOP_ALIGN
efa3896a 794#define LOOP_ALIGN(LABEL) align_loops_log
fc470718
R
795#endif
796
9e423e6d 797#ifndef LOOP_ALIGN_MAX_SKIP
efa3896a 798#define LOOP_ALIGN_MAX_SKIP (align_loops-1)
9e423e6d
JW
799#endif
800
fc470718 801#ifndef LABEL_ALIGN_AFTER_BARRIER
efa3896a 802#define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log
fc470718
R
803#endif
804
9e423e6d 805#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
efa3896a 806#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1)
9e423e6d
JW
807#endif
808
fc470718 809#ifndef ADDR_VEC_ALIGN
ca3075bd 810static int
fc470718
R
811final_addr_vec_align (addr_vec)
812 rtx addr_vec;
813{
814 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
815
816 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
817 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
818 return align;
819
820}
821#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
822#endif
823
824#ifndef INSN_LENGTH_ALIGNMENT
825#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
826#endif
827
fc470718
R
828#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
829
de7987a6 830static int min_labelno, max_labelno;
fc470718
R
831
832#define LABEL_TO_ALIGNMENT(LABEL) \
9e423e6d
JW
833 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
834
835#define LABEL_TO_MAX_SKIP(LABEL) \
836 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
fc470718
R
837
838/* For the benefit of port specific code do this also as a function. */
839int
840label_to_alignment (label)
841 rtx label;
842{
843 return LABEL_TO_ALIGNMENT (label);
844}
845
846#ifdef HAVE_ATTR_length
847/* The differences in addresses
848 between a branch and its target might grow or shrink depending on
849 the alignment the start insn of the range (the branch for a forward
850 branch or the label for a backward branch) starts out on; if these
851 differences are used naively, they can even oscillate infinitely.
852 We therefore want to compute a 'worst case' address difference that
853 is independent of the alignment the start insn of the range end
854 up on, and that is at least as large as the actual difference.
855 The function align_fuzz calculates the amount we have to add to the
856 naively computed difference, by traversing the part of the alignment
857 chain of the start insn of the range that is in front of the end insn
858 of the range, and considering for each alignment the maximum amount
859 that it might contribute to a size increase.
860
861 For casesi tables, we also want to know worst case minimum amounts of
862 address difference, in case a machine description wants to introduce
863 some common offset that is added to all offsets in a table.
864 For this purpose, align_fuzz with a growth argument of 0 comuptes the
865 appropriate adjustment. */
866
867
868/* Compute the maximum delta by which the difference of the addresses of
869 START and END might grow / shrink due to a different address for start
870 which changes the size of alignment insns between START and END.
871 KNOWN_ALIGN_LOG is the alignment known for START.
872 GROWTH should be ~0 if the objective is to compute potential code size
873 increase, and 0 if the objective is to compute potential shrink.
874 The return value is undefined for any other value of GROWTH. */
ca3075bd 875static int
687d0ab6 876align_fuzz (start, end, known_align_log, growth)
fc470718
R
877 rtx start, end;
878 int known_align_log;
879 unsigned growth;
880{
881 int uid = INSN_UID (start);
882 rtx align_label;
883 int known_align = 1 << known_align_log;
884 int end_shuid = INSN_SHUID (end);
885 int fuzz = 0;
886
887 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
888 {
889 int align_addr, new_align;
890
891 uid = INSN_UID (align_label);
892 align_addr = insn_addresses[uid] - insn_lengths[uid];
893 if (uid_shuid[uid] > end_shuid)
894 break;
895 known_align_log = LABEL_TO_ALIGNMENT (align_label);
896 new_align = 1 << known_align_log;
897 if (new_align < known_align)
898 continue;
899 fuzz += (-align_addr ^ growth) & (new_align - known_align);
900 known_align = new_align;
901 }
902 return fuzz;
903}
904
905/* Compute a worst-case reference address of a branch so that it
906 can be safely used in the presence of aligned labels. Since the
907 size of the branch itself is unknown, the size of the branch is
908 not included in the range. I.e. for a forward branch, the reference
909 address is the end address of the branch as known from the previous
910 branch shortening pass, minus a value to account for possible size
911 increase due to alignment. For a backward branch, it is the start
912 address of the branch as known from the current pass, plus a value
913 to account for possible size increase due to alignment.
914 NB.: Therefore, the maximum offset allowed for backward branches needs
915 to exclude the branch size. */
916int
917insn_current_reference_address (branch)
918 rtx branch;
919{
920 rtx dest;
921 rtx seq = NEXT_INSN (PREV_INSN (branch));
922 int seq_uid = INSN_UID (seq);
923 if (GET_CODE (branch) != JUMP_INSN)
924 /* This can happen for example on the PA; the objective is to know the
925 offset to address something in front of the start of the function.
926 Thus, we can treat it like a backward branch.
927 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
928 any alignment we'd encounter, so we skip the call to align_fuzz. */
929 return insn_current_address;
930 dest = JUMP_LABEL (branch);
33f7f353 931 /* BRANCH has no proper alignment chain set, so use SEQ. */
fc470718
R
932 if (INSN_SHUID (branch) < INSN_SHUID (dest))
933 {
934 /* Forward branch. */
935 return (insn_last_address + insn_lengths[seq_uid]
26024475 936 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
937 }
938 else
939 {
940 /* Backward branch. */
941 return (insn_current_address
923f7cf9 942 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
943 }
944}
945#endif /* HAVE_ATTR_length */
946\f
3cf2715d
DE
947/* Make a pass over all insns and compute their actual lengths by shortening
948 any branches of variable length if possible. */
949
950/* Give a default value for the lowest address in a function. */
951
952#ifndef FIRST_INSN_ADDRESS
953#define FIRST_INSN_ADDRESS 0
954#endif
955
fc470718
R
956/* shorten_branches might be called multiple times: for example, the SH
957 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
958 In order to do this, it needs proper length information, which it obtains
959 by calling shorten_branches. This cannot be collapsed with
960 shorten_branches itself into a single pass unless we also want to intergate
961 reorg.c, since the branch splitting exposes new instructions with delay
962 slots. */
963
3cf2715d
DE
964void
965shorten_branches (first)
7bdb32b9 966 rtx first ATTRIBUTE_UNUSED;
3cf2715d 967{
3cf2715d 968 rtx insn;
fc470718
R
969 int max_uid;
970 int i;
fc470718 971 int max_log;
9e423e6d 972 int max_skip;
fc470718
R
973#ifdef HAVE_ATTR_length
974#define MAX_CODE_ALIGN 16
975 rtx seq;
3cf2715d 976 int something_changed = 1;
3cf2715d
DE
977 char *varying_length;
978 rtx body;
979 int uid;
fc470718 980 rtx align_tab[MAX_CODE_ALIGN];
3cf2715d 981
3d14e82f
JW
982 /* In order to make sure that all instructions have valid length info,
983 we must split them before we compute the address/length info. */
984
985 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
986 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
fc470718
R
987 {
988 rtx old = insn;
1b4d9ecd
RE
989 /* Don't split the insn if it has been deleted. */
990 if (! INSN_DELETED_P (old))
991 insn = try_split (PATTERN (old), old, 1);
fc470718
R
992 /* When not optimizing, the old insn will be still left around
993 with only the 'deleted' bit set. Transform it into a note
994 to avoid confusion of subsequent processing. */
995 if (INSN_DELETED_P (old))
996 {
997 PUT_CODE (old , NOTE);
998 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
999 NOTE_SOURCE_FILE (old) = 0;
1000 }
1001 }
1002#endif
3d14e82f 1003
fc470718
R
1004 /* We must do some computations even when not actually shortening, in
1005 order to get the alignment information for the labels. */
1006
95707627
R
1007 init_insn_lengths ();
1008
fc470718
R
1009 /* Compute maximum UID and allocate label_align / uid_shuid. */
1010 max_uid = get_max_uid ();
1011
1012 max_labelno = max_label_num ();
1013 min_labelno = get_first_label_num ();
d0f3d9c2 1014 label_align = (struct label_alignment *)
3de90026 1015 xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment));
fc470718 1016
fc470718
R
1017 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1018
1019 /* Initialize label_align and set up uid_shuid to be strictly
1020 monotonically rising with insn order. */
e2faec75
R
1021 /* We use max_log here to keep track of the maximum alignment we want to
1022 impose on the next CODE_LABEL (or the current one if we are processing
1023 the CODE_LABEL itself). */
1024
9e423e6d
JW
1025 max_log = 0;
1026 max_skip = 0;
1027
1028 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718
R
1029 {
1030 int log;
1031
1032 INSN_SHUID (insn) = i++;
1033 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
e2faec75
R
1034 {
1035 /* reorg might make the first insn of a loop being run once only,
1036 and delete the label in front of it. Then we want to apply
1037 the loop alignment to the new label created by reorg, which
1038 is separated by the former loop start insn from the
1039 NOTE_INSN_LOOP_BEG. */
1040 }
fc470718
R
1041 else if (GET_CODE (insn) == CODE_LABEL)
1042 {
1043 rtx next;
1044
1045 log = LABEL_ALIGN (insn);
1046 if (max_log < log)
9e423e6d
JW
1047 {
1048 max_log = log;
1049 max_skip = LABEL_ALIGN_MAX_SKIP;
1050 }
fc470718 1051 next = NEXT_INSN (insn);
75197b37
BS
1052 /* ADDR_VECs only take room if read-only data goes into the text
1053 section. */
1054 if (JUMP_TABLES_IN_TEXT_SECTION
1055#if !defined(READONLY_DATA_SECTION)
1056 || 1
fc470718 1057#endif
75197b37
BS
1058 )
1059 if (next && GET_CODE (next) == JUMP_INSN)
1060 {
1061 rtx nextbody = PATTERN (next);
1062 if (GET_CODE (nextbody) == ADDR_VEC
1063 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1064 {
1065 log = ADDR_VEC_ALIGN (next);
1066 if (max_log < log)
1067 {
1068 max_log = log;
1069 max_skip = LABEL_ALIGN_MAX_SKIP;
1070 }
1071 }
1072 }
fc470718 1073 LABEL_TO_ALIGNMENT (insn) = max_log;
9e423e6d 1074 LABEL_TO_MAX_SKIP (insn) = max_skip;
fc470718 1075 max_log = 0;
9e423e6d 1076 max_skip = 0;
fc470718
R
1077 }
1078 else if (GET_CODE (insn) == BARRIER)
1079 {
1080 rtx label;
1081
1082 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1083 label = NEXT_INSN (label))
1084 if (GET_CODE (label) == CODE_LABEL)
1085 {
1086 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1087 if (max_log < log)
9e423e6d
JW
1088 {
1089 max_log = log;
1090 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1091 }
fc470718
R
1092 break;
1093 }
1094 }
e2faec75
R
1095 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1096 sequences in order to handle reorg output efficiently. */
fc470718
R
1097 else if (GET_CODE (insn) == NOTE
1098 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1099 {
1100 rtx label;
edd6ede7 1101 int nest = 0;
fc470718 1102
edd6ede7
R
1103 /* Search for the label that starts the loop.
1104 Don't skip past the end of the loop, since that could
1105 lead to putting an alignment where it does not belong.
1106 However, a label after a nested (non-)loop would be OK. */
e2faec75 1107 for (label = insn; label; label = NEXT_INSN (label))
edd6ede7
R
1108 {
1109 if (GET_CODE (label) == NOTE
1110 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG)
1111 nest++;
1112 else if (GET_CODE (label) == NOTE
1113 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END
1114 && --nest == 0)
fc470718 1115 break;
edd6ede7
R
1116 else if (GET_CODE (label) == CODE_LABEL)
1117 {
2148624a 1118 log = LOOP_ALIGN (label);
edd6ede7
R
1119 if (max_log < log)
1120 {
1121 max_log = log;
1122 max_skip = LOOP_ALIGN_MAX_SKIP;
1123 }
1124 break;
1125 }
1126 }
fc470718
R
1127 }
1128 else
1129 continue;
1130 }
1131#ifdef HAVE_ATTR_length
1132
1133 /* Allocate the rest of the arrays. */
fc470718 1134 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
ea3cbda5 1135 insn_lengths_max_uid = max_uid;
af035616
R
1136 /* Syntax errors can lead to labels being outside of the main insn stream.
1137 Initialize insn_addresses, so that we get reproducible results. */
3de90026 1138 insn_addresses = (int *) xcalloc (max_uid, sizeof (int));
fc470718 1139
3de90026 1140 varying_length = (char *) xcalloc (max_uid, sizeof (char));
fc470718
R
1141
1142 /* Initialize uid_align. We scan instructions
1143 from end to start, and keep in align_tab[n] the last seen insn
1144 that does an alignment of at least n+1, i.e. the successor
1145 in the alignment chain for an insn that does / has a known
1146 alignment of n. */
3de90026 1147 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
fc470718
R
1148
1149 for (i = MAX_CODE_ALIGN; --i >= 0; )
1150 align_tab[i] = NULL_RTX;
1151 seq = get_last_insn ();
33f7f353 1152 for (; seq; seq = PREV_INSN (seq))
fc470718
R
1153 {
1154 int uid = INSN_UID (seq);
1155 int log;
fc470718
R
1156 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1157 uid_align[uid] = align_tab[0];
fc470718
R
1158 if (log)
1159 {
1160 /* Found an alignment label. */
1161 uid_align[uid] = align_tab[log];
1162 for (i = log - 1; i >= 0; i--)
1163 align_tab[i] = seq;
1164 }
33f7f353
JR
1165 }
1166#ifdef CASE_VECTOR_SHORTEN_MODE
1167 if (optimize)
1168 {
1169 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1170 label fields. */
1171
1172 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1173 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1174 int rel;
1175
1176 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 1177 {
33f7f353
JR
1178 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1179 int len, i, min, max, insn_shuid;
1180 int min_align;
1181 addr_diff_vec_flags flags;
1182
1183 if (GET_CODE (insn) != JUMP_INSN
1184 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1185 continue;
1186 pat = PATTERN (insn);
1187 len = XVECLEN (pat, 1);
1188 if (len <= 0)
1189 abort ();
1190 min_align = MAX_CODE_ALIGN;
1191 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1192 {
1193 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1194 int shuid = INSN_SHUID (lab);
1195 if (shuid < min)
1196 {
1197 min = shuid;
1198 min_lab = lab;
1199 }
1200 if (shuid > max)
1201 {
1202 max = shuid;
1203 max_lab = lab;
1204 }
1205 if (min_align > LABEL_TO_ALIGNMENT (lab))
1206 min_align = LABEL_TO_ALIGNMENT (lab);
1207 }
1208 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1209 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1210 insn_shuid = INSN_SHUID (insn);
1211 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1212 flags.min_align = min_align;
1213 flags.base_after_vec = rel > insn_shuid;
1214 flags.min_after_vec = min > insn_shuid;
1215 flags.max_after_vec = max > insn_shuid;
1216 flags.min_after_base = min > rel;
1217 flags.max_after_base = max > rel;
1218 ADDR_DIFF_VEC_FLAGS (pat) = flags;
fc470718
R
1219 }
1220 }
33f7f353 1221#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1222
3cf2715d
DE
1223
1224 /* Compute initial lengths, addresses, and varying flags for each insn. */
1225 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1226 insn != 0;
1227 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1228 {
1229 uid = INSN_UID (insn);
fc470718 1230
3cf2715d 1231 insn_lengths[uid] = 0;
fc470718
R
1232
1233 if (GET_CODE (insn) == CODE_LABEL)
1234 {
1235 int log = LABEL_TO_ALIGNMENT (insn);
1236 if (log)
1237 {
1238 int align = 1 << log;
ecb06768 1239 int new_address = (insn_current_address + align - 1) & -align;
fc470718
R
1240 insn_lengths[uid] = new_address - insn_current_address;
1241 insn_current_address = new_address;
1242 }
1243 }
1244
1245 insn_addresses[uid] = insn_current_address;
3cf2715d
DE
1246
1247 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1248 || GET_CODE (insn) == CODE_LABEL)
1249 continue;
04da53bd
R
1250 if (INSN_DELETED_P (insn))
1251 continue;
3cf2715d
DE
1252
1253 body = PATTERN (insn);
1254 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
5a32a90c
JR
1255 {
1256 /* This only takes room if read-only data goes into the text
1257 section. */
75197b37
BS
1258 if (JUMP_TABLES_IN_TEXT_SECTION
1259#if !defined(READONLY_DATA_SECTION)
1260 || 1
1261#endif
1262 )
1263 insn_lengths[uid] = (XVECLEN (body,
1264 GET_CODE (body) == ADDR_DIFF_VEC)
1265 * GET_MODE_SIZE (GET_MODE (body)));
5a32a90c 1266 /* Alignment is handled by ADDR_VEC_ALIGN. */
5a32a90c 1267 }
a30caf5c 1268 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
3cf2715d
DE
1269 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1270 else if (GET_CODE (body) == SEQUENCE)
1271 {
1272 int i;
1273 int const_delay_slots;
1274#ifdef DELAY_SLOTS
1275 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1276#else
1277 const_delay_slots = 0;
1278#endif
1279 /* Inside a delay slot sequence, we do not do any branch shortening
1280 if the shortening could change the number of delay slots
0f41302f 1281 of the branch. */
3cf2715d
DE
1282 for (i = 0; i < XVECLEN (body, 0); i++)
1283 {
1284 rtx inner_insn = XVECEXP (body, 0, i);
1285 int inner_uid = INSN_UID (inner_insn);
1286 int inner_length;
1287
a30caf5c
DC
1288 if (GET_CODE (body) == ASM_INPUT
1289 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
3cf2715d
DE
1290 inner_length = (asm_insn_count (PATTERN (inner_insn))
1291 * insn_default_length (inner_insn));
1292 else
1293 inner_length = insn_default_length (inner_insn);
1294
1295 insn_lengths[inner_uid] = inner_length;
1296 if (const_delay_slots)
1297 {
1298 if ((varying_length[inner_uid]
1299 = insn_variable_length_p (inner_insn)) != 0)
1300 varying_length[uid] = 1;
1301 insn_addresses[inner_uid] = (insn_current_address +
1302 insn_lengths[uid]);
1303 }
1304 else
1305 varying_length[inner_uid] = 0;
1306 insn_lengths[uid] += inner_length;
1307 }
1308 }
1309 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1310 {
1311 insn_lengths[uid] = insn_default_length (insn);
1312 varying_length[uid] = insn_variable_length_p (insn);
1313 }
1314
1315 /* If needed, do any adjustment. */
1316#ifdef ADJUST_INSN_LENGTH
1317 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
04b6000c
VM
1318 if (insn_lengths[uid] < 0)
1319 fatal_insn ("Negative insn length", insn);
3cf2715d
DE
1320#endif
1321 }
1322
1323 /* Now loop over all the insns finding varying length insns. For each,
1324 get the current insn length. If it has changed, reflect the change.
1325 When nothing changes for a full pass, we are done. */
1326
1327 while (something_changed)
1328 {
1329 something_changed = 0;
fc470718 1330 insn_current_align = MAX_CODE_ALIGN - 1;
3cf2715d
DE
1331 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1332 insn != 0;
1333 insn = NEXT_INSN (insn))
1334 {
1335 int new_length;
b729186a 1336#ifdef ADJUST_INSN_LENGTH
3cf2715d 1337 int tmp_length;
b729186a 1338#endif
fc470718 1339 int length_align;
3cf2715d
DE
1340
1341 uid = INSN_UID (insn);
fc470718
R
1342
1343 if (GET_CODE (insn) == CODE_LABEL)
1344 {
1345 int log = LABEL_TO_ALIGNMENT (insn);
1346 if (log > insn_current_align)
1347 {
1348 int align = 1 << log;
ecb06768 1349 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1350 insn_lengths[uid] = new_address - insn_current_address;
1351 insn_current_align = log;
1352 insn_current_address = new_address;
1353 }
1354 else
1355 insn_lengths[uid] = 0;
1356 insn_addresses[uid] = insn_current_address;
1357 continue;
1358 }
1359
1360 length_align = INSN_LENGTH_ALIGNMENT (insn);
1361 if (length_align < insn_current_align)
1362 insn_current_align = length_align;
1363
1364 insn_last_address = insn_addresses[uid];
3cf2715d 1365 insn_addresses[uid] = insn_current_address;
fc470718 1366
5e75ef4a 1367#ifdef CASE_VECTOR_SHORTEN_MODE
33f7f353
JR
1368 if (optimize && GET_CODE (insn) == JUMP_INSN
1369 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1370 {
33f7f353
JR
1371 rtx body = PATTERN (insn);
1372 int old_length = insn_lengths[uid];
1373 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1374 rtx min_lab = XEXP (XEXP (body, 2), 0);
1375 rtx max_lab = XEXP (XEXP (body, 3), 0);
1376 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1377 int rel_addr = insn_addresses[INSN_UID (rel_lab)];
1378 int min_addr = insn_addresses[INSN_UID (min_lab)];
1379 int max_addr = insn_addresses[INSN_UID (max_lab)];
1380 rtx prev;
1381 int rel_align = 0;
1382
1383 /* Try to find a known alignment for rel_lab. */
1384 for (prev = rel_lab;
1385 prev
1386 && ! insn_lengths[INSN_UID (prev)]
1387 && ! (varying_length[INSN_UID (prev)] & 1);
1388 prev = PREV_INSN (prev))
1389 if (varying_length[INSN_UID (prev)] & 2)
1390 {
1391 rel_align = LABEL_TO_ALIGNMENT (prev);
1392 break;
1393 }
1394
1395 /* See the comment on addr_diff_vec_flags in rtl.h for the
1396 meaning of the flags values. base: REL_LAB vec: INSN */
1397 /* Anything after INSN has still addresses from the last
1398 pass; adjust these so that they reflect our current
1399 estimate for this pass. */
1400 if (flags.base_after_vec)
1401 rel_addr += insn_current_address - insn_last_address;
1402 if (flags.min_after_vec)
1403 min_addr += insn_current_address - insn_last_address;
1404 if (flags.max_after_vec)
1405 max_addr += insn_current_address - insn_last_address;
1406 /* We want to know the worst case, i.e. lowest possible value
1407 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1408 its offset is positive, and we have to be wary of code shrink;
1409 otherwise, it is negative, and we have to be vary of code
1410 size increase. */
1411 if (flags.min_after_base)
1412 {
1413 /* If INSN is between REL_LAB and MIN_LAB, the size
1414 changes we are about to make can change the alignment
1415 within the observed offset, therefore we have to break
1416 it up into two parts that are independent. */
1417 if (! flags.base_after_vec && flags.min_after_vec)
1418 {
1419 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1420 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1421 }
1422 else
1423 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1424 }
1425 else
1426 {
1427 if (flags.base_after_vec && ! flags.min_after_vec)
1428 {
1429 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1430 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1431 }
1432 else
1433 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1434 }
1435 /* Likewise, determine the highest lowest possible value
1436 for the offset of MAX_LAB. */
1437 if (flags.max_after_base)
1438 {
1439 if (! flags.base_after_vec && flags.max_after_vec)
1440 {
1441 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1442 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1443 }
1444 else
1445 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1446 }
1447 else
1448 {
1449 if (flags.base_after_vec && ! flags.max_after_vec)
1450 {
1451 max_addr += align_fuzz (max_lab, insn, 0, 0);
1452 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1453 }
1454 else
1455 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1456 }
1457 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1458 max_addr - rel_addr,
1459 body));
75197b37
BS
1460 if (JUMP_TABLES_IN_TEXT_SECTION
1461#if !defined(READONLY_DATA_SECTION)
1462 || 1
33f7f353 1463#endif
75197b37
BS
1464 )
1465 {
1466 insn_lengths[uid]
1467 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1468 insn_current_address += insn_lengths[uid];
1469 if (insn_lengths[uid] != old_length)
1470 something_changed = 1;
1471 }
1472
33f7f353 1473 continue;
33f7f353 1474 }
5e75ef4a
JL
1475#endif /* CASE_VECTOR_SHORTEN_MODE */
1476
1477 if (! (varying_length[uid]))
3cf2715d
DE
1478 {
1479 insn_current_address += insn_lengths[uid];
1480 continue;
1481 }
1482 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1483 {
1484 int i;
1485
1486 body = PATTERN (insn);
1487 new_length = 0;
1488 for (i = 0; i < XVECLEN (body, 0); i++)
1489 {
1490 rtx inner_insn = XVECEXP (body, 0, i);
1491 int inner_uid = INSN_UID (inner_insn);
1492 int inner_length;
1493
1494 insn_addresses[inner_uid] = insn_current_address;
1495
1496 /* insn_current_length returns 0 for insns with a
1497 non-varying length. */
1498 if (! varying_length[inner_uid])
1499 inner_length = insn_lengths[inner_uid];
1500 else
1501 inner_length = insn_current_length (inner_insn);
1502
1503 if (inner_length != insn_lengths[inner_uid])
1504 {
1505 insn_lengths[inner_uid] = inner_length;
1506 something_changed = 1;
1507 }
1508 insn_current_address += insn_lengths[inner_uid];
1509 new_length += inner_length;
1510 }
1511 }
1512 else
1513 {
1514 new_length = insn_current_length (insn);
1515 insn_current_address += new_length;
1516 }
1517
3cf2715d
DE
1518#ifdef ADJUST_INSN_LENGTH
1519 /* If needed, do any adjustment. */
1520 tmp_length = new_length;
1521 ADJUST_INSN_LENGTH (insn, new_length);
1522 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1523#endif
1524
1525 if (new_length != insn_lengths[uid])
1526 {
1527 insn_lengths[uid] = new_length;
1528 something_changed = 1;
1529 }
1530 }
bb4aaf18
TG
1531 /* For a non-optimizing compile, do only a single pass. */
1532 if (!optimize)
1533 break;
3cf2715d 1534 }
fc470718
R
1535
1536 free (varying_length);
1537
3cf2715d
DE
1538#endif /* HAVE_ATTR_length */
1539}
1540
1541#ifdef HAVE_ATTR_length
1542/* Given the body of an INSN known to be generated by an ASM statement, return
1543 the number of machine instructions likely to be generated for this insn.
1544 This is used to compute its length. */
1545
1546static int
1547asm_insn_count (body)
1548 rtx body;
1549{
3cce094d 1550 const char *template;
3cf2715d
DE
1551 int count = 1;
1552
5d0930ea
DE
1553 if (GET_CODE (body) == ASM_INPUT)
1554 template = XSTR (body, 0);
1555 else
1556 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1557 NULL_PTR, NULL_PTR);
1558
1559 for ( ; *template; template++)
3cf2715d
DE
1560 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1561 count++;
1562
1563 return count;
1564}
1565#endif
1566\f
1567/* Output assembler code for the start of a function,
1568 and initialize some of the variables in this file
1569 for the new function. The label for the function and associated
1570 assembler pseudo-ops have already been output in `assemble_start_function'.
1571
1572 FIRST is the first insn of the rtl for the function being compiled.
1573 FILE is the file to write assembler code to.
1574 OPTIMIZE is nonzero if we should eliminate redundant
1575 test and compare insns. */
1576
1577void
1578final_start_function (first, file, optimize)
1579 rtx first;
1580 FILE *file;
6a651371 1581 int optimize ATTRIBUTE_UNUSED;
3cf2715d
DE
1582{
1583 block_depth = 0;
1584
1585 this_is_asm_operands = 0;
1586
1587#ifdef NON_SAVING_SETJMP
1588 /* A function that calls setjmp should save and restore all the
1589 call-saved registers on a system where longjmp clobbers them. */
1590 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1591 {
1592 int i;
1593
1594 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
252f342a 1595 if (!call_used_regs[i])
3cf2715d
DE
1596 regs_ever_live[i] = 1;
1597 }
1598#endif
1599
1600 /* Initial line number is supposed to be output
1601 before the function's prologue and label
1602 so that the function's address will not appear to be
1603 in the last statement of the preceding function. */
1604 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
5fad6898
RK
1605 last_linenum = high_block_linenum = high_function_linenum
1606 = NOTE_LINE_NUMBER (first);
eac40081 1607
c5cec899 1608#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
d291dd49 1609 /* Output DWARF definition of the function. */
0021b564 1610 if (dwarf2out_do_frame ())
9a666dda 1611 dwarf2out_begin_prologue ();
00262c8a
ML
1612 else
1613 current_function_func_begin_label = 0;
d291dd49
JM
1614#endif
1615
5fad6898
RK
1616 /* For SDB and XCOFF, the function beginning must be marked between
1617 the function label and the prologue. We always need this, even when
3c734272 1618 -g1 was used. Defer on MIPS systems so that parameter descriptions
0f41302f 1619 follow function entry. */
3c734272 1620#if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
5fad6898
RK
1621 if (write_symbols == SDB_DEBUG)
1622 sdbout_begin_function (last_linenum);
1623 else
2e2bbce2 1624#endif
3cf2715d 1625#ifdef XCOFF_DEBUGGING_INFO
5fad6898
RK
1626 if (write_symbols == XCOFF_DEBUG)
1627 xcoffout_begin_function (file, last_linenum);
1628 else
3cf2715d 1629#endif
5fad6898
RK
1630 /* But only output line number for other debug info types if -g2
1631 or better. */
1632 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1633 output_source_line (file, first);
3cf2715d
DE
1634
1635#ifdef LEAF_REG_REMAP
54ff41b7 1636 if (current_function_uses_only_leaf_regs)
3cf2715d
DE
1637 leaf_renumber_regs (first);
1638#endif
1639
1640 /* The Sun386i and perhaps other machines don't work right
1641 if the profiling code comes after the prologue. */
1642#ifdef PROFILE_BEFORE_PROLOGUE
1643 if (profile_flag)
1644 profile_function (file);
1645#endif /* PROFILE_BEFORE_PROLOGUE */
1646
0021b564
JM
1647#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1648 if (dwarf2out_do_frame ())
1649 dwarf2out_frame_debug (NULL_RTX);
1650#endif
1651
18c038b9
MM
1652 /* If debugging, assign block numbers to all of the blocks in this
1653 function. */
1654 if (write_symbols)
1655 {
1656 number_blocks (current_function_decl);
3ac79482 1657 remove_unnecessary_notes ();
18c038b9
MM
1658 /* We never actually put out begin/end notes for the top-level
1659 block in the function. But, conceptually, that block is
1660 always needed. */
1661 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1662 }
1663
3cf2715d
DE
1664#ifdef FUNCTION_PROLOGUE
1665 /* First output the function prologue: code to set up the stack frame. */
1666 FUNCTION_PROLOGUE (file, get_frame_size ());
1667#endif
1668
3cf2715d
DE
1669 /* If the machine represents the prologue as RTL, the profiling code must
1670 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1671#ifdef HAVE_prologue
1672 if (! HAVE_prologue)
1673#endif
1674 profile_after_prologue (file);
1675
1676 profile_label_no++;
1677
1678 /* If we are doing basic block profiling, remember a printable version
1679 of the function name. */
1680 if (profile_block_flag)
1681 {
db3cf6fb
MS
1682 bb_func_label_num
1683 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
3cf2715d
DE
1684 }
1685}
1686
1687static void
1688profile_after_prologue (file)
7bdb32b9 1689 FILE *file ATTRIBUTE_UNUSED;
3cf2715d
DE
1690{
1691#ifdef FUNCTION_BLOCK_PROFILER
1692 if (profile_block_flag)
1693 {
47431dff 1694 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
3cf2715d
DE
1695 }
1696#endif /* FUNCTION_BLOCK_PROFILER */
1697
1698#ifndef PROFILE_BEFORE_PROLOGUE
1699 if (profile_flag)
1700 profile_function (file);
1701#endif /* not PROFILE_BEFORE_PROLOGUE */
1702}
1703
1704static void
1705profile_function (file)
1706 FILE *file;
1707{
9e2f9a7f 1708 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
b729186a
JL
1709#if defined(ASM_OUTPUT_REG_PUSH)
1710#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
3cf2715d 1711 int sval = current_function_returns_struct;
b729186a
JL
1712#endif
1713#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
3cf2715d 1714 int cxt = current_function_needs_context;
b729186a
JL
1715#endif
1716#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d
DE
1717
1718 data_section ();
1719 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1720 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
9e2f9a7f 1721 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
3cf2715d 1722
499df339 1723 function_section (current_function_decl);
3cf2715d 1724
65ed39df 1725#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1726 if (sval)
1727 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1728#else
65ed39df 1729#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1730 if (sval)
51723711
KG
1731 {
1732 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1733 }
3cf2715d
DE
1734#endif
1735#endif
1736
65ed39df 1737#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1738 if (cxt)
1739 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1740#else
65ed39df 1741#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1742 if (cxt)
51723711
KG
1743 {
1744 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1745 }
3cf2715d
DE
1746#endif
1747#endif
3cf2715d
DE
1748
1749 FUNCTION_PROFILER (file, profile_label_no);
1750
65ed39df 1751#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1752 if (cxt)
1753 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1754#else
65ed39df 1755#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1756 if (cxt)
51723711
KG
1757 {
1758 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1759 }
3cf2715d
DE
1760#endif
1761#endif
3cf2715d 1762
65ed39df 1763#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1764 if (sval)
1765 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1766#else
65ed39df 1767#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1768 if (sval)
51723711
KG
1769 {
1770 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1771 }
3cf2715d
DE
1772#endif
1773#endif
1774}
1775
1776/* Output assembler code for the end of a function.
1777 For clarity, args are same as those of `final_start_function'
1778 even though not all of them are needed. */
1779
1780void
1781final_end_function (first, file, optimize)
6a651371 1782 rtx first ATTRIBUTE_UNUSED;
fbd40359 1783 FILE *file ATTRIBUTE_UNUSED;
6a651371 1784 int optimize ATTRIBUTE_UNUSED;
3cf2715d 1785{
be1bb652 1786 app_disable ();
3cf2715d
DE
1787
1788#ifdef SDB_DEBUGGING_INFO
1789 if (write_symbols == SDB_DEBUG)
eac40081 1790 sdbout_end_function (high_function_linenum);
3cf2715d
DE
1791#endif
1792
1793#ifdef DWARF_DEBUGGING_INFO
1794 if (write_symbols == DWARF_DEBUG)
1795 dwarfout_end_function ();
1796#endif
1797
1798#ifdef XCOFF_DEBUGGING_INFO
1799 if (write_symbols == XCOFF_DEBUG)
eac40081 1800 xcoffout_end_function (file, high_function_linenum);
3cf2715d
DE
1801#endif
1802
1803#ifdef FUNCTION_EPILOGUE
1804 /* Finally, output the function epilogue:
1805 code to restore the stack frame and return to the caller. */
1806 FUNCTION_EPILOGUE (file, get_frame_size ());
1807#endif
1808
1809#ifdef SDB_DEBUGGING_INFO
1810 if (write_symbols == SDB_DEBUG)
1811 sdbout_end_epilogue ();
1812#endif
1813
1814#ifdef DWARF_DEBUGGING_INFO
1815 if (write_symbols == DWARF_DEBUG)
1816 dwarfout_end_epilogue ();
1817#endif
1818
c5cec899 1819#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
0021b564 1820 if (dwarf2out_do_frame ())
9a666dda
JM
1821 dwarf2out_end_epilogue ();
1822#endif
1823
3cf2715d
DE
1824#ifdef XCOFF_DEBUGGING_INFO
1825 if (write_symbols == XCOFF_DEBUG)
1826 xcoffout_end_epilogue (file);
1827#endif
1828
1829 bb_func_label_num = -1; /* not in function, nuke label # */
1830
ce152ef8
AM
1831#ifdef IA64_UNWIND_INFO
1832 output_function_exception_table ();
1833#endif
1834
3cf2715d
DE
1835 /* If FUNCTION_EPILOGUE is not defined, then the function body
1836 itself contains return instructions wherever needed. */
1837}
1838\f
1839/* Add a block to the linked list that remembers the current line/file/function
1840 for basic block profiling. Emit the label in front of the basic block and
1841 the instructions that increment the count field. */
1842
1843static void
1844add_bb (file)
1845 FILE *file;
1846{
1847 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1848
1849 /* Add basic block to linked list. */
1850 ptr->next = 0;
1851 ptr->line_num = last_linenum;
1852 ptr->file_label_num = bb_file_label_num;
1853 ptr->func_label_num = bb_func_label_num;
1854 *bb_tail = ptr;
1855 bb_tail = &ptr->next;
1856
1857 /* Enable the table of basic-block use counts
1858 to point at the code it applies to. */
1859 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1860
1861 /* Before first insn of this basic block, increment the
1862 count of times it was entered. */
1863#ifdef BLOCK_PROFILER
1864 BLOCK_PROFILER (file, count_basic_blocks);
9e2f9a7f
DE
1865#endif
1866#ifdef HAVE_cc0
3cf2715d
DE
1867 CC_STATUS_INIT;
1868#endif
1869
1870 new_block = 0;
1871 count_basic_blocks++;
1872}
1873
1874/* Add a string to be used for basic block profiling. */
1875
1876static int
1877add_bb_string (string, perm_p)
9b3142b3 1878 const char *string;
3cf2715d
DE
1879 int perm_p;
1880{
1881 int len;
1882 struct bb_str *ptr = 0;
1883
1884 if (!string)
1885 {
1886 string = "<unknown>";
1887 perm_p = TRUE;
1888 }
1889
1890 /* Allocate a new string if the current string isn't permanent. If
1891 the string is permanent search for the same string in other
1892 allocations. */
1893
1894 len = strlen (string) + 1;
1895 if (!perm_p)
1896 {
1897 char *p = (char *) permalloc (len);
1898 bcopy (string, p, len);
1899 string = p;
1900 }
1901 else
0f41302f 1902 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
3cf2715d
DE
1903 if (ptr->string == string)
1904 break;
1905
1906 /* Allocate a new string block if we need to. */
1907 if (!ptr)
1908 {
1909 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1910 ptr->next = 0;
1911 ptr->length = len;
1912 ptr->label_num = sbb_label_num++;
1913 ptr->string = string;
1914 *sbb_tail = ptr;
1915 sbb_tail = &ptr->next;
1916 }
1917
1918 return ptr->label_num;
1919}
1920
1921\f
1922/* Output assembler code for some insns: all or part of a function.
1923 For description of args, see `final_start_function', above.
1924
1925 PRESCAN is 1 if we are not really outputting,
1926 just scanning as if we were outputting.
1927 Prescanning deletes and rearranges insns just like ordinary output.
1928 PRESCAN is -2 if we are outputting after having prescanned.
1929 In this case, don't try to delete or rearrange insns
1930 because that has already been done.
1931 Prescanning is done only on certain machines. */
1932
1933void
1934final (first, file, optimize, prescan)
1935 rtx first;
1936 FILE *file;
1937 int optimize;
1938 int prescan;
1939{
1940 register rtx insn;
1941 int max_line = 0;
a8c3510c 1942 int max_uid = 0;
3cf2715d
DE
1943
1944 last_ignored_compare = 0;
1945 new_block = 1;
1946
3d195391
MS
1947 check_exception_handler_labels ();
1948
3cf2715d
DE
1949 /* Make a map indicating which line numbers appear in this function.
1950 When producing SDB debugging info, delete troublesome line number
1951 notes from inlined functions in other files as well as duplicate
1952 line number notes. */
1953#ifdef SDB_DEBUGGING_INFO
1954 if (write_symbols == SDB_DEBUG)
1955 {
1956 rtx last = 0;
1957 for (insn = first; insn; insn = NEXT_INSN (insn))
1958 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1959 {
1960 if ((RTX_INTEGRATED_P (insn)
1961 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1962 || (last != 0
1963 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1964 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1965 {
1966 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1967 NOTE_SOURCE_FILE (insn) = 0;
1968 continue;
1969 }
1970 last = insn;
1971 if (NOTE_LINE_NUMBER (insn) > max_line)
1972 max_line = NOTE_LINE_NUMBER (insn);
1973 }
1974 }
1975 else
1976#endif
1977 {
1978 for (insn = first; insn; insn = NEXT_INSN (insn))
1979 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1980 max_line = NOTE_LINE_NUMBER (insn);
1981 }
1982
bedda2da 1983 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
3cf2715d
DE
1984
1985 for (insn = first; insn; insn = NEXT_INSN (insn))
a8c3510c
AM
1986 {
1987 if (INSN_UID (insn) > max_uid) /* find largest UID */
1988 max_uid = INSN_UID (insn);
1989 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1990 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
9ef4c6ef
JC
1991#ifdef HAVE_cc0
1992 /* If CC tracking across branches is enabled, record the insn which
1993 jumps to each branch only reached from one place. */
7ad7f828 1994 if (optimize && GET_CODE (insn) == JUMP_INSN)
9ef4c6ef
JC
1995 {
1996 rtx lab = JUMP_LABEL (insn);
1997 if (lab && LABEL_NUSES (lab) == 1)
1998 {
1999 LABEL_REFS (lab) = insn;
2000 }
2001 }
2002#endif
a8c3510c
AM
2003 }
2004
2005 /* Initialize insn_eh_region table if eh is being used. */
2006
2007 init_insn_eh_region (first, max_uid);
3cf2715d
DE
2008
2009 init_recog ();
2010
2011 CC_STATUS_INIT;
2012
2013 /* Output the insns. */
2014 for (insn = NEXT_INSN (first); insn;)
2f16edb1
TG
2015 {
2016#ifdef HAVE_ATTR_length
a12cf650
JL
2017#ifdef ENABLE_CHECKING
2018 /* This can be triggered by bugs elsewhere in the compiler if
2019 new insns are created after init_insn_lengths is called. */
2020 if (INSN_UID (insn) >= insn_lengths_max_uid)
2021 abort ();
2022#endif
2f16edb1
TG
2023 insn_current_address = insn_addresses[INSN_UID (insn)];
2024#endif
2025 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2026 }
3cf2715d
DE
2027
2028 /* Do basic-block profiling here
2029 if the last insn was a conditional branch. */
2030 if (profile_block_flag && new_block)
2031 add_bb (file);
a8c3510c
AM
2032
2033 free_insn_eh_region ();
bedda2da
MM
2034 free (line_note_exists);
2035 line_note_exists = NULL;
3cf2715d
DE
2036}
2037\f
4bbf910e
RH
2038const char *
2039get_insn_template (code, insn)
2040 int code;
2041 rtx insn;
2042{
2043 const void *output = insn_data[code].output;
2044 switch (insn_data[code].output_format)
2045 {
2046 case INSN_OUTPUT_FORMAT_SINGLE:
2047 return (const char *) output;
2048 case INSN_OUTPUT_FORMAT_MULTI:
2049 return ((const char * const *) output)[which_alternative];
2050 case INSN_OUTPUT_FORMAT_FUNCTION:
2051 if (insn == NULL)
2052 abort ();
2053 return (* (insn_output_fn) output) (recog_data.operand, insn);
2054
2055 default:
2056 abort ();
2057 }
2058}
3cf2715d
DE
2059/* The final scan for one insn, INSN.
2060 Args are same as in `final', except that INSN
2061 is the insn being scanned.
2062 Value returned is the next insn to be scanned.
2063
2064 NOPEEPHOLES is the flag to disallow peephole processing (currently
2065 used for within delayed branch sequence output). */
2066
2067rtx
2068final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2069 rtx insn;
2070 FILE *file;
272df862 2071 int optimize ATTRIBUTE_UNUSED;
3cf2715d 2072 int prescan;
272df862 2073 int nopeepholes ATTRIBUTE_UNUSED;
3cf2715d 2074{
90ca38bb
MM
2075#ifdef HAVE_cc0
2076 rtx set;
2077#endif
2078
3cf2715d
DE
2079 insn_counter++;
2080
2081 /* Ignore deleted insns. These can occur when we split insns (due to a
2082 template of "#") while not optimizing. */
2083 if (INSN_DELETED_P (insn))
2084 return NEXT_INSN (insn);
2085
2086 switch (GET_CODE (insn))
2087 {
2088 case NOTE:
2089 if (prescan > 0)
2090 break;
2091
be1bb652
RH
2092 switch (NOTE_LINE_NUMBER (insn))
2093 {
2094 case NOTE_INSN_DELETED:
2095 case NOTE_INSN_LOOP_BEG:
2096 case NOTE_INSN_LOOP_END:
2097 case NOTE_INSN_LOOP_CONT:
2098 case NOTE_INSN_LOOP_VTOP:
2099 case NOTE_INSN_FUNCTION_END:
2100 case NOTE_INSN_SETJMP:
2101 case NOTE_INSN_REPEATED_LINE_NUMBER:
2102 case NOTE_INSN_RANGE_BEG:
2103 case NOTE_INSN_RANGE_END:
2104 case NOTE_INSN_LIVE:
2105 case NOTE_INSN_EXPECTED_VALUE:
2106 break;
3cf2715d 2107
be1bb652
RH
2108 case NOTE_INSN_BASIC_BLOCK:
2109 if (flag_debug_asm)
2110 fprintf (asm_out_file, "\t%s basic block %d\n",
2111 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
2112 break;
3cf2715d 2113
be1bb652
RH
2114 case NOTE_INSN_EH_REGION_BEG:
2115 if (! exceptions_via_longjmp)
2116 {
2117 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn));
2118 if (! flag_new_exceptions)
2119 add_eh_table_entry (NOTE_EH_HANDLER (insn));
3d195391 2120#ifdef ASM_OUTPUT_EH_REGION_BEG
be1bb652 2121 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn));
3d195391 2122#endif
be1bb652 2123 }
3d195391 2124 break;
3d195391 2125
be1bb652
RH
2126 case NOTE_INSN_EH_REGION_END:
2127 if (! exceptions_via_longjmp)
2128 {
2129 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn));
2130 if (flag_new_exceptions)
2131 add_eh_table_entry (NOTE_EH_HANDLER (insn));
3d195391 2132#ifdef ASM_OUTPUT_EH_REGION_END
be1bb652 2133 ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn));
3d195391 2134#endif
be1bb652 2135 }
3d195391 2136 break;
3d195391 2137
be1bb652 2138 case NOTE_INSN_PROLOGUE_END:
3cf2715d
DE
2139#ifdef FUNCTION_END_PROLOGUE
2140 FUNCTION_END_PROLOGUE (file);
2141#endif
2142 profile_after_prologue (file);
2143 break;
3cf2715d 2144
be1bb652 2145 case NOTE_INSN_EPILOGUE_BEG:
3cf2715d 2146#ifdef FUNCTION_BEGIN_EPILOGUE
3cf2715d 2147 FUNCTION_BEGIN_EPILOGUE (file);
3cf2715d 2148#endif
be1bb652 2149 break;
3cf2715d 2150
be1bb652 2151 case NOTE_INSN_FUNCTION_BEG:
3c734272
RK
2152#if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2153 /* MIPS stabs require the parameter descriptions to be after the
0f41302f 2154 function entry point rather than before. */
3c734272 2155 if (write_symbols == SDB_DEBUG)
be1bb652
RH
2156 {
2157 app_disable ();
2158 sdbout_begin_function (last_linenum);
2159 }
3c734272 2160#endif
3cf2715d 2161#ifdef DWARF_DEBUGGING_INFO
2e2bbce2
RK
2162 /* This outputs a marker where the function body starts, so it
2163 must be after the prologue. */
3cf2715d 2164 if (write_symbols == DWARF_DEBUG)
be1bb652
RH
2165 {
2166 app_disable ();
2167 dwarfout_begin_function ();
2168 }
3cf2715d
DE
2169#endif
2170 break;
be1bb652
RH
2171
2172 case NOTE_INSN_BLOCK_BEG:
2173 if (debug_info_level == DINFO_LEVEL_NORMAL
3cf2715d 2174 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2175 || write_symbols == DWARF_DEBUG
be1bb652
RH
2176 || write_symbols == DWARF2_DEBUG)
2177 {
2178 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2179
be1bb652
RH
2180 app_disable ();
2181 ++block_depth;
2182 high_block_linenum = last_linenum;
eac40081 2183
be1bb652 2184 /* Output debugging info about the symbol-block beginning. */
3cf2715d 2185#ifdef SDB_DEBUGGING_INFO
be1bb652
RH
2186 if (write_symbols == SDB_DEBUG)
2187 sdbout_begin_block (file, last_linenum, n);
3cf2715d
DE
2188#endif
2189#ifdef XCOFF_DEBUGGING_INFO
be1bb652
RH
2190 if (write_symbols == XCOFF_DEBUG)
2191 xcoffout_begin_block (file, last_linenum, n);
3cf2715d
DE
2192#endif
2193#ifdef DBX_DEBUGGING_INFO
be1bb652
RH
2194 if (write_symbols == DBX_DEBUG)
2195 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", n);
3cf2715d
DE
2196#endif
2197#ifdef DWARF_DEBUGGING_INFO
be1bb652
RH
2198 if (write_symbols == DWARF_DEBUG)
2199 dwarfout_begin_block (n);
3cf2715d 2200#endif
9a666dda 2201#ifdef DWARF2_DEBUGGING_INFO
be1bb652
RH
2202 if (write_symbols == DWARF2_DEBUG)
2203 dwarf2out_begin_block (n);
9a666dda 2204#endif
3cf2715d 2205
be1bb652
RH
2206 /* Mark this block as output. */
2207 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2208 }
2209 break;
18c038b9 2210
be1bb652
RH
2211 case NOTE_INSN_BLOCK_END:
2212 if (debug_info_level == DINFO_LEVEL_NORMAL
2213 || debug_info_level == DINFO_LEVEL_VERBOSE
2214 || write_symbols == DWARF_DEBUG
2215 || write_symbols == DWARF2_DEBUG)
2216 {
2217 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2218
be1bb652
RH
2219 app_disable ();
2220
2221 /* End of a symbol-block. */
2222 --block_depth;
2223 if (block_depth < 0)
2224 abort ();
3cf2715d
DE
2225
2226#ifdef XCOFF_DEBUGGING_INFO
be1bb652
RH
2227 if (write_symbols == XCOFF_DEBUG)
2228 xcoffout_end_block (file, high_block_linenum, n);
3cf2715d
DE
2229#endif
2230#ifdef DBX_DEBUGGING_INFO
be1bb652
RH
2231 if (write_symbols == DBX_DEBUG)
2232 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE", n);
3cf2715d
DE
2233#endif
2234#ifdef SDB_DEBUGGING_INFO
be1bb652
RH
2235 if (write_symbols == SDB_DEBUG)
2236 sdbout_end_block (file, high_block_linenum, n);
3cf2715d
DE
2237#endif
2238#ifdef DWARF_DEBUGGING_INFO
be1bb652
RH
2239 if (write_symbols == DWARF_DEBUG)
2240 dwarfout_end_block (n);
9a666dda
JM
2241#endif
2242#ifdef DWARF2_DEBUGGING_INFO
be1bb652
RH
2243 if (write_symbols == DWARF2_DEBUG)
2244 dwarf2out_end_block (n);
3cf2715d 2245#endif
be1bb652
RH
2246 }
2247 break;
2248
2249 case NOTE_INSN_DELETED_LABEL:
2250 /* Emit the label. We may have deleted the CODE_LABEL because
2251 the label could be proved to be unreachable, though still
2252 referenced (in the form of having its address taken. */
2253 /* ??? Figure out how not to do this unconditionally. This
2254 interferes with bundling on LIW targets. */
2255 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2256
2257 if (debug_info_level == DINFO_LEVEL_NORMAL
2258 || debug_info_level == DINFO_LEVEL_VERBOSE)
2259 {
3cf2715d 2260#ifdef DWARF_DEBUGGING_INFO
be1bb652
RH
2261 if (write_symbols == DWARF_DEBUG)
2262 dwarfout_label (insn);
9a666dda
JM
2263#endif
2264#ifdef DWARF2_DEBUGGING_INFO
be1bb652
RH
2265 if (write_symbols == DWARF2_DEBUG)
2266 dwarf2out_label (insn);
3cf2715d 2267#endif
be1bb652
RH
2268 }
2269 break;
3cf2715d 2270
21835d9b
JJ
2271 case 0:
2272 break;
2273
be1bb652
RH
2274 default:
2275 if (NOTE_LINE_NUMBER (insn) <= 0)
2276 abort ();
3cf2715d 2277
be1bb652
RH
2278 /* This note is a line-number. */
2279 {
2280 register rtx note;
2281 int note_after = 0;
2282
2283 /* If there is anything real after this note, output it.
2284 If another line note follows, omit this one. */
2285 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2286 {
2287 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
3cf2715d 2288 break;
3cf2715d 2289
be1bb652
RH
2290 /* These types of notes can be significant
2291 so make sure the preceding line number stays. */
2292 else if (GET_CODE (note) == NOTE
2293 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2294 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2295 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2296 break;
2297 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2298 {
2299 /* Another line note follows; we can delete this note
2300 if no intervening line numbers have notes elsewhere. */
2301 int num;
2302 for (num = NOTE_LINE_NUMBER (insn) + 1;
2303 num < NOTE_LINE_NUMBER (note);
2304 num++)
2305 if (line_note_exists[num])
2306 break;
2307
2308 if (num >= NOTE_LINE_NUMBER (note))
2309 note_after = 1;
2310 break;
2311 }
2312 }
2313
2314 /* Output this line note if it is the first or the last line
2315 note in a row. */
2316 if (!note_after)
2317 output_source_line (file, insn);
2318 }
2319 break;
3cf2715d
DE
2320 }
2321 break;
2322
2323 case BARRIER:
f73ad30e 2324#if defined (DWARF2_UNWIND_INFO)
be1bb652
RH
2325 /* If we push arguments, we need to check all insns for stack
2326 adjustments. */
2327 if (!ACCUMULATE_OUTGOING_ARGS && dwarf2out_do_frame ())
2328 dwarf2out_frame_debug (insn);
3cf2715d
DE
2329#endif
2330 break;
2331
2332 case CODE_LABEL:
1dd8faa8
R
2333 /* The target port might emit labels in the output function for
2334 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2335 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2336 {
2337 int align = LABEL_TO_ALIGNMENT (insn);
50b2596f 2338#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
9e423e6d 2339 int max_skip = LABEL_TO_MAX_SKIP (insn);
50b2596f 2340#endif
fc470718 2341
1dd8faa8 2342 if (align && NEXT_INSN (insn))
9e423e6d
JW
2343#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2344 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2345#else
de7987a6 2346 ASM_OUTPUT_ALIGN (file, align);
9e423e6d 2347#endif
de7987a6 2348 }
9ef4c6ef 2349#ifdef HAVE_cc0
3cf2715d 2350 CC_STATUS_INIT;
9ef4c6ef
JC
2351 /* If this label is reached from only one place, set the condition
2352 codes from the instruction just before the branch. */
7ad7f828
JC
2353
2354 /* Disabled because some insns set cc_status in the C output code
2355 and NOTICE_UPDATE_CC alone can set incorrect status. */
2356 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
9ef4c6ef
JC
2357 {
2358 rtx jump = LABEL_REFS (insn);
2359 rtx barrier = prev_nonnote_insn (insn);
2360 rtx prev;
2361 /* If the LABEL_REFS field of this label has been set to point
2362 at a branch, the predecessor of the branch is a regular
2363 insn, and that branch is the only way to reach this label,
2364 set the condition codes based on the branch and its
2365 predecessor. */
2366 if (barrier && GET_CODE (barrier) == BARRIER
2367 && jump && GET_CODE (jump) == JUMP_INSN
2368 && (prev = prev_nonnote_insn (jump))
2369 && GET_CODE (prev) == INSN)
2370 {
2371 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2372 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2373 }
2374 }
2375#endif
3cf2715d
DE
2376 if (prescan > 0)
2377 break;
2378 new_block = 1;
03ffa171
RK
2379
2380#ifdef FINAL_PRESCAN_LABEL
2381 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2382#endif
2383
3cf2715d
DE
2384#ifdef SDB_DEBUGGING_INFO
2385 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2386 sdbout_label (insn);
2387#endif
2388#ifdef DWARF_DEBUGGING_INFO
2389 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2390 dwarfout_label (insn);
9a666dda
JM
2391#endif
2392#ifdef DWARF2_DEBUGGING_INFO
2393 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2394 dwarf2out_label (insn);
3cf2715d
DE
2395#endif
2396 if (app_on)
2397 {
51723711 2398 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2399 app_on = 0;
2400 }
2401 if (NEXT_INSN (insn) != 0
2402 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2403 {
2404 rtx nextbody = PATTERN (NEXT_INSN (insn));
2405
2406 /* If this label is followed by a jump-table,
2407 make sure we put the label in the read-only section. Also
2408 possibly write the label and jump table together. */
2409
2410 if (GET_CODE (nextbody) == ADDR_VEC
2411 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2412 {
e0d80184
DM
2413#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2414 /* In this case, the case vector is being moved by the
2415 target, so don't output the label at all. Leave that
2416 to the back end macros. */
2417#else
75197b37
BS
2418 if (! JUMP_TABLES_IN_TEXT_SECTION)
2419 {
2420 readonly_data_section ();
3cf2715d 2421#ifdef READONLY_DATA_SECTION
75197b37
BS
2422 ASM_OUTPUT_ALIGN (file,
2423 exact_log2 (BIGGEST_ALIGNMENT
2424 / BITS_PER_UNIT));
3cf2715d 2425#endif /* READONLY_DATA_SECTION */
75197b37
BS
2426 }
2427 else
2428 function_section (current_function_decl);
2429
3cf2715d
DE
2430#ifdef ASM_OUTPUT_CASE_LABEL
2431 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2432 NEXT_INSN (insn));
2433#else
8cd0faaf
CM
2434 if (LABEL_ALTERNATE_NAME (insn))
2435 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2436 else
2437 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
e0d80184 2438#endif
3cf2715d
DE
2439#endif
2440 break;
2441 }
2442 }
8cd0faaf
CM
2443 if (LABEL_ALTERNATE_NAME (insn))
2444 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2445 else
2446 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
3cf2715d
DE
2447 break;
2448
2449 default:
2450 {
51723711 2451 register rtx body = PATTERN (insn);
3cf2715d 2452 int insn_code_number;
9b3142b3 2453 const char *template;
b729186a 2454#ifdef HAVE_cc0
3cf2715d 2455 rtx note;
b729186a 2456#endif
3cf2715d
DE
2457
2458 /* An INSN, JUMP_INSN or CALL_INSN.
2459 First check for special kinds that recog doesn't recognize. */
2460
2461 if (GET_CODE (body) == USE /* These are just declarations */
2462 || GET_CODE (body) == CLOBBER)
2463 break;
2464
2465#ifdef HAVE_cc0
2466 /* If there is a REG_CC_SETTER note on this insn, it means that
2467 the setting of the condition code was done in the delay slot
2468 of the insn that branched here. So recover the cc status
2469 from the insn that set it. */
2470
2471 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2472 if (note)
2473 {
2474 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2475 cc_prev_status = cc_status;
2476 }
2477#endif
2478
2479 /* Detect insns that are really jump-tables
2480 and output them as such. */
2481
2482 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2483 {
7f7f8214 2484#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
3cf2715d 2485 register int vlen, idx;
7f7f8214 2486#endif
3cf2715d
DE
2487
2488 if (prescan > 0)
2489 break;
2490
2491 if (app_on)
2492 {
51723711 2493 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2494 app_on = 0;
2495 }
2496
e0d80184
DM
2497#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2498 if (GET_CODE (body) == ADDR_VEC)
2499 {
2500#ifdef ASM_OUTPUT_ADDR_VEC
2501 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2502#else
2503 abort();
2504#endif
2505 }
2506 else
2507 {
2508#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2509 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2510#else
2511 abort();
2512#endif
2513 }
2514#else
3cf2715d
DE
2515 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2516 for (idx = 0; idx < vlen; idx++)
2517 {
2518 if (GET_CODE (body) == ADDR_VEC)
2519 {
2520#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2521 ASM_OUTPUT_ADDR_VEC_ELT
2522 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2523#else
2524 abort ();
2525#endif
2526 }
2527 else
2528 {
2529#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2530 ASM_OUTPUT_ADDR_DIFF_ELT
2531 (file,
33f7f353 2532 body,
3cf2715d
DE
2533 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2534 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2535#else
2536 abort ();
2537#endif
2538 }
2539 }
2540#ifdef ASM_OUTPUT_CASE_END
2541 ASM_OUTPUT_CASE_END (file,
2542 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2543 insn);
e0d80184 2544#endif
3cf2715d
DE
2545#endif
2546
4d1065ed 2547 function_section (current_function_decl);
3cf2715d
DE
2548
2549 break;
2550 }
2551
2552 /* Do basic-block profiling when we reach a new block.
2553 Done here to avoid jump tables. */
2554 if (profile_block_flag && new_block)
2555 add_bb (file);
2556
2557 if (GET_CODE (body) == ASM_INPUT)
2558 {
2559 /* There's no telling what that did to the condition codes. */
2560 CC_STATUS_INIT;
2561 if (prescan > 0)
2562 break;
2563 if (! app_on)
2564 {
51723711 2565 fputs (ASM_APP_ON, file);
3cf2715d
DE
2566 app_on = 1;
2567 }
2568 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2569 break;
2570 }
2571
2572 /* Detect `asm' construct with operands. */
2573 if (asm_noperands (body) >= 0)
2574 {
22bf4422 2575 unsigned int noperands = asm_noperands (body);
3cf2715d 2576 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
3cce094d 2577 const char *string;
3cf2715d
DE
2578
2579 /* There's no telling what that did to the condition codes. */
2580 CC_STATUS_INIT;
2581 if (prescan > 0)
2582 break;
2583
2584 if (! app_on)
2585 {
51723711 2586 fputs (ASM_APP_ON, file);
3cf2715d
DE
2587 app_on = 1;
2588 }
2589
2590 /* Get out the operand values. */
2591 string = decode_asm_operands (body, ops, NULL_PTR,
2592 NULL_PTR, NULL_PTR);
2593 /* Inhibit aborts on what would otherwise be compiler bugs. */
2594 insn_noperands = noperands;
2595 this_is_asm_operands = insn;
2596
2597 /* Output the insn using them. */
2598 output_asm_insn (string, ops);
2599 this_is_asm_operands = 0;
2600 break;
2601 }
2602
2603 if (prescan <= 0 && app_on)
2604 {
51723711 2605 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2606 app_on = 0;
2607 }
2608
2609 if (GET_CODE (body) == SEQUENCE)
2610 {
2611 /* A delayed-branch sequence */
2612 register int i;
2613 rtx next;
2614
2615 if (prescan > 0)
2616 break;
2617 final_sequence = body;
2618
2619 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2620 force the restoration of a comparison that was previously
2621 thought unnecessary. If that happens, cancel this sequence
2622 and cause that insn to be restored. */
2623
2624 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2625 if (next != XVECEXP (body, 0, 1))
2626 {
2627 final_sequence = 0;
2628 return next;
2629 }
2630
2631 for (i = 1; i < XVECLEN (body, 0); i++)
c7eee2df
RK
2632 {
2633 rtx insn = XVECEXP (body, 0, i);
2634 rtx next = NEXT_INSN (insn);
2635 /* We loop in case any instruction in a delay slot gets
2636 split. */
2637 do
2638 insn = final_scan_insn (insn, file, 0, prescan, 1);
2639 while (insn != next);
2640 }
3cf2715d
DE
2641#ifdef DBR_OUTPUT_SEQEND
2642 DBR_OUTPUT_SEQEND (file);
2643#endif
2644 final_sequence = 0;
2645
2646 /* If the insn requiring the delay slot was a CALL_INSN, the
2647 insns in the delay slot are actually executed before the
2648 called function. Hence we don't preserve any CC-setting
2649 actions in these insns and the CC must be marked as being
2650 clobbered by the function. */
2651 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
b729186a
JL
2652 {
2653 CC_STATUS_INIT;
2654 }
3cf2715d
DE
2655
2656 /* Following a conditional branch sequence, we have a new basic
2657 block. */
2658 if (profile_block_flag)
2659 {
2660 rtx insn = XVECEXP (body, 0, 0);
2661 rtx body = PATTERN (insn);
2662
2663 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2664 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2665 || (GET_CODE (insn) == JUMP_INSN
2666 && GET_CODE (body) == PARALLEL
2667 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2668 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2669 new_block = 1;
2670 }
2671 break;
2672 }
2673
2674 /* We have a real machine instruction as rtl. */
2675
2676 body = PATTERN (insn);
2677
2678#ifdef HAVE_cc0
b88c92cc
RK
2679 set = single_set(insn);
2680
3cf2715d
DE
2681 /* Check for redundant test and compare instructions
2682 (when the condition codes are already set up as desired).
2683 This is done only when optimizing; if not optimizing,
2684 it should be possible for the user to alter a variable
2685 with the debugger in between statements
2686 and the next statement should reexamine the variable
2687 to compute the condition codes. */
2688
30f5e9f5 2689 if (optimize)
3cf2715d 2690 {
b88c92cc 2691#if 0
30f5e9f5 2692 rtx set = single_set(insn);
b88c92cc 2693#endif
30f5e9f5
RK
2694
2695 if (set
2696 && GET_CODE (SET_DEST (set)) == CC0
2697 && insn != last_ignored_compare)
3cf2715d 2698 {
30f5e9f5
RK
2699 if (GET_CODE (SET_SRC (set)) == SUBREG)
2700 SET_SRC (set) = alter_subreg (SET_SRC (set));
2701 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2702 {
2703 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2704 XEXP (SET_SRC (set), 0)
2705 = alter_subreg (XEXP (SET_SRC (set), 0));
2706 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2707 XEXP (SET_SRC (set), 1)
2708 = alter_subreg (XEXP (SET_SRC (set), 1));
2709 }
2710 if ((cc_status.value1 != 0
2711 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2712 || (cc_status.value2 != 0
2713 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
3cf2715d 2714 {
30f5e9f5
RK
2715 /* Don't delete insn if it has an addressing side-effect. */
2716 if (! FIND_REG_INC_NOTE (insn, 0)
2717 /* or if anything in it is volatile. */
2718 && ! volatile_refs_p (PATTERN (insn)))
2719 {
2720 /* We don't really delete the insn; just ignore it. */
2721 last_ignored_compare = insn;
2722 break;
2723 }
3cf2715d
DE
2724 }
2725 }
2726 }
2727#endif
2728
2729 /* Following a conditional branch, we have a new basic block.
2730 But if we are inside a sequence, the new block starts after the
2731 last insn of the sequence. */
2732 if (profile_block_flag && final_sequence == 0
2733 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2734 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2735 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2736 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2737 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2738 new_block = 1;
2739
2740#ifndef STACK_REGS
2741 /* Don't bother outputting obvious no-ops, even without -O.
2742 This optimization is fast and doesn't interfere with debugging.
2743 Don't do this if the insn is in a delay slot, since this
2744 will cause an improper number of delay insns to be written. */
2745 if (final_sequence == 0
2746 && prescan >= 0
2747 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2748 && GET_CODE (SET_SRC (body)) == REG
2749 && GET_CODE (SET_DEST (body)) == REG
2750 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2751 break;
2752#endif
2753
2754#ifdef HAVE_cc0
2755 /* If this is a conditional branch, maybe modify it
2756 if the cc's are in a nonstandard state
2757 so that it accomplishes the same thing that it would
2758 do straightforwardly if the cc's were set up normally. */
2759
2760 if (cc_status.flags != 0
2761 && GET_CODE (insn) == JUMP_INSN
2762 && GET_CODE (body) == SET
2763 && SET_DEST (body) == pc_rtx
2764 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
de2b56f9 2765 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
fff752ad 2766 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
3cf2715d
DE
2767 /* This is done during prescan; it is not done again
2768 in final scan when prescan has been done. */
2769 && prescan >= 0)
2770 {
2771 /* This function may alter the contents of its argument
2772 and clear some of the cc_status.flags bits.
2773 It may also return 1 meaning condition now always true
2774 or -1 meaning condition now always false
2775 or 2 meaning condition nontrivial but altered. */
2776 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2777 /* If condition now has fixed value, replace the IF_THEN_ELSE
2778 with its then-operand or its else-operand. */
2779 if (result == 1)
2780 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2781 if (result == -1)
2782 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2783
2784 /* The jump is now either unconditional or a no-op.
2785 If it has become a no-op, don't try to output it.
2786 (It would not be recognized.) */
2787 if (SET_SRC (body) == pc_rtx)
2788 {
2789 PUT_CODE (insn, NOTE);
2790 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2791 NOTE_SOURCE_FILE (insn) = 0;
2792 break;
2793 }
2794 else if (GET_CODE (SET_SRC (body)) == RETURN)
2795 /* Replace (set (pc) (return)) with (return). */
2796 PATTERN (insn) = body = SET_SRC (body);
2797
2798 /* Rerecognize the instruction if it has changed. */
2799 if (result != 0)
2800 INSN_CODE (insn) = -1;
2801 }
2802
2803 /* Make same adjustments to instructions that examine the
462da2af
SC
2804 condition codes without jumping and instructions that
2805 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2806
2807 if (cc_status.flags != 0
b88c92cc 2808 && set != 0)
3cf2715d 2809 {
462da2af
SC
2810 rtx cond_rtx, then_rtx, else_rtx;
2811
2812 if (GET_CODE (insn) != JUMP_INSN
b88c92cc 2813 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2814 {
b88c92cc
RK
2815 cond_rtx = XEXP (SET_SRC (set), 0);
2816 then_rtx = XEXP (SET_SRC (set), 1);
2817 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2818 }
2819 else
2820 {
b88c92cc 2821 cond_rtx = SET_SRC (set);
462da2af
SC
2822 then_rtx = const_true_rtx;
2823 else_rtx = const0_rtx;
2824 }
2825
2826 switch (GET_CODE (cond_rtx))
3cf2715d
DE
2827 {
2828 case GTU:
2829 case GT:
2830 case LTU:
2831 case LT:
2832 case GEU:
2833 case GE:
2834 case LEU:
2835 case LE:
2836 case EQ:
2837 case NE:
2838 {
2839 register int result;
462da2af 2840 if (XEXP (cond_rtx, 0) != cc0_rtx)
3cf2715d 2841 break;
462da2af 2842 result = alter_cond (cond_rtx);
3cf2715d 2843 if (result == 1)
b88c92cc 2844 validate_change (insn, &SET_SRC (set), then_rtx, 0);
3cf2715d 2845 else if (result == -1)
b88c92cc 2846 validate_change (insn, &SET_SRC (set), else_rtx, 0);
3cf2715d
DE
2847 else if (result == 2)
2848 INSN_CODE (insn) = -1;
b88c92cc 2849 if (SET_DEST (set) == SET_SRC (set))
462da2af
SC
2850 {
2851 PUT_CODE (insn, NOTE);
2852 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2853 NOTE_SOURCE_FILE (insn) = 0;
462da2af 2854 }
3cf2715d 2855 }
e9a25f70
JL
2856 break;
2857
2858 default:
2859 break;
3cf2715d
DE
2860 }
2861 }
462da2af 2862
3cf2715d
DE
2863#endif
2864
ede7cd44 2865#ifdef HAVE_peephole
3cf2715d
DE
2866 /* Do machine-specific peephole optimizations if desired. */
2867
2868 if (optimize && !flag_no_peephole && !nopeepholes)
2869 {
2870 rtx next = peephole (insn);
2871 /* When peepholing, if there were notes within the peephole,
2872 emit them before the peephole. */
2873 if (next != 0 && next != NEXT_INSN (insn))
2874 {
2875 rtx prev = PREV_INSN (insn);
2876 rtx note;
2877
2878 for (note = NEXT_INSN (insn); note != next;
2879 note = NEXT_INSN (note))
2880 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2881
2882 /* In case this is prescan, put the notes
2883 in proper position for later rescan. */
2884 note = NEXT_INSN (insn);
2885 PREV_INSN (note) = prev;
2886 NEXT_INSN (prev) = note;
2887 NEXT_INSN (PREV_INSN (next)) = insn;
2888 PREV_INSN (insn) = PREV_INSN (next);
2889 NEXT_INSN (insn) = next;
2890 PREV_INSN (next) = insn;
2891 }
2892
2893 /* PEEPHOLE might have changed this. */
2894 body = PATTERN (insn);
2895 }
ede7cd44 2896#endif
3cf2715d
DE
2897
2898 /* Try to recognize the instruction.
2899 If successful, verify that the operands satisfy the
2900 constraints for the instruction. Crash if they don't,
2901 since `reload' should have changed them so that they do. */
2902
2903 insn_code_number = recog_memoized (insn);
0eadeb15 2904 extract_insn (insn);
0304f787 2905 cleanup_subreg_operands (insn);
3cf2715d 2906
0eadeb15 2907 if (! constrain_operands (1))
3cf2715d 2908 fatal_insn_not_found (insn);
3cf2715d
DE
2909
2910 /* Some target machines need to prescan each insn before
2911 it is output. */
2912
2913#ifdef FINAL_PRESCAN_INSN
1ccbefce 2914 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
3cf2715d
DE
2915#endif
2916
afe48e06
RH
2917#ifdef HAVE_conditional_execution
2918 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2919 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2920 else
2921 current_insn_predicate = NULL_RTX;
2922#endif
2923
3cf2715d
DE
2924#ifdef HAVE_cc0
2925 cc_prev_status = cc_status;
2926
2927 /* Update `cc_status' for this instruction.
2928 The instruction's output routine may change it further.
2929 If the output routine for a jump insn needs to depend
2930 on the cc status, it should look at cc_prev_status. */
2931
2932 NOTICE_UPDATE_CC (body, insn);
2933#endif
2934
b1a9f6a0 2935 current_output_insn = debug_insn = insn;
3cf2715d 2936
f73ad30e 2937#if defined (DWARF2_UNWIND_INFO)
b57d9225 2938 /* If we push arguments, we want to know where the calls are. */
f73ad30e
JH
2939 if (!ACCUMULATE_OUTGOING_ARGS && GET_CODE (insn) == CALL_INSN
2940 && dwarf2out_do_frame ())
b57d9225
JM
2941 dwarf2out_frame_debug (insn);
2942#endif
2943
4bbf910e
RH
2944 /* Find the proper template for this insn. */
2945 template = get_insn_template (insn_code_number, insn);
3cf2715d 2946
4bbf910e
RH
2947 /* If the C code returns 0, it means that it is a jump insn
2948 which follows a deleted test insn, and that test insn
2949 needs to be reinserted. */
3cf2715d
DE
2950 if (template == 0)
2951 {
efd0378b
HPN
2952 rtx prev;
2953
4bbf910e
RH
2954 if (prev_nonnote_insn (insn) != last_ignored_compare)
2955 abort ();
2956 new_block = 0;
efd0378b
HPN
2957
2958 /* We have already processed the notes between the setter and
2959 the user. Make sure we don't process them again, this is
2960 particularly important if one of the notes is a block
2961 scope note or an EH note. */
2962 for (prev = insn;
2963 prev != last_ignored_compare;
2964 prev = PREV_INSN (prev))
2965 {
2966 if (GET_CODE (prev) == NOTE)
2967 {
2968 NOTE_LINE_NUMBER (prev) = NOTE_INSN_DELETED;
2969 NOTE_SOURCE_FILE (prev) = 0;
2970 }
2971 }
2972
2973 return prev;
3cf2715d
DE
2974 }
2975
2976 /* If the template is the string "#", it means that this insn must
2977 be split. */
2978 if (template[0] == '#' && template[1] == '\0')
2979 {
2980 rtx new = try_split (body, insn, 0);
2981
2982 /* If we didn't split the insn, go away. */
2983 if (new == insn && PATTERN (new) == body)
cf879efa 2984 fatal_insn ("Could not split insn", insn);
3cf2715d 2985
3d14e82f
JW
2986#ifdef HAVE_ATTR_length
2987 /* This instruction should have been split in shorten_branches,
2988 to ensure that we would have valid length info for the
2989 splitees. */
2990 abort ();
2991#endif
2992
3cf2715d
DE
2993 new_block = 0;
2994 return new;
2995 }
2996
2997 if (prescan > 0)
2998 break;
2999
ce152ef8
AM
3000#ifdef IA64_UNWIND_INFO
3001 IA64_UNWIND_EMIT (asm_out_file, insn);
3002#endif
3cf2715d
DE
3003 /* Output assembler code from the template. */
3004
1ccbefce 3005 output_asm_insn (template, recog_data.operand);
3cf2715d 3006
0021b564 3007#if defined (DWARF2_UNWIND_INFO)
0021b564
JM
3008 /* If we push arguments, we need to check all insns for stack
3009 adjustments. */
f73ad30e
JH
3010 if (!ACCUMULATE_OUTGOING_ARGS)
3011 {
3012 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
3013 dwarf2out_frame_debug (insn);
3014 }
3015 else
3016 {
0021b564 3017#if defined (HAVE_prologue)
f73ad30e
JH
3018 /* If this insn is part of the prologue, emit DWARF v2
3019 call frame info. */
3020 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
3021 dwarf2out_frame_debug (insn);
0021b564 3022#endif
f73ad30e 3023 }
0021b564 3024#endif
469ac993 3025
3cf2715d
DE
3026#if 0
3027 /* It's not at all clear why we did this and doing so interferes
3028 with tests we'd like to do to use REG_WAS_0 notes, so let's try
3029 with this out. */
3030
3031 /* Mark this insn as having been output. */
3032 INSN_DELETED_P (insn) = 1;
3033#endif
3034
b1a9f6a0 3035 current_output_insn = debug_insn = 0;
3cf2715d
DE
3036 }
3037 }
3038 return NEXT_INSN (insn);
3039}
3040\f
3041/* Output debugging info to the assembler file FILE
3042 based on the NOTE-insn INSN, assumed to be a line number. */
3043
3044static void
3045output_source_line (file, insn)
6a651371 3046 FILE *file ATTRIBUTE_UNUSED;
3cf2715d
DE
3047 rtx insn;
3048{
3cce094d 3049 register const char *filename = NOTE_SOURCE_FILE (insn);
3cf2715d
DE
3050
3051 /* Remember filename for basic block profiling.
3052 Filenames are allocated on the permanent obstack
3053 or are passed in ARGV, so we don't have to save
3054 the string. */
3055
3056 if (profile_block_flag && last_filename != filename)
3057 bb_file_label_num = add_bb_string (filename, TRUE);
3058
3059 last_filename = filename;
3060 last_linenum = NOTE_LINE_NUMBER (insn);
eac40081
RK
3061 high_block_linenum = MAX (last_linenum, high_block_linenum);
3062 high_function_linenum = MAX (last_linenum, high_function_linenum);
3cf2715d
DE
3063
3064 if (write_symbols != NO_DEBUG)
3065 {
3066#ifdef SDB_DEBUGGING_INFO
3067 if (write_symbols == SDB_DEBUG
3068#if 0 /* People like having line numbers even in wrong file! */
3069 /* COFF can't handle multiple source files--lose, lose. */
3070 && !strcmp (filename, main_input_filename)
3071#endif
3072 /* COFF relative line numbers must be positive. */
3073 && last_linenum > sdb_begin_function_line)
3074 {
3075#ifdef ASM_OUTPUT_SOURCE_LINE
3076 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
3077#else
3078 fprintf (file, "\t.ln\t%d\n",
3079 ((sdb_begin_function_line > -1)
3080 ? last_linenum - sdb_begin_function_line : 1));
3081#endif
3082 }
3083#endif
3084
3085#if defined (DBX_DEBUGGING_INFO)
3086 if (write_symbols == DBX_DEBUG)
3087 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
3088#endif
3089
3090#if defined (XCOFF_DEBUGGING_INFO)
3091 if (write_symbols == XCOFF_DEBUG)
3092 xcoffout_source_line (file, filename, insn);
3093#endif
3094
3095#ifdef DWARF_DEBUGGING_INFO
3096 if (write_symbols == DWARF_DEBUG)
3097 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
3098#endif
9a666dda
JM
3099
3100#ifdef DWARF2_DEBUGGING_INFO
3101 if (write_symbols == DWARF2_DEBUG)
3102 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
3103#endif
3cf2715d
DE
3104 }
3105}
3106\f
0304f787
JL
3107
3108/* For each operand in INSN, simplify (subreg (reg)) so that it refers
3109 directly to the desired hard register. */
3110void
3111cleanup_subreg_operands (insn)
3112 rtx insn;
3113{
f62a15e3
BS
3114 int i;
3115
0eadeb15 3116 extract_insn (insn);
1ccbefce 3117 for (i = 0; i < recog_data.n_operands; i++)
0304f787 3118 {
1ccbefce
RH
3119 if (GET_CODE (recog_data.operand[i]) == SUBREG)
3120 recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
3121 else if (GET_CODE (recog_data.operand[i]) == PLUS
3122 || GET_CODE (recog_data.operand[i]) == MULT)
3123 recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
0304f787
JL
3124 }
3125
1ccbefce 3126 for (i = 0; i < recog_data.n_dups; i++)
0304f787 3127 {
1ccbefce
RH
3128 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3129 *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
3130 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3131 || GET_CODE (*recog_data.dup_loc[i]) == MULT)
3132 *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
0304f787
JL
3133 }
3134}
3135
3cf2715d
DE
3136/* If X is a SUBREG, replace it with a REG or a MEM,
3137 based on the thing it is a subreg of. */
3138
3139rtx
3140alter_subreg (x)
3141 register rtx x;
3142{
3143 register rtx y = SUBREG_REG (x);
f5963e61 3144
3cf2715d
DE
3145 if (GET_CODE (y) == SUBREG)
3146 y = alter_subreg (y);
3147
f5963e61
JL
3148 /* If reload is operating, we may be replacing inside this SUBREG.
3149 Check for that and make a new one if so. */
3150 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
3151 x = copy_rtx (x);
3152
3cf2715d
DE
3153 if (GET_CODE (y) == REG)
3154 {
ef178af3 3155 int regno;
ce4d78eb
RH
3156 /* If the word size is larger than the size of this register,
3157 adjust the register number to compensate. */
3158 /* ??? Note that this just catches stragglers created by/for
3159 integrate. It would be better if we either caught these
3160 earlier, or kept _all_ subregs until now and eliminate
3161 gen_lowpart and friends. */
3162
ce4d78eb 3163#ifdef ALTER_HARD_SUBREG
ef178af3
ZW
3164 regno = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
3165 GET_MODE (y), REGNO (y));
ce4d78eb 3166#else
ef178af3 3167 regno = REGNO (y) + SUBREG_WORD (x);
ce4d78eb 3168#endif
ef178af3
ZW
3169 PUT_CODE (x, REG);
3170 REGNO (x) = regno;
0304f787
JL
3171 /* This field has a different meaning for REGs and SUBREGs. Make sure
3172 to clear it! */
3173 x->used = 0;
3cf2715d
DE
3174 }
3175 else if (GET_CODE (y) == MEM)
3176 {
3177 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
bf49b139 3178
f76b9db2
ILT
3179 if (BYTES_BIG_ENDIAN)
3180 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3181 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3cf2715d 3182 PUT_CODE (x, MEM);
c6df88cb 3183 MEM_COPY_ATTRIBUTES (x, y);
3cf2715d
DE
3184 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3185 }
3186
3187 return x;
3188}
3189
3190/* Do alter_subreg on all the SUBREGs contained in X. */
3191
3192static rtx
3193walk_alter_subreg (x)
3194 rtx x;
3195{
3196 switch (GET_CODE (x))
3197 {
3198 case PLUS:
3199 case MULT:
3200 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3201 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3202 break;
3203
3204 case MEM:
3205 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3206 break;
3207
3208 case SUBREG:
3209 return alter_subreg (x);
e9a25f70
JL
3210
3211 default:
3212 break;
3cf2715d
DE
3213 }
3214
3215 return x;
3216}
3217\f
3218#ifdef HAVE_cc0
3219
3220/* Given BODY, the body of a jump instruction, alter the jump condition
3221 as required by the bits that are set in cc_status.flags.
3222 Not all of the bits there can be handled at this level in all cases.
3223
3224 The value is normally 0.
3225 1 means that the condition has become always true.
3226 -1 means that the condition has become always false.
3227 2 means that COND has been altered. */
3228
3229static int
3230alter_cond (cond)
3231 register rtx cond;
3232{
3233 int value = 0;
3234
3235 if (cc_status.flags & CC_REVERSED)
3236 {
3237 value = 2;
3238 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3239 }
3240
3241 if (cc_status.flags & CC_INVERTED)
3242 {
3243 value = 2;
3244 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3245 }
3246
3247 if (cc_status.flags & CC_NOT_POSITIVE)
3248 switch (GET_CODE (cond))
3249 {
3250 case LE:
3251 case LEU:
3252 case GEU:
3253 /* Jump becomes unconditional. */
3254 return 1;
3255
3256 case GT:
3257 case GTU:
3258 case LTU:
3259 /* Jump becomes no-op. */
3260 return -1;
3261
3262 case GE:
3263 PUT_CODE (cond, EQ);
3264 value = 2;
3265 break;
3266
3267 case LT:
3268 PUT_CODE (cond, NE);
3269 value = 2;
3270 break;
e9a25f70
JL
3271
3272 default:
3273 break;
3cf2715d
DE
3274 }
3275
3276 if (cc_status.flags & CC_NOT_NEGATIVE)
3277 switch (GET_CODE (cond))
3278 {
3279 case GE:
3280 case GEU:
3281 /* Jump becomes unconditional. */
3282 return 1;
3283
3284 case LT:
3285 case LTU:
3286 /* Jump becomes no-op. */
3287 return -1;
3288
3289 case LE:
3290 case LEU:
3291 PUT_CODE (cond, EQ);
3292 value = 2;
3293 break;
3294
3295 case GT:
3296 case GTU:
3297 PUT_CODE (cond, NE);
3298 value = 2;
3299 break;
e9a25f70
JL
3300
3301 default:
3302 break;
3cf2715d
DE
3303 }
3304
3305 if (cc_status.flags & CC_NO_OVERFLOW)
3306 switch (GET_CODE (cond))
3307 {
3308 case GEU:
3309 /* Jump becomes unconditional. */
3310 return 1;
3311
3312 case LEU:
3313 PUT_CODE (cond, EQ);
3314 value = 2;
3315 break;
3316
3317 case GTU:
3318 PUT_CODE (cond, NE);
3319 value = 2;
3320 break;
3321
3322 case LTU:
3323 /* Jump becomes no-op. */
3324 return -1;
e9a25f70
JL
3325
3326 default:
3327 break;
3cf2715d
DE
3328 }
3329
3330 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3331 switch (GET_CODE (cond))
3332 {
e9a25f70 3333 default:
3cf2715d
DE
3334 abort ();
3335
3336 case NE:
3337 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3338 value = 2;
3339 break;
3340
3341 case EQ:
3342 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3343 value = 2;
3344 break;
3345 }
3346
3347 if (cc_status.flags & CC_NOT_SIGNED)
3348 /* The flags are valid if signed condition operators are converted
3349 to unsigned. */
3350 switch (GET_CODE (cond))
3351 {
3352 case LE:
3353 PUT_CODE (cond, LEU);
3354 value = 2;
3355 break;
3356
3357 case LT:
3358 PUT_CODE (cond, LTU);
3359 value = 2;
3360 break;
3361
3362 case GT:
3363 PUT_CODE (cond, GTU);
3364 value = 2;
3365 break;
3366
3367 case GE:
3368 PUT_CODE (cond, GEU);
3369 value = 2;
3370 break;
e9a25f70
JL
3371
3372 default:
3373 break;
3cf2715d
DE
3374 }
3375
3376 return value;
3377}
3378#endif
3379\f
3380/* Report inconsistency between the assembler template and the operands.
3381 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3382
3383void
ab87f8c8
JL
3384output_operand_lossage (msgid)
3385 const char *msgid;
3cf2715d
DE
3386{
3387 if (this_is_asm_operands)
ab87f8c8 3388 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
3cf2715d 3389 else
987009bf
ZW
3390 {
3391 error ("output_operand: %s", _(msgid));
3392 abort ();
3393 }
3cf2715d
DE
3394}
3395\f
3396/* Output of assembler code from a template, and its subroutines. */
3397
3398/* Output text from TEMPLATE to the assembler output file,
3399 obeying %-directions to substitute operands taken from
3400 the vector OPERANDS.
3401
3402 %N (for N a digit) means print operand N in usual manner.
3403 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3404 and print the label name with no punctuation.
3405 %cN means require operand N to be a constant
3406 and print the constant expression with no punctuation.
3407 %aN means expect operand N to be a memory address
3408 (not a memory reference!) and print a reference
3409 to that address.
3410 %nN means expect operand N to be a constant
3411 and print a constant expression for minus the value
3412 of the operand, with no other punctuation. */
3413
cb649530
RK
3414static void
3415output_asm_name ()
3416{
3417 if (flag_print_asm_name)
3418 {
3419 /* Annotate the assembly with a comment describing the pattern and
3420 alternative used. */
3421 if (debug_insn)
3422 {
3423 register int num = INSN_CODE (debug_insn);
1db9f6ce 3424 fprintf (asm_out_file, "\t%s %d\t%s",
a995e389
RH
3425 ASM_COMMENT_START, INSN_UID (debug_insn),
3426 insn_data[num].name);
3427 if (insn_data[num].n_alternatives > 1)
cb649530 3428 fprintf (asm_out_file, "/%d", which_alternative + 1);
1db9f6ce 3429#ifdef HAVE_ATTR_length
a995e389
RH
3430 fprintf (asm_out_file, "\t[length = %d]",
3431 get_attr_length (debug_insn));
1db9f6ce 3432#endif
cb649530
RK
3433 /* Clear this so only the first assembler insn
3434 of any rtl insn will get the special comment for -dp. */
3435 debug_insn = 0;
3436 }
3437 }
3438}
3439
3cf2715d
DE
3440void
3441output_asm_insn (template, operands)
9b3142b3 3442 const char *template;
3cf2715d
DE
3443 rtx *operands;
3444{
9b3142b3 3445 register const char *p;
b729186a 3446 register int c;
3cf2715d
DE
3447
3448 /* An insn may return a null string template
3449 in a case where no assembler code is needed. */
3450 if (*template == 0)
3451 return;
3452
3453 p = template;
3454 putc ('\t', asm_out_file);
3455
3456#ifdef ASM_OUTPUT_OPCODE
3457 ASM_OUTPUT_OPCODE (asm_out_file, p);
3458#endif
3459
b729186a 3460 while ((c = *p++))
3cf2715d
DE
3461 switch (c)
3462 {
3cf2715d 3463 case '\n':
cb649530 3464 output_asm_name ();
3cf2715d 3465 putc (c, asm_out_file);
cb649530 3466#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3467 while ((c = *p) == '\t')
3468 {
3469 putc (c, asm_out_file);
3470 p++;
3471 }
3472 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3473#endif
cb649530 3474 break;
3cf2715d
DE
3475
3476#ifdef ASSEMBLER_DIALECT
3477 case '{':
b729186a
JL
3478 {
3479 register int i;
3480
3481 /* If we want the first dialect, do nothing. Otherwise, skip
3482 DIALECT_NUMBER of strings ending with '|'. */
3483 for (i = 0; i < dialect_number; i++)
3484 {
463a8384 3485 while (*p && *p != '}' && *p++ != '|')
b729186a 3486 ;
463a8384
BS
3487 if (*p == '}')
3488 break;
b729186a
JL
3489 if (*p == '|')
3490 p++;
3491 }
3492 }
3cf2715d
DE
3493 break;
3494
3495 case '|':
3496 /* Skip to close brace. */
3497 while (*p && *p++ != '}')
3498 ;
3499 break;
3500
3501 case '}':
3502 break;
3503#endif
3504
3505 case '%':
3506 /* %% outputs a single %. */
3507 if (*p == '%')
3508 {
3509 p++;
3510 putc (c, asm_out_file);
3511 }
3512 /* %= outputs a number which is unique to each insn in the entire
3513 compilation. This is useful for making local labels that are
3514 referred to more than once in a given insn. */
3515 else if (*p == '=')
3516 {
3517 p++;
3518 fprintf (asm_out_file, "%d", insn_counter);
3519 }
3520 /* % followed by a letter and some digits
3521 outputs an operand in a special way depending on the letter.
3522 Letters `acln' are implemented directly.
3523 Other letters are passed to `output_operand' so that
3524 the PRINT_OPERAND macro can define them. */
5f6d3823 3525 else if (ISLOWER(*p) || ISUPPER(*p))
3cf2715d
DE
3526 {
3527 int letter = *p++;
3528 c = atoi (p);
3529
3530 if (! (*p >= '0' && *p <= '9'))
3531 output_operand_lossage ("operand number missing after %-letter");
22bf4422 3532 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3533 output_operand_lossage ("operand number out of range");
3534 else if (letter == 'l')
3535 output_asm_label (operands[c]);
3536 else if (letter == 'a')
3537 output_address (operands[c]);
3538 else if (letter == 'c')
3539 {
3540 if (CONSTANT_ADDRESS_P (operands[c]))
3541 output_addr_const (asm_out_file, operands[c]);
3542 else
3543 output_operand (operands[c], 'c');
3544 }
3545 else if (letter == 'n')
3546 {
3547 if (GET_CODE (operands[c]) == CONST_INT)
21e3a81b 3548 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3cf2715d
DE
3549 - INTVAL (operands[c]));
3550 else
3551 {
3552 putc ('-', asm_out_file);
3553 output_addr_const (asm_out_file, operands[c]);
3554 }
3555 }
3556 else
3557 output_operand (operands[c], letter);
3558
3559 while ((c = *p) >= '0' && c <= '9') p++;
3560 }
3561 /* % followed by a digit outputs an operand the default way. */
3562 else if (*p >= '0' && *p <= '9')
3563 {
3564 c = atoi (p);
22bf4422 3565 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3566 output_operand_lossage ("operand number out of range");
3567 else
3568 output_operand (operands[c], 0);
3569 while ((c = *p) >= '0' && c <= '9') p++;
3570 }
3571 /* % followed by punctuation: output something for that
3572 punctuation character alone, with no operand.
3573 The PRINT_OPERAND macro decides what is actually done. */
3574#ifdef PRINT_OPERAND_PUNCT_VALID_P
973838fd 3575 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char)*p))
3cf2715d
DE
3576 output_operand (NULL_RTX, *p++);
3577#endif
3578 else
3579 output_operand_lossage ("invalid %%-code");
3580 break;
3581
3582 default:
3583 putc (c, asm_out_file);
3584 }
3585
cb649530 3586 output_asm_name ();
3cf2715d
DE
3587
3588 putc ('\n', asm_out_file);
3589}
3590\f
3591/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3592
3593void
3594output_asm_label (x)
3595 rtx x;
3596{
3597 char buf[256];
3598
3599 if (GET_CODE (x) == LABEL_REF)
be1bb652
RH
3600 x = XEXP (x, 0);
3601 if (GET_CODE (x) == CODE_LABEL
3602 || (GET_CODE (x) == NOTE
3603 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3cf2715d
DE
3604 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3605 else
3606 output_operand_lossage ("`%l' operand isn't a label");
3607
3608 assemble_name (asm_out_file, buf);
3609}
3610
3611/* Print operand X using machine-dependent assembler syntax.
3612 The macro PRINT_OPERAND is defined just to control this function.
3613 CODE is a non-digit that preceded the operand-number in the % spec,
3614 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3615 between the % and the digits.
3616 When CODE is a non-letter, X is 0.
3617
3618 The meanings of the letters are machine-dependent and controlled
3619 by PRINT_OPERAND. */
3620
3621static void
3622output_operand (x, code)
3623 rtx x;
962f1324 3624 int code ATTRIBUTE_UNUSED;
3cf2715d
DE
3625{
3626 if (x && GET_CODE (x) == SUBREG)
3627 x = alter_subreg (x);
3628
3629 /* If X is a pseudo-register, abort now rather than writing trash to the
3630 assembler file. */
3631
3632 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3633 abort ();
3634
3635 PRINT_OPERAND (asm_out_file, x, code);
3636}
3637
3638/* Print a memory reference operand for address X
3639 using machine-dependent assembler syntax.
3640 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3641
3642void
3643output_address (x)
3644 rtx x;
3645{
3646 walk_alter_subreg (x);
3647 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3648}
3649\f
3650/* Print an integer constant expression in assembler syntax.
3651 Addition and subtraction are the only arithmetic
3652 that may appear in these expressions. */
3653
3654void
3655output_addr_const (file, x)
3656 FILE *file;
3657 rtx x;
3658{
3659 char buf[256];
3660
3661 restart:
3662 switch (GET_CODE (x))
3663 {
3664 case PC:
3665 if (flag_pic)
3666 putc ('.', file);
3667 else
3668 abort ();
3669 break;
3670
3671 case SYMBOL_REF:
3672 assemble_name (file, XSTR (x, 0));
3673 break;
3674
3675 case LABEL_REF:
3676 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3677 assemble_name (file, buf);
3678 break;
3679
3680 case CODE_LABEL:
3681 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3682 assemble_name (file, buf);
3683 break;
3684
3685 case CONST_INT:
21e3a81b 3686 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
3687 break;
3688
3689 case CONST:
3690 /* This used to output parentheses around the expression,
3691 but that does not work on the 386 (either ATT or BSD assembler). */
3692 output_addr_const (file, XEXP (x, 0));
3693 break;
3694
3695 case CONST_DOUBLE:
3696 if (GET_MODE (x) == VOIDmode)
3697 {
3698 /* We can use %d if the number is one word and positive. */
3699 if (CONST_DOUBLE_HIGH (x))
21e3a81b 3700 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3cf2715d
DE
3701 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3702 else if (CONST_DOUBLE_LOW (x) < 0)
21e3a81b 3703 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3cf2715d 3704 else
21e3a81b 3705 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
3706 }
3707 else
3708 /* We can't handle floating point constants;
3709 PRINT_OPERAND must handle them. */
3710 output_operand_lossage ("floating constant misused");
3711 break;
3712
3713 case PLUS:
3714 /* Some assemblers need integer constants to appear last (eg masm). */
3715 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3716 {
3717 output_addr_const (file, XEXP (x, 1));
3718 if (INTVAL (XEXP (x, 0)) >= 0)
3719 fprintf (file, "+");
3720 output_addr_const (file, XEXP (x, 0));
3721 }
3722 else
3723 {
3724 output_addr_const (file, XEXP (x, 0));
3725 if (INTVAL (XEXP (x, 1)) >= 0)
3726 fprintf (file, "+");
3727 output_addr_const (file, XEXP (x, 1));
3728 }
3729 break;
3730
3731 case MINUS:
3732 /* Avoid outputting things like x-x or x+5-x,
3733 since some assemblers can't handle that. */
3734 x = simplify_subtraction (x);
3735 if (GET_CODE (x) != MINUS)
3736 goto restart;
3737
3738 output_addr_const (file, XEXP (x, 0));
3739 fprintf (file, "-");
3740 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3741 && INTVAL (XEXP (x, 1)) < 0)
3742 {
b6c8689d 3743 fprintf (file, "%s", ASM_OPEN_PAREN);
3cf2715d 3744 output_addr_const (file, XEXP (x, 1));
b6c8689d 3745 fprintf (file, "%s", ASM_CLOSE_PAREN);
3cf2715d
DE
3746 }
3747 else
3748 output_addr_const (file, XEXP (x, 1));
3749 break;
3750
3751 case ZERO_EXTEND:
3752 case SIGN_EXTEND:
3753 output_addr_const (file, XEXP (x, 0));
3754 break;
3755
3756 default:
3757 output_operand_lossage ("invalid expression as operand");
3758 }
3759}
3760\f
3761/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3762 %R prints the value of REGISTER_PREFIX.
3763 %L prints the value of LOCAL_LABEL_PREFIX.
3764 %U prints the value of USER_LABEL_PREFIX.
3765 %I prints the value of IMMEDIATE_PREFIX.
3766 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3767 Also supported are %d, %x, %s, %e, %f, %g and %%.
3768
3769 We handle alternate assembler dialects here, just like output_asm_insn. */
3770
3771void
711d877c 3772asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3cf2715d 3773{
5148a72b 3774#ifndef ANSI_PROTOTYPES
3cf2715d 3775 FILE *file;
87e11268 3776 const char *p;
3cf2715d
DE
3777#endif
3778 va_list argptr;
3779 char buf[10];
3780 char *q, c;
3cf2715d
DE
3781
3782 VA_START (argptr, p);
3783
5148a72b 3784#ifndef ANSI_PROTOTYPES
0f41302f 3785 file = va_arg (argptr, FILE *);
87e11268 3786 p = va_arg (argptr, const char *);
3cf2715d
DE
3787#endif
3788
3789 buf[0] = '%';
3790
b729186a 3791 while ((c = *p++))
3cf2715d
DE
3792 switch (c)
3793 {
3794#ifdef ASSEMBLER_DIALECT
3795 case '{':
b729186a
JL
3796 {
3797 int i;
3cf2715d 3798
b729186a
JL
3799 /* If we want the first dialect, do nothing. Otherwise, skip
3800 DIALECT_NUMBER of strings ending with '|'. */
3801 for (i = 0; i < dialect_number; i++)
3802 {
3803 while (*p && *p++ != '|')
3804 ;
3805
3806 if (*p == '|')
3807 p++;
3cf2715d 3808 }
b729186a 3809 }
3cf2715d
DE
3810 break;
3811
3812 case '|':
3813 /* Skip to close brace. */
3814 while (*p && *p++ != '}')
3815 ;
3816 break;
3817
3818 case '}':
3819 break;
3820#endif
3821
3822 case '%':
3823 c = *p++;
3824 q = &buf[1];
3825 while ((c >= '0' && c <= '9') || c == '.')
3826 {
3827 *q++ = c;
3828 c = *p++;
3829 }
3830 switch (c)
3831 {
3832 case '%':
3833 fprintf (file, "%%");
3834 break;
3835
3836 case 'd': case 'i': case 'u':
3837 case 'x': case 'p': case 'X':
3838 case 'o':
3839 *q++ = c;
3840 *q = 0;
3841 fprintf (file, buf, va_arg (argptr, int));
3842 break;
3843
3844 case 'w':
3845 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3846 but we do not check for those cases. It means that the value
3847 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3848
21e3a81b
RK
3849#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3850#else
3851#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3852 *q++ = 'l';
3853#else
3854 *q++ = 'l';
3cf2715d 3855 *q++ = 'l';
21e3a81b 3856#endif
3cf2715d
DE
3857#endif
3858
3859 *q++ = *p++;
3860 *q = 0;
3861 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3862 break;
3863
3864 case 'l':
3865 *q++ = c;
3866 *q++ = *p++;
3867 *q = 0;
3868 fprintf (file, buf, va_arg (argptr, long));
3869 break;
3870
3871 case 'e':
3872 case 'f':
3873 case 'g':
3874 *q++ = c;
3875 *q = 0;
3876 fprintf (file, buf, va_arg (argptr, double));
3877 break;
3878
3879 case 's':
3880 *q++ = c;
3881 *q = 0;
3882 fprintf (file, buf, va_arg (argptr, char *));
3883 break;
3884
3885 case 'O':
3886#ifdef ASM_OUTPUT_OPCODE
3887 ASM_OUTPUT_OPCODE (asm_out_file, p);
3888#endif
3889 break;
3890
3891 case 'R':
3892#ifdef REGISTER_PREFIX
3893 fprintf (file, "%s", REGISTER_PREFIX);
3894#endif
3895 break;
3896
3897 case 'I':
3898#ifdef IMMEDIATE_PREFIX
3899 fprintf (file, "%s", IMMEDIATE_PREFIX);
3900#endif
3901 break;
3902
3903 case 'L':
3904#ifdef LOCAL_LABEL_PREFIX
3905 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3906#endif
3907 break;
3908
3909 case 'U':
19283265 3910 fputs (user_label_prefix, file);
3cf2715d
DE
3911 break;
3912
fe0503ea
NC
3913#ifdef ASM_FPRINTF_EXTENSIONS
3914 /* Upper case letters are reserved for general use by asm_fprintf
3915 and so are not available to target specific code. In order to
3916 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3917 they are defined here. As they get turned into real extensions
3918 to asm_fprintf they should be removed from this list. */
3919 case 'A': case 'B': case 'C': case 'D': case 'E':
3920 case 'F': case 'G': case 'H': case 'J': case 'K':
3921 case 'M': case 'N': case 'P': case 'Q': case 'S':
3922 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3923 break;
3924
3925 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3926#endif
3cf2715d
DE
3927 default:
3928 abort ();
3929 }
3930 break;
3931
3932 default:
3933 fputc (c, file);
3934 }
f0305a2b 3935 va_end (argptr);
3cf2715d
DE
3936}
3937\f
3938/* Split up a CONST_DOUBLE or integer constant rtx
3939 into two rtx's for single words,
3940 storing in *FIRST the word that comes first in memory in the target
3941 and in *SECOND the other. */
3942
3943void
3944split_double (value, first, second)
3945 rtx value;
3946 rtx *first, *second;
3947{
3948 if (GET_CODE (value) == CONST_INT)
3949 {
5a1a6efd 3950 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
f76b9db2 3951 {
5a1a6efd 3952 /* In this case the CONST_INT holds both target words.
27eef9ce
JC
3953 Extract the bits from it into two word-sized pieces.
3954 Sign extend each half to HOST_WIDE_INT. */
7f251dee
AO
3955 unsigned HOST_WIDE_INT low, high;
3956 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3957
3958 /* Set sign_bit to the most significant bit of a word. */
3959 sign_bit = 1;
3960 sign_bit <<= BITS_PER_WORD - 1;
3961
3962 /* Set mask so that all bits of the word are set. We could
3963 have used 1 << BITS_PER_WORD instead of basing the
3964 calculation on sign_bit. However, on machines where
3965 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3966 compiler warning, even though the code would never be
3967 executed. */
3968 mask = sign_bit << 1;
3969 mask--;
3970
3971 /* Set sign_extend as any remaining bits. */
3972 sign_extend = ~mask;
3973
3974 /* Pick the lower word and sign-extend it. */
3975 low = INTVAL (value);
3976 low &= mask;
3977 if (low & sign_bit)
3978 low |= sign_extend;
3979
3980 /* Pick the higher word, shifted to the least significant
3981 bits, and sign-extend it. */
3982 high = INTVAL (value);
3983 high >>= BITS_PER_WORD - 1;
3984 high >>= 1;
3985 high &= mask;
3986 if (high & sign_bit)
3987 high |= sign_extend;
3988
3989 /* Store the words in the target machine order. */
5a1a6efd
RK
3990 if (WORDS_BIG_ENDIAN)
3991 {
7f251dee
AO
3992 *first = GEN_INT (high);
3993 *second = GEN_INT (low);
5a1a6efd
RK
3994 }
3995 else
3996 {
7f251dee
AO
3997 *first = GEN_INT (low);
3998 *second = GEN_INT (high);
5a1a6efd 3999 }
f76b9db2
ILT
4000 }
4001 else
4002 {
5a1a6efd
RK
4003 /* The rule for using CONST_INT for a wider mode
4004 is that we regard the value as signed.
4005 So sign-extend it. */
4006 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
4007 if (WORDS_BIG_ENDIAN)
4008 {
4009 *first = high;
4010 *second = value;
4011 }
4012 else
4013 {
4014 *first = value;
4015 *second = high;
4016 }
f76b9db2 4017 }
3cf2715d
DE
4018 }
4019 else if (GET_CODE (value) != CONST_DOUBLE)
4020 {
f76b9db2
ILT
4021 if (WORDS_BIG_ENDIAN)
4022 {
4023 *first = const0_rtx;
4024 *second = value;
4025 }
4026 else
4027 {
4028 *first = value;
4029 *second = const0_rtx;
4030 }
3cf2715d
DE
4031 }
4032 else if (GET_MODE (value) == VOIDmode
4033 /* This is the old way we did CONST_DOUBLE integers. */
4034 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
4035 {
4036 /* In an integer, the words are defined as most and least significant.
4037 So order them by the target's convention. */
f76b9db2
ILT
4038 if (WORDS_BIG_ENDIAN)
4039 {
4040 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4041 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4042 }
4043 else
4044 {
4045 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4046 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4047 }
3cf2715d
DE
4048 }
4049 else
4050 {
4051#ifdef REAL_ARITHMETIC
4052 REAL_VALUE_TYPE r; long l[2];
4053 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
4054
4055 /* Note, this converts the REAL_VALUE_TYPE to the target's
4056 format, splits up the floating point double and outputs
4057 exactly 32 bits of it into each of l[0] and l[1] --
0f41302f 4058 not necessarily BITS_PER_WORD bits. */
3cf2715d
DE
4059 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
4060
b5a3eb84
JW
4061 /* If 32 bits is an entire word for the target, but not for the host,
4062 then sign-extend on the host so that the number will look the same
4063 way on the host that it would on the target. See for instance
4064 simplify_unary_operation. The #if is needed to avoid compiler
4065 warnings. */
4066
4067#if HOST_BITS_PER_LONG > 32
4068 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4069 {
4070 if (l[0] & ((long) 1 << 31))
4071 l[0] |= ((long) (-1) << 32);
4072 if (l[1] & ((long) 1 << 31))
4073 l[1] |= ((long) (-1) << 32);
4074 }
4075#endif
4076
3cf2715d
DE
4077 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
4078 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
4079#else
4080 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
4081 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
4082 && ! flag_pretend_float)
7f251dee 4083 abort ();
3cf2715d 4084
f76b9db2
ILT
4085 if (
4086#ifdef HOST_WORDS_BIG_ENDIAN
4087 WORDS_BIG_ENDIAN
3cf2715d 4088#else
f76b9db2 4089 ! WORDS_BIG_ENDIAN
3cf2715d 4090#endif
f76b9db2
ILT
4091 )
4092 {
4093 /* Host and target agree => no need to swap. */
4094 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4095 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4096 }
4097 else
4098 {
4099 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4100 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4101 }
3cf2715d
DE
4102#endif /* no REAL_ARITHMETIC */
4103 }
4104}
4105\f
4106/* Return nonzero if this function has no function calls. */
4107
4108int
4109leaf_function_p ()
4110{
4111 rtx insn;
4112
9e2f9a7f 4113 if (profile_flag || profile_block_flag || profile_arc_flag)
3cf2715d
DE
4114 return 0;
4115
4116 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4117 {
7d167afd
JJ
4118 if (GET_CODE (insn) == CALL_INSN
4119 && ! SIBLING_CALL_P (insn))
3cf2715d
DE
4120 return 0;
4121 if (GET_CODE (insn) == INSN
4122 && GET_CODE (PATTERN (insn)) == SEQUENCE
0a1c58a2
JL
4123 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
4124 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3cf2715d
DE
4125 return 0;
4126 }
4127 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4128 {
7d167afd
JJ
4129 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN
4130 && ! SIBLING_CALL_P (insn))
3cf2715d
DE
4131 return 0;
4132 if (GET_CODE (XEXP (insn, 0)) == INSN
4133 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
0a1c58a2
JL
4134 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN
4135 && ! SIBLING_CALL_P (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)))
3cf2715d
DE
4136 return 0;
4137 }
4138
4139 return 1;
4140}
4141
4142/* On some machines, a function with no call insns
4143 can run faster if it doesn't create its own register window.
4144 When output, the leaf function should use only the "output"
4145 registers. Ordinarily, the function would be compiled to use
4146 the "input" registers to find its arguments; it is a candidate
4147 for leaf treatment if it uses only the "input" registers.
4148 Leaf function treatment means renumbering so the function
4149 uses the "output" registers instead. */
4150
4151#ifdef LEAF_REGISTERS
4152
3cf2715d
DE
4153/* Return 1 if this function uses only the registers that can be
4154 safely renumbered. */
4155
4156int
4157only_leaf_regs_used ()
4158{
4159 int i;
7d167afd 4160 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3cf2715d
DE
4161
4162 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e5e809f4
JL
4163 if ((regs_ever_live[i] || global_regs[i])
4164 && ! permitted_reg_in_leaf_functions[i])
4165 return 0;
4166
4167 if (current_function_uses_pic_offset_table
4168 && pic_offset_table_rtx != 0
4169 && GET_CODE (pic_offset_table_rtx) == REG
4170 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4171 return 0;
4172
3cf2715d
DE
4173 return 1;
4174}
4175
4176/* Scan all instructions and renumber all registers into those
4177 available in leaf functions. */
4178
4179static void
4180leaf_renumber_regs (first)
4181 rtx first;
4182{
4183 rtx insn;
4184
4185 /* Renumber only the actual patterns.
4186 The reg-notes can contain frame pointer refs,
4187 and renumbering them could crash, and should not be needed. */
4188 for (insn = first; insn; insn = NEXT_INSN (insn))
4189 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4190 leaf_renumber_regs_insn (PATTERN (insn));
4191 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4192 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
4193 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4194}
4195
4196/* Scan IN_RTX and its subexpressions, and renumber all regs into those
4197 available in leaf functions. */
4198
4199void
4200leaf_renumber_regs_insn (in_rtx)
4201 register rtx in_rtx;
4202{
4203 register int i, j;
6f7d635c 4204 register const char *format_ptr;
3cf2715d
DE
4205
4206 if (in_rtx == 0)
4207 return;
4208
4209 /* Renumber all input-registers into output-registers.
4210 renumbered_regs would be 1 for an output-register;
4211 they */
4212
4213 if (GET_CODE (in_rtx) == REG)
4214 {
4215 int newreg;
4216
4217 /* Don't renumber the same reg twice. */
4218 if (in_rtx->used)
4219 return;
4220
4221 newreg = REGNO (in_rtx);
4222 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4223 to reach here as part of a REG_NOTE. */
4224 if (newreg >= FIRST_PSEUDO_REGISTER)
4225 {
4226 in_rtx->used = 1;
4227 return;
4228 }
4229 newreg = LEAF_REG_REMAP (newreg);
4230 if (newreg < 0)
4231 abort ();
4232 regs_ever_live[REGNO (in_rtx)] = 0;
4233 regs_ever_live[newreg] = 1;
4234 REGNO (in_rtx) = newreg;
4235 in_rtx->used = 1;
4236 }
4237
4238 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
4239 {
4240 /* Inside a SEQUENCE, we find insns.
4241 Renumber just the patterns of these insns,
4242 just as we do for the top-level insns. */
4243 leaf_renumber_regs_insn (PATTERN (in_rtx));
4244 return;
4245 }
4246
4247 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4248
4249 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4250 switch (*format_ptr++)
4251 {
4252 case 'e':
4253 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4254 break;
4255
4256 case 'E':
4257 if (NULL != XVEC (in_rtx, i))
4258 {
4259 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4260 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4261 }
4262 break;
4263
4264 case 'S':
4265 case 's':
4266 case '0':
4267 case 'i':
4268 case 'w':
4269 case 'n':
4270 case 'u':
4271 break;
4272
4273 default:
4274 abort ();
4275 }
4276}
4277#endif
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