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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
b660f82f | 3 | 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
3cf2715d | 4 | |
1322177d | 5 | This file is part of GCC. |
3cf2715d | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
3cf2715d | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
3cf2715d DE |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
3cf2715d | 21 | |
3cf2715d DE |
22 | /* This is the final pass of the compiler. |
23 | It looks at the rtl code for a function and outputs assembler code. | |
24 | ||
25 | Call `final_start_function' to output the assembler code for function entry, | |
26 | `final' to output assembler code for some RTL code, | |
27 | `final_end_function' to output assembler code for function exit. | |
28 | If a function is compiled in several pieces, each piece is | |
29 | output separately with `final'. | |
30 | ||
31 | Some optimizations are also done at this level. | |
32 | Move instructions that were made unnecessary by good register allocation | |
33 | are detected and omitted from the output. (Though most of these | |
34 | are removed by the last jump pass.) | |
35 | ||
36 | Instructions to set the condition codes are omitted when it can be | |
37 | seen that the condition codes already had the desired values. | |
38 | ||
39 | In some cases it is sufficient if the inherited condition codes | |
40 | have related values, but this may require the following insn | |
41 | (the one that tests the condition codes) to be modified. | |
42 | ||
43 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
44 | directly in assembler by the target functions function_prologue and |
45 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
46 | |
47 | #include "config.h" | |
670ee920 | 48 | #include "system.h" |
3cf2715d DE |
49 | |
50 | #include "tree.h" | |
51 | #include "rtl.h" | |
6baf1cc8 | 52 | #include "tm_p.h" |
3cf2715d DE |
53 | #include "regs.h" |
54 | #include "insn-config.h" | |
3cf2715d | 55 | #include "insn-attr.h" |
3cf2715d DE |
56 | #include "recog.h" |
57 | #include "conditions.h" | |
58 | #include "flags.h" | |
59 | #include "real.h" | |
60 | #include "hard-reg-set.h" | |
3cf2715d | 61 | #include "output.h" |
3d195391 | 62 | #include "except.h" |
49ad7cfa | 63 | #include "function.h" |
10f0ad3d | 64 | #include "toplev.h" |
d6f4ec51 | 65 | #include "reload.h" |
ab87f8c8 | 66 | #include "intl.h" |
be1bb652 | 67 | #include "basic-block.h" |
08c148a8 | 68 | #include "target.h" |
a5a42b92 | 69 | #include "debug.h" |
3cf2715d | 70 | |
440aabf8 NB |
71 | #ifdef XCOFF_DEBUGGING_INFO |
72 | #include "xcoffout.h" /* Needed for external data | |
73 | declarations for e.g. AIX 4.x. */ | |
74 | #endif | |
75 | ||
76ead72b RL |
76 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
77 | #include "dwarf2out.h" | |
78 | #endif | |
79 | ||
3cf2715d DE |
80 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
81 | null default for it to save conditionalization later. */ | |
82 | #ifndef CC_STATUS_INIT | |
83 | #define CC_STATUS_INIT | |
84 | #endif | |
85 | ||
86 | /* How to start an assembler comment. */ | |
87 | #ifndef ASM_COMMENT_START | |
88 | #define ASM_COMMENT_START ";#" | |
89 | #endif | |
90 | ||
91 | /* Is the given character a logical line separator for the assembler? */ | |
92 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
93 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') | |
94 | #endif | |
95 | ||
75197b37 BS |
96 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
97 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
98 | #endif | |
99 | ||
3cf2715d | 100 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
101 | static rtx debug_insn; |
102 | rtx current_output_insn; | |
3cf2715d DE |
103 | |
104 | /* Line number of last NOTE. */ | |
105 | static int last_linenum; | |
106 | ||
eac40081 RK |
107 | /* Highest line number in current block. */ |
108 | static int high_block_linenum; | |
109 | ||
110 | /* Likewise for function. */ | |
111 | static int high_function_linenum; | |
112 | ||
3cf2715d | 113 | /* Filename of last NOTE. */ |
3cce094d | 114 | static const char *last_filename; |
3cf2715d DE |
115 | |
116 | /* Number of basic blocks seen so far; | |
117 | used if profile_block_flag is set. */ | |
118 | static int count_basic_blocks; | |
119 | ||
9e2f9a7f | 120 | /* Number of instrumented arcs when profile_arc_flag is set. */ |
51891abe | 121 | extern int count_instrumented_edges; |
9e2f9a7f | 122 | |
fc470718 R |
123 | extern int length_unit_log; /* This is defined in insn-attrtab.c. */ |
124 | ||
3cf2715d DE |
125 | /* Nonzero while outputting an `asm' with operands. |
126 | This means that inconsistencies are the user's fault, so don't abort. | |
127 | The precise value is the insn being output, to pass to error_for_asm. */ | |
128 | static rtx this_is_asm_operands; | |
129 | ||
130 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 131 | static unsigned int insn_noperands; |
3cf2715d DE |
132 | |
133 | /* Compare optimization flag. */ | |
134 | ||
135 | static rtx last_ignored_compare = 0; | |
136 | ||
137 | /* Flag indicating this insn is the start of a new basic block. */ | |
138 | ||
139 | static int new_block = 1; | |
140 | ||
3cf2715d DE |
141 | /* Assign a unique number to each insn that is output. |
142 | This can be used to generate unique local labels. */ | |
143 | ||
144 | static int insn_counter = 0; | |
145 | ||
146 | #ifdef HAVE_cc0 | |
147 | /* This variable contains machine-dependent flags (defined in tm.h) | |
148 | set and examined by output routines | |
149 | that describe how to interpret the condition codes properly. */ | |
150 | ||
151 | CC_STATUS cc_status; | |
152 | ||
153 | /* During output of an insn, this contains a copy of cc_status | |
154 | from before the insn. */ | |
155 | ||
156 | CC_STATUS cc_prev_status; | |
157 | #endif | |
158 | ||
159 | /* Indexed by hardware reg number, is 1 if that register is ever | |
160 | used in the current function. | |
161 | ||
162 | In life_analysis, or in stupid_life_analysis, this is set | |
163 | up to record the hard regs used explicitly. Reload adds | |
164 | in the hard regs used for holding pseudo regs. Final uses | |
165 | it to generate the code in the function prologue and epilogue | |
166 | to save and restore registers as needed. */ | |
167 | ||
168 | char regs_ever_live[FIRST_PSEUDO_REGISTER]; | |
169 | ||
170 | /* Nonzero means current function must be given a frame pointer. | |
171 | Set in stmt.c if anything is allocated on the stack there. | |
172 | Set in reload1.c if anything is allocated on the stack there. */ | |
173 | ||
174 | int frame_pointer_needed; | |
175 | ||
8480e480 CC |
176 | /* Assign unique numbers to labels generated for profiling. */ |
177 | ||
178 | int profile_label_no; | |
179 | ||
18c038b9 | 180 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
181 | |
182 | static int block_depth; | |
183 | ||
184 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
185 | ||
186 | static int app_on; | |
187 | ||
188 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
189 | Zero otherwise. */ | |
190 | ||
191 | rtx final_sequence; | |
192 | ||
193 | #ifdef ASSEMBLER_DIALECT | |
194 | ||
195 | /* Number of the assembler dialect to use, starting at 0. */ | |
196 | static int dialect_number; | |
197 | #endif | |
198 | ||
199 | /* Indexed by line number, nonzero if there is a note for that line. */ | |
200 | ||
201 | static char *line_note_exists; | |
202 | ||
afe48e06 RH |
203 | #ifdef HAVE_conditional_execution |
204 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ | |
205 | rtx current_insn_predicate; | |
206 | #endif | |
207 | ||
3cf2715d DE |
208 | /* Linked list to hold line numbers for each basic block. */ |
209 | ||
f5d927c0 KH |
210 | struct bb_list |
211 | { | |
3cf2715d DE |
212 | struct bb_list *next; /* pointer to next basic block */ |
213 | int line_num; /* line number */ | |
214 | int file_label_num; /* LPBC<n> label # for stored filename */ | |
215 | int func_label_num; /* LPBC<n> label # for stored function name */ | |
216 | }; | |
217 | ||
218 | static struct bb_list *bb_head = 0; /* Head of basic block list */ | |
219 | static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */ | |
220 | static int bb_file_label_num = -1; /* Current label # for file */ | |
221 | static int bb_func_label_num = -1; /* Current label # for func */ | |
222 | ||
223 | /* Linked list to hold the strings for each file and function name output. */ | |
224 | ||
f5d927c0 KH |
225 | struct bb_str |
226 | { | |
3cf2715d | 227 | struct bb_str *next; /* pointer to next string */ |
9b3142b3 | 228 | const char *string; /* string */ |
3cf2715d DE |
229 | int label_num; /* label number */ |
230 | int length; /* string length */ | |
231 | }; | |
232 | ||
3cf2715d DE |
233 | static struct bb_str *sbb_head = 0; /* Head of string list. */ |
234 | static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */ | |
235 | static int sbb_label_num = 0; /* Last label used */ | |
236 | ||
1d300e19 | 237 | #ifdef HAVE_ATTR_length |
711d877c KG |
238 | static int asm_insn_count PARAMS ((rtx)); |
239 | #endif | |
240 | static void profile_function PARAMS ((FILE *)); | |
241 | static void profile_after_prologue PARAMS ((FILE *)); | |
242 | static void add_bb PARAMS ((FILE *)); | |
243 | static int add_bb_string PARAMS ((const char *, int)); | |
653e276c | 244 | static void notice_source_line PARAMS ((rtx)); |
711d877c KG |
245 | static rtx walk_alter_subreg PARAMS ((rtx)); |
246 | static void output_asm_name PARAMS ((void)); | |
247 | static void output_operand PARAMS ((rtx, int)); | |
e9a25f70 | 248 | #ifdef LEAF_REGISTERS |
711d877c | 249 | static void leaf_renumber_regs PARAMS ((rtx)); |
e9a25f70 JL |
250 | #endif |
251 | #ifdef HAVE_cc0 | |
711d877c | 252 | static int alter_cond PARAMS ((rtx)); |
e9a25f70 | 253 | #endif |
ca3075bd | 254 | #ifndef ADDR_VEC_ALIGN |
711d877c | 255 | static int final_addr_vec_align PARAMS ((rtx)); |
ca3075bd | 256 | #endif |
7bdb32b9 | 257 | #ifdef HAVE_ATTR_length |
711d877c | 258 | static int align_fuzz PARAMS ((rtx, rtx, int, unsigned)); |
7bdb32b9 | 259 | #endif |
3cf2715d DE |
260 | \f |
261 | /* Initialize data in final at the beginning of a compilation. */ | |
262 | ||
263 | void | |
264 | init_final (filename) | |
6a651371 | 265 | const char *filename ATTRIBUTE_UNUSED; |
3cf2715d | 266 | { |
3cf2715d | 267 | app_on = 0; |
3cf2715d DE |
268 | final_sequence = 0; |
269 | ||
270 | #ifdef ASSEMBLER_DIALECT | |
271 | dialect_number = ASSEMBLER_DIALECT; | |
272 | #endif | |
273 | } | |
274 | ||
275 | /* Called at end of source file, | |
276 | to output the block-profiling table for this entire compilation. */ | |
277 | ||
278 | void | |
279 | end_final (filename) | |
f5d927c0 | 280 | const char *filename; |
3cf2715d DE |
281 | { |
282 | int i; | |
283 | ||
9e2f9a7f | 284 | if (profile_block_flag || profile_arc_flag) |
3cf2715d DE |
285 | { |
286 | char name[20]; | |
287 | int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
9e2f9a7f | 288 | int size, rounded; |
3cf2715d DE |
289 | struct bb_list *ptr; |
290 | struct bb_str *sptr; | |
9e2f9a7f | 291 | int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT; |
b2aec5c0 | 292 | int gcov_type_bytes = GCOV_TYPE_SIZE / BITS_PER_UNIT; |
9e2f9a7f | 293 | int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT; |
c8af3574 | 294 | unsigned int align2 = LONG_TYPE_SIZE; |
9e2f9a7f DE |
295 | |
296 | if (profile_block_flag) | |
297 | size = long_bytes * count_basic_blocks; | |
298 | else | |
b2aec5c0 | 299 | size = gcov_type_bytes * count_instrumented_edges; |
9e2f9a7f | 300 | rounded = size; |
3cf2715d DE |
301 | |
302 | rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; | |
303 | rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
304 | * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); | |
305 | ||
c8af3574 RH |
306 | /* ??? This _really_ ought to be done with a structure layout |
307 | and with assemble_constructor. If long_bytes != pointer_bytes | |
308 | we'll be emitting unaligned data at some point. */ | |
309 | if (long_bytes != pointer_bytes) | |
310 | abort (); | |
311 | ||
3cf2715d DE |
312 | data_section (); |
313 | ||
47431dff RK |
314 | /* Output the main header, of 11 words: |
315 | 0: 1 if this file is initialized, else 0. | |
3cf2715d DE |
316 | 1: address of file name (LPBX1). |
317 | 2: address of table of counts (LPBX2). | |
318 | 3: number of counts in the table. | |
319 | 4: always 0, for compatibility with Sun. | |
320 | ||
321 | The following are GNU extensions: | |
322 | ||
323 | 5: address of table of start addrs of basic blocks (LPBX3). | |
324 | 6: Number of bytes in this header. | |
325 | 7: address of table of function names (LPBX4). | |
326 | 8: address of table of line numbers (LPBX5) or 0. | |
47431dff | 327 | 9: address of table of file names (LPBX6) or 0. |
0f41302f | 328 | 10: space reserved for basic block profiling. */ |
3cf2715d DE |
329 | |
330 | ASM_OUTPUT_ALIGN (asm_out_file, align); | |
331 | ||
332 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0); | |
3cf2715d | 333 | |
c8af3574 RH |
334 | /* Zero word. */ |
335 | assemble_integer (const0_rtx, long_bytes, align2, 1); | |
336 | ||
337 | /* Address of filename. */ | |
3cf2715d | 338 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1); |
c8af3574 RH |
339 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, |
340 | align2, 1); | |
3cf2715d | 341 | |
c8af3574 | 342 | /* Address of count table. */ |
3cf2715d | 343 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2); |
c8af3574 RH |
344 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, |
345 | align2, 1); | |
3cf2715d | 346 | |
c8af3574 | 347 | /* Count of the # of basic blocks or # of instrumented arcs. */ |
c8af3574 RH |
348 | assemble_integer (GEN_INT (profile_block_flag |
349 | ? count_basic_blocks | |
350 | : count_instrumented_edges), | |
351 | long_bytes, align2, 1); | |
3cf2715d | 352 | |
c8af3574 RH |
353 | /* Zero word (link field). */ |
354 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); | |
3cf2715d DE |
355 | |
356 | /* address of basic block start address table */ | |
9e2f9a7f DE |
357 | if (profile_block_flag) |
358 | { | |
359 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3); | |
c8af3574 RH |
360 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
361 | pointer_bytes, align2, 1); | |
9e2f9a7f DE |
362 | } |
363 | else | |
c8af3574 | 364 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
3cf2715d | 365 | |
c8af3574 RH |
366 | /* Byte count for extended structure. */ |
367 | assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, align2, 1); | |
3cf2715d | 368 | |
c8af3574 | 369 | /* Address of function name table. */ |
9e2f9a7f DE |
370 | if (profile_block_flag) |
371 | { | |
372 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4); | |
c8af3574 RH |
373 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
374 | pointer_bytes, align2, 1); | |
9e2f9a7f DE |
375 | } |
376 | else | |
c8af3574 | 377 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
3cf2715d | 378 | |
c8af3574 | 379 | /* Address of line number and filename tables if debugging. */ |
9e2f9a7f | 380 | if (write_symbols != NO_DEBUG && profile_block_flag) |
3cf2715d DE |
381 | { |
382 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5); | |
c5c76735 | 383 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
c8af3574 | 384 | pointer_bytes, align2, 1); |
3cf2715d | 385 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6); |
c5c76735 | 386 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
c8af3574 | 387 | pointer_bytes, align2, 1); |
3cf2715d DE |
388 | } |
389 | else | |
390 | { | |
c8af3574 RH |
391 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
392 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); | |
3cf2715d DE |
393 | } |
394 | ||
c8af3574 RH |
395 | /* Space for extension ptr (link field). */ |
396 | assemble_integer (const0_rtx, UNITS_PER_WORD, align2, 1); | |
47431dff | 397 | |
c8af3574 RH |
398 | /* Output the file name changing the suffix to .d for |
399 | Sun tcov compatibility. */ | |
3cf2715d DE |
400 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1); |
401 | { | |
67e23d2f JW |
402 | char *cwd = getpwd (); |
403 | int len = strlen (filename) + strlen (cwd) + 1; | |
404 | char *data_file = (char *) alloca (len + 4); | |
405 | ||
406 | strcpy (data_file, cwd); | |
407 | strcat (data_file, "/"); | |
408 | strcat (data_file, filename); | |
3cf2715d | 409 | strip_off_ending (data_file, len); |
9e2f9a7f DE |
410 | if (profile_block_flag) |
411 | strcat (data_file, ".d"); | |
412 | else | |
413 | strcat (data_file, ".da"); | |
3cf2715d DE |
414 | assemble_string (data_file, strlen (data_file) + 1); |
415 | } | |
416 | ||
417 | /* Make space for the table of counts. */ | |
2786cbad | 418 | if (size == 0) |
3cf2715d DE |
419 | { |
420 | /* Realign data section. */ | |
421 | ASM_OUTPUT_ALIGN (asm_out_file, align); | |
422 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2); | |
423 | if (size != 0) | |
424 | assemble_zeros (size); | |
425 | } | |
426 | else | |
427 | { | |
428 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2); | |
429 | #ifdef ASM_OUTPUT_SHARED_LOCAL | |
430 | if (flag_shared_data) | |
431 | ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded); | |
432 | else | |
433 | #endif | |
e9a25f70 | 434 | #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL |
f5d927c0 KH |
435 | ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, |
436 | size, BIGGEST_ALIGNMENT); | |
e9a25f70 | 437 | #else |
3cf2715d DE |
438 | #ifdef ASM_OUTPUT_ALIGNED_LOCAL |
439 | ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size, | |
440 | BIGGEST_ALIGNMENT); | |
441 | #else | |
442 | ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded); | |
e9a25f70 | 443 | #endif |
3cf2715d DE |
444 | #endif |
445 | } | |
446 | ||
447 | /* Output any basic block strings */ | |
9e2f9a7f | 448 | if (profile_block_flag) |
3cf2715d | 449 | { |
9e2f9a7f DE |
450 | readonly_data_section (); |
451 | if (sbb_head) | |
3cf2715d | 452 | { |
9e2f9a7f DE |
453 | ASM_OUTPUT_ALIGN (asm_out_file, align); |
454 | for (sptr = sbb_head; sptr != 0; sptr = sptr->next) | |
455 | { | |
456 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC", | |
457 | sptr->label_num); | |
458 | assemble_string (sptr->string, sptr->length); | |
459 | } | |
3cf2715d DE |
460 | } |
461 | } | |
462 | ||
463 | /* Output the table of addresses. */ | |
9e2f9a7f | 464 | if (profile_block_flag) |
3cf2715d | 465 | { |
9e2f9a7f DE |
466 | /* Realign in new section */ |
467 | ASM_OUTPUT_ALIGN (asm_out_file, align); | |
468 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3); | |
469 | for (i = 0; i < count_basic_blocks; i++) | |
470 | { | |
471 | ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i); | |
38a448ca | 472 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
c8af3574 | 473 | pointer_bytes, align2, 1); |
9e2f9a7f | 474 | } |
3cf2715d DE |
475 | } |
476 | ||
477 | /* Output the table of function names. */ | |
9e2f9a7f | 478 | if (profile_block_flag) |
3cf2715d | 479 | { |
9e2f9a7f DE |
480 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4); |
481 | for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++) | |
3cf2715d | 482 | { |
9e2f9a7f DE |
483 | if (ptr->func_label_num >= 0) |
484 | { | |
485 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBC", | |
486 | ptr->func_label_num); | |
38a448ca | 487 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
c8af3574 | 488 | pointer_bytes, align2, 1); |
9e2f9a7f DE |
489 | } |
490 | else | |
c8af3574 | 491 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
3cf2715d | 492 | } |
3cf2715d | 493 | |
f5d927c0 | 494 | for (; i < count_basic_blocks; i++) |
c8af3574 | 495 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
9e2f9a7f | 496 | } |
3cf2715d | 497 | |
9e2f9a7f | 498 | if (write_symbols != NO_DEBUG && profile_block_flag) |
3cf2715d DE |
499 | { |
500 | /* Output the table of line numbers. */ | |
501 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5); | |
502 | for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++) | |
c8af3574 | 503 | assemble_integer (GEN_INT (ptr->line_num), long_bytes, align2, 1); |
3cf2715d | 504 | |
f5d927c0 | 505 | for (; i < count_basic_blocks; i++) |
c8af3574 | 506 | assemble_integer (const0_rtx, long_bytes, align2, 1); |
3cf2715d DE |
507 | |
508 | /* Output the table of file names. */ | |
509 | ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6); | |
510 | for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++) | |
511 | { | |
512 | if (ptr->file_label_num >= 0) | |
513 | { | |
9e2f9a7f DE |
514 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBC", |
515 | ptr->file_label_num); | |
38a448ca | 516 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
c8af3574 | 517 | pointer_bytes, align2, 1); |
3cf2715d DE |
518 | } |
519 | else | |
c8af3574 | 520 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
3cf2715d DE |
521 | } |
522 | ||
f5d927c0 | 523 | for (; i < count_basic_blocks; i++) |
c8af3574 | 524 | assemble_integer (const0_rtx, pointer_bytes, align2, 1); |
3cf2715d DE |
525 | } |
526 | ||
527 | /* End with the address of the table of addresses, | |
528 | so we can find it easily, as the last word in the file's text. */ | |
9e2f9a7f DE |
529 | if (profile_block_flag) |
530 | { | |
531 | ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3); | |
c8af3574 RH |
532 | assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), |
533 | pointer_bytes, align2, 1); | |
9e2f9a7f | 534 | } |
3cf2715d DE |
535 | } |
536 | } | |
537 | ||
08c148a8 | 538 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 539 | |
08c148a8 NB |
540 | If not overridden for epilogue code, then the function body itself |
541 | contains return instructions wherever needed. */ | |
542 | void | |
543 | default_function_pro_epilogue (file, size) | |
544 | FILE *file ATTRIBUTE_UNUSED; | |
545 | HOST_WIDE_INT size ATTRIBUTE_UNUSED; | |
546 | { | |
547 | } | |
548 | ||
b4c25db2 NB |
549 | /* Default target hook that outputs nothing to a stream. */ |
550 | void | |
551 | no_asm_to_stream (file) | |
552 | FILE *file ATTRIBUTE_UNUSED; | |
553 | { | |
554 | } | |
555 | ||
3cf2715d DE |
556 | /* Enable APP processing of subsequent output. |
557 | Used before the output from an `asm' statement. */ | |
558 | ||
559 | void | |
560 | app_enable () | |
561 | { | |
562 | if (! app_on) | |
563 | { | |
51723711 | 564 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
565 | app_on = 1; |
566 | } | |
567 | } | |
568 | ||
569 | /* Disable APP processing of subsequent output. | |
570 | Called from varasm.c before most kinds of output. */ | |
571 | ||
572 | void | |
573 | app_disable () | |
574 | { | |
575 | if (app_on) | |
576 | { | |
51723711 | 577 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
578 | app_on = 0; |
579 | } | |
580 | } | |
581 | \f | |
f5d927c0 | 582 | /* Return the number of slots filled in the current |
3cf2715d DE |
583 | delayed branch sequence (we don't count the insn needing the |
584 | delay slot). Zero if not in a delayed branch sequence. */ | |
585 | ||
586 | #ifdef DELAY_SLOTS | |
587 | int | |
588 | dbr_sequence_length () | |
589 | { | |
590 | if (final_sequence != 0) | |
591 | return XVECLEN (final_sequence, 0) - 1; | |
592 | else | |
593 | return 0; | |
594 | } | |
595 | #endif | |
596 | \f | |
597 | /* The next two pages contain routines used to compute the length of an insn | |
598 | and to shorten branches. */ | |
599 | ||
600 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
601 | `insn_current_length'. */ | |
602 | ||
603 | static short *insn_lengths; | |
9d98a694 AO |
604 | |
605 | #ifdef HAVE_ATTR_length | |
606 | varray_type insn_addresses_; | |
607 | #endif | |
3cf2715d | 608 | |
ea3cbda5 R |
609 | /* Max uid for which the above arrays are valid. */ |
610 | static int insn_lengths_max_uid; | |
611 | ||
3cf2715d DE |
612 | /* Address of insn being processed. Used by `insn_current_length'. */ |
613 | int insn_current_address; | |
614 | ||
fc470718 R |
615 | /* Address of insn being processed in previous iteration. */ |
616 | int insn_last_address; | |
617 | ||
618 | /* konwn invariant alignment of insn being processed. */ | |
619 | int insn_current_align; | |
620 | ||
95707627 R |
621 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
622 | gives the next following alignment insn that increases the known | |
623 | alignment, or NULL_RTX if there is no such insn. | |
624 | For any alignment obtained this way, we can again index uid_align with | |
625 | its uid to obtain the next following align that in turn increases the | |
626 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
627 | for each insn we'll call the alignment chain of this insn in the following | |
628 | comments. */ | |
629 | ||
f5d927c0 KH |
630 | struct label_alignment |
631 | { | |
9e423e6d JW |
632 | short alignment; |
633 | short max_skip; | |
634 | }; | |
635 | ||
636 | static rtx *uid_align; | |
637 | static int *uid_shuid; | |
638 | static struct label_alignment *label_align; | |
95707627 | 639 | |
3cf2715d DE |
640 | /* Indicate that branch shortening hasn't yet been done. */ |
641 | ||
642 | void | |
643 | init_insn_lengths () | |
644 | { | |
95707627 R |
645 | if (uid_shuid) |
646 | { | |
647 | free (uid_shuid); | |
648 | uid_shuid = 0; | |
649 | } | |
650 | if (insn_lengths) | |
651 | { | |
652 | free (insn_lengths); | |
653 | insn_lengths = 0; | |
ea3cbda5 | 654 | insn_lengths_max_uid = 0; |
95707627 | 655 | } |
9d98a694 AO |
656 | #ifdef HAVE_ATTR_length |
657 | INSN_ADDRESSES_FREE (); | |
658 | #endif | |
95707627 R |
659 | if (uid_align) |
660 | { | |
661 | free (uid_align); | |
662 | uid_align = 0; | |
663 | } | |
3cf2715d DE |
664 | } |
665 | ||
666 | /* Obtain the current length of an insn. If branch shortening has been done, | |
667 | get its actual length. Otherwise, get its maximum length. */ | |
668 | ||
669 | int | |
670 | get_attr_length (insn) | |
7bdb32b9 | 671 | rtx insn ATTRIBUTE_UNUSED; |
3cf2715d DE |
672 | { |
673 | #ifdef HAVE_ATTR_length | |
674 | rtx body; | |
675 | int i; | |
676 | int length = 0; | |
677 | ||
ea3cbda5 | 678 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
679 | return insn_lengths[INSN_UID (insn)]; |
680 | else | |
681 | switch (GET_CODE (insn)) | |
682 | { | |
683 | case NOTE: | |
684 | case BARRIER: | |
685 | case CODE_LABEL: | |
686 | return 0; | |
687 | ||
688 | case CALL_INSN: | |
689 | length = insn_default_length (insn); | |
690 | break; | |
691 | ||
692 | case JUMP_INSN: | |
693 | body = PATTERN (insn); | |
694 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
695 | { | |
fc470718 R |
696 | /* Alignment is machine-dependent and should be handled by |
697 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
698 | } |
699 | else | |
700 | length = insn_default_length (insn); | |
701 | break; | |
702 | ||
703 | case INSN: | |
704 | body = PATTERN (insn); | |
705 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
706 | return 0; | |
707 | ||
708 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
709 | length = asm_insn_count (body) * insn_default_length (insn); | |
710 | else if (GET_CODE (body) == SEQUENCE) | |
711 | for (i = 0; i < XVECLEN (body, 0); i++) | |
712 | length += get_attr_length (XVECEXP (body, 0, i)); | |
713 | else | |
714 | length = insn_default_length (insn); | |
e9a25f70 JL |
715 | break; |
716 | ||
717 | default: | |
718 | break; | |
3cf2715d DE |
719 | } |
720 | ||
721 | #ifdef ADJUST_INSN_LENGTH | |
722 | ADJUST_INSN_LENGTH (insn, length); | |
723 | #endif | |
724 | return length; | |
725 | #else /* not HAVE_ATTR_length */ | |
726 | return 0; | |
727 | #endif /* not HAVE_ATTR_length */ | |
728 | } | |
729 | \f | |
fc470718 R |
730 | /* Code to handle alignment inside shorten_branches. */ |
731 | ||
732 | /* Here is an explanation how the algorithm in align_fuzz can give | |
733 | proper results: | |
734 | ||
735 | Call a sequence of instructions beginning with alignment point X | |
736 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 737 | is used in an expression, it means the alignment value of the |
fc470718 | 738 | alignment point. |
f5d927c0 | 739 | |
fc470718 R |
740 | Call the distance between the start of the first insn of block X, and |
741 | the end of the last insn of block X `IX', for the `inner size of X'. | |
742 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 743 | |
fc470718 R |
744 | Likewise with the next alignment-delimited block following X, which we |
745 | shall call block Y. | |
f5d927c0 | 746 | |
fc470718 R |
747 | Call the distance between the start of the first insn of block X, and |
748 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 749 | |
fc470718 | 750 | The estimated padding is then OX - IX. |
f5d927c0 | 751 | |
fc470718 | 752 | OX can be safely estimated as |
f5d927c0 | 753 | |
fc470718 R |
754 | if (X >= Y) |
755 | OX = round_up(IX, Y) | |
756 | else | |
757 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 758 | |
fc470718 R |
759 | Clearly est(IX) >= real(IX), because that only depends on the |
760 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 761 | |
fc470718 R |
762 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
763 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 764 | |
fc470718 R |
765 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
766 | for branch ranges starting before X, so we can just round what we have. | |
767 | But when X < Y, we don't know anything about the, so to speak, | |
768 | `middle bits', so we have to assume the worst when aligning up from an | |
769 | address mod X to one mod Y, which is Y - X. */ | |
770 | ||
771 | #ifndef LABEL_ALIGN | |
efa3896a | 772 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
773 | #endif |
774 | ||
9e423e6d | 775 | #ifndef LABEL_ALIGN_MAX_SKIP |
efa3896a | 776 | #define LABEL_ALIGN_MAX_SKIP (align_labels-1) |
9e423e6d JW |
777 | #endif |
778 | ||
fc470718 | 779 | #ifndef LOOP_ALIGN |
efa3896a | 780 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
781 | #endif |
782 | ||
9e423e6d | 783 | #ifndef LOOP_ALIGN_MAX_SKIP |
efa3896a | 784 | #define LOOP_ALIGN_MAX_SKIP (align_loops-1) |
9e423e6d JW |
785 | #endif |
786 | ||
fc470718 | 787 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
340f7e7c | 788 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
789 | #endif |
790 | ||
9e423e6d | 791 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
247a370b JH |
792 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 |
793 | #endif | |
794 | ||
795 | #ifndef JUMP_ALIGN | |
796 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
797 | #endif | |
798 | ||
799 | #ifndef JUMP_ALIGN_MAX_SKIP | |
800 | #define JUMP_ALIGN_MAX_SKIP (align_jumps-1) | |
9e423e6d JW |
801 | #endif |
802 | ||
fc470718 | 803 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 804 | static int |
fc470718 R |
805 | final_addr_vec_align (addr_vec) |
806 | rtx addr_vec; | |
807 | { | |
2a841588 | 808 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
809 | |
810 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
811 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 812 | return exact_log2 (align); |
fc470718 R |
813 | |
814 | } | |
f5d927c0 | 815 | |
fc470718 R |
816 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
817 | #endif | |
818 | ||
819 | #ifndef INSN_LENGTH_ALIGNMENT | |
820 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
821 | #endif | |
822 | ||
fc470718 R |
823 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
824 | ||
de7987a6 | 825 | static int min_labelno, max_labelno; |
fc470718 R |
826 | |
827 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
828 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
829 | ||
830 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
831 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
832 | |
833 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 834 | |
fc470718 R |
835 | int |
836 | label_to_alignment (label) | |
837 | rtx label; | |
838 | { | |
839 | return LABEL_TO_ALIGNMENT (label); | |
840 | } | |
841 | ||
842 | #ifdef HAVE_ATTR_length | |
843 | /* The differences in addresses | |
844 | between a branch and its target might grow or shrink depending on | |
845 | the alignment the start insn of the range (the branch for a forward | |
846 | branch or the label for a backward branch) starts out on; if these | |
847 | differences are used naively, they can even oscillate infinitely. | |
848 | We therefore want to compute a 'worst case' address difference that | |
849 | is independent of the alignment the start insn of the range end | |
850 | up on, and that is at least as large as the actual difference. | |
851 | The function align_fuzz calculates the amount we have to add to the | |
852 | naively computed difference, by traversing the part of the alignment | |
853 | chain of the start insn of the range that is in front of the end insn | |
854 | of the range, and considering for each alignment the maximum amount | |
855 | that it might contribute to a size increase. | |
856 | ||
857 | For casesi tables, we also want to know worst case minimum amounts of | |
858 | address difference, in case a machine description wants to introduce | |
859 | some common offset that is added to all offsets in a table. | |
860 | For this purpose, align_fuzz with a growth argument of 0 comuptes the | |
861 | appropriate adjustment. */ | |
862 | ||
fc470718 R |
863 | /* Compute the maximum delta by which the difference of the addresses of |
864 | START and END might grow / shrink due to a different address for start | |
865 | which changes the size of alignment insns between START and END. | |
866 | KNOWN_ALIGN_LOG is the alignment known for START. | |
867 | GROWTH should be ~0 if the objective is to compute potential code size | |
868 | increase, and 0 if the objective is to compute potential shrink. | |
869 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 870 | |
ca3075bd | 871 | static int |
687d0ab6 | 872 | align_fuzz (start, end, known_align_log, growth) |
fc470718 R |
873 | rtx start, end; |
874 | int known_align_log; | |
875 | unsigned growth; | |
876 | { | |
877 | int uid = INSN_UID (start); | |
878 | rtx align_label; | |
879 | int known_align = 1 << known_align_log; | |
880 | int end_shuid = INSN_SHUID (end); | |
881 | int fuzz = 0; | |
882 | ||
883 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
884 | { | |
885 | int align_addr, new_align; | |
886 | ||
887 | uid = INSN_UID (align_label); | |
9d98a694 | 888 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
889 | if (uid_shuid[uid] > end_shuid) |
890 | break; | |
891 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
892 | new_align = 1 << known_align_log; | |
893 | if (new_align < known_align) | |
894 | continue; | |
895 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
896 | known_align = new_align; | |
897 | } | |
898 | return fuzz; | |
899 | } | |
900 | ||
901 | /* Compute a worst-case reference address of a branch so that it | |
902 | can be safely used in the presence of aligned labels. Since the | |
903 | size of the branch itself is unknown, the size of the branch is | |
904 | not included in the range. I.e. for a forward branch, the reference | |
905 | address is the end address of the branch as known from the previous | |
906 | branch shortening pass, minus a value to account for possible size | |
907 | increase due to alignment. For a backward branch, it is the start | |
908 | address of the branch as known from the current pass, plus a value | |
909 | to account for possible size increase due to alignment. | |
910 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
911 | to exclude the branch size. */ | |
f5d927c0 | 912 | |
fc470718 R |
913 | int |
914 | insn_current_reference_address (branch) | |
915 | rtx branch; | |
916 | { | |
5527bf14 RH |
917 | rtx dest, seq; |
918 | int seq_uid; | |
919 | ||
920 | if (! INSN_ADDRESSES_SET_P ()) | |
921 | return 0; | |
922 | ||
923 | seq = NEXT_INSN (PREV_INSN (branch)); | |
924 | seq_uid = INSN_UID (seq); | |
fc470718 R |
925 | if (GET_CODE (branch) != JUMP_INSN) |
926 | /* This can happen for example on the PA; the objective is to know the | |
927 | offset to address something in front of the start of the function. | |
928 | Thus, we can treat it like a backward branch. | |
929 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
930 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
931 | return insn_current_address; | |
932 | dest = JUMP_LABEL (branch); | |
5527bf14 | 933 | |
b9f22704 | 934 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
935 | BRANCH also has no INSN_SHUID. */ |
936 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 937 | { |
f5d927c0 | 938 | /* Forward branch. */ |
fc470718 | 939 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 940 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
941 | } |
942 | else | |
943 | { | |
f5d927c0 | 944 | /* Backward branch. */ |
fc470718 | 945 | return (insn_current_address |
923f7cf9 | 946 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
947 | } |
948 | } | |
949 | #endif /* HAVE_ATTR_length */ | |
950 | \f | |
247a370b JH |
951 | void |
952 | compute_alignments () | |
953 | { | |
954 | int i; | |
955 | int log, max_skip, max_log; | |
956 | ||
957 | if (label_align) | |
958 | { | |
959 | free (label_align); | |
960 | label_align = 0; | |
961 | } | |
962 | ||
963 | max_labelno = max_label_num (); | |
964 | min_labelno = get_first_label_num (); | |
965 | label_align = (struct label_alignment *) | |
966 | xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment)); | |
967 | ||
968 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
ba712955 | 969 | if (! optimize || optimize_size) |
247a370b JH |
970 | return; |
971 | ||
972 | for (i = 0; i < n_basic_blocks; i++) | |
973 | { | |
974 | basic_block bb = BASIC_BLOCK (i); | |
975 | rtx label = bb->head; | |
976 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; | |
977 | edge e; | |
978 | ||
979 | if (GET_CODE (label) != CODE_LABEL) | |
980 | continue; | |
981 | max_log = LABEL_ALIGN (label); | |
982 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
983 | ||
984 | for (e = bb->pred; e; e = e->pred_next) | |
985 | { | |
986 | if (e->flags & EDGE_FALLTHRU) | |
987 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
988 | else | |
989 | branch_frequency += EDGE_FREQUENCY (e); | |
990 | } | |
991 | ||
992 | /* There are two purposes to align block with no fallthru incomming edge: | |
993 | 1) to avoid fetch stalls when branch destination is near cache boundary | |
994 | 2) to improve cache effciency in case the previous block is not executed | |
995 | (so it does not need to be in the cache). | |
996 | ||
997 | We to catch first case, we align frequently executed blocks. | |
998 | To catch the second, we align blocks that are executed more frequently | |
999 | than the predecesor and the predecesor is likely to not be executed | |
1000 | when function is called. */ | |
1001 | ||
1002 | if (!has_fallthru | |
1003 | && (branch_frequency > BB_FREQ_MAX / 10 | |
1004 | || (bb->frequency > BASIC_BLOCK (i - 1)->frequency * 10 | |
1005 | && (BASIC_BLOCK (i - 1)->frequency | |
1006 | <= ENTRY_BLOCK_PTR->frequency / 2)))) | |
1007 | { | |
1008 | log = JUMP_ALIGN (label); | |
1009 | if (max_log < log) | |
1010 | { | |
1011 | max_log = log; | |
1012 | max_skip = JUMP_ALIGN_MAX_SKIP; | |
1013 | } | |
1014 | } | |
1015 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
1016 | align it. It is most likely an first block of loop. */ | |
1017 | if (has_fallthru | |
1018 | && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10 | |
1019 | && branch_frequency > fallthru_frequency * 5) | |
1020 | { | |
1021 | log = LOOP_ALIGN (label); | |
1022 | if (max_log < log) | |
1023 | { | |
1024 | max_log = log; | |
1025 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
1026 | } | |
1027 | } | |
1028 | LABEL_TO_ALIGNMENT (label) = max_log; | |
1029 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
1030 | } | |
1031 | } | |
1032 | \f | |
3cf2715d DE |
1033 | /* Make a pass over all insns and compute their actual lengths by shortening |
1034 | any branches of variable length if possible. */ | |
1035 | ||
1036 | /* Give a default value for the lowest address in a function. */ | |
1037 | ||
1038 | #ifndef FIRST_INSN_ADDRESS | |
1039 | #define FIRST_INSN_ADDRESS 0 | |
1040 | #endif | |
1041 | ||
fc470718 R |
1042 | /* shorten_branches might be called multiple times: for example, the SH |
1043 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
1044 | In order to do this, it needs proper length information, which it obtains | |
1045 | by calling shorten_branches. This cannot be collapsed with | |
1046 | shorten_branches itself into a single pass unless we also want to intergate | |
1047 | reorg.c, since the branch splitting exposes new instructions with delay | |
1048 | slots. */ | |
1049 | ||
3cf2715d DE |
1050 | void |
1051 | shorten_branches (first) | |
7bdb32b9 | 1052 | rtx first ATTRIBUTE_UNUSED; |
3cf2715d | 1053 | { |
3cf2715d | 1054 | rtx insn; |
fc470718 R |
1055 | int max_uid; |
1056 | int i; | |
fc470718 | 1057 | int max_log; |
9e423e6d | 1058 | int max_skip; |
fc470718 R |
1059 | #ifdef HAVE_ATTR_length |
1060 | #define MAX_CODE_ALIGN 16 | |
1061 | rtx seq; | |
3cf2715d | 1062 | int something_changed = 1; |
3cf2715d DE |
1063 | char *varying_length; |
1064 | rtx body; | |
1065 | int uid; | |
fc470718 | 1066 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 1067 | |
fc470718 | 1068 | #endif |
3d14e82f | 1069 | |
3446405d JH |
1070 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
1071 | max_uid = get_max_uid (); | |
d9b6874b | 1072 | |
3446405d | 1073 | uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid); |
25e22dc0 | 1074 | |
247a370b JH |
1075 | if (max_labelno != max_label_num ()) |
1076 | { | |
1077 | int old = max_labelno; | |
1078 | int n_labels; | |
1079 | int n_old_labels; | |
1080 | ||
1081 | max_labelno = max_label_num (); | |
1082 | ||
1083 | n_labels = max_labelno - min_labelno + 1; | |
1084 | n_old_labels = old - min_labelno + 1; | |
1085 | ||
1086 | label_align = (struct label_alignment *) xrealloc | |
1087 | (label_align, n_labels * sizeof (struct label_alignment)); | |
1088 | ||
1089 | /* Range of labels grows monotonically in the function. Abort here | |
1090 | means that the initialization of array got lost. */ | |
1091 | if (n_old_labels > n_labels) | |
1092 | abort (); | |
1093 | ||
1094 | memset (label_align + n_old_labels, 0, | |
1095 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
1096 | } | |
1097 | ||
fc470718 R |
1098 | /* Initialize label_align and set up uid_shuid to be strictly |
1099 | monotonically rising with insn order. */ | |
e2faec75 R |
1100 | /* We use max_log here to keep track of the maximum alignment we want to |
1101 | impose on the next CODE_LABEL (or the current one if we are processing | |
1102 | the CODE_LABEL itself). */ | |
f5d927c0 | 1103 | |
9e423e6d JW |
1104 | max_log = 0; |
1105 | max_skip = 0; | |
1106 | ||
1107 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
1108 | { |
1109 | int log; | |
1110 | ||
1111 | INSN_SHUID (insn) = i++; | |
2c3c49de | 1112 | if (INSN_P (insn)) |
e2faec75 R |
1113 | { |
1114 | /* reorg might make the first insn of a loop being run once only, | |
1115 | and delete the label in front of it. Then we want to apply | |
1116 | the loop alignment to the new label created by reorg, which | |
1117 | is separated by the former loop start insn from the | |
1118 | NOTE_INSN_LOOP_BEG. */ | |
1119 | } | |
fc470718 R |
1120 | else if (GET_CODE (insn) == CODE_LABEL) |
1121 | { | |
1122 | rtx next; | |
247a370b JH |
1123 | |
1124 | /* Merge in alignments computed by compute_alignments. */ | |
1125 | log = LABEL_TO_ALIGNMENT (insn); | |
1126 | if (max_log < log) | |
1127 | { | |
1128 | max_log = log; | |
1129 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
1130 | } | |
fc470718 R |
1131 | |
1132 | log = LABEL_ALIGN (insn); | |
1133 | if (max_log < log) | |
9e423e6d JW |
1134 | { |
1135 | max_log = log; | |
1136 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
1137 | } | |
fc470718 | 1138 | next = NEXT_INSN (insn); |
75197b37 BS |
1139 | /* ADDR_VECs only take room if read-only data goes into the text |
1140 | section. */ | |
1141 | if (JUMP_TABLES_IN_TEXT_SECTION | |
1142 | #if !defined(READONLY_DATA_SECTION) | |
1143 | || 1 | |
fc470718 | 1144 | #endif |
75197b37 BS |
1145 | ) |
1146 | if (next && GET_CODE (next) == JUMP_INSN) | |
1147 | { | |
1148 | rtx nextbody = PATTERN (next); | |
1149 | if (GET_CODE (nextbody) == ADDR_VEC | |
1150 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
1151 | { | |
1152 | log = ADDR_VEC_ALIGN (next); | |
1153 | if (max_log < log) | |
1154 | { | |
1155 | max_log = log; | |
1156 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
1157 | } | |
1158 | } | |
1159 | } | |
fc470718 | 1160 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 1161 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 1162 | max_log = 0; |
9e423e6d | 1163 | max_skip = 0; |
fc470718 R |
1164 | } |
1165 | else if (GET_CODE (insn) == BARRIER) | |
1166 | { | |
1167 | rtx label; | |
1168 | ||
2c3c49de | 1169 | for (label = insn; label && ! INSN_P (label); |
fc470718 R |
1170 | label = NEXT_INSN (label)) |
1171 | if (GET_CODE (label) == CODE_LABEL) | |
1172 | { | |
1173 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
1174 | if (max_log < log) | |
9e423e6d JW |
1175 | { |
1176 | max_log = log; | |
1177 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
1178 | } | |
fc470718 R |
1179 | break; |
1180 | } | |
1181 | } | |
fc470718 R |
1182 | } |
1183 | #ifdef HAVE_ATTR_length | |
1184 | ||
1185 | /* Allocate the rest of the arrays. */ | |
fc470718 | 1186 | insn_lengths = (short *) xmalloc (max_uid * sizeof (short)); |
ea3cbda5 | 1187 | insn_lengths_max_uid = max_uid; |
af035616 R |
1188 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1189 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 1190 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1191 | |
3de90026 | 1192 | varying_length = (char *) xcalloc (max_uid, sizeof (char)); |
fc470718 R |
1193 | |
1194 | /* Initialize uid_align. We scan instructions | |
1195 | from end to start, and keep in align_tab[n] the last seen insn | |
1196 | that does an alignment of at least n+1, i.e. the successor | |
1197 | in the alignment chain for an insn that does / has a known | |
1198 | alignment of n. */ | |
3de90026 | 1199 | uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align); |
fc470718 | 1200 | |
f5d927c0 | 1201 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1202 | align_tab[i] = NULL_RTX; |
1203 | seq = get_last_insn (); | |
33f7f353 | 1204 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1205 | { |
1206 | int uid = INSN_UID (seq); | |
1207 | int log; | |
fc470718 R |
1208 | log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0); |
1209 | uid_align[uid] = align_tab[0]; | |
fc470718 R |
1210 | if (log) |
1211 | { | |
1212 | /* Found an alignment label. */ | |
1213 | uid_align[uid] = align_tab[log]; | |
1214 | for (i = log - 1; i >= 0; i--) | |
1215 | align_tab[i] = seq; | |
1216 | } | |
33f7f353 JR |
1217 | } |
1218 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1219 | if (optimize) | |
1220 | { | |
1221 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1222 | label fields. */ | |
1223 | ||
1224 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1225 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1226 | int rel; | |
1227 | ||
1228 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1229 | { |
33f7f353 JR |
1230 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1231 | int len, i, min, max, insn_shuid; | |
1232 | int min_align; | |
1233 | addr_diff_vec_flags flags; | |
1234 | ||
1235 | if (GET_CODE (insn) != JUMP_INSN | |
1236 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) | |
1237 | continue; | |
1238 | pat = PATTERN (insn); | |
1239 | len = XVECLEN (pat, 1); | |
1240 | if (len <= 0) | |
1241 | abort (); | |
1242 | min_align = MAX_CODE_ALIGN; | |
1243 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1244 | { | |
1245 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1246 | int shuid = INSN_SHUID (lab); | |
1247 | if (shuid < min) | |
1248 | { | |
1249 | min = shuid; | |
1250 | min_lab = lab; | |
1251 | } | |
1252 | if (shuid > max) | |
1253 | { | |
1254 | max = shuid; | |
1255 | max_lab = lab; | |
1256 | } | |
1257 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1258 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1259 | } | |
1260 | XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab); | |
1261 | XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab); | |
1262 | insn_shuid = INSN_SHUID (insn); | |
1263 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
1264 | flags.min_align = min_align; | |
1265 | flags.base_after_vec = rel > insn_shuid; | |
1266 | flags.min_after_vec = min > insn_shuid; | |
1267 | flags.max_after_vec = max > insn_shuid; | |
1268 | flags.min_after_base = min > rel; | |
1269 | flags.max_after_base = max > rel; | |
1270 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
1271 | } |
1272 | } | |
33f7f353 | 1273 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1274 | |
3cf2715d DE |
1275 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
1276 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; | |
1277 | insn != 0; | |
1278 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1279 | { | |
1280 | uid = INSN_UID (insn); | |
fc470718 | 1281 | |
3cf2715d | 1282 | insn_lengths[uid] = 0; |
fc470718 R |
1283 | |
1284 | if (GET_CODE (insn) == CODE_LABEL) | |
1285 | { | |
1286 | int log = LABEL_TO_ALIGNMENT (insn); | |
1287 | if (log) | |
1288 | { | |
1289 | int align = 1 << log; | |
ecb06768 | 1290 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1291 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1292 | } |
1293 | } | |
1294 | ||
9d98a694 | 1295 | INSN_ADDRESSES (uid) = insn_current_address; |
f5d927c0 | 1296 | |
3cf2715d DE |
1297 | if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER |
1298 | || GET_CODE (insn) == CODE_LABEL) | |
1299 | continue; | |
04da53bd R |
1300 | if (INSN_DELETED_P (insn)) |
1301 | continue; | |
3cf2715d DE |
1302 | |
1303 | body = PATTERN (insn); | |
1304 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1305 | { |
1306 | /* This only takes room if read-only data goes into the text | |
1307 | section. */ | |
75197b37 BS |
1308 | if (JUMP_TABLES_IN_TEXT_SECTION |
1309 | #if !defined(READONLY_DATA_SECTION) | |
1310 | || 1 | |
1311 | #endif | |
1312 | ) | |
1313 | insn_lengths[uid] = (XVECLEN (body, | |
1314 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1315 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1316 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1317 | } |
a30caf5c | 1318 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1319 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1320 | else if (GET_CODE (body) == SEQUENCE) | |
1321 | { | |
1322 | int i; | |
1323 | int const_delay_slots; | |
1324 | #ifdef DELAY_SLOTS | |
1325 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1326 | #else | |
1327 | const_delay_slots = 0; | |
1328 | #endif | |
1329 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1330 | if the shortening could change the number of delay slots | |
0f41302f | 1331 | of the branch. */ |
3cf2715d DE |
1332 | for (i = 0; i < XVECLEN (body, 0); i++) |
1333 | { | |
1334 | rtx inner_insn = XVECEXP (body, 0, i); | |
1335 | int inner_uid = INSN_UID (inner_insn); | |
1336 | int inner_length; | |
1337 | ||
a30caf5c DC |
1338 | if (GET_CODE (body) == ASM_INPUT |
1339 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1340 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1341 | * insn_default_length (inner_insn)); | |
1342 | else | |
1343 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1344 | |
3cf2715d DE |
1345 | insn_lengths[inner_uid] = inner_length; |
1346 | if (const_delay_slots) | |
1347 | { | |
1348 | if ((varying_length[inner_uid] | |
1349 | = insn_variable_length_p (inner_insn)) != 0) | |
1350 | varying_length[uid] = 1; | |
9d98a694 AO |
1351 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1352 | + insn_lengths[uid]); | |
3cf2715d DE |
1353 | } |
1354 | else | |
1355 | varying_length[inner_uid] = 0; | |
1356 | insn_lengths[uid] += inner_length; | |
1357 | } | |
1358 | } | |
1359 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1360 | { | |
1361 | insn_lengths[uid] = insn_default_length (insn); | |
1362 | varying_length[uid] = insn_variable_length_p (insn); | |
1363 | } | |
1364 | ||
1365 | /* If needed, do any adjustment. */ | |
1366 | #ifdef ADJUST_INSN_LENGTH | |
1367 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c VM |
1368 | if (insn_lengths[uid] < 0) |
1369 | fatal_insn ("Negative insn length", insn); | |
3cf2715d DE |
1370 | #endif |
1371 | } | |
1372 | ||
1373 | /* Now loop over all the insns finding varying length insns. For each, | |
1374 | get the current insn length. If it has changed, reflect the change. | |
1375 | When nothing changes for a full pass, we are done. */ | |
1376 | ||
1377 | while (something_changed) | |
1378 | { | |
1379 | something_changed = 0; | |
fc470718 | 1380 | insn_current_align = MAX_CODE_ALIGN - 1; |
3cf2715d DE |
1381 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; |
1382 | insn != 0; | |
1383 | insn = NEXT_INSN (insn)) | |
1384 | { | |
1385 | int new_length; | |
b729186a | 1386 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1387 | int tmp_length; |
b729186a | 1388 | #endif |
fc470718 | 1389 | int length_align; |
3cf2715d DE |
1390 | |
1391 | uid = INSN_UID (insn); | |
fc470718 R |
1392 | |
1393 | if (GET_CODE (insn) == CODE_LABEL) | |
1394 | { | |
1395 | int log = LABEL_TO_ALIGNMENT (insn); | |
1396 | if (log > insn_current_align) | |
1397 | { | |
1398 | int align = 1 << log; | |
ecb06768 | 1399 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1400 | insn_lengths[uid] = new_address - insn_current_address; |
1401 | insn_current_align = log; | |
1402 | insn_current_address = new_address; | |
1403 | } | |
1404 | else | |
1405 | insn_lengths[uid] = 0; | |
9d98a694 | 1406 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1407 | continue; |
1408 | } | |
1409 | ||
1410 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1411 | if (length_align < insn_current_align) | |
1412 | insn_current_align = length_align; | |
1413 | ||
9d98a694 AO |
1414 | insn_last_address = INSN_ADDRESSES (uid); |
1415 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1416 | |
5e75ef4a | 1417 | #ifdef CASE_VECTOR_SHORTEN_MODE |
33f7f353 JR |
1418 | if (optimize && GET_CODE (insn) == JUMP_INSN |
1419 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
1420 | { | |
33f7f353 JR |
1421 | rtx body = PATTERN (insn); |
1422 | int old_length = insn_lengths[uid]; | |
1423 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1424 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1425 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
1426 | addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body); | |
9d98a694 AO |
1427 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1428 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1429 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1430 | rtx prev; |
1431 | int rel_align = 0; | |
1432 | ||
1433 | /* Try to find a known alignment for rel_lab. */ | |
1434 | for (prev = rel_lab; | |
1435 | prev | |
1436 | && ! insn_lengths[INSN_UID (prev)] | |
1437 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1438 | prev = PREV_INSN (prev)) | |
1439 | if (varying_length[INSN_UID (prev)] & 2) | |
1440 | { | |
1441 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1442 | break; | |
1443 | } | |
1444 | ||
1445 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1446 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1447 | /* Anything after INSN has still addresses from the last | |
1448 | pass; adjust these so that they reflect our current | |
1449 | estimate for this pass. */ | |
1450 | if (flags.base_after_vec) | |
1451 | rel_addr += insn_current_address - insn_last_address; | |
1452 | if (flags.min_after_vec) | |
1453 | min_addr += insn_current_address - insn_last_address; | |
1454 | if (flags.max_after_vec) | |
1455 | max_addr += insn_current_address - insn_last_address; | |
1456 | /* We want to know the worst case, i.e. lowest possible value | |
1457 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1458 | its offset is positive, and we have to be wary of code shrink; | |
1459 | otherwise, it is negative, and we have to be vary of code | |
1460 | size increase. */ | |
1461 | if (flags.min_after_base) | |
1462 | { | |
1463 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1464 | changes we are about to make can change the alignment | |
1465 | within the observed offset, therefore we have to break | |
1466 | it up into two parts that are independent. */ | |
1467 | if (! flags.base_after_vec && flags.min_after_vec) | |
1468 | { | |
1469 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1470 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1471 | } | |
1472 | else | |
1473 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1474 | } | |
1475 | else | |
1476 | { | |
1477 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1478 | { | |
1479 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1480 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1481 | } | |
1482 | else | |
1483 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1484 | } | |
1485 | /* Likewise, determine the highest lowest possible value | |
1486 | for the offset of MAX_LAB. */ | |
1487 | if (flags.max_after_base) | |
1488 | { | |
1489 | if (! flags.base_after_vec && flags.max_after_vec) | |
1490 | { | |
1491 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1492 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1493 | } | |
1494 | else | |
1495 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1496 | } | |
1497 | else | |
1498 | { | |
1499 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1500 | { | |
1501 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1502 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1503 | } | |
1504 | else | |
1505 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1506 | } | |
1507 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1508 | max_addr - rel_addr, | |
1509 | body)); | |
75197b37 BS |
1510 | if (JUMP_TABLES_IN_TEXT_SECTION |
1511 | #if !defined(READONLY_DATA_SECTION) | |
1512 | || 1 | |
33f7f353 | 1513 | #endif |
75197b37 BS |
1514 | ) |
1515 | { | |
1516 | insn_lengths[uid] | |
1517 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1518 | insn_current_address += insn_lengths[uid]; | |
1519 | if (insn_lengths[uid] != old_length) | |
1520 | something_changed = 1; | |
1521 | } | |
1522 | ||
33f7f353 | 1523 | continue; |
33f7f353 | 1524 | } |
5e75ef4a JL |
1525 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1526 | ||
1527 | if (! (varying_length[uid])) | |
3cf2715d | 1528 | { |
674fc07d GS |
1529 | if (GET_CODE (insn) == INSN |
1530 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1531 | { | |
1532 | int i; | |
1533 | ||
1534 | body = PATTERN (insn); | |
1535 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1536 | { | |
1537 | rtx inner_insn = XVECEXP (body, 0, i); | |
1538 | int inner_uid = INSN_UID (inner_insn); | |
1539 | ||
1540 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1541 | ||
1542 | insn_current_address += insn_lengths[inner_uid]; | |
1543 | } | |
1544 | } | |
1545 | else | |
1546 | insn_current_address += insn_lengths[uid]; | |
1547 | ||
3cf2715d DE |
1548 | continue; |
1549 | } | |
674fc07d | 1550 | |
3cf2715d DE |
1551 | if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1552 | { | |
1553 | int i; | |
f5d927c0 | 1554 | |
3cf2715d DE |
1555 | body = PATTERN (insn); |
1556 | new_length = 0; | |
1557 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1558 | { | |
1559 | rtx inner_insn = XVECEXP (body, 0, i); | |
1560 | int inner_uid = INSN_UID (inner_insn); | |
1561 | int inner_length; | |
1562 | ||
9d98a694 | 1563 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1564 | |
1565 | /* insn_current_length returns 0 for insns with a | |
1566 | non-varying length. */ | |
1567 | if (! varying_length[inner_uid]) | |
1568 | inner_length = insn_lengths[inner_uid]; | |
1569 | else | |
1570 | inner_length = insn_current_length (inner_insn); | |
1571 | ||
1572 | if (inner_length != insn_lengths[inner_uid]) | |
1573 | { | |
1574 | insn_lengths[inner_uid] = inner_length; | |
1575 | something_changed = 1; | |
1576 | } | |
1577 | insn_current_address += insn_lengths[inner_uid]; | |
1578 | new_length += inner_length; | |
1579 | } | |
1580 | } | |
1581 | else | |
1582 | { | |
1583 | new_length = insn_current_length (insn); | |
1584 | insn_current_address += new_length; | |
1585 | } | |
1586 | ||
3cf2715d DE |
1587 | #ifdef ADJUST_INSN_LENGTH |
1588 | /* If needed, do any adjustment. */ | |
1589 | tmp_length = new_length; | |
1590 | ADJUST_INSN_LENGTH (insn, new_length); | |
1591 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1592 | #endif |
1593 | ||
1594 | if (new_length != insn_lengths[uid]) | |
1595 | { | |
1596 | insn_lengths[uid] = new_length; | |
1597 | something_changed = 1; | |
1598 | } | |
1599 | } | |
bb4aaf18 TG |
1600 | /* For a non-optimizing compile, do only a single pass. */ |
1601 | if (!optimize) | |
1602 | break; | |
3cf2715d | 1603 | } |
fc470718 R |
1604 | |
1605 | free (varying_length); | |
1606 | ||
3cf2715d DE |
1607 | #endif /* HAVE_ATTR_length */ |
1608 | } | |
1609 | ||
1610 | #ifdef HAVE_ATTR_length | |
1611 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1612 | the number of machine instructions likely to be generated for this insn. | |
1613 | This is used to compute its length. */ | |
1614 | ||
1615 | static int | |
1616 | asm_insn_count (body) | |
1617 | rtx body; | |
1618 | { | |
3cce094d | 1619 | const char *template; |
3cf2715d DE |
1620 | int count = 1; |
1621 | ||
5d0930ea DE |
1622 | if (GET_CODE (body) == ASM_INPUT) |
1623 | template = XSTR (body, 0); | |
1624 | else | |
df4ae160 | 1625 | template = decode_asm_operands (body, NULL, NULL, NULL, NULL); |
5d0930ea | 1626 | |
f5d927c0 KH |
1627 | for (; *template; template++) |
1628 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') | |
3cf2715d DE |
1629 | count++; |
1630 | ||
1631 | return count; | |
1632 | } | |
1633 | #endif | |
1634 | \f | |
1635 | /* Output assembler code for the start of a function, | |
1636 | and initialize some of the variables in this file | |
1637 | for the new function. The label for the function and associated | |
1638 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1639 | ||
1640 | FIRST is the first insn of the rtl for the function being compiled. | |
1641 | FILE is the file to write assembler code to. | |
1642 | OPTIMIZE is nonzero if we should eliminate redundant | |
1643 | test and compare insns. */ | |
1644 | ||
1645 | void | |
1646 | final_start_function (first, file, optimize) | |
1647 | rtx first; | |
1648 | FILE *file; | |
6a651371 | 1649 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d DE |
1650 | { |
1651 | block_depth = 0; | |
1652 | ||
1653 | this_is_asm_operands = 0; | |
1654 | ||
1655 | #ifdef NON_SAVING_SETJMP | |
1656 | /* A function that calls setjmp should save and restore all the | |
1657 | call-saved registers on a system where longjmp clobbers them. */ | |
1658 | if (NON_SAVING_SETJMP && current_function_calls_setjmp) | |
1659 | { | |
1660 | int i; | |
1661 | ||
1662 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
252f342a | 1663 | if (!call_used_regs[i]) |
3cf2715d DE |
1664 | regs_ever_live[i] = 1; |
1665 | } | |
1666 | #endif | |
f5d927c0 | 1667 | |
3cf2715d | 1668 | if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED) |
653e276c NB |
1669 | notice_source_line (first); |
1670 | high_block_linenum = high_function_linenum = last_linenum; | |
eac40081 | 1671 | |
653e276c | 1672 | (*debug_hooks->begin_prologue) (last_linenum, last_filename); |
d291dd49 | 1673 | |
653e276c NB |
1674 | #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO) |
1675 | if (write_symbols != DWARF2_DEBUG) | |
1676 | dwarf2out_begin_prologue (0, NULL); | |
f5d927c0 | 1677 | #endif |
3cf2715d DE |
1678 | |
1679 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1680 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1681 | leaf_renumber_regs (first); |
1682 | #endif | |
1683 | ||
1684 | /* The Sun386i and perhaps other machines don't work right | |
1685 | if the profiling code comes after the prologue. */ | |
1686 | #ifdef PROFILE_BEFORE_PROLOGUE | |
1687 | if (profile_flag) | |
1688 | profile_function (file); | |
1689 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1690 | ||
0021b564 JM |
1691 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1692 | if (dwarf2out_do_frame ()) | |
1693 | dwarf2out_frame_debug (NULL_RTX); | |
1694 | #endif | |
1695 | ||
18c038b9 MM |
1696 | /* If debugging, assign block numbers to all of the blocks in this |
1697 | function. */ | |
1698 | if (write_symbols) | |
1699 | { | |
3ac79482 | 1700 | remove_unnecessary_notes (); |
a20612aa RH |
1701 | reorder_blocks (); |
1702 | number_blocks (current_function_decl); | |
18c038b9 MM |
1703 | /* We never actually put out begin/end notes for the top-level |
1704 | block in the function. But, conceptually, that block is | |
1705 | always needed. */ | |
1706 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1707 | } | |
1708 | ||
3cf2715d | 1709 | /* First output the function prologue: code to set up the stack frame. */ |
f6897b10 | 1710 | (*targetm.asm_out.function_prologue) (file, get_frame_size ()); |
3cf2715d | 1711 | |
3cf2715d DE |
1712 | /* If the machine represents the prologue as RTL, the profiling code must |
1713 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1714 | #ifdef HAVE_prologue | |
1715 | if (! HAVE_prologue) | |
1716 | #endif | |
1717 | profile_after_prologue (file); | |
1718 | ||
1719 | profile_label_no++; | |
1720 | ||
1721 | /* If we are doing basic block profiling, remember a printable version | |
1722 | of the function name. */ | |
1723 | if (profile_block_flag) | |
1724 | { | |
f5d927c0 KH |
1725 | bb_func_label_num = |
1726 | add_bb_string ((*decl_printable_name) (current_function_decl, 2), | |
1727 | FALSE); | |
3cf2715d DE |
1728 | } |
1729 | } | |
1730 | ||
1731 | static void | |
1732 | profile_after_prologue (file) | |
7bdb32b9 | 1733 | FILE *file ATTRIBUTE_UNUSED; |
3cf2715d DE |
1734 | { |
1735 | #ifdef FUNCTION_BLOCK_PROFILER | |
1736 | if (profile_block_flag) | |
1737 | { | |
47431dff | 1738 | FUNCTION_BLOCK_PROFILER (file, count_basic_blocks); |
3cf2715d DE |
1739 | } |
1740 | #endif /* FUNCTION_BLOCK_PROFILER */ | |
1741 | ||
1742 | #ifndef PROFILE_BEFORE_PROLOGUE | |
1743 | if (profile_flag) | |
1744 | profile_function (file); | |
1745 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1746 | } | |
1747 | ||
1748 | static void | |
1749 | profile_function (file) | |
1750 | FILE *file; | |
1751 | { | |
dcacfa04 | 1752 | #ifndef NO_PROFILE_COUNTERS |
9e2f9a7f | 1753 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); |
dcacfa04 | 1754 | #endif |
b729186a JL |
1755 | #if defined(ASM_OUTPUT_REG_PUSH) |
1756 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM) | |
3cf2715d | 1757 | int sval = current_function_returns_struct; |
b729186a JL |
1758 | #endif |
1759 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) | |
3cf2715d | 1760 | int cxt = current_function_needs_context; |
b729186a JL |
1761 | #endif |
1762 | #endif /* ASM_OUTPUT_REG_PUSH */ | |
3cf2715d | 1763 | |
dcacfa04 | 1764 | #ifndef NO_PROFILE_COUNTERS |
3cf2715d DE |
1765 | data_section (); |
1766 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); | |
1767 | ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no); | |
c8af3574 | 1768 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
dcacfa04 | 1769 | #endif |
3cf2715d | 1770 | |
499df339 | 1771 | function_section (current_function_decl); |
3cf2715d | 1772 | |
65ed39df | 1773 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1774 | if (sval) |
1775 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1776 | #else | |
65ed39df | 1777 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1778 | if (sval) |
51723711 KG |
1779 | { |
1780 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM); | |
1781 | } | |
3cf2715d DE |
1782 | #endif |
1783 | #endif | |
1784 | ||
65ed39df | 1785 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1786 | if (cxt) |
1787 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1788 | #else | |
65ed39df | 1789 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1790 | if (cxt) |
51723711 KG |
1791 | { |
1792 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); | |
1793 | } | |
3cf2715d DE |
1794 | #endif |
1795 | #endif | |
3cf2715d DE |
1796 | |
1797 | FUNCTION_PROFILER (file, profile_label_no); | |
1798 | ||
65ed39df | 1799 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1800 | if (cxt) |
1801 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1802 | #else | |
65ed39df | 1803 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1804 | if (cxt) |
51723711 KG |
1805 | { |
1806 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); | |
1807 | } | |
3cf2715d DE |
1808 | #endif |
1809 | #endif | |
3cf2715d | 1810 | |
65ed39df | 1811 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1812 | if (sval) |
1813 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1814 | #else | |
65ed39df | 1815 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1816 | if (sval) |
51723711 KG |
1817 | { |
1818 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM); | |
1819 | } | |
3cf2715d DE |
1820 | #endif |
1821 | #endif | |
1822 | } | |
1823 | ||
1824 | /* Output assembler code for the end of a function. | |
1825 | For clarity, args are same as those of `final_start_function' | |
1826 | even though not all of them are needed. */ | |
1827 | ||
1828 | void | |
e2a12aca | 1829 | final_end_function () |
3cf2715d | 1830 | { |
be1bb652 | 1831 | app_disable (); |
3cf2715d | 1832 | |
e2a12aca | 1833 | (*debug_hooks->end_function) (high_function_linenum); |
3cf2715d | 1834 | |
3cf2715d DE |
1835 | /* Finally, output the function epilogue: |
1836 | code to restore the stack frame and return to the caller. */ | |
e2a12aca | 1837 | (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ()); |
3cf2715d | 1838 | |
e2a12aca NB |
1839 | /* And debug output. */ |
1840 | (*debug_hooks->end_epilogue) (); | |
3cf2715d | 1841 | |
e2a12aca NB |
1842 | #if defined (DWARF2_UNWIND_INFO) |
1843 | if (write_symbols != DWARF2_DEBUG && dwarf2out_do_frame ()) | |
9a666dda JM |
1844 | dwarf2out_end_epilogue (); |
1845 | #endif | |
1846 | ||
3cf2715d | 1847 | bb_func_label_num = -1; /* not in function, nuke label # */ |
3cf2715d DE |
1848 | } |
1849 | \f | |
1850 | /* Add a block to the linked list that remembers the current line/file/function | |
1851 | for basic block profiling. Emit the label in front of the basic block and | |
1852 | the instructions that increment the count field. */ | |
1853 | ||
1854 | static void | |
1855 | add_bb (file) | |
1856 | FILE *file; | |
1857 | { | |
f5d927c0 KH |
1858 | struct bb_list *ptr = |
1859 | (struct bb_list *) permalloc (sizeof (struct bb_list)); | |
3cf2715d DE |
1860 | |
1861 | /* Add basic block to linked list. */ | |
1862 | ptr->next = 0; | |
1863 | ptr->line_num = last_linenum; | |
1864 | ptr->file_label_num = bb_file_label_num; | |
1865 | ptr->func_label_num = bb_func_label_num; | |
1866 | *bb_tail = ptr; | |
1867 | bb_tail = &ptr->next; | |
1868 | ||
1869 | /* Enable the table of basic-block use counts | |
1870 | to point at the code it applies to. */ | |
1871 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks); | |
1872 | ||
1873 | /* Before first insn of this basic block, increment the | |
1874 | count of times it was entered. */ | |
1875 | #ifdef BLOCK_PROFILER | |
1876 | BLOCK_PROFILER (file, count_basic_blocks); | |
9e2f9a7f DE |
1877 | #endif |
1878 | #ifdef HAVE_cc0 | |
3cf2715d DE |
1879 | CC_STATUS_INIT; |
1880 | #endif | |
1881 | ||
1882 | new_block = 0; | |
1883 | count_basic_blocks++; | |
1884 | } | |
1885 | ||
1886 | /* Add a string to be used for basic block profiling. */ | |
1887 | ||
1888 | static int | |
1889 | add_bb_string (string, perm_p) | |
9b3142b3 | 1890 | const char *string; |
3cf2715d DE |
1891 | int perm_p; |
1892 | { | |
1893 | int len; | |
1894 | struct bb_str *ptr = 0; | |
1895 | ||
1896 | if (!string) | |
1897 | { | |
1898 | string = "<unknown>"; | |
1899 | perm_p = TRUE; | |
1900 | } | |
1901 | ||
1902 | /* Allocate a new string if the current string isn't permanent. If | |
1903 | the string is permanent search for the same string in other | |
1904 | allocations. */ | |
1905 | ||
1906 | len = strlen (string) + 1; | |
1907 | if (!perm_p) | |
1908 | { | |
1909 | char *p = (char *) permalloc (len); | |
4e135bdd | 1910 | memcpy (p, string, len); |
3cf2715d DE |
1911 | string = p; |
1912 | } | |
1913 | else | |
0f41302f | 1914 | for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next) |
3cf2715d DE |
1915 | if (ptr->string == string) |
1916 | break; | |
1917 | ||
1918 | /* Allocate a new string block if we need to. */ | |
1919 | if (!ptr) | |
1920 | { | |
1921 | ptr = (struct bb_str *) permalloc (sizeof (*ptr)); | |
1922 | ptr->next = 0; | |
1923 | ptr->length = len; | |
1924 | ptr->label_num = sbb_label_num++; | |
1925 | ptr->string = string; | |
1926 | *sbb_tail = ptr; | |
1927 | sbb_tail = &ptr->next; | |
1928 | } | |
1929 | ||
1930 | return ptr->label_num; | |
1931 | } | |
3cf2715d DE |
1932 | \f |
1933 | /* Output assembler code for some insns: all or part of a function. | |
1934 | For description of args, see `final_start_function', above. | |
1935 | ||
1936 | PRESCAN is 1 if we are not really outputting, | |
1937 | just scanning as if we were outputting. | |
1938 | Prescanning deletes and rearranges insns just like ordinary output. | |
1939 | PRESCAN is -2 if we are outputting after having prescanned. | |
1940 | In this case, don't try to delete or rearrange insns | |
1941 | because that has already been done. | |
1942 | Prescanning is done only on certain machines. */ | |
1943 | ||
1944 | void | |
1945 | final (first, file, optimize, prescan) | |
1946 | rtx first; | |
1947 | FILE *file; | |
1948 | int optimize; | |
1949 | int prescan; | |
1950 | { | |
1951 | register rtx insn; | |
1952 | int max_line = 0; | |
a8c3510c | 1953 | int max_uid = 0; |
3cf2715d DE |
1954 | |
1955 | last_ignored_compare = 0; | |
1956 | new_block = 1; | |
1957 | ||
1958 | /* Make a map indicating which line numbers appear in this function. | |
1959 | When producing SDB debugging info, delete troublesome line number | |
1960 | notes from inlined functions in other files as well as duplicate | |
1961 | line number notes. */ | |
1962 | #ifdef SDB_DEBUGGING_INFO | |
1963 | if (write_symbols == SDB_DEBUG) | |
1964 | { | |
1965 | rtx last = 0; | |
1966 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1967 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) | |
1968 | { | |
1969 | if ((RTX_INTEGRATED_P (insn) | |
1970 | && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0) | |
1971 | || (last != 0 | |
1972 | && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) | |
1973 | && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last))) | |
1974 | { | |
2e106602 | 1975 | delete_insn (insn); /* Use delete_note. */ |
3cf2715d DE |
1976 | continue; |
1977 | } | |
1978 | last = insn; | |
1979 | if (NOTE_LINE_NUMBER (insn) > max_line) | |
1980 | max_line = NOTE_LINE_NUMBER (insn); | |
1981 | } | |
1982 | } | |
1983 | else | |
1984 | #endif | |
1985 | { | |
1986 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1987 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line) | |
1988 | max_line = NOTE_LINE_NUMBER (insn); | |
1989 | } | |
1990 | ||
bedda2da | 1991 | line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char)); |
3cf2715d DE |
1992 | |
1993 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
a8c3510c AM |
1994 | { |
1995 | if (INSN_UID (insn) > max_uid) /* find largest UID */ | |
f5d927c0 | 1996 | max_uid = INSN_UID (insn); |
a8c3510c | 1997 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) |
f5d927c0 | 1998 | line_note_exists[NOTE_LINE_NUMBER (insn)] = 1; |
9ef4c6ef JC |
1999 | #ifdef HAVE_cc0 |
2000 | /* If CC tracking across branches is enabled, record the insn which | |
2001 | jumps to each branch only reached from one place. */ | |
7ad7f828 | 2002 | if (optimize && GET_CODE (insn) == JUMP_INSN) |
9ef4c6ef JC |
2003 | { |
2004 | rtx lab = JUMP_LABEL (insn); | |
2005 | if (lab && LABEL_NUSES (lab) == 1) | |
2006 | { | |
2007 | LABEL_REFS (lab) = insn; | |
2008 | } | |
2009 | } | |
2010 | #endif | |
a8c3510c AM |
2011 | } |
2012 | ||
3cf2715d DE |
2013 | init_recog (); |
2014 | ||
2015 | CC_STATUS_INIT; | |
2016 | ||
2017 | /* Output the insns. */ | |
2018 | for (insn = NEXT_INSN (first); insn;) | |
2f16edb1 TG |
2019 | { |
2020 | #ifdef HAVE_ATTR_length | |
b9f22704 | 2021 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 RH |
2022 | { |
2023 | #ifdef STACK_REGS | |
2024 | /* Irritatingly, the reg-stack pass is creating new instructions | |
2025 | and because of REG_DEAD note abuse it has to run after | |
2026 | shorten_branches. Fake address of -1 then. */ | |
2027 | insn_current_address = -1; | |
2028 | #else | |
2029 | /* This can be triggered by bugs elsewhere in the compiler if | |
2030 | new insns are created after init_insn_lengths is called. */ | |
2031 | abort (); | |
2f16edb1 | 2032 | #endif |
0ac76ad9 RH |
2033 | } |
2034 | else | |
9d98a694 | 2035 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
2036 | #endif /* HAVE_ATTR_length */ |
2037 | ||
2f16edb1 TG |
2038 | insn = final_scan_insn (insn, file, optimize, prescan, 0); |
2039 | } | |
3cf2715d DE |
2040 | |
2041 | /* Do basic-block profiling here | |
2042 | if the last insn was a conditional branch. */ | |
2043 | if (profile_block_flag && new_block) | |
2044 | add_bb (file); | |
a8c3510c | 2045 | |
bedda2da MM |
2046 | free (line_note_exists); |
2047 | line_note_exists = NULL; | |
3cf2715d DE |
2048 | } |
2049 | \f | |
4bbf910e RH |
2050 | const char * |
2051 | get_insn_template (code, insn) | |
2052 | int code; | |
2053 | rtx insn; | |
2054 | { | |
2055 | const void *output = insn_data[code].output; | |
2056 | switch (insn_data[code].output_format) | |
2057 | { | |
2058 | case INSN_OUTPUT_FORMAT_SINGLE: | |
2059 | return (const char *) output; | |
2060 | case INSN_OUTPUT_FORMAT_MULTI: | |
f5d927c0 | 2061 | return ((const char *const *) output)[which_alternative]; |
4bbf910e RH |
2062 | case INSN_OUTPUT_FORMAT_FUNCTION: |
2063 | if (insn == NULL) | |
2064 | abort (); | |
f5d927c0 | 2065 | return (*(insn_output_fn) output) (recog_data.operand, insn); |
4bbf910e RH |
2066 | |
2067 | default: | |
2068 | abort (); | |
2069 | } | |
2070 | } | |
f5d927c0 | 2071 | |
3cf2715d DE |
2072 | /* The final scan for one insn, INSN. |
2073 | Args are same as in `final', except that INSN | |
2074 | is the insn being scanned. | |
2075 | Value returned is the next insn to be scanned. | |
2076 | ||
2077 | NOPEEPHOLES is the flag to disallow peephole processing (currently | |
2078 | used for within delayed branch sequence output). */ | |
2079 | ||
2080 | rtx | |
2081 | final_scan_insn (insn, file, optimize, prescan, nopeepholes) | |
2082 | rtx insn; | |
2083 | FILE *file; | |
272df862 | 2084 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d | 2085 | int prescan; |
272df862 | 2086 | int nopeepholes ATTRIBUTE_UNUSED; |
3cf2715d | 2087 | { |
90ca38bb MM |
2088 | #ifdef HAVE_cc0 |
2089 | rtx set; | |
2090 | #endif | |
2091 | ||
3cf2715d DE |
2092 | insn_counter++; |
2093 | ||
2094 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2095 | template of "#") while not optimizing. */ | |
2096 | if (INSN_DELETED_P (insn)) | |
2097 | return NEXT_INSN (insn); | |
2098 | ||
2099 | switch (GET_CODE (insn)) | |
2100 | { | |
2101 | case NOTE: | |
2102 | if (prescan > 0) | |
2103 | break; | |
2104 | ||
be1bb652 RH |
2105 | switch (NOTE_LINE_NUMBER (insn)) |
2106 | { | |
2107 | case NOTE_INSN_DELETED: | |
2108 | case NOTE_INSN_LOOP_BEG: | |
2109 | case NOTE_INSN_LOOP_END: | |
2110 | case NOTE_INSN_LOOP_CONT: | |
2111 | case NOTE_INSN_LOOP_VTOP: | |
2112 | case NOTE_INSN_FUNCTION_END: | |
be1bb652 RH |
2113 | case NOTE_INSN_REPEATED_LINE_NUMBER: |
2114 | case NOTE_INSN_RANGE_BEG: | |
2115 | case NOTE_INSN_RANGE_END: | |
2116 | case NOTE_INSN_LIVE: | |
2117 | case NOTE_INSN_EXPECTED_VALUE: | |
2118 | break; | |
3cf2715d | 2119 | |
be1bb652 | 2120 | case NOTE_INSN_BASIC_BLOCK: |
ad0fc698 JW |
2121 | #ifdef IA64_UNWIND_INFO |
2122 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
2123 | #endif | |
be1bb652 RH |
2124 | if (flag_debug_asm) |
2125 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
2126 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); | |
2127 | break; | |
3cf2715d | 2128 | |
be1bb652 | 2129 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2130 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2131 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2132 | break; |
3d195391 | 2133 | |
be1bb652 | 2134 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2135 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2136 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2137 | break; |
3d195391 | 2138 | |
be1bb652 | 2139 | case NOTE_INSN_PROLOGUE_END: |
b9f22704 | 2140 | (*targetm.asm_out.function_end_prologue) (file); |
3cf2715d DE |
2141 | profile_after_prologue (file); |
2142 | break; | |
3cf2715d | 2143 | |
be1bb652 | 2144 | case NOTE_INSN_EPILOGUE_BEG: |
b9f22704 | 2145 | (*targetm.asm_out.function_begin_epilogue) (file); |
be1bb652 | 2146 | break; |
3cf2715d | 2147 | |
be1bb652 | 2148 | case NOTE_INSN_FUNCTION_BEG: |
653e276c NB |
2149 | app_disable (); |
2150 | (*debug_hooks->end_prologue) (last_linenum); | |
3cf2715d | 2151 | break; |
be1bb652 RH |
2152 | |
2153 | case NOTE_INSN_BLOCK_BEG: | |
2154 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2155 | || debug_info_level == DINFO_LEVEL_VERBOSE |
3cf2715d | 2156 | || write_symbols == DWARF_DEBUG |
be1bb652 RH |
2157 | || write_symbols == DWARF2_DEBUG) |
2158 | { | |
2159 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2160 | |
be1bb652 RH |
2161 | app_disable (); |
2162 | ++block_depth; | |
2163 | high_block_linenum = last_linenum; | |
eac40081 | 2164 | |
a5a42b92 | 2165 | /* Output debugging info about the symbol-block beginning. */ |
e2a12aca | 2166 | (*debug_hooks->begin_block) (last_linenum, n); |
3cf2715d | 2167 | |
be1bb652 RH |
2168 | /* Mark this block as output. */ |
2169 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
2170 | } | |
2171 | break; | |
18c038b9 | 2172 | |
be1bb652 RH |
2173 | case NOTE_INSN_BLOCK_END: |
2174 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2175 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
2176 | || write_symbols == DWARF_DEBUG | |
2177 | || write_symbols == DWARF2_DEBUG) | |
2178 | { | |
2179 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2180 | |
be1bb652 RH |
2181 | app_disable (); |
2182 | ||
2183 | /* End of a symbol-block. */ | |
2184 | --block_depth; | |
2185 | if (block_depth < 0) | |
2186 | abort (); | |
3cf2715d | 2187 | |
e2a12aca | 2188 | (*debug_hooks->end_block) (high_block_linenum, n); |
be1bb652 RH |
2189 | } |
2190 | break; | |
2191 | ||
2192 | case NOTE_INSN_DELETED_LABEL: | |
2193 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2194 | the label could be proved to be unreachable, though still | |
2195 | referenced (in the form of having its address taken. */ | |
8215347e | 2196 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2197 | break; |
3cf2715d | 2198 | |
21835d9b JJ |
2199 | case 0: |
2200 | break; | |
2201 | ||
be1bb652 RH |
2202 | default: |
2203 | if (NOTE_LINE_NUMBER (insn) <= 0) | |
2204 | abort (); | |
3cf2715d | 2205 | |
be1bb652 RH |
2206 | /* This note is a line-number. */ |
2207 | { | |
2208 | register rtx note; | |
2209 | int note_after = 0; | |
2210 | ||
f5d927c0 | 2211 | /* If there is anything real after this note, output it. |
be1bb652 RH |
2212 | If another line note follows, omit this one. */ |
2213 | for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note)) | |
2214 | { | |
2215 | if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL) | |
3cf2715d | 2216 | break; |
3cf2715d | 2217 | |
be1bb652 RH |
2218 | /* These types of notes can be significant |
2219 | so make sure the preceding line number stays. */ | |
2220 | else if (GET_CODE (note) == NOTE | |
2221 | && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG | |
2222 | || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END | |
2223 | || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG)) | |
2224 | break; | |
2225 | else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0) | |
2226 | { | |
2227 | /* Another line note follows; we can delete this note | |
2228 | if no intervening line numbers have notes elsewhere. */ | |
2229 | int num; | |
2230 | for (num = NOTE_LINE_NUMBER (insn) + 1; | |
2231 | num < NOTE_LINE_NUMBER (note); | |
2232 | num++) | |
2233 | if (line_note_exists[num]) | |
2234 | break; | |
2235 | ||
2236 | if (num >= NOTE_LINE_NUMBER (note)) | |
2237 | note_after = 1; | |
2238 | break; | |
2239 | } | |
2240 | } | |
2241 | ||
2242 | /* Output this line note if it is the first or the last line | |
2243 | note in a row. */ | |
2244 | if (!note_after) | |
653e276c NB |
2245 | { |
2246 | notice_source_line (insn); | |
2247 | (*debug_hooks->source_line) (last_linenum, last_filename); | |
2248 | } | |
be1bb652 | 2249 | } |
f5d927c0 | 2250 | break; |
3cf2715d DE |
2251 | } |
2252 | break; | |
2253 | ||
2254 | case BARRIER: | |
f73ad30e | 2255 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2256 | if (dwarf2out_do_frame ()) |
be1bb652 | 2257 | dwarf2out_frame_debug (insn); |
3cf2715d DE |
2258 | #endif |
2259 | break; | |
2260 | ||
2261 | case CODE_LABEL: | |
1dd8faa8 R |
2262 | /* The target port might emit labels in the output function for |
2263 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2264 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2265 | { | |
2266 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2267 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2268 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2269 | #endif |
fc470718 | 2270 | |
1dd8faa8 | 2271 | if (align && NEXT_INSN (insn)) |
9e423e6d JW |
2272 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
2273 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); | |
2274 | #else | |
de7987a6 | 2275 | ASM_OUTPUT_ALIGN (file, align); |
9e423e6d | 2276 | #endif |
de7987a6 | 2277 | } |
9ef4c6ef | 2278 | #ifdef HAVE_cc0 |
3cf2715d | 2279 | CC_STATUS_INIT; |
9ef4c6ef JC |
2280 | /* If this label is reached from only one place, set the condition |
2281 | codes from the instruction just before the branch. */ | |
7ad7f828 JC |
2282 | |
2283 | /* Disabled because some insns set cc_status in the C output code | |
2284 | and NOTICE_UPDATE_CC alone can set incorrect status. */ | |
2285 | if (0 /* optimize && LABEL_NUSES (insn) == 1*/) | |
9ef4c6ef JC |
2286 | { |
2287 | rtx jump = LABEL_REFS (insn); | |
2288 | rtx barrier = prev_nonnote_insn (insn); | |
2289 | rtx prev; | |
2290 | /* If the LABEL_REFS field of this label has been set to point | |
2291 | at a branch, the predecessor of the branch is a regular | |
2292 | insn, and that branch is the only way to reach this label, | |
2293 | set the condition codes based on the branch and its | |
2294 | predecessor. */ | |
2295 | if (barrier && GET_CODE (barrier) == BARRIER | |
2296 | && jump && GET_CODE (jump) == JUMP_INSN | |
2297 | && (prev = prev_nonnote_insn (jump)) | |
2298 | && GET_CODE (prev) == INSN) | |
2299 | { | |
2300 | NOTICE_UPDATE_CC (PATTERN (prev), prev); | |
2301 | NOTICE_UPDATE_CC (PATTERN (jump), jump); | |
2302 | } | |
2303 | } | |
2304 | #endif | |
3cf2715d DE |
2305 | if (prescan > 0) |
2306 | break; | |
2307 | new_block = 1; | |
03ffa171 RK |
2308 | |
2309 | #ifdef FINAL_PRESCAN_LABEL | |
df4ae160 | 2310 | FINAL_PRESCAN_INSN (insn, NULL, 0); |
03ffa171 RK |
2311 | #endif |
2312 | ||
e1772ac0 NB |
2313 | if (LABEL_NAME (insn)) |
2314 | (*debug_hooks->label) (insn); | |
2315 | ||
3cf2715d DE |
2316 | if (app_on) |
2317 | { | |
51723711 | 2318 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2319 | app_on = 0; |
2320 | } | |
2321 | if (NEXT_INSN (insn) != 0 | |
2322 | && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN) | |
2323 | { | |
2324 | rtx nextbody = PATTERN (NEXT_INSN (insn)); | |
2325 | ||
2326 | /* If this label is followed by a jump-table, | |
2327 | make sure we put the label in the read-only section. Also | |
2328 | possibly write the label and jump table together. */ | |
2329 | ||
2330 | if (GET_CODE (nextbody) == ADDR_VEC | |
2331 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
2332 | { | |
e0d80184 DM |
2333 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2334 | /* In this case, the case vector is being moved by the | |
2335 | target, so don't output the label at all. Leave that | |
2336 | to the back end macros. */ | |
2337 | #else | |
75197b37 BS |
2338 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2339 | { | |
340f7e7c RH |
2340 | int log_align; |
2341 | ||
75197b37 | 2342 | readonly_data_section (); |
340f7e7c RH |
2343 | |
2344 | #ifdef ADDR_VEC_ALIGN | |
3e4eece3 | 2345 | log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn)); |
340f7e7c RH |
2346 | #else |
2347 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
2348 | #endif | |
2349 | ASM_OUTPUT_ALIGN (file, log_align); | |
75197b37 BS |
2350 | } |
2351 | else | |
2352 | function_section (current_function_decl); | |
2353 | ||
3cf2715d DE |
2354 | #ifdef ASM_OUTPUT_CASE_LABEL |
2355 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), | |
2356 | NEXT_INSN (insn)); | |
2357 | #else | |
f5d927c0 KH |
2358 | if (LABEL_ALTERNATE_NAME (insn)) |
2359 | ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn); | |
2360 | else | |
2361 | ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); | |
e0d80184 | 2362 | #endif |
3cf2715d DE |
2363 | #endif |
2364 | break; | |
2365 | } | |
2366 | } | |
8cd0faaf | 2367 | if (LABEL_ALTERNATE_NAME (insn)) |
f5d927c0 | 2368 | ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn); |
8cd0faaf | 2369 | else |
f5d927c0 | 2370 | ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2371 | break; |
2372 | ||
2373 | default: | |
2374 | { | |
51723711 | 2375 | register rtx body = PATTERN (insn); |
3cf2715d | 2376 | int insn_code_number; |
9b3142b3 | 2377 | const char *template; |
b729186a | 2378 | #ifdef HAVE_cc0 |
3cf2715d | 2379 | rtx note; |
b729186a | 2380 | #endif |
3cf2715d DE |
2381 | |
2382 | /* An INSN, JUMP_INSN or CALL_INSN. | |
2383 | First check for special kinds that recog doesn't recognize. */ | |
2384 | ||
2385 | if (GET_CODE (body) == USE /* These are just declarations */ | |
2386 | || GET_CODE (body) == CLOBBER) | |
2387 | break; | |
2388 | ||
2389 | #ifdef HAVE_cc0 | |
2390 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2391 | the setting of the condition code was done in the delay slot | |
2392 | of the insn that branched here. So recover the cc status | |
2393 | from the insn that set it. */ | |
2394 | ||
2395 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
2396 | if (note) | |
2397 | { | |
2398 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2399 | cc_prev_status = cc_status; | |
2400 | } | |
2401 | #endif | |
2402 | ||
2403 | /* Detect insns that are really jump-tables | |
2404 | and output them as such. */ | |
2405 | ||
2406 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2407 | { | |
7f7f8214 | 2408 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
3cf2715d | 2409 | register int vlen, idx; |
7f7f8214 | 2410 | #endif |
3cf2715d DE |
2411 | |
2412 | if (prescan > 0) | |
2413 | break; | |
2414 | ||
2415 | if (app_on) | |
2416 | { | |
51723711 | 2417 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2418 | app_on = 0; |
2419 | } | |
2420 | ||
e0d80184 DM |
2421 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2422 | if (GET_CODE (body) == ADDR_VEC) | |
2423 | { | |
2424 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2425 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2426 | #else | |
f5d927c0 | 2427 | abort (); |
e0d80184 DM |
2428 | #endif |
2429 | } | |
2430 | else | |
2431 | { | |
2432 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2433 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2434 | #else | |
f5d927c0 | 2435 | abort (); |
e0d80184 DM |
2436 | #endif |
2437 | } | |
2438 | #else | |
3cf2715d DE |
2439 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2440 | for (idx = 0; idx < vlen; idx++) | |
2441 | { | |
2442 | if (GET_CODE (body) == ADDR_VEC) | |
2443 | { | |
2444 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2445 | ASM_OUTPUT_ADDR_VEC_ELT | |
2446 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2447 | #else | |
2448 | abort (); | |
2449 | #endif | |
2450 | } | |
2451 | else | |
2452 | { | |
2453 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2454 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2455 | (file, | |
33f7f353 | 2456 | body, |
3cf2715d DE |
2457 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2458 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2459 | #else | |
2460 | abort (); | |
2461 | #endif | |
2462 | } | |
2463 | } | |
2464 | #ifdef ASM_OUTPUT_CASE_END | |
2465 | ASM_OUTPUT_CASE_END (file, | |
2466 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2467 | insn); | |
e0d80184 | 2468 | #endif |
3cf2715d DE |
2469 | #endif |
2470 | ||
4d1065ed | 2471 | function_section (current_function_decl); |
3cf2715d DE |
2472 | |
2473 | break; | |
2474 | } | |
2475 | ||
2476 | /* Do basic-block profiling when we reach a new block. | |
2477 | Done here to avoid jump tables. */ | |
2478 | if (profile_block_flag && new_block) | |
2479 | add_bb (file); | |
2480 | ||
2481 | if (GET_CODE (body) == ASM_INPUT) | |
2482 | { | |
36d7136e RH |
2483 | const char *string = XSTR (body, 0); |
2484 | ||
3cf2715d DE |
2485 | /* There's no telling what that did to the condition codes. */ |
2486 | CC_STATUS_INIT; | |
2487 | if (prescan > 0) | |
2488 | break; | |
36d7136e RH |
2489 | |
2490 | if (string[0]) | |
3cf2715d | 2491 | { |
36d7136e RH |
2492 | if (! app_on) |
2493 | { | |
2494 | fputs (ASM_APP_ON, file); | |
2495 | app_on = 1; | |
2496 | } | |
2497 | fprintf (asm_out_file, "\t%s\n", string); | |
3cf2715d | 2498 | } |
3cf2715d DE |
2499 | break; |
2500 | } | |
2501 | ||
2502 | /* Detect `asm' construct with operands. */ | |
2503 | if (asm_noperands (body) >= 0) | |
2504 | { | |
22bf4422 | 2505 | unsigned int noperands = asm_noperands (body); |
3cf2715d | 2506 | rtx *ops = (rtx *) alloca (noperands * sizeof (rtx)); |
3cce094d | 2507 | const char *string; |
3cf2715d DE |
2508 | |
2509 | /* There's no telling what that did to the condition codes. */ | |
2510 | CC_STATUS_INIT; | |
2511 | if (prescan > 0) | |
2512 | break; | |
2513 | ||
3cf2715d | 2514 | /* Get out the operand values. */ |
df4ae160 | 2515 | string = decode_asm_operands (body, ops, NULL, NULL, NULL); |
3cf2715d DE |
2516 | /* Inhibit aborts on what would otherwise be compiler bugs. */ |
2517 | insn_noperands = noperands; | |
2518 | this_is_asm_operands = insn; | |
2519 | ||
2520 | /* Output the insn using them. */ | |
36d7136e RH |
2521 | if (string[0]) |
2522 | { | |
2523 | if (! app_on) | |
2524 | { | |
2525 | fputs (ASM_APP_ON, file); | |
2526 | app_on = 1; | |
2527 | } | |
2528 | output_asm_insn (string, ops); | |
2529 | } | |
2530 | ||
3cf2715d DE |
2531 | this_is_asm_operands = 0; |
2532 | break; | |
2533 | } | |
2534 | ||
2535 | if (prescan <= 0 && app_on) | |
2536 | { | |
51723711 | 2537 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2538 | app_on = 0; |
2539 | } | |
2540 | ||
2541 | if (GET_CODE (body) == SEQUENCE) | |
2542 | { | |
2543 | /* A delayed-branch sequence */ | |
2544 | register int i; | |
2545 | rtx next; | |
2546 | ||
2547 | if (prescan > 0) | |
2548 | break; | |
2549 | final_sequence = body; | |
2550 | ||
2551 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2552 | force the restoration of a comparison that was previously | |
2553 | thought unnecessary. If that happens, cancel this sequence | |
2554 | and cause that insn to be restored. */ | |
2555 | ||
2556 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1); | |
2557 | if (next != XVECEXP (body, 0, 1)) | |
2558 | { | |
2559 | final_sequence = 0; | |
2560 | return next; | |
2561 | } | |
2562 | ||
2563 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2564 | { |
2565 | rtx insn = XVECEXP (body, 0, i); | |
2566 | rtx next = NEXT_INSN (insn); | |
2567 | /* We loop in case any instruction in a delay slot gets | |
2568 | split. */ | |
2569 | do | |
2570 | insn = final_scan_insn (insn, file, 0, prescan, 1); | |
2571 | while (insn != next); | |
2572 | } | |
3cf2715d DE |
2573 | #ifdef DBR_OUTPUT_SEQEND |
2574 | DBR_OUTPUT_SEQEND (file); | |
2575 | #endif | |
2576 | final_sequence = 0; | |
2577 | ||
2578 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2579 | insns in the delay slot are actually executed before the | |
2580 | called function. Hence we don't preserve any CC-setting | |
2581 | actions in these insns and the CC must be marked as being | |
2582 | clobbered by the function. */ | |
2583 | if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN) | |
b729186a JL |
2584 | { |
2585 | CC_STATUS_INIT; | |
2586 | } | |
3cf2715d DE |
2587 | |
2588 | /* Following a conditional branch sequence, we have a new basic | |
2589 | block. */ | |
2590 | if (profile_block_flag) | |
2591 | { | |
2592 | rtx insn = XVECEXP (body, 0, 0); | |
2593 | rtx body = PATTERN (insn); | |
2594 | ||
2595 | if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET | |
2596 | && GET_CODE (SET_SRC (body)) != LABEL_REF) | |
2597 | || (GET_CODE (insn) == JUMP_INSN | |
2598 | && GET_CODE (body) == PARALLEL | |
2599 | && GET_CODE (XVECEXP (body, 0, 0)) == SET | |
2600 | && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)) | |
2601 | new_block = 1; | |
2602 | } | |
2603 | break; | |
2604 | } | |
2605 | ||
2606 | /* We have a real machine instruction as rtl. */ | |
2607 | ||
2608 | body = PATTERN (insn); | |
2609 | ||
2610 | #ifdef HAVE_cc0 | |
f5d927c0 | 2611 | set = single_set (insn); |
b88c92cc | 2612 | |
3cf2715d DE |
2613 | /* Check for redundant test and compare instructions |
2614 | (when the condition codes are already set up as desired). | |
2615 | This is done only when optimizing; if not optimizing, | |
2616 | it should be possible for the user to alter a variable | |
2617 | with the debugger in between statements | |
2618 | and the next statement should reexamine the variable | |
2619 | to compute the condition codes. */ | |
2620 | ||
30f5e9f5 | 2621 | if (optimize) |
3cf2715d | 2622 | { |
b88c92cc | 2623 | #if 0 |
f5d927c0 | 2624 | rtx set = single_set (insn); |
b88c92cc | 2625 | #endif |
30f5e9f5 RK |
2626 | |
2627 | if (set | |
2628 | && GET_CODE (SET_DEST (set)) == CC0 | |
2629 | && insn != last_ignored_compare) | |
3cf2715d | 2630 | { |
30f5e9f5 RK |
2631 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
2632 | SET_SRC (set) = alter_subreg (SET_SRC (set)); | |
2633 | else if (GET_CODE (SET_SRC (set)) == COMPARE) | |
2634 | { | |
2635 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2636 | XEXP (SET_SRC (set), 0) | |
2637 | = alter_subreg (XEXP (SET_SRC (set), 0)); | |
2638 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) | |
2639 | XEXP (SET_SRC (set), 1) | |
2640 | = alter_subreg (XEXP (SET_SRC (set), 1)); | |
2641 | } | |
2642 | if ((cc_status.value1 != 0 | |
2643 | && rtx_equal_p (SET_SRC (set), cc_status.value1)) | |
2644 | || (cc_status.value2 != 0 | |
2645 | && rtx_equal_p (SET_SRC (set), cc_status.value2))) | |
3cf2715d | 2646 | { |
30f5e9f5 RK |
2647 | /* Don't delete insn if it has an addressing side-effect. */ |
2648 | if (! FIND_REG_INC_NOTE (insn, 0) | |
2649 | /* or if anything in it is volatile. */ | |
2650 | && ! volatile_refs_p (PATTERN (insn))) | |
2651 | { | |
2652 | /* We don't really delete the insn; just ignore it. */ | |
2653 | last_ignored_compare = insn; | |
2654 | break; | |
2655 | } | |
3cf2715d DE |
2656 | } |
2657 | } | |
2658 | } | |
2659 | #endif | |
2660 | ||
2661 | /* Following a conditional branch, we have a new basic block. | |
2662 | But if we are inside a sequence, the new block starts after the | |
2663 | last insn of the sequence. */ | |
2664 | if (profile_block_flag && final_sequence == 0 | |
2665 | && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET | |
2666 | && GET_CODE (SET_SRC (body)) != LABEL_REF) | |
2667 | || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL | |
2668 | && GET_CODE (XVECEXP (body, 0, 0)) == SET | |
2669 | && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))) | |
2670 | new_block = 1; | |
2671 | ||
2672 | #ifndef STACK_REGS | |
2673 | /* Don't bother outputting obvious no-ops, even without -O. | |
2674 | This optimization is fast and doesn't interfere with debugging. | |
2675 | Don't do this if the insn is in a delay slot, since this | |
2676 | will cause an improper number of delay insns to be written. */ | |
2677 | if (final_sequence == 0 | |
2678 | && prescan >= 0 | |
2679 | && GET_CODE (insn) == INSN && GET_CODE (body) == SET | |
2680 | && GET_CODE (SET_SRC (body)) == REG | |
2681 | && GET_CODE (SET_DEST (body)) == REG | |
2682 | && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body))) | |
2683 | break; | |
2684 | #endif | |
2685 | ||
2686 | #ifdef HAVE_cc0 | |
2687 | /* If this is a conditional branch, maybe modify it | |
2688 | if the cc's are in a nonstandard state | |
2689 | so that it accomplishes the same thing that it would | |
2690 | do straightforwardly if the cc's were set up normally. */ | |
2691 | ||
2692 | if (cc_status.flags != 0 | |
2693 | && GET_CODE (insn) == JUMP_INSN | |
2694 | && GET_CODE (body) == SET | |
2695 | && SET_DEST (body) == pc_rtx | |
2696 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
de2b56f9 | 2697 | && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<' |
fff752ad | 2698 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx |
3cf2715d DE |
2699 | /* This is done during prescan; it is not done again |
2700 | in final scan when prescan has been done. */ | |
2701 | && prescan >= 0) | |
2702 | { | |
2703 | /* This function may alter the contents of its argument | |
2704 | and clear some of the cc_status.flags bits. | |
2705 | It may also return 1 meaning condition now always true | |
2706 | or -1 meaning condition now always false | |
2707 | or 2 meaning condition nontrivial but altered. */ | |
2708 | register int result = alter_cond (XEXP (SET_SRC (body), 0)); | |
2709 | /* If condition now has fixed value, replace the IF_THEN_ELSE | |
2710 | with its then-operand or its else-operand. */ | |
2711 | if (result == 1) | |
2712 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2713 | if (result == -1) | |
2714 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2715 | ||
2716 | /* The jump is now either unconditional or a no-op. | |
2717 | If it has become a no-op, don't try to output it. | |
2718 | (It would not be recognized.) */ | |
2719 | if (SET_SRC (body) == pc_rtx) | |
2720 | { | |
ca6c03ca | 2721 | delete_insn (insn); |
3cf2715d DE |
2722 | break; |
2723 | } | |
2724 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2725 | /* Replace (set (pc) (return)) with (return). */ | |
2726 | PATTERN (insn) = body = SET_SRC (body); | |
2727 | ||
2728 | /* Rerecognize the instruction if it has changed. */ | |
2729 | if (result != 0) | |
2730 | INSN_CODE (insn) = -1; | |
2731 | } | |
2732 | ||
2733 | /* Make same adjustments to instructions that examine the | |
462da2af SC |
2734 | condition codes without jumping and instructions that |
2735 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2736 | |
2737 | if (cc_status.flags != 0 | |
b88c92cc | 2738 | && set != 0) |
3cf2715d | 2739 | { |
462da2af | 2740 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2741 | |
462da2af | 2742 | if (GET_CODE (insn) != JUMP_INSN |
b88c92cc | 2743 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2744 | { |
b88c92cc RK |
2745 | cond_rtx = XEXP (SET_SRC (set), 0); |
2746 | then_rtx = XEXP (SET_SRC (set), 1); | |
2747 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2748 | } |
2749 | else | |
2750 | { | |
b88c92cc | 2751 | cond_rtx = SET_SRC (set); |
462da2af SC |
2752 | then_rtx = const_true_rtx; |
2753 | else_rtx = const0_rtx; | |
2754 | } | |
f5d927c0 | 2755 | |
462da2af | 2756 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2757 | { |
2758 | case GTU: | |
2759 | case GT: | |
2760 | case LTU: | |
2761 | case LT: | |
2762 | case GEU: | |
2763 | case GE: | |
2764 | case LEU: | |
2765 | case LE: | |
2766 | case EQ: | |
2767 | case NE: | |
2768 | { | |
2769 | register int result; | |
462da2af | 2770 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2771 | break; |
462da2af | 2772 | result = alter_cond (cond_rtx); |
3cf2715d | 2773 | if (result == 1) |
b88c92cc | 2774 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2775 | else if (result == -1) |
b88c92cc | 2776 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2777 | else if (result == 2) |
2778 | INSN_CODE (insn) = -1; | |
b88c92cc | 2779 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2780 | delete_insn (insn); |
3cf2715d | 2781 | } |
e9a25f70 JL |
2782 | break; |
2783 | ||
2784 | default: | |
2785 | break; | |
3cf2715d DE |
2786 | } |
2787 | } | |
462da2af | 2788 | |
3cf2715d DE |
2789 | #endif |
2790 | ||
ede7cd44 | 2791 | #ifdef HAVE_peephole |
3cf2715d DE |
2792 | /* Do machine-specific peephole optimizations if desired. */ |
2793 | ||
2794 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2795 | { | |
2796 | rtx next = peephole (insn); | |
2797 | /* When peepholing, if there were notes within the peephole, | |
2798 | emit them before the peephole. */ | |
2799 | if (next != 0 && next != NEXT_INSN (insn)) | |
2800 | { | |
2801 | rtx prev = PREV_INSN (insn); | |
2802 | rtx note; | |
2803 | ||
2804 | for (note = NEXT_INSN (insn); note != next; | |
2805 | note = NEXT_INSN (note)) | |
2806 | final_scan_insn (note, file, optimize, prescan, nopeepholes); | |
2807 | ||
2808 | /* In case this is prescan, put the notes | |
2809 | in proper position for later rescan. */ | |
2810 | note = NEXT_INSN (insn); | |
2811 | PREV_INSN (note) = prev; | |
2812 | NEXT_INSN (prev) = note; | |
2813 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2814 | PREV_INSN (insn) = PREV_INSN (next); | |
2815 | NEXT_INSN (insn) = next; | |
2816 | PREV_INSN (next) = insn; | |
2817 | } | |
2818 | ||
2819 | /* PEEPHOLE might have changed this. */ | |
2820 | body = PATTERN (insn); | |
2821 | } | |
ede7cd44 | 2822 | #endif |
3cf2715d DE |
2823 | |
2824 | /* Try to recognize the instruction. | |
2825 | If successful, verify that the operands satisfy the | |
2826 | constraints for the instruction. Crash if they don't, | |
2827 | since `reload' should have changed them so that they do. */ | |
2828 | ||
2829 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2830 | cleanup_subreg_operands (insn); |
3cf2715d | 2831 | |
c349e40b SC |
2832 | /* Dump the insn in the assembly for debugging. */ |
2833 | if (flag_dump_rtl_in_asm) | |
2834 | { | |
2835 | print_rtx_head = ASM_COMMENT_START; | |
2836 | print_rtl_single (asm_out_file, insn); | |
2837 | print_rtx_head = ""; | |
2838 | } | |
b9f22704 | 2839 | |
6c698a6d | 2840 | if (! constrain_operands_cached (1)) |
3cf2715d | 2841 | fatal_insn_not_found (insn); |
3cf2715d DE |
2842 | |
2843 | /* Some target machines need to prescan each insn before | |
2844 | it is output. */ | |
2845 | ||
2846 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2847 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2848 | #endif |
2849 | ||
afe48e06 RH |
2850 | #ifdef HAVE_conditional_execution |
2851 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
2852 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); | |
2853 | else | |
2854 | current_insn_predicate = NULL_RTX; | |
2855 | #endif | |
2856 | ||
3cf2715d DE |
2857 | #ifdef HAVE_cc0 |
2858 | cc_prev_status = cc_status; | |
2859 | ||
2860 | /* Update `cc_status' for this instruction. | |
2861 | The instruction's output routine may change it further. | |
2862 | If the output routine for a jump insn needs to depend | |
2863 | on the cc status, it should look at cc_prev_status. */ | |
2864 | ||
2865 | NOTICE_UPDATE_CC (body, insn); | |
2866 | #endif | |
2867 | ||
b1a9f6a0 | 2868 | current_output_insn = debug_insn = insn; |
3cf2715d | 2869 | |
f73ad30e | 2870 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2871 | if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ()) |
b57d9225 JM |
2872 | dwarf2out_frame_debug (insn); |
2873 | #endif | |
2874 | ||
4bbf910e RH |
2875 | /* Find the proper template for this insn. */ |
2876 | template = get_insn_template (insn_code_number, insn); | |
3cf2715d | 2877 | |
4bbf910e RH |
2878 | /* If the C code returns 0, it means that it is a jump insn |
2879 | which follows a deleted test insn, and that test insn | |
2880 | needs to be reinserted. */ | |
3cf2715d DE |
2881 | if (template == 0) |
2882 | { | |
efd0378b HPN |
2883 | rtx prev; |
2884 | ||
4bbf910e RH |
2885 | if (prev_nonnote_insn (insn) != last_ignored_compare) |
2886 | abort (); | |
2887 | new_block = 0; | |
efd0378b HPN |
2888 | |
2889 | /* We have already processed the notes between the setter and | |
2890 | the user. Make sure we don't process them again, this is | |
2891 | particularly important if one of the notes is a block | |
2892 | scope note or an EH note. */ | |
2893 | for (prev = insn; | |
2894 | prev != last_ignored_compare; | |
2895 | prev = PREV_INSN (prev)) | |
2896 | { | |
2897 | if (GET_CODE (prev) == NOTE) | |
ca6c03ca | 2898 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2899 | } |
2900 | ||
2901 | return prev; | |
3cf2715d DE |
2902 | } |
2903 | ||
2904 | /* If the template is the string "#", it means that this insn must | |
2905 | be split. */ | |
2906 | if (template[0] == '#' && template[1] == '\0') | |
2907 | { | |
2908 | rtx new = try_split (body, insn, 0); | |
2909 | ||
2910 | /* If we didn't split the insn, go away. */ | |
2911 | if (new == insn && PATTERN (new) == body) | |
cf879efa | 2912 | fatal_insn ("Could not split insn", insn); |
f5d927c0 | 2913 | |
3d14e82f JW |
2914 | #ifdef HAVE_ATTR_length |
2915 | /* This instruction should have been split in shorten_branches, | |
2916 | to ensure that we would have valid length info for the | |
2917 | splitees. */ | |
2918 | abort (); | |
2919 | #endif | |
2920 | ||
3cf2715d DE |
2921 | new_block = 0; |
2922 | return new; | |
2923 | } | |
f5d927c0 | 2924 | |
3cf2715d DE |
2925 | if (prescan > 0) |
2926 | break; | |
2927 | ||
ce152ef8 AM |
2928 | #ifdef IA64_UNWIND_INFO |
2929 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
2930 | #endif | |
3cf2715d DE |
2931 | /* Output assembler code from the template. */ |
2932 | ||
1ccbefce | 2933 | output_asm_insn (template, recog_data.operand); |
3cf2715d | 2934 | |
0021b564 | 2935 | #if defined (DWARF2_UNWIND_INFO) |
0021b564 | 2936 | #if defined (HAVE_prologue) |
fbfa55b0 RH |
2937 | if (GET_CODE (insn) == INSN && dwarf2out_do_frame ()) |
2938 | dwarf2out_frame_debug (insn); | |
2939 | #else | |
2940 | if (!ACCUMULATE_OUTGOING_ARGS | |
2941 | && GET_CODE (insn) == INSN | |
2942 | && dwarf2out_do_frame ()) | |
2943 | dwarf2out_frame_debug (insn); | |
0021b564 JM |
2944 | #endif |
2945 | #endif | |
469ac993 | 2946 | |
3cf2715d DE |
2947 | #if 0 |
2948 | /* It's not at all clear why we did this and doing so interferes | |
2949 | with tests we'd like to do to use REG_WAS_0 notes, so let's try | |
2950 | with this out. */ | |
2951 | ||
2952 | /* Mark this insn as having been output. */ | |
2953 | INSN_DELETED_P (insn) = 1; | |
2954 | #endif | |
2955 | ||
b1a9f6a0 | 2956 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2957 | } |
2958 | } | |
2959 | return NEXT_INSN (insn); | |
2960 | } | |
2961 | \f | |
2962 | /* Output debugging info to the assembler file FILE | |
2963 | based on the NOTE-insn INSN, assumed to be a line number. */ | |
2964 | ||
2965 | static void | |
653e276c | 2966 | notice_source_line (insn) |
3cf2715d DE |
2967 | rtx insn; |
2968 | { | |
3cce094d | 2969 | register const char *filename = NOTE_SOURCE_FILE (insn); |
3cf2715d DE |
2970 | |
2971 | /* Remember filename for basic block profiling. | |
2972 | Filenames are allocated on the permanent obstack | |
2973 | or are passed in ARGV, so we don't have to save | |
2974 | the string. */ | |
2975 | ||
2976 | if (profile_block_flag && last_filename != filename) | |
2977 | bb_file_label_num = add_bb_string (filename, TRUE); | |
2978 | ||
2979 | last_filename = filename; | |
2980 | last_linenum = NOTE_LINE_NUMBER (insn); | |
eac40081 RK |
2981 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
2982 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3cf2715d DE |
2983 | } |
2984 | \f | |
0304f787 JL |
2985 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2986 | directly to the desired hard register. */ | |
f5d927c0 | 2987 | |
0304f787 JL |
2988 | void |
2989 | cleanup_subreg_operands (insn) | |
2990 | rtx insn; | |
2991 | { | |
f62a15e3 | 2992 | int i; |
6c698a6d | 2993 | extract_insn_cached (insn); |
1ccbefce | 2994 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2995 | { |
1ccbefce | 2996 | if (GET_CODE (recog_data.operand[i]) == SUBREG) |
f5d927c0 | 2997 | recog_data.operand[i] = alter_subreg (recog_data.operand[i]); |
1ccbefce | 2998 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 BS |
2999 | || GET_CODE (recog_data.operand[i]) == MULT |
3000 | || GET_CODE (recog_data.operand[i]) == MEM) | |
f5d927c0 | 3001 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]); |
0304f787 JL |
3002 | } |
3003 | ||
1ccbefce | 3004 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3005 | { |
1ccbefce | 3006 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
f5d927c0 | 3007 | *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]); |
1ccbefce | 3008 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 BS |
3009 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3010 | || GET_CODE (*recog_data.dup_loc[i]) == MEM) | |
f5d927c0 | 3011 | *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]); |
0304f787 JL |
3012 | } |
3013 | } | |
3014 | ||
3cf2715d DE |
3015 | /* If X is a SUBREG, replace it with a REG or a MEM, |
3016 | based on the thing it is a subreg of. */ | |
3017 | ||
3018 | rtx | |
3019 | alter_subreg (x) | |
3020 | register rtx x; | |
3021 | { | |
3022 | register rtx y = SUBREG_REG (x); | |
f5963e61 | 3023 | |
3cf2715d DE |
3024 | if (GET_CODE (y) == SUBREG) |
3025 | y = alter_subreg (y); | |
3026 | ||
f5963e61 JL |
3027 | /* If reload is operating, we may be replacing inside this SUBREG. |
3028 | Check for that and make a new one if so. */ | |
3029 | if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0) | |
3030 | x = copy_rtx (x); | |
3031 | ||
3cf2715d DE |
3032 | if (GET_CODE (y) == REG) |
3033 | { | |
ddef6bc7 JJ |
3034 | int regno = subreg_hard_regno (x, 1); |
3035 | ||
ef178af3 ZW |
3036 | PUT_CODE (x, REG); |
3037 | REGNO (x) = regno; | |
08394eef | 3038 | ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y); |
0304f787 JL |
3039 | /* This field has a different meaning for REGs and SUBREGs. Make sure |
3040 | to clear it! */ | |
3041 | x->used = 0; | |
3cf2715d DE |
3042 | } |
3043 | else if (GET_CODE (y) == MEM) | |
3044 | { | |
f1ec5147 | 3045 | HOST_WIDE_INT offset = SUBREG_BYTE (x); |
ddef6bc7 JJ |
3046 | |
3047 | /* Catch these instead of generating incorrect code. */ | |
3048 | if ((offset % GET_MODE_SIZE (GET_MODE (x))) != 0) | |
3049 | abort (); | |
bf49b139 | 3050 | |
3cf2715d | 3051 | PUT_CODE (x, MEM); |
c6df88cb | 3052 | MEM_COPY_ATTRIBUTES (x, y); |
3cf2715d DE |
3053 | XEXP (x, 0) = plus_constant (XEXP (y, 0), offset); |
3054 | } | |
3055 | ||
3056 | return x; | |
3057 | } | |
3058 | ||
3059 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3060 | ||
3061 | static rtx | |
3062 | walk_alter_subreg (x) | |
3063 | rtx x; | |
3064 | { | |
3065 | switch (GET_CODE (x)) | |
3066 | { | |
3067 | case PLUS: | |
3068 | case MULT: | |
3069 | XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0)); | |
3070 | XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1)); | |
3071 | break; | |
3072 | ||
3073 | case MEM: | |
3074 | XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0)); | |
3075 | break; | |
3076 | ||
3077 | case SUBREG: | |
3078 | return alter_subreg (x); | |
f5d927c0 | 3079 | |
e9a25f70 JL |
3080 | default: |
3081 | break; | |
3cf2715d DE |
3082 | } |
3083 | ||
3084 | return x; | |
3085 | } | |
3086 | \f | |
3087 | #ifdef HAVE_cc0 | |
3088 | ||
3089 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3090 | as required by the bits that are set in cc_status.flags. | |
3091 | Not all of the bits there can be handled at this level in all cases. | |
3092 | ||
3093 | The value is normally 0. | |
3094 | 1 means that the condition has become always true. | |
3095 | -1 means that the condition has become always false. | |
3096 | 2 means that COND has been altered. */ | |
3097 | ||
3098 | static int | |
3099 | alter_cond (cond) | |
3100 | register rtx cond; | |
3101 | { | |
3102 | int value = 0; | |
3103 | ||
3104 | if (cc_status.flags & CC_REVERSED) | |
3105 | { | |
3106 | value = 2; | |
3107 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3108 | } | |
3109 | ||
3110 | if (cc_status.flags & CC_INVERTED) | |
3111 | { | |
3112 | value = 2; | |
3113 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3114 | } | |
3115 | ||
3116 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3117 | switch (GET_CODE (cond)) | |
3118 | { | |
3119 | case LE: | |
3120 | case LEU: | |
3121 | case GEU: | |
3122 | /* Jump becomes unconditional. */ | |
3123 | return 1; | |
3124 | ||
3125 | case GT: | |
3126 | case GTU: | |
3127 | case LTU: | |
3128 | /* Jump becomes no-op. */ | |
3129 | return -1; | |
3130 | ||
3131 | case GE: | |
3132 | PUT_CODE (cond, EQ); | |
3133 | value = 2; | |
3134 | break; | |
3135 | ||
3136 | case LT: | |
3137 | PUT_CODE (cond, NE); | |
3138 | value = 2; | |
3139 | break; | |
f5d927c0 | 3140 | |
e9a25f70 JL |
3141 | default: |
3142 | break; | |
3cf2715d DE |
3143 | } |
3144 | ||
3145 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3146 | switch (GET_CODE (cond)) | |
3147 | { | |
3148 | case GE: | |
3149 | case GEU: | |
3150 | /* Jump becomes unconditional. */ | |
3151 | return 1; | |
3152 | ||
3153 | case LT: | |
3154 | case LTU: | |
3155 | /* Jump becomes no-op. */ | |
3156 | return -1; | |
3157 | ||
3158 | case LE: | |
3159 | case LEU: | |
3160 | PUT_CODE (cond, EQ); | |
3161 | value = 2; | |
3162 | break; | |
3163 | ||
3164 | case GT: | |
3165 | case GTU: | |
3166 | PUT_CODE (cond, NE); | |
3167 | value = 2; | |
3168 | break; | |
f5d927c0 | 3169 | |
e9a25f70 JL |
3170 | default: |
3171 | break; | |
3cf2715d DE |
3172 | } |
3173 | ||
3174 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3175 | switch (GET_CODE (cond)) | |
3176 | { | |
3177 | case GEU: | |
3178 | /* Jump becomes unconditional. */ | |
3179 | return 1; | |
3180 | ||
3181 | case LEU: | |
3182 | PUT_CODE (cond, EQ); | |
3183 | value = 2; | |
3184 | break; | |
3185 | ||
3186 | case GTU: | |
3187 | PUT_CODE (cond, NE); | |
3188 | value = 2; | |
3189 | break; | |
3190 | ||
3191 | case LTU: | |
3192 | /* Jump becomes no-op. */ | |
3193 | return -1; | |
f5d927c0 | 3194 | |
e9a25f70 JL |
3195 | default: |
3196 | break; | |
3cf2715d DE |
3197 | } |
3198 | ||
3199 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3200 | switch (GET_CODE (cond)) | |
3201 | { | |
e9a25f70 | 3202 | default: |
3cf2715d DE |
3203 | abort (); |
3204 | ||
3205 | case NE: | |
3206 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3207 | value = 2; | |
3208 | break; | |
3209 | ||
3210 | case EQ: | |
3211 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3212 | value = 2; | |
3213 | break; | |
3214 | } | |
3215 | ||
3216 | if (cc_status.flags & CC_NOT_SIGNED) | |
3217 | /* The flags are valid if signed condition operators are converted | |
3218 | to unsigned. */ | |
3219 | switch (GET_CODE (cond)) | |
3220 | { | |
3221 | case LE: | |
3222 | PUT_CODE (cond, LEU); | |
3223 | value = 2; | |
3224 | break; | |
3225 | ||
3226 | case LT: | |
3227 | PUT_CODE (cond, LTU); | |
3228 | value = 2; | |
3229 | break; | |
3230 | ||
3231 | case GT: | |
3232 | PUT_CODE (cond, GTU); | |
3233 | value = 2; | |
3234 | break; | |
3235 | ||
3236 | case GE: | |
3237 | PUT_CODE (cond, GEU); | |
3238 | value = 2; | |
3239 | break; | |
e9a25f70 JL |
3240 | |
3241 | default: | |
3242 | break; | |
3cf2715d DE |
3243 | } |
3244 | ||
3245 | return value; | |
3246 | } | |
3247 | #endif | |
3248 | \f | |
3249 | /* Report inconsistency between the assembler template and the operands. | |
3250 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3251 | ||
3252 | void | |
ab87f8c8 JL |
3253 | output_operand_lossage (msgid) |
3254 | const char *msgid; | |
3cf2715d DE |
3255 | { |
3256 | if (this_is_asm_operands) | |
ab87f8c8 | 3257 | error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid)); |
3cf2715d | 3258 | else |
651a788e | 3259 | internal_error ("output_operand: %s", _(msgid)); |
3cf2715d DE |
3260 | } |
3261 | \f | |
3262 | /* Output of assembler code from a template, and its subroutines. */ | |
3263 | ||
3264 | /* Output text from TEMPLATE to the assembler output file, | |
3265 | obeying %-directions to substitute operands taken from | |
3266 | the vector OPERANDS. | |
3267 | ||
3268 | %N (for N a digit) means print operand N in usual manner. | |
3269 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3270 | and print the label name with no punctuation. | |
3271 | %cN means require operand N to be a constant | |
3272 | and print the constant expression with no punctuation. | |
3273 | %aN means expect operand N to be a memory address | |
3274 | (not a memory reference!) and print a reference | |
3275 | to that address. | |
3276 | %nN means expect operand N to be a constant | |
3277 | and print a constant expression for minus the value | |
3278 | of the operand, with no other punctuation. */ | |
3279 | ||
cb649530 RK |
3280 | static void |
3281 | output_asm_name () | |
3282 | { | |
3283 | if (flag_print_asm_name) | |
3284 | { | |
3285 | /* Annotate the assembly with a comment describing the pattern and | |
3286 | alternative used. */ | |
3287 | if (debug_insn) | |
3288 | { | |
3289 | register int num = INSN_CODE (debug_insn); | |
f5d927c0 | 3290 | fprintf (asm_out_file, "\t%s %d\t%s", |
a995e389 RH |
3291 | ASM_COMMENT_START, INSN_UID (debug_insn), |
3292 | insn_data[num].name); | |
3293 | if (insn_data[num].n_alternatives > 1) | |
cb649530 | 3294 | fprintf (asm_out_file, "/%d", which_alternative + 1); |
1db9f6ce | 3295 | #ifdef HAVE_ATTR_length |
a995e389 RH |
3296 | fprintf (asm_out_file, "\t[length = %d]", |
3297 | get_attr_length (debug_insn)); | |
1db9f6ce | 3298 | #endif |
cb649530 RK |
3299 | /* Clear this so only the first assembler insn |
3300 | of any rtl insn will get the special comment for -dp. */ | |
3301 | debug_insn = 0; | |
3302 | } | |
3303 | } | |
3304 | } | |
3305 | ||
3cf2715d DE |
3306 | void |
3307 | output_asm_insn (template, operands) | |
9b3142b3 | 3308 | const char *template; |
3cf2715d DE |
3309 | rtx *operands; |
3310 | { | |
9b3142b3 | 3311 | register const char *p; |
b729186a | 3312 | register int c; |
3cf2715d DE |
3313 | |
3314 | /* An insn may return a null string template | |
3315 | in a case where no assembler code is needed. */ | |
3316 | if (*template == 0) | |
3317 | return; | |
3318 | ||
3319 | p = template; | |
3320 | putc ('\t', asm_out_file); | |
3321 | ||
3322 | #ifdef ASM_OUTPUT_OPCODE | |
3323 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3324 | #endif | |
3325 | ||
b729186a | 3326 | while ((c = *p++)) |
3cf2715d DE |
3327 | switch (c) |
3328 | { | |
3cf2715d | 3329 | case '\n': |
cb649530 | 3330 | output_asm_name (); |
3cf2715d | 3331 | putc (c, asm_out_file); |
cb649530 | 3332 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3333 | while ((c = *p) == '\t') |
3334 | { | |
3335 | putc (c, asm_out_file); | |
3336 | p++; | |
3337 | } | |
3338 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3339 | #endif |
cb649530 | 3340 | break; |
3cf2715d DE |
3341 | |
3342 | #ifdef ASSEMBLER_DIALECT | |
3343 | case '{': | |
b729186a JL |
3344 | { |
3345 | register int i; | |
f5d927c0 | 3346 | |
b729186a JL |
3347 | /* If we want the first dialect, do nothing. Otherwise, skip |
3348 | DIALECT_NUMBER of strings ending with '|'. */ | |
3349 | for (i = 0; i < dialect_number; i++) | |
3350 | { | |
463a8384 | 3351 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3352 | ; |
463a8384 BS |
3353 | if (*p == '}') |
3354 | break; | |
b729186a JL |
3355 | if (*p == '|') |
3356 | p++; | |
3357 | } | |
3358 | } | |
3cf2715d DE |
3359 | break; |
3360 | ||
3361 | case '|': | |
3362 | /* Skip to close brace. */ | |
3363 | while (*p && *p++ != '}') | |
3364 | ; | |
3365 | break; | |
3366 | ||
3367 | case '}': | |
3368 | break; | |
3369 | #endif | |
3370 | ||
3371 | case '%': | |
3372 | /* %% outputs a single %. */ | |
3373 | if (*p == '%') | |
3374 | { | |
3375 | p++; | |
3376 | putc (c, asm_out_file); | |
3377 | } | |
3378 | /* %= outputs a number which is unique to each insn in the entire | |
3379 | compilation. This is useful for making local labels that are | |
3380 | referred to more than once in a given insn. */ | |
3381 | else if (*p == '=') | |
3382 | { | |
3383 | p++; | |
3384 | fprintf (asm_out_file, "%d", insn_counter); | |
3385 | } | |
3386 | /* % followed by a letter and some digits | |
3387 | outputs an operand in a special way depending on the letter. | |
3388 | Letters `acln' are implemented directly. | |
3389 | Other letters are passed to `output_operand' so that | |
3390 | the PRINT_OPERAND macro can define them. */ | |
f5d927c0 | 3391 | else if (ISLOWER (*p) || ISUPPER (*p)) |
3cf2715d DE |
3392 | { |
3393 | int letter = *p++; | |
3394 | c = atoi (p); | |
3395 | ||
3396 | if (! (*p >= '0' && *p <= '9')) | |
3397 | output_operand_lossage ("operand number missing after %-letter"); | |
22bf4422 | 3398 | else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands)) |
3cf2715d DE |
3399 | output_operand_lossage ("operand number out of range"); |
3400 | else if (letter == 'l') | |
3401 | output_asm_label (operands[c]); | |
3402 | else if (letter == 'a') | |
3403 | output_address (operands[c]); | |
3404 | else if (letter == 'c') | |
3405 | { | |
3406 | if (CONSTANT_ADDRESS_P (operands[c])) | |
3407 | output_addr_const (asm_out_file, operands[c]); | |
3408 | else | |
3409 | output_operand (operands[c], 'c'); | |
3410 | } | |
3411 | else if (letter == 'n') | |
3412 | { | |
3413 | if (GET_CODE (operands[c]) == CONST_INT) | |
21e3a81b | 3414 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
3cf2715d DE |
3415 | - INTVAL (operands[c])); |
3416 | else | |
3417 | { | |
3418 | putc ('-', asm_out_file); | |
3419 | output_addr_const (asm_out_file, operands[c]); | |
3420 | } | |
3421 | } | |
3422 | else | |
3423 | output_operand (operands[c], letter); | |
f5d927c0 KH |
3424 | |
3425 | while ((c = *p) >= '0' && c <= '9') | |
3426 | p++; | |
3cf2715d DE |
3427 | } |
3428 | /* % followed by a digit outputs an operand the default way. */ | |
3429 | else if (*p >= '0' && *p <= '9') | |
3430 | { | |
3431 | c = atoi (p); | |
f5d927c0 KH |
3432 | if (this_is_asm_operands |
3433 | && (c < 0 || (unsigned int) c >= insn_noperands)) | |
3cf2715d DE |
3434 | output_operand_lossage ("operand number out of range"); |
3435 | else | |
3436 | output_operand (operands[c], 0); | |
f5d927c0 KH |
3437 | while ((c = *p) >= '0' && c <= '9') |
3438 | p++; | |
3cf2715d DE |
3439 | } |
3440 | /* % followed by punctuation: output something for that | |
3441 | punctuation character alone, with no operand. | |
3442 | The PRINT_OPERAND macro decides what is actually done. */ | |
3443 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3444 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3445 | output_operand (NULL_RTX, *p++); |
3446 | #endif | |
3447 | else | |
3448 | output_operand_lossage ("invalid %%-code"); | |
3449 | break; | |
3450 | ||
3451 | default: | |
3452 | putc (c, asm_out_file); | |
3453 | } | |
3454 | ||
cb649530 | 3455 | output_asm_name (); |
3cf2715d DE |
3456 | |
3457 | putc ('\n', asm_out_file); | |
3458 | } | |
3459 | \f | |
3460 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3461 | ||
3462 | void | |
3463 | output_asm_label (x) | |
3464 | rtx x; | |
3465 | { | |
3466 | char buf[256]; | |
3467 | ||
3468 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 RH |
3469 | x = XEXP (x, 0); |
3470 | if (GET_CODE (x) == CODE_LABEL | |
3471 | || (GET_CODE (x) == NOTE | |
3472 | && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) | |
3cf2715d DE |
3473 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3474 | else | |
3475 | output_operand_lossage ("`%l' operand isn't a label"); | |
3476 | ||
3477 | assemble_name (asm_out_file, buf); | |
3478 | } | |
3479 | ||
3480 | /* Print operand X using machine-dependent assembler syntax. | |
3481 | The macro PRINT_OPERAND is defined just to control this function. | |
3482 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3483 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3484 | between the % and the digits. | |
3485 | When CODE is a non-letter, X is 0. | |
3486 | ||
3487 | The meanings of the letters are machine-dependent and controlled | |
3488 | by PRINT_OPERAND. */ | |
3489 | ||
3490 | static void | |
3491 | output_operand (x, code) | |
3492 | rtx x; | |
962f1324 | 3493 | int code ATTRIBUTE_UNUSED; |
3cf2715d DE |
3494 | { |
3495 | if (x && GET_CODE (x) == SUBREG) | |
3496 | x = alter_subreg (x); | |
3497 | ||
3498 | /* If X is a pseudo-register, abort now rather than writing trash to the | |
3499 | assembler file. */ | |
3500 | ||
3501 | if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
3502 | abort (); | |
3503 | ||
3504 | PRINT_OPERAND (asm_out_file, x, code); | |
3505 | } | |
3506 | ||
3507 | /* Print a memory reference operand for address X | |
3508 | using machine-dependent assembler syntax. | |
3509 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3510 | ||
3511 | void | |
3512 | output_address (x) | |
3513 | rtx x; | |
3514 | { | |
3515 | walk_alter_subreg (x); | |
3516 | PRINT_OPERAND_ADDRESS (asm_out_file, x); | |
3517 | } | |
3518 | \f | |
3519 | /* Print an integer constant expression in assembler syntax. | |
3520 | Addition and subtraction are the only arithmetic | |
3521 | that may appear in these expressions. */ | |
3522 | ||
3523 | void | |
3524 | output_addr_const (file, x) | |
3525 | FILE *file; | |
3526 | rtx x; | |
3527 | { | |
3528 | char buf[256]; | |
3529 | ||
3530 | restart: | |
3531 | switch (GET_CODE (x)) | |
3532 | { | |
3533 | case PC: | |
3534 | if (flag_pic) | |
3535 | putc ('.', file); | |
3536 | else | |
3537 | abort (); | |
3538 | break; | |
3539 | ||
3540 | case SYMBOL_REF: | |
99c8c61c AO |
3541 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3542 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3543 | #else | |
3cf2715d | 3544 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3545 | #endif |
3cf2715d DE |
3546 | break; |
3547 | ||
3548 | case LABEL_REF: | |
422be3c3 AO |
3549 | x = XEXP (x, 0); |
3550 | /* Fall through. */ | |
3cf2715d DE |
3551 | case CODE_LABEL: |
3552 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
3553 | assemble_name (file, buf); | |
3554 | break; | |
3555 | ||
3556 | case CONST_INT: | |
21e3a81b | 3557 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3558 | break; |
3559 | ||
3560 | case CONST: | |
3561 | /* This used to output parentheses around the expression, | |
3562 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3563 | output_addr_const (file, XEXP (x, 0)); | |
3564 | break; | |
3565 | ||
3566 | case CONST_DOUBLE: | |
3567 | if (GET_MODE (x) == VOIDmode) | |
3568 | { | |
3569 | /* We can use %d if the number is one word and positive. */ | |
3570 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3571 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3cf2715d | 3572 | CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); |
f5d927c0 | 3573 | else if (CONST_DOUBLE_LOW (x) < 0) |
21e3a81b | 3574 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); |
3cf2715d | 3575 | else |
21e3a81b | 3576 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3577 | } |
3578 | else | |
3579 | /* We can't handle floating point constants; | |
3580 | PRINT_OPERAND must handle them. */ | |
3581 | output_operand_lossage ("floating constant misused"); | |
3582 | break; | |
3583 | ||
3584 | case PLUS: | |
3585 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3586 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3587 | { | |
3588 | output_addr_const (file, XEXP (x, 1)); | |
3589 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3590 | fprintf (file, "+"); | |
3591 | output_addr_const (file, XEXP (x, 0)); | |
3592 | } | |
3593 | else | |
3594 | { | |
3595 | output_addr_const (file, XEXP (x, 0)); | |
08106825 AO |
3596 | if (GET_CODE (XEXP (x, 1)) != CONST_INT |
3597 | || INTVAL (XEXP (x, 1)) >= 0) | |
3cf2715d DE |
3598 | fprintf (file, "+"); |
3599 | output_addr_const (file, XEXP (x, 1)); | |
3600 | } | |
3601 | break; | |
3602 | ||
3603 | case MINUS: | |
3604 | /* Avoid outputting things like x-x or x+5-x, | |
3605 | since some assemblers can't handle that. */ | |
3606 | x = simplify_subtraction (x); | |
3607 | if (GET_CODE (x) != MINUS) | |
3608 | goto restart; | |
3609 | ||
3610 | output_addr_const (file, XEXP (x, 0)); | |
3611 | fprintf (file, "-"); | |
422be3c3 AO |
3612 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT |
3613 | && INTVAL (XEXP (x, 1)) < 0) | |
3614 | || GET_CODE (XEXP (x, 1)) != CONST_INT) | |
3cf2715d | 3615 | { |
17b53c33 | 3616 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3617 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3618 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d DE |
3619 | } |
3620 | else | |
3621 | output_addr_const (file, XEXP (x, 1)); | |
3622 | break; | |
3623 | ||
3624 | case ZERO_EXTEND: | |
3625 | case SIGN_EXTEND: | |
3626 | output_addr_const (file, XEXP (x, 0)); | |
3627 | break; | |
3628 | ||
3629 | default: | |
422be3c3 AO |
3630 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3631 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3632 | break; | |
3633 | ||
3634 | fail: | |
3635 | #endif | |
3cf2715d DE |
3636 | output_operand_lossage ("invalid expression as operand"); |
3637 | } | |
3638 | } | |
3639 | \f | |
3640 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3641 | %R prints the value of REGISTER_PREFIX. | |
3642 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3643 | %U prints the value of USER_LABEL_PREFIX. | |
3644 | %I prints the value of IMMEDIATE_PREFIX. | |
3645 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
3646 | Also supported are %d, %x, %s, %e, %f, %g and %%. | |
3647 | ||
3648 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3649 | ||
3650 | void | |
711d877c | 3651 | asm_fprintf VPARAMS ((FILE *file, const char *p, ...)) |
3cf2715d | 3652 | { |
3cf2715d DE |
3653 | char buf[10]; |
3654 | char *q, c; | |
3cf2715d | 3655 | |
7a75edb7 AJ |
3656 | VA_OPEN (argptr, p); |
3657 | VA_FIXEDARG (argptr, FILE *, file); | |
3658 | VA_FIXEDARG (argptr, const char *, p); | |
3cf2715d DE |
3659 | |
3660 | buf[0] = '%'; | |
3661 | ||
b729186a | 3662 | while ((c = *p++)) |
3cf2715d DE |
3663 | switch (c) |
3664 | { | |
3665 | #ifdef ASSEMBLER_DIALECT | |
3666 | case '{': | |
b729186a JL |
3667 | { |
3668 | int i; | |
3cf2715d | 3669 | |
b729186a JL |
3670 | /* If we want the first dialect, do nothing. Otherwise, skip |
3671 | DIALECT_NUMBER of strings ending with '|'. */ | |
3672 | for (i = 0; i < dialect_number; i++) | |
3673 | { | |
3674 | while (*p && *p++ != '|') | |
3675 | ; | |
3676 | ||
3677 | if (*p == '|') | |
3678 | p++; | |
f5d927c0 | 3679 | } |
b729186a | 3680 | } |
3cf2715d DE |
3681 | break; |
3682 | ||
3683 | case '|': | |
3684 | /* Skip to close brace. */ | |
3685 | while (*p && *p++ != '}') | |
3686 | ; | |
3687 | break; | |
3688 | ||
3689 | case '}': | |
3690 | break; | |
3691 | #endif | |
3692 | ||
3693 | case '%': | |
3694 | c = *p++; | |
3695 | q = &buf[1]; | |
3696 | while ((c >= '0' && c <= '9') || c == '.') | |
3697 | { | |
3698 | *q++ = c; | |
3699 | c = *p++; | |
3700 | } | |
3701 | switch (c) | |
3702 | { | |
3703 | case '%': | |
3704 | fprintf (file, "%%"); | |
3705 | break; | |
3706 | ||
3707 | case 'd': case 'i': case 'u': | |
3708 | case 'x': case 'p': case 'X': | |
3709 | case 'o': | |
3710 | *q++ = c; | |
3711 | *q = 0; | |
3712 | fprintf (file, buf, va_arg (argptr, int)); | |
3713 | break; | |
3714 | ||
3715 | case 'w': | |
3716 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases, | |
3717 | but we do not check for those cases. It means that the value | |
3718 | is a HOST_WIDE_INT, which may be either `int' or `long'. */ | |
3719 | ||
21e3a81b RK |
3720 | #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT |
3721 | #else | |
3722 | #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG | |
3723 | *q++ = 'l'; | |
3724 | #else | |
3725 | *q++ = 'l'; | |
3cf2715d | 3726 | *q++ = 'l'; |
21e3a81b | 3727 | #endif |
3cf2715d DE |
3728 | #endif |
3729 | ||
3730 | *q++ = *p++; | |
3731 | *q = 0; | |
3732 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3733 | break; | |
3734 | ||
3735 | case 'l': | |
3736 | *q++ = c; | |
3737 | *q++ = *p++; | |
3738 | *q = 0; | |
3739 | fprintf (file, buf, va_arg (argptr, long)); | |
3740 | break; | |
3741 | ||
3742 | case 'e': | |
3743 | case 'f': | |
3744 | case 'g': | |
3745 | *q++ = c; | |
3746 | *q = 0; | |
3747 | fprintf (file, buf, va_arg (argptr, double)); | |
3748 | break; | |
3749 | ||
3750 | case 's': | |
3751 | *q++ = c; | |
3752 | *q = 0; | |
3753 | fprintf (file, buf, va_arg (argptr, char *)); | |
3754 | break; | |
3755 | ||
3756 | case 'O': | |
3757 | #ifdef ASM_OUTPUT_OPCODE | |
3758 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3759 | #endif | |
3760 | break; | |
3761 | ||
3762 | case 'R': | |
3763 | #ifdef REGISTER_PREFIX | |
3764 | fprintf (file, "%s", REGISTER_PREFIX); | |
3765 | #endif | |
3766 | break; | |
3767 | ||
3768 | case 'I': | |
3769 | #ifdef IMMEDIATE_PREFIX | |
3770 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3771 | #endif | |
3772 | break; | |
3773 | ||
3774 | case 'L': | |
3775 | #ifdef LOCAL_LABEL_PREFIX | |
3776 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3777 | #endif | |
3778 | break; | |
3779 | ||
3780 | case 'U': | |
19283265 | 3781 | fputs (user_label_prefix, file); |
3cf2715d DE |
3782 | break; |
3783 | ||
fe0503ea NC |
3784 | #ifdef ASM_FPRINTF_EXTENSIONS |
3785 | /* Upper case letters are reserved for general use by asm_fprintf | |
3786 | and so are not available to target specific code. In order to | |
3787 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3788 | they are defined here. As they get turned into real extensions | |
3789 | to asm_fprintf they should be removed from this list. */ | |
3790 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3791 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3792 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3793 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3794 | break; | |
f5d927c0 | 3795 | |
fe0503ea NC |
3796 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3797 | #endif | |
3cf2715d DE |
3798 | default: |
3799 | abort (); | |
3800 | } | |
3801 | break; | |
3802 | ||
3803 | default: | |
3804 | fputc (c, file); | |
3805 | } | |
7a75edb7 | 3806 | VA_CLOSE (argptr); |
3cf2715d DE |
3807 | } |
3808 | \f | |
3809 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3810 | into two rtx's for single words, | |
3811 | storing in *FIRST the word that comes first in memory in the target | |
3812 | and in *SECOND the other. */ | |
3813 | ||
3814 | void | |
3815 | split_double (value, first, second) | |
3816 | rtx value; | |
3817 | rtx *first, *second; | |
3818 | { | |
3819 | if (GET_CODE (value) == CONST_INT) | |
3820 | { | |
5a1a6efd | 3821 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3822 | { |
5a1a6efd | 3823 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3824 | Extract the bits from it into two word-sized pieces. |
3825 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3826 | unsigned HOST_WIDE_INT low, high; |
3827 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3828 | ||
3829 | /* Set sign_bit to the most significant bit of a word. */ | |
3830 | sign_bit = 1; | |
3831 | sign_bit <<= BITS_PER_WORD - 1; | |
3832 | ||
3833 | /* Set mask so that all bits of the word are set. We could | |
3834 | have used 1 << BITS_PER_WORD instead of basing the | |
3835 | calculation on sign_bit. However, on machines where | |
3836 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3837 | compiler warning, even though the code would never be | |
3838 | executed. */ | |
3839 | mask = sign_bit << 1; | |
3840 | mask--; | |
3841 | ||
3842 | /* Set sign_extend as any remaining bits. */ | |
3843 | sign_extend = ~mask; | |
f5d927c0 | 3844 | |
7f251dee AO |
3845 | /* Pick the lower word and sign-extend it. */ |
3846 | low = INTVAL (value); | |
3847 | low &= mask; | |
3848 | if (low & sign_bit) | |
3849 | low |= sign_extend; | |
3850 | ||
3851 | /* Pick the higher word, shifted to the least significant | |
3852 | bits, and sign-extend it. */ | |
3853 | high = INTVAL (value); | |
3854 | high >>= BITS_PER_WORD - 1; | |
3855 | high >>= 1; | |
3856 | high &= mask; | |
3857 | if (high & sign_bit) | |
3858 | high |= sign_extend; | |
3859 | ||
3860 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3861 | if (WORDS_BIG_ENDIAN) |
3862 | { | |
7f251dee AO |
3863 | *first = GEN_INT (high); |
3864 | *second = GEN_INT (low); | |
5a1a6efd RK |
3865 | } |
3866 | else | |
3867 | { | |
7f251dee AO |
3868 | *first = GEN_INT (low); |
3869 | *second = GEN_INT (high); | |
5a1a6efd | 3870 | } |
f76b9db2 ILT |
3871 | } |
3872 | else | |
3873 | { | |
5a1a6efd RK |
3874 | /* The rule for using CONST_INT for a wider mode |
3875 | is that we regard the value as signed. | |
3876 | So sign-extend it. */ | |
3877 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
3878 | if (WORDS_BIG_ENDIAN) | |
3879 | { | |
3880 | *first = high; | |
3881 | *second = value; | |
3882 | } | |
3883 | else | |
3884 | { | |
3885 | *first = value; | |
3886 | *second = high; | |
3887 | } | |
f76b9db2 | 3888 | } |
3cf2715d DE |
3889 | } |
3890 | else if (GET_CODE (value) != CONST_DOUBLE) | |
3891 | { | |
f76b9db2 ILT |
3892 | if (WORDS_BIG_ENDIAN) |
3893 | { | |
3894 | *first = const0_rtx; | |
3895 | *second = value; | |
3896 | } | |
3897 | else | |
3898 | { | |
3899 | *first = value; | |
3900 | *second = const0_rtx; | |
3901 | } | |
3cf2715d DE |
3902 | } |
3903 | else if (GET_MODE (value) == VOIDmode | |
3904 | /* This is the old way we did CONST_DOUBLE integers. */ | |
3905 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
3906 | { | |
3907 | /* In an integer, the words are defined as most and least significant. | |
3908 | So order them by the target's convention. */ | |
f76b9db2 ILT |
3909 | if (WORDS_BIG_ENDIAN) |
3910 | { | |
3911 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3912 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3913 | } | |
3914 | else | |
3915 | { | |
3916 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3917 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3918 | } | |
3cf2715d DE |
3919 | } |
3920 | else | |
3921 | { | |
3922 | #ifdef REAL_ARITHMETIC | |
f5d927c0 KH |
3923 | REAL_VALUE_TYPE r; |
3924 | long l[2]; | |
3cf2715d DE |
3925 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
3926 | ||
3927 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
3928 | format, splits up the floating point double and outputs | |
3929 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 3930 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
3931 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
3932 | ||
b5a3eb84 JW |
3933 | /* If 32 bits is an entire word for the target, but not for the host, |
3934 | then sign-extend on the host so that the number will look the same | |
3935 | way on the host that it would on the target. See for instance | |
3936 | simplify_unary_operation. The #if is needed to avoid compiler | |
3937 | warnings. */ | |
3938 | ||
3939 | #if HOST_BITS_PER_LONG > 32 | |
3940 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
3941 | { | |
3942 | if (l[0] & ((long) 1 << 31)) | |
3943 | l[0] |= ((long) (-1) << 32); | |
3944 | if (l[1] & ((long) 1 << 31)) | |
3945 | l[1] |= ((long) (-1) << 32); | |
3946 | } | |
3947 | #endif | |
3948 | ||
3cf2715d DE |
3949 | *first = GEN_INT ((HOST_WIDE_INT) l[0]); |
3950 | *second = GEN_INT ((HOST_WIDE_INT) l[1]); | |
3951 | #else | |
3952 | if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT | |
3953 | || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) | |
3954 | && ! flag_pretend_float) | |
7f251dee | 3955 | abort (); |
3cf2715d | 3956 | |
f76b9db2 ILT |
3957 | if ( |
3958 | #ifdef HOST_WORDS_BIG_ENDIAN | |
3959 | WORDS_BIG_ENDIAN | |
3cf2715d | 3960 | #else |
f76b9db2 | 3961 | ! WORDS_BIG_ENDIAN |
3cf2715d | 3962 | #endif |
f76b9db2 ILT |
3963 | ) |
3964 | { | |
3965 | /* Host and target agree => no need to swap. */ | |
3966 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3967 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3968 | } | |
3969 | else | |
3970 | { | |
3971 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3972 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3973 | } | |
3cf2715d DE |
3974 | #endif /* no REAL_ARITHMETIC */ |
3975 | } | |
3976 | } | |
3977 | \f | |
3978 | /* Return nonzero if this function has no function calls. */ | |
3979 | ||
3980 | int | |
3981 | leaf_function_p () | |
3982 | { | |
3983 | rtx insn; | |
b660f82f | 3984 | rtx link; |
3cf2715d | 3985 | |
9e2f9a7f | 3986 | if (profile_flag || profile_block_flag || profile_arc_flag) |
3cf2715d DE |
3987 | return 0; |
3988 | ||
3989 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
3990 | { | |
7d167afd JJ |
3991 | if (GET_CODE (insn) == CALL_INSN |
3992 | && ! SIBLING_CALL_P (insn)) | |
3cf2715d DE |
3993 | return 0; |
3994 | if (GET_CODE (insn) == INSN | |
3995 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
0a1c58a2 JL |
3996 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN |
3997 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
3998 | return 0; |
3999 | } | |
b660f82f JW |
4000 | for (link = current_function_epilogue_delay_list; |
4001 | link; | |
4002 | link = XEXP (link, 1)) | |
3cf2715d | 4003 | { |
b660f82f JW |
4004 | insn = XEXP (link, 0); |
4005 | ||
4006 | if (GET_CODE (insn) == CALL_INSN | |
7d167afd | 4007 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4008 | return 0; |
b660f82f JW |
4009 | if (GET_CODE (insn) == INSN |
4010 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
4011 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN | |
4012 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
4013 | return 0; |
4014 | } | |
4015 | ||
4016 | return 1; | |
4017 | } | |
4018 | ||
ef6257cd JH |
4019 | /* Return 1 if branch is an forward branch. |
4020 | Uses insn_shuid array, so it works only in the final pass. May be used by | |
4021 | output templates to customary add branch prediction hints. | |
4022 | */ | |
4023 | int | |
4024 | final_forward_branch_p (insn) | |
4025 | rtx insn; | |
4026 | { | |
4027 | int insn_id, label_id; | |
4028 | if (!uid_shuid) | |
4029 | abort (); | |
4030 | insn_id = INSN_SHUID (insn); | |
4031 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4032 | /* We've hit some insns that does not have id information available. */ | |
4033 | if (!insn_id || !label_id) | |
4034 | abort (); | |
4035 | return insn_id < label_id; | |
4036 | } | |
4037 | ||
3cf2715d DE |
4038 | /* On some machines, a function with no call insns |
4039 | can run faster if it doesn't create its own register window. | |
4040 | When output, the leaf function should use only the "output" | |
4041 | registers. Ordinarily, the function would be compiled to use | |
4042 | the "input" registers to find its arguments; it is a candidate | |
4043 | for leaf treatment if it uses only the "input" registers. | |
4044 | Leaf function treatment means renumbering so the function | |
4045 | uses the "output" registers instead. */ | |
4046 | ||
4047 | #ifdef LEAF_REGISTERS | |
4048 | ||
3cf2715d DE |
4049 | /* Return 1 if this function uses only the registers that can be |
4050 | safely renumbered. */ | |
4051 | ||
4052 | int | |
4053 | only_leaf_regs_used () | |
4054 | { | |
4055 | int i; | |
7d167afd | 4056 | char *permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4057 | |
4058 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e5e809f4 JL |
4059 | if ((regs_ever_live[i] || global_regs[i]) |
4060 | && ! permitted_reg_in_leaf_functions[i]) | |
4061 | return 0; | |
4062 | ||
4063 | if (current_function_uses_pic_offset_table | |
4064 | && pic_offset_table_rtx != 0 | |
4065 | && GET_CODE (pic_offset_table_rtx) == REG | |
4066 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) | |
4067 | return 0; | |
4068 | ||
3cf2715d DE |
4069 | return 1; |
4070 | } | |
4071 | ||
4072 | /* Scan all instructions and renumber all registers into those | |
4073 | available in leaf functions. */ | |
4074 | ||
4075 | static void | |
4076 | leaf_renumber_regs (first) | |
4077 | rtx first; | |
4078 | { | |
4079 | rtx insn; | |
4080 | ||
4081 | /* Renumber only the actual patterns. | |
4082 | The reg-notes can contain frame pointer refs, | |
4083 | and renumbering them could crash, and should not be needed. */ | |
4084 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4085 | if (INSN_P (insn)) |
3cf2715d | 4086 | leaf_renumber_regs_insn (PATTERN (insn)); |
f5d927c0 KH |
4087 | for (insn = current_function_epilogue_delay_list; |
4088 | insn; | |
4089 | insn = XEXP (insn, 1)) | |
2c3c49de | 4090 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
4091 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
4092 | } | |
4093 | ||
4094 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4095 | available in leaf functions. */ | |
4096 | ||
4097 | void | |
4098 | leaf_renumber_regs_insn (in_rtx) | |
4099 | register rtx in_rtx; | |
4100 | { | |
4101 | register int i, j; | |
6f7d635c | 4102 | register const char *format_ptr; |
3cf2715d DE |
4103 | |
4104 | if (in_rtx == 0) | |
4105 | return; | |
4106 | ||
4107 | /* Renumber all input-registers into output-registers. | |
4108 | renumbered_regs would be 1 for an output-register; | |
4109 | they */ | |
4110 | ||
4111 | if (GET_CODE (in_rtx) == REG) | |
4112 | { | |
4113 | int newreg; | |
4114 | ||
4115 | /* Don't renumber the same reg twice. */ | |
4116 | if (in_rtx->used) | |
4117 | return; | |
4118 | ||
4119 | newreg = REGNO (in_rtx); | |
4120 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4121 | to reach here as part of a REG_NOTE. */ | |
4122 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4123 | { | |
4124 | in_rtx->used = 1; | |
4125 | return; | |
4126 | } | |
4127 | newreg = LEAF_REG_REMAP (newreg); | |
4128 | if (newreg < 0) | |
4129 | abort (); | |
4130 | regs_ever_live[REGNO (in_rtx)] = 0; | |
4131 | regs_ever_live[newreg] = 1; | |
4132 | REGNO (in_rtx) = newreg; | |
4133 | in_rtx->used = 1; | |
4134 | } | |
4135 | ||
2c3c49de | 4136 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4137 | { |
4138 | /* Inside a SEQUENCE, we find insns. | |
4139 | Renumber just the patterns of these insns, | |
4140 | just as we do for the top-level insns. */ | |
4141 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4142 | return; | |
4143 | } | |
4144 | ||
4145 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4146 | ||
4147 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4148 | switch (*format_ptr++) | |
4149 | { | |
4150 | case 'e': | |
4151 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4152 | break; | |
4153 | ||
4154 | case 'E': | |
4155 | if (NULL != XVEC (in_rtx, i)) | |
4156 | { | |
4157 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4158 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4159 | } | |
4160 | break; | |
4161 | ||
4162 | case 'S': | |
4163 | case 's': | |
4164 | case '0': | |
4165 | case 'i': | |
4166 | case 'w': | |
4167 | case 'n': | |
4168 | case 'u': | |
4169 | break; | |
4170 | ||
4171 | default: | |
4172 | abort (); | |
4173 | } | |
4174 | } | |
4175 | #endif |