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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
6cf9ac28 | 3 | 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
3cf2715d | 4 | |
1322177d | 5 | This file is part of GCC. |
3cf2715d | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
3cf2715d | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
3cf2715d DE |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
3cf2715d | 21 | |
3cf2715d DE |
22 | /* This is the final pass of the compiler. |
23 | It looks at the rtl code for a function and outputs assembler code. | |
24 | ||
25 | Call `final_start_function' to output the assembler code for function entry, | |
26 | `final' to output assembler code for some RTL code, | |
27 | `final_end_function' to output assembler code for function exit. | |
28 | If a function is compiled in several pieces, each piece is | |
29 | output separately with `final'. | |
30 | ||
31 | Some optimizations are also done at this level. | |
32 | Move instructions that were made unnecessary by good register allocation | |
33 | are detected and omitted from the output. (Though most of these | |
34 | are removed by the last jump pass.) | |
35 | ||
36 | Instructions to set the condition codes are omitted when it can be | |
37 | seen that the condition codes already had the desired values. | |
38 | ||
39 | In some cases it is sufficient if the inherited condition codes | |
40 | have related values, but this may require the following insn | |
41 | (the one that tests the condition codes) to be modified. | |
42 | ||
43 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
44 | directly in assembler by the target functions function_prologue and |
45 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
46 | |
47 | #include "config.h" | |
670ee920 | 48 | #include "system.h" |
4977bab6 ZW |
49 | #include "coretypes.h" |
50 | #include "tm.h" | |
3cf2715d DE |
51 | |
52 | #include "tree.h" | |
53 | #include "rtl.h" | |
6baf1cc8 | 54 | #include "tm_p.h" |
3cf2715d DE |
55 | #include "regs.h" |
56 | #include "insn-config.h" | |
3cf2715d | 57 | #include "insn-attr.h" |
3cf2715d DE |
58 | #include "recog.h" |
59 | #include "conditions.h" | |
60 | #include "flags.h" | |
61 | #include "real.h" | |
62 | #include "hard-reg-set.h" | |
3cf2715d | 63 | #include "output.h" |
3d195391 | 64 | #include "except.h" |
49ad7cfa | 65 | #include "function.h" |
10f0ad3d | 66 | #include "toplev.h" |
d6f4ec51 | 67 | #include "reload.h" |
ab87f8c8 | 68 | #include "intl.h" |
be1bb652 | 69 | #include "basic-block.h" |
08c148a8 | 70 | #include "target.h" |
a5a42b92 | 71 | #include "debug.h" |
49d801d3 | 72 | #include "expr.h" |
ba4f7968 | 73 | #include "cfglayout.h" |
3cf2715d | 74 | |
440aabf8 NB |
75 | #ifdef XCOFF_DEBUGGING_INFO |
76 | #include "xcoffout.h" /* Needed for external data | |
77 | declarations for e.g. AIX 4.x. */ | |
78 | #endif | |
79 | ||
76ead72b RL |
80 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
81 | #include "dwarf2out.h" | |
82 | #endif | |
83 | ||
6a08f7b3 DP |
84 | #ifdef DBX_DEBUGGING_INFO |
85 | #include "dbxout.h" | |
86 | #endif | |
87 | ||
3cf2715d DE |
88 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
89 | null default for it to save conditionalization later. */ | |
90 | #ifndef CC_STATUS_INIT | |
91 | #define CC_STATUS_INIT | |
92 | #endif | |
93 | ||
94 | /* How to start an assembler comment. */ | |
95 | #ifndef ASM_COMMENT_START | |
96 | #define ASM_COMMENT_START ";#" | |
97 | #endif | |
98 | ||
99 | /* Is the given character a logical line separator for the assembler? */ | |
100 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
101 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') | |
102 | #endif | |
103 | ||
75197b37 BS |
104 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
105 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
106 | #endif | |
107 | ||
d48bc59a RH |
108 | #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP) |
109 | #define HAVE_READONLY_DATA_SECTION 1 | |
110 | #else | |
111 | #define HAVE_READONLY_DATA_SECTION 0 | |
112 | #endif | |
113 | ||
3cf2715d | 114 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
115 | static rtx debug_insn; |
116 | rtx current_output_insn; | |
3cf2715d DE |
117 | |
118 | /* Line number of last NOTE. */ | |
119 | static int last_linenum; | |
120 | ||
eac40081 RK |
121 | /* Highest line number in current block. */ |
122 | static int high_block_linenum; | |
123 | ||
124 | /* Likewise for function. */ | |
125 | static int high_function_linenum; | |
126 | ||
3cf2715d | 127 | /* Filename of last NOTE. */ |
3cce094d | 128 | static const char *last_filename; |
3cf2715d | 129 | |
fc470718 R |
130 | extern int length_unit_log; /* This is defined in insn-attrtab.c. */ |
131 | ||
3cf2715d DE |
132 | /* Nonzero while outputting an `asm' with operands. |
133 | This means that inconsistencies are the user's fault, so don't abort. | |
134 | The precise value is the insn being output, to pass to error_for_asm. */ | |
c8b94768 | 135 | rtx this_is_asm_operands; |
3cf2715d DE |
136 | |
137 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 138 | static unsigned int insn_noperands; |
3cf2715d DE |
139 | |
140 | /* Compare optimization flag. */ | |
141 | ||
142 | static rtx last_ignored_compare = 0; | |
143 | ||
3cf2715d DE |
144 | /* Assign a unique number to each insn that is output. |
145 | This can be used to generate unique local labels. */ | |
146 | ||
147 | static int insn_counter = 0; | |
148 | ||
149 | #ifdef HAVE_cc0 | |
150 | /* This variable contains machine-dependent flags (defined in tm.h) | |
151 | set and examined by output routines | |
152 | that describe how to interpret the condition codes properly. */ | |
153 | ||
154 | CC_STATUS cc_status; | |
155 | ||
156 | /* During output of an insn, this contains a copy of cc_status | |
157 | from before the insn. */ | |
158 | ||
159 | CC_STATUS cc_prev_status; | |
160 | #endif | |
161 | ||
162 | /* Indexed by hardware reg number, is 1 if that register is ever | |
163 | used in the current function. | |
164 | ||
165 | In life_analysis, or in stupid_life_analysis, this is set | |
166 | up to record the hard regs used explicitly. Reload adds | |
167 | in the hard regs used for holding pseudo regs. Final uses | |
168 | it to generate the code in the function prologue and epilogue | |
169 | to save and restore registers as needed. */ | |
170 | ||
171 | char regs_ever_live[FIRST_PSEUDO_REGISTER]; | |
172 | ||
173 | /* Nonzero means current function must be given a frame pointer. | |
174 | Set in stmt.c if anything is allocated on the stack there. | |
175 | Set in reload1.c if anything is allocated on the stack there. */ | |
176 | ||
177 | int frame_pointer_needed; | |
178 | ||
18c038b9 | 179 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
180 | |
181 | static int block_depth; | |
182 | ||
183 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
184 | ||
185 | static int app_on; | |
186 | ||
187 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
188 | Zero otherwise. */ | |
189 | ||
190 | rtx final_sequence; | |
191 | ||
192 | #ifdef ASSEMBLER_DIALECT | |
193 | ||
194 | /* Number of the assembler dialect to use, starting at 0. */ | |
195 | static int dialect_number; | |
196 | #endif | |
197 | ||
198 | /* Indexed by line number, nonzero if there is a note for that line. */ | |
199 | ||
200 | static char *line_note_exists; | |
201 | ||
afe48e06 RH |
202 | #ifdef HAVE_conditional_execution |
203 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ | |
204 | rtx current_insn_predicate; | |
205 | #endif | |
206 | ||
1d300e19 | 207 | #ifdef HAVE_ATTR_length |
6cf9ac28 AJ |
208 | static int asm_insn_count (rtx); |
209 | #endif | |
210 | static void profile_function (FILE *); | |
211 | static void profile_after_prologue (FILE *); | |
212 | static bool notice_source_line (rtx); | |
213 | static rtx walk_alter_subreg (rtx *); | |
214 | static void output_asm_name (void); | |
215 | static void output_alternate_entry_point (FILE *, rtx); | |
216 | static tree get_mem_expr_from_op (rtx, int *); | |
217 | static void output_asm_operand_names (rtx *, int *, int); | |
218 | static void output_operand (rtx, int); | |
e9a25f70 | 219 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 220 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
221 | #endif |
222 | #ifdef HAVE_cc0 | |
6cf9ac28 | 223 | static int alter_cond (rtx); |
e9a25f70 | 224 | #endif |
ca3075bd | 225 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 226 | static int final_addr_vec_align (rtx); |
ca3075bd | 227 | #endif |
7bdb32b9 | 228 | #ifdef HAVE_ATTR_length |
6cf9ac28 | 229 | static int align_fuzz (rtx, rtx, int, unsigned); |
7bdb32b9 | 230 | #endif |
3cf2715d DE |
231 | \f |
232 | /* Initialize data in final at the beginning of a compilation. */ | |
233 | ||
234 | void | |
6cf9ac28 | 235 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 236 | { |
3cf2715d | 237 | app_on = 0; |
3cf2715d DE |
238 | final_sequence = 0; |
239 | ||
240 | #ifdef ASSEMBLER_DIALECT | |
241 | dialect_number = ASSEMBLER_DIALECT; | |
242 | #endif | |
243 | } | |
244 | ||
08c148a8 | 245 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 246 | |
08c148a8 NB |
247 | If not overridden for epilogue code, then the function body itself |
248 | contains return instructions wherever needed. */ | |
249 | void | |
6cf9ac28 AJ |
250 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
251 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
252 | { |
253 | } | |
254 | ||
b4c25db2 NB |
255 | /* Default target hook that outputs nothing to a stream. */ |
256 | void | |
6cf9ac28 | 257 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
258 | { |
259 | } | |
260 | ||
3cf2715d DE |
261 | /* Enable APP processing of subsequent output. |
262 | Used before the output from an `asm' statement. */ | |
263 | ||
264 | void | |
6cf9ac28 | 265 | app_enable (void) |
3cf2715d DE |
266 | { |
267 | if (! app_on) | |
268 | { | |
51723711 | 269 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
270 | app_on = 1; |
271 | } | |
272 | } | |
273 | ||
274 | /* Disable APP processing of subsequent output. | |
275 | Called from varasm.c before most kinds of output. */ | |
276 | ||
277 | void | |
6cf9ac28 | 278 | app_disable (void) |
3cf2715d DE |
279 | { |
280 | if (app_on) | |
281 | { | |
51723711 | 282 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
283 | app_on = 0; |
284 | } | |
285 | } | |
286 | \f | |
f5d927c0 | 287 | /* Return the number of slots filled in the current |
3cf2715d DE |
288 | delayed branch sequence (we don't count the insn needing the |
289 | delay slot). Zero if not in a delayed branch sequence. */ | |
290 | ||
291 | #ifdef DELAY_SLOTS | |
292 | int | |
6cf9ac28 | 293 | dbr_sequence_length (void) |
3cf2715d DE |
294 | { |
295 | if (final_sequence != 0) | |
296 | return XVECLEN (final_sequence, 0) - 1; | |
297 | else | |
298 | return 0; | |
299 | } | |
300 | #endif | |
301 | \f | |
302 | /* The next two pages contain routines used to compute the length of an insn | |
303 | and to shorten branches. */ | |
304 | ||
305 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
306 | `insn_current_length'. */ | |
307 | ||
addd7df6 | 308 | static int *insn_lengths; |
9d98a694 | 309 | |
9d98a694 | 310 | varray_type insn_addresses_; |
3cf2715d | 311 | |
ea3cbda5 R |
312 | /* Max uid for which the above arrays are valid. */ |
313 | static int insn_lengths_max_uid; | |
314 | ||
3cf2715d DE |
315 | /* Address of insn being processed. Used by `insn_current_length'. */ |
316 | int insn_current_address; | |
317 | ||
fc470718 R |
318 | /* Address of insn being processed in previous iteration. */ |
319 | int insn_last_address; | |
320 | ||
d6a7951f | 321 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
322 | int insn_current_align; |
323 | ||
95707627 R |
324 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
325 | gives the next following alignment insn that increases the known | |
326 | alignment, or NULL_RTX if there is no such insn. | |
327 | For any alignment obtained this way, we can again index uid_align with | |
328 | its uid to obtain the next following align that in turn increases the | |
329 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
330 | for each insn we'll call the alignment chain of this insn in the following | |
331 | comments. */ | |
332 | ||
f5d927c0 KH |
333 | struct label_alignment |
334 | { | |
9e423e6d JW |
335 | short alignment; |
336 | short max_skip; | |
337 | }; | |
338 | ||
339 | static rtx *uid_align; | |
340 | static int *uid_shuid; | |
341 | static struct label_alignment *label_align; | |
95707627 | 342 | |
3cf2715d DE |
343 | /* Indicate that branch shortening hasn't yet been done. */ |
344 | ||
345 | void | |
6cf9ac28 | 346 | init_insn_lengths (void) |
3cf2715d | 347 | { |
95707627 R |
348 | if (uid_shuid) |
349 | { | |
350 | free (uid_shuid); | |
351 | uid_shuid = 0; | |
352 | } | |
353 | if (insn_lengths) | |
354 | { | |
355 | free (insn_lengths); | |
356 | insn_lengths = 0; | |
ea3cbda5 | 357 | insn_lengths_max_uid = 0; |
95707627 | 358 | } |
9d98a694 AO |
359 | #ifdef HAVE_ATTR_length |
360 | INSN_ADDRESSES_FREE (); | |
361 | #endif | |
95707627 R |
362 | if (uid_align) |
363 | { | |
364 | free (uid_align); | |
365 | uid_align = 0; | |
366 | } | |
3cf2715d DE |
367 | } |
368 | ||
369 | /* Obtain the current length of an insn. If branch shortening has been done, | |
370 | get its actual length. Otherwise, get its maximum length. */ | |
371 | ||
372 | int | |
6cf9ac28 | 373 | get_attr_length (rtx insn ATTRIBUTE_UNUSED) |
3cf2715d DE |
374 | { |
375 | #ifdef HAVE_ATTR_length | |
376 | rtx body; | |
377 | int i; | |
378 | int length = 0; | |
379 | ||
ea3cbda5 | 380 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
381 | return insn_lengths[INSN_UID (insn)]; |
382 | else | |
383 | switch (GET_CODE (insn)) | |
384 | { | |
385 | case NOTE: | |
386 | case BARRIER: | |
387 | case CODE_LABEL: | |
388 | return 0; | |
389 | ||
390 | case CALL_INSN: | |
391 | length = insn_default_length (insn); | |
392 | break; | |
393 | ||
394 | case JUMP_INSN: | |
395 | body = PATTERN (insn); | |
dd3f0101 | 396 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) |
3cf2715d | 397 | { |
fc470718 R |
398 | /* Alignment is machine-dependent and should be handled by |
399 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
400 | } |
401 | else | |
402 | length = insn_default_length (insn); | |
403 | break; | |
404 | ||
405 | case INSN: | |
406 | body = PATTERN (insn); | |
407 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
408 | return 0; | |
409 | ||
410 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
411 | length = asm_insn_count (body) * insn_default_length (insn); | |
412 | else if (GET_CODE (body) == SEQUENCE) | |
413 | for (i = 0; i < XVECLEN (body, 0); i++) | |
414 | length += get_attr_length (XVECEXP (body, 0, i)); | |
415 | else | |
416 | length = insn_default_length (insn); | |
e9a25f70 JL |
417 | break; |
418 | ||
419 | default: | |
420 | break; | |
3cf2715d DE |
421 | } |
422 | ||
423 | #ifdef ADJUST_INSN_LENGTH | |
424 | ADJUST_INSN_LENGTH (insn, length); | |
425 | #endif | |
426 | return length; | |
427 | #else /* not HAVE_ATTR_length */ | |
428 | return 0; | |
429 | #endif /* not HAVE_ATTR_length */ | |
430 | } | |
431 | \f | |
fc470718 R |
432 | /* Code to handle alignment inside shorten_branches. */ |
433 | ||
434 | /* Here is an explanation how the algorithm in align_fuzz can give | |
435 | proper results: | |
436 | ||
437 | Call a sequence of instructions beginning with alignment point X | |
438 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 439 | is used in an expression, it means the alignment value of the |
fc470718 | 440 | alignment point. |
f5d927c0 | 441 | |
fc470718 R |
442 | Call the distance between the start of the first insn of block X, and |
443 | the end of the last insn of block X `IX', for the `inner size of X'. | |
444 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 445 | |
fc470718 R |
446 | Likewise with the next alignment-delimited block following X, which we |
447 | shall call block Y. | |
f5d927c0 | 448 | |
fc470718 R |
449 | Call the distance between the start of the first insn of block X, and |
450 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 451 | |
fc470718 | 452 | The estimated padding is then OX - IX. |
f5d927c0 | 453 | |
fc470718 | 454 | OX can be safely estimated as |
f5d927c0 | 455 | |
fc470718 R |
456 | if (X >= Y) |
457 | OX = round_up(IX, Y) | |
458 | else | |
459 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 460 | |
fc470718 R |
461 | Clearly est(IX) >= real(IX), because that only depends on the |
462 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 463 | |
fc470718 R |
464 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
465 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 466 | |
fc470718 R |
467 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
468 | for branch ranges starting before X, so we can just round what we have. | |
469 | But when X < Y, we don't know anything about the, so to speak, | |
470 | `middle bits', so we have to assume the worst when aligning up from an | |
471 | address mod X to one mod Y, which is Y - X. */ | |
472 | ||
473 | #ifndef LABEL_ALIGN | |
efa3896a | 474 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
475 | #endif |
476 | ||
9e423e6d | 477 | #ifndef LABEL_ALIGN_MAX_SKIP |
2cca7283 | 478 | #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip |
9e423e6d JW |
479 | #endif |
480 | ||
fc470718 | 481 | #ifndef LOOP_ALIGN |
efa3896a | 482 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
483 | #endif |
484 | ||
9e423e6d | 485 | #ifndef LOOP_ALIGN_MAX_SKIP |
2cca7283 | 486 | #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip |
9e423e6d JW |
487 | #endif |
488 | ||
fc470718 | 489 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
340f7e7c | 490 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
491 | #endif |
492 | ||
9e423e6d | 493 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
247a370b JH |
494 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 |
495 | #endif | |
496 | ||
497 | #ifndef JUMP_ALIGN | |
498 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
499 | #endif | |
500 | ||
501 | #ifndef JUMP_ALIGN_MAX_SKIP | |
2cca7283 | 502 | #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip |
9e423e6d JW |
503 | #endif |
504 | ||
fc470718 | 505 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 506 | static int |
6cf9ac28 | 507 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 508 | { |
2a841588 | 509 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
510 | |
511 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
512 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 513 | return exact_log2 (align); |
fc470718 R |
514 | |
515 | } | |
f5d927c0 | 516 | |
fc470718 R |
517 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
518 | #endif | |
519 | ||
520 | #ifndef INSN_LENGTH_ALIGNMENT | |
521 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
522 | #endif | |
523 | ||
fc470718 R |
524 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
525 | ||
de7987a6 | 526 | static int min_labelno, max_labelno; |
fc470718 R |
527 | |
528 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
529 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
530 | ||
531 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
532 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
533 | |
534 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 535 | |
fc470718 | 536 | int |
6cf9ac28 | 537 | label_to_alignment (rtx label) |
fc470718 R |
538 | { |
539 | return LABEL_TO_ALIGNMENT (label); | |
540 | } | |
541 | ||
542 | #ifdef HAVE_ATTR_length | |
543 | /* The differences in addresses | |
544 | between a branch and its target might grow or shrink depending on | |
545 | the alignment the start insn of the range (the branch for a forward | |
546 | branch or the label for a backward branch) starts out on; if these | |
547 | differences are used naively, they can even oscillate infinitely. | |
548 | We therefore want to compute a 'worst case' address difference that | |
549 | is independent of the alignment the start insn of the range end | |
550 | up on, and that is at least as large as the actual difference. | |
551 | The function align_fuzz calculates the amount we have to add to the | |
552 | naively computed difference, by traversing the part of the alignment | |
553 | chain of the start insn of the range that is in front of the end insn | |
554 | of the range, and considering for each alignment the maximum amount | |
555 | that it might contribute to a size increase. | |
556 | ||
557 | For casesi tables, we also want to know worst case minimum amounts of | |
558 | address difference, in case a machine description wants to introduce | |
559 | some common offset that is added to all offsets in a table. | |
d6a7951f | 560 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
561 | appropriate adjustment. */ |
562 | ||
fc470718 R |
563 | /* Compute the maximum delta by which the difference of the addresses of |
564 | START and END might grow / shrink due to a different address for start | |
565 | which changes the size of alignment insns between START and END. | |
566 | KNOWN_ALIGN_LOG is the alignment known for START. | |
567 | GROWTH should be ~0 if the objective is to compute potential code size | |
568 | increase, and 0 if the objective is to compute potential shrink. | |
569 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 570 | |
ca3075bd | 571 | static int |
6cf9ac28 | 572 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
573 | { |
574 | int uid = INSN_UID (start); | |
575 | rtx align_label; | |
576 | int known_align = 1 << known_align_log; | |
577 | int end_shuid = INSN_SHUID (end); | |
578 | int fuzz = 0; | |
579 | ||
580 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
581 | { | |
582 | int align_addr, new_align; | |
583 | ||
584 | uid = INSN_UID (align_label); | |
9d98a694 | 585 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
586 | if (uid_shuid[uid] > end_shuid) |
587 | break; | |
588 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
589 | new_align = 1 << known_align_log; | |
590 | if (new_align < known_align) | |
591 | continue; | |
592 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
593 | known_align = new_align; | |
594 | } | |
595 | return fuzz; | |
596 | } | |
597 | ||
598 | /* Compute a worst-case reference address of a branch so that it | |
599 | can be safely used in the presence of aligned labels. Since the | |
600 | size of the branch itself is unknown, the size of the branch is | |
601 | not included in the range. I.e. for a forward branch, the reference | |
602 | address is the end address of the branch as known from the previous | |
603 | branch shortening pass, minus a value to account for possible size | |
604 | increase due to alignment. For a backward branch, it is the start | |
605 | address of the branch as known from the current pass, plus a value | |
606 | to account for possible size increase due to alignment. | |
607 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
608 | to exclude the branch size. */ | |
f5d927c0 | 609 | |
fc470718 | 610 | int |
6cf9ac28 | 611 | insn_current_reference_address (rtx branch) |
fc470718 | 612 | { |
5527bf14 RH |
613 | rtx dest, seq; |
614 | int seq_uid; | |
615 | ||
616 | if (! INSN_ADDRESSES_SET_P ()) | |
617 | return 0; | |
618 | ||
619 | seq = NEXT_INSN (PREV_INSN (branch)); | |
620 | seq_uid = INSN_UID (seq); | |
fc470718 R |
621 | if (GET_CODE (branch) != JUMP_INSN) |
622 | /* This can happen for example on the PA; the objective is to know the | |
623 | offset to address something in front of the start of the function. | |
624 | Thus, we can treat it like a backward branch. | |
625 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
626 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
627 | return insn_current_address; | |
628 | dest = JUMP_LABEL (branch); | |
5527bf14 | 629 | |
b9f22704 | 630 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
631 | BRANCH also has no INSN_SHUID. */ |
632 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 633 | { |
f5d927c0 | 634 | /* Forward branch. */ |
fc470718 | 635 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 636 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
637 | } |
638 | else | |
639 | { | |
f5d927c0 | 640 | /* Backward branch. */ |
fc470718 | 641 | return (insn_current_address |
923f7cf9 | 642 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
643 | } |
644 | } | |
645 | #endif /* HAVE_ATTR_length */ | |
646 | \f | |
247a370b | 647 | void |
6cf9ac28 | 648 | compute_alignments (void) |
247a370b | 649 | { |
247a370b | 650 | int log, max_skip, max_log; |
e0082a72 | 651 | basic_block bb; |
247a370b JH |
652 | |
653 | if (label_align) | |
654 | { | |
655 | free (label_align); | |
656 | label_align = 0; | |
657 | } | |
658 | ||
659 | max_labelno = max_label_num (); | |
660 | min_labelno = get_first_label_num (); | |
703ad42b KG |
661 | label_align = xcalloc (max_labelno - min_labelno + 1, |
662 | sizeof (struct label_alignment)); | |
247a370b JH |
663 | |
664 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
ba712955 | 665 | if (! optimize || optimize_size) |
247a370b JH |
666 | return; |
667 | ||
e0082a72 | 668 | FOR_EACH_BB (bb) |
247a370b | 669 | { |
247a370b JH |
670 | rtx label = bb->head; |
671 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; | |
672 | edge e; | |
673 | ||
66b4e478 JH |
674 | if (GET_CODE (label) != CODE_LABEL |
675 | || probably_never_executed_bb_p (bb)) | |
247a370b JH |
676 | continue; |
677 | max_log = LABEL_ALIGN (label); | |
678 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
679 | ||
680 | for (e = bb->pred; e; e = e->pred_next) | |
681 | { | |
682 | if (e->flags & EDGE_FALLTHRU) | |
683 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
684 | else | |
685 | branch_frequency += EDGE_FREQUENCY (e); | |
686 | } | |
687 | ||
f63d1bf7 | 688 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 689 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 690 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
691 | (so it does not need to be in the cache). |
692 | ||
693 | We to catch first case, we align frequently executed blocks. | |
694 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 695 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
696 | when function is called. */ |
697 | ||
698 | if (!has_fallthru | |
699 | && (branch_frequency > BB_FREQ_MAX / 10 | |
f6366fc7 ZD |
700 | || (bb->frequency > bb->prev_bb->frequency * 10 |
701 | && (bb->prev_bb->frequency | |
247a370b JH |
702 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
703 | { | |
704 | log = JUMP_ALIGN (label); | |
705 | if (max_log < log) | |
706 | { | |
707 | max_log = log; | |
708 | max_skip = JUMP_ALIGN_MAX_SKIP; | |
709 | } | |
710 | } | |
711 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 712 | align it. It is most likely a first block of loop. */ |
247a370b | 713 | if (has_fallthru |
66b4e478 | 714 | && maybe_hot_bb_p (bb) |
247a370b | 715 | && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10 |
1877be45 | 716 | && branch_frequency > fallthru_frequency * 2) |
247a370b JH |
717 | { |
718 | log = LOOP_ALIGN (label); | |
719 | if (max_log < log) | |
720 | { | |
721 | max_log = log; | |
722 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
723 | } | |
724 | } | |
725 | LABEL_TO_ALIGNMENT (label) = max_log; | |
726 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
727 | } | |
728 | } | |
729 | \f | |
3cf2715d DE |
730 | /* Make a pass over all insns and compute their actual lengths by shortening |
731 | any branches of variable length if possible. */ | |
732 | ||
733 | /* Give a default value for the lowest address in a function. */ | |
734 | ||
735 | #ifndef FIRST_INSN_ADDRESS | |
736 | #define FIRST_INSN_ADDRESS 0 | |
737 | #endif | |
738 | ||
fc470718 R |
739 | /* shorten_branches might be called multiple times: for example, the SH |
740 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
741 | In order to do this, it needs proper length information, which it obtains | |
742 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 743 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
744 | reorg.c, since the branch splitting exposes new instructions with delay |
745 | slots. */ | |
746 | ||
3cf2715d | 747 | void |
6cf9ac28 | 748 | shorten_branches (rtx first ATTRIBUTE_UNUSED) |
3cf2715d | 749 | { |
3cf2715d | 750 | rtx insn; |
fc470718 R |
751 | int max_uid; |
752 | int i; | |
fc470718 | 753 | int max_log; |
9e423e6d | 754 | int max_skip; |
fc470718 R |
755 | #ifdef HAVE_ATTR_length |
756 | #define MAX_CODE_ALIGN 16 | |
757 | rtx seq; | |
3cf2715d | 758 | int something_changed = 1; |
3cf2715d DE |
759 | char *varying_length; |
760 | rtx body; | |
761 | int uid; | |
fc470718 | 762 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 763 | |
fc470718 | 764 | #endif |
3d14e82f | 765 | |
3446405d JH |
766 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
767 | max_uid = get_max_uid (); | |
d9b6874b | 768 | |
703ad42b | 769 | uid_shuid = xmalloc (max_uid * sizeof *uid_shuid); |
25e22dc0 | 770 | |
247a370b JH |
771 | if (max_labelno != max_label_num ()) |
772 | { | |
773 | int old = max_labelno; | |
774 | int n_labels; | |
775 | int n_old_labels; | |
776 | ||
777 | max_labelno = max_label_num (); | |
778 | ||
779 | n_labels = max_labelno - min_labelno + 1; | |
780 | n_old_labels = old - min_labelno + 1; | |
781 | ||
703ad42b KG |
782 | label_align = xrealloc (label_align, |
783 | n_labels * sizeof (struct label_alignment)); | |
247a370b JH |
784 | |
785 | /* Range of labels grows monotonically in the function. Abort here | |
786 | means that the initialization of array got lost. */ | |
787 | if (n_old_labels > n_labels) | |
788 | abort (); | |
789 | ||
790 | memset (label_align + n_old_labels, 0, | |
791 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
792 | } | |
793 | ||
fc470718 R |
794 | /* Initialize label_align and set up uid_shuid to be strictly |
795 | monotonically rising with insn order. */ | |
e2faec75 R |
796 | /* We use max_log here to keep track of the maximum alignment we want to |
797 | impose on the next CODE_LABEL (or the current one if we are processing | |
798 | the CODE_LABEL itself). */ | |
f5d927c0 | 799 | |
9e423e6d JW |
800 | max_log = 0; |
801 | max_skip = 0; | |
802 | ||
803 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
804 | { |
805 | int log; | |
806 | ||
807 | INSN_SHUID (insn) = i++; | |
2c3c49de | 808 | if (INSN_P (insn)) |
e2faec75 R |
809 | { |
810 | /* reorg might make the first insn of a loop being run once only, | |
811 | and delete the label in front of it. Then we want to apply | |
812 | the loop alignment to the new label created by reorg, which | |
813 | is separated by the former loop start insn from the | |
814 | NOTE_INSN_LOOP_BEG. */ | |
815 | } | |
fc470718 R |
816 | else if (GET_CODE (insn) == CODE_LABEL) |
817 | { | |
818 | rtx next; | |
ff81832f | 819 | |
247a370b JH |
820 | /* Merge in alignments computed by compute_alignments. */ |
821 | log = LABEL_TO_ALIGNMENT (insn); | |
822 | if (max_log < log) | |
823 | { | |
824 | max_log = log; | |
825 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
826 | } | |
fc470718 R |
827 | |
828 | log = LABEL_ALIGN (insn); | |
829 | if (max_log < log) | |
9e423e6d JW |
830 | { |
831 | max_log = log; | |
832 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
833 | } | |
fc470718 | 834 | next = NEXT_INSN (insn); |
75197b37 BS |
835 | /* ADDR_VECs only take room if read-only data goes into the text |
836 | section. */ | |
d48bc59a | 837 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
838 | if (next && GET_CODE (next) == JUMP_INSN) |
839 | { | |
840 | rtx nextbody = PATTERN (next); | |
841 | if (GET_CODE (nextbody) == ADDR_VEC | |
842 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
843 | { | |
844 | log = ADDR_VEC_ALIGN (next); | |
845 | if (max_log < log) | |
846 | { | |
847 | max_log = log; | |
848 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
849 | } | |
850 | } | |
851 | } | |
fc470718 | 852 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 853 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 854 | max_log = 0; |
9e423e6d | 855 | max_skip = 0; |
fc470718 R |
856 | } |
857 | else if (GET_CODE (insn) == BARRIER) | |
858 | { | |
859 | rtx label; | |
860 | ||
2c3c49de | 861 | for (label = insn; label && ! INSN_P (label); |
fc470718 R |
862 | label = NEXT_INSN (label)) |
863 | if (GET_CODE (label) == CODE_LABEL) | |
864 | { | |
865 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
866 | if (max_log < log) | |
9e423e6d JW |
867 | { |
868 | max_log = log; | |
869 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
870 | } | |
fc470718 R |
871 | break; |
872 | } | |
873 | } | |
fc470718 R |
874 | } |
875 | #ifdef HAVE_ATTR_length | |
876 | ||
877 | /* Allocate the rest of the arrays. */ | |
703ad42b | 878 | insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths)); |
ea3cbda5 | 879 | insn_lengths_max_uid = max_uid; |
af035616 R |
880 | /* Syntax errors can lead to labels being outside of the main insn stream. |
881 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 882 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 883 | |
703ad42b | 884 | varying_length = xcalloc (max_uid, sizeof (char)); |
fc470718 R |
885 | |
886 | /* Initialize uid_align. We scan instructions | |
887 | from end to start, and keep in align_tab[n] the last seen insn | |
888 | that does an alignment of at least n+1, i.e. the successor | |
889 | in the alignment chain for an insn that does / has a known | |
890 | alignment of n. */ | |
703ad42b | 891 | uid_align = xcalloc (max_uid, sizeof *uid_align); |
fc470718 | 892 | |
f5d927c0 | 893 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
894 | align_tab[i] = NULL_RTX; |
895 | seq = get_last_insn (); | |
33f7f353 | 896 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
897 | { |
898 | int uid = INSN_UID (seq); | |
899 | int log; | |
fc470718 R |
900 | log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0); |
901 | uid_align[uid] = align_tab[0]; | |
fc470718 R |
902 | if (log) |
903 | { | |
904 | /* Found an alignment label. */ | |
905 | uid_align[uid] = align_tab[log]; | |
906 | for (i = log - 1; i >= 0; i--) | |
907 | align_tab[i] = seq; | |
908 | } | |
33f7f353 JR |
909 | } |
910 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
911 | if (optimize) | |
912 | { | |
913 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
914 | label fields. */ | |
915 | ||
916 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
917 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
918 | int rel; | |
919 | ||
920 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 921 | { |
33f7f353 JR |
922 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
923 | int len, i, min, max, insn_shuid; | |
924 | int min_align; | |
925 | addr_diff_vec_flags flags; | |
926 | ||
927 | if (GET_CODE (insn) != JUMP_INSN | |
928 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) | |
929 | continue; | |
930 | pat = PATTERN (insn); | |
931 | len = XVECLEN (pat, 1); | |
932 | if (len <= 0) | |
933 | abort (); | |
934 | min_align = MAX_CODE_ALIGN; | |
935 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
936 | { | |
937 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
938 | int shuid = INSN_SHUID (lab); | |
939 | if (shuid < min) | |
940 | { | |
941 | min = shuid; | |
942 | min_lab = lab; | |
943 | } | |
944 | if (shuid > max) | |
945 | { | |
946 | max = shuid; | |
947 | max_lab = lab; | |
948 | } | |
949 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
950 | min_align = LABEL_TO_ALIGNMENT (lab); | |
951 | } | |
952 | XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab); | |
953 | XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab); | |
954 | insn_shuid = INSN_SHUID (insn); | |
955 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
956 | flags.min_align = min_align; | |
957 | flags.base_after_vec = rel > insn_shuid; | |
958 | flags.min_after_vec = min > insn_shuid; | |
959 | flags.max_after_vec = max > insn_shuid; | |
960 | flags.min_after_base = min > rel; | |
961 | flags.max_after_base = max > rel; | |
962 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
963 | } |
964 | } | |
33f7f353 | 965 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 966 | |
3cf2715d DE |
967 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
968 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; | |
969 | insn != 0; | |
970 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
971 | { | |
972 | uid = INSN_UID (insn); | |
fc470718 | 973 | |
3cf2715d | 974 | insn_lengths[uid] = 0; |
fc470718 R |
975 | |
976 | if (GET_CODE (insn) == CODE_LABEL) | |
977 | { | |
978 | int log = LABEL_TO_ALIGNMENT (insn); | |
979 | if (log) | |
980 | { | |
981 | int align = 1 << log; | |
ecb06768 | 982 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 983 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
984 | } |
985 | } | |
986 | ||
5a09edba | 987 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 988 | |
3cf2715d DE |
989 | if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER |
990 | || GET_CODE (insn) == CODE_LABEL) | |
991 | continue; | |
04da53bd R |
992 | if (INSN_DELETED_P (insn)) |
993 | continue; | |
3cf2715d DE |
994 | |
995 | body = PATTERN (insn); | |
996 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
997 | { |
998 | /* This only takes room if read-only data goes into the text | |
999 | section. */ | |
d48bc59a | 1000 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
1001 | insn_lengths[uid] = (XVECLEN (body, |
1002 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1003 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1004 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1005 | } |
a30caf5c | 1006 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1007 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1008 | else if (GET_CODE (body) == SEQUENCE) | |
1009 | { | |
1010 | int i; | |
1011 | int const_delay_slots; | |
1012 | #ifdef DELAY_SLOTS | |
1013 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1014 | #else | |
1015 | const_delay_slots = 0; | |
1016 | #endif | |
1017 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1018 | if the shortening could change the number of delay slots | |
0f41302f | 1019 | of the branch. */ |
3cf2715d DE |
1020 | for (i = 0; i < XVECLEN (body, 0); i++) |
1021 | { | |
1022 | rtx inner_insn = XVECEXP (body, 0, i); | |
1023 | int inner_uid = INSN_UID (inner_insn); | |
1024 | int inner_length; | |
1025 | ||
a30caf5c DC |
1026 | if (GET_CODE (body) == ASM_INPUT |
1027 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1028 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1029 | * insn_default_length (inner_insn)); | |
1030 | else | |
1031 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1032 | |
3cf2715d DE |
1033 | insn_lengths[inner_uid] = inner_length; |
1034 | if (const_delay_slots) | |
1035 | { | |
1036 | if ((varying_length[inner_uid] | |
1037 | = insn_variable_length_p (inner_insn)) != 0) | |
1038 | varying_length[uid] = 1; | |
9d98a694 AO |
1039 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1040 | + insn_lengths[uid]); | |
3cf2715d DE |
1041 | } |
1042 | else | |
1043 | varying_length[inner_uid] = 0; | |
1044 | insn_lengths[uid] += inner_length; | |
1045 | } | |
1046 | } | |
1047 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1048 | { | |
1049 | insn_lengths[uid] = insn_default_length (insn); | |
1050 | varying_length[uid] = insn_variable_length_p (insn); | |
1051 | } | |
1052 | ||
1053 | /* If needed, do any adjustment. */ | |
1054 | #ifdef ADJUST_INSN_LENGTH | |
1055 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1056 | if (insn_lengths[uid] < 0) |
c725bd79 | 1057 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1058 | #endif |
1059 | } | |
1060 | ||
1061 | /* Now loop over all the insns finding varying length insns. For each, | |
1062 | get the current insn length. If it has changed, reflect the change. | |
1063 | When nothing changes for a full pass, we are done. */ | |
1064 | ||
1065 | while (something_changed) | |
1066 | { | |
1067 | something_changed = 0; | |
fc470718 | 1068 | insn_current_align = MAX_CODE_ALIGN - 1; |
3cf2715d DE |
1069 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; |
1070 | insn != 0; | |
1071 | insn = NEXT_INSN (insn)) | |
1072 | { | |
1073 | int new_length; | |
b729186a | 1074 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1075 | int tmp_length; |
b729186a | 1076 | #endif |
fc470718 | 1077 | int length_align; |
3cf2715d DE |
1078 | |
1079 | uid = INSN_UID (insn); | |
fc470718 R |
1080 | |
1081 | if (GET_CODE (insn) == CODE_LABEL) | |
1082 | { | |
1083 | int log = LABEL_TO_ALIGNMENT (insn); | |
1084 | if (log > insn_current_align) | |
1085 | { | |
1086 | int align = 1 << log; | |
ecb06768 | 1087 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1088 | insn_lengths[uid] = new_address - insn_current_address; |
1089 | insn_current_align = log; | |
1090 | insn_current_address = new_address; | |
1091 | } | |
1092 | else | |
1093 | insn_lengths[uid] = 0; | |
9d98a694 | 1094 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1095 | continue; |
1096 | } | |
1097 | ||
1098 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1099 | if (length_align < insn_current_align) | |
1100 | insn_current_align = length_align; | |
1101 | ||
9d98a694 AO |
1102 | insn_last_address = INSN_ADDRESSES (uid); |
1103 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1104 | |
5e75ef4a | 1105 | #ifdef CASE_VECTOR_SHORTEN_MODE |
33f7f353 JR |
1106 | if (optimize && GET_CODE (insn) == JUMP_INSN |
1107 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
1108 | { | |
33f7f353 JR |
1109 | rtx body = PATTERN (insn); |
1110 | int old_length = insn_lengths[uid]; | |
1111 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1112 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1113 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1114 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1115 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1116 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1117 | rtx prev; |
1118 | int rel_align = 0; | |
950a3816 KG |
1119 | addr_diff_vec_flags flags; |
1120 | ||
1121 | /* Avoid automatic aggregate initialization. */ | |
1122 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1123 | |
1124 | /* Try to find a known alignment for rel_lab. */ | |
1125 | for (prev = rel_lab; | |
1126 | prev | |
1127 | && ! insn_lengths[INSN_UID (prev)] | |
1128 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1129 | prev = PREV_INSN (prev)) | |
1130 | if (varying_length[INSN_UID (prev)] & 2) | |
1131 | { | |
1132 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1133 | break; | |
1134 | } | |
1135 | ||
1136 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1137 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1138 | /* Anything after INSN has still addresses from the last | |
1139 | pass; adjust these so that they reflect our current | |
1140 | estimate for this pass. */ | |
1141 | if (flags.base_after_vec) | |
1142 | rel_addr += insn_current_address - insn_last_address; | |
1143 | if (flags.min_after_vec) | |
1144 | min_addr += insn_current_address - insn_last_address; | |
1145 | if (flags.max_after_vec) | |
1146 | max_addr += insn_current_address - insn_last_address; | |
1147 | /* We want to know the worst case, i.e. lowest possible value | |
1148 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1149 | its offset is positive, and we have to be wary of code shrink; | |
1150 | otherwise, it is negative, and we have to be vary of code | |
1151 | size increase. */ | |
1152 | if (flags.min_after_base) | |
1153 | { | |
1154 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1155 | changes we are about to make can change the alignment | |
1156 | within the observed offset, therefore we have to break | |
1157 | it up into two parts that are independent. */ | |
1158 | if (! flags.base_after_vec && flags.min_after_vec) | |
1159 | { | |
1160 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1161 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1162 | } | |
1163 | else | |
1164 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1165 | } | |
1166 | else | |
1167 | { | |
1168 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1169 | { | |
1170 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1171 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1172 | } | |
1173 | else | |
1174 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1175 | } | |
1176 | /* Likewise, determine the highest lowest possible value | |
1177 | for the offset of MAX_LAB. */ | |
1178 | if (flags.max_after_base) | |
1179 | { | |
1180 | if (! flags.base_after_vec && flags.max_after_vec) | |
1181 | { | |
1182 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1183 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1184 | } | |
1185 | else | |
1186 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1187 | } | |
1188 | else | |
1189 | { | |
1190 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1191 | { | |
1192 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1193 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1194 | } | |
1195 | else | |
1196 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1197 | } | |
1198 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1199 | max_addr - rel_addr, | |
1200 | body)); | |
d48bc59a | 1201 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
1202 | { |
1203 | insn_lengths[uid] | |
1204 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1205 | insn_current_address += insn_lengths[uid]; | |
1206 | if (insn_lengths[uid] != old_length) | |
1207 | something_changed = 1; | |
1208 | } | |
1209 | ||
33f7f353 | 1210 | continue; |
33f7f353 | 1211 | } |
5e75ef4a JL |
1212 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1213 | ||
1214 | if (! (varying_length[uid])) | |
3cf2715d | 1215 | { |
674fc07d GS |
1216 | if (GET_CODE (insn) == INSN |
1217 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1218 | { | |
1219 | int i; | |
1220 | ||
1221 | body = PATTERN (insn); | |
1222 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1223 | { | |
1224 | rtx inner_insn = XVECEXP (body, 0, i); | |
1225 | int inner_uid = INSN_UID (inner_insn); | |
1226 | ||
1227 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1228 | ||
1229 | insn_current_address += insn_lengths[inner_uid]; | |
1230 | } | |
dd3f0101 | 1231 | } |
674fc07d GS |
1232 | else |
1233 | insn_current_address += insn_lengths[uid]; | |
1234 | ||
3cf2715d DE |
1235 | continue; |
1236 | } | |
674fc07d | 1237 | |
3cf2715d DE |
1238 | if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1239 | { | |
1240 | int i; | |
f5d927c0 | 1241 | |
3cf2715d DE |
1242 | body = PATTERN (insn); |
1243 | new_length = 0; | |
1244 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1245 | { | |
1246 | rtx inner_insn = XVECEXP (body, 0, i); | |
1247 | int inner_uid = INSN_UID (inner_insn); | |
1248 | int inner_length; | |
1249 | ||
9d98a694 | 1250 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1251 | |
1252 | /* insn_current_length returns 0 for insns with a | |
1253 | non-varying length. */ | |
1254 | if (! varying_length[inner_uid]) | |
1255 | inner_length = insn_lengths[inner_uid]; | |
1256 | else | |
1257 | inner_length = insn_current_length (inner_insn); | |
1258 | ||
1259 | if (inner_length != insn_lengths[inner_uid]) | |
1260 | { | |
1261 | insn_lengths[inner_uid] = inner_length; | |
1262 | something_changed = 1; | |
1263 | } | |
1264 | insn_current_address += insn_lengths[inner_uid]; | |
1265 | new_length += inner_length; | |
1266 | } | |
1267 | } | |
1268 | else | |
1269 | { | |
1270 | new_length = insn_current_length (insn); | |
1271 | insn_current_address += new_length; | |
1272 | } | |
1273 | ||
3cf2715d DE |
1274 | #ifdef ADJUST_INSN_LENGTH |
1275 | /* If needed, do any adjustment. */ | |
1276 | tmp_length = new_length; | |
1277 | ADJUST_INSN_LENGTH (insn, new_length); | |
1278 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1279 | #endif |
1280 | ||
1281 | if (new_length != insn_lengths[uid]) | |
1282 | { | |
1283 | insn_lengths[uid] = new_length; | |
1284 | something_changed = 1; | |
1285 | } | |
1286 | } | |
bb4aaf18 TG |
1287 | /* For a non-optimizing compile, do only a single pass. */ |
1288 | if (!optimize) | |
1289 | break; | |
3cf2715d | 1290 | } |
fc470718 R |
1291 | |
1292 | free (varying_length); | |
1293 | ||
3cf2715d DE |
1294 | #endif /* HAVE_ATTR_length */ |
1295 | } | |
1296 | ||
1297 | #ifdef HAVE_ATTR_length | |
1298 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1299 | the number of machine instructions likely to be generated for this insn. | |
1300 | This is used to compute its length. */ | |
1301 | ||
1302 | static int | |
6cf9ac28 | 1303 | asm_insn_count (rtx body) |
3cf2715d | 1304 | { |
3cce094d | 1305 | const char *template; |
3cf2715d DE |
1306 | int count = 1; |
1307 | ||
5d0930ea DE |
1308 | if (GET_CODE (body) == ASM_INPUT) |
1309 | template = XSTR (body, 0); | |
1310 | else | |
df4ae160 | 1311 | template = decode_asm_operands (body, NULL, NULL, NULL, NULL); |
5d0930ea | 1312 | |
f5d927c0 KH |
1313 | for (; *template; template++) |
1314 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') | |
3cf2715d DE |
1315 | count++; |
1316 | ||
1317 | return count; | |
1318 | } | |
1319 | #endif | |
1320 | \f | |
1321 | /* Output assembler code for the start of a function, | |
1322 | and initialize some of the variables in this file | |
1323 | for the new function. The label for the function and associated | |
1324 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1325 | ||
1326 | FIRST is the first insn of the rtl for the function being compiled. | |
1327 | FILE is the file to write assembler code to. | |
1328 | OPTIMIZE is nonzero if we should eliminate redundant | |
1329 | test and compare insns. */ | |
1330 | ||
1331 | void | |
6cf9ac28 AJ |
1332 | final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, |
1333 | int optimize ATTRIBUTE_UNUSED) | |
3cf2715d DE |
1334 | { |
1335 | block_depth = 0; | |
1336 | ||
1337 | this_is_asm_operands = 0; | |
1338 | ||
1339 | #ifdef NON_SAVING_SETJMP | |
1340 | /* A function that calls setjmp should save and restore all the | |
1341 | call-saved registers on a system where longjmp clobbers them. */ | |
1342 | if (NON_SAVING_SETJMP && current_function_calls_setjmp) | |
1343 | { | |
1344 | int i; | |
1345 | ||
1346 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
252f342a | 1347 | if (!call_used_regs[i]) |
3cf2715d DE |
1348 | regs_ever_live[i] = 1; |
1349 | } | |
1350 | #endif | |
f5d927c0 | 1351 | |
9ae130f8 JH |
1352 | last_filename = locator_file (prologue_locator); |
1353 | last_linenum = locator_line (prologue_locator); | |
1354 | ||
653e276c | 1355 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1356 | |
653e276c | 1357 | (*debug_hooks->begin_prologue) (last_linenum, last_filename); |
d291dd49 | 1358 | |
653e276c | 1359 | #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO) |
7a0c8d71 | 1360 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) |
653e276c | 1361 | dwarf2out_begin_prologue (0, NULL); |
f5d927c0 | 1362 | #endif |
3cf2715d DE |
1363 | |
1364 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1365 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1366 | leaf_renumber_regs (first); |
1367 | #endif | |
1368 | ||
1369 | /* The Sun386i and perhaps other machines don't work right | |
1370 | if the profiling code comes after the prologue. */ | |
1371 | #ifdef PROFILE_BEFORE_PROLOGUE | |
70f4f91c | 1372 | if (current_function_profile) |
3cf2715d DE |
1373 | profile_function (file); |
1374 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1375 | ||
0021b564 JM |
1376 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1377 | if (dwarf2out_do_frame ()) | |
1378 | dwarf2out_frame_debug (NULL_RTX); | |
1379 | #endif | |
1380 | ||
18c038b9 MM |
1381 | /* If debugging, assign block numbers to all of the blocks in this |
1382 | function. */ | |
1383 | if (write_symbols) | |
1384 | { | |
3ac79482 | 1385 | remove_unnecessary_notes (); |
0435312e | 1386 | reemit_insn_block_notes (); |
a20612aa | 1387 | number_blocks (current_function_decl); |
18c038b9 MM |
1388 | /* We never actually put out begin/end notes for the top-level |
1389 | block in the function. But, conceptually, that block is | |
1390 | always needed. */ | |
1391 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1392 | } | |
1393 | ||
3cf2715d | 1394 | /* First output the function prologue: code to set up the stack frame. */ |
f6897b10 | 1395 | (*targetm.asm_out.function_prologue) (file, get_frame_size ()); |
3cf2715d | 1396 | |
3cf2715d DE |
1397 | /* If the machine represents the prologue as RTL, the profiling code must |
1398 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1399 | #ifdef HAVE_prologue | |
1400 | if (! HAVE_prologue) | |
1401 | #endif | |
1402 | profile_after_prologue (file); | |
3cf2715d DE |
1403 | } |
1404 | ||
1405 | static void | |
6cf9ac28 | 1406 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1407 | { |
3cf2715d | 1408 | #ifndef PROFILE_BEFORE_PROLOGUE |
70f4f91c | 1409 | if (current_function_profile) |
3cf2715d DE |
1410 | profile_function (file); |
1411 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1412 | } | |
1413 | ||
1414 | static void | |
6cf9ac28 | 1415 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1416 | { |
dcacfa04 | 1417 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1418 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1419 | #endif |
b729186a JL |
1420 | #if defined(ASM_OUTPUT_REG_PUSH) |
1421 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM) | |
3cf2715d | 1422 | int sval = current_function_returns_struct; |
b729186a JL |
1423 | #endif |
1424 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) | |
3cf2715d | 1425 | int cxt = current_function_needs_context; |
b729186a JL |
1426 | #endif |
1427 | #endif /* ASM_OUTPUT_REG_PUSH */ | |
3cf2715d | 1428 | |
9739c90c JJ |
1429 | if (! NO_PROFILE_COUNTERS) |
1430 | { | |
1431 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
1432 | data_section (); | |
1433 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); | |
1434 | (*targetm.asm_out.internal_label) (file, "LP", current_function_funcdef_no); | |
1435 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); | |
1436 | } | |
3cf2715d | 1437 | |
499df339 | 1438 | function_section (current_function_decl); |
3cf2715d | 1439 | |
65ed39df | 1440 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1441 | if (sval) |
1442 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1443 | #else | |
65ed39df | 1444 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1445 | if (sval) |
51723711 KG |
1446 | { |
1447 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM); | |
1448 | } | |
3cf2715d DE |
1449 | #endif |
1450 | #endif | |
1451 | ||
65ed39df | 1452 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1453 | if (cxt) |
1454 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1455 | #else | |
65ed39df | 1456 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1457 | if (cxt) |
51723711 KG |
1458 | { |
1459 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); | |
1460 | } | |
3cf2715d DE |
1461 | #endif |
1462 | #endif | |
3cf2715d | 1463 | |
df696a75 | 1464 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1465 | |
65ed39df | 1466 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1467 | if (cxt) |
1468 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1469 | #else | |
65ed39df | 1470 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1471 | if (cxt) |
51723711 KG |
1472 | { |
1473 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); | |
1474 | } | |
3cf2715d DE |
1475 | #endif |
1476 | #endif | |
3cf2715d | 1477 | |
65ed39df | 1478 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1479 | if (sval) |
1480 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1481 | #else | |
65ed39df | 1482 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1483 | if (sval) |
51723711 KG |
1484 | { |
1485 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM); | |
1486 | } | |
3cf2715d DE |
1487 | #endif |
1488 | #endif | |
1489 | } | |
1490 | ||
1491 | /* Output assembler code for the end of a function. | |
1492 | For clarity, args are same as those of `final_start_function' | |
1493 | even though not all of them are needed. */ | |
1494 | ||
1495 | void | |
6cf9ac28 | 1496 | final_end_function (void) |
3cf2715d | 1497 | { |
be1bb652 | 1498 | app_disable (); |
3cf2715d | 1499 | |
e2a12aca | 1500 | (*debug_hooks->end_function) (high_function_linenum); |
3cf2715d | 1501 | |
3cf2715d DE |
1502 | /* Finally, output the function epilogue: |
1503 | code to restore the stack frame and return to the caller. */ | |
e2a12aca | 1504 | (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ()); |
3cf2715d | 1505 | |
e2a12aca | 1506 | /* And debug output. */ |
702ada3d | 1507 | (*debug_hooks->end_epilogue) (last_linenum, last_filename); |
3cf2715d | 1508 | |
e2a12aca | 1509 | #if defined (DWARF2_UNWIND_INFO) |
7a0c8d71 DR |
1510 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG |
1511 | && dwarf2out_do_frame ()) | |
702ada3d | 1512 | dwarf2out_end_epilogue (last_linenum, last_filename); |
9a666dda | 1513 | #endif |
3cf2715d DE |
1514 | } |
1515 | \f | |
3cf2715d DE |
1516 | /* Output assembler code for some insns: all or part of a function. |
1517 | For description of args, see `final_start_function', above. | |
1518 | ||
1519 | PRESCAN is 1 if we are not really outputting, | |
1520 | just scanning as if we were outputting. | |
1521 | Prescanning deletes and rearranges insns just like ordinary output. | |
1522 | PRESCAN is -2 if we are outputting after having prescanned. | |
1523 | In this case, don't try to delete or rearrange insns | |
1524 | because that has already been done. | |
1525 | Prescanning is done only on certain machines. */ | |
1526 | ||
1527 | void | |
6cf9ac28 | 1528 | final (rtx first, FILE *file, int optimize, int prescan) |
3cf2715d | 1529 | { |
b3694847 | 1530 | rtx insn; |
3cf2715d | 1531 | int max_line = 0; |
a8c3510c | 1532 | int max_uid = 0; |
3cf2715d DE |
1533 | |
1534 | last_ignored_compare = 0; | |
3cf2715d DE |
1535 | |
1536 | /* Make a map indicating which line numbers appear in this function. | |
1537 | When producing SDB debugging info, delete troublesome line number | |
1538 | notes from inlined functions in other files as well as duplicate | |
1539 | line number notes. */ | |
1540 | #ifdef SDB_DEBUGGING_INFO | |
1541 | if (write_symbols == SDB_DEBUG) | |
1542 | { | |
1543 | rtx last = 0; | |
1544 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1545 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) | |
1546 | { | |
1547 | if ((RTX_INTEGRATED_P (insn) | |
1548 | && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0) | |
1549 | || (last != 0 | |
1550 | && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) | |
1551 | && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last))) | |
1552 | { | |
2e106602 | 1553 | delete_insn (insn); /* Use delete_note. */ |
3cf2715d DE |
1554 | continue; |
1555 | } | |
1556 | last = insn; | |
1557 | if (NOTE_LINE_NUMBER (insn) > max_line) | |
1558 | max_line = NOTE_LINE_NUMBER (insn); | |
1559 | } | |
1560 | } | |
1561 | else | |
1562 | #endif | |
1563 | { | |
1564 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1565 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line) | |
1566 | max_line = NOTE_LINE_NUMBER (insn); | |
1567 | } | |
1568 | ||
703ad42b | 1569 | line_note_exists = xcalloc (max_line + 1, sizeof (char)); |
3cf2715d DE |
1570 | |
1571 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
a8c3510c AM |
1572 | { |
1573 | if (INSN_UID (insn) > max_uid) /* find largest UID */ | |
f5d927c0 | 1574 | max_uid = INSN_UID (insn); |
a8c3510c | 1575 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) |
f5d927c0 | 1576 | line_note_exists[NOTE_LINE_NUMBER (insn)] = 1; |
9ef4c6ef JC |
1577 | #ifdef HAVE_cc0 |
1578 | /* If CC tracking across branches is enabled, record the insn which | |
1579 | jumps to each branch only reached from one place. */ | |
7ad7f828 | 1580 | if (optimize && GET_CODE (insn) == JUMP_INSN) |
9ef4c6ef JC |
1581 | { |
1582 | rtx lab = JUMP_LABEL (insn); | |
1583 | if (lab && LABEL_NUSES (lab) == 1) | |
1584 | { | |
1585 | LABEL_REFS (lab) = insn; | |
1586 | } | |
1587 | } | |
1588 | #endif | |
a8c3510c AM |
1589 | } |
1590 | ||
3cf2715d DE |
1591 | init_recog (); |
1592 | ||
1593 | CC_STATUS_INIT; | |
1594 | ||
1595 | /* Output the insns. */ | |
1596 | for (insn = NEXT_INSN (first); insn;) | |
2f16edb1 TG |
1597 | { |
1598 | #ifdef HAVE_ATTR_length | |
b9f22704 | 1599 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 | 1600 | { |
0ac76ad9 RH |
1601 | /* This can be triggered by bugs elsewhere in the compiler if |
1602 | new insns are created after init_insn_lengths is called. */ | |
0acb0203 JH |
1603 | if (GET_CODE (insn) == NOTE) |
1604 | insn_current_address = -1; | |
1605 | else | |
1606 | abort (); | |
0ac76ad9 RH |
1607 | } |
1608 | else | |
9d98a694 | 1609 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
1610 | #endif /* HAVE_ATTR_length */ |
1611 | ||
2f16edb1 TG |
1612 | insn = final_scan_insn (insn, file, optimize, prescan, 0); |
1613 | } | |
3cf2715d | 1614 | |
bedda2da MM |
1615 | free (line_note_exists); |
1616 | line_note_exists = NULL; | |
3cf2715d DE |
1617 | } |
1618 | \f | |
4bbf910e | 1619 | const char * |
6cf9ac28 | 1620 | get_insn_template (int code, rtx insn) |
4bbf910e RH |
1621 | { |
1622 | const void *output = insn_data[code].output; | |
1623 | switch (insn_data[code].output_format) | |
1624 | { | |
1625 | case INSN_OUTPUT_FORMAT_SINGLE: | |
1626 | return (const char *) output; | |
1627 | case INSN_OUTPUT_FORMAT_MULTI: | |
f5d927c0 | 1628 | return ((const char *const *) output)[which_alternative]; |
4bbf910e RH |
1629 | case INSN_OUTPUT_FORMAT_FUNCTION: |
1630 | if (insn == NULL) | |
1631 | abort (); | |
f5d927c0 | 1632 | return (*(insn_output_fn) output) (recog_data.operand, insn); |
4bbf910e RH |
1633 | |
1634 | default: | |
1635 | abort (); | |
1636 | } | |
1637 | } | |
f5d927c0 | 1638 | |
0dc36574 ZW |
1639 | /* Emit the appropriate declaration for an alternate-entry-point |
1640 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
1641 | LABEL_KIND != LABEL_NORMAL. | |
1642 | ||
1643 | The case fall-through in this function is intentional. */ | |
1644 | static void | |
6cf9ac28 | 1645 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
1646 | { |
1647 | const char *name = LABEL_NAME (insn); | |
1648 | ||
1649 | switch (LABEL_KIND (insn)) | |
1650 | { | |
1651 | case LABEL_WEAK_ENTRY: | |
1652 | #ifdef ASM_WEAKEN_LABEL | |
1653 | ASM_WEAKEN_LABEL (file, name); | |
1654 | #endif | |
1655 | case LABEL_GLOBAL_ENTRY: | |
5eb99654 | 1656 | (*targetm.asm_out.globalize_label) (file, name); |
0dc36574 | 1657 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
1658 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
1659 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
1660 | #endif | |
0dc36574 ZW |
1661 | ASM_OUTPUT_LABEL (file, name); |
1662 | break; | |
1663 | ||
1664 | case LABEL_NORMAL: | |
1665 | default: | |
1666 | abort (); | |
1667 | } | |
1668 | } | |
1669 | ||
3cf2715d DE |
1670 | /* The final scan for one insn, INSN. |
1671 | Args are same as in `final', except that INSN | |
1672 | is the insn being scanned. | |
1673 | Value returned is the next insn to be scanned. | |
1674 | ||
1675 | NOPEEPHOLES is the flag to disallow peephole processing (currently | |
1676 | used for within delayed branch sequence output). */ | |
1677 | ||
1678 | rtx | |
6cf9ac28 AJ |
1679 | final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, |
1680 | int prescan, int nopeepholes ATTRIBUTE_UNUSED) | |
3cf2715d | 1681 | { |
90ca38bb MM |
1682 | #ifdef HAVE_cc0 |
1683 | rtx set; | |
1684 | #endif | |
1685 | ||
3cf2715d DE |
1686 | insn_counter++; |
1687 | ||
1688 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
1689 | template of "#") while not optimizing. */ | |
1690 | if (INSN_DELETED_P (insn)) | |
1691 | return NEXT_INSN (insn); | |
1692 | ||
1693 | switch (GET_CODE (insn)) | |
1694 | { | |
1695 | case NOTE: | |
1696 | if (prescan > 0) | |
1697 | break; | |
1698 | ||
be1bb652 RH |
1699 | switch (NOTE_LINE_NUMBER (insn)) |
1700 | { | |
1701 | case NOTE_INSN_DELETED: | |
1702 | case NOTE_INSN_LOOP_BEG: | |
1703 | case NOTE_INSN_LOOP_END: | |
2c79137a | 1704 | case NOTE_INSN_LOOP_END_TOP_COND: |
be1bb652 RH |
1705 | case NOTE_INSN_LOOP_CONT: |
1706 | case NOTE_INSN_LOOP_VTOP: | |
1707 | case NOTE_INSN_FUNCTION_END: | |
be1bb652 | 1708 | case NOTE_INSN_REPEATED_LINE_NUMBER: |
be1bb652 RH |
1709 | case NOTE_INSN_EXPECTED_VALUE: |
1710 | break; | |
3cf2715d | 1711 | |
be1bb652 | 1712 | case NOTE_INSN_BASIC_BLOCK: |
ad0fc698 JW |
1713 | #ifdef IA64_UNWIND_INFO |
1714 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
1715 | #endif | |
be1bb652 RH |
1716 | if (flag_debug_asm) |
1717 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
0b17ab2f | 1718 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); |
be1bb652 | 1719 | break; |
3cf2715d | 1720 | |
be1bb652 | 1721 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
1722 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
1723 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1724 | break; |
3d195391 | 1725 | |
be1bb652 | 1726 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
1727 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
1728 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1729 | break; |
3d195391 | 1730 | |
be1bb652 | 1731 | case NOTE_INSN_PROLOGUE_END: |
b9f22704 | 1732 | (*targetm.asm_out.function_end_prologue) (file); |
3cf2715d DE |
1733 | profile_after_prologue (file); |
1734 | break; | |
3cf2715d | 1735 | |
be1bb652 | 1736 | case NOTE_INSN_EPILOGUE_BEG: |
b9f22704 | 1737 | (*targetm.asm_out.function_begin_epilogue) (file); |
be1bb652 | 1738 | break; |
3cf2715d | 1739 | |
be1bb652 | 1740 | case NOTE_INSN_FUNCTION_BEG: |
653e276c | 1741 | app_disable (); |
702ada3d | 1742 | (*debug_hooks->end_prologue) (last_linenum, last_filename); |
3cf2715d | 1743 | break; |
be1bb652 RH |
1744 | |
1745 | case NOTE_INSN_BLOCK_BEG: | |
1746 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 1747 | || debug_info_level == DINFO_LEVEL_VERBOSE |
3cf2715d | 1748 | || write_symbols == DWARF_DEBUG |
7a0c8d71 DR |
1749 | || write_symbols == DWARF2_DEBUG |
1750 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1751 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1752 | { |
1753 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1754 | |
be1bb652 RH |
1755 | app_disable (); |
1756 | ++block_depth; | |
1757 | high_block_linenum = last_linenum; | |
eac40081 | 1758 | |
a5a42b92 | 1759 | /* Output debugging info about the symbol-block beginning. */ |
e2a12aca | 1760 | (*debug_hooks->begin_block) (last_linenum, n); |
3cf2715d | 1761 | |
be1bb652 RH |
1762 | /* Mark this block as output. */ |
1763 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
1764 | } | |
1765 | break; | |
18c038b9 | 1766 | |
be1bb652 RH |
1767 | case NOTE_INSN_BLOCK_END: |
1768 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
1769 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
1770 | || write_symbols == DWARF_DEBUG | |
7a0c8d71 DR |
1771 | || write_symbols == DWARF2_DEBUG |
1772 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1773 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1774 | { |
1775 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1776 | |
be1bb652 RH |
1777 | app_disable (); |
1778 | ||
1779 | /* End of a symbol-block. */ | |
1780 | --block_depth; | |
1781 | if (block_depth < 0) | |
1782 | abort (); | |
3cf2715d | 1783 | |
e2a12aca | 1784 | (*debug_hooks->end_block) (high_block_linenum, n); |
be1bb652 RH |
1785 | } |
1786 | break; | |
1787 | ||
1788 | case NOTE_INSN_DELETED_LABEL: | |
1789 | /* Emit the label. We may have deleted the CODE_LABEL because | |
1790 | the label could be proved to be unreachable, though still | |
1791 | referenced (in the form of having its address taken. */ | |
8215347e | 1792 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 1793 | break; |
3cf2715d | 1794 | |
21835d9b JJ |
1795 | case 0: |
1796 | break; | |
1797 | ||
be1bb652 RH |
1798 | default: |
1799 | if (NOTE_LINE_NUMBER (insn) <= 0) | |
1800 | abort (); | |
f5d927c0 | 1801 | break; |
3cf2715d DE |
1802 | } |
1803 | break; | |
1804 | ||
1805 | case BARRIER: | |
f73ad30e | 1806 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 1807 | if (dwarf2out_do_frame ()) |
be1bb652 | 1808 | dwarf2out_frame_debug (insn); |
3cf2715d DE |
1809 | #endif |
1810 | break; | |
1811 | ||
1812 | case CODE_LABEL: | |
1dd8faa8 R |
1813 | /* The target port might emit labels in the output function for |
1814 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
1815 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
1816 | { | |
1817 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 1818 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 1819 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 1820 | #endif |
fc470718 | 1821 | |
1dd8faa8 | 1822 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 1823 | { |
9e423e6d | 1824 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 1825 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
1826 | #else |
1827 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
1828 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 1829 | #else |
40cdfca6 | 1830 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 1831 | #endif |
9e423e6d | 1832 | #endif |
40cdfca6 | 1833 | } |
de7987a6 | 1834 | } |
9ef4c6ef | 1835 | #ifdef HAVE_cc0 |
3cf2715d | 1836 | CC_STATUS_INIT; |
9ef4c6ef JC |
1837 | /* If this label is reached from only one place, set the condition |
1838 | codes from the instruction just before the branch. */ | |
7ad7f828 JC |
1839 | |
1840 | /* Disabled because some insns set cc_status in the C output code | |
1841 | and NOTICE_UPDATE_CC alone can set incorrect status. */ | |
1842 | if (0 /* optimize && LABEL_NUSES (insn) == 1*/) | |
9ef4c6ef JC |
1843 | { |
1844 | rtx jump = LABEL_REFS (insn); | |
1845 | rtx barrier = prev_nonnote_insn (insn); | |
1846 | rtx prev; | |
1847 | /* If the LABEL_REFS field of this label has been set to point | |
1848 | at a branch, the predecessor of the branch is a regular | |
1849 | insn, and that branch is the only way to reach this label, | |
1850 | set the condition codes based on the branch and its | |
1851 | predecessor. */ | |
1852 | if (barrier && GET_CODE (barrier) == BARRIER | |
1853 | && jump && GET_CODE (jump) == JUMP_INSN | |
1854 | && (prev = prev_nonnote_insn (jump)) | |
1855 | && GET_CODE (prev) == INSN) | |
1856 | { | |
1857 | NOTICE_UPDATE_CC (PATTERN (prev), prev); | |
1858 | NOTICE_UPDATE_CC (PATTERN (jump), jump); | |
1859 | } | |
1860 | } | |
1861 | #endif | |
3cf2715d DE |
1862 | if (prescan > 0) |
1863 | break; | |
03ffa171 RK |
1864 | |
1865 | #ifdef FINAL_PRESCAN_LABEL | |
df4ae160 | 1866 | FINAL_PRESCAN_INSN (insn, NULL, 0); |
03ffa171 RK |
1867 | #endif |
1868 | ||
e1772ac0 NB |
1869 | if (LABEL_NAME (insn)) |
1870 | (*debug_hooks->label) (insn); | |
1871 | ||
3cf2715d DE |
1872 | if (app_on) |
1873 | { | |
51723711 | 1874 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
1875 | app_on = 0; |
1876 | } | |
1877 | if (NEXT_INSN (insn) != 0 | |
1878 | && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN) | |
1879 | { | |
1880 | rtx nextbody = PATTERN (NEXT_INSN (insn)); | |
1881 | ||
1882 | /* If this label is followed by a jump-table, | |
1883 | make sure we put the label in the read-only section. Also | |
1884 | possibly write the label and jump table together. */ | |
1885 | ||
1886 | if (GET_CODE (nextbody) == ADDR_VEC | |
1887 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
1888 | { | |
e0d80184 DM |
1889 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
1890 | /* In this case, the case vector is being moved by the | |
1891 | target, so don't output the label at all. Leave that | |
1892 | to the back end macros. */ | |
1893 | #else | |
75197b37 BS |
1894 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
1895 | { | |
340f7e7c RH |
1896 | int log_align; |
1897 | ||
75197b37 | 1898 | readonly_data_section (); |
340f7e7c RH |
1899 | |
1900 | #ifdef ADDR_VEC_ALIGN | |
3e4eece3 | 1901 | log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn)); |
340f7e7c RH |
1902 | #else |
1903 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
1904 | #endif | |
1905 | ASM_OUTPUT_ALIGN (file, log_align); | |
75197b37 BS |
1906 | } |
1907 | else | |
1908 | function_section (current_function_decl); | |
1909 | ||
3cf2715d DE |
1910 | #ifdef ASM_OUTPUT_CASE_LABEL |
1911 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), | |
1912 | NEXT_INSN (insn)); | |
1913 | #else | |
4977bab6 | 1914 | (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 1915 | #endif |
3cf2715d DE |
1916 | #endif |
1917 | break; | |
1918 | } | |
1919 | } | |
0dc36574 ZW |
1920 | if (LABEL_ALT_ENTRY_P (insn)) |
1921 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 1922 | else |
4977bab6 | 1923 | (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
1924 | break; |
1925 | ||
1926 | default: | |
1927 | { | |
b3694847 | 1928 | rtx body = PATTERN (insn); |
3cf2715d | 1929 | int insn_code_number; |
9b3142b3 | 1930 | const char *template; |
3cf2715d DE |
1931 | rtx note; |
1932 | ||
1933 | /* An INSN, JUMP_INSN or CALL_INSN. | |
1934 | First check for special kinds that recog doesn't recognize. */ | |
1935 | ||
1936 | if (GET_CODE (body) == USE /* These are just declarations */ | |
1937 | || GET_CODE (body) == CLOBBER) | |
1938 | break; | |
1939 | ||
1940 | #ifdef HAVE_cc0 | |
1941 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
1942 | the setting of the condition code was done in the delay slot | |
1943 | of the insn that branched here. So recover the cc status | |
1944 | from the insn that set it. */ | |
1945 | ||
1946 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
1947 | if (note) | |
1948 | { | |
1949 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
1950 | cc_prev_status = cc_status; | |
1951 | } | |
1952 | #endif | |
1953 | ||
1954 | /* Detect insns that are really jump-tables | |
1955 | and output them as such. */ | |
1956 | ||
1957 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
1958 | { | |
7f7f8214 | 1959 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 1960 | int vlen, idx; |
7f7f8214 | 1961 | #endif |
3cf2715d DE |
1962 | |
1963 | if (prescan > 0) | |
1964 | break; | |
1965 | ||
1966 | if (app_on) | |
1967 | { | |
51723711 | 1968 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
1969 | app_on = 0; |
1970 | } | |
1971 | ||
e0d80184 DM |
1972 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
1973 | if (GET_CODE (body) == ADDR_VEC) | |
1974 | { | |
1975 | #ifdef ASM_OUTPUT_ADDR_VEC | |
1976 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
1977 | #else | |
f5d927c0 | 1978 | abort (); |
e0d80184 DM |
1979 | #endif |
1980 | } | |
1981 | else | |
1982 | { | |
1983 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
1984 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
1985 | #else | |
f5d927c0 | 1986 | abort (); |
e0d80184 DM |
1987 | #endif |
1988 | } | |
1989 | #else | |
3cf2715d DE |
1990 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
1991 | for (idx = 0; idx < vlen; idx++) | |
1992 | { | |
1993 | if (GET_CODE (body) == ADDR_VEC) | |
1994 | { | |
1995 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
1996 | ASM_OUTPUT_ADDR_VEC_ELT | |
1997 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
1998 | #else | |
1999 | abort (); | |
2000 | #endif | |
2001 | } | |
2002 | else | |
2003 | { | |
2004 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2005 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2006 | (file, | |
33f7f353 | 2007 | body, |
3cf2715d DE |
2008 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2009 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2010 | #else | |
2011 | abort (); | |
2012 | #endif | |
2013 | } | |
2014 | } | |
2015 | #ifdef ASM_OUTPUT_CASE_END | |
2016 | ASM_OUTPUT_CASE_END (file, | |
2017 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2018 | insn); | |
e0d80184 | 2019 | #endif |
3cf2715d DE |
2020 | #endif |
2021 | ||
4d1065ed | 2022 | function_section (current_function_decl); |
3cf2715d DE |
2023 | |
2024 | break; | |
2025 | } | |
0435312e JH |
2026 | /* Output this line note if it is the first or the last line |
2027 | note in a row. */ | |
2028 | if (notice_source_line (insn)) | |
2029 | { | |
2030 | (*debug_hooks->source_line) (last_linenum, last_filename); | |
2031 | } | |
3cf2715d | 2032 | |
3cf2715d DE |
2033 | if (GET_CODE (body) == ASM_INPUT) |
2034 | { | |
36d7136e RH |
2035 | const char *string = XSTR (body, 0); |
2036 | ||
3cf2715d DE |
2037 | /* There's no telling what that did to the condition codes. */ |
2038 | CC_STATUS_INIT; | |
2039 | if (prescan > 0) | |
2040 | break; | |
36d7136e RH |
2041 | |
2042 | if (string[0]) | |
3cf2715d | 2043 | { |
36d7136e RH |
2044 | if (! app_on) |
2045 | { | |
2046 | fputs (ASM_APP_ON, file); | |
2047 | app_on = 1; | |
2048 | } | |
2049 | fprintf (asm_out_file, "\t%s\n", string); | |
3cf2715d | 2050 | } |
3cf2715d DE |
2051 | break; |
2052 | } | |
2053 | ||
2054 | /* Detect `asm' construct with operands. */ | |
2055 | if (asm_noperands (body) >= 0) | |
2056 | { | |
22bf4422 | 2057 | unsigned int noperands = asm_noperands (body); |
703ad42b | 2058 | rtx *ops = alloca (noperands * sizeof (rtx)); |
3cce094d | 2059 | const char *string; |
3cf2715d DE |
2060 | |
2061 | /* There's no telling what that did to the condition codes. */ | |
2062 | CC_STATUS_INIT; | |
2063 | if (prescan > 0) | |
2064 | break; | |
2065 | ||
3cf2715d | 2066 | /* Get out the operand values. */ |
df4ae160 | 2067 | string = decode_asm_operands (body, ops, NULL, NULL, NULL); |
3cf2715d DE |
2068 | /* Inhibit aborts on what would otherwise be compiler bugs. */ |
2069 | insn_noperands = noperands; | |
2070 | this_is_asm_operands = insn; | |
2071 | ||
2072 | /* Output the insn using them. */ | |
36d7136e RH |
2073 | if (string[0]) |
2074 | { | |
2075 | if (! app_on) | |
2076 | { | |
2077 | fputs (ASM_APP_ON, file); | |
2078 | app_on = 1; | |
2079 | } | |
2080 | output_asm_insn (string, ops); | |
2081 | } | |
2082 | ||
3cf2715d DE |
2083 | this_is_asm_operands = 0; |
2084 | break; | |
2085 | } | |
2086 | ||
2087 | if (prescan <= 0 && app_on) | |
2088 | { | |
51723711 | 2089 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2090 | app_on = 0; |
2091 | } | |
2092 | ||
2093 | if (GET_CODE (body) == SEQUENCE) | |
2094 | { | |
2095 | /* A delayed-branch sequence */ | |
b3694847 | 2096 | int i; |
3cf2715d DE |
2097 | rtx next; |
2098 | ||
2099 | if (prescan > 0) | |
2100 | break; | |
2101 | final_sequence = body; | |
2102 | ||
d660cefe RS |
2103 | /* Record the delay slots' frame information before the branch. |
2104 | This is needed for delayed calls: see execute_cfa_program(). */ | |
2105 | #if defined (DWARF2_UNWIND_INFO) | |
2106 | if (dwarf2out_do_frame ()) | |
2107 | for (i = 1; i < XVECLEN (body, 0); i++) | |
2108 | dwarf2out_frame_debug (XVECEXP (body, 0, i)); | |
2109 | #endif | |
2110 | ||
3cf2715d DE |
2111 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will |
2112 | force the restoration of a comparison that was previously | |
2113 | thought unnecessary. If that happens, cancel this sequence | |
2114 | and cause that insn to be restored. */ | |
2115 | ||
2116 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1); | |
2117 | if (next != XVECEXP (body, 0, 1)) | |
2118 | { | |
2119 | final_sequence = 0; | |
2120 | return next; | |
2121 | } | |
2122 | ||
2123 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2124 | { |
2125 | rtx insn = XVECEXP (body, 0, i); | |
2126 | rtx next = NEXT_INSN (insn); | |
2127 | /* We loop in case any instruction in a delay slot gets | |
2128 | split. */ | |
2129 | do | |
2130 | insn = final_scan_insn (insn, file, 0, prescan, 1); | |
2131 | while (insn != next); | |
2132 | } | |
3cf2715d DE |
2133 | #ifdef DBR_OUTPUT_SEQEND |
2134 | DBR_OUTPUT_SEQEND (file); | |
2135 | #endif | |
2136 | final_sequence = 0; | |
2137 | ||
2138 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2139 | insns in the delay slot are actually executed before the | |
2140 | called function. Hence we don't preserve any CC-setting | |
2141 | actions in these insns and the CC must be marked as being | |
2142 | clobbered by the function. */ | |
2143 | if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN) | |
b729186a JL |
2144 | { |
2145 | CC_STATUS_INIT; | |
2146 | } | |
3cf2715d DE |
2147 | break; |
2148 | } | |
2149 | ||
2150 | /* We have a real machine instruction as rtl. */ | |
2151 | ||
2152 | body = PATTERN (insn); | |
2153 | ||
2154 | #ifdef HAVE_cc0 | |
f5d927c0 | 2155 | set = single_set (insn); |
b88c92cc | 2156 | |
3cf2715d DE |
2157 | /* Check for redundant test and compare instructions |
2158 | (when the condition codes are already set up as desired). | |
2159 | This is done only when optimizing; if not optimizing, | |
2160 | it should be possible for the user to alter a variable | |
2161 | with the debugger in between statements | |
2162 | and the next statement should reexamine the variable | |
2163 | to compute the condition codes. */ | |
2164 | ||
30f5e9f5 | 2165 | if (optimize) |
3cf2715d | 2166 | { |
b88c92cc | 2167 | #if 0 |
f5d927c0 | 2168 | rtx set = single_set (insn); |
b88c92cc | 2169 | #endif |
30f5e9f5 RK |
2170 | |
2171 | if (set | |
2172 | && GET_CODE (SET_DEST (set)) == CC0 | |
2173 | && insn != last_ignored_compare) | |
3cf2715d | 2174 | { |
30f5e9f5 | 2175 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
49d801d3 | 2176 | SET_SRC (set) = alter_subreg (&SET_SRC (set)); |
30f5e9f5 RK |
2177 | else if (GET_CODE (SET_SRC (set)) == COMPARE) |
2178 | { | |
2179 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2180 | XEXP (SET_SRC (set), 0) | |
49d801d3 | 2181 | = alter_subreg (&XEXP (SET_SRC (set), 0)); |
30f5e9f5 RK |
2182 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2183 | XEXP (SET_SRC (set), 1) | |
49d801d3 | 2184 | = alter_subreg (&XEXP (SET_SRC (set), 1)); |
30f5e9f5 RK |
2185 | } |
2186 | if ((cc_status.value1 != 0 | |
2187 | && rtx_equal_p (SET_SRC (set), cc_status.value1)) | |
2188 | || (cc_status.value2 != 0 | |
2189 | && rtx_equal_p (SET_SRC (set), cc_status.value2))) | |
3cf2715d | 2190 | { |
30f5e9f5 | 2191 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2192 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2193 | /* or if anything in it is volatile. */ |
2194 | && ! volatile_refs_p (PATTERN (insn))) | |
2195 | { | |
2196 | /* We don't really delete the insn; just ignore it. */ | |
2197 | last_ignored_compare = insn; | |
2198 | break; | |
2199 | } | |
3cf2715d DE |
2200 | } |
2201 | } | |
2202 | } | |
2203 | #endif | |
2204 | ||
3cf2715d DE |
2205 | #ifndef STACK_REGS |
2206 | /* Don't bother outputting obvious no-ops, even without -O. | |
2207 | This optimization is fast and doesn't interfere with debugging. | |
2208 | Don't do this if the insn is in a delay slot, since this | |
2209 | will cause an improper number of delay insns to be written. */ | |
2210 | if (final_sequence == 0 | |
2211 | && prescan >= 0 | |
2212 | && GET_CODE (insn) == INSN && GET_CODE (body) == SET | |
2213 | && GET_CODE (SET_SRC (body)) == REG | |
2214 | && GET_CODE (SET_DEST (body)) == REG | |
2215 | && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body))) | |
2216 | break; | |
2217 | #endif | |
2218 | ||
2219 | #ifdef HAVE_cc0 | |
2220 | /* If this is a conditional branch, maybe modify it | |
2221 | if the cc's are in a nonstandard state | |
2222 | so that it accomplishes the same thing that it would | |
2223 | do straightforwardly if the cc's were set up normally. */ | |
2224 | ||
2225 | if (cc_status.flags != 0 | |
2226 | && GET_CODE (insn) == JUMP_INSN | |
2227 | && GET_CODE (body) == SET | |
2228 | && SET_DEST (body) == pc_rtx | |
2229 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
de2b56f9 | 2230 | && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<' |
fff752ad | 2231 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx |
3cf2715d DE |
2232 | /* This is done during prescan; it is not done again |
2233 | in final scan when prescan has been done. */ | |
2234 | && prescan >= 0) | |
2235 | { | |
2236 | /* This function may alter the contents of its argument | |
2237 | and clear some of the cc_status.flags bits. | |
2238 | It may also return 1 meaning condition now always true | |
2239 | or -1 meaning condition now always false | |
2240 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2241 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2242 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2243 | with its then-operand or its else-operand. */ | |
2244 | if (result == 1) | |
2245 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2246 | if (result == -1) | |
2247 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2248 | ||
2249 | /* The jump is now either unconditional or a no-op. | |
2250 | If it has become a no-op, don't try to output it. | |
2251 | (It would not be recognized.) */ | |
2252 | if (SET_SRC (body) == pc_rtx) | |
2253 | { | |
ca6c03ca | 2254 | delete_insn (insn); |
3cf2715d DE |
2255 | break; |
2256 | } | |
2257 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2258 | /* Replace (set (pc) (return)) with (return). */ | |
2259 | PATTERN (insn) = body = SET_SRC (body); | |
2260 | ||
2261 | /* Rerecognize the instruction if it has changed. */ | |
2262 | if (result != 0) | |
2263 | INSN_CODE (insn) = -1; | |
2264 | } | |
2265 | ||
2266 | /* Make same adjustments to instructions that examine the | |
462da2af SC |
2267 | condition codes without jumping and instructions that |
2268 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2269 | |
2270 | if (cc_status.flags != 0 | |
b88c92cc | 2271 | && set != 0) |
3cf2715d | 2272 | { |
462da2af | 2273 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2274 | |
462da2af | 2275 | if (GET_CODE (insn) != JUMP_INSN |
b88c92cc | 2276 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2277 | { |
b88c92cc RK |
2278 | cond_rtx = XEXP (SET_SRC (set), 0); |
2279 | then_rtx = XEXP (SET_SRC (set), 1); | |
2280 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2281 | } |
2282 | else | |
2283 | { | |
b88c92cc | 2284 | cond_rtx = SET_SRC (set); |
462da2af SC |
2285 | then_rtx = const_true_rtx; |
2286 | else_rtx = const0_rtx; | |
2287 | } | |
f5d927c0 | 2288 | |
462da2af | 2289 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2290 | { |
2291 | case GTU: | |
2292 | case GT: | |
2293 | case LTU: | |
2294 | case LT: | |
2295 | case GEU: | |
2296 | case GE: | |
2297 | case LEU: | |
2298 | case LE: | |
2299 | case EQ: | |
2300 | case NE: | |
2301 | { | |
b3694847 | 2302 | int result; |
462da2af | 2303 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2304 | break; |
462da2af | 2305 | result = alter_cond (cond_rtx); |
3cf2715d | 2306 | if (result == 1) |
b88c92cc | 2307 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2308 | else if (result == -1) |
b88c92cc | 2309 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2310 | else if (result == 2) |
2311 | INSN_CODE (insn) = -1; | |
b88c92cc | 2312 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2313 | delete_insn (insn); |
3cf2715d | 2314 | } |
e9a25f70 JL |
2315 | break; |
2316 | ||
2317 | default: | |
2318 | break; | |
3cf2715d DE |
2319 | } |
2320 | } | |
462da2af | 2321 | |
3cf2715d DE |
2322 | #endif |
2323 | ||
ede7cd44 | 2324 | #ifdef HAVE_peephole |
3cf2715d DE |
2325 | /* Do machine-specific peephole optimizations if desired. */ |
2326 | ||
2327 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2328 | { | |
2329 | rtx next = peephole (insn); | |
2330 | /* When peepholing, if there were notes within the peephole, | |
2331 | emit them before the peephole. */ | |
2332 | if (next != 0 && next != NEXT_INSN (insn)) | |
2333 | { | |
2334 | rtx prev = PREV_INSN (insn); | |
3cf2715d DE |
2335 | |
2336 | for (note = NEXT_INSN (insn); note != next; | |
2337 | note = NEXT_INSN (note)) | |
2338 | final_scan_insn (note, file, optimize, prescan, nopeepholes); | |
2339 | ||
2340 | /* In case this is prescan, put the notes | |
2341 | in proper position for later rescan. */ | |
2342 | note = NEXT_INSN (insn); | |
2343 | PREV_INSN (note) = prev; | |
2344 | NEXT_INSN (prev) = note; | |
2345 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2346 | PREV_INSN (insn) = PREV_INSN (next); | |
2347 | NEXT_INSN (insn) = next; | |
2348 | PREV_INSN (next) = insn; | |
2349 | } | |
2350 | ||
2351 | /* PEEPHOLE might have changed this. */ | |
2352 | body = PATTERN (insn); | |
2353 | } | |
ede7cd44 | 2354 | #endif |
3cf2715d DE |
2355 | |
2356 | /* Try to recognize the instruction. | |
2357 | If successful, verify that the operands satisfy the | |
2358 | constraints for the instruction. Crash if they don't, | |
2359 | since `reload' should have changed them so that they do. */ | |
2360 | ||
2361 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2362 | cleanup_subreg_operands (insn); |
3cf2715d | 2363 | |
dd3f0101 KH |
2364 | /* Dump the insn in the assembly for debugging. */ |
2365 | if (flag_dump_rtl_in_asm) | |
2366 | { | |
2367 | print_rtx_head = ASM_COMMENT_START; | |
2368 | print_rtl_single (asm_out_file, insn); | |
2369 | print_rtx_head = ""; | |
2370 | } | |
b9f22704 | 2371 | |
6c698a6d | 2372 | if (! constrain_operands_cached (1)) |
3cf2715d | 2373 | fatal_insn_not_found (insn); |
3cf2715d DE |
2374 | |
2375 | /* Some target machines need to prescan each insn before | |
2376 | it is output. */ | |
2377 | ||
2378 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2379 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2380 | #endif |
2381 | ||
afe48e06 RH |
2382 | #ifdef HAVE_conditional_execution |
2383 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
2384 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); | |
2385 | else | |
2386 | current_insn_predicate = NULL_RTX; | |
2387 | #endif | |
2388 | ||
3cf2715d DE |
2389 | #ifdef HAVE_cc0 |
2390 | cc_prev_status = cc_status; | |
2391 | ||
2392 | /* Update `cc_status' for this instruction. | |
2393 | The instruction's output routine may change it further. | |
2394 | If the output routine for a jump insn needs to depend | |
2395 | on the cc status, it should look at cc_prev_status. */ | |
2396 | ||
2397 | NOTICE_UPDATE_CC (body, insn); | |
2398 | #endif | |
2399 | ||
b1a9f6a0 | 2400 | current_output_insn = debug_insn = insn; |
3cf2715d | 2401 | |
f73ad30e | 2402 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2403 | if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ()) |
b57d9225 JM |
2404 | dwarf2out_frame_debug (insn); |
2405 | #endif | |
2406 | ||
4bbf910e RH |
2407 | /* Find the proper template for this insn. */ |
2408 | template = get_insn_template (insn_code_number, insn); | |
3cf2715d | 2409 | |
4bbf910e RH |
2410 | /* If the C code returns 0, it means that it is a jump insn |
2411 | which follows a deleted test insn, and that test insn | |
2412 | needs to be reinserted. */ | |
3cf2715d DE |
2413 | if (template == 0) |
2414 | { | |
efd0378b HPN |
2415 | rtx prev; |
2416 | ||
4bbf910e RH |
2417 | if (prev_nonnote_insn (insn) != last_ignored_compare) |
2418 | abort (); | |
efd0378b HPN |
2419 | |
2420 | /* We have already processed the notes between the setter and | |
2421 | the user. Make sure we don't process them again, this is | |
2422 | particularly important if one of the notes is a block | |
2423 | scope note or an EH note. */ | |
2424 | for (prev = insn; | |
2425 | prev != last_ignored_compare; | |
2426 | prev = PREV_INSN (prev)) | |
2427 | { | |
2428 | if (GET_CODE (prev) == NOTE) | |
ca6c03ca | 2429 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2430 | } |
2431 | ||
2432 | return prev; | |
3cf2715d DE |
2433 | } |
2434 | ||
2435 | /* If the template is the string "#", it means that this insn must | |
2436 | be split. */ | |
2437 | if (template[0] == '#' && template[1] == '\0') | |
2438 | { | |
2439 | rtx new = try_split (body, insn, 0); | |
2440 | ||
2441 | /* If we didn't split the insn, go away. */ | |
2442 | if (new == insn && PATTERN (new) == body) | |
c725bd79 | 2443 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2444 | |
3d14e82f JW |
2445 | #ifdef HAVE_ATTR_length |
2446 | /* This instruction should have been split in shorten_branches, | |
2447 | to ensure that we would have valid length info for the | |
2448 | splitees. */ | |
2449 | abort (); | |
2450 | #endif | |
2451 | ||
3cf2715d DE |
2452 | return new; |
2453 | } | |
f5d927c0 | 2454 | |
3cf2715d DE |
2455 | if (prescan > 0) |
2456 | break; | |
2457 | ||
ce152ef8 AM |
2458 | #ifdef IA64_UNWIND_INFO |
2459 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
2460 | #endif | |
3cf2715d DE |
2461 | /* Output assembler code from the template. */ |
2462 | ||
1ccbefce | 2463 | output_asm_insn (template, recog_data.operand); |
3cf2715d | 2464 | |
d660cefe RS |
2465 | /* If necessary, report the effect that the instruction has on |
2466 | the unwind info. We've already done this for delay slots | |
2467 | and call instructions. */ | |
0021b564 | 2468 | #if defined (DWARF2_UNWIND_INFO) |
d660cefe RS |
2469 | if (GET_CODE (insn) == INSN |
2470 | #if !defined (HAVE_prologue) | |
2471 | && !ACCUMULATE_OUTGOING_ARGS | |
2472 | #endif | |
2473 | && final_sequence == 0 | |
fbfa55b0 RH |
2474 | && dwarf2out_do_frame ()) |
2475 | dwarf2out_frame_debug (insn); | |
0021b564 | 2476 | #endif |
469ac993 | 2477 | |
3cf2715d | 2478 | #if 0 |
6001794d KH |
2479 | /* It's not at all clear why we did this and doing so used to |
2480 | interfere with tests that used REG_WAS_0 notes, which are | |
2481 | now gone, so let's try with this out. */ | |
3cf2715d DE |
2482 | |
2483 | /* Mark this insn as having been output. */ | |
2484 | INSN_DELETED_P (insn) = 1; | |
2485 | #endif | |
2486 | ||
4a8d0c9c RH |
2487 | /* Emit information for vtable gc. */ |
2488 | note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX); | |
2489 | if (note) | |
2490 | assemble_vtable_entry (XEXP (XEXP (note, 0), 0), | |
2491 | INTVAL (XEXP (XEXP (note, 0), 1))); | |
2492 | ||
b1a9f6a0 | 2493 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2494 | } |
2495 | } | |
2496 | return NEXT_INSN (insn); | |
2497 | } | |
2498 | \f | |
2499 | /* Output debugging info to the assembler file FILE | |
2500 | based on the NOTE-insn INSN, assumed to be a line number. */ | |
2501 | ||
0435312e | 2502 | static bool |
6cf9ac28 | 2503 | notice_source_line (rtx insn) |
3cf2715d | 2504 | { |
0435312e JH |
2505 | const char *filename = insn_file (insn); |
2506 | int linenum = insn_line (insn); | |
3cf2715d | 2507 | |
0435312e JH |
2508 | if (filename && (filename != last_filename || last_linenum != linenum)) |
2509 | { | |
2510 | last_filename = filename; | |
2511 | last_linenum = linenum; | |
2512 | high_block_linenum = MAX (last_linenum, high_block_linenum); | |
2513 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
2514 | return true; | |
2515 | } | |
2516 | return false; | |
3cf2715d DE |
2517 | } |
2518 | \f | |
0304f787 JL |
2519 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2520 | directly to the desired hard register. */ | |
f5d927c0 | 2521 | |
0304f787 | 2522 | void |
6cf9ac28 | 2523 | cleanup_subreg_operands (rtx insn) |
0304f787 | 2524 | { |
f62a15e3 | 2525 | int i; |
6c698a6d | 2526 | extract_insn_cached (insn); |
1ccbefce | 2527 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2528 | { |
9f4524f2 RE |
2529 | /* The following test cannot use recog_data.operand when tesing |
2530 | for a SUBREG: the underlying object might have been changed | |
2531 | already if we are inside a match_operator expression that | |
2532 | matches the else clause. Instead we test the underlying | |
2533 | expression directly. */ | |
2534 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
49d801d3 | 2535 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); |
1ccbefce | 2536 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 BS |
2537 | || GET_CODE (recog_data.operand[i]) == MULT |
2538 | || GET_CODE (recog_data.operand[i]) == MEM) | |
49d801d3 | 2539 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]); |
0304f787 JL |
2540 | } |
2541 | ||
1ccbefce | 2542 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 2543 | { |
1ccbefce | 2544 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
49d801d3 | 2545 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); |
1ccbefce | 2546 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 BS |
2547 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
2548 | || GET_CODE (*recog_data.dup_loc[i]) == MEM) | |
49d801d3 | 2549 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]); |
0304f787 JL |
2550 | } |
2551 | } | |
2552 | ||
3cf2715d DE |
2553 | /* If X is a SUBREG, replace it with a REG or a MEM, |
2554 | based on the thing it is a subreg of. */ | |
2555 | ||
2556 | rtx | |
6cf9ac28 | 2557 | alter_subreg (rtx *xp) |
3cf2715d | 2558 | { |
49d801d3 | 2559 | rtx x = *xp; |
b3694847 | 2560 | rtx y = SUBREG_REG (x); |
f5963e61 | 2561 | |
49d801d3 JH |
2562 | /* simplify_subreg does not remove subreg from volatile references. |
2563 | We are required to. */ | |
2564 | if (GET_CODE (y) == MEM) | |
2565 | *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x)); | |
2566 | else | |
fea54805 RK |
2567 | { |
2568 | rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y), | |
2569 | SUBREG_BYTE (x)); | |
2570 | ||
2571 | if (new != 0) | |
2572 | *xp = new; | |
2573 | /* Simplify_subreg can't handle some REG cases, but we have to. */ | |
2574 | else if (GET_CODE (y) == REG) | |
2575 | { | |
7687c5b8 | 2576 | unsigned int regno = subreg_hard_regno (x, 1); |
a560d4d4 | 2577 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x)); |
fea54805 RK |
2578 | } |
2579 | else | |
2580 | abort (); | |
2581 | } | |
2582 | ||
49d801d3 | 2583 | return *xp; |
3cf2715d DE |
2584 | } |
2585 | ||
2586 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
2587 | ||
2588 | static rtx | |
6cf9ac28 | 2589 | walk_alter_subreg (rtx *xp) |
3cf2715d | 2590 | { |
49d801d3 | 2591 | rtx x = *xp; |
3cf2715d DE |
2592 | switch (GET_CODE (x)) |
2593 | { | |
2594 | case PLUS: | |
2595 | case MULT: | |
49d801d3 JH |
2596 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); |
2597 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1)); | |
3cf2715d DE |
2598 | break; |
2599 | ||
2600 | case MEM: | |
49d801d3 | 2601 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); |
3cf2715d DE |
2602 | break; |
2603 | ||
2604 | case SUBREG: | |
49d801d3 | 2605 | return alter_subreg (xp); |
f5d927c0 | 2606 | |
e9a25f70 JL |
2607 | default: |
2608 | break; | |
3cf2715d DE |
2609 | } |
2610 | ||
5bc72aeb | 2611 | return *xp; |
3cf2715d DE |
2612 | } |
2613 | \f | |
2614 | #ifdef HAVE_cc0 | |
2615 | ||
2616 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
2617 | as required by the bits that are set in cc_status.flags. | |
2618 | Not all of the bits there can be handled at this level in all cases. | |
2619 | ||
2620 | The value is normally 0. | |
2621 | 1 means that the condition has become always true. | |
2622 | -1 means that the condition has become always false. | |
2623 | 2 means that COND has been altered. */ | |
2624 | ||
2625 | static int | |
6cf9ac28 | 2626 | alter_cond (rtx cond) |
3cf2715d DE |
2627 | { |
2628 | int value = 0; | |
2629 | ||
2630 | if (cc_status.flags & CC_REVERSED) | |
2631 | { | |
2632 | value = 2; | |
2633 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
2634 | } | |
2635 | ||
2636 | if (cc_status.flags & CC_INVERTED) | |
2637 | { | |
2638 | value = 2; | |
2639 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
2640 | } | |
2641 | ||
2642 | if (cc_status.flags & CC_NOT_POSITIVE) | |
2643 | switch (GET_CODE (cond)) | |
2644 | { | |
2645 | case LE: | |
2646 | case LEU: | |
2647 | case GEU: | |
2648 | /* Jump becomes unconditional. */ | |
2649 | return 1; | |
2650 | ||
2651 | case GT: | |
2652 | case GTU: | |
2653 | case LTU: | |
2654 | /* Jump becomes no-op. */ | |
2655 | return -1; | |
2656 | ||
2657 | case GE: | |
2658 | PUT_CODE (cond, EQ); | |
2659 | value = 2; | |
2660 | break; | |
2661 | ||
2662 | case LT: | |
2663 | PUT_CODE (cond, NE); | |
2664 | value = 2; | |
2665 | break; | |
f5d927c0 | 2666 | |
e9a25f70 JL |
2667 | default: |
2668 | break; | |
3cf2715d DE |
2669 | } |
2670 | ||
2671 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
2672 | switch (GET_CODE (cond)) | |
2673 | { | |
2674 | case GE: | |
2675 | case GEU: | |
2676 | /* Jump becomes unconditional. */ | |
2677 | return 1; | |
2678 | ||
2679 | case LT: | |
2680 | case LTU: | |
2681 | /* Jump becomes no-op. */ | |
2682 | return -1; | |
2683 | ||
2684 | case LE: | |
2685 | case LEU: | |
2686 | PUT_CODE (cond, EQ); | |
2687 | value = 2; | |
2688 | break; | |
2689 | ||
2690 | case GT: | |
2691 | case GTU: | |
2692 | PUT_CODE (cond, NE); | |
2693 | value = 2; | |
2694 | break; | |
f5d927c0 | 2695 | |
e9a25f70 JL |
2696 | default: |
2697 | break; | |
3cf2715d DE |
2698 | } |
2699 | ||
2700 | if (cc_status.flags & CC_NO_OVERFLOW) | |
2701 | switch (GET_CODE (cond)) | |
2702 | { | |
2703 | case GEU: | |
2704 | /* Jump becomes unconditional. */ | |
2705 | return 1; | |
2706 | ||
2707 | case LEU: | |
2708 | PUT_CODE (cond, EQ); | |
2709 | value = 2; | |
2710 | break; | |
2711 | ||
2712 | case GTU: | |
2713 | PUT_CODE (cond, NE); | |
2714 | value = 2; | |
2715 | break; | |
2716 | ||
2717 | case LTU: | |
2718 | /* Jump becomes no-op. */ | |
2719 | return -1; | |
f5d927c0 | 2720 | |
e9a25f70 JL |
2721 | default: |
2722 | break; | |
3cf2715d DE |
2723 | } |
2724 | ||
2725 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
2726 | switch (GET_CODE (cond)) | |
2727 | { | |
e9a25f70 | 2728 | default: |
3cf2715d DE |
2729 | abort (); |
2730 | ||
2731 | case NE: | |
2732 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
2733 | value = 2; | |
2734 | break; | |
2735 | ||
2736 | case EQ: | |
2737 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
2738 | value = 2; | |
2739 | break; | |
2740 | } | |
2741 | ||
2742 | if (cc_status.flags & CC_NOT_SIGNED) | |
2743 | /* The flags are valid if signed condition operators are converted | |
2744 | to unsigned. */ | |
2745 | switch (GET_CODE (cond)) | |
2746 | { | |
2747 | case LE: | |
2748 | PUT_CODE (cond, LEU); | |
2749 | value = 2; | |
2750 | break; | |
2751 | ||
2752 | case LT: | |
2753 | PUT_CODE (cond, LTU); | |
2754 | value = 2; | |
2755 | break; | |
2756 | ||
2757 | case GT: | |
2758 | PUT_CODE (cond, GTU); | |
2759 | value = 2; | |
2760 | break; | |
2761 | ||
2762 | case GE: | |
2763 | PUT_CODE (cond, GEU); | |
2764 | value = 2; | |
2765 | break; | |
e9a25f70 JL |
2766 | |
2767 | default: | |
2768 | break; | |
3cf2715d DE |
2769 | } |
2770 | ||
2771 | return value; | |
2772 | } | |
2773 | #endif | |
2774 | \f | |
2775 | /* Report inconsistency between the assembler template and the operands. | |
2776 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
2777 | ||
2778 | void | |
e34d07f2 | 2779 | output_operand_lossage (const char *msgid, ...) |
3cf2715d | 2780 | { |
a52453cc PT |
2781 | char *fmt_string; |
2782 | char *new_message; | |
fd478a0a | 2783 | const char *pfx_str; |
e34d07f2 | 2784 | va_list ap; |
6cf9ac28 | 2785 | |
e34d07f2 | 2786 | va_start (ap, msgid); |
a52453cc PT |
2787 | |
2788 | pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: "; | |
2789 | asprintf (&fmt_string, "%s%s", pfx_str, _(msgid)); | |
2790 | vasprintf (&new_message, fmt_string, ap); | |
dd3f0101 | 2791 | |
3cf2715d | 2792 | if (this_is_asm_operands) |
a52453cc | 2793 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 2794 | else |
a52453cc PT |
2795 | internal_error ("%s", new_message); |
2796 | ||
2797 | free (fmt_string); | |
2798 | free (new_message); | |
e34d07f2 | 2799 | va_end (ap); |
3cf2715d DE |
2800 | } |
2801 | \f | |
2802 | /* Output of assembler code from a template, and its subroutines. */ | |
2803 | ||
0d4903b8 RK |
2804 | /* Annotate the assembly with a comment describing the pattern and |
2805 | alternative used. */ | |
2806 | ||
2807 | static void | |
6cf9ac28 | 2808 | output_asm_name (void) |
0d4903b8 RK |
2809 | { |
2810 | if (debug_insn) | |
2811 | { | |
2812 | int num = INSN_CODE (debug_insn); | |
2813 | fprintf (asm_out_file, "\t%s %d\t%s", | |
2814 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
2815 | insn_data[num].name); | |
2816 | if (insn_data[num].n_alternatives > 1) | |
2817 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
2818 | #ifdef HAVE_ATTR_length | |
2819 | fprintf (asm_out_file, "\t[length = %d]", | |
2820 | get_attr_length (debug_insn)); | |
2821 | #endif | |
2822 | /* Clear this so only the first assembler insn | |
2823 | of any rtl insn will get the special comment for -dp. */ | |
2824 | debug_insn = 0; | |
2825 | } | |
2826 | } | |
2827 | ||
998d7deb RH |
2828 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
2829 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
2830 | corresponds to the address of the object and 0 if to the object. */ |
2831 | ||
2832 | static tree | |
6cf9ac28 | 2833 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 2834 | { |
998d7deb | 2835 | tree expr; |
c5adc06a RK |
2836 | int inner_addressp; |
2837 | ||
2838 | *paddressp = 0; | |
2839 | ||
a560d4d4 JH |
2840 | if (GET_CODE (op) == REG) |
2841 | return REG_EXPR (op); | |
c5adc06a RK |
2842 | else if (GET_CODE (op) != MEM) |
2843 | return 0; | |
2844 | ||
998d7deb RH |
2845 | if (MEM_EXPR (op) != 0) |
2846 | return MEM_EXPR (op); | |
c5adc06a RK |
2847 | |
2848 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
2849 | *paddressp = 1; | |
2850 | op = XEXP (op, 0); | |
2851 | ||
2852 | /* First check if we have a decl for the address, then look at the right side | |
2853 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
2854 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
2855 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
2856 | return expr; | |
c5adc06a | 2857 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
2858 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
2859 | return expr; | |
c5adc06a RK |
2860 | |
2861 | while (GET_RTX_CLASS (GET_CODE (op)) == '1' | |
2862 | || GET_RTX_CLASS (GET_CODE (op)) == '2') | |
2863 | op = XEXP (op, 0); | |
2864 | ||
998d7deb RH |
2865 | expr = get_mem_expr_from_op (op, &inner_addressp); |
2866 | return inner_addressp ? 0 : expr; | |
c5adc06a | 2867 | } |
ff81832f | 2868 | |
4f9b4029 RK |
2869 | /* Output operand names for assembler instructions. OPERANDS is the |
2870 | operand vector, OPORDER is the order to write the operands, and NOPS | |
2871 | is the number of operands to write. */ | |
2872 | ||
2873 | static void | |
6cf9ac28 | 2874 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
2875 | { |
2876 | int wrote = 0; | |
2877 | int i; | |
2878 | ||
2879 | for (i = 0; i < nops; i++) | |
2880 | { | |
2881 | int addressp; | |
a560d4d4 JH |
2882 | rtx op = operands[oporder[i]]; |
2883 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 2884 | |
a560d4d4 JH |
2885 | fprintf (asm_out_file, "%c%s", |
2886 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
2887 | wrote = 1; | |
998d7deb | 2888 | if (expr) |
4f9b4029 | 2889 | { |
a560d4d4 | 2890 | fprintf (asm_out_file, "%s", |
998d7deb RH |
2891 | addressp ? "*" : ""); |
2892 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
2893 | wrote = 1; |
2894 | } | |
a560d4d4 JH |
2895 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
2896 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
2897 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
2898 | } |
2899 | } | |
2900 | ||
3cf2715d DE |
2901 | /* Output text from TEMPLATE to the assembler output file, |
2902 | obeying %-directions to substitute operands taken from | |
2903 | the vector OPERANDS. | |
2904 | ||
2905 | %N (for N a digit) means print operand N in usual manner. | |
2906 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
2907 | and print the label name with no punctuation. | |
2908 | %cN means require operand N to be a constant | |
2909 | and print the constant expression with no punctuation. | |
2910 | %aN means expect operand N to be a memory address | |
2911 | (not a memory reference!) and print a reference | |
2912 | to that address. | |
2913 | %nN means expect operand N to be a constant | |
2914 | and print a constant expression for minus the value | |
2915 | of the operand, with no other punctuation. */ | |
2916 | ||
2917 | void | |
6cf9ac28 | 2918 | output_asm_insn (const char *template, rtx *operands) |
3cf2715d | 2919 | { |
b3694847 SS |
2920 | const char *p; |
2921 | int c; | |
8554d9a4 JJ |
2922 | #ifdef ASSEMBLER_DIALECT |
2923 | int dialect = 0; | |
2924 | #endif | |
0d4903b8 | 2925 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 2926 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 2927 | int ops = 0; |
3cf2715d DE |
2928 | |
2929 | /* An insn may return a null string template | |
2930 | in a case where no assembler code is needed. */ | |
2931 | if (*template == 0) | |
2932 | return; | |
2933 | ||
4f9b4029 | 2934 | memset (opoutput, 0, sizeof opoutput); |
3cf2715d DE |
2935 | p = template; |
2936 | putc ('\t', asm_out_file); | |
2937 | ||
2938 | #ifdef ASM_OUTPUT_OPCODE | |
2939 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
2940 | #endif | |
2941 | ||
b729186a | 2942 | while ((c = *p++)) |
3cf2715d DE |
2943 | switch (c) |
2944 | { | |
3cf2715d | 2945 | case '\n': |
4f9b4029 RK |
2946 | if (flag_verbose_asm) |
2947 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
2948 | if (flag_print_asm_name) |
2949 | output_asm_name (); | |
2950 | ||
4f9b4029 RK |
2951 | ops = 0; |
2952 | memset (opoutput, 0, sizeof opoutput); | |
2953 | ||
3cf2715d | 2954 | putc (c, asm_out_file); |
cb649530 | 2955 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
2956 | while ((c = *p) == '\t') |
2957 | { | |
2958 | putc (c, asm_out_file); | |
2959 | p++; | |
2960 | } | |
2961 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 2962 | #endif |
cb649530 | 2963 | break; |
3cf2715d DE |
2964 | |
2965 | #ifdef ASSEMBLER_DIALECT | |
2966 | case '{': | |
b729186a | 2967 | { |
b3694847 | 2968 | int i; |
f5d927c0 | 2969 | |
8554d9a4 JJ |
2970 | if (dialect) |
2971 | output_operand_lossage ("nested assembly dialect alternatives"); | |
2972 | else | |
2973 | dialect = 1; | |
2974 | ||
b729186a JL |
2975 | /* If we want the first dialect, do nothing. Otherwise, skip |
2976 | DIALECT_NUMBER of strings ending with '|'. */ | |
2977 | for (i = 0; i < dialect_number; i++) | |
2978 | { | |
463a8384 | 2979 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 2980 | ; |
463a8384 BS |
2981 | if (*p == '}') |
2982 | break; | |
b729186a JL |
2983 | if (*p == '|') |
2984 | p++; | |
2985 | } | |
8554d9a4 JJ |
2986 | |
2987 | if (*p == '\0') | |
2988 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
b729186a | 2989 | } |
3cf2715d DE |
2990 | break; |
2991 | ||
2992 | case '|': | |
8554d9a4 JJ |
2993 | if (dialect) |
2994 | { | |
2995 | /* Skip to close brace. */ | |
2996 | do | |
2997 | { | |
2998 | if (*p == '\0') | |
2999 | { | |
3000 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3001 | break; | |
3002 | } | |
ff81832f | 3003 | } |
8554d9a4 JJ |
3004 | while (*p++ != '}'); |
3005 | dialect = 0; | |
3006 | } | |
3007 | else | |
3008 | putc (c, asm_out_file); | |
3cf2715d DE |
3009 | break; |
3010 | ||
3011 | case '}': | |
8554d9a4 JJ |
3012 | if (! dialect) |
3013 | putc (c, asm_out_file); | |
3014 | dialect = 0; | |
3cf2715d DE |
3015 | break; |
3016 | #endif | |
3017 | ||
3018 | case '%': | |
3019 | /* %% outputs a single %. */ | |
3020 | if (*p == '%') | |
3021 | { | |
3022 | p++; | |
3023 | putc (c, asm_out_file); | |
3024 | } | |
3025 | /* %= outputs a number which is unique to each insn in the entire | |
3026 | compilation. This is useful for making local labels that are | |
3027 | referred to more than once in a given insn. */ | |
3028 | else if (*p == '=') | |
3029 | { | |
3030 | p++; | |
3031 | fprintf (asm_out_file, "%d", insn_counter); | |
3032 | } | |
3033 | /* % followed by a letter and some digits | |
3034 | outputs an operand in a special way depending on the letter. | |
3035 | Letters `acln' are implemented directly. | |
3036 | Other letters are passed to `output_operand' so that | |
3037 | the PRINT_OPERAND macro can define them. */ | |
0df6c2c7 | 3038 | else if (ISALPHA (*p)) |
3cf2715d DE |
3039 | { |
3040 | int letter = *p++; | |
3041 | c = atoi (p); | |
3042 | ||
0df6c2c7 | 3043 | if (! ISDIGIT (*p)) |
a52453cc | 3044 | output_operand_lossage ("operand number missing after %%-letter"); |
0d4903b8 RK |
3045 | else if (this_is_asm_operands |
3046 | && (c < 0 || (unsigned int) c >= insn_noperands)) | |
3cf2715d DE |
3047 | output_operand_lossage ("operand number out of range"); |
3048 | else if (letter == 'l') | |
3049 | output_asm_label (operands[c]); | |
3050 | else if (letter == 'a') | |
3051 | output_address (operands[c]); | |
3052 | else if (letter == 'c') | |
3053 | { | |
3054 | if (CONSTANT_ADDRESS_P (operands[c])) | |
3055 | output_addr_const (asm_out_file, operands[c]); | |
3056 | else | |
3057 | output_operand (operands[c], 'c'); | |
3058 | } | |
3059 | else if (letter == 'n') | |
3060 | { | |
3061 | if (GET_CODE (operands[c]) == CONST_INT) | |
21e3a81b | 3062 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
3cf2715d DE |
3063 | - INTVAL (operands[c])); |
3064 | else | |
3065 | { | |
3066 | putc ('-', asm_out_file); | |
3067 | output_addr_const (asm_out_file, operands[c]); | |
3068 | } | |
3069 | } | |
3070 | else | |
3071 | output_operand (operands[c], letter); | |
f5d927c0 | 3072 | |
4f9b4029 RK |
3073 | if (!opoutput[c]) |
3074 | oporder[ops++] = c; | |
3075 | opoutput[c] = 1; | |
0d4903b8 | 3076 | |
0df6c2c7 | 3077 | while (ISDIGIT (c = *p)) |
f5d927c0 | 3078 | p++; |
3cf2715d DE |
3079 | } |
3080 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3081 | else if (ISDIGIT (*p)) |
3cf2715d DE |
3082 | { |
3083 | c = atoi (p); | |
f5d927c0 KH |
3084 | if (this_is_asm_operands |
3085 | && (c < 0 || (unsigned int) c >= insn_noperands)) | |
3cf2715d DE |
3086 | output_operand_lossage ("operand number out of range"); |
3087 | else | |
3088 | output_operand (operands[c], 0); | |
0d4903b8 | 3089 | |
4f9b4029 RK |
3090 | if (!opoutput[c]) |
3091 | oporder[ops++] = c; | |
3092 | opoutput[c] = 1; | |
3093 | ||
0df6c2c7 | 3094 | while (ISDIGIT (c = *p)) |
f5d927c0 | 3095 | p++; |
3cf2715d DE |
3096 | } |
3097 | /* % followed by punctuation: output something for that | |
3098 | punctuation character alone, with no operand. | |
3099 | The PRINT_OPERAND macro decides what is actually done. */ | |
3100 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3101 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3102 | output_operand (NULL_RTX, *p++); |
3103 | #endif | |
3104 | else | |
3105 | output_operand_lossage ("invalid %%-code"); | |
3106 | break; | |
3107 | ||
3108 | default: | |
3109 | putc (c, asm_out_file); | |
3110 | } | |
3111 | ||
0d4903b8 RK |
3112 | /* Write out the variable names for operands, if we know them. */ |
3113 | if (flag_verbose_asm) | |
4f9b4029 | 3114 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3115 | if (flag_print_asm_name) |
3116 | output_asm_name (); | |
3cf2715d DE |
3117 | |
3118 | putc ('\n', asm_out_file); | |
3119 | } | |
3120 | \f | |
3121 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3122 | ||
3123 | void | |
6cf9ac28 | 3124 | output_asm_label (rtx x) |
3cf2715d DE |
3125 | { |
3126 | char buf[256]; | |
3127 | ||
3128 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 RH |
3129 | x = XEXP (x, 0); |
3130 | if (GET_CODE (x) == CODE_LABEL | |
3131 | || (GET_CODE (x) == NOTE | |
3132 | && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) | |
3cf2715d DE |
3133 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3134 | else | |
a52453cc | 3135 | output_operand_lossage ("`%%l' operand isn't a label"); |
3cf2715d DE |
3136 | |
3137 | assemble_name (asm_out_file, buf); | |
3138 | } | |
3139 | ||
3140 | /* Print operand X using machine-dependent assembler syntax. | |
3141 | The macro PRINT_OPERAND is defined just to control this function. | |
3142 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3143 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3144 | between the % and the digits. | |
3145 | When CODE is a non-letter, X is 0. | |
3146 | ||
3147 | The meanings of the letters are machine-dependent and controlled | |
3148 | by PRINT_OPERAND. */ | |
3149 | ||
3150 | static void | |
6cf9ac28 | 3151 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3152 | { |
3153 | if (x && GET_CODE (x) == SUBREG) | |
49d801d3 | 3154 | x = alter_subreg (&x); |
3cf2715d DE |
3155 | |
3156 | /* If X is a pseudo-register, abort now rather than writing trash to the | |
3157 | assembler file. */ | |
3158 | ||
3159 | if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
3160 | abort (); | |
3161 | ||
3162 | PRINT_OPERAND (asm_out_file, x, code); | |
3163 | } | |
3164 | ||
3165 | /* Print a memory reference operand for address X | |
3166 | using machine-dependent assembler syntax. | |
3167 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3168 | ||
3169 | void | |
6cf9ac28 | 3170 | output_address (rtx x) |
3cf2715d | 3171 | { |
49d801d3 | 3172 | walk_alter_subreg (&x); |
3cf2715d DE |
3173 | PRINT_OPERAND_ADDRESS (asm_out_file, x); |
3174 | } | |
3175 | \f | |
3176 | /* Print an integer constant expression in assembler syntax. | |
3177 | Addition and subtraction are the only arithmetic | |
3178 | that may appear in these expressions. */ | |
3179 | ||
3180 | void | |
6cf9ac28 | 3181 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3182 | { |
3183 | char buf[256]; | |
3184 | ||
3185 | restart: | |
3186 | switch (GET_CODE (x)) | |
3187 | { | |
3188 | case PC: | |
eac50d7a | 3189 | putc ('.', file); |
3cf2715d DE |
3190 | break; |
3191 | ||
3192 | case SYMBOL_REF: | |
99c8c61c AO |
3193 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3194 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3195 | #else | |
3cf2715d | 3196 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3197 | #endif |
3cf2715d DE |
3198 | break; |
3199 | ||
3200 | case LABEL_REF: | |
422be3c3 AO |
3201 | x = XEXP (x, 0); |
3202 | /* Fall through. */ | |
3cf2715d DE |
3203 | case CODE_LABEL: |
3204 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3205 | #ifdef ASM_OUTPUT_LABEL_REF |
3206 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3207 | #else | |
3cf2715d | 3208 | assemble_name (file, buf); |
2f0b7af6 | 3209 | #endif |
3cf2715d DE |
3210 | break; |
3211 | ||
3212 | case CONST_INT: | |
21e3a81b | 3213 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3214 | break; |
3215 | ||
3216 | case CONST: | |
3217 | /* This used to output parentheses around the expression, | |
3218 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3219 | output_addr_const (file, XEXP (x, 0)); | |
3220 | break; | |
3221 | ||
3222 | case CONST_DOUBLE: | |
3223 | if (GET_MODE (x) == VOIDmode) | |
3224 | { | |
3225 | /* We can use %d if the number is one word and positive. */ | |
3226 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3227 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3cf2715d | 3228 | CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); |
f5d927c0 | 3229 | else if (CONST_DOUBLE_LOW (x) < 0) |
21e3a81b | 3230 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); |
3cf2715d | 3231 | else |
21e3a81b | 3232 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3233 | } |
3234 | else | |
3235 | /* We can't handle floating point constants; | |
3236 | PRINT_OPERAND must handle them. */ | |
3237 | output_operand_lossage ("floating constant misused"); | |
3238 | break; | |
3239 | ||
3240 | case PLUS: | |
3241 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3242 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3243 | { | |
3244 | output_addr_const (file, XEXP (x, 1)); | |
3245 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3246 | fprintf (file, "+"); | |
3247 | output_addr_const (file, XEXP (x, 0)); | |
3248 | } | |
3249 | else | |
3250 | { | |
3251 | output_addr_const (file, XEXP (x, 0)); | |
08106825 AO |
3252 | if (GET_CODE (XEXP (x, 1)) != CONST_INT |
3253 | || INTVAL (XEXP (x, 1)) >= 0) | |
3cf2715d DE |
3254 | fprintf (file, "+"); |
3255 | output_addr_const (file, XEXP (x, 1)); | |
3256 | } | |
3257 | break; | |
3258 | ||
3259 | case MINUS: | |
3260 | /* Avoid outputting things like x-x or x+5-x, | |
3261 | since some assemblers can't handle that. */ | |
3262 | x = simplify_subtraction (x); | |
3263 | if (GET_CODE (x) != MINUS) | |
3264 | goto restart; | |
3265 | ||
3266 | output_addr_const (file, XEXP (x, 0)); | |
3267 | fprintf (file, "-"); | |
301d03af RS |
3268 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0) |
3269 | || GET_CODE (XEXP (x, 1)) == PC | |
3270 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3271 | output_addr_const (file, XEXP (x, 1)); | |
3272 | else | |
3cf2715d | 3273 | { |
17b53c33 | 3274 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3275 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3276 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3277 | } |
3cf2715d DE |
3278 | break; |
3279 | ||
3280 | case ZERO_EXTEND: | |
3281 | case SIGN_EXTEND: | |
fdf473ae | 3282 | case SUBREG: |
3cf2715d DE |
3283 | output_addr_const (file, XEXP (x, 0)); |
3284 | break; | |
3285 | ||
3286 | default: | |
422be3c3 AO |
3287 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3288 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3289 | break; | |
3290 | ||
3291 | fail: | |
3292 | #endif | |
3cf2715d DE |
3293 | output_operand_lossage ("invalid expression as operand"); |
3294 | } | |
3295 | } | |
3296 | \f | |
3297 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3298 | %R prints the value of REGISTER_PREFIX. | |
3299 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3300 | %U prints the value of USER_LABEL_PREFIX. | |
3301 | %I prints the value of IMMEDIATE_PREFIX. | |
3302 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 3303 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
3304 | |
3305 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3306 | ||
3307 | void | |
e34d07f2 | 3308 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 3309 | { |
3cf2715d DE |
3310 | char buf[10]; |
3311 | char *q, c; | |
e34d07f2 | 3312 | va_list argptr; |
6cf9ac28 | 3313 | |
e34d07f2 | 3314 | va_start (argptr, p); |
3cf2715d DE |
3315 | |
3316 | buf[0] = '%'; | |
3317 | ||
b729186a | 3318 | while ((c = *p++)) |
3cf2715d DE |
3319 | switch (c) |
3320 | { | |
3321 | #ifdef ASSEMBLER_DIALECT | |
3322 | case '{': | |
b729186a JL |
3323 | { |
3324 | int i; | |
3cf2715d | 3325 | |
b729186a JL |
3326 | /* If we want the first dialect, do nothing. Otherwise, skip |
3327 | DIALECT_NUMBER of strings ending with '|'. */ | |
3328 | for (i = 0; i < dialect_number; i++) | |
3329 | { | |
3330 | while (*p && *p++ != '|') | |
3331 | ; | |
3332 | ||
3333 | if (*p == '|') | |
3334 | p++; | |
f5d927c0 | 3335 | } |
b729186a | 3336 | } |
3cf2715d DE |
3337 | break; |
3338 | ||
3339 | case '|': | |
3340 | /* Skip to close brace. */ | |
3341 | while (*p && *p++ != '}') | |
3342 | ; | |
3343 | break; | |
3344 | ||
3345 | case '}': | |
3346 | break; | |
3347 | #endif | |
3348 | ||
3349 | case '%': | |
3350 | c = *p++; | |
3351 | q = &buf[1]; | |
b1721339 KG |
3352 | while (strchr ("-+ #0", c)) |
3353 | { | |
3354 | *q++ = c; | |
3355 | c = *p++; | |
3356 | } | |
0df6c2c7 | 3357 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
3358 | { |
3359 | *q++ = c; | |
3360 | c = *p++; | |
3361 | } | |
3362 | switch (c) | |
3363 | { | |
3364 | case '%': | |
b1721339 | 3365 | putc ('%', file); |
3cf2715d DE |
3366 | break; |
3367 | ||
3368 | case 'd': case 'i': case 'u': | |
b1721339 KG |
3369 | case 'x': case 'X': case 'o': |
3370 | case 'c': | |
3cf2715d DE |
3371 | *q++ = c; |
3372 | *q = 0; | |
3373 | fprintf (file, buf, va_arg (argptr, int)); | |
3374 | break; | |
3375 | ||
3376 | case 'w': | |
b1721339 KG |
3377 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
3378 | 'o' cases, but we do not check for those cases. It | |
3379 | means that the value is a HOST_WIDE_INT, which may be | |
3380 | either `long' or `long long'. */ | |
85f015e1 KG |
3381 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
3382 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
3383 | *q++ = *p++; |
3384 | *q = 0; | |
3385 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3386 | break; | |
3387 | ||
3388 | case 'l': | |
3389 | *q++ = c; | |
b1721339 KG |
3390 | #ifdef HAVE_LONG_LONG |
3391 | if (*p == 'l') | |
3392 | { | |
3393 | *q++ = *p++; | |
3394 | *q++ = *p++; | |
3395 | *q = 0; | |
3396 | fprintf (file, buf, va_arg (argptr, long long)); | |
3397 | } | |
3398 | else | |
3399 | #endif | |
3400 | { | |
3401 | *q++ = *p++; | |
3402 | *q = 0; | |
3403 | fprintf (file, buf, va_arg (argptr, long)); | |
3404 | } | |
6cf9ac28 | 3405 | |
3cf2715d DE |
3406 | break; |
3407 | ||
3408 | case 's': | |
3409 | *q++ = c; | |
3410 | *q = 0; | |
3411 | fprintf (file, buf, va_arg (argptr, char *)); | |
3412 | break; | |
3413 | ||
3414 | case 'O': | |
3415 | #ifdef ASM_OUTPUT_OPCODE | |
3416 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3417 | #endif | |
3418 | break; | |
3419 | ||
3420 | case 'R': | |
3421 | #ifdef REGISTER_PREFIX | |
3422 | fprintf (file, "%s", REGISTER_PREFIX); | |
3423 | #endif | |
3424 | break; | |
3425 | ||
3426 | case 'I': | |
3427 | #ifdef IMMEDIATE_PREFIX | |
3428 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3429 | #endif | |
3430 | break; | |
3431 | ||
3432 | case 'L': | |
3433 | #ifdef LOCAL_LABEL_PREFIX | |
3434 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3435 | #endif | |
3436 | break; | |
3437 | ||
3438 | case 'U': | |
19283265 | 3439 | fputs (user_label_prefix, file); |
3cf2715d DE |
3440 | break; |
3441 | ||
fe0503ea NC |
3442 | #ifdef ASM_FPRINTF_EXTENSIONS |
3443 | /* Upper case letters are reserved for general use by asm_fprintf | |
3444 | and so are not available to target specific code. In order to | |
3445 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3446 | they are defined here. As they get turned into real extensions | |
3447 | to asm_fprintf they should be removed from this list. */ | |
3448 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3449 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3450 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3451 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3452 | break; | |
f5d927c0 | 3453 | |
fe0503ea NC |
3454 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3455 | #endif | |
3cf2715d DE |
3456 | default: |
3457 | abort (); | |
3458 | } | |
3459 | break; | |
3460 | ||
3461 | default: | |
b1721339 | 3462 | putc (c, file); |
3cf2715d | 3463 | } |
e34d07f2 | 3464 | va_end (argptr); |
3cf2715d DE |
3465 | } |
3466 | \f | |
3467 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3468 | into two rtx's for single words, | |
3469 | storing in *FIRST the word that comes first in memory in the target | |
3470 | and in *SECOND the other. */ | |
3471 | ||
3472 | void | |
6cf9ac28 | 3473 | split_double (rtx value, rtx *first, rtx *second) |
3cf2715d DE |
3474 | { |
3475 | if (GET_CODE (value) == CONST_INT) | |
3476 | { | |
5a1a6efd | 3477 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3478 | { |
5a1a6efd | 3479 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3480 | Extract the bits from it into two word-sized pieces. |
3481 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3482 | unsigned HOST_WIDE_INT low, high; |
3483 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3484 | ||
3485 | /* Set sign_bit to the most significant bit of a word. */ | |
3486 | sign_bit = 1; | |
3487 | sign_bit <<= BITS_PER_WORD - 1; | |
3488 | ||
3489 | /* Set mask so that all bits of the word are set. We could | |
3490 | have used 1 << BITS_PER_WORD instead of basing the | |
3491 | calculation on sign_bit. However, on machines where | |
3492 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3493 | compiler warning, even though the code would never be | |
3494 | executed. */ | |
3495 | mask = sign_bit << 1; | |
3496 | mask--; | |
3497 | ||
3498 | /* Set sign_extend as any remaining bits. */ | |
3499 | sign_extend = ~mask; | |
f5d927c0 | 3500 | |
7f251dee AO |
3501 | /* Pick the lower word and sign-extend it. */ |
3502 | low = INTVAL (value); | |
3503 | low &= mask; | |
3504 | if (low & sign_bit) | |
3505 | low |= sign_extend; | |
3506 | ||
3507 | /* Pick the higher word, shifted to the least significant | |
3508 | bits, and sign-extend it. */ | |
3509 | high = INTVAL (value); | |
3510 | high >>= BITS_PER_WORD - 1; | |
3511 | high >>= 1; | |
3512 | high &= mask; | |
3513 | if (high & sign_bit) | |
3514 | high |= sign_extend; | |
3515 | ||
3516 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3517 | if (WORDS_BIG_ENDIAN) |
3518 | { | |
7f251dee AO |
3519 | *first = GEN_INT (high); |
3520 | *second = GEN_INT (low); | |
5a1a6efd RK |
3521 | } |
3522 | else | |
3523 | { | |
7f251dee AO |
3524 | *first = GEN_INT (low); |
3525 | *second = GEN_INT (high); | |
5a1a6efd | 3526 | } |
f76b9db2 ILT |
3527 | } |
3528 | else | |
3529 | { | |
5a1a6efd RK |
3530 | /* The rule for using CONST_INT for a wider mode |
3531 | is that we regard the value as signed. | |
3532 | So sign-extend it. */ | |
3533 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
3534 | if (WORDS_BIG_ENDIAN) | |
3535 | { | |
3536 | *first = high; | |
3537 | *second = value; | |
3538 | } | |
3539 | else | |
3540 | { | |
3541 | *first = value; | |
3542 | *second = high; | |
3543 | } | |
f76b9db2 | 3544 | } |
3cf2715d DE |
3545 | } |
3546 | else if (GET_CODE (value) != CONST_DOUBLE) | |
3547 | { | |
f76b9db2 ILT |
3548 | if (WORDS_BIG_ENDIAN) |
3549 | { | |
3550 | *first = const0_rtx; | |
3551 | *second = value; | |
3552 | } | |
3553 | else | |
3554 | { | |
3555 | *first = value; | |
3556 | *second = const0_rtx; | |
3557 | } | |
3cf2715d DE |
3558 | } |
3559 | else if (GET_MODE (value) == VOIDmode | |
3560 | /* This is the old way we did CONST_DOUBLE integers. */ | |
3561 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
3562 | { | |
3563 | /* In an integer, the words are defined as most and least significant. | |
3564 | So order them by the target's convention. */ | |
f76b9db2 ILT |
3565 | if (WORDS_BIG_ENDIAN) |
3566 | { | |
3567 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3568 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3569 | } | |
3570 | else | |
3571 | { | |
3572 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3573 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3574 | } | |
3cf2715d DE |
3575 | } |
3576 | else | |
3577 | { | |
f5d927c0 KH |
3578 | REAL_VALUE_TYPE r; |
3579 | long l[2]; | |
3cf2715d DE |
3580 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
3581 | ||
3582 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
3583 | format, splits up the floating point double and outputs | |
3584 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 3585 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
3586 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
3587 | ||
b5a3eb84 JW |
3588 | /* If 32 bits is an entire word for the target, but not for the host, |
3589 | then sign-extend on the host so that the number will look the same | |
3590 | way on the host that it would on the target. See for instance | |
3591 | simplify_unary_operation. The #if is needed to avoid compiler | |
3592 | warnings. */ | |
3593 | ||
3594 | #if HOST_BITS_PER_LONG > 32 | |
3595 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
3596 | { | |
3597 | if (l[0] & ((long) 1 << 31)) | |
3598 | l[0] |= ((long) (-1) << 32); | |
3599 | if (l[1] & ((long) 1 << 31)) | |
3600 | l[1] |= ((long) (-1) << 32); | |
3601 | } | |
3602 | #endif | |
3603 | ||
3cf2715d DE |
3604 | *first = GEN_INT ((HOST_WIDE_INT) l[0]); |
3605 | *second = GEN_INT ((HOST_WIDE_INT) l[1]); | |
3cf2715d DE |
3606 | } |
3607 | } | |
3608 | \f | |
3609 | /* Return nonzero if this function has no function calls. */ | |
3610 | ||
3611 | int | |
6cf9ac28 | 3612 | leaf_function_p (void) |
3cf2715d DE |
3613 | { |
3614 | rtx insn; | |
b660f82f | 3615 | rtx link; |
3cf2715d | 3616 | |
70f4f91c | 3617 | if (current_function_profile || profile_arc_flag) |
3cf2715d DE |
3618 | return 0; |
3619 | ||
3620 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
3621 | { | |
7d167afd JJ |
3622 | if (GET_CODE (insn) == CALL_INSN |
3623 | && ! SIBLING_CALL_P (insn)) | |
3cf2715d DE |
3624 | return 0; |
3625 | if (GET_CODE (insn) == INSN | |
3626 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
0a1c58a2 JL |
3627 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN |
3628 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
3629 | return 0; |
3630 | } | |
b660f82f JW |
3631 | for (link = current_function_epilogue_delay_list; |
3632 | link; | |
3633 | link = XEXP (link, 1)) | |
3cf2715d | 3634 | { |
b660f82f JW |
3635 | insn = XEXP (link, 0); |
3636 | ||
3637 | if (GET_CODE (insn) == CALL_INSN | |
7d167afd | 3638 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3639 | return 0; |
b660f82f JW |
3640 | if (GET_CODE (insn) == INSN |
3641 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
3642 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN | |
3643 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
3644 | return 0; |
3645 | } | |
3646 | ||
3647 | return 1; | |
3648 | } | |
3649 | ||
09da1532 | 3650 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
3651 | Uses insn_shuid array, so it works only in the final pass. May be used by |
3652 | output templates to customary add branch prediction hints. | |
3653 | */ | |
3654 | int | |
6cf9ac28 | 3655 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
3656 | { |
3657 | int insn_id, label_id; | |
3658 | if (!uid_shuid) | |
3659 | abort (); | |
3660 | insn_id = INSN_SHUID (insn); | |
3661 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
3662 | /* We've hit some insns that does not have id information available. */ | |
3663 | if (!insn_id || !label_id) | |
3664 | abort (); | |
3665 | return insn_id < label_id; | |
3666 | } | |
3667 | ||
3cf2715d DE |
3668 | /* On some machines, a function with no call insns |
3669 | can run faster if it doesn't create its own register window. | |
3670 | When output, the leaf function should use only the "output" | |
3671 | registers. Ordinarily, the function would be compiled to use | |
3672 | the "input" registers to find its arguments; it is a candidate | |
3673 | for leaf treatment if it uses only the "input" registers. | |
3674 | Leaf function treatment means renumbering so the function | |
3675 | uses the "output" registers instead. */ | |
3676 | ||
3677 | #ifdef LEAF_REGISTERS | |
3678 | ||
3cf2715d DE |
3679 | /* Return 1 if this function uses only the registers that can be |
3680 | safely renumbered. */ | |
3681 | ||
3682 | int | |
6cf9ac28 | 3683 | only_leaf_regs_used (void) |
3cf2715d DE |
3684 | { |
3685 | int i; | |
4977bab6 | 3686 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
3687 | |
3688 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e5e809f4 JL |
3689 | if ((regs_ever_live[i] || global_regs[i]) |
3690 | && ! permitted_reg_in_leaf_functions[i]) | |
3691 | return 0; | |
3692 | ||
3693 | if (current_function_uses_pic_offset_table | |
3694 | && pic_offset_table_rtx != 0 | |
3695 | && GET_CODE (pic_offset_table_rtx) == REG | |
3696 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) | |
3697 | return 0; | |
3698 | ||
3cf2715d DE |
3699 | return 1; |
3700 | } | |
3701 | ||
3702 | /* Scan all instructions and renumber all registers into those | |
3703 | available in leaf functions. */ | |
3704 | ||
3705 | static void | |
6cf9ac28 | 3706 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
3707 | { |
3708 | rtx insn; | |
3709 | ||
3710 | /* Renumber only the actual patterns. | |
3711 | The reg-notes can contain frame pointer refs, | |
3712 | and renumbering them could crash, and should not be needed. */ | |
3713 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 3714 | if (INSN_P (insn)) |
3cf2715d | 3715 | leaf_renumber_regs_insn (PATTERN (insn)); |
f5d927c0 KH |
3716 | for (insn = current_function_epilogue_delay_list; |
3717 | insn; | |
3718 | insn = XEXP (insn, 1)) | |
2c3c49de | 3719 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
3720 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
3721 | } | |
3722 | ||
3723 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
3724 | available in leaf functions. */ | |
3725 | ||
3726 | void | |
6cf9ac28 | 3727 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 3728 | { |
b3694847 SS |
3729 | int i, j; |
3730 | const char *format_ptr; | |
3cf2715d DE |
3731 | |
3732 | if (in_rtx == 0) | |
3733 | return; | |
3734 | ||
3735 | /* Renumber all input-registers into output-registers. | |
3736 | renumbered_regs would be 1 for an output-register; | |
3737 | they */ | |
3738 | ||
3739 | if (GET_CODE (in_rtx) == REG) | |
3740 | { | |
3741 | int newreg; | |
3742 | ||
3743 | /* Don't renumber the same reg twice. */ | |
3744 | if (in_rtx->used) | |
3745 | return; | |
3746 | ||
3747 | newreg = REGNO (in_rtx); | |
3748 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
3749 | to reach here as part of a REG_NOTE. */ | |
3750 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
3751 | { | |
3752 | in_rtx->used = 1; | |
3753 | return; | |
3754 | } | |
3755 | newreg = LEAF_REG_REMAP (newreg); | |
3756 | if (newreg < 0) | |
3757 | abort (); | |
3758 | regs_ever_live[REGNO (in_rtx)] = 0; | |
3759 | regs_ever_live[newreg] = 1; | |
3760 | REGNO (in_rtx) = newreg; | |
3761 | in_rtx->used = 1; | |
3762 | } | |
3763 | ||
2c3c49de | 3764 | if (INSN_P (in_rtx)) |
3cf2715d DE |
3765 | { |
3766 | /* Inside a SEQUENCE, we find insns. | |
3767 | Renumber just the patterns of these insns, | |
3768 | just as we do for the top-level insns. */ | |
3769 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
3770 | return; | |
3771 | } | |
3772 | ||
3773 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
3774 | ||
3775 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
3776 | switch (*format_ptr++) | |
3777 | { | |
3778 | case 'e': | |
3779 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
3780 | break; | |
3781 | ||
3782 | case 'E': | |
3783 | if (NULL != XVEC (in_rtx, i)) | |
3784 | { | |
3785 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
3786 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
3787 | } | |
3788 | break; | |
3789 | ||
3790 | case 'S': | |
3791 | case 's': | |
3792 | case '0': | |
3793 | case 'i': | |
3794 | case 'w': | |
3795 | case 'n': | |
3796 | case 'u': | |
3797 | break; | |
3798 | ||
3799 | default: | |
3800 | abort (); | |
3801 | } | |
3802 | } | |
3803 | #endif | |
6a08f7b3 DP |
3804 | |
3805 | ||
3806 | /* When -gused is used, emit debug info for only used symbols. But in | |
3807 | addition to the standard intercepted debug_hooks there are some direct | |
3808 | calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params. | |
3809 | Those routines may also be called from a higher level intercepted routine. So | |
3810 | to prevent recording data for an inner call to one of these for an intercept, | |
3811 | we maintain a intercept nesting counter (debug_nesting). We only save the | |
3812 | intercepted arguments if the nesting is 1. */ | |
3813 | int debug_nesting = 0; | |
3814 | ||
3815 | static tree *symbol_queue; | |
3816 | int symbol_queue_index = 0; | |
3817 | static int symbol_queue_size = 0; | |
3818 | ||
3819 | /* Generate the symbols for any queued up type symbols we encountered | |
3820 | while generating the type info for some originally used symbol. | |
3821 | This might generate additional entries in the queue. Only when | |
3822 | the nesting depth goes to 0 is this routine called. */ | |
3823 | ||
3824 | void | |
6cf9ac28 | 3825 | debug_flush_symbol_queue (void) |
6a08f7b3 DP |
3826 | { |
3827 | int i; | |
6cf9ac28 | 3828 | |
6a08f7b3 DP |
3829 | /* Make sure that additionally queued items are not flushed |
3830 | prematurely. */ | |
6cf9ac28 | 3831 | |
6a08f7b3 | 3832 | ++debug_nesting; |
6cf9ac28 | 3833 | |
6a08f7b3 DP |
3834 | for (i = 0; i < symbol_queue_index; ++i) |
3835 | { | |
3836 | /* If we pushed queued symbols then such symbols are must be | |
3837 | output no matter what anyone else says. Specifically, | |
3838 | we need to make sure dbxout_symbol() thinks the symbol was | |
3839 | used and also we need to override TYPE_DECL_SUPPRESS_DEBUG | |
3840 | which may be set for outside reasons. */ | |
3841 | int saved_tree_used = TREE_USED (symbol_queue[i]); | |
3842 | int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]); | |
3843 | TREE_USED (symbol_queue[i]) = 1; | |
3844 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0; | |
3845 | ||
3846 | #ifdef DBX_DEBUGGING_INFO | |
3847 | dbxout_symbol (symbol_queue[i], 0); | |
3848 | #endif | |
3849 | ||
3850 | TREE_USED (symbol_queue[i]) = saved_tree_used; | |
3851 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug; | |
3852 | } | |
3853 | ||
3854 | symbol_queue_index = 0; | |
6cf9ac28 | 3855 | --debug_nesting; |
6a08f7b3 DP |
3856 | } |
3857 | ||
3858 | /* Queue a type symbol needed as part of the definition of a decl | |
3859 | symbol. These symbols are generated when debug_flush_symbol_queue() | |
3860 | is called. */ | |
3861 | ||
6cf9ac28 | 3862 | void |
6a08f7b3 DP |
3863 | debug_queue_symbol (tree decl) |
3864 | { | |
6cf9ac28 | 3865 | if (symbol_queue_index >= symbol_queue_size) |
6a08f7b3 DP |
3866 | { |
3867 | symbol_queue_size += 10; | |
703ad42b KG |
3868 | symbol_queue = xrealloc (symbol_queue, |
3869 | symbol_queue_size * sizeof (tree)); | |
6a08f7b3 DP |
3870 | } |
3871 | ||
3872 | symbol_queue[symbol_queue_index++] = decl; | |
6cf9ac28 | 3873 | } |
6a08f7b3 | 3874 | |
f9da5064 | 3875 | /* Free symbol queue. */ |
6a08f7b3 | 3876 | void |
6cf9ac28 | 3877 | debug_free_queue (void) |
6a08f7b3 DP |
3878 | { |
3879 | if (symbol_queue) | |
3880 | { | |
3881 | free (symbol_queue); | |
3882 | symbol_queue = NULL; | |
3883 | symbol_queue_size = 0; | |
3884 | } | |
3885 | } |