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3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
e5e809f4 2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
3cf2715d
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
940d9d63
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
3cf2715d
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20
21
22/* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly as assembler code by the macros FUNCTION_PROLOGUE and
45 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
46
47#include "config.h"
48#ifdef __STDC__
49#include <stdarg.h>
50#else
51#include <varargs.h>
52#endif
670ee920 53#include "system.h"
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54
55#include "tree.h"
56#include "rtl.h"
57#include "regs.h"
58#include "insn-config.h"
59#include "insn-flags.h"
60#include "insn-attr.h"
61#include "insn-codes.h"
62#include "recog.h"
63#include "conditions.h"
64#include "flags.h"
65#include "real.h"
66#include "hard-reg-set.h"
67#include "defaults.h"
68#include "output.h"
3d195391 69#include "except.h"
10f0ad3d 70#include "toplev.h"
d6f4ec51 71#include "reload.h"
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72
73/* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
74#if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
76ead72b 75#include "dbxout.h"
c7391272 76#if defined (USG) || !defined (HAVE_STAB_H)
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77#include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
78#else
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79#include <stab.h>
80#endif
81
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82#endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
83
84#ifdef XCOFF_DEBUGGING_INFO
85#include "xcoffout.h"
86#endif
87
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88#ifdef DWARF_DEBUGGING_INFO
89#include "dwarfout.h"
90#endif
91
92#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
93#include "dwarf2out.h"
94#endif
95
96#ifdef SDB_DEBUGGING_INFO
97#include "sdbout.h"
98#endif
99
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100/* .stabd code for line number. */
101#ifndef N_SLINE
102#define N_SLINE 0x44
103#endif
104
105/* .stabs code for included file name. */
106#ifndef N_SOL
107#define N_SOL 0x84
108#endif
109
110#ifndef INT_TYPE_SIZE
111#define INT_TYPE_SIZE BITS_PER_WORD
112#endif
113
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114#ifndef LONG_TYPE_SIZE
115#define LONG_TYPE_SIZE BITS_PER_WORD
116#endif
117
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118/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
119 null default for it to save conditionalization later. */
120#ifndef CC_STATUS_INIT
121#define CC_STATUS_INIT
122#endif
123
124/* How to start an assembler comment. */
125#ifndef ASM_COMMENT_START
126#define ASM_COMMENT_START ";#"
127#endif
128
129/* Is the given character a logical line separator for the assembler? */
130#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
131#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
132#endif
133
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134#ifndef JUMP_TABLES_IN_TEXT_SECTION
135#define JUMP_TABLES_IN_TEXT_SECTION 0
136#endif
137
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138/* Nonzero means this function is a leaf function, with no function calls.
139 This variable exists to be examined in FUNCTION_PROLOGUE
140 and FUNCTION_EPILOGUE. Always zero, unless set by some action. */
141int leaf_function;
142
143/* Last insn processed by final_scan_insn. */
144static rtx debug_insn = 0;
145
146/* Line number of last NOTE. */
147static int last_linenum;
148
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149/* Highest line number in current block. */
150static int high_block_linenum;
151
152/* Likewise for function. */
153static int high_function_linenum;
154
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155/* Filename of last NOTE. */
156static char *last_filename;
157
158/* Number of basic blocks seen so far;
159 used if profile_block_flag is set. */
160static int count_basic_blocks;
161
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162/* Number of instrumented arcs when profile_arc_flag is set. */
163extern int count_instrumented_arcs;
164
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165extern int length_unit_log; /* This is defined in insn-attrtab.c. */
166
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167/* Nonzero while outputting an `asm' with operands.
168 This means that inconsistencies are the user's fault, so don't abort.
169 The precise value is the insn being output, to pass to error_for_asm. */
170static rtx this_is_asm_operands;
171
172/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 173static unsigned int insn_noperands;
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174
175/* Compare optimization flag. */
176
177static rtx last_ignored_compare = 0;
178
179/* Flag indicating this insn is the start of a new basic block. */
180
181static int new_block = 1;
182
183/* All the symbol-blocks (levels of scoping) in the compilation
184 are assigned sequence numbers in order of appearance of the
185 beginnings of the symbol-blocks. Both final and dbxout do this,
186 and assume that they will both give the same number to each block.
187 Final uses these sequence numbers to generate assembler label names
188 LBBnnn and LBEnnn for the beginning and end of the symbol-block.
189 Dbxout uses the sequence numbers to generate references to the same labels
190 from the dbx debugging information.
191
192 Sdb records this level at the beginning of each function,
193 in order to find the current level when recursing down declarations.
194 It outputs the block beginning and endings
195 at the point in the asm file where the blocks would begin and end. */
196
197int next_block_index;
198
199/* Assign a unique number to each insn that is output.
200 This can be used to generate unique local labels. */
201
202static int insn_counter = 0;
203
204#ifdef HAVE_cc0
205/* This variable contains machine-dependent flags (defined in tm.h)
206 set and examined by output routines
207 that describe how to interpret the condition codes properly. */
208
209CC_STATUS cc_status;
210
211/* During output of an insn, this contains a copy of cc_status
212 from before the insn. */
213
214CC_STATUS cc_prev_status;
215#endif
216
217/* Indexed by hardware reg number, is 1 if that register is ever
218 used in the current function.
219
220 In life_analysis, or in stupid_life_analysis, this is set
221 up to record the hard regs used explicitly. Reload adds
222 in the hard regs used for holding pseudo regs. Final uses
223 it to generate the code in the function prologue and epilogue
224 to save and restore registers as needed. */
225
226char regs_ever_live[FIRST_PSEUDO_REGISTER];
227
228/* Nonzero means current function must be given a frame pointer.
229 Set in stmt.c if anything is allocated on the stack there.
230 Set in reload1.c if anything is allocated on the stack there. */
231
232int frame_pointer_needed;
233
234/* Assign unique numbers to labels generated for profiling. */
235
236int profile_label_no;
237
238/* Length so far allocated in PENDING_BLOCKS. */
239
240static int max_block_depth;
241
242/* Stack of sequence numbers of symbol-blocks of which we have seen the
243 beginning but not yet the end. Sequence numbers are assigned at
244 the beginning; this stack allows us to find the sequence number
245 of a block that is ending. */
246
247static int *pending_blocks;
248
249/* Number of elements currently in use in PENDING_BLOCKS. */
250
251static int block_depth;
252
253/* Nonzero if have enabled APP processing of our assembler output. */
254
255static int app_on;
256
257/* If we are outputting an insn sequence, this contains the sequence rtx.
258 Zero otherwise. */
259
260rtx final_sequence;
261
262#ifdef ASSEMBLER_DIALECT
263
264/* Number of the assembler dialect to use, starting at 0. */
265static int dialect_number;
266#endif
267
268/* Indexed by line number, nonzero if there is a note for that line. */
269
270static char *line_note_exists;
271
272/* Linked list to hold line numbers for each basic block. */
273
274struct bb_list {
275 struct bb_list *next; /* pointer to next basic block */
276 int line_num; /* line number */
277 int file_label_num; /* LPBC<n> label # for stored filename */
278 int func_label_num; /* LPBC<n> label # for stored function name */
279};
280
281static struct bb_list *bb_head = 0; /* Head of basic block list */
282static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
283static int bb_file_label_num = -1; /* Current label # for file */
284static int bb_func_label_num = -1; /* Current label # for func */
285
286/* Linked list to hold the strings for each file and function name output. */
287
288struct bb_str {
289 struct bb_str *next; /* pointer to next string */
290 char *string; /* string */
291 int label_num; /* label number */
292 int length; /* string length */
293};
294
295extern rtx peephole PROTO((rtx));
296
297static struct bb_str *sbb_head = 0; /* Head of string list. */
298static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
299static int sbb_label_num = 0; /* Last label used */
300
1d300e19 301#ifdef HAVE_ATTR_length
3cf2715d 302static int asm_insn_count PROTO((rtx));
1d300e19 303#endif
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304static void profile_function PROTO((FILE *));
305static void profile_after_prologue PROTO((FILE *));
306static void add_bb PROTO((FILE *));
307static int add_bb_string PROTO((char *, int));
308static void output_source_line PROTO((FILE *, rtx));
309static rtx walk_alter_subreg PROTO((rtx));
cb649530 310static void output_asm_name PROTO((void));
3cf2715d 311static void output_operand PROTO((rtx, int));
e9a25f70 312#ifdef LEAF_REGISTERS
3cf2715d 313static void leaf_renumber_regs PROTO((rtx));
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314#endif
315#ifdef HAVE_cc0
316static int alter_cond PROTO((rtx));
317#endif
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318
319extern char *getpwd ();
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320\f
321/* Initialize data in final at the beginning of a compilation. */
322
323void
324init_final (filename)
325 char *filename;
326{
327 next_block_index = 2;
328 app_on = 0;
329 max_block_depth = 20;
330 pending_blocks = (int *) xmalloc (20 * sizeof *pending_blocks);
331 final_sequence = 0;
332
333#ifdef ASSEMBLER_DIALECT
334 dialect_number = ASSEMBLER_DIALECT;
335#endif
336}
337
338/* Called at end of source file,
339 to output the block-profiling table for this entire compilation. */
340
341void
342end_final (filename)
343 char *filename;
344{
345 int i;
346
9e2f9a7f 347 if (profile_block_flag || profile_arc_flag)
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348 {
349 char name[20];
350 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
9e2f9a7f 351 int size, rounded;
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352 struct bb_list *ptr;
353 struct bb_str *sptr;
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354 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
355 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
356
357 if (profile_block_flag)
358 size = long_bytes * count_basic_blocks;
359 else
360 size = long_bytes * count_instrumented_arcs;
361 rounded = size;
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362
363 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
364 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
365 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
366
367 data_section ();
368
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369 /* Output the main header, of 11 words:
370 0: 1 if this file is initialized, else 0.
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371 1: address of file name (LPBX1).
372 2: address of table of counts (LPBX2).
373 3: number of counts in the table.
374 4: always 0, for compatibility with Sun.
375
376 The following are GNU extensions:
377
378 5: address of table of start addrs of basic blocks (LPBX3).
379 6: Number of bytes in this header.
380 7: address of table of function names (LPBX4).
381 8: address of table of line numbers (LPBX5) or 0.
47431dff 382 9: address of table of file names (LPBX6) or 0.
0f41302f 383 10: space reserved for basic block profiling. */
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384
385 ASM_OUTPUT_ALIGN (asm_out_file, align);
386
387 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
388 /* zero word */
9e2f9a7f 389 assemble_integer (const0_rtx, long_bytes, 1);
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390
391 /* address of filename */
392 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
38a448ca 393 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
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394
395 /* address of count table */
396 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
38a448ca 397 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 398
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399 /* count of the # of basic blocks or # of instrumented arcs */
400 if (profile_block_flag)
401 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
402 else
403 assemble_integer (GEN_INT (count_instrumented_arcs), long_bytes,
404 1);
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405
406 /* zero word (link field) */
9e2f9a7f 407 assemble_integer (const0_rtx, pointer_bytes, 1);
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408
409 /* address of basic block start address table */
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410 if (profile_block_flag)
411 {
412 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 413 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
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414 1);
415 }
416 else
417 assemble_integer (const0_rtx, pointer_bytes, 1);
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418
419 /* byte count for extended structure. */
9e2f9a7f 420 assemble_integer (GEN_INT (10 * UNITS_PER_WORD), long_bytes, 1);
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421
422 /* address of function name table */
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423 if (profile_block_flag)
424 {
425 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
38a448ca 426 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
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427 1);
428 }
429 else
430 assemble_integer (const0_rtx, pointer_bytes, 1);
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431
432 /* address of line number and filename tables if debugging. */
9e2f9a7f 433 if (write_symbols != NO_DEBUG && profile_block_flag)
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434 {
435 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
38a448ca 436 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 437 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
38a448ca 438 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d
DE
439 }
440 else
441 {
9e2f9a7f
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442 assemble_integer (const0_rtx, pointer_bytes, 1);
443 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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444 }
445
47431dff
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446 /* space for extension ptr (link field) */
447 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
448
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449 /* Output the file name changing the suffix to .d for Sun tcov
450 compatibility. */
451 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
452 {
67e23d2f
JW
453 char *cwd = getpwd ();
454 int len = strlen (filename) + strlen (cwd) + 1;
455 char *data_file = (char *) alloca (len + 4);
456
457 strcpy (data_file, cwd);
458 strcat (data_file, "/");
459 strcat (data_file, filename);
3cf2715d 460 strip_off_ending (data_file, len);
9e2f9a7f
DE
461 if (profile_block_flag)
462 strcat (data_file, ".d");
463 else
464 strcat (data_file, ".da");
3cf2715d
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465 assemble_string (data_file, strlen (data_file) + 1);
466 }
467
468 /* Make space for the table of counts. */
2786cbad 469 if (size == 0)
3cf2715d
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470 {
471 /* Realign data section. */
472 ASM_OUTPUT_ALIGN (asm_out_file, align);
473 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
474 if (size != 0)
475 assemble_zeros (size);
476 }
477 else
478 {
479 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
480#ifdef ASM_OUTPUT_SHARED_LOCAL
481 if (flag_shared_data)
482 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
483 else
484#endif
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485#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
486 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
487 BIGGEST_ALIGNMENT);
488#else
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489#ifdef ASM_OUTPUT_ALIGNED_LOCAL
490 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
491 BIGGEST_ALIGNMENT);
492#else
493 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
e9a25f70 494#endif
3cf2715d
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495#endif
496 }
497
498 /* Output any basic block strings */
9e2f9a7f 499 if (profile_block_flag)
3cf2715d 500 {
9e2f9a7f
DE
501 readonly_data_section ();
502 if (sbb_head)
3cf2715d 503 {
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504 ASM_OUTPUT_ALIGN (asm_out_file, align);
505 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
506 {
507 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
508 sptr->label_num);
509 assemble_string (sptr->string, sptr->length);
510 }
3cf2715d
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511 }
512 }
513
514 /* Output the table of addresses. */
9e2f9a7f 515 if (profile_block_flag)
3cf2715d 516 {
9e2f9a7f
DE
517 /* Realign in new section */
518 ASM_OUTPUT_ALIGN (asm_out_file, align);
519 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
520 for (i = 0; i < count_basic_blocks; i++)
521 {
522 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
38a448ca 523 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
524 pointer_bytes, 1);
525 }
3cf2715d
DE
526 }
527
528 /* Output the table of function names. */
9e2f9a7f 529 if (profile_block_flag)
3cf2715d 530 {
9e2f9a7f
DE
531 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
532 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
3cf2715d 533 {
9e2f9a7f
DE
534 if (ptr->func_label_num >= 0)
535 {
536 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
537 ptr->func_label_num);
38a448ca 538 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
539 pointer_bytes, 1);
540 }
541 else
542 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d 543 }
3cf2715d 544
9e2f9a7f
DE
545 for ( ; i < count_basic_blocks; i++)
546 assemble_integer (const0_rtx, pointer_bytes, 1);
547 }
3cf2715d 548
9e2f9a7f 549 if (write_symbols != NO_DEBUG && profile_block_flag)
3cf2715d
DE
550 {
551 /* Output the table of line numbers. */
552 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
553 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
9e2f9a7f 554 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
3cf2715d
DE
555
556 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 557 assemble_integer (const0_rtx, long_bytes, 1);
3cf2715d
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558
559 /* Output the table of file names. */
560 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
561 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
562 {
563 if (ptr->file_label_num >= 0)
564 {
9e2f9a7f
DE
565 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
566 ptr->file_label_num);
38a448ca 567 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f 568 pointer_bytes, 1);
3cf2715d
DE
569 }
570 else
9e2f9a7f 571 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
572 }
573
574 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 575 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
576 }
577
578 /* End with the address of the table of addresses,
579 so we can find it easily, as the last word in the file's text. */
9e2f9a7f
DE
580 if (profile_block_flag)
581 {
582 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 583 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
584 1);
585 }
3cf2715d
DE
586 }
587}
588
589/* Enable APP processing of subsequent output.
590 Used before the output from an `asm' statement. */
591
592void
593app_enable ()
594{
595 if (! app_on)
596 {
51723711 597 fputs (ASM_APP_ON, asm_out_file);
3cf2715d
DE
598 app_on = 1;
599 }
600}
601
602/* Disable APP processing of subsequent output.
603 Called from varasm.c before most kinds of output. */
604
605void
606app_disable ()
607{
608 if (app_on)
609 {
51723711 610 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
DE
611 app_on = 0;
612 }
613}
614\f
615/* Return the number of slots filled in the current
616 delayed branch sequence (we don't count the insn needing the
617 delay slot). Zero if not in a delayed branch sequence. */
618
619#ifdef DELAY_SLOTS
620int
621dbr_sequence_length ()
622{
623 if (final_sequence != 0)
624 return XVECLEN (final_sequence, 0) - 1;
625 else
626 return 0;
627}
628#endif
629\f
630/* The next two pages contain routines used to compute the length of an insn
631 and to shorten branches. */
632
633/* Arrays for insn lengths, and addresses. The latter is referenced by
634 `insn_current_length'. */
635
636static short *insn_lengths;
637int *insn_addresses;
638
639/* Address of insn being processed. Used by `insn_current_length'. */
640int insn_current_address;
641
fc470718
R
642/* Address of insn being processed in previous iteration. */
643int insn_last_address;
644
645/* konwn invariant alignment of insn being processed. */
646int insn_current_align;
647
95707627
R
648/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
649 gives the next following alignment insn that increases the known
650 alignment, or NULL_RTX if there is no such insn.
651 For any alignment obtained this way, we can again index uid_align with
652 its uid to obtain the next following align that in turn increases the
653 alignment, till we reach NULL_RTX; the sequence obtained this way
654 for each insn we'll call the alignment chain of this insn in the following
655 comments. */
656
9e423e6d
JW
657struct label_alignment {
658 short alignment;
659 short max_skip;
660};
661
662static rtx *uid_align;
663static int *uid_shuid;
664static struct label_alignment *label_align;
95707627 665
3cf2715d
DE
666/* Indicate that branch shortening hasn't yet been done. */
667
668void
669init_insn_lengths ()
670{
95707627
R
671 if (label_align)
672 {
673 free (label_align);
674 label_align = 0;
675 }
676 if (uid_shuid)
677 {
678 free (uid_shuid);
679 uid_shuid = 0;
680 }
681 if (insn_lengths)
682 {
683 free (insn_lengths);
684 insn_lengths = 0;
685 }
686 if (insn_addresses)
687 {
688 free (insn_addresses);
689 insn_addresses = 0;
690 }
691 if (uid_align)
692 {
693 free (uid_align);
694 uid_align = 0;
695 }
3cf2715d
DE
696}
697
698/* Obtain the current length of an insn. If branch shortening has been done,
699 get its actual length. Otherwise, get its maximum length. */
700
701int
702get_attr_length (insn)
703 rtx insn;
704{
705#ifdef HAVE_ATTR_length
706 rtx body;
707 int i;
708 int length = 0;
709
710 if (insn_lengths)
711 return insn_lengths[INSN_UID (insn)];
712 else
713 switch (GET_CODE (insn))
714 {
715 case NOTE:
716 case BARRIER:
717 case CODE_LABEL:
718 return 0;
719
720 case CALL_INSN:
721 length = insn_default_length (insn);
722 break;
723
724 case JUMP_INSN:
725 body = PATTERN (insn);
726 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
727 {
fc470718
R
728 /* Alignment is machine-dependent and should be handled by
729 ADDR_VEC_ALIGN. */
3cf2715d
DE
730 }
731 else
732 length = insn_default_length (insn);
733 break;
734
735 case INSN:
736 body = PATTERN (insn);
737 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
738 return 0;
739
740 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
741 length = asm_insn_count (body) * insn_default_length (insn);
742 else if (GET_CODE (body) == SEQUENCE)
743 for (i = 0; i < XVECLEN (body, 0); i++)
744 length += get_attr_length (XVECEXP (body, 0, i));
745 else
746 length = insn_default_length (insn);
e9a25f70
JL
747 break;
748
749 default:
750 break;
3cf2715d
DE
751 }
752
753#ifdef ADJUST_INSN_LENGTH
754 ADJUST_INSN_LENGTH (insn, length);
755#endif
756 return length;
757#else /* not HAVE_ATTR_length */
758 return 0;
759#endif /* not HAVE_ATTR_length */
760}
761\f
fc470718
R
762/* Code to handle alignment inside shorten_branches. */
763
764/* Here is an explanation how the algorithm in align_fuzz can give
765 proper results:
766
767 Call a sequence of instructions beginning with alignment point X
768 and continuing until the next alignment point `block X'. When `X'
769 is used in an expression, it means the alignment value of the
770 alignment point.
771
772 Call the distance between the start of the first insn of block X, and
773 the end of the last insn of block X `IX', for the `inner size of X'.
774 This is clearly the sum of the instruction lengths.
775
776 Likewise with the next alignment-delimited block following X, which we
777 shall call block Y.
778
779 Call the distance between the start of the first insn of block X, and
780 the start of the first insn of block Y `OX', for the `outer size of X'.
781
782 The estimated padding is then OX - IX.
783
784 OX can be safely estimated as
785
786 if (X >= Y)
787 OX = round_up(IX, Y)
788 else
789 OX = round_up(IX, X) + Y - X
790
791 Clearly est(IX) >= real(IX), because that only depends on the
792 instruction lengths, and those being overestimated is a given.
793
794 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
795 we needn't worry about that when thinking about OX.
796
797 When X >= Y, the alignment provided by Y adds no uncertainty factor
798 for branch ranges starting before X, so we can just round what we have.
799 But when X < Y, we don't know anything about the, so to speak,
800 `middle bits', so we have to assume the worst when aligning up from an
801 address mod X to one mod Y, which is Y - X. */
802
803#ifndef LABEL_ALIGN
804#define LABEL_ALIGN(LABEL) 0
805#endif
806
9e423e6d
JW
807#ifndef LABEL_ALIGN_MAX_SKIP
808#define LABEL_ALIGN_MAX_SKIP 0
809#endif
810
fc470718
R
811#ifndef LOOP_ALIGN
812#define LOOP_ALIGN(LABEL) 0
813#endif
814
9e423e6d
JW
815#ifndef LOOP_ALIGN_MAX_SKIP
816#define LOOP_ALIGN_MAX_SKIP 0
817#endif
818
fc470718
R
819#ifndef LABEL_ALIGN_AFTER_BARRIER
820#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
821#endif
822
9e423e6d
JW
823#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
824#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
825#endif
826
fc470718
R
827#ifndef ADDR_VEC_ALIGN
828int
829final_addr_vec_align (addr_vec)
830 rtx addr_vec;
831{
832 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
833
834 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
835 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
836 return align;
837
838}
839#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
840#endif
841
842#ifndef INSN_LENGTH_ALIGNMENT
843#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
844#endif
845
fc470718
R
846#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
847
de7987a6 848static int min_labelno, max_labelno;
fc470718
R
849
850#define LABEL_TO_ALIGNMENT(LABEL) \
9e423e6d
JW
851 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
852
853#define LABEL_TO_MAX_SKIP(LABEL) \
854 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
fc470718
R
855
856/* For the benefit of port specific code do this also as a function. */
857int
858label_to_alignment (label)
859 rtx label;
860{
861 return LABEL_TO_ALIGNMENT (label);
862}
863
864#ifdef HAVE_ATTR_length
865/* The differences in addresses
866 between a branch and its target might grow or shrink depending on
867 the alignment the start insn of the range (the branch for a forward
868 branch or the label for a backward branch) starts out on; if these
869 differences are used naively, they can even oscillate infinitely.
870 We therefore want to compute a 'worst case' address difference that
871 is independent of the alignment the start insn of the range end
872 up on, and that is at least as large as the actual difference.
873 The function align_fuzz calculates the amount we have to add to the
874 naively computed difference, by traversing the part of the alignment
875 chain of the start insn of the range that is in front of the end insn
876 of the range, and considering for each alignment the maximum amount
877 that it might contribute to a size increase.
878
879 For casesi tables, we also want to know worst case minimum amounts of
880 address difference, in case a machine description wants to introduce
881 some common offset that is added to all offsets in a table.
882 For this purpose, align_fuzz with a growth argument of 0 comuptes the
883 appropriate adjustment. */
884
885
886/* Compute the maximum delta by which the difference of the addresses of
887 START and END might grow / shrink due to a different address for start
888 which changes the size of alignment insns between START and END.
889 KNOWN_ALIGN_LOG is the alignment known for START.
890 GROWTH should be ~0 if the objective is to compute potential code size
891 increase, and 0 if the objective is to compute potential shrink.
892 The return value is undefined for any other value of GROWTH. */
687d0ab6
R
893int
894align_fuzz (start, end, known_align_log, growth)
fc470718
R
895 rtx start, end;
896 int known_align_log;
897 unsigned growth;
898{
899 int uid = INSN_UID (start);
900 rtx align_label;
901 int known_align = 1 << known_align_log;
902 int end_shuid = INSN_SHUID (end);
903 int fuzz = 0;
904
905 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
906 {
907 int align_addr, new_align;
908
909 uid = INSN_UID (align_label);
910 align_addr = insn_addresses[uid] - insn_lengths[uid];
911 if (uid_shuid[uid] > end_shuid)
912 break;
913 known_align_log = LABEL_TO_ALIGNMENT (align_label);
914 new_align = 1 << known_align_log;
915 if (new_align < known_align)
916 continue;
917 fuzz += (-align_addr ^ growth) & (new_align - known_align);
918 known_align = new_align;
919 }
920 return fuzz;
921}
922
923/* Compute a worst-case reference address of a branch so that it
924 can be safely used in the presence of aligned labels. Since the
925 size of the branch itself is unknown, the size of the branch is
926 not included in the range. I.e. for a forward branch, the reference
927 address is the end address of the branch as known from the previous
928 branch shortening pass, minus a value to account for possible size
929 increase due to alignment. For a backward branch, it is the start
930 address of the branch as known from the current pass, plus a value
931 to account for possible size increase due to alignment.
932 NB.: Therefore, the maximum offset allowed for backward branches needs
933 to exclude the branch size. */
934int
935insn_current_reference_address (branch)
936 rtx branch;
937{
938 rtx dest;
939 rtx seq = NEXT_INSN (PREV_INSN (branch));
940 int seq_uid = INSN_UID (seq);
941 if (GET_CODE (branch) != JUMP_INSN)
942 /* This can happen for example on the PA; the objective is to know the
943 offset to address something in front of the start of the function.
944 Thus, we can treat it like a backward branch.
945 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
946 any alignment we'd encounter, so we skip the call to align_fuzz. */
947 return insn_current_address;
948 dest = JUMP_LABEL (branch);
33f7f353 949 /* BRANCH has no proper alignment chain set, so use SEQ. */
fc470718
R
950 if (INSN_SHUID (branch) < INSN_SHUID (dest))
951 {
952 /* Forward branch. */
953 return (insn_last_address + insn_lengths[seq_uid]
26024475 954 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
955 }
956 else
957 {
958 /* Backward branch. */
959 return (insn_current_address
923f7cf9 960 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
961 }
962}
963#endif /* HAVE_ATTR_length */
964\f
3cf2715d
DE
965/* Make a pass over all insns and compute their actual lengths by shortening
966 any branches of variable length if possible. */
967
968/* Give a default value for the lowest address in a function. */
969
970#ifndef FIRST_INSN_ADDRESS
971#define FIRST_INSN_ADDRESS 0
972#endif
973
fc470718
R
974/* shorten_branches might be called multiple times: for example, the SH
975 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
976 In order to do this, it needs proper length information, which it obtains
977 by calling shorten_branches. This cannot be collapsed with
978 shorten_branches itself into a single pass unless we also want to intergate
979 reorg.c, since the branch splitting exposes new instructions with delay
980 slots. */
981
3cf2715d
DE
982void
983shorten_branches (first)
984 rtx first;
985{
3cf2715d 986 rtx insn;
fc470718
R
987 int max_uid;
988 int i;
fc470718 989 int max_log;
9e423e6d 990 int max_skip;
fc470718
R
991#ifdef HAVE_ATTR_length
992#define MAX_CODE_ALIGN 16
993 rtx seq;
3cf2715d 994 int something_changed = 1;
3cf2715d
DE
995 char *varying_length;
996 rtx body;
997 int uid;
fc470718 998 rtx align_tab[MAX_CODE_ALIGN];
3cf2715d 999
3d14e82f
JW
1000 /* In order to make sure that all instructions have valid length info,
1001 we must split them before we compute the address/length info. */
1002
1003 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
1004 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
fc470718
R
1005 {
1006 rtx old = insn;
1007 insn = try_split (PATTERN (old), old, 1);
1008 /* When not optimizing, the old insn will be still left around
1009 with only the 'deleted' bit set. Transform it into a note
1010 to avoid confusion of subsequent processing. */
1011 if (INSN_DELETED_P (old))
1012 {
1013 PUT_CODE (old , NOTE);
1014 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
1015 NOTE_SOURCE_FILE (old) = 0;
1016 }
1017 }
1018#endif
3d14e82f 1019
fc470718
R
1020 /* We must do some computations even when not actually shortening, in
1021 order to get the alignment information for the labels. */
1022
95707627
R
1023 init_insn_lengths ();
1024
fc470718
R
1025 /* Compute maximum UID and allocate label_align / uid_shuid. */
1026 max_uid = get_max_uid ();
1027
1028 max_labelno = max_label_num ();
1029 min_labelno = get_first_label_num ();
9e423e6d
JW
1030 label_align = (struct label_alignment *) xmalloc (
1031 (max_labelno - min_labelno + 1) * sizeof (struct label_alignment));
296433e1 1032 bzero ((char *) label_align,
9e423e6d 1033 (max_labelno - min_labelno + 1) * sizeof (struct label_alignment));
fc470718 1034
fc470718
R
1035 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1036
1037 /* Initialize label_align and set up uid_shuid to be strictly
1038 monotonically rising with insn order. */
e2faec75
R
1039 /* We use max_log here to keep track of the maximum alignment we want to
1040 impose on the next CODE_LABEL (or the current one if we are processing
1041 the CODE_LABEL itself). */
1042
9e423e6d
JW
1043 max_log = 0;
1044 max_skip = 0;
1045
1046 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718
R
1047 {
1048 int log;
1049
1050 INSN_SHUID (insn) = i++;
1051 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
e2faec75
R
1052 {
1053 /* reorg might make the first insn of a loop being run once only,
1054 and delete the label in front of it. Then we want to apply
1055 the loop alignment to the new label created by reorg, which
1056 is separated by the former loop start insn from the
1057 NOTE_INSN_LOOP_BEG. */
1058 }
fc470718
R
1059 else if (GET_CODE (insn) == CODE_LABEL)
1060 {
1061 rtx next;
1062
1063 log = LABEL_ALIGN (insn);
1064 if (max_log < log)
9e423e6d
JW
1065 {
1066 max_log = log;
1067 max_skip = LABEL_ALIGN_MAX_SKIP;
1068 }
fc470718 1069 next = NEXT_INSN (insn);
75197b37
BS
1070 /* ADDR_VECs only take room if read-only data goes into the text
1071 section. */
1072 if (JUMP_TABLES_IN_TEXT_SECTION
1073#if !defined(READONLY_DATA_SECTION)
1074 || 1
fc470718 1075#endif
75197b37
BS
1076 )
1077 if (next && GET_CODE (next) == JUMP_INSN)
1078 {
1079 rtx nextbody = PATTERN (next);
1080 if (GET_CODE (nextbody) == ADDR_VEC
1081 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1082 {
1083 log = ADDR_VEC_ALIGN (next);
1084 if (max_log < log)
1085 {
1086 max_log = log;
1087 max_skip = LABEL_ALIGN_MAX_SKIP;
1088 }
1089 }
1090 }
fc470718 1091 LABEL_TO_ALIGNMENT (insn) = max_log;
9e423e6d 1092 LABEL_TO_MAX_SKIP (insn) = max_skip;
fc470718 1093 max_log = 0;
9e423e6d 1094 max_skip = 0;
fc470718
R
1095 }
1096 else if (GET_CODE (insn) == BARRIER)
1097 {
1098 rtx label;
1099
1100 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1101 label = NEXT_INSN (label))
1102 if (GET_CODE (label) == CODE_LABEL)
1103 {
1104 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1105 if (max_log < log)
9e423e6d
JW
1106 {
1107 max_log = log;
1108 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1109 }
fc470718
R
1110 break;
1111 }
1112 }
e2faec75
R
1113 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1114 sequences in order to handle reorg output efficiently. */
fc470718
R
1115 else if (GET_CODE (insn) == NOTE
1116 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1117 {
1118 rtx label;
1119
e2faec75 1120 for (label = insn; label; label = NEXT_INSN (label))
fc470718
R
1121 if (GET_CODE (label) == CODE_LABEL)
1122 {
1123 log = LOOP_ALIGN (insn);
1124 if (max_log < log)
9e423e6d
JW
1125 {
1126 max_log = log;
1127 max_skip = LOOP_ALIGN_MAX_SKIP;
1128 }
fc470718
R
1129 break;
1130 }
1131 }
1132 else
1133 continue;
1134 }
1135#ifdef HAVE_ATTR_length
1136
1137 /* Allocate the rest of the arrays. */
fc470718 1138 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
fc470718 1139 insn_addresses = (int *) xmalloc (max_uid * sizeof (int));
af035616
R
1140 /* Syntax errors can lead to labels being outside of the main insn stream.
1141 Initialize insn_addresses, so that we get reproducible results. */
1142 bzero ((char *)insn_addresses, max_uid * sizeof *insn_addresses);
fc470718
R
1143 uid_align = (rtx *) xmalloc (max_uid * sizeof *uid_align);
1144
1145 varying_length = (char *) xmalloc (max_uid * sizeof (char));
1146
1147 bzero (varying_length, max_uid);
1148
1149 /* Initialize uid_align. We scan instructions
1150 from end to start, and keep in align_tab[n] the last seen insn
1151 that does an alignment of at least n+1, i.e. the successor
1152 in the alignment chain for an insn that does / has a known
1153 alignment of n. */
1154
1155 bzero ((char *) uid_align, max_uid * sizeof *uid_align);
1156
1157 for (i = MAX_CODE_ALIGN; --i >= 0; )
1158 align_tab[i] = NULL_RTX;
1159 seq = get_last_insn ();
33f7f353 1160 for (; seq; seq = PREV_INSN (seq))
fc470718
R
1161 {
1162 int uid = INSN_UID (seq);
1163 int log;
fc470718
R
1164 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1165 uid_align[uid] = align_tab[0];
fc470718
R
1166 if (log)
1167 {
1168 /* Found an alignment label. */
1169 uid_align[uid] = align_tab[log];
1170 for (i = log - 1; i >= 0; i--)
1171 align_tab[i] = seq;
1172 }
33f7f353
JR
1173 }
1174#ifdef CASE_VECTOR_SHORTEN_MODE
1175 if (optimize)
1176 {
1177 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1178 label fields. */
1179
1180 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1181 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1182 int rel;
1183
1184 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 1185 {
33f7f353
JR
1186 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1187 int len, i, min, max, insn_shuid;
1188 int min_align;
1189 addr_diff_vec_flags flags;
1190
1191 if (GET_CODE (insn) != JUMP_INSN
1192 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1193 continue;
1194 pat = PATTERN (insn);
1195 len = XVECLEN (pat, 1);
1196 if (len <= 0)
1197 abort ();
1198 min_align = MAX_CODE_ALIGN;
1199 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1200 {
1201 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1202 int shuid = INSN_SHUID (lab);
1203 if (shuid < min)
1204 {
1205 min = shuid;
1206 min_lab = lab;
1207 }
1208 if (shuid > max)
1209 {
1210 max = shuid;
1211 max_lab = lab;
1212 }
1213 if (min_align > LABEL_TO_ALIGNMENT (lab))
1214 min_align = LABEL_TO_ALIGNMENT (lab);
1215 }
1216 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1217 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1218 insn_shuid = INSN_SHUID (insn);
1219 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1220 flags.min_align = min_align;
1221 flags.base_after_vec = rel > insn_shuid;
1222 flags.min_after_vec = min > insn_shuid;
1223 flags.max_after_vec = max > insn_shuid;
1224 flags.min_after_base = min > rel;
1225 flags.max_after_base = max > rel;
1226 ADDR_DIFF_VEC_FLAGS (pat) = flags;
fc470718
R
1227 }
1228 }
33f7f353 1229#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1230
3cf2715d
DE
1231
1232 /* Compute initial lengths, addresses, and varying flags for each insn. */
1233 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1234 insn != 0;
1235 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1236 {
1237 uid = INSN_UID (insn);
fc470718 1238
3cf2715d 1239 insn_lengths[uid] = 0;
fc470718
R
1240
1241 if (GET_CODE (insn) == CODE_LABEL)
1242 {
1243 int log = LABEL_TO_ALIGNMENT (insn);
1244 if (log)
1245 {
1246 int align = 1 << log;
ecb06768 1247 int new_address = (insn_current_address + align - 1) & -align;
fc470718
R
1248 insn_lengths[uid] = new_address - insn_current_address;
1249 insn_current_address = new_address;
1250 }
1251 }
1252
1253 insn_addresses[uid] = insn_current_address;
3cf2715d
DE
1254
1255 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1256 || GET_CODE (insn) == CODE_LABEL)
1257 continue;
04da53bd
R
1258 if (INSN_DELETED_P (insn))
1259 continue;
3cf2715d
DE
1260
1261 body = PATTERN (insn);
1262 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
5a32a90c
JR
1263 {
1264 /* This only takes room if read-only data goes into the text
1265 section. */
75197b37
BS
1266 if (JUMP_TABLES_IN_TEXT_SECTION
1267#if !defined(READONLY_DATA_SECTION)
1268 || 1
1269#endif
1270 )
1271 insn_lengths[uid] = (XVECLEN (body,
1272 GET_CODE (body) == ADDR_DIFF_VEC)
1273 * GET_MODE_SIZE (GET_MODE (body)));
5a32a90c 1274 /* Alignment is handled by ADDR_VEC_ALIGN. */
5a32a90c 1275 }
3cf2715d
DE
1276 else if (asm_noperands (body) >= 0)
1277 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1278 else if (GET_CODE (body) == SEQUENCE)
1279 {
1280 int i;
1281 int const_delay_slots;
1282#ifdef DELAY_SLOTS
1283 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1284#else
1285 const_delay_slots = 0;
1286#endif
1287 /* Inside a delay slot sequence, we do not do any branch shortening
1288 if the shortening could change the number of delay slots
0f41302f 1289 of the branch. */
3cf2715d
DE
1290 for (i = 0; i < XVECLEN (body, 0); i++)
1291 {
1292 rtx inner_insn = XVECEXP (body, 0, i);
1293 int inner_uid = INSN_UID (inner_insn);
1294 int inner_length;
1295
1296 if (asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1297 inner_length = (asm_insn_count (PATTERN (inner_insn))
1298 * insn_default_length (inner_insn));
1299 else
1300 inner_length = insn_default_length (inner_insn);
1301
1302 insn_lengths[inner_uid] = inner_length;
1303 if (const_delay_slots)
1304 {
1305 if ((varying_length[inner_uid]
1306 = insn_variable_length_p (inner_insn)) != 0)
1307 varying_length[uid] = 1;
1308 insn_addresses[inner_uid] = (insn_current_address +
1309 insn_lengths[uid]);
1310 }
1311 else
1312 varying_length[inner_uid] = 0;
1313 insn_lengths[uid] += inner_length;
1314 }
1315 }
1316 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1317 {
1318 insn_lengths[uid] = insn_default_length (insn);
1319 varying_length[uid] = insn_variable_length_p (insn);
1320 }
1321
1322 /* If needed, do any adjustment. */
1323#ifdef ADJUST_INSN_LENGTH
1324 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1325#endif
1326 }
1327
1328 /* Now loop over all the insns finding varying length insns. For each,
1329 get the current insn length. If it has changed, reflect the change.
1330 When nothing changes for a full pass, we are done. */
1331
1332 while (something_changed)
1333 {
1334 something_changed = 0;
fc470718 1335 insn_current_align = MAX_CODE_ALIGN - 1;
3cf2715d
DE
1336 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1337 insn != 0;
1338 insn = NEXT_INSN (insn))
1339 {
1340 int new_length;
b729186a 1341#ifdef ADJUST_INSN_LENGTH
3cf2715d 1342 int tmp_length;
b729186a 1343#endif
fc470718 1344 int length_align;
3cf2715d
DE
1345
1346 uid = INSN_UID (insn);
fc470718
R
1347
1348 if (GET_CODE (insn) == CODE_LABEL)
1349 {
1350 int log = LABEL_TO_ALIGNMENT (insn);
1351 if (log > insn_current_align)
1352 {
1353 int align = 1 << log;
ecb06768 1354 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1355 insn_lengths[uid] = new_address - insn_current_address;
1356 insn_current_align = log;
1357 insn_current_address = new_address;
1358 }
1359 else
1360 insn_lengths[uid] = 0;
1361 insn_addresses[uid] = insn_current_address;
1362 continue;
1363 }
1364
1365 length_align = INSN_LENGTH_ALIGNMENT (insn);
1366 if (length_align < insn_current_align)
1367 insn_current_align = length_align;
1368
1369 insn_last_address = insn_addresses[uid];
3cf2715d 1370 insn_addresses[uid] = insn_current_address;
fc470718 1371
5e75ef4a 1372#ifdef CASE_VECTOR_SHORTEN_MODE
33f7f353
JR
1373 if (optimize && GET_CODE (insn) == JUMP_INSN
1374 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1375 {
33f7f353
JR
1376 rtx body = PATTERN (insn);
1377 int old_length = insn_lengths[uid];
1378 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1379 rtx min_lab = XEXP (XEXP (body, 2), 0);
1380 rtx max_lab = XEXP (XEXP (body, 3), 0);
1381 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1382 int rel_addr = insn_addresses[INSN_UID (rel_lab)];
1383 int min_addr = insn_addresses[INSN_UID (min_lab)];
1384 int max_addr = insn_addresses[INSN_UID (max_lab)];
1385 rtx prev;
1386 int rel_align = 0;
1387
1388 /* Try to find a known alignment for rel_lab. */
1389 for (prev = rel_lab;
1390 prev
1391 && ! insn_lengths[INSN_UID (prev)]
1392 && ! (varying_length[INSN_UID (prev)] & 1);
1393 prev = PREV_INSN (prev))
1394 if (varying_length[INSN_UID (prev)] & 2)
1395 {
1396 rel_align = LABEL_TO_ALIGNMENT (prev);
1397 break;
1398 }
1399
1400 /* See the comment on addr_diff_vec_flags in rtl.h for the
1401 meaning of the flags values. base: REL_LAB vec: INSN */
1402 /* Anything after INSN has still addresses from the last
1403 pass; adjust these so that they reflect our current
1404 estimate for this pass. */
1405 if (flags.base_after_vec)
1406 rel_addr += insn_current_address - insn_last_address;
1407 if (flags.min_after_vec)
1408 min_addr += insn_current_address - insn_last_address;
1409 if (flags.max_after_vec)
1410 max_addr += insn_current_address - insn_last_address;
1411 /* We want to know the worst case, i.e. lowest possible value
1412 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1413 its offset is positive, and we have to be wary of code shrink;
1414 otherwise, it is negative, and we have to be vary of code
1415 size increase. */
1416 if (flags.min_after_base)
1417 {
1418 /* If INSN is between REL_LAB and MIN_LAB, the size
1419 changes we are about to make can change the alignment
1420 within the observed offset, therefore we have to break
1421 it up into two parts that are independent. */
1422 if (! flags.base_after_vec && flags.min_after_vec)
1423 {
1424 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1425 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1426 }
1427 else
1428 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1429 }
1430 else
1431 {
1432 if (flags.base_after_vec && ! flags.min_after_vec)
1433 {
1434 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1435 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1436 }
1437 else
1438 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1439 }
1440 /* Likewise, determine the highest lowest possible value
1441 for the offset of MAX_LAB. */
1442 if (flags.max_after_base)
1443 {
1444 if (! flags.base_after_vec && flags.max_after_vec)
1445 {
1446 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1447 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1448 }
1449 else
1450 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1451 }
1452 else
1453 {
1454 if (flags.base_after_vec && ! flags.max_after_vec)
1455 {
1456 max_addr += align_fuzz (max_lab, insn, 0, 0);
1457 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1458 }
1459 else
1460 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1461 }
1462 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1463 max_addr - rel_addr,
1464 body));
75197b37
BS
1465 if (JUMP_TABLES_IN_TEXT_SECTION
1466#if !defined(READONLY_DATA_SECTION)
1467 || 1
33f7f353 1468#endif
75197b37
BS
1469 )
1470 {
1471 insn_lengths[uid]
1472 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1473 insn_current_address += insn_lengths[uid];
1474 if (insn_lengths[uid] != old_length)
1475 something_changed = 1;
1476 }
1477
33f7f353 1478 continue;
33f7f353 1479 }
5e75ef4a
JL
1480#endif /* CASE_VECTOR_SHORTEN_MODE */
1481
1482 if (! (varying_length[uid]))
3cf2715d
DE
1483 {
1484 insn_current_address += insn_lengths[uid];
1485 continue;
1486 }
1487 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1488 {
1489 int i;
1490
1491 body = PATTERN (insn);
1492 new_length = 0;
1493 for (i = 0; i < XVECLEN (body, 0); i++)
1494 {
1495 rtx inner_insn = XVECEXP (body, 0, i);
1496 int inner_uid = INSN_UID (inner_insn);
1497 int inner_length;
1498
1499 insn_addresses[inner_uid] = insn_current_address;
1500
1501 /* insn_current_length returns 0 for insns with a
1502 non-varying length. */
1503 if (! varying_length[inner_uid])
1504 inner_length = insn_lengths[inner_uid];
1505 else
1506 inner_length = insn_current_length (inner_insn);
1507
1508 if (inner_length != insn_lengths[inner_uid])
1509 {
1510 insn_lengths[inner_uid] = inner_length;
1511 something_changed = 1;
1512 }
1513 insn_current_address += insn_lengths[inner_uid];
1514 new_length += inner_length;
1515 }
1516 }
1517 else
1518 {
1519 new_length = insn_current_length (insn);
1520 insn_current_address += new_length;
1521 }
1522
3cf2715d
DE
1523#ifdef ADJUST_INSN_LENGTH
1524 /* If needed, do any adjustment. */
1525 tmp_length = new_length;
1526 ADJUST_INSN_LENGTH (insn, new_length);
1527 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1528#endif
1529
1530 if (new_length != insn_lengths[uid])
1531 {
1532 insn_lengths[uid] = new_length;
1533 something_changed = 1;
1534 }
1535 }
bb4aaf18
TG
1536 /* For a non-optimizing compile, do only a single pass. */
1537 if (!optimize)
1538 break;
3cf2715d 1539 }
fc470718
R
1540
1541 free (varying_length);
1542
3cf2715d
DE
1543#endif /* HAVE_ATTR_length */
1544}
1545
1546#ifdef HAVE_ATTR_length
1547/* Given the body of an INSN known to be generated by an ASM statement, return
1548 the number of machine instructions likely to be generated for this insn.
1549 This is used to compute its length. */
1550
1551static int
1552asm_insn_count (body)
1553 rtx body;
1554{
1555 char *template;
1556 int count = 1;
1557
5d0930ea
DE
1558 if (GET_CODE (body) == ASM_INPUT)
1559 template = XSTR (body, 0);
1560 else
1561 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1562 NULL_PTR, NULL_PTR);
1563
1564 for ( ; *template; template++)
3cf2715d
DE
1565 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1566 count++;
1567
1568 return count;
1569}
1570#endif
1571\f
1572/* Output assembler code for the start of a function,
1573 and initialize some of the variables in this file
1574 for the new function. The label for the function and associated
1575 assembler pseudo-ops have already been output in `assemble_start_function'.
1576
1577 FIRST is the first insn of the rtl for the function being compiled.
1578 FILE is the file to write assembler code to.
1579 OPTIMIZE is nonzero if we should eliminate redundant
1580 test and compare insns. */
1581
1582void
1583final_start_function (first, file, optimize)
1584 rtx first;
1585 FILE *file;
1586 int optimize;
1587{
1588 block_depth = 0;
1589
1590 this_is_asm_operands = 0;
1591
1592#ifdef NON_SAVING_SETJMP
1593 /* A function that calls setjmp should save and restore all the
1594 call-saved registers on a system where longjmp clobbers them. */
1595 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1596 {
1597 int i;
1598
1599 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1600 if (!call_used_regs[i] && !call_fixed_regs[i])
1601 regs_ever_live[i] = 1;
1602 }
1603#endif
1604
1605 /* Initial line number is supposed to be output
1606 before the function's prologue and label
1607 so that the function's address will not appear to be
1608 in the last statement of the preceding function. */
1609 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
5fad6898
RK
1610 last_linenum = high_block_linenum = high_function_linenum
1611 = NOTE_LINE_NUMBER (first);
eac40081 1612
c5cec899 1613#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
d291dd49 1614 /* Output DWARF definition of the function. */
0021b564 1615 if (dwarf2out_do_frame ())
9a666dda 1616 dwarf2out_begin_prologue ();
d291dd49
JM
1617#endif
1618
5fad6898
RK
1619 /* For SDB and XCOFF, the function beginning must be marked between
1620 the function label and the prologue. We always need this, even when
3c734272 1621 -g1 was used. Defer on MIPS systems so that parameter descriptions
0f41302f 1622 follow function entry. */
3c734272 1623#if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
5fad6898
RK
1624 if (write_symbols == SDB_DEBUG)
1625 sdbout_begin_function (last_linenum);
1626 else
2e2bbce2 1627#endif
3cf2715d 1628#ifdef XCOFF_DEBUGGING_INFO
5fad6898
RK
1629 if (write_symbols == XCOFF_DEBUG)
1630 xcoffout_begin_function (file, last_linenum);
1631 else
3cf2715d 1632#endif
5fad6898
RK
1633 /* But only output line number for other debug info types if -g2
1634 or better. */
1635 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1636 output_source_line (file, first);
3cf2715d
DE
1637
1638#ifdef LEAF_REG_REMAP
1639 if (leaf_function)
1640 leaf_renumber_regs (first);
1641#endif
1642
1643 /* The Sun386i and perhaps other machines don't work right
1644 if the profiling code comes after the prologue. */
1645#ifdef PROFILE_BEFORE_PROLOGUE
1646 if (profile_flag)
1647 profile_function (file);
1648#endif /* PROFILE_BEFORE_PROLOGUE */
1649
0021b564
JM
1650#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1651 if (dwarf2out_do_frame ())
1652 dwarf2out_frame_debug (NULL_RTX);
1653#endif
1654
3cf2715d
DE
1655#ifdef FUNCTION_PROLOGUE
1656 /* First output the function prologue: code to set up the stack frame. */
1657 FUNCTION_PROLOGUE (file, get_frame_size ());
1658#endif
1659
1660#if defined (SDB_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
1661 if (write_symbols == SDB_DEBUG || write_symbols == XCOFF_DEBUG)
1662 next_block_index = 1;
1663#endif
1664
1665 /* If the machine represents the prologue as RTL, the profiling code must
1666 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1667#ifdef HAVE_prologue
1668 if (! HAVE_prologue)
1669#endif
1670 profile_after_prologue (file);
1671
1672 profile_label_no++;
1673
1674 /* If we are doing basic block profiling, remember a printable version
1675 of the function name. */
1676 if (profile_block_flag)
1677 {
db3cf6fb
MS
1678 bb_func_label_num
1679 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
3cf2715d
DE
1680 }
1681}
1682
1683static void
1684profile_after_prologue (file)
1685 FILE *file;
1686{
1687#ifdef FUNCTION_BLOCK_PROFILER
1688 if (profile_block_flag)
1689 {
47431dff 1690 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
3cf2715d
DE
1691 }
1692#endif /* FUNCTION_BLOCK_PROFILER */
1693
1694#ifndef PROFILE_BEFORE_PROLOGUE
1695 if (profile_flag)
1696 profile_function (file);
1697#endif /* not PROFILE_BEFORE_PROLOGUE */
1698}
1699
1700static void
1701profile_function (file)
1702 FILE *file;
1703{
9e2f9a7f 1704 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
b729186a
JL
1705#if defined(ASM_OUTPUT_REG_PUSH)
1706#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
3cf2715d 1707 int sval = current_function_returns_struct;
b729186a
JL
1708#endif
1709#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
3cf2715d 1710 int cxt = current_function_needs_context;
b729186a
JL
1711#endif
1712#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d
DE
1713
1714 data_section ();
1715 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1716 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
9e2f9a7f 1717 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
3cf2715d 1718
499df339 1719 function_section (current_function_decl);
3cf2715d 1720
65ed39df 1721#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1722 if (sval)
1723 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1724#else
65ed39df 1725#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1726 if (sval)
51723711
KG
1727 {
1728 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1729 }
3cf2715d
DE
1730#endif
1731#endif
1732
65ed39df 1733#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1734 if (cxt)
1735 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1736#else
65ed39df 1737#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1738 if (cxt)
51723711
KG
1739 {
1740 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1741 }
3cf2715d
DE
1742#endif
1743#endif
3cf2715d
DE
1744
1745 FUNCTION_PROFILER (file, profile_label_no);
1746
65ed39df 1747#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1748 if (cxt)
1749 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1750#else
65ed39df 1751#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1752 if (cxt)
51723711
KG
1753 {
1754 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1755 }
3cf2715d
DE
1756#endif
1757#endif
3cf2715d 1758
65ed39df 1759#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1760 if (sval)
1761 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1762#else
65ed39df 1763#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1764 if (sval)
51723711
KG
1765 {
1766 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1767 }
3cf2715d
DE
1768#endif
1769#endif
1770}
1771
1772/* Output assembler code for the end of a function.
1773 For clarity, args are same as those of `final_start_function'
1774 even though not all of them are needed. */
1775
1776void
1777final_end_function (first, file, optimize)
1778 rtx first;
1779 FILE *file;
1780 int optimize;
1781{
1782 if (app_on)
1783 {
51723711 1784 fputs (ASM_APP_OFF, file);
3cf2715d
DE
1785 app_on = 0;
1786 }
1787
1788#ifdef SDB_DEBUGGING_INFO
1789 if (write_symbols == SDB_DEBUG)
eac40081 1790 sdbout_end_function (high_function_linenum);
3cf2715d
DE
1791#endif
1792
1793#ifdef DWARF_DEBUGGING_INFO
1794 if (write_symbols == DWARF_DEBUG)
1795 dwarfout_end_function ();
1796#endif
1797
1798#ifdef XCOFF_DEBUGGING_INFO
1799 if (write_symbols == XCOFF_DEBUG)
eac40081 1800 xcoffout_end_function (file, high_function_linenum);
3cf2715d
DE
1801#endif
1802
1803#ifdef FUNCTION_EPILOGUE
1804 /* Finally, output the function epilogue:
1805 code to restore the stack frame and return to the caller. */
1806 FUNCTION_EPILOGUE (file, get_frame_size ());
1807#endif
1808
1809#ifdef SDB_DEBUGGING_INFO
1810 if (write_symbols == SDB_DEBUG)
1811 sdbout_end_epilogue ();
1812#endif
1813
1814#ifdef DWARF_DEBUGGING_INFO
1815 if (write_symbols == DWARF_DEBUG)
1816 dwarfout_end_epilogue ();
1817#endif
1818
c5cec899 1819#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
0021b564 1820 if (dwarf2out_do_frame ())
9a666dda
JM
1821 dwarf2out_end_epilogue ();
1822#endif
1823
3cf2715d
DE
1824#ifdef XCOFF_DEBUGGING_INFO
1825 if (write_symbols == XCOFF_DEBUG)
1826 xcoffout_end_epilogue (file);
1827#endif
1828
1829 bb_func_label_num = -1; /* not in function, nuke label # */
1830
1831 /* If FUNCTION_EPILOGUE is not defined, then the function body
1832 itself contains return instructions wherever needed. */
1833}
1834\f
1835/* Add a block to the linked list that remembers the current line/file/function
1836 for basic block profiling. Emit the label in front of the basic block and
1837 the instructions that increment the count field. */
1838
1839static void
1840add_bb (file)
1841 FILE *file;
1842{
1843 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1844
1845 /* Add basic block to linked list. */
1846 ptr->next = 0;
1847 ptr->line_num = last_linenum;
1848 ptr->file_label_num = bb_file_label_num;
1849 ptr->func_label_num = bb_func_label_num;
1850 *bb_tail = ptr;
1851 bb_tail = &ptr->next;
1852
1853 /* Enable the table of basic-block use counts
1854 to point at the code it applies to. */
1855 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1856
1857 /* Before first insn of this basic block, increment the
1858 count of times it was entered. */
1859#ifdef BLOCK_PROFILER
1860 BLOCK_PROFILER (file, count_basic_blocks);
9e2f9a7f
DE
1861#endif
1862#ifdef HAVE_cc0
3cf2715d
DE
1863 CC_STATUS_INIT;
1864#endif
1865
1866 new_block = 0;
1867 count_basic_blocks++;
1868}
1869
1870/* Add a string to be used for basic block profiling. */
1871
1872static int
1873add_bb_string (string, perm_p)
1874 char *string;
1875 int perm_p;
1876{
1877 int len;
1878 struct bb_str *ptr = 0;
1879
1880 if (!string)
1881 {
1882 string = "<unknown>";
1883 perm_p = TRUE;
1884 }
1885
1886 /* Allocate a new string if the current string isn't permanent. If
1887 the string is permanent search for the same string in other
1888 allocations. */
1889
1890 len = strlen (string) + 1;
1891 if (!perm_p)
1892 {
1893 char *p = (char *) permalloc (len);
1894 bcopy (string, p, len);
1895 string = p;
1896 }
1897 else
0f41302f 1898 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
3cf2715d
DE
1899 if (ptr->string == string)
1900 break;
1901
1902 /* Allocate a new string block if we need to. */
1903 if (!ptr)
1904 {
1905 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1906 ptr->next = 0;
1907 ptr->length = len;
1908 ptr->label_num = sbb_label_num++;
1909 ptr->string = string;
1910 *sbb_tail = ptr;
1911 sbb_tail = &ptr->next;
1912 }
1913
1914 return ptr->label_num;
1915}
1916
1917\f
1918/* Output assembler code for some insns: all or part of a function.
1919 For description of args, see `final_start_function', above.
1920
1921 PRESCAN is 1 if we are not really outputting,
1922 just scanning as if we were outputting.
1923 Prescanning deletes and rearranges insns just like ordinary output.
1924 PRESCAN is -2 if we are outputting after having prescanned.
1925 In this case, don't try to delete or rearrange insns
1926 because that has already been done.
1927 Prescanning is done only on certain machines. */
1928
1929void
1930final (first, file, optimize, prescan)
1931 rtx first;
1932 FILE *file;
1933 int optimize;
1934 int prescan;
1935{
1936 register rtx insn;
1937 int max_line = 0;
a8c3510c 1938 int max_uid = 0;
3cf2715d
DE
1939
1940 last_ignored_compare = 0;
1941 new_block = 1;
1942
3d195391
MS
1943 check_exception_handler_labels ();
1944
3cf2715d
DE
1945 /* Make a map indicating which line numbers appear in this function.
1946 When producing SDB debugging info, delete troublesome line number
1947 notes from inlined functions in other files as well as duplicate
1948 line number notes. */
1949#ifdef SDB_DEBUGGING_INFO
1950 if (write_symbols == SDB_DEBUG)
1951 {
1952 rtx last = 0;
1953 for (insn = first; insn; insn = NEXT_INSN (insn))
1954 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1955 {
1956 if ((RTX_INTEGRATED_P (insn)
1957 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1958 || (last != 0
1959 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1960 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1961 {
1962 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1963 NOTE_SOURCE_FILE (insn) = 0;
1964 continue;
1965 }
1966 last = insn;
1967 if (NOTE_LINE_NUMBER (insn) > max_line)
1968 max_line = NOTE_LINE_NUMBER (insn);
1969 }
1970 }
1971 else
1972#endif
1973 {
1974 for (insn = first; insn; insn = NEXT_INSN (insn))
1975 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1976 max_line = NOTE_LINE_NUMBER (insn);
1977 }
1978
1979 line_note_exists = (char *) oballoc (max_line + 1);
1980 bzero (line_note_exists, max_line + 1);
1981
1982 for (insn = first; insn; insn = NEXT_INSN (insn))
a8c3510c
AM
1983 {
1984 if (INSN_UID (insn) > max_uid) /* find largest UID */
1985 max_uid = INSN_UID (insn);
1986 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1987 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1988 }
1989
1990 /* Initialize insn_eh_region table if eh is being used. */
1991
1992 init_insn_eh_region (first, max_uid);
3cf2715d
DE
1993
1994 init_recog ();
1995
1996 CC_STATUS_INIT;
1997
1998 /* Output the insns. */
1999 for (insn = NEXT_INSN (first); insn;)
2f16edb1
TG
2000 {
2001#ifdef HAVE_ATTR_length
2002 insn_current_address = insn_addresses[INSN_UID (insn)];
2003#endif
2004 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2005 }
3cf2715d
DE
2006
2007 /* Do basic-block profiling here
2008 if the last insn was a conditional branch. */
2009 if (profile_block_flag && new_block)
2010 add_bb (file);
a8c3510c
AM
2011
2012 free_insn_eh_region ();
3cf2715d
DE
2013}
2014\f
2015/* The final scan for one insn, INSN.
2016 Args are same as in `final', except that INSN
2017 is the insn being scanned.
2018 Value returned is the next insn to be scanned.
2019
2020 NOPEEPHOLES is the flag to disallow peephole processing (currently
2021 used for within delayed branch sequence output). */
2022
2023rtx
2024final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2025 rtx insn;
2026 FILE *file;
2027 int optimize;
2028 int prescan;
2029 int nopeepholes;
2030{
2031 register int i;
90ca38bb
MM
2032#ifdef HAVE_cc0
2033 rtx set;
2034#endif
2035
3cf2715d
DE
2036 insn_counter++;
2037
2038 /* Ignore deleted insns. These can occur when we split insns (due to a
2039 template of "#") while not optimizing. */
2040 if (INSN_DELETED_P (insn))
2041 return NEXT_INSN (insn);
2042
2043 switch (GET_CODE (insn))
2044 {
2045 case NOTE:
2046 if (prescan > 0)
2047 break;
2048
2049 /* Align the beginning of a loop, for higher speed
2050 on certain machines. */
2051
fc470718
R
2052 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2053 break; /* This used to depend on optimize, but that was bogus. */
3cf2715d
DE
2054 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2055 break;
2056
9ad8a5f0
MS
2057 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
2058 && ! exceptions_via_longjmp)
3d195391
MS
2059 {
2060 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_BLOCK_NUMBER (insn));
a1622f83
AM
2061 if (! flag_new_exceptions)
2062 add_eh_table_entry (NOTE_BLOCK_NUMBER (insn));
3d195391
MS
2063#ifdef ASM_OUTPUT_EH_REGION_BEG
2064 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_BLOCK_NUMBER (insn));
2065#endif
2066 break;
2067 }
2068
9ad8a5f0
MS
2069 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END
2070 && ! exceptions_via_longjmp)
3d195391
MS
2071 {
2072 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_BLOCK_NUMBER (insn));
a1622f83
AM
2073 if (flag_new_exceptions)
2074 add_eh_table_entry (NOTE_BLOCK_NUMBER (insn));
3d195391
MS
2075#ifdef ASM_OUTPUT_EH_REGION_END
2076 ASM_OUTPUT_EH_REGION_END (file, NOTE_BLOCK_NUMBER (insn));
2077#endif
2078 break;
2079 }
2080
3cf2715d
DE
2081 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_PROLOGUE_END)
2082 {
2083#ifdef FUNCTION_END_PROLOGUE
2084 FUNCTION_END_PROLOGUE (file);
2085#endif
2086 profile_after_prologue (file);
2087 break;
2088 }
2089
2090#ifdef FUNCTION_BEGIN_EPILOGUE
2091 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
2092 {
2093 FUNCTION_BEGIN_EPILOGUE (file);
2094 break;
2095 }
2096#endif
2097
2098 if (write_symbols == NO_DEBUG)
2099 break;
2100 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2101 {
3c734272
RK
2102#if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2103 /* MIPS stabs require the parameter descriptions to be after the
0f41302f 2104 function entry point rather than before. */
3c734272
RK
2105 if (write_symbols == SDB_DEBUG)
2106 sdbout_begin_function (last_linenum);
2107 else
2108#endif
3cf2715d 2109#ifdef DWARF_DEBUGGING_INFO
2e2bbce2
RK
2110 /* This outputs a marker where the function body starts, so it
2111 must be after the prologue. */
3cf2715d
DE
2112 if (write_symbols == DWARF_DEBUG)
2113 dwarfout_begin_function ();
2114#endif
2115 break;
2116 }
2117 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2118 break; /* An insn that was "deleted" */
2119 if (app_on)
2120 {
51723711 2121 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2122 app_on = 0;
2123 }
2124 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2125 && (debug_info_level == DINFO_LEVEL_NORMAL
2126 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2127 || write_symbols == DWARF_DEBUG
9a666dda 2128 || write_symbols == DWARF2_DEBUG))
3cf2715d
DE
2129 {
2130 /* Beginning of a symbol-block. Assign it a sequence number
2131 and push the number onto the stack PENDING_BLOCKS. */
2132
2133 if (block_depth == max_block_depth)
2134 {
2135 /* PENDING_BLOCKS is full; make it longer. */
2136 max_block_depth *= 2;
2137 pending_blocks
2138 = (int *) xrealloc (pending_blocks,
2139 max_block_depth * sizeof (int));
2140 }
2141 pending_blocks[block_depth++] = next_block_index;
2142
eac40081
RK
2143 high_block_linenum = last_linenum;
2144
3cf2715d
DE
2145 /* Output debugging info about the symbol-block beginning. */
2146
2147#ifdef SDB_DEBUGGING_INFO
2148 if (write_symbols == SDB_DEBUG)
2149 sdbout_begin_block (file, last_linenum, next_block_index);
2150#endif
2151#ifdef XCOFF_DEBUGGING_INFO
2152 if (write_symbols == XCOFF_DEBUG)
2153 xcoffout_begin_block (file, last_linenum, next_block_index);
2154#endif
2155#ifdef DBX_DEBUGGING_INFO
2156 if (write_symbols == DBX_DEBUG)
2157 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", next_block_index);
2158#endif
2159#ifdef DWARF_DEBUGGING_INFO
7aecea25 2160 if (write_symbols == DWARF_DEBUG)
3cf2715d
DE
2161 dwarfout_begin_block (next_block_index);
2162#endif
9a666dda
JM
2163#ifdef DWARF2_DEBUGGING_INFO
2164 if (write_symbols == DWARF2_DEBUG)
2165 dwarf2out_begin_block (next_block_index);
2166#endif
3cf2715d
DE
2167
2168 next_block_index++;
2169 }
2170 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2171 && (debug_info_level == DINFO_LEVEL_NORMAL
2172 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2173 || write_symbols == DWARF_DEBUG
9a666dda 2174 || write_symbols == DWARF2_DEBUG))
3cf2715d
DE
2175 {
2176 /* End of a symbol-block. Pop its sequence number off
2177 PENDING_BLOCKS and output debugging info based on that. */
2178
2179 --block_depth;
2180
2181#ifdef XCOFF_DEBUGGING_INFO
2182 if (write_symbols == XCOFF_DEBUG && block_depth >= 0)
eac40081
RK
2183 xcoffout_end_block (file, high_block_linenum,
2184 pending_blocks[block_depth]);
3cf2715d
DE
2185#endif
2186#ifdef DBX_DEBUGGING_INFO
2187 if (write_symbols == DBX_DEBUG && block_depth >= 0)
2188 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE",
2189 pending_blocks[block_depth]);
2190#endif
2191#ifdef SDB_DEBUGGING_INFO
2192 if (write_symbols == SDB_DEBUG && block_depth >= 0)
eac40081
RK
2193 sdbout_end_block (file, high_block_linenum,
2194 pending_blocks[block_depth]);
3cf2715d
DE
2195#endif
2196#ifdef DWARF_DEBUGGING_INFO
7aecea25 2197 if (write_symbols == DWARF_DEBUG && block_depth >= 0)
3cf2715d 2198 dwarfout_end_block (pending_blocks[block_depth]);
9a666dda
JM
2199#endif
2200#ifdef DWARF2_DEBUGGING_INFO
2201 if (write_symbols == DWARF2_DEBUG && block_depth >= 0)
2202 dwarf2out_end_block (pending_blocks[block_depth]);
3cf2715d
DE
2203#endif
2204 }
2205 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED_LABEL
2206 && (debug_info_level == DINFO_LEVEL_NORMAL
2207 || debug_info_level == DINFO_LEVEL_VERBOSE))
2208 {
2209#ifdef DWARF_DEBUGGING_INFO
2210 if (write_symbols == DWARF_DEBUG)
2211 dwarfout_label (insn);
9a666dda
JM
2212#endif
2213#ifdef DWARF2_DEBUGGING_INFO
2214 if (write_symbols == DWARF2_DEBUG)
2215 dwarf2out_label (insn);
3cf2715d
DE
2216#endif
2217 }
2218 else if (NOTE_LINE_NUMBER (insn) > 0)
2219 /* This note is a line-number. */
2220 {
2221 register rtx note;
2222
2223#if 0 /* This is what we used to do. */
2224 output_source_line (file, insn);
2225#endif
2226 int note_after = 0;
2227
2228 /* If there is anything real after this note,
2229 output it. If another line note follows, omit this one. */
2230 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2231 {
2232 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2233 break;
2234 /* These types of notes can be significant
2235 so make sure the preceding line number stays. */
2236 else if (GET_CODE (note) == NOTE
2237 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2238 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2239 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2240 break;
2241 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2242 {
2243 /* Another line note follows; we can delete this note
2244 if no intervening line numbers have notes elsewhere. */
2245 int num;
2246 for (num = NOTE_LINE_NUMBER (insn) + 1;
2247 num < NOTE_LINE_NUMBER (note);
2248 num++)
2249 if (line_note_exists[num])
2250 break;
2251
2252 if (num >= NOTE_LINE_NUMBER (note))
2253 note_after = 1;
2254 break;
2255 }
2256 }
2257
2258 /* Output this line note
2259 if it is the first or the last line note in a row. */
2260 if (!note_after)
2261 output_source_line (file, insn);
2262 }
2263 break;
2264
2265 case BARRIER:
6020d360
JM
2266#if defined (DWARF2_UNWIND_INFO) && !defined (ACCUMULATE_OUTGOING_ARGS)
2267 /* If we push arguments, we need to check all insns for stack
2268 adjustments. */
2269 if (dwarf2out_do_frame ())
2270 dwarf2out_frame_debug (insn);
3cf2715d
DE
2271#endif
2272 break;
2273
2274 case CODE_LABEL:
1dd8faa8
R
2275 /* The target port might emit labels in the output function for
2276 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2277 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2278 {
2279 int align = LABEL_TO_ALIGNMENT (insn);
50b2596f 2280#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
9e423e6d 2281 int max_skip = LABEL_TO_MAX_SKIP (insn);
50b2596f 2282#endif
fc470718 2283
1dd8faa8 2284 if (align && NEXT_INSN (insn))
9e423e6d
JW
2285#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2286 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2287#else
de7987a6 2288 ASM_OUTPUT_ALIGN (file, align);
9e423e6d 2289#endif
de7987a6 2290 }
3cf2715d
DE
2291 CC_STATUS_INIT;
2292 if (prescan > 0)
2293 break;
2294 new_block = 1;
03ffa171
RK
2295
2296#ifdef FINAL_PRESCAN_LABEL
2297 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2298#endif
2299
3cf2715d
DE
2300#ifdef SDB_DEBUGGING_INFO
2301 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2302 sdbout_label (insn);
2303#endif
2304#ifdef DWARF_DEBUGGING_INFO
2305 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2306 dwarfout_label (insn);
9a666dda
JM
2307#endif
2308#ifdef DWARF2_DEBUGGING_INFO
2309 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2310 dwarf2out_label (insn);
3cf2715d
DE
2311#endif
2312 if (app_on)
2313 {
51723711 2314 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2315 app_on = 0;
2316 }
2317 if (NEXT_INSN (insn) != 0
2318 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2319 {
2320 rtx nextbody = PATTERN (NEXT_INSN (insn));
2321
2322 /* If this label is followed by a jump-table,
2323 make sure we put the label in the read-only section. Also
2324 possibly write the label and jump table together. */
2325
2326 if (GET_CODE (nextbody) == ADDR_VEC
2327 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2328 {
75197b37
BS
2329 if (! JUMP_TABLES_IN_TEXT_SECTION)
2330 {
2331 readonly_data_section ();
3cf2715d 2332#ifdef READONLY_DATA_SECTION
75197b37
BS
2333 ASM_OUTPUT_ALIGN (file,
2334 exact_log2 (BIGGEST_ALIGNMENT
2335 / BITS_PER_UNIT));
3cf2715d 2336#endif /* READONLY_DATA_SECTION */
75197b37
BS
2337 }
2338 else
2339 function_section (current_function_decl);
2340
3cf2715d
DE
2341#ifdef ASM_OUTPUT_CASE_LABEL
2342 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2343 NEXT_INSN (insn));
2344#else
2345 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2346#endif
2347 break;
2348 }
2349 }
2350
2351 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2352 break;
2353
2354 default:
2355 {
51723711 2356 register rtx body = PATTERN (insn);
3cf2715d
DE
2357 int insn_code_number;
2358 char *template;
b729186a 2359#ifdef HAVE_cc0
3cf2715d 2360 rtx note;
b729186a 2361#endif
3cf2715d
DE
2362
2363 /* An INSN, JUMP_INSN or CALL_INSN.
2364 First check for special kinds that recog doesn't recognize. */
2365
2366 if (GET_CODE (body) == USE /* These are just declarations */
2367 || GET_CODE (body) == CLOBBER)
2368 break;
2369
2370#ifdef HAVE_cc0
2371 /* If there is a REG_CC_SETTER note on this insn, it means that
2372 the setting of the condition code was done in the delay slot
2373 of the insn that branched here. So recover the cc status
2374 from the insn that set it. */
2375
2376 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2377 if (note)
2378 {
2379 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2380 cc_prev_status = cc_status;
2381 }
2382#endif
2383
2384 /* Detect insns that are really jump-tables
2385 and output them as such. */
2386
2387 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2388 {
2389 register int vlen, idx;
2390
2391 if (prescan > 0)
2392 break;
2393
2394 if (app_on)
2395 {
51723711 2396 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2397 app_on = 0;
2398 }
2399
2400 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2401 for (idx = 0; idx < vlen; idx++)
2402 {
2403 if (GET_CODE (body) == ADDR_VEC)
2404 {
2405#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2406 ASM_OUTPUT_ADDR_VEC_ELT
2407 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2408#else
2409 abort ();
2410#endif
2411 }
2412 else
2413 {
2414#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2415 ASM_OUTPUT_ADDR_DIFF_ELT
2416 (file,
33f7f353 2417 body,
3cf2715d
DE
2418 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2419 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2420#else
2421 abort ();
2422#endif
2423 }
2424 }
2425#ifdef ASM_OUTPUT_CASE_END
2426 ASM_OUTPUT_CASE_END (file,
2427 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2428 insn);
2429#endif
2430
4d1065ed 2431 function_section (current_function_decl);
3cf2715d
DE
2432
2433 break;
2434 }
2435
2436 /* Do basic-block profiling when we reach a new block.
2437 Done here to avoid jump tables. */
2438 if (profile_block_flag && new_block)
2439 add_bb (file);
2440
2441 if (GET_CODE (body) == ASM_INPUT)
2442 {
2443 /* There's no telling what that did to the condition codes. */
2444 CC_STATUS_INIT;
2445 if (prescan > 0)
2446 break;
2447 if (! app_on)
2448 {
51723711 2449 fputs (ASM_APP_ON, file);
3cf2715d
DE
2450 app_on = 1;
2451 }
2452 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2453 break;
2454 }
2455
2456 /* Detect `asm' construct with operands. */
2457 if (asm_noperands (body) >= 0)
2458 {
22bf4422 2459 unsigned int noperands = asm_noperands (body);
3cf2715d
DE
2460 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2461 char *string;
2462
2463 /* There's no telling what that did to the condition codes. */
2464 CC_STATUS_INIT;
2465 if (prescan > 0)
2466 break;
2467
2468 if (! app_on)
2469 {
51723711 2470 fputs (ASM_APP_ON, file);
3cf2715d
DE
2471 app_on = 1;
2472 }
2473
2474 /* Get out the operand values. */
2475 string = decode_asm_operands (body, ops, NULL_PTR,
2476 NULL_PTR, NULL_PTR);
2477 /* Inhibit aborts on what would otherwise be compiler bugs. */
2478 insn_noperands = noperands;
2479 this_is_asm_operands = insn;
2480
2481 /* Output the insn using them. */
2482 output_asm_insn (string, ops);
2483 this_is_asm_operands = 0;
2484 break;
2485 }
2486
2487 if (prescan <= 0 && app_on)
2488 {
51723711 2489 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2490 app_on = 0;
2491 }
2492
2493 if (GET_CODE (body) == SEQUENCE)
2494 {
2495 /* A delayed-branch sequence */
2496 register int i;
2497 rtx next;
2498
2499 if (prescan > 0)
2500 break;
2501 final_sequence = body;
2502
2503 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2504 force the restoration of a comparison that was previously
2505 thought unnecessary. If that happens, cancel this sequence
2506 and cause that insn to be restored. */
2507
2508 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2509 if (next != XVECEXP (body, 0, 1))
2510 {
2511 final_sequence = 0;
2512 return next;
2513 }
2514
2515 for (i = 1; i < XVECLEN (body, 0); i++)
c7eee2df
RK
2516 {
2517 rtx insn = XVECEXP (body, 0, i);
2518 rtx next = NEXT_INSN (insn);
2519 /* We loop in case any instruction in a delay slot gets
2520 split. */
2521 do
2522 insn = final_scan_insn (insn, file, 0, prescan, 1);
2523 while (insn != next);
2524 }
3cf2715d
DE
2525#ifdef DBR_OUTPUT_SEQEND
2526 DBR_OUTPUT_SEQEND (file);
2527#endif
2528 final_sequence = 0;
2529
2530 /* If the insn requiring the delay slot was a CALL_INSN, the
2531 insns in the delay slot are actually executed before the
2532 called function. Hence we don't preserve any CC-setting
2533 actions in these insns and the CC must be marked as being
2534 clobbered by the function. */
2535 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
b729186a
JL
2536 {
2537 CC_STATUS_INIT;
2538 }
3cf2715d
DE
2539
2540 /* Following a conditional branch sequence, we have a new basic
2541 block. */
2542 if (profile_block_flag)
2543 {
2544 rtx insn = XVECEXP (body, 0, 0);
2545 rtx body = PATTERN (insn);
2546
2547 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2548 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2549 || (GET_CODE (insn) == JUMP_INSN
2550 && GET_CODE (body) == PARALLEL
2551 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2552 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2553 new_block = 1;
2554 }
2555 break;
2556 }
2557
2558 /* We have a real machine instruction as rtl. */
2559
2560 body = PATTERN (insn);
2561
2562#ifdef HAVE_cc0
b88c92cc
RK
2563 set = single_set(insn);
2564
3cf2715d
DE
2565 /* Check for redundant test and compare instructions
2566 (when the condition codes are already set up as desired).
2567 This is done only when optimizing; if not optimizing,
2568 it should be possible for the user to alter a variable
2569 with the debugger in between statements
2570 and the next statement should reexamine the variable
2571 to compute the condition codes. */
2572
30f5e9f5 2573 if (optimize)
3cf2715d 2574 {
b88c92cc 2575#if 0
30f5e9f5 2576 rtx set = single_set(insn);
b88c92cc 2577#endif
30f5e9f5
RK
2578
2579 if (set
2580 && GET_CODE (SET_DEST (set)) == CC0
2581 && insn != last_ignored_compare)
3cf2715d 2582 {
30f5e9f5
RK
2583 if (GET_CODE (SET_SRC (set)) == SUBREG)
2584 SET_SRC (set) = alter_subreg (SET_SRC (set));
2585 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2586 {
2587 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2588 XEXP (SET_SRC (set), 0)
2589 = alter_subreg (XEXP (SET_SRC (set), 0));
2590 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2591 XEXP (SET_SRC (set), 1)
2592 = alter_subreg (XEXP (SET_SRC (set), 1));
2593 }
2594 if ((cc_status.value1 != 0
2595 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2596 || (cc_status.value2 != 0
2597 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
3cf2715d 2598 {
30f5e9f5
RK
2599 /* Don't delete insn if it has an addressing side-effect. */
2600 if (! FIND_REG_INC_NOTE (insn, 0)
2601 /* or if anything in it is volatile. */
2602 && ! volatile_refs_p (PATTERN (insn)))
2603 {
2604 /* We don't really delete the insn; just ignore it. */
2605 last_ignored_compare = insn;
2606 break;
2607 }
3cf2715d
DE
2608 }
2609 }
2610 }
2611#endif
2612
2613 /* Following a conditional branch, we have a new basic block.
2614 But if we are inside a sequence, the new block starts after the
2615 last insn of the sequence. */
2616 if (profile_block_flag && final_sequence == 0
2617 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2618 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2619 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2620 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2621 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2622 new_block = 1;
2623
2624#ifndef STACK_REGS
2625 /* Don't bother outputting obvious no-ops, even without -O.
2626 This optimization is fast and doesn't interfere with debugging.
2627 Don't do this if the insn is in a delay slot, since this
2628 will cause an improper number of delay insns to be written. */
2629 if (final_sequence == 0
2630 && prescan >= 0
2631 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2632 && GET_CODE (SET_SRC (body)) == REG
2633 && GET_CODE (SET_DEST (body)) == REG
2634 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2635 break;
2636#endif
2637
2638#ifdef HAVE_cc0
2639 /* If this is a conditional branch, maybe modify it
2640 if the cc's are in a nonstandard state
2641 so that it accomplishes the same thing that it would
2642 do straightforwardly if the cc's were set up normally. */
2643
2644 if (cc_status.flags != 0
2645 && GET_CODE (insn) == JUMP_INSN
2646 && GET_CODE (body) == SET
2647 && SET_DEST (body) == pc_rtx
2648 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
de2b56f9 2649 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
fff752ad 2650 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
3cf2715d
DE
2651 /* This is done during prescan; it is not done again
2652 in final scan when prescan has been done. */
2653 && prescan >= 0)
2654 {
2655 /* This function may alter the contents of its argument
2656 and clear some of the cc_status.flags bits.
2657 It may also return 1 meaning condition now always true
2658 or -1 meaning condition now always false
2659 or 2 meaning condition nontrivial but altered. */
2660 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2661 /* If condition now has fixed value, replace the IF_THEN_ELSE
2662 with its then-operand or its else-operand. */
2663 if (result == 1)
2664 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2665 if (result == -1)
2666 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2667
2668 /* The jump is now either unconditional or a no-op.
2669 If it has become a no-op, don't try to output it.
2670 (It would not be recognized.) */
2671 if (SET_SRC (body) == pc_rtx)
2672 {
2673 PUT_CODE (insn, NOTE);
2674 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2675 NOTE_SOURCE_FILE (insn) = 0;
2676 break;
2677 }
2678 else if (GET_CODE (SET_SRC (body)) == RETURN)
2679 /* Replace (set (pc) (return)) with (return). */
2680 PATTERN (insn) = body = SET_SRC (body);
2681
2682 /* Rerecognize the instruction if it has changed. */
2683 if (result != 0)
2684 INSN_CODE (insn) = -1;
2685 }
2686
2687 /* Make same adjustments to instructions that examine the
462da2af
SC
2688 condition codes without jumping and instructions that
2689 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2690
2691 if (cc_status.flags != 0
b88c92cc 2692 && set != 0)
3cf2715d 2693 {
462da2af
SC
2694 rtx cond_rtx, then_rtx, else_rtx;
2695
2696 if (GET_CODE (insn) != JUMP_INSN
b88c92cc 2697 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2698 {
b88c92cc
RK
2699 cond_rtx = XEXP (SET_SRC (set), 0);
2700 then_rtx = XEXP (SET_SRC (set), 1);
2701 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2702 }
2703 else
2704 {
b88c92cc 2705 cond_rtx = SET_SRC (set);
462da2af
SC
2706 then_rtx = const_true_rtx;
2707 else_rtx = const0_rtx;
2708 }
2709
2710 switch (GET_CODE (cond_rtx))
3cf2715d
DE
2711 {
2712 case GTU:
2713 case GT:
2714 case LTU:
2715 case LT:
2716 case GEU:
2717 case GE:
2718 case LEU:
2719 case LE:
2720 case EQ:
2721 case NE:
2722 {
2723 register int result;
462da2af 2724 if (XEXP (cond_rtx, 0) != cc0_rtx)
3cf2715d 2725 break;
462da2af 2726 result = alter_cond (cond_rtx);
3cf2715d 2727 if (result == 1)
b88c92cc 2728 validate_change (insn, &SET_SRC (set), then_rtx, 0);
3cf2715d 2729 else if (result == -1)
b88c92cc 2730 validate_change (insn, &SET_SRC (set), else_rtx, 0);
3cf2715d
DE
2731 else if (result == 2)
2732 INSN_CODE (insn) = -1;
b88c92cc 2733 if (SET_DEST (set) == SET_SRC (set))
462da2af
SC
2734 {
2735 PUT_CODE (insn, NOTE);
2736 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2737 NOTE_SOURCE_FILE (insn) = 0;
462da2af 2738 }
3cf2715d 2739 }
e9a25f70
JL
2740 break;
2741
2742 default:
2743 break;
3cf2715d
DE
2744 }
2745 }
462da2af 2746
3cf2715d
DE
2747#endif
2748
2749 /* Do machine-specific peephole optimizations if desired. */
2750
2751 if (optimize && !flag_no_peephole && !nopeepholes)
2752 {
2753 rtx next = peephole (insn);
2754 /* When peepholing, if there were notes within the peephole,
2755 emit them before the peephole. */
2756 if (next != 0 && next != NEXT_INSN (insn))
2757 {
2758 rtx prev = PREV_INSN (insn);
2759 rtx note;
2760
2761 for (note = NEXT_INSN (insn); note != next;
2762 note = NEXT_INSN (note))
2763 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2764
2765 /* In case this is prescan, put the notes
2766 in proper position for later rescan. */
2767 note = NEXT_INSN (insn);
2768 PREV_INSN (note) = prev;
2769 NEXT_INSN (prev) = note;
2770 NEXT_INSN (PREV_INSN (next)) = insn;
2771 PREV_INSN (insn) = PREV_INSN (next);
2772 NEXT_INSN (insn) = next;
2773 PREV_INSN (next) = insn;
2774 }
2775
2776 /* PEEPHOLE might have changed this. */
2777 body = PATTERN (insn);
2778 }
2779
2780 /* Try to recognize the instruction.
2781 If successful, verify that the operands satisfy the
2782 constraints for the instruction. Crash if they don't,
2783 since `reload' should have changed them so that they do. */
2784
2785 insn_code_number = recog_memoized (insn);
2786 insn_extract (insn);
2787 for (i = 0; i < insn_n_operands[insn_code_number]; i++)
2788 {
2789 if (GET_CODE (recog_operand[i]) == SUBREG)
2790 recog_operand[i] = alter_subreg (recog_operand[i]);
2791 else if (GET_CODE (recog_operand[i]) == PLUS
2792 || GET_CODE (recog_operand[i]) == MULT)
2793 recog_operand[i] = walk_alter_subreg (recog_operand[i]);
2794 }
2795
2796 for (i = 0; i < insn_n_dups[insn_code_number]; i++)
2797 {
2798 if (GET_CODE (*recog_dup_loc[i]) == SUBREG)
2799 *recog_dup_loc[i] = alter_subreg (*recog_dup_loc[i]);
2800 else if (GET_CODE (*recog_dup_loc[i]) == PLUS
2801 || GET_CODE (*recog_dup_loc[i]) == MULT)
2802 *recog_dup_loc[i] = walk_alter_subreg (*recog_dup_loc[i]);
2803 }
2804
2805#ifdef REGISTER_CONSTRAINTS
2806 if (! constrain_operands (insn_code_number, 1))
2807 fatal_insn_not_found (insn);
2808#endif
2809
2810 /* Some target machines need to prescan each insn before
2811 it is output. */
2812
2813#ifdef FINAL_PRESCAN_INSN
2814 FINAL_PRESCAN_INSN (insn, recog_operand,
2815 insn_n_operands[insn_code_number]);
2816#endif
2817
2818#ifdef HAVE_cc0
2819 cc_prev_status = cc_status;
2820
2821 /* Update `cc_status' for this instruction.
2822 The instruction's output routine may change it further.
2823 If the output routine for a jump insn needs to depend
2824 on the cc status, it should look at cc_prev_status. */
2825
2826 NOTICE_UPDATE_CC (body, insn);
2827#endif
2828
2829 debug_insn = insn;
2830
b57d9225
JM
2831#if defined (DWARF2_UNWIND_INFO) && !defined (ACCUMULATE_OUTGOING_ARGS)
2832 /* If we push arguments, we want to know where the calls are. */
2833 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2834 dwarf2out_frame_debug (insn);
2835#endif
2836
3cf2715d
DE
2837 /* If the proper template needs to be chosen by some C code,
2838 run that code and get the real template. */
2839
2840 template = insn_template[insn_code_number];
2841 if (template == 0)
2842 {
2843 template = (*insn_outfun[insn_code_number]) (recog_operand, insn);
2844
2845 /* If the C code returns 0, it means that it is a jump insn
2846 which follows a deleted test insn, and that test insn
2847 needs to be reinserted. */
2848 if (template == 0)
2849 {
2850 if (prev_nonnote_insn (insn) != last_ignored_compare)
2851 abort ();
2852 new_block = 0;
2853 return prev_nonnote_insn (insn);
2854 }
2855 }
2856
2857 /* If the template is the string "#", it means that this insn must
2858 be split. */
2859 if (template[0] == '#' && template[1] == '\0')
2860 {
2861 rtx new = try_split (body, insn, 0);
2862
2863 /* If we didn't split the insn, go away. */
2864 if (new == insn && PATTERN (new) == body)
cf879efa 2865 fatal_insn ("Could not split insn", insn);
3cf2715d 2866
3d14e82f
JW
2867#ifdef HAVE_ATTR_length
2868 /* This instruction should have been split in shorten_branches,
2869 to ensure that we would have valid length info for the
2870 splitees. */
2871 abort ();
2872#endif
2873
3cf2715d
DE
2874 new_block = 0;
2875 return new;
2876 }
2877
2878 if (prescan > 0)
2879 break;
2880
2881 /* Output assembler code from the template. */
2882
2883 output_asm_insn (template, recog_operand);
2884
0021b564
JM
2885#if defined (DWARF2_UNWIND_INFO)
2886#if !defined (ACCUMULATE_OUTGOING_ARGS)
2887 /* If we push arguments, we need to check all insns for stack
2888 adjustments. */
b57d9225 2889 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
0021b564
JM
2890 dwarf2out_frame_debug (insn);
2891#else
2892#if defined (HAVE_prologue)
469ac993
JM
2893 /* If this insn is part of the prologue, emit DWARF v2
2894 call frame info. */
0021b564 2895 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
469ac993
JM
2896 dwarf2out_frame_debug (insn);
2897#endif
0021b564
JM
2898#endif
2899#endif
469ac993 2900
3cf2715d
DE
2901#if 0
2902 /* It's not at all clear why we did this and doing so interferes
2903 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2904 with this out. */
2905
2906 /* Mark this insn as having been output. */
2907 INSN_DELETED_P (insn) = 1;
2908#endif
2909
2910 debug_insn = 0;
2911 }
2912 }
2913 return NEXT_INSN (insn);
2914}
2915\f
2916/* Output debugging info to the assembler file FILE
2917 based on the NOTE-insn INSN, assumed to be a line number. */
2918
2919static void
2920output_source_line (file, insn)
2921 FILE *file;
2922 rtx insn;
2923{
2924 register char *filename = NOTE_SOURCE_FILE (insn);
2925
2926 /* Remember filename for basic block profiling.
2927 Filenames are allocated on the permanent obstack
2928 or are passed in ARGV, so we don't have to save
2929 the string. */
2930
2931 if (profile_block_flag && last_filename != filename)
2932 bb_file_label_num = add_bb_string (filename, TRUE);
2933
2934 last_filename = filename;
2935 last_linenum = NOTE_LINE_NUMBER (insn);
eac40081
RK
2936 high_block_linenum = MAX (last_linenum, high_block_linenum);
2937 high_function_linenum = MAX (last_linenum, high_function_linenum);
3cf2715d
DE
2938
2939 if (write_symbols != NO_DEBUG)
2940 {
2941#ifdef SDB_DEBUGGING_INFO
2942 if (write_symbols == SDB_DEBUG
2943#if 0 /* People like having line numbers even in wrong file! */
2944 /* COFF can't handle multiple source files--lose, lose. */
2945 && !strcmp (filename, main_input_filename)
2946#endif
2947 /* COFF relative line numbers must be positive. */
2948 && last_linenum > sdb_begin_function_line)
2949 {
2950#ifdef ASM_OUTPUT_SOURCE_LINE
2951 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
2952#else
2953 fprintf (file, "\t.ln\t%d\n",
2954 ((sdb_begin_function_line > -1)
2955 ? last_linenum - sdb_begin_function_line : 1));
2956#endif
2957 }
2958#endif
2959
2960#if defined (DBX_DEBUGGING_INFO)
2961 if (write_symbols == DBX_DEBUG)
2962 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
2963#endif
2964
2965#if defined (XCOFF_DEBUGGING_INFO)
2966 if (write_symbols == XCOFF_DEBUG)
2967 xcoffout_source_line (file, filename, insn);
2968#endif
2969
2970#ifdef DWARF_DEBUGGING_INFO
2971 if (write_symbols == DWARF_DEBUG)
2972 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
2973#endif
9a666dda
JM
2974
2975#ifdef DWARF2_DEBUGGING_INFO
2976 if (write_symbols == DWARF2_DEBUG)
2977 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
2978#endif
3cf2715d
DE
2979 }
2980}
2981\f
2982/* If X is a SUBREG, replace it with a REG or a MEM,
2983 based on the thing it is a subreg of. */
2984
2985rtx
2986alter_subreg (x)
2987 register rtx x;
2988{
2989 register rtx y = SUBREG_REG (x);
f5963e61 2990
3cf2715d
DE
2991 if (GET_CODE (y) == SUBREG)
2992 y = alter_subreg (y);
2993
f5963e61
JL
2994 /* If reload is operating, we may be replacing inside this SUBREG.
2995 Check for that and make a new one if so. */
2996 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
2997 x = copy_rtx (x);
2998
3cf2715d
DE
2999 if (GET_CODE (y) == REG)
3000 {
ce4d78eb
RH
3001 /* If the word size is larger than the size of this register,
3002 adjust the register number to compensate. */
3003 /* ??? Note that this just catches stragglers created by/for
3004 integrate. It would be better if we either caught these
3005 earlier, or kept _all_ subregs until now and eliminate
3006 gen_lowpart and friends. */
3007
3cf2715d 3008 PUT_CODE (x, REG);
ce4d78eb
RH
3009#ifdef ALTER_HARD_SUBREG
3010 REGNO (x) = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
3011 GET_MODE (y), REGNO (y));
3012#else
3cf2715d 3013 REGNO (x) = REGNO (y) + SUBREG_WORD (x);
ce4d78eb 3014#endif
3cf2715d
DE
3015 }
3016 else if (GET_CODE (y) == MEM)
3017 {
3018 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
f76b9db2
ILT
3019 if (BYTES_BIG_ENDIAN)
3020 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3021 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3cf2715d
DE
3022 PUT_CODE (x, MEM);
3023 MEM_VOLATILE_P (x) = MEM_VOLATILE_P (y);
41472af8
MM
3024 MEM_IN_STRUCT_P (x) = MEM_IN_STRUCT_P (y);
3025 MEM_ALIAS_SET (x) = MEM_ALIAS_SET (y);
3cf2715d
DE
3026 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3027 }
3028
3029 return x;
3030}
3031
3032/* Do alter_subreg on all the SUBREGs contained in X. */
3033
3034static rtx
3035walk_alter_subreg (x)
3036 rtx x;
3037{
3038 switch (GET_CODE (x))
3039 {
3040 case PLUS:
3041 case MULT:
3042 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3043 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3044 break;
3045
3046 case MEM:
3047 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3048 break;
3049
3050 case SUBREG:
3051 return alter_subreg (x);
e9a25f70
JL
3052
3053 default:
3054 break;
3cf2715d
DE
3055 }
3056
3057 return x;
3058}
3059\f
3060#ifdef HAVE_cc0
3061
3062/* Given BODY, the body of a jump instruction, alter the jump condition
3063 as required by the bits that are set in cc_status.flags.
3064 Not all of the bits there can be handled at this level in all cases.
3065
3066 The value is normally 0.
3067 1 means that the condition has become always true.
3068 -1 means that the condition has become always false.
3069 2 means that COND has been altered. */
3070
3071static int
3072alter_cond (cond)
3073 register rtx cond;
3074{
3075 int value = 0;
3076
3077 if (cc_status.flags & CC_REVERSED)
3078 {
3079 value = 2;
3080 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3081 }
3082
3083 if (cc_status.flags & CC_INVERTED)
3084 {
3085 value = 2;
3086 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3087 }
3088
3089 if (cc_status.flags & CC_NOT_POSITIVE)
3090 switch (GET_CODE (cond))
3091 {
3092 case LE:
3093 case LEU:
3094 case GEU:
3095 /* Jump becomes unconditional. */
3096 return 1;
3097
3098 case GT:
3099 case GTU:
3100 case LTU:
3101 /* Jump becomes no-op. */
3102 return -1;
3103
3104 case GE:
3105 PUT_CODE (cond, EQ);
3106 value = 2;
3107 break;
3108
3109 case LT:
3110 PUT_CODE (cond, NE);
3111 value = 2;
3112 break;
e9a25f70
JL
3113
3114 default:
3115 break;
3cf2715d
DE
3116 }
3117
3118 if (cc_status.flags & CC_NOT_NEGATIVE)
3119 switch (GET_CODE (cond))
3120 {
3121 case GE:
3122 case GEU:
3123 /* Jump becomes unconditional. */
3124 return 1;
3125
3126 case LT:
3127 case LTU:
3128 /* Jump becomes no-op. */
3129 return -1;
3130
3131 case LE:
3132 case LEU:
3133 PUT_CODE (cond, EQ);
3134 value = 2;
3135 break;
3136
3137 case GT:
3138 case GTU:
3139 PUT_CODE (cond, NE);
3140 value = 2;
3141 break;
e9a25f70
JL
3142
3143 default:
3144 break;
3cf2715d
DE
3145 }
3146
3147 if (cc_status.flags & CC_NO_OVERFLOW)
3148 switch (GET_CODE (cond))
3149 {
3150 case GEU:
3151 /* Jump becomes unconditional. */
3152 return 1;
3153
3154 case LEU:
3155 PUT_CODE (cond, EQ);
3156 value = 2;
3157 break;
3158
3159 case GTU:
3160 PUT_CODE (cond, NE);
3161 value = 2;
3162 break;
3163
3164 case LTU:
3165 /* Jump becomes no-op. */
3166 return -1;
e9a25f70
JL
3167
3168 default:
3169 break;
3cf2715d
DE
3170 }
3171
3172 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3173 switch (GET_CODE (cond))
3174 {
e9a25f70 3175 default:
3cf2715d
DE
3176 abort ();
3177
3178 case NE:
3179 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3180 value = 2;
3181 break;
3182
3183 case EQ:
3184 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3185 value = 2;
3186 break;
3187 }
3188
3189 if (cc_status.flags & CC_NOT_SIGNED)
3190 /* The flags are valid if signed condition operators are converted
3191 to unsigned. */
3192 switch (GET_CODE (cond))
3193 {
3194 case LE:
3195 PUT_CODE (cond, LEU);
3196 value = 2;
3197 break;
3198
3199 case LT:
3200 PUT_CODE (cond, LTU);
3201 value = 2;
3202 break;
3203
3204 case GT:
3205 PUT_CODE (cond, GTU);
3206 value = 2;
3207 break;
3208
3209 case GE:
3210 PUT_CODE (cond, GEU);
3211 value = 2;
3212 break;
e9a25f70
JL
3213
3214 default:
3215 break;
3cf2715d
DE
3216 }
3217
3218 return value;
3219}
3220#endif
3221\f
3222/* Report inconsistency between the assembler template and the operands.
3223 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3224
3225void
3226output_operand_lossage (str)
3227 char *str;
3228{
3229 if (this_is_asm_operands)
3230 error_for_asm (this_is_asm_operands, "invalid `asm': %s", str);
3231 else
31bfbf1f 3232 fatal ("Internal compiler error, output_operand_lossage `%s'", str);
3cf2715d
DE
3233}
3234\f
3235/* Output of assembler code from a template, and its subroutines. */
3236
3237/* Output text from TEMPLATE to the assembler output file,
3238 obeying %-directions to substitute operands taken from
3239 the vector OPERANDS.
3240
3241 %N (for N a digit) means print operand N in usual manner.
3242 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3243 and print the label name with no punctuation.
3244 %cN means require operand N to be a constant
3245 and print the constant expression with no punctuation.
3246 %aN means expect operand N to be a memory address
3247 (not a memory reference!) and print a reference
3248 to that address.
3249 %nN means expect operand N to be a constant
3250 and print a constant expression for minus the value
3251 of the operand, with no other punctuation. */
3252
cb649530
RK
3253static void
3254output_asm_name ()
3255{
3256 if (flag_print_asm_name)
3257 {
3258 /* Annotate the assembly with a comment describing the pattern and
3259 alternative used. */
3260 if (debug_insn)
3261 {
3262 register int num = INSN_CODE (debug_insn);
3263 fprintf (asm_out_file, " %s %d %s",
3264 ASM_COMMENT_START, INSN_UID (debug_insn), insn_name[num]);
3265 if (insn_n_alternatives[num] > 1)
3266 fprintf (asm_out_file, "/%d", which_alternative + 1);
3267
3268 /* Clear this so only the first assembler insn
3269 of any rtl insn will get the special comment for -dp. */
3270 debug_insn = 0;
3271 }
3272 }
3273}
3274
3cf2715d
DE
3275void
3276output_asm_insn (template, operands)
3277 char *template;
3278 rtx *operands;
3279{
3280 register char *p;
b729186a 3281 register int c;
3cf2715d
DE
3282
3283 /* An insn may return a null string template
3284 in a case where no assembler code is needed. */
3285 if (*template == 0)
3286 return;
3287
3288 p = template;
3289 putc ('\t', asm_out_file);
3290
3291#ifdef ASM_OUTPUT_OPCODE
3292 ASM_OUTPUT_OPCODE (asm_out_file, p);
3293#endif
3294
b729186a 3295 while ((c = *p++))
3cf2715d
DE
3296 switch (c)
3297 {
3cf2715d 3298 case '\n':
cb649530 3299 output_asm_name ();
3cf2715d 3300 putc (c, asm_out_file);
cb649530 3301#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3302 while ((c = *p) == '\t')
3303 {
3304 putc (c, asm_out_file);
3305 p++;
3306 }
3307 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3308#endif
cb649530 3309 break;
3cf2715d
DE
3310
3311#ifdef ASSEMBLER_DIALECT
3312 case '{':
b729186a
JL
3313 {
3314 register int i;
3315
3316 /* If we want the first dialect, do nothing. Otherwise, skip
3317 DIALECT_NUMBER of strings ending with '|'. */
3318 for (i = 0; i < dialect_number; i++)
3319 {
3320 while (*p && *p++ != '|')
3321 ;
3cf2715d 3322
b729186a
JL
3323 if (*p == '|')
3324 p++;
3325 }
3326 }
3cf2715d
DE
3327 break;
3328
3329 case '|':
3330 /* Skip to close brace. */
3331 while (*p && *p++ != '}')
3332 ;
3333 break;
3334
3335 case '}':
3336 break;
3337#endif
3338
3339 case '%':
3340 /* %% outputs a single %. */
3341 if (*p == '%')
3342 {
3343 p++;
3344 putc (c, asm_out_file);
3345 }
3346 /* %= outputs a number which is unique to each insn in the entire
3347 compilation. This is useful for making local labels that are
3348 referred to more than once in a given insn. */
3349 else if (*p == '=')
3350 {
3351 p++;
3352 fprintf (asm_out_file, "%d", insn_counter);
3353 }
3354 /* % followed by a letter and some digits
3355 outputs an operand in a special way depending on the letter.
3356 Letters `acln' are implemented directly.
3357 Other letters are passed to `output_operand' so that
3358 the PRINT_OPERAND macro can define them. */
3359 else if ((*p >= 'a' && *p <= 'z')
3360 || (*p >= 'A' && *p <= 'Z'))
3361 {
3362 int letter = *p++;
3363 c = atoi (p);
3364
3365 if (! (*p >= '0' && *p <= '9'))
3366 output_operand_lossage ("operand number missing after %-letter");
22bf4422 3367 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3368 output_operand_lossage ("operand number out of range");
3369 else if (letter == 'l')
3370 output_asm_label (operands[c]);
3371 else if (letter == 'a')
3372 output_address (operands[c]);
3373 else if (letter == 'c')
3374 {
3375 if (CONSTANT_ADDRESS_P (operands[c]))
3376 output_addr_const (asm_out_file, operands[c]);
3377 else
3378 output_operand (operands[c], 'c');
3379 }
3380 else if (letter == 'n')
3381 {
3382 if (GET_CODE (operands[c]) == CONST_INT)
21e3a81b 3383 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3cf2715d
DE
3384 - INTVAL (operands[c]));
3385 else
3386 {
3387 putc ('-', asm_out_file);
3388 output_addr_const (asm_out_file, operands[c]);
3389 }
3390 }
3391 else
3392 output_operand (operands[c], letter);
3393
3394 while ((c = *p) >= '0' && c <= '9') p++;
3395 }
3396 /* % followed by a digit outputs an operand the default way. */
3397 else if (*p >= '0' && *p <= '9')
3398 {
3399 c = atoi (p);
22bf4422 3400 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3401 output_operand_lossage ("operand number out of range");
3402 else
3403 output_operand (operands[c], 0);
3404 while ((c = *p) >= '0' && c <= '9') p++;
3405 }
3406 /* % followed by punctuation: output something for that
3407 punctuation character alone, with no operand.
3408 The PRINT_OPERAND macro decides what is actually done. */
3409#ifdef PRINT_OPERAND_PUNCT_VALID_P
3410 else if (PRINT_OPERAND_PUNCT_VALID_P (*p))
3411 output_operand (NULL_RTX, *p++);
3412#endif
3413 else
3414 output_operand_lossage ("invalid %%-code");
3415 break;
3416
3417 default:
3418 putc (c, asm_out_file);
3419 }
3420
cb649530 3421 output_asm_name ();
3cf2715d
DE
3422
3423 putc ('\n', asm_out_file);
3424}
3425\f
3426/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3427
3428void
3429output_asm_label (x)
3430 rtx x;
3431{
3432 char buf[256];
3433
3434 if (GET_CODE (x) == LABEL_REF)
3435 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3436 else if (GET_CODE (x) == CODE_LABEL)
3437 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3438 else
3439 output_operand_lossage ("`%l' operand isn't a label");
3440
3441 assemble_name (asm_out_file, buf);
3442}
3443
3444/* Print operand X using machine-dependent assembler syntax.
3445 The macro PRINT_OPERAND is defined just to control this function.
3446 CODE is a non-digit that preceded the operand-number in the % spec,
3447 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3448 between the % and the digits.
3449 When CODE is a non-letter, X is 0.
3450
3451 The meanings of the letters are machine-dependent and controlled
3452 by PRINT_OPERAND. */
3453
3454static void
3455output_operand (x, code)
3456 rtx x;
3457 int code;
3458{
3459 if (x && GET_CODE (x) == SUBREG)
3460 x = alter_subreg (x);
3461
3462 /* If X is a pseudo-register, abort now rather than writing trash to the
3463 assembler file. */
3464
3465 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3466 abort ();
3467
3468 PRINT_OPERAND (asm_out_file, x, code);
3469}
3470
3471/* Print a memory reference operand for address X
3472 using machine-dependent assembler syntax.
3473 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3474
3475void
3476output_address (x)
3477 rtx x;
3478{
3479 walk_alter_subreg (x);
3480 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3481}
3482\f
3483/* Print an integer constant expression in assembler syntax.
3484 Addition and subtraction are the only arithmetic
3485 that may appear in these expressions. */
3486
3487void
3488output_addr_const (file, x)
3489 FILE *file;
3490 rtx x;
3491{
3492 char buf[256];
3493
3494 restart:
3495 switch (GET_CODE (x))
3496 {
3497 case PC:
3498 if (flag_pic)
3499 putc ('.', file);
3500 else
3501 abort ();
3502 break;
3503
3504 case SYMBOL_REF:
3505 assemble_name (file, XSTR (x, 0));
3506 break;
3507
3508 case LABEL_REF:
3509 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3510 assemble_name (file, buf);
3511 break;
3512
3513 case CODE_LABEL:
3514 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3515 assemble_name (file, buf);
3516 break;
3517
3518 case CONST_INT:
21e3a81b 3519 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
3520 break;
3521
3522 case CONST:
3523 /* This used to output parentheses around the expression,
3524 but that does not work on the 386 (either ATT or BSD assembler). */
3525 output_addr_const (file, XEXP (x, 0));
3526 break;
3527
3528 case CONST_DOUBLE:
3529 if (GET_MODE (x) == VOIDmode)
3530 {
3531 /* We can use %d if the number is one word and positive. */
3532 if (CONST_DOUBLE_HIGH (x))
21e3a81b 3533 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3cf2715d
DE
3534 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3535 else if (CONST_DOUBLE_LOW (x) < 0)
21e3a81b 3536 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3cf2715d 3537 else
21e3a81b 3538 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
3539 }
3540 else
3541 /* We can't handle floating point constants;
3542 PRINT_OPERAND must handle them. */
3543 output_operand_lossage ("floating constant misused");
3544 break;
3545
3546 case PLUS:
3547 /* Some assemblers need integer constants to appear last (eg masm). */
3548 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3549 {
3550 output_addr_const (file, XEXP (x, 1));
3551 if (INTVAL (XEXP (x, 0)) >= 0)
3552 fprintf (file, "+");
3553 output_addr_const (file, XEXP (x, 0));
3554 }
3555 else
3556 {
3557 output_addr_const (file, XEXP (x, 0));
3558 if (INTVAL (XEXP (x, 1)) >= 0)
3559 fprintf (file, "+");
3560 output_addr_const (file, XEXP (x, 1));
3561 }
3562 break;
3563
3564 case MINUS:
3565 /* Avoid outputting things like x-x or x+5-x,
3566 since some assemblers can't handle that. */
3567 x = simplify_subtraction (x);
3568 if (GET_CODE (x) != MINUS)
3569 goto restart;
3570
3571 output_addr_const (file, XEXP (x, 0));
3572 fprintf (file, "-");
3573 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3574 && INTVAL (XEXP (x, 1)) < 0)
3575 {
3576 fprintf (file, ASM_OPEN_PAREN);
3577 output_addr_const (file, XEXP (x, 1));
3578 fprintf (file, ASM_CLOSE_PAREN);
3579 }
3580 else
3581 output_addr_const (file, XEXP (x, 1));
3582 break;
3583
3584 case ZERO_EXTEND:
3585 case SIGN_EXTEND:
3586 output_addr_const (file, XEXP (x, 0));
3587 break;
3588
3589 default:
3590 output_operand_lossage ("invalid expression as operand");
3591 }
3592}
3593\f
3594/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3595 %R prints the value of REGISTER_PREFIX.
3596 %L prints the value of LOCAL_LABEL_PREFIX.
3597 %U prints the value of USER_LABEL_PREFIX.
3598 %I prints the value of IMMEDIATE_PREFIX.
3599 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3600 Also supported are %d, %x, %s, %e, %f, %g and %%.
3601
3602 We handle alternate assembler dialects here, just like output_asm_insn. */
3603
3604void
3605asm_fprintf VPROTO((FILE *file, char *p, ...))
3606{
3607#ifndef __STDC__
3608 FILE *file;
3609 char *p;
3610#endif
3611 va_list argptr;
3612 char buf[10];
3613 char *q, c;
3cf2715d
DE
3614
3615 VA_START (argptr, p);
3616
3617#ifndef __STDC__
0f41302f
MS
3618 file = va_arg (argptr, FILE *);
3619 p = va_arg (argptr, char *);
3cf2715d
DE
3620#endif
3621
3622 buf[0] = '%';
3623
b729186a 3624 while ((c = *p++))
3cf2715d
DE
3625 switch (c)
3626 {
3627#ifdef ASSEMBLER_DIALECT
3628 case '{':
b729186a
JL
3629 {
3630 int i;
3cf2715d 3631
b729186a
JL
3632 /* If we want the first dialect, do nothing. Otherwise, skip
3633 DIALECT_NUMBER of strings ending with '|'. */
3634 for (i = 0; i < dialect_number; i++)
3635 {
3636 while (*p && *p++ != '|')
3637 ;
3638
3639 if (*p == '|')
3640 p++;
3cf2715d 3641 }
b729186a 3642 }
3cf2715d
DE
3643 break;
3644
3645 case '|':
3646 /* Skip to close brace. */
3647 while (*p && *p++ != '}')
3648 ;
3649 break;
3650
3651 case '}':
3652 break;
3653#endif
3654
3655 case '%':
3656 c = *p++;
3657 q = &buf[1];
3658 while ((c >= '0' && c <= '9') || c == '.')
3659 {
3660 *q++ = c;
3661 c = *p++;
3662 }
3663 switch (c)
3664 {
3665 case '%':
3666 fprintf (file, "%%");
3667 break;
3668
3669 case 'd': case 'i': case 'u':
3670 case 'x': case 'p': case 'X':
3671 case 'o':
3672 *q++ = c;
3673 *q = 0;
3674 fprintf (file, buf, va_arg (argptr, int));
3675 break;
3676
3677 case 'w':
3678 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3679 but we do not check for those cases. It means that the value
3680 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3681
21e3a81b
RK
3682#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3683#else
3684#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3685 *q++ = 'l';
3686#else
3687 *q++ = 'l';
3cf2715d 3688 *q++ = 'l';
21e3a81b 3689#endif
3cf2715d
DE
3690#endif
3691
3692 *q++ = *p++;
3693 *q = 0;
3694 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3695 break;
3696
3697 case 'l':
3698 *q++ = c;
3699 *q++ = *p++;
3700 *q = 0;
3701 fprintf (file, buf, va_arg (argptr, long));
3702 break;
3703
3704 case 'e':
3705 case 'f':
3706 case 'g':
3707 *q++ = c;
3708 *q = 0;
3709 fprintf (file, buf, va_arg (argptr, double));
3710 break;
3711
3712 case 's':
3713 *q++ = c;
3714 *q = 0;
3715 fprintf (file, buf, va_arg (argptr, char *));
3716 break;
3717
3718 case 'O':
3719#ifdef ASM_OUTPUT_OPCODE
3720 ASM_OUTPUT_OPCODE (asm_out_file, p);
3721#endif
3722 break;
3723
3724 case 'R':
3725#ifdef REGISTER_PREFIX
3726 fprintf (file, "%s", REGISTER_PREFIX);
3727#endif
3728 break;
3729
3730 case 'I':
3731#ifdef IMMEDIATE_PREFIX
3732 fprintf (file, "%s", IMMEDIATE_PREFIX);
3733#endif
3734 break;
3735
3736 case 'L':
3737#ifdef LOCAL_LABEL_PREFIX
3738 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3739#endif
3740 break;
3741
3742 case 'U':
3743#ifdef USER_LABEL_PREFIX
3744 fprintf (file, "%s", USER_LABEL_PREFIX);
3745#endif
3746 break;
3747
3748 default:
3749 abort ();
3750 }
3751 break;
3752
3753 default:
3754 fputc (c, file);
3755 }
3756}
3757\f
3758/* Split up a CONST_DOUBLE or integer constant rtx
3759 into two rtx's for single words,
3760 storing in *FIRST the word that comes first in memory in the target
3761 and in *SECOND the other. */
3762
3763void
3764split_double (value, first, second)
3765 rtx value;
3766 rtx *first, *second;
3767{
3768 if (GET_CODE (value) == CONST_INT)
3769 {
5a1a6efd 3770 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
f76b9db2 3771 {
5a1a6efd 3772 /* In this case the CONST_INT holds both target words.
27eef9ce
JC
3773 Extract the bits from it into two word-sized pieces.
3774 Sign extend each half to HOST_WIDE_INT. */
5a1a6efd 3775 rtx low, high;
563c063f
MM
3776 /* On machines where HOST_BITS_PER_WIDE_INT == BITS_PER_WORD
3777 the shift below will cause a compiler warning, even though
3778 this code won't be executed. So put the shift amounts in
3779 variables to avoid the warning. */
3780 int rshift = HOST_BITS_PER_WIDE_INT - BITS_PER_WORD;
3781 int lshift = HOST_BITS_PER_WIDE_INT - 2 * BITS_PER_WORD;
3782
3783 low = GEN_INT ((INTVAL (value) << rshift) >> rshift);
3784 high = GEN_INT ((INTVAL (value) << lshift) >> rshift);
5a1a6efd
RK
3785 if (WORDS_BIG_ENDIAN)
3786 {
3787 *first = high;
3788 *second = low;
3789 }
3790 else
3791 {
3792 *first = low;
3793 *second = high;
3794 }
f76b9db2
ILT
3795 }
3796 else
3797 {
5a1a6efd
RK
3798 /* The rule for using CONST_INT for a wider mode
3799 is that we regard the value as signed.
3800 So sign-extend it. */
3801 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3802 if (WORDS_BIG_ENDIAN)
3803 {
3804 *first = high;
3805 *second = value;
3806 }
3807 else
3808 {
3809 *first = value;
3810 *second = high;
3811 }
f76b9db2 3812 }
3cf2715d
DE
3813 }
3814 else if (GET_CODE (value) != CONST_DOUBLE)
3815 {
f76b9db2
ILT
3816 if (WORDS_BIG_ENDIAN)
3817 {
3818 *first = const0_rtx;
3819 *second = value;
3820 }
3821 else
3822 {
3823 *first = value;
3824 *second = const0_rtx;
3825 }
3cf2715d
DE
3826 }
3827 else if (GET_MODE (value) == VOIDmode
3828 /* This is the old way we did CONST_DOUBLE integers. */
3829 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3830 {
3831 /* In an integer, the words are defined as most and least significant.
3832 So order them by the target's convention. */
f76b9db2
ILT
3833 if (WORDS_BIG_ENDIAN)
3834 {
3835 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3836 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3837 }
3838 else
3839 {
3840 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3841 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3842 }
3cf2715d
DE
3843 }
3844 else
3845 {
3846#ifdef REAL_ARITHMETIC
3847 REAL_VALUE_TYPE r; long l[2];
3848 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3849
3850 /* Note, this converts the REAL_VALUE_TYPE to the target's
3851 format, splits up the floating point double and outputs
3852 exactly 32 bits of it into each of l[0] and l[1] --
0f41302f 3853 not necessarily BITS_PER_WORD bits. */
3cf2715d
DE
3854 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3855
3856 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3857 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3858#else
3859 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3860 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3861 && ! flag_pretend_float)
3862 abort ();
3863
f76b9db2
ILT
3864 if (
3865#ifdef HOST_WORDS_BIG_ENDIAN
3866 WORDS_BIG_ENDIAN
3cf2715d 3867#else
f76b9db2 3868 ! WORDS_BIG_ENDIAN
3cf2715d 3869#endif
f76b9db2
ILT
3870 )
3871 {
3872 /* Host and target agree => no need to swap. */
3873 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3874 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3875 }
3876 else
3877 {
3878 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3879 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3880 }
3cf2715d
DE
3881#endif /* no REAL_ARITHMETIC */
3882 }
3883}
3884\f
3885/* Return nonzero if this function has no function calls. */
3886
3887int
3888leaf_function_p ()
3889{
3890 rtx insn;
3891
9e2f9a7f 3892 if (profile_flag || profile_block_flag || profile_arc_flag)
3cf2715d
DE
3893 return 0;
3894
3895 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3896 {
3897 if (GET_CODE (insn) == CALL_INSN)
3898 return 0;
3899 if (GET_CODE (insn) == INSN
3900 && GET_CODE (PATTERN (insn)) == SEQUENCE
3901 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN)
3902 return 0;
3903 }
3904 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
3905 {
3906 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN)
3907 return 0;
3908 if (GET_CODE (XEXP (insn, 0)) == INSN
3909 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
3910 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN)
3911 return 0;
3912 }
3913
3914 return 1;
3915}
3916
3917/* On some machines, a function with no call insns
3918 can run faster if it doesn't create its own register window.
3919 When output, the leaf function should use only the "output"
3920 registers. Ordinarily, the function would be compiled to use
3921 the "input" registers to find its arguments; it is a candidate
3922 for leaf treatment if it uses only the "input" registers.
3923 Leaf function treatment means renumbering so the function
3924 uses the "output" registers instead. */
3925
3926#ifdef LEAF_REGISTERS
3927
3928static char permitted_reg_in_leaf_functions[] = LEAF_REGISTERS;
3929
3930/* Return 1 if this function uses only the registers that can be
3931 safely renumbered. */
3932
3933int
3934only_leaf_regs_used ()
3935{
3936 int i;
3937
3938 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e5e809f4
JL
3939 if ((regs_ever_live[i] || global_regs[i])
3940 && ! permitted_reg_in_leaf_functions[i])
3941 return 0;
3942
3943 if (current_function_uses_pic_offset_table
3944 && pic_offset_table_rtx != 0
3945 && GET_CODE (pic_offset_table_rtx) == REG
3946 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3947 return 0;
3948
3cf2715d
DE
3949 return 1;
3950}
3951
3952/* Scan all instructions and renumber all registers into those
3953 available in leaf functions. */
3954
3955static void
3956leaf_renumber_regs (first)
3957 rtx first;
3958{
3959 rtx insn;
3960
3961 /* Renumber only the actual patterns.
3962 The reg-notes can contain frame pointer refs,
3963 and renumbering them could crash, and should not be needed. */
3964 for (insn = first; insn; insn = NEXT_INSN (insn))
3965 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3966 leaf_renumber_regs_insn (PATTERN (insn));
3967 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
3968 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
3969 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3970}
3971
3972/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3973 available in leaf functions. */
3974
3975void
3976leaf_renumber_regs_insn (in_rtx)
3977 register rtx in_rtx;
3978{
3979 register int i, j;
3980 register char *format_ptr;
3981
3982 if (in_rtx == 0)
3983 return;
3984
3985 /* Renumber all input-registers into output-registers.
3986 renumbered_regs would be 1 for an output-register;
3987 they */
3988
3989 if (GET_CODE (in_rtx) == REG)
3990 {
3991 int newreg;
3992
3993 /* Don't renumber the same reg twice. */
3994 if (in_rtx->used)
3995 return;
3996
3997 newreg = REGNO (in_rtx);
3998 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3999 to reach here as part of a REG_NOTE. */
4000 if (newreg >= FIRST_PSEUDO_REGISTER)
4001 {
4002 in_rtx->used = 1;
4003 return;
4004 }
4005 newreg = LEAF_REG_REMAP (newreg);
4006 if (newreg < 0)
4007 abort ();
4008 regs_ever_live[REGNO (in_rtx)] = 0;
4009 regs_ever_live[newreg] = 1;
4010 REGNO (in_rtx) = newreg;
4011 in_rtx->used = 1;
4012 }
4013
4014 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
4015 {
4016 /* Inside a SEQUENCE, we find insns.
4017 Renumber just the patterns of these insns,
4018 just as we do for the top-level insns. */
4019 leaf_renumber_regs_insn (PATTERN (in_rtx));
4020 return;
4021 }
4022
4023 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4024
4025 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4026 switch (*format_ptr++)
4027 {
4028 case 'e':
4029 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4030 break;
4031
4032 case 'E':
4033 if (NULL != XVEC (in_rtx, i))
4034 {
4035 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4036 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4037 }
4038 break;
4039
4040 case 'S':
4041 case 's':
4042 case '0':
4043 case 'i':
4044 case 'w':
4045 case 'n':
4046 case 'u':
4047 break;
4048
4049 default:
4050 abort ();
4051 }
4052}
4053#endif
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