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3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
e5e809f4 2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
3cf2715d
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
940d9d63
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
3cf2715d
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20
21
22/* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly as assembler code by the macros FUNCTION_PROLOGUE and
45 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
46
47#include "config.h"
48#ifdef __STDC__
49#include <stdarg.h>
50#else
51#include <varargs.h>
52#endif
670ee920 53#include "system.h"
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54
55#include "tree.h"
56#include "rtl.h"
57#include "regs.h"
58#include "insn-config.h"
59#include "insn-flags.h"
60#include "insn-attr.h"
61#include "insn-codes.h"
62#include "recog.h"
63#include "conditions.h"
64#include "flags.h"
65#include "real.h"
66#include "hard-reg-set.h"
67#include "defaults.h"
68#include "output.h"
3d195391 69#include "except.h"
10f0ad3d 70#include "toplev.h"
d6f4ec51 71#include "reload.h"
3cf2715d
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72
73/* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
74#if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
76ead72b 75#include "dbxout.h"
c7391272 76#if defined (USG) || !defined (HAVE_STAB_H)
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77#include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
78#else
79#include <stab.h> /* On BSD, use the system's stab.h. */
80#endif /* not USG */
81#endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
82
83#ifdef XCOFF_DEBUGGING_INFO
84#include "xcoffout.h"
85#endif
86
76ead72b
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87#ifdef DWARF_DEBUGGING_INFO
88#include "dwarfout.h"
89#endif
90
91#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
92#include "dwarf2out.h"
93#endif
94
95#ifdef SDB_DEBUGGING_INFO
96#include "sdbout.h"
97#endif
98
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99/* .stabd code for line number. */
100#ifndef N_SLINE
101#define N_SLINE 0x44
102#endif
103
104/* .stabs code for included file name. */
105#ifndef N_SOL
106#define N_SOL 0x84
107#endif
108
109#ifndef INT_TYPE_SIZE
110#define INT_TYPE_SIZE BITS_PER_WORD
111#endif
112
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113#ifndef LONG_TYPE_SIZE
114#define LONG_TYPE_SIZE BITS_PER_WORD
115#endif
116
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117/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
118 null default for it to save conditionalization later. */
119#ifndef CC_STATUS_INIT
120#define CC_STATUS_INIT
121#endif
122
123/* How to start an assembler comment. */
124#ifndef ASM_COMMENT_START
125#define ASM_COMMENT_START ";#"
126#endif
127
128/* Is the given character a logical line separator for the assembler? */
129#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
130#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
131#endif
132
133/* Nonzero means this function is a leaf function, with no function calls.
134 This variable exists to be examined in FUNCTION_PROLOGUE
135 and FUNCTION_EPILOGUE. Always zero, unless set by some action. */
136int leaf_function;
137
138/* Last insn processed by final_scan_insn. */
139static rtx debug_insn = 0;
140
141/* Line number of last NOTE. */
142static int last_linenum;
143
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144/* Highest line number in current block. */
145static int high_block_linenum;
146
147/* Likewise for function. */
148static int high_function_linenum;
149
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150/* Filename of last NOTE. */
151static char *last_filename;
152
153/* Number of basic blocks seen so far;
154 used if profile_block_flag is set. */
155static int count_basic_blocks;
156
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157/* Number of instrumented arcs when profile_arc_flag is set. */
158extern int count_instrumented_arcs;
159
fc470718
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160extern int length_unit_log; /* This is defined in insn-attrtab.c. */
161
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162/* Nonzero while outputting an `asm' with operands.
163 This means that inconsistencies are the user's fault, so don't abort.
164 The precise value is the insn being output, to pass to error_for_asm. */
165static rtx this_is_asm_operands;
166
167/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 168static unsigned int insn_noperands;
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169
170/* Compare optimization flag. */
171
172static rtx last_ignored_compare = 0;
173
174/* Flag indicating this insn is the start of a new basic block. */
175
176static int new_block = 1;
177
178/* All the symbol-blocks (levels of scoping) in the compilation
179 are assigned sequence numbers in order of appearance of the
180 beginnings of the symbol-blocks. Both final and dbxout do this,
181 and assume that they will both give the same number to each block.
182 Final uses these sequence numbers to generate assembler label names
183 LBBnnn and LBEnnn for the beginning and end of the symbol-block.
184 Dbxout uses the sequence numbers to generate references to the same labels
185 from the dbx debugging information.
186
187 Sdb records this level at the beginning of each function,
188 in order to find the current level when recursing down declarations.
189 It outputs the block beginning and endings
190 at the point in the asm file where the blocks would begin and end. */
191
192int next_block_index;
193
194/* Assign a unique number to each insn that is output.
195 This can be used to generate unique local labels. */
196
197static int insn_counter = 0;
198
199#ifdef HAVE_cc0
200/* This variable contains machine-dependent flags (defined in tm.h)
201 set and examined by output routines
202 that describe how to interpret the condition codes properly. */
203
204CC_STATUS cc_status;
205
206/* During output of an insn, this contains a copy of cc_status
207 from before the insn. */
208
209CC_STATUS cc_prev_status;
210#endif
211
212/* Indexed by hardware reg number, is 1 if that register is ever
213 used in the current function.
214
215 In life_analysis, or in stupid_life_analysis, this is set
216 up to record the hard regs used explicitly. Reload adds
217 in the hard regs used for holding pseudo regs. Final uses
218 it to generate the code in the function prologue and epilogue
219 to save and restore registers as needed. */
220
221char regs_ever_live[FIRST_PSEUDO_REGISTER];
222
223/* Nonzero means current function must be given a frame pointer.
224 Set in stmt.c if anything is allocated on the stack there.
225 Set in reload1.c if anything is allocated on the stack there. */
226
227int frame_pointer_needed;
228
229/* Assign unique numbers to labels generated for profiling. */
230
231int profile_label_no;
232
233/* Length so far allocated in PENDING_BLOCKS. */
234
235static int max_block_depth;
236
237/* Stack of sequence numbers of symbol-blocks of which we have seen the
238 beginning but not yet the end. Sequence numbers are assigned at
239 the beginning; this stack allows us to find the sequence number
240 of a block that is ending. */
241
242static int *pending_blocks;
243
244/* Number of elements currently in use in PENDING_BLOCKS. */
245
246static int block_depth;
247
248/* Nonzero if have enabled APP processing of our assembler output. */
249
250static int app_on;
251
252/* If we are outputting an insn sequence, this contains the sequence rtx.
253 Zero otherwise. */
254
255rtx final_sequence;
256
257#ifdef ASSEMBLER_DIALECT
258
259/* Number of the assembler dialect to use, starting at 0. */
260static int dialect_number;
261#endif
262
263/* Indexed by line number, nonzero if there is a note for that line. */
264
265static char *line_note_exists;
266
267/* Linked list to hold line numbers for each basic block. */
268
269struct bb_list {
270 struct bb_list *next; /* pointer to next basic block */
271 int line_num; /* line number */
272 int file_label_num; /* LPBC<n> label # for stored filename */
273 int func_label_num; /* LPBC<n> label # for stored function name */
274};
275
276static struct bb_list *bb_head = 0; /* Head of basic block list */
277static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
278static int bb_file_label_num = -1; /* Current label # for file */
279static int bb_func_label_num = -1; /* Current label # for func */
280
281/* Linked list to hold the strings for each file and function name output. */
282
283struct bb_str {
284 struct bb_str *next; /* pointer to next string */
285 char *string; /* string */
286 int label_num; /* label number */
287 int length; /* string length */
288};
289
290extern rtx peephole PROTO((rtx));
291
292static struct bb_str *sbb_head = 0; /* Head of string list. */
293static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
294static int sbb_label_num = 0; /* Last label used */
295
1d300e19 296#ifdef HAVE_ATTR_length
3cf2715d 297static int asm_insn_count PROTO((rtx));
1d300e19 298#endif
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299static void profile_function PROTO((FILE *));
300static void profile_after_prologue PROTO((FILE *));
301static void add_bb PROTO((FILE *));
302static int add_bb_string PROTO((char *, int));
303static void output_source_line PROTO((FILE *, rtx));
304static rtx walk_alter_subreg PROTO((rtx));
cb649530 305static void output_asm_name PROTO((void));
3cf2715d 306static void output_operand PROTO((rtx, int));
e9a25f70 307#ifdef LEAF_REGISTERS
3cf2715d 308static void leaf_renumber_regs PROTO((rtx));
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309#endif
310#ifdef HAVE_cc0
311static int alter_cond PROTO((rtx));
312#endif
1ba298e5
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313
314extern char *getpwd ();
3cf2715d
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315\f
316/* Initialize data in final at the beginning of a compilation. */
317
318void
319init_final (filename)
320 char *filename;
321{
322 next_block_index = 2;
323 app_on = 0;
324 max_block_depth = 20;
325 pending_blocks = (int *) xmalloc (20 * sizeof *pending_blocks);
326 final_sequence = 0;
327
328#ifdef ASSEMBLER_DIALECT
329 dialect_number = ASSEMBLER_DIALECT;
330#endif
331}
332
333/* Called at end of source file,
334 to output the block-profiling table for this entire compilation. */
335
336void
337end_final (filename)
338 char *filename;
339{
340 int i;
341
9e2f9a7f 342 if (profile_block_flag || profile_arc_flag)
3cf2715d
DE
343 {
344 char name[20];
345 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
9e2f9a7f 346 int size, rounded;
3cf2715d
DE
347 struct bb_list *ptr;
348 struct bb_str *sptr;
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DE
349 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
350 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
351
352 if (profile_block_flag)
353 size = long_bytes * count_basic_blocks;
354 else
355 size = long_bytes * count_instrumented_arcs;
356 rounded = size;
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DE
357
358 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
359 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
360 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
361
362 data_section ();
363
47431dff
RK
364 /* Output the main header, of 11 words:
365 0: 1 if this file is initialized, else 0.
3cf2715d
DE
366 1: address of file name (LPBX1).
367 2: address of table of counts (LPBX2).
368 3: number of counts in the table.
369 4: always 0, for compatibility with Sun.
370
371 The following are GNU extensions:
372
373 5: address of table of start addrs of basic blocks (LPBX3).
374 6: Number of bytes in this header.
375 7: address of table of function names (LPBX4).
376 8: address of table of line numbers (LPBX5) or 0.
47431dff 377 9: address of table of file names (LPBX6) or 0.
0f41302f 378 10: space reserved for basic block profiling. */
3cf2715d
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379
380 ASM_OUTPUT_ALIGN (asm_out_file, align);
381
382 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
383 /* zero word */
9e2f9a7f 384 assemble_integer (const0_rtx, long_bytes, 1);
3cf2715d
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385
386 /* address of filename */
387 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
38a448ca 388 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d
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389
390 /* address of count table */
391 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
38a448ca 392 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 393
9e2f9a7f
DE
394 /* count of the # of basic blocks or # of instrumented arcs */
395 if (profile_block_flag)
396 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
397 else
398 assemble_integer (GEN_INT (count_instrumented_arcs), long_bytes,
399 1);
3cf2715d
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400
401 /* zero word (link field) */
9e2f9a7f 402 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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403
404 /* address of basic block start address table */
9e2f9a7f
DE
405 if (profile_block_flag)
406 {
407 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 408 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
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409 1);
410 }
411 else
412 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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413
414 /* byte count for extended structure. */
9e2f9a7f 415 assemble_integer (GEN_INT (10 * UNITS_PER_WORD), long_bytes, 1);
3cf2715d
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416
417 /* address of function name table */
9e2f9a7f
DE
418 if (profile_block_flag)
419 {
420 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
38a448ca 421 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
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422 1);
423 }
424 else
425 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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426
427 /* address of line number and filename tables if debugging. */
9e2f9a7f 428 if (write_symbols != NO_DEBUG && profile_block_flag)
3cf2715d
DE
429 {
430 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
38a448ca 431 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 432 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
38a448ca 433 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d
DE
434 }
435 else
436 {
9e2f9a7f
DE
437 assemble_integer (const0_rtx, pointer_bytes, 1);
438 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
439 }
440
47431dff
RK
441 /* space for extension ptr (link field) */
442 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
443
3cf2715d
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444 /* Output the file name changing the suffix to .d for Sun tcov
445 compatibility. */
446 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
447 {
67e23d2f
JW
448 char *cwd = getpwd ();
449 int len = strlen (filename) + strlen (cwd) + 1;
450 char *data_file = (char *) alloca (len + 4);
451
452 strcpy (data_file, cwd);
453 strcat (data_file, "/");
454 strcat (data_file, filename);
3cf2715d 455 strip_off_ending (data_file, len);
9e2f9a7f
DE
456 if (profile_block_flag)
457 strcat (data_file, ".d");
458 else
459 strcat (data_file, ".da");
3cf2715d
DE
460 assemble_string (data_file, strlen (data_file) + 1);
461 }
462
463 /* Make space for the table of counts. */
2786cbad 464 if (size == 0)
3cf2715d
DE
465 {
466 /* Realign data section. */
467 ASM_OUTPUT_ALIGN (asm_out_file, align);
468 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
469 if (size != 0)
470 assemble_zeros (size);
471 }
472 else
473 {
474 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
475#ifdef ASM_OUTPUT_SHARED_LOCAL
476 if (flag_shared_data)
477 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
478 else
479#endif
e9a25f70
JL
480#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
481 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
482 BIGGEST_ALIGNMENT);
483#else
3cf2715d
DE
484#ifdef ASM_OUTPUT_ALIGNED_LOCAL
485 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
486 BIGGEST_ALIGNMENT);
487#else
488 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
e9a25f70 489#endif
3cf2715d
DE
490#endif
491 }
492
493 /* Output any basic block strings */
9e2f9a7f 494 if (profile_block_flag)
3cf2715d 495 {
9e2f9a7f
DE
496 readonly_data_section ();
497 if (sbb_head)
3cf2715d 498 {
9e2f9a7f
DE
499 ASM_OUTPUT_ALIGN (asm_out_file, align);
500 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
501 {
502 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
503 sptr->label_num);
504 assemble_string (sptr->string, sptr->length);
505 }
3cf2715d
DE
506 }
507 }
508
509 /* Output the table of addresses. */
9e2f9a7f 510 if (profile_block_flag)
3cf2715d 511 {
9e2f9a7f
DE
512 /* Realign in new section */
513 ASM_OUTPUT_ALIGN (asm_out_file, align);
514 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
515 for (i = 0; i < count_basic_blocks; i++)
516 {
517 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
38a448ca 518 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
519 pointer_bytes, 1);
520 }
3cf2715d
DE
521 }
522
523 /* Output the table of function names. */
9e2f9a7f 524 if (profile_block_flag)
3cf2715d 525 {
9e2f9a7f
DE
526 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
527 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
3cf2715d 528 {
9e2f9a7f
DE
529 if (ptr->func_label_num >= 0)
530 {
531 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
532 ptr->func_label_num);
38a448ca 533 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
534 pointer_bytes, 1);
535 }
536 else
537 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d 538 }
3cf2715d 539
9e2f9a7f
DE
540 for ( ; i < count_basic_blocks; i++)
541 assemble_integer (const0_rtx, pointer_bytes, 1);
542 }
3cf2715d 543
9e2f9a7f 544 if (write_symbols != NO_DEBUG && profile_block_flag)
3cf2715d
DE
545 {
546 /* Output the table of line numbers. */
547 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
548 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
9e2f9a7f 549 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
3cf2715d
DE
550
551 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 552 assemble_integer (const0_rtx, long_bytes, 1);
3cf2715d
DE
553
554 /* Output the table of file names. */
555 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
556 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
557 {
558 if (ptr->file_label_num >= 0)
559 {
9e2f9a7f
DE
560 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
561 ptr->file_label_num);
38a448ca 562 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f 563 pointer_bytes, 1);
3cf2715d
DE
564 }
565 else
9e2f9a7f 566 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
567 }
568
569 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 570 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
571 }
572
573 /* End with the address of the table of addresses,
574 so we can find it easily, as the last word in the file's text. */
9e2f9a7f
DE
575 if (profile_block_flag)
576 {
577 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 578 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
579 1);
580 }
3cf2715d
DE
581 }
582}
583
584/* Enable APP processing of subsequent output.
585 Used before the output from an `asm' statement. */
586
587void
588app_enable ()
589{
590 if (! app_on)
591 {
51723711 592 fputs (ASM_APP_ON, asm_out_file);
3cf2715d
DE
593 app_on = 1;
594 }
595}
596
597/* Disable APP processing of subsequent output.
598 Called from varasm.c before most kinds of output. */
599
600void
601app_disable ()
602{
603 if (app_on)
604 {
51723711 605 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
DE
606 app_on = 0;
607 }
608}
609\f
610/* Return the number of slots filled in the current
611 delayed branch sequence (we don't count the insn needing the
612 delay slot). Zero if not in a delayed branch sequence. */
613
614#ifdef DELAY_SLOTS
615int
616dbr_sequence_length ()
617{
618 if (final_sequence != 0)
619 return XVECLEN (final_sequence, 0) - 1;
620 else
621 return 0;
622}
623#endif
624\f
625/* The next two pages contain routines used to compute the length of an insn
626 and to shorten branches. */
627
628/* Arrays for insn lengths, and addresses. The latter is referenced by
629 `insn_current_length'. */
630
631static short *insn_lengths;
632int *insn_addresses;
633
634/* Address of insn being processed. Used by `insn_current_length'. */
635int insn_current_address;
636
fc470718
R
637/* Address of insn being processed in previous iteration. */
638int insn_last_address;
639
640/* konwn invariant alignment of insn being processed. */
641int insn_current_align;
642
95707627
R
643/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
644 gives the next following alignment insn that increases the known
645 alignment, or NULL_RTX if there is no such insn.
646 For any alignment obtained this way, we can again index uid_align with
647 its uid to obtain the next following align that in turn increases the
648 alignment, till we reach NULL_RTX; the sequence obtained this way
649 for each insn we'll call the alignment chain of this insn in the following
650 comments. */
651
9e423e6d
JW
652struct label_alignment {
653 short alignment;
654 short max_skip;
655};
656
657static rtx *uid_align;
658static int *uid_shuid;
659static struct label_alignment *label_align;
95707627 660
3cf2715d
DE
661/* Indicate that branch shortening hasn't yet been done. */
662
663void
664init_insn_lengths ()
665{
95707627
R
666 if (label_align)
667 {
668 free (label_align);
669 label_align = 0;
670 }
671 if (uid_shuid)
672 {
673 free (uid_shuid);
674 uid_shuid = 0;
675 }
676 if (insn_lengths)
677 {
678 free (insn_lengths);
679 insn_lengths = 0;
680 }
681 if (insn_addresses)
682 {
683 free (insn_addresses);
684 insn_addresses = 0;
685 }
686 if (uid_align)
687 {
688 free (uid_align);
689 uid_align = 0;
690 }
3cf2715d
DE
691}
692
693/* Obtain the current length of an insn. If branch shortening has been done,
694 get its actual length. Otherwise, get its maximum length. */
695
696int
697get_attr_length (insn)
698 rtx insn;
699{
700#ifdef HAVE_ATTR_length
701 rtx body;
702 int i;
703 int length = 0;
704
705 if (insn_lengths)
706 return insn_lengths[INSN_UID (insn)];
707 else
708 switch (GET_CODE (insn))
709 {
710 case NOTE:
711 case BARRIER:
712 case CODE_LABEL:
713 return 0;
714
715 case CALL_INSN:
716 length = insn_default_length (insn);
717 break;
718
719 case JUMP_INSN:
720 body = PATTERN (insn);
721 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
722 {
fc470718
R
723 /* Alignment is machine-dependent and should be handled by
724 ADDR_VEC_ALIGN. */
3cf2715d
DE
725 }
726 else
727 length = insn_default_length (insn);
728 break;
729
730 case INSN:
731 body = PATTERN (insn);
732 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
733 return 0;
734
735 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
736 length = asm_insn_count (body) * insn_default_length (insn);
737 else if (GET_CODE (body) == SEQUENCE)
738 for (i = 0; i < XVECLEN (body, 0); i++)
739 length += get_attr_length (XVECEXP (body, 0, i));
740 else
741 length = insn_default_length (insn);
e9a25f70
JL
742 break;
743
744 default:
745 break;
3cf2715d
DE
746 }
747
748#ifdef ADJUST_INSN_LENGTH
749 ADJUST_INSN_LENGTH (insn, length);
750#endif
751 return length;
752#else /* not HAVE_ATTR_length */
753 return 0;
754#endif /* not HAVE_ATTR_length */
755}
756\f
fc470718
R
757/* Code to handle alignment inside shorten_branches. */
758
759/* Here is an explanation how the algorithm in align_fuzz can give
760 proper results:
761
762 Call a sequence of instructions beginning with alignment point X
763 and continuing until the next alignment point `block X'. When `X'
764 is used in an expression, it means the alignment value of the
765 alignment point.
766
767 Call the distance between the start of the first insn of block X, and
768 the end of the last insn of block X `IX', for the `inner size of X'.
769 This is clearly the sum of the instruction lengths.
770
771 Likewise with the next alignment-delimited block following X, which we
772 shall call block Y.
773
774 Call the distance between the start of the first insn of block X, and
775 the start of the first insn of block Y `OX', for the `outer size of X'.
776
777 The estimated padding is then OX - IX.
778
779 OX can be safely estimated as
780
781 if (X >= Y)
782 OX = round_up(IX, Y)
783 else
784 OX = round_up(IX, X) + Y - X
785
786 Clearly est(IX) >= real(IX), because that only depends on the
787 instruction lengths, and those being overestimated is a given.
788
789 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
790 we needn't worry about that when thinking about OX.
791
792 When X >= Y, the alignment provided by Y adds no uncertainty factor
793 for branch ranges starting before X, so we can just round what we have.
794 But when X < Y, we don't know anything about the, so to speak,
795 `middle bits', so we have to assume the worst when aligning up from an
796 address mod X to one mod Y, which is Y - X. */
797
798#ifndef LABEL_ALIGN
799#define LABEL_ALIGN(LABEL) 0
800#endif
801
9e423e6d
JW
802#ifndef LABEL_ALIGN_MAX_SKIP
803#define LABEL_ALIGN_MAX_SKIP 0
804#endif
805
fc470718
R
806#ifndef LOOP_ALIGN
807#define LOOP_ALIGN(LABEL) 0
808#endif
809
9e423e6d
JW
810#ifndef LOOP_ALIGN_MAX_SKIP
811#define LOOP_ALIGN_MAX_SKIP 0
812#endif
813
fc470718
R
814#ifndef LABEL_ALIGN_AFTER_BARRIER
815#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
816#endif
817
9e423e6d
JW
818#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
819#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
820#endif
821
fc470718
R
822#ifndef ADDR_VEC_ALIGN
823int
824final_addr_vec_align (addr_vec)
825 rtx addr_vec;
826{
827 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
828
829 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
830 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
831 return align;
832
833}
834#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
835#endif
836
837#ifndef INSN_LENGTH_ALIGNMENT
838#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
839#endif
840
fc470718
R
841#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
842
de7987a6 843static int min_labelno, max_labelno;
fc470718
R
844
845#define LABEL_TO_ALIGNMENT(LABEL) \
9e423e6d
JW
846 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
847
848#define LABEL_TO_MAX_SKIP(LABEL) \
849 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
fc470718
R
850
851/* For the benefit of port specific code do this also as a function. */
852int
853label_to_alignment (label)
854 rtx label;
855{
856 return LABEL_TO_ALIGNMENT (label);
857}
858
859#ifdef HAVE_ATTR_length
860/* The differences in addresses
861 between a branch and its target might grow or shrink depending on
862 the alignment the start insn of the range (the branch for a forward
863 branch or the label for a backward branch) starts out on; if these
864 differences are used naively, they can even oscillate infinitely.
865 We therefore want to compute a 'worst case' address difference that
866 is independent of the alignment the start insn of the range end
867 up on, and that is at least as large as the actual difference.
868 The function align_fuzz calculates the amount we have to add to the
869 naively computed difference, by traversing the part of the alignment
870 chain of the start insn of the range that is in front of the end insn
871 of the range, and considering for each alignment the maximum amount
872 that it might contribute to a size increase.
873
874 For casesi tables, we also want to know worst case minimum amounts of
875 address difference, in case a machine description wants to introduce
876 some common offset that is added to all offsets in a table.
877 For this purpose, align_fuzz with a growth argument of 0 comuptes the
878 appropriate adjustment. */
879
880
881/* Compute the maximum delta by which the difference of the addresses of
882 START and END might grow / shrink due to a different address for start
883 which changes the size of alignment insns between START and END.
884 KNOWN_ALIGN_LOG is the alignment known for START.
885 GROWTH should be ~0 if the objective is to compute potential code size
886 increase, and 0 if the objective is to compute potential shrink.
887 The return value is undefined for any other value of GROWTH. */
687d0ab6
R
888int
889align_fuzz (start, end, known_align_log, growth)
fc470718
R
890 rtx start, end;
891 int known_align_log;
892 unsigned growth;
893{
894 int uid = INSN_UID (start);
895 rtx align_label;
896 int known_align = 1 << known_align_log;
897 int end_shuid = INSN_SHUID (end);
898 int fuzz = 0;
899
900 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
901 {
902 int align_addr, new_align;
903
904 uid = INSN_UID (align_label);
905 align_addr = insn_addresses[uid] - insn_lengths[uid];
906 if (uid_shuid[uid] > end_shuid)
907 break;
908 known_align_log = LABEL_TO_ALIGNMENT (align_label);
909 new_align = 1 << known_align_log;
910 if (new_align < known_align)
911 continue;
912 fuzz += (-align_addr ^ growth) & (new_align - known_align);
913 known_align = new_align;
914 }
915 return fuzz;
916}
917
918/* Compute a worst-case reference address of a branch so that it
919 can be safely used in the presence of aligned labels. Since the
920 size of the branch itself is unknown, the size of the branch is
921 not included in the range. I.e. for a forward branch, the reference
922 address is the end address of the branch as known from the previous
923 branch shortening pass, minus a value to account for possible size
924 increase due to alignment. For a backward branch, it is the start
925 address of the branch as known from the current pass, plus a value
926 to account for possible size increase due to alignment.
927 NB.: Therefore, the maximum offset allowed for backward branches needs
928 to exclude the branch size. */
929int
930insn_current_reference_address (branch)
931 rtx branch;
932{
933 rtx dest;
934 rtx seq = NEXT_INSN (PREV_INSN (branch));
935 int seq_uid = INSN_UID (seq);
936 if (GET_CODE (branch) != JUMP_INSN)
937 /* This can happen for example on the PA; the objective is to know the
938 offset to address something in front of the start of the function.
939 Thus, we can treat it like a backward branch.
940 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
941 any alignment we'd encounter, so we skip the call to align_fuzz. */
942 return insn_current_address;
943 dest = JUMP_LABEL (branch);
33f7f353 944 /* BRANCH has no proper alignment chain set, so use SEQ. */
fc470718
R
945 if (INSN_SHUID (branch) < INSN_SHUID (dest))
946 {
947 /* Forward branch. */
948 return (insn_last_address + insn_lengths[seq_uid]
26024475 949 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
950 }
951 else
952 {
953 /* Backward branch. */
954 return (insn_current_address
923f7cf9 955 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
956 }
957}
958#endif /* HAVE_ATTR_length */
959\f
3cf2715d
DE
960/* Make a pass over all insns and compute their actual lengths by shortening
961 any branches of variable length if possible. */
962
963/* Give a default value for the lowest address in a function. */
964
965#ifndef FIRST_INSN_ADDRESS
966#define FIRST_INSN_ADDRESS 0
967#endif
968
fc470718
R
969/* shorten_branches might be called multiple times: for example, the SH
970 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
971 In order to do this, it needs proper length information, which it obtains
972 by calling shorten_branches. This cannot be collapsed with
973 shorten_branches itself into a single pass unless we also want to intergate
974 reorg.c, since the branch splitting exposes new instructions with delay
975 slots. */
976
3cf2715d
DE
977void
978shorten_branches (first)
979 rtx first;
980{
3cf2715d 981 rtx insn;
fc470718
R
982 int max_uid;
983 int i;
fc470718 984 int max_log;
9e423e6d 985 int max_skip;
fc470718
R
986#ifdef HAVE_ATTR_length
987#define MAX_CODE_ALIGN 16
988 rtx seq;
3cf2715d 989 int something_changed = 1;
3cf2715d
DE
990 char *varying_length;
991 rtx body;
992 int uid;
fc470718 993 rtx align_tab[MAX_CODE_ALIGN];
3cf2715d 994
3d14e82f
JW
995 /* In order to make sure that all instructions have valid length info,
996 we must split them before we compute the address/length info. */
997
998 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
999 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
fc470718
R
1000 {
1001 rtx old = insn;
1002 insn = try_split (PATTERN (old), old, 1);
1003 /* When not optimizing, the old insn will be still left around
1004 with only the 'deleted' bit set. Transform it into a note
1005 to avoid confusion of subsequent processing. */
1006 if (INSN_DELETED_P (old))
1007 {
1008 PUT_CODE (old , NOTE);
1009 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
1010 NOTE_SOURCE_FILE (old) = 0;
1011 }
1012 }
1013#endif
3d14e82f 1014
fc470718
R
1015 /* We must do some computations even when not actually shortening, in
1016 order to get the alignment information for the labels. */
1017
95707627
R
1018 init_insn_lengths ();
1019
fc470718
R
1020 /* Compute maximum UID and allocate label_align / uid_shuid. */
1021 max_uid = get_max_uid ();
1022
1023 max_labelno = max_label_num ();
1024 min_labelno = get_first_label_num ();
9e423e6d
JW
1025 label_align = (struct label_alignment *) xmalloc (
1026 (max_labelno - min_labelno + 1) * sizeof (struct label_alignment));
1027 bzero (label_align,
1028 (max_labelno - min_labelno + 1) * sizeof (struct label_alignment));
fc470718 1029
fc470718
R
1030 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1031
1032 /* Initialize label_align and set up uid_shuid to be strictly
1033 monotonically rising with insn order. */
e2faec75
R
1034 /* We use max_log here to keep track of the maximum alignment we want to
1035 impose on the next CODE_LABEL (or the current one if we are processing
1036 the CODE_LABEL itself). */
1037
9e423e6d
JW
1038 max_log = 0;
1039 max_skip = 0;
1040
1041 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718
R
1042 {
1043 int log;
1044
1045 INSN_SHUID (insn) = i++;
1046 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
e2faec75
R
1047 {
1048 /* reorg might make the first insn of a loop being run once only,
1049 and delete the label in front of it. Then we want to apply
1050 the loop alignment to the new label created by reorg, which
1051 is separated by the former loop start insn from the
1052 NOTE_INSN_LOOP_BEG. */
1053 }
fc470718
R
1054 else if (GET_CODE (insn) == CODE_LABEL)
1055 {
1056 rtx next;
1057
1058 log = LABEL_ALIGN (insn);
1059 if (max_log < log)
9e423e6d
JW
1060 {
1061 max_log = log;
1062 max_skip = LABEL_ALIGN_MAX_SKIP;
1063 }
fc470718
R
1064 next = NEXT_INSN (insn);
1065/* ADDR_VECs only take room if read-only data goes into the text section. */
1066#if !defined(READONLY_DATA_SECTION) || defined(JUMP_TABLES_IN_TEXT_SECTION)
1067 if (next && GET_CODE (next) == JUMP_INSN)
1068 {
1069 rtx nextbody = PATTERN (next);
1070 if (GET_CODE (nextbody) == ADDR_VEC
1071 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1072 {
1073 log = ADDR_VEC_ALIGN (next);
1074 if (max_log < log)
9e423e6d
JW
1075 {
1076 max_log = log;
1077 max_skip = LABEL_ALIGN_MAX_SKIP;
1078 }
fc470718
R
1079 }
1080 }
1081#endif
1082 LABEL_TO_ALIGNMENT (insn) = max_log;
9e423e6d 1083 LABEL_TO_MAX_SKIP (insn) = max_skip;
fc470718 1084 max_log = 0;
9e423e6d 1085 max_skip = 0;
fc470718
R
1086 }
1087 else if (GET_CODE (insn) == BARRIER)
1088 {
1089 rtx label;
1090
1091 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1092 label = NEXT_INSN (label))
1093 if (GET_CODE (label) == CODE_LABEL)
1094 {
1095 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1096 if (max_log < log)
9e423e6d
JW
1097 {
1098 max_log = log;
1099 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1100 }
fc470718
R
1101 break;
1102 }
1103 }
e2faec75
R
1104 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1105 sequences in order to handle reorg output efficiently. */
fc470718
R
1106 else if (GET_CODE (insn) == NOTE
1107 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1108 {
1109 rtx label;
1110
e2faec75 1111 for (label = insn; label; label = NEXT_INSN (label))
fc470718
R
1112 if (GET_CODE (label) == CODE_LABEL)
1113 {
1114 log = LOOP_ALIGN (insn);
1115 if (max_log < log)
9e423e6d
JW
1116 {
1117 max_log = log;
1118 max_skip = LOOP_ALIGN_MAX_SKIP;
1119 }
fc470718
R
1120 break;
1121 }
1122 }
1123 else
1124 continue;
1125 }
1126#ifdef HAVE_ATTR_length
1127
1128 /* Allocate the rest of the arrays. */
fc470718 1129 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
fc470718 1130 insn_addresses = (int *) xmalloc (max_uid * sizeof (int));
af035616
R
1131 /* Syntax errors can lead to labels being outside of the main insn stream.
1132 Initialize insn_addresses, so that we get reproducible results. */
1133 bzero ((char *)insn_addresses, max_uid * sizeof *insn_addresses);
fc470718
R
1134 uid_align = (rtx *) xmalloc (max_uid * sizeof *uid_align);
1135
1136 varying_length = (char *) xmalloc (max_uid * sizeof (char));
1137
1138 bzero (varying_length, max_uid);
1139
1140 /* Initialize uid_align. We scan instructions
1141 from end to start, and keep in align_tab[n] the last seen insn
1142 that does an alignment of at least n+1, i.e. the successor
1143 in the alignment chain for an insn that does / has a known
1144 alignment of n. */
1145
1146 bzero ((char *) uid_align, max_uid * sizeof *uid_align);
1147
1148 for (i = MAX_CODE_ALIGN; --i >= 0; )
1149 align_tab[i] = NULL_RTX;
1150 seq = get_last_insn ();
33f7f353 1151 for (; seq; seq = PREV_INSN (seq))
fc470718
R
1152 {
1153 int uid = INSN_UID (seq);
1154 int log;
fc470718
R
1155 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1156 uid_align[uid] = align_tab[0];
fc470718
R
1157 if (log)
1158 {
1159 /* Found an alignment label. */
1160 uid_align[uid] = align_tab[log];
1161 for (i = log - 1; i >= 0; i--)
1162 align_tab[i] = seq;
1163 }
33f7f353
JR
1164 }
1165#ifdef CASE_VECTOR_SHORTEN_MODE
1166 if (optimize)
1167 {
1168 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1169 label fields. */
1170
1171 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1172 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1173 int rel;
1174
1175 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 1176 {
33f7f353
JR
1177 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1178 int len, i, min, max, insn_shuid;
1179 int min_align;
1180 addr_diff_vec_flags flags;
1181
1182 if (GET_CODE (insn) != JUMP_INSN
1183 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1184 continue;
1185 pat = PATTERN (insn);
1186 len = XVECLEN (pat, 1);
1187 if (len <= 0)
1188 abort ();
1189 min_align = MAX_CODE_ALIGN;
1190 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1191 {
1192 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1193 int shuid = INSN_SHUID (lab);
1194 if (shuid < min)
1195 {
1196 min = shuid;
1197 min_lab = lab;
1198 }
1199 if (shuid > max)
1200 {
1201 max = shuid;
1202 max_lab = lab;
1203 }
1204 if (min_align > LABEL_TO_ALIGNMENT (lab))
1205 min_align = LABEL_TO_ALIGNMENT (lab);
1206 }
1207 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1208 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1209 insn_shuid = INSN_SHUID (insn);
1210 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1211 flags.min_align = min_align;
1212 flags.base_after_vec = rel > insn_shuid;
1213 flags.min_after_vec = min > insn_shuid;
1214 flags.max_after_vec = max > insn_shuid;
1215 flags.min_after_base = min > rel;
1216 flags.max_after_base = max > rel;
1217 ADDR_DIFF_VEC_FLAGS (pat) = flags;
fc470718
R
1218 }
1219 }
33f7f353 1220#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1221
3cf2715d
DE
1222
1223 /* Compute initial lengths, addresses, and varying flags for each insn. */
1224 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1225 insn != 0;
1226 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1227 {
1228 uid = INSN_UID (insn);
fc470718 1229
3cf2715d 1230 insn_lengths[uid] = 0;
fc470718
R
1231
1232 if (GET_CODE (insn) == CODE_LABEL)
1233 {
1234 int log = LABEL_TO_ALIGNMENT (insn);
1235 if (log)
1236 {
1237 int align = 1 << log;
ecb06768 1238 int new_address = (insn_current_address + align - 1) & -align;
fc470718
R
1239 insn_lengths[uid] = new_address - insn_current_address;
1240 insn_current_address = new_address;
1241 }
1242 }
1243
1244 insn_addresses[uid] = insn_current_address;
3cf2715d
DE
1245
1246 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1247 || GET_CODE (insn) == CODE_LABEL)
1248 continue;
04da53bd
R
1249 if (INSN_DELETED_P (insn))
1250 continue;
3cf2715d
DE
1251
1252 body = PATTERN (insn);
1253 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
5a32a90c
JR
1254 {
1255 /* This only takes room if read-only data goes into the text
1256 section. */
1257#if !defined(READONLY_DATA_SECTION) || defined(JUMP_TABLES_IN_TEXT_SECTION)
1258 insn_lengths[uid] = (XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC)
1259 * GET_MODE_SIZE (GET_MODE (body)));
1260 /* Alignment is handled by ADDR_VEC_ALIGN. */
1261#endif
1262 }
3cf2715d
DE
1263 else if (asm_noperands (body) >= 0)
1264 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1265 else if (GET_CODE (body) == SEQUENCE)
1266 {
1267 int i;
1268 int const_delay_slots;
1269#ifdef DELAY_SLOTS
1270 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1271#else
1272 const_delay_slots = 0;
1273#endif
1274 /* Inside a delay slot sequence, we do not do any branch shortening
1275 if the shortening could change the number of delay slots
0f41302f 1276 of the branch. */
3cf2715d
DE
1277 for (i = 0; i < XVECLEN (body, 0); i++)
1278 {
1279 rtx inner_insn = XVECEXP (body, 0, i);
1280 int inner_uid = INSN_UID (inner_insn);
1281 int inner_length;
1282
1283 if (asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1284 inner_length = (asm_insn_count (PATTERN (inner_insn))
1285 * insn_default_length (inner_insn));
1286 else
1287 inner_length = insn_default_length (inner_insn);
1288
1289 insn_lengths[inner_uid] = inner_length;
1290 if (const_delay_slots)
1291 {
1292 if ((varying_length[inner_uid]
1293 = insn_variable_length_p (inner_insn)) != 0)
1294 varying_length[uid] = 1;
1295 insn_addresses[inner_uid] = (insn_current_address +
1296 insn_lengths[uid]);
1297 }
1298 else
1299 varying_length[inner_uid] = 0;
1300 insn_lengths[uid] += inner_length;
1301 }
1302 }
1303 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1304 {
1305 insn_lengths[uid] = insn_default_length (insn);
1306 varying_length[uid] = insn_variable_length_p (insn);
1307 }
1308
1309 /* If needed, do any adjustment. */
1310#ifdef ADJUST_INSN_LENGTH
1311 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1312#endif
1313 }
1314
1315 /* Now loop over all the insns finding varying length insns. For each,
1316 get the current insn length. If it has changed, reflect the change.
1317 When nothing changes for a full pass, we are done. */
1318
1319 while (something_changed)
1320 {
1321 something_changed = 0;
fc470718 1322 insn_current_align = MAX_CODE_ALIGN - 1;
3cf2715d
DE
1323 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1324 insn != 0;
1325 insn = NEXT_INSN (insn))
1326 {
1327 int new_length;
b729186a 1328#ifdef ADJUST_INSN_LENGTH
3cf2715d 1329 int tmp_length;
b729186a 1330#endif
fc470718 1331 int length_align;
3cf2715d
DE
1332
1333 uid = INSN_UID (insn);
fc470718
R
1334
1335 if (GET_CODE (insn) == CODE_LABEL)
1336 {
1337 int log = LABEL_TO_ALIGNMENT (insn);
1338 if (log > insn_current_align)
1339 {
1340 int align = 1 << log;
ecb06768 1341 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1342 insn_lengths[uid] = new_address - insn_current_address;
1343 insn_current_align = log;
1344 insn_current_address = new_address;
1345 }
1346 else
1347 insn_lengths[uid] = 0;
1348 insn_addresses[uid] = insn_current_address;
1349 continue;
1350 }
1351
1352 length_align = INSN_LENGTH_ALIGNMENT (insn);
1353 if (length_align < insn_current_align)
1354 insn_current_align = length_align;
1355
1356 insn_last_address = insn_addresses[uid];
3cf2715d 1357 insn_addresses[uid] = insn_current_address;
fc470718 1358
5e75ef4a 1359#ifdef CASE_VECTOR_SHORTEN_MODE
33f7f353
JR
1360 if (optimize && GET_CODE (insn) == JUMP_INSN
1361 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1362 {
33f7f353
JR
1363 rtx body = PATTERN (insn);
1364 int old_length = insn_lengths[uid];
1365 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1366 rtx min_lab = XEXP (XEXP (body, 2), 0);
1367 rtx max_lab = XEXP (XEXP (body, 3), 0);
1368 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1369 int rel_addr = insn_addresses[INSN_UID (rel_lab)];
1370 int min_addr = insn_addresses[INSN_UID (min_lab)];
1371 int max_addr = insn_addresses[INSN_UID (max_lab)];
1372 rtx prev;
1373 int rel_align = 0;
1374
1375 /* Try to find a known alignment for rel_lab. */
1376 for (prev = rel_lab;
1377 prev
1378 && ! insn_lengths[INSN_UID (prev)]
1379 && ! (varying_length[INSN_UID (prev)] & 1);
1380 prev = PREV_INSN (prev))
1381 if (varying_length[INSN_UID (prev)] & 2)
1382 {
1383 rel_align = LABEL_TO_ALIGNMENT (prev);
1384 break;
1385 }
1386
1387 /* See the comment on addr_diff_vec_flags in rtl.h for the
1388 meaning of the flags values. base: REL_LAB vec: INSN */
1389 /* Anything after INSN has still addresses from the last
1390 pass; adjust these so that they reflect our current
1391 estimate for this pass. */
1392 if (flags.base_after_vec)
1393 rel_addr += insn_current_address - insn_last_address;
1394 if (flags.min_after_vec)
1395 min_addr += insn_current_address - insn_last_address;
1396 if (flags.max_after_vec)
1397 max_addr += insn_current_address - insn_last_address;
1398 /* We want to know the worst case, i.e. lowest possible value
1399 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1400 its offset is positive, and we have to be wary of code shrink;
1401 otherwise, it is negative, and we have to be vary of code
1402 size increase. */
1403 if (flags.min_after_base)
1404 {
1405 /* If INSN is between REL_LAB and MIN_LAB, the size
1406 changes we are about to make can change the alignment
1407 within the observed offset, therefore we have to break
1408 it up into two parts that are independent. */
1409 if (! flags.base_after_vec && flags.min_after_vec)
1410 {
1411 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1412 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1413 }
1414 else
1415 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1416 }
1417 else
1418 {
1419 if (flags.base_after_vec && ! flags.min_after_vec)
1420 {
1421 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1422 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1423 }
1424 else
1425 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1426 }
1427 /* Likewise, determine the highest lowest possible value
1428 for the offset of MAX_LAB. */
1429 if (flags.max_after_base)
1430 {
1431 if (! flags.base_after_vec && flags.max_after_vec)
1432 {
1433 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1434 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1435 }
1436 else
1437 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1438 }
1439 else
1440 {
1441 if (flags.base_after_vec && ! flags.max_after_vec)
1442 {
1443 max_addr += align_fuzz (max_lab, insn, 0, 0);
1444 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1445 }
1446 else
1447 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1448 }
1449 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1450 max_addr - rel_addr,
1451 body));
1452#if !defined(READONLY_DATA_SECTION) || defined(JUMP_TABLES_IN_TEXT_SECTION)
1453 insn_lengths[uid]
1454 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1455 insn_current_address += insn_lengths[uid];
1456 if (insn_lengths[uid] != old_length)
1457 something_changed = 1;
1458#endif
1459 continue;
33f7f353 1460 }
5e75ef4a
JL
1461#endif /* CASE_VECTOR_SHORTEN_MODE */
1462
1463 if (! (varying_length[uid]))
3cf2715d
DE
1464 {
1465 insn_current_address += insn_lengths[uid];
1466 continue;
1467 }
1468 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1469 {
1470 int i;
1471
1472 body = PATTERN (insn);
1473 new_length = 0;
1474 for (i = 0; i < XVECLEN (body, 0); i++)
1475 {
1476 rtx inner_insn = XVECEXP (body, 0, i);
1477 int inner_uid = INSN_UID (inner_insn);
1478 int inner_length;
1479
1480 insn_addresses[inner_uid] = insn_current_address;
1481
1482 /* insn_current_length returns 0 for insns with a
1483 non-varying length. */
1484 if (! varying_length[inner_uid])
1485 inner_length = insn_lengths[inner_uid];
1486 else
1487 inner_length = insn_current_length (inner_insn);
1488
1489 if (inner_length != insn_lengths[inner_uid])
1490 {
1491 insn_lengths[inner_uid] = inner_length;
1492 something_changed = 1;
1493 }
1494 insn_current_address += insn_lengths[inner_uid];
1495 new_length += inner_length;
1496 }
1497 }
1498 else
1499 {
1500 new_length = insn_current_length (insn);
1501 insn_current_address += new_length;
1502 }
1503
3cf2715d
DE
1504#ifdef ADJUST_INSN_LENGTH
1505 /* If needed, do any adjustment. */
1506 tmp_length = new_length;
1507 ADJUST_INSN_LENGTH (insn, new_length);
1508 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1509#endif
1510
1511 if (new_length != insn_lengths[uid])
1512 {
1513 insn_lengths[uid] = new_length;
1514 something_changed = 1;
1515 }
1516 }
bb4aaf18
TG
1517 /* For a non-optimizing compile, do only a single pass. */
1518 if (!optimize)
1519 break;
3cf2715d 1520 }
fc470718
R
1521
1522 free (varying_length);
1523
3cf2715d
DE
1524#endif /* HAVE_ATTR_length */
1525}
1526
1527#ifdef HAVE_ATTR_length
1528/* Given the body of an INSN known to be generated by an ASM statement, return
1529 the number of machine instructions likely to be generated for this insn.
1530 This is used to compute its length. */
1531
1532static int
1533asm_insn_count (body)
1534 rtx body;
1535{
1536 char *template;
1537 int count = 1;
1538
5d0930ea
DE
1539 if (GET_CODE (body) == ASM_INPUT)
1540 template = XSTR (body, 0);
1541 else
1542 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1543 NULL_PTR, NULL_PTR);
1544
1545 for ( ; *template; template++)
3cf2715d
DE
1546 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1547 count++;
1548
1549 return count;
1550}
1551#endif
1552\f
1553/* Output assembler code for the start of a function,
1554 and initialize some of the variables in this file
1555 for the new function. The label for the function and associated
1556 assembler pseudo-ops have already been output in `assemble_start_function'.
1557
1558 FIRST is the first insn of the rtl for the function being compiled.
1559 FILE is the file to write assembler code to.
1560 OPTIMIZE is nonzero if we should eliminate redundant
1561 test and compare insns. */
1562
1563void
1564final_start_function (first, file, optimize)
1565 rtx first;
1566 FILE *file;
1567 int optimize;
1568{
1569 block_depth = 0;
1570
1571 this_is_asm_operands = 0;
1572
1573#ifdef NON_SAVING_SETJMP
1574 /* A function that calls setjmp should save and restore all the
1575 call-saved registers on a system where longjmp clobbers them. */
1576 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1577 {
1578 int i;
1579
1580 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1581 if (!call_used_regs[i] && !call_fixed_regs[i])
1582 regs_ever_live[i] = 1;
1583 }
1584#endif
1585
1586 /* Initial line number is supposed to be output
1587 before the function's prologue and label
1588 so that the function's address will not appear to be
1589 in the last statement of the preceding function. */
1590 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
5fad6898
RK
1591 last_linenum = high_block_linenum = high_function_linenum
1592 = NOTE_LINE_NUMBER (first);
eac40081 1593
c5cec899 1594#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
d291dd49 1595 /* Output DWARF definition of the function. */
0021b564 1596 if (dwarf2out_do_frame ())
9a666dda 1597 dwarf2out_begin_prologue ();
d291dd49
JM
1598#endif
1599
5fad6898
RK
1600 /* For SDB and XCOFF, the function beginning must be marked between
1601 the function label and the prologue. We always need this, even when
3c734272 1602 -g1 was used. Defer on MIPS systems so that parameter descriptions
0f41302f 1603 follow function entry. */
3c734272 1604#if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
5fad6898
RK
1605 if (write_symbols == SDB_DEBUG)
1606 sdbout_begin_function (last_linenum);
1607 else
2e2bbce2 1608#endif
3cf2715d 1609#ifdef XCOFF_DEBUGGING_INFO
5fad6898
RK
1610 if (write_symbols == XCOFF_DEBUG)
1611 xcoffout_begin_function (file, last_linenum);
1612 else
3cf2715d 1613#endif
5fad6898
RK
1614 /* But only output line number for other debug info types if -g2
1615 or better. */
1616 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1617 output_source_line (file, first);
3cf2715d
DE
1618
1619#ifdef LEAF_REG_REMAP
1620 if (leaf_function)
1621 leaf_renumber_regs (first);
1622#endif
1623
1624 /* The Sun386i and perhaps other machines don't work right
1625 if the profiling code comes after the prologue. */
1626#ifdef PROFILE_BEFORE_PROLOGUE
1627 if (profile_flag)
1628 profile_function (file);
1629#endif /* PROFILE_BEFORE_PROLOGUE */
1630
0021b564
JM
1631#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1632 if (dwarf2out_do_frame ())
1633 dwarf2out_frame_debug (NULL_RTX);
1634#endif
1635
3cf2715d
DE
1636#ifdef FUNCTION_PROLOGUE
1637 /* First output the function prologue: code to set up the stack frame. */
1638 FUNCTION_PROLOGUE (file, get_frame_size ());
1639#endif
1640
1641#if defined (SDB_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
1642 if (write_symbols == SDB_DEBUG || write_symbols == XCOFF_DEBUG)
1643 next_block_index = 1;
1644#endif
1645
1646 /* If the machine represents the prologue as RTL, the profiling code must
1647 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1648#ifdef HAVE_prologue
1649 if (! HAVE_prologue)
1650#endif
1651 profile_after_prologue (file);
1652
1653 profile_label_no++;
1654
1655 /* If we are doing basic block profiling, remember a printable version
1656 of the function name. */
1657 if (profile_block_flag)
1658 {
db3cf6fb
MS
1659 bb_func_label_num
1660 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
3cf2715d
DE
1661 }
1662}
1663
1664static void
1665profile_after_prologue (file)
1666 FILE *file;
1667{
1668#ifdef FUNCTION_BLOCK_PROFILER
1669 if (profile_block_flag)
1670 {
47431dff 1671 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
3cf2715d
DE
1672 }
1673#endif /* FUNCTION_BLOCK_PROFILER */
1674
1675#ifndef PROFILE_BEFORE_PROLOGUE
1676 if (profile_flag)
1677 profile_function (file);
1678#endif /* not PROFILE_BEFORE_PROLOGUE */
1679}
1680
1681static void
1682profile_function (file)
1683 FILE *file;
1684{
9e2f9a7f 1685 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
b729186a
JL
1686#if defined(ASM_OUTPUT_REG_PUSH)
1687#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
3cf2715d 1688 int sval = current_function_returns_struct;
b729186a
JL
1689#endif
1690#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
3cf2715d 1691 int cxt = current_function_needs_context;
b729186a
JL
1692#endif
1693#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d
DE
1694
1695 data_section ();
1696 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1697 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
9e2f9a7f 1698 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
3cf2715d 1699
499df339 1700 function_section (current_function_decl);
3cf2715d 1701
65ed39df 1702#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1703 if (sval)
1704 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1705#else
65ed39df 1706#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1707 if (sval)
51723711
KG
1708 {
1709 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1710 }
3cf2715d
DE
1711#endif
1712#endif
1713
65ed39df 1714#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1715 if (cxt)
1716 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1717#else
65ed39df 1718#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1719 if (cxt)
51723711
KG
1720 {
1721 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1722 }
3cf2715d
DE
1723#endif
1724#endif
3cf2715d
DE
1725
1726 FUNCTION_PROFILER (file, profile_label_no);
1727
65ed39df 1728#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1729 if (cxt)
1730 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1731#else
65ed39df 1732#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1733 if (cxt)
51723711
KG
1734 {
1735 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1736 }
3cf2715d
DE
1737#endif
1738#endif
3cf2715d 1739
65ed39df 1740#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1741 if (sval)
1742 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1743#else
65ed39df 1744#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1745 if (sval)
51723711
KG
1746 {
1747 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1748 }
3cf2715d
DE
1749#endif
1750#endif
1751}
1752
1753/* Output assembler code for the end of a function.
1754 For clarity, args are same as those of `final_start_function'
1755 even though not all of them are needed. */
1756
1757void
1758final_end_function (first, file, optimize)
1759 rtx first;
1760 FILE *file;
1761 int optimize;
1762{
1763 if (app_on)
1764 {
51723711 1765 fputs (ASM_APP_OFF, file);
3cf2715d
DE
1766 app_on = 0;
1767 }
1768
1769#ifdef SDB_DEBUGGING_INFO
1770 if (write_symbols == SDB_DEBUG)
eac40081 1771 sdbout_end_function (high_function_linenum);
3cf2715d
DE
1772#endif
1773
1774#ifdef DWARF_DEBUGGING_INFO
1775 if (write_symbols == DWARF_DEBUG)
1776 dwarfout_end_function ();
1777#endif
1778
1779#ifdef XCOFF_DEBUGGING_INFO
1780 if (write_symbols == XCOFF_DEBUG)
eac40081 1781 xcoffout_end_function (file, high_function_linenum);
3cf2715d
DE
1782#endif
1783
1784#ifdef FUNCTION_EPILOGUE
1785 /* Finally, output the function epilogue:
1786 code to restore the stack frame and return to the caller. */
1787 FUNCTION_EPILOGUE (file, get_frame_size ());
1788#endif
1789
1790#ifdef SDB_DEBUGGING_INFO
1791 if (write_symbols == SDB_DEBUG)
1792 sdbout_end_epilogue ();
1793#endif
1794
1795#ifdef DWARF_DEBUGGING_INFO
1796 if (write_symbols == DWARF_DEBUG)
1797 dwarfout_end_epilogue ();
1798#endif
1799
c5cec899 1800#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
0021b564 1801 if (dwarf2out_do_frame ())
9a666dda
JM
1802 dwarf2out_end_epilogue ();
1803#endif
1804
3cf2715d
DE
1805#ifdef XCOFF_DEBUGGING_INFO
1806 if (write_symbols == XCOFF_DEBUG)
1807 xcoffout_end_epilogue (file);
1808#endif
1809
1810 bb_func_label_num = -1; /* not in function, nuke label # */
1811
1812 /* If FUNCTION_EPILOGUE is not defined, then the function body
1813 itself contains return instructions wherever needed. */
1814}
1815\f
1816/* Add a block to the linked list that remembers the current line/file/function
1817 for basic block profiling. Emit the label in front of the basic block and
1818 the instructions that increment the count field. */
1819
1820static void
1821add_bb (file)
1822 FILE *file;
1823{
1824 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1825
1826 /* Add basic block to linked list. */
1827 ptr->next = 0;
1828 ptr->line_num = last_linenum;
1829 ptr->file_label_num = bb_file_label_num;
1830 ptr->func_label_num = bb_func_label_num;
1831 *bb_tail = ptr;
1832 bb_tail = &ptr->next;
1833
1834 /* Enable the table of basic-block use counts
1835 to point at the code it applies to. */
1836 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1837
1838 /* Before first insn of this basic block, increment the
1839 count of times it was entered. */
1840#ifdef BLOCK_PROFILER
1841 BLOCK_PROFILER (file, count_basic_blocks);
9e2f9a7f
DE
1842#endif
1843#ifdef HAVE_cc0
3cf2715d
DE
1844 CC_STATUS_INIT;
1845#endif
1846
1847 new_block = 0;
1848 count_basic_blocks++;
1849}
1850
1851/* Add a string to be used for basic block profiling. */
1852
1853static int
1854add_bb_string (string, perm_p)
1855 char *string;
1856 int perm_p;
1857{
1858 int len;
1859 struct bb_str *ptr = 0;
1860
1861 if (!string)
1862 {
1863 string = "<unknown>";
1864 perm_p = TRUE;
1865 }
1866
1867 /* Allocate a new string if the current string isn't permanent. If
1868 the string is permanent search for the same string in other
1869 allocations. */
1870
1871 len = strlen (string) + 1;
1872 if (!perm_p)
1873 {
1874 char *p = (char *) permalloc (len);
1875 bcopy (string, p, len);
1876 string = p;
1877 }
1878 else
0f41302f 1879 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
3cf2715d
DE
1880 if (ptr->string == string)
1881 break;
1882
1883 /* Allocate a new string block if we need to. */
1884 if (!ptr)
1885 {
1886 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1887 ptr->next = 0;
1888 ptr->length = len;
1889 ptr->label_num = sbb_label_num++;
1890 ptr->string = string;
1891 *sbb_tail = ptr;
1892 sbb_tail = &ptr->next;
1893 }
1894
1895 return ptr->label_num;
1896}
1897
1898\f
1899/* Output assembler code for some insns: all or part of a function.
1900 For description of args, see `final_start_function', above.
1901
1902 PRESCAN is 1 if we are not really outputting,
1903 just scanning as if we were outputting.
1904 Prescanning deletes and rearranges insns just like ordinary output.
1905 PRESCAN is -2 if we are outputting after having prescanned.
1906 In this case, don't try to delete or rearrange insns
1907 because that has already been done.
1908 Prescanning is done only on certain machines. */
1909
1910void
1911final (first, file, optimize, prescan)
1912 rtx first;
1913 FILE *file;
1914 int optimize;
1915 int prescan;
1916{
1917 register rtx insn;
1918 int max_line = 0;
a8c3510c 1919 int max_uid = 0;
3cf2715d
DE
1920
1921 last_ignored_compare = 0;
1922 new_block = 1;
1923
3d195391
MS
1924 check_exception_handler_labels ();
1925
3cf2715d
DE
1926 /* Make a map indicating which line numbers appear in this function.
1927 When producing SDB debugging info, delete troublesome line number
1928 notes from inlined functions in other files as well as duplicate
1929 line number notes. */
1930#ifdef SDB_DEBUGGING_INFO
1931 if (write_symbols == SDB_DEBUG)
1932 {
1933 rtx last = 0;
1934 for (insn = first; insn; insn = NEXT_INSN (insn))
1935 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1936 {
1937 if ((RTX_INTEGRATED_P (insn)
1938 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1939 || (last != 0
1940 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1941 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1942 {
1943 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1944 NOTE_SOURCE_FILE (insn) = 0;
1945 continue;
1946 }
1947 last = insn;
1948 if (NOTE_LINE_NUMBER (insn) > max_line)
1949 max_line = NOTE_LINE_NUMBER (insn);
1950 }
1951 }
1952 else
1953#endif
1954 {
1955 for (insn = first; insn; insn = NEXT_INSN (insn))
1956 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1957 max_line = NOTE_LINE_NUMBER (insn);
1958 }
1959
1960 line_note_exists = (char *) oballoc (max_line + 1);
1961 bzero (line_note_exists, max_line + 1);
1962
1963 for (insn = first; insn; insn = NEXT_INSN (insn))
a8c3510c
AM
1964 {
1965 if (INSN_UID (insn) > max_uid) /* find largest UID */
1966 max_uid = INSN_UID (insn);
1967 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1968 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1969 }
1970
1971 /* Initialize insn_eh_region table if eh is being used. */
1972
1973 init_insn_eh_region (first, max_uid);
3cf2715d
DE
1974
1975 init_recog ();
1976
1977 CC_STATUS_INIT;
1978
1979 /* Output the insns. */
1980 for (insn = NEXT_INSN (first); insn;)
2f16edb1
TG
1981 {
1982#ifdef HAVE_ATTR_length
1983 insn_current_address = insn_addresses[INSN_UID (insn)];
1984#endif
1985 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1986 }
3cf2715d
DE
1987
1988 /* Do basic-block profiling here
1989 if the last insn was a conditional branch. */
1990 if (profile_block_flag && new_block)
1991 add_bb (file);
a8c3510c
AM
1992
1993 free_insn_eh_region ();
3cf2715d
DE
1994}
1995\f
1996/* The final scan for one insn, INSN.
1997 Args are same as in `final', except that INSN
1998 is the insn being scanned.
1999 Value returned is the next insn to be scanned.
2000
2001 NOPEEPHOLES is the flag to disallow peephole processing (currently
2002 used for within delayed branch sequence output). */
2003
2004rtx
2005final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2006 rtx insn;
2007 FILE *file;
2008 int optimize;
2009 int prescan;
2010 int nopeepholes;
2011{
2012 register int i;
90ca38bb
MM
2013#ifdef HAVE_cc0
2014 rtx set;
2015#endif
2016
3cf2715d
DE
2017 insn_counter++;
2018
2019 /* Ignore deleted insns. These can occur when we split insns (due to a
2020 template of "#") while not optimizing. */
2021 if (INSN_DELETED_P (insn))
2022 return NEXT_INSN (insn);
2023
2024 switch (GET_CODE (insn))
2025 {
2026 case NOTE:
2027 if (prescan > 0)
2028 break;
2029
2030 /* Align the beginning of a loop, for higher speed
2031 on certain machines. */
2032
fc470718
R
2033 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2034 break; /* This used to depend on optimize, but that was bogus. */
3cf2715d
DE
2035 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2036 break;
2037
9ad8a5f0
MS
2038 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
2039 && ! exceptions_via_longjmp)
3d195391
MS
2040 {
2041 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_BLOCK_NUMBER (insn));
9a0d1e1b 2042#ifndef NEW_EH_MODEL
3d195391 2043 add_eh_table_entry (NOTE_BLOCK_NUMBER (insn));
9a0d1e1b 2044#endif
3d195391
MS
2045#ifdef ASM_OUTPUT_EH_REGION_BEG
2046 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_BLOCK_NUMBER (insn));
2047#endif
2048 break;
2049 }
2050
9ad8a5f0
MS
2051 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END
2052 && ! exceptions_via_longjmp)
3d195391
MS
2053 {
2054 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_BLOCK_NUMBER (insn));
9a0d1e1b
AM
2055#ifdef NEW_EH_MODEL
2056 add_eh_table_entry (NOTE_BLOCK_NUMBER (insn));
2057#endif
3d195391
MS
2058#ifdef ASM_OUTPUT_EH_REGION_END
2059 ASM_OUTPUT_EH_REGION_END (file, NOTE_BLOCK_NUMBER (insn));
2060#endif
2061 break;
2062 }
2063
3cf2715d
DE
2064 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_PROLOGUE_END)
2065 {
2066#ifdef FUNCTION_END_PROLOGUE
2067 FUNCTION_END_PROLOGUE (file);
2068#endif
2069 profile_after_prologue (file);
2070 break;
2071 }
2072
2073#ifdef FUNCTION_BEGIN_EPILOGUE
2074 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
2075 {
2076 FUNCTION_BEGIN_EPILOGUE (file);
2077 break;
2078 }
2079#endif
2080
2081 if (write_symbols == NO_DEBUG)
2082 break;
2083 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2084 {
3c734272
RK
2085#if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2086 /* MIPS stabs require the parameter descriptions to be after the
0f41302f 2087 function entry point rather than before. */
3c734272
RK
2088 if (write_symbols == SDB_DEBUG)
2089 sdbout_begin_function (last_linenum);
2090 else
2091#endif
3cf2715d 2092#ifdef DWARF_DEBUGGING_INFO
2e2bbce2
RK
2093 /* This outputs a marker where the function body starts, so it
2094 must be after the prologue. */
3cf2715d
DE
2095 if (write_symbols == DWARF_DEBUG)
2096 dwarfout_begin_function ();
2097#endif
2098 break;
2099 }
2100 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2101 break; /* An insn that was "deleted" */
2102 if (app_on)
2103 {
51723711 2104 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2105 app_on = 0;
2106 }
2107 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2108 && (debug_info_level == DINFO_LEVEL_NORMAL
2109 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2110 || write_symbols == DWARF_DEBUG
9a666dda 2111 || write_symbols == DWARF2_DEBUG))
3cf2715d
DE
2112 {
2113 /* Beginning of a symbol-block. Assign it a sequence number
2114 and push the number onto the stack PENDING_BLOCKS. */
2115
2116 if (block_depth == max_block_depth)
2117 {
2118 /* PENDING_BLOCKS is full; make it longer. */
2119 max_block_depth *= 2;
2120 pending_blocks
2121 = (int *) xrealloc (pending_blocks,
2122 max_block_depth * sizeof (int));
2123 }
2124 pending_blocks[block_depth++] = next_block_index;
2125
eac40081
RK
2126 high_block_linenum = last_linenum;
2127
3cf2715d
DE
2128 /* Output debugging info about the symbol-block beginning. */
2129
2130#ifdef SDB_DEBUGGING_INFO
2131 if (write_symbols == SDB_DEBUG)
2132 sdbout_begin_block (file, last_linenum, next_block_index);
2133#endif
2134#ifdef XCOFF_DEBUGGING_INFO
2135 if (write_symbols == XCOFF_DEBUG)
2136 xcoffout_begin_block (file, last_linenum, next_block_index);
2137#endif
2138#ifdef DBX_DEBUGGING_INFO
2139 if (write_symbols == DBX_DEBUG)
2140 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", next_block_index);
2141#endif
2142#ifdef DWARF_DEBUGGING_INFO
7aecea25 2143 if (write_symbols == DWARF_DEBUG)
3cf2715d
DE
2144 dwarfout_begin_block (next_block_index);
2145#endif
9a666dda
JM
2146#ifdef DWARF2_DEBUGGING_INFO
2147 if (write_symbols == DWARF2_DEBUG)
2148 dwarf2out_begin_block (next_block_index);
2149#endif
3cf2715d
DE
2150
2151 next_block_index++;
2152 }
2153 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2154 && (debug_info_level == DINFO_LEVEL_NORMAL
2155 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2156 || write_symbols == DWARF_DEBUG
9a666dda 2157 || write_symbols == DWARF2_DEBUG))
3cf2715d
DE
2158 {
2159 /* End of a symbol-block. Pop its sequence number off
2160 PENDING_BLOCKS and output debugging info based on that. */
2161
2162 --block_depth;
2163
2164#ifdef XCOFF_DEBUGGING_INFO
2165 if (write_symbols == XCOFF_DEBUG && block_depth >= 0)
eac40081
RK
2166 xcoffout_end_block (file, high_block_linenum,
2167 pending_blocks[block_depth]);
3cf2715d
DE
2168#endif
2169#ifdef DBX_DEBUGGING_INFO
2170 if (write_symbols == DBX_DEBUG && block_depth >= 0)
2171 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE",
2172 pending_blocks[block_depth]);
2173#endif
2174#ifdef SDB_DEBUGGING_INFO
2175 if (write_symbols == SDB_DEBUG && block_depth >= 0)
eac40081
RK
2176 sdbout_end_block (file, high_block_linenum,
2177 pending_blocks[block_depth]);
3cf2715d
DE
2178#endif
2179#ifdef DWARF_DEBUGGING_INFO
7aecea25 2180 if (write_symbols == DWARF_DEBUG && block_depth >= 0)
3cf2715d 2181 dwarfout_end_block (pending_blocks[block_depth]);
9a666dda
JM
2182#endif
2183#ifdef DWARF2_DEBUGGING_INFO
2184 if (write_symbols == DWARF2_DEBUG && block_depth >= 0)
2185 dwarf2out_end_block (pending_blocks[block_depth]);
3cf2715d
DE
2186#endif
2187 }
2188 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED_LABEL
2189 && (debug_info_level == DINFO_LEVEL_NORMAL
2190 || debug_info_level == DINFO_LEVEL_VERBOSE))
2191 {
2192#ifdef DWARF_DEBUGGING_INFO
2193 if (write_symbols == DWARF_DEBUG)
2194 dwarfout_label (insn);
9a666dda
JM
2195#endif
2196#ifdef DWARF2_DEBUGGING_INFO
2197 if (write_symbols == DWARF2_DEBUG)
2198 dwarf2out_label (insn);
3cf2715d
DE
2199#endif
2200 }
2201 else if (NOTE_LINE_NUMBER (insn) > 0)
2202 /* This note is a line-number. */
2203 {
2204 register rtx note;
2205
2206#if 0 /* This is what we used to do. */
2207 output_source_line (file, insn);
2208#endif
2209 int note_after = 0;
2210
2211 /* If there is anything real after this note,
2212 output it. If another line note follows, omit this one. */
2213 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2214 {
2215 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2216 break;
2217 /* These types of notes can be significant
2218 so make sure the preceding line number stays. */
2219 else if (GET_CODE (note) == NOTE
2220 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2221 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2222 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2223 break;
2224 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2225 {
2226 /* Another line note follows; we can delete this note
2227 if no intervening line numbers have notes elsewhere. */
2228 int num;
2229 for (num = NOTE_LINE_NUMBER (insn) + 1;
2230 num < NOTE_LINE_NUMBER (note);
2231 num++)
2232 if (line_note_exists[num])
2233 break;
2234
2235 if (num >= NOTE_LINE_NUMBER (note))
2236 note_after = 1;
2237 break;
2238 }
2239 }
2240
2241 /* Output this line note
2242 if it is the first or the last line note in a row. */
2243 if (!note_after)
2244 output_source_line (file, insn);
2245 }
2246 break;
2247
2248 case BARRIER:
6020d360
JM
2249#if defined (DWARF2_UNWIND_INFO) && !defined (ACCUMULATE_OUTGOING_ARGS)
2250 /* If we push arguments, we need to check all insns for stack
2251 adjustments. */
2252 if (dwarf2out_do_frame ())
2253 dwarf2out_frame_debug (insn);
3cf2715d
DE
2254#endif
2255 break;
2256
2257 case CODE_LABEL:
1dd8faa8
R
2258 /* The target port might emit labels in the output function for
2259 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2260 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2261 {
2262 int align = LABEL_TO_ALIGNMENT (insn);
9e423e6d 2263 int max_skip = LABEL_TO_MAX_SKIP (insn);
fc470718 2264
1dd8faa8 2265 if (align && NEXT_INSN (insn))
9e423e6d
JW
2266#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2267 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2268#else
de7987a6 2269 ASM_OUTPUT_ALIGN (file, align);
9e423e6d 2270#endif
de7987a6 2271 }
3cf2715d
DE
2272 CC_STATUS_INIT;
2273 if (prescan > 0)
2274 break;
2275 new_block = 1;
03ffa171
RK
2276
2277#ifdef FINAL_PRESCAN_LABEL
2278 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2279#endif
2280
3cf2715d
DE
2281#ifdef SDB_DEBUGGING_INFO
2282 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2283 sdbout_label (insn);
2284#endif
2285#ifdef DWARF_DEBUGGING_INFO
2286 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2287 dwarfout_label (insn);
9a666dda
JM
2288#endif
2289#ifdef DWARF2_DEBUGGING_INFO
2290 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2291 dwarf2out_label (insn);
3cf2715d
DE
2292#endif
2293 if (app_on)
2294 {
51723711 2295 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2296 app_on = 0;
2297 }
2298 if (NEXT_INSN (insn) != 0
2299 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2300 {
2301 rtx nextbody = PATTERN (NEXT_INSN (insn));
2302
2303 /* If this label is followed by a jump-table,
2304 make sure we put the label in the read-only section. Also
2305 possibly write the label and jump table together. */
2306
2307 if (GET_CODE (nextbody) == ADDR_VEC
2308 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2309 {
2310#ifndef JUMP_TABLES_IN_TEXT_SECTION
2311 readonly_data_section ();
2312#ifdef READONLY_DATA_SECTION
2313 ASM_OUTPUT_ALIGN (file,
2314 exact_log2 (BIGGEST_ALIGNMENT
2315 / BITS_PER_UNIT));
2316#endif /* READONLY_DATA_SECTION */
2317#else /* JUMP_TABLES_IN_TEXT_SECTION */
4d1065ed 2318 function_section (current_function_decl);
3cf2715d
DE
2319#endif /* JUMP_TABLES_IN_TEXT_SECTION */
2320#ifdef ASM_OUTPUT_CASE_LABEL
2321 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2322 NEXT_INSN (insn));
2323#else
2324 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2325#endif
2326 break;
2327 }
2328 }
2329
2330 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2331 break;
2332
2333 default:
2334 {
51723711 2335 register rtx body = PATTERN (insn);
3cf2715d
DE
2336 int insn_code_number;
2337 char *template;
b729186a 2338#ifdef HAVE_cc0
3cf2715d 2339 rtx note;
b729186a 2340#endif
3cf2715d
DE
2341
2342 /* An INSN, JUMP_INSN or CALL_INSN.
2343 First check for special kinds that recog doesn't recognize. */
2344
2345 if (GET_CODE (body) == USE /* These are just declarations */
2346 || GET_CODE (body) == CLOBBER)
2347 break;
2348
2349#ifdef HAVE_cc0
2350 /* If there is a REG_CC_SETTER note on this insn, it means that
2351 the setting of the condition code was done in the delay slot
2352 of the insn that branched here. So recover the cc status
2353 from the insn that set it. */
2354
2355 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2356 if (note)
2357 {
2358 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2359 cc_prev_status = cc_status;
2360 }
2361#endif
2362
2363 /* Detect insns that are really jump-tables
2364 and output them as such. */
2365
2366 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2367 {
2368 register int vlen, idx;
2369
2370 if (prescan > 0)
2371 break;
2372
2373 if (app_on)
2374 {
51723711 2375 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2376 app_on = 0;
2377 }
2378
2379 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2380 for (idx = 0; idx < vlen; idx++)
2381 {
2382 if (GET_CODE (body) == ADDR_VEC)
2383 {
2384#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2385 ASM_OUTPUT_ADDR_VEC_ELT
2386 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2387#else
2388 abort ();
2389#endif
2390 }
2391 else
2392 {
2393#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2394 ASM_OUTPUT_ADDR_DIFF_ELT
2395 (file,
33f7f353 2396 body,
3cf2715d
DE
2397 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2398 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2399#else
2400 abort ();
2401#endif
2402 }
2403 }
2404#ifdef ASM_OUTPUT_CASE_END
2405 ASM_OUTPUT_CASE_END (file,
2406 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2407 insn);
2408#endif
2409
4d1065ed 2410 function_section (current_function_decl);
3cf2715d
DE
2411
2412 break;
2413 }
2414
2415 /* Do basic-block profiling when we reach a new block.
2416 Done here to avoid jump tables. */
2417 if (profile_block_flag && new_block)
2418 add_bb (file);
2419
2420 if (GET_CODE (body) == ASM_INPUT)
2421 {
2422 /* There's no telling what that did to the condition codes. */
2423 CC_STATUS_INIT;
2424 if (prescan > 0)
2425 break;
2426 if (! app_on)
2427 {
51723711 2428 fputs (ASM_APP_ON, file);
3cf2715d
DE
2429 app_on = 1;
2430 }
2431 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2432 break;
2433 }
2434
2435 /* Detect `asm' construct with operands. */
2436 if (asm_noperands (body) >= 0)
2437 {
22bf4422 2438 unsigned int noperands = asm_noperands (body);
3cf2715d
DE
2439 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2440 char *string;
2441
2442 /* There's no telling what that did to the condition codes. */
2443 CC_STATUS_INIT;
2444 if (prescan > 0)
2445 break;
2446
2447 if (! app_on)
2448 {
51723711 2449 fputs (ASM_APP_ON, file);
3cf2715d
DE
2450 app_on = 1;
2451 }
2452
2453 /* Get out the operand values. */
2454 string = decode_asm_operands (body, ops, NULL_PTR,
2455 NULL_PTR, NULL_PTR);
2456 /* Inhibit aborts on what would otherwise be compiler bugs. */
2457 insn_noperands = noperands;
2458 this_is_asm_operands = insn;
2459
2460 /* Output the insn using them. */
2461 output_asm_insn (string, ops);
2462 this_is_asm_operands = 0;
2463 break;
2464 }
2465
2466 if (prescan <= 0 && app_on)
2467 {
51723711 2468 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2469 app_on = 0;
2470 }
2471
2472 if (GET_CODE (body) == SEQUENCE)
2473 {
2474 /* A delayed-branch sequence */
2475 register int i;
2476 rtx next;
2477
2478 if (prescan > 0)
2479 break;
2480 final_sequence = body;
2481
2482 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2483 force the restoration of a comparison that was previously
2484 thought unnecessary. If that happens, cancel this sequence
2485 and cause that insn to be restored. */
2486
2487 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2488 if (next != XVECEXP (body, 0, 1))
2489 {
2490 final_sequence = 0;
2491 return next;
2492 }
2493
2494 for (i = 1; i < XVECLEN (body, 0); i++)
c7eee2df
RK
2495 {
2496 rtx insn = XVECEXP (body, 0, i);
2497 rtx next = NEXT_INSN (insn);
2498 /* We loop in case any instruction in a delay slot gets
2499 split. */
2500 do
2501 insn = final_scan_insn (insn, file, 0, prescan, 1);
2502 while (insn != next);
2503 }
3cf2715d
DE
2504#ifdef DBR_OUTPUT_SEQEND
2505 DBR_OUTPUT_SEQEND (file);
2506#endif
2507 final_sequence = 0;
2508
2509 /* If the insn requiring the delay slot was a CALL_INSN, the
2510 insns in the delay slot are actually executed before the
2511 called function. Hence we don't preserve any CC-setting
2512 actions in these insns and the CC must be marked as being
2513 clobbered by the function. */
2514 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
b729186a
JL
2515 {
2516 CC_STATUS_INIT;
2517 }
3cf2715d
DE
2518
2519 /* Following a conditional branch sequence, we have a new basic
2520 block. */
2521 if (profile_block_flag)
2522 {
2523 rtx insn = XVECEXP (body, 0, 0);
2524 rtx body = PATTERN (insn);
2525
2526 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2527 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2528 || (GET_CODE (insn) == JUMP_INSN
2529 && GET_CODE (body) == PARALLEL
2530 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2531 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2532 new_block = 1;
2533 }
2534 break;
2535 }
2536
2537 /* We have a real machine instruction as rtl. */
2538
2539 body = PATTERN (insn);
2540
2541#ifdef HAVE_cc0
b88c92cc
RK
2542 set = single_set(insn);
2543
3cf2715d
DE
2544 /* Check for redundant test and compare instructions
2545 (when the condition codes are already set up as desired).
2546 This is done only when optimizing; if not optimizing,
2547 it should be possible for the user to alter a variable
2548 with the debugger in between statements
2549 and the next statement should reexamine the variable
2550 to compute the condition codes. */
2551
30f5e9f5 2552 if (optimize)
3cf2715d 2553 {
b88c92cc 2554#if 0
30f5e9f5 2555 rtx set = single_set(insn);
b88c92cc 2556#endif
30f5e9f5
RK
2557
2558 if (set
2559 && GET_CODE (SET_DEST (set)) == CC0
2560 && insn != last_ignored_compare)
3cf2715d 2561 {
30f5e9f5
RK
2562 if (GET_CODE (SET_SRC (set)) == SUBREG)
2563 SET_SRC (set) = alter_subreg (SET_SRC (set));
2564 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2565 {
2566 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2567 XEXP (SET_SRC (set), 0)
2568 = alter_subreg (XEXP (SET_SRC (set), 0));
2569 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2570 XEXP (SET_SRC (set), 1)
2571 = alter_subreg (XEXP (SET_SRC (set), 1));
2572 }
2573 if ((cc_status.value1 != 0
2574 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2575 || (cc_status.value2 != 0
2576 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
3cf2715d 2577 {
30f5e9f5
RK
2578 /* Don't delete insn if it has an addressing side-effect. */
2579 if (! FIND_REG_INC_NOTE (insn, 0)
2580 /* or if anything in it is volatile. */
2581 && ! volatile_refs_p (PATTERN (insn)))
2582 {
2583 /* We don't really delete the insn; just ignore it. */
2584 last_ignored_compare = insn;
2585 break;
2586 }
3cf2715d
DE
2587 }
2588 }
2589 }
2590#endif
2591
2592 /* Following a conditional branch, we have a new basic block.
2593 But if we are inside a sequence, the new block starts after the
2594 last insn of the sequence. */
2595 if (profile_block_flag && final_sequence == 0
2596 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2597 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2598 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2599 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2600 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2601 new_block = 1;
2602
2603#ifndef STACK_REGS
2604 /* Don't bother outputting obvious no-ops, even without -O.
2605 This optimization is fast and doesn't interfere with debugging.
2606 Don't do this if the insn is in a delay slot, since this
2607 will cause an improper number of delay insns to be written. */
2608 if (final_sequence == 0
2609 && prescan >= 0
2610 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2611 && GET_CODE (SET_SRC (body)) == REG
2612 && GET_CODE (SET_DEST (body)) == REG
2613 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2614 break;
2615#endif
2616
2617#ifdef HAVE_cc0
2618 /* If this is a conditional branch, maybe modify it
2619 if the cc's are in a nonstandard state
2620 so that it accomplishes the same thing that it would
2621 do straightforwardly if the cc's were set up normally. */
2622
2623 if (cc_status.flags != 0
2624 && GET_CODE (insn) == JUMP_INSN
2625 && GET_CODE (body) == SET
2626 && SET_DEST (body) == pc_rtx
2627 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
de2b56f9 2628 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
fff752ad 2629 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
3cf2715d
DE
2630 /* This is done during prescan; it is not done again
2631 in final scan when prescan has been done. */
2632 && prescan >= 0)
2633 {
2634 /* This function may alter the contents of its argument
2635 and clear some of the cc_status.flags bits.
2636 It may also return 1 meaning condition now always true
2637 or -1 meaning condition now always false
2638 or 2 meaning condition nontrivial but altered. */
2639 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2640 /* If condition now has fixed value, replace the IF_THEN_ELSE
2641 with its then-operand or its else-operand. */
2642 if (result == 1)
2643 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2644 if (result == -1)
2645 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2646
2647 /* The jump is now either unconditional or a no-op.
2648 If it has become a no-op, don't try to output it.
2649 (It would not be recognized.) */
2650 if (SET_SRC (body) == pc_rtx)
2651 {
2652 PUT_CODE (insn, NOTE);
2653 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2654 NOTE_SOURCE_FILE (insn) = 0;
2655 break;
2656 }
2657 else if (GET_CODE (SET_SRC (body)) == RETURN)
2658 /* Replace (set (pc) (return)) with (return). */
2659 PATTERN (insn) = body = SET_SRC (body);
2660
2661 /* Rerecognize the instruction if it has changed. */
2662 if (result != 0)
2663 INSN_CODE (insn) = -1;
2664 }
2665
2666 /* Make same adjustments to instructions that examine the
462da2af
SC
2667 condition codes without jumping and instructions that
2668 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2669
2670 if (cc_status.flags != 0
b88c92cc 2671 && set != 0)
3cf2715d 2672 {
462da2af
SC
2673 rtx cond_rtx, then_rtx, else_rtx;
2674
2675 if (GET_CODE (insn) != JUMP_INSN
b88c92cc 2676 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2677 {
b88c92cc
RK
2678 cond_rtx = XEXP (SET_SRC (set), 0);
2679 then_rtx = XEXP (SET_SRC (set), 1);
2680 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2681 }
2682 else
2683 {
b88c92cc 2684 cond_rtx = SET_SRC (set);
462da2af
SC
2685 then_rtx = const_true_rtx;
2686 else_rtx = const0_rtx;
2687 }
2688
2689 switch (GET_CODE (cond_rtx))
3cf2715d
DE
2690 {
2691 case GTU:
2692 case GT:
2693 case LTU:
2694 case LT:
2695 case GEU:
2696 case GE:
2697 case LEU:
2698 case LE:
2699 case EQ:
2700 case NE:
2701 {
2702 register int result;
462da2af 2703 if (XEXP (cond_rtx, 0) != cc0_rtx)
3cf2715d 2704 break;
462da2af 2705 result = alter_cond (cond_rtx);
3cf2715d 2706 if (result == 1)
b88c92cc 2707 validate_change (insn, &SET_SRC (set), then_rtx, 0);
3cf2715d 2708 else if (result == -1)
b88c92cc 2709 validate_change (insn, &SET_SRC (set), else_rtx, 0);
3cf2715d
DE
2710 else if (result == 2)
2711 INSN_CODE (insn) = -1;
b88c92cc 2712 if (SET_DEST (set) == SET_SRC (set))
462da2af
SC
2713 {
2714 PUT_CODE (insn, NOTE);
2715 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2716 NOTE_SOURCE_FILE (insn) = 0;
462da2af 2717 }
3cf2715d 2718 }
e9a25f70
JL
2719 break;
2720
2721 default:
2722 break;
3cf2715d
DE
2723 }
2724 }
462da2af 2725
3cf2715d
DE
2726#endif
2727
2728 /* Do machine-specific peephole optimizations if desired. */
2729
2730 if (optimize && !flag_no_peephole && !nopeepholes)
2731 {
2732 rtx next = peephole (insn);
2733 /* When peepholing, if there were notes within the peephole,
2734 emit them before the peephole. */
2735 if (next != 0 && next != NEXT_INSN (insn))
2736 {
2737 rtx prev = PREV_INSN (insn);
2738 rtx note;
2739
2740 for (note = NEXT_INSN (insn); note != next;
2741 note = NEXT_INSN (note))
2742 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2743
2744 /* In case this is prescan, put the notes
2745 in proper position for later rescan. */
2746 note = NEXT_INSN (insn);
2747 PREV_INSN (note) = prev;
2748 NEXT_INSN (prev) = note;
2749 NEXT_INSN (PREV_INSN (next)) = insn;
2750 PREV_INSN (insn) = PREV_INSN (next);
2751 NEXT_INSN (insn) = next;
2752 PREV_INSN (next) = insn;
2753 }
2754
2755 /* PEEPHOLE might have changed this. */
2756 body = PATTERN (insn);
2757 }
2758
2759 /* Try to recognize the instruction.
2760 If successful, verify that the operands satisfy the
2761 constraints for the instruction. Crash if they don't,
2762 since `reload' should have changed them so that they do. */
2763
2764 insn_code_number = recog_memoized (insn);
2765 insn_extract (insn);
2766 for (i = 0; i < insn_n_operands[insn_code_number]; i++)
2767 {
2768 if (GET_CODE (recog_operand[i]) == SUBREG)
2769 recog_operand[i] = alter_subreg (recog_operand[i]);
2770 else if (GET_CODE (recog_operand[i]) == PLUS
2771 || GET_CODE (recog_operand[i]) == MULT)
2772 recog_operand[i] = walk_alter_subreg (recog_operand[i]);
2773 }
2774
2775 for (i = 0; i < insn_n_dups[insn_code_number]; i++)
2776 {
2777 if (GET_CODE (*recog_dup_loc[i]) == SUBREG)
2778 *recog_dup_loc[i] = alter_subreg (*recog_dup_loc[i]);
2779 else if (GET_CODE (*recog_dup_loc[i]) == PLUS
2780 || GET_CODE (*recog_dup_loc[i]) == MULT)
2781 *recog_dup_loc[i] = walk_alter_subreg (*recog_dup_loc[i]);
2782 }
2783
2784#ifdef REGISTER_CONSTRAINTS
2785 if (! constrain_operands (insn_code_number, 1))
2786 fatal_insn_not_found (insn);
2787#endif
2788
2789 /* Some target machines need to prescan each insn before
2790 it is output. */
2791
2792#ifdef FINAL_PRESCAN_INSN
2793 FINAL_PRESCAN_INSN (insn, recog_operand,
2794 insn_n_operands[insn_code_number]);
2795#endif
2796
2797#ifdef HAVE_cc0
2798 cc_prev_status = cc_status;
2799
2800 /* Update `cc_status' for this instruction.
2801 The instruction's output routine may change it further.
2802 If the output routine for a jump insn needs to depend
2803 on the cc status, it should look at cc_prev_status. */
2804
2805 NOTICE_UPDATE_CC (body, insn);
2806#endif
2807
2808 debug_insn = insn;
2809
b57d9225
JM
2810#if defined (DWARF2_UNWIND_INFO) && !defined (ACCUMULATE_OUTGOING_ARGS)
2811 /* If we push arguments, we want to know where the calls are. */
2812 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2813 dwarf2out_frame_debug (insn);
2814#endif
2815
3cf2715d
DE
2816 /* If the proper template needs to be chosen by some C code,
2817 run that code and get the real template. */
2818
2819 template = insn_template[insn_code_number];
2820 if (template == 0)
2821 {
2822 template = (*insn_outfun[insn_code_number]) (recog_operand, insn);
2823
2824 /* If the C code returns 0, it means that it is a jump insn
2825 which follows a deleted test insn, and that test insn
2826 needs to be reinserted. */
2827 if (template == 0)
2828 {
2829 if (prev_nonnote_insn (insn) != last_ignored_compare)
2830 abort ();
2831 new_block = 0;
2832 return prev_nonnote_insn (insn);
2833 }
2834 }
2835
2836 /* If the template is the string "#", it means that this insn must
2837 be split. */
2838 if (template[0] == '#' && template[1] == '\0')
2839 {
2840 rtx new = try_split (body, insn, 0);
2841
2842 /* If we didn't split the insn, go away. */
2843 if (new == insn && PATTERN (new) == body)
cf879efa 2844 fatal_insn ("Could not split insn", insn);
3cf2715d 2845
3d14e82f
JW
2846#ifdef HAVE_ATTR_length
2847 /* This instruction should have been split in shorten_branches,
2848 to ensure that we would have valid length info for the
2849 splitees. */
2850 abort ();
2851#endif
2852
3cf2715d
DE
2853 new_block = 0;
2854 return new;
2855 }
2856
2857 if (prescan > 0)
2858 break;
2859
2860 /* Output assembler code from the template. */
2861
2862 output_asm_insn (template, recog_operand);
2863
0021b564
JM
2864#if defined (DWARF2_UNWIND_INFO)
2865#if !defined (ACCUMULATE_OUTGOING_ARGS)
2866 /* If we push arguments, we need to check all insns for stack
2867 adjustments. */
b57d9225 2868 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
0021b564
JM
2869 dwarf2out_frame_debug (insn);
2870#else
2871#if defined (HAVE_prologue)
469ac993
JM
2872 /* If this insn is part of the prologue, emit DWARF v2
2873 call frame info. */
0021b564 2874 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
469ac993
JM
2875 dwarf2out_frame_debug (insn);
2876#endif
0021b564
JM
2877#endif
2878#endif
469ac993 2879
3cf2715d
DE
2880#if 0
2881 /* It's not at all clear why we did this and doing so interferes
2882 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2883 with this out. */
2884
2885 /* Mark this insn as having been output. */
2886 INSN_DELETED_P (insn) = 1;
2887#endif
2888
2889 debug_insn = 0;
2890 }
2891 }
2892 return NEXT_INSN (insn);
2893}
2894\f
2895/* Output debugging info to the assembler file FILE
2896 based on the NOTE-insn INSN, assumed to be a line number. */
2897
2898static void
2899output_source_line (file, insn)
2900 FILE *file;
2901 rtx insn;
2902{
2903 register char *filename = NOTE_SOURCE_FILE (insn);
2904
2905 /* Remember filename for basic block profiling.
2906 Filenames are allocated on the permanent obstack
2907 or are passed in ARGV, so we don't have to save
2908 the string. */
2909
2910 if (profile_block_flag && last_filename != filename)
2911 bb_file_label_num = add_bb_string (filename, TRUE);
2912
2913 last_filename = filename;
2914 last_linenum = NOTE_LINE_NUMBER (insn);
eac40081
RK
2915 high_block_linenum = MAX (last_linenum, high_block_linenum);
2916 high_function_linenum = MAX (last_linenum, high_function_linenum);
3cf2715d
DE
2917
2918 if (write_symbols != NO_DEBUG)
2919 {
2920#ifdef SDB_DEBUGGING_INFO
2921 if (write_symbols == SDB_DEBUG
2922#if 0 /* People like having line numbers even in wrong file! */
2923 /* COFF can't handle multiple source files--lose, lose. */
2924 && !strcmp (filename, main_input_filename)
2925#endif
2926 /* COFF relative line numbers must be positive. */
2927 && last_linenum > sdb_begin_function_line)
2928 {
2929#ifdef ASM_OUTPUT_SOURCE_LINE
2930 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
2931#else
2932 fprintf (file, "\t.ln\t%d\n",
2933 ((sdb_begin_function_line > -1)
2934 ? last_linenum - sdb_begin_function_line : 1));
2935#endif
2936 }
2937#endif
2938
2939#if defined (DBX_DEBUGGING_INFO)
2940 if (write_symbols == DBX_DEBUG)
2941 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
2942#endif
2943
2944#if defined (XCOFF_DEBUGGING_INFO)
2945 if (write_symbols == XCOFF_DEBUG)
2946 xcoffout_source_line (file, filename, insn);
2947#endif
2948
2949#ifdef DWARF_DEBUGGING_INFO
2950 if (write_symbols == DWARF_DEBUG)
2951 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
2952#endif
9a666dda
JM
2953
2954#ifdef DWARF2_DEBUGGING_INFO
2955 if (write_symbols == DWARF2_DEBUG)
2956 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
2957#endif
3cf2715d
DE
2958 }
2959}
2960\f
2961/* If X is a SUBREG, replace it with a REG or a MEM,
2962 based on the thing it is a subreg of. */
2963
2964rtx
2965alter_subreg (x)
2966 register rtx x;
2967{
2968 register rtx y = SUBREG_REG (x);
f5963e61 2969
3cf2715d
DE
2970 if (GET_CODE (y) == SUBREG)
2971 y = alter_subreg (y);
2972
f5963e61
JL
2973 /* If reload is operating, we may be replacing inside this SUBREG.
2974 Check for that and make a new one if so. */
2975 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
2976 x = copy_rtx (x);
2977
3cf2715d
DE
2978 if (GET_CODE (y) == REG)
2979 {
ce4d78eb
RH
2980 /* If the word size is larger than the size of this register,
2981 adjust the register number to compensate. */
2982 /* ??? Note that this just catches stragglers created by/for
2983 integrate. It would be better if we either caught these
2984 earlier, or kept _all_ subregs until now and eliminate
2985 gen_lowpart and friends. */
2986
3cf2715d 2987 PUT_CODE (x, REG);
ce4d78eb
RH
2988#ifdef ALTER_HARD_SUBREG
2989 REGNO (x) = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
2990 GET_MODE (y), REGNO (y));
2991#else
3cf2715d 2992 REGNO (x) = REGNO (y) + SUBREG_WORD (x);
ce4d78eb 2993#endif
3cf2715d
DE
2994 }
2995 else if (GET_CODE (y) == MEM)
2996 {
2997 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
f76b9db2
ILT
2998 if (BYTES_BIG_ENDIAN)
2999 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3000 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3cf2715d
DE
3001 PUT_CODE (x, MEM);
3002 MEM_VOLATILE_P (x) = MEM_VOLATILE_P (y);
3003 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3004 }
3005
3006 return x;
3007}
3008
3009/* Do alter_subreg on all the SUBREGs contained in X. */
3010
3011static rtx
3012walk_alter_subreg (x)
3013 rtx x;
3014{
3015 switch (GET_CODE (x))
3016 {
3017 case PLUS:
3018 case MULT:
3019 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3020 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3021 break;
3022
3023 case MEM:
3024 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3025 break;
3026
3027 case SUBREG:
3028 return alter_subreg (x);
e9a25f70
JL
3029
3030 default:
3031 break;
3cf2715d
DE
3032 }
3033
3034 return x;
3035}
3036\f
3037#ifdef HAVE_cc0
3038
3039/* Given BODY, the body of a jump instruction, alter the jump condition
3040 as required by the bits that are set in cc_status.flags.
3041 Not all of the bits there can be handled at this level in all cases.
3042
3043 The value is normally 0.
3044 1 means that the condition has become always true.
3045 -1 means that the condition has become always false.
3046 2 means that COND has been altered. */
3047
3048static int
3049alter_cond (cond)
3050 register rtx cond;
3051{
3052 int value = 0;
3053
3054 if (cc_status.flags & CC_REVERSED)
3055 {
3056 value = 2;
3057 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3058 }
3059
3060 if (cc_status.flags & CC_INVERTED)
3061 {
3062 value = 2;
3063 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3064 }
3065
3066 if (cc_status.flags & CC_NOT_POSITIVE)
3067 switch (GET_CODE (cond))
3068 {
3069 case LE:
3070 case LEU:
3071 case GEU:
3072 /* Jump becomes unconditional. */
3073 return 1;
3074
3075 case GT:
3076 case GTU:
3077 case LTU:
3078 /* Jump becomes no-op. */
3079 return -1;
3080
3081 case GE:
3082 PUT_CODE (cond, EQ);
3083 value = 2;
3084 break;
3085
3086 case LT:
3087 PUT_CODE (cond, NE);
3088 value = 2;
3089 break;
e9a25f70
JL
3090
3091 default:
3092 break;
3cf2715d
DE
3093 }
3094
3095 if (cc_status.flags & CC_NOT_NEGATIVE)
3096 switch (GET_CODE (cond))
3097 {
3098 case GE:
3099 case GEU:
3100 /* Jump becomes unconditional. */
3101 return 1;
3102
3103 case LT:
3104 case LTU:
3105 /* Jump becomes no-op. */
3106 return -1;
3107
3108 case LE:
3109 case LEU:
3110 PUT_CODE (cond, EQ);
3111 value = 2;
3112 break;
3113
3114 case GT:
3115 case GTU:
3116 PUT_CODE (cond, NE);
3117 value = 2;
3118 break;
e9a25f70
JL
3119
3120 default:
3121 break;
3cf2715d
DE
3122 }
3123
3124 if (cc_status.flags & CC_NO_OVERFLOW)
3125 switch (GET_CODE (cond))
3126 {
3127 case GEU:
3128 /* Jump becomes unconditional. */
3129 return 1;
3130
3131 case LEU:
3132 PUT_CODE (cond, EQ);
3133 value = 2;
3134 break;
3135
3136 case GTU:
3137 PUT_CODE (cond, NE);
3138 value = 2;
3139 break;
3140
3141 case LTU:
3142 /* Jump becomes no-op. */
3143 return -1;
e9a25f70
JL
3144
3145 default:
3146 break;
3cf2715d
DE
3147 }
3148
3149 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3150 switch (GET_CODE (cond))
3151 {
e9a25f70 3152 default:
3cf2715d
DE
3153 abort ();
3154
3155 case NE:
3156 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3157 value = 2;
3158 break;
3159
3160 case EQ:
3161 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3162 value = 2;
3163 break;
3164 }
3165
3166 if (cc_status.flags & CC_NOT_SIGNED)
3167 /* The flags are valid if signed condition operators are converted
3168 to unsigned. */
3169 switch (GET_CODE (cond))
3170 {
3171 case LE:
3172 PUT_CODE (cond, LEU);
3173 value = 2;
3174 break;
3175
3176 case LT:
3177 PUT_CODE (cond, LTU);
3178 value = 2;
3179 break;
3180
3181 case GT:
3182 PUT_CODE (cond, GTU);
3183 value = 2;
3184 break;
3185
3186 case GE:
3187 PUT_CODE (cond, GEU);
3188 value = 2;
3189 break;
e9a25f70
JL
3190
3191 default:
3192 break;
3cf2715d
DE
3193 }
3194
3195 return value;
3196}
3197#endif
3198\f
3199/* Report inconsistency between the assembler template and the operands.
3200 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3201
3202void
3203output_operand_lossage (str)
3204 char *str;
3205{
3206 if (this_is_asm_operands)
3207 error_for_asm (this_is_asm_operands, "invalid `asm': %s", str);
3208 else
31bfbf1f 3209 fatal ("Internal compiler error, output_operand_lossage `%s'", str);
3cf2715d
DE
3210}
3211\f
3212/* Output of assembler code from a template, and its subroutines. */
3213
3214/* Output text from TEMPLATE to the assembler output file,
3215 obeying %-directions to substitute operands taken from
3216 the vector OPERANDS.
3217
3218 %N (for N a digit) means print operand N in usual manner.
3219 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3220 and print the label name with no punctuation.
3221 %cN means require operand N to be a constant
3222 and print the constant expression with no punctuation.
3223 %aN means expect operand N to be a memory address
3224 (not a memory reference!) and print a reference
3225 to that address.
3226 %nN means expect operand N to be a constant
3227 and print a constant expression for minus the value
3228 of the operand, with no other punctuation. */
3229
cb649530
RK
3230static void
3231output_asm_name ()
3232{
3233 if (flag_print_asm_name)
3234 {
3235 /* Annotate the assembly with a comment describing the pattern and
3236 alternative used. */
3237 if (debug_insn)
3238 {
3239 register int num = INSN_CODE (debug_insn);
3240 fprintf (asm_out_file, " %s %d %s",
3241 ASM_COMMENT_START, INSN_UID (debug_insn), insn_name[num]);
3242 if (insn_n_alternatives[num] > 1)
3243 fprintf (asm_out_file, "/%d", which_alternative + 1);
3244
3245 /* Clear this so only the first assembler insn
3246 of any rtl insn will get the special comment for -dp. */
3247 debug_insn = 0;
3248 }
3249 }
3250}
3251
3cf2715d
DE
3252void
3253output_asm_insn (template, operands)
3254 char *template;
3255 rtx *operands;
3256{
3257 register char *p;
b729186a 3258 register int c;
3cf2715d
DE
3259
3260 /* An insn may return a null string template
3261 in a case where no assembler code is needed. */
3262 if (*template == 0)
3263 return;
3264
3265 p = template;
3266 putc ('\t', asm_out_file);
3267
3268#ifdef ASM_OUTPUT_OPCODE
3269 ASM_OUTPUT_OPCODE (asm_out_file, p);
3270#endif
3271
b729186a 3272 while ((c = *p++))
3cf2715d
DE
3273 switch (c)
3274 {
3cf2715d 3275 case '\n':
cb649530 3276 output_asm_name ();
3cf2715d 3277 putc (c, asm_out_file);
cb649530 3278#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3279 while ((c = *p) == '\t')
3280 {
3281 putc (c, asm_out_file);
3282 p++;
3283 }
3284 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3285#endif
cb649530 3286 break;
3cf2715d
DE
3287
3288#ifdef ASSEMBLER_DIALECT
3289 case '{':
b729186a
JL
3290 {
3291 register int i;
3292
3293 /* If we want the first dialect, do nothing. Otherwise, skip
3294 DIALECT_NUMBER of strings ending with '|'. */
3295 for (i = 0; i < dialect_number; i++)
3296 {
3297 while (*p && *p++ != '|')
3298 ;
3cf2715d 3299
b729186a
JL
3300 if (*p == '|')
3301 p++;
3302 }
3303 }
3cf2715d
DE
3304 break;
3305
3306 case '|':
3307 /* Skip to close brace. */
3308 while (*p && *p++ != '}')
3309 ;
3310 break;
3311
3312 case '}':
3313 break;
3314#endif
3315
3316 case '%':
3317 /* %% outputs a single %. */
3318 if (*p == '%')
3319 {
3320 p++;
3321 putc (c, asm_out_file);
3322 }
3323 /* %= outputs a number which is unique to each insn in the entire
3324 compilation. This is useful for making local labels that are
3325 referred to more than once in a given insn. */
3326 else if (*p == '=')
3327 {
3328 p++;
3329 fprintf (asm_out_file, "%d", insn_counter);
3330 }
3331 /* % followed by a letter and some digits
3332 outputs an operand in a special way depending on the letter.
3333 Letters `acln' are implemented directly.
3334 Other letters are passed to `output_operand' so that
3335 the PRINT_OPERAND macro can define them. */
3336 else if ((*p >= 'a' && *p <= 'z')
3337 || (*p >= 'A' && *p <= 'Z'))
3338 {
3339 int letter = *p++;
3340 c = atoi (p);
3341
3342 if (! (*p >= '0' && *p <= '9'))
3343 output_operand_lossage ("operand number missing after %-letter");
22bf4422 3344 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3345 output_operand_lossage ("operand number out of range");
3346 else if (letter == 'l')
3347 output_asm_label (operands[c]);
3348 else if (letter == 'a')
3349 output_address (operands[c]);
3350 else if (letter == 'c')
3351 {
3352 if (CONSTANT_ADDRESS_P (operands[c]))
3353 output_addr_const (asm_out_file, operands[c]);
3354 else
3355 output_operand (operands[c], 'c');
3356 }
3357 else if (letter == 'n')
3358 {
3359 if (GET_CODE (operands[c]) == CONST_INT)
21e3a81b 3360 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3cf2715d
DE
3361 - INTVAL (operands[c]));
3362 else
3363 {
3364 putc ('-', asm_out_file);
3365 output_addr_const (asm_out_file, operands[c]);
3366 }
3367 }
3368 else
3369 output_operand (operands[c], letter);
3370
3371 while ((c = *p) >= '0' && c <= '9') p++;
3372 }
3373 /* % followed by a digit outputs an operand the default way. */
3374 else if (*p >= '0' && *p <= '9')
3375 {
3376 c = atoi (p);
22bf4422 3377 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3378 output_operand_lossage ("operand number out of range");
3379 else
3380 output_operand (operands[c], 0);
3381 while ((c = *p) >= '0' && c <= '9') p++;
3382 }
3383 /* % followed by punctuation: output something for that
3384 punctuation character alone, with no operand.
3385 The PRINT_OPERAND macro decides what is actually done. */
3386#ifdef PRINT_OPERAND_PUNCT_VALID_P
3387 else if (PRINT_OPERAND_PUNCT_VALID_P (*p))
3388 output_operand (NULL_RTX, *p++);
3389#endif
3390 else
3391 output_operand_lossage ("invalid %%-code");
3392 break;
3393
3394 default:
3395 putc (c, asm_out_file);
3396 }
3397
cb649530 3398 output_asm_name ();
3cf2715d
DE
3399
3400 putc ('\n', asm_out_file);
3401}
3402\f
3403/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3404
3405void
3406output_asm_label (x)
3407 rtx x;
3408{
3409 char buf[256];
3410
3411 if (GET_CODE (x) == LABEL_REF)
3412 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3413 else if (GET_CODE (x) == CODE_LABEL)
3414 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3415 else
3416 output_operand_lossage ("`%l' operand isn't a label");
3417
3418 assemble_name (asm_out_file, buf);
3419}
3420
3421/* Print operand X using machine-dependent assembler syntax.
3422 The macro PRINT_OPERAND is defined just to control this function.
3423 CODE is a non-digit that preceded the operand-number in the % spec,
3424 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3425 between the % and the digits.
3426 When CODE is a non-letter, X is 0.
3427
3428 The meanings of the letters are machine-dependent and controlled
3429 by PRINT_OPERAND. */
3430
3431static void
3432output_operand (x, code)
3433 rtx x;
3434 int code;
3435{
3436 if (x && GET_CODE (x) == SUBREG)
3437 x = alter_subreg (x);
3438
3439 /* If X is a pseudo-register, abort now rather than writing trash to the
3440 assembler file. */
3441
3442 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3443 abort ();
3444
3445 PRINT_OPERAND (asm_out_file, x, code);
3446}
3447
3448/* Print a memory reference operand for address X
3449 using machine-dependent assembler syntax.
3450 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3451
3452void
3453output_address (x)
3454 rtx x;
3455{
3456 walk_alter_subreg (x);
3457 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3458}
3459\f
3460/* Print an integer constant expression in assembler syntax.
3461 Addition and subtraction are the only arithmetic
3462 that may appear in these expressions. */
3463
3464void
3465output_addr_const (file, x)
3466 FILE *file;
3467 rtx x;
3468{
3469 char buf[256];
3470
3471 restart:
3472 switch (GET_CODE (x))
3473 {
3474 case PC:
3475 if (flag_pic)
3476 putc ('.', file);
3477 else
3478 abort ();
3479 break;
3480
3481 case SYMBOL_REF:
3482 assemble_name (file, XSTR (x, 0));
3483 break;
3484
3485 case LABEL_REF:
3486 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3487 assemble_name (file, buf);
3488 break;
3489
3490 case CODE_LABEL:
3491 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3492 assemble_name (file, buf);
3493 break;
3494
3495 case CONST_INT:
21e3a81b 3496 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
3497 break;
3498
3499 case CONST:
3500 /* This used to output parentheses around the expression,
3501 but that does not work on the 386 (either ATT or BSD assembler). */
3502 output_addr_const (file, XEXP (x, 0));
3503 break;
3504
3505 case CONST_DOUBLE:
3506 if (GET_MODE (x) == VOIDmode)
3507 {
3508 /* We can use %d if the number is one word and positive. */
3509 if (CONST_DOUBLE_HIGH (x))
21e3a81b 3510 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3cf2715d
DE
3511 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3512 else if (CONST_DOUBLE_LOW (x) < 0)
21e3a81b 3513 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3cf2715d 3514 else
21e3a81b 3515 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
3516 }
3517 else
3518 /* We can't handle floating point constants;
3519 PRINT_OPERAND must handle them. */
3520 output_operand_lossage ("floating constant misused");
3521 break;
3522
3523 case PLUS:
3524 /* Some assemblers need integer constants to appear last (eg masm). */
3525 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3526 {
3527 output_addr_const (file, XEXP (x, 1));
3528 if (INTVAL (XEXP (x, 0)) >= 0)
3529 fprintf (file, "+");
3530 output_addr_const (file, XEXP (x, 0));
3531 }
3532 else
3533 {
3534 output_addr_const (file, XEXP (x, 0));
3535 if (INTVAL (XEXP (x, 1)) >= 0)
3536 fprintf (file, "+");
3537 output_addr_const (file, XEXP (x, 1));
3538 }
3539 break;
3540
3541 case MINUS:
3542 /* Avoid outputting things like x-x or x+5-x,
3543 since some assemblers can't handle that. */
3544 x = simplify_subtraction (x);
3545 if (GET_CODE (x) != MINUS)
3546 goto restart;
3547
3548 output_addr_const (file, XEXP (x, 0));
3549 fprintf (file, "-");
3550 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3551 && INTVAL (XEXP (x, 1)) < 0)
3552 {
3553 fprintf (file, ASM_OPEN_PAREN);
3554 output_addr_const (file, XEXP (x, 1));
3555 fprintf (file, ASM_CLOSE_PAREN);
3556 }
3557 else
3558 output_addr_const (file, XEXP (x, 1));
3559 break;
3560
3561 case ZERO_EXTEND:
3562 case SIGN_EXTEND:
3563 output_addr_const (file, XEXP (x, 0));
3564 break;
3565
3566 default:
3567 output_operand_lossage ("invalid expression as operand");
3568 }
3569}
3570\f
3571/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3572 %R prints the value of REGISTER_PREFIX.
3573 %L prints the value of LOCAL_LABEL_PREFIX.
3574 %U prints the value of USER_LABEL_PREFIX.
3575 %I prints the value of IMMEDIATE_PREFIX.
3576 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3577 Also supported are %d, %x, %s, %e, %f, %g and %%.
3578
3579 We handle alternate assembler dialects here, just like output_asm_insn. */
3580
3581void
3582asm_fprintf VPROTO((FILE *file, char *p, ...))
3583{
3584#ifndef __STDC__
3585 FILE *file;
3586 char *p;
3587#endif
3588 va_list argptr;
3589 char buf[10];
3590 char *q, c;
3cf2715d
DE
3591
3592 VA_START (argptr, p);
3593
3594#ifndef __STDC__
0f41302f
MS
3595 file = va_arg (argptr, FILE *);
3596 p = va_arg (argptr, char *);
3cf2715d
DE
3597#endif
3598
3599 buf[0] = '%';
3600
b729186a 3601 while ((c = *p++))
3cf2715d
DE
3602 switch (c)
3603 {
3604#ifdef ASSEMBLER_DIALECT
3605 case '{':
b729186a
JL
3606 {
3607 int i;
3cf2715d 3608
b729186a
JL
3609 /* If we want the first dialect, do nothing. Otherwise, skip
3610 DIALECT_NUMBER of strings ending with '|'. */
3611 for (i = 0; i < dialect_number; i++)
3612 {
3613 while (*p && *p++ != '|')
3614 ;
3615
3616 if (*p == '|')
3617 p++;
3cf2715d 3618 }
b729186a 3619 }
3cf2715d
DE
3620 break;
3621
3622 case '|':
3623 /* Skip to close brace. */
3624 while (*p && *p++ != '}')
3625 ;
3626 break;
3627
3628 case '}':
3629 break;
3630#endif
3631
3632 case '%':
3633 c = *p++;
3634 q = &buf[1];
3635 while ((c >= '0' && c <= '9') || c == '.')
3636 {
3637 *q++ = c;
3638 c = *p++;
3639 }
3640 switch (c)
3641 {
3642 case '%':
3643 fprintf (file, "%%");
3644 break;
3645
3646 case 'd': case 'i': case 'u':
3647 case 'x': case 'p': case 'X':
3648 case 'o':
3649 *q++ = c;
3650 *q = 0;
3651 fprintf (file, buf, va_arg (argptr, int));
3652 break;
3653
3654 case 'w':
3655 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3656 but we do not check for those cases. It means that the value
3657 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3658
21e3a81b
RK
3659#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3660#else
3661#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3662 *q++ = 'l';
3663#else
3664 *q++ = 'l';
3cf2715d 3665 *q++ = 'l';
21e3a81b 3666#endif
3cf2715d
DE
3667#endif
3668
3669 *q++ = *p++;
3670 *q = 0;
3671 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3672 break;
3673
3674 case 'l':
3675 *q++ = c;
3676 *q++ = *p++;
3677 *q = 0;
3678 fprintf (file, buf, va_arg (argptr, long));
3679 break;
3680
3681 case 'e':
3682 case 'f':
3683 case 'g':
3684 *q++ = c;
3685 *q = 0;
3686 fprintf (file, buf, va_arg (argptr, double));
3687 break;
3688
3689 case 's':
3690 *q++ = c;
3691 *q = 0;
3692 fprintf (file, buf, va_arg (argptr, char *));
3693 break;
3694
3695 case 'O':
3696#ifdef ASM_OUTPUT_OPCODE
3697 ASM_OUTPUT_OPCODE (asm_out_file, p);
3698#endif
3699 break;
3700
3701 case 'R':
3702#ifdef REGISTER_PREFIX
3703 fprintf (file, "%s", REGISTER_PREFIX);
3704#endif
3705 break;
3706
3707 case 'I':
3708#ifdef IMMEDIATE_PREFIX
3709 fprintf (file, "%s", IMMEDIATE_PREFIX);
3710#endif
3711 break;
3712
3713 case 'L':
3714#ifdef LOCAL_LABEL_PREFIX
3715 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3716#endif
3717 break;
3718
3719 case 'U':
3720#ifdef USER_LABEL_PREFIX
3721 fprintf (file, "%s", USER_LABEL_PREFIX);
3722#endif
3723 break;
3724
3725 default:
3726 abort ();
3727 }
3728 break;
3729
3730 default:
3731 fputc (c, file);
3732 }
3733}
3734\f
3735/* Split up a CONST_DOUBLE or integer constant rtx
3736 into two rtx's for single words,
3737 storing in *FIRST the word that comes first in memory in the target
3738 and in *SECOND the other. */
3739
3740void
3741split_double (value, first, second)
3742 rtx value;
3743 rtx *first, *second;
3744{
3745 if (GET_CODE (value) == CONST_INT)
3746 {
5a1a6efd 3747 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
f76b9db2 3748 {
5a1a6efd 3749 /* In this case the CONST_INT holds both target words.
27eef9ce
JC
3750 Extract the bits from it into two word-sized pieces.
3751 Sign extend each half to HOST_WIDE_INT. */
5a1a6efd 3752 rtx low, high;
563c063f
MM
3753 /* On machines where HOST_BITS_PER_WIDE_INT == BITS_PER_WORD
3754 the shift below will cause a compiler warning, even though
3755 this code won't be executed. So put the shift amounts in
3756 variables to avoid the warning. */
3757 int rshift = HOST_BITS_PER_WIDE_INT - BITS_PER_WORD;
3758 int lshift = HOST_BITS_PER_WIDE_INT - 2 * BITS_PER_WORD;
3759
3760 low = GEN_INT ((INTVAL (value) << rshift) >> rshift);
3761 high = GEN_INT ((INTVAL (value) << lshift) >> rshift);
5a1a6efd
RK
3762 if (WORDS_BIG_ENDIAN)
3763 {
3764 *first = high;
3765 *second = low;
3766 }
3767 else
3768 {
3769 *first = low;
3770 *second = high;
3771 }
f76b9db2
ILT
3772 }
3773 else
3774 {
5a1a6efd
RK
3775 /* The rule for using CONST_INT for a wider mode
3776 is that we regard the value as signed.
3777 So sign-extend it. */
3778 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3779 if (WORDS_BIG_ENDIAN)
3780 {
3781 *first = high;
3782 *second = value;
3783 }
3784 else
3785 {
3786 *first = value;
3787 *second = high;
3788 }
f76b9db2 3789 }
3cf2715d
DE
3790 }
3791 else if (GET_CODE (value) != CONST_DOUBLE)
3792 {
f76b9db2
ILT
3793 if (WORDS_BIG_ENDIAN)
3794 {
3795 *first = const0_rtx;
3796 *second = value;
3797 }
3798 else
3799 {
3800 *first = value;
3801 *second = const0_rtx;
3802 }
3cf2715d
DE
3803 }
3804 else if (GET_MODE (value) == VOIDmode
3805 /* This is the old way we did CONST_DOUBLE integers. */
3806 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3807 {
3808 /* In an integer, the words are defined as most and least significant.
3809 So order them by the target's convention. */
f76b9db2
ILT
3810 if (WORDS_BIG_ENDIAN)
3811 {
3812 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3813 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3814 }
3815 else
3816 {
3817 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3818 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3819 }
3cf2715d
DE
3820 }
3821 else
3822 {
3823#ifdef REAL_ARITHMETIC
3824 REAL_VALUE_TYPE r; long l[2];
3825 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3826
3827 /* Note, this converts the REAL_VALUE_TYPE to the target's
3828 format, splits up the floating point double and outputs
3829 exactly 32 bits of it into each of l[0] and l[1] --
0f41302f 3830 not necessarily BITS_PER_WORD bits. */
3cf2715d
DE
3831 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3832
3833 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3834 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3835#else
3836 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3837 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3838 && ! flag_pretend_float)
3839 abort ();
3840
f76b9db2
ILT
3841 if (
3842#ifdef HOST_WORDS_BIG_ENDIAN
3843 WORDS_BIG_ENDIAN
3cf2715d 3844#else
f76b9db2 3845 ! WORDS_BIG_ENDIAN
3cf2715d 3846#endif
f76b9db2
ILT
3847 )
3848 {
3849 /* Host and target agree => no need to swap. */
3850 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3851 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3852 }
3853 else
3854 {
3855 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3856 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3857 }
3cf2715d
DE
3858#endif /* no REAL_ARITHMETIC */
3859 }
3860}
3861\f
3862/* Return nonzero if this function has no function calls. */
3863
3864int
3865leaf_function_p ()
3866{
3867 rtx insn;
3868
9e2f9a7f 3869 if (profile_flag || profile_block_flag || profile_arc_flag)
3cf2715d
DE
3870 return 0;
3871
3872 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3873 {
3874 if (GET_CODE (insn) == CALL_INSN)
3875 return 0;
3876 if (GET_CODE (insn) == INSN
3877 && GET_CODE (PATTERN (insn)) == SEQUENCE
3878 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN)
3879 return 0;
3880 }
3881 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
3882 {
3883 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN)
3884 return 0;
3885 if (GET_CODE (XEXP (insn, 0)) == INSN
3886 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
3887 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN)
3888 return 0;
3889 }
3890
3891 return 1;
3892}
3893
3894/* On some machines, a function with no call insns
3895 can run faster if it doesn't create its own register window.
3896 When output, the leaf function should use only the "output"
3897 registers. Ordinarily, the function would be compiled to use
3898 the "input" registers to find its arguments; it is a candidate
3899 for leaf treatment if it uses only the "input" registers.
3900 Leaf function treatment means renumbering so the function
3901 uses the "output" registers instead. */
3902
3903#ifdef LEAF_REGISTERS
3904
3905static char permitted_reg_in_leaf_functions[] = LEAF_REGISTERS;
3906
3907/* Return 1 if this function uses only the registers that can be
3908 safely renumbered. */
3909
3910int
3911only_leaf_regs_used ()
3912{
3913 int i;
3914
3915 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e5e809f4
JL
3916 if ((regs_ever_live[i] || global_regs[i])
3917 && ! permitted_reg_in_leaf_functions[i])
3918 return 0;
3919
3920 if (current_function_uses_pic_offset_table
3921 && pic_offset_table_rtx != 0
3922 && GET_CODE (pic_offset_table_rtx) == REG
3923 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3924 return 0;
3925
3cf2715d
DE
3926 return 1;
3927}
3928
3929/* Scan all instructions and renumber all registers into those
3930 available in leaf functions. */
3931
3932static void
3933leaf_renumber_regs (first)
3934 rtx first;
3935{
3936 rtx insn;
3937
3938 /* Renumber only the actual patterns.
3939 The reg-notes can contain frame pointer refs,
3940 and renumbering them could crash, and should not be needed. */
3941 for (insn = first; insn; insn = NEXT_INSN (insn))
3942 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3943 leaf_renumber_regs_insn (PATTERN (insn));
3944 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
3945 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
3946 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3947}
3948
3949/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3950 available in leaf functions. */
3951
3952void
3953leaf_renumber_regs_insn (in_rtx)
3954 register rtx in_rtx;
3955{
3956 register int i, j;
3957 register char *format_ptr;
3958
3959 if (in_rtx == 0)
3960 return;
3961
3962 /* Renumber all input-registers into output-registers.
3963 renumbered_regs would be 1 for an output-register;
3964 they */
3965
3966 if (GET_CODE (in_rtx) == REG)
3967 {
3968 int newreg;
3969
3970 /* Don't renumber the same reg twice. */
3971 if (in_rtx->used)
3972 return;
3973
3974 newreg = REGNO (in_rtx);
3975 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3976 to reach here as part of a REG_NOTE. */
3977 if (newreg >= FIRST_PSEUDO_REGISTER)
3978 {
3979 in_rtx->used = 1;
3980 return;
3981 }
3982 newreg = LEAF_REG_REMAP (newreg);
3983 if (newreg < 0)
3984 abort ();
3985 regs_ever_live[REGNO (in_rtx)] = 0;
3986 regs_ever_live[newreg] = 1;
3987 REGNO (in_rtx) = newreg;
3988 in_rtx->used = 1;
3989 }
3990
3991 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
3992 {
3993 /* Inside a SEQUENCE, we find insns.
3994 Renumber just the patterns of these insns,
3995 just as we do for the top-level insns. */
3996 leaf_renumber_regs_insn (PATTERN (in_rtx));
3997 return;
3998 }
3999
4000 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4001
4002 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4003 switch (*format_ptr++)
4004 {
4005 case 'e':
4006 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4007 break;
4008
4009 case 'E':
4010 if (NULL != XVEC (in_rtx, i))
4011 {
4012 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4013 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4014 }
4015 break;
4016
4017 case 'S':
4018 case 's':
4019 case '0':
4020 case 'i':
4021 case 'w':
4022 case 'n':
4023 case 'u':
4024 break;
4025
4026 default:
4027 abort ();
4028 }
4029}
4030#endif
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