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3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
3b708058
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2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
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4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
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19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
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21
22
23/* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly as assembler code by the macros FUNCTION_PROLOGUE and
46 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
47
48#include "config.h"
670ee920 49#include "system.h"
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50
51#include "tree.h"
52#include "rtl.h"
6baf1cc8 53#include "tm_p.h"
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54#include "regs.h"
55#include "insn-config.h"
56#include "insn-flags.h"
57#include "insn-attr.h"
58#include "insn-codes.h"
59#include "recog.h"
60#include "conditions.h"
61#include "flags.h"
62#include "real.h"
63#include "hard-reg-set.h"
64#include "defaults.h"
65#include "output.h"
3d195391 66#include "except.h"
49ad7cfa 67#include "function.h"
10f0ad3d 68#include "toplev.h"
d6f4ec51 69#include "reload.h"
ab87f8c8 70#include "intl.h"
be1bb652 71#include "basic-block.h"
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72
73/* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
74#if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
76ead72b 75#include "dbxout.h"
c7391272 76#if defined (USG) || !defined (HAVE_STAB_H)
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77#include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
78#else
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79#include <stab.h>
80#endif
81
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82#endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
83
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84#ifndef ACCUMULATE_OUTGOING_ARGS
85#define ACCUMULATE_OUTGOING_ARGS 0
86#endif
87
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88#ifdef XCOFF_DEBUGGING_INFO
89#include "xcoffout.h"
90#endif
91
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92#ifdef DWARF_DEBUGGING_INFO
93#include "dwarfout.h"
94#endif
95
96#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
97#include "dwarf2out.h"
98#endif
99
100#ifdef SDB_DEBUGGING_INFO
101#include "sdbout.h"
102#endif
103
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104/* .stabd code for line number. */
105#ifndef N_SLINE
106#define N_SLINE 0x44
107#endif
108
109/* .stabs code for included file name. */
110#ifndef N_SOL
111#define N_SOL 0x84
112#endif
113
114#ifndef INT_TYPE_SIZE
115#define INT_TYPE_SIZE BITS_PER_WORD
116#endif
117
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118#ifndef LONG_TYPE_SIZE
119#define LONG_TYPE_SIZE BITS_PER_WORD
120#endif
121
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122/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
123 null default for it to save conditionalization later. */
124#ifndef CC_STATUS_INIT
125#define CC_STATUS_INIT
126#endif
127
128/* How to start an assembler comment. */
129#ifndef ASM_COMMENT_START
130#define ASM_COMMENT_START ";#"
131#endif
132
133/* Is the given character a logical line separator for the assembler? */
134#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
135#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
136#endif
137
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138#ifndef JUMP_TABLES_IN_TEXT_SECTION
139#define JUMP_TABLES_IN_TEXT_SECTION 0
140#endif
141
3cf2715d 142/* Last insn processed by final_scan_insn. */
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143static rtx debug_insn;
144rtx current_output_insn;
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145
146/* Line number of last NOTE. */
147static int last_linenum;
148
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149/* Highest line number in current block. */
150static int high_block_linenum;
151
152/* Likewise for function. */
153static int high_function_linenum;
154
3cf2715d 155/* Filename of last NOTE. */
3cce094d 156static const char *last_filename;
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157
158/* Number of basic blocks seen so far;
159 used if profile_block_flag is set. */
160static int count_basic_blocks;
161
9e2f9a7f 162/* Number of instrumented arcs when profile_arc_flag is set. */
51891abe 163extern int count_instrumented_edges;
9e2f9a7f 164
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165extern int length_unit_log; /* This is defined in insn-attrtab.c. */
166
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167/* Nonzero while outputting an `asm' with operands.
168 This means that inconsistencies are the user's fault, so don't abort.
169 The precise value is the insn being output, to pass to error_for_asm. */
170static rtx this_is_asm_operands;
171
172/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 173static unsigned int insn_noperands;
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174
175/* Compare optimization flag. */
176
177static rtx last_ignored_compare = 0;
178
179/* Flag indicating this insn is the start of a new basic block. */
180
181static int new_block = 1;
182
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183/* Assign a unique number to each insn that is output.
184 This can be used to generate unique local labels. */
185
186static int insn_counter = 0;
187
188#ifdef HAVE_cc0
189/* This variable contains machine-dependent flags (defined in tm.h)
190 set and examined by output routines
191 that describe how to interpret the condition codes properly. */
192
193CC_STATUS cc_status;
194
195/* During output of an insn, this contains a copy of cc_status
196 from before the insn. */
197
198CC_STATUS cc_prev_status;
199#endif
200
201/* Indexed by hardware reg number, is 1 if that register is ever
202 used in the current function.
203
204 In life_analysis, or in stupid_life_analysis, this is set
205 up to record the hard regs used explicitly. Reload adds
206 in the hard regs used for holding pseudo regs. Final uses
207 it to generate the code in the function prologue and epilogue
208 to save and restore registers as needed. */
209
210char regs_ever_live[FIRST_PSEUDO_REGISTER];
211
212/* Nonzero means current function must be given a frame pointer.
213 Set in stmt.c if anything is allocated on the stack there.
214 Set in reload1.c if anything is allocated on the stack there. */
215
216int frame_pointer_needed;
217
218/* Assign unique numbers to labels generated for profiling. */
219
220int profile_label_no;
221
18c038b9 222/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
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223
224static int block_depth;
225
226/* Nonzero if have enabled APP processing of our assembler output. */
227
228static int app_on;
229
230/* If we are outputting an insn sequence, this contains the sequence rtx.
231 Zero otherwise. */
232
233rtx final_sequence;
234
235#ifdef ASSEMBLER_DIALECT
236
237/* Number of the assembler dialect to use, starting at 0. */
238static int dialect_number;
239#endif
240
241/* Indexed by line number, nonzero if there is a note for that line. */
242
243static char *line_note_exists;
244
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245#ifdef HAVE_conditional_execution
246/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
247rtx current_insn_predicate;
248#endif
249
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250/* Linked list to hold line numbers for each basic block. */
251
252struct bb_list {
253 struct bb_list *next; /* pointer to next basic block */
254 int line_num; /* line number */
255 int file_label_num; /* LPBC<n> label # for stored filename */
256 int func_label_num; /* LPBC<n> label # for stored function name */
257};
258
259static struct bb_list *bb_head = 0; /* Head of basic block list */
260static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
261static int bb_file_label_num = -1; /* Current label # for file */
262static int bb_func_label_num = -1; /* Current label # for func */
263
264/* Linked list to hold the strings for each file and function name output. */
265
266struct bb_str {
267 struct bb_str *next; /* pointer to next string */
9b3142b3 268 const char *string; /* string */
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269 int label_num; /* label number */
270 int length; /* string length */
271};
272
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273static struct bb_str *sbb_head = 0; /* Head of string list. */
274static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
275static int sbb_label_num = 0; /* Last label used */
276
1d300e19 277#ifdef HAVE_ATTR_length
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278static int asm_insn_count PARAMS ((rtx));
279#endif
280static void profile_function PARAMS ((FILE *));
281static void profile_after_prologue PARAMS ((FILE *));
282static void add_bb PARAMS ((FILE *));
283static int add_bb_string PARAMS ((const char *, int));
284static void output_source_line PARAMS ((FILE *, rtx));
285static rtx walk_alter_subreg PARAMS ((rtx));
286static void output_asm_name PARAMS ((void));
287static void output_operand PARAMS ((rtx, int));
e9a25f70 288#ifdef LEAF_REGISTERS
711d877c 289static void leaf_renumber_regs PARAMS ((rtx));
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290#endif
291#ifdef HAVE_cc0
711d877c 292static int alter_cond PARAMS ((rtx));
e9a25f70 293#endif
ca3075bd 294#ifndef ADDR_VEC_ALIGN
711d877c 295static int final_addr_vec_align PARAMS ((rtx));
ca3075bd 296#endif
7bdb32b9 297#ifdef HAVE_ATTR_length
711d877c 298static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
7bdb32b9 299#endif
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300\f
301/* Initialize data in final at the beginning of a compilation. */
302
303void
304init_final (filename)
6a651371 305 const char *filename ATTRIBUTE_UNUSED;
3cf2715d 306{
3cf2715d 307 app_on = 0;
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308 final_sequence = 0;
309
310#ifdef ASSEMBLER_DIALECT
311 dialect_number = ASSEMBLER_DIALECT;
312#endif
313}
314
315/* Called at end of source file,
316 to output the block-profiling table for this entire compilation. */
317
318void
319end_final (filename)
87e11268 320 const char *filename;
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321{
322 int i;
323
9e2f9a7f 324 if (profile_block_flag || profile_arc_flag)
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325 {
326 char name[20];
327 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
9e2f9a7f 328 int size, rounded;
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329 struct bb_list *ptr;
330 struct bb_str *sptr;
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331 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
332 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
333
334 if (profile_block_flag)
335 size = long_bytes * count_basic_blocks;
336 else
51891abe 337 size = long_bytes * count_instrumented_edges;
9e2f9a7f 338 rounded = size;
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339
340 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
341 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
342 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
343
344 data_section ();
345
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RK
346 /* Output the main header, of 11 words:
347 0: 1 if this file is initialized, else 0.
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348 1: address of file name (LPBX1).
349 2: address of table of counts (LPBX2).
350 3: number of counts in the table.
351 4: always 0, for compatibility with Sun.
352
353 The following are GNU extensions:
354
355 5: address of table of start addrs of basic blocks (LPBX3).
356 6: Number of bytes in this header.
357 7: address of table of function names (LPBX4).
358 8: address of table of line numbers (LPBX5) or 0.
47431dff 359 9: address of table of file names (LPBX6) or 0.
0f41302f 360 10: space reserved for basic block profiling. */
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361
362 ASM_OUTPUT_ALIGN (asm_out_file, align);
363
364 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
365 /* zero word */
9e2f9a7f 366 assemble_integer (const0_rtx, long_bytes, 1);
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367
368 /* address of filename */
369 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
38a448ca 370 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
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371
372 /* address of count table */
373 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
38a448ca 374 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 375
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376 /* count of the # of basic blocks or # of instrumented arcs */
377 if (profile_block_flag)
378 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
379 else
51891abe 380 assemble_integer (GEN_INT (count_instrumented_edges), long_bytes, 1);
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381
382 /* zero word (link field) */
9e2f9a7f 383 assemble_integer (const0_rtx, pointer_bytes, 1);
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384
385 /* address of basic block start address table */
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386 if (profile_block_flag)
387 {
388 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 389 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
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390 1);
391 }
392 else
393 assemble_integer (const0_rtx, pointer_bytes, 1);
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394
395 /* byte count for extended structure. */
d7502074 396 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1);
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397
398 /* address of function name table */
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399 if (profile_block_flag)
400 {
401 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
38a448ca 402 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
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403 1);
404 }
405 else
406 assemble_integer (const0_rtx, pointer_bytes, 1);
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407
408 /* address of line number and filename tables if debugging. */
9e2f9a7f 409 if (write_symbols != NO_DEBUG && profile_block_flag)
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410 {
411 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
c5c76735
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412 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
413 pointer_bytes, 1);
3cf2715d 414 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
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415 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
416 pointer_bytes, 1);
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417 }
418 else
419 {
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420 assemble_integer (const0_rtx, pointer_bytes, 1);
421 assemble_integer (const0_rtx, pointer_bytes, 1);
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422 }
423
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424 /* space for extension ptr (link field) */
425 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
426
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427 /* Output the file name changing the suffix to .d for Sun tcov
428 compatibility. */
429 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
430 {
67e23d2f
JW
431 char *cwd = getpwd ();
432 int len = strlen (filename) + strlen (cwd) + 1;
433 char *data_file = (char *) alloca (len + 4);
434
435 strcpy (data_file, cwd);
436 strcat (data_file, "/");
437 strcat (data_file, filename);
3cf2715d 438 strip_off_ending (data_file, len);
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DE
439 if (profile_block_flag)
440 strcat (data_file, ".d");
441 else
442 strcat (data_file, ".da");
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443 assemble_string (data_file, strlen (data_file) + 1);
444 }
445
446 /* Make space for the table of counts. */
2786cbad 447 if (size == 0)
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448 {
449 /* Realign data section. */
450 ASM_OUTPUT_ALIGN (asm_out_file, align);
451 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
452 if (size != 0)
453 assemble_zeros (size);
454 }
455 else
456 {
457 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
458#ifdef ASM_OUTPUT_SHARED_LOCAL
459 if (flag_shared_data)
460 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
461 else
462#endif
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463#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
464 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
465 BIGGEST_ALIGNMENT);
466#else
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467#ifdef ASM_OUTPUT_ALIGNED_LOCAL
468 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
469 BIGGEST_ALIGNMENT);
470#else
471 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
e9a25f70 472#endif
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473#endif
474 }
475
476 /* Output any basic block strings */
9e2f9a7f 477 if (profile_block_flag)
3cf2715d 478 {
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DE
479 readonly_data_section ();
480 if (sbb_head)
3cf2715d 481 {
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482 ASM_OUTPUT_ALIGN (asm_out_file, align);
483 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
484 {
485 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
486 sptr->label_num);
487 assemble_string (sptr->string, sptr->length);
488 }
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489 }
490 }
491
492 /* Output the table of addresses. */
9e2f9a7f 493 if (profile_block_flag)
3cf2715d 494 {
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495 /* Realign in new section */
496 ASM_OUTPUT_ALIGN (asm_out_file, align);
497 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
498 for (i = 0; i < count_basic_blocks; i++)
499 {
500 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
38a448ca 501 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
502 pointer_bytes, 1);
503 }
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504 }
505
506 /* Output the table of function names. */
9e2f9a7f 507 if (profile_block_flag)
3cf2715d 508 {
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DE
509 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
510 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
3cf2715d 511 {
9e2f9a7f
DE
512 if (ptr->func_label_num >= 0)
513 {
514 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
515 ptr->func_label_num);
38a448ca 516 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
517 pointer_bytes, 1);
518 }
519 else
520 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d 521 }
3cf2715d 522
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DE
523 for ( ; i < count_basic_blocks; i++)
524 assemble_integer (const0_rtx, pointer_bytes, 1);
525 }
3cf2715d 526
9e2f9a7f 527 if (write_symbols != NO_DEBUG && profile_block_flag)
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DE
528 {
529 /* Output the table of line numbers. */
530 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
531 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
9e2f9a7f 532 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
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533
534 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 535 assemble_integer (const0_rtx, long_bytes, 1);
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536
537 /* Output the table of file names. */
538 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
539 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
540 {
541 if (ptr->file_label_num >= 0)
542 {
9e2f9a7f
DE
543 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
544 ptr->file_label_num);
38a448ca 545 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f 546 pointer_bytes, 1);
3cf2715d
DE
547 }
548 else
9e2f9a7f 549 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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550 }
551
552 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 553 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
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554 }
555
556 /* End with the address of the table of addresses,
557 so we can find it easily, as the last word in the file's text. */
9e2f9a7f
DE
558 if (profile_block_flag)
559 {
560 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 561 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
562 1);
563 }
3cf2715d
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564 }
565}
566
567/* Enable APP processing of subsequent output.
568 Used before the output from an `asm' statement. */
569
570void
571app_enable ()
572{
573 if (! app_on)
574 {
51723711 575 fputs (ASM_APP_ON, asm_out_file);
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DE
576 app_on = 1;
577 }
578}
579
580/* Disable APP processing of subsequent output.
581 Called from varasm.c before most kinds of output. */
582
583void
584app_disable ()
585{
586 if (app_on)
587 {
51723711 588 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
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589 app_on = 0;
590 }
591}
592\f
593/* Return the number of slots filled in the current
594 delayed branch sequence (we don't count the insn needing the
595 delay slot). Zero if not in a delayed branch sequence. */
596
597#ifdef DELAY_SLOTS
598int
599dbr_sequence_length ()
600{
601 if (final_sequence != 0)
602 return XVECLEN (final_sequence, 0) - 1;
603 else
604 return 0;
605}
606#endif
607\f
608/* The next two pages contain routines used to compute the length of an insn
609 and to shorten branches. */
610
611/* Arrays for insn lengths, and addresses. The latter is referenced by
612 `insn_current_length'. */
613
614static short *insn_lengths;
9d98a694
AO
615
616#ifdef HAVE_ATTR_length
617varray_type insn_addresses_;
618#endif
3cf2715d 619
ea3cbda5
R
620/* Max uid for which the above arrays are valid. */
621static int insn_lengths_max_uid;
622
3cf2715d
DE
623/* Address of insn being processed. Used by `insn_current_length'. */
624int insn_current_address;
625
fc470718
R
626/* Address of insn being processed in previous iteration. */
627int insn_last_address;
628
629/* konwn invariant alignment of insn being processed. */
630int insn_current_align;
631
95707627
R
632/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
633 gives the next following alignment insn that increases the known
634 alignment, or NULL_RTX if there is no such insn.
635 For any alignment obtained this way, we can again index uid_align with
636 its uid to obtain the next following align that in turn increases the
637 alignment, till we reach NULL_RTX; the sequence obtained this way
638 for each insn we'll call the alignment chain of this insn in the following
639 comments. */
640
9e423e6d
JW
641struct label_alignment {
642 short alignment;
643 short max_skip;
644};
645
646static rtx *uid_align;
647static int *uid_shuid;
648static struct label_alignment *label_align;
95707627 649
3cf2715d
DE
650/* Indicate that branch shortening hasn't yet been done. */
651
652void
653init_insn_lengths ()
654{
95707627
R
655 if (label_align)
656 {
657 free (label_align);
658 label_align = 0;
659 }
660 if (uid_shuid)
661 {
662 free (uid_shuid);
663 uid_shuid = 0;
664 }
665 if (insn_lengths)
666 {
667 free (insn_lengths);
668 insn_lengths = 0;
ea3cbda5 669 insn_lengths_max_uid = 0;
95707627 670 }
9d98a694
AO
671#ifdef HAVE_ATTR_length
672 INSN_ADDRESSES_FREE ();
673#endif
95707627
R
674 if (uid_align)
675 {
676 free (uid_align);
677 uid_align = 0;
678 }
3cf2715d
DE
679}
680
681/* Obtain the current length of an insn. If branch shortening has been done,
682 get its actual length. Otherwise, get its maximum length. */
683
684int
685get_attr_length (insn)
7bdb32b9 686 rtx insn ATTRIBUTE_UNUSED;
3cf2715d
DE
687{
688#ifdef HAVE_ATTR_length
689 rtx body;
690 int i;
691 int length = 0;
692
ea3cbda5 693 if (insn_lengths_max_uid > INSN_UID (insn))
3cf2715d
DE
694 return insn_lengths[INSN_UID (insn)];
695 else
696 switch (GET_CODE (insn))
697 {
698 case NOTE:
699 case BARRIER:
700 case CODE_LABEL:
701 return 0;
702
703 case CALL_INSN:
704 length = insn_default_length (insn);
705 break;
706
707 case JUMP_INSN:
708 body = PATTERN (insn);
709 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
710 {
fc470718
R
711 /* Alignment is machine-dependent and should be handled by
712 ADDR_VEC_ALIGN. */
3cf2715d
DE
713 }
714 else
715 length = insn_default_length (insn);
716 break;
717
718 case INSN:
719 body = PATTERN (insn);
720 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
721 return 0;
722
723 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
724 length = asm_insn_count (body) * insn_default_length (insn);
725 else if (GET_CODE (body) == SEQUENCE)
726 for (i = 0; i < XVECLEN (body, 0); i++)
727 length += get_attr_length (XVECEXP (body, 0, i));
728 else
729 length = insn_default_length (insn);
e9a25f70
JL
730 break;
731
732 default:
733 break;
3cf2715d
DE
734 }
735
736#ifdef ADJUST_INSN_LENGTH
737 ADJUST_INSN_LENGTH (insn, length);
738#endif
739 return length;
740#else /* not HAVE_ATTR_length */
741 return 0;
742#endif /* not HAVE_ATTR_length */
743}
744\f
fc470718
R
745/* Code to handle alignment inside shorten_branches. */
746
747/* Here is an explanation how the algorithm in align_fuzz can give
748 proper results:
749
750 Call a sequence of instructions beginning with alignment point X
751 and continuing until the next alignment point `block X'. When `X'
752 is used in an expression, it means the alignment value of the
753 alignment point.
754
755 Call the distance between the start of the first insn of block X, and
756 the end of the last insn of block X `IX', for the `inner size of X'.
757 This is clearly the sum of the instruction lengths.
758
759 Likewise with the next alignment-delimited block following X, which we
760 shall call block Y.
761
762 Call the distance between the start of the first insn of block X, and
763 the start of the first insn of block Y `OX', for the `outer size of X'.
764
765 The estimated padding is then OX - IX.
766
767 OX can be safely estimated as
768
769 if (X >= Y)
770 OX = round_up(IX, Y)
771 else
772 OX = round_up(IX, X) + Y - X
773
774 Clearly est(IX) >= real(IX), because that only depends on the
775 instruction lengths, and those being overestimated is a given.
776
777 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
778 we needn't worry about that when thinking about OX.
779
780 When X >= Y, the alignment provided by Y adds no uncertainty factor
781 for branch ranges starting before X, so we can just round what we have.
782 But when X < Y, we don't know anything about the, so to speak,
783 `middle bits', so we have to assume the worst when aligning up from an
784 address mod X to one mod Y, which is Y - X. */
785
786#ifndef LABEL_ALIGN
efa3896a 787#define LABEL_ALIGN(LABEL) align_labels_log
fc470718
R
788#endif
789
9e423e6d 790#ifndef LABEL_ALIGN_MAX_SKIP
efa3896a 791#define LABEL_ALIGN_MAX_SKIP (align_labels-1)
9e423e6d
JW
792#endif
793
fc470718 794#ifndef LOOP_ALIGN
efa3896a 795#define LOOP_ALIGN(LABEL) align_loops_log
fc470718
R
796#endif
797
9e423e6d 798#ifndef LOOP_ALIGN_MAX_SKIP
efa3896a 799#define LOOP_ALIGN_MAX_SKIP (align_loops-1)
9e423e6d
JW
800#endif
801
fc470718 802#ifndef LABEL_ALIGN_AFTER_BARRIER
efa3896a 803#define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log
fc470718
R
804#endif
805
9e423e6d 806#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
efa3896a 807#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1)
9e423e6d
JW
808#endif
809
fc470718 810#ifndef ADDR_VEC_ALIGN
ca3075bd 811static int
fc470718
R
812final_addr_vec_align (addr_vec)
813 rtx addr_vec;
814{
815 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
816
817 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
818 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
819 return align;
820
821}
822#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
823#endif
824
825#ifndef INSN_LENGTH_ALIGNMENT
826#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
827#endif
828
fc470718
R
829#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
830
de7987a6 831static int min_labelno, max_labelno;
fc470718
R
832
833#define LABEL_TO_ALIGNMENT(LABEL) \
9e423e6d
JW
834 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
835
836#define LABEL_TO_MAX_SKIP(LABEL) \
837 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
fc470718
R
838
839/* For the benefit of port specific code do this also as a function. */
840int
841label_to_alignment (label)
842 rtx label;
843{
844 return LABEL_TO_ALIGNMENT (label);
845}
846
847#ifdef HAVE_ATTR_length
848/* The differences in addresses
849 between a branch and its target might grow or shrink depending on
850 the alignment the start insn of the range (the branch for a forward
851 branch or the label for a backward branch) starts out on; if these
852 differences are used naively, they can even oscillate infinitely.
853 We therefore want to compute a 'worst case' address difference that
854 is independent of the alignment the start insn of the range end
855 up on, and that is at least as large as the actual difference.
856 The function align_fuzz calculates the amount we have to add to the
857 naively computed difference, by traversing the part of the alignment
858 chain of the start insn of the range that is in front of the end insn
859 of the range, and considering for each alignment the maximum amount
860 that it might contribute to a size increase.
861
862 For casesi tables, we also want to know worst case minimum amounts of
863 address difference, in case a machine description wants to introduce
864 some common offset that is added to all offsets in a table.
865 For this purpose, align_fuzz with a growth argument of 0 comuptes the
866 appropriate adjustment. */
867
868
869/* Compute the maximum delta by which the difference of the addresses of
870 START and END might grow / shrink due to a different address for start
871 which changes the size of alignment insns between START and END.
872 KNOWN_ALIGN_LOG is the alignment known for START.
873 GROWTH should be ~0 if the objective is to compute potential code size
874 increase, and 0 if the objective is to compute potential shrink.
875 The return value is undefined for any other value of GROWTH. */
ca3075bd 876static int
687d0ab6 877align_fuzz (start, end, known_align_log, growth)
fc470718
R
878 rtx start, end;
879 int known_align_log;
880 unsigned growth;
881{
882 int uid = INSN_UID (start);
883 rtx align_label;
884 int known_align = 1 << known_align_log;
885 int end_shuid = INSN_SHUID (end);
886 int fuzz = 0;
887
888 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
889 {
890 int align_addr, new_align;
891
892 uid = INSN_UID (align_label);
9d98a694 893 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
fc470718
R
894 if (uid_shuid[uid] > end_shuid)
895 break;
896 known_align_log = LABEL_TO_ALIGNMENT (align_label);
897 new_align = 1 << known_align_log;
898 if (new_align < known_align)
899 continue;
900 fuzz += (-align_addr ^ growth) & (new_align - known_align);
901 known_align = new_align;
902 }
903 return fuzz;
904}
905
906/* Compute a worst-case reference address of a branch so that it
907 can be safely used in the presence of aligned labels. Since the
908 size of the branch itself is unknown, the size of the branch is
909 not included in the range. I.e. for a forward branch, the reference
910 address is the end address of the branch as known from the previous
911 branch shortening pass, minus a value to account for possible size
912 increase due to alignment. For a backward branch, it is the start
913 address of the branch as known from the current pass, plus a value
914 to account for possible size increase due to alignment.
915 NB.: Therefore, the maximum offset allowed for backward branches needs
916 to exclude the branch size. */
917int
918insn_current_reference_address (branch)
919 rtx branch;
920{
5527bf14
RH
921 rtx dest, seq;
922 int seq_uid;
923
924 if (! INSN_ADDRESSES_SET_P ())
925 return 0;
926
927 seq = NEXT_INSN (PREV_INSN (branch));
928 seq_uid = INSN_UID (seq);
fc470718
R
929 if (GET_CODE (branch) != JUMP_INSN)
930 /* This can happen for example on the PA; the objective is to know the
931 offset to address something in front of the start of the function.
932 Thus, we can treat it like a backward branch.
933 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
934 any alignment we'd encounter, so we skip the call to align_fuzz. */
935 return insn_current_address;
936 dest = JUMP_LABEL (branch);
5527bf14 937
33f7f353 938 /* BRANCH has no proper alignment chain set, so use SEQ. */
fc470718
R
939 if (INSN_SHUID (branch) < INSN_SHUID (dest))
940 {
941 /* Forward branch. */
942 return (insn_last_address + insn_lengths[seq_uid]
26024475 943 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
944 }
945 else
946 {
947 /* Backward branch. */
948 return (insn_current_address
923f7cf9 949 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
950 }
951}
952#endif /* HAVE_ATTR_length */
953\f
3cf2715d
DE
954/* Make a pass over all insns and compute their actual lengths by shortening
955 any branches of variable length if possible. */
956
957/* Give a default value for the lowest address in a function. */
958
959#ifndef FIRST_INSN_ADDRESS
960#define FIRST_INSN_ADDRESS 0
961#endif
962
fc470718
R
963/* shorten_branches might be called multiple times: for example, the SH
964 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
965 In order to do this, it needs proper length information, which it obtains
966 by calling shorten_branches. This cannot be collapsed with
967 shorten_branches itself into a single pass unless we also want to intergate
968 reorg.c, since the branch splitting exposes new instructions with delay
969 slots. */
970
3cf2715d
DE
971void
972shorten_branches (first)
7bdb32b9 973 rtx first ATTRIBUTE_UNUSED;
3cf2715d 974{
3cf2715d 975 rtx insn;
fc470718
R
976 int max_uid;
977 int i;
fc470718 978 int max_log;
9e423e6d 979 int max_skip;
fc470718
R
980#ifdef HAVE_ATTR_length
981#define MAX_CODE_ALIGN 16
982 rtx seq;
3cf2715d 983 int something_changed = 1;
3cf2715d
DE
984 char *varying_length;
985 rtx body;
986 int uid;
fc470718 987 rtx align_tab[MAX_CODE_ALIGN];
3cf2715d 988
3d14e82f
JW
989 /* In order to make sure that all instructions have valid length info,
990 we must split them before we compute the address/length info. */
991
992 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
993 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
fc470718
R
994 {
995 rtx old = insn;
1b4d9ecd
RE
996 /* Don't split the insn if it has been deleted. */
997 if (! INSN_DELETED_P (old))
998 insn = try_split (PATTERN (old), old, 1);
fc470718
R
999 /* When not optimizing, the old insn will be still left around
1000 with only the 'deleted' bit set. Transform it into a note
1001 to avoid confusion of subsequent processing. */
1002 if (INSN_DELETED_P (old))
1003 {
1004 PUT_CODE (old , NOTE);
1005 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
1006 NOTE_SOURCE_FILE (old) = 0;
1007 }
1008 }
1009#endif
3d14e82f 1010
fc470718
R
1011 /* We must do some computations even when not actually shortening, in
1012 order to get the alignment information for the labels. */
1013
95707627
R
1014 init_insn_lengths ();
1015
fc470718
R
1016 /* Compute maximum UID and allocate label_align / uid_shuid. */
1017 max_uid = get_max_uid ();
1018
1019 max_labelno = max_label_num ();
1020 min_labelno = get_first_label_num ();
d0f3d9c2 1021 label_align = (struct label_alignment *)
3de90026 1022 xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment));
fc470718 1023
fc470718
R
1024 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1025
1026 /* Initialize label_align and set up uid_shuid to be strictly
1027 monotonically rising with insn order. */
e2faec75
R
1028 /* We use max_log here to keep track of the maximum alignment we want to
1029 impose on the next CODE_LABEL (or the current one if we are processing
1030 the CODE_LABEL itself). */
1031
9e423e6d
JW
1032 max_log = 0;
1033 max_skip = 0;
1034
1035 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718
R
1036 {
1037 int log;
1038
1039 INSN_SHUID (insn) = i++;
1040 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
e2faec75
R
1041 {
1042 /* reorg might make the first insn of a loop being run once only,
1043 and delete the label in front of it. Then we want to apply
1044 the loop alignment to the new label created by reorg, which
1045 is separated by the former loop start insn from the
1046 NOTE_INSN_LOOP_BEG. */
1047 }
fc470718
R
1048 else if (GET_CODE (insn) == CODE_LABEL)
1049 {
1050 rtx next;
1051
1052 log = LABEL_ALIGN (insn);
1053 if (max_log < log)
9e423e6d
JW
1054 {
1055 max_log = log;
1056 max_skip = LABEL_ALIGN_MAX_SKIP;
1057 }
fc470718 1058 next = NEXT_INSN (insn);
75197b37
BS
1059 /* ADDR_VECs only take room if read-only data goes into the text
1060 section. */
1061 if (JUMP_TABLES_IN_TEXT_SECTION
1062#if !defined(READONLY_DATA_SECTION)
1063 || 1
fc470718 1064#endif
75197b37
BS
1065 )
1066 if (next && GET_CODE (next) == JUMP_INSN)
1067 {
1068 rtx nextbody = PATTERN (next);
1069 if (GET_CODE (nextbody) == ADDR_VEC
1070 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1071 {
1072 log = ADDR_VEC_ALIGN (next);
1073 if (max_log < log)
1074 {
1075 max_log = log;
1076 max_skip = LABEL_ALIGN_MAX_SKIP;
1077 }
1078 }
1079 }
fc470718 1080 LABEL_TO_ALIGNMENT (insn) = max_log;
9e423e6d 1081 LABEL_TO_MAX_SKIP (insn) = max_skip;
fc470718 1082 max_log = 0;
9e423e6d 1083 max_skip = 0;
fc470718
R
1084 }
1085 else if (GET_CODE (insn) == BARRIER)
1086 {
1087 rtx label;
1088
1089 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1090 label = NEXT_INSN (label))
1091 if (GET_CODE (label) == CODE_LABEL)
1092 {
1093 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1094 if (max_log < log)
9e423e6d
JW
1095 {
1096 max_log = log;
1097 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1098 }
fc470718
R
1099 break;
1100 }
1101 }
e2faec75
R
1102 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1103 sequences in order to handle reorg output efficiently. */
fc470718
R
1104 else if (GET_CODE (insn) == NOTE
1105 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1106 {
1107 rtx label;
edd6ede7 1108 int nest = 0;
fc470718 1109
edd6ede7
R
1110 /* Search for the label that starts the loop.
1111 Don't skip past the end of the loop, since that could
1112 lead to putting an alignment where it does not belong.
1113 However, a label after a nested (non-)loop would be OK. */
e2faec75 1114 for (label = insn; label; label = NEXT_INSN (label))
edd6ede7
R
1115 {
1116 if (GET_CODE (label) == NOTE
1117 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG)
1118 nest++;
1119 else if (GET_CODE (label) == NOTE
1120 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END
1121 && --nest == 0)
fc470718 1122 break;
edd6ede7
R
1123 else if (GET_CODE (label) == CODE_LABEL)
1124 {
2148624a 1125 log = LOOP_ALIGN (label);
edd6ede7
R
1126 if (max_log < log)
1127 {
1128 max_log = log;
1129 max_skip = LOOP_ALIGN_MAX_SKIP;
1130 }
1131 break;
1132 }
1133 }
fc470718
R
1134 }
1135 else
1136 continue;
1137 }
1138#ifdef HAVE_ATTR_length
1139
1140 /* Allocate the rest of the arrays. */
fc470718 1141 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
ea3cbda5 1142 insn_lengths_max_uid = max_uid;
af035616
R
1143 /* Syntax errors can lead to labels being outside of the main insn stream.
1144 Initialize insn_addresses, so that we get reproducible results. */
9d98a694 1145 INSN_ADDRESSES_ALLOC (max_uid);
fc470718 1146
3de90026 1147 varying_length = (char *) xcalloc (max_uid, sizeof (char));
fc470718
R
1148
1149 /* Initialize uid_align. We scan instructions
1150 from end to start, and keep in align_tab[n] the last seen insn
1151 that does an alignment of at least n+1, i.e. the successor
1152 in the alignment chain for an insn that does / has a known
1153 alignment of n. */
3de90026 1154 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
fc470718
R
1155
1156 for (i = MAX_CODE_ALIGN; --i >= 0; )
1157 align_tab[i] = NULL_RTX;
1158 seq = get_last_insn ();
33f7f353 1159 for (; seq; seq = PREV_INSN (seq))
fc470718
R
1160 {
1161 int uid = INSN_UID (seq);
1162 int log;
fc470718
R
1163 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1164 uid_align[uid] = align_tab[0];
fc470718
R
1165 if (log)
1166 {
1167 /* Found an alignment label. */
1168 uid_align[uid] = align_tab[log];
1169 for (i = log - 1; i >= 0; i--)
1170 align_tab[i] = seq;
1171 }
33f7f353
JR
1172 }
1173#ifdef CASE_VECTOR_SHORTEN_MODE
1174 if (optimize)
1175 {
1176 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1177 label fields. */
1178
1179 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1180 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1181 int rel;
1182
1183 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 1184 {
33f7f353
JR
1185 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1186 int len, i, min, max, insn_shuid;
1187 int min_align;
1188 addr_diff_vec_flags flags;
1189
1190 if (GET_CODE (insn) != JUMP_INSN
1191 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1192 continue;
1193 pat = PATTERN (insn);
1194 len = XVECLEN (pat, 1);
1195 if (len <= 0)
1196 abort ();
1197 min_align = MAX_CODE_ALIGN;
1198 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1199 {
1200 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1201 int shuid = INSN_SHUID (lab);
1202 if (shuid < min)
1203 {
1204 min = shuid;
1205 min_lab = lab;
1206 }
1207 if (shuid > max)
1208 {
1209 max = shuid;
1210 max_lab = lab;
1211 }
1212 if (min_align > LABEL_TO_ALIGNMENT (lab))
1213 min_align = LABEL_TO_ALIGNMENT (lab);
1214 }
1215 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1216 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1217 insn_shuid = INSN_SHUID (insn);
1218 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1219 flags.min_align = min_align;
1220 flags.base_after_vec = rel > insn_shuid;
1221 flags.min_after_vec = min > insn_shuid;
1222 flags.max_after_vec = max > insn_shuid;
1223 flags.min_after_base = min > rel;
1224 flags.max_after_base = max > rel;
1225 ADDR_DIFF_VEC_FLAGS (pat) = flags;
fc470718
R
1226 }
1227 }
33f7f353 1228#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1229
3cf2715d
DE
1230
1231 /* Compute initial lengths, addresses, and varying flags for each insn. */
1232 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1233 insn != 0;
1234 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1235 {
1236 uid = INSN_UID (insn);
fc470718 1237
3cf2715d 1238 insn_lengths[uid] = 0;
fc470718
R
1239
1240 if (GET_CODE (insn) == CODE_LABEL)
1241 {
1242 int log = LABEL_TO_ALIGNMENT (insn);
1243 if (log)
1244 {
1245 int align = 1 << log;
ecb06768 1246 int new_address = (insn_current_address + align - 1) & -align;
fc470718
R
1247 insn_lengths[uid] = new_address - insn_current_address;
1248 insn_current_address = new_address;
1249 }
1250 }
1251
9d98a694 1252 INSN_ADDRESSES (uid) = insn_current_address;
3cf2715d
DE
1253
1254 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1255 || GET_CODE (insn) == CODE_LABEL)
1256 continue;
04da53bd
R
1257 if (INSN_DELETED_P (insn))
1258 continue;
3cf2715d
DE
1259
1260 body = PATTERN (insn);
1261 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
5a32a90c
JR
1262 {
1263 /* This only takes room if read-only data goes into the text
1264 section. */
75197b37
BS
1265 if (JUMP_TABLES_IN_TEXT_SECTION
1266#if !defined(READONLY_DATA_SECTION)
1267 || 1
1268#endif
1269 )
1270 insn_lengths[uid] = (XVECLEN (body,
1271 GET_CODE (body) == ADDR_DIFF_VEC)
1272 * GET_MODE_SIZE (GET_MODE (body)));
5a32a90c 1273 /* Alignment is handled by ADDR_VEC_ALIGN. */
5a32a90c 1274 }
a30caf5c 1275 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
3cf2715d
DE
1276 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1277 else if (GET_CODE (body) == SEQUENCE)
1278 {
1279 int i;
1280 int const_delay_slots;
1281#ifdef DELAY_SLOTS
1282 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1283#else
1284 const_delay_slots = 0;
1285#endif
1286 /* Inside a delay slot sequence, we do not do any branch shortening
1287 if the shortening could change the number of delay slots
0f41302f 1288 of the branch. */
3cf2715d
DE
1289 for (i = 0; i < XVECLEN (body, 0); i++)
1290 {
1291 rtx inner_insn = XVECEXP (body, 0, i);
1292 int inner_uid = INSN_UID (inner_insn);
1293 int inner_length;
1294
a30caf5c
DC
1295 if (GET_CODE (body) == ASM_INPUT
1296 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
3cf2715d
DE
1297 inner_length = (asm_insn_count (PATTERN (inner_insn))
1298 * insn_default_length (inner_insn));
1299 else
1300 inner_length = insn_default_length (inner_insn);
1301
1302 insn_lengths[inner_uid] = inner_length;
1303 if (const_delay_slots)
1304 {
1305 if ((varying_length[inner_uid]
1306 = insn_variable_length_p (inner_insn)) != 0)
1307 varying_length[uid] = 1;
9d98a694
AO
1308 INSN_ADDRESSES (inner_uid) = (insn_current_address
1309 + insn_lengths[uid]);
3cf2715d
DE
1310 }
1311 else
1312 varying_length[inner_uid] = 0;
1313 insn_lengths[uid] += inner_length;
1314 }
1315 }
1316 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1317 {
1318 insn_lengths[uid] = insn_default_length (insn);
1319 varying_length[uid] = insn_variable_length_p (insn);
1320 }
1321
1322 /* If needed, do any adjustment. */
1323#ifdef ADJUST_INSN_LENGTH
1324 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
04b6000c
VM
1325 if (insn_lengths[uid] < 0)
1326 fatal_insn ("Negative insn length", insn);
3cf2715d
DE
1327#endif
1328 }
1329
1330 /* Now loop over all the insns finding varying length insns. For each,
1331 get the current insn length. If it has changed, reflect the change.
1332 When nothing changes for a full pass, we are done. */
1333
1334 while (something_changed)
1335 {
1336 something_changed = 0;
fc470718 1337 insn_current_align = MAX_CODE_ALIGN - 1;
3cf2715d
DE
1338 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1339 insn != 0;
1340 insn = NEXT_INSN (insn))
1341 {
1342 int new_length;
b729186a 1343#ifdef ADJUST_INSN_LENGTH
3cf2715d 1344 int tmp_length;
b729186a 1345#endif
fc470718 1346 int length_align;
3cf2715d
DE
1347
1348 uid = INSN_UID (insn);
fc470718
R
1349
1350 if (GET_CODE (insn) == CODE_LABEL)
1351 {
1352 int log = LABEL_TO_ALIGNMENT (insn);
1353 if (log > insn_current_align)
1354 {
1355 int align = 1 << log;
ecb06768 1356 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1357 insn_lengths[uid] = new_address - insn_current_address;
1358 insn_current_align = log;
1359 insn_current_address = new_address;
1360 }
1361 else
1362 insn_lengths[uid] = 0;
9d98a694 1363 INSN_ADDRESSES (uid) = insn_current_address;
fc470718
R
1364 continue;
1365 }
1366
1367 length_align = INSN_LENGTH_ALIGNMENT (insn);
1368 if (length_align < insn_current_align)
1369 insn_current_align = length_align;
1370
9d98a694
AO
1371 insn_last_address = INSN_ADDRESSES (uid);
1372 INSN_ADDRESSES (uid) = insn_current_address;
fc470718 1373
5e75ef4a 1374#ifdef CASE_VECTOR_SHORTEN_MODE
33f7f353
JR
1375 if (optimize && GET_CODE (insn) == JUMP_INSN
1376 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1377 {
33f7f353
JR
1378 rtx body = PATTERN (insn);
1379 int old_length = insn_lengths[uid];
1380 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1381 rtx min_lab = XEXP (XEXP (body, 2), 0);
1382 rtx max_lab = XEXP (XEXP (body, 3), 0);
1383 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
9d98a694
AO
1384 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1385 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1386 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
33f7f353
JR
1387 rtx prev;
1388 int rel_align = 0;
1389
1390 /* Try to find a known alignment for rel_lab. */
1391 for (prev = rel_lab;
1392 prev
1393 && ! insn_lengths[INSN_UID (prev)]
1394 && ! (varying_length[INSN_UID (prev)] & 1);
1395 prev = PREV_INSN (prev))
1396 if (varying_length[INSN_UID (prev)] & 2)
1397 {
1398 rel_align = LABEL_TO_ALIGNMENT (prev);
1399 break;
1400 }
1401
1402 /* See the comment on addr_diff_vec_flags in rtl.h for the
1403 meaning of the flags values. base: REL_LAB vec: INSN */
1404 /* Anything after INSN has still addresses from the last
1405 pass; adjust these so that they reflect our current
1406 estimate for this pass. */
1407 if (flags.base_after_vec)
1408 rel_addr += insn_current_address - insn_last_address;
1409 if (flags.min_after_vec)
1410 min_addr += insn_current_address - insn_last_address;
1411 if (flags.max_after_vec)
1412 max_addr += insn_current_address - insn_last_address;
1413 /* We want to know the worst case, i.e. lowest possible value
1414 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1415 its offset is positive, and we have to be wary of code shrink;
1416 otherwise, it is negative, and we have to be vary of code
1417 size increase. */
1418 if (flags.min_after_base)
1419 {
1420 /* If INSN is between REL_LAB and MIN_LAB, the size
1421 changes we are about to make can change the alignment
1422 within the observed offset, therefore we have to break
1423 it up into two parts that are independent. */
1424 if (! flags.base_after_vec && flags.min_after_vec)
1425 {
1426 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1427 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1428 }
1429 else
1430 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1431 }
1432 else
1433 {
1434 if (flags.base_after_vec && ! flags.min_after_vec)
1435 {
1436 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1437 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1438 }
1439 else
1440 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1441 }
1442 /* Likewise, determine the highest lowest possible value
1443 for the offset of MAX_LAB. */
1444 if (flags.max_after_base)
1445 {
1446 if (! flags.base_after_vec && flags.max_after_vec)
1447 {
1448 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1449 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1450 }
1451 else
1452 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1453 }
1454 else
1455 {
1456 if (flags.base_after_vec && ! flags.max_after_vec)
1457 {
1458 max_addr += align_fuzz (max_lab, insn, 0, 0);
1459 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1460 }
1461 else
1462 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1463 }
1464 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1465 max_addr - rel_addr,
1466 body));
75197b37
BS
1467 if (JUMP_TABLES_IN_TEXT_SECTION
1468#if !defined(READONLY_DATA_SECTION)
1469 || 1
33f7f353 1470#endif
75197b37
BS
1471 )
1472 {
1473 insn_lengths[uid]
1474 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1475 insn_current_address += insn_lengths[uid];
1476 if (insn_lengths[uid] != old_length)
1477 something_changed = 1;
1478 }
1479
33f7f353 1480 continue;
33f7f353 1481 }
5e75ef4a
JL
1482#endif /* CASE_VECTOR_SHORTEN_MODE */
1483
1484 if (! (varying_length[uid]))
3cf2715d
DE
1485 {
1486 insn_current_address += insn_lengths[uid];
1487 continue;
1488 }
1489 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1490 {
1491 int i;
1492
1493 body = PATTERN (insn);
1494 new_length = 0;
1495 for (i = 0; i < XVECLEN (body, 0); i++)
1496 {
1497 rtx inner_insn = XVECEXP (body, 0, i);
1498 int inner_uid = INSN_UID (inner_insn);
1499 int inner_length;
1500
9d98a694 1501 INSN_ADDRESSES (inner_uid) = insn_current_address;
3cf2715d
DE
1502
1503 /* insn_current_length returns 0 for insns with a
1504 non-varying length. */
1505 if (! varying_length[inner_uid])
1506 inner_length = insn_lengths[inner_uid];
1507 else
1508 inner_length = insn_current_length (inner_insn);
1509
1510 if (inner_length != insn_lengths[inner_uid])
1511 {
1512 insn_lengths[inner_uid] = inner_length;
1513 something_changed = 1;
1514 }
1515 insn_current_address += insn_lengths[inner_uid];
1516 new_length += inner_length;
1517 }
1518 }
1519 else
1520 {
1521 new_length = insn_current_length (insn);
1522 insn_current_address += new_length;
1523 }
1524
3cf2715d
DE
1525#ifdef ADJUST_INSN_LENGTH
1526 /* If needed, do any adjustment. */
1527 tmp_length = new_length;
1528 ADJUST_INSN_LENGTH (insn, new_length);
1529 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1530#endif
1531
1532 if (new_length != insn_lengths[uid])
1533 {
1534 insn_lengths[uid] = new_length;
1535 something_changed = 1;
1536 }
1537 }
bb4aaf18
TG
1538 /* For a non-optimizing compile, do only a single pass. */
1539 if (!optimize)
1540 break;
3cf2715d 1541 }
fc470718
R
1542
1543 free (varying_length);
1544
3cf2715d
DE
1545#endif /* HAVE_ATTR_length */
1546}
1547
1548#ifdef HAVE_ATTR_length
1549/* Given the body of an INSN known to be generated by an ASM statement, return
1550 the number of machine instructions likely to be generated for this insn.
1551 This is used to compute its length. */
1552
1553static int
1554asm_insn_count (body)
1555 rtx body;
1556{
3cce094d 1557 const char *template;
3cf2715d
DE
1558 int count = 1;
1559
5d0930ea
DE
1560 if (GET_CODE (body) == ASM_INPUT)
1561 template = XSTR (body, 0);
1562 else
1563 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1564 NULL_PTR, NULL_PTR);
1565
1566 for ( ; *template; template++)
3cf2715d
DE
1567 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1568 count++;
1569
1570 return count;
1571}
1572#endif
1573\f
1574/* Output assembler code for the start of a function,
1575 and initialize some of the variables in this file
1576 for the new function. The label for the function and associated
1577 assembler pseudo-ops have already been output in `assemble_start_function'.
1578
1579 FIRST is the first insn of the rtl for the function being compiled.
1580 FILE is the file to write assembler code to.
1581 OPTIMIZE is nonzero if we should eliminate redundant
1582 test and compare insns. */
1583
1584void
1585final_start_function (first, file, optimize)
1586 rtx first;
1587 FILE *file;
6a651371 1588 int optimize ATTRIBUTE_UNUSED;
3cf2715d
DE
1589{
1590 block_depth = 0;
1591
1592 this_is_asm_operands = 0;
1593
1594#ifdef NON_SAVING_SETJMP
1595 /* A function that calls setjmp should save and restore all the
1596 call-saved registers on a system where longjmp clobbers them. */
1597 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1598 {
1599 int i;
1600
1601 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
252f342a 1602 if (!call_used_regs[i])
3cf2715d
DE
1603 regs_ever_live[i] = 1;
1604 }
1605#endif
1606
1607 /* Initial line number is supposed to be output
1608 before the function's prologue and label
1609 so that the function's address will not appear to be
1610 in the last statement of the preceding function. */
1611 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
5fad6898
RK
1612 last_linenum = high_block_linenum = high_function_linenum
1613 = NOTE_LINE_NUMBER (first);
eac40081 1614
c5cec899 1615#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
d291dd49 1616 /* Output DWARF definition of the function. */
0021b564 1617 if (dwarf2out_do_frame ())
9a666dda 1618 dwarf2out_begin_prologue ();
00262c8a
ML
1619 else
1620 current_function_func_begin_label = 0;
d291dd49
JM
1621#endif
1622
5fad6898
RK
1623 /* For SDB and XCOFF, the function beginning must be marked between
1624 the function label and the prologue. We always need this, even when
3c734272 1625 -g1 was used. Defer on MIPS systems so that parameter descriptions
0f41302f 1626 follow function entry. */
3c734272 1627#if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
5fad6898
RK
1628 if (write_symbols == SDB_DEBUG)
1629 sdbout_begin_function (last_linenum);
1630 else
2e2bbce2 1631#endif
3cf2715d 1632#ifdef XCOFF_DEBUGGING_INFO
5fad6898
RK
1633 if (write_symbols == XCOFF_DEBUG)
1634 xcoffout_begin_function (file, last_linenum);
1635 else
3cf2715d 1636#endif
5fad6898
RK
1637 /* But only output line number for other debug info types if -g2
1638 or better. */
1639 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1640 output_source_line (file, first);
3cf2715d
DE
1641
1642#ifdef LEAF_REG_REMAP
54ff41b7 1643 if (current_function_uses_only_leaf_regs)
3cf2715d
DE
1644 leaf_renumber_regs (first);
1645#endif
1646
1647 /* The Sun386i and perhaps other machines don't work right
1648 if the profiling code comes after the prologue. */
1649#ifdef PROFILE_BEFORE_PROLOGUE
1650 if (profile_flag)
1651 profile_function (file);
1652#endif /* PROFILE_BEFORE_PROLOGUE */
1653
0021b564
JM
1654#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1655 if (dwarf2out_do_frame ())
1656 dwarf2out_frame_debug (NULL_RTX);
1657#endif
1658
18c038b9
MM
1659 /* If debugging, assign block numbers to all of the blocks in this
1660 function. */
1661 if (write_symbols)
1662 {
1663 number_blocks (current_function_decl);
3ac79482 1664 remove_unnecessary_notes ();
18c038b9
MM
1665 /* We never actually put out begin/end notes for the top-level
1666 block in the function. But, conceptually, that block is
1667 always needed. */
1668 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1669 }
1670
3cf2715d
DE
1671#ifdef FUNCTION_PROLOGUE
1672 /* First output the function prologue: code to set up the stack frame. */
1673 FUNCTION_PROLOGUE (file, get_frame_size ());
1674#endif
1675
3cf2715d
DE
1676 /* If the machine represents the prologue as RTL, the profiling code must
1677 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1678#ifdef HAVE_prologue
1679 if (! HAVE_prologue)
1680#endif
1681 profile_after_prologue (file);
1682
1683 profile_label_no++;
1684
1685 /* If we are doing basic block profiling, remember a printable version
1686 of the function name. */
1687 if (profile_block_flag)
1688 {
db3cf6fb
MS
1689 bb_func_label_num
1690 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
3cf2715d
DE
1691 }
1692}
1693
1694static void
1695profile_after_prologue (file)
7bdb32b9 1696 FILE *file ATTRIBUTE_UNUSED;
3cf2715d
DE
1697{
1698#ifdef FUNCTION_BLOCK_PROFILER
1699 if (profile_block_flag)
1700 {
47431dff 1701 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
3cf2715d
DE
1702 }
1703#endif /* FUNCTION_BLOCK_PROFILER */
1704
1705#ifndef PROFILE_BEFORE_PROLOGUE
1706 if (profile_flag)
1707 profile_function (file);
1708#endif /* not PROFILE_BEFORE_PROLOGUE */
1709}
1710
1711static void
1712profile_function (file)
1713 FILE *file;
1714{
dcacfa04 1715#ifndef NO_PROFILE_COUNTERS
9e2f9a7f 1716 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
dcacfa04 1717#endif
b729186a
JL
1718#if defined(ASM_OUTPUT_REG_PUSH)
1719#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
3cf2715d 1720 int sval = current_function_returns_struct;
b729186a
JL
1721#endif
1722#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
3cf2715d 1723 int cxt = current_function_needs_context;
b729186a
JL
1724#endif
1725#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d 1726
dcacfa04 1727#ifndef NO_PROFILE_COUNTERS
3cf2715d
DE
1728 data_section ();
1729 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1730 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
9e2f9a7f 1731 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
dcacfa04 1732#endif
3cf2715d 1733
499df339 1734 function_section (current_function_decl);
3cf2715d 1735
65ed39df 1736#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1737 if (sval)
1738 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1739#else
65ed39df 1740#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1741 if (sval)
51723711
KG
1742 {
1743 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1744 }
3cf2715d
DE
1745#endif
1746#endif
1747
65ed39df 1748#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1749 if (cxt)
1750 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1751#else
65ed39df 1752#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1753 if (cxt)
51723711
KG
1754 {
1755 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1756 }
3cf2715d
DE
1757#endif
1758#endif
3cf2715d
DE
1759
1760 FUNCTION_PROFILER (file, profile_label_no);
1761
65ed39df 1762#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1763 if (cxt)
1764 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1765#else
65ed39df 1766#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1767 if (cxt)
51723711
KG
1768 {
1769 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1770 }
3cf2715d
DE
1771#endif
1772#endif
3cf2715d 1773
65ed39df 1774#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1775 if (sval)
1776 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1777#else
65ed39df 1778#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1779 if (sval)
51723711
KG
1780 {
1781 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1782 }
3cf2715d
DE
1783#endif
1784#endif
1785}
1786
1787/* Output assembler code for the end of a function.
1788 For clarity, args are same as those of `final_start_function'
1789 even though not all of them are needed. */
1790
1791void
1792final_end_function (first, file, optimize)
6a651371 1793 rtx first ATTRIBUTE_UNUSED;
fbd40359 1794 FILE *file ATTRIBUTE_UNUSED;
6a651371 1795 int optimize ATTRIBUTE_UNUSED;
3cf2715d 1796{
be1bb652 1797 app_disable ();
3cf2715d
DE
1798
1799#ifdef SDB_DEBUGGING_INFO
1800 if (write_symbols == SDB_DEBUG)
eac40081 1801 sdbout_end_function (high_function_linenum);
3cf2715d
DE
1802#endif
1803
1804#ifdef DWARF_DEBUGGING_INFO
1805 if (write_symbols == DWARF_DEBUG)
1806 dwarfout_end_function ();
1807#endif
1808
1809#ifdef XCOFF_DEBUGGING_INFO
1810 if (write_symbols == XCOFF_DEBUG)
eac40081 1811 xcoffout_end_function (file, high_function_linenum);
3cf2715d
DE
1812#endif
1813
1814#ifdef FUNCTION_EPILOGUE
1815 /* Finally, output the function epilogue:
1816 code to restore the stack frame and return to the caller. */
1817 FUNCTION_EPILOGUE (file, get_frame_size ());
1818#endif
1819
1820#ifdef SDB_DEBUGGING_INFO
1821 if (write_symbols == SDB_DEBUG)
1822 sdbout_end_epilogue ();
1823#endif
1824
1825#ifdef DWARF_DEBUGGING_INFO
1826 if (write_symbols == DWARF_DEBUG)
1827 dwarfout_end_epilogue ();
1828#endif
1829
c5cec899 1830#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
0021b564 1831 if (dwarf2out_do_frame ())
9a666dda
JM
1832 dwarf2out_end_epilogue ();
1833#endif
1834
3cf2715d
DE
1835#ifdef XCOFF_DEBUGGING_INFO
1836 if (write_symbols == XCOFF_DEBUG)
1837 xcoffout_end_epilogue (file);
1838#endif
1839
1840 bb_func_label_num = -1; /* not in function, nuke label # */
1841
ce152ef8
AM
1842#ifdef IA64_UNWIND_INFO
1843 output_function_exception_table ();
1844#endif
1845
3cf2715d
DE
1846 /* If FUNCTION_EPILOGUE is not defined, then the function body
1847 itself contains return instructions wherever needed. */
1848}
1849\f
1850/* Add a block to the linked list that remembers the current line/file/function
1851 for basic block profiling. Emit the label in front of the basic block and
1852 the instructions that increment the count field. */
1853
1854static void
1855add_bb (file)
1856 FILE *file;
1857{
1858 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1859
1860 /* Add basic block to linked list. */
1861 ptr->next = 0;
1862 ptr->line_num = last_linenum;
1863 ptr->file_label_num = bb_file_label_num;
1864 ptr->func_label_num = bb_func_label_num;
1865 *bb_tail = ptr;
1866 bb_tail = &ptr->next;
1867
1868 /* Enable the table of basic-block use counts
1869 to point at the code it applies to. */
1870 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1871
1872 /* Before first insn of this basic block, increment the
1873 count of times it was entered. */
1874#ifdef BLOCK_PROFILER
1875 BLOCK_PROFILER (file, count_basic_blocks);
9e2f9a7f
DE
1876#endif
1877#ifdef HAVE_cc0
3cf2715d
DE
1878 CC_STATUS_INIT;
1879#endif
1880
1881 new_block = 0;
1882 count_basic_blocks++;
1883}
1884
1885/* Add a string to be used for basic block profiling. */
1886
1887static int
1888add_bb_string (string, perm_p)
9b3142b3 1889 const char *string;
3cf2715d
DE
1890 int perm_p;
1891{
1892 int len;
1893 struct bb_str *ptr = 0;
1894
1895 if (!string)
1896 {
1897 string = "<unknown>";
1898 perm_p = TRUE;
1899 }
1900
1901 /* Allocate a new string if the current string isn't permanent. If
1902 the string is permanent search for the same string in other
1903 allocations. */
1904
1905 len = strlen (string) + 1;
1906 if (!perm_p)
1907 {
1908 char *p = (char *) permalloc (len);
1909 bcopy (string, p, len);
1910 string = p;
1911 }
1912 else
0f41302f 1913 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
3cf2715d
DE
1914 if (ptr->string == string)
1915 break;
1916
1917 /* Allocate a new string block if we need to. */
1918 if (!ptr)
1919 {
1920 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1921 ptr->next = 0;
1922 ptr->length = len;
1923 ptr->label_num = sbb_label_num++;
1924 ptr->string = string;
1925 *sbb_tail = ptr;
1926 sbb_tail = &ptr->next;
1927 }
1928
1929 return ptr->label_num;
1930}
1931
1932\f
1933/* Output assembler code for some insns: all or part of a function.
1934 For description of args, see `final_start_function', above.
1935
1936 PRESCAN is 1 if we are not really outputting,
1937 just scanning as if we were outputting.
1938 Prescanning deletes and rearranges insns just like ordinary output.
1939 PRESCAN is -2 if we are outputting after having prescanned.
1940 In this case, don't try to delete or rearrange insns
1941 because that has already been done.
1942 Prescanning is done only on certain machines. */
1943
1944void
1945final (first, file, optimize, prescan)
1946 rtx first;
1947 FILE *file;
1948 int optimize;
1949 int prescan;
1950{
1951 register rtx insn;
1952 int max_line = 0;
a8c3510c 1953 int max_uid = 0;
3cf2715d
DE
1954
1955 last_ignored_compare = 0;
1956 new_block = 1;
1957
3d195391
MS
1958 check_exception_handler_labels ();
1959
3cf2715d
DE
1960 /* Make a map indicating which line numbers appear in this function.
1961 When producing SDB debugging info, delete troublesome line number
1962 notes from inlined functions in other files as well as duplicate
1963 line number notes. */
1964#ifdef SDB_DEBUGGING_INFO
1965 if (write_symbols == SDB_DEBUG)
1966 {
1967 rtx last = 0;
1968 for (insn = first; insn; insn = NEXT_INSN (insn))
1969 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1970 {
1971 if ((RTX_INTEGRATED_P (insn)
1972 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1973 || (last != 0
1974 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1975 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1976 {
1977 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1978 NOTE_SOURCE_FILE (insn) = 0;
1979 continue;
1980 }
1981 last = insn;
1982 if (NOTE_LINE_NUMBER (insn) > max_line)
1983 max_line = NOTE_LINE_NUMBER (insn);
1984 }
1985 }
1986 else
1987#endif
1988 {
1989 for (insn = first; insn; insn = NEXT_INSN (insn))
1990 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1991 max_line = NOTE_LINE_NUMBER (insn);
1992 }
1993
bedda2da 1994 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
3cf2715d
DE
1995
1996 for (insn = first; insn; insn = NEXT_INSN (insn))
a8c3510c
AM
1997 {
1998 if (INSN_UID (insn) > max_uid) /* find largest UID */
1999 max_uid = INSN_UID (insn);
2000 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
2001 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
9ef4c6ef
JC
2002#ifdef HAVE_cc0
2003 /* If CC tracking across branches is enabled, record the insn which
2004 jumps to each branch only reached from one place. */
7ad7f828 2005 if (optimize && GET_CODE (insn) == JUMP_INSN)
9ef4c6ef
JC
2006 {
2007 rtx lab = JUMP_LABEL (insn);
2008 if (lab && LABEL_NUSES (lab) == 1)
2009 {
2010 LABEL_REFS (lab) = insn;
2011 }
2012 }
2013#endif
a8c3510c
AM
2014 }
2015
2016 /* Initialize insn_eh_region table if eh is being used. */
2017
2018 init_insn_eh_region (first, max_uid);
3cf2715d
DE
2019
2020 init_recog ();
2021
2022 CC_STATUS_INIT;
2023
2024 /* Output the insns. */
2025 for (insn = NEXT_INSN (first); insn;)
2f16edb1
TG
2026 {
2027#ifdef HAVE_ATTR_length
9d98a694 2028 if (INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
0ac76ad9
RH
2029 {
2030#ifdef STACK_REGS
2031 /* Irritatingly, the reg-stack pass is creating new instructions
2032 and because of REG_DEAD note abuse it has to run after
2033 shorten_branches. Fake address of -1 then. */
2034 insn_current_address = -1;
2035#else
2036 /* This can be triggered by bugs elsewhere in the compiler if
2037 new insns are created after init_insn_lengths is called. */
2038 abort ();
2f16edb1 2039#endif
0ac76ad9
RH
2040 }
2041 else
9d98a694 2042 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
0ac76ad9
RH
2043#endif /* HAVE_ATTR_length */
2044
2f16edb1
TG
2045 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2046 }
3cf2715d
DE
2047
2048 /* Do basic-block profiling here
2049 if the last insn was a conditional branch. */
2050 if (profile_block_flag && new_block)
2051 add_bb (file);
a8c3510c
AM
2052
2053 free_insn_eh_region ();
bedda2da
MM
2054 free (line_note_exists);
2055 line_note_exists = NULL;
3cf2715d
DE
2056}
2057\f
4bbf910e
RH
2058const char *
2059get_insn_template (code, insn)
2060 int code;
2061 rtx insn;
2062{
2063 const void *output = insn_data[code].output;
2064 switch (insn_data[code].output_format)
2065 {
2066 case INSN_OUTPUT_FORMAT_SINGLE:
2067 return (const char *) output;
2068 case INSN_OUTPUT_FORMAT_MULTI:
2069 return ((const char * const *) output)[which_alternative];
2070 case INSN_OUTPUT_FORMAT_FUNCTION:
2071 if (insn == NULL)
2072 abort ();
2073 return (* (insn_output_fn) output) (recog_data.operand, insn);
2074
2075 default:
2076 abort ();
2077 }
2078}
3cf2715d
DE
2079/* The final scan for one insn, INSN.
2080 Args are same as in `final', except that INSN
2081 is the insn being scanned.
2082 Value returned is the next insn to be scanned.
2083
2084 NOPEEPHOLES is the flag to disallow peephole processing (currently
2085 used for within delayed branch sequence output). */
2086
2087rtx
2088final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2089 rtx insn;
2090 FILE *file;
272df862 2091 int optimize ATTRIBUTE_UNUSED;
3cf2715d 2092 int prescan;
272df862 2093 int nopeepholes ATTRIBUTE_UNUSED;
3cf2715d 2094{
90ca38bb
MM
2095#ifdef HAVE_cc0
2096 rtx set;
2097#endif
2098
3cf2715d
DE
2099 insn_counter++;
2100
2101 /* Ignore deleted insns. These can occur when we split insns (due to a
2102 template of "#") while not optimizing. */
2103 if (INSN_DELETED_P (insn))
2104 return NEXT_INSN (insn);
2105
2106 switch (GET_CODE (insn))
2107 {
2108 case NOTE:
2109 if (prescan > 0)
2110 break;
2111
be1bb652
RH
2112 switch (NOTE_LINE_NUMBER (insn))
2113 {
2114 case NOTE_INSN_DELETED:
2115 case NOTE_INSN_LOOP_BEG:
2116 case NOTE_INSN_LOOP_END:
2117 case NOTE_INSN_LOOP_CONT:
2118 case NOTE_INSN_LOOP_VTOP:
2119 case NOTE_INSN_FUNCTION_END:
2120 case NOTE_INSN_SETJMP:
2121 case NOTE_INSN_REPEATED_LINE_NUMBER:
2122 case NOTE_INSN_RANGE_BEG:
2123 case NOTE_INSN_RANGE_END:
2124 case NOTE_INSN_LIVE:
2125 case NOTE_INSN_EXPECTED_VALUE:
2126 break;
3cf2715d 2127
be1bb652
RH
2128 case NOTE_INSN_BASIC_BLOCK:
2129 if (flag_debug_asm)
2130 fprintf (asm_out_file, "\t%s basic block %d\n",
2131 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
2132 break;
3cf2715d 2133
be1bb652
RH
2134 case NOTE_INSN_EH_REGION_BEG:
2135 if (! exceptions_via_longjmp)
2136 {
2137 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn));
2138 if (! flag_new_exceptions)
2139 add_eh_table_entry (NOTE_EH_HANDLER (insn));
3d195391 2140#ifdef ASM_OUTPUT_EH_REGION_BEG
be1bb652 2141 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn));
3d195391 2142#endif
be1bb652 2143 }
3d195391 2144 break;
3d195391 2145
be1bb652
RH
2146 case NOTE_INSN_EH_REGION_END:
2147 if (! exceptions_via_longjmp)
2148 {
2149 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn));
2150 if (flag_new_exceptions)
2151 add_eh_table_entry (NOTE_EH_HANDLER (insn));
3d195391 2152#ifdef ASM_OUTPUT_EH_REGION_END
be1bb652 2153 ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn));
3d195391 2154#endif
be1bb652 2155 }
3d195391 2156 break;
3d195391 2157
be1bb652 2158 case NOTE_INSN_PROLOGUE_END:
3cf2715d
DE
2159#ifdef FUNCTION_END_PROLOGUE
2160 FUNCTION_END_PROLOGUE (file);
2161#endif
2162 profile_after_prologue (file);
2163 break;
3cf2715d 2164
be1bb652 2165 case NOTE_INSN_EPILOGUE_BEG:
3cf2715d 2166#ifdef FUNCTION_BEGIN_EPILOGUE
3cf2715d 2167 FUNCTION_BEGIN_EPILOGUE (file);
3cf2715d 2168#endif
be1bb652 2169 break;
3cf2715d 2170
be1bb652 2171 case NOTE_INSN_FUNCTION_BEG:
3c734272
RK
2172#if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2173 /* MIPS stabs require the parameter descriptions to be after the
0f41302f 2174 function entry point rather than before. */
3c734272 2175 if (write_symbols == SDB_DEBUG)
be1bb652
RH
2176 {
2177 app_disable ();
2178 sdbout_begin_function (last_linenum);
2179 }
3c734272 2180#endif
3cf2715d 2181#ifdef DWARF_DEBUGGING_INFO
2e2bbce2
RK
2182 /* This outputs a marker where the function body starts, so it
2183 must be after the prologue. */
3cf2715d 2184 if (write_symbols == DWARF_DEBUG)
be1bb652
RH
2185 {
2186 app_disable ();
2187 dwarfout_begin_function ();
2188 }
3cf2715d
DE
2189#endif
2190 break;
be1bb652
RH
2191
2192 case NOTE_INSN_BLOCK_BEG:
2193 if (debug_info_level == DINFO_LEVEL_NORMAL
3cf2715d 2194 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2195 || write_symbols == DWARF_DEBUG
be1bb652
RH
2196 || write_symbols == DWARF2_DEBUG)
2197 {
2198 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2199
be1bb652
RH
2200 app_disable ();
2201 ++block_depth;
2202 high_block_linenum = last_linenum;
eac40081 2203
be1bb652 2204 /* Output debugging info about the symbol-block beginning. */
3cf2715d 2205#ifdef SDB_DEBUGGING_INFO
be1bb652
RH
2206 if (write_symbols == SDB_DEBUG)
2207 sdbout_begin_block (file, last_linenum, n);
3cf2715d
DE
2208#endif
2209#ifdef XCOFF_DEBUGGING_INFO
be1bb652
RH
2210 if (write_symbols == XCOFF_DEBUG)
2211 xcoffout_begin_block (file, last_linenum, n);
3cf2715d
DE
2212#endif
2213#ifdef DBX_DEBUGGING_INFO
be1bb652
RH
2214 if (write_symbols == DBX_DEBUG)
2215 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", n);
3cf2715d
DE
2216#endif
2217#ifdef DWARF_DEBUGGING_INFO
be1bb652
RH
2218 if (write_symbols == DWARF_DEBUG)
2219 dwarfout_begin_block (n);
3cf2715d 2220#endif
9a666dda 2221#ifdef DWARF2_DEBUGGING_INFO
be1bb652
RH
2222 if (write_symbols == DWARF2_DEBUG)
2223 dwarf2out_begin_block (n);
9a666dda 2224#endif
3cf2715d 2225
be1bb652
RH
2226 /* Mark this block as output. */
2227 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2228 }
2229 break;
18c038b9 2230
be1bb652
RH
2231 case NOTE_INSN_BLOCK_END:
2232 if (debug_info_level == DINFO_LEVEL_NORMAL
2233 || debug_info_level == DINFO_LEVEL_VERBOSE
2234 || write_symbols == DWARF_DEBUG
2235 || write_symbols == DWARF2_DEBUG)
2236 {
2237 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2238
be1bb652
RH
2239 app_disable ();
2240
2241 /* End of a symbol-block. */
2242 --block_depth;
2243 if (block_depth < 0)
2244 abort ();
3cf2715d
DE
2245
2246#ifdef XCOFF_DEBUGGING_INFO
be1bb652
RH
2247 if (write_symbols == XCOFF_DEBUG)
2248 xcoffout_end_block (file, high_block_linenum, n);
3cf2715d
DE
2249#endif
2250#ifdef DBX_DEBUGGING_INFO
be1bb652
RH
2251 if (write_symbols == DBX_DEBUG)
2252 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE", n);
3cf2715d
DE
2253#endif
2254#ifdef SDB_DEBUGGING_INFO
be1bb652
RH
2255 if (write_symbols == SDB_DEBUG)
2256 sdbout_end_block (file, high_block_linenum, n);
3cf2715d
DE
2257#endif
2258#ifdef DWARF_DEBUGGING_INFO
be1bb652
RH
2259 if (write_symbols == DWARF_DEBUG)
2260 dwarfout_end_block (n);
9a666dda
JM
2261#endif
2262#ifdef DWARF2_DEBUGGING_INFO
be1bb652
RH
2263 if (write_symbols == DWARF2_DEBUG)
2264 dwarf2out_end_block (n);
3cf2715d 2265#endif
be1bb652
RH
2266 }
2267 break;
2268
2269 case NOTE_INSN_DELETED_LABEL:
2270 /* Emit the label. We may have deleted the CODE_LABEL because
2271 the label could be proved to be unreachable, though still
2272 referenced (in the form of having its address taken. */
2273 /* ??? Figure out how not to do this unconditionally. This
2274 interferes with bundling on LIW targets. */
2275 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2276
2277 if (debug_info_level == DINFO_LEVEL_NORMAL
2278 || debug_info_level == DINFO_LEVEL_VERBOSE)
2279 {
3cf2715d 2280#ifdef DWARF_DEBUGGING_INFO
be1bb652
RH
2281 if (write_symbols == DWARF_DEBUG)
2282 dwarfout_label (insn);
9a666dda
JM
2283#endif
2284#ifdef DWARF2_DEBUGGING_INFO
be1bb652
RH
2285 if (write_symbols == DWARF2_DEBUG)
2286 dwarf2out_label (insn);
3cf2715d 2287#endif
be1bb652
RH
2288 }
2289 break;
3cf2715d 2290
21835d9b
JJ
2291 case 0:
2292 break;
2293
be1bb652
RH
2294 default:
2295 if (NOTE_LINE_NUMBER (insn) <= 0)
2296 abort ();
3cf2715d 2297
be1bb652
RH
2298 /* This note is a line-number. */
2299 {
2300 register rtx note;
2301 int note_after = 0;
2302
2303 /* If there is anything real after this note, output it.
2304 If another line note follows, omit this one. */
2305 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2306 {
2307 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
3cf2715d 2308 break;
3cf2715d 2309
be1bb652
RH
2310 /* These types of notes can be significant
2311 so make sure the preceding line number stays. */
2312 else if (GET_CODE (note) == NOTE
2313 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2314 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2315 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2316 break;
2317 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2318 {
2319 /* Another line note follows; we can delete this note
2320 if no intervening line numbers have notes elsewhere. */
2321 int num;
2322 for (num = NOTE_LINE_NUMBER (insn) + 1;
2323 num < NOTE_LINE_NUMBER (note);
2324 num++)
2325 if (line_note_exists[num])
2326 break;
2327
2328 if (num >= NOTE_LINE_NUMBER (note))
2329 note_after = 1;
2330 break;
2331 }
2332 }
2333
2334 /* Output this line note if it is the first or the last line
2335 note in a row. */
2336 if (!note_after)
2337 output_source_line (file, insn);
2338 }
2339 break;
3cf2715d
DE
2340 }
2341 break;
2342
2343 case BARRIER:
f73ad30e 2344#if defined (DWARF2_UNWIND_INFO)
be1bb652
RH
2345 /* If we push arguments, we need to check all insns for stack
2346 adjustments. */
2347 if (!ACCUMULATE_OUTGOING_ARGS && dwarf2out_do_frame ())
2348 dwarf2out_frame_debug (insn);
3cf2715d
DE
2349#endif
2350 break;
2351
2352 case CODE_LABEL:
1dd8faa8
R
2353 /* The target port might emit labels in the output function for
2354 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2355 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2356 {
2357 int align = LABEL_TO_ALIGNMENT (insn);
50b2596f 2358#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
9e423e6d 2359 int max_skip = LABEL_TO_MAX_SKIP (insn);
50b2596f 2360#endif
fc470718 2361
1dd8faa8 2362 if (align && NEXT_INSN (insn))
9e423e6d
JW
2363#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2364 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2365#else
de7987a6 2366 ASM_OUTPUT_ALIGN (file, align);
9e423e6d 2367#endif
de7987a6 2368 }
9ef4c6ef 2369#ifdef HAVE_cc0
3cf2715d 2370 CC_STATUS_INIT;
9ef4c6ef
JC
2371 /* If this label is reached from only one place, set the condition
2372 codes from the instruction just before the branch. */
7ad7f828
JC
2373
2374 /* Disabled because some insns set cc_status in the C output code
2375 and NOTICE_UPDATE_CC alone can set incorrect status. */
2376 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
9ef4c6ef
JC
2377 {
2378 rtx jump = LABEL_REFS (insn);
2379 rtx barrier = prev_nonnote_insn (insn);
2380 rtx prev;
2381 /* If the LABEL_REFS field of this label has been set to point
2382 at a branch, the predecessor of the branch is a regular
2383 insn, and that branch is the only way to reach this label,
2384 set the condition codes based on the branch and its
2385 predecessor. */
2386 if (barrier && GET_CODE (barrier) == BARRIER
2387 && jump && GET_CODE (jump) == JUMP_INSN
2388 && (prev = prev_nonnote_insn (jump))
2389 && GET_CODE (prev) == INSN)
2390 {
2391 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2392 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2393 }
2394 }
2395#endif
3cf2715d
DE
2396 if (prescan > 0)
2397 break;
2398 new_block = 1;
03ffa171
RK
2399
2400#ifdef FINAL_PRESCAN_LABEL
2401 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2402#endif
2403
3cf2715d
DE
2404#ifdef SDB_DEBUGGING_INFO
2405 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2406 sdbout_label (insn);
2407#endif
2408#ifdef DWARF_DEBUGGING_INFO
2409 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2410 dwarfout_label (insn);
9a666dda
JM
2411#endif
2412#ifdef DWARF2_DEBUGGING_INFO
2413 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2414 dwarf2out_label (insn);
3cf2715d
DE
2415#endif
2416 if (app_on)
2417 {
51723711 2418 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2419 app_on = 0;
2420 }
2421 if (NEXT_INSN (insn) != 0
2422 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2423 {
2424 rtx nextbody = PATTERN (NEXT_INSN (insn));
2425
2426 /* If this label is followed by a jump-table,
2427 make sure we put the label in the read-only section. Also
2428 possibly write the label and jump table together. */
2429
2430 if (GET_CODE (nextbody) == ADDR_VEC
2431 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2432 {
e0d80184
DM
2433#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2434 /* In this case, the case vector is being moved by the
2435 target, so don't output the label at all. Leave that
2436 to the back end macros. */
2437#else
75197b37
BS
2438 if (! JUMP_TABLES_IN_TEXT_SECTION)
2439 {
2440 readonly_data_section ();
3cf2715d 2441#ifdef READONLY_DATA_SECTION
75197b37
BS
2442 ASM_OUTPUT_ALIGN (file,
2443 exact_log2 (BIGGEST_ALIGNMENT
2444 / BITS_PER_UNIT));
3cf2715d 2445#endif /* READONLY_DATA_SECTION */
75197b37
BS
2446 }
2447 else
2448 function_section (current_function_decl);
2449
3cf2715d
DE
2450#ifdef ASM_OUTPUT_CASE_LABEL
2451 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2452 NEXT_INSN (insn));
2453#else
8cd0faaf
CM
2454 if (LABEL_ALTERNATE_NAME (insn))
2455 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2456 else
2457 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
e0d80184 2458#endif
3cf2715d
DE
2459#endif
2460 break;
2461 }
2462 }
8cd0faaf
CM
2463 if (LABEL_ALTERNATE_NAME (insn))
2464 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2465 else
2466 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
3cf2715d
DE
2467 break;
2468
2469 default:
2470 {
51723711 2471 register rtx body = PATTERN (insn);
3cf2715d 2472 int insn_code_number;
9b3142b3 2473 const char *template;
b729186a 2474#ifdef HAVE_cc0
3cf2715d 2475 rtx note;
b729186a 2476#endif
3cf2715d
DE
2477
2478 /* An INSN, JUMP_INSN or CALL_INSN.
2479 First check for special kinds that recog doesn't recognize. */
2480
2481 if (GET_CODE (body) == USE /* These are just declarations */
2482 || GET_CODE (body) == CLOBBER)
2483 break;
2484
2485#ifdef HAVE_cc0
2486 /* If there is a REG_CC_SETTER note on this insn, it means that
2487 the setting of the condition code was done in the delay slot
2488 of the insn that branched here. So recover the cc status
2489 from the insn that set it. */
2490
2491 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2492 if (note)
2493 {
2494 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2495 cc_prev_status = cc_status;
2496 }
2497#endif
2498
2499 /* Detect insns that are really jump-tables
2500 and output them as such. */
2501
2502 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2503 {
7f7f8214 2504#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
3cf2715d 2505 register int vlen, idx;
7f7f8214 2506#endif
3cf2715d
DE
2507
2508 if (prescan > 0)
2509 break;
2510
2511 if (app_on)
2512 {
51723711 2513 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2514 app_on = 0;
2515 }
2516
e0d80184
DM
2517#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2518 if (GET_CODE (body) == ADDR_VEC)
2519 {
2520#ifdef ASM_OUTPUT_ADDR_VEC
2521 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2522#else
2523 abort();
2524#endif
2525 }
2526 else
2527 {
2528#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2529 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2530#else
2531 abort();
2532#endif
2533 }
2534#else
3cf2715d
DE
2535 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2536 for (idx = 0; idx < vlen; idx++)
2537 {
2538 if (GET_CODE (body) == ADDR_VEC)
2539 {
2540#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2541 ASM_OUTPUT_ADDR_VEC_ELT
2542 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2543#else
2544 abort ();
2545#endif
2546 }
2547 else
2548 {
2549#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2550 ASM_OUTPUT_ADDR_DIFF_ELT
2551 (file,
33f7f353 2552 body,
3cf2715d
DE
2553 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2554 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2555#else
2556 abort ();
2557#endif
2558 }
2559 }
2560#ifdef ASM_OUTPUT_CASE_END
2561 ASM_OUTPUT_CASE_END (file,
2562 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2563 insn);
e0d80184 2564#endif
3cf2715d
DE
2565#endif
2566
4d1065ed 2567 function_section (current_function_decl);
3cf2715d
DE
2568
2569 break;
2570 }
2571
2572 /* Do basic-block profiling when we reach a new block.
2573 Done here to avoid jump tables. */
2574 if (profile_block_flag && new_block)
2575 add_bb (file);
2576
2577 if (GET_CODE (body) == ASM_INPUT)
2578 {
2579 /* There's no telling what that did to the condition codes. */
2580 CC_STATUS_INIT;
2581 if (prescan > 0)
2582 break;
2583 if (! app_on)
2584 {
51723711 2585 fputs (ASM_APP_ON, file);
3cf2715d
DE
2586 app_on = 1;
2587 }
2588 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2589 break;
2590 }
2591
2592 /* Detect `asm' construct with operands. */
2593 if (asm_noperands (body) >= 0)
2594 {
22bf4422 2595 unsigned int noperands = asm_noperands (body);
3cf2715d 2596 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
3cce094d 2597 const char *string;
3cf2715d
DE
2598
2599 /* There's no telling what that did to the condition codes. */
2600 CC_STATUS_INIT;
2601 if (prescan > 0)
2602 break;
2603
2604 if (! app_on)
2605 {
51723711 2606 fputs (ASM_APP_ON, file);
3cf2715d
DE
2607 app_on = 1;
2608 }
2609
2610 /* Get out the operand values. */
2611 string = decode_asm_operands (body, ops, NULL_PTR,
2612 NULL_PTR, NULL_PTR);
2613 /* Inhibit aborts on what would otherwise be compiler bugs. */
2614 insn_noperands = noperands;
2615 this_is_asm_operands = insn;
2616
2617 /* Output the insn using them. */
2618 output_asm_insn (string, ops);
2619 this_is_asm_operands = 0;
2620 break;
2621 }
2622
2623 if (prescan <= 0 && app_on)
2624 {
51723711 2625 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2626 app_on = 0;
2627 }
2628
2629 if (GET_CODE (body) == SEQUENCE)
2630 {
2631 /* A delayed-branch sequence */
2632 register int i;
2633 rtx next;
2634
2635 if (prescan > 0)
2636 break;
2637 final_sequence = body;
2638
2639 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2640 force the restoration of a comparison that was previously
2641 thought unnecessary. If that happens, cancel this sequence
2642 and cause that insn to be restored. */
2643
2644 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2645 if (next != XVECEXP (body, 0, 1))
2646 {
2647 final_sequence = 0;
2648 return next;
2649 }
2650
2651 for (i = 1; i < XVECLEN (body, 0); i++)
c7eee2df
RK
2652 {
2653 rtx insn = XVECEXP (body, 0, i);
2654 rtx next = NEXT_INSN (insn);
2655 /* We loop in case any instruction in a delay slot gets
2656 split. */
2657 do
2658 insn = final_scan_insn (insn, file, 0, prescan, 1);
2659 while (insn != next);
2660 }
3cf2715d
DE
2661#ifdef DBR_OUTPUT_SEQEND
2662 DBR_OUTPUT_SEQEND (file);
2663#endif
2664 final_sequence = 0;
2665
2666 /* If the insn requiring the delay slot was a CALL_INSN, the
2667 insns in the delay slot are actually executed before the
2668 called function. Hence we don't preserve any CC-setting
2669 actions in these insns and the CC must be marked as being
2670 clobbered by the function. */
2671 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
b729186a
JL
2672 {
2673 CC_STATUS_INIT;
2674 }
3cf2715d
DE
2675
2676 /* Following a conditional branch sequence, we have a new basic
2677 block. */
2678 if (profile_block_flag)
2679 {
2680 rtx insn = XVECEXP (body, 0, 0);
2681 rtx body = PATTERN (insn);
2682
2683 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2684 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2685 || (GET_CODE (insn) == JUMP_INSN
2686 && GET_CODE (body) == PARALLEL
2687 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2688 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2689 new_block = 1;
2690 }
2691 break;
2692 }
2693
2694 /* We have a real machine instruction as rtl. */
2695
2696 body = PATTERN (insn);
2697
2698#ifdef HAVE_cc0
b88c92cc
RK
2699 set = single_set(insn);
2700
3cf2715d
DE
2701 /* Check for redundant test and compare instructions
2702 (when the condition codes are already set up as desired).
2703 This is done only when optimizing; if not optimizing,
2704 it should be possible for the user to alter a variable
2705 with the debugger in between statements
2706 and the next statement should reexamine the variable
2707 to compute the condition codes. */
2708
30f5e9f5 2709 if (optimize)
3cf2715d 2710 {
b88c92cc 2711#if 0
30f5e9f5 2712 rtx set = single_set(insn);
b88c92cc 2713#endif
30f5e9f5
RK
2714
2715 if (set
2716 && GET_CODE (SET_DEST (set)) == CC0
2717 && insn != last_ignored_compare)
3cf2715d 2718 {
30f5e9f5
RK
2719 if (GET_CODE (SET_SRC (set)) == SUBREG)
2720 SET_SRC (set) = alter_subreg (SET_SRC (set));
2721 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2722 {
2723 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2724 XEXP (SET_SRC (set), 0)
2725 = alter_subreg (XEXP (SET_SRC (set), 0));
2726 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2727 XEXP (SET_SRC (set), 1)
2728 = alter_subreg (XEXP (SET_SRC (set), 1));
2729 }
2730 if ((cc_status.value1 != 0
2731 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2732 || (cc_status.value2 != 0
2733 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
3cf2715d 2734 {
30f5e9f5
RK
2735 /* Don't delete insn if it has an addressing side-effect. */
2736 if (! FIND_REG_INC_NOTE (insn, 0)
2737 /* or if anything in it is volatile. */
2738 && ! volatile_refs_p (PATTERN (insn)))
2739 {
2740 /* We don't really delete the insn; just ignore it. */
2741 last_ignored_compare = insn;
2742 break;
2743 }
3cf2715d
DE
2744 }
2745 }
2746 }
2747#endif
2748
2749 /* Following a conditional branch, we have a new basic block.
2750 But if we are inside a sequence, the new block starts after the
2751 last insn of the sequence. */
2752 if (profile_block_flag && final_sequence == 0
2753 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2754 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2755 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2756 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2757 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2758 new_block = 1;
2759
2760#ifndef STACK_REGS
2761 /* Don't bother outputting obvious no-ops, even without -O.
2762 This optimization is fast and doesn't interfere with debugging.
2763 Don't do this if the insn is in a delay slot, since this
2764 will cause an improper number of delay insns to be written. */
2765 if (final_sequence == 0
2766 && prescan >= 0
2767 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2768 && GET_CODE (SET_SRC (body)) == REG
2769 && GET_CODE (SET_DEST (body)) == REG
2770 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2771 break;
2772#endif
2773
2774#ifdef HAVE_cc0
2775 /* If this is a conditional branch, maybe modify it
2776 if the cc's are in a nonstandard state
2777 so that it accomplishes the same thing that it would
2778 do straightforwardly if the cc's were set up normally. */
2779
2780 if (cc_status.flags != 0
2781 && GET_CODE (insn) == JUMP_INSN
2782 && GET_CODE (body) == SET
2783 && SET_DEST (body) == pc_rtx
2784 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
de2b56f9 2785 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
fff752ad 2786 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
3cf2715d
DE
2787 /* This is done during prescan; it is not done again
2788 in final scan when prescan has been done. */
2789 && prescan >= 0)
2790 {
2791 /* This function may alter the contents of its argument
2792 and clear some of the cc_status.flags bits.
2793 It may also return 1 meaning condition now always true
2794 or -1 meaning condition now always false
2795 or 2 meaning condition nontrivial but altered. */
2796 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2797 /* If condition now has fixed value, replace the IF_THEN_ELSE
2798 with its then-operand or its else-operand. */
2799 if (result == 1)
2800 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2801 if (result == -1)
2802 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2803
2804 /* The jump is now either unconditional or a no-op.
2805 If it has become a no-op, don't try to output it.
2806 (It would not be recognized.) */
2807 if (SET_SRC (body) == pc_rtx)
2808 {
2809 PUT_CODE (insn, NOTE);
2810 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2811 NOTE_SOURCE_FILE (insn) = 0;
2812 break;
2813 }
2814 else if (GET_CODE (SET_SRC (body)) == RETURN)
2815 /* Replace (set (pc) (return)) with (return). */
2816 PATTERN (insn) = body = SET_SRC (body);
2817
2818 /* Rerecognize the instruction if it has changed. */
2819 if (result != 0)
2820 INSN_CODE (insn) = -1;
2821 }
2822
2823 /* Make same adjustments to instructions that examine the
462da2af
SC
2824 condition codes without jumping and instructions that
2825 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2826
2827 if (cc_status.flags != 0
b88c92cc 2828 && set != 0)
3cf2715d 2829 {
462da2af
SC
2830 rtx cond_rtx, then_rtx, else_rtx;
2831
2832 if (GET_CODE (insn) != JUMP_INSN
b88c92cc 2833 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2834 {
b88c92cc
RK
2835 cond_rtx = XEXP (SET_SRC (set), 0);
2836 then_rtx = XEXP (SET_SRC (set), 1);
2837 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2838 }
2839 else
2840 {
b88c92cc 2841 cond_rtx = SET_SRC (set);
462da2af
SC
2842 then_rtx = const_true_rtx;
2843 else_rtx = const0_rtx;
2844 }
2845
2846 switch (GET_CODE (cond_rtx))
3cf2715d
DE
2847 {
2848 case GTU:
2849 case GT:
2850 case LTU:
2851 case LT:
2852 case GEU:
2853 case GE:
2854 case LEU:
2855 case LE:
2856 case EQ:
2857 case NE:
2858 {
2859 register int result;
462da2af 2860 if (XEXP (cond_rtx, 0) != cc0_rtx)
3cf2715d 2861 break;
462da2af 2862 result = alter_cond (cond_rtx);
3cf2715d 2863 if (result == 1)
b88c92cc 2864 validate_change (insn, &SET_SRC (set), then_rtx, 0);
3cf2715d 2865 else if (result == -1)
b88c92cc 2866 validate_change (insn, &SET_SRC (set), else_rtx, 0);
3cf2715d
DE
2867 else if (result == 2)
2868 INSN_CODE (insn) = -1;
b88c92cc 2869 if (SET_DEST (set) == SET_SRC (set))
462da2af
SC
2870 {
2871 PUT_CODE (insn, NOTE);
2872 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2873 NOTE_SOURCE_FILE (insn) = 0;
462da2af 2874 }
3cf2715d 2875 }
e9a25f70
JL
2876 break;
2877
2878 default:
2879 break;
3cf2715d
DE
2880 }
2881 }
462da2af 2882
3cf2715d
DE
2883#endif
2884
ede7cd44 2885#ifdef HAVE_peephole
3cf2715d
DE
2886 /* Do machine-specific peephole optimizations if desired. */
2887
2888 if (optimize && !flag_no_peephole && !nopeepholes)
2889 {
2890 rtx next = peephole (insn);
2891 /* When peepholing, if there were notes within the peephole,
2892 emit them before the peephole. */
2893 if (next != 0 && next != NEXT_INSN (insn))
2894 {
2895 rtx prev = PREV_INSN (insn);
2896 rtx note;
2897
2898 for (note = NEXT_INSN (insn); note != next;
2899 note = NEXT_INSN (note))
2900 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2901
2902 /* In case this is prescan, put the notes
2903 in proper position for later rescan. */
2904 note = NEXT_INSN (insn);
2905 PREV_INSN (note) = prev;
2906 NEXT_INSN (prev) = note;
2907 NEXT_INSN (PREV_INSN (next)) = insn;
2908 PREV_INSN (insn) = PREV_INSN (next);
2909 NEXT_INSN (insn) = next;
2910 PREV_INSN (next) = insn;
2911 }
2912
2913 /* PEEPHOLE might have changed this. */
2914 body = PATTERN (insn);
2915 }
ede7cd44 2916#endif
3cf2715d
DE
2917
2918 /* Try to recognize the instruction.
2919 If successful, verify that the operands satisfy the
2920 constraints for the instruction. Crash if they don't,
2921 since `reload' should have changed them so that they do. */
2922
2923 insn_code_number = recog_memoized (insn);
0eadeb15 2924 extract_insn (insn);
0304f787 2925 cleanup_subreg_operands (insn);
3cf2715d 2926
0eadeb15 2927 if (! constrain_operands (1))
3cf2715d 2928 fatal_insn_not_found (insn);
3cf2715d
DE
2929
2930 /* Some target machines need to prescan each insn before
2931 it is output. */
2932
2933#ifdef FINAL_PRESCAN_INSN
1ccbefce 2934 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
3cf2715d
DE
2935#endif
2936
afe48e06
RH
2937#ifdef HAVE_conditional_execution
2938 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2939 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2940 else
2941 current_insn_predicate = NULL_RTX;
2942#endif
2943
3cf2715d
DE
2944#ifdef HAVE_cc0
2945 cc_prev_status = cc_status;
2946
2947 /* Update `cc_status' for this instruction.
2948 The instruction's output routine may change it further.
2949 If the output routine for a jump insn needs to depend
2950 on the cc status, it should look at cc_prev_status. */
2951
2952 NOTICE_UPDATE_CC (body, insn);
2953#endif
2954
b1a9f6a0 2955 current_output_insn = debug_insn = insn;
3cf2715d 2956
f73ad30e 2957#if defined (DWARF2_UNWIND_INFO)
b57d9225 2958 /* If we push arguments, we want to know where the calls are. */
f73ad30e
JH
2959 if (!ACCUMULATE_OUTGOING_ARGS && GET_CODE (insn) == CALL_INSN
2960 && dwarf2out_do_frame ())
b57d9225
JM
2961 dwarf2out_frame_debug (insn);
2962#endif
2963
4bbf910e
RH
2964 /* Find the proper template for this insn. */
2965 template = get_insn_template (insn_code_number, insn);
3cf2715d 2966
4bbf910e
RH
2967 /* If the C code returns 0, it means that it is a jump insn
2968 which follows a deleted test insn, and that test insn
2969 needs to be reinserted. */
3cf2715d
DE
2970 if (template == 0)
2971 {
efd0378b
HPN
2972 rtx prev;
2973
4bbf910e
RH
2974 if (prev_nonnote_insn (insn) != last_ignored_compare)
2975 abort ();
2976 new_block = 0;
efd0378b
HPN
2977
2978 /* We have already processed the notes between the setter and
2979 the user. Make sure we don't process them again, this is
2980 particularly important if one of the notes is a block
2981 scope note or an EH note. */
2982 for (prev = insn;
2983 prev != last_ignored_compare;
2984 prev = PREV_INSN (prev))
2985 {
2986 if (GET_CODE (prev) == NOTE)
2987 {
2988 NOTE_LINE_NUMBER (prev) = NOTE_INSN_DELETED;
2989 NOTE_SOURCE_FILE (prev) = 0;
2990 }
2991 }
2992
2993 return prev;
3cf2715d
DE
2994 }
2995
2996 /* If the template is the string "#", it means that this insn must
2997 be split. */
2998 if (template[0] == '#' && template[1] == '\0')
2999 {
3000 rtx new = try_split (body, insn, 0);
3001
3002 /* If we didn't split the insn, go away. */
3003 if (new == insn && PATTERN (new) == body)
cf879efa 3004 fatal_insn ("Could not split insn", insn);
3cf2715d 3005
3d14e82f
JW
3006#ifdef HAVE_ATTR_length
3007 /* This instruction should have been split in shorten_branches,
3008 to ensure that we would have valid length info for the
3009 splitees. */
3010 abort ();
3011#endif
3012
3cf2715d
DE
3013 new_block = 0;
3014 return new;
3015 }
3016
3017 if (prescan > 0)
3018 break;
3019
ce152ef8
AM
3020#ifdef IA64_UNWIND_INFO
3021 IA64_UNWIND_EMIT (asm_out_file, insn);
3022#endif
3cf2715d
DE
3023 /* Output assembler code from the template. */
3024
1ccbefce 3025 output_asm_insn (template, recog_data.operand);
3cf2715d 3026
0021b564 3027#if defined (DWARF2_UNWIND_INFO)
0021b564
JM
3028 /* If we push arguments, we need to check all insns for stack
3029 adjustments. */
f73ad30e
JH
3030 if (!ACCUMULATE_OUTGOING_ARGS)
3031 {
3032 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
3033 dwarf2out_frame_debug (insn);
3034 }
3035 else
3036 {
0021b564 3037#if defined (HAVE_prologue)
f73ad30e
JH
3038 /* If this insn is part of the prologue, emit DWARF v2
3039 call frame info. */
3040 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
3041 dwarf2out_frame_debug (insn);
0021b564 3042#endif
f73ad30e 3043 }
0021b564 3044#endif
469ac993 3045
3cf2715d
DE
3046#if 0
3047 /* It's not at all clear why we did this and doing so interferes
3048 with tests we'd like to do to use REG_WAS_0 notes, so let's try
3049 with this out. */
3050
3051 /* Mark this insn as having been output. */
3052 INSN_DELETED_P (insn) = 1;
3053#endif
3054
b1a9f6a0 3055 current_output_insn = debug_insn = 0;
3cf2715d
DE
3056 }
3057 }
3058 return NEXT_INSN (insn);
3059}
3060\f
3061/* Output debugging info to the assembler file FILE
3062 based on the NOTE-insn INSN, assumed to be a line number. */
3063
3064static void
3065output_source_line (file, insn)
6a651371 3066 FILE *file ATTRIBUTE_UNUSED;
3cf2715d
DE
3067 rtx insn;
3068{
3cce094d 3069 register const char *filename = NOTE_SOURCE_FILE (insn);
3cf2715d
DE
3070
3071 /* Remember filename for basic block profiling.
3072 Filenames are allocated on the permanent obstack
3073 or are passed in ARGV, so we don't have to save
3074 the string. */
3075
3076 if (profile_block_flag && last_filename != filename)
3077 bb_file_label_num = add_bb_string (filename, TRUE);
3078
3079 last_filename = filename;
3080 last_linenum = NOTE_LINE_NUMBER (insn);
eac40081
RK
3081 high_block_linenum = MAX (last_linenum, high_block_linenum);
3082 high_function_linenum = MAX (last_linenum, high_function_linenum);
3cf2715d
DE
3083
3084 if (write_symbols != NO_DEBUG)
3085 {
3086#ifdef SDB_DEBUGGING_INFO
3087 if (write_symbols == SDB_DEBUG
3088#if 0 /* People like having line numbers even in wrong file! */
3089 /* COFF can't handle multiple source files--lose, lose. */
3090 && !strcmp (filename, main_input_filename)
3091#endif
3092 /* COFF relative line numbers must be positive. */
3093 && last_linenum > sdb_begin_function_line)
3094 {
3095#ifdef ASM_OUTPUT_SOURCE_LINE
3096 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
3097#else
3098 fprintf (file, "\t.ln\t%d\n",
3099 ((sdb_begin_function_line > -1)
3100 ? last_linenum - sdb_begin_function_line : 1));
3101#endif
3102 }
3103#endif
3104
3105#if defined (DBX_DEBUGGING_INFO)
3106 if (write_symbols == DBX_DEBUG)
3107 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
3108#endif
3109
3110#if defined (XCOFF_DEBUGGING_INFO)
3111 if (write_symbols == XCOFF_DEBUG)
3112 xcoffout_source_line (file, filename, insn);
3113#endif
3114
3115#ifdef DWARF_DEBUGGING_INFO
3116 if (write_symbols == DWARF_DEBUG)
3117 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
3118#endif
9a666dda
JM
3119
3120#ifdef DWARF2_DEBUGGING_INFO
3121 if (write_symbols == DWARF2_DEBUG)
3122 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
3123#endif
3cf2715d
DE
3124 }
3125}
3126\f
0304f787
JL
3127
3128/* For each operand in INSN, simplify (subreg (reg)) so that it refers
3129 directly to the desired hard register. */
3130void
3131cleanup_subreg_operands (insn)
3132 rtx insn;
3133{
f62a15e3
BS
3134 int i;
3135
0eadeb15 3136 extract_insn (insn);
1ccbefce 3137 for (i = 0; i < recog_data.n_operands; i++)
0304f787 3138 {
1ccbefce
RH
3139 if (GET_CODE (recog_data.operand[i]) == SUBREG)
3140 recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
3141 else if (GET_CODE (recog_data.operand[i]) == PLUS
3142 || GET_CODE (recog_data.operand[i]) == MULT)
3143 recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
0304f787
JL
3144 }
3145
1ccbefce 3146 for (i = 0; i < recog_data.n_dups; i++)
0304f787 3147 {
1ccbefce
RH
3148 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3149 *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
3150 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3151 || GET_CODE (*recog_data.dup_loc[i]) == MULT)
3152 *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
0304f787
JL
3153 }
3154}
3155
3cf2715d
DE
3156/* If X is a SUBREG, replace it with a REG or a MEM,
3157 based on the thing it is a subreg of. */
3158
3159rtx
3160alter_subreg (x)
3161 register rtx x;
3162{
3163 register rtx y = SUBREG_REG (x);
f5963e61 3164
3cf2715d
DE
3165 if (GET_CODE (y) == SUBREG)
3166 y = alter_subreg (y);
3167
f5963e61
JL
3168 /* If reload is operating, we may be replacing inside this SUBREG.
3169 Check for that and make a new one if so. */
3170 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
3171 x = copy_rtx (x);
3172
3cf2715d
DE
3173 if (GET_CODE (y) == REG)
3174 {
ef178af3 3175 int regno;
ce4d78eb
RH
3176 /* If the word size is larger than the size of this register,
3177 adjust the register number to compensate. */
3178 /* ??? Note that this just catches stragglers created by/for
3179 integrate. It would be better if we either caught these
3180 earlier, or kept _all_ subregs until now and eliminate
3181 gen_lowpart and friends. */
3182
ce4d78eb 3183#ifdef ALTER_HARD_SUBREG
ef178af3
ZW
3184 regno = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
3185 GET_MODE (y), REGNO (y));
ce4d78eb 3186#else
ef178af3 3187 regno = REGNO (y) + SUBREG_WORD (x);
ce4d78eb 3188#endif
ef178af3
ZW
3189 PUT_CODE (x, REG);
3190 REGNO (x) = regno;
0304f787
JL
3191 /* This field has a different meaning for REGs and SUBREGs. Make sure
3192 to clear it! */
3193 x->used = 0;
3cf2715d
DE
3194 }
3195 else if (GET_CODE (y) == MEM)
3196 {
3197 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
bf49b139 3198
f76b9db2
ILT
3199 if (BYTES_BIG_ENDIAN)
3200 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3201 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3cf2715d 3202 PUT_CODE (x, MEM);
c6df88cb 3203 MEM_COPY_ATTRIBUTES (x, y);
3cf2715d
DE
3204 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3205 }
3206
3207 return x;
3208}
3209
3210/* Do alter_subreg on all the SUBREGs contained in X. */
3211
3212static rtx
3213walk_alter_subreg (x)
3214 rtx x;
3215{
3216 switch (GET_CODE (x))
3217 {
3218 case PLUS:
3219 case MULT:
3220 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3221 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3222 break;
3223
3224 case MEM:
3225 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3226 break;
3227
3228 case SUBREG:
3229 return alter_subreg (x);
e9a25f70
JL
3230
3231 default:
3232 break;
3cf2715d
DE
3233 }
3234
3235 return x;
3236}
3237\f
3238#ifdef HAVE_cc0
3239
3240/* Given BODY, the body of a jump instruction, alter the jump condition
3241 as required by the bits that are set in cc_status.flags.
3242 Not all of the bits there can be handled at this level in all cases.
3243
3244 The value is normally 0.
3245 1 means that the condition has become always true.
3246 -1 means that the condition has become always false.
3247 2 means that COND has been altered. */
3248
3249static int
3250alter_cond (cond)
3251 register rtx cond;
3252{
3253 int value = 0;
3254
3255 if (cc_status.flags & CC_REVERSED)
3256 {
3257 value = 2;
3258 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3259 }
3260
3261 if (cc_status.flags & CC_INVERTED)
3262 {
3263 value = 2;
3264 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3265 }
3266
3267 if (cc_status.flags & CC_NOT_POSITIVE)
3268 switch (GET_CODE (cond))
3269 {
3270 case LE:
3271 case LEU:
3272 case GEU:
3273 /* Jump becomes unconditional. */
3274 return 1;
3275
3276 case GT:
3277 case GTU:
3278 case LTU:
3279 /* Jump becomes no-op. */
3280 return -1;
3281
3282 case GE:
3283 PUT_CODE (cond, EQ);
3284 value = 2;
3285 break;
3286
3287 case LT:
3288 PUT_CODE (cond, NE);
3289 value = 2;
3290 break;
e9a25f70
JL
3291
3292 default:
3293 break;
3cf2715d
DE
3294 }
3295
3296 if (cc_status.flags & CC_NOT_NEGATIVE)
3297 switch (GET_CODE (cond))
3298 {
3299 case GE:
3300 case GEU:
3301 /* Jump becomes unconditional. */
3302 return 1;
3303
3304 case LT:
3305 case LTU:
3306 /* Jump becomes no-op. */
3307 return -1;
3308
3309 case LE:
3310 case LEU:
3311 PUT_CODE (cond, EQ);
3312 value = 2;
3313 break;
3314
3315 case GT:
3316 case GTU:
3317 PUT_CODE (cond, NE);
3318 value = 2;
3319 break;
e9a25f70
JL
3320
3321 default:
3322 break;
3cf2715d
DE
3323 }
3324
3325 if (cc_status.flags & CC_NO_OVERFLOW)
3326 switch (GET_CODE (cond))
3327 {
3328 case GEU:
3329 /* Jump becomes unconditional. */
3330 return 1;
3331
3332 case LEU:
3333 PUT_CODE (cond, EQ);
3334 value = 2;
3335 break;
3336
3337 case GTU:
3338 PUT_CODE (cond, NE);
3339 value = 2;
3340 break;
3341
3342 case LTU:
3343 /* Jump becomes no-op. */
3344 return -1;
e9a25f70
JL
3345
3346 default:
3347 break;
3cf2715d
DE
3348 }
3349
3350 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3351 switch (GET_CODE (cond))
3352 {
e9a25f70 3353 default:
3cf2715d
DE
3354 abort ();
3355
3356 case NE:
3357 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3358 value = 2;
3359 break;
3360
3361 case EQ:
3362 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3363 value = 2;
3364 break;
3365 }
3366
3367 if (cc_status.flags & CC_NOT_SIGNED)
3368 /* The flags are valid if signed condition operators are converted
3369 to unsigned. */
3370 switch (GET_CODE (cond))
3371 {
3372 case LE:
3373 PUT_CODE (cond, LEU);
3374 value = 2;
3375 break;
3376
3377 case LT:
3378 PUT_CODE (cond, LTU);
3379 value = 2;
3380 break;
3381
3382 case GT:
3383 PUT_CODE (cond, GTU);
3384 value = 2;
3385 break;
3386
3387 case GE:
3388 PUT_CODE (cond, GEU);
3389 value = 2;
3390 break;
e9a25f70
JL
3391
3392 default:
3393 break;
3cf2715d
DE
3394 }
3395
3396 return value;
3397}
3398#endif
3399\f
3400/* Report inconsistency between the assembler template and the operands.
3401 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3402
3403void
ab87f8c8
JL
3404output_operand_lossage (msgid)
3405 const char *msgid;
3cf2715d
DE
3406{
3407 if (this_is_asm_operands)
ab87f8c8 3408 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
3cf2715d 3409 else
987009bf
ZW
3410 {
3411 error ("output_operand: %s", _(msgid));
3412 abort ();
3413 }
3cf2715d
DE
3414}
3415\f
3416/* Output of assembler code from a template, and its subroutines. */
3417
3418/* Output text from TEMPLATE to the assembler output file,
3419 obeying %-directions to substitute operands taken from
3420 the vector OPERANDS.
3421
3422 %N (for N a digit) means print operand N in usual manner.
3423 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3424 and print the label name with no punctuation.
3425 %cN means require operand N to be a constant
3426 and print the constant expression with no punctuation.
3427 %aN means expect operand N to be a memory address
3428 (not a memory reference!) and print a reference
3429 to that address.
3430 %nN means expect operand N to be a constant
3431 and print a constant expression for minus the value
3432 of the operand, with no other punctuation. */
3433
cb649530
RK
3434static void
3435output_asm_name ()
3436{
3437 if (flag_print_asm_name)
3438 {
3439 /* Annotate the assembly with a comment describing the pattern and
3440 alternative used. */
3441 if (debug_insn)
3442 {
3443 register int num = INSN_CODE (debug_insn);
1db9f6ce 3444 fprintf (asm_out_file, "\t%s %d\t%s",
a995e389
RH
3445 ASM_COMMENT_START, INSN_UID (debug_insn),
3446 insn_data[num].name);
3447 if (insn_data[num].n_alternatives > 1)
cb649530 3448 fprintf (asm_out_file, "/%d", which_alternative + 1);
1db9f6ce 3449#ifdef HAVE_ATTR_length
a995e389
RH
3450 fprintf (asm_out_file, "\t[length = %d]",
3451 get_attr_length (debug_insn));
1db9f6ce 3452#endif
cb649530
RK
3453 /* Clear this so only the first assembler insn
3454 of any rtl insn will get the special comment for -dp. */
3455 debug_insn = 0;
3456 }
3457 }
3458}
3459
3cf2715d
DE
3460void
3461output_asm_insn (template, operands)
9b3142b3 3462 const char *template;
3cf2715d
DE
3463 rtx *operands;
3464{
9b3142b3 3465 register const char *p;
b729186a 3466 register int c;
3cf2715d
DE
3467
3468 /* An insn may return a null string template
3469 in a case where no assembler code is needed. */
3470 if (*template == 0)
3471 return;
3472
3473 p = template;
3474 putc ('\t', asm_out_file);
3475
3476#ifdef ASM_OUTPUT_OPCODE
3477 ASM_OUTPUT_OPCODE (asm_out_file, p);
3478#endif
3479
b729186a 3480 while ((c = *p++))
3cf2715d
DE
3481 switch (c)
3482 {
3cf2715d 3483 case '\n':
cb649530 3484 output_asm_name ();
3cf2715d 3485 putc (c, asm_out_file);
cb649530 3486#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3487 while ((c = *p) == '\t')
3488 {
3489 putc (c, asm_out_file);
3490 p++;
3491 }
3492 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3493#endif
cb649530 3494 break;
3cf2715d
DE
3495
3496#ifdef ASSEMBLER_DIALECT
3497 case '{':
b729186a
JL
3498 {
3499 register int i;
3500
3501 /* If we want the first dialect, do nothing. Otherwise, skip
3502 DIALECT_NUMBER of strings ending with '|'. */
3503 for (i = 0; i < dialect_number; i++)
3504 {
463a8384 3505 while (*p && *p != '}' && *p++ != '|')
b729186a 3506 ;
463a8384
BS
3507 if (*p == '}')
3508 break;
b729186a
JL
3509 if (*p == '|')
3510 p++;
3511 }
3512 }
3cf2715d
DE
3513 break;
3514
3515 case '|':
3516 /* Skip to close brace. */
3517 while (*p && *p++ != '}')
3518 ;
3519 break;
3520
3521 case '}':
3522 break;
3523#endif
3524
3525 case '%':
3526 /* %% outputs a single %. */
3527 if (*p == '%')
3528 {
3529 p++;
3530 putc (c, asm_out_file);
3531 }
3532 /* %= outputs a number which is unique to each insn in the entire
3533 compilation. This is useful for making local labels that are
3534 referred to more than once in a given insn. */
3535 else if (*p == '=')
3536 {
3537 p++;
3538 fprintf (asm_out_file, "%d", insn_counter);
3539 }
3540 /* % followed by a letter and some digits
3541 outputs an operand in a special way depending on the letter.
3542 Letters `acln' are implemented directly.
3543 Other letters are passed to `output_operand' so that
3544 the PRINT_OPERAND macro can define them. */
5f6d3823 3545 else if (ISLOWER(*p) || ISUPPER(*p))
3cf2715d
DE
3546 {
3547 int letter = *p++;
3548 c = atoi (p);
3549
3550 if (! (*p >= '0' && *p <= '9'))
3551 output_operand_lossage ("operand number missing after %-letter");
22bf4422 3552 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3553 output_operand_lossage ("operand number out of range");
3554 else if (letter == 'l')
3555 output_asm_label (operands[c]);
3556 else if (letter == 'a')
3557 output_address (operands[c]);
3558 else if (letter == 'c')
3559 {
3560 if (CONSTANT_ADDRESS_P (operands[c]))
3561 output_addr_const (asm_out_file, operands[c]);
3562 else
3563 output_operand (operands[c], 'c');
3564 }
3565 else if (letter == 'n')
3566 {
3567 if (GET_CODE (operands[c]) == CONST_INT)
21e3a81b 3568 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3cf2715d
DE
3569 - INTVAL (operands[c]));
3570 else
3571 {
3572 putc ('-', asm_out_file);
3573 output_addr_const (asm_out_file, operands[c]);
3574 }
3575 }
3576 else
3577 output_operand (operands[c], letter);
3578
3579 while ((c = *p) >= '0' && c <= '9') p++;
3580 }
3581 /* % followed by a digit outputs an operand the default way. */
3582 else if (*p >= '0' && *p <= '9')
3583 {
3584 c = atoi (p);
22bf4422 3585 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3586 output_operand_lossage ("operand number out of range");
3587 else
3588 output_operand (operands[c], 0);
3589 while ((c = *p) >= '0' && c <= '9') p++;
3590 }
3591 /* % followed by punctuation: output something for that
3592 punctuation character alone, with no operand.
3593 The PRINT_OPERAND macro decides what is actually done. */
3594#ifdef PRINT_OPERAND_PUNCT_VALID_P
973838fd 3595 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char)*p))
3cf2715d
DE
3596 output_operand (NULL_RTX, *p++);
3597#endif
3598 else
3599 output_operand_lossage ("invalid %%-code");
3600 break;
3601
3602 default:
3603 putc (c, asm_out_file);
3604 }
3605
cb649530 3606 output_asm_name ();
3cf2715d
DE
3607
3608 putc ('\n', asm_out_file);
3609}
3610\f
3611/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3612
3613void
3614output_asm_label (x)
3615 rtx x;
3616{
3617 char buf[256];
3618
3619 if (GET_CODE (x) == LABEL_REF)
be1bb652
RH
3620 x = XEXP (x, 0);
3621 if (GET_CODE (x) == CODE_LABEL
3622 || (GET_CODE (x) == NOTE
3623 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3cf2715d
DE
3624 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3625 else
3626 output_operand_lossage ("`%l' operand isn't a label");
3627
3628 assemble_name (asm_out_file, buf);
3629}
3630
3631/* Print operand X using machine-dependent assembler syntax.
3632 The macro PRINT_OPERAND is defined just to control this function.
3633 CODE is a non-digit that preceded the operand-number in the % spec,
3634 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3635 between the % and the digits.
3636 When CODE is a non-letter, X is 0.
3637
3638 The meanings of the letters are machine-dependent and controlled
3639 by PRINT_OPERAND. */
3640
3641static void
3642output_operand (x, code)
3643 rtx x;
962f1324 3644 int code ATTRIBUTE_UNUSED;
3cf2715d
DE
3645{
3646 if (x && GET_CODE (x) == SUBREG)
3647 x = alter_subreg (x);
3648
3649 /* If X is a pseudo-register, abort now rather than writing trash to the
3650 assembler file. */
3651
3652 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3653 abort ();
3654
3655 PRINT_OPERAND (asm_out_file, x, code);
3656}
3657
3658/* Print a memory reference operand for address X
3659 using machine-dependent assembler syntax.
3660 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3661
3662void
3663output_address (x)
3664 rtx x;
3665{
3666 walk_alter_subreg (x);
3667 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3668}
3669\f
3670/* Print an integer constant expression in assembler syntax.
3671 Addition and subtraction are the only arithmetic
3672 that may appear in these expressions. */
3673
3674void
3675output_addr_const (file, x)
3676 FILE *file;
3677 rtx x;
3678{
3679 char buf[256];
3680
3681 restart:
3682 switch (GET_CODE (x))
3683 {
3684 case PC:
3685 if (flag_pic)
3686 putc ('.', file);
3687 else
3688 abort ();
3689 break;
3690
3691 case SYMBOL_REF:
3692 assemble_name (file, XSTR (x, 0));
3693 break;
3694
3695 case LABEL_REF:
3696 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3697 assemble_name (file, buf);
3698 break;
3699
3700 case CODE_LABEL:
3701 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3702 assemble_name (file, buf);
3703 break;
3704
3705 case CONST_INT:
21e3a81b 3706 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
3707 break;
3708
3709 case CONST:
3710 /* This used to output parentheses around the expression,
3711 but that does not work on the 386 (either ATT or BSD assembler). */
3712 output_addr_const (file, XEXP (x, 0));
3713 break;
3714
3715 case CONST_DOUBLE:
3716 if (GET_MODE (x) == VOIDmode)
3717 {
3718 /* We can use %d if the number is one word and positive. */
3719 if (CONST_DOUBLE_HIGH (x))
21e3a81b 3720 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3cf2715d
DE
3721 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3722 else if (CONST_DOUBLE_LOW (x) < 0)
21e3a81b 3723 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3cf2715d 3724 else
21e3a81b 3725 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
3726 }
3727 else
3728 /* We can't handle floating point constants;
3729 PRINT_OPERAND must handle them. */
3730 output_operand_lossage ("floating constant misused");
3731 break;
3732
3733 case PLUS:
3734 /* Some assemblers need integer constants to appear last (eg masm). */
3735 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3736 {
3737 output_addr_const (file, XEXP (x, 1));
3738 if (INTVAL (XEXP (x, 0)) >= 0)
3739 fprintf (file, "+");
3740 output_addr_const (file, XEXP (x, 0));
3741 }
3742 else
3743 {
3744 output_addr_const (file, XEXP (x, 0));
3745 if (INTVAL (XEXP (x, 1)) >= 0)
3746 fprintf (file, "+");
3747 output_addr_const (file, XEXP (x, 1));
3748 }
3749 break;
3750
3751 case MINUS:
3752 /* Avoid outputting things like x-x or x+5-x,
3753 since some assemblers can't handle that. */
3754 x = simplify_subtraction (x);
3755 if (GET_CODE (x) != MINUS)
3756 goto restart;
3757
3758 output_addr_const (file, XEXP (x, 0));
3759 fprintf (file, "-");
3760 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3761 && INTVAL (XEXP (x, 1)) < 0)
3762 {
b6c8689d 3763 fprintf (file, "%s", ASM_OPEN_PAREN);
3cf2715d 3764 output_addr_const (file, XEXP (x, 1));
b6c8689d 3765 fprintf (file, "%s", ASM_CLOSE_PAREN);
3cf2715d
DE
3766 }
3767 else
3768 output_addr_const (file, XEXP (x, 1));
3769 break;
3770
3771 case ZERO_EXTEND:
3772 case SIGN_EXTEND:
3773 output_addr_const (file, XEXP (x, 0));
3774 break;
3775
3776 default:
3777 output_operand_lossage ("invalid expression as operand");
3778 }
3779}
3780\f
3781/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3782 %R prints the value of REGISTER_PREFIX.
3783 %L prints the value of LOCAL_LABEL_PREFIX.
3784 %U prints the value of USER_LABEL_PREFIX.
3785 %I prints the value of IMMEDIATE_PREFIX.
3786 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3787 Also supported are %d, %x, %s, %e, %f, %g and %%.
3788
3789 We handle alternate assembler dialects here, just like output_asm_insn. */
3790
3791void
711d877c 3792asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3cf2715d 3793{
5148a72b 3794#ifndef ANSI_PROTOTYPES
3cf2715d 3795 FILE *file;
87e11268 3796 const char *p;
3cf2715d
DE
3797#endif
3798 va_list argptr;
3799 char buf[10];
3800 char *q, c;
3cf2715d
DE
3801
3802 VA_START (argptr, p);
3803
5148a72b 3804#ifndef ANSI_PROTOTYPES
0f41302f 3805 file = va_arg (argptr, FILE *);
87e11268 3806 p = va_arg (argptr, const char *);
3cf2715d
DE
3807#endif
3808
3809 buf[0] = '%';
3810
b729186a 3811 while ((c = *p++))
3cf2715d
DE
3812 switch (c)
3813 {
3814#ifdef ASSEMBLER_DIALECT
3815 case '{':
b729186a
JL
3816 {
3817 int i;
3cf2715d 3818
b729186a
JL
3819 /* If we want the first dialect, do nothing. Otherwise, skip
3820 DIALECT_NUMBER of strings ending with '|'. */
3821 for (i = 0; i < dialect_number; i++)
3822 {
3823 while (*p && *p++ != '|')
3824 ;
3825
3826 if (*p == '|')
3827 p++;
3cf2715d 3828 }
b729186a 3829 }
3cf2715d
DE
3830 break;
3831
3832 case '|':
3833 /* Skip to close brace. */
3834 while (*p && *p++ != '}')
3835 ;
3836 break;
3837
3838 case '}':
3839 break;
3840#endif
3841
3842 case '%':
3843 c = *p++;
3844 q = &buf[1];
3845 while ((c >= '0' && c <= '9') || c == '.')
3846 {
3847 *q++ = c;
3848 c = *p++;
3849 }
3850 switch (c)
3851 {
3852 case '%':
3853 fprintf (file, "%%");
3854 break;
3855
3856 case 'd': case 'i': case 'u':
3857 case 'x': case 'p': case 'X':
3858 case 'o':
3859 *q++ = c;
3860 *q = 0;
3861 fprintf (file, buf, va_arg (argptr, int));
3862 break;
3863
3864 case 'w':
3865 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3866 but we do not check for those cases. It means that the value
3867 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3868
21e3a81b
RK
3869#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3870#else
3871#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3872 *q++ = 'l';
3873#else
3874 *q++ = 'l';
3cf2715d 3875 *q++ = 'l';
21e3a81b 3876#endif
3cf2715d
DE
3877#endif
3878
3879 *q++ = *p++;
3880 *q = 0;
3881 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3882 break;
3883
3884 case 'l':
3885 *q++ = c;
3886 *q++ = *p++;
3887 *q = 0;
3888 fprintf (file, buf, va_arg (argptr, long));
3889 break;
3890
3891 case 'e':
3892 case 'f':
3893 case 'g':
3894 *q++ = c;
3895 *q = 0;
3896 fprintf (file, buf, va_arg (argptr, double));
3897 break;
3898
3899 case 's':
3900 *q++ = c;
3901 *q = 0;
3902 fprintf (file, buf, va_arg (argptr, char *));
3903 break;
3904
3905 case 'O':
3906#ifdef ASM_OUTPUT_OPCODE
3907 ASM_OUTPUT_OPCODE (asm_out_file, p);
3908#endif
3909 break;
3910
3911 case 'R':
3912#ifdef REGISTER_PREFIX
3913 fprintf (file, "%s", REGISTER_PREFIX);
3914#endif
3915 break;
3916
3917 case 'I':
3918#ifdef IMMEDIATE_PREFIX
3919 fprintf (file, "%s", IMMEDIATE_PREFIX);
3920#endif
3921 break;
3922
3923 case 'L':
3924#ifdef LOCAL_LABEL_PREFIX
3925 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3926#endif
3927 break;
3928
3929 case 'U':
19283265 3930 fputs (user_label_prefix, file);
3cf2715d
DE
3931 break;
3932
fe0503ea
NC
3933#ifdef ASM_FPRINTF_EXTENSIONS
3934 /* Upper case letters are reserved for general use by asm_fprintf
3935 and so are not available to target specific code. In order to
3936 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3937 they are defined here. As they get turned into real extensions
3938 to asm_fprintf they should be removed from this list. */
3939 case 'A': case 'B': case 'C': case 'D': case 'E':
3940 case 'F': case 'G': case 'H': case 'J': case 'K':
3941 case 'M': case 'N': case 'P': case 'Q': case 'S':
3942 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3943 break;
3944
3945 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3946#endif
3cf2715d
DE
3947 default:
3948 abort ();
3949 }
3950 break;
3951
3952 default:
3953 fputc (c, file);
3954 }
f0305a2b 3955 va_end (argptr);
3cf2715d
DE
3956}
3957\f
3958/* Split up a CONST_DOUBLE or integer constant rtx
3959 into two rtx's for single words,
3960 storing in *FIRST the word that comes first in memory in the target
3961 and in *SECOND the other. */
3962
3963void
3964split_double (value, first, second)
3965 rtx value;
3966 rtx *first, *second;
3967{
3968 if (GET_CODE (value) == CONST_INT)
3969 {
5a1a6efd 3970 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
f76b9db2 3971 {
5a1a6efd 3972 /* In this case the CONST_INT holds both target words.
27eef9ce
JC
3973 Extract the bits from it into two word-sized pieces.
3974 Sign extend each half to HOST_WIDE_INT. */
7f251dee
AO
3975 unsigned HOST_WIDE_INT low, high;
3976 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3977
3978 /* Set sign_bit to the most significant bit of a word. */
3979 sign_bit = 1;
3980 sign_bit <<= BITS_PER_WORD - 1;
3981
3982 /* Set mask so that all bits of the word are set. We could
3983 have used 1 << BITS_PER_WORD instead of basing the
3984 calculation on sign_bit. However, on machines where
3985 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3986 compiler warning, even though the code would never be
3987 executed. */
3988 mask = sign_bit << 1;
3989 mask--;
3990
3991 /* Set sign_extend as any remaining bits. */
3992 sign_extend = ~mask;
3993
3994 /* Pick the lower word and sign-extend it. */
3995 low = INTVAL (value);
3996 low &= mask;
3997 if (low & sign_bit)
3998 low |= sign_extend;
3999
4000 /* Pick the higher word, shifted to the least significant
4001 bits, and sign-extend it. */
4002 high = INTVAL (value);
4003 high >>= BITS_PER_WORD - 1;
4004 high >>= 1;
4005 high &= mask;
4006 if (high & sign_bit)
4007 high |= sign_extend;
4008
4009 /* Store the words in the target machine order. */
5a1a6efd
RK
4010 if (WORDS_BIG_ENDIAN)
4011 {
7f251dee
AO
4012 *first = GEN_INT (high);
4013 *second = GEN_INT (low);
5a1a6efd
RK
4014 }
4015 else
4016 {
7f251dee
AO
4017 *first = GEN_INT (low);
4018 *second = GEN_INT (high);
5a1a6efd 4019 }
f76b9db2
ILT
4020 }
4021 else
4022 {
5a1a6efd
RK
4023 /* The rule for using CONST_INT for a wider mode
4024 is that we regard the value as signed.
4025 So sign-extend it. */
4026 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
4027 if (WORDS_BIG_ENDIAN)
4028 {
4029 *first = high;
4030 *second = value;
4031 }
4032 else
4033 {
4034 *first = value;
4035 *second = high;
4036 }
f76b9db2 4037 }
3cf2715d
DE
4038 }
4039 else if (GET_CODE (value) != CONST_DOUBLE)
4040 {
f76b9db2
ILT
4041 if (WORDS_BIG_ENDIAN)
4042 {
4043 *first = const0_rtx;
4044 *second = value;
4045 }
4046 else
4047 {
4048 *first = value;
4049 *second = const0_rtx;
4050 }
3cf2715d
DE
4051 }
4052 else if (GET_MODE (value) == VOIDmode
4053 /* This is the old way we did CONST_DOUBLE integers. */
4054 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
4055 {
4056 /* In an integer, the words are defined as most and least significant.
4057 So order them by the target's convention. */
f76b9db2
ILT
4058 if (WORDS_BIG_ENDIAN)
4059 {
4060 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4061 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4062 }
4063 else
4064 {
4065 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4066 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4067 }
3cf2715d
DE
4068 }
4069 else
4070 {
4071#ifdef REAL_ARITHMETIC
4072 REAL_VALUE_TYPE r; long l[2];
4073 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
4074
4075 /* Note, this converts the REAL_VALUE_TYPE to the target's
4076 format, splits up the floating point double and outputs
4077 exactly 32 bits of it into each of l[0] and l[1] --
0f41302f 4078 not necessarily BITS_PER_WORD bits. */
3cf2715d
DE
4079 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
4080
b5a3eb84
JW
4081 /* If 32 bits is an entire word for the target, but not for the host,
4082 then sign-extend on the host so that the number will look the same
4083 way on the host that it would on the target. See for instance
4084 simplify_unary_operation. The #if is needed to avoid compiler
4085 warnings. */
4086
4087#if HOST_BITS_PER_LONG > 32
4088 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4089 {
4090 if (l[0] & ((long) 1 << 31))
4091 l[0] |= ((long) (-1) << 32);
4092 if (l[1] & ((long) 1 << 31))
4093 l[1] |= ((long) (-1) << 32);
4094 }
4095#endif
4096
3cf2715d
DE
4097 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
4098 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
4099#else
4100 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
4101 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
4102 && ! flag_pretend_float)
7f251dee 4103 abort ();
3cf2715d 4104
f76b9db2
ILT
4105 if (
4106#ifdef HOST_WORDS_BIG_ENDIAN
4107 WORDS_BIG_ENDIAN
3cf2715d 4108#else
f76b9db2 4109 ! WORDS_BIG_ENDIAN
3cf2715d 4110#endif
f76b9db2
ILT
4111 )
4112 {
4113 /* Host and target agree => no need to swap. */
4114 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4115 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4116 }
4117 else
4118 {
4119 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4120 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4121 }
3cf2715d
DE
4122#endif /* no REAL_ARITHMETIC */
4123 }
4124}
4125\f
4126/* Return nonzero if this function has no function calls. */
4127
4128int
4129leaf_function_p ()
4130{
4131 rtx insn;
4132
9e2f9a7f 4133 if (profile_flag || profile_block_flag || profile_arc_flag)
3cf2715d
DE
4134 return 0;
4135
4136 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4137 {
7d167afd
JJ
4138 if (GET_CODE (insn) == CALL_INSN
4139 && ! SIBLING_CALL_P (insn))
3cf2715d
DE
4140 return 0;
4141 if (GET_CODE (insn) == INSN
4142 && GET_CODE (PATTERN (insn)) == SEQUENCE
0a1c58a2
JL
4143 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
4144 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3cf2715d
DE
4145 return 0;
4146 }
4147 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4148 {
7d167afd
JJ
4149 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN
4150 && ! SIBLING_CALL_P (insn))
3cf2715d
DE
4151 return 0;
4152 if (GET_CODE (XEXP (insn, 0)) == INSN
4153 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
0a1c58a2
JL
4154 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN
4155 && ! SIBLING_CALL_P (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)))
3cf2715d
DE
4156 return 0;
4157 }
4158
4159 return 1;
4160}
4161
4162/* On some machines, a function with no call insns
4163 can run faster if it doesn't create its own register window.
4164 When output, the leaf function should use only the "output"
4165 registers. Ordinarily, the function would be compiled to use
4166 the "input" registers to find its arguments; it is a candidate
4167 for leaf treatment if it uses only the "input" registers.
4168 Leaf function treatment means renumbering so the function
4169 uses the "output" registers instead. */
4170
4171#ifdef LEAF_REGISTERS
4172
3cf2715d
DE
4173/* Return 1 if this function uses only the registers that can be
4174 safely renumbered. */
4175
4176int
4177only_leaf_regs_used ()
4178{
4179 int i;
7d167afd 4180 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3cf2715d
DE
4181
4182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e5e809f4
JL
4183 if ((regs_ever_live[i] || global_regs[i])
4184 && ! permitted_reg_in_leaf_functions[i])
4185 return 0;
4186
4187 if (current_function_uses_pic_offset_table
4188 && pic_offset_table_rtx != 0
4189 && GET_CODE (pic_offset_table_rtx) == REG
4190 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4191 return 0;
4192
3cf2715d
DE
4193 return 1;
4194}
4195
4196/* Scan all instructions and renumber all registers into those
4197 available in leaf functions. */
4198
4199static void
4200leaf_renumber_regs (first)
4201 rtx first;
4202{
4203 rtx insn;
4204
4205 /* Renumber only the actual patterns.
4206 The reg-notes can contain frame pointer refs,
4207 and renumbering them could crash, and should not be needed. */
4208 for (insn = first; insn; insn = NEXT_INSN (insn))
4209 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4210 leaf_renumber_regs_insn (PATTERN (insn));
4211 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4212 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
4213 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4214}
4215
4216/* Scan IN_RTX and its subexpressions, and renumber all regs into those
4217 available in leaf functions. */
4218
4219void
4220leaf_renumber_regs_insn (in_rtx)
4221 register rtx in_rtx;
4222{
4223 register int i, j;
6f7d635c 4224 register const char *format_ptr;
3cf2715d
DE
4225
4226 if (in_rtx == 0)
4227 return;
4228
4229 /* Renumber all input-registers into output-registers.
4230 renumbered_regs would be 1 for an output-register;
4231 they */
4232
4233 if (GET_CODE (in_rtx) == REG)
4234 {
4235 int newreg;
4236
4237 /* Don't renumber the same reg twice. */
4238 if (in_rtx->used)
4239 return;
4240
4241 newreg = REGNO (in_rtx);
4242 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4243 to reach here as part of a REG_NOTE. */
4244 if (newreg >= FIRST_PSEUDO_REGISTER)
4245 {
4246 in_rtx->used = 1;
4247 return;
4248 }
4249 newreg = LEAF_REG_REMAP (newreg);
4250 if (newreg < 0)
4251 abort ();
4252 regs_ever_live[REGNO (in_rtx)] = 0;
4253 regs_ever_live[newreg] = 1;
4254 REGNO (in_rtx) = newreg;
4255 in_rtx->used = 1;
4256 }
4257
4258 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
4259 {
4260 /* Inside a SEQUENCE, we find insns.
4261 Renumber just the patterns of these insns,
4262 just as we do for the top-level insns. */
4263 leaf_renumber_regs_insn (PATTERN (in_rtx));
4264 return;
4265 }
4266
4267 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4268
4269 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4270 switch (*format_ptr++)
4271 {
4272 case 'e':
4273 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4274 break;
4275
4276 case 'E':
4277 if (NULL != XVEC (in_rtx, i))
4278 {
4279 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4280 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4281 }
4282 break;
4283
4284 case 'S':
4285 case 's':
4286 case '0':
4287 case 'i':
4288 case 'w':
4289 case 'n':
4290 case 'u':
4291 break;
4292
4293 default:
4294 abort ();
4295 }
4296}
4297#endif
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