]>
Commit | Line | Data |
---|---|---|
3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
d1e082c2 | 2 | Copyright (C) 1987-2013 Free Software Foundation, Inc. |
3cf2715d | 3 | |
1322177d | 4 | This file is part of GCC. |
3cf2715d | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
3cf2715d | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
3cf2715d DE |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 19 | |
3cf2715d DE |
20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
44 | |
45 | #include "config.h" | |
670ee920 | 46 | #include "system.h" |
4977bab6 ZW |
47 | #include "coretypes.h" |
48 | #include "tm.h" | |
3cf2715d DE |
49 | |
50 | #include "tree.h" | |
51 | #include "rtl.h" | |
6baf1cc8 | 52 | #include "tm_p.h" |
3cf2715d DE |
53 | #include "regs.h" |
54 | #include "insn-config.h" | |
3cf2715d | 55 | #include "insn-attr.h" |
3cf2715d DE |
56 | #include "recog.h" |
57 | #include "conditions.h" | |
58 | #include "flags.h" | |
3cf2715d | 59 | #include "hard-reg-set.h" |
3cf2715d | 60 | #include "output.h" |
3d195391 | 61 | #include "except.h" |
49ad7cfa | 62 | #include "function.h" |
0cbd9993 MLI |
63 | #include "rtl-error.h" |
64 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 65 | #include "reload.h" |
ab87f8c8 | 66 | #include "intl.h" |
be1bb652 | 67 | #include "basic-block.h" |
08c148a8 | 68 | #include "target.h" |
ad0c4c36 | 69 | #include "targhooks.h" |
a5a42b92 | 70 | #include "debug.h" |
49d801d3 | 71 | #include "expr.h" |
ef330312 | 72 | #include "tree-pass.h" |
55b34b5f | 73 | #include "tree-flow.h" |
ef330312 PB |
74 | #include "cgraph.h" |
75 | #include "coverage.h" | |
6fb5fa3c | 76 | #include "df.h" |
c8aea42c | 77 | #include "ggc.h" |
edbed3d3 JH |
78 | #include "cfgloop.h" |
79 | #include "params.h" | |
6f4185d7 | 80 | #include "tree-pretty-print.h" /* for dump_function_header */ |
3cf2715d | 81 | |
440aabf8 NB |
82 | #ifdef XCOFF_DEBUGGING_INFO |
83 | #include "xcoffout.h" /* Needed for external data | |
84 | declarations for e.g. AIX 4.x. */ | |
85 | #endif | |
86 | ||
76ead72b | 87 | #include "dwarf2out.h" |
76ead72b | 88 | |
6a08f7b3 DP |
89 | #ifdef DBX_DEBUGGING_INFO |
90 | #include "dbxout.h" | |
91 | #endif | |
92 | ||
ce82daed DB |
93 | #ifdef SDB_DEBUGGING_INFO |
94 | #include "sdbout.h" | |
95 | #endif | |
96 | ||
906668bb BS |
97 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
98 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
99 | #ifndef CC_STATUS_INIT |
100 | #define CC_STATUS_INIT | |
101 | #endif | |
102 | ||
3cf2715d DE |
103 | /* Is the given character a logical line separator for the assembler? */ |
104 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 105 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
106 | #endif |
107 | ||
75197b37 BS |
108 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
109 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
110 | #endif | |
111 | ||
589fe865 DJ |
112 | /* Bitflags used by final_scan_insn. */ |
113 | #define SEEN_BB 1 | |
114 | #define SEEN_NOTE 2 | |
115 | #define SEEN_EMITTED 4 | |
116 | ||
3cf2715d | 117 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
118 | static rtx debug_insn; |
119 | rtx current_output_insn; | |
3cf2715d DE |
120 | |
121 | /* Line number of last NOTE. */ | |
122 | static int last_linenum; | |
123 | ||
6c52e687 CC |
124 | /* Last discriminator written to assembly. */ |
125 | static int last_discriminator; | |
126 | ||
127 | /* Discriminator of current block. */ | |
128 | static int discriminator; | |
129 | ||
eac40081 RK |
130 | /* Highest line number in current block. */ |
131 | static int high_block_linenum; | |
132 | ||
133 | /* Likewise for function. */ | |
134 | static int high_function_linenum; | |
135 | ||
3cf2715d | 136 | /* Filename of last NOTE. */ |
3cce094d | 137 | static const char *last_filename; |
3cf2715d | 138 | |
d752cfdb JJ |
139 | /* Override filename and line number. */ |
140 | static const char *override_filename; | |
141 | static int override_linenum; | |
142 | ||
b8176fe4 EB |
143 | /* Whether to force emission of a line note before the next insn. */ |
144 | static bool force_source_line = false; | |
b0efb46b | 145 | |
5f2f0edd | 146 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 147 | |
3cf2715d | 148 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 149 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 150 | The precise value is the insn being output, to pass to error_for_asm. */ |
c8b94768 | 151 | rtx this_is_asm_operands; |
3cf2715d DE |
152 | |
153 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 154 | static unsigned int insn_noperands; |
3cf2715d DE |
155 | |
156 | /* Compare optimization flag. */ | |
157 | ||
158 | static rtx last_ignored_compare = 0; | |
159 | ||
3cf2715d DE |
160 | /* Assign a unique number to each insn that is output. |
161 | This can be used to generate unique local labels. */ | |
162 | ||
163 | static int insn_counter = 0; | |
164 | ||
165 | #ifdef HAVE_cc0 | |
166 | /* This variable contains machine-dependent flags (defined in tm.h) | |
167 | set and examined by output routines | |
168 | that describe how to interpret the condition codes properly. */ | |
169 | ||
170 | CC_STATUS cc_status; | |
171 | ||
172 | /* During output of an insn, this contains a copy of cc_status | |
173 | from before the insn. */ | |
174 | ||
175 | CC_STATUS cc_prev_status; | |
176 | #endif | |
177 | ||
18c038b9 | 178 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
179 | |
180 | static int block_depth; | |
181 | ||
182 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
183 | ||
184 | static int app_on; | |
185 | ||
186 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
187 | Zero otherwise. */ | |
188 | ||
189 | rtx final_sequence; | |
190 | ||
191 | #ifdef ASSEMBLER_DIALECT | |
192 | ||
193 | /* Number of the assembler dialect to use, starting at 0. */ | |
194 | static int dialect_number; | |
195 | #endif | |
196 | ||
afe48e06 RH |
197 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
198 | rtx current_insn_predicate; | |
afe48e06 | 199 | |
6ca5d1f6 JJ |
200 | /* True if printing into -fdump-final-insns= dump. */ |
201 | bool final_insns_dump_p; | |
202 | ||
ddd84654 JJ |
203 | /* True if profile_function should be called, but hasn't been called yet. */ |
204 | static bool need_profile_function; | |
205 | ||
6cf9ac28 | 206 | static int asm_insn_count (rtx); |
6cf9ac28 AJ |
207 | static void profile_function (FILE *); |
208 | static void profile_after_prologue (FILE *); | |
ed5ef2e4 | 209 | static bool notice_source_line (rtx, bool *); |
6fb5fa3c | 210 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 AJ |
211 | static void output_asm_name (void); |
212 | static void output_alternate_entry_point (FILE *, rtx); | |
213 | static tree get_mem_expr_from_op (rtx, int *); | |
214 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 215 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 216 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
217 | #endif |
218 | #ifdef HAVE_cc0 | |
6cf9ac28 | 219 | static int alter_cond (rtx); |
e9a25f70 | 220 | #endif |
ca3075bd | 221 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 222 | static int final_addr_vec_align (rtx); |
ca3075bd | 223 | #endif |
6cf9ac28 | 224 | static int align_fuzz (rtx, rtx, int, unsigned); |
3cf2715d DE |
225 | \f |
226 | /* Initialize data in final at the beginning of a compilation. */ | |
227 | ||
228 | void | |
6cf9ac28 | 229 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 230 | { |
3cf2715d | 231 | app_on = 0; |
3cf2715d DE |
232 | final_sequence = 0; |
233 | ||
234 | #ifdef ASSEMBLER_DIALECT | |
235 | dialect_number = ASSEMBLER_DIALECT; | |
236 | #endif | |
237 | } | |
238 | ||
08c148a8 | 239 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 240 | |
08c148a8 NB |
241 | If not overridden for epilogue code, then the function body itself |
242 | contains return instructions wherever needed. */ | |
243 | void | |
6cf9ac28 AJ |
244 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
245 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
246 | { |
247 | } | |
248 | ||
14d11d40 IS |
249 | void |
250 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
251 | tree decl ATTRIBUTE_UNUSED, | |
252 | bool new_is_cold ATTRIBUTE_UNUSED) | |
253 | { | |
254 | } | |
255 | ||
b4c25db2 NB |
256 | /* Default target hook that outputs nothing to a stream. */ |
257 | void | |
6cf9ac28 | 258 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
259 | { |
260 | } | |
261 | ||
3cf2715d DE |
262 | /* Enable APP processing of subsequent output. |
263 | Used before the output from an `asm' statement. */ | |
264 | ||
265 | void | |
6cf9ac28 | 266 | app_enable (void) |
3cf2715d DE |
267 | { |
268 | if (! app_on) | |
269 | { | |
51723711 | 270 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
271 | app_on = 1; |
272 | } | |
273 | } | |
274 | ||
275 | /* Disable APP processing of subsequent output. | |
276 | Called from varasm.c before most kinds of output. */ | |
277 | ||
278 | void | |
6cf9ac28 | 279 | app_disable (void) |
3cf2715d DE |
280 | { |
281 | if (app_on) | |
282 | { | |
51723711 | 283 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
284 | app_on = 0; |
285 | } | |
286 | } | |
287 | \f | |
f5d927c0 | 288 | /* Return the number of slots filled in the current |
3cf2715d DE |
289 | delayed branch sequence (we don't count the insn needing the |
290 | delay slot). Zero if not in a delayed branch sequence. */ | |
291 | ||
292 | #ifdef DELAY_SLOTS | |
293 | int | |
6cf9ac28 | 294 | dbr_sequence_length (void) |
3cf2715d DE |
295 | { |
296 | if (final_sequence != 0) | |
297 | return XVECLEN (final_sequence, 0) - 1; | |
298 | else | |
299 | return 0; | |
300 | } | |
301 | #endif | |
302 | \f | |
303 | /* The next two pages contain routines used to compute the length of an insn | |
304 | and to shorten branches. */ | |
305 | ||
306 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
307 | `insn_current_length'. */ | |
308 | ||
addd7df6 | 309 | static int *insn_lengths; |
9d98a694 | 310 | |
9771b263 | 311 | vec<int> insn_addresses_; |
3cf2715d | 312 | |
ea3cbda5 R |
313 | /* Max uid for which the above arrays are valid. */ |
314 | static int insn_lengths_max_uid; | |
315 | ||
3cf2715d DE |
316 | /* Address of insn being processed. Used by `insn_current_length'. */ |
317 | int insn_current_address; | |
318 | ||
fc470718 R |
319 | /* Address of insn being processed in previous iteration. */ |
320 | int insn_last_address; | |
321 | ||
d6a7951f | 322 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
323 | int insn_current_align; |
324 | ||
95707627 R |
325 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
326 | gives the next following alignment insn that increases the known | |
327 | alignment, or NULL_RTX if there is no such insn. | |
328 | For any alignment obtained this way, we can again index uid_align with | |
329 | its uid to obtain the next following align that in turn increases the | |
330 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
331 | for each insn we'll call the alignment chain of this insn in the following | |
332 | comments. */ | |
333 | ||
f5d927c0 KH |
334 | struct label_alignment |
335 | { | |
9e423e6d JW |
336 | short alignment; |
337 | short max_skip; | |
338 | }; | |
339 | ||
340 | static rtx *uid_align; | |
341 | static int *uid_shuid; | |
342 | static struct label_alignment *label_align; | |
95707627 | 343 | |
3cf2715d DE |
344 | /* Indicate that branch shortening hasn't yet been done. */ |
345 | ||
346 | void | |
6cf9ac28 | 347 | init_insn_lengths (void) |
3cf2715d | 348 | { |
95707627 R |
349 | if (uid_shuid) |
350 | { | |
351 | free (uid_shuid); | |
352 | uid_shuid = 0; | |
353 | } | |
354 | if (insn_lengths) | |
355 | { | |
356 | free (insn_lengths); | |
357 | insn_lengths = 0; | |
ea3cbda5 | 358 | insn_lengths_max_uid = 0; |
95707627 | 359 | } |
d327457f JR |
360 | if (HAVE_ATTR_length) |
361 | INSN_ADDRESSES_FREE (); | |
95707627 R |
362 | if (uid_align) |
363 | { | |
364 | free (uid_align); | |
365 | uid_align = 0; | |
366 | } | |
3cf2715d DE |
367 | } |
368 | ||
369 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 370 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 R |
371 | length. */ |
372 | static inline int | |
d327457f | 373 | get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx)) |
3cf2715d | 374 | { |
3cf2715d DE |
375 | rtx body; |
376 | int i; | |
377 | int length = 0; | |
378 | ||
d327457f JR |
379 | if (!HAVE_ATTR_length) |
380 | return 0; | |
381 | ||
ea3cbda5 | 382 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
383 | return insn_lengths[INSN_UID (insn)]; |
384 | else | |
385 | switch (GET_CODE (insn)) | |
386 | { | |
387 | case NOTE: | |
388 | case BARRIER: | |
389 | case CODE_LABEL: | |
b5b8b0ac | 390 | case DEBUG_INSN: |
3cf2715d DE |
391 | return 0; |
392 | ||
393 | case CALL_INSN: | |
3cf2715d | 394 | case JUMP_INSN: |
39718607 | 395 | length = fallback_fn (insn); |
3cf2715d DE |
396 | break; |
397 | ||
398 | case INSN: | |
399 | body = PATTERN (insn); | |
400 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
401 | return 0; | |
402 | ||
403 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 404 | length = asm_insn_count (body) * fallback_fn (insn); |
3cf2715d DE |
405 | else if (GET_CODE (body) == SEQUENCE) |
406 | for (i = 0; i < XVECLEN (body, 0); i++) | |
47d268d0 | 407 | length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn); |
3cf2715d | 408 | else |
070a7956 | 409 | length = fallback_fn (insn); |
e9a25f70 JL |
410 | break; |
411 | ||
412 | default: | |
413 | break; | |
3cf2715d DE |
414 | } |
415 | ||
416 | #ifdef ADJUST_INSN_LENGTH | |
417 | ADJUST_INSN_LENGTH (insn, length); | |
418 | #endif | |
419 | return length; | |
3cf2715d | 420 | } |
070a7956 R |
421 | |
422 | /* Obtain the current length of an insn. If branch shortening has been done, | |
423 | get its actual length. Otherwise, get its maximum length. */ | |
424 | int | |
425 | get_attr_length (rtx insn) | |
426 | { | |
427 | return get_attr_length_1 (insn, insn_default_length); | |
428 | } | |
429 | ||
430 | /* Obtain the current length of an insn. If branch shortening has been done, | |
431 | get its actual length. Otherwise, get its minimum length. */ | |
432 | int | |
433 | get_attr_min_length (rtx insn) | |
434 | { | |
435 | return get_attr_length_1 (insn, insn_min_length); | |
436 | } | |
3cf2715d | 437 | \f |
fc470718 R |
438 | /* Code to handle alignment inside shorten_branches. */ |
439 | ||
440 | /* Here is an explanation how the algorithm in align_fuzz can give | |
441 | proper results: | |
442 | ||
443 | Call a sequence of instructions beginning with alignment point X | |
444 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 445 | is used in an expression, it means the alignment value of the |
fc470718 | 446 | alignment point. |
f5d927c0 | 447 | |
fc470718 R |
448 | Call the distance between the start of the first insn of block X, and |
449 | the end of the last insn of block X `IX', for the `inner size of X'. | |
450 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 451 | |
fc470718 R |
452 | Likewise with the next alignment-delimited block following X, which we |
453 | shall call block Y. | |
f5d927c0 | 454 | |
fc470718 R |
455 | Call the distance between the start of the first insn of block X, and |
456 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 457 | |
fc470718 | 458 | The estimated padding is then OX - IX. |
f5d927c0 | 459 | |
fc470718 | 460 | OX can be safely estimated as |
f5d927c0 | 461 | |
fc470718 R |
462 | if (X >= Y) |
463 | OX = round_up(IX, Y) | |
464 | else | |
465 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 466 | |
fc470718 R |
467 | Clearly est(IX) >= real(IX), because that only depends on the |
468 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 469 | |
fc470718 R |
470 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
471 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 472 | |
fc470718 R |
473 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
474 | for branch ranges starting before X, so we can just round what we have. | |
475 | But when X < Y, we don't know anything about the, so to speak, | |
476 | `middle bits', so we have to assume the worst when aligning up from an | |
477 | address mod X to one mod Y, which is Y - X. */ | |
478 | ||
479 | #ifndef LABEL_ALIGN | |
efa3896a | 480 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
481 | #endif |
482 | ||
483 | #ifndef LOOP_ALIGN | |
efa3896a | 484 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
485 | #endif |
486 | ||
487 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 488 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
489 | #endif |
490 | ||
247a370b JH |
491 | #ifndef JUMP_ALIGN |
492 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
493 | #endif | |
494 | ||
ad0c4c36 DD |
495 | int |
496 | default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
497 | { | |
498 | return 0; | |
499 | } | |
500 | ||
501 | int | |
502 | default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
503 | { | |
504 | return align_loops_max_skip; | |
505 | } | |
506 | ||
507 | int | |
508 | default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
509 | { | |
510 | return align_labels_max_skip; | |
511 | } | |
512 | ||
513 | int | |
514 | default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
515 | { | |
516 | return align_jumps_max_skip; | |
517 | } | |
9e423e6d | 518 | |
fc470718 | 519 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 520 | static int |
6cf9ac28 | 521 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 522 | { |
2a841588 | 523 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
524 | |
525 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
526 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 527 | return exact_log2 (align); |
fc470718 R |
528 | |
529 | } | |
f5d927c0 | 530 | |
fc470718 R |
531 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
532 | #endif | |
533 | ||
534 | #ifndef INSN_LENGTH_ALIGNMENT | |
535 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
536 | #endif | |
537 | ||
fc470718 R |
538 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
539 | ||
de7987a6 | 540 | static int min_labelno, max_labelno; |
fc470718 R |
541 | |
542 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
543 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
544 | ||
545 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
546 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
547 | |
548 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 549 | |
fc470718 | 550 | int |
6cf9ac28 | 551 | label_to_alignment (rtx label) |
fc470718 | 552 | { |
40a8f07a JJ |
553 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
554 | return LABEL_TO_ALIGNMENT (label); | |
555 | return 0; | |
556 | } | |
557 | ||
558 | int | |
559 | label_to_max_skip (rtx label) | |
560 | { | |
561 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
562 | return LABEL_TO_MAX_SKIP (label); | |
563 | return 0; | |
fc470718 R |
564 | } |
565 | ||
fc470718 R |
566 | /* The differences in addresses |
567 | between a branch and its target might grow or shrink depending on | |
568 | the alignment the start insn of the range (the branch for a forward | |
569 | branch or the label for a backward branch) starts out on; if these | |
570 | differences are used naively, they can even oscillate infinitely. | |
571 | We therefore want to compute a 'worst case' address difference that | |
572 | is independent of the alignment the start insn of the range end | |
573 | up on, and that is at least as large as the actual difference. | |
574 | The function align_fuzz calculates the amount we have to add to the | |
575 | naively computed difference, by traversing the part of the alignment | |
576 | chain of the start insn of the range that is in front of the end insn | |
577 | of the range, and considering for each alignment the maximum amount | |
578 | that it might contribute to a size increase. | |
579 | ||
580 | For casesi tables, we also want to know worst case minimum amounts of | |
581 | address difference, in case a machine description wants to introduce | |
582 | some common offset that is added to all offsets in a table. | |
d6a7951f | 583 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
584 | appropriate adjustment. */ |
585 | ||
fc470718 R |
586 | /* Compute the maximum delta by which the difference of the addresses of |
587 | START and END might grow / shrink due to a different address for start | |
588 | which changes the size of alignment insns between START and END. | |
589 | KNOWN_ALIGN_LOG is the alignment known for START. | |
590 | GROWTH should be ~0 if the objective is to compute potential code size | |
591 | increase, and 0 if the objective is to compute potential shrink. | |
592 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 593 | |
ca3075bd | 594 | static int |
6cf9ac28 | 595 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
596 | { |
597 | int uid = INSN_UID (start); | |
598 | rtx align_label; | |
599 | int known_align = 1 << known_align_log; | |
600 | int end_shuid = INSN_SHUID (end); | |
601 | int fuzz = 0; | |
602 | ||
603 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
604 | { | |
605 | int align_addr, new_align; | |
606 | ||
607 | uid = INSN_UID (align_label); | |
9d98a694 | 608 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
609 | if (uid_shuid[uid] > end_shuid) |
610 | break; | |
611 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
612 | new_align = 1 << known_align_log; | |
613 | if (new_align < known_align) | |
614 | continue; | |
615 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
616 | known_align = new_align; | |
617 | } | |
618 | return fuzz; | |
619 | } | |
620 | ||
621 | /* Compute a worst-case reference address of a branch so that it | |
622 | can be safely used in the presence of aligned labels. Since the | |
623 | size of the branch itself is unknown, the size of the branch is | |
624 | not included in the range. I.e. for a forward branch, the reference | |
625 | address is the end address of the branch as known from the previous | |
626 | branch shortening pass, minus a value to account for possible size | |
627 | increase due to alignment. For a backward branch, it is the start | |
628 | address of the branch as known from the current pass, plus a value | |
629 | to account for possible size increase due to alignment. | |
630 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
631 | to exclude the branch size. */ | |
f5d927c0 | 632 | |
fc470718 | 633 | int |
6cf9ac28 | 634 | insn_current_reference_address (rtx branch) |
fc470718 | 635 | { |
5527bf14 RH |
636 | rtx dest, seq; |
637 | int seq_uid; | |
638 | ||
639 | if (! INSN_ADDRESSES_SET_P ()) | |
640 | return 0; | |
641 | ||
642 | seq = NEXT_INSN (PREV_INSN (branch)); | |
643 | seq_uid = INSN_UID (seq); | |
4b4bf941 | 644 | if (!JUMP_P (branch)) |
fc470718 R |
645 | /* This can happen for example on the PA; the objective is to know the |
646 | offset to address something in front of the start of the function. | |
647 | Thus, we can treat it like a backward branch. | |
648 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
649 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
650 | return insn_current_address; | |
651 | dest = JUMP_LABEL (branch); | |
5527bf14 | 652 | |
b9f22704 | 653 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
654 | BRANCH also has no INSN_SHUID. */ |
655 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 656 | { |
f5d927c0 | 657 | /* Forward branch. */ |
fc470718 | 658 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 659 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
660 | } |
661 | else | |
662 | { | |
f5d927c0 | 663 | /* Backward branch. */ |
fc470718 | 664 | return (insn_current_address |
923f7cf9 | 665 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
666 | } |
667 | } | |
fc470718 | 668 | \f |
65727068 KH |
669 | /* Compute branch alignments based on frequency information in the |
670 | CFG. */ | |
671 | ||
e855c69d | 672 | unsigned int |
6cf9ac28 | 673 | compute_alignments (void) |
247a370b | 674 | { |
247a370b | 675 | int log, max_skip, max_log; |
e0082a72 | 676 | basic_block bb; |
edbed3d3 JH |
677 | int freq_max = 0; |
678 | int freq_threshold = 0; | |
247a370b JH |
679 | |
680 | if (label_align) | |
681 | { | |
682 | free (label_align); | |
683 | label_align = 0; | |
684 | } | |
685 | ||
686 | max_labelno = max_label_num (); | |
687 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 688 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
689 | |
690 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 691 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 692 | return 0; |
247a370b | 693 | |
edbed3d3 JH |
694 | if (dump_file) |
695 | { | |
532aafad | 696 | dump_reg_info (dump_file); |
edbed3d3 JH |
697 | dump_flow_info (dump_file, TDF_DETAILS); |
698 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 699 | } |
58082ff6 | 700 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
edbed3d3 JH |
701 | FOR_EACH_BB (bb) |
702 | if (bb->frequency > freq_max) | |
703 | freq_max = bb->frequency; | |
704 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
705 | ||
706 | if (dump_file) | |
707 | fprintf(dump_file, "freq_max: %i\n",freq_max); | |
e0082a72 | 708 | FOR_EACH_BB (bb) |
247a370b | 709 | { |
a813c111 | 710 | rtx label = BB_HEAD (bb); |
247a370b JH |
711 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
712 | edge e; | |
628f6a4e | 713 | edge_iterator ei; |
247a370b | 714 | |
4b4bf941 | 715 | if (!LABEL_P (label) |
8bcf15f6 | 716 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
717 | { |
718 | if (dump_file) | |
719 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
391886c8 RG |
720 | bb->index, bb->frequency, bb->loop_father->num, |
721 | bb_loop_depth (bb)); | |
edbed3d3 JH |
722 | continue; |
723 | } | |
247a370b | 724 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 725 | max_skip = targetm.asm_out.label_align_max_skip (label); |
247a370b | 726 | |
628f6a4e | 727 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
728 | { |
729 | if (e->flags & EDGE_FALLTHRU) | |
730 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
731 | else | |
732 | branch_frequency += EDGE_FREQUENCY (e); | |
733 | } | |
edbed3d3 JH |
734 | if (dump_file) |
735 | { | |
736 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i", | |
737 | bb->index, bb->frequency, bb->loop_father->num, | |
391886c8 | 738 | bb_loop_depth (bb), |
edbed3d3 JH |
739 | fallthru_frequency, branch_frequency); |
740 | if (!bb->loop_father->inner && bb->loop_father->num) | |
741 | fprintf (dump_file, " inner_loop"); | |
742 | if (bb->loop_father->header == bb) | |
743 | fprintf (dump_file, " loop_header"); | |
744 | fprintf (dump_file, "\n"); | |
745 | } | |
247a370b | 746 | |
f63d1bf7 | 747 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 748 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 749 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
750 | (so it does not need to be in the cache). |
751 | ||
752 | We to catch first case, we align frequently executed blocks. | |
753 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 754 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
755 | when function is called. */ |
756 | ||
757 | if (!has_fallthru | |
edbed3d3 | 758 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
759 | || (bb->frequency > bb->prev_bb->frequency * 10 |
760 | && (bb->prev_bb->frequency | |
247a370b JH |
761 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
762 | { | |
763 | log = JUMP_ALIGN (label); | |
edbed3d3 JH |
764 | if (dump_file) |
765 | fprintf(dump_file, " jump alignment added.\n"); | |
247a370b JH |
766 | if (max_log < log) |
767 | { | |
768 | max_log = log; | |
ad0c4c36 | 769 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
770 | } |
771 | } | |
772 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 773 | align it. It is most likely a first block of loop. */ |
247a370b | 774 | if (has_fallthru |
efd8f750 | 775 | && optimize_bb_for_speed_p (bb) |
edbed3d3 JH |
776 | && branch_frequency + fallthru_frequency > freq_threshold |
777 | && (branch_frequency | |
778 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
779 | { |
780 | log = LOOP_ALIGN (label); | |
edbed3d3 JH |
781 | if (dump_file) |
782 | fprintf(dump_file, " internal loop alignment added.\n"); | |
247a370b JH |
783 | if (max_log < log) |
784 | { | |
785 | max_log = log; | |
ad0c4c36 | 786 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
787 | } |
788 | } | |
789 | LABEL_TO_ALIGNMENT (label) = max_log; | |
790 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
791 | } | |
edbed3d3 | 792 | |
58082ff6 PH |
793 | loop_optimizer_finalize (); |
794 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 795 | return 0; |
247a370b | 796 | } |
ef330312 | 797 | |
27a4cd48 DM |
798 | namespace { |
799 | ||
800 | const pass_data pass_data_compute_alignments = | |
ef330312 | 801 | { |
27a4cd48 DM |
802 | RTL_PASS, /* type */ |
803 | "alignments", /* name */ | |
804 | OPTGROUP_NONE, /* optinfo_flags */ | |
805 | false, /* has_gate */ | |
806 | true, /* has_execute */ | |
807 | TV_NONE, /* tv_id */ | |
808 | 0, /* properties_required */ | |
809 | 0, /* properties_provided */ | |
810 | 0, /* properties_destroyed */ | |
811 | 0, /* todo_flags_start */ | |
812 | TODO_verify_rtl_sharing, /* todo_flags_finish */ | |
ef330312 PB |
813 | }; |
814 | ||
27a4cd48 DM |
815 | class pass_compute_alignments : public rtl_opt_pass |
816 | { | |
817 | public: | |
818 | pass_compute_alignments(gcc::context *ctxt) | |
819 | : rtl_opt_pass(pass_data_compute_alignments, ctxt) | |
820 | {} | |
821 | ||
822 | /* opt_pass methods: */ | |
823 | unsigned int execute () { return compute_alignments (); } | |
824 | ||
825 | }; // class pass_compute_alignments | |
826 | ||
827 | } // anon namespace | |
828 | ||
829 | rtl_opt_pass * | |
830 | make_pass_compute_alignments (gcc::context *ctxt) | |
831 | { | |
832 | return new pass_compute_alignments (ctxt); | |
833 | } | |
834 | ||
247a370b | 835 | \f |
3cf2715d DE |
836 | /* Make a pass over all insns and compute their actual lengths by shortening |
837 | any branches of variable length if possible. */ | |
838 | ||
fc470718 R |
839 | /* shorten_branches might be called multiple times: for example, the SH |
840 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
841 | In order to do this, it needs proper length information, which it obtains | |
842 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 843 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
844 | reorg.c, since the branch splitting exposes new instructions with delay |
845 | slots. */ | |
846 | ||
3cf2715d | 847 | void |
d327457f | 848 | shorten_branches (rtx first) |
3cf2715d | 849 | { |
3cf2715d | 850 | rtx insn; |
fc470718 R |
851 | int max_uid; |
852 | int i; | |
fc470718 | 853 | int max_log; |
9e423e6d | 854 | int max_skip; |
fc470718 R |
855 | #define MAX_CODE_ALIGN 16 |
856 | rtx seq; | |
3cf2715d | 857 | int something_changed = 1; |
3cf2715d DE |
858 | char *varying_length; |
859 | rtx body; | |
860 | int uid; | |
fc470718 | 861 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 862 | |
3446405d JH |
863 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
864 | max_uid = get_max_uid (); | |
d9b6874b | 865 | |
471854f8 | 866 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 867 | free (uid_shuid); |
b0efb46b | 868 | |
5ed6ace5 | 869 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 870 | |
247a370b JH |
871 | if (max_labelno != max_label_num ()) |
872 | { | |
873 | int old = max_labelno; | |
874 | int n_labels; | |
875 | int n_old_labels; | |
876 | ||
877 | max_labelno = max_label_num (); | |
878 | ||
879 | n_labels = max_labelno - min_labelno + 1; | |
880 | n_old_labels = old - min_labelno + 1; | |
881 | ||
1b4572a8 | 882 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); |
247a370b | 883 | |
535a42b1 | 884 | /* Range of labels grows monotonically in the function. Failing here |
247a370b | 885 | means that the initialization of array got lost. */ |
0bccc606 | 886 | gcc_assert (n_old_labels <= n_labels); |
247a370b JH |
887 | |
888 | memset (label_align + n_old_labels, 0, | |
889 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
890 | } | |
891 | ||
fc470718 R |
892 | /* Initialize label_align and set up uid_shuid to be strictly |
893 | monotonically rising with insn order. */ | |
e2faec75 R |
894 | /* We use max_log here to keep track of the maximum alignment we want to |
895 | impose on the next CODE_LABEL (or the current one if we are processing | |
896 | the CODE_LABEL itself). */ | |
f5d927c0 | 897 | |
9e423e6d JW |
898 | max_log = 0; |
899 | max_skip = 0; | |
900 | ||
901 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
902 | { |
903 | int log; | |
904 | ||
905 | INSN_SHUID (insn) = i++; | |
2c3c49de | 906 | if (INSN_P (insn)) |
80838531 | 907 | continue; |
b0efb46b | 908 | |
80838531 | 909 | if (LABEL_P (insn)) |
fc470718 R |
910 | { |
911 | rtx next; | |
0676c393 | 912 | bool next_is_jumptable; |
ff81832f | 913 | |
247a370b JH |
914 | /* Merge in alignments computed by compute_alignments. */ |
915 | log = LABEL_TO_ALIGNMENT (insn); | |
916 | if (max_log < log) | |
917 | { | |
918 | max_log = log; | |
919 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
920 | } | |
fc470718 | 921 | |
0676c393 MM |
922 | next = next_nonnote_insn (insn); |
923 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
924 | if (!next_is_jumptable) | |
9e423e6d | 925 | { |
0676c393 MM |
926 | log = LABEL_ALIGN (insn); |
927 | if (max_log < log) | |
928 | { | |
929 | max_log = log; | |
ad0c4c36 | 930 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 | 931 | } |
9e423e6d | 932 | } |
75197b37 BS |
933 | /* ADDR_VECs only take room if read-only data goes into the text |
934 | section. */ | |
0676c393 MM |
935 | if ((JUMP_TABLES_IN_TEXT_SECTION |
936 | || readonly_data_section == text_section) | |
937 | && next_is_jumptable) | |
938 | { | |
939 | log = ADDR_VEC_ALIGN (next); | |
940 | if (max_log < log) | |
941 | { | |
942 | max_log = log; | |
ad0c4c36 | 943 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 MM |
944 | } |
945 | } | |
fc470718 | 946 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 947 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 948 | max_log = 0; |
9e423e6d | 949 | max_skip = 0; |
fc470718 | 950 | } |
4b4bf941 | 951 | else if (BARRIER_P (insn)) |
fc470718 R |
952 | { |
953 | rtx label; | |
954 | ||
2c3c49de | 955 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 956 | label = NEXT_INSN (label)) |
4b4bf941 | 957 | if (LABEL_P (label)) |
fc470718 R |
958 | { |
959 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
960 | if (max_log < log) | |
9e423e6d JW |
961 | { |
962 | max_log = log; | |
ad0c4c36 | 963 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 964 | } |
fc470718 R |
965 | break; |
966 | } | |
967 | } | |
fc470718 | 968 | } |
d327457f JR |
969 | if (!HAVE_ATTR_length) |
970 | return; | |
fc470718 R |
971 | |
972 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 973 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 974 | insn_lengths_max_uid = max_uid; |
af035616 R |
975 | /* Syntax errors can lead to labels being outside of the main insn stream. |
976 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 977 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 978 | |
5ed6ace5 | 979 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
980 | |
981 | /* Initialize uid_align. We scan instructions | |
982 | from end to start, and keep in align_tab[n] the last seen insn | |
983 | that does an alignment of at least n+1, i.e. the successor | |
984 | in the alignment chain for an insn that does / has a known | |
985 | alignment of n. */ | |
5ed6ace5 | 986 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 987 | |
f5d927c0 | 988 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
989 | align_tab[i] = NULL_RTX; |
990 | seq = get_last_insn (); | |
33f7f353 | 991 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
992 | { |
993 | int uid = INSN_UID (seq); | |
994 | int log; | |
4b4bf941 | 995 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 996 | uid_align[uid] = align_tab[0]; |
fc470718 R |
997 | if (log) |
998 | { | |
999 | /* Found an alignment label. */ | |
1000 | uid_align[uid] = align_tab[log]; | |
1001 | for (i = log - 1; i >= 0; i--) | |
1002 | align_tab[i] = seq; | |
1003 | } | |
33f7f353 | 1004 | } |
f6df08e6 JR |
1005 | |
1006 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1007 | lengths as we find the need for this, till nothing changes. | |
1008 | When not optimizing, we start assuming maximum lengths, and | |
1009 | do a single pass to update the lengths. */ | |
1010 | bool increasing = optimize != 0; | |
1011 | ||
33f7f353 JR |
1012 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1013 | if (optimize) | |
1014 | { | |
1015 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1016 | label fields. */ | |
1017 | ||
1018 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1019 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1020 | int rel; | |
1021 | ||
1022 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1023 | { |
33f7f353 JR |
1024 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1025 | int len, i, min, max, insn_shuid; | |
1026 | int min_align; | |
1027 | addr_diff_vec_flags flags; | |
1028 | ||
34f0d87a | 1029 | if (! JUMP_TABLE_DATA_P (insn) |
33f7f353 JR |
1030 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1031 | continue; | |
1032 | pat = PATTERN (insn); | |
1033 | len = XVECLEN (pat, 1); | |
0bccc606 | 1034 | gcc_assert (len > 0); |
33f7f353 JR |
1035 | min_align = MAX_CODE_ALIGN; |
1036 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1037 | { | |
1038 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1039 | int shuid = INSN_SHUID (lab); | |
1040 | if (shuid < min) | |
1041 | { | |
1042 | min = shuid; | |
1043 | min_lab = lab; | |
1044 | } | |
1045 | if (shuid > max) | |
1046 | { | |
1047 | max = shuid; | |
1048 | max_lab = lab; | |
1049 | } | |
1050 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1051 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1052 | } | |
4c33cb26 R |
1053 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1054 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1055 | insn_shuid = INSN_SHUID (insn); |
1056 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1057 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1058 | flags.min_align = min_align; |
1059 | flags.base_after_vec = rel > insn_shuid; | |
1060 | flags.min_after_vec = min > insn_shuid; | |
1061 | flags.max_after_vec = max > insn_shuid; | |
1062 | flags.min_after_base = min > rel; | |
1063 | flags.max_after_base = max > rel; | |
1064 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f6df08e6 JR |
1065 | |
1066 | if (increasing) | |
1067 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
fc470718 R |
1068 | } |
1069 | } | |
33f7f353 | 1070 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1071 | |
3cf2715d | 1072 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
f6df08e6 JR |
1073 | int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length; |
1074 | ||
b816f339 | 1075 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1076 | insn != 0; |
1077 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1078 | { | |
1079 | uid = INSN_UID (insn); | |
fc470718 | 1080 | |
3cf2715d | 1081 | insn_lengths[uid] = 0; |
fc470718 | 1082 | |
4b4bf941 | 1083 | if (LABEL_P (insn)) |
fc470718 R |
1084 | { |
1085 | int log = LABEL_TO_ALIGNMENT (insn); | |
1086 | if (log) | |
1087 | { | |
1088 | int align = 1 << log; | |
ecb06768 | 1089 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1090 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1091 | } |
1092 | } | |
1093 | ||
5a09edba | 1094 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1095 | |
4b4bf941 | 1096 | if (NOTE_P (insn) || BARRIER_P (insn) |
f90f4827 | 1097 | || LABEL_P (insn) || DEBUG_INSN_P(insn)) |
3cf2715d | 1098 | continue; |
04da53bd R |
1099 | if (INSN_DELETED_P (insn)) |
1100 | continue; | |
3cf2715d DE |
1101 | |
1102 | body = PATTERN (insn); | |
34f0d87a | 1103 | if (JUMP_TABLE_DATA_P (insn)) |
5a32a90c JR |
1104 | { |
1105 | /* This only takes room if read-only data goes into the text | |
1106 | section. */ | |
d6b5193b RS |
1107 | if (JUMP_TABLES_IN_TEXT_SECTION |
1108 | || readonly_data_section == text_section) | |
75197b37 BS |
1109 | insn_lengths[uid] = (XVECLEN (body, |
1110 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1111 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1112 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1113 | } |
a30caf5c | 1114 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1115 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1116 | else if (GET_CODE (body) == SEQUENCE) | |
1117 | { | |
1118 | int i; | |
1119 | int const_delay_slots; | |
1120 | #ifdef DELAY_SLOTS | |
1121 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1122 | #else | |
1123 | const_delay_slots = 0; | |
1124 | #endif | |
f6df08e6 JR |
1125 | int (*inner_length_fun) (rtx) |
1126 | = const_delay_slots ? length_fun : insn_default_length; | |
3cf2715d DE |
1127 | /* Inside a delay slot sequence, we do not do any branch shortening |
1128 | if the shortening could change the number of delay slots | |
0f41302f | 1129 | of the branch. */ |
3cf2715d DE |
1130 | for (i = 0; i < XVECLEN (body, 0); i++) |
1131 | { | |
1132 | rtx inner_insn = XVECEXP (body, 0, i); | |
1133 | int inner_uid = INSN_UID (inner_insn); | |
1134 | int inner_length; | |
1135 | ||
a30caf5c DC |
1136 | if (GET_CODE (body) == ASM_INPUT |
1137 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1138 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1139 | * insn_default_length (inner_insn)); | |
1140 | else | |
f6df08e6 | 1141 | inner_length = inner_length_fun (inner_insn); |
f5d927c0 | 1142 | |
3cf2715d DE |
1143 | insn_lengths[inner_uid] = inner_length; |
1144 | if (const_delay_slots) | |
1145 | { | |
1146 | if ((varying_length[inner_uid] | |
1147 | = insn_variable_length_p (inner_insn)) != 0) | |
1148 | varying_length[uid] = 1; | |
9d98a694 AO |
1149 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1150 | + insn_lengths[uid]); | |
3cf2715d DE |
1151 | } |
1152 | else | |
1153 | varying_length[inner_uid] = 0; | |
1154 | insn_lengths[uid] += inner_length; | |
1155 | } | |
1156 | } | |
1157 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1158 | { | |
f6df08e6 | 1159 | insn_lengths[uid] = length_fun (insn); |
3cf2715d DE |
1160 | varying_length[uid] = insn_variable_length_p (insn); |
1161 | } | |
1162 | ||
1163 | /* If needed, do any adjustment. */ | |
1164 | #ifdef ADJUST_INSN_LENGTH | |
1165 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1166 | if (insn_lengths[uid] < 0) |
c725bd79 | 1167 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1168 | #endif |
1169 | } | |
1170 | ||
1171 | /* Now loop over all the insns finding varying length insns. For each, | |
1172 | get the current insn length. If it has changed, reflect the change. | |
1173 | When nothing changes for a full pass, we are done. */ | |
1174 | ||
1175 | while (something_changed) | |
1176 | { | |
1177 | something_changed = 0; | |
fc470718 | 1178 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1179 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1180 | insn != 0; |
1181 | insn = NEXT_INSN (insn)) | |
1182 | { | |
1183 | int new_length; | |
b729186a | 1184 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1185 | int tmp_length; |
b729186a | 1186 | #endif |
fc470718 | 1187 | int length_align; |
3cf2715d DE |
1188 | |
1189 | uid = INSN_UID (insn); | |
fc470718 | 1190 | |
4b4bf941 | 1191 | if (LABEL_P (insn)) |
fc470718 R |
1192 | { |
1193 | int log = LABEL_TO_ALIGNMENT (insn); | |
b0fe107e JM |
1194 | |
1195 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1196 | /* If the mode of a following jump table was changed, we | |
1197 | may need to update the alignment of this label. */ | |
1198 | rtx next; | |
1199 | bool next_is_jumptable; | |
1200 | ||
1201 | next = next_nonnote_insn (insn); | |
1202 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
1203 | if ((JUMP_TABLES_IN_TEXT_SECTION | |
1204 | || readonly_data_section == text_section) | |
1205 | && next_is_jumptable) | |
1206 | { | |
1207 | int newlog = ADDR_VEC_ALIGN (next); | |
1208 | if (newlog != log) | |
1209 | { | |
1210 | log = newlog; | |
1211 | LABEL_TO_ALIGNMENT (insn) = log; | |
1212 | something_changed = 1; | |
1213 | } | |
1214 | } | |
1215 | #endif | |
1216 | ||
fc470718 R |
1217 | if (log > insn_current_align) |
1218 | { | |
1219 | int align = 1 << log; | |
ecb06768 | 1220 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1221 | insn_lengths[uid] = new_address - insn_current_address; |
1222 | insn_current_align = log; | |
1223 | insn_current_address = new_address; | |
1224 | } | |
1225 | else | |
1226 | insn_lengths[uid] = 0; | |
9d98a694 | 1227 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1228 | continue; |
1229 | } | |
1230 | ||
1231 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1232 | if (length_align < insn_current_align) | |
1233 | insn_current_align = length_align; | |
1234 | ||
9d98a694 AO |
1235 | insn_last_address = INSN_ADDRESSES (uid); |
1236 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1237 | |
5e75ef4a | 1238 | #ifdef CASE_VECTOR_SHORTEN_MODE |
34f0d87a SB |
1239 | if (optimize |
1240 | && JUMP_TABLE_DATA_P (insn) | |
33f7f353 JR |
1241 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1242 | { | |
33f7f353 JR |
1243 | rtx body = PATTERN (insn); |
1244 | int old_length = insn_lengths[uid]; | |
1245 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1246 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1247 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1248 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1249 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1250 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1251 | rtx prev; |
1252 | int rel_align = 0; | |
950a3816 | 1253 | addr_diff_vec_flags flags; |
f6df08e6 | 1254 | enum machine_mode vec_mode; |
950a3816 KG |
1255 | |
1256 | /* Avoid automatic aggregate initialization. */ | |
1257 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1258 | |
1259 | /* Try to find a known alignment for rel_lab. */ | |
1260 | for (prev = rel_lab; | |
1261 | prev | |
1262 | && ! insn_lengths[INSN_UID (prev)] | |
1263 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1264 | prev = PREV_INSN (prev)) | |
1265 | if (varying_length[INSN_UID (prev)] & 2) | |
1266 | { | |
1267 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1268 | break; | |
1269 | } | |
1270 | ||
1271 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1272 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1273 | /* Anything after INSN has still addresses from the last | |
1274 | pass; adjust these so that they reflect our current | |
1275 | estimate for this pass. */ | |
1276 | if (flags.base_after_vec) | |
1277 | rel_addr += insn_current_address - insn_last_address; | |
1278 | if (flags.min_after_vec) | |
1279 | min_addr += insn_current_address - insn_last_address; | |
1280 | if (flags.max_after_vec) | |
1281 | max_addr += insn_current_address - insn_last_address; | |
1282 | /* We want to know the worst case, i.e. lowest possible value | |
1283 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1284 | its offset is positive, and we have to be wary of code shrink; | |
1285 | otherwise, it is negative, and we have to be vary of code | |
1286 | size increase. */ | |
1287 | if (flags.min_after_base) | |
1288 | { | |
1289 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1290 | changes we are about to make can change the alignment | |
1291 | within the observed offset, therefore we have to break | |
1292 | it up into two parts that are independent. */ | |
1293 | if (! flags.base_after_vec && flags.min_after_vec) | |
1294 | { | |
1295 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1296 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1297 | } | |
1298 | else | |
1299 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1300 | } | |
1301 | else | |
1302 | { | |
1303 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1304 | { | |
1305 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1306 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1307 | } | |
1308 | else | |
1309 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1310 | } | |
1311 | /* Likewise, determine the highest lowest possible value | |
1312 | for the offset of MAX_LAB. */ | |
1313 | if (flags.max_after_base) | |
1314 | { | |
1315 | if (! flags.base_after_vec && flags.max_after_vec) | |
1316 | { | |
1317 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1318 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1319 | } | |
1320 | else | |
1321 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1322 | } | |
1323 | else | |
1324 | { | |
1325 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1326 | { | |
1327 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1328 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1329 | } | |
1330 | else | |
1331 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1332 | } | |
f6df08e6 JR |
1333 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1334 | max_addr - rel_addr, body); | |
1335 | if (!increasing | |
1336 | || (GET_MODE_SIZE (vec_mode) | |
1337 | >= GET_MODE_SIZE (GET_MODE (body)))) | |
1338 | PUT_MODE (body, vec_mode); | |
d6b5193b RS |
1339 | if (JUMP_TABLES_IN_TEXT_SECTION |
1340 | || readonly_data_section == text_section) | |
75197b37 BS |
1341 | { |
1342 | insn_lengths[uid] | |
1343 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1344 | insn_current_address += insn_lengths[uid]; | |
1345 | if (insn_lengths[uid] != old_length) | |
1346 | something_changed = 1; | |
1347 | } | |
1348 | ||
33f7f353 | 1349 | continue; |
33f7f353 | 1350 | } |
5e75ef4a JL |
1351 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1352 | ||
1353 | if (! (varying_length[uid])) | |
3cf2715d | 1354 | { |
4b4bf941 | 1355 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1356 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1357 | { | |
1358 | int i; | |
1359 | ||
1360 | body = PATTERN (insn); | |
1361 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1362 | { | |
1363 | rtx inner_insn = XVECEXP (body, 0, i); | |
1364 | int inner_uid = INSN_UID (inner_insn); | |
1365 | ||
1366 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1367 | ||
1368 | insn_current_address += insn_lengths[inner_uid]; | |
1369 | } | |
dd3f0101 | 1370 | } |
674fc07d GS |
1371 | else |
1372 | insn_current_address += insn_lengths[uid]; | |
1373 | ||
3cf2715d DE |
1374 | continue; |
1375 | } | |
674fc07d | 1376 | |
4b4bf941 | 1377 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d DE |
1378 | { |
1379 | int i; | |
f5d927c0 | 1380 | |
3cf2715d DE |
1381 | body = PATTERN (insn); |
1382 | new_length = 0; | |
1383 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1384 | { | |
1385 | rtx inner_insn = XVECEXP (body, 0, i); | |
1386 | int inner_uid = INSN_UID (inner_insn); | |
1387 | int inner_length; | |
1388 | ||
9d98a694 | 1389 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1390 | |
1391 | /* insn_current_length returns 0 for insns with a | |
1392 | non-varying length. */ | |
1393 | if (! varying_length[inner_uid]) | |
1394 | inner_length = insn_lengths[inner_uid]; | |
1395 | else | |
1396 | inner_length = insn_current_length (inner_insn); | |
1397 | ||
1398 | if (inner_length != insn_lengths[inner_uid]) | |
1399 | { | |
f6df08e6 JR |
1400 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1401 | { | |
1402 | insn_lengths[inner_uid] = inner_length; | |
1403 | something_changed = 1; | |
1404 | } | |
1405 | else | |
1406 | inner_length = insn_lengths[inner_uid]; | |
3cf2715d | 1407 | } |
f6df08e6 | 1408 | insn_current_address += inner_length; |
3cf2715d DE |
1409 | new_length += inner_length; |
1410 | } | |
1411 | } | |
1412 | else | |
1413 | { | |
1414 | new_length = insn_current_length (insn); | |
1415 | insn_current_address += new_length; | |
1416 | } | |
1417 | ||
3cf2715d DE |
1418 | #ifdef ADJUST_INSN_LENGTH |
1419 | /* If needed, do any adjustment. */ | |
1420 | tmp_length = new_length; | |
1421 | ADJUST_INSN_LENGTH (insn, new_length); | |
1422 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1423 | #endif |
1424 | ||
f6df08e6 JR |
1425 | if (new_length != insn_lengths[uid] |
1426 | && (!increasing || new_length > insn_lengths[uid])) | |
3cf2715d DE |
1427 | { |
1428 | insn_lengths[uid] = new_length; | |
1429 | something_changed = 1; | |
1430 | } | |
f6df08e6 JR |
1431 | else |
1432 | insn_current_address += insn_lengths[uid] - new_length; | |
3cf2715d | 1433 | } |
bb4aaf18 | 1434 | /* For a non-optimizing compile, do only a single pass. */ |
f6df08e6 | 1435 | if (!increasing) |
bb4aaf18 | 1436 | break; |
3cf2715d | 1437 | } |
fc470718 R |
1438 | |
1439 | free (varying_length); | |
3cf2715d DE |
1440 | } |
1441 | ||
3cf2715d DE |
1442 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1443 | the number of machine instructions likely to be generated for this insn. | |
1444 | This is used to compute its length. */ | |
1445 | ||
1446 | static int | |
6cf9ac28 | 1447 | asm_insn_count (rtx body) |
3cf2715d | 1448 | { |
48c54229 | 1449 | const char *templ; |
3cf2715d | 1450 | |
5d0930ea | 1451 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1452 | templ = XSTR (body, 0); |
5d0930ea | 1453 | else |
48c54229 | 1454 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1455 | |
2bd1d2c8 AP |
1456 | return asm_str_count (templ); |
1457 | } | |
2bd1d2c8 AP |
1458 | |
1459 | /* Return the number of machine instructions likely to be generated for the | |
1460 | inline-asm template. */ | |
1461 | int | |
1462 | asm_str_count (const char *templ) | |
1463 | { | |
1464 | int count = 1; | |
b8698a0f | 1465 | |
48c54229 | 1466 | if (!*templ) |
5bc4fa7c MS |
1467 | return 0; |
1468 | ||
48c54229 KG |
1469 | for (; *templ; templ++) |
1470 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1471 | || *templ == '\n') | |
3cf2715d DE |
1472 | count++; |
1473 | ||
1474 | return count; | |
1475 | } | |
3cf2715d | 1476 | \f |
c8aea42c PB |
1477 | /* ??? This is probably the wrong place for these. */ |
1478 | /* Structure recording the mapping from source file and directory | |
1479 | names at compile time to those to be embedded in debug | |
1480 | information. */ | |
1481 | typedef struct debug_prefix_map | |
1482 | { | |
1483 | const char *old_prefix; | |
1484 | const char *new_prefix; | |
1485 | size_t old_len; | |
1486 | size_t new_len; | |
1487 | struct debug_prefix_map *next; | |
1488 | } debug_prefix_map; | |
1489 | ||
1490 | /* Linked list of such structures. */ | |
ffa66012 | 1491 | static debug_prefix_map *debug_prefix_maps; |
c8aea42c PB |
1492 | |
1493 | ||
1494 | /* Record a debug file prefix mapping. ARG is the argument to | |
1495 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1496 | ||
1497 | void | |
1498 | add_debug_prefix_map (const char *arg) | |
1499 | { | |
1500 | debug_prefix_map *map; | |
1501 | const char *p; | |
1502 | ||
1503 | p = strchr (arg, '='); | |
1504 | if (!p) | |
1505 | { | |
1506 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1507 | return; | |
1508 | } | |
1509 | map = XNEW (debug_prefix_map); | |
fe83055d | 1510 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1511 | map->old_len = p - arg; |
1512 | p++; | |
fe83055d | 1513 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1514 | map->new_len = strlen (p); |
1515 | map->next = debug_prefix_maps; | |
1516 | debug_prefix_maps = map; | |
1517 | } | |
1518 | ||
1519 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1520 | the new name corresponding to FILENAME. */ | |
1521 | ||
1522 | const char * | |
1523 | remap_debug_filename (const char *filename) | |
1524 | { | |
1525 | debug_prefix_map *map; | |
1526 | char *s; | |
1527 | const char *name; | |
1528 | size_t name_len; | |
1529 | ||
1530 | for (map = debug_prefix_maps; map; map = map->next) | |
94369251 | 1531 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
c8aea42c PB |
1532 | break; |
1533 | if (!map) | |
1534 | return filename; | |
1535 | name = filename + map->old_len; | |
1536 | name_len = strlen (name) + 1; | |
1537 | s = (char *) alloca (name_len + map->new_len); | |
1538 | memcpy (s, map->new_prefix, map->new_len); | |
1539 | memcpy (s + map->new_len, name, name_len); | |
1540 | return ggc_strdup (s); | |
1541 | } | |
1542 | \f | |
725730f2 EB |
1543 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1544 | ||
1545 | static bool | |
1546 | dwarf2_debug_info_emitted_p (tree decl) | |
1547 | { | |
1548 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1549 | return false; | |
1550 | ||
1551 | if (DECL_IGNORED_P (decl)) | |
1552 | return false; | |
1553 | ||
1554 | return true; | |
1555 | } | |
1556 | ||
78bde837 SB |
1557 | /* Return scope resulting from combination of S1 and S2. */ |
1558 | static tree | |
1559 | choose_inner_scope (tree s1, tree s2) | |
1560 | { | |
1561 | if (!s1) | |
1562 | return s2; | |
1563 | if (!s2) | |
1564 | return s1; | |
1565 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1566 | return s1; | |
1567 | return s2; | |
1568 | } | |
1569 | ||
1570 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1571 | ||
1572 | static void | |
1573 | change_scope (rtx orig_insn, tree s1, tree s2) | |
1574 | { | |
1575 | rtx insn = orig_insn; | |
1576 | tree com = NULL_TREE; | |
1577 | tree ts1 = s1, ts2 = s2; | |
1578 | tree s; | |
1579 | ||
1580 | while (ts1 != ts2) | |
1581 | { | |
1582 | gcc_assert (ts1 && ts2); | |
1583 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1584 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1585 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1586 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1587 | else | |
1588 | { | |
1589 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1590 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1591 | } | |
1592 | } | |
1593 | com = ts1; | |
1594 | ||
1595 | /* Close scopes. */ | |
1596 | s = s1; | |
1597 | while (s != com) | |
1598 | { | |
1599 | rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn); | |
1600 | NOTE_BLOCK (note) = s; | |
1601 | s = BLOCK_SUPERCONTEXT (s); | |
1602 | } | |
1603 | ||
1604 | /* Open scopes. */ | |
1605 | s = s2; | |
1606 | while (s != com) | |
1607 | { | |
1608 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1609 | NOTE_BLOCK (insn) = s; | |
1610 | s = BLOCK_SUPERCONTEXT (s); | |
1611 | } | |
1612 | } | |
1613 | ||
1614 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1615 | on the scope tree and the newly reordered instructions. */ | |
1616 | ||
1617 | static void | |
1618 | reemit_insn_block_notes (void) | |
1619 | { | |
1620 | tree cur_block = DECL_INITIAL (cfun->decl); | |
1621 | rtx insn, note; | |
1622 | ||
1623 | insn = get_insns (); | |
1624 | if (!active_insn_p (insn)) | |
1625 | insn = next_active_insn (insn); | |
1626 | for (; insn; insn = next_active_insn (insn)) | |
1627 | { | |
1628 | tree this_block; | |
1629 | ||
1630 | /* Avoid putting scope notes between jump table and its label. */ | |
1631 | if (JUMP_TABLE_DATA_P (insn)) | |
1632 | continue; | |
1633 | ||
1634 | this_block = insn_scope (insn); | |
1635 | /* For sequences compute scope resulting from merging all scopes | |
1636 | of instructions nested inside. */ | |
1637 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1638 | { | |
1639 | int i; | |
1640 | rtx body = PATTERN (insn); | |
1641 | ||
1642 | this_block = NULL; | |
1643 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1644 | this_block = choose_inner_scope (this_block, | |
1645 | insn_scope (XVECEXP (body, 0, i))); | |
1646 | } | |
1647 | if (! this_block) | |
48866799 DC |
1648 | { |
1649 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1650 | continue; | |
1651 | else | |
1652 | this_block = DECL_INITIAL (cfun->decl); | |
1653 | } | |
78bde837 SB |
1654 | |
1655 | if (this_block != cur_block) | |
1656 | { | |
1657 | change_scope (insn, cur_block, this_block); | |
1658 | cur_block = this_block; | |
1659 | } | |
1660 | } | |
1661 | ||
1662 | /* change_scope emits before the insn, not after. */ | |
1663 | note = emit_note (NOTE_INSN_DELETED); | |
1664 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); | |
1665 | delete_insn (note); | |
1666 | ||
1667 | reorder_blocks (); | |
1668 | } | |
1669 | ||
3cf2715d DE |
1670 | /* Output assembler code for the start of a function, |
1671 | and initialize some of the variables in this file | |
1672 | for the new function. The label for the function and associated | |
1673 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1674 | ||
1675 | FIRST is the first insn of the rtl for the function being compiled. | |
1676 | FILE is the file to write assembler code to. | |
46625112 | 1677 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1678 | test and compare insns. */ |
1679 | ||
1680 | void | |
ddd84654 | 1681 | final_start_function (rtx first, FILE *file, |
46625112 | 1682 | int optimize_p ATTRIBUTE_UNUSED) |
3cf2715d DE |
1683 | { |
1684 | block_depth = 0; | |
1685 | ||
1686 | this_is_asm_operands = 0; | |
1687 | ||
ddd84654 JJ |
1688 | need_profile_function = false; |
1689 | ||
5368224f DC |
1690 | last_filename = LOCATION_FILE (prologue_location); |
1691 | last_linenum = LOCATION_LINE (prologue_location); | |
6c52e687 | 1692 | last_discriminator = discriminator = 0; |
9ae130f8 | 1693 | |
653e276c | 1694 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1695 | |
725730f2 EB |
1696 | if (!DECL_IGNORED_P (current_function_decl)) |
1697 | debug_hooks->begin_prologue (last_linenum, last_filename); | |
d291dd49 | 1698 | |
725730f2 | 1699 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
653e276c | 1700 | dwarf2out_begin_prologue (0, NULL); |
3cf2715d DE |
1701 | |
1702 | #ifdef LEAF_REG_REMAP | |
416ff32e | 1703 | if (crtl->uses_only_leaf_regs) |
3cf2715d DE |
1704 | leaf_renumber_regs (first); |
1705 | #endif | |
1706 | ||
1707 | /* The Sun386i and perhaps other machines don't work right | |
1708 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1709 | if (targetm.profile_before_prologue () && crtl->profile) |
ddd84654 JJ |
1710 | { |
1711 | if (targetm.asm_out.function_prologue | |
1712 | == default_function_pro_epilogue | |
1713 | #ifdef HAVE_prologue | |
1714 | && HAVE_prologue | |
1715 | #endif | |
1716 | ) | |
1717 | { | |
1718 | rtx insn; | |
1719 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1720 | if (!NOTE_P (insn)) | |
1721 | { | |
1722 | insn = NULL_RTX; | |
1723 | break; | |
1724 | } | |
1725 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1726 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1727 | break; | |
1728 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1729 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1730 | continue; | |
1731 | else | |
1732 | { | |
1733 | insn = NULL_RTX; | |
1734 | break; | |
1735 | } | |
1736 | ||
1737 | if (insn) | |
1738 | need_profile_function = true; | |
1739 | else | |
1740 | profile_function (file); | |
1741 | } | |
1742 | else | |
1743 | profile_function (file); | |
1744 | } | |
3cf2715d | 1745 | |
18c038b9 MM |
1746 | /* If debugging, assign block numbers to all of the blocks in this |
1747 | function. */ | |
1748 | if (write_symbols) | |
1749 | { | |
0435312e | 1750 | reemit_insn_block_notes (); |
a20612aa | 1751 | number_blocks (current_function_decl); |
18c038b9 MM |
1752 | /* We never actually put out begin/end notes for the top-level |
1753 | block in the function. But, conceptually, that block is | |
1754 | always needed. */ | |
1755 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1756 | } | |
1757 | ||
a214518f SP |
1758 | if (warn_frame_larger_than |
1759 | && get_frame_size () > frame_larger_than_size) | |
1760 | { | |
1761 | /* Issue a warning */ | |
1762 | warning (OPT_Wframe_larger_than_, | |
1763 | "the frame size of %wd bytes is larger than %wd bytes", | |
1764 | get_frame_size (), frame_larger_than_size); | |
1765 | } | |
1766 | ||
3cf2715d | 1767 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1768 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1769 | |
3cf2715d DE |
1770 | /* If the machine represents the prologue as RTL, the profiling code must |
1771 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1772 | #ifdef HAVE_prologue | |
1773 | if (! HAVE_prologue) | |
1774 | #endif | |
1775 | profile_after_prologue (file); | |
3cf2715d DE |
1776 | } |
1777 | ||
1778 | static void | |
6cf9ac28 | 1779 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1780 | { |
3c5273a9 | 1781 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1782 | profile_function (file); |
3cf2715d DE |
1783 | } |
1784 | ||
1785 | static void | |
6cf9ac28 | 1786 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1787 | { |
dcacfa04 | 1788 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1789 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1790 | #endif |
531ca746 RH |
1791 | #ifdef ASM_OUTPUT_REG_PUSH |
1792 | rtx sval = NULL, chain = NULL; | |
1793 | ||
1794 | if (cfun->returns_struct) | |
1795 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1796 | true); | |
1797 | if (cfun->static_chain_decl) | |
1798 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1799 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1800 | |
9739c90c JJ |
1801 | if (! NO_PROFILE_COUNTERS) |
1802 | { | |
1803 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1804 | switch_to_section (data_section); |
9739c90c | 1805 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1806 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1807 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1808 | } | |
3cf2715d | 1809 | |
d6b5193b | 1810 | switch_to_section (current_function_section ()); |
3cf2715d | 1811 | |
531ca746 RH |
1812 | #ifdef ASM_OUTPUT_REG_PUSH |
1813 | if (sval && REG_P (sval)) | |
1814 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1815 | if (chain && REG_P (chain)) | |
1816 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1817 | #endif |
3cf2715d | 1818 | |
df696a75 | 1819 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1820 | |
531ca746 RH |
1821 | #ifdef ASM_OUTPUT_REG_PUSH |
1822 | if (chain && REG_P (chain)) | |
1823 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1824 | if (sval && REG_P (sval)) | |
1825 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1826 | #endif |
1827 | } | |
1828 | ||
1829 | /* Output assembler code for the end of a function. | |
1830 | For clarity, args are same as those of `final_start_function' | |
1831 | even though not all of them are needed. */ | |
1832 | ||
1833 | void | |
6cf9ac28 | 1834 | final_end_function (void) |
3cf2715d | 1835 | { |
be1bb652 | 1836 | app_disable (); |
3cf2715d | 1837 | |
725730f2 EB |
1838 | if (!DECL_IGNORED_P (current_function_decl)) |
1839 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1840 | |
3cf2715d DE |
1841 | /* Finally, output the function epilogue: |
1842 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1843 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1844 | |
e2a12aca | 1845 | /* And debug output. */ |
725730f2 EB |
1846 | if (!DECL_IGNORED_P (current_function_decl)) |
1847 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1848 | |
725730f2 | 1849 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1850 | && dwarf2out_do_frame ()) |
702ada3d | 1851 | dwarf2out_end_epilogue (last_linenum, last_filename); |
3cf2715d DE |
1852 | } |
1853 | \f | |
6a801cf2 XDL |
1854 | |
1855 | /* Dumper helper for basic block information. FILE is the assembly | |
1856 | output file, and INSN is the instruction being emitted. */ | |
1857 | ||
1858 | static void | |
1859 | dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb, | |
1860 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) | |
1861 | { | |
1862 | basic_block bb; | |
1863 | ||
1864 | if (!flag_debug_asm) | |
1865 | return; | |
1866 | ||
1867 | if (INSN_UID (insn) < bb_map_size | |
1868 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1869 | { | |
1870 | edge e; | |
1871 | edge_iterator ei; | |
1872 | ||
1c13f168 | 1873 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
6a801cf2 XDL |
1874 | if (bb->frequency) |
1875 | fprintf (file, " freq:%d", bb->frequency); | |
1876 | if (bb->count) | |
1877 | fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC, | |
1878 | bb->count); | |
1879 | fprintf (file, " seq:%d", (*bb_seqn)++); | |
1c13f168 | 1880 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1881 | FOR_EACH_EDGE (e, ei, bb->preds) |
1882 | { | |
a315c44c | 1883 | dump_edge_info (file, e, TDF_DETAILS, 0); |
6a801cf2 XDL |
1884 | } |
1885 | fprintf (file, "\n"); | |
1886 | } | |
1887 | if (INSN_UID (insn) < bb_map_size | |
1888 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1889 | { | |
1890 | edge e; | |
1891 | edge_iterator ei; | |
1892 | ||
1c13f168 | 1893 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
1894 | FOR_EACH_EDGE (e, ei, bb->succs) |
1895 | { | |
a315c44c | 1896 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
6a801cf2 XDL |
1897 | } |
1898 | fprintf (file, "\n"); | |
1899 | } | |
1900 | } | |
1901 | ||
3cf2715d | 1902 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1903 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1904 | |
1905 | void | |
46625112 | 1906 | final (rtx first, FILE *file, int optimize_p) |
3cf2715d | 1907 | { |
bc5612ed | 1908 | rtx insn, next; |
589fe865 | 1909 | int seen = 0; |
3cf2715d | 1910 | |
6a801cf2 XDL |
1911 | /* Used for -dA dump. */ |
1912 | basic_block *start_to_bb = NULL; | |
1913 | basic_block *end_to_bb = NULL; | |
1914 | int bb_map_size = 0; | |
1915 | int bb_seqn = 0; | |
1916 | ||
3cf2715d | 1917 | last_ignored_compare = 0; |
3cf2715d | 1918 | |
c8b8af71 | 1919 | #ifdef HAVE_cc0 |
3cf2715d | 1920 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
a8c3510c | 1921 | { |
9ef4c6ef JC |
1922 | /* If CC tracking across branches is enabled, record the insn which |
1923 | jumps to each branch only reached from one place. */ | |
46625112 | 1924 | if (optimize_p && JUMP_P (insn)) |
9ef4c6ef JC |
1925 | { |
1926 | rtx lab = JUMP_LABEL (insn); | |
0c514727 | 1927 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) |
9ef4c6ef JC |
1928 | { |
1929 | LABEL_REFS (lab) = insn; | |
1930 | } | |
1931 | } | |
a8c3510c | 1932 | } |
c8b8af71 | 1933 | #endif |
a8c3510c | 1934 | |
3cf2715d DE |
1935 | init_recog (); |
1936 | ||
1937 | CC_STATUS_INIT; | |
1938 | ||
6a801cf2 XDL |
1939 | if (flag_debug_asm) |
1940 | { | |
1941 | basic_block bb; | |
1942 | ||
1943 | bb_map_size = get_max_uid () + 1; | |
1944 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
1945 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
1946 | ||
292ffe86 CC |
1947 | /* There is no cfg for a thunk. */ |
1948 | if (!cfun->is_thunk) | |
1949 | FOR_EACH_BB_REVERSE (bb) | |
1950 | { | |
1951 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
1952 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
1953 | } | |
6a801cf2 XDL |
1954 | } |
1955 | ||
3cf2715d | 1956 | /* Output the insns. */ |
9ff57809 | 1957 | for (insn = first; insn;) |
2f16edb1 | 1958 | { |
d327457f | 1959 | if (HAVE_ATTR_length) |
0ac76ad9 | 1960 | { |
d327457f JR |
1961 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
1962 | { | |
1963 | /* This can be triggered by bugs elsewhere in the compiler if | |
1964 | new insns are created after init_insn_lengths is called. */ | |
1965 | gcc_assert (NOTE_P (insn)); | |
1966 | insn_current_address = -1; | |
1967 | } | |
1968 | else | |
1969 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
0ac76ad9 | 1970 | } |
0ac76ad9 | 1971 | |
6a801cf2 XDL |
1972 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
1973 | bb_map_size, &bb_seqn); | |
46625112 | 1974 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 1975 | } |
6a801cf2 XDL |
1976 | |
1977 | if (flag_debug_asm) | |
1978 | { | |
1979 | free (start_to_bb); | |
1980 | free (end_to_bb); | |
1981 | } | |
bc5612ed BS |
1982 | |
1983 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
1984 | for (insn = first; insn; insn = next) | |
1985 | { | |
1986 | next = NEXT_INSN (insn); | |
1987 | if (NOTE_P (insn) | |
1988 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
1989 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
1990 | delete_insn (insn); | |
1991 | } | |
3cf2715d DE |
1992 | } |
1993 | \f | |
4bbf910e | 1994 | const char * |
6cf9ac28 | 1995 | get_insn_template (int code, rtx insn) |
4bbf910e | 1996 | { |
4bbf910e RH |
1997 | switch (insn_data[code].output_format) |
1998 | { | |
1999 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 2000 | return insn_data[code].output.single; |
4bbf910e | 2001 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 2002 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 2003 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 2004 | gcc_assert (insn); |
3897f229 | 2005 | return (*insn_data[code].output.function) (recog_data.operand, insn); |
4bbf910e RH |
2006 | |
2007 | default: | |
0bccc606 | 2008 | gcc_unreachable (); |
4bbf910e RH |
2009 | } |
2010 | } | |
f5d927c0 | 2011 | |
0dc36574 ZW |
2012 | /* Emit the appropriate declaration for an alternate-entry-point |
2013 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2014 | LABEL_KIND != LABEL_NORMAL. | |
2015 | ||
2016 | The case fall-through in this function is intentional. */ | |
2017 | static void | |
6cf9ac28 | 2018 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
2019 | { |
2020 | const char *name = LABEL_NAME (insn); | |
2021 | ||
2022 | switch (LABEL_KIND (insn)) | |
2023 | { | |
2024 | case LABEL_WEAK_ENTRY: | |
2025 | #ifdef ASM_WEAKEN_LABEL | |
2026 | ASM_WEAKEN_LABEL (file, name); | |
2027 | #endif | |
2028 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 2029 | targetm.asm_out.globalize_label (file, name); |
0dc36574 | 2030 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
2031 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2032 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2033 | #endif | |
0dc36574 ZW |
2034 | ASM_OUTPUT_LABEL (file, name); |
2035 | break; | |
2036 | ||
2037 | case LABEL_NORMAL: | |
2038 | default: | |
0bccc606 | 2039 | gcc_unreachable (); |
0dc36574 ZW |
2040 | } |
2041 | } | |
2042 | ||
f410e1b3 RAE |
2043 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2044 | static rtx | |
2045 | call_from_call_insn (rtx insn) | |
2046 | { | |
2047 | rtx x; | |
2048 | gcc_assert (CALL_P (insn)); | |
2049 | x = PATTERN (insn); | |
2050 | ||
2051 | while (GET_CODE (x) != CALL) | |
2052 | { | |
2053 | switch (GET_CODE (x)) | |
2054 | { | |
2055 | default: | |
2056 | gcc_unreachable (); | |
b8c71e40 RAE |
2057 | case COND_EXEC: |
2058 | x = COND_EXEC_CODE (x); | |
2059 | break; | |
f410e1b3 RAE |
2060 | case PARALLEL: |
2061 | x = XVECEXP (x, 0, 0); | |
2062 | break; | |
2063 | case SET: | |
2064 | x = XEXP (x, 1); | |
2065 | break; | |
2066 | } | |
2067 | } | |
2068 | return x; | |
2069 | } | |
2070 | ||
3cf2715d DE |
2071 | /* The final scan for one insn, INSN. |
2072 | Args are same as in `final', except that INSN | |
2073 | is the insn being scanned. | |
2074 | Value returned is the next insn to be scanned. | |
2075 | ||
ff8cea7e EB |
2076 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2077 | used for within delayed branch sequence output). | |
3cf2715d | 2078 | |
589fe865 DJ |
2079 | SEEN is used to track the end of the prologue, for emitting |
2080 | debug information. We force the emission of a line note after | |
2081 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or | |
2082 | at the beginning of the second basic block, whichever comes | |
2083 | first. */ | |
2084 | ||
5cfc5f84 | 2085 | rtx |
46625112 | 2086 | final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 2087 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 2088 | { |
90ca38bb MM |
2089 | #ifdef HAVE_cc0 |
2090 | rtx set; | |
2091 | #endif | |
b2a6a2fb | 2092 | rtx next; |
90ca38bb | 2093 | |
3cf2715d DE |
2094 | insn_counter++; |
2095 | ||
2096 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2097 | template of "#") while not optimizing. */ | |
2098 | if (INSN_DELETED_P (insn)) | |
2099 | return NEXT_INSN (insn); | |
2100 | ||
2101 | switch (GET_CODE (insn)) | |
2102 | { | |
2103 | case NOTE: | |
a38e7aa5 | 2104 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
2105 | { |
2106 | case NOTE_INSN_DELETED: | |
be1bb652 | 2107 | break; |
3cf2715d | 2108 | |
87c8b4be | 2109 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 2110 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 2111 | |
a4b6974e UB |
2112 | if (dwarf2out_do_frame ()) |
2113 | dwarf2out_switch_text_section (); | |
f0a0390e | 2114 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 2115 | debug_hooks->switch_text_section (); |
a4b6974e | 2116 | |
c543ca49 | 2117 | switch_to_section (current_function_section ()); |
14d11d40 IS |
2118 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2119 | current_function_decl, | |
2120 | in_cold_section_p); | |
750054a2 | 2121 | break; |
b0efb46b | 2122 | |
be1bb652 | 2123 | case NOTE_INSN_BASIC_BLOCK: |
ddd84654 JJ |
2124 | if (need_profile_function) |
2125 | { | |
2126 | profile_function (asm_out_file); | |
2127 | need_profile_function = false; | |
2128 | } | |
2129 | ||
2784ed9c KT |
2130 | if (targetm.asm_out.unwind_emit) |
2131 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 2132 | |
589fe865 DJ |
2133 | if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) |
2134 | { | |
2135 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2136 | force_source_line = true; |
589fe865 DJ |
2137 | } |
2138 | else | |
2139 | *seen |= SEEN_BB; | |
2140 | ||
6c52e687 CC |
2141 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2142 | ||
be1bb652 | 2143 | break; |
3cf2715d | 2144 | |
be1bb652 | 2145 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2146 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2147 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2148 | break; |
3d195391 | 2149 | |
be1bb652 | 2150 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2151 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2152 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2153 | break; |
3d195391 | 2154 | |
be1bb652 | 2155 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 2156 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 2157 | profile_after_prologue (file); |
589fe865 DJ |
2158 | |
2159 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2160 | { | |
2161 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2162 | force_source_line = true; |
589fe865 DJ |
2163 | } |
2164 | else | |
2165 | *seen |= SEEN_NOTE; | |
2166 | ||
3cf2715d | 2167 | break; |
3cf2715d | 2168 | |
be1bb652 | 2169 | case NOTE_INSN_EPILOGUE_BEG: |
bc45e4ba TG |
2170 | if (!DECL_IGNORED_P (current_function_decl)) |
2171 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
5fd9b178 | 2172 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 2173 | break; |
3cf2715d | 2174 | |
bc5612ed BS |
2175 | case NOTE_INSN_CFI: |
2176 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2177 | break; | |
2178 | ||
2179 | case NOTE_INSN_CFI_LABEL: | |
2180 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2181 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
2182 | break; |
2183 | ||
be1bb652 | 2184 | case NOTE_INSN_FUNCTION_BEG: |
ddd84654 JJ |
2185 | if (need_profile_function) |
2186 | { | |
2187 | profile_function (asm_out_file); | |
2188 | need_profile_function = false; | |
2189 | } | |
2190 | ||
653e276c | 2191 | app_disable (); |
725730f2 EB |
2192 | if (!DECL_IGNORED_P (current_function_decl)) |
2193 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
2194 | |
2195 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2196 | { | |
2197 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2198 | force_source_line = true; |
589fe865 DJ |
2199 | } |
2200 | else | |
2201 | *seen |= SEEN_NOTE; | |
2202 | ||
3cf2715d | 2203 | break; |
be1bb652 RH |
2204 | |
2205 | case NOTE_INSN_BLOCK_BEG: | |
2206 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2207 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2208 | || write_symbols == DWARF2_DEBUG |
2209 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2210 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2211 | { |
2212 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2213 | |
be1bb652 RH |
2214 | app_disable (); |
2215 | ++block_depth; | |
2216 | high_block_linenum = last_linenum; | |
eac40081 | 2217 | |
a5a42b92 | 2218 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2219 | if (!DECL_IGNORED_P (current_function_decl)) |
2220 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2221 | |
be1bb652 RH |
2222 | /* Mark this block as output. */ |
2223 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
2224 | } | |
d752cfdb JJ |
2225 | if (write_symbols == DBX_DEBUG |
2226 | || write_symbols == SDB_DEBUG) | |
2227 | { | |
2228 | location_t *locus_ptr | |
2229 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2230 | ||
2231 | if (locus_ptr != NULL) | |
2232 | { | |
2233 | override_filename = LOCATION_FILE (*locus_ptr); | |
2234 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2235 | } | |
2236 | } | |
be1bb652 | 2237 | break; |
18c038b9 | 2238 | |
be1bb652 RH |
2239 | case NOTE_INSN_BLOCK_END: |
2240 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2241 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2242 | || write_symbols == DWARF2_DEBUG |
2243 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2244 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2245 | { |
2246 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2247 | |
be1bb652 RH |
2248 | app_disable (); |
2249 | ||
2250 | /* End of a symbol-block. */ | |
2251 | --block_depth; | |
0bccc606 | 2252 | gcc_assert (block_depth >= 0); |
3cf2715d | 2253 | |
725730f2 EB |
2254 | if (!DECL_IGNORED_P (current_function_decl)) |
2255 | debug_hooks->end_block (high_block_linenum, n); | |
be1bb652 | 2256 | } |
d752cfdb JJ |
2257 | if (write_symbols == DBX_DEBUG |
2258 | || write_symbols == SDB_DEBUG) | |
2259 | { | |
2260 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2261 | location_t *locus_ptr | |
2262 | = block_nonartificial_location (outer_block); | |
2263 | ||
2264 | if (locus_ptr != NULL) | |
2265 | { | |
2266 | override_filename = LOCATION_FILE (*locus_ptr); | |
2267 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2268 | } | |
2269 | else | |
2270 | { | |
2271 | override_filename = NULL; | |
2272 | override_linenum = 0; | |
2273 | } | |
2274 | } | |
be1bb652 RH |
2275 | break; |
2276 | ||
2277 | case NOTE_INSN_DELETED_LABEL: | |
2278 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2279 | the label could be proved to be unreachable, though still | |
2280 | referenced (in the form of having its address taken. */ | |
8215347e | 2281 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2282 | break; |
3cf2715d | 2283 | |
5619e52c JJ |
2284 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2285 | /* Similarly, but need to use different namespace for it. */ | |
2286 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2287 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2288 | break; | |
2289 | ||
014a1138 | 2290 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2291 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 EB |
2292 | if (!DECL_IGNORED_P (current_function_decl)) |
2293 | debug_hooks->var_location (insn); | |
014a1138 JZ |
2294 | break; |
2295 | ||
be1bb652 | 2296 | default: |
a38e7aa5 | 2297 | gcc_unreachable (); |
f5d927c0 | 2298 | break; |
3cf2715d DE |
2299 | } |
2300 | break; | |
2301 | ||
2302 | case BARRIER: | |
3cf2715d DE |
2303 | break; |
2304 | ||
2305 | case CODE_LABEL: | |
1dd8faa8 R |
2306 | /* The target port might emit labels in the output function for |
2307 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2308 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2309 | { | |
2310 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2311 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2312 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2313 | #endif |
fc470718 | 2314 | |
1dd8faa8 | 2315 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2316 | { |
9e423e6d | 2317 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2318 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2319 | #else |
2320 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2321 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2322 | #else |
40cdfca6 | 2323 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2324 | #endif |
9e423e6d | 2325 | #endif |
40cdfca6 | 2326 | } |
de7987a6 | 2327 | } |
3cf2715d | 2328 | CC_STATUS_INIT; |
03ffa171 | 2329 | |
725730f2 EB |
2330 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
2331 | debug_hooks->label (insn); | |
e1772ac0 | 2332 | |
bad4f40b | 2333 | app_disable (); |
b2a6a2fb JJ |
2334 | |
2335 | next = next_nonnote_insn (insn); | |
0676c393 MM |
2336 | /* If this label is followed by a jump-table, make sure we put |
2337 | the label in the read-only section. Also possibly write the | |
2338 | label and jump table together. */ | |
2339 | if (next != 0 && JUMP_TABLE_DATA_P (next)) | |
3cf2715d | 2340 | { |
e0d80184 | 2341 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2342 | /* In this case, the case vector is being moved by the |
2343 | target, so don't output the label at all. Leave that | |
2344 | to the back end macros. */ | |
e0d80184 | 2345 | #else |
0676c393 MM |
2346 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2347 | { | |
2348 | int log_align; | |
340f7e7c | 2349 | |
0676c393 MM |
2350 | switch_to_section (targetm.asm_out.function_rodata_section |
2351 | (current_function_decl)); | |
340f7e7c RH |
2352 | |
2353 | #ifdef ADDR_VEC_ALIGN | |
0676c393 | 2354 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c | 2355 | #else |
0676c393 | 2356 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2357 | #endif |
0676c393 MM |
2358 | ASM_OUTPUT_ALIGN (file, log_align); |
2359 | } | |
2360 | else | |
2361 | switch_to_section (current_function_section ()); | |
75197b37 | 2362 | |
3cf2715d | 2363 | #ifdef ASM_OUTPUT_CASE_LABEL |
0676c393 MM |
2364 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), |
2365 | next); | |
3cf2715d | 2366 | #else |
0676c393 | 2367 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2368 | #endif |
3cf2715d | 2369 | #endif |
0676c393 | 2370 | break; |
3cf2715d | 2371 | } |
0dc36574 ZW |
2372 | if (LABEL_ALT_ENTRY_P (insn)) |
2373 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2374 | else |
5fd9b178 | 2375 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2376 | break; |
2377 | ||
2378 | default: | |
2379 | { | |
b3694847 | 2380 | rtx body = PATTERN (insn); |
3cf2715d | 2381 | int insn_code_number; |
48c54229 | 2382 | const char *templ; |
ed5ef2e4 | 2383 | bool is_stmt; |
3cf2715d | 2384 | |
9a1a4737 PB |
2385 | /* Reset this early so it is correct for ASM statements. */ |
2386 | current_insn_predicate = NULL_RTX; | |
2929029c | 2387 | |
3cf2715d DE |
2388 | /* An INSN, JUMP_INSN or CALL_INSN. |
2389 | First check for special kinds that recog doesn't recognize. */ | |
2390 | ||
6614fd40 | 2391 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2392 | || GET_CODE (body) == CLOBBER) |
2393 | break; | |
2394 | ||
2395 | #ifdef HAVE_cc0 | |
4928181c SB |
2396 | { |
2397 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2398 | the setting of the condition code was done in the delay slot | |
2399 | of the insn that branched here. So recover the cc status | |
2400 | from the insn that set it. */ | |
3cf2715d | 2401 | |
4928181c SB |
2402 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2403 | if (note) | |
2404 | { | |
2405 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2406 | cc_prev_status = cc_status; | |
2407 | } | |
2408 | } | |
3cf2715d DE |
2409 | #endif |
2410 | ||
2411 | /* Detect insns that are really jump-tables | |
2412 | and output them as such. */ | |
2413 | ||
34f0d87a | 2414 | if (JUMP_TABLE_DATA_P (insn)) |
3cf2715d | 2415 | { |
7f7f8214 | 2416 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2417 | int vlen, idx; |
7f7f8214 | 2418 | #endif |
3cf2715d | 2419 | |
b2a6a2fb | 2420 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2421 | switch_to_section (targetm.asm_out.function_rodata_section |
2422 | (current_function_decl)); | |
b2a6a2fb | 2423 | else |
d6b5193b | 2424 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2425 | |
bad4f40b | 2426 | app_disable (); |
3cf2715d | 2427 | |
e0d80184 DM |
2428 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2429 | if (GET_CODE (body) == ADDR_VEC) | |
2430 | { | |
2431 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2432 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2433 | #else | |
0bccc606 | 2434 | gcc_unreachable (); |
e0d80184 DM |
2435 | #endif |
2436 | } | |
2437 | else | |
2438 | { | |
2439 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2440 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2441 | #else | |
0bccc606 | 2442 | gcc_unreachable (); |
e0d80184 DM |
2443 | #endif |
2444 | } | |
2445 | #else | |
3cf2715d DE |
2446 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2447 | for (idx = 0; idx < vlen; idx++) | |
2448 | { | |
2449 | if (GET_CODE (body) == ADDR_VEC) | |
2450 | { | |
2451 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2452 | ASM_OUTPUT_ADDR_VEC_ELT | |
2453 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2454 | #else | |
0bccc606 | 2455 | gcc_unreachable (); |
3cf2715d DE |
2456 | #endif |
2457 | } | |
2458 | else | |
2459 | { | |
2460 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2461 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2462 | (file, | |
33f7f353 | 2463 | body, |
3cf2715d DE |
2464 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2465 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2466 | #else | |
0bccc606 | 2467 | gcc_unreachable (); |
3cf2715d DE |
2468 | #endif |
2469 | } | |
2470 | } | |
2471 | #ifdef ASM_OUTPUT_CASE_END | |
2472 | ASM_OUTPUT_CASE_END (file, | |
2473 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2474 | insn); | |
e0d80184 | 2475 | #endif |
3cf2715d DE |
2476 | #endif |
2477 | ||
d6b5193b | 2478 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2479 | |
2480 | break; | |
2481 | } | |
0435312e JH |
2482 | /* Output this line note if it is the first or the last line |
2483 | note in a row. */ | |
725730f2 EB |
2484 | if (!DECL_IGNORED_P (current_function_decl) |
2485 | && notice_source_line (insn, &is_stmt)) | |
2486 | (*debug_hooks->source_line) (last_linenum, last_filename, | |
2487 | last_discriminator, is_stmt); | |
3cf2715d | 2488 | |
3cf2715d DE |
2489 | if (GET_CODE (body) == ASM_INPUT) |
2490 | { | |
36d7136e RH |
2491 | const char *string = XSTR (body, 0); |
2492 | ||
3cf2715d DE |
2493 | /* There's no telling what that did to the condition codes. */ |
2494 | CC_STATUS_INIT; | |
36d7136e RH |
2495 | |
2496 | if (string[0]) | |
3cf2715d | 2497 | { |
5ffeb913 | 2498 | expanded_location loc; |
bff4b63d | 2499 | |
3a694d86 | 2500 | app_enable (); |
5ffeb913 | 2501 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2502 | if (*loc.file && loc.line) |
bff4b63d AO |
2503 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2504 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2505 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2506 | #if HAVE_AS_LINE_ZERO |
2507 | if (*loc.file && loc.line) | |
bff4b63d | 2508 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2509 | #endif |
3cf2715d | 2510 | } |
3cf2715d DE |
2511 | break; |
2512 | } | |
2513 | ||
2514 | /* Detect `asm' construct with operands. */ | |
2515 | if (asm_noperands (body) >= 0) | |
2516 | { | |
22bf4422 | 2517 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2518 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2519 | const char *string; |
bff4b63d | 2520 | location_t loc; |
5ffeb913 | 2521 | expanded_location expanded; |
3cf2715d DE |
2522 | |
2523 | /* There's no telling what that did to the condition codes. */ | |
2524 | CC_STATUS_INIT; | |
3cf2715d | 2525 | |
3cf2715d | 2526 | /* Get out the operand values. */ |
bff4b63d | 2527 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2528 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2529 | insn_noperands = noperands; |
2530 | this_is_asm_operands = insn; | |
5ffeb913 | 2531 | expanded = expand_location (loc); |
3cf2715d | 2532 | |
ad7e39ca AO |
2533 | #ifdef FINAL_PRESCAN_INSN |
2534 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2535 | #endif | |
2536 | ||
3cf2715d | 2537 | /* Output the insn using them. */ |
36d7136e RH |
2538 | if (string[0]) |
2539 | { | |
3a694d86 | 2540 | app_enable (); |
5ffeb913 | 2541 | if (expanded.file && expanded.line) |
bff4b63d | 2542 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2543 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2544 | output_asm_insn (string, ops); |
03943c05 | 2545 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2546 | if (expanded.file && expanded.line) |
bff4b63d | 2547 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2548 | #endif |
36d7136e RH |
2549 | } |
2550 | ||
1afc5373 CF |
2551 | if (targetm.asm_out.final_postscan_insn) |
2552 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2553 | insn_noperands); | |
2554 | ||
3cf2715d DE |
2555 | this_is_asm_operands = 0; |
2556 | break; | |
2557 | } | |
2558 | ||
bad4f40b | 2559 | app_disable (); |
3cf2715d DE |
2560 | |
2561 | if (GET_CODE (body) == SEQUENCE) | |
2562 | { | |
2563 | /* A delayed-branch sequence */ | |
b3694847 | 2564 | int i; |
3cf2715d | 2565 | |
3cf2715d DE |
2566 | final_sequence = body; |
2567 | ||
2568 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2569 | force the restoration of a comparison that was previously | |
2570 | thought unnecessary. If that happens, cancel this sequence | |
2571 | and cause that insn to be restored. */ | |
2572 | ||
c9d691e9 | 2573 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); |
3cf2715d DE |
2574 | if (next != XVECEXP (body, 0, 1)) |
2575 | { | |
2576 | final_sequence = 0; | |
2577 | return next; | |
2578 | } | |
2579 | ||
2580 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2581 | { |
2582 | rtx insn = XVECEXP (body, 0, i); | |
2583 | rtx next = NEXT_INSN (insn); | |
2584 | /* We loop in case any instruction in a delay slot gets | |
2585 | split. */ | |
2586 | do | |
c9d691e9 | 2587 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2588 | while (insn != next); |
2589 | } | |
3cf2715d DE |
2590 | #ifdef DBR_OUTPUT_SEQEND |
2591 | DBR_OUTPUT_SEQEND (file); | |
2592 | #endif | |
2593 | final_sequence = 0; | |
2594 | ||
2595 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2596 | insns in the delay slot are actually executed before the | |
2597 | called function. Hence we don't preserve any CC-setting | |
2598 | actions in these insns and the CC must be marked as being | |
2599 | clobbered by the function. */ | |
4b4bf941 | 2600 | if (CALL_P (XVECEXP (body, 0, 0))) |
b729186a JL |
2601 | { |
2602 | CC_STATUS_INIT; | |
2603 | } | |
3cf2715d DE |
2604 | break; |
2605 | } | |
2606 | ||
2607 | /* We have a real machine instruction as rtl. */ | |
2608 | ||
2609 | body = PATTERN (insn); | |
2610 | ||
2611 | #ifdef HAVE_cc0 | |
f5d927c0 | 2612 | set = single_set (insn); |
b88c92cc | 2613 | |
3cf2715d DE |
2614 | /* Check for redundant test and compare instructions |
2615 | (when the condition codes are already set up as desired). | |
2616 | This is done only when optimizing; if not optimizing, | |
2617 | it should be possible for the user to alter a variable | |
2618 | with the debugger in between statements | |
2619 | and the next statement should reexamine the variable | |
2620 | to compute the condition codes. */ | |
2621 | ||
46625112 | 2622 | if (optimize_p) |
3cf2715d | 2623 | { |
30f5e9f5 RK |
2624 | if (set |
2625 | && GET_CODE (SET_DEST (set)) == CC0 | |
2626 | && insn != last_ignored_compare) | |
3cf2715d | 2627 | { |
f90b7a5a | 2628 | rtx src1, src2; |
30f5e9f5 | 2629 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
55a2c322 | 2630 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
f90b7a5a PB |
2631 | |
2632 | src1 = SET_SRC (set); | |
2633 | src2 = NULL_RTX; | |
2634 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2635 | { |
2636 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2637 | XEXP (SET_SRC (set), 0) | |
55a2c322 | 2638 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
30f5e9f5 RK |
2639 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2640 | XEXP (SET_SRC (set), 1) | |
55a2c322 | 2641 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
f90b7a5a PB |
2642 | if (XEXP (SET_SRC (set), 1) |
2643 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2644 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2645 | } |
2646 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2647 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2648 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2649 | && rtx_equal_p (src1, cc_status.value2)) |
2650 | || (src2 != 0 && cc_status.value1 != 0 | |
2651 | && rtx_equal_p (src2, cc_status.value1)) | |
2652 | || (src2 != 0 && cc_status.value2 != 0 | |
2653 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2654 | { |
30f5e9f5 | 2655 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2656 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2657 | /* or if anything in it is volatile. */ |
2658 | && ! volatile_refs_p (PATTERN (insn))) | |
2659 | { | |
2660 | /* We don't really delete the insn; just ignore it. */ | |
2661 | last_ignored_compare = insn; | |
2662 | break; | |
2663 | } | |
3cf2715d DE |
2664 | } |
2665 | } | |
2666 | } | |
3cf2715d | 2667 | |
3cf2715d DE |
2668 | /* If this is a conditional branch, maybe modify it |
2669 | if the cc's are in a nonstandard state | |
2670 | so that it accomplishes the same thing that it would | |
2671 | do straightforwardly if the cc's were set up normally. */ | |
2672 | ||
2673 | if (cc_status.flags != 0 | |
4b4bf941 | 2674 | && JUMP_P (insn) |
3cf2715d DE |
2675 | && GET_CODE (body) == SET |
2676 | && SET_DEST (body) == pc_rtx | |
2677 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2678 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2679 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2680 | { |
2681 | /* This function may alter the contents of its argument | |
2682 | and clear some of the cc_status.flags bits. | |
2683 | It may also return 1 meaning condition now always true | |
2684 | or -1 meaning condition now always false | |
2685 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2686 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2687 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2688 | with its then-operand or its else-operand. */ | |
2689 | if (result == 1) | |
2690 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2691 | if (result == -1) | |
2692 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2693 | ||
2694 | /* The jump is now either unconditional or a no-op. | |
2695 | If it has become a no-op, don't try to output it. | |
2696 | (It would not be recognized.) */ | |
2697 | if (SET_SRC (body) == pc_rtx) | |
2698 | { | |
ca6c03ca | 2699 | delete_insn (insn); |
3cf2715d DE |
2700 | break; |
2701 | } | |
26898771 | 2702 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2703 | /* Replace (set (pc) (return)) with (return). */ |
2704 | PATTERN (insn) = body = SET_SRC (body); | |
2705 | ||
2706 | /* Rerecognize the instruction if it has changed. */ | |
2707 | if (result != 0) | |
2708 | INSN_CODE (insn) = -1; | |
2709 | } | |
2710 | ||
604e4ce3 | 2711 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2712 | are in a nonstandard state so that it accomplishes the same |
2713 | thing that it would do straightforwardly if the cc's were | |
2714 | set up normally. */ | |
2715 | if (cc_status.flags != 0 | |
2716 | && NONJUMP_INSN_P (insn) | |
2717 | && GET_CODE (body) == TRAP_IF | |
2718 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2719 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2720 | { | |
2721 | /* This function may alter the contents of its argument | |
2722 | and clear some of the cc_status.flags bits. | |
2723 | It may also return 1 meaning condition now always true | |
2724 | or -1 meaning condition now always false | |
2725 | or 2 meaning condition nontrivial but altered. */ | |
2726 | int result = alter_cond (TRAP_CONDITION (body)); | |
2727 | ||
2728 | /* If TRAP_CONDITION has become always false, delete the | |
2729 | instruction. */ | |
2730 | if (result == -1) | |
2731 | { | |
2732 | delete_insn (insn); | |
2733 | break; | |
2734 | } | |
2735 | ||
2736 | /* If TRAP_CONDITION has become always true, replace | |
2737 | TRAP_CONDITION with const_true_rtx. */ | |
2738 | if (result == 1) | |
2739 | TRAP_CONDITION (body) = const_true_rtx; | |
2740 | ||
2741 | /* Rerecognize the instruction if it has changed. */ | |
2742 | if (result != 0) | |
2743 | INSN_CODE (insn) = -1; | |
2744 | } | |
2745 | ||
3cf2715d | 2746 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2747 | condition codes without jumping and instructions that |
2748 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2749 | |
2750 | if (cc_status.flags != 0 | |
b88c92cc | 2751 | && set != 0) |
3cf2715d | 2752 | { |
462da2af | 2753 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2754 | |
4b4bf941 | 2755 | if (!JUMP_P (insn) |
b88c92cc | 2756 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2757 | { |
b88c92cc RK |
2758 | cond_rtx = XEXP (SET_SRC (set), 0); |
2759 | then_rtx = XEXP (SET_SRC (set), 1); | |
2760 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2761 | } |
2762 | else | |
2763 | { | |
b88c92cc | 2764 | cond_rtx = SET_SRC (set); |
462da2af SC |
2765 | then_rtx = const_true_rtx; |
2766 | else_rtx = const0_rtx; | |
2767 | } | |
f5d927c0 | 2768 | |
511d31d8 AS |
2769 | if (COMPARISON_P (cond_rtx) |
2770 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
3cf2715d | 2771 | { |
511d31d8 AS |
2772 | int result; |
2773 | result = alter_cond (cond_rtx); | |
2774 | if (result == 1) | |
2775 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2776 | else if (result == -1) | |
2777 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2778 | else if (result == 2) | |
2779 | INSN_CODE (insn) = -1; | |
2780 | if (SET_DEST (set) == SET_SRC (set)) | |
2781 | delete_insn (insn); | |
3cf2715d DE |
2782 | } |
2783 | } | |
462da2af | 2784 | |
3cf2715d DE |
2785 | #endif |
2786 | ||
ede7cd44 | 2787 | #ifdef HAVE_peephole |
3cf2715d DE |
2788 | /* Do machine-specific peephole optimizations if desired. */ |
2789 | ||
46625112 | 2790 | if (optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d DE |
2791 | { |
2792 | rtx next = peephole (insn); | |
2793 | /* When peepholing, if there were notes within the peephole, | |
2794 | emit them before the peephole. */ | |
2795 | if (next != 0 && next != NEXT_INSN (insn)) | |
2796 | { | |
a2785739 | 2797 | rtx note, prev = PREV_INSN (insn); |
3cf2715d DE |
2798 | |
2799 | for (note = NEXT_INSN (insn); note != next; | |
2800 | note = NEXT_INSN (note)) | |
46625112 | 2801 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
2802 | |
2803 | /* Put the notes in the proper position for a later | |
2804 | rescan. For example, the SH target can do this | |
2805 | when generating a far jump in a delayed branch | |
2806 | sequence. */ | |
2807 | note = NEXT_INSN (insn); | |
2808 | PREV_INSN (note) = prev; | |
2809 | NEXT_INSN (prev) = note; | |
2810 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2811 | PREV_INSN (insn) = PREV_INSN (next); | |
2812 | NEXT_INSN (insn) = next; | |
2813 | PREV_INSN (next) = insn; | |
3cf2715d DE |
2814 | } |
2815 | ||
2816 | /* PEEPHOLE might have changed this. */ | |
2817 | body = PATTERN (insn); | |
2818 | } | |
ede7cd44 | 2819 | #endif |
3cf2715d DE |
2820 | |
2821 | /* Try to recognize the instruction. | |
2822 | If successful, verify that the operands satisfy the | |
2823 | constraints for the instruction. Crash if they don't, | |
2824 | since `reload' should have changed them so that they do. */ | |
2825 | ||
2826 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2827 | cleanup_subreg_operands (insn); |
3cf2715d | 2828 | |
8c503f0d SB |
2829 | /* Dump the insn in the assembly for debugging (-dAP). |
2830 | If the final dump is requested as slim RTL, dump slim | |
2831 | RTL to the assembly file also. */ | |
dd3f0101 KH |
2832 | if (flag_dump_rtl_in_asm) |
2833 | { | |
2834 | print_rtx_head = ASM_COMMENT_START; | |
8c503f0d SB |
2835 | if (! (dump_flags & TDF_SLIM)) |
2836 | print_rtl_single (asm_out_file, insn); | |
2837 | else | |
2838 | dump_insn_slim (asm_out_file, insn); | |
dd3f0101 KH |
2839 | print_rtx_head = ""; |
2840 | } | |
b9f22704 | 2841 | |
6c698a6d | 2842 | if (! constrain_operands_cached (1)) |
3cf2715d | 2843 | fatal_insn_not_found (insn); |
3cf2715d DE |
2844 | |
2845 | /* Some target machines need to prescan each insn before | |
2846 | it is output. */ | |
2847 | ||
2848 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2849 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2850 | #endif |
2851 | ||
2929029c WG |
2852 | if (targetm.have_conditional_execution () |
2853 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 2854 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 2855 | |
3cf2715d DE |
2856 | #ifdef HAVE_cc0 |
2857 | cc_prev_status = cc_status; | |
2858 | ||
2859 | /* Update `cc_status' for this instruction. | |
2860 | The instruction's output routine may change it further. | |
2861 | If the output routine for a jump insn needs to depend | |
2862 | on the cc status, it should look at cc_prev_status. */ | |
2863 | ||
2864 | NOTICE_UPDATE_CC (body, insn); | |
2865 | #endif | |
2866 | ||
b1a9f6a0 | 2867 | current_output_insn = debug_insn = insn; |
3cf2715d | 2868 | |
4bbf910e | 2869 | /* Find the proper template for this insn. */ |
48c54229 | 2870 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 2871 | |
4bbf910e RH |
2872 | /* If the C code returns 0, it means that it is a jump insn |
2873 | which follows a deleted test insn, and that test insn | |
2874 | needs to be reinserted. */ | |
48c54229 | 2875 | if (templ == 0) |
3cf2715d | 2876 | { |
efd0378b HPN |
2877 | rtx prev; |
2878 | ||
0bccc606 | 2879 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2880 | |
2881 | /* We have already processed the notes between the setter and | |
2882 | the user. Make sure we don't process them again, this is | |
2883 | particularly important if one of the notes is a block | |
2884 | scope note or an EH note. */ | |
2885 | for (prev = insn; | |
2886 | prev != last_ignored_compare; | |
2887 | prev = PREV_INSN (prev)) | |
2888 | { | |
4b4bf941 | 2889 | if (NOTE_P (prev)) |
ca6c03ca | 2890 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2891 | } |
2892 | ||
2893 | return prev; | |
3cf2715d DE |
2894 | } |
2895 | ||
2896 | /* If the template is the string "#", it means that this insn must | |
2897 | be split. */ | |
48c54229 | 2898 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 2899 | { |
48c54229 | 2900 | rtx new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
2901 | |
2902 | /* If we didn't split the insn, go away. */ | |
48c54229 | 2903 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 2904 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2905 | |
d327457f JR |
2906 | /* If we have a length attribute, this instruction should have |
2907 | been split in shorten_branches, to ensure that we would have | |
2908 | valid length info for the splitees. */ | |
2909 | gcc_assert (!HAVE_ATTR_length); | |
3d14e82f | 2910 | |
48c54229 | 2911 | return new_rtx; |
3cf2715d | 2912 | } |
f5d927c0 | 2913 | |
951120ea PB |
2914 | /* ??? This will put the directives in the wrong place if |
2915 | get_insn_template outputs assembly directly. However calling it | |
2916 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
2917 | if (targetm.asm_out.unwind_emit_before_insn |
2918 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 2919 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 2920 | |
f410e1b3 RAE |
2921 | if (CALL_P (insn)) |
2922 | { | |
2923 | rtx x = call_from_call_insn (insn); | |
2924 | x = XEXP (x, 0); | |
2925 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
2926 | { | |
2927 | tree t; | |
2928 | x = XEXP (x, 0); | |
2929 | t = SYMBOL_REF_DECL (x); | |
2930 | if (t) | |
2931 | assemble_external (t); | |
2932 | } | |
2b1c5433 JJ |
2933 | if (!DECL_IGNORED_P (current_function_decl)) |
2934 | debug_hooks->var_location (insn); | |
f410e1b3 RAE |
2935 | } |
2936 | ||
951120ea | 2937 | /* Output assembler code from the template. */ |
48c54229 | 2938 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 2939 | |
1afc5373 CF |
2940 | /* Some target machines need to postscan each insn after |
2941 | it is output. */ | |
2942 | if (targetm.asm_out.final_postscan_insn) | |
2943 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
2944 | recog_data.n_operands); | |
2945 | ||
3bc6b3e6 RH |
2946 | if (!targetm.asm_out.unwind_emit_before_insn |
2947 | && targetm.asm_out.unwind_emit) | |
2948 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
2949 | ||
b1a9f6a0 | 2950 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2951 | } |
2952 | } | |
2953 | return NEXT_INSN (insn); | |
2954 | } | |
2955 | \f | |
ed5ef2e4 CC |
2956 | /* Return whether a source line note needs to be emitted before INSN. |
2957 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
2958 | breakpoint location. */ | |
3cf2715d | 2959 | |
0435312e | 2960 | static bool |
ed5ef2e4 | 2961 | notice_source_line (rtx insn, bool *is_stmt) |
3cf2715d | 2962 | { |
d752cfdb JJ |
2963 | const char *filename; |
2964 | int linenum; | |
2965 | ||
2966 | if (override_filename) | |
2967 | { | |
2968 | filename = override_filename; | |
2969 | linenum = override_linenum; | |
2970 | } | |
2971 | else | |
2972 | { | |
2973 | filename = insn_file (insn); | |
2974 | linenum = insn_line (insn); | |
2975 | } | |
3cf2715d | 2976 | |
ed5ef2e4 CC |
2977 | if (filename == NULL) |
2978 | return false; | |
2979 | ||
2980 | if (force_source_line | |
2981 | || filename != last_filename | |
2982 | || last_linenum != linenum) | |
0435312e | 2983 | { |
b8176fe4 | 2984 | force_source_line = false; |
0435312e JH |
2985 | last_filename = filename; |
2986 | last_linenum = linenum; | |
6c52e687 | 2987 | last_discriminator = discriminator; |
ed5ef2e4 | 2988 | *is_stmt = true; |
0435312e JH |
2989 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
2990 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
2991 | return true; | |
2992 | } | |
ed5ef2e4 CC |
2993 | |
2994 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
2995 | { | |
2996 | /* If the discriminator changed, but the line number did not, | |
2997 | output the line table entry with is_stmt false so the | |
2998 | debugger does not treat this as a breakpoint location. */ | |
2999 | last_discriminator = discriminator; | |
3000 | *is_stmt = false; | |
3001 | return true; | |
3002 | } | |
3003 | ||
0435312e | 3004 | return false; |
3cf2715d DE |
3005 | } |
3006 | \f | |
0304f787 JL |
3007 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3008 | directly to the desired hard register. */ | |
f5d927c0 | 3009 | |
0304f787 | 3010 | void |
6cf9ac28 | 3011 | cleanup_subreg_operands (rtx insn) |
0304f787 | 3012 | { |
f62a15e3 | 3013 | int i; |
6fb5fa3c | 3014 | bool changed = false; |
6c698a6d | 3015 | extract_insn_cached (insn); |
1ccbefce | 3016 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3017 | { |
2067c116 | 3018 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
3019 | for a SUBREG: the underlying object might have been changed |
3020 | already if we are inside a match_operator expression that | |
3021 | matches the else clause. Instead we test the underlying | |
3022 | expression directly. */ | |
3023 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c | 3024 | { |
55a2c322 | 3025 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
6fb5fa3c DB |
3026 | changed = true; |
3027 | } | |
1ccbefce | 3028 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 3029 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 3030 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 3031 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
3032 | } |
3033 | ||
1ccbefce | 3034 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3035 | { |
1ccbefce | 3036 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c | 3037 | { |
55a2c322 | 3038 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
6fb5fa3c DB |
3039 | changed = true; |
3040 | } | |
1ccbefce | 3041 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 3042 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 3043 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 3044 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 3045 | } |
6fb5fa3c DB |
3046 | if (changed) |
3047 | df_insn_rescan (insn); | |
0304f787 JL |
3048 | } |
3049 | ||
55a2c322 VM |
3050 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3051 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
3cf2715d DE |
3052 | |
3053 | rtx | |
55a2c322 | 3054 | alter_subreg (rtx *xp, bool final_p) |
3cf2715d | 3055 | { |
49d801d3 | 3056 | rtx x = *xp; |
b3694847 | 3057 | rtx y = SUBREG_REG (x); |
f5963e61 | 3058 | |
49d801d3 JH |
3059 | /* simplify_subreg does not remove subreg from volatile references. |
3060 | We are required to. */ | |
3c0cb5de | 3061 | if (MEM_P (y)) |
fd326ba8 UW |
3062 | { |
3063 | int offset = SUBREG_BYTE (x); | |
3064 | ||
3065 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3066 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
3067 | if (offset == 0 | |
3068 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
3069 | { | |
3070 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
3071 | - GET_MODE_SIZE (GET_MODE (x)); | |
3072 | if (WORDS_BIG_ENDIAN) | |
3073 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
3074 | if (BYTES_BIG_ENDIAN) | |
3075 | offset += difference % UNITS_PER_WORD; | |
3076 | } | |
3077 | ||
55a2c322 VM |
3078 | if (final_p) |
3079 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3080 | else | |
3081 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
fd326ba8 | 3082 | } |
49d801d3 | 3083 | else |
fea54805 | 3084 | { |
48c54229 | 3085 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
55a2c322 | 3086 | SUBREG_BYTE (x)); |
fea54805 | 3087 | |
48c54229 KG |
3088 | if (new_rtx != 0) |
3089 | *xp = new_rtx; | |
55a2c322 | 3090 | else if (final_p && REG_P (y)) |
fea54805 | 3091 | { |
0bccc606 | 3092 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
3093 | unsigned int regno; |
3094 | HOST_WIDE_INT offset; | |
3095 | ||
3096 | regno = subreg_regno (x); | |
3097 | if (subreg_lowpart_p (x)) | |
3098 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3099 | else | |
3100 | offset = SUBREG_BYTE (x); | |
3101 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 3102 | } |
fea54805 RK |
3103 | } |
3104 | ||
49d801d3 | 3105 | return *xp; |
3cf2715d DE |
3106 | } |
3107 | ||
3108 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3109 | ||
3110 | static rtx | |
6fb5fa3c | 3111 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 3112 | { |
49d801d3 | 3113 | rtx x = *xp; |
3cf2715d DE |
3114 | switch (GET_CODE (x)) |
3115 | { | |
3116 | case PLUS: | |
3117 | case MULT: | |
beed8fc0 | 3118 | case AND: |
6fb5fa3c DB |
3119 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3120 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
3121 | break; |
3122 | ||
3123 | case MEM: | |
beed8fc0 | 3124 | case ZERO_EXTEND: |
6fb5fa3c | 3125 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
3126 | break; |
3127 | ||
3128 | case SUBREG: | |
6fb5fa3c | 3129 | *changed = true; |
55a2c322 | 3130 | return alter_subreg (xp, true); |
f5d927c0 | 3131 | |
e9a25f70 JL |
3132 | default: |
3133 | break; | |
3cf2715d DE |
3134 | } |
3135 | ||
5bc72aeb | 3136 | return *xp; |
3cf2715d DE |
3137 | } |
3138 | \f | |
3139 | #ifdef HAVE_cc0 | |
3140 | ||
3141 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3142 | as required by the bits that are set in cc_status.flags. | |
3143 | Not all of the bits there can be handled at this level in all cases. | |
3144 | ||
3145 | The value is normally 0. | |
3146 | 1 means that the condition has become always true. | |
3147 | -1 means that the condition has become always false. | |
3148 | 2 means that COND has been altered. */ | |
3149 | ||
3150 | static int | |
6cf9ac28 | 3151 | alter_cond (rtx cond) |
3cf2715d DE |
3152 | { |
3153 | int value = 0; | |
3154 | ||
3155 | if (cc_status.flags & CC_REVERSED) | |
3156 | { | |
3157 | value = 2; | |
3158 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3159 | } | |
3160 | ||
3161 | if (cc_status.flags & CC_INVERTED) | |
3162 | { | |
3163 | value = 2; | |
3164 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3165 | } | |
3166 | ||
3167 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3168 | switch (GET_CODE (cond)) | |
3169 | { | |
3170 | case LE: | |
3171 | case LEU: | |
3172 | case GEU: | |
3173 | /* Jump becomes unconditional. */ | |
3174 | return 1; | |
3175 | ||
3176 | case GT: | |
3177 | case GTU: | |
3178 | case LTU: | |
3179 | /* Jump becomes no-op. */ | |
3180 | return -1; | |
3181 | ||
3182 | case GE: | |
3183 | PUT_CODE (cond, EQ); | |
3184 | value = 2; | |
3185 | break; | |
3186 | ||
3187 | case LT: | |
3188 | PUT_CODE (cond, NE); | |
3189 | value = 2; | |
3190 | break; | |
f5d927c0 | 3191 | |
e9a25f70 JL |
3192 | default: |
3193 | break; | |
3cf2715d DE |
3194 | } |
3195 | ||
3196 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3197 | switch (GET_CODE (cond)) | |
3198 | { | |
3199 | case GE: | |
3200 | case GEU: | |
3201 | /* Jump becomes unconditional. */ | |
3202 | return 1; | |
3203 | ||
3204 | case LT: | |
3205 | case LTU: | |
3206 | /* Jump becomes no-op. */ | |
3207 | return -1; | |
3208 | ||
3209 | case LE: | |
3210 | case LEU: | |
3211 | PUT_CODE (cond, EQ); | |
3212 | value = 2; | |
3213 | break; | |
3214 | ||
3215 | case GT: | |
3216 | case GTU: | |
3217 | PUT_CODE (cond, NE); | |
3218 | value = 2; | |
3219 | break; | |
f5d927c0 | 3220 | |
e9a25f70 JL |
3221 | default: |
3222 | break; | |
3cf2715d DE |
3223 | } |
3224 | ||
3225 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3226 | switch (GET_CODE (cond)) | |
3227 | { | |
3228 | case GEU: | |
3229 | /* Jump becomes unconditional. */ | |
3230 | return 1; | |
3231 | ||
3232 | case LEU: | |
3233 | PUT_CODE (cond, EQ); | |
3234 | value = 2; | |
3235 | break; | |
3236 | ||
3237 | case GTU: | |
3238 | PUT_CODE (cond, NE); | |
3239 | value = 2; | |
3240 | break; | |
3241 | ||
3242 | case LTU: | |
3243 | /* Jump becomes no-op. */ | |
3244 | return -1; | |
f5d927c0 | 3245 | |
e9a25f70 JL |
3246 | default: |
3247 | break; | |
3cf2715d DE |
3248 | } |
3249 | ||
3250 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3251 | switch (GET_CODE (cond)) | |
3252 | { | |
e9a25f70 | 3253 | default: |
0bccc606 | 3254 | gcc_unreachable (); |
3cf2715d DE |
3255 | |
3256 | case NE: | |
3257 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3258 | value = 2; | |
3259 | break; | |
3260 | ||
3261 | case EQ: | |
3262 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3263 | value = 2; | |
3264 | break; | |
3265 | } | |
3266 | ||
3267 | if (cc_status.flags & CC_NOT_SIGNED) | |
3268 | /* The flags are valid if signed condition operators are converted | |
3269 | to unsigned. */ | |
3270 | switch (GET_CODE (cond)) | |
3271 | { | |
3272 | case LE: | |
3273 | PUT_CODE (cond, LEU); | |
3274 | value = 2; | |
3275 | break; | |
3276 | ||
3277 | case LT: | |
3278 | PUT_CODE (cond, LTU); | |
3279 | value = 2; | |
3280 | break; | |
3281 | ||
3282 | case GT: | |
3283 | PUT_CODE (cond, GTU); | |
3284 | value = 2; | |
3285 | break; | |
3286 | ||
3287 | case GE: | |
3288 | PUT_CODE (cond, GEU); | |
3289 | value = 2; | |
3290 | break; | |
e9a25f70 JL |
3291 | |
3292 | default: | |
3293 | break; | |
3cf2715d DE |
3294 | } |
3295 | ||
3296 | return value; | |
3297 | } | |
3298 | #endif | |
3299 | \f | |
3300 | /* Report inconsistency between the assembler template and the operands. | |
3301 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3302 | ||
3303 | void | |
4b794eaf | 3304 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3305 | { |
a52453cc PT |
3306 | char *fmt_string; |
3307 | char *new_message; | |
fd478a0a | 3308 | const char *pfx_str; |
e34d07f2 | 3309 | va_list ap; |
6cf9ac28 | 3310 | |
4b794eaf | 3311 | va_start (ap, cmsgid); |
a52453cc | 3312 | |
9e637a26 | 3313 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
4b794eaf | 3314 | asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); |
a52453cc | 3315 | vasprintf (&new_message, fmt_string, ap); |
dd3f0101 | 3316 | |
3cf2715d | 3317 | if (this_is_asm_operands) |
a52453cc | 3318 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3319 | else |
a52453cc PT |
3320 | internal_error ("%s", new_message); |
3321 | ||
3322 | free (fmt_string); | |
3323 | free (new_message); | |
e34d07f2 | 3324 | va_end (ap); |
3cf2715d DE |
3325 | } |
3326 | \f | |
3327 | /* Output of assembler code from a template, and its subroutines. */ | |
3328 | ||
0d4903b8 RK |
3329 | /* Annotate the assembly with a comment describing the pattern and |
3330 | alternative used. */ | |
3331 | ||
3332 | static void | |
6cf9ac28 | 3333 | output_asm_name (void) |
0d4903b8 RK |
3334 | { |
3335 | if (debug_insn) | |
3336 | { | |
3337 | int num = INSN_CODE (debug_insn); | |
3338 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3339 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3340 | insn_data[num].name); | |
3341 | if (insn_data[num].n_alternatives > 1) | |
3342 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
d327457f JR |
3343 | |
3344 | if (HAVE_ATTR_length) | |
3345 | fprintf (asm_out_file, "\t[length = %d]", | |
3346 | get_attr_length (debug_insn)); | |
3347 | ||
0d4903b8 RK |
3348 | /* Clear this so only the first assembler insn |
3349 | of any rtl insn will get the special comment for -dp. */ | |
3350 | debug_insn = 0; | |
3351 | } | |
3352 | } | |
3353 | ||
998d7deb RH |
3354 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3355 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3356 | corresponds to the address of the object and 0 if to the object. */ |
3357 | ||
3358 | static tree | |
6cf9ac28 | 3359 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3360 | { |
998d7deb | 3361 | tree expr; |
c5adc06a RK |
3362 | int inner_addressp; |
3363 | ||
3364 | *paddressp = 0; | |
3365 | ||
f8cfc6aa | 3366 | if (REG_P (op)) |
a560d4d4 | 3367 | return REG_EXPR (op); |
3c0cb5de | 3368 | else if (!MEM_P (op)) |
c5adc06a RK |
3369 | return 0; |
3370 | ||
998d7deb RH |
3371 | if (MEM_EXPR (op) != 0) |
3372 | return MEM_EXPR (op); | |
c5adc06a RK |
3373 | |
3374 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3375 | *paddressp = 1; | |
3376 | op = XEXP (op, 0); | |
3377 | ||
3378 | /* First check if we have a decl for the address, then look at the right side | |
3379 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3380 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3381 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3382 | return expr; | |
c5adc06a | 3383 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3384 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3385 | return expr; | |
c5adc06a | 3386 | |
481683e1 | 3387 | while (UNARY_P (op) |
ec8e098d | 3388 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3389 | op = XEXP (op, 0); |
3390 | ||
998d7deb RH |
3391 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3392 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3393 | } |
ff81832f | 3394 | |
4f9b4029 RK |
3395 | /* Output operand names for assembler instructions. OPERANDS is the |
3396 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3397 | is the number of operands to write. */ | |
3398 | ||
3399 | static void | |
6cf9ac28 | 3400 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3401 | { |
3402 | int wrote = 0; | |
3403 | int i; | |
3404 | ||
3405 | for (i = 0; i < nops; i++) | |
3406 | { | |
3407 | int addressp; | |
a560d4d4 JH |
3408 | rtx op = operands[oporder[i]]; |
3409 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3410 | |
a560d4d4 JH |
3411 | fprintf (asm_out_file, "%c%s", |
3412 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3413 | wrote = 1; | |
998d7deb | 3414 | if (expr) |
4f9b4029 | 3415 | { |
a560d4d4 | 3416 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3417 | addressp ? "*" : ""); |
3418 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3419 | wrote = 1; |
3420 | } | |
a560d4d4 JH |
3421 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3422 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3423 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3424 | } |
3425 | } | |
3426 | ||
d1658619 SP |
3427 | #ifdef ASSEMBLER_DIALECT |
3428 | /* Helper function to parse assembler dialects in the asm string. | |
3429 | This is called from output_asm_insn and asm_fprintf. */ | |
3430 | static const char * | |
3431 | do_assembler_dialects (const char *p, int *dialect) | |
3432 | { | |
3433 | char c = *(p - 1); | |
3434 | ||
3435 | switch (c) | |
3436 | { | |
3437 | case '{': | |
3438 | { | |
3439 | int i; | |
3440 | ||
3441 | if (*dialect) | |
3442 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3443 | else | |
3444 | *dialect = 1; | |
3445 | ||
3446 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3447 | DIALECT_NUMBER of strings ending with '|'. */ | |
3448 | for (i = 0; i < dialect_number; i++) | |
3449 | { | |
382522cb MK |
3450 | while (*p && *p != '}') |
3451 | { | |
3452 | if (*p == '|') | |
3453 | { | |
3454 | p++; | |
3455 | break; | |
3456 | } | |
3457 | ||
3458 | /* Skip over any character after a percent sign. */ | |
3459 | if (*p == '%') | |
3460 | p++; | |
3461 | if (*p) | |
3462 | p++; | |
3463 | } | |
3464 | ||
d1658619 SP |
3465 | if (*p == '}') |
3466 | break; | |
3467 | } | |
3468 | ||
3469 | if (*p == '\0') | |
3470 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3471 | } | |
3472 | break; | |
3473 | ||
3474 | case '|': | |
3475 | if (*dialect) | |
3476 | { | |
3477 | /* Skip to close brace. */ | |
3478 | do | |
3479 | { | |
3480 | if (*p == '\0') | |
3481 | { | |
3482 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3483 | break; | |
3484 | } | |
382522cb MK |
3485 | |
3486 | /* Skip over any character after a percent sign. */ | |
3487 | if (*p == '%' && p[1]) | |
3488 | { | |
3489 | p += 2; | |
3490 | continue; | |
3491 | } | |
3492 | ||
3493 | if (*p++ == '}') | |
3494 | break; | |
d1658619 | 3495 | } |
382522cb MK |
3496 | while (1); |
3497 | ||
d1658619 SP |
3498 | *dialect = 0; |
3499 | } | |
3500 | else | |
3501 | putc (c, asm_out_file); | |
3502 | break; | |
3503 | ||
3504 | case '}': | |
3505 | if (! *dialect) | |
3506 | putc (c, asm_out_file); | |
3507 | *dialect = 0; | |
3508 | break; | |
3509 | default: | |
3510 | gcc_unreachable (); | |
3511 | } | |
3512 | ||
3513 | return p; | |
3514 | } | |
3515 | #endif | |
3516 | ||
3cf2715d DE |
3517 | /* Output text from TEMPLATE to the assembler output file, |
3518 | obeying %-directions to substitute operands taken from | |
3519 | the vector OPERANDS. | |
3520 | ||
3521 | %N (for N a digit) means print operand N in usual manner. | |
3522 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3523 | and print the label name with no punctuation. | |
3524 | %cN means require operand N to be a constant | |
3525 | and print the constant expression with no punctuation. | |
3526 | %aN means expect operand N to be a memory address | |
3527 | (not a memory reference!) and print a reference | |
3528 | to that address. | |
3529 | %nN means expect operand N to be a constant | |
3530 | and print a constant expression for minus the value | |
3531 | of the operand, with no other punctuation. */ | |
3532 | ||
3533 | void | |
48c54229 | 3534 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3535 | { |
b3694847 SS |
3536 | const char *p; |
3537 | int c; | |
8554d9a4 JJ |
3538 | #ifdef ASSEMBLER_DIALECT |
3539 | int dialect = 0; | |
3540 | #endif | |
0d4903b8 | 3541 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3542 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3543 | int ops = 0; |
3cf2715d DE |
3544 | |
3545 | /* An insn may return a null string template | |
3546 | in a case where no assembler code is needed. */ | |
48c54229 | 3547 | if (*templ == 0) |
3cf2715d DE |
3548 | return; |
3549 | ||
4f9b4029 | 3550 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3551 | p = templ; |
3cf2715d DE |
3552 | putc ('\t', asm_out_file); |
3553 | ||
3554 | #ifdef ASM_OUTPUT_OPCODE | |
3555 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3556 | #endif | |
3557 | ||
b729186a | 3558 | while ((c = *p++)) |
3cf2715d DE |
3559 | switch (c) |
3560 | { | |
3cf2715d | 3561 | case '\n': |
4f9b4029 RK |
3562 | if (flag_verbose_asm) |
3563 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3564 | if (flag_print_asm_name) |
3565 | output_asm_name (); | |
3566 | ||
4f9b4029 RK |
3567 | ops = 0; |
3568 | memset (opoutput, 0, sizeof opoutput); | |
3569 | ||
3cf2715d | 3570 | putc (c, asm_out_file); |
cb649530 | 3571 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3572 | while ((c = *p) == '\t') |
3573 | { | |
3574 | putc (c, asm_out_file); | |
3575 | p++; | |
3576 | } | |
3577 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3578 | #endif |
cb649530 | 3579 | break; |
3cf2715d DE |
3580 | |
3581 | #ifdef ASSEMBLER_DIALECT | |
3582 | case '{': | |
3cf2715d | 3583 | case '}': |
d1658619 SP |
3584 | case '|': |
3585 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
3586 | break; |
3587 | #endif | |
3588 | ||
3589 | case '%': | |
382522cb MK |
3590 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3591 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3592 | meaning as dialect delimiters.*/ | |
3593 | if (*p == '%' | |
3594 | #ifdef ASSEMBLER_DIALECT | |
3595 | || *p == '{' || *p == '}' || *p == '|' | |
3596 | #endif | |
3597 | ) | |
3cf2715d | 3598 | { |
382522cb | 3599 | putc (*p, asm_out_file); |
3cf2715d | 3600 | p++; |
3cf2715d DE |
3601 | } |
3602 | /* %= outputs a number which is unique to each insn in the entire | |
3603 | compilation. This is useful for making local labels that are | |
3604 | referred to more than once in a given insn. */ | |
3605 | else if (*p == '=') | |
3606 | { | |
3607 | p++; | |
3608 | fprintf (asm_out_file, "%d", insn_counter); | |
3609 | } | |
3610 | /* % followed by a letter and some digits | |
3611 | outputs an operand in a special way depending on the letter. | |
3612 | Letters `acln' are implemented directly. | |
3613 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3614 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3615 | else if (ISALPHA (*p)) |
3cf2715d DE |
3616 | { |
3617 | int letter = *p++; | |
c383c15f GK |
3618 | unsigned long opnum; |
3619 | char *endptr; | |
b0efb46b | 3620 | |
c383c15f GK |
3621 | opnum = strtoul (p, &endptr, 10); |
3622 | ||
3623 | if (endptr == p) | |
3624 | output_operand_lossage ("operand number missing " | |
3625 | "after %%-letter"); | |
3626 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3627 | output_operand_lossage ("operand number out of range"); |
3628 | else if (letter == 'l') | |
c383c15f | 3629 | output_asm_label (operands[opnum]); |
3cf2715d | 3630 | else if (letter == 'a') |
c383c15f | 3631 | output_address (operands[opnum]); |
3cf2715d DE |
3632 | else if (letter == 'c') |
3633 | { | |
c383c15f GK |
3634 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3635 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3636 | else |
c383c15f | 3637 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3638 | } |
3639 | else if (letter == 'n') | |
3640 | { | |
481683e1 | 3641 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3642 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3643 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3644 | else |
3645 | { | |
3646 | putc ('-', asm_out_file); | |
c383c15f | 3647 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3648 | } |
3649 | } | |
3650 | else | |
c383c15f | 3651 | output_operand (operands[opnum], letter); |
f5d927c0 | 3652 | |
c383c15f | 3653 | if (!opoutput[opnum]) |
dc9d0b14 | 3654 | oporder[ops++] = opnum; |
c383c15f | 3655 | opoutput[opnum] = 1; |
0d4903b8 | 3656 | |
c383c15f GK |
3657 | p = endptr; |
3658 | c = *p; | |
3cf2715d DE |
3659 | } |
3660 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3661 | else if (ISDIGIT (*p)) |
3cf2715d | 3662 | { |
c383c15f GK |
3663 | unsigned long opnum; |
3664 | char *endptr; | |
b0efb46b | 3665 | |
c383c15f GK |
3666 | opnum = strtoul (p, &endptr, 10); |
3667 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3668 | output_operand_lossage ("operand number out of range"); |
3669 | else | |
c383c15f | 3670 | output_operand (operands[opnum], 0); |
0d4903b8 | 3671 | |
c383c15f | 3672 | if (!opoutput[opnum]) |
dc9d0b14 | 3673 | oporder[ops++] = opnum; |
c383c15f | 3674 | opoutput[opnum] = 1; |
4f9b4029 | 3675 | |
c383c15f GK |
3676 | p = endptr; |
3677 | c = *p; | |
3cf2715d DE |
3678 | } |
3679 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3680 | punctuation character alone, with no operand. The |
3681 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3682 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3683 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3684 | else |
3685 | output_operand_lossage ("invalid %%-code"); | |
3686 | break; | |
3687 | ||
3688 | default: | |
3689 | putc (c, asm_out_file); | |
3690 | } | |
3691 | ||
0d4903b8 RK |
3692 | /* Write out the variable names for operands, if we know them. */ |
3693 | if (flag_verbose_asm) | |
4f9b4029 | 3694 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3695 | if (flag_print_asm_name) |
3696 | output_asm_name (); | |
3cf2715d DE |
3697 | |
3698 | putc ('\n', asm_out_file); | |
3699 | } | |
3700 | \f | |
3701 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3702 | ||
3703 | void | |
6cf9ac28 | 3704 | output_asm_label (rtx x) |
3cf2715d DE |
3705 | { |
3706 | char buf[256]; | |
3707 | ||
3708 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 | 3709 | x = XEXP (x, 0); |
4b4bf941 JQ |
3710 | if (LABEL_P (x) |
3711 | || (NOTE_P (x) | |
a38e7aa5 | 3712 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3713 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3714 | else | |
9e637a26 | 3715 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3716 | |
3717 | assemble_name (asm_out_file, buf); | |
3718 | } | |
3719 | ||
a7fe25b8 JJ |
3720 | /* Helper rtx-iteration-function for mark_symbol_refs_as_used and |
3721 | output_operand. Marks SYMBOL_REFs as referenced through use of | |
3722 | assemble_external. */ | |
c70d0414 HPN |
3723 | |
3724 | static int | |
3725 | mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED) | |
3726 | { | |
3727 | rtx x = *xp; | |
3728 | ||
3729 | /* If we have a used symbol, we may have to emit assembly | |
3730 | annotations corresponding to whether the symbol is external, weak | |
3731 | or has non-default visibility. */ | |
3732 | if (GET_CODE (x) == SYMBOL_REF) | |
3733 | { | |
3734 | tree t; | |
3735 | ||
3736 | t = SYMBOL_REF_DECL (x); | |
3737 | if (t) | |
3738 | assemble_external (t); | |
3739 | ||
3740 | return -1; | |
3741 | } | |
3742 | ||
3743 | return 0; | |
3744 | } | |
3745 | ||
a7fe25b8 JJ |
3746 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3747 | ||
3748 | void | |
3749 | mark_symbol_refs_as_used (rtx x) | |
3750 | { | |
3751 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3752 | } | |
3753 | ||
3cf2715d | 3754 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3755 | CODE is a non-digit that preceded the operand-number in the % spec, |
3756 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3757 | between the % and the digits. | |
3758 | When CODE is a non-letter, X is 0. | |
3759 | ||
3760 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3761 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3762 | |
6b3c42ae | 3763 | void |
6cf9ac28 | 3764 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3765 | { |
3766 | if (x && GET_CODE (x) == SUBREG) | |
55a2c322 | 3767 | x = alter_subreg (&x, true); |
3cf2715d | 3768 | |
04c7ae48 | 3769 | /* X must not be a pseudo reg. */ |
0bccc606 | 3770 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
3cf2715d | 3771 | |
6e2188e0 | 3772 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
3773 | |
3774 | if (x == NULL_RTX) | |
3775 | return; | |
3776 | ||
3777 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3cf2715d DE |
3778 | } |
3779 | ||
6e2188e0 NF |
3780 | /* Print a memory reference operand for address X using |
3781 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
3782 | |
3783 | void | |
6cf9ac28 | 3784 | output_address (rtx x) |
3cf2715d | 3785 | { |
6fb5fa3c DB |
3786 | bool changed = false; |
3787 | walk_alter_subreg (&x, &changed); | |
6e2188e0 | 3788 | targetm.asm_out.print_operand_address (asm_out_file, x); |
3cf2715d DE |
3789 | } |
3790 | \f | |
3791 | /* Print an integer constant expression in assembler syntax. | |
3792 | Addition and subtraction are the only arithmetic | |
3793 | that may appear in these expressions. */ | |
3794 | ||
3795 | void | |
6cf9ac28 | 3796 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3797 | { |
3798 | char buf[256]; | |
3799 | ||
3800 | restart: | |
3801 | switch (GET_CODE (x)) | |
3802 | { | |
3803 | case PC: | |
eac50d7a | 3804 | putc ('.', file); |
3cf2715d DE |
3805 | break; |
3806 | ||
3807 | case SYMBOL_REF: | |
21dad7e6 | 3808 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 3809 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
3810 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3811 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3812 | #else | |
3cf2715d | 3813 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3814 | #endif |
3cf2715d DE |
3815 | break; |
3816 | ||
3817 | case LABEL_REF: | |
422be3c3 AO |
3818 | x = XEXP (x, 0); |
3819 | /* Fall through. */ | |
3cf2715d DE |
3820 | case CODE_LABEL: |
3821 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3822 | #ifdef ASM_OUTPUT_LABEL_REF |
3823 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3824 | #else | |
3cf2715d | 3825 | assemble_name (file, buf); |
2f0b7af6 | 3826 | #endif |
3cf2715d DE |
3827 | break; |
3828 | ||
3829 | case CONST_INT: | |
6725cc58 | 3830 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3831 | break; |
3832 | ||
3833 | case CONST: | |
3834 | /* This used to output parentheses around the expression, | |
3835 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3836 | output_addr_const (file, XEXP (x, 0)); | |
3837 | break; | |
3838 | ||
3839 | case CONST_DOUBLE: | |
3840 | if (GET_MODE (x) == VOIDmode) | |
3841 | { | |
3842 | /* We can use %d if the number is one word and positive. */ | |
3843 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3844 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
3845 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3846 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 3847 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
3848 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3849 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 3850 | else |
21e3a81b | 3851 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3852 | } |
3853 | else | |
3854 | /* We can't handle floating point constants; | |
3855 | PRINT_OPERAND must handle them. */ | |
3856 | output_operand_lossage ("floating constant misused"); | |
3857 | break; | |
3858 | ||
14c931f1 | 3859 | case CONST_FIXED: |
848fac28 | 3860 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
3861 | break; |
3862 | ||
3cf2715d DE |
3863 | case PLUS: |
3864 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 3865 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
3866 | { |
3867 | output_addr_const (file, XEXP (x, 1)); | |
3868 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3869 | fprintf (file, "+"); | |
3870 | output_addr_const (file, XEXP (x, 0)); | |
3871 | } | |
3872 | else | |
3873 | { | |
3874 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 3875 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 3876 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
3877 | fprintf (file, "+"); |
3878 | output_addr_const (file, XEXP (x, 1)); | |
3879 | } | |
3880 | break; | |
3881 | ||
3882 | case MINUS: | |
3883 | /* Avoid outputting things like x-x or x+5-x, | |
3884 | since some assemblers can't handle that. */ | |
3885 | x = simplify_subtraction (x); | |
3886 | if (GET_CODE (x) != MINUS) | |
3887 | goto restart; | |
3888 | ||
3889 | output_addr_const (file, XEXP (x, 0)); | |
3890 | fprintf (file, "-"); | |
481683e1 | 3891 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
3892 | || GET_CODE (XEXP (x, 1)) == PC |
3893 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3894 | output_addr_const (file, XEXP (x, 1)); | |
3895 | else | |
3cf2715d | 3896 | { |
17b53c33 | 3897 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3898 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3899 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3900 | } |
3cf2715d DE |
3901 | break; |
3902 | ||
3903 | case ZERO_EXTEND: | |
3904 | case SIGN_EXTEND: | |
fdf473ae | 3905 | case SUBREG: |
c01e4479 | 3906 | case TRUNCATE: |
3cf2715d DE |
3907 | output_addr_const (file, XEXP (x, 0)); |
3908 | break; | |
3909 | ||
3910 | default: | |
6cbd8875 AS |
3911 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
3912 | break; | |
422be3c3 | 3913 | |
3cf2715d DE |
3914 | output_operand_lossage ("invalid expression as operand"); |
3915 | } | |
3916 | } | |
3917 | \f | |
a803773f JM |
3918 | /* Output a quoted string. */ |
3919 | ||
3920 | void | |
3921 | output_quoted_string (FILE *asm_file, const char *string) | |
3922 | { | |
3923 | #ifdef OUTPUT_QUOTED_STRING | |
3924 | OUTPUT_QUOTED_STRING (asm_file, string); | |
3925 | #else | |
3926 | char c; | |
3927 | ||
3928 | putc ('\"', asm_file); | |
3929 | while ((c = *string++) != 0) | |
3930 | { | |
3931 | if (ISPRINT (c)) | |
3932 | { | |
3933 | if (c == '\"' || c == '\\') | |
3934 | putc ('\\', asm_file); | |
3935 | putc (c, asm_file); | |
3936 | } | |
3937 | else | |
3938 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
3939 | } | |
3940 | putc ('\"', asm_file); | |
3941 | #endif | |
3942 | } | |
3943 | \f | |
5e3929ed DA |
3944 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
3945 | ||
3946 | void | |
3947 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
3948 | { | |
3949 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
3950 | if (value == 0) | |
3951 | putc ('0', f); | |
3952 | else | |
3953 | { | |
3954 | char *p = buf + sizeof (buf); | |
3955 | do | |
3956 | *--p = "0123456789abcdef"[value % 16]; | |
3957 | while ((value /= 16) != 0); | |
3958 | *--p = 'x'; | |
3959 | *--p = '0'; | |
3960 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
3961 | } | |
3962 | } | |
3963 | ||
3964 | /* Internal function that prints an unsigned long in decimal in reverse. | |
3965 | The output string IS NOT null-terminated. */ | |
3966 | ||
3967 | static int | |
3968 | sprint_ul_rev (char *s, unsigned long value) | |
3969 | { | |
3970 | int i = 0; | |
3971 | do | |
3972 | { | |
3973 | s[i] = "0123456789"[value % 10]; | |
3974 | value /= 10; | |
3975 | i++; | |
3976 | /* alternate version, without modulo */ | |
3977 | /* oldval = value; */ | |
3978 | /* value /= 10; */ | |
3979 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
3980 | /* i++ */ | |
3981 | } | |
3982 | while (value != 0); | |
3983 | return i; | |
3984 | } | |
3985 | ||
5e3929ed DA |
3986 | /* Write an unsigned long as decimal to a file, fast. */ |
3987 | ||
3988 | void | |
3989 | fprint_ul (FILE *f, unsigned long value) | |
3990 | { | |
3991 | /* python says: len(str(2**64)) == 20 */ | |
3992 | char s[20]; | |
3993 | int i; | |
3994 | ||
3995 | i = sprint_ul_rev (s, value); | |
3996 | ||
3997 | /* It's probably too small to bother with string reversal and fputs. */ | |
3998 | do | |
3999 | { | |
4000 | i--; | |
4001 | putc (s[i], f); | |
4002 | } | |
4003 | while (i != 0); | |
4004 | } | |
4005 | ||
4006 | /* Write an unsigned long as decimal to a string, fast. | |
4007 | s must be wide enough to not overflow, at least 21 chars. | |
4008 | Returns the length of the string (without terminating '\0'). */ | |
4009 | ||
4010 | int | |
4011 | sprint_ul (char *s, unsigned long value) | |
4012 | { | |
4013 | int len; | |
4014 | char tmp_c; | |
4015 | int i; | |
4016 | int j; | |
4017 | ||
4018 | len = sprint_ul_rev (s, value); | |
4019 | s[len] = '\0'; | |
4020 | ||
4021 | /* Reverse the string. */ | |
4022 | i = 0; | |
4023 | j = len - 1; | |
4024 | while (i < j) | |
4025 | { | |
4026 | tmp_c = s[i]; | |
4027 | s[i] = s[j]; | |
4028 | s[j] = tmp_c; | |
4029 | i++; j--; | |
4030 | } | |
4031 | ||
4032 | return len; | |
4033 | } | |
4034 | ||
3cf2715d DE |
4035 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4036 | %R prints the value of REGISTER_PREFIX. | |
4037 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4038 | %U prints the value of USER_LABEL_PREFIX. | |
4039 | %I prints the value of IMMEDIATE_PREFIX. | |
4040 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 4041 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
4042 | |
4043 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4044 | ||
4045 | void | |
e34d07f2 | 4046 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 4047 | { |
3cf2715d DE |
4048 | char buf[10]; |
4049 | char *q, c; | |
d1658619 SP |
4050 | #ifdef ASSEMBLER_DIALECT |
4051 | int dialect = 0; | |
4052 | #endif | |
e34d07f2 | 4053 | va_list argptr; |
6cf9ac28 | 4054 | |
e34d07f2 | 4055 | va_start (argptr, p); |
3cf2715d DE |
4056 | |
4057 | buf[0] = '%'; | |
4058 | ||
b729186a | 4059 | while ((c = *p++)) |
3cf2715d DE |
4060 | switch (c) |
4061 | { | |
4062 | #ifdef ASSEMBLER_DIALECT | |
4063 | case '{': | |
3cf2715d | 4064 | case '}': |
d1658619 SP |
4065 | case '|': |
4066 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
4067 | break; |
4068 | #endif | |
4069 | ||
4070 | case '%': | |
4071 | c = *p++; | |
4072 | q = &buf[1]; | |
b1721339 KG |
4073 | while (strchr ("-+ #0", c)) |
4074 | { | |
4075 | *q++ = c; | |
4076 | c = *p++; | |
4077 | } | |
0df6c2c7 | 4078 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
4079 | { |
4080 | *q++ = c; | |
4081 | c = *p++; | |
4082 | } | |
4083 | switch (c) | |
4084 | { | |
4085 | case '%': | |
b1721339 | 4086 | putc ('%', file); |
3cf2715d DE |
4087 | break; |
4088 | ||
4089 | case 'd': case 'i': case 'u': | |
b1721339 KG |
4090 | case 'x': case 'X': case 'o': |
4091 | case 'c': | |
3cf2715d DE |
4092 | *q++ = c; |
4093 | *q = 0; | |
4094 | fprintf (file, buf, va_arg (argptr, int)); | |
4095 | break; | |
4096 | ||
4097 | case 'w': | |
b1721339 KG |
4098 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4099 | 'o' cases, but we do not check for those cases. It | |
4100 | means that the value is a HOST_WIDE_INT, which may be | |
4101 | either `long' or `long long'. */ | |
85f015e1 KG |
4102 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4103 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
4104 | *q++ = *p++; |
4105 | *q = 0; | |
4106 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4107 | break; | |
4108 | ||
4109 | case 'l': | |
4110 | *q++ = c; | |
b1721339 KG |
4111 | #ifdef HAVE_LONG_LONG |
4112 | if (*p == 'l') | |
4113 | { | |
4114 | *q++ = *p++; | |
4115 | *q++ = *p++; | |
4116 | *q = 0; | |
4117 | fprintf (file, buf, va_arg (argptr, long long)); | |
4118 | } | |
4119 | else | |
4120 | #endif | |
4121 | { | |
4122 | *q++ = *p++; | |
4123 | *q = 0; | |
4124 | fprintf (file, buf, va_arg (argptr, long)); | |
4125 | } | |
6cf9ac28 | 4126 | |
3cf2715d DE |
4127 | break; |
4128 | ||
4129 | case 's': | |
4130 | *q++ = c; | |
4131 | *q = 0; | |
4132 | fprintf (file, buf, va_arg (argptr, char *)); | |
4133 | break; | |
4134 | ||
4135 | case 'O': | |
4136 | #ifdef ASM_OUTPUT_OPCODE | |
4137 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4138 | #endif | |
4139 | break; | |
4140 | ||
4141 | case 'R': | |
4142 | #ifdef REGISTER_PREFIX | |
4143 | fprintf (file, "%s", REGISTER_PREFIX); | |
4144 | #endif | |
4145 | break; | |
4146 | ||
4147 | case 'I': | |
4148 | #ifdef IMMEDIATE_PREFIX | |
4149 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4150 | #endif | |
4151 | break; | |
4152 | ||
4153 | case 'L': | |
4154 | #ifdef LOCAL_LABEL_PREFIX | |
4155 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4156 | #endif | |
4157 | break; | |
4158 | ||
4159 | case 'U': | |
19283265 | 4160 | fputs (user_label_prefix, file); |
3cf2715d DE |
4161 | break; |
4162 | ||
fe0503ea | 4163 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 4164 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
4165 | and so are not available to target specific code. In order to |
4166 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4167 | they are defined here. As they get turned into real extensions | |
4168 | to asm_fprintf they should be removed from this list. */ | |
4169 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4170 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4171 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4172 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4173 | break; | |
f5d927c0 | 4174 | |
fe0503ea NC |
4175 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4176 | #endif | |
3cf2715d | 4177 | default: |
0bccc606 | 4178 | gcc_unreachable (); |
3cf2715d DE |
4179 | } |
4180 | break; | |
4181 | ||
4182 | default: | |
b1721339 | 4183 | putc (c, file); |
3cf2715d | 4184 | } |
e34d07f2 | 4185 | va_end (argptr); |
3cf2715d DE |
4186 | } |
4187 | \f | |
3cf2715d DE |
4188 | /* Return nonzero if this function has no function calls. */ |
4189 | ||
4190 | int | |
6cf9ac28 | 4191 | leaf_function_p (void) |
3cf2715d DE |
4192 | { |
4193 | rtx insn; | |
4194 | ||
e3b5732b | 4195 | if (crtl->profile || profile_arc_flag) |
3cf2715d DE |
4196 | return 0; |
4197 | ||
4198 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4199 | { | |
4b4bf941 | 4200 | if (CALL_P (insn) |
7d167afd | 4201 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4202 | return 0; |
4b4bf941 | 4203 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4204 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4205 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4206 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4207 | return 0; |
4208 | } | |
3cf2715d DE |
4209 | |
4210 | return 1; | |
4211 | } | |
4212 | ||
09da1532 | 4213 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4214 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4215 | output templates to customary add branch prediction hints. | |
4216 | */ | |
4217 | int | |
6cf9ac28 | 4218 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
4219 | { |
4220 | int insn_id, label_id; | |
b0efb46b | 4221 | |
0bccc606 | 4222 | gcc_assert (uid_shuid); |
ef6257cd JH |
4223 | insn_id = INSN_SHUID (insn); |
4224 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4225 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4226 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4227 | return insn_id < label_id; |
4228 | } | |
4229 | ||
3cf2715d DE |
4230 | /* On some machines, a function with no call insns |
4231 | can run faster if it doesn't create its own register window. | |
4232 | When output, the leaf function should use only the "output" | |
4233 | registers. Ordinarily, the function would be compiled to use | |
4234 | the "input" registers to find its arguments; it is a candidate | |
4235 | for leaf treatment if it uses only the "input" registers. | |
4236 | Leaf function treatment means renumbering so the function | |
4237 | uses the "output" registers instead. */ | |
4238 | ||
4239 | #ifdef LEAF_REGISTERS | |
4240 | ||
3cf2715d DE |
4241 | /* Return 1 if this function uses only the registers that can be |
4242 | safely renumbered. */ | |
4243 | ||
4244 | int | |
6cf9ac28 | 4245 | only_leaf_regs_used (void) |
3cf2715d DE |
4246 | { |
4247 | int i; | |
4977bab6 | 4248 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4249 | |
4250 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4251 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4252 | && ! permitted_reg_in_leaf_functions[i]) |
4253 | return 0; | |
4254 | ||
e3b5732b | 4255 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4256 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4257 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4258 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4259 | return 0; | |
4260 | ||
3cf2715d DE |
4261 | return 1; |
4262 | } | |
4263 | ||
4264 | /* Scan all instructions and renumber all registers into those | |
4265 | available in leaf functions. */ | |
4266 | ||
4267 | static void | |
6cf9ac28 | 4268 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
4269 | { |
4270 | rtx insn; | |
4271 | ||
4272 | /* Renumber only the actual patterns. | |
4273 | The reg-notes can contain frame pointer refs, | |
4274 | and renumbering them could crash, and should not be needed. */ | |
4275 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4276 | if (INSN_P (insn)) |
3cf2715d | 4277 | leaf_renumber_regs_insn (PATTERN (insn)); |
3cf2715d DE |
4278 | } |
4279 | ||
4280 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4281 | available in leaf functions. */ | |
4282 | ||
4283 | void | |
6cf9ac28 | 4284 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4285 | { |
b3694847 SS |
4286 | int i, j; |
4287 | const char *format_ptr; | |
3cf2715d DE |
4288 | |
4289 | if (in_rtx == 0) | |
4290 | return; | |
4291 | ||
4292 | /* Renumber all input-registers into output-registers. | |
4293 | renumbered_regs would be 1 for an output-register; | |
4294 | they */ | |
4295 | ||
f8cfc6aa | 4296 | if (REG_P (in_rtx)) |
3cf2715d DE |
4297 | { |
4298 | int newreg; | |
4299 | ||
4300 | /* Don't renumber the same reg twice. */ | |
4301 | if (in_rtx->used) | |
4302 | return; | |
4303 | ||
4304 | newreg = REGNO (in_rtx); | |
4305 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4306 | to reach here as part of a REG_NOTE. */ | |
4307 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4308 | { | |
4309 | in_rtx->used = 1; | |
4310 | return; | |
4311 | } | |
4312 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4313 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4314 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4315 | df_set_regs_ever_live (newreg, true); | |
4316 | SET_REGNO (in_rtx, newreg); | |
3cf2715d DE |
4317 | in_rtx->used = 1; |
4318 | } | |
4319 | ||
2c3c49de | 4320 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4321 | { |
4322 | /* Inside a SEQUENCE, we find insns. | |
4323 | Renumber just the patterns of these insns, | |
4324 | just as we do for the top-level insns. */ | |
4325 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4326 | return; | |
4327 | } | |
4328 | ||
4329 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4330 | ||
4331 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4332 | switch (*format_ptr++) | |
4333 | { | |
4334 | case 'e': | |
4335 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4336 | break; | |
4337 | ||
4338 | case 'E': | |
4339 | if (NULL != XVEC (in_rtx, i)) | |
4340 | { | |
4341 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4342 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4343 | } | |
4344 | break; | |
4345 | ||
4346 | case 'S': | |
4347 | case 's': | |
4348 | case '0': | |
4349 | case 'i': | |
4350 | case 'w': | |
4351 | case 'n': | |
4352 | case 'u': | |
4353 | break; | |
4354 | ||
4355 | default: | |
0bccc606 | 4356 | gcc_unreachable (); |
3cf2715d DE |
4357 | } |
4358 | } | |
4359 | #endif | |
ef330312 PB |
4360 | \f |
4361 | /* Turn the RTL into assembly. */ | |
c2924966 | 4362 | static unsigned int |
ef330312 PB |
4363 | rest_of_handle_final (void) |
4364 | { | |
4365 | rtx x; | |
4366 | const char *fnname; | |
4367 | ||
4368 | /* Get the function's name, as described by its RTL. This may be | |
4369 | different from the DECL_NAME name used in the source file. */ | |
4370 | ||
4371 | x = DECL_RTL (current_function_decl); | |
4372 | gcc_assert (MEM_P (x)); | |
4373 | x = XEXP (x, 0); | |
4374 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
4375 | fnname = XSTR (x, 0); | |
4376 | ||
4377 | assemble_start_function (current_function_decl, fnname); | |
4378 | final_start_function (get_insns (), asm_out_file, optimize); | |
4379 | final (get_insns (), asm_out_file, optimize); | |
4380 | final_end_function (); | |
4381 | ||
182a0c11 RH |
4382 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4383 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4384 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4385 | output_function_exception_table (fnname); |
ef330312 PB |
4386 | |
4387 | assemble_end_function (current_function_decl, fnname); | |
4388 | ||
ef330312 PB |
4389 | user_defined_section_attribute = false; |
4390 | ||
6fb5fa3c DB |
4391 | /* Free up reg info memory. */ |
4392 | free_reg_info (); | |
4393 | ||
ef330312 PB |
4394 | if (! quiet_flag) |
4395 | fflush (asm_out_file); | |
4396 | ||
ef330312 PB |
4397 | /* Write DBX symbols if requested. */ |
4398 | ||
4399 | /* Note that for those inline functions where we don't initially | |
4400 | know for certain that we will be generating an out-of-line copy, | |
4401 | the first invocation of this routine (rest_of_compilation) will | |
4402 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4403 | Later on, wrapup_global_declarations will (indirectly) call | |
4404 | rest_of_compilation again for those inline functions that need | |
4405 | to have out-of-line copies generated. During that call, we | |
4406 | *will* be routed past here. */ | |
4407 | ||
4408 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4409 | if (!DECL_IGNORED_P (current_function_decl)) |
4410 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4411 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4412 | |
4413 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4414 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4415 | ||
395a40e0 JH |
4416 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4417 | && targetm.have_ctors_dtors) | |
4418 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4419 | decl_init_priority_lookup | |
4420 | (current_function_decl)); | |
4421 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4422 | && targetm.have_ctors_dtors) | |
4423 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4424 | decl_fini_priority_lookup | |
4425 | (current_function_decl)); | |
c2924966 | 4426 | return 0; |
ef330312 PB |
4427 | } |
4428 | ||
27a4cd48 DM |
4429 | namespace { |
4430 | ||
4431 | const pass_data pass_data_final = | |
ef330312 | 4432 | { |
27a4cd48 DM |
4433 | RTL_PASS, /* type */ |
4434 | "final", /* name */ | |
4435 | OPTGROUP_NONE, /* optinfo_flags */ | |
4436 | false, /* has_gate */ | |
4437 | true, /* has_execute */ | |
4438 | TV_FINAL, /* tv_id */ | |
4439 | 0, /* properties_required */ | |
4440 | 0, /* properties_provided */ | |
4441 | 0, /* properties_destroyed */ | |
4442 | 0, /* todo_flags_start */ | |
4443 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4444 | }; |
4445 | ||
27a4cd48 DM |
4446 | class pass_final : public rtl_opt_pass |
4447 | { | |
4448 | public: | |
4449 | pass_final(gcc::context *ctxt) | |
4450 | : rtl_opt_pass(pass_data_final, ctxt) | |
4451 | {} | |
4452 | ||
4453 | /* opt_pass methods: */ | |
4454 | unsigned int execute () { return rest_of_handle_final (); } | |
4455 | ||
4456 | }; // class pass_final | |
4457 | ||
4458 | } // anon namespace | |
4459 | ||
4460 | rtl_opt_pass * | |
4461 | make_pass_final (gcc::context *ctxt) | |
4462 | { | |
4463 | return new pass_final (ctxt); | |
4464 | } | |
4465 | ||
ef330312 | 4466 | |
c2924966 | 4467 | static unsigned int |
ef330312 PB |
4468 | rest_of_handle_shorten_branches (void) |
4469 | { | |
4470 | /* Shorten branches. */ | |
4471 | shorten_branches (get_insns ()); | |
c2924966 | 4472 | return 0; |
ef330312 | 4473 | } |
b0efb46b | 4474 | |
27a4cd48 DM |
4475 | namespace { |
4476 | ||
4477 | const pass_data pass_data_shorten_branches = | |
ef330312 | 4478 | { |
27a4cd48 DM |
4479 | RTL_PASS, /* type */ |
4480 | "shorten", /* name */ | |
4481 | OPTGROUP_NONE, /* optinfo_flags */ | |
4482 | false, /* has_gate */ | |
4483 | true, /* has_execute */ | |
4484 | TV_SHORTEN_BRANCH, /* tv_id */ | |
4485 | 0, /* properties_required */ | |
4486 | 0, /* properties_provided */ | |
4487 | 0, /* properties_destroyed */ | |
4488 | 0, /* todo_flags_start */ | |
4489 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4490 | }; |
4491 | ||
27a4cd48 DM |
4492 | class pass_shorten_branches : public rtl_opt_pass |
4493 | { | |
4494 | public: | |
4495 | pass_shorten_branches(gcc::context *ctxt) | |
4496 | : rtl_opt_pass(pass_data_shorten_branches, ctxt) | |
4497 | {} | |
4498 | ||
4499 | /* opt_pass methods: */ | |
4500 | unsigned int execute () { return rest_of_handle_shorten_branches (); } | |
4501 | ||
4502 | }; // class pass_shorten_branches | |
4503 | ||
4504 | } // anon namespace | |
4505 | ||
4506 | rtl_opt_pass * | |
4507 | make_pass_shorten_branches (gcc::context *ctxt) | |
4508 | { | |
4509 | return new pass_shorten_branches (ctxt); | |
4510 | } | |
4511 | ||
ef330312 | 4512 | |
c2924966 | 4513 | static unsigned int |
ef330312 PB |
4514 | rest_of_clean_state (void) |
4515 | { | |
4516 | rtx insn, next; | |
2153915d AO |
4517 | FILE *final_output = NULL; |
4518 | int save_unnumbered = flag_dump_unnumbered; | |
4519 | int save_noaddr = flag_dump_noaddr; | |
4520 | ||
4521 | if (flag_dump_final_insns) | |
4522 | { | |
4523 | final_output = fopen (flag_dump_final_insns, "a"); | |
4524 | if (!final_output) | |
4525 | { | |
7ca92787 JM |
4526 | error ("could not open final insn dump file %qs: %m", |
4527 | flag_dump_final_insns); | |
2153915d AO |
4528 | flag_dump_final_insns = NULL; |
4529 | } | |
4530 | else | |
4531 | { | |
2153915d | 4532 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb RG |
4533 | if (flag_compare_debug_opt || flag_compare_debug) |
4534 | dump_flags |= TDF_NOUID; | |
6d8402ac AO |
4535 | dump_function_header (final_output, current_function_decl, |
4536 | dump_flags); | |
6ca5d1f6 | 4537 | final_insns_dump_p = true; |
2153915d AO |
4538 | |
4539 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4540 | if (LABEL_P (insn)) | |
4541 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4542 | else | |
a59d15cf AO |
4543 | { |
4544 | if (NOTE_P (insn)) | |
4545 | set_block_for_insn (insn, NULL); | |
4546 | INSN_UID (insn) = 0; | |
4547 | } | |
2153915d AO |
4548 | } |
4549 | } | |
ef330312 PB |
4550 | |
4551 | /* It is very important to decompose the RTL instruction chain here: | |
4552 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4553 | body. If these remain pointing to the other insns, we end up preserving | |
4554 | whole RTL chain and attached detailed debug info in memory. */ | |
4555 | for (insn = get_insns (); insn; insn = next) | |
4556 | { | |
4557 | next = NEXT_INSN (insn); | |
4558 | NEXT_INSN (insn) = NULL; | |
4559 | PREV_INSN (insn) = NULL; | |
2153915d AO |
4560 | |
4561 | if (final_output | |
4562 | && (!NOTE_P (insn) || | |
4563 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
2b1c5433 | 4564 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4565 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4566 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4567 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4568 | print_rtl_single (final_output, insn); |
2153915d AO |
4569 | } |
4570 | ||
4571 | if (final_output) | |
4572 | { | |
4573 | flag_dump_noaddr = save_noaddr; | |
4574 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4575 | final_insns_dump_p = false; |
2153915d AO |
4576 | |
4577 | if (fclose (final_output)) | |
4578 | { | |
7ca92787 JM |
4579 | error ("could not close final insn dump file %qs: %m", |
4580 | flag_dump_final_insns); | |
2153915d AO |
4581 | flag_dump_final_insns = NULL; |
4582 | } | |
ef330312 PB |
4583 | } |
4584 | ||
4585 | /* In case the function was not output, | |
4586 | don't leave any temporary anonymous types | |
4587 | queued up for sdb output. */ | |
4588 | #ifdef SDB_DEBUGGING_INFO | |
4589 | if (write_symbols == SDB_DEBUG) | |
4590 | sdbout_types (NULL_TREE); | |
4591 | #endif | |
4592 | ||
5f39ad47 | 4593 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4594 | reload_completed = 0; |
4595 | epilogue_completed = 0; | |
23249ac4 DB |
4596 | #ifdef STACK_REGS |
4597 | regstack_completed = 0; | |
4598 | #endif | |
ef330312 PB |
4599 | |
4600 | /* Clear out the insn_length contents now that they are no | |
4601 | longer valid. */ | |
4602 | init_insn_lengths (); | |
4603 | ||
4604 | /* Show no temporary slots allocated. */ | |
4605 | init_temp_slots (); | |
4606 | ||
ef330312 PB |
4607 | free_bb_for_insn (); |
4608 | ||
55b34b5f RG |
4609 | delete_tree_ssa (); |
4610 | ||
051f8cc6 JH |
4611 | /* We can reduce stack alignment on call site only when we are sure that |
4612 | the function body just produced will be actually used in the final | |
4613 | executable. */ | |
4614 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4615 | { |
17b29c0a | 4616 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4617 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4618 | pref = crtl->stack_alignment_needed; | |
ef330312 PB |
4619 | cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary |
4620 | = pref; | |
4621 | } | |
4622 | ||
4623 | /* Make sure volatile mem refs aren't considered valid operands for | |
4624 | arithmetic insns. We must call this here if this is a nested inline | |
4625 | function, since the above code leaves us in the init_recog state, | |
4626 | and the function context push/pop code does not save/restore volatile_ok. | |
4627 | ||
4628 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4629 | anymore if we do it here? */ | |
4630 | ||
4631 | init_recog_no_volatile (); | |
4632 | ||
4633 | /* We're done with this function. Free up memory if we can. */ | |
4634 | free_after_parsing (cfun); | |
4635 | free_after_compilation (cfun); | |
c2924966 | 4636 | return 0; |
ef330312 PB |
4637 | } |
4638 | ||
27a4cd48 DM |
4639 | namespace { |
4640 | ||
4641 | const pass_data pass_data_clean_state = | |
ef330312 | 4642 | { |
27a4cd48 DM |
4643 | RTL_PASS, /* type */ |
4644 | "*clean_state", /* name */ | |
4645 | OPTGROUP_NONE, /* optinfo_flags */ | |
4646 | false, /* has_gate */ | |
4647 | true, /* has_execute */ | |
4648 | TV_FINAL, /* tv_id */ | |
4649 | 0, /* properties_required */ | |
4650 | 0, /* properties_provided */ | |
4651 | PROP_rtl, /* properties_destroyed */ | |
4652 | 0, /* todo_flags_start */ | |
4653 | 0, /* todo_flags_finish */ | |
ef330312 | 4654 | }; |
27a4cd48 DM |
4655 | |
4656 | class pass_clean_state : public rtl_opt_pass | |
4657 | { | |
4658 | public: | |
4659 | pass_clean_state(gcc::context *ctxt) | |
4660 | : rtl_opt_pass(pass_data_clean_state, ctxt) | |
4661 | {} | |
4662 | ||
4663 | /* opt_pass methods: */ | |
4664 | unsigned int execute () { return rest_of_clean_state (); } | |
4665 | ||
4666 | }; // class pass_clean_state | |
4667 | ||
4668 | } // anon namespace | |
4669 | ||
4670 | rtl_opt_pass * | |
4671 | make_pass_clean_state (gcc::context *ctxt) | |
4672 | { | |
4673 | return new pass_clean_state (ctxt); | |
4674 | } |