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23b2ce53 | 1 | /* Emit RTL for the GNU C-Compiler expander. |
a3a03040 | 2 | Copyright (C) 1987, 88, 92-96, 1997 Free Software Foundation, Inc. |
23b2ce53 RS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
23b2ce53 RS |
20 | |
21 | ||
22 | /* Middle-to-low level generation of rtx code and insns. | |
23 | ||
24 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
25 | and `gen_label_rtx' that are the usual ways of creating rtl | |
26 | expressions for most purposes. | |
27 | ||
28 | It also has the functions for creating insns and linking | |
29 | them in the doubly-linked chain. | |
30 | ||
31 | The patterns of the insns are created by machine-dependent | |
32 | routines in insn-emit.c, which is generated automatically from | |
33 | the machine description. These routines use `gen_rtx' to make | |
34 | the individual rtx's of the pattern; what is machine dependent | |
35 | is the kind of rtx's they make and what arguments they use. */ | |
36 | ||
37 | #include "config.h" | |
e9a25f70 | 38 | #include <stdio.h> |
4f90e4a0 | 39 | #ifdef __STDC__ |
04fe4385 | 40 | #include <stdarg.h> |
4f90e4a0 | 41 | #else |
04fe4385 | 42 | #include <varargs.h> |
4f90e4a0 | 43 | #endif |
23b2ce53 | 44 | #include "rtl.h" |
a25c7971 | 45 | #include "tree.h" |
23b2ce53 | 46 | #include "flags.h" |
1ef08c63 | 47 | #include "except.h" |
23b2ce53 RS |
48 | #include "function.h" |
49 | #include "expr.h" | |
50 | #include "regs.h" | |
51 | #include "insn-config.h" | |
e9a25f70 | 52 | #include "recog.h" |
23b2ce53 | 53 | #include "real.h" |
ca695ac9 JB |
54 | #include "obstack.h" |
55 | ||
ca695ac9 | 56 | #include "machmode.h" |
ca695ac9 | 57 | |
1d445e9e ILT |
58 | /* Commonly used modes. */ |
59 | ||
0f41302f MS |
60 | enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */ |
61 | enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */ | |
62 | enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */ | |
1d445e9e | 63 | |
23b2ce53 RS |
64 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. |
65 | After rtl generation, it is 1 plus the largest register number used. */ | |
66 | ||
67 | int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
68 | ||
69 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
70 | in the entire compilation a unique label number. */ | |
71 | ||
72 | static int label_num = 1; | |
73 | ||
74 | /* Lowest label number in current function. */ | |
75 | ||
76 | static int first_label_num; | |
77 | ||
78 | /* Highest label number in current function. | |
79 | Zero means use the value of label_num instead. | |
80 | This is nonzero only when belatedly compiling an inline function. */ | |
81 | ||
82 | static int last_label_num; | |
83 | ||
84 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
85 | If label_num has not changed since then, last_label_num is valid. */ | |
86 | ||
87 | static int base_label_num; | |
88 | ||
89 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
90 | ||
91 | static int no_line_numbers; | |
92 | ||
93 | /* Commonly used rtx's, so that we only need space for one copy. | |
94 | These are initialized once for the entire compilation. | |
95 | All of these except perhaps the floating-point CONST_DOUBLEs | |
96 | are unique; no other rtx-object will be equal to any of these. */ | |
97 | ||
68d75312 JC |
98 | struct _global_rtl global_rtl = |
99 | { | |
100 | {PC, VOIDmode}, /* pc_rtx */ | |
101 | {CC0, VOIDmode}, /* cc0_rtx */ | |
102 | {REG}, /* stack_pointer_rtx */ | |
103 | {REG}, /* frame_pointer_rtx */ | |
104 | {REG}, /* hard_frame_pointer_rtx */ | |
105 | {REG}, /* arg_pointer_rtx */ | |
106 | {REG}, /* virtual_incoming_args_rtx */ | |
107 | {REG}, /* virtual_stack_vars_rtx */ | |
108 | {REG}, /* virtual_stack_dynamic_rtx */ | |
109 | {REG}, /* virtual_outgoing_args_rtx */ | |
110 | }; | |
23b2ce53 RS |
111 | |
112 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
113 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
114 | record a copy of const[012]_rtx. */ | |
115 | ||
116 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
117 | ||
68d75312 JC |
118 | rtx const_true_rtx; |
119 | ||
23b2ce53 RS |
120 | REAL_VALUE_TYPE dconst0; |
121 | REAL_VALUE_TYPE dconst1; | |
122 | REAL_VALUE_TYPE dconst2; | |
123 | REAL_VALUE_TYPE dconstm1; | |
124 | ||
125 | /* All references to the following fixed hard registers go through | |
126 | these unique rtl objects. On machines where the frame-pointer and | |
127 | arg-pointer are the same register, they use the same unique object. | |
128 | ||
129 | After register allocation, other rtl objects which used to be pseudo-regs | |
130 | may be clobbered to refer to the frame-pointer register. | |
131 | But references that were originally to the frame-pointer can be | |
132 | distinguished from the others because they contain frame_pointer_rtx. | |
133 | ||
ac6f08b0 DE |
134 | When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little |
135 | tricky: until register elimination has taken place hard_frame_pointer_rtx | |
136 | should be used if it is being set, and frame_pointer_rtx otherwise. After | |
137 | register elimination hard_frame_pointer_rtx should always be used. | |
138 | On machines where the two registers are same (most) then these are the | |
139 | same. | |
140 | ||
23b2ce53 RS |
141 | In an inline procedure, the stack and frame pointer rtxs may not be |
142 | used for anything else. */ | |
23b2ce53 RS |
143 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ |
144 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
145 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
146 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
147 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
148 | ||
a4417a86 JW |
149 | /* This is used to implement __builtin_return_address for some machines. |
150 | See for instance the MIPS port. */ | |
151 | rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ | |
152 | ||
23b2ce53 RS |
153 | /* We make one copy of (const_int C) where C is in |
154 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
155 | to save space during the compilation and simplify comparisons of | |
156 | integers. */ | |
157 | ||
68d75312 | 158 | struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; |
23b2ce53 RS |
159 | |
160 | /* The ends of the doubly-linked chain of rtl for the current function. | |
161 | Both are reset to null at the start of rtl generation for the function. | |
162 | ||
a25c7971 RK |
163 | start_sequence saves both of these on `sequence_stack' along with |
164 | `sequence_rtl_expr' and then starts a new, nested sequence of insns. */ | |
23b2ce53 RS |
165 | |
166 | static rtx first_insn = NULL; | |
167 | static rtx last_insn = NULL; | |
168 | ||
a25c7971 RK |
169 | /* RTL_EXPR within which the current sequence will be placed. Use to |
170 | prevent reuse of any temporaries within the sequence until after the | |
171 | RTL_EXPR is emitted. */ | |
172 | ||
173 | tree sequence_rtl_expr = NULL; | |
174 | ||
23b2ce53 RS |
175 | /* INSN_UID for next insn emitted. |
176 | Reset to 1 for each function compiled. */ | |
177 | ||
178 | static int cur_insn_uid = 1; | |
179 | ||
180 | /* Line number and source file of the last line-number NOTE emitted. | |
181 | This is used to avoid generating duplicates. */ | |
182 | ||
183 | static int last_linenum = 0; | |
184 | static char *last_filename = 0; | |
185 | ||
186 | /* A vector indexed by pseudo reg number. The allocated length | |
187 | of this vector is regno_pointer_flag_length. Since this | |
188 | vector is needed during the expansion phase when the total | |
189 | number of registers in the function is not yet known, | |
190 | it is copied and made bigger when necessary. */ | |
191 | ||
192 | char *regno_pointer_flag; | |
193 | int regno_pointer_flag_length; | |
194 | ||
86fe05e0 RK |
195 | /* Indexed by pseudo register number, if nonzero gives the known alignment |
196 | for that pseudo (if regno_pointer_flag is set). | |
197 | Allocated in parallel with regno_pointer_flag. */ | |
198 | char *regno_pointer_align; | |
199 | ||
23b2ce53 RS |
200 | /* Indexed by pseudo register number, gives the rtx for that pseudo. |
201 | Allocated in parallel with regno_pointer_flag. */ | |
202 | ||
203 | rtx *regno_reg_rtx; | |
204 | ||
205 | /* Stack of pending (incomplete) sequences saved by `start_sequence'. | |
206 | Each element describes one pending sequence. | |
207 | The main insn-chain is saved in the last element of the chain, | |
208 | unless the chain is empty. */ | |
209 | ||
210 | struct sequence_stack *sequence_stack; | |
211 | ||
212 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are | |
213 | shortly thrown away. We use two mechanisms to prevent this waste: | |
214 | ||
215 | First, we keep a list of the expressions used to represent the sequence | |
216 | stack in sequence_element_free_list. | |
217 | ||
218 | Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated | |
219 | rtvec for use by gen_sequence. One entry for each size is sufficient | |
220 | because most cases are calls to gen_sequence followed by immediately | |
221 | emitting the SEQUENCE. Reuse is safe since emitting a sequence is | |
222 | destructive on the insn in it anyway and hence can't be redone. | |
223 | ||
224 | We do not bother to save this cached data over nested function calls. | |
225 | Instead, we just reinitialize them. */ | |
226 | ||
227 | #define SEQUENCE_RESULT_SIZE 5 | |
228 | ||
229 | static struct sequence_stack *sequence_element_free_list; | |
230 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; | |
231 | ||
0f41302f | 232 | /* During RTL generation, we also keep a list of free INSN rtl codes. */ |
43127294 RK |
233 | static rtx free_insn; |
234 | ||
23b2ce53 RS |
235 | extern int rtx_equal_function_value_matters; |
236 | ||
237 | /* Filename and line number of last line-number note, | |
238 | whether we actually emitted it or not. */ | |
239 | extern char *emit_filename; | |
240 | extern int emit_lineno; | |
956d6950 JL |
241 | |
242 | static rtx make_jump_insn_raw PROTO((rtx)); | |
243 | static rtx make_call_insn_raw PROTO((rtx)); | |
1d300e19 | 244 | static rtx find_line_note PROTO((rtx)); |
ca695ac9 | 245 | \f |
3b80f6ca RH |
246 | rtx |
247 | gen_rtx_CONST_INT (mode, arg) | |
248 | enum machine_mode mode; | |
249 | HOST_WIDE_INT arg; | |
250 | { | |
251 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) | |
252 | return &const_int_rtx[arg + MAX_SAVED_CONST_INT]; | |
253 | ||
254 | #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1 | |
255 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
256 | return const_true_rtx; | |
257 | #endif | |
258 | ||
259 | return gen_rtx_raw_CONST_INT (mode, arg); | |
260 | } | |
261 | ||
262 | rtx | |
263 | gen_rtx_REG (mode, regno) | |
264 | enum machine_mode mode; | |
265 | int regno; | |
266 | { | |
267 | /* In case the MD file explicitly references the frame pointer, have | |
268 | all such references point to the same frame pointer. This is | |
269 | used during frame pointer elimination to distinguish the explicit | |
270 | references to these registers from pseudos that happened to be | |
271 | assigned to them. | |
272 | ||
273 | If we have eliminated the frame pointer or arg pointer, we will | |
274 | be using it as a normal register, for example as a spill | |
275 | register. In such cases, we might be accessing it in a mode that | |
276 | is not Pmode and therefore cannot use the pre-allocated rtx. | |
277 | ||
278 | Also don't do this when we are making new REGs in reload, since | |
279 | we don't want to get confused with the real pointers. */ | |
280 | ||
281 | if (mode == Pmode && !reload_in_progress) | |
282 | { | |
283 | if (regno == FRAME_POINTER_REGNUM) | |
284 | return frame_pointer_rtx; | |
285 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
286 | if (regno == HARD_FRAME_POINTER_REGNUM) | |
287 | return hard_frame_pointer_rtx; | |
288 | #endif | |
289 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
290 | if (regno == ARG_POINTER_REGNUM) | |
291 | return arg_pointer_rtx; | |
292 | #endif | |
293 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
294 | if (regno == RETURN_ADDRESS_POINTER_REGNUM) | |
295 | return return_address_pointer_rtx; | |
296 | #endif | |
297 | if (regno == STACK_POINTER_REGNUM) | |
298 | return stack_pointer_rtx; | |
299 | } | |
300 | ||
301 | return gen_rtx_raw_REG (mode, regno); | |
302 | } | |
303 | ||
23b2ce53 RS |
304 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
305 | ** | |
306 | ** This routine generates an RTX of the size specified by | |
307 | ** <code>, which is an RTX code. The RTX structure is initialized | |
308 | ** from the arguments <element1> through <elementn>, which are | |
309 | ** interpreted according to the specific RTX type's format. The | |
310 | ** special machine mode associated with the rtx (if any) is specified | |
311 | ** in <mode>. | |
312 | ** | |
1632afca | 313 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
23b2ce53 RS |
314 | ** rtx it will generate. For example, the following rtx structure: |
315 | ** | |
316 | ** (plus:QI (mem:QI (reg:SI 1)) | |
317 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
318 | ** | |
319 | ** ...would be generated by the following C code: | |
320 | ** | |
321 | ** gen_rtx (PLUS, QImode, | |
322 | ** gen_rtx (MEM, QImode, | |
323 | ** gen_rtx (REG, SImode, 1)), | |
324 | ** gen_rtx (MEM, QImode, | |
325 | ** gen_rtx (PLUS, SImode, | |
326 | ** gen_rtx (REG, SImode, 2), | |
327 | ** gen_rtx (REG, SImode, 3)))), | |
328 | */ | |
329 | ||
330 | /*VARARGS2*/ | |
331 | rtx | |
4f90e4a0 | 332 | gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) |
23b2ce53 | 333 | { |
4f90e4a0 | 334 | #ifndef __STDC__ |
23b2ce53 RS |
335 | enum rtx_code code; |
336 | enum machine_mode mode; | |
4f90e4a0 RK |
337 | #endif |
338 | va_list p; | |
23b2ce53 RS |
339 | register int i; /* Array indices... */ |
340 | register char *fmt; /* Current rtx's format... */ | |
341 | register rtx rt_val; /* RTX to return to caller... */ | |
342 | ||
4f90e4a0 RK |
343 | VA_START (p, mode); |
344 | ||
345 | #ifndef __STDC__ | |
23b2ce53 RS |
346 | code = va_arg (p, enum rtx_code); |
347 | mode = va_arg (p, enum machine_mode); | |
4f90e4a0 | 348 | #endif |
23b2ce53 RS |
349 | |
350 | if (code == CONST_INT) | |
3b80f6ca | 351 | rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT)); |
23b2ce53 | 352 | else if (code == REG) |
3b80f6ca | 353 | rt_val = gen_rtx_REG (mode, va_arg (p, int)); |
23b2ce53 RS |
354 | else |
355 | { | |
356 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ | |
357 | rt_val->mode = mode; /* Store the machine mode... */ | |
358 | ||
359 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
360 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
361 | { | |
362 | switch (*fmt++) | |
363 | { | |
364 | case '0': /* Unused field. */ | |
365 | break; | |
366 | ||
367 | case 'i': /* An integer? */ | |
368 | XINT (rt_val, i) = va_arg (p, int); | |
369 | break; | |
370 | ||
906c4e36 RK |
371 | case 'w': /* A wide integer? */ |
372 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
373 | break; | |
374 | ||
23b2ce53 RS |
375 | case 's': /* A string? */ |
376 | XSTR (rt_val, i) = va_arg (p, char *); | |
377 | break; | |
378 | ||
379 | case 'e': /* An expression? */ | |
380 | case 'u': /* An insn? Same except when printing. */ | |
381 | XEXP (rt_val, i) = va_arg (p, rtx); | |
382 | break; | |
383 | ||
384 | case 'E': /* An RTX vector? */ | |
385 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
386 | break; | |
387 | ||
388 | default: | |
1632afca | 389 | abort (); |
23b2ce53 RS |
390 | } |
391 | } | |
392 | } | |
393 | va_end (p); | |
394 | return rt_val; /* Return the new RTX... */ | |
395 | } | |
396 | ||
397 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
398 | ** | |
399 | ** This routine creates an rtvec and stores within it the | |
400 | ** pointers to rtx's which are its arguments. | |
401 | */ | |
402 | ||
403 | /*VARARGS1*/ | |
404 | rtvec | |
4f90e4a0 | 405 | gen_rtvec VPROTO((int n, ...)) |
23b2ce53 | 406 | { |
4f90e4a0 RK |
407 | #ifndef __STDC__ |
408 | int n; | |
409 | #endif | |
410 | int i; | |
23b2ce53 RS |
411 | va_list p; |
412 | rtx *vector; | |
413 | ||
4f90e4a0 RK |
414 | VA_START (p, n); |
415 | ||
416 | #ifndef __STDC__ | |
23b2ce53 | 417 | n = va_arg (p, int); |
4f90e4a0 | 418 | #endif |
23b2ce53 RS |
419 | |
420 | if (n == 0) | |
421 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
422 | ||
423 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
4f90e4a0 | 424 | |
23b2ce53 RS |
425 | for (i = 0; i < n; i++) |
426 | vector[i] = va_arg (p, rtx); | |
427 | va_end (p); | |
428 | ||
429 | return gen_rtvec_v (n, vector); | |
430 | } | |
431 | ||
432 | rtvec | |
433 | gen_rtvec_v (n, argp) | |
434 | int n; | |
435 | rtx *argp; | |
436 | { | |
437 | register int i; | |
438 | register rtvec rt_val; | |
439 | ||
440 | if (n == 0) | |
441 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
442 | ||
443 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
444 | ||
445 | for (i = 0; i < n; i++) | |
446 | rt_val->elem[i].rtx = *argp++; | |
447 | ||
448 | return rt_val; | |
449 | } | |
ba444f92 RK |
450 | |
451 | rtvec | |
452 | gen_rtvec_vv (n, argp) | |
453 | int n; | |
454 | rtunion *argp; | |
455 | { | |
456 | register int i; | |
457 | register rtvec rt_val; | |
458 | ||
459 | if (n == 0) | |
460 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
461 | ||
462 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
463 | ||
464 | for (i = 0; i < n; i++) | |
465 | rt_val->elem[i].rtx = (argp++)->rtx; | |
466 | ||
467 | return rt_val; | |
468 | } | |
23b2ce53 RS |
469 | \f |
470 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
471 | This pseudo is assigned the next sequential register number. */ | |
472 | ||
473 | rtx | |
474 | gen_reg_rtx (mode) | |
475 | enum machine_mode mode; | |
476 | { | |
477 | register rtx val; | |
478 | ||
479 | /* Don't let anything called by or after reload create new registers | |
480 | (actually, registers can't be created after flow, but this is a good | |
481 | approximation). */ | |
482 | ||
483 | if (reload_in_progress || reload_completed) | |
484 | abort (); | |
485 | ||
fc84e8a8 RS |
486 | if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT |
487 | || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) | |
488 | { | |
489 | /* For complex modes, don't make a single pseudo. | |
490 | Instead, make a CONCAT of two pseudos. | |
491 | This allows noncontiguous allocation of the real and imaginary parts, | |
492 | which makes much better code. Besides, allocating DCmode | |
493 | pseudos overstrains reload on some machines like the 386. */ | |
494 | rtx realpart, imagpart; | |
495 | int size = GET_MODE_UNIT_SIZE (mode); | |
496 | enum machine_mode partmode | |
497 | = mode_for_size (size * BITS_PER_UNIT, | |
498 | (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
499 | ? MODE_FLOAT : MODE_INT), | |
500 | 0); | |
501 | ||
502 | realpart = gen_reg_rtx (partmode); | |
503 | imagpart = gen_reg_rtx (partmode); | |
3b80f6ca | 504 | return gen_rtx_CONCAT (mode, realpart, imagpart); |
fc84e8a8 RS |
505 | } |
506 | ||
23b2ce53 RS |
507 | /* Make sure regno_pointer_flag and regno_reg_rtx are large |
508 | enough to have an element for this pseudo reg number. */ | |
509 | ||
510 | if (reg_rtx_no == regno_pointer_flag_length) | |
511 | { | |
512 | rtx *new1; | |
513 | char *new = | |
86fe05e0 | 514 | (char *) savealloc (regno_pointer_flag_length * 2); |
23b2ce53 | 515 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); |
c0b178d0 | 516 | bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); |
23b2ce53 RS |
517 | regno_pointer_flag = new; |
518 | ||
86fe05e0 RK |
519 | new = (char *) savealloc (regno_pointer_flag_length * 2); |
520 | bcopy (regno_pointer_align, new, regno_pointer_flag_length); | |
521 | bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); | |
522 | regno_pointer_align = new; | |
523 | ||
524 | new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx)); | |
4c9a05bc RK |
525 | bcopy ((char *) regno_reg_rtx, (char *) new1, |
526 | regno_pointer_flag_length * sizeof (rtx)); | |
527 | bzero ((char *) &new1[regno_pointer_flag_length], | |
c0b178d0 | 528 | regno_pointer_flag_length * sizeof (rtx)); |
23b2ce53 RS |
529 | regno_reg_rtx = new1; |
530 | ||
531 | regno_pointer_flag_length *= 2; | |
532 | } | |
533 | ||
3b80f6ca | 534 | val = gen_rtx_raw_REG (mode, reg_rtx_no); |
23b2ce53 RS |
535 | regno_reg_rtx[reg_rtx_no++] = val; |
536 | return val; | |
537 | } | |
538 | ||
754fdcca RK |
539 | /* Identify REG (which may be a CONCAT) as a user register. */ |
540 | ||
541 | void | |
542 | mark_user_reg (reg) | |
543 | rtx reg; | |
544 | { | |
545 | if (GET_CODE (reg) == CONCAT) | |
546 | { | |
547 | REG_USERVAR_P (XEXP (reg, 0)) = 1; | |
548 | REG_USERVAR_P (XEXP (reg, 1)) = 1; | |
549 | } | |
550 | else if (GET_CODE (reg) == REG) | |
551 | REG_USERVAR_P (reg) = 1; | |
552 | else | |
553 | abort (); | |
554 | } | |
555 | ||
86fe05e0 RK |
556 | /* Identify REG as a probable pointer register and show its alignment |
557 | as ALIGN, if nonzero. */ | |
23b2ce53 RS |
558 | |
559 | void | |
86fe05e0 | 560 | mark_reg_pointer (reg, align) |
23b2ce53 | 561 | rtx reg; |
86fe05e0 | 562 | int align; |
23b2ce53 RS |
563 | { |
564 | REGNO_POINTER_FLAG (REGNO (reg)) = 1; | |
86fe05e0 RK |
565 | |
566 | if (align) | |
567 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; | |
23b2ce53 RS |
568 | } |
569 | ||
570 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
571 | ||
572 | int | |
573 | max_reg_num () | |
574 | { | |
575 | return reg_rtx_no; | |
576 | } | |
577 | ||
578 | /* Return 1 + the largest label number used so far in the current function. */ | |
579 | ||
580 | int | |
581 | max_label_num () | |
582 | { | |
583 | if (last_label_num && label_num == base_label_num) | |
584 | return last_label_num; | |
585 | return label_num; | |
586 | } | |
587 | ||
588 | /* Return first label number used in this function (if any were used). */ | |
589 | ||
590 | int | |
591 | get_first_label_num () | |
592 | { | |
593 | return first_label_num; | |
594 | } | |
595 | \f | |
596 | /* Return a value representing some low-order bits of X, where the number | |
597 | of low-order bits is given by MODE. Note that no conversion is done | |
598 | between floating-point and fixed-point values, rather, the bit | |
599 | representation is returned. | |
600 | ||
601 | This function handles the cases in common between gen_lowpart, below, | |
602 | and two variants in cse.c and combine.c. These are the cases that can | |
603 | be safely handled at all points in the compilation. | |
604 | ||
605 | If this is not a case we can handle, return 0. */ | |
606 | ||
607 | rtx | |
608 | gen_lowpart_common (mode, x) | |
609 | enum machine_mode mode; | |
610 | register rtx x; | |
611 | { | |
612 | int word = 0; | |
613 | ||
614 | if (GET_MODE (x) == mode) | |
615 | return x; | |
616 | ||
617 | /* MODE must occupy no more words than the mode of X. */ | |
618 | if (GET_MODE (x) != VOIDmode | |
619 | && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD | |
620 | > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) | |
621 | / UNITS_PER_WORD))) | |
622 | return 0; | |
623 | ||
624 | if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
625 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
626 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
627 | / UNITS_PER_WORD); | |
628 | ||
629 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
83e9c679 RK |
630 | && (GET_MODE_CLASS (mode) == MODE_INT |
631 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
23b2ce53 RS |
632 | { |
633 | /* If we are getting the low-order part of something that has been | |
634 | sign- or zero-extended, we can either just use the object being | |
635 | extended or make a narrower extension. If we want an even smaller | |
636 | piece than the size of the object being extended, call ourselves | |
637 | recursively. | |
638 | ||
639 | This case is used mostly by combine and cse. */ | |
640 | ||
641 | if (GET_MODE (XEXP (x, 0)) == mode) | |
642 | return XEXP (x, 0); | |
643 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
644 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
645 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
3b80f6ca | 646 | return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); |
23b2ce53 RS |
647 | } |
648 | else if (GET_CODE (x) == SUBREG | |
649 | && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
650 | || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) | |
651 | return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 | |
652 | ? SUBREG_REG (x) | |
3b80f6ca | 653 | : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word)); |
23b2ce53 RS |
654 | else if (GET_CODE (x) == REG) |
655 | { | |
656 | /* If the register is not valid for MODE, return 0. If we don't | |
674d5d8b RK |
657 | do this, there is no way to fix up the resulting REG later. |
658 | But we do do this if the current REG is not valid for its | |
659 | mode. This latter is a kludge, but is required due to the | |
660 | way that parameters are passed on some machines, most | |
661 | notably Sparc. */ | |
23b2ce53 | 662 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
674d5d8b RK |
663 | && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode) |
664 | && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x))) | |
23b2ce53 RS |
665 | return 0; |
666 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
667 | /* integrate.c can't handle parts of a return value register. */ | |
668 | && (! REG_FUNCTION_VALUE_P (x) | |
cb00f51a RK |
669 | || ! rtx_equal_function_value_matters) |
670 | /* We want to keep the stack, frame, and arg pointers | |
671 | special. */ | |
65e8fe02 | 672 | && x != frame_pointer_rtx |
cb00f51a | 673 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
65e8fe02 | 674 | && x != arg_pointer_rtx |
cb00f51a | 675 | #endif |
65e8fe02 | 676 | && x != stack_pointer_rtx) |
3b80f6ca | 677 | return gen_rtx_REG (mode, REGNO (x) + word); |
23b2ce53 | 678 | else |
3b80f6ca | 679 | return gen_rtx_SUBREG (mode, x, word); |
23b2ce53 | 680 | } |
23b2ce53 RS |
681 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
682 | from the low-order part of the constant. */ | |
83e9c679 RK |
683 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
684 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
685 | && GET_MODE (x) == VOIDmode | |
23b2ce53 | 686 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
1a5b457d RK |
687 | { |
688 | /* If MODE is twice the host word size, X is already the desired | |
689 | representation. Otherwise, if MODE is wider than a word, we can't | |
690 | do this. If MODE is exactly a word, return just one CONST_INT. | |
691 | If MODE is smaller than a word, clear the bits that don't belong | |
692 | in our mode, unless they and our sign bit are all one. So we get | |
693 | either a reasonable negative value or a reasonable unsigned value | |
694 | for this mode. */ | |
695 | ||
a8dd0e73 | 696 | if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 697 | return x; |
906c4e36 | 698 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 699 | return 0; |
906c4e36 | 700 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 701 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 702 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
703 | else |
704 | { | |
705 | /* MODE must be narrower than HOST_BITS_PER_INT. */ | |
706 | int width = GET_MODE_BITSIZE (mode); | |
906c4e36 RK |
707 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
708 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 709 | |
906c4e36 RK |
710 | if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) |
711 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
712 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
1a5b457d RK |
713 | |
714 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 715 | : GEN_INT (val)); |
1a5b457d RK |
716 | } |
717 | } | |
23b2ce53 | 718 | |
8aada4ad RK |
719 | /* If X is an integral constant but we want it in floating-point, it |
720 | must be the case that we have a union of an integer and a floating-point | |
721 | value. If the machine-parameters allow it, simulate that union here | |
d6020413 RK |
722 | and return the result. The two-word and single-word cases are |
723 | different. */ | |
8aada4ad | 724 | |
b3bf132d | 725 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 726 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 727 | || flag_pretend_float) |
8aada4ad | 728 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
d6020413 RK |
729 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
730 | && GET_CODE (x) == CONST_INT | |
906c4e36 | 731 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
b6a524cb RS |
732 | #ifdef REAL_ARITHMETIC |
733 | { | |
734 | REAL_VALUE_TYPE r; | |
735 | HOST_WIDE_INT i; | |
736 | ||
737 | i = INTVAL (x); | |
738 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
53596fba | 739 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); |
b6a524cb RS |
740 | } |
741 | #else | |
d6020413 | 742 | { |
906c4e36 | 743 | union {HOST_WIDE_INT i; float d; } u; |
d6020413 RK |
744 | |
745 | u.i = INTVAL (x); | |
53596fba | 746 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
d6020413 | 747 | } |
b6a524cb | 748 | #endif |
d6020413 | 749 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 750 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
d6020413 RK |
751 | || flag_pretend_float) |
752 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
753 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
8aada4ad RK |
754 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
755 | && GET_MODE (x) == VOIDmode | |
906c4e36 RK |
756 | && (sizeof (double) * HOST_BITS_PER_CHAR |
757 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
b6a524cb RS |
758 | #ifdef REAL_ARITHMETIC |
759 | { | |
760 | REAL_VALUE_TYPE r; | |
761 | HOST_WIDE_INT i[2]; | |
762 | HOST_WIDE_INT low, high; | |
763 | ||
764 | if (GET_CODE (x) == CONST_INT) | |
765 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); | |
766 | else | |
767 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
768 | ||
8698cce3 | 769 | /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the |
0f41302f | 770 | target machine. */ |
8698cce3 RK |
771 | if (WORDS_BIG_ENDIAN) |
772 | i[0] = high, i[1] = low; | |
773 | else | |
774 | i[0] = low, i[1] = high; | |
b6a524cb RS |
775 | |
776 | r = REAL_VALUE_FROM_TARGET_DOUBLE (i); | |
53596fba | 777 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); |
b6a524cb RS |
778 | } |
779 | #else | |
8aada4ad | 780 | { |
906c4e36 RK |
781 | union {HOST_WIDE_INT i[2]; double d; } u; |
782 | HOST_WIDE_INT low, high; | |
8aada4ad RK |
783 | |
784 | if (GET_CODE (x) == CONST_INT) | |
906c4e36 | 785 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
8aada4ad RK |
786 | else |
787 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
788 | ||
789 | #ifdef HOST_WORDS_BIG_ENDIAN | |
790 | u.i[0] = high, u.i[1] = low; | |
791 | #else | |
792 | u.i[0] = low, u.i[1] = high; | |
793 | #endif | |
794 | ||
53596fba | 795 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
8aada4ad | 796 | } |
b6a524cb | 797 | #endif |
a6a503ed JW |
798 | |
799 | /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the | |
800 | same as sizeof (double), such as the alpha. We only handle the | |
801 | REAL_ARITHMETIC case, which is easy. Testing HOST_BITS_PER_WIDE_INT | |
802 | is not strictly necessary, but is done to restrict this code to cases | |
803 | where it is known to work. */ | |
804 | #ifdef REAL_ARITHMETIC | |
805 | else if (mode == SFmode | |
806 | && GET_CODE (x) == CONST_INT | |
807 | && GET_MODE_BITSIZE (mode) * 2 == HOST_BITS_PER_WIDE_INT) | |
808 | { | |
809 | REAL_VALUE_TYPE r; | |
810 | HOST_WIDE_INT i; | |
811 | ||
812 | i = INTVAL (x); | |
813 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
814 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
815 | } | |
816 | #endif | |
817 | ||
b3bf132d RK |
818 | /* Similarly, if this is converting a floating-point value into a |
819 | single-word integer. Only do this is the host and target parameters are | |
820 | compatible. */ | |
821 | ||
822 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 823 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 824 | || flag_pretend_float) |
83e9c679 RK |
825 | && (GET_MODE_CLASS (mode) == MODE_INT |
826 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
b3bf132d RK |
827 | && GET_CODE (x) == CONST_DOUBLE |
828 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
829 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
a80586cc | 830 | return operand_subword (x, word, 0, GET_MODE (x)); |
b3bf132d | 831 | |
8aada4ad RK |
832 | /* Similarly, if this is converting a floating-point value into a |
833 | two-word integer, we can do this one word at a time and make an | |
834 | integer. Only do this is the host and target parameters are | |
835 | compatible. */ | |
836 | ||
b3bf132d | 837 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 838 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 839 | || flag_pretend_float) |
83e9c679 | 840 | && (GET_MODE_CLASS (mode) == MODE_INT |
f5a2fb25 | 841 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
8aada4ad RK |
842 | && GET_CODE (x) == CONST_DOUBLE |
843 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
844 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
845 | { | |
a80586cc RK |
846 | rtx lowpart |
847 | = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
848 | rtx highpart | |
849 | = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
8aada4ad RK |
850 | |
851 | if (lowpart && GET_CODE (lowpart) == CONST_INT | |
852 | && highpart && GET_CODE (highpart) == CONST_INT) | |
853 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
854 | } | |
855 | ||
23b2ce53 RS |
856 | /* Otherwise, we can't do this. */ |
857 | return 0; | |
858 | } | |
859 | \f | |
280194b0 RS |
860 | /* Return the real part (which has mode MODE) of a complex value X. |
861 | This always comes at the low address in memory. */ | |
862 | ||
863 | rtx | |
864 | gen_realpart (mode, x) | |
865 | enum machine_mode mode; | |
866 | register rtx x; | |
867 | { | |
dc139c90 RK |
868 | if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) |
869 | return XEXP (x, 0); | |
870 | else if (WORDS_BIG_ENDIAN) | |
280194b0 RS |
871 | return gen_highpart (mode, x); |
872 | else | |
873 | return gen_lowpart (mode, x); | |
874 | } | |
875 | ||
876 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
877 | This always comes at the high address in memory. */ | |
878 | ||
879 | rtx | |
880 | gen_imagpart (mode, x) | |
881 | enum machine_mode mode; | |
882 | register rtx x; | |
883 | { | |
dc139c90 RK |
884 | if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) |
885 | return XEXP (x, 1); | |
886 | else if (WORDS_BIG_ENDIAN) | |
280194b0 RS |
887 | return gen_lowpart (mode, x); |
888 | else | |
889 | return gen_highpart (mode, x); | |
890 | } | |
81284a6a JW |
891 | |
892 | /* Return 1 iff X, assumed to be a SUBREG, | |
893 | refers to the real part of the complex value in its containing reg. | |
894 | Complex values are always stored with the real part in the first word, | |
895 | regardless of WORDS_BIG_ENDIAN. */ | |
896 | ||
897 | int | |
898 | subreg_realpart_p (x) | |
899 | rtx x; | |
900 | { | |
901 | if (GET_CODE (x) != SUBREG) | |
902 | abort (); | |
903 | ||
904 | return SUBREG_WORD (x) == 0; | |
905 | } | |
280194b0 | 906 | \f |
23b2ce53 RS |
907 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
908 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
909 | least-significant part of X. | |
910 | MODE specifies how big a part of X to return; | |
911 | it usually should not be larger than a word. | |
912 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
913 | ||
914 | rtx | |
915 | gen_lowpart (mode, x) | |
916 | enum machine_mode mode; | |
917 | register rtx x; | |
918 | { | |
919 | rtx result = gen_lowpart_common (mode, x); | |
920 | ||
921 | if (result) | |
922 | return result; | |
ea8262b0 RK |
923 | else if (GET_CODE (x) == REG) |
924 | { | |
925 | /* Must be a hard reg that's not valid in MODE. */ | |
926 | result = gen_lowpart_common (mode, copy_to_reg (x)); | |
927 | if (result == 0) | |
928 | abort (); | |
72c3833b | 929 | return result; |
ea8262b0 | 930 | } |
23b2ce53 RS |
931 | else if (GET_CODE (x) == MEM) |
932 | { | |
933 | /* The only additional case we can do is MEM. */ | |
934 | register int offset = 0; | |
935 | if (WORDS_BIG_ENDIAN) | |
936 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
937 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
938 | ||
939 | if (BYTES_BIG_ENDIAN) | |
940 | /* Adjust the address so that the address-after-the-data | |
941 | is unchanged. */ | |
942 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
943 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
944 | ||
945 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
946 | } | |
e9a25f70 JL |
947 | else if (GET_CODE (x) == ADDRESSOF) |
948 | return gen_lowpart (mode, force_reg (GET_MODE (x), x)); | |
23b2ce53 RS |
949 | else |
950 | abort (); | |
951 | } | |
952 | ||
ccba022b RS |
953 | /* Like `gen_lowpart', but refer to the most significant part. |
954 | This is used to access the imaginary part of a complex number. */ | |
955 | ||
956 | rtx | |
957 | gen_highpart (mode, x) | |
958 | enum machine_mode mode; | |
959 | register rtx x; | |
960 | { | |
961 | /* This case loses if X is a subreg. To catch bugs early, | |
962 | complain if an invalid MODE is used even in other cases. */ | |
963 | if (GET_MODE_SIZE (mode) > UNITS_PER_WORD | |
964 | && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
965 | abort (); | |
966 | if (GET_CODE (x) == CONST_DOUBLE | |
1632afca | 967 | #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) |
ccba022b RS |
968 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT |
969 | #endif | |
970 | ) | |
3b80f6ca | 971 | return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); |
ccba022b RS |
972 | else if (GET_CODE (x) == CONST_INT) |
973 | return const0_rtx; | |
974 | else if (GET_CODE (x) == MEM) | |
975 | { | |
976 | register int offset = 0; | |
8698cce3 RK |
977 | if (! WORDS_BIG_ENDIAN) |
978 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
979 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
980 | ||
981 | if (! BYTES_BIG_ENDIAN | |
982 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
ccba022b RS |
983 | offset -= (GET_MODE_SIZE (mode) |
984 | - MIN (UNITS_PER_WORD, | |
985 | GET_MODE_SIZE (GET_MODE (x)))); | |
8698cce3 | 986 | |
ccba022b RS |
987 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); |
988 | } | |
989 | else if (GET_CODE (x) == SUBREG) | |
990 | { | |
991 | /* The only time this should occur is when we are looking at a | |
992 | multi-word item with a SUBREG whose mode is the same as that of the | |
993 | item. It isn't clear what we would do if it wasn't. */ | |
994 | if (SUBREG_WORD (x) != 0) | |
995 | abort (); | |
996 | return gen_highpart (mode, SUBREG_REG (x)); | |
997 | } | |
998 | else if (GET_CODE (x) == REG) | |
999 | { | |
1000 | int word = 0; | |
1001 | ||
8698cce3 RK |
1002 | if (! WORDS_BIG_ENDIAN |
1003 | && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
ccba022b RS |
1004 | word = ((GET_MODE_SIZE (GET_MODE (x)) |
1005 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
1006 | / UNITS_PER_WORD); | |
8698cce3 | 1007 | |
3e4a14ef RK |
1008 | /* |
1009 | * ??? This fails miserably for complex values being passed in registers | |
1010 | * where the sizeof the real and imaginary part are not equal to the | |
1011 | * sizeof SImode. FIXME | |
1012 | */ | |
1013 | ||
cb00f51a | 1014 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
0f41302f | 1015 | /* integrate.c can't handle parts of a return value register. */ |
4badc528 RS |
1016 | && (! REG_FUNCTION_VALUE_P (x) |
1017 | || ! rtx_equal_function_value_matters) | |
cb00f51a | 1018 | /* We want to keep the stack, frame, and arg pointers special. */ |
65e8fe02 | 1019 | && x != frame_pointer_rtx |
cb00f51a | 1020 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
65e8fe02 | 1021 | && x != arg_pointer_rtx |
cb00f51a | 1022 | #endif |
65e8fe02 | 1023 | && x != stack_pointer_rtx) |
3b80f6ca | 1024 | return gen_rtx_REG (mode, REGNO (x) + word); |
ccba022b | 1025 | else |
3b80f6ca | 1026 | return gen_rtx_SUBREG (mode, x, word); |
ccba022b RS |
1027 | } |
1028 | else | |
1029 | abort (); | |
1030 | } | |
1031 | ||
23b2ce53 RS |
1032 | /* Return 1 iff X, assumed to be a SUBREG, |
1033 | refers to the least significant part of its containing reg. | |
1034 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
1035 | ||
1036 | int | |
1037 | subreg_lowpart_p (x) | |
1038 | rtx x; | |
1039 | { | |
1040 | if (GET_CODE (x) != SUBREG) | |
1041 | return 1; | |
a3a03040 RK |
1042 | else if (GET_MODE (SUBREG_REG (x)) == VOIDmode) |
1043 | return 0; | |
23b2ce53 RS |
1044 | |
1045 | if (WORDS_BIG_ENDIAN | |
1046 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) | |
1047 | return (SUBREG_WORD (x) | |
1048 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) | |
1049 | - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) | |
1050 | / UNITS_PER_WORD)); | |
1051 | ||
1052 | return SUBREG_WORD (x) == 0; | |
1053 | } | |
1054 | \f | |
1055 | /* Return subword I of operand OP. | |
1056 | The word number, I, is interpreted as the word number starting at the | |
1057 | low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, | |
1058 | otherwise it is the high-order word. | |
1059 | ||
1060 | If we cannot extract the required word, we return zero. Otherwise, an | |
1061 | rtx corresponding to the requested word will be returned. | |
1062 | ||
1063 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
1064 | reload has completed, a valid address will always be returned. After | |
1065 | reload, if a valid address cannot be returned, we return zero. | |
1066 | ||
1067 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
1068 | it is the responsibility of the caller. | |
1069 | ||
1070 | MODE is the mode of OP in case it is a CONST_INT. */ | |
1071 | ||
1072 | rtx | |
1073 | operand_subword (op, i, validate_address, mode) | |
1074 | rtx op; | |
1075 | int i; | |
1076 | int validate_address; | |
1077 | enum machine_mode mode; | |
1078 | { | |
906c4e36 RK |
1079 | HOST_WIDE_INT val; |
1080 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; | |
23b2ce53 RS |
1081 | |
1082 | if (mode == VOIDmode) | |
1083 | mode = GET_MODE (op); | |
1084 | ||
1085 | if (mode == VOIDmode) | |
1086 | abort (); | |
1087 | ||
1088 | /* If OP is narrower than a word or if we want a word outside OP, fail. */ | |
1089 | if (mode != BLKmode | |
1090 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD | |
1091 | || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) | |
1092 | return 0; | |
1093 | ||
1094 | /* If OP is already an integer word, return it. */ | |
1095 | if (GET_MODE_CLASS (mode) == MODE_INT | |
1096 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
1097 | return op; | |
1098 | ||
1099 | /* If OP is a REG or SUBREG, we can handle it very simply. */ | |
1100 | if (GET_CODE (op) == REG) | |
1101 | { | |
1102 | /* If the register is not valid for MODE, return 0. If we don't | |
1103 | do this, there is no way to fix up the resulting REG later. */ | |
1104 | if (REGNO (op) < FIRST_PSEUDO_REGISTER | |
1105 | && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) | |
1106 | return 0; | |
1107 | else if (REGNO (op) >= FIRST_PSEUDO_REGISTER | |
1108 | || (REG_FUNCTION_VALUE_P (op) | |
cb00f51a RK |
1109 | && rtx_equal_function_value_matters) |
1110 | /* We want to keep the stack, frame, and arg pointers | |
1111 | special. */ | |
65e8fe02 | 1112 | || op == frame_pointer_rtx |
cb00f51a | 1113 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
65e8fe02 | 1114 | || op == arg_pointer_rtx |
cb00f51a | 1115 | #endif |
65e8fe02 | 1116 | || op == stack_pointer_rtx) |
3b80f6ca | 1117 | return gen_rtx_SUBREG (word_mode, op, i); |
23b2ce53 | 1118 | else |
3b80f6ca | 1119 | return gen_rtx_REG (word_mode, REGNO (op) + i); |
23b2ce53 RS |
1120 | } |
1121 | else if (GET_CODE (op) == SUBREG) | |
3b80f6ca | 1122 | return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); |
fc84e8a8 RS |
1123 | else if (GET_CODE (op) == CONCAT) |
1124 | { | |
1125 | int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD; | |
1126 | if (i < partwords) | |
1127 | return operand_subword (XEXP (op, 0), i, validate_address, mode); | |
1128 | return operand_subword (XEXP (op, 1), i - partwords, | |
1129 | validate_address, mode); | |
1130 | } | |
23b2ce53 RS |
1131 | |
1132 | /* Form a new MEM at the requested address. */ | |
1133 | if (GET_CODE (op) == MEM) | |
1134 | { | |
1135 | rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); | |
1136 | rtx new; | |
1137 | ||
1138 | if (validate_address) | |
1139 | { | |
1140 | if (reload_completed) | |
1141 | { | |
1142 | if (! strict_memory_address_p (word_mode, addr)) | |
1143 | return 0; | |
1144 | } | |
1145 | else | |
1146 | addr = memory_address (word_mode, addr); | |
1147 | } | |
1148 | ||
3b80f6ca | 1149 | new = gen_rtx_MEM (word_mode, addr); |
23b2ce53 RS |
1150 | |
1151 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); | |
1152 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); | |
1153 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); | |
1154 | ||
1155 | return new; | |
1156 | } | |
1157 | ||
1158 | /* The only remaining cases are when OP is a constant. If the host and | |
1159 | target floating formats are the same, handling two-word floating | |
7677ffa4 | 1160 | constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} |
9847c2f6 RK |
1161 | are defined as returning one or two 32 bit values, respectively, |
1162 | and not values of BITS_PER_WORD bits. */ | |
1632afca | 1163 | #ifdef REAL_ARITHMETIC |
9847c2f6 RK |
1164 | /* The output is some bits, the width of the target machine's word. |
1165 | A wider-word host can surely hold them in a CONST_INT. A narrower-word | |
1166 | host can't. */ | |
1167 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD | |
1632afca | 1168 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1169 | && GET_MODE_BITSIZE (mode) == 64 |
1632afca RS |
1170 | && GET_CODE (op) == CONST_DOUBLE) |
1171 | { | |
9847c2f6 | 1172 | long k[2]; |
1632afca RS |
1173 | REAL_VALUE_TYPE rv; |
1174 | ||
1175 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1176 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
7677ffa4 | 1177 | |
9847c2f6 | 1178 | /* We handle 32-bit and >= 64-bit words here. Note that the order in |
7677ffa4 RK |
1179 | which the words are written depends on the word endianness. |
1180 | ||
1181 | ??? This is a potential portability problem and should | |
1182 | be fixed at some point. */ | |
9847c2f6 RK |
1183 | if (BITS_PER_WORD == 32) |
1184 | return GEN_INT ((HOST_WIDE_INT) k[i]); | |
1185 | #if HOST_BITS_PER_WIDE_INT > 32 | |
1186 | else if (BITS_PER_WORD >= 64 && i == 0) | |
1187 | return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32) | |
1188 | | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]); | |
1189 | #endif | |
47b34d40 JW |
1190 | else if (BITS_PER_WORD == 16) |
1191 | { | |
1192 | long value; | |
1193 | value = k[i >> 1]; | |
aa2ae679 | 1194 | if ((i & 0x1) == !WORDS_BIG_ENDIAN) |
47b34d40 JW |
1195 | value >>= 16; |
1196 | value &= 0xffff; | |
1197 | return GEN_INT ((HOST_WIDE_INT) value); | |
1198 | } | |
7677ffa4 RK |
1199 | else |
1200 | abort (); | |
1632afca | 1201 | } |
a5559dbc RE |
1202 | else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1203 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1204 | && GET_MODE_BITSIZE (mode) > 64 | |
1205 | && GET_CODE (op) == CONST_DOUBLE) | |
1206 | { | |
1207 | long k[4]; | |
1208 | REAL_VALUE_TYPE rv; | |
1209 | ||
1210 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1211 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); | |
1212 | ||
1213 | if (BITS_PER_WORD == 32) | |
1214 | return GEN_INT ((HOST_WIDE_INT) k[i]); | |
1215 | } | |
1632afca | 1216 | #else /* no REAL_ARITHMETIC */ |
23b2ce53 | 1217 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1218 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
1219 | || flag_pretend_float) |
1220 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1221 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
1222 | && GET_CODE (op) == CONST_DOUBLE) | |
7529ac93 CH |
1223 | { |
1224 | /* The constant is stored in the host's word-ordering, | |
1225 | but we want to access it in the target's word-ordering. Some | |
1226 | compilers don't like a conditional inside macro args, so we have two | |
1227 | copies of the return. */ | |
2fe02d7e | 1228 | #ifdef HOST_WORDS_BIG_ENDIAN |
7529ac93 CH |
1229 | return GEN_INT (i == WORDS_BIG_ENDIAN |
1230 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 1231 | #else |
7529ac93 CH |
1232 | return GEN_INT (i != WORDS_BIG_ENDIAN |
1233 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 1234 | #endif |
7529ac93 | 1235 | } |
1632afca | 1236 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1237 | |
1238 | /* Single word float is a little harder, since single- and double-word | |
1239 | values often do not have the same high-order bits. We have already | |
1240 | verified that we want the only defined word of the single-word value. */ | |
1632afca | 1241 | #ifdef REAL_ARITHMETIC |
9847c2f6 | 1242 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1243 | && GET_MODE_BITSIZE (mode) == 32 |
1632afca RS |
1244 | && GET_CODE (op) == CONST_DOUBLE) |
1245 | { | |
9847c2f6 | 1246 | long l; |
1632afca RS |
1247 | REAL_VALUE_TYPE rv; |
1248 | ||
1249 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1250 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
aa2ae679 JL |
1251 | |
1252 | if (BITS_PER_WORD == 16) | |
1253 | { | |
1254 | if ((i & 0x1) == !WORDS_BIG_ENDIAN) | |
1255 | l >>= 16; | |
1256 | l &= 0xffff; | |
1257 | } | |
9847c2f6 | 1258 | return GEN_INT ((HOST_WIDE_INT) l); |
1632afca RS |
1259 | } |
1260 | #else | |
23b2ce53 | 1261 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1262 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 | 1263 | || flag_pretend_float) |
e01a2cec | 1264 | && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT |
23b2ce53 RS |
1265 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
1266 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1267 | && GET_CODE (op) == CONST_DOUBLE) | |
1268 | { | |
1269 | double d; | |
906c4e36 | 1270 | union {float f; HOST_WIDE_INT i; } u; |
23b2ce53 RS |
1271 | |
1272 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1273 | ||
1274 | u.f = d; | |
906c4e36 | 1275 | return GEN_INT (u.i); |
23b2ce53 | 1276 | } |
e01a2cec RK |
1277 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
1278 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
1279 | || flag_pretend_float) | |
1280 | && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT | |
1281 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1282 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1283 | && GET_CODE (op) == CONST_DOUBLE) | |
1284 | { | |
1285 | double d; | |
1286 | union {double d; HOST_WIDE_INT i; } u; | |
1287 | ||
1288 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1289 | ||
1290 | u.d = d; | |
1291 | return GEN_INT (u.i); | |
1292 | } | |
1632afca | 1293 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1294 | |
1295 | /* The only remaining cases that we can handle are integers. | |
1296 | Convert to proper endianness now since these cases need it. | |
1297 | At this point, i == 0 means the low-order word. | |
1298 | ||
2d4f57f8 RK |
1299 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
1300 | in general. However, if OP is (const_int 0), we can just return | |
1301 | it for any word. */ | |
1302 | ||
1303 | if (op == const0_rtx) | |
1304 | return op; | |
23b2ce53 RS |
1305 | |
1306 | if (GET_MODE_CLASS (mode) != MODE_INT | |
2d4f57f8 | 1307 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
0cf214a0 | 1308 | || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT) |
23b2ce53 RS |
1309 | return 0; |
1310 | ||
1311 | if (WORDS_BIG_ENDIAN) | |
1312 | i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; | |
1313 | ||
1314 | /* Find out which word on the host machine this value is in and get | |
1315 | it from the constant. */ | |
1316 | val = (i / size_ratio == 0 | |
1317 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) | |
1318 | : (GET_CODE (op) == CONST_INT | |
1319 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1320 | ||
1321 | /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ | |
906c4e36 | 1322 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
23b2ce53 | 1323 | val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) |
906c4e36 RK |
1324 | & (((HOST_WIDE_INT) 1 |
1325 | << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); | |
23b2ce53 | 1326 | |
906c4e36 | 1327 | return GEN_INT (val); |
23b2ce53 RS |
1328 | } |
1329 | ||
1330 | /* Similar to `operand_subword', but never return 0. If we can't extract | |
1331 | the required subword, put OP into a register and try again. If that fails, | |
1332 | abort. We always validate the address in this case. It is not valid | |
1333 | to call this function after reload; it is mostly meant for RTL | |
1334 | generation. | |
1335 | ||
1336 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1337 | ||
1338 | rtx | |
1339 | operand_subword_force (op, i, mode) | |
1340 | rtx op; | |
1341 | int i; | |
1342 | enum machine_mode mode; | |
1343 | { | |
1344 | rtx result = operand_subword (op, i, 1, mode); | |
1345 | ||
1346 | if (result) | |
1347 | return result; | |
1348 | ||
1349 | if (mode != BLKmode && mode != VOIDmode) | |
1350 | op = force_reg (mode, op); | |
1351 | ||
1352 | result = operand_subword (op, i, 1, mode); | |
1353 | if (result == 0) | |
1354 | abort (); | |
1355 | ||
1356 | return result; | |
1357 | } | |
1358 | \f | |
1359 | /* Given a compare instruction, swap the operands. | |
1360 | A test instruction is changed into a compare of 0 against the operand. */ | |
1361 | ||
1362 | void | |
1363 | reverse_comparison (insn) | |
1364 | rtx insn; | |
1365 | { | |
1366 | rtx body = PATTERN (insn); | |
1367 | rtx comp; | |
1368 | ||
1369 | if (GET_CODE (body) == SET) | |
1370 | comp = SET_SRC (body); | |
1371 | else | |
1372 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1373 | ||
1374 | if (GET_CODE (comp) == COMPARE) | |
1375 | { | |
1376 | rtx op0 = XEXP (comp, 0); | |
1377 | rtx op1 = XEXP (comp, 1); | |
1378 | XEXP (comp, 0) = op1; | |
1379 | XEXP (comp, 1) = op0; | |
1380 | } | |
1381 | else | |
1382 | { | |
3b80f6ca | 1383 | rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp); |
23b2ce53 RS |
1384 | if (GET_CODE (body) == SET) |
1385 | SET_SRC (body) = new; | |
1386 | else | |
1387 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1388 | } | |
1389 | } | |
1390 | \f | |
1391 | /* Return a memory reference like MEMREF, but with its mode changed | |
1392 | to MODE and its address changed to ADDR. | |
1393 | (VOIDmode means don't change the mode. | |
1394 | NULL for ADDR means don't change the address.) */ | |
1395 | ||
1396 | rtx | |
1397 | change_address (memref, mode, addr) | |
1398 | rtx memref; | |
1399 | enum machine_mode mode; | |
1400 | rtx addr; | |
1401 | { | |
1402 | rtx new; | |
1403 | ||
1404 | if (GET_CODE (memref) != MEM) | |
1405 | abort (); | |
1406 | if (mode == VOIDmode) | |
1407 | mode = GET_MODE (memref); | |
1408 | if (addr == 0) | |
1409 | addr = XEXP (memref, 0); | |
1410 | ||
1411 | /* If reload is in progress or has completed, ADDR must be valid. | |
1412 | Otherwise, we can call memory_address to make it valid. */ | |
1413 | if (reload_completed || reload_in_progress) | |
1414 | { | |
1415 | if (! memory_address_p (mode, addr)) | |
1416 | abort (); | |
1417 | } | |
1418 | else | |
1419 | addr = memory_address (mode, addr); | |
1420 | ||
9b04c6a8 RK |
1421 | if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref)) |
1422 | return memref; | |
1423 | ||
3b80f6ca | 1424 | new = gen_rtx_MEM (mode, addr); |
23b2ce53 RS |
1425 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); |
1426 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); | |
1427 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); | |
1428 | return new; | |
1429 | } | |
1430 | \f | |
1431 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
1432 | ||
1433 | rtx | |
1434 | gen_label_rtx () | |
1435 | { | |
ca695ac9 JB |
1436 | register rtx label; |
1437 | ||
b93a436e JL |
1438 | label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, |
1439 | NULL_RTX, label_num++, NULL_PTR); | |
ca695ac9 | 1440 | |
23b2ce53 RS |
1441 | LABEL_NUSES (label) = 0; |
1442 | return label; | |
1443 | } | |
1444 | \f | |
1445 | /* For procedure integration. */ | |
1446 | ||
1447 | /* Return a newly created INLINE_HEADER rtx. Should allocate this | |
1448 | from a permanent obstack when the opportunity arises. */ | |
1449 | ||
1450 | rtx | |
1451 | gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, | |
1452 | last_labelno, max_parm_regnum, max_regnum, args_size, | |
a6108925 | 1453 | pops_args, stack_slots, forced_labels, function_flags, |
23b2ce53 | 1454 | outgoing_args_size, original_arg_vector, |
86fe05e0 | 1455 | original_decl_initial, regno_rtx, regno_flag, |
e9a25f70 | 1456 | regno_align, parm_reg_stack_loc) |
23b2ce53 RS |
1457 | rtx first_insn, first_parm_insn; |
1458 | int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; | |
1459 | int pops_args; | |
1460 | rtx stack_slots; | |
a6108925 | 1461 | rtx forced_labels; |
23b2ce53 RS |
1462 | int function_flags; |
1463 | int outgoing_args_size; | |
1464 | rtvec original_arg_vector; | |
1465 | rtx original_decl_initial; | |
86fe05e0 RK |
1466 | rtvec regno_rtx; |
1467 | char *regno_flag; | |
1468 | char *regno_align; | |
e9a25f70 | 1469 | rtvec parm_reg_stack_loc; |
23b2ce53 | 1470 | { |
3b80f6ca RH |
1471 | rtx header = gen_rtx_INLINE_HEADER (VOIDmode, |
1472 | cur_insn_uid++, NULL_RTX, | |
1473 | first_insn, first_parm_insn, | |
1474 | first_labelno, last_labelno, | |
1475 | max_parm_regnum, max_regnum, args_size, | |
1476 | pops_args, stack_slots, forced_labels, | |
1477 | function_flags, outgoing_args_size, | |
1478 | original_arg_vector, | |
1479 | original_decl_initial, | |
1480 | regno_rtx, regno_flag, regno_align, | |
1481 | parm_reg_stack_loc); | |
23b2ce53 RS |
1482 | return header; |
1483 | } | |
1484 | ||
1485 | /* Install new pointers to the first and last insns in the chain. | |
86fe05e0 | 1486 | Also, set cur_insn_uid to one higher than the last in use. |
23b2ce53 RS |
1487 | Used for an inline-procedure after copying the insn chain. */ |
1488 | ||
1489 | void | |
1490 | set_new_first_and_last_insn (first, last) | |
1491 | rtx first, last; | |
1492 | { | |
86fe05e0 RK |
1493 | rtx insn; |
1494 | ||
23b2ce53 RS |
1495 | first_insn = first; |
1496 | last_insn = last; | |
86fe05e0 RK |
1497 | cur_insn_uid = 0; |
1498 | ||
1499 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1500 | cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn)); | |
1501 | ||
1502 | cur_insn_uid++; | |
23b2ce53 RS |
1503 | } |
1504 | ||
1505 | /* Set the range of label numbers found in the current function. | |
1506 | This is used when belatedly compiling an inline function. */ | |
1507 | ||
1508 | void | |
1509 | set_new_first_and_last_label_num (first, last) | |
1510 | int first, last; | |
1511 | { | |
1512 | base_label_num = label_num; | |
1513 | first_label_num = first; | |
1514 | last_label_num = last; | |
1515 | } | |
1516 | \f | |
1517 | /* Save all variables describing the current status into the structure *P. | |
1518 | This is used before starting a nested function. */ | |
1519 | ||
1520 | void | |
1521 | save_emit_status (p) | |
1522 | struct function *p; | |
1523 | { | |
1524 | p->reg_rtx_no = reg_rtx_no; | |
1525 | p->first_label_num = first_label_num; | |
1526 | p->first_insn = first_insn; | |
1527 | p->last_insn = last_insn; | |
a25c7971 | 1528 | p->sequence_rtl_expr = sequence_rtl_expr; |
23b2ce53 RS |
1529 | p->sequence_stack = sequence_stack; |
1530 | p->cur_insn_uid = cur_insn_uid; | |
1531 | p->last_linenum = last_linenum; | |
1532 | p->last_filename = last_filename; | |
1533 | p->regno_pointer_flag = regno_pointer_flag; | |
86fe05e0 | 1534 | p->regno_pointer_align = regno_pointer_align; |
23b2ce53 RS |
1535 | p->regno_pointer_flag_length = regno_pointer_flag_length; |
1536 | p->regno_reg_rtx = regno_reg_rtx; | |
1537 | } | |
1538 | ||
1539 | /* Restore all variables describing the current status from the structure *P. | |
1540 | This is used after a nested function. */ | |
1541 | ||
1542 | void | |
1543 | restore_emit_status (p) | |
1544 | struct function *p; | |
1545 | { | |
1546 | int i; | |
1547 | ||
1548 | reg_rtx_no = p->reg_rtx_no; | |
1549 | first_label_num = p->first_label_num; | |
457a2d9c | 1550 | last_label_num = 0; |
23b2ce53 RS |
1551 | first_insn = p->first_insn; |
1552 | last_insn = p->last_insn; | |
a25c7971 | 1553 | sequence_rtl_expr = p->sequence_rtl_expr; |
23b2ce53 RS |
1554 | sequence_stack = p->sequence_stack; |
1555 | cur_insn_uid = p->cur_insn_uid; | |
1556 | last_linenum = p->last_linenum; | |
1557 | last_filename = p->last_filename; | |
1558 | regno_pointer_flag = p->regno_pointer_flag; | |
86fe05e0 | 1559 | regno_pointer_align = p->regno_pointer_align; |
23b2ce53 RS |
1560 | regno_pointer_flag_length = p->regno_pointer_flag_length; |
1561 | regno_reg_rtx = p->regno_reg_rtx; | |
1562 | ||
0f41302f MS |
1563 | /* Clear our cache of rtx expressions for start_sequence and |
1564 | gen_sequence. */ | |
23b2ce53 RS |
1565 | sequence_element_free_list = 0; |
1566 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
1567 | sequence_result[i] = 0; | |
43127294 RK |
1568 | |
1569 | free_insn = 0; | |
23b2ce53 RS |
1570 | } |
1571 | \f | |
1572 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
1573 | It does not work to do this twice, because the mark bits set here | |
1574 | are not cleared afterwards. */ | |
1575 | ||
1576 | void | |
1577 | unshare_all_rtl (insn) | |
1578 | register rtx insn; | |
1579 | { | |
1580 | for (; insn; insn = NEXT_INSN (insn)) | |
1581 | if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN | |
1582 | || GET_CODE (insn) == CALL_INSN) | |
1583 | { | |
1584 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
1585 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
1586 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
1587 | } | |
1588 | ||
1589 | /* Make sure the addresses of stack slots found outside the insn chain | |
1590 | (such as, in DECL_RTL of a variable) are not shared | |
1591 | with the insn chain. | |
1592 | ||
1593 | This special care is necessary when the stack slot MEM does not | |
1594 | actually appear in the insn chain. If it does appear, its address | |
1595 | is unshared from all else at that point. */ | |
1596 | ||
1597 | copy_rtx_if_shared (stack_slot_list); | |
1598 | } | |
1599 | ||
1600 | /* Mark ORIG as in use, and return a copy of it if it was already in use. | |
1601 | Recursively does the same for subexpressions. */ | |
1602 | ||
1603 | rtx | |
1604 | copy_rtx_if_shared (orig) | |
1605 | rtx orig; | |
1606 | { | |
1607 | register rtx x = orig; | |
1608 | register int i; | |
1609 | register enum rtx_code code; | |
1610 | register char *format_ptr; | |
1611 | int copied = 0; | |
1612 | ||
1613 | if (x == 0) | |
1614 | return 0; | |
1615 | ||
1616 | code = GET_CODE (x); | |
1617 | ||
1618 | /* These types may be freely shared. */ | |
1619 | ||
1620 | switch (code) | |
1621 | { | |
1622 | case REG: | |
1623 | case QUEUED: | |
1624 | case CONST_INT: | |
1625 | case CONST_DOUBLE: | |
1626 | case SYMBOL_REF: | |
1627 | case CODE_LABEL: | |
1628 | case PC: | |
1629 | case CC0: | |
1630 | case SCRATCH: | |
0f41302f | 1631 | /* SCRATCH must be shared because they represent distinct values. */ |
23b2ce53 RS |
1632 | return x; |
1633 | ||
b851ea09 RK |
1634 | case CONST: |
1635 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
1636 | a LABEL_REF, it isn't sharable. */ | |
1637 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1638 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1639 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
1640 | return x; | |
1641 | break; | |
1642 | ||
23b2ce53 RS |
1643 | case INSN: |
1644 | case JUMP_INSN: | |
1645 | case CALL_INSN: | |
1646 | case NOTE: | |
23b2ce53 RS |
1647 | case BARRIER: |
1648 | /* The chain of insns is not being copied. */ | |
1649 | return x; | |
1650 | ||
1651 | case MEM: | |
1652 | /* A MEM is allowed to be shared if its address is constant | |
1653 | or is a constant plus one of the special registers. */ | |
1654 | if (CONSTANT_ADDRESS_P (XEXP (x, 0)) | |
1655 | || XEXP (x, 0) == virtual_stack_vars_rtx | |
1656 | || XEXP (x, 0) == virtual_incoming_args_rtx) | |
1657 | return x; | |
1658 | ||
1659 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1660 | && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx | |
1661 | || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) | |
1662 | && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) | |
1663 | { | |
1664 | /* This MEM can appear in more than one place, | |
1665 | but its address better not be shared with anything else. */ | |
1666 | if (! x->used) | |
1667 | XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); | |
1668 | x->used = 1; | |
1669 | return x; | |
1670 | } | |
e9a25f70 JL |
1671 | break; |
1672 | ||
1673 | default: | |
1674 | break; | |
23b2ce53 RS |
1675 | } |
1676 | ||
1677 | /* This rtx may not be shared. If it has already been seen, | |
1678 | replace it with a copy of itself. */ | |
1679 | ||
1680 | if (x->used) | |
1681 | { | |
1682 | register rtx copy; | |
1683 | ||
1684 | copy = rtx_alloc (code); | |
4c9a05bc RK |
1685 | bcopy ((char *) x, (char *) copy, |
1686 | (sizeof (*copy) - sizeof (copy->fld) | |
1687 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
23b2ce53 RS |
1688 | x = copy; |
1689 | copied = 1; | |
1690 | } | |
1691 | x->used = 1; | |
1692 | ||
1693 | /* Now scan the subexpressions recursively. | |
1694 | We can store any replaced subexpressions directly into X | |
1695 | since we know X is not shared! Any vectors in X | |
1696 | must be copied if X was copied. */ | |
1697 | ||
1698 | format_ptr = GET_RTX_FORMAT (code); | |
1699 | ||
1700 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1701 | { | |
1702 | switch (*format_ptr++) | |
1703 | { | |
1704 | case 'e': | |
1705 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
1706 | break; | |
1707 | ||
1708 | case 'E': | |
1709 | if (XVEC (x, i) != NULL) | |
1710 | { | |
1711 | register int j; | |
f0722107 | 1712 | int len = XVECLEN (x, i); |
23b2ce53 | 1713 | |
f0722107 | 1714 | if (copied && len > 0) |
ba444f92 | 1715 | XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem); |
f0722107 RS |
1716 | for (j = 0; j < len; j++) |
1717 | XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
23b2ce53 RS |
1718 | } |
1719 | break; | |
1720 | } | |
1721 | } | |
1722 | return x; | |
1723 | } | |
1724 | ||
1725 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
1726 | to look for shared sub-parts. */ | |
1727 | ||
1728 | void | |
1729 | reset_used_flags (x) | |
1730 | rtx x; | |
1731 | { | |
1732 | register int i, j; | |
1733 | register enum rtx_code code; | |
1734 | register char *format_ptr; | |
23b2ce53 RS |
1735 | |
1736 | if (x == 0) | |
1737 | return; | |
1738 | ||
1739 | code = GET_CODE (x); | |
1740 | ||
9faa82d8 | 1741 | /* These types may be freely shared so we needn't do any resetting |
23b2ce53 RS |
1742 | for them. */ |
1743 | ||
1744 | switch (code) | |
1745 | { | |
1746 | case REG: | |
1747 | case QUEUED: | |
1748 | case CONST_INT: | |
1749 | case CONST_DOUBLE: | |
1750 | case SYMBOL_REF: | |
1751 | case CODE_LABEL: | |
1752 | case PC: | |
1753 | case CC0: | |
1754 | return; | |
1755 | ||
1756 | case INSN: | |
1757 | case JUMP_INSN: | |
1758 | case CALL_INSN: | |
1759 | case NOTE: | |
1760 | case LABEL_REF: | |
1761 | case BARRIER: | |
1762 | /* The chain of insns is not being copied. */ | |
1763 | return; | |
e9a25f70 JL |
1764 | |
1765 | default: | |
1766 | break; | |
23b2ce53 RS |
1767 | } |
1768 | ||
1769 | x->used = 0; | |
1770 | ||
1771 | format_ptr = GET_RTX_FORMAT (code); | |
1772 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1773 | { | |
1774 | switch (*format_ptr++) | |
1775 | { | |
1776 | case 'e': | |
1777 | reset_used_flags (XEXP (x, i)); | |
1778 | break; | |
1779 | ||
1780 | case 'E': | |
1781 | for (j = 0; j < XVECLEN (x, i); j++) | |
1782 | reset_used_flags (XVECEXP (x, i, j)); | |
1783 | break; | |
1784 | } | |
1785 | } | |
1786 | } | |
1787 | \f | |
1788 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
1789 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
1790 | OTHER must be valid as a SET_DEST. */ | |
1791 | ||
1792 | rtx | |
1793 | make_safe_from (x, other) | |
1794 | rtx x, other; | |
1795 | { | |
1796 | while (1) | |
1797 | switch (GET_CODE (other)) | |
1798 | { | |
1799 | case SUBREG: | |
1800 | other = SUBREG_REG (other); | |
1801 | break; | |
1802 | case STRICT_LOW_PART: | |
1803 | case SIGN_EXTEND: | |
1804 | case ZERO_EXTEND: | |
1805 | other = XEXP (other, 0); | |
1806 | break; | |
1807 | default: | |
1808 | goto done; | |
1809 | } | |
1810 | done: | |
1811 | if ((GET_CODE (other) == MEM | |
1812 | && ! CONSTANT_P (x) | |
1813 | && GET_CODE (x) != REG | |
1814 | && GET_CODE (x) != SUBREG) | |
1815 | || (GET_CODE (other) == REG | |
1816 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
1817 | || reg_mentioned_p (other, x)))) | |
1818 | { | |
1819 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
1820 | emit_move_insn (temp, x); | |
1821 | return temp; | |
1822 | } | |
1823 | return x; | |
1824 | } | |
1825 | \f | |
1826 | /* Emission of insns (adding them to the doubly-linked list). */ | |
1827 | ||
1828 | /* Return the first insn of the current sequence or current function. */ | |
1829 | ||
1830 | rtx | |
1831 | get_insns () | |
1832 | { | |
1833 | return first_insn; | |
1834 | } | |
1835 | ||
1836 | /* Return the last insn emitted in current sequence or current function. */ | |
1837 | ||
1838 | rtx | |
1839 | get_last_insn () | |
1840 | { | |
1841 | return last_insn; | |
1842 | } | |
1843 | ||
1844 | /* Specify a new insn as the last in the chain. */ | |
1845 | ||
1846 | void | |
1847 | set_last_insn (insn) | |
1848 | rtx insn; | |
1849 | { | |
1850 | if (NEXT_INSN (insn) != 0) | |
1851 | abort (); | |
1852 | last_insn = insn; | |
1853 | } | |
1854 | ||
1855 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
1856 | ||
1857 | rtx | |
1858 | get_last_insn_anywhere () | |
1859 | { | |
1860 | struct sequence_stack *stack; | |
1861 | if (last_insn) | |
1862 | return last_insn; | |
1863 | for (stack = sequence_stack; stack; stack = stack->next) | |
1864 | if (stack->last != 0) | |
1865 | return stack->last; | |
1866 | return 0; | |
1867 | } | |
1868 | ||
1869 | /* Return a number larger than any instruction's uid in this function. */ | |
1870 | ||
1871 | int | |
1872 | get_max_uid () | |
1873 | { | |
1874 | return cur_insn_uid; | |
1875 | } | |
1876 | \f | |
1877 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
1878 | of the sequence. */ | |
1879 | ||
1880 | rtx | |
1881 | next_insn (insn) | |
1882 | rtx insn; | |
1883 | { | |
1884 | if (insn) | |
1885 | { | |
1886 | insn = NEXT_INSN (insn); | |
1887 | if (insn && GET_CODE (insn) == INSN | |
1888 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1889 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1890 | } | |
1891 | ||
1892 | return insn; | |
1893 | } | |
1894 | ||
1895 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
1896 | of the sequence. */ | |
1897 | ||
1898 | rtx | |
1899 | previous_insn (insn) | |
1900 | rtx insn; | |
1901 | { | |
1902 | if (insn) | |
1903 | { | |
1904 | insn = PREV_INSN (insn); | |
1905 | if (insn && GET_CODE (insn) == INSN | |
1906 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1907 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
1908 | } | |
1909 | ||
1910 | return insn; | |
1911 | } | |
1912 | ||
1913 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
1914 | look inside SEQUENCEs. */ | |
1915 | ||
1916 | rtx | |
1917 | next_nonnote_insn (insn) | |
1918 | rtx insn; | |
1919 | { | |
1920 | while (insn) | |
1921 | { | |
1922 | insn = NEXT_INSN (insn); | |
1923 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1924 | break; | |
1925 | } | |
1926 | ||
1927 | return insn; | |
1928 | } | |
1929 | ||
1930 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
1931 | not look inside SEQUENCEs. */ | |
1932 | ||
1933 | rtx | |
1934 | prev_nonnote_insn (insn) | |
1935 | rtx insn; | |
1936 | { | |
1937 | while (insn) | |
1938 | { | |
1939 | insn = PREV_INSN (insn); | |
1940 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1941 | break; | |
1942 | } | |
1943 | ||
1944 | return insn; | |
1945 | } | |
1946 | ||
1947 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
1948 | or 0, if there is none. This routine does not look inside | |
0f41302f | 1949 | SEQUENCEs. */ |
23b2ce53 RS |
1950 | |
1951 | rtx | |
1952 | next_real_insn (insn) | |
1953 | rtx insn; | |
1954 | { | |
1955 | while (insn) | |
1956 | { | |
1957 | insn = NEXT_INSN (insn); | |
1958 | if (insn == 0 || GET_CODE (insn) == INSN | |
1959 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
1960 | break; | |
1961 | } | |
1962 | ||
1963 | return insn; | |
1964 | } | |
1965 | ||
1966 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
1967 | or 0, if there is none. This routine does not look inside | |
1968 | SEQUENCEs. */ | |
1969 | ||
1970 | rtx | |
1971 | prev_real_insn (insn) | |
1972 | rtx insn; | |
1973 | { | |
1974 | while (insn) | |
1975 | { | |
1976 | insn = PREV_INSN (insn); | |
1977 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
1978 | || GET_CODE (insn) == JUMP_INSN) | |
1979 | break; | |
1980 | } | |
1981 | ||
1982 | return insn; | |
1983 | } | |
1984 | ||
1985 | /* Find the next insn after INSN that really does something. This routine | |
1986 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1987 | same as next_real_insn. */ | |
1988 | ||
1989 | rtx | |
1990 | next_active_insn (insn) | |
1991 | rtx insn; | |
1992 | { | |
1993 | while (insn) | |
1994 | { | |
1995 | insn = NEXT_INSN (insn); | |
1996 | if (insn == 0 | |
1997 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1998 | || (GET_CODE (insn) == INSN | |
1999 | && (! reload_completed | |
2000 | || (GET_CODE (PATTERN (insn)) != USE | |
2001 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
2002 | break; | |
2003 | } | |
2004 | ||
2005 | return insn; | |
2006 | } | |
2007 | ||
2008 | /* Find the last insn before INSN that really does something. This routine | |
2009 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2010 | same as prev_real_insn. */ | |
2011 | ||
2012 | rtx | |
2013 | prev_active_insn (insn) | |
2014 | rtx insn; | |
2015 | { | |
2016 | while (insn) | |
2017 | { | |
2018 | insn = PREV_INSN (insn); | |
2019 | if (insn == 0 | |
2020 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
2021 | || (GET_CODE (insn) == INSN | |
2022 | && (! reload_completed | |
2023 | || (GET_CODE (PATTERN (insn)) != USE | |
2024 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
2025 | break; | |
2026 | } | |
2027 | ||
2028 | return insn; | |
2029 | } | |
2030 | ||
2031 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
2032 | ||
2033 | rtx | |
2034 | next_label (insn) | |
2035 | rtx insn; | |
2036 | { | |
2037 | while (insn) | |
2038 | { | |
2039 | insn = NEXT_INSN (insn); | |
2040 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2041 | break; | |
2042 | } | |
2043 | ||
2044 | return insn; | |
2045 | } | |
2046 | ||
2047 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
2048 | ||
2049 | rtx | |
2050 | prev_label (insn) | |
2051 | rtx insn; | |
2052 | { | |
2053 | while (insn) | |
2054 | { | |
2055 | insn = PREV_INSN (insn); | |
2056 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2057 | break; | |
2058 | } | |
2059 | ||
2060 | return insn; | |
2061 | } | |
2062 | \f | |
2063 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
2064 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
2065 | and REG_CC_USER notes so we can find it. */ | |
2066 | ||
2067 | void | |
2068 | link_cc0_insns (insn) | |
2069 | rtx insn; | |
2070 | { | |
2071 | rtx user = next_nonnote_insn (insn); | |
2072 | ||
2073 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
2074 | user = XVECEXP (PATTERN (user), 0, 0); | |
2075 | ||
3b80f6ca RH |
2076 | REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user)); |
2077 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn)); | |
c572e5ba JVA |
2078 | } |
2079 | ||
23b2ce53 RS |
2080 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
2081 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
2082 | applied to the result of this function should yield INSN). | |
2083 | ||
2084 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
2085 | is present, it contains the insn that uses CC0. | |
2086 | ||
2087 | Return 0 if we can't find the insn. */ | |
2088 | ||
2089 | rtx | |
2090 | next_cc0_user (insn) | |
2091 | rtx insn; | |
2092 | { | |
906c4e36 | 2093 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
2094 | |
2095 | if (note) | |
2096 | return XEXP (note, 0); | |
2097 | ||
2098 | insn = next_nonnote_insn (insn); | |
2099 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2100 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2101 | ||
2102 | if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2103 | && reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
2104 | return insn; | |
2105 | ||
2106 | return 0; | |
2107 | } | |
2108 | ||
2109 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
2110 | note, it is the previous insn. */ | |
2111 | ||
2112 | rtx | |
2113 | prev_cc0_setter (insn) | |
2114 | rtx insn; | |
2115 | { | |
906c4e36 | 2116 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
2117 | rtx link; |
2118 | ||
2119 | if (note) | |
2120 | return XEXP (note, 0); | |
2121 | ||
2122 | insn = prev_nonnote_insn (insn); | |
2123 | if (! sets_cc0_p (PATTERN (insn))) | |
2124 | abort (); | |
2125 | ||
2126 | return insn; | |
2127 | } | |
2128 | #endif | |
2129 | \f | |
2130 | /* Try splitting insns that can be split for better scheduling. | |
2131 | PAT is the pattern which might split. | |
2132 | TRIAL is the insn providing PAT. | |
11147ebe | 2133 | LAST is non-zero if we should return the last insn of the sequence produced. |
23b2ce53 RS |
2134 | |
2135 | If this routine succeeds in splitting, it returns the first or last | |
11147ebe | 2136 | replacement insn depending on the value of LAST. Otherwise, it |
23b2ce53 RS |
2137 | returns TRIAL. If the insn to be returned can be split, it will be. */ |
2138 | ||
2139 | rtx | |
11147ebe | 2140 | try_split (pat, trial, last) |
23b2ce53 | 2141 | rtx pat, trial; |
11147ebe | 2142 | int last; |
23b2ce53 RS |
2143 | { |
2144 | rtx before = PREV_INSN (trial); | |
2145 | rtx after = NEXT_INSN (trial); | |
2146 | rtx seq = split_insns (pat, trial); | |
2147 | int has_barrier = 0; | |
2148 | rtx tem; | |
2149 | ||
2150 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
2151 | We may need to handle this specially. */ | |
2152 | if (after && GET_CODE (after) == BARRIER) | |
2153 | { | |
2154 | has_barrier = 1; | |
2155 | after = NEXT_INSN (after); | |
2156 | } | |
2157 | ||
2158 | if (seq) | |
2159 | { | |
2160 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
2161 | The latter case will normally arise only when being done so that | |
2162 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
2163 | if (GET_CODE (seq) == SEQUENCE) | |
2164 | { | |
2165 | /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in | |
2166 | SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, | |
2167 | increment the usage count so we don't delete the label. */ | |
2168 | int i; | |
2169 | ||
2170 | if (GET_CODE (trial) == JUMP_INSN) | |
2171 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2172 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
2173 | { | |
2174 | JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); | |
2175 | ||
2176 | if (JUMP_LABEL (trial)) | |
2177 | LABEL_NUSES (JUMP_LABEL (trial))++; | |
2178 | } | |
2179 | ||
2180 | tem = emit_insn_after (seq, before); | |
2181 | ||
2182 | delete_insn (trial); | |
2183 | if (has_barrier) | |
2184 | emit_barrier_after (tem); | |
11147ebe RK |
2185 | |
2186 | /* Recursively call try_split for each new insn created; by the | |
2187 | time control returns here that insn will be fully split, so | |
2188 | set LAST and continue from the insn after the one returned. | |
f4a3cd05 RK |
2189 | We can't use next_active_insn here since AFTER may be a note. |
2190 | Ignore deleted insns, which can be occur if not optimizing. */ | |
11147ebe RK |
2191 | for (tem = NEXT_INSN (before); tem != after; |
2192 | tem = NEXT_INSN (tem)) | |
f4a3cd05 RK |
2193 | if (! INSN_DELETED_P (tem)) |
2194 | tem = try_split (PATTERN (tem), tem, 1); | |
23b2ce53 RS |
2195 | } |
2196 | /* Avoid infinite loop if the result matches the original pattern. */ | |
2197 | else if (rtx_equal_p (seq, pat)) | |
2198 | return trial; | |
2199 | else | |
2200 | { | |
2201 | PATTERN (trial) = seq; | |
2202 | INSN_CODE (trial) = -1; | |
11147ebe | 2203 | try_split (seq, trial, last); |
23b2ce53 RS |
2204 | } |
2205 | ||
11147ebe RK |
2206 | /* Return either the first or the last insn, depending on which was |
2207 | requested. */ | |
2208 | return last ? prev_active_insn (after) : next_active_insn (before); | |
23b2ce53 RS |
2209 | } |
2210 | ||
2211 | return trial; | |
2212 | } | |
2213 | \f | |
2214 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 2215 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
2216 | |
2217 | rtx | |
4b1f5e8c | 2218 | make_insn_raw (pattern) |
23b2ce53 | 2219 | rtx pattern; |
23b2ce53 RS |
2220 | { |
2221 | register rtx insn; | |
2222 | ||
43127294 RK |
2223 | /* If in RTL generation phase, see if FREE_INSN can be used. */ |
2224 | if (free_insn != 0 && rtx_equal_function_value_matters) | |
2225 | { | |
2226 | insn = free_insn; | |
2227 | free_insn = NEXT_INSN (free_insn); | |
2228 | PUT_CODE (insn, INSN); | |
2229 | } | |
2230 | else | |
2231 | insn = rtx_alloc (INSN); | |
23b2ce53 | 2232 | |
43127294 | 2233 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2234 | PATTERN (insn) = pattern; |
2235 | INSN_CODE (insn) = -1; | |
1632afca RS |
2236 | LOG_LINKS (insn) = NULL; |
2237 | REG_NOTES (insn) = NULL; | |
23b2ce53 RS |
2238 | |
2239 | return insn; | |
2240 | } | |
2241 | ||
2242 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
2243 | ||
2244 | static rtx | |
4b1f5e8c | 2245 | make_jump_insn_raw (pattern) |
23b2ce53 | 2246 | rtx pattern; |
23b2ce53 RS |
2247 | { |
2248 | register rtx insn; | |
2249 | ||
4b1f5e8c | 2250 | insn = rtx_alloc (JUMP_INSN); |
1632afca | 2251 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2252 | |
2253 | PATTERN (insn) = pattern; | |
2254 | INSN_CODE (insn) = -1; | |
1632afca RS |
2255 | LOG_LINKS (insn) = NULL; |
2256 | REG_NOTES (insn) = NULL; | |
2257 | JUMP_LABEL (insn) = NULL; | |
23b2ce53 RS |
2258 | |
2259 | return insn; | |
2260 | } | |
aff507f4 RK |
2261 | |
2262 | /* Like `make_insn' but make a CALL_INSN instead of an insn. */ | |
2263 | ||
2264 | static rtx | |
2265 | make_call_insn_raw (pattern) | |
2266 | rtx pattern; | |
2267 | { | |
2268 | register rtx insn; | |
2269 | ||
2270 | insn = rtx_alloc (CALL_INSN); | |
2271 | INSN_UID (insn) = cur_insn_uid++; | |
2272 | ||
2273 | PATTERN (insn) = pattern; | |
2274 | INSN_CODE (insn) = -1; | |
2275 | LOG_LINKS (insn) = NULL; | |
2276 | REG_NOTES (insn) = NULL; | |
2277 | CALL_INSN_FUNCTION_USAGE (insn) = NULL; | |
2278 | ||
2279 | return insn; | |
2280 | } | |
23b2ce53 RS |
2281 | \f |
2282 | /* Add INSN to the end of the doubly-linked list. | |
2283 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
2284 | ||
2285 | void | |
2286 | add_insn (insn) | |
2287 | register rtx insn; | |
2288 | { | |
2289 | PREV_INSN (insn) = last_insn; | |
2290 | NEXT_INSN (insn) = 0; | |
2291 | ||
2292 | if (NULL != last_insn) | |
2293 | NEXT_INSN (last_insn) = insn; | |
2294 | ||
2295 | if (NULL == first_insn) | |
2296 | first_insn = insn; | |
2297 | ||
2298 | last_insn = insn; | |
2299 | } | |
2300 | ||
a0ae8e8d RK |
2301 | /* Add INSN into the doubly-linked list after insn AFTER. This and |
2302 | the next should be the only functions called to insert an insn once | |
ba213285 | 2303 | delay slots have been filled since only they know how to update a |
a0ae8e8d | 2304 | SEQUENCE. */ |
23b2ce53 RS |
2305 | |
2306 | void | |
2307 | add_insn_after (insn, after) | |
2308 | rtx insn, after; | |
2309 | { | |
2310 | rtx next = NEXT_INSN (after); | |
2311 | ||
6782074d | 2312 | if (optimize && INSN_DELETED_P (after)) |
ba213285 RK |
2313 | abort (); |
2314 | ||
23b2ce53 RS |
2315 | NEXT_INSN (insn) = next; |
2316 | PREV_INSN (insn) = after; | |
2317 | ||
2318 | if (next) | |
2319 | { | |
2320 | PREV_INSN (next) = insn; | |
2321 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
2322 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
2323 | } | |
2324 | else if (last_insn == after) | |
2325 | last_insn = insn; | |
2326 | else | |
2327 | { | |
2328 | struct sequence_stack *stack = sequence_stack; | |
2329 | /* Scan all pending sequences too. */ | |
2330 | for (; stack; stack = stack->next) | |
2331 | if (after == stack->last) | |
fef0509b RK |
2332 | { |
2333 | stack->last = insn; | |
2334 | break; | |
2335 | } | |
a0ae8e8d RK |
2336 | |
2337 | if (stack == 0) | |
2338 | abort (); | |
23b2ce53 RS |
2339 | } |
2340 | ||
2341 | NEXT_INSN (after) = insn; | |
2342 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
2343 | { | |
2344 | rtx sequence = PATTERN (after); | |
2345 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
2346 | } | |
2347 | } | |
2348 | ||
a0ae8e8d RK |
2349 | /* Add INSN into the doubly-linked list before insn BEFORE. This and |
2350 | the previous should be the only functions called to insert an insn once | |
ba213285 | 2351 | delay slots have been filled since only they know how to update a |
a0ae8e8d RK |
2352 | SEQUENCE. */ |
2353 | ||
2354 | void | |
2355 | add_insn_before (insn, before) | |
2356 | rtx insn, before; | |
2357 | { | |
2358 | rtx prev = PREV_INSN (before); | |
2359 | ||
6782074d | 2360 | if (optimize && INSN_DELETED_P (before)) |
ba213285 RK |
2361 | abort (); |
2362 | ||
a0ae8e8d RK |
2363 | PREV_INSN (insn) = prev; |
2364 | NEXT_INSN (insn) = before; | |
2365 | ||
2366 | if (prev) | |
2367 | { | |
2368 | NEXT_INSN (prev) = insn; | |
2369 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
2370 | { | |
2371 | rtx sequence = PATTERN (prev); | |
2372 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
2373 | } | |
2374 | } | |
2375 | else if (first_insn == before) | |
2376 | first_insn = insn; | |
2377 | else | |
2378 | { | |
2379 | struct sequence_stack *stack = sequence_stack; | |
2380 | /* Scan all pending sequences too. */ | |
2381 | for (; stack; stack = stack->next) | |
2382 | if (before == stack->first) | |
fef0509b RK |
2383 | { |
2384 | stack->first = insn; | |
2385 | break; | |
2386 | } | |
a0ae8e8d RK |
2387 | |
2388 | if (stack == 0) | |
2389 | abort (); | |
2390 | } | |
2391 | ||
2392 | PREV_INSN (before) = insn; | |
2393 | if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) | |
2394 | PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; | |
2395 | } | |
2396 | ||
23b2ce53 RS |
2397 | /* Delete all insns made since FROM. |
2398 | FROM becomes the new last instruction. */ | |
2399 | ||
2400 | void | |
2401 | delete_insns_since (from) | |
2402 | rtx from; | |
2403 | { | |
2404 | if (from == 0) | |
2405 | first_insn = 0; | |
2406 | else | |
2407 | NEXT_INSN (from) = 0; | |
2408 | last_insn = from; | |
2409 | } | |
2410 | ||
5dab5552 MS |
2411 | /* This function is deprecated, please use sequences instead. |
2412 | ||
2413 | Move a consecutive bunch of insns to a different place in the chain. | |
23b2ce53 RS |
2414 | The insns to be moved are those between FROM and TO. |
2415 | They are moved to a new position after the insn AFTER. | |
2416 | AFTER must not be FROM or TO or any insn in between. | |
2417 | ||
2418 | This function does not know about SEQUENCEs and hence should not be | |
2419 | called after delay-slot filling has been done. */ | |
2420 | ||
2421 | void | |
2422 | reorder_insns (from, to, after) | |
2423 | rtx from, to, after; | |
2424 | { | |
2425 | /* Splice this bunch out of where it is now. */ | |
2426 | if (PREV_INSN (from)) | |
2427 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
2428 | if (NEXT_INSN (to)) | |
2429 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
2430 | if (last_insn == to) | |
2431 | last_insn = PREV_INSN (from); | |
2432 | if (first_insn == from) | |
2433 | first_insn = NEXT_INSN (to); | |
2434 | ||
2435 | /* Make the new neighbors point to it and it to them. */ | |
2436 | if (NEXT_INSN (after)) | |
2437 | PREV_INSN (NEXT_INSN (after)) = to; | |
2438 | ||
2439 | NEXT_INSN (to) = NEXT_INSN (after); | |
2440 | PREV_INSN (from) = after; | |
2441 | NEXT_INSN (after) = from; | |
2442 | if (after == last_insn) | |
2443 | last_insn = to; | |
2444 | } | |
2445 | ||
2446 | /* Return the line note insn preceding INSN. */ | |
2447 | ||
2448 | static rtx | |
2449 | find_line_note (insn) | |
2450 | rtx insn; | |
2451 | { | |
2452 | if (no_line_numbers) | |
2453 | return 0; | |
2454 | ||
2455 | for (; insn; insn = PREV_INSN (insn)) | |
2456 | if (GET_CODE (insn) == NOTE | |
2457 | && NOTE_LINE_NUMBER (insn) >= 0) | |
2458 | break; | |
2459 | ||
2460 | return insn; | |
2461 | } | |
2462 | ||
2463 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
2464 | of the moved insns when debugging. This may insert a note between AFTER | |
2465 | and FROM, and another one after TO. */ | |
2466 | ||
2467 | void | |
2468 | reorder_insns_with_line_notes (from, to, after) | |
2469 | rtx from, to, after; | |
2470 | { | |
2471 | rtx from_line = find_line_note (from); | |
2472 | rtx after_line = find_line_note (after); | |
2473 | ||
2474 | reorder_insns (from, to, after); | |
2475 | ||
2476 | if (from_line == after_line) | |
2477 | return; | |
2478 | ||
2479 | if (from_line) | |
2480 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2481 | NOTE_LINE_NUMBER (from_line), | |
2482 | after); | |
2483 | if (after_line) | |
2484 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2485 | NOTE_LINE_NUMBER (after_line), | |
2486 | to); | |
2487 | } | |
2488 | \f | |
2489 | /* Emit an insn of given code and pattern | |
2490 | at a specified place within the doubly-linked list. */ | |
2491 | ||
2492 | /* Make an instruction with body PATTERN | |
2493 | and output it before the instruction BEFORE. */ | |
2494 | ||
2495 | rtx | |
2496 | emit_insn_before (pattern, before) | |
2497 | register rtx pattern, before; | |
2498 | { | |
2499 | register rtx insn = before; | |
2500 | ||
2501 | if (GET_CODE (pattern) == SEQUENCE) | |
2502 | { | |
2503 | register int i; | |
2504 | ||
2505 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2506 | { | |
2507 | insn = XVECEXP (pattern, 0, i); | |
a0ae8e8d | 2508 | add_insn_before (insn, before); |
23b2ce53 RS |
2509 | } |
2510 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2511 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2512 | } | |
2513 | else | |
2514 | { | |
4b1f5e8c | 2515 | insn = make_insn_raw (pattern); |
a0ae8e8d | 2516 | add_insn_before (insn, before); |
23b2ce53 RS |
2517 | } |
2518 | ||
2519 | return insn; | |
2520 | } | |
2521 | ||
2522 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
2523 | and output it before the instruction BEFORE. */ | |
2524 | ||
2525 | rtx | |
2526 | emit_jump_insn_before (pattern, before) | |
2527 | register rtx pattern, before; | |
2528 | { | |
2529 | register rtx insn; | |
2530 | ||
2531 | if (GET_CODE (pattern) == SEQUENCE) | |
2532 | insn = emit_insn_before (pattern, before); | |
2533 | else | |
2534 | { | |
85cf32bc | 2535 | insn = make_jump_insn_raw (pattern); |
a0ae8e8d | 2536 | add_insn_before (insn, before); |
23b2ce53 RS |
2537 | } |
2538 | ||
2539 | return insn; | |
2540 | } | |
2541 | ||
2542 | /* Make an instruction with body PATTERN and code CALL_INSN | |
2543 | and output it before the instruction BEFORE. */ | |
2544 | ||
2545 | rtx | |
2546 | emit_call_insn_before (pattern, before) | |
2547 | register rtx pattern, before; | |
2548 | { | |
aff507f4 RK |
2549 | register rtx insn; |
2550 | ||
2551 | if (GET_CODE (pattern) == SEQUENCE) | |
2552 | insn = emit_insn_before (pattern, before); | |
2553 | else | |
2554 | { | |
2555 | insn = make_call_insn_raw (pattern); | |
a0ae8e8d | 2556 | add_insn_before (insn, before); |
aff507f4 RK |
2557 | PUT_CODE (insn, CALL_INSN); |
2558 | } | |
2559 | ||
23b2ce53 RS |
2560 | return insn; |
2561 | } | |
2562 | ||
2563 | /* Make an insn of code BARRIER | |
2564 | and output it before the insn AFTER. */ | |
2565 | ||
2566 | rtx | |
2567 | emit_barrier_before (before) | |
2568 | register rtx before; | |
2569 | { | |
2570 | register rtx insn = rtx_alloc (BARRIER); | |
2571 | ||
2572 | INSN_UID (insn) = cur_insn_uid++; | |
2573 | ||
a0ae8e8d | 2574 | add_insn_before (insn, before); |
23b2ce53 RS |
2575 | return insn; |
2576 | } | |
2577 | ||
2578 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ | |
2579 | ||
2580 | rtx | |
2581 | emit_note_before (subtype, before) | |
2582 | int subtype; | |
2583 | rtx before; | |
2584 | { | |
2585 | register rtx note = rtx_alloc (NOTE); | |
2586 | INSN_UID (note) = cur_insn_uid++; | |
2587 | NOTE_SOURCE_FILE (note) = 0; | |
2588 | NOTE_LINE_NUMBER (note) = subtype; | |
2589 | ||
a0ae8e8d | 2590 | add_insn_before (note, before); |
23b2ce53 RS |
2591 | return note; |
2592 | } | |
2593 | \f | |
2594 | /* Make an insn of code INSN with body PATTERN | |
2595 | and output it after the insn AFTER. */ | |
2596 | ||
2597 | rtx | |
2598 | emit_insn_after (pattern, after) | |
2599 | register rtx pattern, after; | |
2600 | { | |
2601 | register rtx insn = after; | |
2602 | ||
2603 | if (GET_CODE (pattern) == SEQUENCE) | |
2604 | { | |
2605 | register int i; | |
2606 | ||
2607 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2608 | { | |
2609 | insn = XVECEXP (pattern, 0, i); | |
2610 | add_insn_after (insn, after); | |
2611 | after = insn; | |
2612 | } | |
2613 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2614 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2615 | } | |
2616 | else | |
2617 | { | |
4b1f5e8c | 2618 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2619 | add_insn_after (insn, after); |
2620 | } | |
2621 | ||
2622 | return insn; | |
2623 | } | |
2624 | ||
255680cf RK |
2625 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
2626 | as to act as if this insn were at FROM. */ | |
2627 | ||
2628 | void | |
2629 | emit_insn_after_with_line_notes (pattern, after, from) | |
2630 | rtx pattern, after, from; | |
2631 | { | |
2632 | rtx from_line = find_line_note (from); | |
2633 | rtx after_line = find_line_note (after); | |
2634 | rtx insn = emit_insn_after (pattern, after); | |
2635 | ||
2636 | if (from_line) | |
2637 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2638 | NOTE_LINE_NUMBER (from_line), | |
2639 | after); | |
2640 | ||
2641 | if (after_line) | |
2642 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2643 | NOTE_LINE_NUMBER (after_line), | |
2644 | insn); | |
2645 | } | |
2646 | ||
23b2ce53 RS |
2647 | /* Make an insn of code JUMP_INSN with body PATTERN |
2648 | and output it after the insn AFTER. */ | |
2649 | ||
2650 | rtx | |
2651 | emit_jump_insn_after (pattern, after) | |
2652 | register rtx pattern, after; | |
2653 | { | |
2654 | register rtx insn; | |
2655 | ||
2656 | if (GET_CODE (pattern) == SEQUENCE) | |
2657 | insn = emit_insn_after (pattern, after); | |
2658 | else | |
2659 | { | |
85cf32bc | 2660 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2661 | add_insn_after (insn, after); |
2662 | } | |
2663 | ||
2664 | return insn; | |
2665 | } | |
2666 | ||
2667 | /* Make an insn of code BARRIER | |
2668 | and output it after the insn AFTER. */ | |
2669 | ||
2670 | rtx | |
2671 | emit_barrier_after (after) | |
2672 | register rtx after; | |
2673 | { | |
2674 | register rtx insn = rtx_alloc (BARRIER); | |
2675 | ||
2676 | INSN_UID (insn) = cur_insn_uid++; | |
2677 | ||
2678 | add_insn_after (insn, after); | |
2679 | return insn; | |
2680 | } | |
2681 | ||
2682 | /* Emit the label LABEL after the insn AFTER. */ | |
2683 | ||
2684 | rtx | |
2685 | emit_label_after (label, after) | |
2686 | rtx label, after; | |
2687 | { | |
2688 | /* This can be called twice for the same label | |
2689 | as a result of the confusion that follows a syntax error! | |
2690 | So make it harmless. */ | |
2691 | if (INSN_UID (label) == 0) | |
2692 | { | |
2693 | INSN_UID (label) = cur_insn_uid++; | |
2694 | add_insn_after (label, after); | |
2695 | } | |
2696 | ||
2697 | return label; | |
2698 | } | |
2699 | ||
2700 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
2701 | ||
2702 | rtx | |
2703 | emit_note_after (subtype, after) | |
2704 | int subtype; | |
2705 | rtx after; | |
2706 | { | |
2707 | register rtx note = rtx_alloc (NOTE); | |
2708 | INSN_UID (note) = cur_insn_uid++; | |
2709 | NOTE_SOURCE_FILE (note) = 0; | |
2710 | NOTE_LINE_NUMBER (note) = subtype; | |
2711 | add_insn_after (note, after); | |
2712 | return note; | |
2713 | } | |
2714 | ||
2715 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
2716 | ||
2717 | rtx | |
2718 | emit_line_note_after (file, line, after) | |
2719 | char *file; | |
2720 | int line; | |
2721 | rtx after; | |
2722 | { | |
2723 | register rtx note; | |
2724 | ||
2725 | if (no_line_numbers && line > 0) | |
2726 | { | |
2727 | cur_insn_uid++; | |
2728 | return 0; | |
2729 | } | |
2730 | ||
2731 | note = rtx_alloc (NOTE); | |
2732 | INSN_UID (note) = cur_insn_uid++; | |
2733 | NOTE_SOURCE_FILE (note) = file; | |
2734 | NOTE_LINE_NUMBER (note) = line; | |
2735 | add_insn_after (note, after); | |
2736 | return note; | |
2737 | } | |
2738 | \f | |
2739 | /* Make an insn of code INSN with pattern PATTERN | |
2740 | and add it to the end of the doubly-linked list. | |
2741 | If PATTERN is a SEQUENCE, take the elements of it | |
2742 | and emit an insn for each element. | |
2743 | ||
2744 | Returns the last insn emitted. */ | |
2745 | ||
2746 | rtx | |
2747 | emit_insn (pattern) | |
2748 | rtx pattern; | |
2749 | { | |
2750 | rtx insn = last_insn; | |
2751 | ||
2752 | if (GET_CODE (pattern) == SEQUENCE) | |
2753 | { | |
2754 | register int i; | |
2755 | ||
2756 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2757 | { | |
2758 | insn = XVECEXP (pattern, 0, i); | |
2759 | add_insn (insn); | |
2760 | } | |
2761 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2762 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2763 | } | |
2764 | else | |
2765 | { | |
4b1f5e8c | 2766 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2767 | add_insn (insn); |
2768 | } | |
2769 | ||
2770 | return insn; | |
2771 | } | |
2772 | ||
2773 | /* Emit the insns in a chain starting with INSN. | |
2774 | Return the last insn emitted. */ | |
2775 | ||
2776 | rtx | |
2777 | emit_insns (insn) | |
2778 | rtx insn; | |
2779 | { | |
2780 | rtx last = 0; | |
2781 | ||
2782 | while (insn) | |
2783 | { | |
2784 | rtx next = NEXT_INSN (insn); | |
2785 | add_insn (insn); | |
2786 | last = insn; | |
2787 | insn = next; | |
2788 | } | |
2789 | ||
2790 | return last; | |
2791 | } | |
2792 | ||
2793 | /* Emit the insns in a chain starting with INSN and place them in front of | |
2794 | the insn BEFORE. Return the last insn emitted. */ | |
2795 | ||
2796 | rtx | |
2797 | emit_insns_before (insn, before) | |
2798 | rtx insn; | |
2799 | rtx before; | |
2800 | { | |
2801 | rtx last = 0; | |
2802 | ||
2803 | while (insn) | |
2804 | { | |
2805 | rtx next = NEXT_INSN (insn); | |
a0ae8e8d | 2806 | add_insn_before (insn, before); |
23b2ce53 RS |
2807 | last = insn; |
2808 | insn = next; | |
2809 | } | |
2810 | ||
2811 | return last; | |
2812 | } | |
2813 | ||
e0a5c5eb RS |
2814 | /* Emit the insns in a chain starting with FIRST and place them in back of |
2815 | the insn AFTER. Return the last insn emitted. */ | |
2816 | ||
2817 | rtx | |
2818 | emit_insns_after (first, after) | |
2819 | register rtx first; | |
2820 | register rtx after; | |
2821 | { | |
2822 | register rtx last; | |
2823 | register rtx after_after; | |
2824 | ||
2825 | if (!after) | |
2826 | abort (); | |
2827 | ||
2828 | if (!first) | |
2829 | return first; | |
2830 | ||
2831 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
2832 | continue; | |
2833 | ||
2834 | after_after = NEXT_INSN (after); | |
2835 | ||
2836 | NEXT_INSN (after) = first; | |
2837 | PREV_INSN (first) = after; | |
2838 | NEXT_INSN (last) = after_after; | |
2839 | if (after_after) | |
2840 | PREV_INSN (after_after) = last; | |
2841 | ||
c4d990db RS |
2842 | if (after == last_insn) |
2843 | last_insn = last; | |
e0a5c5eb RS |
2844 | return last; |
2845 | } | |
2846 | ||
23b2ce53 RS |
2847 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
2848 | and add it to the end of the doubly-linked list. */ | |
2849 | ||
2850 | rtx | |
2851 | emit_jump_insn (pattern) | |
2852 | rtx pattern; | |
2853 | { | |
2854 | if (GET_CODE (pattern) == SEQUENCE) | |
2855 | return emit_insn (pattern); | |
2856 | else | |
2857 | { | |
85cf32bc | 2858 | register rtx insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2859 | add_insn (insn); |
2860 | return insn; | |
2861 | } | |
2862 | } | |
2863 | ||
2864 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
2865 | and add it to the end of the doubly-linked list. */ | |
2866 | ||
2867 | rtx | |
2868 | emit_call_insn (pattern) | |
2869 | rtx pattern; | |
2870 | { | |
2871 | if (GET_CODE (pattern) == SEQUENCE) | |
2872 | return emit_insn (pattern); | |
2873 | else | |
2874 | { | |
aff507f4 | 2875 | register rtx insn = make_call_insn_raw (pattern); |
23b2ce53 RS |
2876 | add_insn (insn); |
2877 | PUT_CODE (insn, CALL_INSN); | |
2878 | return insn; | |
2879 | } | |
2880 | } | |
2881 | ||
2882 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
2883 | ||
2884 | rtx | |
2885 | emit_label (label) | |
2886 | rtx label; | |
2887 | { | |
2888 | /* This can be called twice for the same label | |
2889 | as a result of the confusion that follows a syntax error! | |
2890 | So make it harmless. */ | |
2891 | if (INSN_UID (label) == 0) | |
2892 | { | |
2893 | INSN_UID (label) = cur_insn_uid++; | |
2894 | add_insn (label); | |
2895 | } | |
2896 | return label; | |
2897 | } | |
2898 | ||
2899 | /* Make an insn of code BARRIER | |
2900 | and add it to the end of the doubly-linked list. */ | |
2901 | ||
2902 | rtx | |
2903 | emit_barrier () | |
2904 | { | |
2905 | register rtx barrier = rtx_alloc (BARRIER); | |
2906 | INSN_UID (barrier) = cur_insn_uid++; | |
2907 | add_insn (barrier); | |
2908 | return barrier; | |
2909 | } | |
2910 | ||
2911 | /* Make an insn of code NOTE | |
2912 | with data-fields specified by FILE and LINE | |
2913 | and add it to the end of the doubly-linked list, | |
2914 | but only if line-numbers are desired for debugging info. */ | |
2915 | ||
2916 | rtx | |
2917 | emit_line_note (file, line) | |
2918 | char *file; | |
2919 | int line; | |
2920 | { | |
2921 | emit_filename = file; | |
2922 | emit_lineno = line; | |
2923 | ||
2924 | #if 0 | |
2925 | if (no_line_numbers) | |
2926 | return 0; | |
2927 | #endif | |
2928 | ||
2929 | return emit_note (file, line); | |
2930 | } | |
2931 | ||
2932 | /* Make an insn of code NOTE | |
2933 | with data-fields specified by FILE and LINE | |
2934 | and add it to the end of the doubly-linked list. | |
2935 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
2936 | ||
2937 | rtx | |
2938 | emit_note (file, line) | |
2939 | char *file; | |
2940 | int line; | |
2941 | { | |
2942 | register rtx note; | |
2943 | ||
2944 | if (line > 0) | |
2945 | { | |
2946 | if (file && last_filename && !strcmp (file, last_filename) | |
2947 | && line == last_linenum) | |
2948 | return 0; | |
2949 | last_filename = file; | |
2950 | last_linenum = line; | |
2951 | } | |
2952 | ||
2953 | if (no_line_numbers && line > 0) | |
2954 | { | |
2955 | cur_insn_uid++; | |
2956 | return 0; | |
2957 | } | |
2958 | ||
2959 | note = rtx_alloc (NOTE); | |
2960 | INSN_UID (note) = cur_insn_uid++; | |
2961 | NOTE_SOURCE_FILE (note) = file; | |
2962 | NOTE_LINE_NUMBER (note) = line; | |
2963 | add_insn (note); | |
2964 | return note; | |
2965 | } | |
2966 | ||
2967 | /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ | |
2968 | ||
2969 | rtx | |
2970 | emit_line_note_force (file, line) | |
2971 | char *file; | |
2972 | int line; | |
2973 | { | |
2974 | last_linenum = -1; | |
2975 | return emit_line_note (file, line); | |
2976 | } | |
2977 | ||
2978 | /* Cause next statement to emit a line note even if the line number | |
2979 | has not changed. This is used at the beginning of a function. */ | |
2980 | ||
2981 | void | |
2982 | force_next_line_note () | |
2983 | { | |
2984 | last_linenum = -1; | |
2985 | } | |
2986 | \f | |
2987 | /* Return an indication of which type of insn should have X as a body. | |
2988 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
2989 | ||
2990 | enum rtx_code | |
2991 | classify_insn (x) | |
2992 | rtx x; | |
2993 | { | |
2994 | if (GET_CODE (x) == CODE_LABEL) | |
2995 | return CODE_LABEL; | |
2996 | if (GET_CODE (x) == CALL) | |
2997 | return CALL_INSN; | |
2998 | if (GET_CODE (x) == RETURN) | |
2999 | return JUMP_INSN; | |
3000 | if (GET_CODE (x) == SET) | |
3001 | { | |
3002 | if (SET_DEST (x) == pc_rtx) | |
3003 | return JUMP_INSN; | |
3004 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
3005 | return CALL_INSN; | |
3006 | else | |
3007 | return INSN; | |
3008 | } | |
3009 | if (GET_CODE (x) == PARALLEL) | |
3010 | { | |
3011 | register int j; | |
3012 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) | |
3013 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
3014 | return CALL_INSN; | |
3015 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
3016 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
3017 | return JUMP_INSN; | |
3018 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
3019 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
3020 | return CALL_INSN; | |
3021 | } | |
3022 | return INSN; | |
3023 | } | |
3024 | ||
3025 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
3026 | If X is a label, it is simply added into the insn chain. */ | |
3027 | ||
3028 | rtx | |
3029 | emit (x) | |
3030 | rtx x; | |
3031 | { | |
3032 | enum rtx_code code = classify_insn (x); | |
3033 | ||
3034 | if (code == CODE_LABEL) | |
3035 | return emit_label (x); | |
3036 | else if (code == INSN) | |
3037 | return emit_insn (x); | |
3038 | else if (code == JUMP_INSN) | |
3039 | { | |
3040 | register rtx insn = emit_jump_insn (x); | |
3041 | if (simplejump_p (insn) || GET_CODE (x) == RETURN) | |
3042 | return emit_barrier (); | |
3043 | return insn; | |
3044 | } | |
3045 | else if (code == CALL_INSN) | |
3046 | return emit_call_insn (x); | |
3047 | else | |
3048 | abort (); | |
3049 | } | |
3050 | \f | |
3051 | /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ | |
3052 | ||
3053 | void | |
3054 | start_sequence () | |
3055 | { | |
3056 | struct sequence_stack *tem; | |
3057 | ||
3058 | if (sequence_element_free_list) | |
3059 | { | |
3060 | /* Reuse a previously-saved struct sequence_stack. */ | |
3061 | tem = sequence_element_free_list; | |
3062 | sequence_element_free_list = tem->next; | |
3063 | } | |
3064 | else | |
3065 | tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); | |
3066 | ||
3067 | tem->next = sequence_stack; | |
3068 | tem->first = first_insn; | |
3069 | tem->last = last_insn; | |
3ae24368 | 3070 | tem->sequence_rtl_expr = sequence_rtl_expr; |
23b2ce53 RS |
3071 | |
3072 | sequence_stack = tem; | |
3073 | ||
3074 | first_insn = 0; | |
3075 | last_insn = 0; | |
3076 | } | |
3077 | ||
a25c7971 RK |
3078 | /* Similarly, but indicate that this sequence will be placed in |
3079 | T, an RTL_EXPR. */ | |
3080 | ||
3081 | void | |
3082 | start_sequence_for_rtl_expr (t) | |
3083 | tree t; | |
3084 | { | |
3085 | start_sequence (); | |
3086 | ||
3087 | sequence_rtl_expr = t; | |
3088 | } | |
3089 | ||
23b2ce53 RS |
3090 | /* Set up the insn chain starting with FIRST |
3091 | as the current sequence, saving the previously current one. */ | |
3092 | ||
3093 | void | |
3094 | push_to_sequence (first) | |
3095 | rtx first; | |
3096 | { | |
3097 | rtx last; | |
3098 | ||
3099 | start_sequence (); | |
3100 | ||
3101 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
3102 | ||
3103 | first_insn = first; | |
3104 | last_insn = last; | |
3105 | } | |
3106 | ||
f15ae3a1 TW |
3107 | /* Set up the outer-level insn chain |
3108 | as the current sequence, saving the previously current one. */ | |
3109 | ||
3110 | void | |
3111 | push_topmost_sequence () | |
3112 | { | |
3113 | struct sequence_stack *stack, *top; | |
3114 | ||
3115 | start_sequence (); | |
3116 | ||
3117 | for (stack = sequence_stack; stack; stack = stack->next) | |
3118 | top = stack; | |
3119 | ||
3120 | first_insn = top->first; | |
3121 | last_insn = top->last; | |
629a4238 | 3122 | sequence_rtl_expr = top->sequence_rtl_expr; |
f15ae3a1 TW |
3123 | } |
3124 | ||
3125 | /* After emitting to the outer-level insn chain, update the outer-level | |
3126 | insn chain, and restore the previous saved state. */ | |
3127 | ||
3128 | void | |
3129 | pop_topmost_sequence () | |
3130 | { | |
3131 | struct sequence_stack *stack, *top; | |
3132 | ||
3133 | for (stack = sequence_stack; stack; stack = stack->next) | |
3134 | top = stack; | |
3135 | ||
3136 | top->first = first_insn; | |
3137 | top->last = last_insn; | |
3ae24368 | 3138 | /* ??? Why don't we save sequence_rtl_expr here? */ |
f15ae3a1 TW |
3139 | |
3140 | end_sequence (); | |
3141 | } | |
3142 | ||
23b2ce53 RS |
3143 | /* After emitting to a sequence, restore previous saved state. |
3144 | ||
3145 | To get the contents of the sequence just made, | |
3146 | you must call `gen_sequence' *before* calling here. */ | |
3147 | ||
3148 | void | |
3149 | end_sequence () | |
3150 | { | |
3151 | struct sequence_stack *tem = sequence_stack; | |
3152 | ||
3153 | first_insn = tem->first; | |
3154 | last_insn = tem->last; | |
629a4238 | 3155 | sequence_rtl_expr = tem->sequence_rtl_expr; |
23b2ce53 RS |
3156 | sequence_stack = tem->next; |
3157 | ||
3158 | tem->next = sequence_element_free_list; | |
3159 | sequence_element_free_list = tem; | |
3160 | } | |
3161 | ||
3162 | /* Return 1 if currently emitting into a sequence. */ | |
3163 | ||
3164 | int | |
3165 | in_sequence_p () | |
3166 | { | |
3167 | return sequence_stack != 0; | |
3168 | } | |
3169 | ||
3170 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
3171 | to the current sequence. | |
3172 | ||
3173 | This is how the gen_... function from a DEFINE_EXPAND | |
3174 | constructs the SEQUENCE that it returns. */ | |
3175 | ||
3176 | rtx | |
3177 | gen_sequence () | |
3178 | { | |
3179 | rtx result; | |
3180 | rtx tem; | |
23b2ce53 RS |
3181 | int i; |
3182 | int len; | |
3183 | ||
3184 | /* Count the insns in the chain. */ | |
3185 | len = 0; | |
3186 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
3187 | len++; | |
3188 | ||
3189 | /* If only one insn, return its pattern rather than a SEQUENCE. | |
3190 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing | |
3191 | the case of an empty list.) */ | |
3192 | if (len == 1 | |
ca55abae | 3193 | && ! RTX_FRAME_RELATED_P (first_insn) |
23b2ce53 RS |
3194 | && (GET_CODE (first_insn) == INSN |
3195 | || GET_CODE (first_insn) == JUMP_INSN | |
15d23f2b DE |
3196 | /* Don't discard the call usage field. */ |
3197 | || (GET_CODE (first_insn) == CALL_INSN | |
3198 | && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX))) | |
43127294 RK |
3199 | { |
3200 | NEXT_INSN (first_insn) = free_insn; | |
3201 | free_insn = first_insn; | |
3202 | return PATTERN (first_insn); | |
3203 | } | |
23b2ce53 RS |
3204 | |
3205 | /* Put them in a vector. See if we already have a SEQUENCE of the | |
3206 | appropriate length around. */ | |
3207 | if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) | |
3208 | sequence_result[len] = 0; | |
3209 | else | |
3210 | { | |
9faa82d8 RK |
3211 | /* Ensure that this rtl goes in saveable_obstack, since we may |
3212 | cache it. */ | |
d508ebba JW |
3213 | push_obstacks_nochange (); |
3214 | rtl_in_saveable_obstack (); | |
3b80f6ca | 3215 | result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); |
d508ebba | 3216 | pop_obstacks (); |
23b2ce53 RS |
3217 | } |
3218 | ||
3219 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
3220 | XVECEXP (result, 0, i) = tem; | |
3221 | ||
3222 | return result; | |
3223 | } | |
3224 | \f | |
23b2ce53 RS |
3225 | /* Initialize data structures and variables in this file |
3226 | before generating rtl for each function. */ | |
3227 | ||
3228 | void | |
3229 | init_emit () | |
3230 | { | |
3231 | int i; | |
3232 | ||
3233 | first_insn = NULL; | |
3234 | last_insn = NULL; | |
a25c7971 | 3235 | sequence_rtl_expr = NULL; |
23b2ce53 RS |
3236 | cur_insn_uid = 1; |
3237 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
3238 | last_linenum = 0; | |
3239 | last_filename = 0; | |
3240 | first_label_num = label_num; | |
3241 | last_label_num = 0; | |
24d11a9a | 3242 | sequence_stack = NULL; |
23b2ce53 RS |
3243 | |
3244 | /* Clear the start_sequence/gen_sequence cache. */ | |
3245 | sequence_element_free_list = 0; | |
3246 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
3247 | sequence_result[i] = 0; | |
43127294 | 3248 | free_insn = 0; |
23b2ce53 RS |
3249 | |
3250 | /* Init the tables that describe all the pseudo regs. */ | |
3251 | ||
3252 | regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; | |
3253 | ||
3254 | regno_pointer_flag | |
86fe05e0 | 3255 | = (char *) savealloc (regno_pointer_flag_length); |
23b2ce53 RS |
3256 | bzero (regno_pointer_flag, regno_pointer_flag_length); |
3257 | ||
86fe05e0 RK |
3258 | regno_pointer_align |
3259 | = (char *) savealloc (regno_pointer_flag_length); | |
3260 | bzero (regno_pointer_align, regno_pointer_flag_length); | |
3261 | ||
23b2ce53 | 3262 | regno_reg_rtx |
86fe05e0 | 3263 | = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx)); |
4c9a05bc | 3264 | bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); |
23b2ce53 RS |
3265 | |
3266 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
3267 | regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
3268 | regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
3269 | regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
3270 | regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
740ab4a2 RK |
3271 | |
3272 | /* Indicate that the virtual registers and stack locations are | |
3273 | all pointers. */ | |
3274 | REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; | |
3275 | REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; | |
15c9248c | 3276 | REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1; |
740ab4a2 RK |
3277 | REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; |
3278 | ||
3279 | REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; | |
3280 | REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; | |
3281 | REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; | |
3282 | REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; | |
5e82e7bd | 3283 | |
86fe05e0 RK |
3284 | #ifdef STACK_BOUNDARY |
3285 | REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; | |
3286 | REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; | |
3287 | REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) | |
3288 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3289 | REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; | |
3290 | ||
3291 | REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) | |
3292 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3293 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) | |
3294 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3295 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) | |
3296 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3297 | REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) | |
3298 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3299 | #endif | |
3300 | ||
5e82e7bd JVA |
3301 | #ifdef INIT_EXPANDERS |
3302 | INIT_EXPANDERS; | |
3303 | #endif | |
23b2ce53 RS |
3304 | } |
3305 | ||
3306 | /* Create some permanent unique rtl objects shared between all functions. | |
3307 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
3308 | ||
3309 | void | |
3310 | init_emit_once (line_numbers) | |
3311 | int line_numbers; | |
3312 | { | |
3313 | int i; | |
3314 | enum machine_mode mode; | |
3315 | ||
3316 | no_line_numbers = ! line_numbers; | |
3317 | ||
3318 | sequence_stack = NULL; | |
3319 | ||
1d445e9e ILT |
3320 | /* Compute the word and byte modes. */ |
3321 | ||
3322 | byte_mode = VOIDmode; | |
3323 | word_mode = VOIDmode; | |
3324 | ||
3325 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3326 | mode = GET_MODE_WIDER_MODE (mode)) | |
3327 | { | |
3328 | if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT | |
3329 | && byte_mode == VOIDmode) | |
3330 | byte_mode = mode; | |
3331 | ||
3332 | if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD | |
3333 | && word_mode == VOIDmode) | |
3334 | word_mode = mode; | |
3335 | } | |
3336 | ||
15c9248c RK |
3337 | ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0); |
3338 | ||
23b2ce53 RS |
3339 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
3340 | ||
23b2ce53 RS |
3341 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) |
3342 | { | |
68d75312 JC |
3343 | PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT); |
3344 | PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); | |
3345 | INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; | |
23b2ce53 RS |
3346 | } |
3347 | ||
68d75312 JC |
3348 | if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT |
3349 | && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT) | |
3350 | const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; | |
3351 | else | |
3b80f6ca | 3352 | const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE); |
23b2ce53 | 3353 | |
1632afca RS |
3354 | dconst0 = REAL_VALUE_ATOF ("0", DFmode); |
3355 | dconst1 = REAL_VALUE_ATOF ("1", DFmode); | |
3356 | dconst2 = REAL_VALUE_ATOF ("2", DFmode); | |
3357 | dconstm1 = REAL_VALUE_ATOF ("-1", DFmode); | |
23b2ce53 RS |
3358 | |
3359 | for (i = 0; i <= 2; i++) | |
3360 | { | |
3361 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
3362 | mode = GET_MODE_WIDER_MODE (mode)) | |
3363 | { | |
3364 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
3365 | union real_extract u; | |
3366 | ||
4c9a05bc | 3367 | bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */ |
23b2ce53 RS |
3368 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; |
3369 | ||
4c9a05bc | 3370 | bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u); |
23b2ce53 RS |
3371 | CONST_DOUBLE_MEM (tem) = cc0_rtx; |
3372 | PUT_MODE (tem, mode); | |
3373 | ||
3374 | const_tiny_rtx[i][(int) mode] = tem; | |
3375 | } | |
3376 | ||
906c4e36 | 3377 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
3378 | |
3379 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3380 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 3381 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
33d3e559 RS |
3382 | |
3383 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
3384 | mode != VOIDmode; | |
3385 | mode = GET_MODE_WIDER_MODE (mode)) | |
3386 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
23b2ce53 RS |
3387 | } |
3388 | ||
dfa09e23 TW |
3389 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; |
3390 | mode = GET_MODE_WIDER_MODE (mode)) | |
3391 | const_tiny_rtx[0][(int) mode] = const0_rtx; | |
3392 | ||
23b2ce53 | 3393 | |
68d75312 JC |
3394 | /* Assign register numbers to the globally defined register rtx. |
3395 | This must be done at runtime because the register number field | |
3396 | is in a union and some compilers can't initialize unions. */ | |
3397 | ||
3398 | REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM; | |
3399 | PUT_MODE (stack_pointer_rtx, Pmode); | |
3400 | REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM; | |
3401 | PUT_MODE (frame_pointer_rtx, Pmode); | |
ffc3503d | 3402 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
68d75312 JC |
3403 | REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM; |
3404 | PUT_MODE (hard_frame_pointer_rtx, Pmode); | |
ffc3503d JL |
3405 | #endif |
3406 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
68d75312 JC |
3407 | REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM; |
3408 | PUT_MODE (arg_pointer_rtx, Pmode); | |
ffc3503d | 3409 | #endif |
68d75312 JC |
3410 | |
3411 | REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM; | |
3412 | PUT_MODE (virtual_incoming_args_rtx, Pmode); | |
3413 | REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM; | |
3414 | PUT_MODE (virtual_stack_vars_rtx, Pmode); | |
3415 | REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM; | |
3416 | PUT_MODE (virtual_stack_dynamic_rtx, Pmode); | |
3417 | REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM; | |
3418 | PUT_MODE (virtual_outgoing_args_rtx, Pmode); | |
23b2ce53 | 3419 | |
a4417a86 | 3420 | #ifdef RETURN_ADDRESS_POINTER_REGNUM |
ffc3503d JL |
3421 | return_address_pointer_rtx |
3422 | = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); | |
a4417a86 JW |
3423 | #endif |
3424 | ||
23b2ce53 RS |
3425 | #ifdef STRUCT_VALUE |
3426 | struct_value_rtx = STRUCT_VALUE; | |
3427 | #else | |
3b80f6ca | 3428 | struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM); |
23b2ce53 RS |
3429 | #endif |
3430 | ||
3431 | #ifdef STRUCT_VALUE_INCOMING | |
3432 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
3433 | #else | |
3434 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
3435 | struct_value_incoming_rtx | |
3b80f6ca | 3436 | = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM); |
23b2ce53 RS |
3437 | #else |
3438 | struct_value_incoming_rtx = struct_value_rtx; | |
3439 | #endif | |
3440 | #endif | |
3441 | ||
3442 | #ifdef STATIC_CHAIN_REGNUM | |
3b80f6ca | 3443 | static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); |
23b2ce53 RS |
3444 | |
3445 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
3446 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
3b80f6ca | 3447 | static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); |
23b2ce53 RS |
3448 | else |
3449 | #endif | |
3450 | static_chain_incoming_rtx = static_chain_rtx; | |
3451 | #endif | |
3452 | ||
3453 | #ifdef STATIC_CHAIN | |
3454 | static_chain_rtx = STATIC_CHAIN; | |
3455 | ||
3456 | #ifdef STATIC_CHAIN_INCOMING | |
3457 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
3458 | #else | |
3459 | static_chain_incoming_rtx = static_chain_rtx; | |
3460 | #endif | |
3461 | #endif | |
3462 | ||
3463 | #ifdef PIC_OFFSET_TABLE_REGNUM | |
3b80f6ca | 3464 | pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); |
23b2ce53 RS |
3465 | #endif |
3466 | } |