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23b2ce53 RS |
1 | /* Emit RTL for the GNU C-Compiler expander. |
2 | Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Middle-to-low level generation of rtx code and insns. | |
22 | ||
23 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
24 | and `gen_label_rtx' that are the usual ways of creating rtl | |
25 | expressions for most purposes. | |
26 | ||
27 | It also has the functions for creating insns and linking | |
28 | them in the doubly-linked chain. | |
29 | ||
30 | The patterns of the insns are created by machine-dependent | |
31 | routines in insn-emit.c, which is generated automatically from | |
32 | the machine description. These routines use `gen_rtx' to make | |
33 | the individual rtx's of the pattern; what is machine dependent | |
34 | is the kind of rtx's they make and what arguments they use. */ | |
35 | ||
36 | #include "config.h" | |
23b2ce53 RS |
37 | #include "gvarargs.h" |
38 | #include "rtl.h" | |
39 | #include "flags.h" | |
40 | #include "function.h" | |
41 | #include "expr.h" | |
42 | #include "regs.h" | |
43 | #include "insn-config.h" | |
44 | #include "real.h" | |
f8d97cf4 | 45 | #include <stdio.h> |
23b2ce53 RS |
46 | |
47 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. | |
48 | After rtl generation, it is 1 plus the largest register number used. */ | |
49 | ||
50 | int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
51 | ||
52 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
53 | in the entire compilation a unique label number. */ | |
54 | ||
55 | static int label_num = 1; | |
56 | ||
57 | /* Lowest label number in current function. */ | |
58 | ||
59 | static int first_label_num; | |
60 | ||
61 | /* Highest label number in current function. | |
62 | Zero means use the value of label_num instead. | |
63 | This is nonzero only when belatedly compiling an inline function. */ | |
64 | ||
65 | static int last_label_num; | |
66 | ||
67 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
68 | If label_num has not changed since then, last_label_num is valid. */ | |
69 | ||
70 | static int base_label_num; | |
71 | ||
72 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
73 | ||
74 | static int no_line_numbers; | |
75 | ||
76 | /* Commonly used rtx's, so that we only need space for one copy. | |
77 | These are initialized once for the entire compilation. | |
78 | All of these except perhaps the floating-point CONST_DOUBLEs | |
79 | are unique; no other rtx-object will be equal to any of these. */ | |
80 | ||
81 | rtx pc_rtx; /* (PC) */ | |
82 | rtx cc0_rtx; /* (CC0) */ | |
83 | rtx cc1_rtx; /* (CC1) (not actually used nowadays) */ | |
84 | rtx const0_rtx; /* (CONST_INT 0) */ | |
85 | rtx const1_rtx; /* (CONST_INT 1) */ | |
86 | rtx const2_rtx; /* (CONST_INT 2) */ | |
87 | rtx constm1_rtx; /* (CONST_INT -1) */ | |
88 | rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */ | |
89 | ||
90 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
91 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
92 | record a copy of const[012]_rtx. */ | |
93 | ||
94 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
95 | ||
96 | REAL_VALUE_TYPE dconst0; | |
97 | REAL_VALUE_TYPE dconst1; | |
98 | REAL_VALUE_TYPE dconst2; | |
99 | REAL_VALUE_TYPE dconstm1; | |
100 | ||
101 | /* All references to the following fixed hard registers go through | |
102 | these unique rtl objects. On machines where the frame-pointer and | |
103 | arg-pointer are the same register, they use the same unique object. | |
104 | ||
105 | After register allocation, other rtl objects which used to be pseudo-regs | |
106 | may be clobbered to refer to the frame-pointer register. | |
107 | But references that were originally to the frame-pointer can be | |
108 | distinguished from the others because they contain frame_pointer_rtx. | |
109 | ||
110 | In an inline procedure, the stack and frame pointer rtxs may not be | |
111 | used for anything else. */ | |
112 | rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */ | |
113 | rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */ | |
114 | rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */ | |
115 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ | |
116 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
117 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
118 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
119 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
120 | ||
121 | rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */ | |
122 | rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */ | |
123 | rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */ | |
124 | rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */ | |
125 | ||
126 | /* We make one copy of (const_int C) where C is in | |
127 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
128 | to save space during the compilation and simplify comparisons of | |
129 | integers. */ | |
130 | ||
131 | #define MAX_SAVED_CONST_INT 64 | |
132 | ||
133 | static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; | |
134 | ||
135 | /* The ends of the doubly-linked chain of rtl for the current function. | |
136 | Both are reset to null at the start of rtl generation for the function. | |
137 | ||
138 | start_sequence saves both of these on `sequence_stack' and then | |
139 | starts a new, nested sequence of insns. */ | |
140 | ||
141 | static rtx first_insn = NULL; | |
142 | static rtx last_insn = NULL; | |
143 | ||
144 | /* INSN_UID for next insn emitted. | |
145 | Reset to 1 for each function compiled. */ | |
146 | ||
147 | static int cur_insn_uid = 1; | |
148 | ||
149 | /* Line number and source file of the last line-number NOTE emitted. | |
150 | This is used to avoid generating duplicates. */ | |
151 | ||
152 | static int last_linenum = 0; | |
153 | static char *last_filename = 0; | |
154 | ||
155 | /* A vector indexed by pseudo reg number. The allocated length | |
156 | of this vector is regno_pointer_flag_length. Since this | |
157 | vector is needed during the expansion phase when the total | |
158 | number of registers in the function is not yet known, | |
159 | it is copied and made bigger when necessary. */ | |
160 | ||
161 | char *regno_pointer_flag; | |
162 | int regno_pointer_flag_length; | |
163 | ||
164 | /* Indexed by pseudo register number, gives the rtx for that pseudo. | |
165 | Allocated in parallel with regno_pointer_flag. */ | |
166 | ||
167 | rtx *regno_reg_rtx; | |
168 | ||
169 | /* Stack of pending (incomplete) sequences saved by `start_sequence'. | |
170 | Each element describes one pending sequence. | |
171 | The main insn-chain is saved in the last element of the chain, | |
172 | unless the chain is empty. */ | |
173 | ||
174 | struct sequence_stack *sequence_stack; | |
175 | ||
176 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are | |
177 | shortly thrown away. We use two mechanisms to prevent this waste: | |
178 | ||
179 | First, we keep a list of the expressions used to represent the sequence | |
180 | stack in sequence_element_free_list. | |
181 | ||
182 | Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated | |
183 | rtvec for use by gen_sequence. One entry for each size is sufficient | |
184 | because most cases are calls to gen_sequence followed by immediately | |
185 | emitting the SEQUENCE. Reuse is safe since emitting a sequence is | |
186 | destructive on the insn in it anyway and hence can't be redone. | |
187 | ||
188 | We do not bother to save this cached data over nested function calls. | |
189 | Instead, we just reinitialize them. */ | |
190 | ||
191 | #define SEQUENCE_RESULT_SIZE 5 | |
192 | ||
193 | static struct sequence_stack *sequence_element_free_list; | |
194 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; | |
195 | ||
196 | extern int rtx_equal_function_value_matters; | |
197 | ||
198 | /* Filename and line number of last line-number note, | |
199 | whether we actually emitted it or not. */ | |
200 | extern char *emit_filename; | |
201 | extern int emit_lineno; | |
202 | ||
203 | rtx change_address (); | |
204 | void init_emit (); | |
205 | \f | |
206 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) | |
207 | ** | |
208 | ** This routine generates an RTX of the size specified by | |
209 | ** <code>, which is an RTX code. The RTX structure is initialized | |
210 | ** from the arguments <element1> through <elementn>, which are | |
211 | ** interpreted according to the specific RTX type's format. The | |
212 | ** special machine mode associated with the rtx (if any) is specified | |
213 | ** in <mode>. | |
214 | ** | |
1632afca | 215 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
23b2ce53 RS |
216 | ** rtx it will generate. For example, the following rtx structure: |
217 | ** | |
218 | ** (plus:QI (mem:QI (reg:SI 1)) | |
219 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
220 | ** | |
221 | ** ...would be generated by the following C code: | |
222 | ** | |
223 | ** gen_rtx (PLUS, QImode, | |
224 | ** gen_rtx (MEM, QImode, | |
225 | ** gen_rtx (REG, SImode, 1)), | |
226 | ** gen_rtx (MEM, QImode, | |
227 | ** gen_rtx (PLUS, SImode, | |
228 | ** gen_rtx (REG, SImode, 2), | |
229 | ** gen_rtx (REG, SImode, 3)))), | |
230 | */ | |
231 | ||
232 | /*VARARGS2*/ | |
233 | rtx | |
234 | gen_rtx (va_alist) | |
235 | va_dcl | |
236 | { | |
237 | va_list p; | |
238 | enum rtx_code code; | |
239 | enum machine_mode mode; | |
240 | register int i; /* Array indices... */ | |
241 | register char *fmt; /* Current rtx's format... */ | |
242 | register rtx rt_val; /* RTX to return to caller... */ | |
243 | ||
244 | va_start (p); | |
245 | code = va_arg (p, enum rtx_code); | |
246 | mode = va_arg (p, enum machine_mode); | |
247 | ||
248 | if (code == CONST_INT) | |
249 | { | |
906c4e36 | 250 | HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT); |
23b2ce53 RS |
251 | |
252 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) | |
253 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; | |
254 | ||
255 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
256 | return const_true_rtx; | |
257 | ||
258 | rt_val = rtx_alloc (code); | |
259 | INTVAL (rt_val) = arg; | |
260 | } | |
261 | else if (code == REG) | |
262 | { | |
263 | int regno = va_arg (p, int); | |
264 | ||
265 | /* In case the MD file explicitly references the frame pointer, have | |
266 | all such references point to the same frame pointer. This is used | |
267 | during frame pointer elimination to distinguish the explicit | |
268 | references to these registers from pseudos that happened to be | |
269 | assigned to them. | |
270 | ||
271 | If we have eliminated the frame pointer or arg pointer, we will | |
272 | be using it as a normal register, for example as a spill register. | |
273 | In such cases, we might be accessing it in a mode that is not | |
600a5d88 | 274 | Pmode and therefore cannot use the pre-allocated rtx. |
23b2ce53 | 275 | |
600a5d88 RK |
276 | Also don't do this when we are making new REGs in reload, |
277 | since we don't want to get confused with the real pointers. */ | |
278 | ||
279 | if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode | |
280 | && ! reload_in_progress) | |
23b2ce53 RS |
281 | return frame_pointer_rtx; |
282 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
600a5d88 RK |
283 | if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode |
284 | && ! reload_in_progress) | |
23b2ce53 RS |
285 | return arg_pointer_rtx; |
286 | #endif | |
600a5d88 RK |
287 | if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode |
288 | && ! reload_in_progress) | |
23b2ce53 RS |
289 | return stack_pointer_rtx; |
290 | else | |
291 | { | |
292 | rt_val = rtx_alloc (code); | |
293 | rt_val->mode = mode; | |
294 | REGNO (rt_val) = regno; | |
295 | return rt_val; | |
296 | } | |
297 | } | |
298 | else | |
299 | { | |
300 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ | |
301 | rt_val->mode = mode; /* Store the machine mode... */ | |
302 | ||
303 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
304 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
305 | { | |
306 | switch (*fmt++) | |
307 | { | |
308 | case '0': /* Unused field. */ | |
309 | break; | |
310 | ||
311 | case 'i': /* An integer? */ | |
312 | XINT (rt_val, i) = va_arg (p, int); | |
313 | break; | |
314 | ||
906c4e36 RK |
315 | case 'w': /* A wide integer? */ |
316 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
317 | break; | |
318 | ||
23b2ce53 RS |
319 | case 's': /* A string? */ |
320 | XSTR (rt_val, i) = va_arg (p, char *); | |
321 | break; | |
322 | ||
323 | case 'e': /* An expression? */ | |
324 | case 'u': /* An insn? Same except when printing. */ | |
325 | XEXP (rt_val, i) = va_arg (p, rtx); | |
326 | break; | |
327 | ||
328 | case 'E': /* An RTX vector? */ | |
329 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
330 | break; | |
331 | ||
332 | default: | |
1632afca | 333 | abort (); |
23b2ce53 RS |
334 | } |
335 | } | |
336 | } | |
337 | va_end (p); | |
338 | return rt_val; /* Return the new RTX... */ | |
339 | } | |
340 | ||
341 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
342 | ** | |
343 | ** This routine creates an rtvec and stores within it the | |
344 | ** pointers to rtx's which are its arguments. | |
345 | */ | |
346 | ||
347 | /*VARARGS1*/ | |
348 | rtvec | |
349 | gen_rtvec (va_alist) | |
350 | va_dcl | |
351 | { | |
352 | int n, i; | |
353 | va_list p; | |
354 | rtx *vector; | |
355 | ||
356 | va_start (p); | |
357 | n = va_arg (p, int); | |
358 | ||
359 | if (n == 0) | |
360 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
361 | ||
362 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
363 | for (i = 0; i < n; i++) | |
364 | vector[i] = va_arg (p, rtx); | |
365 | va_end (p); | |
366 | ||
367 | return gen_rtvec_v (n, vector); | |
368 | } | |
369 | ||
370 | rtvec | |
371 | gen_rtvec_v (n, argp) | |
372 | int n; | |
373 | rtx *argp; | |
374 | { | |
375 | register int i; | |
376 | register rtvec rt_val; | |
377 | ||
378 | if (n == 0) | |
379 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
380 | ||
381 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
382 | ||
383 | for (i = 0; i < n; i++) | |
384 | rt_val->elem[i].rtx = *argp++; | |
385 | ||
386 | return rt_val; | |
387 | } | |
388 | \f | |
389 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
390 | This pseudo is assigned the next sequential register number. */ | |
391 | ||
392 | rtx | |
393 | gen_reg_rtx (mode) | |
394 | enum machine_mode mode; | |
395 | { | |
396 | register rtx val; | |
397 | ||
398 | /* Don't let anything called by or after reload create new registers | |
399 | (actually, registers can't be created after flow, but this is a good | |
400 | approximation). */ | |
401 | ||
402 | if (reload_in_progress || reload_completed) | |
403 | abort (); | |
404 | ||
405 | /* Make sure regno_pointer_flag and regno_reg_rtx are large | |
406 | enough to have an element for this pseudo reg number. */ | |
407 | ||
408 | if (reg_rtx_no == regno_pointer_flag_length) | |
409 | { | |
410 | rtx *new1; | |
411 | char *new = | |
412 | (char *) oballoc (regno_pointer_flag_length * 2); | |
413 | bzero (new, regno_pointer_flag_length * 2); | |
414 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); | |
415 | regno_pointer_flag = new; | |
416 | ||
417 | new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx)); | |
418 | bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx)); | |
419 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); | |
420 | regno_reg_rtx = new1; | |
421 | ||
422 | regno_pointer_flag_length *= 2; | |
423 | } | |
424 | ||
425 | val = gen_rtx (REG, mode, reg_rtx_no); | |
426 | regno_reg_rtx[reg_rtx_no++] = val; | |
427 | return val; | |
428 | } | |
429 | ||
430 | /* Identify REG as a probable pointer register. */ | |
431 | ||
432 | void | |
433 | mark_reg_pointer (reg) | |
434 | rtx reg; | |
435 | { | |
436 | REGNO_POINTER_FLAG (REGNO (reg)) = 1; | |
437 | } | |
438 | ||
439 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
440 | ||
441 | int | |
442 | max_reg_num () | |
443 | { | |
444 | return reg_rtx_no; | |
445 | } | |
446 | ||
447 | /* Return 1 + the largest label number used so far in the current function. */ | |
448 | ||
449 | int | |
450 | max_label_num () | |
451 | { | |
452 | if (last_label_num && label_num == base_label_num) | |
453 | return last_label_num; | |
454 | return label_num; | |
455 | } | |
456 | ||
457 | /* Return first label number used in this function (if any were used). */ | |
458 | ||
459 | int | |
460 | get_first_label_num () | |
461 | { | |
462 | return first_label_num; | |
463 | } | |
464 | \f | |
465 | /* Return a value representing some low-order bits of X, where the number | |
466 | of low-order bits is given by MODE. Note that no conversion is done | |
467 | between floating-point and fixed-point values, rather, the bit | |
468 | representation is returned. | |
469 | ||
470 | This function handles the cases in common between gen_lowpart, below, | |
471 | and two variants in cse.c and combine.c. These are the cases that can | |
472 | be safely handled at all points in the compilation. | |
473 | ||
474 | If this is not a case we can handle, return 0. */ | |
475 | ||
476 | rtx | |
477 | gen_lowpart_common (mode, x) | |
478 | enum machine_mode mode; | |
479 | register rtx x; | |
480 | { | |
481 | int word = 0; | |
482 | ||
483 | if (GET_MODE (x) == mode) | |
484 | return x; | |
485 | ||
486 | /* MODE must occupy no more words than the mode of X. */ | |
487 | if (GET_MODE (x) != VOIDmode | |
488 | && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD | |
489 | > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) | |
490 | / UNITS_PER_WORD))) | |
491 | return 0; | |
492 | ||
493 | if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
494 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
495 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
496 | / UNITS_PER_WORD); | |
497 | ||
498 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
83e9c679 RK |
499 | && (GET_MODE_CLASS (mode) == MODE_INT |
500 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
23b2ce53 RS |
501 | { |
502 | /* If we are getting the low-order part of something that has been | |
503 | sign- or zero-extended, we can either just use the object being | |
504 | extended or make a narrower extension. If we want an even smaller | |
505 | piece than the size of the object being extended, call ourselves | |
506 | recursively. | |
507 | ||
508 | This case is used mostly by combine and cse. */ | |
509 | ||
510 | if (GET_MODE (XEXP (x, 0)) == mode) | |
511 | return XEXP (x, 0); | |
512 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
513 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
514 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
515 | return gen_rtx (GET_CODE (x), mode, XEXP (x, 0)); | |
516 | } | |
517 | else if (GET_CODE (x) == SUBREG | |
518 | && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
519 | || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) | |
520 | return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 | |
521 | ? SUBREG_REG (x) | |
522 | : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x))); | |
523 | else if (GET_CODE (x) == REG) | |
524 | { | |
525 | /* If the register is not valid for MODE, return 0. If we don't | |
526 | do this, there is no way to fix up the resulting REG later. */ | |
527 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
528 | && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)) | |
529 | return 0; | |
530 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
531 | /* integrate.c can't handle parts of a return value register. */ | |
532 | && (! REG_FUNCTION_VALUE_P (x) | |
cb00f51a RK |
533 | || ! rtx_equal_function_value_matters) |
534 | /* We want to keep the stack, frame, and arg pointers | |
535 | special. */ | |
536 | && REGNO (x) != FRAME_POINTER_REGNUM | |
537 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
538 | && REGNO (x) != ARG_POINTER_REGNUM | |
539 | #endif | |
540 | && REGNO (x) != STACK_POINTER_REGNUM) | |
23b2ce53 RS |
541 | return gen_rtx (REG, mode, REGNO (x) + word); |
542 | else | |
543 | return gen_rtx (SUBREG, mode, x, word); | |
544 | } | |
545 | ||
546 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits | |
547 | from the low-order part of the constant. */ | |
83e9c679 RK |
548 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
549 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
550 | && GET_MODE (x) == VOIDmode | |
23b2ce53 | 551 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
1a5b457d RK |
552 | { |
553 | /* If MODE is twice the host word size, X is already the desired | |
554 | representation. Otherwise, if MODE is wider than a word, we can't | |
555 | do this. If MODE is exactly a word, return just one CONST_INT. | |
556 | If MODE is smaller than a word, clear the bits that don't belong | |
557 | in our mode, unless they and our sign bit are all one. So we get | |
558 | either a reasonable negative value or a reasonable unsigned value | |
559 | for this mode. */ | |
560 | ||
906c4e36 | 561 | if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 562 | return x; |
906c4e36 | 563 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 564 | return 0; |
906c4e36 | 565 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 566 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 567 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
568 | else |
569 | { | |
570 | /* MODE must be narrower than HOST_BITS_PER_INT. */ | |
571 | int width = GET_MODE_BITSIZE (mode); | |
906c4e36 RK |
572 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
573 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 574 | |
906c4e36 RK |
575 | if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) |
576 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
577 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
1a5b457d RK |
578 | |
579 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 580 | : GEN_INT (val)); |
1a5b457d RK |
581 | } |
582 | } | |
23b2ce53 | 583 | |
8aada4ad RK |
584 | /* If X is an integral constant but we want it in floating-point, it |
585 | must be the case that we have a union of an integer and a floating-point | |
586 | value. If the machine-parameters allow it, simulate that union here | |
d6020413 RK |
587 | and return the result. The two-word and single-word cases are |
588 | different. */ | |
8aada4ad | 589 | |
b3bf132d | 590 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 591 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 592 | || flag_pretend_float) |
8aada4ad | 593 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
d6020413 RK |
594 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
595 | && GET_CODE (x) == CONST_INT | |
906c4e36 | 596 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
d6020413 | 597 | { |
906c4e36 | 598 | union {HOST_WIDE_INT i; float d; } u; |
d6020413 RK |
599 | |
600 | u.i = INTVAL (x); | |
601 | return immed_real_const_1 (u.d, mode); | |
602 | } | |
603 | ||
604 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 605 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
d6020413 RK |
606 | || flag_pretend_float) |
607 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
608 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
8aada4ad RK |
609 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
610 | && GET_MODE (x) == VOIDmode | |
906c4e36 RK |
611 | && (sizeof (double) * HOST_BITS_PER_CHAR |
612 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
8aada4ad | 613 | { |
906c4e36 RK |
614 | union {HOST_WIDE_INT i[2]; double d; } u; |
615 | HOST_WIDE_INT low, high; | |
8aada4ad RK |
616 | |
617 | if (GET_CODE (x) == CONST_INT) | |
906c4e36 | 618 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
8aada4ad RK |
619 | else |
620 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
621 | ||
622 | #ifdef HOST_WORDS_BIG_ENDIAN | |
623 | u.i[0] = high, u.i[1] = low; | |
624 | #else | |
625 | u.i[0] = low, u.i[1] = high; | |
626 | #endif | |
627 | ||
628 | return immed_real_const_1 (u.d, mode); | |
629 | } | |
630 | ||
b3bf132d RK |
631 | /* Similarly, if this is converting a floating-point value into a |
632 | single-word integer. Only do this is the host and target parameters are | |
633 | compatible. */ | |
634 | ||
635 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 636 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 637 | || flag_pretend_float) |
83e9c679 RK |
638 | && (GET_MODE_CLASS (mode) == MODE_INT |
639 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
b3bf132d RK |
640 | && GET_CODE (x) == CONST_DOUBLE |
641 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
642 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
643 | return operand_subword (x, 0, 0, GET_MODE (x)); | |
644 | ||
8aada4ad RK |
645 | /* Similarly, if this is converting a floating-point value into a |
646 | two-word integer, we can do this one word at a time and make an | |
647 | integer. Only do this is the host and target parameters are | |
648 | compatible. */ | |
649 | ||
b3bf132d | 650 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 651 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 652 | || flag_pretend_float) |
83e9c679 | 653 | && (GET_MODE_CLASS (mode) == MODE_INT |
f5a2fb25 | 654 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
8aada4ad RK |
655 | && GET_CODE (x) == CONST_DOUBLE |
656 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
657 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
658 | { | |
659 | rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
660 | rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
661 | ||
662 | if (lowpart && GET_CODE (lowpart) == CONST_INT | |
663 | && highpart && GET_CODE (highpart) == CONST_INT) | |
664 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
665 | } | |
666 | ||
23b2ce53 RS |
667 | /* Otherwise, we can't do this. */ |
668 | return 0; | |
669 | } | |
670 | \f | |
280194b0 RS |
671 | /* Return the real part (which has mode MODE) of a complex value X. |
672 | This always comes at the low address in memory. */ | |
673 | ||
674 | rtx | |
675 | gen_realpart (mode, x) | |
676 | enum machine_mode mode; | |
677 | register rtx x; | |
678 | { | |
679 | if (WORDS_BIG_ENDIAN) | |
680 | return gen_highpart (mode, x); | |
681 | else | |
682 | return gen_lowpart (mode, x); | |
683 | } | |
684 | ||
685 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
686 | This always comes at the high address in memory. */ | |
687 | ||
688 | rtx | |
689 | gen_imagpart (mode, x) | |
690 | enum machine_mode mode; | |
691 | register rtx x; | |
692 | { | |
693 | if (WORDS_BIG_ENDIAN) | |
694 | return gen_lowpart (mode, x); | |
695 | else | |
696 | return gen_highpart (mode, x); | |
697 | } | |
698 | \f | |
23b2ce53 RS |
699 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
700 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
701 | least-significant part of X. | |
702 | MODE specifies how big a part of X to return; | |
703 | it usually should not be larger than a word. | |
704 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
705 | ||
706 | rtx | |
707 | gen_lowpart (mode, x) | |
708 | enum machine_mode mode; | |
709 | register rtx x; | |
710 | { | |
711 | rtx result = gen_lowpart_common (mode, x); | |
712 | ||
713 | if (result) | |
714 | return result; | |
715 | else if (GET_CODE (x) == MEM) | |
716 | { | |
717 | /* The only additional case we can do is MEM. */ | |
718 | register int offset = 0; | |
719 | if (WORDS_BIG_ENDIAN) | |
720 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
721 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
722 | ||
723 | if (BYTES_BIG_ENDIAN) | |
724 | /* Adjust the address so that the address-after-the-data | |
725 | is unchanged. */ | |
726 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
727 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
728 | ||
729 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
730 | } | |
731 | else | |
732 | abort (); | |
733 | } | |
734 | ||
ccba022b RS |
735 | /* Like `gen_lowpart', but refer to the most significant part. |
736 | This is used to access the imaginary part of a complex number. */ | |
737 | ||
738 | rtx | |
739 | gen_highpart (mode, x) | |
740 | enum machine_mode mode; | |
741 | register rtx x; | |
742 | { | |
743 | /* This case loses if X is a subreg. To catch bugs early, | |
744 | complain if an invalid MODE is used even in other cases. */ | |
745 | if (GET_MODE_SIZE (mode) > UNITS_PER_WORD | |
746 | && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
747 | abort (); | |
748 | if (GET_CODE (x) == CONST_DOUBLE | |
1632afca | 749 | #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) |
ccba022b RS |
750 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT |
751 | #endif | |
752 | ) | |
753 | return gen_rtx (CONST_INT, VOIDmode, | |
754 | CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); | |
755 | else if (GET_CODE (x) == CONST_INT) | |
756 | return const0_rtx; | |
757 | else if (GET_CODE (x) == MEM) | |
758 | { | |
759 | register int offset = 0; | |
760 | #if !WORDS_BIG_ENDIAN | |
761 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
762 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
763 | #endif | |
764 | #if !BYTES_BIG_ENDIAN | |
765 | if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
766 | offset -= (GET_MODE_SIZE (mode) | |
767 | - MIN (UNITS_PER_WORD, | |
768 | GET_MODE_SIZE (GET_MODE (x)))); | |
769 | #endif | |
770 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
771 | } | |
772 | else if (GET_CODE (x) == SUBREG) | |
773 | { | |
774 | /* The only time this should occur is when we are looking at a | |
775 | multi-word item with a SUBREG whose mode is the same as that of the | |
776 | item. It isn't clear what we would do if it wasn't. */ | |
777 | if (SUBREG_WORD (x) != 0) | |
778 | abort (); | |
779 | return gen_highpart (mode, SUBREG_REG (x)); | |
780 | } | |
781 | else if (GET_CODE (x) == REG) | |
782 | { | |
783 | int word = 0; | |
784 | ||
785 | #if !WORDS_BIG_ENDIAN | |
786 | if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
787 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
788 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
789 | / UNITS_PER_WORD); | |
790 | #endif | |
cb00f51a RK |
791 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
792 | /* We want to keep the stack, frame, and arg pointers special. */ | |
793 | && REGNO (x) != FRAME_POINTER_REGNUM | |
794 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
795 | && REGNO (x) != ARG_POINTER_REGNUM | |
796 | #endif | |
797 | && REGNO (x) != STACK_POINTER_REGNUM) | |
ccba022b RS |
798 | return gen_rtx (REG, mode, REGNO (x) + word); |
799 | else | |
800 | return gen_rtx (SUBREG, mode, x, word); | |
801 | } | |
802 | else | |
803 | abort (); | |
804 | } | |
805 | ||
23b2ce53 RS |
806 | /* Return 1 iff X, assumed to be a SUBREG, |
807 | refers to the least significant part of its containing reg. | |
808 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
809 | ||
810 | int | |
811 | subreg_lowpart_p (x) | |
812 | rtx x; | |
813 | { | |
814 | if (GET_CODE (x) != SUBREG) | |
815 | return 1; | |
816 | ||
817 | if (WORDS_BIG_ENDIAN | |
818 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) | |
819 | return (SUBREG_WORD (x) | |
820 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) | |
821 | - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) | |
822 | / UNITS_PER_WORD)); | |
823 | ||
824 | return SUBREG_WORD (x) == 0; | |
825 | } | |
826 | \f | |
827 | /* Return subword I of operand OP. | |
828 | The word number, I, is interpreted as the word number starting at the | |
829 | low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, | |
830 | otherwise it is the high-order word. | |
831 | ||
832 | If we cannot extract the required word, we return zero. Otherwise, an | |
833 | rtx corresponding to the requested word will be returned. | |
834 | ||
835 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
836 | reload has completed, a valid address will always be returned. After | |
837 | reload, if a valid address cannot be returned, we return zero. | |
838 | ||
839 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
840 | it is the responsibility of the caller. | |
841 | ||
842 | MODE is the mode of OP in case it is a CONST_INT. */ | |
843 | ||
844 | rtx | |
845 | operand_subword (op, i, validate_address, mode) | |
846 | rtx op; | |
847 | int i; | |
848 | int validate_address; | |
849 | enum machine_mode mode; | |
850 | { | |
906c4e36 RK |
851 | HOST_WIDE_INT val; |
852 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; | |
23b2ce53 RS |
853 | |
854 | if (mode == VOIDmode) | |
855 | mode = GET_MODE (op); | |
856 | ||
857 | if (mode == VOIDmode) | |
858 | abort (); | |
859 | ||
860 | /* If OP is narrower than a word or if we want a word outside OP, fail. */ | |
861 | if (mode != BLKmode | |
862 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD | |
863 | || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) | |
864 | return 0; | |
865 | ||
866 | /* If OP is already an integer word, return it. */ | |
867 | if (GET_MODE_CLASS (mode) == MODE_INT | |
868 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
869 | return op; | |
870 | ||
871 | /* If OP is a REG or SUBREG, we can handle it very simply. */ | |
872 | if (GET_CODE (op) == REG) | |
873 | { | |
874 | /* If the register is not valid for MODE, return 0. If we don't | |
875 | do this, there is no way to fix up the resulting REG later. */ | |
876 | if (REGNO (op) < FIRST_PSEUDO_REGISTER | |
877 | && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) | |
878 | return 0; | |
879 | else if (REGNO (op) >= FIRST_PSEUDO_REGISTER | |
880 | || (REG_FUNCTION_VALUE_P (op) | |
cb00f51a RK |
881 | && rtx_equal_function_value_matters) |
882 | /* We want to keep the stack, frame, and arg pointers | |
883 | special. */ | |
884 | || REGNO (op) == FRAME_POINTER_REGNUM | |
885 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
886 | || REGNO (op) == ARG_POINTER_REGNUM | |
887 | #endif | |
888 | || REGNO (op) == STACK_POINTER_REGNUM) | |
23b2ce53 RS |
889 | return gen_rtx (SUBREG, word_mode, op, i); |
890 | else | |
891 | return gen_rtx (REG, word_mode, REGNO (op) + i); | |
892 | } | |
893 | else if (GET_CODE (op) == SUBREG) | |
894 | return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); | |
895 | ||
896 | /* Form a new MEM at the requested address. */ | |
897 | if (GET_CODE (op) == MEM) | |
898 | { | |
899 | rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); | |
900 | rtx new; | |
901 | ||
902 | if (validate_address) | |
903 | { | |
904 | if (reload_completed) | |
905 | { | |
906 | if (! strict_memory_address_p (word_mode, addr)) | |
907 | return 0; | |
908 | } | |
909 | else | |
910 | addr = memory_address (word_mode, addr); | |
911 | } | |
912 | ||
913 | new = gen_rtx (MEM, word_mode, addr); | |
914 | ||
915 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); | |
916 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); | |
917 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); | |
918 | ||
919 | return new; | |
920 | } | |
921 | ||
922 | /* The only remaining cases are when OP is a constant. If the host and | |
923 | target floating formats are the same, handling two-word floating | |
924 | constants are easy. */ | |
1632afca RS |
925 | #ifdef REAL_ARITHMETIC |
926 | if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
927 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
928 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
929 | && GET_CODE (op) == CONST_DOUBLE) | |
930 | { | |
931 | HOST_WIDE_INT k[2]; | |
932 | REAL_VALUE_TYPE rv; | |
933 | ||
934 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
935 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
936 | return GEN_INT (k[i]); | |
937 | } | |
938 | #else /* no REAL_ARITHMETIC */ | |
23b2ce53 | 939 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 940 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
941 | || flag_pretend_float) |
942 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
943 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
944 | && GET_CODE (op) == CONST_DOUBLE) | |
7529ac93 CH |
945 | { |
946 | /* The constant is stored in the host's word-ordering, | |
947 | but we want to access it in the target's word-ordering. Some | |
948 | compilers don't like a conditional inside macro args, so we have two | |
949 | copies of the return. */ | |
2fe02d7e | 950 | #ifdef HOST_WORDS_BIG_ENDIAN |
7529ac93 CH |
951 | return GEN_INT (i == WORDS_BIG_ENDIAN |
952 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 953 | #else |
7529ac93 CH |
954 | return GEN_INT (i != WORDS_BIG_ENDIAN |
955 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 956 | #endif |
7529ac93 | 957 | } |
1632afca | 958 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
959 | |
960 | /* Single word float is a little harder, since single- and double-word | |
961 | values often do not have the same high-order bits. We have already | |
962 | verified that we want the only defined word of the single-word value. */ | |
1632afca RS |
963 | #ifdef REAL_ARITHMETIC |
964 | if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
965 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
966 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
967 | && GET_CODE (op) == CONST_DOUBLE) | |
968 | { | |
969 | HOST_WIDE_INT l; | |
970 | REAL_VALUE_TYPE rv; | |
971 | ||
972 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
973 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
974 | return GEN_INT (l); | |
975 | } | |
976 | #else | |
23b2ce53 | 977 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 978 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
979 | || flag_pretend_float) |
980 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
981 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
982 | && GET_CODE (op) == CONST_DOUBLE) | |
983 | { | |
984 | double d; | |
906c4e36 | 985 | union {float f; HOST_WIDE_INT i; } u; |
23b2ce53 RS |
986 | |
987 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
988 | ||
989 | u.f = d; | |
906c4e36 | 990 | return GEN_INT (u.i); |
23b2ce53 | 991 | } |
1632afca | 992 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
993 | |
994 | /* The only remaining cases that we can handle are integers. | |
995 | Convert to proper endianness now since these cases need it. | |
996 | At this point, i == 0 means the low-order word. | |
997 | ||
998 | Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT. | |
999 | This is because if it were greater, it could only have been two | |
1000 | times greater since we do not support making wider constants. In | |
1001 | that case, it MODE would have already been the proper size and | |
1002 | it would have been handled above. This means we do not have to | |
1003 | worry about the case where we would be returning a CONST_DOUBLE. */ | |
1004 | ||
1005 | if (GET_MODE_CLASS (mode) != MODE_INT | |
1006 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)) | |
1007 | return 0; | |
1008 | ||
1009 | if (WORDS_BIG_ENDIAN) | |
1010 | i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; | |
1011 | ||
1012 | /* Find out which word on the host machine this value is in and get | |
1013 | it from the constant. */ | |
1014 | val = (i / size_ratio == 0 | |
1015 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) | |
1016 | : (GET_CODE (op) == CONST_INT | |
1017 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1018 | ||
1019 | /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ | |
906c4e36 | 1020 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
23b2ce53 | 1021 | val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) |
906c4e36 RK |
1022 | & (((HOST_WIDE_INT) 1 |
1023 | << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); | |
23b2ce53 | 1024 | |
906c4e36 | 1025 | return GEN_INT (val); |
23b2ce53 RS |
1026 | } |
1027 | ||
1028 | /* Similar to `operand_subword', but never return 0. If we can't extract | |
1029 | the required subword, put OP into a register and try again. If that fails, | |
1030 | abort. We always validate the address in this case. It is not valid | |
1031 | to call this function after reload; it is mostly meant for RTL | |
1032 | generation. | |
1033 | ||
1034 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1035 | ||
1036 | rtx | |
1037 | operand_subword_force (op, i, mode) | |
1038 | rtx op; | |
1039 | int i; | |
1040 | enum machine_mode mode; | |
1041 | { | |
1042 | rtx result = operand_subword (op, i, 1, mode); | |
1043 | ||
1044 | if (result) | |
1045 | return result; | |
1046 | ||
1047 | if (mode != BLKmode && mode != VOIDmode) | |
1048 | op = force_reg (mode, op); | |
1049 | ||
1050 | result = operand_subword (op, i, 1, mode); | |
1051 | if (result == 0) | |
1052 | abort (); | |
1053 | ||
1054 | return result; | |
1055 | } | |
1056 | \f | |
1057 | /* Given a compare instruction, swap the operands. | |
1058 | A test instruction is changed into a compare of 0 against the operand. */ | |
1059 | ||
1060 | void | |
1061 | reverse_comparison (insn) | |
1062 | rtx insn; | |
1063 | { | |
1064 | rtx body = PATTERN (insn); | |
1065 | rtx comp; | |
1066 | ||
1067 | if (GET_CODE (body) == SET) | |
1068 | comp = SET_SRC (body); | |
1069 | else | |
1070 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1071 | ||
1072 | if (GET_CODE (comp) == COMPARE) | |
1073 | { | |
1074 | rtx op0 = XEXP (comp, 0); | |
1075 | rtx op1 = XEXP (comp, 1); | |
1076 | XEXP (comp, 0) = op1; | |
1077 | XEXP (comp, 1) = op0; | |
1078 | } | |
1079 | else | |
1080 | { | |
1081 | rtx new = gen_rtx (COMPARE, VOIDmode, | |
1082 | CONST0_RTX (GET_MODE (comp)), comp); | |
1083 | if (GET_CODE (body) == SET) | |
1084 | SET_SRC (body) = new; | |
1085 | else | |
1086 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1087 | } | |
1088 | } | |
1089 | \f | |
1090 | /* Return a memory reference like MEMREF, but with its mode changed | |
1091 | to MODE and its address changed to ADDR. | |
1092 | (VOIDmode means don't change the mode. | |
1093 | NULL for ADDR means don't change the address.) */ | |
1094 | ||
1095 | rtx | |
1096 | change_address (memref, mode, addr) | |
1097 | rtx memref; | |
1098 | enum machine_mode mode; | |
1099 | rtx addr; | |
1100 | { | |
1101 | rtx new; | |
1102 | ||
1103 | if (GET_CODE (memref) != MEM) | |
1104 | abort (); | |
1105 | if (mode == VOIDmode) | |
1106 | mode = GET_MODE (memref); | |
1107 | if (addr == 0) | |
1108 | addr = XEXP (memref, 0); | |
1109 | ||
1110 | /* If reload is in progress or has completed, ADDR must be valid. | |
1111 | Otherwise, we can call memory_address to make it valid. */ | |
1112 | if (reload_completed || reload_in_progress) | |
1113 | { | |
1114 | if (! memory_address_p (mode, addr)) | |
1115 | abort (); | |
1116 | } | |
1117 | else | |
1118 | addr = memory_address (mode, addr); | |
1119 | ||
1120 | new = gen_rtx (MEM, mode, addr); | |
1121 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); | |
1122 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); | |
1123 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); | |
1124 | return new; | |
1125 | } | |
1126 | \f | |
1127 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
1128 | ||
1129 | rtx | |
1130 | gen_label_rtx () | |
1131 | { | |
906c4e36 RK |
1132 | register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, |
1133 | label_num++, NULL_PTR); | |
23b2ce53 RS |
1134 | LABEL_NUSES (label) = 0; |
1135 | return label; | |
1136 | } | |
1137 | \f | |
1138 | /* For procedure integration. */ | |
1139 | ||
1140 | /* Return a newly created INLINE_HEADER rtx. Should allocate this | |
1141 | from a permanent obstack when the opportunity arises. */ | |
1142 | ||
1143 | rtx | |
1144 | gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, | |
1145 | last_labelno, max_parm_regnum, max_regnum, args_size, | |
1146 | pops_args, stack_slots, function_flags, | |
1147 | outgoing_args_size, original_arg_vector, | |
1148 | original_decl_initial) | |
1149 | rtx first_insn, first_parm_insn; | |
1150 | int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; | |
1151 | int pops_args; | |
1152 | rtx stack_slots; | |
1153 | int function_flags; | |
1154 | int outgoing_args_size; | |
1155 | rtvec original_arg_vector; | |
1156 | rtx original_decl_initial; | |
1157 | { | |
1158 | rtx header = gen_rtx (INLINE_HEADER, VOIDmode, | |
906c4e36 | 1159 | cur_insn_uid++, NULL_RTX, |
23b2ce53 RS |
1160 | first_insn, first_parm_insn, |
1161 | first_labelno, last_labelno, | |
1162 | max_parm_regnum, max_regnum, args_size, pops_args, | |
1163 | stack_slots, function_flags, outgoing_args_size, | |
1164 | original_arg_vector, original_decl_initial); | |
1165 | return header; | |
1166 | } | |
1167 | ||
1168 | /* Install new pointers to the first and last insns in the chain. | |
1169 | Used for an inline-procedure after copying the insn chain. */ | |
1170 | ||
1171 | void | |
1172 | set_new_first_and_last_insn (first, last) | |
1173 | rtx first, last; | |
1174 | { | |
1175 | first_insn = first; | |
1176 | last_insn = last; | |
1177 | } | |
1178 | ||
1179 | /* Set the range of label numbers found in the current function. | |
1180 | This is used when belatedly compiling an inline function. */ | |
1181 | ||
1182 | void | |
1183 | set_new_first_and_last_label_num (first, last) | |
1184 | int first, last; | |
1185 | { | |
1186 | base_label_num = label_num; | |
1187 | first_label_num = first; | |
1188 | last_label_num = last; | |
1189 | } | |
1190 | \f | |
1191 | /* Save all variables describing the current status into the structure *P. | |
1192 | This is used before starting a nested function. */ | |
1193 | ||
1194 | void | |
1195 | save_emit_status (p) | |
1196 | struct function *p; | |
1197 | { | |
1198 | p->reg_rtx_no = reg_rtx_no; | |
1199 | p->first_label_num = first_label_num; | |
1200 | p->first_insn = first_insn; | |
1201 | p->last_insn = last_insn; | |
1202 | p->sequence_stack = sequence_stack; | |
1203 | p->cur_insn_uid = cur_insn_uid; | |
1204 | p->last_linenum = last_linenum; | |
1205 | p->last_filename = last_filename; | |
1206 | p->regno_pointer_flag = regno_pointer_flag; | |
1207 | p->regno_pointer_flag_length = regno_pointer_flag_length; | |
1208 | p->regno_reg_rtx = regno_reg_rtx; | |
1209 | } | |
1210 | ||
1211 | /* Restore all variables describing the current status from the structure *P. | |
1212 | This is used after a nested function. */ | |
1213 | ||
1214 | void | |
1215 | restore_emit_status (p) | |
1216 | struct function *p; | |
1217 | { | |
1218 | int i; | |
1219 | ||
1220 | reg_rtx_no = p->reg_rtx_no; | |
1221 | first_label_num = p->first_label_num; | |
1222 | first_insn = p->first_insn; | |
1223 | last_insn = p->last_insn; | |
1224 | sequence_stack = p->sequence_stack; | |
1225 | cur_insn_uid = p->cur_insn_uid; | |
1226 | last_linenum = p->last_linenum; | |
1227 | last_filename = p->last_filename; | |
1228 | regno_pointer_flag = p->regno_pointer_flag; | |
1229 | regno_pointer_flag_length = p->regno_pointer_flag_length; | |
1230 | regno_reg_rtx = p->regno_reg_rtx; | |
1231 | ||
1232 | /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */ | |
1233 | sequence_element_free_list = 0; | |
1234 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
1235 | sequence_result[i] = 0; | |
1236 | } | |
1237 | \f | |
1238 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
1239 | It does not work to do this twice, because the mark bits set here | |
1240 | are not cleared afterwards. */ | |
1241 | ||
1242 | void | |
1243 | unshare_all_rtl (insn) | |
1244 | register rtx insn; | |
1245 | { | |
1246 | for (; insn; insn = NEXT_INSN (insn)) | |
1247 | if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN | |
1248 | || GET_CODE (insn) == CALL_INSN) | |
1249 | { | |
1250 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
1251 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
1252 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
1253 | } | |
1254 | ||
1255 | /* Make sure the addresses of stack slots found outside the insn chain | |
1256 | (such as, in DECL_RTL of a variable) are not shared | |
1257 | with the insn chain. | |
1258 | ||
1259 | This special care is necessary when the stack slot MEM does not | |
1260 | actually appear in the insn chain. If it does appear, its address | |
1261 | is unshared from all else at that point. */ | |
1262 | ||
1263 | copy_rtx_if_shared (stack_slot_list); | |
1264 | } | |
1265 | ||
1266 | /* Mark ORIG as in use, and return a copy of it if it was already in use. | |
1267 | Recursively does the same for subexpressions. */ | |
1268 | ||
1269 | rtx | |
1270 | copy_rtx_if_shared (orig) | |
1271 | rtx orig; | |
1272 | { | |
1273 | register rtx x = orig; | |
1274 | register int i; | |
1275 | register enum rtx_code code; | |
1276 | register char *format_ptr; | |
1277 | int copied = 0; | |
1278 | ||
1279 | if (x == 0) | |
1280 | return 0; | |
1281 | ||
1282 | code = GET_CODE (x); | |
1283 | ||
1284 | /* These types may be freely shared. */ | |
1285 | ||
1286 | switch (code) | |
1287 | { | |
1288 | case REG: | |
1289 | case QUEUED: | |
1290 | case CONST_INT: | |
1291 | case CONST_DOUBLE: | |
1292 | case SYMBOL_REF: | |
1293 | case CODE_LABEL: | |
1294 | case PC: | |
1295 | case CC0: | |
1296 | case SCRATCH: | |
1297 | /* SCRATCH must be shared because they represent distinct values. */ | |
1298 | return x; | |
1299 | ||
b851ea09 RK |
1300 | case CONST: |
1301 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
1302 | a LABEL_REF, it isn't sharable. */ | |
1303 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1304 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1305 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
1306 | return x; | |
1307 | break; | |
1308 | ||
23b2ce53 RS |
1309 | case INSN: |
1310 | case JUMP_INSN: | |
1311 | case CALL_INSN: | |
1312 | case NOTE: | |
1313 | case LABEL_REF: | |
1314 | case BARRIER: | |
1315 | /* The chain of insns is not being copied. */ | |
1316 | return x; | |
1317 | ||
1318 | case MEM: | |
1319 | /* A MEM is allowed to be shared if its address is constant | |
1320 | or is a constant plus one of the special registers. */ | |
1321 | if (CONSTANT_ADDRESS_P (XEXP (x, 0)) | |
1322 | || XEXP (x, 0) == virtual_stack_vars_rtx | |
1323 | || XEXP (x, 0) == virtual_incoming_args_rtx) | |
1324 | return x; | |
1325 | ||
1326 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1327 | && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx | |
1328 | || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) | |
1329 | && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) | |
1330 | { | |
1331 | /* This MEM can appear in more than one place, | |
1332 | but its address better not be shared with anything else. */ | |
1333 | if (! x->used) | |
1334 | XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); | |
1335 | x->used = 1; | |
1336 | return x; | |
1337 | } | |
1338 | } | |
1339 | ||
1340 | /* This rtx may not be shared. If it has already been seen, | |
1341 | replace it with a copy of itself. */ | |
1342 | ||
1343 | if (x->used) | |
1344 | { | |
1345 | register rtx copy; | |
1346 | ||
1347 | copy = rtx_alloc (code); | |
1348 | bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld) | |
1349 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
1350 | x = copy; | |
1351 | copied = 1; | |
1352 | } | |
1353 | x->used = 1; | |
1354 | ||
1355 | /* Now scan the subexpressions recursively. | |
1356 | We can store any replaced subexpressions directly into X | |
1357 | since we know X is not shared! Any vectors in X | |
1358 | must be copied if X was copied. */ | |
1359 | ||
1360 | format_ptr = GET_RTX_FORMAT (code); | |
1361 | ||
1362 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1363 | { | |
1364 | switch (*format_ptr++) | |
1365 | { | |
1366 | case 'e': | |
1367 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
1368 | break; | |
1369 | ||
1370 | case 'E': | |
1371 | if (XVEC (x, i) != NULL) | |
1372 | { | |
1373 | register int j; | |
1374 | ||
1375 | if (copied) | |
1376 | XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0)); | |
1377 | for (j = 0; j < XVECLEN (x, i); j++) | |
1378 | XVECEXP (x, i, j) | |
1379 | = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
1380 | } | |
1381 | break; | |
1382 | } | |
1383 | } | |
1384 | return x; | |
1385 | } | |
1386 | ||
1387 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
1388 | to look for shared sub-parts. */ | |
1389 | ||
1390 | void | |
1391 | reset_used_flags (x) | |
1392 | rtx x; | |
1393 | { | |
1394 | register int i, j; | |
1395 | register enum rtx_code code; | |
1396 | register char *format_ptr; | |
1397 | int copied = 0; | |
1398 | ||
1399 | if (x == 0) | |
1400 | return; | |
1401 | ||
1402 | code = GET_CODE (x); | |
1403 | ||
1404 | /* These types may be freely shared so we needn't do any reseting | |
1405 | for them. */ | |
1406 | ||
1407 | switch (code) | |
1408 | { | |
1409 | case REG: | |
1410 | case QUEUED: | |
1411 | case CONST_INT: | |
1412 | case CONST_DOUBLE: | |
1413 | case SYMBOL_REF: | |
1414 | case CODE_LABEL: | |
1415 | case PC: | |
1416 | case CC0: | |
1417 | return; | |
1418 | ||
1419 | case INSN: | |
1420 | case JUMP_INSN: | |
1421 | case CALL_INSN: | |
1422 | case NOTE: | |
1423 | case LABEL_REF: | |
1424 | case BARRIER: | |
1425 | /* The chain of insns is not being copied. */ | |
1426 | return; | |
1427 | } | |
1428 | ||
1429 | x->used = 0; | |
1430 | ||
1431 | format_ptr = GET_RTX_FORMAT (code); | |
1432 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1433 | { | |
1434 | switch (*format_ptr++) | |
1435 | { | |
1436 | case 'e': | |
1437 | reset_used_flags (XEXP (x, i)); | |
1438 | break; | |
1439 | ||
1440 | case 'E': | |
1441 | for (j = 0; j < XVECLEN (x, i); j++) | |
1442 | reset_used_flags (XVECEXP (x, i, j)); | |
1443 | break; | |
1444 | } | |
1445 | } | |
1446 | } | |
1447 | \f | |
1448 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
1449 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
1450 | OTHER must be valid as a SET_DEST. */ | |
1451 | ||
1452 | rtx | |
1453 | make_safe_from (x, other) | |
1454 | rtx x, other; | |
1455 | { | |
1456 | while (1) | |
1457 | switch (GET_CODE (other)) | |
1458 | { | |
1459 | case SUBREG: | |
1460 | other = SUBREG_REG (other); | |
1461 | break; | |
1462 | case STRICT_LOW_PART: | |
1463 | case SIGN_EXTEND: | |
1464 | case ZERO_EXTEND: | |
1465 | other = XEXP (other, 0); | |
1466 | break; | |
1467 | default: | |
1468 | goto done; | |
1469 | } | |
1470 | done: | |
1471 | if ((GET_CODE (other) == MEM | |
1472 | && ! CONSTANT_P (x) | |
1473 | && GET_CODE (x) != REG | |
1474 | && GET_CODE (x) != SUBREG) | |
1475 | || (GET_CODE (other) == REG | |
1476 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
1477 | || reg_mentioned_p (other, x)))) | |
1478 | { | |
1479 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
1480 | emit_move_insn (temp, x); | |
1481 | return temp; | |
1482 | } | |
1483 | return x; | |
1484 | } | |
1485 | \f | |
1486 | /* Emission of insns (adding them to the doubly-linked list). */ | |
1487 | ||
1488 | /* Return the first insn of the current sequence or current function. */ | |
1489 | ||
1490 | rtx | |
1491 | get_insns () | |
1492 | { | |
1493 | return first_insn; | |
1494 | } | |
1495 | ||
1496 | /* Return the last insn emitted in current sequence or current function. */ | |
1497 | ||
1498 | rtx | |
1499 | get_last_insn () | |
1500 | { | |
1501 | return last_insn; | |
1502 | } | |
1503 | ||
1504 | /* Specify a new insn as the last in the chain. */ | |
1505 | ||
1506 | void | |
1507 | set_last_insn (insn) | |
1508 | rtx insn; | |
1509 | { | |
1510 | if (NEXT_INSN (insn) != 0) | |
1511 | abort (); | |
1512 | last_insn = insn; | |
1513 | } | |
1514 | ||
1515 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
1516 | ||
1517 | rtx | |
1518 | get_last_insn_anywhere () | |
1519 | { | |
1520 | struct sequence_stack *stack; | |
1521 | if (last_insn) | |
1522 | return last_insn; | |
1523 | for (stack = sequence_stack; stack; stack = stack->next) | |
1524 | if (stack->last != 0) | |
1525 | return stack->last; | |
1526 | return 0; | |
1527 | } | |
1528 | ||
1529 | /* Return a number larger than any instruction's uid in this function. */ | |
1530 | ||
1531 | int | |
1532 | get_max_uid () | |
1533 | { | |
1534 | return cur_insn_uid; | |
1535 | } | |
1536 | \f | |
1537 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
1538 | of the sequence. */ | |
1539 | ||
1540 | rtx | |
1541 | next_insn (insn) | |
1542 | rtx insn; | |
1543 | { | |
1544 | if (insn) | |
1545 | { | |
1546 | insn = NEXT_INSN (insn); | |
1547 | if (insn && GET_CODE (insn) == INSN | |
1548 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1549 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1550 | } | |
1551 | ||
1552 | return insn; | |
1553 | } | |
1554 | ||
1555 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
1556 | of the sequence. */ | |
1557 | ||
1558 | rtx | |
1559 | previous_insn (insn) | |
1560 | rtx insn; | |
1561 | { | |
1562 | if (insn) | |
1563 | { | |
1564 | insn = PREV_INSN (insn); | |
1565 | if (insn && GET_CODE (insn) == INSN | |
1566 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1567 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
1568 | } | |
1569 | ||
1570 | return insn; | |
1571 | } | |
1572 | ||
1573 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
1574 | look inside SEQUENCEs. */ | |
1575 | ||
1576 | rtx | |
1577 | next_nonnote_insn (insn) | |
1578 | rtx insn; | |
1579 | { | |
1580 | while (insn) | |
1581 | { | |
1582 | insn = NEXT_INSN (insn); | |
1583 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1584 | break; | |
1585 | } | |
1586 | ||
1587 | return insn; | |
1588 | } | |
1589 | ||
1590 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
1591 | not look inside SEQUENCEs. */ | |
1592 | ||
1593 | rtx | |
1594 | prev_nonnote_insn (insn) | |
1595 | rtx insn; | |
1596 | { | |
1597 | while (insn) | |
1598 | { | |
1599 | insn = PREV_INSN (insn); | |
1600 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1601 | break; | |
1602 | } | |
1603 | ||
1604 | return insn; | |
1605 | } | |
1606 | ||
1607 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
1608 | or 0, if there is none. This routine does not look inside | |
1609 | SEQUENCEs. */ | |
1610 | ||
1611 | rtx | |
1612 | next_real_insn (insn) | |
1613 | rtx insn; | |
1614 | { | |
1615 | while (insn) | |
1616 | { | |
1617 | insn = NEXT_INSN (insn); | |
1618 | if (insn == 0 || GET_CODE (insn) == INSN | |
1619 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
1620 | break; | |
1621 | } | |
1622 | ||
1623 | return insn; | |
1624 | } | |
1625 | ||
1626 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
1627 | or 0, if there is none. This routine does not look inside | |
1628 | SEQUENCEs. */ | |
1629 | ||
1630 | rtx | |
1631 | prev_real_insn (insn) | |
1632 | rtx insn; | |
1633 | { | |
1634 | while (insn) | |
1635 | { | |
1636 | insn = PREV_INSN (insn); | |
1637 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
1638 | || GET_CODE (insn) == JUMP_INSN) | |
1639 | break; | |
1640 | } | |
1641 | ||
1642 | return insn; | |
1643 | } | |
1644 | ||
1645 | /* Find the next insn after INSN that really does something. This routine | |
1646 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1647 | same as next_real_insn. */ | |
1648 | ||
1649 | rtx | |
1650 | next_active_insn (insn) | |
1651 | rtx insn; | |
1652 | { | |
1653 | while (insn) | |
1654 | { | |
1655 | insn = NEXT_INSN (insn); | |
1656 | if (insn == 0 | |
1657 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1658 | || (GET_CODE (insn) == INSN | |
1659 | && (! reload_completed | |
1660 | || (GET_CODE (PATTERN (insn)) != USE | |
1661 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
1662 | break; | |
1663 | } | |
1664 | ||
1665 | return insn; | |
1666 | } | |
1667 | ||
1668 | /* Find the last insn before INSN that really does something. This routine | |
1669 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1670 | same as prev_real_insn. */ | |
1671 | ||
1672 | rtx | |
1673 | prev_active_insn (insn) | |
1674 | rtx insn; | |
1675 | { | |
1676 | while (insn) | |
1677 | { | |
1678 | insn = PREV_INSN (insn); | |
1679 | if (insn == 0 | |
1680 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1681 | || (GET_CODE (insn) == INSN | |
1682 | && (! reload_completed | |
1683 | || (GET_CODE (PATTERN (insn)) != USE | |
1684 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
1685 | break; | |
1686 | } | |
1687 | ||
1688 | return insn; | |
1689 | } | |
1690 | ||
1691 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
1692 | ||
1693 | rtx | |
1694 | next_label (insn) | |
1695 | rtx insn; | |
1696 | { | |
1697 | while (insn) | |
1698 | { | |
1699 | insn = NEXT_INSN (insn); | |
1700 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
1701 | break; | |
1702 | } | |
1703 | ||
1704 | return insn; | |
1705 | } | |
1706 | ||
1707 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
1708 | ||
1709 | rtx | |
1710 | prev_label (insn) | |
1711 | rtx insn; | |
1712 | { | |
1713 | while (insn) | |
1714 | { | |
1715 | insn = PREV_INSN (insn); | |
1716 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
1717 | break; | |
1718 | } | |
1719 | ||
1720 | return insn; | |
1721 | } | |
1722 | \f | |
1723 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
1724 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
1725 | and REG_CC_USER notes so we can find it. */ | |
1726 | ||
1727 | void | |
1728 | link_cc0_insns (insn) | |
1729 | rtx insn; | |
1730 | { | |
1731 | rtx user = next_nonnote_insn (insn); | |
1732 | ||
1733 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
1734 | user = XVECEXP (PATTERN (user), 0, 0); | |
1735 | ||
1736 | REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn, | |
1737 | REG_NOTES (user)); | |
1738 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn)); | |
1739 | } | |
1740 | ||
23b2ce53 RS |
1741 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
1742 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
1743 | applied to the result of this function should yield INSN). | |
1744 | ||
1745 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
1746 | is present, it contains the insn that uses CC0. | |
1747 | ||
1748 | Return 0 if we can't find the insn. */ | |
1749 | ||
1750 | rtx | |
1751 | next_cc0_user (insn) | |
1752 | rtx insn; | |
1753 | { | |
906c4e36 | 1754 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
1755 | |
1756 | if (note) | |
1757 | return XEXP (note, 0); | |
1758 | ||
1759 | insn = next_nonnote_insn (insn); | |
1760 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1761 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1762 | ||
1763 | if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
1764 | && reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
1765 | return insn; | |
1766 | ||
1767 | return 0; | |
1768 | } | |
1769 | ||
1770 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
1771 | note, it is the previous insn. */ | |
1772 | ||
1773 | rtx | |
1774 | prev_cc0_setter (insn) | |
1775 | rtx insn; | |
1776 | { | |
906c4e36 | 1777 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
1778 | rtx link; |
1779 | ||
1780 | if (note) | |
1781 | return XEXP (note, 0); | |
1782 | ||
1783 | insn = prev_nonnote_insn (insn); | |
1784 | if (! sets_cc0_p (PATTERN (insn))) | |
1785 | abort (); | |
1786 | ||
1787 | return insn; | |
1788 | } | |
1789 | #endif | |
1790 | \f | |
1791 | /* Try splitting insns that can be split for better scheduling. | |
1792 | PAT is the pattern which might split. | |
1793 | TRIAL is the insn providing PAT. | |
1794 | BACKWARDS is non-zero if we are scanning insns from last to first. | |
1795 | ||
1796 | If this routine succeeds in splitting, it returns the first or last | |
1797 | replacement insn depending on the value of BACKWARDS. Otherwise, it | |
1798 | returns TRIAL. If the insn to be returned can be split, it will be. */ | |
1799 | ||
1800 | rtx | |
1801 | try_split (pat, trial, backwards) | |
1802 | rtx pat, trial; | |
1803 | int backwards; | |
1804 | { | |
1805 | rtx before = PREV_INSN (trial); | |
1806 | rtx after = NEXT_INSN (trial); | |
1807 | rtx seq = split_insns (pat, trial); | |
1808 | int has_barrier = 0; | |
1809 | rtx tem; | |
1810 | ||
1811 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
1812 | We may need to handle this specially. */ | |
1813 | if (after && GET_CODE (after) == BARRIER) | |
1814 | { | |
1815 | has_barrier = 1; | |
1816 | after = NEXT_INSN (after); | |
1817 | } | |
1818 | ||
1819 | if (seq) | |
1820 | { | |
1821 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
1822 | The latter case will normally arise only when being done so that | |
1823 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
1824 | if (GET_CODE (seq) == SEQUENCE) | |
1825 | { | |
1826 | /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in | |
1827 | SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, | |
1828 | increment the usage count so we don't delete the label. */ | |
1829 | int i; | |
1830 | ||
1831 | if (GET_CODE (trial) == JUMP_INSN) | |
1832 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
1833 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
1834 | { | |
1835 | JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); | |
1836 | ||
1837 | if (JUMP_LABEL (trial)) | |
1838 | LABEL_NUSES (JUMP_LABEL (trial))++; | |
1839 | } | |
1840 | ||
1841 | tem = emit_insn_after (seq, before); | |
1842 | ||
1843 | delete_insn (trial); | |
1844 | if (has_barrier) | |
1845 | emit_barrier_after (tem); | |
1846 | } | |
1847 | /* Avoid infinite loop if the result matches the original pattern. */ | |
1848 | else if (rtx_equal_p (seq, pat)) | |
1849 | return trial; | |
1850 | else | |
1851 | { | |
1852 | PATTERN (trial) = seq; | |
1853 | INSN_CODE (trial) = -1; | |
1854 | } | |
1855 | ||
1856 | /* Set TEM to the insn we should return. */ | |
1857 | tem = backwards ? prev_active_insn (after) : next_active_insn (before); | |
1858 | return try_split (PATTERN (tem), tem, backwards); | |
1859 | } | |
1860 | ||
1861 | return trial; | |
1862 | } | |
1863 | \f | |
1864 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 1865 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
1866 | |
1867 | rtx | |
4b1f5e8c | 1868 | make_insn_raw (pattern) |
23b2ce53 | 1869 | rtx pattern; |
23b2ce53 RS |
1870 | { |
1871 | register rtx insn; | |
1872 | ||
1632afca RS |
1873 | insn = rtx_alloc (INSN); |
1874 | INSN_UID (insn) = cur_insn_uid++; | |
23b2ce53 RS |
1875 | |
1876 | PATTERN (insn) = pattern; | |
1877 | INSN_CODE (insn) = -1; | |
1632afca RS |
1878 | LOG_LINKS (insn) = NULL; |
1879 | REG_NOTES (insn) = NULL; | |
23b2ce53 RS |
1880 | |
1881 | return insn; | |
1882 | } | |
1883 | ||
1884 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
1885 | ||
1886 | static rtx | |
4b1f5e8c | 1887 | make_jump_insn_raw (pattern) |
23b2ce53 | 1888 | rtx pattern; |
23b2ce53 RS |
1889 | { |
1890 | register rtx insn; | |
1891 | ||
4b1f5e8c | 1892 | insn = rtx_alloc (JUMP_INSN); |
1632afca | 1893 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
1894 | |
1895 | PATTERN (insn) = pattern; | |
1896 | INSN_CODE (insn) = -1; | |
1632afca RS |
1897 | LOG_LINKS (insn) = NULL; |
1898 | REG_NOTES (insn) = NULL; | |
1899 | JUMP_LABEL (insn) = NULL; | |
23b2ce53 RS |
1900 | |
1901 | return insn; | |
1902 | } | |
1903 | \f | |
1904 | /* Add INSN to the end of the doubly-linked list. | |
1905 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
1906 | ||
1907 | void | |
1908 | add_insn (insn) | |
1909 | register rtx insn; | |
1910 | { | |
1911 | PREV_INSN (insn) = last_insn; | |
1912 | NEXT_INSN (insn) = 0; | |
1913 | ||
1914 | if (NULL != last_insn) | |
1915 | NEXT_INSN (last_insn) = insn; | |
1916 | ||
1917 | if (NULL == first_insn) | |
1918 | first_insn = insn; | |
1919 | ||
1920 | last_insn = insn; | |
1921 | } | |
1922 | ||
1923 | /* Add INSN into the doubly-linked list after insn AFTER. This should be the | |
1924 | only function called to insert an insn once delay slots have been filled | |
1925 | since only it knows how to update a SEQUENCE. */ | |
1926 | ||
1927 | void | |
1928 | add_insn_after (insn, after) | |
1929 | rtx insn, after; | |
1930 | { | |
1931 | rtx next = NEXT_INSN (after); | |
1932 | ||
1933 | NEXT_INSN (insn) = next; | |
1934 | PREV_INSN (insn) = after; | |
1935 | ||
1936 | if (next) | |
1937 | { | |
1938 | PREV_INSN (next) = insn; | |
1939 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
1940 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
1941 | } | |
1942 | else if (last_insn == after) | |
1943 | last_insn = insn; | |
1944 | else | |
1945 | { | |
1946 | struct sequence_stack *stack = sequence_stack; | |
1947 | /* Scan all pending sequences too. */ | |
1948 | for (; stack; stack = stack->next) | |
1949 | if (after == stack->last) | |
1950 | stack->last = insn; | |
1951 | } | |
1952 | ||
1953 | NEXT_INSN (after) = insn; | |
1954 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
1955 | { | |
1956 | rtx sequence = PATTERN (after); | |
1957 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
1958 | } | |
1959 | } | |
1960 | ||
1961 | /* Delete all insns made since FROM. | |
1962 | FROM becomes the new last instruction. */ | |
1963 | ||
1964 | void | |
1965 | delete_insns_since (from) | |
1966 | rtx from; | |
1967 | { | |
1968 | if (from == 0) | |
1969 | first_insn = 0; | |
1970 | else | |
1971 | NEXT_INSN (from) = 0; | |
1972 | last_insn = from; | |
1973 | } | |
1974 | ||
1975 | /* Move a consecutive bunch of insns to a different place in the chain. | |
1976 | The insns to be moved are those between FROM and TO. | |
1977 | They are moved to a new position after the insn AFTER. | |
1978 | AFTER must not be FROM or TO or any insn in between. | |
1979 | ||
1980 | This function does not know about SEQUENCEs and hence should not be | |
1981 | called after delay-slot filling has been done. */ | |
1982 | ||
1983 | void | |
1984 | reorder_insns (from, to, after) | |
1985 | rtx from, to, after; | |
1986 | { | |
1987 | /* Splice this bunch out of where it is now. */ | |
1988 | if (PREV_INSN (from)) | |
1989 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
1990 | if (NEXT_INSN (to)) | |
1991 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
1992 | if (last_insn == to) | |
1993 | last_insn = PREV_INSN (from); | |
1994 | if (first_insn == from) | |
1995 | first_insn = NEXT_INSN (to); | |
1996 | ||
1997 | /* Make the new neighbors point to it and it to them. */ | |
1998 | if (NEXT_INSN (after)) | |
1999 | PREV_INSN (NEXT_INSN (after)) = to; | |
2000 | ||
2001 | NEXT_INSN (to) = NEXT_INSN (after); | |
2002 | PREV_INSN (from) = after; | |
2003 | NEXT_INSN (after) = from; | |
2004 | if (after == last_insn) | |
2005 | last_insn = to; | |
2006 | } | |
2007 | ||
2008 | /* Return the line note insn preceding INSN. */ | |
2009 | ||
2010 | static rtx | |
2011 | find_line_note (insn) | |
2012 | rtx insn; | |
2013 | { | |
2014 | if (no_line_numbers) | |
2015 | return 0; | |
2016 | ||
2017 | for (; insn; insn = PREV_INSN (insn)) | |
2018 | if (GET_CODE (insn) == NOTE | |
2019 | && NOTE_LINE_NUMBER (insn) >= 0) | |
2020 | break; | |
2021 | ||
2022 | return insn; | |
2023 | } | |
2024 | ||
2025 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
2026 | of the moved insns when debugging. This may insert a note between AFTER | |
2027 | and FROM, and another one after TO. */ | |
2028 | ||
2029 | void | |
2030 | reorder_insns_with_line_notes (from, to, after) | |
2031 | rtx from, to, after; | |
2032 | { | |
2033 | rtx from_line = find_line_note (from); | |
2034 | rtx after_line = find_line_note (after); | |
2035 | ||
2036 | reorder_insns (from, to, after); | |
2037 | ||
2038 | if (from_line == after_line) | |
2039 | return; | |
2040 | ||
2041 | if (from_line) | |
2042 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2043 | NOTE_LINE_NUMBER (from_line), | |
2044 | after); | |
2045 | if (after_line) | |
2046 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2047 | NOTE_LINE_NUMBER (after_line), | |
2048 | to); | |
2049 | } | |
2050 | \f | |
2051 | /* Emit an insn of given code and pattern | |
2052 | at a specified place within the doubly-linked list. */ | |
2053 | ||
2054 | /* Make an instruction with body PATTERN | |
2055 | and output it before the instruction BEFORE. */ | |
2056 | ||
2057 | rtx | |
2058 | emit_insn_before (pattern, before) | |
2059 | register rtx pattern, before; | |
2060 | { | |
2061 | register rtx insn = before; | |
2062 | ||
2063 | if (GET_CODE (pattern) == SEQUENCE) | |
2064 | { | |
2065 | register int i; | |
2066 | ||
2067 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2068 | { | |
2069 | insn = XVECEXP (pattern, 0, i); | |
2070 | add_insn_after (insn, PREV_INSN (before)); | |
2071 | } | |
2072 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2073 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2074 | } | |
2075 | else | |
2076 | { | |
4b1f5e8c | 2077 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2078 | add_insn_after (insn, PREV_INSN (before)); |
2079 | } | |
2080 | ||
2081 | return insn; | |
2082 | } | |
2083 | ||
2084 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
2085 | and output it before the instruction BEFORE. */ | |
2086 | ||
2087 | rtx | |
2088 | emit_jump_insn_before (pattern, before) | |
2089 | register rtx pattern, before; | |
2090 | { | |
2091 | register rtx insn; | |
2092 | ||
2093 | if (GET_CODE (pattern) == SEQUENCE) | |
2094 | insn = emit_insn_before (pattern, before); | |
2095 | else | |
2096 | { | |
85cf32bc | 2097 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2098 | add_insn_after (insn, PREV_INSN (before)); |
2099 | } | |
2100 | ||
2101 | return insn; | |
2102 | } | |
2103 | ||
2104 | /* Make an instruction with body PATTERN and code CALL_INSN | |
2105 | and output it before the instruction BEFORE. */ | |
2106 | ||
2107 | rtx | |
2108 | emit_call_insn_before (pattern, before) | |
2109 | register rtx pattern, before; | |
2110 | { | |
2111 | rtx insn = emit_insn_before (pattern, before); | |
2112 | PUT_CODE (insn, CALL_INSN); | |
2113 | return insn; | |
2114 | } | |
2115 | ||
2116 | /* Make an insn of code BARRIER | |
2117 | and output it before the insn AFTER. */ | |
2118 | ||
2119 | rtx | |
2120 | emit_barrier_before (before) | |
2121 | register rtx before; | |
2122 | { | |
2123 | register rtx insn = rtx_alloc (BARRIER); | |
2124 | ||
2125 | INSN_UID (insn) = cur_insn_uid++; | |
2126 | ||
2127 | add_insn_after (insn, PREV_INSN (before)); | |
2128 | return insn; | |
2129 | } | |
2130 | ||
2131 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ | |
2132 | ||
2133 | rtx | |
2134 | emit_note_before (subtype, before) | |
2135 | int subtype; | |
2136 | rtx before; | |
2137 | { | |
2138 | register rtx note = rtx_alloc (NOTE); | |
2139 | INSN_UID (note) = cur_insn_uid++; | |
2140 | NOTE_SOURCE_FILE (note) = 0; | |
2141 | NOTE_LINE_NUMBER (note) = subtype; | |
2142 | ||
2143 | add_insn_after (note, PREV_INSN (before)); | |
2144 | return note; | |
2145 | } | |
2146 | \f | |
2147 | /* Make an insn of code INSN with body PATTERN | |
2148 | and output it after the insn AFTER. */ | |
2149 | ||
2150 | rtx | |
2151 | emit_insn_after (pattern, after) | |
2152 | register rtx pattern, after; | |
2153 | { | |
2154 | register rtx insn = after; | |
2155 | ||
2156 | if (GET_CODE (pattern) == SEQUENCE) | |
2157 | { | |
2158 | register int i; | |
2159 | ||
2160 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2161 | { | |
2162 | insn = XVECEXP (pattern, 0, i); | |
2163 | add_insn_after (insn, after); | |
2164 | after = insn; | |
2165 | } | |
2166 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2167 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2168 | } | |
2169 | else | |
2170 | { | |
4b1f5e8c | 2171 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2172 | add_insn_after (insn, after); |
2173 | } | |
2174 | ||
2175 | return insn; | |
2176 | } | |
2177 | ||
255680cf RK |
2178 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
2179 | as to act as if this insn were at FROM. */ | |
2180 | ||
2181 | void | |
2182 | emit_insn_after_with_line_notes (pattern, after, from) | |
2183 | rtx pattern, after, from; | |
2184 | { | |
2185 | rtx from_line = find_line_note (from); | |
2186 | rtx after_line = find_line_note (after); | |
2187 | rtx insn = emit_insn_after (pattern, after); | |
2188 | ||
2189 | if (from_line) | |
2190 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2191 | NOTE_LINE_NUMBER (from_line), | |
2192 | after); | |
2193 | ||
2194 | if (after_line) | |
2195 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2196 | NOTE_LINE_NUMBER (after_line), | |
2197 | insn); | |
2198 | } | |
2199 | ||
23b2ce53 RS |
2200 | /* Make an insn of code JUMP_INSN with body PATTERN |
2201 | and output it after the insn AFTER. */ | |
2202 | ||
2203 | rtx | |
2204 | emit_jump_insn_after (pattern, after) | |
2205 | register rtx pattern, after; | |
2206 | { | |
2207 | register rtx insn; | |
2208 | ||
2209 | if (GET_CODE (pattern) == SEQUENCE) | |
2210 | insn = emit_insn_after (pattern, after); | |
2211 | else | |
2212 | { | |
85cf32bc | 2213 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2214 | add_insn_after (insn, after); |
2215 | } | |
2216 | ||
2217 | return insn; | |
2218 | } | |
2219 | ||
2220 | /* Make an insn of code BARRIER | |
2221 | and output it after the insn AFTER. */ | |
2222 | ||
2223 | rtx | |
2224 | emit_barrier_after (after) | |
2225 | register rtx after; | |
2226 | { | |
2227 | register rtx insn = rtx_alloc (BARRIER); | |
2228 | ||
2229 | INSN_UID (insn) = cur_insn_uid++; | |
2230 | ||
2231 | add_insn_after (insn, after); | |
2232 | return insn; | |
2233 | } | |
2234 | ||
2235 | /* Emit the label LABEL after the insn AFTER. */ | |
2236 | ||
2237 | rtx | |
2238 | emit_label_after (label, after) | |
2239 | rtx label, after; | |
2240 | { | |
2241 | /* This can be called twice for the same label | |
2242 | as a result of the confusion that follows a syntax error! | |
2243 | So make it harmless. */ | |
2244 | if (INSN_UID (label) == 0) | |
2245 | { | |
2246 | INSN_UID (label) = cur_insn_uid++; | |
2247 | add_insn_after (label, after); | |
2248 | } | |
2249 | ||
2250 | return label; | |
2251 | } | |
2252 | ||
2253 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
2254 | ||
2255 | rtx | |
2256 | emit_note_after (subtype, after) | |
2257 | int subtype; | |
2258 | rtx after; | |
2259 | { | |
2260 | register rtx note = rtx_alloc (NOTE); | |
2261 | INSN_UID (note) = cur_insn_uid++; | |
2262 | NOTE_SOURCE_FILE (note) = 0; | |
2263 | NOTE_LINE_NUMBER (note) = subtype; | |
2264 | add_insn_after (note, after); | |
2265 | return note; | |
2266 | } | |
2267 | ||
2268 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
2269 | ||
2270 | rtx | |
2271 | emit_line_note_after (file, line, after) | |
2272 | char *file; | |
2273 | int line; | |
2274 | rtx after; | |
2275 | { | |
2276 | register rtx note; | |
2277 | ||
2278 | if (no_line_numbers && line > 0) | |
2279 | { | |
2280 | cur_insn_uid++; | |
2281 | return 0; | |
2282 | } | |
2283 | ||
2284 | note = rtx_alloc (NOTE); | |
2285 | INSN_UID (note) = cur_insn_uid++; | |
2286 | NOTE_SOURCE_FILE (note) = file; | |
2287 | NOTE_LINE_NUMBER (note) = line; | |
2288 | add_insn_after (note, after); | |
2289 | return note; | |
2290 | } | |
2291 | \f | |
2292 | /* Make an insn of code INSN with pattern PATTERN | |
2293 | and add it to the end of the doubly-linked list. | |
2294 | If PATTERN is a SEQUENCE, take the elements of it | |
2295 | and emit an insn for each element. | |
2296 | ||
2297 | Returns the last insn emitted. */ | |
2298 | ||
2299 | rtx | |
2300 | emit_insn (pattern) | |
2301 | rtx pattern; | |
2302 | { | |
2303 | rtx insn = last_insn; | |
2304 | ||
2305 | if (GET_CODE (pattern) == SEQUENCE) | |
2306 | { | |
2307 | register int i; | |
2308 | ||
2309 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2310 | { | |
2311 | insn = XVECEXP (pattern, 0, i); | |
2312 | add_insn (insn); | |
2313 | } | |
2314 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2315 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2316 | } | |
2317 | else | |
2318 | { | |
4b1f5e8c | 2319 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2320 | add_insn (insn); |
2321 | } | |
2322 | ||
2323 | return insn; | |
2324 | } | |
2325 | ||
2326 | /* Emit the insns in a chain starting with INSN. | |
2327 | Return the last insn emitted. */ | |
2328 | ||
2329 | rtx | |
2330 | emit_insns (insn) | |
2331 | rtx insn; | |
2332 | { | |
2333 | rtx last = 0; | |
2334 | ||
2335 | while (insn) | |
2336 | { | |
2337 | rtx next = NEXT_INSN (insn); | |
2338 | add_insn (insn); | |
2339 | last = insn; | |
2340 | insn = next; | |
2341 | } | |
2342 | ||
2343 | return last; | |
2344 | } | |
2345 | ||
2346 | /* Emit the insns in a chain starting with INSN and place them in front of | |
2347 | the insn BEFORE. Return the last insn emitted. */ | |
2348 | ||
2349 | rtx | |
2350 | emit_insns_before (insn, before) | |
2351 | rtx insn; | |
2352 | rtx before; | |
2353 | { | |
2354 | rtx last = 0; | |
2355 | ||
2356 | while (insn) | |
2357 | { | |
2358 | rtx next = NEXT_INSN (insn); | |
2359 | add_insn_after (insn, PREV_INSN (before)); | |
2360 | last = insn; | |
2361 | insn = next; | |
2362 | } | |
2363 | ||
2364 | return last; | |
2365 | } | |
2366 | ||
e0a5c5eb RS |
2367 | /* Emit the insns in a chain starting with FIRST and place them in back of |
2368 | the insn AFTER. Return the last insn emitted. */ | |
2369 | ||
2370 | rtx | |
2371 | emit_insns_after (first, after) | |
2372 | register rtx first; | |
2373 | register rtx after; | |
2374 | { | |
2375 | register rtx last; | |
2376 | register rtx after_after; | |
2377 | ||
2378 | if (!after) | |
2379 | abort (); | |
2380 | ||
2381 | if (!first) | |
2382 | return first; | |
2383 | ||
2384 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
2385 | continue; | |
2386 | ||
2387 | after_after = NEXT_INSN (after); | |
2388 | ||
2389 | NEXT_INSN (after) = first; | |
2390 | PREV_INSN (first) = after; | |
2391 | NEXT_INSN (last) = after_after; | |
2392 | if (after_after) | |
2393 | PREV_INSN (after_after) = last; | |
2394 | ||
c4d990db RS |
2395 | if (after == last_insn) |
2396 | last_insn = last; | |
e0a5c5eb RS |
2397 | return last; |
2398 | } | |
2399 | ||
23b2ce53 RS |
2400 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
2401 | and add it to the end of the doubly-linked list. */ | |
2402 | ||
2403 | rtx | |
2404 | emit_jump_insn (pattern) | |
2405 | rtx pattern; | |
2406 | { | |
2407 | if (GET_CODE (pattern) == SEQUENCE) | |
2408 | return emit_insn (pattern); | |
2409 | else | |
2410 | { | |
85cf32bc | 2411 | register rtx insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2412 | add_insn (insn); |
2413 | return insn; | |
2414 | } | |
2415 | } | |
2416 | ||
2417 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
2418 | and add it to the end of the doubly-linked list. */ | |
2419 | ||
2420 | rtx | |
2421 | emit_call_insn (pattern) | |
2422 | rtx pattern; | |
2423 | { | |
2424 | if (GET_CODE (pattern) == SEQUENCE) | |
2425 | return emit_insn (pattern); | |
2426 | else | |
2427 | { | |
4b1f5e8c | 2428 | register rtx insn = make_insn_raw (pattern); |
23b2ce53 RS |
2429 | add_insn (insn); |
2430 | PUT_CODE (insn, CALL_INSN); | |
2431 | return insn; | |
2432 | } | |
2433 | } | |
2434 | ||
2435 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
2436 | ||
2437 | rtx | |
2438 | emit_label (label) | |
2439 | rtx label; | |
2440 | { | |
2441 | /* This can be called twice for the same label | |
2442 | as a result of the confusion that follows a syntax error! | |
2443 | So make it harmless. */ | |
2444 | if (INSN_UID (label) == 0) | |
2445 | { | |
2446 | INSN_UID (label) = cur_insn_uid++; | |
2447 | add_insn (label); | |
2448 | } | |
2449 | return label; | |
2450 | } | |
2451 | ||
2452 | /* Make an insn of code BARRIER | |
2453 | and add it to the end of the doubly-linked list. */ | |
2454 | ||
2455 | rtx | |
2456 | emit_barrier () | |
2457 | { | |
2458 | register rtx barrier = rtx_alloc (BARRIER); | |
2459 | INSN_UID (barrier) = cur_insn_uid++; | |
2460 | add_insn (barrier); | |
2461 | return barrier; | |
2462 | } | |
2463 | ||
2464 | /* Make an insn of code NOTE | |
2465 | with data-fields specified by FILE and LINE | |
2466 | and add it to the end of the doubly-linked list, | |
2467 | but only if line-numbers are desired for debugging info. */ | |
2468 | ||
2469 | rtx | |
2470 | emit_line_note (file, line) | |
2471 | char *file; | |
2472 | int line; | |
2473 | { | |
2474 | emit_filename = file; | |
2475 | emit_lineno = line; | |
2476 | ||
2477 | #if 0 | |
2478 | if (no_line_numbers) | |
2479 | return 0; | |
2480 | #endif | |
2481 | ||
2482 | return emit_note (file, line); | |
2483 | } | |
2484 | ||
2485 | /* Make an insn of code NOTE | |
2486 | with data-fields specified by FILE and LINE | |
2487 | and add it to the end of the doubly-linked list. | |
2488 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
2489 | ||
2490 | rtx | |
2491 | emit_note (file, line) | |
2492 | char *file; | |
2493 | int line; | |
2494 | { | |
2495 | register rtx note; | |
2496 | ||
2497 | if (line > 0) | |
2498 | { | |
2499 | if (file && last_filename && !strcmp (file, last_filename) | |
2500 | && line == last_linenum) | |
2501 | return 0; | |
2502 | last_filename = file; | |
2503 | last_linenum = line; | |
2504 | } | |
2505 | ||
2506 | if (no_line_numbers && line > 0) | |
2507 | { | |
2508 | cur_insn_uid++; | |
2509 | return 0; | |
2510 | } | |
2511 | ||
2512 | note = rtx_alloc (NOTE); | |
2513 | INSN_UID (note) = cur_insn_uid++; | |
2514 | NOTE_SOURCE_FILE (note) = file; | |
2515 | NOTE_LINE_NUMBER (note) = line; | |
2516 | add_insn (note); | |
2517 | return note; | |
2518 | } | |
2519 | ||
2520 | /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ | |
2521 | ||
2522 | rtx | |
2523 | emit_line_note_force (file, line) | |
2524 | char *file; | |
2525 | int line; | |
2526 | { | |
2527 | last_linenum = -1; | |
2528 | return emit_line_note (file, line); | |
2529 | } | |
2530 | ||
2531 | /* Cause next statement to emit a line note even if the line number | |
2532 | has not changed. This is used at the beginning of a function. */ | |
2533 | ||
2534 | void | |
2535 | force_next_line_note () | |
2536 | { | |
2537 | last_linenum = -1; | |
2538 | } | |
2539 | \f | |
2540 | /* Return an indication of which type of insn should have X as a body. | |
2541 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
2542 | ||
2543 | enum rtx_code | |
2544 | classify_insn (x) | |
2545 | rtx x; | |
2546 | { | |
2547 | if (GET_CODE (x) == CODE_LABEL) | |
2548 | return CODE_LABEL; | |
2549 | if (GET_CODE (x) == CALL) | |
2550 | return CALL_INSN; | |
2551 | if (GET_CODE (x) == RETURN) | |
2552 | return JUMP_INSN; | |
2553 | if (GET_CODE (x) == SET) | |
2554 | { | |
2555 | if (SET_DEST (x) == pc_rtx) | |
2556 | return JUMP_INSN; | |
2557 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
2558 | return CALL_INSN; | |
2559 | else | |
2560 | return INSN; | |
2561 | } | |
2562 | if (GET_CODE (x) == PARALLEL) | |
2563 | { | |
2564 | register int j; | |
2565 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) | |
2566 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
2567 | return CALL_INSN; | |
2568 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
2569 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
2570 | return JUMP_INSN; | |
2571 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
2572 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
2573 | return CALL_INSN; | |
2574 | } | |
2575 | return INSN; | |
2576 | } | |
2577 | ||
2578 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
2579 | If X is a label, it is simply added into the insn chain. */ | |
2580 | ||
2581 | rtx | |
2582 | emit (x) | |
2583 | rtx x; | |
2584 | { | |
2585 | enum rtx_code code = classify_insn (x); | |
2586 | ||
2587 | if (code == CODE_LABEL) | |
2588 | return emit_label (x); | |
2589 | else if (code == INSN) | |
2590 | return emit_insn (x); | |
2591 | else if (code == JUMP_INSN) | |
2592 | { | |
2593 | register rtx insn = emit_jump_insn (x); | |
2594 | if (simplejump_p (insn) || GET_CODE (x) == RETURN) | |
2595 | return emit_barrier (); | |
2596 | return insn; | |
2597 | } | |
2598 | else if (code == CALL_INSN) | |
2599 | return emit_call_insn (x); | |
2600 | else | |
2601 | abort (); | |
2602 | } | |
2603 | \f | |
2604 | /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ | |
2605 | ||
2606 | void | |
2607 | start_sequence () | |
2608 | { | |
2609 | struct sequence_stack *tem; | |
2610 | ||
2611 | if (sequence_element_free_list) | |
2612 | { | |
2613 | /* Reuse a previously-saved struct sequence_stack. */ | |
2614 | tem = sequence_element_free_list; | |
2615 | sequence_element_free_list = tem->next; | |
2616 | } | |
2617 | else | |
2618 | tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); | |
2619 | ||
2620 | tem->next = sequence_stack; | |
2621 | tem->first = first_insn; | |
2622 | tem->last = last_insn; | |
2623 | ||
2624 | sequence_stack = tem; | |
2625 | ||
2626 | first_insn = 0; | |
2627 | last_insn = 0; | |
2628 | } | |
2629 | ||
2630 | /* Set up the insn chain starting with FIRST | |
2631 | as the current sequence, saving the previously current one. */ | |
2632 | ||
2633 | void | |
2634 | push_to_sequence (first) | |
2635 | rtx first; | |
2636 | { | |
2637 | rtx last; | |
2638 | ||
2639 | start_sequence (); | |
2640 | ||
2641 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
2642 | ||
2643 | first_insn = first; | |
2644 | last_insn = last; | |
2645 | } | |
2646 | ||
f15ae3a1 TW |
2647 | /* Set up the outer-level insn chain |
2648 | as the current sequence, saving the previously current one. */ | |
2649 | ||
2650 | void | |
2651 | push_topmost_sequence () | |
2652 | { | |
2653 | struct sequence_stack *stack, *top; | |
2654 | ||
2655 | start_sequence (); | |
2656 | ||
2657 | for (stack = sequence_stack; stack; stack = stack->next) | |
2658 | top = stack; | |
2659 | ||
2660 | first_insn = top->first; | |
2661 | last_insn = top->last; | |
2662 | } | |
2663 | ||
2664 | /* After emitting to the outer-level insn chain, update the outer-level | |
2665 | insn chain, and restore the previous saved state. */ | |
2666 | ||
2667 | void | |
2668 | pop_topmost_sequence () | |
2669 | { | |
2670 | struct sequence_stack *stack, *top; | |
2671 | ||
2672 | for (stack = sequence_stack; stack; stack = stack->next) | |
2673 | top = stack; | |
2674 | ||
2675 | top->first = first_insn; | |
2676 | top->last = last_insn; | |
2677 | ||
2678 | end_sequence (); | |
2679 | } | |
2680 | ||
23b2ce53 RS |
2681 | /* After emitting to a sequence, restore previous saved state. |
2682 | ||
2683 | To get the contents of the sequence just made, | |
2684 | you must call `gen_sequence' *before* calling here. */ | |
2685 | ||
2686 | void | |
2687 | end_sequence () | |
2688 | { | |
2689 | struct sequence_stack *tem = sequence_stack; | |
2690 | ||
2691 | first_insn = tem->first; | |
2692 | last_insn = tem->last; | |
2693 | sequence_stack = tem->next; | |
2694 | ||
2695 | tem->next = sequence_element_free_list; | |
2696 | sequence_element_free_list = tem; | |
2697 | } | |
2698 | ||
2699 | /* Return 1 if currently emitting into a sequence. */ | |
2700 | ||
2701 | int | |
2702 | in_sequence_p () | |
2703 | { | |
2704 | return sequence_stack != 0; | |
2705 | } | |
2706 | ||
2707 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
2708 | to the current sequence. | |
2709 | ||
2710 | This is how the gen_... function from a DEFINE_EXPAND | |
2711 | constructs the SEQUENCE that it returns. */ | |
2712 | ||
2713 | rtx | |
2714 | gen_sequence () | |
2715 | { | |
2716 | rtx result; | |
2717 | rtx tem; | |
2718 | rtvec newvec; | |
2719 | int i; | |
2720 | int len; | |
2721 | ||
2722 | /* Count the insns in the chain. */ | |
2723 | len = 0; | |
2724 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
2725 | len++; | |
2726 | ||
2727 | /* If only one insn, return its pattern rather than a SEQUENCE. | |
2728 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing | |
2729 | the case of an empty list.) */ | |
2730 | if (len == 1 | |
2731 | && (GET_CODE (first_insn) == INSN | |
2732 | || GET_CODE (first_insn) == JUMP_INSN | |
2733 | || GET_CODE (first_insn) == CALL_INSN)) | |
2734 | return PATTERN (first_insn); | |
2735 | ||
2736 | /* Put them in a vector. See if we already have a SEQUENCE of the | |
2737 | appropriate length around. */ | |
2738 | if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) | |
2739 | sequence_result[len] = 0; | |
2740 | else | |
2741 | { | |
2742 | /* Ensure that this rtl goes in saveable_obstack, since we may be | |
2743 | caching it. */ | |
d508ebba JW |
2744 | push_obstacks_nochange (); |
2745 | rtl_in_saveable_obstack (); | |
23b2ce53 | 2746 | result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len)); |
d508ebba | 2747 | pop_obstacks (); |
23b2ce53 RS |
2748 | } |
2749 | ||
2750 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
2751 | XVECEXP (result, 0, i) = tem; | |
2752 | ||
2753 | return result; | |
2754 | } | |
2755 | \f | |
2756 | /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag | |
2757 | according to the chain of insns starting with FIRST. | |
2758 | ||
2759 | Also set cur_insn_uid to exceed the largest uid in that chain. | |
2760 | ||
2761 | This is used when an inline function's rtl is saved | |
2762 | and passed to rest_of_compilation later. */ | |
2763 | ||
2764 | static void restore_reg_data_1 (); | |
2765 | ||
2766 | void | |
2767 | restore_reg_data (first) | |
2768 | rtx first; | |
2769 | { | |
2770 | register rtx insn; | |
2771 | int i; | |
2772 | register int max_uid = 0; | |
2773 | ||
2774 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2775 | { | |
2776 | if (INSN_UID (insn) >= max_uid) | |
2777 | max_uid = INSN_UID (insn); | |
2778 | ||
2779 | switch (GET_CODE (insn)) | |
2780 | { | |
2781 | case NOTE: | |
2782 | case CODE_LABEL: | |
2783 | case BARRIER: | |
2784 | break; | |
2785 | ||
2786 | case JUMP_INSN: | |
2787 | case CALL_INSN: | |
2788 | case INSN: | |
2789 | restore_reg_data_1 (PATTERN (insn)); | |
2790 | break; | |
2791 | } | |
2792 | } | |
2793 | ||
2794 | /* Don't duplicate the uids already in use. */ | |
2795 | cur_insn_uid = max_uid + 1; | |
2796 | ||
2797 | /* If any regs are missing, make them up. | |
2798 | ||
2799 | ??? word_mode is not necessarily the right mode. Most likely these REGs | |
2800 | are never used. At some point this should be checked. */ | |
2801 | ||
2802 | for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++) | |
2803 | if (regno_reg_rtx[i] == 0) | |
2804 | regno_reg_rtx[i] = gen_rtx (REG, word_mode, i); | |
2805 | } | |
2806 | ||
2807 | static void | |
2808 | restore_reg_data_1 (orig) | |
2809 | rtx orig; | |
2810 | { | |
2811 | register rtx x = orig; | |
2812 | register int i; | |
2813 | register enum rtx_code code; | |
2814 | register char *format_ptr; | |
2815 | ||
2816 | code = GET_CODE (x); | |
2817 | ||
2818 | switch (code) | |
2819 | { | |
2820 | case QUEUED: | |
2821 | case CONST_INT: | |
2822 | case CONST_DOUBLE: | |
2823 | case SYMBOL_REF: | |
2824 | case CODE_LABEL: | |
2825 | case PC: | |
2826 | case CC0: | |
2827 | case LABEL_REF: | |
2828 | return; | |
2829 | ||
2830 | case REG: | |
2831 | if (REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
2832 | { | |
2833 | /* Make sure regno_pointer_flag and regno_reg_rtx are large | |
2834 | enough to have an element for this pseudo reg number. */ | |
2835 | if (REGNO (x) >= reg_rtx_no) | |
2836 | { | |
2837 | reg_rtx_no = REGNO (x); | |
2838 | ||
2839 | if (reg_rtx_no >= regno_pointer_flag_length) | |
2840 | { | |
2841 | int newlen = MAX (regno_pointer_flag_length * 2, | |
2842 | reg_rtx_no + 30); | |
2843 | rtx *new1; | |
2844 | char *new = (char *) oballoc (newlen); | |
2845 | bzero (new, newlen); | |
2846 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); | |
2847 | ||
2848 | new1 = (rtx *) oballoc (newlen * sizeof (rtx)); | |
2849 | bzero (new1, newlen * sizeof (rtx)); | |
2850 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); | |
2851 | ||
2852 | regno_pointer_flag = new; | |
2853 | regno_reg_rtx = new1; | |
2854 | regno_pointer_flag_length = newlen; | |
2855 | } | |
2856 | reg_rtx_no ++; | |
2857 | } | |
2858 | regno_reg_rtx[REGNO (x)] = x; | |
2859 | } | |
2860 | return; | |
2861 | ||
2862 | case MEM: | |
2863 | if (GET_CODE (XEXP (x, 0)) == REG) | |
2864 | mark_reg_pointer (XEXP (x, 0)); | |
2865 | restore_reg_data_1 (XEXP (x, 0)); | |
2866 | return; | |
2867 | } | |
2868 | ||
2869 | /* Now scan the subexpressions recursively. */ | |
2870 | ||
2871 | format_ptr = GET_RTX_FORMAT (code); | |
2872 | ||
2873 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2874 | { | |
2875 | switch (*format_ptr++) | |
2876 | { | |
2877 | case 'e': | |
2878 | restore_reg_data_1 (XEXP (x, i)); | |
2879 | break; | |
2880 | ||
2881 | case 'E': | |
2882 | if (XVEC (x, i) != NULL) | |
2883 | { | |
2884 | register int j; | |
2885 | ||
2886 | for (j = 0; j < XVECLEN (x, i); j++) | |
2887 | restore_reg_data_1 (XVECEXP (x, i, j)); | |
2888 | } | |
2889 | break; | |
2890 | } | |
2891 | } | |
2892 | } | |
2893 | \f | |
2894 | /* Initialize data structures and variables in this file | |
2895 | before generating rtl for each function. */ | |
2896 | ||
2897 | void | |
2898 | init_emit () | |
2899 | { | |
2900 | int i; | |
2901 | ||
2902 | first_insn = NULL; | |
2903 | last_insn = NULL; | |
2904 | cur_insn_uid = 1; | |
2905 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
2906 | last_linenum = 0; | |
2907 | last_filename = 0; | |
2908 | first_label_num = label_num; | |
2909 | last_label_num = 0; | |
24d11a9a | 2910 | sequence_stack = NULL; |
23b2ce53 RS |
2911 | |
2912 | /* Clear the start_sequence/gen_sequence cache. */ | |
2913 | sequence_element_free_list = 0; | |
2914 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
2915 | sequence_result[i] = 0; | |
2916 | ||
2917 | /* Init the tables that describe all the pseudo regs. */ | |
2918 | ||
2919 | regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; | |
2920 | ||
2921 | regno_pointer_flag | |
2922 | = (char *) oballoc (regno_pointer_flag_length); | |
2923 | bzero (regno_pointer_flag, regno_pointer_flag_length); | |
2924 | ||
2925 | regno_reg_rtx | |
2926 | = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); | |
2927 | bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); | |
2928 | ||
2929 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
2930 | regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
2931 | regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
2932 | regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
2933 | regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
740ab4a2 RK |
2934 | |
2935 | /* Indicate that the virtual registers and stack locations are | |
2936 | all pointers. */ | |
2937 | REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; | |
2938 | REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; | |
2939 | REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; | |
2940 | ||
2941 | REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; | |
2942 | REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; | |
2943 | REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; | |
2944 | REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; | |
5e82e7bd JVA |
2945 | |
2946 | #ifdef INIT_EXPANDERS | |
2947 | INIT_EXPANDERS; | |
2948 | #endif | |
23b2ce53 RS |
2949 | } |
2950 | ||
2951 | /* Create some permanent unique rtl objects shared between all functions. | |
2952 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
2953 | ||
2954 | void | |
2955 | init_emit_once (line_numbers) | |
2956 | int line_numbers; | |
2957 | { | |
2958 | int i; | |
2959 | enum machine_mode mode; | |
2960 | ||
2961 | no_line_numbers = ! line_numbers; | |
2962 | ||
2963 | sequence_stack = NULL; | |
2964 | ||
2965 | /* Create the unique rtx's for certain rtx codes and operand values. */ | |
2966 | ||
2967 | pc_rtx = gen_rtx (PC, VOIDmode); | |
2968 | cc0_rtx = gen_rtx (CC0, VOIDmode); | |
2969 | ||
2970 | /* Don't use gen_rtx here since gen_rtx in this case | |
2971 | tries to use these variables. */ | |
2972 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) | |
2973 | { | |
2974 | const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT); | |
2975 | PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); | |
2976 | INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; | |
2977 | } | |
2978 | ||
2979 | /* These four calls obtain some of the rtx expressions made above. */ | |
906c4e36 RK |
2980 | const0_rtx = GEN_INT (0); |
2981 | const1_rtx = GEN_INT (1); | |
2982 | const2_rtx = GEN_INT (2); | |
2983 | constm1_rtx = GEN_INT (-1); | |
23b2ce53 RS |
2984 | |
2985 | /* This will usually be one of the above constants, but may be a new rtx. */ | |
906c4e36 | 2986 | const_true_rtx = GEN_INT (STORE_FLAG_VALUE); |
23b2ce53 | 2987 | |
1632afca RS |
2988 | dconst0 = REAL_VALUE_ATOF ("0", DFmode); |
2989 | dconst1 = REAL_VALUE_ATOF ("1", DFmode); | |
2990 | dconst2 = REAL_VALUE_ATOF ("2", DFmode); | |
2991 | dconstm1 = REAL_VALUE_ATOF ("-1", DFmode); | |
23b2ce53 RS |
2992 | |
2993 | for (i = 0; i <= 2; i++) | |
2994 | { | |
2995 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
2996 | mode = GET_MODE_WIDER_MODE (mode)) | |
2997 | { | |
2998 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
2999 | union real_extract u; | |
3000 | ||
3001 | bzero (&u, sizeof u); /* Zero any holes in a structure. */ | |
3002 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; | |
3003 | ||
3004 | bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u); | |
3005 | CONST_DOUBLE_MEM (tem) = cc0_rtx; | |
3006 | PUT_MODE (tem, mode); | |
3007 | ||
3008 | const_tiny_rtx[i][(int) mode] = tem; | |
3009 | } | |
3010 | ||
906c4e36 | 3011 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
3012 | |
3013 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3014 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 3015 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
33d3e559 RS |
3016 | |
3017 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
3018 | mode != VOIDmode; | |
3019 | mode = GET_MODE_WIDER_MODE (mode)) | |
3020 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
23b2ce53 RS |
3021 | } |
3022 | ||
dfa09e23 TW |
3023 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; |
3024 | mode = GET_MODE_WIDER_MODE (mode)) | |
3025 | const_tiny_rtx[0][(int) mode] = const0_rtx; | |
3026 | ||
23b2ce53 RS |
3027 | stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); |
3028 | frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM); | |
3029 | ||
3030 | if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) | |
3031 | arg_pointer_rtx = frame_pointer_rtx; | |
3032 | else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM) | |
3033 | arg_pointer_rtx = stack_pointer_rtx; | |
3034 | else | |
3035 | arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM); | |
3036 | ||
3037 | /* Create the virtual registers. Do so here since the following objects | |
3038 | might reference them. */ | |
3039 | ||
3040 | virtual_incoming_args_rtx = gen_rtx (REG, Pmode, | |
3041 | VIRTUAL_INCOMING_ARGS_REGNUM); | |
3042 | virtual_stack_vars_rtx = gen_rtx (REG, Pmode, | |
3043 | VIRTUAL_STACK_VARS_REGNUM); | |
3044 | virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode, | |
3045 | VIRTUAL_STACK_DYNAMIC_REGNUM); | |
3046 | virtual_outgoing_args_rtx = gen_rtx (REG, Pmode, | |
3047 | VIRTUAL_OUTGOING_ARGS_REGNUM); | |
3048 | ||
3049 | #ifdef STRUCT_VALUE | |
3050 | struct_value_rtx = STRUCT_VALUE; | |
3051 | #else | |
3052 | struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM); | |
3053 | #endif | |
3054 | ||
3055 | #ifdef STRUCT_VALUE_INCOMING | |
3056 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
3057 | #else | |
3058 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
3059 | struct_value_incoming_rtx | |
3060 | = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM); | |
3061 | #else | |
3062 | struct_value_incoming_rtx = struct_value_rtx; | |
3063 | #endif | |
3064 | #endif | |
3065 | ||
3066 | #ifdef STATIC_CHAIN_REGNUM | |
3067 | static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); | |
3068 | ||
3069 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
3070 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
3071 | static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM); | |
3072 | else | |
3073 | #endif | |
3074 | static_chain_incoming_rtx = static_chain_rtx; | |
3075 | #endif | |
3076 | ||
3077 | #ifdef STATIC_CHAIN | |
3078 | static_chain_rtx = STATIC_CHAIN; | |
3079 | ||
3080 | #ifdef STATIC_CHAIN_INCOMING | |
3081 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
3082 | #else | |
3083 | static_chain_incoming_rtx = static_chain_rtx; | |
3084 | #endif | |
3085 | #endif | |
3086 | ||
3087 | #ifdef PIC_OFFSET_TABLE_REGNUM | |
3088 | pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM); | |
3089 | #endif | |
3090 | } |