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23b2ce53 RS |
1 | /* Emit RTL for the GNU C-Compiler expander. |
2 | Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Middle-to-low level generation of rtx code and insns. | |
22 | ||
23 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
24 | and `gen_label_rtx' that are the usual ways of creating rtl | |
25 | expressions for most purposes. | |
26 | ||
27 | It also has the functions for creating insns and linking | |
28 | them in the doubly-linked chain. | |
29 | ||
30 | The patterns of the insns are created by machine-dependent | |
31 | routines in insn-emit.c, which is generated automatically from | |
32 | the machine description. These routines use `gen_rtx' to make | |
33 | the individual rtx's of the pattern; what is machine dependent | |
34 | is the kind of rtx's they make and what arguments they use. */ | |
35 | ||
36 | #include "config.h" | |
37 | #include <stdio.h> | |
38 | #include "gvarargs.h" | |
39 | #include "rtl.h" | |
40 | #include "flags.h" | |
41 | #include "function.h" | |
42 | #include "expr.h" | |
43 | #include "regs.h" | |
44 | #include "insn-config.h" | |
45 | #include "real.h" | |
46 | ||
47 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. | |
48 | After rtl generation, it is 1 plus the largest register number used. */ | |
49 | ||
50 | int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
51 | ||
52 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
53 | in the entire compilation a unique label number. */ | |
54 | ||
55 | static int label_num = 1; | |
56 | ||
57 | /* Lowest label number in current function. */ | |
58 | ||
59 | static int first_label_num; | |
60 | ||
61 | /* Highest label number in current function. | |
62 | Zero means use the value of label_num instead. | |
63 | This is nonzero only when belatedly compiling an inline function. */ | |
64 | ||
65 | static int last_label_num; | |
66 | ||
67 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
68 | If label_num has not changed since then, last_label_num is valid. */ | |
69 | ||
70 | static int base_label_num; | |
71 | ||
72 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
73 | ||
74 | static int no_line_numbers; | |
75 | ||
76 | /* Commonly used rtx's, so that we only need space for one copy. | |
77 | These are initialized once for the entire compilation. | |
78 | All of these except perhaps the floating-point CONST_DOUBLEs | |
79 | are unique; no other rtx-object will be equal to any of these. */ | |
80 | ||
81 | rtx pc_rtx; /* (PC) */ | |
82 | rtx cc0_rtx; /* (CC0) */ | |
83 | rtx cc1_rtx; /* (CC1) (not actually used nowadays) */ | |
84 | rtx const0_rtx; /* (CONST_INT 0) */ | |
85 | rtx const1_rtx; /* (CONST_INT 1) */ | |
86 | rtx const2_rtx; /* (CONST_INT 2) */ | |
87 | rtx constm1_rtx; /* (CONST_INT -1) */ | |
88 | rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */ | |
89 | ||
90 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
91 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
92 | record a copy of const[012]_rtx. */ | |
93 | ||
94 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
95 | ||
96 | REAL_VALUE_TYPE dconst0; | |
97 | REAL_VALUE_TYPE dconst1; | |
98 | REAL_VALUE_TYPE dconst2; | |
99 | REAL_VALUE_TYPE dconstm1; | |
100 | ||
101 | /* All references to the following fixed hard registers go through | |
102 | these unique rtl objects. On machines where the frame-pointer and | |
103 | arg-pointer are the same register, they use the same unique object. | |
104 | ||
105 | After register allocation, other rtl objects which used to be pseudo-regs | |
106 | may be clobbered to refer to the frame-pointer register. | |
107 | But references that were originally to the frame-pointer can be | |
108 | distinguished from the others because they contain frame_pointer_rtx. | |
109 | ||
110 | In an inline procedure, the stack and frame pointer rtxs may not be | |
111 | used for anything else. */ | |
112 | rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */ | |
113 | rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */ | |
114 | rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */ | |
115 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ | |
116 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
117 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
118 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
119 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
120 | ||
121 | rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */ | |
122 | rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */ | |
123 | rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */ | |
124 | rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */ | |
125 | ||
126 | /* We make one copy of (const_int C) where C is in | |
127 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
128 | to save space during the compilation and simplify comparisons of | |
129 | integers. */ | |
130 | ||
131 | #define MAX_SAVED_CONST_INT 64 | |
132 | ||
133 | static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; | |
134 | ||
135 | /* The ends of the doubly-linked chain of rtl for the current function. | |
136 | Both are reset to null at the start of rtl generation for the function. | |
137 | ||
138 | start_sequence saves both of these on `sequence_stack' and then | |
139 | starts a new, nested sequence of insns. */ | |
140 | ||
141 | static rtx first_insn = NULL; | |
142 | static rtx last_insn = NULL; | |
143 | ||
144 | /* INSN_UID for next insn emitted. | |
145 | Reset to 1 for each function compiled. */ | |
146 | ||
147 | static int cur_insn_uid = 1; | |
148 | ||
149 | /* Line number and source file of the last line-number NOTE emitted. | |
150 | This is used to avoid generating duplicates. */ | |
151 | ||
152 | static int last_linenum = 0; | |
153 | static char *last_filename = 0; | |
154 | ||
155 | /* A vector indexed by pseudo reg number. The allocated length | |
156 | of this vector is regno_pointer_flag_length. Since this | |
157 | vector is needed during the expansion phase when the total | |
158 | number of registers in the function is not yet known, | |
159 | it is copied and made bigger when necessary. */ | |
160 | ||
161 | char *regno_pointer_flag; | |
162 | int regno_pointer_flag_length; | |
163 | ||
164 | /* Indexed by pseudo register number, gives the rtx for that pseudo. | |
165 | Allocated in parallel with regno_pointer_flag. */ | |
166 | ||
167 | rtx *regno_reg_rtx; | |
168 | ||
169 | /* Stack of pending (incomplete) sequences saved by `start_sequence'. | |
170 | Each element describes one pending sequence. | |
171 | The main insn-chain is saved in the last element of the chain, | |
172 | unless the chain is empty. */ | |
173 | ||
174 | struct sequence_stack *sequence_stack; | |
175 | ||
176 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are | |
177 | shortly thrown away. We use two mechanisms to prevent this waste: | |
178 | ||
179 | First, we keep a list of the expressions used to represent the sequence | |
180 | stack in sequence_element_free_list. | |
181 | ||
182 | Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated | |
183 | rtvec for use by gen_sequence. One entry for each size is sufficient | |
184 | because most cases are calls to gen_sequence followed by immediately | |
185 | emitting the SEQUENCE. Reuse is safe since emitting a sequence is | |
186 | destructive on the insn in it anyway and hence can't be redone. | |
187 | ||
188 | We do not bother to save this cached data over nested function calls. | |
189 | Instead, we just reinitialize them. */ | |
190 | ||
191 | #define SEQUENCE_RESULT_SIZE 5 | |
192 | ||
193 | static struct sequence_stack *sequence_element_free_list; | |
194 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; | |
195 | ||
196 | extern int rtx_equal_function_value_matters; | |
197 | ||
198 | /* Filename and line number of last line-number note, | |
199 | whether we actually emitted it or not. */ | |
200 | extern char *emit_filename; | |
201 | extern int emit_lineno; | |
202 | ||
203 | rtx change_address (); | |
204 | void init_emit (); | |
205 | \f | |
206 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) | |
207 | ** | |
208 | ** This routine generates an RTX of the size specified by | |
209 | ** <code>, which is an RTX code. The RTX structure is initialized | |
210 | ** from the arguments <element1> through <elementn>, which are | |
211 | ** interpreted according to the specific RTX type's format. The | |
212 | ** special machine mode associated with the rtx (if any) is specified | |
213 | ** in <mode>. | |
214 | ** | |
215 | ** gen_rtx() can be invoked in a way which resembles the lisp-like | |
216 | ** rtx it will generate. For example, the following rtx structure: | |
217 | ** | |
218 | ** (plus:QI (mem:QI (reg:SI 1)) | |
219 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
220 | ** | |
221 | ** ...would be generated by the following C code: | |
222 | ** | |
223 | ** gen_rtx (PLUS, QImode, | |
224 | ** gen_rtx (MEM, QImode, | |
225 | ** gen_rtx (REG, SImode, 1)), | |
226 | ** gen_rtx (MEM, QImode, | |
227 | ** gen_rtx (PLUS, SImode, | |
228 | ** gen_rtx (REG, SImode, 2), | |
229 | ** gen_rtx (REG, SImode, 3)))), | |
230 | */ | |
231 | ||
232 | /*VARARGS2*/ | |
233 | rtx | |
234 | gen_rtx (va_alist) | |
235 | va_dcl | |
236 | { | |
237 | va_list p; | |
238 | enum rtx_code code; | |
239 | enum machine_mode mode; | |
240 | register int i; /* Array indices... */ | |
241 | register char *fmt; /* Current rtx's format... */ | |
242 | register rtx rt_val; /* RTX to return to caller... */ | |
243 | ||
244 | va_start (p); | |
245 | code = va_arg (p, enum rtx_code); | |
246 | mode = va_arg (p, enum machine_mode); | |
247 | ||
248 | if (code == CONST_INT) | |
249 | { | |
906c4e36 | 250 | HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT); |
23b2ce53 RS |
251 | |
252 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) | |
253 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; | |
254 | ||
255 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
256 | return const_true_rtx; | |
257 | ||
258 | rt_val = rtx_alloc (code); | |
259 | INTVAL (rt_val) = arg; | |
260 | } | |
261 | else if (code == REG) | |
262 | { | |
263 | int regno = va_arg (p, int); | |
264 | ||
265 | /* In case the MD file explicitly references the frame pointer, have | |
266 | all such references point to the same frame pointer. This is used | |
267 | during frame pointer elimination to distinguish the explicit | |
268 | references to these registers from pseudos that happened to be | |
269 | assigned to them. | |
270 | ||
271 | If we have eliminated the frame pointer or arg pointer, we will | |
272 | be using it as a normal register, for example as a spill register. | |
273 | In such cases, we might be accessing it in a mode that is not | |
274 | Pmode and therefore cannot use the pre-allocated rtx. */ | |
275 | ||
276 | if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode) | |
277 | return frame_pointer_rtx; | |
278 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
279 | if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode) | |
280 | return arg_pointer_rtx; | |
281 | #endif | |
282 | if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode) | |
283 | return stack_pointer_rtx; | |
284 | else | |
285 | { | |
286 | rt_val = rtx_alloc (code); | |
287 | rt_val->mode = mode; | |
288 | REGNO (rt_val) = regno; | |
289 | return rt_val; | |
290 | } | |
291 | } | |
292 | else | |
293 | { | |
294 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ | |
295 | rt_val->mode = mode; /* Store the machine mode... */ | |
296 | ||
297 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
298 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
299 | { | |
300 | switch (*fmt++) | |
301 | { | |
302 | case '0': /* Unused field. */ | |
303 | break; | |
304 | ||
305 | case 'i': /* An integer? */ | |
306 | XINT (rt_val, i) = va_arg (p, int); | |
307 | break; | |
308 | ||
906c4e36 RK |
309 | case 'w': /* A wide integer? */ |
310 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
311 | break; | |
312 | ||
23b2ce53 RS |
313 | case 's': /* A string? */ |
314 | XSTR (rt_val, i) = va_arg (p, char *); | |
315 | break; | |
316 | ||
317 | case 'e': /* An expression? */ | |
318 | case 'u': /* An insn? Same except when printing. */ | |
319 | XEXP (rt_val, i) = va_arg (p, rtx); | |
320 | break; | |
321 | ||
322 | case 'E': /* An RTX vector? */ | |
323 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
324 | break; | |
325 | ||
326 | default: | |
327 | abort(); | |
328 | } | |
329 | } | |
330 | } | |
331 | va_end (p); | |
332 | return rt_val; /* Return the new RTX... */ | |
333 | } | |
334 | ||
335 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
336 | ** | |
337 | ** This routine creates an rtvec and stores within it the | |
338 | ** pointers to rtx's which are its arguments. | |
339 | */ | |
340 | ||
341 | /*VARARGS1*/ | |
342 | rtvec | |
343 | gen_rtvec (va_alist) | |
344 | va_dcl | |
345 | { | |
346 | int n, i; | |
347 | va_list p; | |
348 | rtx *vector; | |
349 | ||
350 | va_start (p); | |
351 | n = va_arg (p, int); | |
352 | ||
353 | if (n == 0) | |
354 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
355 | ||
356 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
357 | for (i = 0; i < n; i++) | |
358 | vector[i] = va_arg (p, rtx); | |
359 | va_end (p); | |
360 | ||
361 | return gen_rtvec_v (n, vector); | |
362 | } | |
363 | ||
364 | rtvec | |
365 | gen_rtvec_v (n, argp) | |
366 | int n; | |
367 | rtx *argp; | |
368 | { | |
369 | register int i; | |
370 | register rtvec rt_val; | |
371 | ||
372 | if (n == 0) | |
373 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
374 | ||
375 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
376 | ||
377 | for (i = 0; i < n; i++) | |
378 | rt_val->elem[i].rtx = *argp++; | |
379 | ||
380 | return rt_val; | |
381 | } | |
382 | \f | |
383 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
384 | This pseudo is assigned the next sequential register number. */ | |
385 | ||
386 | rtx | |
387 | gen_reg_rtx (mode) | |
388 | enum machine_mode mode; | |
389 | { | |
390 | register rtx val; | |
391 | ||
392 | /* Don't let anything called by or after reload create new registers | |
393 | (actually, registers can't be created after flow, but this is a good | |
394 | approximation). */ | |
395 | ||
396 | if (reload_in_progress || reload_completed) | |
397 | abort (); | |
398 | ||
399 | /* Make sure regno_pointer_flag and regno_reg_rtx are large | |
400 | enough to have an element for this pseudo reg number. */ | |
401 | ||
402 | if (reg_rtx_no == regno_pointer_flag_length) | |
403 | { | |
404 | rtx *new1; | |
405 | char *new = | |
406 | (char *) oballoc (regno_pointer_flag_length * 2); | |
407 | bzero (new, regno_pointer_flag_length * 2); | |
408 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); | |
409 | regno_pointer_flag = new; | |
410 | ||
411 | new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx)); | |
412 | bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx)); | |
413 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); | |
414 | regno_reg_rtx = new1; | |
415 | ||
416 | regno_pointer_flag_length *= 2; | |
417 | } | |
418 | ||
419 | val = gen_rtx (REG, mode, reg_rtx_no); | |
420 | regno_reg_rtx[reg_rtx_no++] = val; | |
421 | return val; | |
422 | } | |
423 | ||
424 | /* Identify REG as a probable pointer register. */ | |
425 | ||
426 | void | |
427 | mark_reg_pointer (reg) | |
428 | rtx reg; | |
429 | { | |
430 | REGNO_POINTER_FLAG (REGNO (reg)) = 1; | |
431 | } | |
432 | ||
433 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
434 | ||
435 | int | |
436 | max_reg_num () | |
437 | { | |
438 | return reg_rtx_no; | |
439 | } | |
440 | ||
441 | /* Return 1 + the largest label number used so far in the current function. */ | |
442 | ||
443 | int | |
444 | max_label_num () | |
445 | { | |
446 | if (last_label_num && label_num == base_label_num) | |
447 | return last_label_num; | |
448 | return label_num; | |
449 | } | |
450 | ||
451 | /* Return first label number used in this function (if any were used). */ | |
452 | ||
453 | int | |
454 | get_first_label_num () | |
455 | { | |
456 | return first_label_num; | |
457 | } | |
458 | \f | |
459 | /* Return a value representing some low-order bits of X, where the number | |
460 | of low-order bits is given by MODE. Note that no conversion is done | |
461 | between floating-point and fixed-point values, rather, the bit | |
462 | representation is returned. | |
463 | ||
464 | This function handles the cases in common between gen_lowpart, below, | |
465 | and two variants in cse.c and combine.c. These are the cases that can | |
466 | be safely handled at all points in the compilation. | |
467 | ||
468 | If this is not a case we can handle, return 0. */ | |
469 | ||
470 | rtx | |
471 | gen_lowpart_common (mode, x) | |
472 | enum machine_mode mode; | |
473 | register rtx x; | |
474 | { | |
475 | int word = 0; | |
476 | ||
477 | if (GET_MODE (x) == mode) | |
478 | return x; | |
479 | ||
480 | /* MODE must occupy no more words than the mode of X. */ | |
481 | if (GET_MODE (x) != VOIDmode | |
482 | && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD | |
483 | > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) | |
484 | / UNITS_PER_WORD))) | |
485 | return 0; | |
486 | ||
487 | if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
488 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
489 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
490 | / UNITS_PER_WORD); | |
491 | ||
492 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
493 | && GET_MODE_CLASS (mode) == MODE_INT) | |
494 | { | |
495 | /* If we are getting the low-order part of something that has been | |
496 | sign- or zero-extended, we can either just use the object being | |
497 | extended or make a narrower extension. If we want an even smaller | |
498 | piece than the size of the object being extended, call ourselves | |
499 | recursively. | |
500 | ||
501 | This case is used mostly by combine and cse. */ | |
502 | ||
503 | if (GET_MODE (XEXP (x, 0)) == mode) | |
504 | return XEXP (x, 0); | |
505 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
506 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
507 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
508 | return gen_rtx (GET_CODE (x), mode, XEXP (x, 0)); | |
509 | } | |
510 | else if (GET_CODE (x) == SUBREG | |
511 | && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
512 | || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) | |
513 | return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 | |
514 | ? SUBREG_REG (x) | |
515 | : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x))); | |
516 | else if (GET_CODE (x) == REG) | |
517 | { | |
518 | /* If the register is not valid for MODE, return 0. If we don't | |
519 | do this, there is no way to fix up the resulting REG later. */ | |
520 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
521 | && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)) | |
522 | return 0; | |
523 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
524 | /* integrate.c can't handle parts of a return value register. */ | |
525 | && (! REG_FUNCTION_VALUE_P (x) | |
526 | || ! rtx_equal_function_value_matters)) | |
527 | return gen_rtx (REG, mode, REGNO (x) + word); | |
528 | else | |
529 | return gen_rtx (SUBREG, mode, x, word); | |
530 | } | |
531 | ||
532 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits | |
533 | from the low-order part of the constant. */ | |
534 | else if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE (x) == VOIDmode | |
535 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) | |
1a5b457d RK |
536 | { |
537 | /* If MODE is twice the host word size, X is already the desired | |
538 | representation. Otherwise, if MODE is wider than a word, we can't | |
539 | do this. If MODE is exactly a word, return just one CONST_INT. | |
540 | If MODE is smaller than a word, clear the bits that don't belong | |
541 | in our mode, unless they and our sign bit are all one. So we get | |
542 | either a reasonable negative value or a reasonable unsigned value | |
543 | for this mode. */ | |
544 | ||
906c4e36 | 545 | if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 546 | return x; |
906c4e36 | 547 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 548 | return 0; |
906c4e36 | 549 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 550 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 551 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
552 | else |
553 | { | |
554 | /* MODE must be narrower than HOST_BITS_PER_INT. */ | |
555 | int width = GET_MODE_BITSIZE (mode); | |
906c4e36 RK |
556 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
557 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 558 | |
906c4e36 RK |
559 | if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) |
560 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
561 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
1a5b457d RK |
562 | |
563 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 564 | : GEN_INT (val)); |
1a5b457d RK |
565 | } |
566 | } | |
23b2ce53 | 567 | |
8aada4ad RK |
568 | /* If X is an integral constant but we want it in floating-point, it |
569 | must be the case that we have a union of an integer and a floating-point | |
570 | value. If the machine-parameters allow it, simulate that union here | |
d6020413 RK |
571 | and return the result. The two-word and single-word cases are |
572 | different. */ | |
8aada4ad | 573 | |
b3bf132d | 574 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 575 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 576 | || flag_pretend_float) |
8aada4ad | 577 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
d6020413 RK |
578 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
579 | && GET_CODE (x) == CONST_INT | |
906c4e36 | 580 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
d6020413 | 581 | { |
906c4e36 | 582 | union {HOST_WIDE_INT i; float d; } u; |
d6020413 RK |
583 | |
584 | u.i = INTVAL (x); | |
585 | return immed_real_const_1 (u.d, mode); | |
586 | } | |
587 | ||
588 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 589 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
d6020413 RK |
590 | || flag_pretend_float) |
591 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
592 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
8aada4ad RK |
593 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
594 | && GET_MODE (x) == VOIDmode | |
906c4e36 RK |
595 | && (sizeof (double) * HOST_BITS_PER_CHAR |
596 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
8aada4ad | 597 | { |
906c4e36 RK |
598 | union {HOST_WIDE_INT i[2]; double d; } u; |
599 | HOST_WIDE_INT low, high; | |
8aada4ad RK |
600 | |
601 | if (GET_CODE (x) == CONST_INT) | |
906c4e36 | 602 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
8aada4ad RK |
603 | else |
604 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
605 | ||
606 | #ifdef HOST_WORDS_BIG_ENDIAN | |
607 | u.i[0] = high, u.i[1] = low; | |
608 | #else | |
609 | u.i[0] = low, u.i[1] = high; | |
610 | #endif | |
611 | ||
612 | return immed_real_const_1 (u.d, mode); | |
613 | } | |
614 | ||
b3bf132d RK |
615 | /* Similarly, if this is converting a floating-point value into a |
616 | single-word integer. Only do this is the host and target parameters are | |
617 | compatible. */ | |
618 | ||
619 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 620 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d RK |
621 | || flag_pretend_float) |
622 | && GET_MODE_CLASS (mode) == MODE_INT | |
623 | && GET_CODE (x) == CONST_DOUBLE | |
624 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
625 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
626 | return operand_subword (x, 0, 0, GET_MODE (x)); | |
627 | ||
8aada4ad RK |
628 | /* Similarly, if this is converting a floating-point value into a |
629 | two-word integer, we can do this one word at a time and make an | |
630 | integer. Only do this is the host and target parameters are | |
631 | compatible. */ | |
632 | ||
b3bf132d | 633 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 634 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 635 | || flag_pretend_float) |
8aada4ad RK |
636 | && GET_MODE_CLASS (mode) == MODE_INT |
637 | && GET_CODE (x) == CONST_DOUBLE | |
638 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
639 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
640 | { | |
641 | rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
642 | rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
643 | ||
644 | if (lowpart && GET_CODE (lowpart) == CONST_INT | |
645 | && highpart && GET_CODE (highpart) == CONST_INT) | |
646 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
647 | } | |
648 | ||
23b2ce53 RS |
649 | /* Otherwise, we can't do this. */ |
650 | return 0; | |
651 | } | |
652 | \f | |
653 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, | |
654 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
655 | least-significant part of X. | |
656 | MODE specifies how big a part of X to return; | |
657 | it usually should not be larger than a word. | |
658 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
659 | ||
660 | rtx | |
661 | gen_lowpart (mode, x) | |
662 | enum machine_mode mode; | |
663 | register rtx x; | |
664 | { | |
665 | rtx result = gen_lowpart_common (mode, x); | |
666 | ||
667 | if (result) | |
668 | return result; | |
669 | else if (GET_CODE (x) == MEM) | |
670 | { | |
671 | /* The only additional case we can do is MEM. */ | |
672 | register int offset = 0; | |
673 | if (WORDS_BIG_ENDIAN) | |
674 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
675 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
676 | ||
677 | if (BYTES_BIG_ENDIAN) | |
678 | /* Adjust the address so that the address-after-the-data | |
679 | is unchanged. */ | |
680 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
681 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
682 | ||
683 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
684 | } | |
685 | else | |
686 | abort (); | |
687 | } | |
688 | ||
689 | /* Return 1 iff X, assumed to be a SUBREG, | |
690 | refers to the least significant part of its containing reg. | |
691 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
692 | ||
693 | int | |
694 | subreg_lowpart_p (x) | |
695 | rtx x; | |
696 | { | |
697 | if (GET_CODE (x) != SUBREG) | |
698 | return 1; | |
699 | ||
700 | if (WORDS_BIG_ENDIAN | |
701 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) | |
702 | return (SUBREG_WORD (x) | |
703 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) | |
704 | - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) | |
705 | / UNITS_PER_WORD)); | |
706 | ||
707 | return SUBREG_WORD (x) == 0; | |
708 | } | |
709 | \f | |
710 | /* Return subword I of operand OP. | |
711 | The word number, I, is interpreted as the word number starting at the | |
712 | low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, | |
713 | otherwise it is the high-order word. | |
714 | ||
715 | If we cannot extract the required word, we return zero. Otherwise, an | |
716 | rtx corresponding to the requested word will be returned. | |
717 | ||
718 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
719 | reload has completed, a valid address will always be returned. After | |
720 | reload, if a valid address cannot be returned, we return zero. | |
721 | ||
722 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
723 | it is the responsibility of the caller. | |
724 | ||
725 | MODE is the mode of OP in case it is a CONST_INT. */ | |
726 | ||
727 | rtx | |
728 | operand_subword (op, i, validate_address, mode) | |
729 | rtx op; | |
730 | int i; | |
731 | int validate_address; | |
732 | enum machine_mode mode; | |
733 | { | |
906c4e36 RK |
734 | HOST_WIDE_INT val; |
735 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; | |
23b2ce53 RS |
736 | |
737 | if (mode == VOIDmode) | |
738 | mode = GET_MODE (op); | |
739 | ||
740 | if (mode == VOIDmode) | |
741 | abort (); | |
742 | ||
743 | /* If OP is narrower than a word or if we want a word outside OP, fail. */ | |
744 | if (mode != BLKmode | |
745 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD | |
746 | || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) | |
747 | return 0; | |
748 | ||
749 | /* If OP is already an integer word, return it. */ | |
750 | if (GET_MODE_CLASS (mode) == MODE_INT | |
751 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
752 | return op; | |
753 | ||
754 | /* If OP is a REG or SUBREG, we can handle it very simply. */ | |
755 | if (GET_CODE (op) == REG) | |
756 | { | |
757 | /* If the register is not valid for MODE, return 0. If we don't | |
758 | do this, there is no way to fix up the resulting REG later. */ | |
759 | if (REGNO (op) < FIRST_PSEUDO_REGISTER | |
760 | && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) | |
761 | return 0; | |
762 | else if (REGNO (op) >= FIRST_PSEUDO_REGISTER | |
763 | || (REG_FUNCTION_VALUE_P (op) | |
764 | && rtx_equal_function_value_matters)) | |
765 | return gen_rtx (SUBREG, word_mode, op, i); | |
766 | else | |
767 | return gen_rtx (REG, word_mode, REGNO (op) + i); | |
768 | } | |
769 | else if (GET_CODE (op) == SUBREG) | |
770 | return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); | |
771 | ||
772 | /* Form a new MEM at the requested address. */ | |
773 | if (GET_CODE (op) == MEM) | |
774 | { | |
775 | rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); | |
776 | rtx new; | |
777 | ||
778 | if (validate_address) | |
779 | { | |
780 | if (reload_completed) | |
781 | { | |
782 | if (! strict_memory_address_p (word_mode, addr)) | |
783 | return 0; | |
784 | } | |
785 | else | |
786 | addr = memory_address (word_mode, addr); | |
787 | } | |
788 | ||
789 | new = gen_rtx (MEM, word_mode, addr); | |
790 | ||
791 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); | |
792 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); | |
793 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); | |
794 | ||
795 | return new; | |
796 | } | |
797 | ||
798 | /* The only remaining cases are when OP is a constant. If the host and | |
799 | target floating formats are the same, handling two-word floating | |
800 | constants are easy. */ | |
801 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 802 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
803 | || flag_pretend_float) |
804 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
805 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
806 | && GET_CODE (op) == CONST_DOUBLE) | |
7529ac93 CH |
807 | { |
808 | /* The constant is stored in the host's word-ordering, | |
809 | but we want to access it in the target's word-ordering. Some | |
810 | compilers don't like a conditional inside macro args, so we have two | |
811 | copies of the return. */ | |
2fe02d7e | 812 | #ifdef HOST_WORDS_BIG_ENDIAN |
7529ac93 CH |
813 | return GEN_INT (i == WORDS_BIG_ENDIAN |
814 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 815 | #else |
7529ac93 CH |
816 | return GEN_INT (i != WORDS_BIG_ENDIAN |
817 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 818 | #endif |
7529ac93 | 819 | } |
23b2ce53 RS |
820 | |
821 | /* Single word float is a little harder, since single- and double-word | |
822 | values often do not have the same high-order bits. We have already | |
823 | verified that we want the only defined word of the single-word value. */ | |
824 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 825 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
826 | || flag_pretend_float) |
827 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
828 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
829 | && GET_CODE (op) == CONST_DOUBLE) | |
830 | { | |
831 | double d; | |
906c4e36 | 832 | union {float f; HOST_WIDE_INT i; } u; |
23b2ce53 RS |
833 | |
834 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
835 | ||
836 | u.f = d; | |
906c4e36 | 837 | return GEN_INT (u.i); |
23b2ce53 RS |
838 | } |
839 | ||
840 | /* The only remaining cases that we can handle are integers. | |
841 | Convert to proper endianness now since these cases need it. | |
842 | At this point, i == 0 means the low-order word. | |
843 | ||
844 | Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT. | |
845 | This is because if it were greater, it could only have been two | |
846 | times greater since we do not support making wider constants. In | |
847 | that case, it MODE would have already been the proper size and | |
848 | it would have been handled above. This means we do not have to | |
849 | worry about the case where we would be returning a CONST_DOUBLE. */ | |
850 | ||
851 | if (GET_MODE_CLASS (mode) != MODE_INT | |
852 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)) | |
853 | return 0; | |
854 | ||
855 | if (WORDS_BIG_ENDIAN) | |
856 | i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; | |
857 | ||
858 | /* Find out which word on the host machine this value is in and get | |
859 | it from the constant. */ | |
860 | val = (i / size_ratio == 0 | |
861 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) | |
862 | : (GET_CODE (op) == CONST_INT | |
863 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
864 | ||
865 | /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ | |
906c4e36 | 866 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
23b2ce53 | 867 | val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) |
906c4e36 RK |
868 | & (((HOST_WIDE_INT) 1 |
869 | << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); | |
23b2ce53 | 870 | |
906c4e36 | 871 | return GEN_INT (val); |
23b2ce53 RS |
872 | } |
873 | ||
874 | /* Similar to `operand_subword', but never return 0. If we can't extract | |
875 | the required subword, put OP into a register and try again. If that fails, | |
876 | abort. We always validate the address in this case. It is not valid | |
877 | to call this function after reload; it is mostly meant for RTL | |
878 | generation. | |
879 | ||
880 | MODE is the mode of OP, in case it is CONST_INT. */ | |
881 | ||
882 | rtx | |
883 | operand_subword_force (op, i, mode) | |
884 | rtx op; | |
885 | int i; | |
886 | enum machine_mode mode; | |
887 | { | |
888 | rtx result = operand_subword (op, i, 1, mode); | |
889 | ||
890 | if (result) | |
891 | return result; | |
892 | ||
893 | if (mode != BLKmode && mode != VOIDmode) | |
894 | op = force_reg (mode, op); | |
895 | ||
896 | result = operand_subword (op, i, 1, mode); | |
897 | if (result == 0) | |
898 | abort (); | |
899 | ||
900 | return result; | |
901 | } | |
902 | \f | |
903 | /* Given a compare instruction, swap the operands. | |
904 | A test instruction is changed into a compare of 0 against the operand. */ | |
905 | ||
906 | void | |
907 | reverse_comparison (insn) | |
908 | rtx insn; | |
909 | { | |
910 | rtx body = PATTERN (insn); | |
911 | rtx comp; | |
912 | ||
913 | if (GET_CODE (body) == SET) | |
914 | comp = SET_SRC (body); | |
915 | else | |
916 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
917 | ||
918 | if (GET_CODE (comp) == COMPARE) | |
919 | { | |
920 | rtx op0 = XEXP (comp, 0); | |
921 | rtx op1 = XEXP (comp, 1); | |
922 | XEXP (comp, 0) = op1; | |
923 | XEXP (comp, 1) = op0; | |
924 | } | |
925 | else | |
926 | { | |
927 | rtx new = gen_rtx (COMPARE, VOIDmode, | |
928 | CONST0_RTX (GET_MODE (comp)), comp); | |
929 | if (GET_CODE (body) == SET) | |
930 | SET_SRC (body) = new; | |
931 | else | |
932 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
933 | } | |
934 | } | |
935 | \f | |
936 | /* Return a memory reference like MEMREF, but with its mode changed | |
937 | to MODE and its address changed to ADDR. | |
938 | (VOIDmode means don't change the mode. | |
939 | NULL for ADDR means don't change the address.) */ | |
940 | ||
941 | rtx | |
942 | change_address (memref, mode, addr) | |
943 | rtx memref; | |
944 | enum machine_mode mode; | |
945 | rtx addr; | |
946 | { | |
947 | rtx new; | |
948 | ||
949 | if (GET_CODE (memref) != MEM) | |
950 | abort (); | |
951 | if (mode == VOIDmode) | |
952 | mode = GET_MODE (memref); | |
953 | if (addr == 0) | |
954 | addr = XEXP (memref, 0); | |
955 | ||
956 | /* If reload is in progress or has completed, ADDR must be valid. | |
957 | Otherwise, we can call memory_address to make it valid. */ | |
958 | if (reload_completed || reload_in_progress) | |
959 | { | |
960 | if (! memory_address_p (mode, addr)) | |
961 | abort (); | |
962 | } | |
963 | else | |
964 | addr = memory_address (mode, addr); | |
965 | ||
966 | new = gen_rtx (MEM, mode, addr); | |
967 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); | |
968 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); | |
969 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); | |
970 | return new; | |
971 | } | |
972 | \f | |
973 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
974 | ||
975 | rtx | |
976 | gen_label_rtx () | |
977 | { | |
906c4e36 RK |
978 | register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, |
979 | label_num++, NULL_PTR); | |
23b2ce53 RS |
980 | LABEL_NUSES (label) = 0; |
981 | return label; | |
982 | } | |
983 | \f | |
984 | /* For procedure integration. */ | |
985 | ||
986 | /* Return a newly created INLINE_HEADER rtx. Should allocate this | |
987 | from a permanent obstack when the opportunity arises. */ | |
988 | ||
989 | rtx | |
990 | gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, | |
991 | last_labelno, max_parm_regnum, max_regnum, args_size, | |
992 | pops_args, stack_slots, function_flags, | |
993 | outgoing_args_size, original_arg_vector, | |
994 | original_decl_initial) | |
995 | rtx first_insn, first_parm_insn; | |
996 | int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; | |
997 | int pops_args; | |
998 | rtx stack_slots; | |
999 | int function_flags; | |
1000 | int outgoing_args_size; | |
1001 | rtvec original_arg_vector; | |
1002 | rtx original_decl_initial; | |
1003 | { | |
1004 | rtx header = gen_rtx (INLINE_HEADER, VOIDmode, | |
906c4e36 | 1005 | cur_insn_uid++, NULL_RTX, |
23b2ce53 RS |
1006 | first_insn, first_parm_insn, |
1007 | first_labelno, last_labelno, | |
1008 | max_parm_regnum, max_regnum, args_size, pops_args, | |
1009 | stack_slots, function_flags, outgoing_args_size, | |
1010 | original_arg_vector, original_decl_initial); | |
1011 | return header; | |
1012 | } | |
1013 | ||
1014 | /* Install new pointers to the first and last insns in the chain. | |
1015 | Used for an inline-procedure after copying the insn chain. */ | |
1016 | ||
1017 | void | |
1018 | set_new_first_and_last_insn (first, last) | |
1019 | rtx first, last; | |
1020 | { | |
1021 | first_insn = first; | |
1022 | last_insn = last; | |
1023 | } | |
1024 | ||
1025 | /* Set the range of label numbers found in the current function. | |
1026 | This is used when belatedly compiling an inline function. */ | |
1027 | ||
1028 | void | |
1029 | set_new_first_and_last_label_num (first, last) | |
1030 | int first, last; | |
1031 | { | |
1032 | base_label_num = label_num; | |
1033 | first_label_num = first; | |
1034 | last_label_num = last; | |
1035 | } | |
1036 | \f | |
1037 | /* Save all variables describing the current status into the structure *P. | |
1038 | This is used before starting a nested function. */ | |
1039 | ||
1040 | void | |
1041 | save_emit_status (p) | |
1042 | struct function *p; | |
1043 | { | |
1044 | p->reg_rtx_no = reg_rtx_no; | |
1045 | p->first_label_num = first_label_num; | |
1046 | p->first_insn = first_insn; | |
1047 | p->last_insn = last_insn; | |
1048 | p->sequence_stack = sequence_stack; | |
1049 | p->cur_insn_uid = cur_insn_uid; | |
1050 | p->last_linenum = last_linenum; | |
1051 | p->last_filename = last_filename; | |
1052 | p->regno_pointer_flag = regno_pointer_flag; | |
1053 | p->regno_pointer_flag_length = regno_pointer_flag_length; | |
1054 | p->regno_reg_rtx = regno_reg_rtx; | |
1055 | } | |
1056 | ||
1057 | /* Restore all variables describing the current status from the structure *P. | |
1058 | This is used after a nested function. */ | |
1059 | ||
1060 | void | |
1061 | restore_emit_status (p) | |
1062 | struct function *p; | |
1063 | { | |
1064 | int i; | |
1065 | ||
1066 | reg_rtx_no = p->reg_rtx_no; | |
1067 | first_label_num = p->first_label_num; | |
1068 | first_insn = p->first_insn; | |
1069 | last_insn = p->last_insn; | |
1070 | sequence_stack = p->sequence_stack; | |
1071 | cur_insn_uid = p->cur_insn_uid; | |
1072 | last_linenum = p->last_linenum; | |
1073 | last_filename = p->last_filename; | |
1074 | regno_pointer_flag = p->regno_pointer_flag; | |
1075 | regno_pointer_flag_length = p->regno_pointer_flag_length; | |
1076 | regno_reg_rtx = p->regno_reg_rtx; | |
1077 | ||
1078 | /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */ | |
1079 | sequence_element_free_list = 0; | |
1080 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
1081 | sequence_result[i] = 0; | |
1082 | } | |
1083 | \f | |
1084 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
1085 | It does not work to do this twice, because the mark bits set here | |
1086 | are not cleared afterwards. */ | |
1087 | ||
1088 | void | |
1089 | unshare_all_rtl (insn) | |
1090 | register rtx insn; | |
1091 | { | |
1092 | for (; insn; insn = NEXT_INSN (insn)) | |
1093 | if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN | |
1094 | || GET_CODE (insn) == CALL_INSN) | |
1095 | { | |
1096 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
1097 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
1098 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
1099 | } | |
1100 | ||
1101 | /* Make sure the addresses of stack slots found outside the insn chain | |
1102 | (such as, in DECL_RTL of a variable) are not shared | |
1103 | with the insn chain. | |
1104 | ||
1105 | This special care is necessary when the stack slot MEM does not | |
1106 | actually appear in the insn chain. If it does appear, its address | |
1107 | is unshared from all else at that point. */ | |
1108 | ||
1109 | copy_rtx_if_shared (stack_slot_list); | |
1110 | } | |
1111 | ||
1112 | /* Mark ORIG as in use, and return a copy of it if it was already in use. | |
1113 | Recursively does the same for subexpressions. */ | |
1114 | ||
1115 | rtx | |
1116 | copy_rtx_if_shared (orig) | |
1117 | rtx orig; | |
1118 | { | |
1119 | register rtx x = orig; | |
1120 | register int i; | |
1121 | register enum rtx_code code; | |
1122 | register char *format_ptr; | |
1123 | int copied = 0; | |
1124 | ||
1125 | if (x == 0) | |
1126 | return 0; | |
1127 | ||
1128 | code = GET_CODE (x); | |
1129 | ||
1130 | /* These types may be freely shared. */ | |
1131 | ||
1132 | switch (code) | |
1133 | { | |
1134 | case REG: | |
1135 | case QUEUED: | |
1136 | case CONST_INT: | |
1137 | case CONST_DOUBLE: | |
1138 | case SYMBOL_REF: | |
1139 | case CODE_LABEL: | |
1140 | case PC: | |
1141 | case CC0: | |
1142 | case SCRATCH: | |
1143 | /* SCRATCH must be shared because they represent distinct values. */ | |
1144 | return x; | |
1145 | ||
1146 | case INSN: | |
1147 | case JUMP_INSN: | |
1148 | case CALL_INSN: | |
1149 | case NOTE: | |
1150 | case LABEL_REF: | |
1151 | case BARRIER: | |
1152 | /* The chain of insns is not being copied. */ | |
1153 | return x; | |
1154 | ||
1155 | case MEM: | |
1156 | /* A MEM is allowed to be shared if its address is constant | |
1157 | or is a constant plus one of the special registers. */ | |
1158 | if (CONSTANT_ADDRESS_P (XEXP (x, 0)) | |
1159 | || XEXP (x, 0) == virtual_stack_vars_rtx | |
1160 | || XEXP (x, 0) == virtual_incoming_args_rtx) | |
1161 | return x; | |
1162 | ||
1163 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1164 | && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx | |
1165 | || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) | |
1166 | && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) | |
1167 | { | |
1168 | /* This MEM can appear in more than one place, | |
1169 | but its address better not be shared with anything else. */ | |
1170 | if (! x->used) | |
1171 | XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); | |
1172 | x->used = 1; | |
1173 | return x; | |
1174 | } | |
1175 | } | |
1176 | ||
1177 | /* This rtx may not be shared. If it has already been seen, | |
1178 | replace it with a copy of itself. */ | |
1179 | ||
1180 | if (x->used) | |
1181 | { | |
1182 | register rtx copy; | |
1183 | ||
1184 | copy = rtx_alloc (code); | |
1185 | bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld) | |
1186 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
1187 | x = copy; | |
1188 | copied = 1; | |
1189 | } | |
1190 | x->used = 1; | |
1191 | ||
1192 | /* Now scan the subexpressions recursively. | |
1193 | We can store any replaced subexpressions directly into X | |
1194 | since we know X is not shared! Any vectors in X | |
1195 | must be copied if X was copied. */ | |
1196 | ||
1197 | format_ptr = GET_RTX_FORMAT (code); | |
1198 | ||
1199 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1200 | { | |
1201 | switch (*format_ptr++) | |
1202 | { | |
1203 | case 'e': | |
1204 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
1205 | break; | |
1206 | ||
1207 | case 'E': | |
1208 | if (XVEC (x, i) != NULL) | |
1209 | { | |
1210 | register int j; | |
1211 | ||
1212 | if (copied) | |
1213 | XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0)); | |
1214 | for (j = 0; j < XVECLEN (x, i); j++) | |
1215 | XVECEXP (x, i, j) | |
1216 | = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
1217 | } | |
1218 | break; | |
1219 | } | |
1220 | } | |
1221 | return x; | |
1222 | } | |
1223 | ||
1224 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
1225 | to look for shared sub-parts. */ | |
1226 | ||
1227 | void | |
1228 | reset_used_flags (x) | |
1229 | rtx x; | |
1230 | { | |
1231 | register int i, j; | |
1232 | register enum rtx_code code; | |
1233 | register char *format_ptr; | |
1234 | int copied = 0; | |
1235 | ||
1236 | if (x == 0) | |
1237 | return; | |
1238 | ||
1239 | code = GET_CODE (x); | |
1240 | ||
1241 | /* These types may be freely shared so we needn't do any reseting | |
1242 | for them. */ | |
1243 | ||
1244 | switch (code) | |
1245 | { | |
1246 | case REG: | |
1247 | case QUEUED: | |
1248 | case CONST_INT: | |
1249 | case CONST_DOUBLE: | |
1250 | case SYMBOL_REF: | |
1251 | case CODE_LABEL: | |
1252 | case PC: | |
1253 | case CC0: | |
1254 | return; | |
1255 | ||
1256 | case INSN: | |
1257 | case JUMP_INSN: | |
1258 | case CALL_INSN: | |
1259 | case NOTE: | |
1260 | case LABEL_REF: | |
1261 | case BARRIER: | |
1262 | /* The chain of insns is not being copied. */ | |
1263 | return; | |
1264 | } | |
1265 | ||
1266 | x->used = 0; | |
1267 | ||
1268 | format_ptr = GET_RTX_FORMAT (code); | |
1269 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1270 | { | |
1271 | switch (*format_ptr++) | |
1272 | { | |
1273 | case 'e': | |
1274 | reset_used_flags (XEXP (x, i)); | |
1275 | break; | |
1276 | ||
1277 | case 'E': | |
1278 | for (j = 0; j < XVECLEN (x, i); j++) | |
1279 | reset_used_flags (XVECEXP (x, i, j)); | |
1280 | break; | |
1281 | } | |
1282 | } | |
1283 | } | |
1284 | \f | |
1285 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
1286 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
1287 | OTHER must be valid as a SET_DEST. */ | |
1288 | ||
1289 | rtx | |
1290 | make_safe_from (x, other) | |
1291 | rtx x, other; | |
1292 | { | |
1293 | while (1) | |
1294 | switch (GET_CODE (other)) | |
1295 | { | |
1296 | case SUBREG: | |
1297 | other = SUBREG_REG (other); | |
1298 | break; | |
1299 | case STRICT_LOW_PART: | |
1300 | case SIGN_EXTEND: | |
1301 | case ZERO_EXTEND: | |
1302 | other = XEXP (other, 0); | |
1303 | break; | |
1304 | default: | |
1305 | goto done; | |
1306 | } | |
1307 | done: | |
1308 | if ((GET_CODE (other) == MEM | |
1309 | && ! CONSTANT_P (x) | |
1310 | && GET_CODE (x) != REG | |
1311 | && GET_CODE (x) != SUBREG) | |
1312 | || (GET_CODE (other) == REG | |
1313 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
1314 | || reg_mentioned_p (other, x)))) | |
1315 | { | |
1316 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
1317 | emit_move_insn (temp, x); | |
1318 | return temp; | |
1319 | } | |
1320 | return x; | |
1321 | } | |
1322 | \f | |
1323 | /* Emission of insns (adding them to the doubly-linked list). */ | |
1324 | ||
1325 | /* Return the first insn of the current sequence or current function. */ | |
1326 | ||
1327 | rtx | |
1328 | get_insns () | |
1329 | { | |
1330 | return first_insn; | |
1331 | } | |
1332 | ||
1333 | /* Return the last insn emitted in current sequence or current function. */ | |
1334 | ||
1335 | rtx | |
1336 | get_last_insn () | |
1337 | { | |
1338 | return last_insn; | |
1339 | } | |
1340 | ||
1341 | /* Specify a new insn as the last in the chain. */ | |
1342 | ||
1343 | void | |
1344 | set_last_insn (insn) | |
1345 | rtx insn; | |
1346 | { | |
1347 | if (NEXT_INSN (insn) != 0) | |
1348 | abort (); | |
1349 | last_insn = insn; | |
1350 | } | |
1351 | ||
1352 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
1353 | ||
1354 | rtx | |
1355 | get_last_insn_anywhere () | |
1356 | { | |
1357 | struct sequence_stack *stack; | |
1358 | if (last_insn) | |
1359 | return last_insn; | |
1360 | for (stack = sequence_stack; stack; stack = stack->next) | |
1361 | if (stack->last != 0) | |
1362 | return stack->last; | |
1363 | return 0; | |
1364 | } | |
1365 | ||
1366 | /* Return a number larger than any instruction's uid in this function. */ | |
1367 | ||
1368 | int | |
1369 | get_max_uid () | |
1370 | { | |
1371 | return cur_insn_uid; | |
1372 | } | |
1373 | \f | |
1374 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
1375 | of the sequence. */ | |
1376 | ||
1377 | rtx | |
1378 | next_insn (insn) | |
1379 | rtx insn; | |
1380 | { | |
1381 | if (insn) | |
1382 | { | |
1383 | insn = NEXT_INSN (insn); | |
1384 | if (insn && GET_CODE (insn) == INSN | |
1385 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1386 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1387 | } | |
1388 | ||
1389 | return insn; | |
1390 | } | |
1391 | ||
1392 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
1393 | of the sequence. */ | |
1394 | ||
1395 | rtx | |
1396 | previous_insn (insn) | |
1397 | rtx insn; | |
1398 | { | |
1399 | if (insn) | |
1400 | { | |
1401 | insn = PREV_INSN (insn); | |
1402 | if (insn && GET_CODE (insn) == INSN | |
1403 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1404 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
1405 | } | |
1406 | ||
1407 | return insn; | |
1408 | } | |
1409 | ||
1410 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
1411 | look inside SEQUENCEs. */ | |
1412 | ||
1413 | rtx | |
1414 | next_nonnote_insn (insn) | |
1415 | rtx insn; | |
1416 | { | |
1417 | while (insn) | |
1418 | { | |
1419 | insn = NEXT_INSN (insn); | |
1420 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1421 | break; | |
1422 | } | |
1423 | ||
1424 | return insn; | |
1425 | } | |
1426 | ||
1427 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
1428 | not look inside SEQUENCEs. */ | |
1429 | ||
1430 | rtx | |
1431 | prev_nonnote_insn (insn) | |
1432 | rtx insn; | |
1433 | { | |
1434 | while (insn) | |
1435 | { | |
1436 | insn = PREV_INSN (insn); | |
1437 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1438 | break; | |
1439 | } | |
1440 | ||
1441 | return insn; | |
1442 | } | |
1443 | ||
1444 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
1445 | or 0, if there is none. This routine does not look inside | |
1446 | SEQUENCEs. */ | |
1447 | ||
1448 | rtx | |
1449 | next_real_insn (insn) | |
1450 | rtx insn; | |
1451 | { | |
1452 | while (insn) | |
1453 | { | |
1454 | insn = NEXT_INSN (insn); | |
1455 | if (insn == 0 || GET_CODE (insn) == INSN | |
1456 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
1457 | break; | |
1458 | } | |
1459 | ||
1460 | return insn; | |
1461 | } | |
1462 | ||
1463 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
1464 | or 0, if there is none. This routine does not look inside | |
1465 | SEQUENCEs. */ | |
1466 | ||
1467 | rtx | |
1468 | prev_real_insn (insn) | |
1469 | rtx insn; | |
1470 | { | |
1471 | while (insn) | |
1472 | { | |
1473 | insn = PREV_INSN (insn); | |
1474 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
1475 | || GET_CODE (insn) == JUMP_INSN) | |
1476 | break; | |
1477 | } | |
1478 | ||
1479 | return insn; | |
1480 | } | |
1481 | ||
1482 | /* Find the next insn after INSN that really does something. This routine | |
1483 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1484 | same as next_real_insn. */ | |
1485 | ||
1486 | rtx | |
1487 | next_active_insn (insn) | |
1488 | rtx insn; | |
1489 | { | |
1490 | while (insn) | |
1491 | { | |
1492 | insn = NEXT_INSN (insn); | |
1493 | if (insn == 0 | |
1494 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1495 | || (GET_CODE (insn) == INSN | |
1496 | && (! reload_completed | |
1497 | || (GET_CODE (PATTERN (insn)) != USE | |
1498 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
1499 | break; | |
1500 | } | |
1501 | ||
1502 | return insn; | |
1503 | } | |
1504 | ||
1505 | /* Find the last insn before INSN that really does something. This routine | |
1506 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1507 | same as prev_real_insn. */ | |
1508 | ||
1509 | rtx | |
1510 | prev_active_insn (insn) | |
1511 | rtx insn; | |
1512 | { | |
1513 | while (insn) | |
1514 | { | |
1515 | insn = PREV_INSN (insn); | |
1516 | if (insn == 0 | |
1517 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1518 | || (GET_CODE (insn) == INSN | |
1519 | && (! reload_completed | |
1520 | || (GET_CODE (PATTERN (insn)) != USE | |
1521 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
1522 | break; | |
1523 | } | |
1524 | ||
1525 | return insn; | |
1526 | } | |
1527 | ||
1528 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
1529 | ||
1530 | rtx | |
1531 | next_label (insn) | |
1532 | rtx insn; | |
1533 | { | |
1534 | while (insn) | |
1535 | { | |
1536 | insn = NEXT_INSN (insn); | |
1537 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
1538 | break; | |
1539 | } | |
1540 | ||
1541 | return insn; | |
1542 | } | |
1543 | ||
1544 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
1545 | ||
1546 | rtx | |
1547 | prev_label (insn) | |
1548 | rtx insn; | |
1549 | { | |
1550 | while (insn) | |
1551 | { | |
1552 | insn = PREV_INSN (insn); | |
1553 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
1554 | break; | |
1555 | } | |
1556 | ||
1557 | return insn; | |
1558 | } | |
1559 | \f | |
1560 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
1561 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
1562 | and REG_CC_USER notes so we can find it. */ | |
1563 | ||
1564 | void | |
1565 | link_cc0_insns (insn) | |
1566 | rtx insn; | |
1567 | { | |
1568 | rtx user = next_nonnote_insn (insn); | |
1569 | ||
1570 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
1571 | user = XVECEXP (PATTERN (user), 0, 0); | |
1572 | ||
1573 | REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn, | |
1574 | REG_NOTES (user)); | |
1575 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn)); | |
1576 | } | |
1577 | ||
23b2ce53 RS |
1578 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
1579 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
1580 | applied to the result of this function should yield INSN). | |
1581 | ||
1582 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
1583 | is present, it contains the insn that uses CC0. | |
1584 | ||
1585 | Return 0 if we can't find the insn. */ | |
1586 | ||
1587 | rtx | |
1588 | next_cc0_user (insn) | |
1589 | rtx insn; | |
1590 | { | |
906c4e36 | 1591 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
1592 | |
1593 | if (note) | |
1594 | return XEXP (note, 0); | |
1595 | ||
1596 | insn = next_nonnote_insn (insn); | |
1597 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1598 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1599 | ||
1600 | if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
1601 | && reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
1602 | return insn; | |
1603 | ||
1604 | return 0; | |
1605 | } | |
1606 | ||
1607 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
1608 | note, it is the previous insn. */ | |
1609 | ||
1610 | rtx | |
1611 | prev_cc0_setter (insn) | |
1612 | rtx insn; | |
1613 | { | |
906c4e36 | 1614 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
1615 | rtx link; |
1616 | ||
1617 | if (note) | |
1618 | return XEXP (note, 0); | |
1619 | ||
1620 | insn = prev_nonnote_insn (insn); | |
1621 | if (! sets_cc0_p (PATTERN (insn))) | |
1622 | abort (); | |
1623 | ||
1624 | return insn; | |
1625 | } | |
1626 | #endif | |
1627 | \f | |
1628 | /* Try splitting insns that can be split for better scheduling. | |
1629 | PAT is the pattern which might split. | |
1630 | TRIAL is the insn providing PAT. | |
1631 | BACKWARDS is non-zero if we are scanning insns from last to first. | |
1632 | ||
1633 | If this routine succeeds in splitting, it returns the first or last | |
1634 | replacement insn depending on the value of BACKWARDS. Otherwise, it | |
1635 | returns TRIAL. If the insn to be returned can be split, it will be. */ | |
1636 | ||
1637 | rtx | |
1638 | try_split (pat, trial, backwards) | |
1639 | rtx pat, trial; | |
1640 | int backwards; | |
1641 | { | |
1642 | rtx before = PREV_INSN (trial); | |
1643 | rtx after = NEXT_INSN (trial); | |
1644 | rtx seq = split_insns (pat, trial); | |
1645 | int has_barrier = 0; | |
1646 | rtx tem; | |
1647 | ||
1648 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
1649 | We may need to handle this specially. */ | |
1650 | if (after && GET_CODE (after) == BARRIER) | |
1651 | { | |
1652 | has_barrier = 1; | |
1653 | after = NEXT_INSN (after); | |
1654 | } | |
1655 | ||
1656 | if (seq) | |
1657 | { | |
1658 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
1659 | The latter case will normally arise only when being done so that | |
1660 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
1661 | if (GET_CODE (seq) == SEQUENCE) | |
1662 | { | |
1663 | /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in | |
1664 | SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, | |
1665 | increment the usage count so we don't delete the label. */ | |
1666 | int i; | |
1667 | ||
1668 | if (GET_CODE (trial) == JUMP_INSN) | |
1669 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
1670 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
1671 | { | |
1672 | JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); | |
1673 | ||
1674 | if (JUMP_LABEL (trial)) | |
1675 | LABEL_NUSES (JUMP_LABEL (trial))++; | |
1676 | } | |
1677 | ||
1678 | tem = emit_insn_after (seq, before); | |
1679 | ||
1680 | delete_insn (trial); | |
1681 | if (has_barrier) | |
1682 | emit_barrier_after (tem); | |
1683 | } | |
1684 | /* Avoid infinite loop if the result matches the original pattern. */ | |
1685 | else if (rtx_equal_p (seq, pat)) | |
1686 | return trial; | |
1687 | else | |
1688 | { | |
1689 | PATTERN (trial) = seq; | |
1690 | INSN_CODE (trial) = -1; | |
1691 | } | |
1692 | ||
1693 | /* Set TEM to the insn we should return. */ | |
1694 | tem = backwards ? prev_active_insn (after) : next_active_insn (before); | |
1695 | return try_split (PATTERN (tem), tem, backwards); | |
1696 | } | |
1697 | ||
1698 | return trial; | |
1699 | } | |
1700 | \f | |
1701 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 1702 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
1703 | |
1704 | rtx | |
4b1f5e8c | 1705 | make_insn_raw (pattern) |
23b2ce53 | 1706 | rtx pattern; |
23b2ce53 RS |
1707 | { |
1708 | register rtx insn; | |
1709 | ||
1710 | insn = rtx_alloc(INSN); | |
1711 | INSN_UID(insn) = cur_insn_uid++; | |
1712 | ||
1713 | PATTERN (insn) = pattern; | |
1714 | INSN_CODE (insn) = -1; | |
1715 | LOG_LINKS(insn) = NULL; | |
1716 | REG_NOTES(insn) = NULL; | |
1717 | ||
1718 | return insn; | |
1719 | } | |
1720 | ||
1721 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
1722 | ||
1723 | static rtx | |
4b1f5e8c | 1724 | make_jump_insn_raw (pattern) |
23b2ce53 | 1725 | rtx pattern; |
23b2ce53 RS |
1726 | { |
1727 | register rtx insn; | |
1728 | ||
4b1f5e8c | 1729 | insn = rtx_alloc (JUMP_INSN); |
23b2ce53 RS |
1730 | INSN_UID(insn) = cur_insn_uid++; |
1731 | ||
1732 | PATTERN (insn) = pattern; | |
1733 | INSN_CODE (insn) = -1; | |
1734 | LOG_LINKS(insn) = NULL; | |
1735 | REG_NOTES(insn) = NULL; | |
1736 | JUMP_LABEL(insn) = NULL; | |
1737 | ||
1738 | return insn; | |
1739 | } | |
1740 | \f | |
1741 | /* Add INSN to the end of the doubly-linked list. | |
1742 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
1743 | ||
1744 | void | |
1745 | add_insn (insn) | |
1746 | register rtx insn; | |
1747 | { | |
1748 | PREV_INSN (insn) = last_insn; | |
1749 | NEXT_INSN (insn) = 0; | |
1750 | ||
1751 | if (NULL != last_insn) | |
1752 | NEXT_INSN (last_insn) = insn; | |
1753 | ||
1754 | if (NULL == first_insn) | |
1755 | first_insn = insn; | |
1756 | ||
1757 | last_insn = insn; | |
1758 | } | |
1759 | ||
1760 | /* Add INSN into the doubly-linked list after insn AFTER. This should be the | |
1761 | only function called to insert an insn once delay slots have been filled | |
1762 | since only it knows how to update a SEQUENCE. */ | |
1763 | ||
1764 | void | |
1765 | add_insn_after (insn, after) | |
1766 | rtx insn, after; | |
1767 | { | |
1768 | rtx next = NEXT_INSN (after); | |
1769 | ||
1770 | NEXT_INSN (insn) = next; | |
1771 | PREV_INSN (insn) = after; | |
1772 | ||
1773 | if (next) | |
1774 | { | |
1775 | PREV_INSN (next) = insn; | |
1776 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
1777 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
1778 | } | |
1779 | else if (last_insn == after) | |
1780 | last_insn = insn; | |
1781 | else | |
1782 | { | |
1783 | struct sequence_stack *stack = sequence_stack; | |
1784 | /* Scan all pending sequences too. */ | |
1785 | for (; stack; stack = stack->next) | |
1786 | if (after == stack->last) | |
1787 | stack->last = insn; | |
1788 | } | |
1789 | ||
1790 | NEXT_INSN (after) = insn; | |
1791 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
1792 | { | |
1793 | rtx sequence = PATTERN (after); | |
1794 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
1795 | } | |
1796 | } | |
1797 | ||
1798 | /* Delete all insns made since FROM. | |
1799 | FROM becomes the new last instruction. */ | |
1800 | ||
1801 | void | |
1802 | delete_insns_since (from) | |
1803 | rtx from; | |
1804 | { | |
1805 | if (from == 0) | |
1806 | first_insn = 0; | |
1807 | else | |
1808 | NEXT_INSN (from) = 0; | |
1809 | last_insn = from; | |
1810 | } | |
1811 | ||
1812 | /* Move a consecutive bunch of insns to a different place in the chain. | |
1813 | The insns to be moved are those between FROM and TO. | |
1814 | They are moved to a new position after the insn AFTER. | |
1815 | AFTER must not be FROM or TO or any insn in between. | |
1816 | ||
1817 | This function does not know about SEQUENCEs and hence should not be | |
1818 | called after delay-slot filling has been done. */ | |
1819 | ||
1820 | void | |
1821 | reorder_insns (from, to, after) | |
1822 | rtx from, to, after; | |
1823 | { | |
1824 | /* Splice this bunch out of where it is now. */ | |
1825 | if (PREV_INSN (from)) | |
1826 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
1827 | if (NEXT_INSN (to)) | |
1828 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
1829 | if (last_insn == to) | |
1830 | last_insn = PREV_INSN (from); | |
1831 | if (first_insn == from) | |
1832 | first_insn = NEXT_INSN (to); | |
1833 | ||
1834 | /* Make the new neighbors point to it and it to them. */ | |
1835 | if (NEXT_INSN (after)) | |
1836 | PREV_INSN (NEXT_INSN (after)) = to; | |
1837 | ||
1838 | NEXT_INSN (to) = NEXT_INSN (after); | |
1839 | PREV_INSN (from) = after; | |
1840 | NEXT_INSN (after) = from; | |
1841 | if (after == last_insn) | |
1842 | last_insn = to; | |
1843 | } | |
1844 | ||
1845 | /* Return the line note insn preceding INSN. */ | |
1846 | ||
1847 | static rtx | |
1848 | find_line_note (insn) | |
1849 | rtx insn; | |
1850 | { | |
1851 | if (no_line_numbers) | |
1852 | return 0; | |
1853 | ||
1854 | for (; insn; insn = PREV_INSN (insn)) | |
1855 | if (GET_CODE (insn) == NOTE | |
1856 | && NOTE_LINE_NUMBER (insn) >= 0) | |
1857 | break; | |
1858 | ||
1859 | return insn; | |
1860 | } | |
1861 | ||
1862 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
1863 | of the moved insns when debugging. This may insert a note between AFTER | |
1864 | and FROM, and another one after TO. */ | |
1865 | ||
1866 | void | |
1867 | reorder_insns_with_line_notes (from, to, after) | |
1868 | rtx from, to, after; | |
1869 | { | |
1870 | rtx from_line = find_line_note (from); | |
1871 | rtx after_line = find_line_note (after); | |
1872 | ||
1873 | reorder_insns (from, to, after); | |
1874 | ||
1875 | if (from_line == after_line) | |
1876 | return; | |
1877 | ||
1878 | if (from_line) | |
1879 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
1880 | NOTE_LINE_NUMBER (from_line), | |
1881 | after); | |
1882 | if (after_line) | |
1883 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
1884 | NOTE_LINE_NUMBER (after_line), | |
1885 | to); | |
1886 | } | |
1887 | \f | |
1888 | /* Emit an insn of given code and pattern | |
1889 | at a specified place within the doubly-linked list. */ | |
1890 | ||
1891 | /* Make an instruction with body PATTERN | |
1892 | and output it before the instruction BEFORE. */ | |
1893 | ||
1894 | rtx | |
1895 | emit_insn_before (pattern, before) | |
1896 | register rtx pattern, before; | |
1897 | { | |
1898 | register rtx insn = before; | |
1899 | ||
1900 | if (GET_CODE (pattern) == SEQUENCE) | |
1901 | { | |
1902 | register int i; | |
1903 | ||
1904 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
1905 | { | |
1906 | insn = XVECEXP (pattern, 0, i); | |
1907 | add_insn_after (insn, PREV_INSN (before)); | |
1908 | } | |
1909 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
1910 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
1911 | } | |
1912 | else | |
1913 | { | |
4b1f5e8c | 1914 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
1915 | add_insn_after (insn, PREV_INSN (before)); |
1916 | } | |
1917 | ||
1918 | return insn; | |
1919 | } | |
1920 | ||
1921 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
1922 | and output it before the instruction BEFORE. */ | |
1923 | ||
1924 | rtx | |
1925 | emit_jump_insn_before (pattern, before) | |
1926 | register rtx pattern, before; | |
1927 | { | |
1928 | register rtx insn; | |
1929 | ||
1930 | if (GET_CODE (pattern) == SEQUENCE) | |
1931 | insn = emit_insn_before (pattern, before); | |
1932 | else | |
1933 | { | |
906c4e36 | 1934 | insn = make_jump_insn_raw (pattern, NULL_RTVEC); |
23b2ce53 RS |
1935 | add_insn_after (insn, PREV_INSN (before)); |
1936 | } | |
1937 | ||
1938 | return insn; | |
1939 | } | |
1940 | ||
1941 | /* Make an instruction with body PATTERN and code CALL_INSN | |
1942 | and output it before the instruction BEFORE. */ | |
1943 | ||
1944 | rtx | |
1945 | emit_call_insn_before (pattern, before) | |
1946 | register rtx pattern, before; | |
1947 | { | |
1948 | rtx insn = emit_insn_before (pattern, before); | |
1949 | PUT_CODE (insn, CALL_INSN); | |
1950 | return insn; | |
1951 | } | |
1952 | ||
1953 | /* Make an insn of code BARRIER | |
1954 | and output it before the insn AFTER. */ | |
1955 | ||
1956 | rtx | |
1957 | emit_barrier_before (before) | |
1958 | register rtx before; | |
1959 | { | |
1960 | register rtx insn = rtx_alloc (BARRIER); | |
1961 | ||
1962 | INSN_UID (insn) = cur_insn_uid++; | |
1963 | ||
1964 | add_insn_after (insn, PREV_INSN (before)); | |
1965 | return insn; | |
1966 | } | |
1967 | ||
1968 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ | |
1969 | ||
1970 | rtx | |
1971 | emit_note_before (subtype, before) | |
1972 | int subtype; | |
1973 | rtx before; | |
1974 | { | |
1975 | register rtx note = rtx_alloc (NOTE); | |
1976 | INSN_UID (note) = cur_insn_uid++; | |
1977 | NOTE_SOURCE_FILE (note) = 0; | |
1978 | NOTE_LINE_NUMBER (note) = subtype; | |
1979 | ||
1980 | add_insn_after (note, PREV_INSN (before)); | |
1981 | return note; | |
1982 | } | |
1983 | \f | |
1984 | /* Make an insn of code INSN with body PATTERN | |
1985 | and output it after the insn AFTER. */ | |
1986 | ||
1987 | rtx | |
1988 | emit_insn_after (pattern, after) | |
1989 | register rtx pattern, after; | |
1990 | { | |
1991 | register rtx insn = after; | |
1992 | ||
1993 | if (GET_CODE (pattern) == SEQUENCE) | |
1994 | { | |
1995 | register int i; | |
1996 | ||
1997 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
1998 | { | |
1999 | insn = XVECEXP (pattern, 0, i); | |
2000 | add_insn_after (insn, after); | |
2001 | after = insn; | |
2002 | } | |
2003 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2004 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2005 | } | |
2006 | else | |
2007 | { | |
4b1f5e8c | 2008 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2009 | add_insn_after (insn, after); |
2010 | } | |
2011 | ||
2012 | return insn; | |
2013 | } | |
2014 | ||
2015 | /* Make an insn of code JUMP_INSN with body PATTERN | |
2016 | and output it after the insn AFTER. */ | |
2017 | ||
2018 | rtx | |
2019 | emit_jump_insn_after (pattern, after) | |
2020 | register rtx pattern, after; | |
2021 | { | |
2022 | register rtx insn; | |
2023 | ||
2024 | if (GET_CODE (pattern) == SEQUENCE) | |
2025 | insn = emit_insn_after (pattern, after); | |
2026 | else | |
2027 | { | |
906c4e36 | 2028 | insn = make_jump_insn_raw (pattern, NULL_RTVEC); |
23b2ce53 RS |
2029 | add_insn_after (insn, after); |
2030 | } | |
2031 | ||
2032 | return insn; | |
2033 | } | |
2034 | ||
2035 | /* Make an insn of code BARRIER | |
2036 | and output it after the insn AFTER. */ | |
2037 | ||
2038 | rtx | |
2039 | emit_barrier_after (after) | |
2040 | register rtx after; | |
2041 | { | |
2042 | register rtx insn = rtx_alloc (BARRIER); | |
2043 | ||
2044 | INSN_UID (insn) = cur_insn_uid++; | |
2045 | ||
2046 | add_insn_after (insn, after); | |
2047 | return insn; | |
2048 | } | |
2049 | ||
2050 | /* Emit the label LABEL after the insn AFTER. */ | |
2051 | ||
2052 | rtx | |
2053 | emit_label_after (label, after) | |
2054 | rtx label, after; | |
2055 | { | |
2056 | /* This can be called twice for the same label | |
2057 | as a result of the confusion that follows a syntax error! | |
2058 | So make it harmless. */ | |
2059 | if (INSN_UID (label) == 0) | |
2060 | { | |
2061 | INSN_UID (label) = cur_insn_uid++; | |
2062 | add_insn_after (label, after); | |
2063 | } | |
2064 | ||
2065 | return label; | |
2066 | } | |
2067 | ||
2068 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
2069 | ||
2070 | rtx | |
2071 | emit_note_after (subtype, after) | |
2072 | int subtype; | |
2073 | rtx after; | |
2074 | { | |
2075 | register rtx note = rtx_alloc (NOTE); | |
2076 | INSN_UID (note) = cur_insn_uid++; | |
2077 | NOTE_SOURCE_FILE (note) = 0; | |
2078 | NOTE_LINE_NUMBER (note) = subtype; | |
2079 | add_insn_after (note, after); | |
2080 | return note; | |
2081 | } | |
2082 | ||
2083 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
2084 | ||
2085 | rtx | |
2086 | emit_line_note_after (file, line, after) | |
2087 | char *file; | |
2088 | int line; | |
2089 | rtx after; | |
2090 | { | |
2091 | register rtx note; | |
2092 | ||
2093 | if (no_line_numbers && line > 0) | |
2094 | { | |
2095 | cur_insn_uid++; | |
2096 | return 0; | |
2097 | } | |
2098 | ||
2099 | note = rtx_alloc (NOTE); | |
2100 | INSN_UID (note) = cur_insn_uid++; | |
2101 | NOTE_SOURCE_FILE (note) = file; | |
2102 | NOTE_LINE_NUMBER (note) = line; | |
2103 | add_insn_after (note, after); | |
2104 | return note; | |
2105 | } | |
2106 | \f | |
2107 | /* Make an insn of code INSN with pattern PATTERN | |
2108 | and add it to the end of the doubly-linked list. | |
2109 | If PATTERN is a SEQUENCE, take the elements of it | |
2110 | and emit an insn for each element. | |
2111 | ||
2112 | Returns the last insn emitted. */ | |
2113 | ||
2114 | rtx | |
2115 | emit_insn (pattern) | |
2116 | rtx pattern; | |
2117 | { | |
2118 | rtx insn = last_insn; | |
2119 | ||
2120 | if (GET_CODE (pattern) == SEQUENCE) | |
2121 | { | |
2122 | register int i; | |
2123 | ||
2124 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2125 | { | |
2126 | insn = XVECEXP (pattern, 0, i); | |
2127 | add_insn (insn); | |
2128 | } | |
2129 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2130 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2131 | } | |
2132 | else | |
2133 | { | |
4b1f5e8c | 2134 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2135 | add_insn (insn); |
2136 | } | |
2137 | ||
2138 | return insn; | |
2139 | } | |
2140 | ||
2141 | /* Emit the insns in a chain starting with INSN. | |
2142 | Return the last insn emitted. */ | |
2143 | ||
2144 | rtx | |
2145 | emit_insns (insn) | |
2146 | rtx insn; | |
2147 | { | |
2148 | rtx last = 0; | |
2149 | ||
2150 | while (insn) | |
2151 | { | |
2152 | rtx next = NEXT_INSN (insn); | |
2153 | add_insn (insn); | |
2154 | last = insn; | |
2155 | insn = next; | |
2156 | } | |
2157 | ||
2158 | return last; | |
2159 | } | |
2160 | ||
2161 | /* Emit the insns in a chain starting with INSN and place them in front of | |
2162 | the insn BEFORE. Return the last insn emitted. */ | |
2163 | ||
2164 | rtx | |
2165 | emit_insns_before (insn, before) | |
2166 | rtx insn; | |
2167 | rtx before; | |
2168 | { | |
2169 | rtx last = 0; | |
2170 | ||
2171 | while (insn) | |
2172 | { | |
2173 | rtx next = NEXT_INSN (insn); | |
2174 | add_insn_after (insn, PREV_INSN (before)); | |
2175 | last = insn; | |
2176 | insn = next; | |
2177 | } | |
2178 | ||
2179 | return last; | |
2180 | } | |
2181 | ||
2182 | /* Make an insn of code JUMP_INSN with pattern PATTERN | |
2183 | and add it to the end of the doubly-linked list. */ | |
2184 | ||
2185 | rtx | |
2186 | emit_jump_insn (pattern) | |
2187 | rtx pattern; | |
2188 | { | |
2189 | if (GET_CODE (pattern) == SEQUENCE) | |
2190 | return emit_insn (pattern); | |
2191 | else | |
2192 | { | |
906c4e36 | 2193 | register rtx insn = make_jump_insn_raw (pattern, NULL_RTVEC); |
23b2ce53 RS |
2194 | add_insn (insn); |
2195 | return insn; | |
2196 | } | |
2197 | } | |
2198 | ||
2199 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
2200 | and add it to the end of the doubly-linked list. */ | |
2201 | ||
2202 | rtx | |
2203 | emit_call_insn (pattern) | |
2204 | rtx pattern; | |
2205 | { | |
2206 | if (GET_CODE (pattern) == SEQUENCE) | |
2207 | return emit_insn (pattern); | |
2208 | else | |
2209 | { | |
4b1f5e8c | 2210 | register rtx insn = make_insn_raw (pattern); |
23b2ce53 RS |
2211 | add_insn (insn); |
2212 | PUT_CODE (insn, CALL_INSN); | |
2213 | return insn; | |
2214 | } | |
2215 | } | |
2216 | ||
2217 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
2218 | ||
2219 | rtx | |
2220 | emit_label (label) | |
2221 | rtx label; | |
2222 | { | |
2223 | /* This can be called twice for the same label | |
2224 | as a result of the confusion that follows a syntax error! | |
2225 | So make it harmless. */ | |
2226 | if (INSN_UID (label) == 0) | |
2227 | { | |
2228 | INSN_UID (label) = cur_insn_uid++; | |
2229 | add_insn (label); | |
2230 | } | |
2231 | return label; | |
2232 | } | |
2233 | ||
2234 | /* Make an insn of code BARRIER | |
2235 | and add it to the end of the doubly-linked list. */ | |
2236 | ||
2237 | rtx | |
2238 | emit_barrier () | |
2239 | { | |
2240 | register rtx barrier = rtx_alloc (BARRIER); | |
2241 | INSN_UID (barrier) = cur_insn_uid++; | |
2242 | add_insn (barrier); | |
2243 | return barrier; | |
2244 | } | |
2245 | ||
2246 | /* Make an insn of code NOTE | |
2247 | with data-fields specified by FILE and LINE | |
2248 | and add it to the end of the doubly-linked list, | |
2249 | but only if line-numbers are desired for debugging info. */ | |
2250 | ||
2251 | rtx | |
2252 | emit_line_note (file, line) | |
2253 | char *file; | |
2254 | int line; | |
2255 | { | |
2256 | emit_filename = file; | |
2257 | emit_lineno = line; | |
2258 | ||
2259 | #if 0 | |
2260 | if (no_line_numbers) | |
2261 | return 0; | |
2262 | #endif | |
2263 | ||
2264 | return emit_note (file, line); | |
2265 | } | |
2266 | ||
2267 | /* Make an insn of code NOTE | |
2268 | with data-fields specified by FILE and LINE | |
2269 | and add it to the end of the doubly-linked list. | |
2270 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
2271 | ||
2272 | rtx | |
2273 | emit_note (file, line) | |
2274 | char *file; | |
2275 | int line; | |
2276 | { | |
2277 | register rtx note; | |
2278 | ||
2279 | if (line > 0) | |
2280 | { | |
2281 | if (file && last_filename && !strcmp (file, last_filename) | |
2282 | && line == last_linenum) | |
2283 | return 0; | |
2284 | last_filename = file; | |
2285 | last_linenum = line; | |
2286 | } | |
2287 | ||
2288 | if (no_line_numbers && line > 0) | |
2289 | { | |
2290 | cur_insn_uid++; | |
2291 | return 0; | |
2292 | } | |
2293 | ||
2294 | note = rtx_alloc (NOTE); | |
2295 | INSN_UID (note) = cur_insn_uid++; | |
2296 | NOTE_SOURCE_FILE (note) = file; | |
2297 | NOTE_LINE_NUMBER (note) = line; | |
2298 | add_insn (note); | |
2299 | return note; | |
2300 | } | |
2301 | ||
2302 | /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ | |
2303 | ||
2304 | rtx | |
2305 | emit_line_note_force (file, line) | |
2306 | char *file; | |
2307 | int line; | |
2308 | { | |
2309 | last_linenum = -1; | |
2310 | return emit_line_note (file, line); | |
2311 | } | |
2312 | ||
2313 | /* Cause next statement to emit a line note even if the line number | |
2314 | has not changed. This is used at the beginning of a function. */ | |
2315 | ||
2316 | void | |
2317 | force_next_line_note () | |
2318 | { | |
2319 | last_linenum = -1; | |
2320 | } | |
2321 | \f | |
2322 | /* Return an indication of which type of insn should have X as a body. | |
2323 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
2324 | ||
2325 | enum rtx_code | |
2326 | classify_insn (x) | |
2327 | rtx x; | |
2328 | { | |
2329 | if (GET_CODE (x) == CODE_LABEL) | |
2330 | return CODE_LABEL; | |
2331 | if (GET_CODE (x) == CALL) | |
2332 | return CALL_INSN; | |
2333 | if (GET_CODE (x) == RETURN) | |
2334 | return JUMP_INSN; | |
2335 | if (GET_CODE (x) == SET) | |
2336 | { | |
2337 | if (SET_DEST (x) == pc_rtx) | |
2338 | return JUMP_INSN; | |
2339 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
2340 | return CALL_INSN; | |
2341 | else | |
2342 | return INSN; | |
2343 | } | |
2344 | if (GET_CODE (x) == PARALLEL) | |
2345 | { | |
2346 | register int j; | |
2347 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) | |
2348 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
2349 | return CALL_INSN; | |
2350 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
2351 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
2352 | return JUMP_INSN; | |
2353 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
2354 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
2355 | return CALL_INSN; | |
2356 | } | |
2357 | return INSN; | |
2358 | } | |
2359 | ||
2360 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
2361 | If X is a label, it is simply added into the insn chain. */ | |
2362 | ||
2363 | rtx | |
2364 | emit (x) | |
2365 | rtx x; | |
2366 | { | |
2367 | enum rtx_code code = classify_insn (x); | |
2368 | ||
2369 | if (code == CODE_LABEL) | |
2370 | return emit_label (x); | |
2371 | else if (code == INSN) | |
2372 | return emit_insn (x); | |
2373 | else if (code == JUMP_INSN) | |
2374 | { | |
2375 | register rtx insn = emit_jump_insn (x); | |
2376 | if (simplejump_p (insn) || GET_CODE (x) == RETURN) | |
2377 | return emit_barrier (); | |
2378 | return insn; | |
2379 | } | |
2380 | else if (code == CALL_INSN) | |
2381 | return emit_call_insn (x); | |
2382 | else | |
2383 | abort (); | |
2384 | } | |
2385 | \f | |
2386 | /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ | |
2387 | ||
2388 | void | |
2389 | start_sequence () | |
2390 | { | |
2391 | struct sequence_stack *tem; | |
2392 | ||
2393 | if (sequence_element_free_list) | |
2394 | { | |
2395 | /* Reuse a previously-saved struct sequence_stack. */ | |
2396 | tem = sequence_element_free_list; | |
2397 | sequence_element_free_list = tem->next; | |
2398 | } | |
2399 | else | |
2400 | tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); | |
2401 | ||
2402 | tem->next = sequence_stack; | |
2403 | tem->first = first_insn; | |
2404 | tem->last = last_insn; | |
2405 | ||
2406 | sequence_stack = tem; | |
2407 | ||
2408 | first_insn = 0; | |
2409 | last_insn = 0; | |
2410 | } | |
2411 | ||
2412 | /* Set up the insn chain starting with FIRST | |
2413 | as the current sequence, saving the previously current one. */ | |
2414 | ||
2415 | void | |
2416 | push_to_sequence (first) | |
2417 | rtx first; | |
2418 | { | |
2419 | rtx last; | |
2420 | ||
2421 | start_sequence (); | |
2422 | ||
2423 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
2424 | ||
2425 | first_insn = first; | |
2426 | last_insn = last; | |
2427 | } | |
2428 | ||
2429 | /* After emitting to a sequence, restore previous saved state. | |
2430 | ||
2431 | To get the contents of the sequence just made, | |
2432 | you must call `gen_sequence' *before* calling here. */ | |
2433 | ||
2434 | void | |
2435 | end_sequence () | |
2436 | { | |
2437 | struct sequence_stack *tem = sequence_stack; | |
2438 | ||
2439 | first_insn = tem->first; | |
2440 | last_insn = tem->last; | |
2441 | sequence_stack = tem->next; | |
2442 | ||
2443 | tem->next = sequence_element_free_list; | |
2444 | sequence_element_free_list = tem; | |
2445 | } | |
2446 | ||
2447 | /* Return 1 if currently emitting into a sequence. */ | |
2448 | ||
2449 | int | |
2450 | in_sequence_p () | |
2451 | { | |
2452 | return sequence_stack != 0; | |
2453 | } | |
2454 | ||
2455 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
2456 | to the current sequence. | |
2457 | ||
2458 | This is how the gen_... function from a DEFINE_EXPAND | |
2459 | constructs the SEQUENCE that it returns. */ | |
2460 | ||
2461 | rtx | |
2462 | gen_sequence () | |
2463 | { | |
2464 | rtx result; | |
2465 | rtx tem; | |
2466 | rtvec newvec; | |
2467 | int i; | |
2468 | int len; | |
2469 | ||
2470 | /* Count the insns in the chain. */ | |
2471 | len = 0; | |
2472 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
2473 | len++; | |
2474 | ||
2475 | /* If only one insn, return its pattern rather than a SEQUENCE. | |
2476 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing | |
2477 | the case of an empty list.) */ | |
2478 | if (len == 1 | |
2479 | && (GET_CODE (first_insn) == INSN | |
2480 | || GET_CODE (first_insn) == JUMP_INSN | |
2481 | || GET_CODE (first_insn) == CALL_INSN)) | |
2482 | return PATTERN (first_insn); | |
2483 | ||
2484 | /* Put them in a vector. See if we already have a SEQUENCE of the | |
2485 | appropriate length around. */ | |
2486 | if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) | |
2487 | sequence_result[len] = 0; | |
2488 | else | |
2489 | { | |
2490 | /* Ensure that this rtl goes in saveable_obstack, since we may be | |
2491 | caching it. */ | |
2492 | int in_current_obstack = rtl_in_saveable_obstack (); | |
2493 | result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len)); | |
2494 | if (in_current_obstack) | |
2495 | rtl_in_current_obstack (); | |
2496 | } | |
2497 | ||
2498 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
2499 | XVECEXP (result, 0, i) = tem; | |
2500 | ||
2501 | return result; | |
2502 | } | |
2503 | \f | |
2504 | /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag | |
2505 | according to the chain of insns starting with FIRST. | |
2506 | ||
2507 | Also set cur_insn_uid to exceed the largest uid in that chain. | |
2508 | ||
2509 | This is used when an inline function's rtl is saved | |
2510 | and passed to rest_of_compilation later. */ | |
2511 | ||
2512 | static void restore_reg_data_1 (); | |
2513 | ||
2514 | void | |
2515 | restore_reg_data (first) | |
2516 | rtx first; | |
2517 | { | |
2518 | register rtx insn; | |
2519 | int i; | |
2520 | register int max_uid = 0; | |
2521 | ||
2522 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2523 | { | |
2524 | if (INSN_UID (insn) >= max_uid) | |
2525 | max_uid = INSN_UID (insn); | |
2526 | ||
2527 | switch (GET_CODE (insn)) | |
2528 | { | |
2529 | case NOTE: | |
2530 | case CODE_LABEL: | |
2531 | case BARRIER: | |
2532 | break; | |
2533 | ||
2534 | case JUMP_INSN: | |
2535 | case CALL_INSN: | |
2536 | case INSN: | |
2537 | restore_reg_data_1 (PATTERN (insn)); | |
2538 | break; | |
2539 | } | |
2540 | } | |
2541 | ||
2542 | /* Don't duplicate the uids already in use. */ | |
2543 | cur_insn_uid = max_uid + 1; | |
2544 | ||
2545 | /* If any regs are missing, make them up. | |
2546 | ||
2547 | ??? word_mode is not necessarily the right mode. Most likely these REGs | |
2548 | are never used. At some point this should be checked. */ | |
2549 | ||
2550 | for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++) | |
2551 | if (regno_reg_rtx[i] == 0) | |
2552 | regno_reg_rtx[i] = gen_rtx (REG, word_mode, i); | |
2553 | } | |
2554 | ||
2555 | static void | |
2556 | restore_reg_data_1 (orig) | |
2557 | rtx orig; | |
2558 | { | |
2559 | register rtx x = orig; | |
2560 | register int i; | |
2561 | register enum rtx_code code; | |
2562 | register char *format_ptr; | |
2563 | ||
2564 | code = GET_CODE (x); | |
2565 | ||
2566 | switch (code) | |
2567 | { | |
2568 | case QUEUED: | |
2569 | case CONST_INT: | |
2570 | case CONST_DOUBLE: | |
2571 | case SYMBOL_REF: | |
2572 | case CODE_LABEL: | |
2573 | case PC: | |
2574 | case CC0: | |
2575 | case LABEL_REF: | |
2576 | return; | |
2577 | ||
2578 | case REG: | |
2579 | if (REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
2580 | { | |
2581 | /* Make sure regno_pointer_flag and regno_reg_rtx are large | |
2582 | enough to have an element for this pseudo reg number. */ | |
2583 | if (REGNO (x) >= reg_rtx_no) | |
2584 | { | |
2585 | reg_rtx_no = REGNO (x); | |
2586 | ||
2587 | if (reg_rtx_no >= regno_pointer_flag_length) | |
2588 | { | |
2589 | int newlen = MAX (regno_pointer_flag_length * 2, | |
2590 | reg_rtx_no + 30); | |
2591 | rtx *new1; | |
2592 | char *new = (char *) oballoc (newlen); | |
2593 | bzero (new, newlen); | |
2594 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); | |
2595 | ||
2596 | new1 = (rtx *) oballoc (newlen * sizeof (rtx)); | |
2597 | bzero (new1, newlen * sizeof (rtx)); | |
2598 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); | |
2599 | ||
2600 | regno_pointer_flag = new; | |
2601 | regno_reg_rtx = new1; | |
2602 | regno_pointer_flag_length = newlen; | |
2603 | } | |
2604 | reg_rtx_no ++; | |
2605 | } | |
2606 | regno_reg_rtx[REGNO (x)] = x; | |
2607 | } | |
2608 | return; | |
2609 | ||
2610 | case MEM: | |
2611 | if (GET_CODE (XEXP (x, 0)) == REG) | |
2612 | mark_reg_pointer (XEXP (x, 0)); | |
2613 | restore_reg_data_1 (XEXP (x, 0)); | |
2614 | return; | |
2615 | } | |
2616 | ||
2617 | /* Now scan the subexpressions recursively. */ | |
2618 | ||
2619 | format_ptr = GET_RTX_FORMAT (code); | |
2620 | ||
2621 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2622 | { | |
2623 | switch (*format_ptr++) | |
2624 | { | |
2625 | case 'e': | |
2626 | restore_reg_data_1 (XEXP (x, i)); | |
2627 | break; | |
2628 | ||
2629 | case 'E': | |
2630 | if (XVEC (x, i) != NULL) | |
2631 | { | |
2632 | register int j; | |
2633 | ||
2634 | for (j = 0; j < XVECLEN (x, i); j++) | |
2635 | restore_reg_data_1 (XVECEXP (x, i, j)); | |
2636 | } | |
2637 | break; | |
2638 | } | |
2639 | } | |
2640 | } | |
2641 | \f | |
2642 | /* Initialize data structures and variables in this file | |
2643 | before generating rtl for each function. */ | |
2644 | ||
2645 | void | |
2646 | init_emit () | |
2647 | { | |
2648 | int i; | |
2649 | ||
2650 | first_insn = NULL; | |
2651 | last_insn = NULL; | |
2652 | cur_insn_uid = 1; | |
2653 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
2654 | last_linenum = 0; | |
2655 | last_filename = 0; | |
2656 | first_label_num = label_num; | |
2657 | last_label_num = 0; | |
2658 | ||
2659 | /* Clear the start_sequence/gen_sequence cache. */ | |
2660 | sequence_element_free_list = 0; | |
2661 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
2662 | sequence_result[i] = 0; | |
2663 | ||
2664 | /* Init the tables that describe all the pseudo regs. */ | |
2665 | ||
2666 | regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; | |
2667 | ||
2668 | regno_pointer_flag | |
2669 | = (char *) oballoc (regno_pointer_flag_length); | |
2670 | bzero (regno_pointer_flag, regno_pointer_flag_length); | |
2671 | ||
2672 | regno_reg_rtx | |
2673 | = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); | |
2674 | bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); | |
2675 | ||
2676 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
2677 | regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
2678 | regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
2679 | regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
2680 | regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
740ab4a2 RK |
2681 | |
2682 | /* Indicate that the virtual registers and stack locations are | |
2683 | all pointers. */ | |
2684 | REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; | |
2685 | REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; | |
2686 | REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; | |
2687 | ||
2688 | REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; | |
2689 | REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; | |
2690 | REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; | |
2691 | REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; | |
23b2ce53 RS |
2692 | } |
2693 | ||
2694 | /* Create some permanent unique rtl objects shared between all functions. | |
2695 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
2696 | ||
2697 | void | |
2698 | init_emit_once (line_numbers) | |
2699 | int line_numbers; | |
2700 | { | |
2701 | int i; | |
2702 | enum machine_mode mode; | |
2703 | ||
2704 | no_line_numbers = ! line_numbers; | |
2705 | ||
2706 | sequence_stack = NULL; | |
2707 | ||
2708 | /* Create the unique rtx's for certain rtx codes and operand values. */ | |
2709 | ||
2710 | pc_rtx = gen_rtx (PC, VOIDmode); | |
2711 | cc0_rtx = gen_rtx (CC0, VOIDmode); | |
2712 | ||
2713 | /* Don't use gen_rtx here since gen_rtx in this case | |
2714 | tries to use these variables. */ | |
2715 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) | |
2716 | { | |
2717 | const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT); | |
2718 | PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); | |
2719 | INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; | |
2720 | } | |
2721 | ||
2722 | /* These four calls obtain some of the rtx expressions made above. */ | |
906c4e36 RK |
2723 | const0_rtx = GEN_INT (0); |
2724 | const1_rtx = GEN_INT (1); | |
2725 | const2_rtx = GEN_INT (2); | |
2726 | constm1_rtx = GEN_INT (-1); | |
23b2ce53 RS |
2727 | |
2728 | /* This will usually be one of the above constants, but may be a new rtx. */ | |
906c4e36 | 2729 | const_true_rtx = GEN_INT (STORE_FLAG_VALUE); |
23b2ce53 RS |
2730 | |
2731 | dconst0 = REAL_VALUE_ATOF ("0"); | |
2732 | dconst1 = REAL_VALUE_ATOF ("1"); | |
2733 | dconst2 = REAL_VALUE_ATOF ("2"); | |
2734 | dconstm1 = REAL_VALUE_ATOF ("-1"); | |
2735 | ||
2736 | for (i = 0; i <= 2; i++) | |
2737 | { | |
2738 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
2739 | mode = GET_MODE_WIDER_MODE (mode)) | |
2740 | { | |
2741 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
2742 | union real_extract u; | |
2743 | ||
2744 | bzero (&u, sizeof u); /* Zero any holes in a structure. */ | |
2745 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; | |
2746 | ||
2747 | bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u); | |
2748 | CONST_DOUBLE_MEM (tem) = cc0_rtx; | |
2749 | PUT_MODE (tem, mode); | |
2750 | ||
2751 | const_tiny_rtx[i][(int) mode] = tem; | |
2752 | } | |
2753 | ||
906c4e36 | 2754 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
2755 | |
2756 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
2757 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 2758 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
23b2ce53 RS |
2759 | } |
2760 | ||
2761 | stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); | |
2762 | frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM); | |
2763 | ||
2764 | if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) | |
2765 | arg_pointer_rtx = frame_pointer_rtx; | |
2766 | else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM) | |
2767 | arg_pointer_rtx = stack_pointer_rtx; | |
2768 | else | |
2769 | arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM); | |
2770 | ||
2771 | /* Create the virtual registers. Do so here since the following objects | |
2772 | might reference them. */ | |
2773 | ||
2774 | virtual_incoming_args_rtx = gen_rtx (REG, Pmode, | |
2775 | VIRTUAL_INCOMING_ARGS_REGNUM); | |
2776 | virtual_stack_vars_rtx = gen_rtx (REG, Pmode, | |
2777 | VIRTUAL_STACK_VARS_REGNUM); | |
2778 | virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode, | |
2779 | VIRTUAL_STACK_DYNAMIC_REGNUM); | |
2780 | virtual_outgoing_args_rtx = gen_rtx (REG, Pmode, | |
2781 | VIRTUAL_OUTGOING_ARGS_REGNUM); | |
2782 | ||
2783 | #ifdef STRUCT_VALUE | |
2784 | struct_value_rtx = STRUCT_VALUE; | |
2785 | #else | |
2786 | struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM); | |
2787 | #endif | |
2788 | ||
2789 | #ifdef STRUCT_VALUE_INCOMING | |
2790 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
2791 | #else | |
2792 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
2793 | struct_value_incoming_rtx | |
2794 | = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM); | |
2795 | #else | |
2796 | struct_value_incoming_rtx = struct_value_rtx; | |
2797 | #endif | |
2798 | #endif | |
2799 | ||
2800 | #ifdef STATIC_CHAIN_REGNUM | |
2801 | static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); | |
2802 | ||
2803 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
2804 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
2805 | static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM); | |
2806 | else | |
2807 | #endif | |
2808 | static_chain_incoming_rtx = static_chain_rtx; | |
2809 | #endif | |
2810 | ||
2811 | #ifdef STATIC_CHAIN | |
2812 | static_chain_rtx = STATIC_CHAIN; | |
2813 | ||
2814 | #ifdef STATIC_CHAIN_INCOMING | |
2815 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
2816 | #else | |
2817 | static_chain_incoming_rtx = static_chain_rtx; | |
2818 | #endif | |
2819 | #endif | |
2820 | ||
2821 | #ifdef PIC_OFFSET_TABLE_REGNUM | |
2822 | pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM); | |
2823 | #endif | |
2824 | } |