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7afe21cc RK |
1 | /* Common subexpression elimination for GNU compiler. |
2 | Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | #include "config.h" | |
22 | #include "rtl.h" | |
23 | #include "regs.h" | |
24 | #include "hard-reg-set.h" | |
25 | #include "flags.h" | |
26 | #include "real.h" | |
27 | #include "insn-config.h" | |
28 | #include "recog.h" | |
29 | ||
30 | #include <stdio.h> | |
31 | #include <setjmp.h> | |
32 | ||
33 | /* The basic idea of common subexpression elimination is to go | |
34 | through the code, keeping a record of expressions that would | |
35 | have the same value at the current scan point, and replacing | |
36 | expressions encountered with the cheapest equivalent expression. | |
37 | ||
38 | It is too complicated to keep track of the different possibilities | |
39 | when control paths merge; so, at each label, we forget all that is | |
40 | known and start fresh. This can be described as processing each | |
41 | basic block separately. Note, however, that these are not quite | |
42 | the same as the basic blocks found by a later pass and used for | |
43 | data flow analysis and register packing. We do not need to start fresh | |
44 | after a conditional jump instruction if there is no label there. | |
45 | ||
46 | We use two data structures to record the equivalent expressions: | |
47 | a hash table for most expressions, and several vectors together | |
48 | with "quantity numbers" to record equivalent (pseudo) registers. | |
49 | ||
50 | The use of the special data structure for registers is desirable | |
51 | because it is faster. It is possible because registers references | |
52 | contain a fairly small number, the register number, taken from | |
53 | a contiguously allocated series, and two register references are | |
54 | identical if they have the same number. General expressions | |
55 | do not have any such thing, so the only way to retrieve the | |
56 | information recorded on an expression other than a register | |
57 | is to keep it in a hash table. | |
58 | ||
59 | Registers and "quantity numbers": | |
60 | ||
61 | At the start of each basic block, all of the (hardware and pseudo) | |
62 | registers used in the function are given distinct quantity | |
63 | numbers to indicate their contents. During scan, when the code | |
64 | copies one register into another, we copy the quantity number. | |
65 | When a register is loaded in any other way, we allocate a new | |
66 | quantity number to describe the value generated by this operation. | |
67 | `reg_qty' records what quantity a register is currently thought | |
68 | of as containing. | |
69 | ||
70 | All real quantity numbers are greater than or equal to `max_reg'. | |
71 | If register N has not been assigned a quantity, reg_qty[N] will equal N. | |
72 | ||
73 | Quantity numbers below `max_reg' do not exist and none of the `qty_...' | |
74 | variables should be referenced with an index below `max_reg'. | |
75 | ||
76 | We also maintain a bidirectional chain of registers for each | |
77 | quantity number. `qty_first_reg', `qty_last_reg', | |
78 | `reg_next_eqv' and `reg_prev_eqv' hold these chains. | |
79 | ||
80 | The first register in a chain is the one whose lifespan is least local. | |
81 | Among equals, it is the one that was seen first. | |
82 | We replace any equivalent register with that one. | |
83 | ||
84 | If two registers have the same quantity number, it must be true that | |
85 | REG expressions with `qty_mode' must be in the hash table for both | |
86 | registers and must be in the same class. | |
87 | ||
88 | The converse is not true. Since hard registers may be referenced in | |
89 | any mode, two REG expressions might be equivalent in the hash table | |
90 | but not have the same quantity number if the quantity number of one | |
91 | of the registers is not the same mode as those expressions. | |
92 | ||
93 | Constants and quantity numbers | |
94 | ||
95 | When a quantity has a known constant value, that value is stored | |
96 | in the appropriate element of qty_const. This is in addition to | |
97 | putting the constant in the hash table as is usual for non-regs. | |
98 | ||
d45cf215 | 99 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
100 | macro CONST_COSTS and will often depend on the constant value. In any |
101 | event, expressions containing constants can be simplified, by fold_rtx. | |
102 | ||
103 | When a quantity has a known nearly constant value (such as an address | |
104 | of a stack slot), that value is stored in the appropriate element | |
105 | of qty_const. | |
106 | ||
107 | Integer constants don't have a machine mode. However, cse | |
108 | determines the intended machine mode from the destination | |
109 | of the instruction that moves the constant. The machine mode | |
110 | is recorded in the hash table along with the actual RTL | |
111 | constant expression so that different modes are kept separate. | |
112 | ||
113 | Other expressions: | |
114 | ||
115 | To record known equivalences among expressions in general | |
116 | we use a hash table called `table'. It has a fixed number of buckets | |
117 | that contain chains of `struct table_elt' elements for expressions. | |
118 | These chains connect the elements whose expressions have the same | |
119 | hash codes. | |
120 | ||
121 | Other chains through the same elements connect the elements which | |
122 | currently have equivalent values. | |
123 | ||
124 | Register references in an expression are canonicalized before hashing | |
125 | the expression. This is done using `reg_qty' and `qty_first_reg'. | |
126 | The hash code of a register reference is computed using the quantity | |
127 | number, not the register number. | |
128 | ||
129 | When the value of an expression changes, it is necessary to remove from the | |
130 | hash table not just that expression but all expressions whose values | |
131 | could be different as a result. | |
132 | ||
133 | 1. If the value changing is in memory, except in special cases | |
134 | ANYTHING referring to memory could be changed. That is because | |
135 | nobody knows where a pointer does not point. | |
136 | The function `invalidate_memory' removes what is necessary. | |
137 | ||
138 | The special cases are when the address is constant or is | |
139 | a constant plus a fixed register such as the frame pointer | |
140 | or a static chain pointer. When such addresses are stored in, | |
141 | we can tell exactly which other such addresses must be invalidated | |
142 | due to overlap. `invalidate' does this. | |
143 | All expressions that refer to non-constant | |
144 | memory addresses are also invalidated. `invalidate_memory' does this. | |
145 | ||
146 | 2. If the value changing is a register, all expressions | |
147 | containing references to that register, and only those, | |
148 | must be removed. | |
149 | ||
150 | Because searching the entire hash table for expressions that contain | |
151 | a register is very slow, we try to figure out when it isn't necessary. | |
152 | Precisely, this is necessary only when expressions have been | |
153 | entered in the hash table using this register, and then the value has | |
154 | changed, and then another expression wants to be added to refer to | |
155 | the register's new value. This sequence of circumstances is rare | |
156 | within any one basic block. | |
157 | ||
158 | The vectors `reg_tick' and `reg_in_table' are used to detect this case. | |
159 | reg_tick[i] is incremented whenever a value is stored in register i. | |
160 | reg_in_table[i] holds -1 if no references to register i have been | |
161 | entered in the table; otherwise, it contains the value reg_tick[i] had | |
162 | when the references were entered. If we want to enter a reference | |
163 | and reg_in_table[i] != reg_tick[i], we must scan and remove old references. | |
164 | Until we want to enter a new entry, the mere fact that the two vectors | |
165 | don't match makes the entries be ignored if anyone tries to match them. | |
166 | ||
167 | Registers themselves are entered in the hash table as well as in | |
168 | the equivalent-register chains. However, the vectors `reg_tick' | |
169 | and `reg_in_table' do not apply to expressions which are simple | |
170 | register references. These expressions are removed from the table | |
171 | immediately when they become invalid, and this can be done even if | |
172 | we do not immediately search for all the expressions that refer to | |
173 | the register. | |
174 | ||
175 | A CLOBBER rtx in an instruction invalidates its operand for further | |
176 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
177 | invalidates everything that resides in memory. | |
178 | ||
179 | Related expressions: | |
180 | ||
181 | Constant expressions that differ only by an additive integer | |
182 | are called related. When a constant expression is put in | |
183 | the table, the related expression with no constant term | |
184 | is also entered. These are made to point at each other | |
185 | so that it is possible to find out if there exists any | |
186 | register equivalent to an expression related to a given expression. */ | |
187 | ||
188 | /* One plus largest register number used in this function. */ | |
189 | ||
190 | static int max_reg; | |
191 | ||
192 | /* Length of vectors indexed by quantity number. | |
193 | We know in advance we will not need a quantity number this big. */ | |
194 | ||
195 | static int max_qty; | |
196 | ||
197 | /* Next quantity number to be allocated. | |
198 | This is 1 + the largest number needed so far. */ | |
199 | ||
200 | static int next_qty; | |
201 | ||
202 | /* Indexed by quantity number, gives the first (or last) (pseudo) register | |
203 | in the chain of registers that currently contain this quantity. */ | |
204 | ||
205 | static int *qty_first_reg; | |
206 | static int *qty_last_reg; | |
207 | ||
208 | /* Index by quantity number, gives the mode of the quantity. */ | |
209 | ||
210 | static enum machine_mode *qty_mode; | |
211 | ||
212 | /* Indexed by quantity number, gives the rtx of the constant value of the | |
213 | quantity, or zero if it does not have a known value. | |
214 | A sum of the frame pointer (or arg pointer) plus a constant | |
215 | can also be entered here. */ | |
216 | ||
217 | static rtx *qty_const; | |
218 | ||
219 | /* Indexed by qty number, gives the insn that stored the constant value | |
220 | recorded in `qty_const'. */ | |
221 | ||
222 | static rtx *qty_const_insn; | |
223 | ||
224 | /* The next three variables are used to track when a comparison between a | |
225 | quantity and some constant or register has been passed. In that case, we | |
226 | know the results of the comparison in case we see it again. These variables | |
227 | record a comparison that is known to be true. */ | |
228 | ||
229 | /* Indexed by qty number, gives the rtx code of a comparison with a known | |
230 | result involving this quantity. If none, it is UNKNOWN. */ | |
231 | static enum rtx_code *qty_comparison_code; | |
232 | ||
233 | /* Indexed by qty number, gives the constant being compared against in a | |
234 | comparison of known result. If no such comparison, it is undefined. | |
235 | If the comparison is not with a constant, it is zero. */ | |
236 | ||
237 | static rtx *qty_comparison_const; | |
238 | ||
239 | /* Indexed by qty number, gives the quantity being compared against in a | |
240 | comparison of known result. If no such comparison, if it undefined. | |
241 | If the comparison is not with a register, it is -1. */ | |
242 | ||
243 | static int *qty_comparison_qty; | |
244 | ||
245 | #ifdef HAVE_cc0 | |
246 | /* For machines that have a CC0, we do not record its value in the hash | |
247 | table since its use is guaranteed to be the insn immediately following | |
248 | its definition and any other insn is presumed to invalidate it. | |
249 | ||
250 | Instead, we store below the value last assigned to CC0. If it should | |
251 | happen to be a constant, it is stored in preference to the actual | |
252 | assigned value. In case it is a constant, we store the mode in which | |
253 | the constant should be interpreted. */ | |
254 | ||
255 | static rtx prev_insn_cc0; | |
256 | static enum machine_mode prev_insn_cc0_mode; | |
257 | #endif | |
258 | ||
259 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
260 | ||
261 | static rtx prev_insn; | |
262 | ||
263 | /* Insn being scanned. */ | |
264 | ||
265 | static rtx this_insn; | |
266 | ||
267 | /* Index by (pseudo) register number, gives the quantity number | |
268 | of the register's current contents. */ | |
269 | ||
270 | static int *reg_qty; | |
271 | ||
272 | /* Index by (pseudo) register number, gives the number of the next (or | |
273 | previous) (pseudo) register in the chain of registers sharing the same | |
274 | value. | |
275 | ||
276 | Or -1 if this register is at the end of the chain. | |
277 | ||
278 | If reg_qty[N] == N, reg_next_eqv[N] is undefined. */ | |
279 | ||
280 | static int *reg_next_eqv; | |
281 | static int *reg_prev_eqv; | |
282 | ||
283 | /* Index by (pseudo) register number, gives the number of times | |
284 | that register has been altered in the current basic block. */ | |
285 | ||
286 | static int *reg_tick; | |
287 | ||
288 | /* Index by (pseudo) register number, gives the reg_tick value at which | |
289 | rtx's containing this register are valid in the hash table. | |
290 | If this does not equal the current reg_tick value, such expressions | |
291 | existing in the hash table are invalid. | |
292 | If this is -1, no expressions containing this register have been | |
293 | entered in the table. */ | |
294 | ||
295 | static int *reg_in_table; | |
296 | ||
297 | /* A HARD_REG_SET containing all the hard registers for which there is | |
298 | currently a REG expression in the hash table. Note the difference | |
299 | from the above variables, which indicate if the REG is mentioned in some | |
300 | expression in the table. */ | |
301 | ||
302 | static HARD_REG_SET hard_regs_in_table; | |
303 | ||
304 | /* A HARD_REG_SET containing all the hard registers that are invalidated | |
305 | by a CALL_INSN. */ | |
306 | ||
307 | static HARD_REG_SET regs_invalidated_by_call; | |
308 | ||
309 | /* Two vectors of ints: | |
310 | one containing max_reg -1's; the other max_reg + 500 (an approximation | |
311 | for max_qty) elements where element i contains i. | |
312 | These are used to initialize various other vectors fast. */ | |
313 | ||
314 | static int *all_minus_one; | |
315 | static int *consec_ints; | |
316 | ||
317 | /* CUID of insn that starts the basic block currently being cse-processed. */ | |
318 | ||
319 | static int cse_basic_block_start; | |
320 | ||
321 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
322 | ||
323 | static int cse_basic_block_end; | |
324 | ||
325 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 326 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
327 | We use them to see whether a reg is used outside a given basic block. */ |
328 | ||
906c4e36 | 329 | static int *uid_cuid; |
7afe21cc RK |
330 | |
331 | /* Get the cuid of an insn. */ | |
332 | ||
333 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
334 | ||
335 | /* Nonzero if cse has altered conditional jump insns | |
336 | in such a way that jump optimization should be redone. */ | |
337 | ||
338 | static int cse_jumps_altered; | |
339 | ||
340 | /* canon_hash stores 1 in do_not_record | |
341 | if it notices a reference to CC0, PC, or some other volatile | |
342 | subexpression. */ | |
343 | ||
344 | static int do_not_record; | |
345 | ||
346 | /* canon_hash stores 1 in hash_arg_in_memory | |
347 | if it notices a reference to memory within the expression being hashed. */ | |
348 | ||
349 | static int hash_arg_in_memory; | |
350 | ||
351 | /* canon_hash stores 1 in hash_arg_in_struct | |
352 | if it notices a reference to memory that's part of a structure. */ | |
353 | ||
354 | static int hash_arg_in_struct; | |
355 | ||
356 | /* The hash table contains buckets which are chains of `struct table_elt's, | |
357 | each recording one expression's information. | |
358 | That expression is in the `exp' field. | |
359 | ||
360 | Those elements with the same hash code are chained in both directions | |
361 | through the `next_same_hash' and `prev_same_hash' fields. | |
362 | ||
363 | Each set of expressions with equivalent values | |
364 | are on a two-way chain through the `next_same_value' | |
365 | and `prev_same_value' fields, and all point with | |
366 | the `first_same_value' field at the first element in | |
367 | that chain. The chain is in order of increasing cost. | |
368 | Each element's cost value is in its `cost' field. | |
369 | ||
370 | The `in_memory' field is nonzero for elements that | |
371 | involve any reference to memory. These elements are removed | |
372 | whenever a write is done to an unidentified location in memory. | |
373 | To be safe, we assume that a memory address is unidentified unless | |
374 | the address is either a symbol constant or a constant plus | |
375 | the frame pointer or argument pointer. | |
376 | ||
377 | The `in_struct' field is nonzero for elements that | |
378 | involve any reference to memory inside a structure or array. | |
379 | ||
380 | The `related_value' field is used to connect related expressions | |
381 | (that differ by adding an integer). | |
382 | The related expressions are chained in a circular fashion. | |
383 | `related_value' is zero for expressions for which this | |
384 | chain is not useful. | |
385 | ||
386 | The `cost' field stores the cost of this element's expression. | |
387 | ||
388 | The `is_const' flag is set if the element is a constant (including | |
389 | a fixed address). | |
390 | ||
391 | The `flag' field is used as a temporary during some search routines. | |
392 | ||
393 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
394 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
395 | field is the mode it was being used as. Each constant is | |
396 | recorded separately for each mode it is used with. */ | |
397 | ||
398 | ||
399 | struct table_elt | |
400 | { | |
401 | rtx exp; | |
402 | struct table_elt *next_same_hash; | |
403 | struct table_elt *prev_same_hash; | |
404 | struct table_elt *next_same_value; | |
405 | struct table_elt *prev_same_value; | |
406 | struct table_elt *first_same_value; | |
407 | struct table_elt *related_value; | |
408 | int cost; | |
409 | enum machine_mode mode; | |
410 | char in_memory; | |
411 | char in_struct; | |
412 | char is_const; | |
413 | char flag; | |
414 | }; | |
415 | ||
416 | #define HASHBITS 16 | |
417 | ||
418 | /* We don't want a lot of buckets, because we rarely have very many | |
419 | things stored in the hash table, and a lot of buckets slows | |
420 | down a lot of loops that happen frequently. */ | |
421 | #define NBUCKETS 31 | |
422 | ||
423 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
424 | register (hard registers may require `do_not_record' to be set). */ | |
425 | ||
426 | #define HASH(X, M) \ | |
427 | (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
428 | ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \ | |
429 | : canon_hash (X, M) % NBUCKETS) | |
430 | ||
431 | /* Determine whether register number N is considered a fixed register for CSE. | |
432 | It is desirable to replace other regs with fixed regs, to reduce need for | |
433 | non-fixed hard regs. | |
434 | A reg wins if it is either the frame pointer or designated as fixed, | |
435 | but not if it is an overlapping register. */ | |
436 | #ifdef OVERLAPPING_REGNO_P | |
437 | #define FIXED_REGNO_P(N) \ | |
438 | (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \ | |
439 | && ! OVERLAPPING_REGNO_P ((N))) | |
440 | #else | |
441 | #define FIXED_REGNO_P(N) \ | |
442 | ((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) | |
443 | #endif | |
444 | ||
445 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
446 | hard registers are the cheapest with a cost of 0. Next come pseudos | |
447 | with a cost of one and other hard registers with a cost of 2. Aside | |
448 | from these special cases, call `rtx_cost'. */ | |
449 | ||
450 | #define COST(X) \ | |
451 | (GET_CODE (X) == REG \ | |
452 | ? (REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \ | |
453 | : (FIXED_REGNO_P (REGNO (X)) \ | |
454 | && REGNO_REG_CLASS (REGNO (X)) != NO_REGS) ? 0 \ | |
455 | : 2) \ | |
e5f6a288 | 456 | : rtx_cost (X, SET) * 2) |
7afe21cc RK |
457 | |
458 | /* Determine if the quantity number for register X represents a valid index | |
459 | into the `qty_...' variables. */ | |
460 | ||
461 | #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N)) | |
462 | ||
463 | static struct table_elt *table[NBUCKETS]; | |
464 | ||
465 | /* Chain of `struct table_elt's made so far for this function | |
466 | but currently removed from the table. */ | |
467 | ||
468 | static struct table_elt *free_element_chain; | |
469 | ||
470 | /* Number of `struct table_elt' structures made so far for this function. */ | |
471 | ||
472 | static int n_elements_made; | |
473 | ||
474 | /* Maximum value `n_elements_made' has had so far in this compilation | |
475 | for functions previously processed. */ | |
476 | ||
477 | static int max_elements_made; | |
478 | ||
479 | /* Surviving equivalence class when two equivalence classes are merged | |
480 | by recording the effects of a jump in the last insn. Zero if the | |
481 | last insn was not a conditional jump. */ | |
482 | ||
483 | static struct table_elt *last_jump_equiv_class; | |
484 | ||
485 | /* Set to the cost of a constant pool reference if one was found for a | |
486 | symbolic constant. If this was found, it means we should try to | |
487 | convert constants into constant pool entries if they don't fit in | |
488 | the insn. */ | |
489 | ||
490 | static int constant_pool_entries_cost; | |
491 | ||
492 | /* Bits describing what kind of values in memory must be invalidated | |
493 | for a particular instruction. If all three bits are zero, | |
494 | no memory refs need to be invalidated. Each bit is more powerful | |
495 | than the preceding ones, and if a bit is set then the preceding | |
496 | bits are also set. | |
497 | ||
498 | Here is how the bits are set: | |
499 | Pushing onto the stack invalidates only the stack pointer, | |
500 | writing at a fixed address invalidates only variable addresses, | |
501 | writing in a structure element at variable address | |
502 | invalidates all but scalar variables, | |
503 | and writing in anything else at variable address invalidates everything. */ | |
504 | ||
505 | struct write_data | |
506 | { | |
507 | int sp : 1; /* Invalidate stack pointer. */ | |
508 | int var : 1; /* Invalidate variable addresses. */ | |
509 | int nonscalar : 1; /* Invalidate all but scalar variables. */ | |
510 | int all : 1; /* Invalidate all memory refs. */ | |
511 | }; | |
512 | ||
513 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for | |
514 | virtual regs here because the simplify_*_operation routines are called | |
515 | by integrate.c, which is called before virtual register instantiation. */ | |
516 | ||
517 | #define FIXED_BASE_PLUS_P(X) \ | |
518 | ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \ | |
519 | || (X) == virtual_stack_vars_rtx \ | |
520 | || (X) == virtual_incoming_args_rtx \ | |
521 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
522 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
523 | || XEXP (X, 0) == arg_pointer_rtx \ | |
524 | || XEXP (X, 0) == virtual_stack_vars_rtx \ | |
525 | || XEXP (X, 0) == virtual_incoming_args_rtx))) | |
526 | ||
6f90e075 JW |
527 | /* Similar, but also allows reference to the stack pointer. |
528 | ||
529 | This used to include FIXED_BASE_PLUS_P, however, we can't assume that | |
530 | arg_pointer_rtx by itself is nonzero, because on at least one machine, | |
531 | the i960, the arg pointer is zero when it is unused. */ | |
7afe21cc RK |
532 | |
533 | #define NONZERO_BASE_PLUS_P(X) \ | |
6f90e075 JW |
534 | ((X) == frame_pointer_rtx \ |
535 | || (X) == virtual_stack_vars_rtx \ | |
536 | || (X) == virtual_incoming_args_rtx \ | |
537 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
538 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
539 | || XEXP (X, 0) == arg_pointer_rtx \ | |
540 | || XEXP (X, 0) == virtual_stack_vars_rtx \ | |
541 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ | |
7afe21cc RK |
542 | || (X) == stack_pointer_rtx \ |
543 | || (X) == virtual_stack_dynamic_rtx \ | |
544 | || (X) == virtual_outgoing_args_rtx \ | |
545 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
546 | && (XEXP (X, 0) == stack_pointer_rtx \ | |
547 | || XEXP (X, 0) == virtual_stack_dynamic_rtx \ | |
548 | || XEXP (X, 0) == virtual_outgoing_args_rtx))) | |
549 | ||
550 | static struct table_elt *lookup (); | |
551 | static void free_element (); | |
552 | ||
553 | static int insert_regs (); | |
554 | static void rehash_using_reg (); | |
555 | static void remove_invalid_refs (); | |
556 | static int exp_equiv_p (); | |
557 | int refers_to_p (); | |
558 | int refers_to_mem_p (); | |
559 | static void invalidate_from_clobbers (); | |
560 | static int safe_hash (); | |
561 | static int canon_hash (); | |
562 | static rtx fold_rtx (); | |
563 | static rtx equiv_constant (); | |
564 | static void record_jump_cond (); | |
565 | static void note_mem_written (); | |
566 | static int cse_rtx_addr_varies_p (); | |
567 | static enum rtx_code find_comparison_args (); | |
568 | static void cse_insn (); | |
569 | static void cse_set_around_loop (); | |
570 | \f | |
571 | /* Return an estimate of the cost of computing rtx X. | |
572 | One use is in cse, to decide which expression to keep in the hash table. | |
573 | Another is in rtl generation, to pick the cheapest way to multiply. | |
574 | Other uses like the latter are expected in the future. */ | |
575 | ||
576 | /* Return the right cost to give to an operation | |
577 | to make the cost of the corresponding register-to-register instruction | |
578 | N times that of a fast register-to-register instruction. */ | |
579 | ||
580 | #define COSTS_N_INSNS(N) ((N) * 4 - 2) | |
581 | ||
582 | int | |
e5f6a288 | 583 | rtx_cost (x, outer_code) |
7afe21cc | 584 | rtx x; |
e5f6a288 | 585 | enum rtx_code outer_code; |
7afe21cc RK |
586 | { |
587 | register int i, j; | |
588 | register enum rtx_code code; | |
589 | register char *fmt; | |
590 | register int total; | |
591 | ||
592 | if (x == 0) | |
593 | return 0; | |
594 | ||
595 | /* Compute the default costs of certain things. | |
596 | Note that RTX_COSTS can override the defaults. */ | |
597 | ||
598 | code = GET_CODE (x); | |
599 | switch (code) | |
600 | { | |
601 | case MULT: | |
602 | /* Count multiplication by 2**n as a shift, | |
603 | because if we are considering it, we would output it as a shift. */ | |
604 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
605 | && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) | |
606 | total = 2; | |
607 | else | |
608 | total = COSTS_N_INSNS (5); | |
609 | break; | |
610 | case DIV: | |
611 | case UDIV: | |
612 | case MOD: | |
613 | case UMOD: | |
614 | total = COSTS_N_INSNS (7); | |
615 | break; | |
616 | case USE: | |
617 | /* Used in loop.c and combine.c as a marker. */ | |
618 | total = 0; | |
619 | break; | |
538b78e7 RS |
620 | case ASM_OPERANDS: |
621 | /* We don't want these to be used in substitutions because | |
622 | we have no way of validating the resulting insn. So assign | |
623 | anything containing an ASM_OPERANDS a very high cost. */ | |
624 | total = 1000; | |
625 | break; | |
7afe21cc RK |
626 | default: |
627 | total = 2; | |
628 | } | |
629 | ||
630 | switch (code) | |
631 | { | |
632 | case REG: | |
633 | return 1; | |
634 | case SUBREG: | |
fc3ffe83 RK |
635 | /* If we can't tie these modes, make this expensive. The larger |
636 | the mode, the more expensive it is. */ | |
637 | if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) | |
638 | return COSTS_N_INSNS (2 | |
639 | + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); | |
7afe21cc RK |
640 | return 2; |
641 | #ifdef RTX_COSTS | |
e5f6a288 | 642 | RTX_COSTS (x, code, outer_code); |
7afe21cc | 643 | #endif |
e5f6a288 | 644 | CONST_COSTS (x, code, outer_code); |
7afe21cc RK |
645 | } |
646 | ||
647 | /* Sum the costs of the sub-rtx's, plus cost of this operation, | |
648 | which is already in total. */ | |
649 | ||
650 | fmt = GET_RTX_FORMAT (code); | |
651 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
652 | if (fmt[i] == 'e') | |
e5f6a288 | 653 | total += rtx_cost (XEXP (x, i), code); |
7afe21cc RK |
654 | else if (fmt[i] == 'E') |
655 | for (j = 0; j < XVECLEN (x, i); j++) | |
e5f6a288 | 656 | total += rtx_cost (XVECEXP (x, i, j), code); |
7afe21cc RK |
657 | |
658 | return total; | |
659 | } | |
660 | \f | |
661 | /* Clear the hash table and initialize each register with its own quantity, | |
662 | for a new basic block. */ | |
663 | ||
664 | static void | |
665 | new_basic_block () | |
666 | { | |
667 | register int i; | |
668 | ||
669 | next_qty = max_reg; | |
670 | ||
671 | bzero (reg_tick, max_reg * sizeof (int)); | |
672 | ||
673 | bcopy (all_minus_one, reg_in_table, max_reg * sizeof (int)); | |
674 | bcopy (consec_ints, reg_qty, max_reg * sizeof (int)); | |
675 | CLEAR_HARD_REG_SET (hard_regs_in_table); | |
676 | ||
677 | /* The per-quantity values used to be initialized here, but it is | |
678 | much faster to initialize each as it is made in `make_new_qty'. */ | |
679 | ||
680 | for (i = 0; i < NBUCKETS; i++) | |
681 | { | |
682 | register struct table_elt *this, *next; | |
683 | for (this = table[i]; this; this = next) | |
684 | { | |
685 | next = this->next_same_hash; | |
686 | free_element (this); | |
687 | } | |
688 | } | |
689 | ||
690 | bzero (table, sizeof table); | |
691 | ||
692 | prev_insn = 0; | |
693 | ||
694 | #ifdef HAVE_cc0 | |
695 | prev_insn_cc0 = 0; | |
696 | #endif | |
697 | } | |
698 | ||
699 | /* Say that register REG contains a quantity not in any register before | |
700 | and initialize that quantity. */ | |
701 | ||
702 | static void | |
703 | make_new_qty (reg) | |
704 | register int reg; | |
705 | { | |
706 | register int q; | |
707 | ||
708 | if (next_qty >= max_qty) | |
709 | abort (); | |
710 | ||
711 | q = reg_qty[reg] = next_qty++; | |
712 | qty_first_reg[q] = reg; | |
713 | qty_last_reg[q] = reg; | |
714 | qty_const[q] = qty_const_insn[q] = 0; | |
715 | qty_comparison_code[q] = UNKNOWN; | |
716 | ||
717 | reg_next_eqv[reg] = reg_prev_eqv[reg] = -1; | |
718 | } | |
719 | ||
720 | /* Make reg NEW equivalent to reg OLD. | |
721 | OLD is not changing; NEW is. */ | |
722 | ||
723 | static void | |
724 | make_regs_eqv (new, old) | |
725 | register int new, old; | |
726 | { | |
727 | register int lastr, firstr; | |
728 | register int q = reg_qty[old]; | |
729 | ||
730 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
731 | if (! REGNO_QTY_VALID_P (old)) | |
732 | abort (); | |
733 | ||
734 | reg_qty[new] = q; | |
735 | firstr = qty_first_reg[q]; | |
736 | lastr = qty_last_reg[q]; | |
737 | ||
738 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
739 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
740 | of the same qty, and that is beyond the current basic block, | |
741 | make it the new canonical replacement for this qty. */ | |
742 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
743 | /* Certain fixed registers might be of the class NO_REGS. This means | |
744 | that not only can they not be allocated by the compiler, but | |
830a38ee | 745 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
746 | either. */ |
747 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
748 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
749 | || (new >= FIRST_PSEUDO_REGISTER | |
750 | && (firstr < FIRST_PSEUDO_REGISTER | |
751 | || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end | |
752 | || (uid_cuid[regno_first_uid[new]] | |
753 | < cse_basic_block_start)) | |
754 | && (uid_cuid[regno_last_uid[new]] | |
755 | > uid_cuid[regno_last_uid[firstr]])))))) | |
756 | { | |
757 | reg_prev_eqv[firstr] = new; | |
758 | reg_next_eqv[new] = firstr; | |
759 | reg_prev_eqv[new] = -1; | |
760 | qty_first_reg[q] = new; | |
761 | } | |
762 | else | |
763 | { | |
764 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
765 | Otherwise, insert before any non-fixed hard regs that are at the | |
766 | end. Registers of class NO_REGS cannot be used as an | |
767 | equivalent for anything. */ | |
768 | while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0 | |
769 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) | |
770 | && new >= FIRST_PSEUDO_REGISTER) | |
771 | lastr = reg_prev_eqv[lastr]; | |
772 | reg_next_eqv[new] = reg_next_eqv[lastr]; | |
773 | if (reg_next_eqv[lastr] >= 0) | |
774 | reg_prev_eqv[reg_next_eqv[lastr]] = new; | |
775 | else | |
776 | qty_last_reg[q] = new; | |
777 | reg_next_eqv[lastr] = new; | |
778 | reg_prev_eqv[new] = lastr; | |
779 | } | |
780 | } | |
781 | ||
782 | /* Remove REG from its equivalence class. */ | |
783 | ||
784 | static void | |
785 | delete_reg_equiv (reg) | |
786 | register int reg; | |
787 | { | |
788 | register int n = reg_next_eqv[reg]; | |
789 | register int p = reg_prev_eqv[reg]; | |
790 | register int q = reg_qty[reg]; | |
791 | ||
792 | /* If invalid, do nothing. N and P above are undefined in that case. */ | |
793 | if (q == reg) | |
794 | return; | |
795 | ||
796 | if (n != -1) | |
797 | reg_prev_eqv[n] = p; | |
798 | else | |
799 | qty_last_reg[q] = p; | |
800 | if (p != -1) | |
801 | reg_next_eqv[p] = n; | |
802 | else | |
803 | qty_first_reg[q] = n; | |
804 | ||
805 | reg_qty[reg] = reg; | |
806 | } | |
807 | ||
808 | /* Remove any invalid expressions from the hash table | |
809 | that refer to any of the registers contained in expression X. | |
810 | ||
811 | Make sure that newly inserted references to those registers | |
812 | as subexpressions will be considered valid. | |
813 | ||
814 | mention_regs is not called when a register itself | |
815 | is being stored in the table. | |
816 | ||
817 | Return 1 if we have done something that may have changed the hash code | |
818 | of X. */ | |
819 | ||
820 | static int | |
821 | mention_regs (x) | |
822 | rtx x; | |
823 | { | |
824 | register enum rtx_code code; | |
825 | register int i, j; | |
826 | register char *fmt; | |
827 | register int changed = 0; | |
828 | ||
829 | if (x == 0) | |
e5f6a288 | 830 | return 0; |
7afe21cc RK |
831 | |
832 | code = GET_CODE (x); | |
833 | if (code == REG) | |
834 | { | |
835 | register int regno = REGNO (x); | |
836 | register int endregno | |
837 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
838 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
839 | int i; | |
840 | ||
841 | for (i = regno; i < endregno; i++) | |
842 | { | |
843 | if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i]) | |
844 | remove_invalid_refs (i); | |
845 | ||
846 | reg_in_table[i] = reg_tick[i]; | |
847 | } | |
848 | ||
849 | return 0; | |
850 | } | |
851 | ||
852 | /* If X is a comparison or a COMPARE and either operand is a register | |
853 | that does not have a quantity, give it one. This is so that a later | |
854 | call to record_jump_equiv won't cause X to be assigned a different | |
855 | hash code and not found in the table after that call. | |
856 | ||
857 | It is not necessary to do this here, since rehash_using_reg can | |
858 | fix up the table later, but doing this here eliminates the need to | |
859 | call that expensive function in the most common case where the only | |
860 | use of the register is in the comparison. */ | |
861 | ||
862 | if (code == COMPARE || GET_RTX_CLASS (code) == '<') | |
863 | { | |
864 | if (GET_CODE (XEXP (x, 0)) == REG | |
865 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) | |
906c4e36 | 866 | if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) |
7afe21cc RK |
867 | { |
868 | rehash_using_reg (XEXP (x, 0)); | |
869 | changed = 1; | |
870 | } | |
871 | ||
872 | if (GET_CODE (XEXP (x, 1)) == REG | |
873 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) | |
906c4e36 | 874 | if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) |
7afe21cc RK |
875 | { |
876 | rehash_using_reg (XEXP (x, 1)); | |
877 | changed = 1; | |
878 | } | |
879 | } | |
880 | ||
881 | fmt = GET_RTX_FORMAT (code); | |
882 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
883 | if (fmt[i] == 'e') | |
884 | changed |= mention_regs (XEXP (x, i)); | |
885 | else if (fmt[i] == 'E') | |
886 | for (j = 0; j < XVECLEN (x, i); j++) | |
887 | changed |= mention_regs (XVECEXP (x, i, j)); | |
888 | ||
889 | return changed; | |
890 | } | |
891 | ||
892 | /* Update the register quantities for inserting X into the hash table | |
893 | with a value equivalent to CLASSP. | |
894 | (If the class does not contain a REG, it is irrelevant.) | |
895 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
896 | Note that delete_reg_equiv should be called on a register | |
897 | before insert_regs is done on that register with MODIFIED != 0. | |
898 | ||
899 | Nonzero value means that elements of reg_qty have changed | |
900 | so X's hash code may be different. */ | |
901 | ||
902 | static int | |
903 | insert_regs (x, classp, modified) | |
904 | rtx x; | |
905 | struct table_elt *classp; | |
906 | int modified; | |
907 | { | |
908 | if (GET_CODE (x) == REG) | |
909 | { | |
910 | register int regno = REGNO (x); | |
911 | ||
912 | if (modified | |
913 | || ! (REGNO_QTY_VALID_P (regno) | |
914 | && qty_mode[reg_qty[regno]] == GET_MODE (x))) | |
915 | { | |
916 | if (classp) | |
917 | for (classp = classp->first_same_value; | |
918 | classp != 0; | |
919 | classp = classp->next_same_value) | |
920 | if (GET_CODE (classp->exp) == REG | |
921 | && GET_MODE (classp->exp) == GET_MODE (x)) | |
922 | { | |
923 | make_regs_eqv (regno, REGNO (classp->exp)); | |
924 | return 1; | |
925 | } | |
926 | ||
927 | make_new_qty (regno); | |
928 | qty_mode[reg_qty[regno]] = GET_MODE (x); | |
929 | return 1; | |
930 | } | |
931 | } | |
c610adec RK |
932 | |
933 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
934 | table. If that register doesn't have an assigned quantity number at | |
935 | this point but does later, the insertion that we will be doing now will | |
936 | not be accessible because its hash code will have changed. So assign | |
937 | a quantity number now. */ | |
938 | ||
939 | else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
940 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) | |
941 | { | |
906c4e36 | 942 | insert_regs (SUBREG_REG (x), NULL_PTR, 0); |
c610adec RK |
943 | mention_regs (SUBREG_REG (x)); |
944 | return 1; | |
945 | } | |
7afe21cc RK |
946 | else |
947 | return mention_regs (x); | |
948 | } | |
949 | \f | |
950 | /* Look in or update the hash table. */ | |
951 | ||
952 | /* Put the element ELT on the list of free elements. */ | |
953 | ||
954 | static void | |
955 | free_element (elt) | |
956 | struct table_elt *elt; | |
957 | { | |
958 | elt->next_same_hash = free_element_chain; | |
959 | free_element_chain = elt; | |
960 | } | |
961 | ||
962 | /* Return an element that is free for use. */ | |
963 | ||
964 | static struct table_elt * | |
965 | get_element () | |
966 | { | |
967 | struct table_elt *elt = free_element_chain; | |
968 | if (elt) | |
969 | { | |
970 | free_element_chain = elt->next_same_hash; | |
971 | return elt; | |
972 | } | |
973 | n_elements_made++; | |
974 | return (struct table_elt *) oballoc (sizeof (struct table_elt)); | |
975 | } | |
976 | ||
977 | /* Remove table element ELT from use in the table. | |
978 | HASH is its hash code, made using the HASH macro. | |
979 | It's an argument because often that is known in advance | |
980 | and we save much time not recomputing it. */ | |
981 | ||
982 | static void | |
983 | remove_from_table (elt, hash) | |
984 | register struct table_elt *elt; | |
985 | int hash; | |
986 | { | |
987 | if (elt == 0) | |
988 | return; | |
989 | ||
990 | /* Mark this element as removed. See cse_insn. */ | |
991 | elt->first_same_value = 0; | |
992 | ||
993 | /* Remove the table element from its equivalence class. */ | |
994 | ||
995 | { | |
996 | register struct table_elt *prev = elt->prev_same_value; | |
997 | register struct table_elt *next = elt->next_same_value; | |
998 | ||
999 | if (next) next->prev_same_value = prev; | |
1000 | ||
1001 | if (prev) | |
1002 | prev->next_same_value = next; | |
1003 | else | |
1004 | { | |
1005 | register struct table_elt *newfirst = next; | |
1006 | while (next) | |
1007 | { | |
1008 | next->first_same_value = newfirst; | |
1009 | next = next->next_same_value; | |
1010 | } | |
1011 | } | |
1012 | } | |
1013 | ||
1014 | /* Remove the table element from its hash bucket. */ | |
1015 | ||
1016 | { | |
1017 | register struct table_elt *prev = elt->prev_same_hash; | |
1018 | register struct table_elt *next = elt->next_same_hash; | |
1019 | ||
1020 | if (next) next->prev_same_hash = prev; | |
1021 | ||
1022 | if (prev) | |
1023 | prev->next_same_hash = next; | |
1024 | else if (table[hash] == elt) | |
1025 | table[hash] = next; | |
1026 | else | |
1027 | { | |
1028 | /* This entry is not in the proper hash bucket. This can happen | |
1029 | when two classes were merged by `merge_equiv_classes'. Search | |
1030 | for the hash bucket that it heads. This happens only very | |
1031 | rarely, so the cost is acceptable. */ | |
1032 | for (hash = 0; hash < NBUCKETS; hash++) | |
1033 | if (table[hash] == elt) | |
1034 | table[hash] = next; | |
1035 | } | |
1036 | } | |
1037 | ||
1038 | /* Remove the table element from its related-value circular chain. */ | |
1039 | ||
1040 | if (elt->related_value != 0 && elt->related_value != elt) | |
1041 | { | |
1042 | register struct table_elt *p = elt->related_value; | |
1043 | while (p->related_value != elt) | |
1044 | p = p->related_value; | |
1045 | p->related_value = elt->related_value; | |
1046 | if (p->related_value == p) | |
1047 | p->related_value = 0; | |
1048 | } | |
1049 | ||
1050 | free_element (elt); | |
1051 | } | |
1052 | ||
1053 | /* Look up X in the hash table and return its table element, | |
1054 | or 0 if X is not in the table. | |
1055 | ||
1056 | MODE is the machine-mode of X, or if X is an integer constant | |
1057 | with VOIDmode then MODE is the mode with which X will be used. | |
1058 | ||
1059 | Here we are satisfied to find an expression whose tree structure | |
1060 | looks like X. */ | |
1061 | ||
1062 | static struct table_elt * | |
1063 | lookup (x, hash, mode) | |
1064 | rtx x; | |
1065 | int hash; | |
1066 | enum machine_mode mode; | |
1067 | { | |
1068 | register struct table_elt *p; | |
1069 | ||
1070 | for (p = table[hash]; p; p = p->next_same_hash) | |
1071 | if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) | |
1072 | || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) | |
1073 | return p; | |
1074 | ||
1075 | return 0; | |
1076 | } | |
1077 | ||
1078 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1079 | Also ignore discrepancies in the machine mode of a register. */ | |
1080 | ||
1081 | static struct table_elt * | |
1082 | lookup_for_remove (x, hash, mode) | |
1083 | rtx x; | |
1084 | int hash; | |
1085 | enum machine_mode mode; | |
1086 | { | |
1087 | register struct table_elt *p; | |
1088 | ||
1089 | if (GET_CODE (x) == REG) | |
1090 | { | |
1091 | int regno = REGNO (x); | |
1092 | /* Don't check the machine mode when comparing registers; | |
1093 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1094 | for (p = table[hash]; p; p = p->next_same_hash) | |
1095 | if (GET_CODE (p->exp) == REG | |
1096 | && REGNO (p->exp) == regno) | |
1097 | return p; | |
1098 | } | |
1099 | else | |
1100 | { | |
1101 | for (p = table[hash]; p; p = p->next_same_hash) | |
1102 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) | |
1103 | return p; | |
1104 | } | |
1105 | ||
1106 | return 0; | |
1107 | } | |
1108 | ||
1109 | /* Look for an expression equivalent to X and with code CODE. | |
1110 | If one is found, return that expression. */ | |
1111 | ||
1112 | static rtx | |
1113 | lookup_as_function (x, code) | |
1114 | rtx x; | |
1115 | enum rtx_code code; | |
1116 | { | |
1117 | register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, | |
1118 | GET_MODE (x)); | |
1119 | if (p == 0) | |
1120 | return 0; | |
1121 | ||
1122 | for (p = p->first_same_value; p; p = p->next_same_value) | |
1123 | { | |
1124 | if (GET_CODE (p->exp) == code | |
1125 | /* Make sure this is a valid entry in the table. */ | |
1126 | && exp_equiv_p (p->exp, p->exp, 1, 0)) | |
1127 | return p->exp; | |
1128 | } | |
1129 | ||
1130 | return 0; | |
1131 | } | |
1132 | ||
1133 | /* Insert X in the hash table, assuming HASH is its hash code | |
1134 | and CLASSP is an element of the class it should go in | |
1135 | (or 0 if a new class should be made). | |
1136 | It is inserted at the proper position to keep the class in | |
1137 | the order cheapest first. | |
1138 | ||
1139 | MODE is the machine-mode of X, or if X is an integer constant | |
1140 | with VOIDmode then MODE is the mode with which X will be used. | |
1141 | ||
1142 | For elements of equal cheapness, the most recent one | |
1143 | goes in front, except that the first element in the list | |
1144 | remains first unless a cheaper element is added. The order of | |
1145 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1146 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1147 | |
1148 | The in_memory field in the hash table element is set to 0. | |
1149 | The caller must set it nonzero if appropriate. | |
1150 | ||
1151 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1152 | and if insert_regs returns a nonzero value | |
1153 | you must then recompute its hash code before calling here. | |
1154 | ||
1155 | If necessary, update table showing constant values of quantities. */ | |
1156 | ||
1157 | #define CHEAPER(X,Y) ((X)->cost < (Y)->cost) | |
1158 | ||
1159 | static struct table_elt * | |
1160 | insert (x, classp, hash, mode) | |
1161 | register rtx x; | |
1162 | register struct table_elt *classp; | |
1163 | int hash; | |
1164 | enum machine_mode mode; | |
1165 | { | |
1166 | register struct table_elt *elt; | |
1167 | ||
1168 | /* If X is a register and we haven't made a quantity for it, | |
1169 | something is wrong. */ | |
1170 | if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) | |
1171 | abort (); | |
1172 | ||
1173 | /* If X is a hard register, show it is being put in the table. */ | |
1174 | if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
1175 | { | |
1176 | int regno = REGNO (x); | |
1177 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1178 | int i; | |
1179 | ||
1180 | for (i = regno; i < endregno; i++) | |
1181 | SET_HARD_REG_BIT (hard_regs_in_table, i); | |
1182 | } | |
1183 | ||
1184 | ||
1185 | /* Put an element for X into the right hash bucket. */ | |
1186 | ||
1187 | elt = get_element (); | |
1188 | elt->exp = x; | |
1189 | elt->cost = COST (x); | |
1190 | elt->next_same_value = 0; | |
1191 | elt->prev_same_value = 0; | |
1192 | elt->next_same_hash = table[hash]; | |
1193 | elt->prev_same_hash = 0; | |
1194 | elt->related_value = 0; | |
1195 | elt->in_memory = 0; | |
1196 | elt->mode = mode; | |
1197 | elt->is_const = (CONSTANT_P (x) | |
1198 | /* GNU C++ takes advantage of this for `this' | |
1199 | (and other const values). */ | |
1200 | || (RTX_UNCHANGING_P (x) | |
1201 | && GET_CODE (x) == REG | |
1202 | && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
1203 | || FIXED_BASE_PLUS_P (x)); | |
1204 | ||
1205 | if (table[hash]) | |
1206 | table[hash]->prev_same_hash = elt; | |
1207 | table[hash] = elt; | |
1208 | ||
1209 | /* Put it into the proper value-class. */ | |
1210 | if (classp) | |
1211 | { | |
1212 | classp = classp->first_same_value; | |
1213 | if (CHEAPER (elt, classp)) | |
1214 | /* Insert at the head of the class */ | |
1215 | { | |
1216 | register struct table_elt *p; | |
1217 | elt->next_same_value = classp; | |
1218 | classp->prev_same_value = elt; | |
1219 | elt->first_same_value = elt; | |
1220 | ||
1221 | for (p = classp; p; p = p->next_same_value) | |
1222 | p->first_same_value = elt; | |
1223 | } | |
1224 | else | |
1225 | { | |
1226 | /* Insert not at head of the class. */ | |
1227 | /* Put it after the last element cheaper than X. */ | |
1228 | register struct table_elt *p, *next; | |
1229 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); | |
1230 | p = next); | |
1231 | /* Put it after P and before NEXT. */ | |
1232 | elt->next_same_value = next; | |
1233 | if (next) | |
1234 | next->prev_same_value = elt; | |
1235 | elt->prev_same_value = p; | |
1236 | p->next_same_value = elt; | |
1237 | elt->first_same_value = classp; | |
1238 | } | |
1239 | } | |
1240 | else | |
1241 | elt->first_same_value = elt; | |
1242 | ||
1243 | /* If this is a constant being set equivalent to a register or a register | |
1244 | being set equivalent to a constant, note the constant equivalence. | |
1245 | ||
1246 | If this is a constant, it cannot be equivalent to a different constant, | |
1247 | and a constant is the only thing that can be cheaper than a register. So | |
1248 | we know the register is the head of the class (before the constant was | |
1249 | inserted). | |
1250 | ||
1251 | If this is a register that is not already known equivalent to a | |
1252 | constant, we must check the entire class. | |
1253 | ||
1254 | If this is a register that is already known equivalent to an insn, | |
1255 | update `qty_const_insn' to show that `this_insn' is the latest | |
1256 | insn making that quantity equivalent to the constant. */ | |
1257 | ||
1258 | if (elt->is_const && classp && GET_CODE (classp->exp) == REG) | |
1259 | { | |
1260 | qty_const[reg_qty[REGNO (classp->exp)]] | |
1261 | = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x); | |
1262 | qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn; | |
1263 | } | |
1264 | ||
1265 | else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]) | |
1266 | { | |
1267 | register struct table_elt *p; | |
1268 | ||
1269 | for (p = classp; p != 0; p = p->next_same_value) | |
1270 | { | |
1271 | if (p->is_const) | |
1272 | { | |
1273 | qty_const[reg_qty[REGNO (x)]] | |
1274 | = gen_lowpart_if_possible (GET_MODE (x), p->exp); | |
1275 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1276 | break; | |
1277 | } | |
1278 | } | |
1279 | } | |
1280 | ||
1281 | else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]] | |
1282 | && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]) | |
1283 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1284 | ||
1285 | /* If this is a constant with symbolic value, | |
1286 | and it has a term with an explicit integer value, | |
1287 | link it up with related expressions. */ | |
1288 | if (GET_CODE (x) == CONST) | |
1289 | { | |
1290 | rtx subexp = get_related_value (x); | |
1291 | int subhash; | |
1292 | struct table_elt *subelt, *subelt_prev; | |
1293 | ||
1294 | if (subexp != 0) | |
1295 | { | |
1296 | /* Get the integer-free subexpression in the hash table. */ | |
1297 | subhash = safe_hash (subexp, mode) % NBUCKETS; | |
1298 | subelt = lookup (subexp, subhash, mode); | |
1299 | if (subelt == 0) | |
906c4e36 | 1300 | subelt = insert (subexp, NULL_PTR, subhash, mode); |
7afe21cc RK |
1301 | /* Initialize SUBELT's circular chain if it has none. */ |
1302 | if (subelt->related_value == 0) | |
1303 | subelt->related_value = subelt; | |
1304 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1305 | subelt_prev = subelt; | |
1306 | while (subelt_prev->related_value != subelt) | |
1307 | subelt_prev = subelt_prev->related_value; | |
1308 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1309 | This way the element that follows SUBELT is the oldest one. */ | |
1310 | elt->related_value = subelt_prev->related_value; | |
1311 | subelt_prev->related_value = elt; | |
1312 | } | |
1313 | } | |
1314 | ||
1315 | return elt; | |
1316 | } | |
1317 | \f | |
1318 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1319 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1320 | the two classes equivalent. | |
1321 | ||
1322 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1323 | call. | |
1324 | ||
1325 | Any invalid entries in CLASS2 will not be copied. */ | |
1326 | ||
1327 | static void | |
1328 | merge_equiv_classes (class1, class2) | |
1329 | struct table_elt *class1, *class2; | |
1330 | { | |
1331 | struct table_elt *elt, *next, *new; | |
1332 | ||
1333 | /* Ensure we start with the head of the classes. */ | |
1334 | class1 = class1->first_same_value; | |
1335 | class2 = class2->first_same_value; | |
1336 | ||
1337 | /* If they were already equal, forget it. */ | |
1338 | if (class1 == class2) | |
1339 | return; | |
1340 | ||
1341 | for (elt = class2; elt; elt = next) | |
1342 | { | |
1343 | int hash; | |
1344 | rtx exp = elt->exp; | |
1345 | enum machine_mode mode = elt->mode; | |
1346 | ||
1347 | next = elt->next_same_value; | |
1348 | ||
1349 | /* Remove old entry, make a new one in CLASS1's class. | |
1350 | Don't do this for invalid entries as we cannot find their | |
1351 | hash code (it also isn't necessary). */ | |
1352 | if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) | |
1353 | { | |
1354 | hash_arg_in_memory = 0; | |
1355 | hash_arg_in_struct = 0; | |
1356 | hash = HASH (exp, mode); | |
1357 | ||
1358 | if (GET_CODE (exp) == REG) | |
1359 | delete_reg_equiv (REGNO (exp)); | |
1360 | ||
1361 | remove_from_table (elt, hash); | |
1362 | ||
1363 | if (insert_regs (exp, class1, 0)) | |
1364 | hash = HASH (exp, mode); | |
1365 | new = insert (exp, class1, hash, mode); | |
1366 | new->in_memory = hash_arg_in_memory; | |
1367 | new->in_struct = hash_arg_in_struct; | |
1368 | } | |
1369 | } | |
1370 | } | |
1371 | \f | |
1372 | /* Remove from the hash table, or mark as invalid, | |
1373 | all expressions whose values could be altered by storing in X. | |
1374 | X is a register, a subreg, or a memory reference with nonvarying address | |
1375 | (because, when a memory reference with a varying address is stored in, | |
1376 | all memory references are removed by invalidate_memory | |
1377 | so specific invalidation is superfluous). | |
1378 | ||
1379 | A nonvarying address may be just a register or just | |
1380 | a symbol reference, or it may be either of those plus | |
1381 | a numeric offset. */ | |
1382 | ||
1383 | static void | |
1384 | invalidate (x) | |
1385 | rtx x; | |
1386 | { | |
1387 | register int i; | |
1388 | register struct table_elt *p; | |
1389 | register rtx base; | |
906c4e36 | 1390 | register HOST_WIDE_INT start, end; |
7afe21cc RK |
1391 | |
1392 | /* If X is a register, dependencies on its contents | |
1393 | are recorded through the qty number mechanism. | |
1394 | Just change the qty number of the register, | |
1395 | mark it as invalid for expressions that refer to it, | |
1396 | and remove it itself. */ | |
1397 | ||
1398 | if (GET_CODE (x) == REG) | |
1399 | { | |
1400 | register int regno = REGNO (x); | |
1401 | register int hash = HASH (x, GET_MODE (x)); | |
1402 | ||
1403 | /* Remove REGNO from any quantity list it might be on and indicate | |
1404 | that it's value might have changed. If it is a pseudo, remove its | |
1405 | entry from the hash table. | |
1406 | ||
1407 | For a hard register, we do the first two actions above for any | |
1408 | additional hard registers corresponding to X. Then, if any of these | |
1409 | registers are in the table, we must remove any REG entries that | |
1410 | overlap these registers. */ | |
1411 | ||
1412 | delete_reg_equiv (regno); | |
1413 | reg_tick[regno]++; | |
1414 | ||
1415 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1416 | remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash); | |
1417 | else | |
1418 | { | |
1419 | int in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
1420 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1421 | int tregno, tendregno; | |
1422 | register struct table_elt *p, *next; | |
1423 | ||
1424 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); | |
1425 | ||
1426 | for (i = regno + 1; i < endregno; i++) | |
1427 | { | |
1428 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i); | |
1429 | CLEAR_HARD_REG_BIT (hard_regs_in_table, i); | |
1430 | delete_reg_equiv (i); | |
1431 | reg_tick[i]++; | |
1432 | } | |
1433 | ||
1434 | if (in_table) | |
1435 | for (hash = 0; hash < NBUCKETS; hash++) | |
1436 | for (p = table[hash]; p; p = next) | |
1437 | { | |
1438 | next = p->next_same_hash; | |
1439 | ||
1440 | if (GET_CODE (p->exp) != REG | |
1441 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1442 | continue; | |
1443 | ||
1444 | tregno = REGNO (p->exp); | |
1445 | tendregno | |
1446 | = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); | |
1447 | if (tendregno > regno && tregno < endregno) | |
1448 | remove_from_table (p, hash); | |
1449 | } | |
1450 | } | |
1451 | ||
1452 | return; | |
1453 | } | |
1454 | ||
1455 | if (GET_CODE (x) == SUBREG) | |
1456 | { | |
1457 | if (GET_CODE (SUBREG_REG (x)) != REG) | |
1458 | abort (); | |
1459 | invalidate (SUBREG_REG (x)); | |
1460 | return; | |
1461 | } | |
1462 | ||
1463 | /* X is not a register; it must be a memory reference with | |
1464 | a nonvarying address. Remove all hash table elements | |
1465 | that refer to overlapping pieces of memory. */ | |
1466 | ||
1467 | if (GET_CODE (x) != MEM) | |
1468 | abort (); | |
1469 | base = XEXP (x, 0); | |
1470 | start = 0; | |
1471 | ||
1472 | /* Registers with nonvarying addresses usually have constant equivalents; | |
1473 | but the frame pointer register is also possible. */ | |
1474 | if (GET_CODE (base) == REG | |
1475 | && REGNO_QTY_VALID_P (REGNO (base)) | |
1476 | && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base) | |
1477 | && qty_const[reg_qty[REGNO (base)]] != 0) | |
1478 | base = qty_const[reg_qty[REGNO (base)]]; | |
1479 | else if (GET_CODE (base) == PLUS | |
1480 | && GET_CODE (XEXP (base, 1)) == CONST_INT | |
1481 | && GET_CODE (XEXP (base, 0)) == REG | |
1482 | && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) | |
1483 | && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] | |
1484 | == GET_MODE (XEXP (base, 0))) | |
1485 | && qty_const[reg_qty[REGNO (XEXP (base, 0))]]) | |
1486 | { | |
1487 | start = INTVAL (XEXP (base, 1)); | |
1488 | base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; | |
1489 | } | |
1490 | ||
1491 | if (GET_CODE (base) == CONST) | |
1492 | base = XEXP (base, 0); | |
1493 | if (GET_CODE (base) == PLUS | |
1494 | && GET_CODE (XEXP (base, 1)) == CONST_INT) | |
1495 | { | |
1496 | start += INTVAL (XEXP (base, 1)); | |
1497 | base = XEXP (base, 0); | |
1498 | } | |
1499 | ||
1500 | end = start + GET_MODE_SIZE (GET_MODE (x)); | |
1501 | for (i = 0; i < NBUCKETS; i++) | |
1502 | { | |
1503 | register struct table_elt *next; | |
1504 | for (p = table[i]; p; p = next) | |
1505 | { | |
1506 | next = p->next_same_hash; | |
1507 | if (refers_to_mem_p (p->exp, base, start, end)) | |
1508 | remove_from_table (p, i); | |
1509 | } | |
1510 | } | |
1511 | } | |
1512 | ||
1513 | /* Remove all expressions that refer to register REGNO, | |
1514 | since they are already invalid, and we are about to | |
1515 | mark that register valid again and don't want the old | |
1516 | expressions to reappear as valid. */ | |
1517 | ||
1518 | static void | |
1519 | remove_invalid_refs (regno) | |
1520 | int regno; | |
1521 | { | |
1522 | register int i; | |
1523 | register struct table_elt *p, *next; | |
1524 | ||
1525 | for (i = 0; i < NBUCKETS; i++) | |
1526 | for (p = table[i]; p; p = next) | |
1527 | { | |
1528 | next = p->next_same_hash; | |
1529 | if (GET_CODE (p->exp) != REG | |
906c4e36 | 1530 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) |
7afe21cc RK |
1531 | remove_from_table (p, i); |
1532 | } | |
1533 | } | |
1534 | \f | |
1535 | /* Recompute the hash codes of any valid entries in the hash table that | |
1536 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1537 | ||
1538 | This is called when we make a jump equivalence. */ | |
1539 | ||
1540 | static void | |
1541 | rehash_using_reg (x) | |
1542 | rtx x; | |
1543 | { | |
1544 | int i; | |
1545 | struct table_elt *p, *next; | |
1546 | int hash; | |
1547 | ||
1548 | if (GET_CODE (x) == SUBREG) | |
1549 | x = SUBREG_REG (x); | |
1550 | ||
1551 | /* If X is not a register or if the register is known not to be in any | |
1552 | valid entries in the table, we have no work to do. */ | |
1553 | ||
1554 | if (GET_CODE (x) != REG | |
1555 | || reg_in_table[REGNO (x)] < 0 | |
1556 | || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)]) | |
1557 | return; | |
1558 | ||
1559 | /* Scan all hash chains looking for valid entries that mention X. | |
1560 | If we find one and it is in the wrong hash chain, move it. We can skip | |
1561 | objects that are registers, since they are handled specially. */ | |
1562 | ||
1563 | for (i = 0; i < NBUCKETS; i++) | |
1564 | for (p = table[i]; p; p = next) | |
1565 | { | |
1566 | next = p->next_same_hash; | |
1567 | if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) | |
538b78e7 | 1568 | && exp_equiv_p (p->exp, p->exp, 1, 0) |
7afe21cc RK |
1569 | && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS)) |
1570 | { | |
1571 | if (p->next_same_hash) | |
1572 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1573 | ||
1574 | if (p->prev_same_hash) | |
1575 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1576 | else | |
1577 | table[i] = p->next_same_hash; | |
1578 | ||
1579 | p->next_same_hash = table[hash]; | |
1580 | p->prev_same_hash = 0; | |
1581 | if (table[hash]) | |
1582 | table[hash]->prev_same_hash = p; | |
1583 | table[hash] = p; | |
1584 | } | |
1585 | } | |
1586 | } | |
1587 | \f | |
1588 | /* Remove from the hash table all expressions that reference memory, | |
1589 | or some of them as specified by *WRITES. */ | |
1590 | ||
1591 | static void | |
1592 | invalidate_memory (writes) | |
1593 | struct write_data *writes; | |
1594 | { | |
1595 | register int i; | |
1596 | register struct table_elt *p, *next; | |
1597 | int all = writes->all; | |
1598 | int nonscalar = writes->nonscalar; | |
1599 | ||
1600 | for (i = 0; i < NBUCKETS; i++) | |
1601 | for (p = table[i]; p; p = next) | |
1602 | { | |
1603 | next = p->next_same_hash; | |
1604 | if (p->in_memory | |
1605 | && (all | |
1606 | || (nonscalar && p->in_struct) | |
1607 | || cse_rtx_addr_varies_p (p->exp))) | |
1608 | remove_from_table (p, i); | |
1609 | } | |
1610 | } | |
1611 | \f | |
1612 | /* Remove from the hash table any expression that is a call-clobbered | |
1613 | register. Also update their TICK values. */ | |
1614 | ||
1615 | static void | |
1616 | invalidate_for_call () | |
1617 | { | |
1618 | int regno, endregno; | |
1619 | int i; | |
1620 | int hash; | |
1621 | struct table_elt *p, *next; | |
1622 | int in_table = 0; | |
1623 | ||
1624 | /* Go through all the hard registers. For each that is clobbered in | |
1625 | a CALL_INSN, remove the register from quantity chains and update | |
1626 | reg_tick if defined. Also see if any of these registers is currently | |
1627 | in the table. */ | |
1628 | ||
1629 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
1630 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
1631 | { | |
1632 | delete_reg_equiv (regno); | |
1633 | if (reg_tick[regno] >= 0) | |
1634 | reg_tick[regno]++; | |
1635 | ||
1636 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
1637 | } | |
1638 | ||
1639 | /* In the case where we have no call-clobbered hard registers in the | |
1640 | table, we are done. Otherwise, scan the table and remove any | |
1641 | entry that overlaps a call-clobbered register. */ | |
1642 | ||
1643 | if (in_table) | |
1644 | for (hash = 0; hash < NBUCKETS; hash++) | |
1645 | for (p = table[hash]; p; p = next) | |
1646 | { | |
1647 | next = p->next_same_hash; | |
1648 | ||
1649 | if (GET_CODE (p->exp) != REG | |
1650 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1651 | continue; | |
1652 | ||
1653 | regno = REGNO (p->exp); | |
1654 | endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); | |
1655 | ||
1656 | for (i = regno; i < endregno; i++) | |
1657 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
1658 | { | |
1659 | remove_from_table (p, hash); | |
1660 | break; | |
1661 | } | |
1662 | } | |
1663 | } | |
1664 | \f | |
1665 | /* Given an expression X of type CONST, | |
1666 | and ELT which is its table entry (or 0 if it | |
1667 | is not in the hash table), | |
1668 | return an alternate expression for X as a register plus integer. | |
1669 | If none can be found, return 0. */ | |
1670 | ||
1671 | static rtx | |
1672 | use_related_value (x, elt) | |
1673 | rtx x; | |
1674 | struct table_elt *elt; | |
1675 | { | |
1676 | register struct table_elt *relt = 0; | |
1677 | register struct table_elt *p, *q; | |
906c4e36 | 1678 | HOST_WIDE_INT offset; |
7afe21cc RK |
1679 | |
1680 | /* First, is there anything related known? | |
1681 | If we have a table element, we can tell from that. | |
1682 | Otherwise, must look it up. */ | |
1683 | ||
1684 | if (elt != 0 && elt->related_value != 0) | |
1685 | relt = elt; | |
1686 | else if (elt == 0 && GET_CODE (x) == CONST) | |
1687 | { | |
1688 | rtx subexp = get_related_value (x); | |
1689 | if (subexp != 0) | |
1690 | relt = lookup (subexp, | |
1691 | safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, | |
1692 | GET_MODE (subexp)); | |
1693 | } | |
1694 | ||
1695 | if (relt == 0) | |
1696 | return 0; | |
1697 | ||
1698 | /* Search all related table entries for one that has an | |
1699 | equivalent register. */ | |
1700 | ||
1701 | p = relt; | |
1702 | while (1) | |
1703 | { | |
1704 | /* This loop is strange in that it is executed in two different cases. | |
1705 | The first is when X is already in the table. Then it is searching | |
1706 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
1707 | X is not in the table. Then RELT points to a class for the related | |
1708 | value. | |
1709 | ||
1710 | Ensure that, whatever case we are in, that we ignore classes that have | |
1711 | the same value as X. */ | |
1712 | ||
1713 | if (rtx_equal_p (x, p->exp)) | |
1714 | q = 0; | |
1715 | else | |
1716 | for (q = p->first_same_value; q; q = q->next_same_value) | |
1717 | if (GET_CODE (q->exp) == REG) | |
1718 | break; | |
1719 | ||
1720 | if (q) | |
1721 | break; | |
1722 | ||
1723 | p = p->related_value; | |
1724 | ||
1725 | /* We went all the way around, so there is nothing to be found. | |
1726 | Alternatively, perhaps RELT was in the table for some other reason | |
1727 | and it has no related values recorded. */ | |
1728 | if (p == relt || p == 0) | |
1729 | break; | |
1730 | } | |
1731 | ||
1732 | if (q == 0) | |
1733 | return 0; | |
1734 | ||
1735 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
1736 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
1737 | return plus_constant (q->exp, offset); | |
1738 | } | |
1739 | \f | |
1740 | /* Hash an rtx. We are careful to make sure the value is never negative. | |
1741 | Equivalent registers hash identically. | |
1742 | MODE is used in hashing for CONST_INTs only; | |
1743 | otherwise the mode of X is used. | |
1744 | ||
1745 | Store 1 in do_not_record if any subexpression is volatile. | |
1746 | ||
1747 | Store 1 in hash_arg_in_memory if X contains a MEM rtx | |
1748 | which does not have the RTX_UNCHANGING_P bit set. | |
1749 | In this case, also store 1 in hash_arg_in_struct | |
1750 | if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set. | |
1751 | ||
1752 | Note that cse_insn knows that the hash code of a MEM expression | |
1753 | is just (int) MEM plus the hash code of the address. */ | |
1754 | ||
1755 | static int | |
1756 | canon_hash (x, mode) | |
1757 | rtx x; | |
1758 | enum machine_mode mode; | |
1759 | { | |
1760 | register int i, j; | |
1761 | register int hash = 0; | |
1762 | register enum rtx_code code; | |
1763 | register char *fmt; | |
1764 | ||
1765 | /* repeat is used to turn tail-recursion into iteration. */ | |
1766 | repeat: | |
1767 | if (x == 0) | |
1768 | return hash; | |
1769 | ||
1770 | code = GET_CODE (x); | |
1771 | switch (code) | |
1772 | { | |
1773 | case REG: | |
1774 | { | |
1775 | register int regno = REGNO (x); | |
1776 | ||
1777 | /* On some machines, we can't record any non-fixed hard register, | |
1778 | because extending its life will cause reload problems. We | |
1779 | consider ap, fp, and sp to be fixed for this purpose. | |
1780 | On all machines, we can't record any global registers. */ | |
1781 | ||
1782 | if (regno < FIRST_PSEUDO_REGISTER | |
1783 | && (global_regs[regno] | |
1784 | #ifdef SMALL_REGISTER_CLASSES | |
1785 | || (! fixed_regs[regno] | |
1786 | && regno != FRAME_POINTER_REGNUM | |
1787 | && regno != ARG_POINTER_REGNUM | |
1788 | && regno != STACK_POINTER_REGNUM) | |
1789 | #endif | |
1790 | )) | |
1791 | { | |
1792 | do_not_record = 1; | |
1793 | return 0; | |
1794 | } | |
1795 | return hash + ((int) REG << 7) + reg_qty[regno]; | |
1796 | } | |
1797 | ||
1798 | case CONST_INT: | |
1799 | hash += ((int) mode + ((int) CONST_INT << 7) | |
1800 | + INTVAL (x) + (INTVAL (x) >> HASHBITS)); | |
1801 | return ((1 << HASHBITS) - 1) & hash; | |
1802 | ||
1803 | case CONST_DOUBLE: | |
1804 | /* This is like the general case, except that it only counts | |
1805 | the integers representing the constant. */ | |
1806 | hash += (int) code + (int) GET_MODE (x); | |
1807 | { | |
1808 | int i; | |
1809 | for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) | |
1810 | { | |
1811 | int tem = XINT (x, i); | |
1812 | hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); | |
1813 | } | |
1814 | } | |
1815 | return hash; | |
1816 | ||
1817 | /* Assume there is only one rtx object for any given label. */ | |
1818 | case LABEL_REF: | |
1819 | /* Use `and' to ensure a positive number. */ | |
c4fd10e7 RK |
1820 | return (hash + ((HOST_WIDE_INT) LABEL_REF << 7) |
1821 | + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1))); | |
7afe21cc RK |
1822 | |
1823 | case SYMBOL_REF: | |
c4fd10e7 RK |
1824 | return (hash + ((HOST_WIDE_INT) SYMBOL_REF << 7) |
1825 | + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1))); | |
7afe21cc RK |
1826 | |
1827 | case MEM: | |
1828 | if (MEM_VOLATILE_P (x)) | |
1829 | { | |
1830 | do_not_record = 1; | |
1831 | return 0; | |
1832 | } | |
1833 | if (! RTX_UNCHANGING_P (x)) | |
1834 | { | |
1835 | hash_arg_in_memory = 1; | |
1836 | if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1; | |
1837 | } | |
1838 | /* Now that we have already found this special case, | |
1839 | might as well speed it up as much as possible. */ | |
1840 | hash += (int) MEM; | |
1841 | x = XEXP (x, 0); | |
1842 | goto repeat; | |
1843 | ||
1844 | case PRE_DEC: | |
1845 | case PRE_INC: | |
1846 | case POST_DEC: | |
1847 | case POST_INC: | |
1848 | case PC: | |
1849 | case CC0: | |
1850 | case CALL: | |
1851 | case UNSPEC_VOLATILE: | |
1852 | do_not_record = 1; | |
1853 | return 0; | |
1854 | ||
1855 | case ASM_OPERANDS: | |
1856 | if (MEM_VOLATILE_P (x)) | |
1857 | { | |
1858 | do_not_record = 1; | |
1859 | return 0; | |
1860 | } | |
1861 | } | |
1862 | ||
1863 | i = GET_RTX_LENGTH (code) - 1; | |
1864 | hash += (int) code + (int) GET_MODE (x); | |
1865 | fmt = GET_RTX_FORMAT (code); | |
1866 | for (; i >= 0; i--) | |
1867 | { | |
1868 | if (fmt[i] == 'e') | |
1869 | { | |
1870 | rtx tem = XEXP (x, i); | |
1871 | rtx tem1; | |
1872 | ||
1873 | /* If the operand is a REG that is equivalent to a constant, hash | |
1874 | as if we were hashing the constant, since we will be comparing | |
1875 | that way. */ | |
1876 | if (tem != 0 && GET_CODE (tem) == REG | |
1877 | && REGNO_QTY_VALID_P (REGNO (tem)) | |
1878 | && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem) | |
1879 | && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0 | |
1880 | && CONSTANT_P (tem1)) | |
1881 | tem = tem1; | |
1882 | ||
1883 | /* If we are about to do the last recursive call | |
1884 | needed at this level, change it into iteration. | |
1885 | This function is called enough to be worth it. */ | |
1886 | if (i == 0) | |
1887 | { | |
1888 | x = tem; | |
1889 | goto repeat; | |
1890 | } | |
1891 | hash += canon_hash (tem, 0); | |
1892 | } | |
1893 | else if (fmt[i] == 'E') | |
1894 | for (j = 0; j < XVECLEN (x, i); j++) | |
1895 | hash += canon_hash (XVECEXP (x, i, j), 0); | |
1896 | else if (fmt[i] == 's') | |
1897 | { | |
1898 | register char *p = XSTR (x, i); | |
1899 | if (p) | |
1900 | while (*p) | |
1901 | { | |
1902 | register int tem = *p++; | |
1903 | hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); | |
1904 | } | |
1905 | } | |
1906 | else if (fmt[i] == 'i') | |
1907 | { | |
1908 | register int tem = XINT (x, i); | |
1909 | hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); | |
1910 | } | |
1911 | else | |
1912 | abort (); | |
1913 | } | |
1914 | return hash; | |
1915 | } | |
1916 | ||
1917 | /* Like canon_hash but with no side effects. */ | |
1918 | ||
1919 | static int | |
1920 | safe_hash (x, mode) | |
1921 | rtx x; | |
1922 | enum machine_mode mode; | |
1923 | { | |
1924 | int save_do_not_record = do_not_record; | |
1925 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
1926 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
1927 | int hash = canon_hash (x, mode); | |
1928 | hash_arg_in_memory = save_hash_arg_in_memory; | |
1929 | hash_arg_in_struct = save_hash_arg_in_struct; | |
1930 | do_not_record = save_do_not_record; | |
1931 | return hash; | |
1932 | } | |
1933 | \f | |
1934 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
1935 | without actually constructing the canonicalization of either one. | |
1936 | If VALIDATE is nonzero, | |
1937 | we assume X is an expression being processed from the rtl | |
1938 | and Y was found in the hash table. We check register refs | |
1939 | in Y for being marked as valid. | |
1940 | ||
1941 | If EQUAL_VALUES is nonzero, we allow a register to match a constant value | |
1942 | that is known to be in the register. Ordinarily, we don't allow them | |
1943 | to match, because letting them match would cause unpredictable results | |
1944 | in all the places that search a hash table chain for an equivalent | |
1945 | for a given value. A possible equivalent that has different structure | |
1946 | has its hash code computed from different data. Whether the hash code | |
1947 | is the same as that of the the given value is pure luck. */ | |
1948 | ||
1949 | static int | |
1950 | exp_equiv_p (x, y, validate, equal_values) | |
1951 | rtx x, y; | |
1952 | int validate; | |
1953 | int equal_values; | |
1954 | { | |
906c4e36 | 1955 | register int i, j; |
7afe21cc RK |
1956 | register enum rtx_code code; |
1957 | register char *fmt; | |
1958 | ||
1959 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
1960 | if VALIDATE is nonzero. */ | |
1961 | if (x == y && !validate) | |
1962 | return 1; | |
1963 | if (x == 0 || y == 0) | |
1964 | return x == y; | |
1965 | ||
1966 | code = GET_CODE (x); | |
1967 | if (code != GET_CODE (y)) | |
1968 | { | |
1969 | if (!equal_values) | |
1970 | return 0; | |
1971 | ||
1972 | /* If X is a constant and Y is a register or vice versa, they may be | |
1973 | equivalent. We only have to validate if Y is a register. */ | |
1974 | if (CONSTANT_P (x) && GET_CODE (y) == REG | |
1975 | && REGNO_QTY_VALID_P (REGNO (y)) | |
1976 | && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]] | |
1977 | && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]]) | |
1978 | && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)])) | |
1979 | return 1; | |
1980 | ||
1981 | if (CONSTANT_P (y) && code == REG | |
1982 | && REGNO_QTY_VALID_P (REGNO (x)) | |
1983 | && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]] | |
1984 | && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]])) | |
1985 | return 1; | |
1986 | ||
1987 | return 0; | |
1988 | } | |
1989 | ||
1990 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
1991 | if (GET_MODE (x) != GET_MODE (y)) | |
1992 | return 0; | |
1993 | ||
1994 | switch (code) | |
1995 | { | |
1996 | case PC: | |
1997 | case CC0: | |
1998 | return x == y; | |
1999 | ||
2000 | case CONST_INT: | |
58c8c593 | 2001 | return INTVAL (x) == INTVAL (y); |
7afe21cc RK |
2002 | |
2003 | case LABEL_REF: | |
2004 | case SYMBOL_REF: | |
2005 | return XEXP (x, 0) == XEXP (y, 0); | |
2006 | ||
2007 | case REG: | |
2008 | { | |
2009 | int regno = REGNO (y); | |
2010 | int endregno | |
2011 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2012 | : HARD_REGNO_NREGS (regno, GET_MODE (y))); | |
2013 | int i; | |
2014 | ||
2015 | /* If the quantities are not the same, the expressions are not | |
2016 | equivalent. If there are and we are not to validate, they | |
2017 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
2018 | ||
2019 | if (reg_qty[REGNO (x)] != reg_qty[regno]) | |
2020 | return 0; | |
2021 | ||
2022 | if (! validate) | |
2023 | return 1; | |
2024 | ||
2025 | for (i = regno; i < endregno; i++) | |
2026 | if (reg_in_table[i] != reg_tick[i]) | |
2027 | return 0; | |
2028 | ||
2029 | return 1; | |
2030 | } | |
2031 | ||
2032 | /* For commutative operations, check both orders. */ | |
2033 | case PLUS: | |
2034 | case MULT: | |
2035 | case AND: | |
2036 | case IOR: | |
2037 | case XOR: | |
2038 | case NE: | |
2039 | case EQ: | |
2040 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) | |
2041 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), | |
2042 | validate, equal_values)) | |
2043 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), | |
2044 | validate, equal_values) | |
2045 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), | |
2046 | validate, equal_values))); | |
2047 | } | |
2048 | ||
2049 | /* Compare the elements. If any pair of corresponding elements | |
2050 | fail to match, return 0 for the whole things. */ | |
2051 | ||
2052 | fmt = GET_RTX_FORMAT (code); | |
2053 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2054 | { | |
906c4e36 | 2055 | switch (fmt[i]) |
7afe21cc | 2056 | { |
906c4e36 | 2057 | case 'e': |
7afe21cc RK |
2058 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) |
2059 | return 0; | |
906c4e36 RK |
2060 | break; |
2061 | ||
2062 | case 'E': | |
7afe21cc RK |
2063 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2064 | return 0; | |
2065 | for (j = 0; j < XVECLEN (x, i); j++) | |
2066 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
2067 | validate, equal_values)) | |
2068 | return 0; | |
906c4e36 RK |
2069 | break; |
2070 | ||
2071 | case 's': | |
7afe21cc RK |
2072 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2073 | return 0; | |
906c4e36 RK |
2074 | break; |
2075 | ||
2076 | case 'i': | |
7afe21cc RK |
2077 | if (XINT (x, i) != XINT (y, i)) |
2078 | return 0; | |
906c4e36 RK |
2079 | break; |
2080 | ||
2081 | case 'w': | |
2082 | if (XWINT (x, i) != XWINT (y, i)) | |
2083 | return 0; | |
2084 | break; | |
2085 | ||
2086 | case '0': | |
2087 | break; | |
2088 | ||
2089 | default: | |
2090 | abort (); | |
7afe21cc | 2091 | } |
906c4e36 RK |
2092 | } |
2093 | ||
7afe21cc RK |
2094 | return 1; |
2095 | } | |
2096 | \f | |
2097 | /* Return 1 iff any subexpression of X matches Y. | |
2098 | Here we do not require that X or Y be valid (for registers referred to) | |
2099 | for being in the hash table. */ | |
2100 | ||
2101 | int | |
2102 | refers_to_p (x, y) | |
2103 | rtx x, y; | |
2104 | { | |
2105 | register int i; | |
2106 | register enum rtx_code code; | |
2107 | register char *fmt; | |
2108 | ||
2109 | repeat: | |
2110 | if (x == y) | |
2111 | return 1; | |
2112 | if (x == 0 || y == 0) | |
2113 | return 0; | |
2114 | ||
2115 | code = GET_CODE (x); | |
2116 | /* If X as a whole has the same code as Y, they may match. | |
2117 | If so, return 1. */ | |
2118 | if (code == GET_CODE (y)) | |
2119 | { | |
2120 | if (exp_equiv_p (x, y, 0, 1)) | |
2121 | return 1; | |
2122 | } | |
2123 | ||
2124 | /* X does not match, so try its subexpressions. */ | |
2125 | ||
2126 | fmt = GET_RTX_FORMAT (code); | |
2127 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2128 | if (fmt[i] == 'e') | |
2129 | { | |
2130 | if (i == 0) | |
2131 | { | |
2132 | x = XEXP (x, 0); | |
2133 | goto repeat; | |
2134 | } | |
2135 | else | |
2136 | if (refers_to_p (XEXP (x, i), y)) | |
2137 | return 1; | |
2138 | } | |
2139 | else if (fmt[i] == 'E') | |
2140 | { | |
2141 | int j; | |
2142 | for (j = 0; j < XVECLEN (x, i); j++) | |
2143 | if (refers_to_p (XVECEXP (x, i, j), y)) | |
2144 | return 1; | |
2145 | } | |
2146 | ||
2147 | return 0; | |
2148 | } | |
2149 | \f | |
2150 | /* Return 1 iff any subexpression of X refers to memory | |
2151 | at an address of BASE plus some offset | |
2152 | such that any of the bytes' offsets fall between START (inclusive) | |
2153 | and END (exclusive). | |
2154 | ||
2155 | The value is undefined if X is a varying address. | |
2156 | This function is not used in such cases. | |
2157 | ||
2158 | When used in the cse pass, `qty_const' is nonzero, and it is used | |
2159 | to treat an address that is a register with a known constant value | |
2160 | as if it were that constant value. | |
2161 | In the loop pass, `qty_const' is zero, so this is not done. */ | |
2162 | ||
2163 | int | |
2164 | refers_to_mem_p (x, base, start, end) | |
2165 | rtx x, base; | |
906c4e36 | 2166 | HOST_WIDE_INT start, end; |
7afe21cc | 2167 | { |
906c4e36 | 2168 | register HOST_WIDE_INT i; |
7afe21cc RK |
2169 | register enum rtx_code code; |
2170 | register char *fmt; | |
2171 | ||
2172 | if (GET_CODE (base) == CONST_INT) | |
2173 | { | |
2174 | start += INTVAL (base); | |
2175 | end += INTVAL (base); | |
2176 | base = const0_rtx; | |
2177 | } | |
2178 | ||
2179 | repeat: | |
2180 | if (x == 0) | |
2181 | return 0; | |
2182 | ||
2183 | code = GET_CODE (x); | |
2184 | if (code == MEM) | |
2185 | { | |
2186 | register rtx addr = XEXP (x, 0); /* Get the address. */ | |
2187 | int myend; | |
2188 | ||
2189 | i = 0; | |
2190 | if (GET_CODE (addr) == REG | |
2191 | /* qty_const is 0 when outside the cse pass; | |
2192 | at such times, this info is not available. */ | |
2193 | && qty_const != 0 | |
2194 | && REGNO_QTY_VALID_P (REGNO (addr)) | |
2195 | && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]] | |
2196 | && qty_const[reg_qty[REGNO (addr)]] != 0) | |
2197 | addr = qty_const[reg_qty[REGNO (addr)]]; | |
2198 | else if (GET_CODE (addr) == PLUS | |
2199 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
2200 | && GET_CODE (XEXP (addr, 0)) == REG | |
2201 | && qty_const != 0 | |
2202 | && REGNO_QTY_VALID_P (REGNO (XEXP (addr, 0))) | |
2203 | && (GET_MODE (XEXP (addr, 0)) | |
2204 | == qty_mode[reg_qty[REGNO (XEXP (addr, 0))]]) | |
2205 | && qty_const[reg_qty[REGNO (XEXP (addr, 0))]]) | |
2206 | { | |
2207 | i = INTVAL (XEXP (addr, 1)); | |
2208 | addr = qty_const[reg_qty[REGNO (XEXP (addr, 0))]]; | |
2209 | } | |
2210 | ||
2211 | check_addr: | |
2212 | if (GET_CODE (addr) == CONST) | |
2213 | addr = XEXP (addr, 0); | |
2214 | ||
2215 | /* If ADDR is BASE, or BASE plus an integer, put | |
2216 | the integer in I. */ | |
2217 | if (GET_CODE (addr) == PLUS | |
2218 | && XEXP (addr, 0) == base | |
2219 | && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
2220 | i += INTVAL (XEXP (addr, 1)); | |
2221 | else if (GET_CODE (addr) == LO_SUM) | |
2222 | { | |
2223 | if (GET_CODE (base) != LO_SUM) | |
2224 | return 1; | |
2225 | /* The REG component of the LO_SUM is known by the | |
2226 | const value in the XEXP part. */ | |
2227 | addr = XEXP (addr, 1); | |
2228 | base = XEXP (base, 1); | |
2229 | i = 0; | |
2230 | if (GET_CODE (base) == CONST) | |
2231 | base = XEXP (base, 0); | |
2232 | if (GET_CODE (base) == PLUS | |
2233 | && GET_CODE (XEXP (base, 1)) == CONST_INT) | |
2234 | { | |
906c4e36 | 2235 | HOST_WIDE_INT tem = INTVAL (XEXP (base, 1)); |
7afe21cc RK |
2236 | start += tem; |
2237 | end += tem; | |
2238 | base = XEXP (base, 0); | |
2239 | } | |
2240 | goto check_addr; | |
2241 | } | |
2242 | else if (GET_CODE (base) == LO_SUM) | |
2243 | { | |
2244 | base = XEXP (base, 1); | |
2245 | if (GET_CODE (base) == CONST) | |
2246 | base = XEXP (base, 0); | |
2247 | if (GET_CODE (base) == PLUS | |
2248 | && GET_CODE (XEXP (base, 1)) == CONST_INT) | |
2249 | { | |
906c4e36 | 2250 | HOST_WIDE_INT tem = INTVAL (XEXP (base, 1)); |
7afe21cc RK |
2251 | start += tem; |
2252 | end += tem; | |
2253 | base = XEXP (base, 0); | |
2254 | } | |
2255 | goto check_addr; | |
2256 | } | |
2257 | else if (GET_CODE (addr) == CONST_INT && base == const0_rtx) | |
2258 | i = INTVAL (addr); | |
2259 | else if (addr != base) | |
2260 | return 0; | |
2261 | ||
2262 | myend = i + GET_MODE_SIZE (GET_MODE (x)); | |
2263 | return myend > start && i < end; | |
2264 | } | |
2265 | ||
2266 | /* X does not match, so try its subexpressions. */ | |
2267 | ||
2268 | fmt = GET_RTX_FORMAT (code); | |
2269 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2270 | if (fmt[i] == 'e') | |
2271 | { | |
2272 | if (i == 0) | |
2273 | { | |
2274 | x = XEXP (x, 0); | |
2275 | goto repeat; | |
2276 | } | |
2277 | else | |
2278 | if (refers_to_mem_p (XEXP (x, i), base, start, end)) | |
2279 | return 1; | |
2280 | } | |
2281 | else if (fmt[i] == 'E') | |
2282 | { | |
2283 | int j; | |
2284 | for (j = 0; j < XVECLEN (x, i); j++) | |
2285 | if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end)) | |
2286 | return 1; | |
2287 | } | |
2288 | ||
2289 | return 0; | |
2290 | } | |
2291 | ||
2292 | /* Nonzero if X refers to memory at a varying address; | |
2293 | except that a register which has at the moment a known constant value | |
2294 | isn't considered variable. */ | |
2295 | ||
2296 | static int | |
2297 | cse_rtx_addr_varies_p (x) | |
2298 | rtx x; | |
2299 | { | |
2300 | /* We need not check for X and the equivalence class being of the same | |
2301 | mode because if X is equivalent to a constant in some mode, it | |
2302 | doesn't vary in any mode. */ | |
2303 | ||
2304 | if (GET_CODE (x) == MEM | |
2305 | && GET_CODE (XEXP (x, 0)) == REG | |
2306 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) | |
2307 | && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]] | |
2308 | && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0) | |
2309 | return 0; | |
2310 | ||
2311 | if (GET_CODE (x) == MEM | |
2312 | && GET_CODE (XEXP (x, 0)) == PLUS | |
2313 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
2314 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG | |
2315 | && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) | |
2316 | && (GET_MODE (XEXP (XEXP (x, 0), 0)) | |
2317 | == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2318 | && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2319 | return 0; | |
2320 | ||
2321 | return rtx_addr_varies_p (x); | |
2322 | } | |
2323 | \f | |
2324 | /* Canonicalize an expression: | |
2325 | replace each register reference inside it | |
2326 | with the "oldest" equivalent register. | |
2327 | ||
2328 | If INSN is non-zero and we are replacing a pseudo with a hard register | |
2329 | or vice versa, verify that INSN remains valid after we make our | |
2330 | substitution. */ | |
2331 | ||
2332 | static rtx | |
2333 | canon_reg (x, insn) | |
2334 | rtx x; | |
2335 | rtx insn; | |
2336 | { | |
2337 | register int i; | |
2338 | register enum rtx_code code; | |
2339 | register char *fmt; | |
2340 | ||
2341 | if (x == 0) | |
2342 | return x; | |
2343 | ||
2344 | code = GET_CODE (x); | |
2345 | switch (code) | |
2346 | { | |
2347 | case PC: | |
2348 | case CC0: | |
2349 | case CONST: | |
2350 | case CONST_INT: | |
2351 | case CONST_DOUBLE: | |
2352 | case SYMBOL_REF: | |
2353 | case LABEL_REF: | |
2354 | case ADDR_VEC: | |
2355 | case ADDR_DIFF_VEC: | |
2356 | return x; | |
2357 | ||
2358 | case REG: | |
2359 | { | |
2360 | register int first; | |
2361 | ||
2362 | /* Never replace a hard reg, because hard regs can appear | |
2363 | in more than one machine mode, and we must preserve the mode | |
2364 | of each occurrence. Also, some hard regs appear in | |
2365 | MEMs that are shared and mustn't be altered. Don't try to | |
2366 | replace any reg that maps to a reg of class NO_REGS. */ | |
2367 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2368 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2369 | return x; | |
2370 | ||
2371 | first = qty_first_reg[reg_qty[REGNO (x)]]; | |
2372 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] | |
2373 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
2374 | : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first)); | |
2375 | } | |
2376 | } | |
2377 | ||
2378 | fmt = GET_RTX_FORMAT (code); | |
2379 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2380 | { | |
2381 | register int j; | |
2382 | ||
2383 | if (fmt[i] == 'e') | |
2384 | { | |
2385 | rtx new = canon_reg (XEXP (x, i), insn); | |
2386 | ||
2387 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
178c39f6 | 2388 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ |
7afe21cc | 2389 | if (new && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG |
178c39f6 RK |
2390 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) |
2391 | != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) | |
2392 | || (insn != 0 && insn_n_dups[recog_memoized (insn)] > 0))) | |
77fa0940 | 2393 | validate_change (insn, &XEXP (x, i), new, 1); |
7afe21cc RK |
2394 | else |
2395 | XEXP (x, i) = new; | |
2396 | } | |
2397 | else if (fmt[i] == 'E') | |
2398 | for (j = 0; j < XVECLEN (x, i); j++) | |
2399 | XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); | |
2400 | } | |
2401 | ||
2402 | return x; | |
2403 | } | |
2404 | \f | |
2405 | /* LOC is a location with INSN that is an operand address (the contents of | |
2406 | a MEM). Find the best equivalent address to use that is valid for this | |
2407 | insn. | |
2408 | ||
2409 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2410 | is a good approximation for that cost. However, most RISC machines have | |
2411 | only a few (usually only one) memory reference formats. If an address is | |
2412 | valid at all, it is often just as cheap as any other address. Hence, for | |
2413 | RISC machines, we use the configuration macro `ADDRESS_COST' to compare the | |
2414 | costs of various addresses. For two addresses of equal cost, choose the one | |
2415 | with the highest `rtx_cost' value as that has the potential of eliminating | |
2416 | the most insns. For equal costs, we choose the first in the equivalence | |
2417 | class. Note that we ignore the fact that pseudo registers are cheaper | |
2418 | than hard registers here because we would also prefer the pseudo registers. | |
2419 | */ | |
2420 | ||
2421 | void | |
2422 | find_best_addr (insn, loc) | |
2423 | rtx insn; | |
2424 | rtx *loc; | |
2425 | { | |
2426 | struct table_elt *elt, *p; | |
2427 | rtx addr = *loc; | |
2428 | int our_cost; | |
2429 | int found_better = 1; | |
2430 | int save_do_not_record = do_not_record; | |
2431 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2432 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
2433 | int hash_code; | |
2434 | int addr_volatile; | |
2435 | int regno; | |
2436 | ||
2437 | /* Do not try to replace constant addresses or addresses of local and | |
2438 | argument slots. These MEM expressions are made only once and inserted | |
2439 | in many instructions, as well as being used to control symbol table | |
2440 | output. It is not safe to clobber them. | |
2441 | ||
2442 | There are some uncommon cases where the address is already in a register | |
2443 | for some reason, but we cannot take advantage of that because we have | |
2444 | no easy way to unshare the MEM. In addition, looking up all stack | |
2445 | addresses is costly. */ | |
2446 | if ((GET_CODE (addr) == PLUS | |
2447 | && GET_CODE (XEXP (addr, 0)) == REG | |
2448 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
2449 | && (regno = REGNO (XEXP (addr, 0)), | |
2450 | regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)) | |
2451 | || (GET_CODE (addr) == REG | |
2452 | && (regno = REGNO (addr), | |
2453 | regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)) | |
2454 | || CONSTANT_ADDRESS_P (addr)) | |
2455 | return; | |
2456 | ||
2457 | /* If this address is not simply a register, try to fold it. This will | |
2458 | sometimes simplify the expression. Many simplifications | |
2459 | will not be valid, but some, usually applying the associative rule, will | |
2460 | be valid and produce better code. */ | |
2461 | if (GET_CODE (addr) != REG | |
2462 | && validate_change (insn, loc, fold_rtx (addr, insn), 0)) | |
2463 | addr = *loc; | |
2464 | ||
42495ca0 RK |
2465 | /* If this address is not in the hash table, we can't look for equivalences |
2466 | of the whole address. Also, ignore if volatile. */ | |
2467 | ||
7afe21cc RK |
2468 | do_not_record = 0; |
2469 | hash_code = HASH (addr, Pmode); | |
2470 | addr_volatile = do_not_record; | |
2471 | do_not_record = save_do_not_record; | |
2472 | hash_arg_in_memory = save_hash_arg_in_memory; | |
2473 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2474 | ||
2475 | if (addr_volatile) | |
2476 | return; | |
2477 | ||
2478 | elt = lookup (addr, hash_code, Pmode); | |
2479 | ||
7afe21cc | 2480 | #ifndef ADDRESS_COST |
42495ca0 RK |
2481 | if (elt) |
2482 | { | |
2483 | our_cost = elt->cost; | |
2484 | ||
2485 | /* Find the lowest cost below ours that works. */ | |
2486 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
2487 | if (elt->cost < our_cost | |
2488 | && (GET_CODE (elt->exp) == REG | |
2489 | || exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
2490 | && validate_change (insn, loc, | |
906c4e36 | 2491 | canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) |
42495ca0 RK |
2492 | return; |
2493 | } | |
2494 | #else | |
7afe21cc | 2495 | |
42495ca0 RK |
2496 | if (elt) |
2497 | { | |
2498 | /* We need to find the best (under the criteria documented above) entry | |
2499 | in the class that is valid. We use the `flag' field to indicate | |
2500 | choices that were invalid and iterate until we can't find a better | |
2501 | one that hasn't already been tried. */ | |
7afe21cc | 2502 | |
42495ca0 RK |
2503 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2504 | p->flag = 0; | |
7afe21cc | 2505 | |
42495ca0 RK |
2506 | while (found_better) |
2507 | { | |
2508 | int best_addr_cost = ADDRESS_COST (*loc); | |
2509 | int best_rtx_cost = (elt->cost + 1) >> 1; | |
2510 | struct table_elt *best_elt = elt; | |
2511 | ||
2512 | found_better = 0; | |
2513 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2514 | if (! p->flag | |
2515 | && (GET_CODE (p->exp) == REG | |
2516 | || exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2517 | && (ADDRESS_COST (p->exp) < best_addr_cost | |
2518 | || (ADDRESS_COST (p->exp) == best_addr_cost | |
2519 | && (p->cost + 1) >> 1 > best_rtx_cost))) | |
2520 | { | |
2521 | found_better = 1; | |
2522 | best_addr_cost = ADDRESS_COST (p->exp); | |
2523 | best_rtx_cost = (p->cost + 1) >> 1; | |
2524 | best_elt = p; | |
2525 | } | |
7afe21cc | 2526 | |
42495ca0 RK |
2527 | if (found_better) |
2528 | { | |
2529 | if (validate_change (insn, loc, | |
906c4e36 RK |
2530 | canon_reg (copy_rtx (best_elt->exp), |
2531 | NULL_RTX), 0)) | |
42495ca0 RK |
2532 | return; |
2533 | else | |
2534 | best_elt->flag = 1; | |
2535 | } | |
2536 | } | |
2537 | } | |
7afe21cc | 2538 | |
42495ca0 RK |
2539 | /* If the address is a binary operation with the first operand a register |
2540 | and the second a constant, do the same as above, but looking for | |
2541 | equivalences of the register. Then try to simplify before checking for | |
2542 | the best address to use. This catches a few cases: First is when we | |
2543 | have REG+const and the register is another REG+const. We can often merge | |
2544 | the constants and eliminate one insn and one register. It may also be | |
2545 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
2546 | code on the Alpha for unaligned byte stores. */ | |
2547 | ||
2548 | if (flag_expensive_optimizations | |
2549 | && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' | |
2550 | || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') | |
2551 | && GET_CODE (XEXP (*loc, 0)) == REG | |
2552 | && GET_CODE (XEXP (*loc, 1)) == CONST_INT) | |
7afe21cc | 2553 | { |
42495ca0 RK |
2554 | rtx c = XEXP (*loc, 1); |
2555 | ||
2556 | do_not_record = 0; | |
2557 | hash_code = HASH (XEXP (*loc, 0), Pmode); | |
2558 | do_not_record = save_do_not_record; | |
2559 | hash_arg_in_memory = save_hash_arg_in_memory; | |
2560 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2561 | ||
2562 | elt = lookup (XEXP (*loc, 0), hash_code, Pmode); | |
2563 | if (elt == 0) | |
2564 | return; | |
2565 | ||
2566 | /* We need to find the best (under the criteria documented above) entry | |
2567 | in the class that is valid. We use the `flag' field to indicate | |
2568 | choices that were invalid and iterate until we can't find a better | |
2569 | one that hasn't already been tried. */ | |
7afe21cc | 2570 | |
7afe21cc | 2571 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 2572 | p->flag = 0; |
7afe21cc | 2573 | |
42495ca0 | 2574 | while (found_better) |
7afe21cc | 2575 | { |
42495ca0 RK |
2576 | int best_addr_cost = ADDRESS_COST (*loc); |
2577 | int best_rtx_cost = (COST (*loc) + 1) >> 1; | |
2578 | struct table_elt *best_elt = elt; | |
2579 | rtx best_rtx = *loc; | |
2580 | ||
2581 | found_better = 0; | |
2582 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2583 | if (! p->flag | |
2584 | && (GET_CODE (p->exp) == REG | |
2585 | || exp_equiv_p (p->exp, p->exp, 1, 0))) | |
2586 | { | |
2587 | rtx new = simplify_binary_operation (GET_CODE (*loc), Pmode, | |
2588 | p->exp, c); | |
2589 | ||
2590 | if (new == 0) | |
2591 | new = gen_rtx (GET_CODE (*loc), Pmode, p->exp, c); | |
2592 | ||
2593 | if ((ADDRESS_COST (new) < best_addr_cost | |
2594 | || (ADDRESS_COST (new) == best_addr_cost | |
2595 | && (COST (new) + 1) >> 1 > best_rtx_cost))) | |
2596 | { | |
2597 | found_better = 1; | |
2598 | best_addr_cost = ADDRESS_COST (new); | |
2599 | best_rtx_cost = (COST (new) + 1) >> 1; | |
2600 | best_elt = p; | |
2601 | best_rtx = new; | |
2602 | } | |
2603 | } | |
2604 | ||
2605 | if (found_better) | |
2606 | { | |
2607 | if (validate_change (insn, loc, | |
906c4e36 RK |
2608 | canon_reg (copy_rtx (best_rtx), |
2609 | NULL_RTX), 0)) | |
42495ca0 RK |
2610 | return; |
2611 | else | |
2612 | best_elt->flag = 1; | |
2613 | } | |
7afe21cc RK |
2614 | } |
2615 | } | |
2616 | #endif | |
2617 | } | |
2618 | \f | |
2619 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison | |
2620 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2621 | what values are being compared. | |
2622 | ||
2623 | *PARG1 and *PARG2 are updated to contain the rtx representing the values | |
2624 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2625 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2626 | compared to produce cc0. | |
2627 | ||
2628 | The return value is the comparison operator and is either the code of | |
2629 | A or the code corresponding to the inverse of the comparison. */ | |
2630 | ||
2631 | static enum rtx_code | |
2632 | find_comparison_args (code, parg1, parg2) | |
2633 | enum rtx_code code; | |
2634 | rtx *parg1, *parg2; | |
2635 | { | |
2636 | rtx arg1, arg2; | |
2637 | ||
2638 | arg1 = *parg1, arg2 = *parg2; | |
2639 | ||
2640 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ | |
2641 | ||
2642 | while (arg2 == const0_rtx) | |
2643 | { | |
2644 | /* Set non-zero when we find something of interest. */ | |
2645 | rtx x = 0; | |
2646 | int reverse_code = 0; | |
2647 | struct table_elt *p = 0; | |
2648 | ||
2649 | /* If arg1 is a COMPARE, extract the comparison arguments from it. | |
2650 | On machines with CC0, this is the only case that can occur, since | |
2651 | fold_rtx will return the COMPARE or item being compared with zero | |
2652 | when given CC0. */ | |
2653 | ||
2654 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) | |
2655 | x = arg1; | |
2656 | ||
2657 | /* If ARG1 is a comparison operator and CODE is testing for | |
2658 | STORE_FLAG_VALUE, get the inner arguments. */ | |
2659 | ||
2660 | else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') | |
2661 | { | |
c610adec RK |
2662 | if (code == NE |
2663 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2664 | && code == LT && STORE_FLAG_VALUE == -1) | |
2665 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2666 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2667 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2668 | #endif | |
2669 | ) | |
7afe21cc | 2670 | x = arg1; |
c610adec RK |
2671 | else if (code == EQ |
2672 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2673 | && code == GE && STORE_FLAG_VALUE == -1) | |
2674 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2675 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2676 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2677 | #endif | |
2678 | ) | |
7afe21cc RK |
2679 | x = arg1, reverse_code = 1; |
2680 | } | |
2681 | ||
2682 | /* ??? We could also check for | |
2683 | ||
2684 | (ne (and (eq (...) (const_int 1))) (const_int 0)) | |
2685 | ||
2686 | and related forms, but let's wait until we see them occurring. */ | |
2687 | ||
2688 | if (x == 0) | |
2689 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2690 | that lets us see what is being compared. */ | |
2691 | p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS, | |
2692 | GET_MODE (arg1)); | |
2693 | if (p) p = p->first_same_value; | |
2694 | ||
2695 | for (; p; p = p->next_same_value) | |
2696 | { | |
2697 | enum machine_mode inner_mode = GET_MODE (p->exp); | |
2698 | ||
2699 | /* If the entry isn't valid, skip it. */ | |
2700 | if (! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2701 | continue; | |
2702 | ||
2703 | if (GET_CODE (p->exp) == COMPARE | |
2704 | /* Another possibility is that this machine has a compare insn | |
2705 | that includes the comparison code. In that case, ARG1 would | |
2706 | be equivalent to a comparison operation that would set ARG1 to | |
2707 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
2708 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
2709 | we must reverse ORIG_CODE. On machine with a negative value | |
2710 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
2711 | || ((code == NE | |
2712 | || (code == LT | |
c610adec | 2713 | && GET_MODE_CLASS (inner_mode) == MODE_INT |
906c4e36 RK |
2714 | && (GET_MODE_BITSIZE (inner_mode) |
2715 | <= HOST_BITS_PER_WIDE_INT) | |
7afe21cc | 2716 | && (STORE_FLAG_VALUE |
906c4e36 RK |
2717 | & ((HOST_WIDE_INT) 1 |
2718 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
c610adec RK |
2719 | #ifdef FLOAT_STORE_FLAG_VALUE |
2720 | || (code == LT | |
2721 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2722 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2723 | #endif | |
2724 | ) | |
7afe21cc RK |
2725 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) |
2726 | { | |
2727 | x = p->exp; | |
2728 | break; | |
2729 | } | |
2730 | else if ((code == EQ | |
2731 | || (code == GE | |
c610adec | 2732 | && GET_MODE_CLASS (inner_mode) == MODE_INT |
906c4e36 RK |
2733 | && (GET_MODE_BITSIZE (inner_mode) |
2734 | <= HOST_BITS_PER_WIDE_INT) | |
7afe21cc | 2735 | && (STORE_FLAG_VALUE |
906c4e36 RK |
2736 | & ((HOST_WIDE_INT) 1 |
2737 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
c610adec RK |
2738 | #ifdef FLOAT_STORE_FLAG_VALUE |
2739 | || (code == GE | |
2740 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2741 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2742 | #endif | |
2743 | ) | |
7afe21cc RK |
2744 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') |
2745 | { | |
2746 | reverse_code = 1; | |
2747 | x = p->exp; | |
2748 | break; | |
2749 | } | |
2750 | ||
2751 | /* If this is fp + constant, the equivalent is a better operand since | |
2752 | it may let us predict the value of the comparison. */ | |
2753 | else if (NONZERO_BASE_PLUS_P (p->exp)) | |
2754 | { | |
2755 | arg1 = p->exp; | |
2756 | continue; | |
2757 | } | |
2758 | } | |
2759 | ||
2760 | /* If we didn't find a useful equivalence for ARG1, we are done. | |
2761 | Otherwise, set up for the next iteration. */ | |
2762 | if (x == 0) | |
2763 | break; | |
2764 | ||
2765 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
2766 | if (GET_RTX_CLASS (GET_CODE (x)) == '<') | |
2767 | code = GET_CODE (x); | |
2768 | ||
2769 | if (reverse_code) | |
2770 | code = reverse_condition (code); | |
2771 | } | |
2772 | ||
2773 | /* Return our results. */ | |
2774 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
2775 | ||
2776 | return code; | |
2777 | } | |
2778 | \f | |
2779 | /* Try to simplify a unary operation CODE whose output mode is to be | |
2780 | MODE with input operand OP whose mode was originally OP_MODE. | |
2781 | Return zero if no simplification can be made. */ | |
2782 | ||
2783 | rtx | |
2784 | simplify_unary_operation (code, mode, op, op_mode) | |
2785 | enum rtx_code code; | |
2786 | enum machine_mode mode; | |
2787 | rtx op; | |
2788 | enum machine_mode op_mode; | |
2789 | { | |
2790 | register int width = GET_MODE_BITSIZE (mode); | |
2791 | ||
2792 | /* The order of these tests is critical so that, for example, we don't | |
2793 | check the wrong mode (input vs. output) for a conversion operation, | |
2794 | such as FIX. At some point, this should be simplified. */ | |
2795 | ||
2796 | #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
2797 | if (code == FLOAT && GET_CODE (op) == CONST_INT) | |
2798 | { | |
2799 | REAL_VALUE_TYPE d; | |
2800 | ||
2801 | #ifdef REAL_ARITHMETIC | |
2802 | REAL_VALUE_FROM_INT (d, INTVAL (op), INTVAL (op) < 0 ? ~0 : 0); | |
2803 | #else | |
2804 | d = (double) INTVAL (op); | |
2805 | #endif | |
2806 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); | |
2807 | } | |
2808 | else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_INT) | |
2809 | { | |
2810 | REAL_VALUE_TYPE d; | |
2811 | ||
2812 | #ifdef REAL_ARITHMETIC | |
2813 | REAL_VALUE_FROM_INT (d, INTVAL (op), 0); | |
2814 | #else | |
2815 | d = (double) (unsigned int) INTVAL (op); | |
2816 | #endif | |
2817 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); | |
2818 | } | |
2819 | ||
2820 | else if (code == FLOAT && GET_CODE (op) == CONST_DOUBLE | |
2821 | && GET_MODE (op) == VOIDmode) | |
2822 | { | |
2823 | REAL_VALUE_TYPE d; | |
2824 | ||
2825 | #ifdef REAL_ARITHMETIC | |
2826 | REAL_VALUE_FROM_INT (d, CONST_DOUBLE_LOW (op), CONST_DOUBLE_HIGH (op)); | |
2827 | #else | |
2828 | if (CONST_DOUBLE_HIGH (op) < 0) | |
2829 | { | |
2830 | d = (double) (~ CONST_DOUBLE_HIGH (op)); | |
906c4e36 RK |
2831 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
2832 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
2833 | d += (double) (unsigned HOST_WIDE_INT) (~ CONST_DOUBLE_LOW (op)); | |
7afe21cc RK |
2834 | d = (- d - 1.0); |
2835 | } | |
2836 | else | |
2837 | { | |
2838 | d = (double) CONST_DOUBLE_HIGH (op); | |
906c4e36 RK |
2839 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
2840 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
2841 | d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); | |
7afe21cc RK |
2842 | } |
2843 | #endif /* REAL_ARITHMETIC */ | |
2844 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); | |
2845 | } | |
2846 | else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_DOUBLE | |
2847 | && GET_MODE (op) == VOIDmode) | |
2848 | { | |
2849 | REAL_VALUE_TYPE d; | |
2850 | ||
2851 | #ifdef REAL_ARITHMETIC | |
2852 | REAL_VALUE_FROM_UNSIGNED_INT (d, CONST_DOUBLE_LOW (op), | |
2853 | CONST_DOUBLE_HIGH (op)); | |
2854 | #else | |
2855 | d = (double) CONST_DOUBLE_HIGH (op); | |
906c4e36 RK |
2856 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
2857 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
2858 | d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); | |
7afe21cc RK |
2859 | #endif /* REAL_ARITHMETIC */ |
2860 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); | |
2861 | } | |
2862 | #endif | |
2863 | ||
f89e32e9 RK |
2864 | if (GET_CODE (op) == CONST_INT |
2865 | && width <= HOST_BITS_PER_WIDE_INT && width > 0) | |
7afe21cc | 2866 | { |
906c4e36 RK |
2867 | register HOST_WIDE_INT arg0 = INTVAL (op); |
2868 | register HOST_WIDE_INT val; | |
7afe21cc RK |
2869 | |
2870 | switch (code) | |
2871 | { | |
2872 | case NOT: | |
2873 | val = ~ arg0; | |
2874 | break; | |
2875 | ||
2876 | case NEG: | |
2877 | val = - arg0; | |
2878 | break; | |
2879 | ||
2880 | case ABS: | |
2881 | val = (arg0 >= 0 ? arg0 : - arg0); | |
2882 | break; | |
2883 | ||
2884 | case FFS: | |
2885 | /* Don't use ffs here. Instead, get low order bit and then its | |
2886 | number. If arg0 is zero, this will return 0, as desired. */ | |
2887 | arg0 &= GET_MODE_MASK (mode); | |
2888 | val = exact_log2 (arg0 & (- arg0)) + 1; | |
2889 | break; | |
2890 | ||
2891 | case TRUNCATE: | |
2892 | val = arg0; | |
2893 | break; | |
2894 | ||
2895 | case ZERO_EXTEND: | |
2896 | if (op_mode == VOIDmode) | |
2897 | op_mode = mode; | |
82a5e898 | 2898 | if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) |
d80e9fd7 RS |
2899 | { |
2900 | /* If we were really extending the mode, | |
2901 | we would have to distinguish between zero-extension | |
2902 | and sign-extension. */ | |
2903 | if (width != GET_MODE_BITSIZE (op_mode)) | |
2904 | abort (); | |
2905 | val = arg0; | |
2906 | } | |
82a5e898 CH |
2907 | else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) |
2908 | val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); | |
7afe21cc RK |
2909 | else |
2910 | return 0; | |
2911 | break; | |
2912 | ||
2913 | case SIGN_EXTEND: | |
2914 | if (op_mode == VOIDmode) | |
2915 | op_mode = mode; | |
82a5e898 | 2916 | if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) |
d80e9fd7 RS |
2917 | { |
2918 | /* If we were really extending the mode, | |
2919 | we would have to distinguish between zero-extension | |
2920 | and sign-extension. */ | |
2921 | if (width != GET_MODE_BITSIZE (op_mode)) | |
2922 | abort (); | |
2923 | val = arg0; | |
2924 | } | |
7afe21cc RK |
2925 | else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_INT) |
2926 | { | |
82a5e898 CH |
2927 | val |
2928 | = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); | |
2929 | if (val | |
2930 | & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1))) | |
2931 | val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); | |
7afe21cc RK |
2932 | } |
2933 | else | |
2934 | return 0; | |
2935 | break; | |
2936 | ||
d45cf215 RS |
2937 | case SQRT: |
2938 | return 0; | |
2939 | ||
7afe21cc RK |
2940 | default: |
2941 | abort (); | |
2942 | } | |
2943 | ||
2944 | /* Clear the bits that don't belong in our mode, | |
2945 | unless they and our sign bit are all one. | |
2946 | So we get either a reasonable negative value or a reasonable | |
2947 | unsigned value for this mode. */ | |
906c4e36 RK |
2948 | if (width < HOST_BITS_PER_WIDE_INT |
2949 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
2950 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
7afe21cc RK |
2951 | val &= (1 << width) - 1; |
2952 | ||
906c4e36 | 2953 | return GEN_INT (val); |
7afe21cc RK |
2954 | } |
2955 | ||
2956 | /* We can do some operations on integer CONST_DOUBLEs. Also allow | |
2957 | for a DImode operation on a CONST_INT. */ | |
2958 | else if (GET_MODE (op) == VOIDmode | |
2959 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) | |
2960 | { | |
906c4e36 | 2961 | HOST_WIDE_INT l1, h1, lv, hv; |
7afe21cc RK |
2962 | |
2963 | if (GET_CODE (op) == CONST_DOUBLE) | |
2964 | l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op); | |
2965 | else | |
2966 | l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0; | |
2967 | ||
2968 | switch (code) | |
2969 | { | |
2970 | case NOT: | |
2971 | lv = ~ l1; | |
2972 | hv = ~ h1; | |
2973 | break; | |
2974 | ||
2975 | case NEG: | |
2976 | neg_double (l1, h1, &lv, &hv); | |
2977 | break; | |
2978 | ||
2979 | case ABS: | |
2980 | if (h1 < 0) | |
2981 | neg_double (l1, h1, &lv, &hv); | |
2982 | else | |
2983 | lv = l1, hv = h1; | |
2984 | break; | |
2985 | ||
2986 | case FFS: | |
2987 | hv = 0; | |
2988 | if (l1 == 0) | |
906c4e36 | 2989 | lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1; |
7afe21cc RK |
2990 | else |
2991 | lv = exact_log2 (l1 & (-l1)) + 1; | |
2992 | break; | |
2993 | ||
2994 | case TRUNCATE: | |
906c4e36 RK |
2995 | if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) |
2996 | return GEN_INT (l1 & GET_MODE_MASK (mode)); | |
7afe21cc RK |
2997 | else |
2998 | return 0; | |
2999 | break; | |
3000 | ||
f72aed24 RS |
3001 | case ZERO_EXTEND: |
3002 | if (op_mode == VOIDmode | |
906c4e36 | 3003 | || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) |
f72aed24 RS |
3004 | return 0; |
3005 | ||
3006 | hv = 0; | |
3007 | lv = l1 & GET_MODE_MASK (op_mode); | |
3008 | break; | |
3009 | ||
3010 | case SIGN_EXTEND: | |
3011 | if (op_mode == VOIDmode | |
906c4e36 | 3012 | || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) |
f72aed24 RS |
3013 | return 0; |
3014 | else | |
3015 | { | |
3016 | lv = l1 & GET_MODE_MASK (op_mode); | |
906c4e36 RK |
3017 | if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT |
3018 | && (lv & ((HOST_WIDE_INT) 1 | |
3019 | << (GET_MODE_BITSIZE (op_mode) - 1))) != 0) | |
3020 | lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); | |
f72aed24 | 3021 | |
906c4e36 | 3022 | hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0; |
f72aed24 RS |
3023 | } |
3024 | break; | |
3025 | ||
d45cf215 RS |
3026 | case SQRT: |
3027 | return 0; | |
3028 | ||
7afe21cc RK |
3029 | default: |
3030 | return 0; | |
3031 | } | |
3032 | ||
3033 | return immed_double_const (lv, hv, mode); | |
3034 | } | |
3035 | ||
3036 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3037 | else if (GET_CODE (op) == CONST_DOUBLE | |
3038 | && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
3039 | { | |
3040 | REAL_VALUE_TYPE d; | |
3041 | jmp_buf handler; | |
3042 | rtx x; | |
3043 | ||
3044 | if (setjmp (handler)) | |
3045 | /* There used to be a warning here, but that is inadvisable. | |
3046 | People may want to cause traps, and the natural way | |
3047 | to do it should not get a warning. */ | |
3048 | return 0; | |
3049 | ||
3050 | set_float_handler (handler); | |
3051 | ||
3052 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
3053 | ||
3054 | switch (code) | |
3055 | { | |
3056 | case NEG: | |
3057 | d = REAL_VALUE_NEGATE (d); | |
3058 | break; | |
3059 | ||
3060 | case ABS: | |
8b3686ed | 3061 | if (REAL_VALUE_NEGATIVE (d)) |
7afe21cc RK |
3062 | d = REAL_VALUE_NEGATE (d); |
3063 | break; | |
3064 | ||
3065 | case FLOAT_TRUNCATE: | |
5352b11a | 3066 | d = (double) real_value_truncate (mode, d); |
7afe21cc RK |
3067 | break; |
3068 | ||
3069 | case FLOAT_EXTEND: | |
3070 | /* All this does is change the mode. */ | |
3071 | break; | |
3072 | ||
3073 | case FIX: | |
3074 | d = (double) REAL_VALUE_FIX_TRUNCATE (d); | |
3075 | break; | |
3076 | ||
3077 | case UNSIGNED_FIX: | |
3078 | d = (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d); | |
3079 | break; | |
3080 | ||
d45cf215 RS |
3081 | case SQRT: |
3082 | return 0; | |
3083 | ||
7afe21cc RK |
3084 | default: |
3085 | abort (); | |
3086 | } | |
3087 | ||
3088 | x = immed_real_const_1 (d, mode); | |
906c4e36 | 3089 | set_float_handler (NULL_PTR); |
7afe21cc RK |
3090 | return x; |
3091 | } | |
3092 | else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE_CLASS (mode) == MODE_INT | |
906c4e36 | 3093 | && width <= HOST_BITS_PER_WIDE_INT && width > 0) |
7afe21cc RK |
3094 | { |
3095 | REAL_VALUE_TYPE d; | |
3096 | jmp_buf handler; | |
3097 | rtx x; | |
906c4e36 | 3098 | HOST_WIDE_INT val; |
7afe21cc RK |
3099 | |
3100 | if (setjmp (handler)) | |
3101 | return 0; | |
3102 | ||
3103 | set_float_handler (handler); | |
3104 | ||
3105 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
3106 | ||
3107 | switch (code) | |
3108 | { | |
3109 | case FIX: | |
3110 | val = REAL_VALUE_FIX (d); | |
3111 | break; | |
3112 | ||
3113 | case UNSIGNED_FIX: | |
3114 | val = REAL_VALUE_UNSIGNED_FIX (d); | |
3115 | break; | |
3116 | ||
3117 | default: | |
3118 | abort (); | |
3119 | } | |
3120 | ||
906c4e36 | 3121 | set_float_handler (NULL_PTR); |
7afe21cc RK |
3122 | |
3123 | /* Clear the bits that don't belong in our mode, | |
3124 | unless they and our sign bit are all one. | |
3125 | So we get either a reasonable negative value or a reasonable | |
3126 | unsigned value for this mode. */ | |
906c4e36 RK |
3127 | if (width < HOST_BITS_PER_WIDE_INT |
3128 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
3129 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
3130 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 3131 | |
906c4e36 | 3132 | return GEN_INT (val); |
7afe21cc RK |
3133 | } |
3134 | #endif | |
a6acbe15 RS |
3135 | /* This was formerly used only for non-IEEE float. |
3136 | eggert@twinsun.com says it is safe for IEEE also. */ | |
3137 | else | |
7afe21cc RK |
3138 | { |
3139 | /* There are some simplifications we can do even if the operands | |
a6acbe15 | 3140 | aren't constant. */ |
7afe21cc RK |
3141 | switch (code) |
3142 | { | |
3143 | case NEG: | |
3144 | case NOT: | |
3145 | /* (not (not X)) == X, similarly for NEG. */ | |
3146 | if (GET_CODE (op) == code) | |
3147 | return XEXP (op, 0); | |
3148 | break; | |
3149 | ||
3150 | case SIGN_EXTEND: | |
3151 | /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2)))) | |
3152 | becomes just the MINUS if its mode is MODE. This allows | |
3153 | folding switch statements on machines using casesi (such as | |
3154 | the Vax). */ | |
3155 | if (GET_CODE (op) == TRUNCATE | |
3156 | && GET_MODE (XEXP (op, 0)) == mode | |
3157 | && GET_CODE (XEXP (op, 0)) == MINUS | |
3158 | && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF | |
3159 | && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) | |
3160 | return XEXP (op, 0); | |
3161 | break; | |
3162 | } | |
3163 | ||
3164 | return 0; | |
3165 | } | |
7afe21cc RK |
3166 | } |
3167 | \f | |
3168 | /* Simplify a binary operation CODE with result mode MODE, operating on OP0 | |
3169 | and OP1. Return 0 if no simplification is possible. | |
3170 | ||
3171 | Don't use this for relational operations such as EQ or LT. | |
3172 | Use simplify_relational_operation instead. */ | |
3173 | ||
3174 | rtx | |
3175 | simplify_binary_operation (code, mode, op0, op1) | |
3176 | enum rtx_code code; | |
3177 | enum machine_mode mode; | |
3178 | rtx op0, op1; | |
3179 | { | |
906c4e36 RK |
3180 | register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; |
3181 | HOST_WIDE_INT val; | |
7afe21cc RK |
3182 | int width = GET_MODE_BITSIZE (mode); |
3183 | ||
3184 | /* Relational operations don't work here. We must know the mode | |
3185 | of the operands in order to do the comparison correctly. | |
3186 | Assuming a full word can give incorrect results. | |
3187 | Consider comparing 128 with -128 in QImode. */ | |
3188 | ||
3189 | if (GET_RTX_CLASS (code) == '<') | |
3190 | abort (); | |
3191 | ||
3192 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3193 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
3194 | && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE | |
3195 | && mode == GET_MODE (op0) && mode == GET_MODE (op1)) | |
3196 | { | |
3197 | REAL_VALUE_TYPE f0, f1, value; | |
3198 | jmp_buf handler; | |
3199 | ||
3200 | if (setjmp (handler)) | |
3201 | return 0; | |
3202 | ||
3203 | set_float_handler (handler); | |
3204 | ||
3205 | REAL_VALUE_FROM_CONST_DOUBLE (f0, op0); | |
3206 | REAL_VALUE_FROM_CONST_DOUBLE (f1, op1); | |
5352b11a RS |
3207 | f0 = real_value_truncate (mode, f0); |
3208 | f1 = real_value_truncate (mode, f1); | |
7afe21cc RK |
3209 | |
3210 | #ifdef REAL_ARITHMETIC | |
3211 | REAL_ARITHMETIC (value, code, f0, f1); | |
3212 | #else | |
3213 | switch (code) | |
3214 | { | |
3215 | case PLUS: | |
3216 | value = f0 + f1; | |
3217 | break; | |
3218 | case MINUS: | |
3219 | value = f0 - f1; | |
3220 | break; | |
3221 | case MULT: | |
3222 | value = f0 * f1; | |
3223 | break; | |
3224 | case DIV: | |
3225 | #ifndef REAL_INFINITY | |
3226 | if (f1 == 0) | |
3227 | abort (); | |
3228 | #endif | |
3229 | value = f0 / f1; | |
3230 | break; | |
3231 | case SMIN: | |
3232 | value = MIN (f0, f1); | |
3233 | break; | |
3234 | case SMAX: | |
3235 | value = MAX (f0, f1); | |
3236 | break; | |
3237 | default: | |
3238 | abort (); | |
3239 | } | |
3240 | #endif | |
3241 | ||
906c4e36 | 3242 | set_float_handler (NULL_PTR); |
5352b11a | 3243 | value = real_value_truncate (mode, value); |
7afe21cc RK |
3244 | return immed_real_const_1 (value, mode); |
3245 | } | |
3246 | ||
3247 | /* We can fold some multi-word operations. */ | |
3248 | else if (GET_MODE_CLASS (mode) == MODE_INT | |
3249 | && GET_CODE (op0) == CONST_DOUBLE | |
3250 | && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) | |
3251 | { | |
906c4e36 | 3252 | HOST_WIDE_INT l1, l2, h1, h2, lv, hv; |
7afe21cc RK |
3253 | |
3254 | l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0); | |
3255 | ||
3256 | if (GET_CODE (op1) == CONST_DOUBLE) | |
3257 | l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1); | |
3258 | else | |
3259 | l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0; | |
3260 | ||
3261 | switch (code) | |
3262 | { | |
3263 | case MINUS: | |
3264 | /* A - B == A + (-B). */ | |
3265 | neg_double (l2, h2, &lv, &hv); | |
3266 | l2 = lv, h2 = hv; | |
3267 | ||
3268 | /* .. fall through ... */ | |
3269 | ||
3270 | case PLUS: | |
3271 | add_double (l1, h1, l2, h2, &lv, &hv); | |
3272 | break; | |
3273 | ||
3274 | case MULT: | |
3275 | mul_double (l1, h1, l2, h2, &lv, &hv); | |
3276 | break; | |
3277 | ||
3278 | case DIV: case MOD: case UDIV: case UMOD: | |
3279 | /* We'd need to include tree.h to do this and it doesn't seem worth | |
3280 | it. */ | |
3281 | return 0; | |
3282 | ||
3283 | case AND: | |
3284 | lv = l1 & l2, hv = h1 & h2; | |
3285 | break; | |
3286 | ||
3287 | case IOR: | |
3288 | lv = l1 | l2, hv = h1 | h2; | |
3289 | break; | |
3290 | ||
3291 | case XOR: | |
3292 | lv = l1 ^ l2, hv = h1 ^ h2; | |
3293 | break; | |
3294 | ||
3295 | case SMIN: | |
906c4e36 RK |
3296 | if (h1 < h2 |
3297 | || (h1 == h2 | |
3298 | && ((unsigned HOST_WIDE_INT) l1 | |
3299 | < (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3300 | lv = l1, hv = h1; |
3301 | else | |
3302 | lv = l2, hv = h2; | |
3303 | break; | |
3304 | ||
3305 | case SMAX: | |
906c4e36 RK |
3306 | if (h1 > h2 |
3307 | || (h1 == h2 | |
3308 | && ((unsigned HOST_WIDE_INT) l1 | |
3309 | > (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3310 | lv = l1, hv = h1; |
3311 | else | |
3312 | lv = l2, hv = h2; | |
3313 | break; | |
3314 | ||
3315 | case UMIN: | |
906c4e36 RK |
3316 | if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2 |
3317 | || (h1 == h2 | |
3318 | && ((unsigned HOST_WIDE_INT) l1 | |
3319 | < (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3320 | lv = l1, hv = h1; |
3321 | else | |
3322 | lv = l2, hv = h2; | |
3323 | break; | |
3324 | ||
3325 | case UMAX: | |
906c4e36 RK |
3326 | if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2 |
3327 | || (h1 == h2 | |
3328 | && ((unsigned HOST_WIDE_INT) l1 | |
3329 | > (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3330 | lv = l1, hv = h1; |
3331 | else | |
3332 | lv = l2, hv = h2; | |
3333 | break; | |
3334 | ||
3335 | case LSHIFTRT: case ASHIFTRT: | |
3336 | case ASHIFT: case LSHIFT: | |
3337 | case ROTATE: case ROTATERT: | |
3338 | #ifdef SHIFT_COUNT_TRUNCATED | |
3339 | l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0; | |
3340 | #endif | |
3341 | ||
3342 | if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode)) | |
3343 | return 0; | |
3344 | ||
3345 | if (code == LSHIFTRT || code == ASHIFTRT) | |
3346 | rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, | |
3347 | code == ASHIFTRT); | |
3348 | else if (code == ASHIFT || code == LSHIFT) | |
3349 | lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, | |
3350 | code == ASHIFT); | |
3351 | else if (code == ROTATE) | |
3352 | lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); | |
3353 | else /* code == ROTATERT */ | |
3354 | rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); | |
3355 | break; | |
3356 | ||
3357 | default: | |
3358 | return 0; | |
3359 | } | |
3360 | ||
3361 | return immed_double_const (lv, hv, mode); | |
3362 | } | |
3363 | #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ | |
3364 | ||
3365 | if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT | |
906c4e36 | 3366 | || width > HOST_BITS_PER_WIDE_INT || width == 0) |
7afe21cc RK |
3367 | { |
3368 | /* Even if we can't compute a constant result, | |
3369 | there are some cases worth simplifying. */ | |
3370 | ||
3371 | switch (code) | |
3372 | { | |
3373 | case PLUS: | |
3374 | /* In IEEE floating point, x+0 is not the same as x. Similarly | |
3375 | for the other optimizations below. */ | |
3376 | if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT | |
3377 | && GET_MODE_CLASS (mode) != MODE_INT) | |
3378 | break; | |
3379 | ||
3380 | if (op1 == CONST0_RTX (mode)) | |
3381 | return op0; | |
3382 | ||
3383 | /* Strip off any surrounding CONSTs. They don't matter in any of | |
3384 | the cases below. */ | |
3385 | if (GET_CODE (op0) == CONST) | |
3386 | op0 = XEXP (op0, 0); | |
3387 | if (GET_CODE (op1) == CONST) | |
3388 | op1 = XEXP (op1, 0); | |
3389 | ||
3390 | /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */ | |
3391 | if (GET_CODE (op0) == NEG) | |
3392 | { | |
3393 | rtx tem = simplify_binary_operation (MINUS, mode, | |
3394 | op1, XEXP (op0, 0)); | |
3395 | return tem ? tem : gen_rtx (MINUS, mode, op1, XEXP (op0, 0)); | |
3396 | } | |
3397 | else if (GET_CODE (op1) == NEG) | |
3398 | { | |
3399 | rtx tem = simplify_binary_operation (MINUS, mode, | |
3400 | op0, XEXP (op1, 0)); | |
3401 | return tem ? tem : gen_rtx (MINUS, mode, op0, XEXP (op1, 0)); | |
3402 | } | |
3403 | ||
3404 | /* Don't use the associative law for floating point. | |
3405 | The inaccuracy makes it nonassociative, | |
3406 | and subtle programs can break if operations are associated. */ | |
3407 | if (GET_MODE_CLASS (mode) != MODE_INT) | |
3408 | break; | |
3409 | ||
3410 | /* (a - b) + b -> a, similarly a + (b - a) -> a */ | |
3411 | if (GET_CODE (op0) == MINUS | |
3412 | && rtx_equal_p (XEXP (op0, 1), op1) && ! side_effects_p (op1)) | |
3413 | return XEXP (op0, 0); | |
3414 | ||
3415 | if (GET_CODE (op1) == MINUS | |
3416 | && rtx_equal_p (XEXP (op1, 1), op0) && ! side_effects_p (op0)) | |
3417 | return XEXP (op1, 0); | |
3418 | ||
3419 | /* (c1 - a) + c2 becomes (c1 + c2) - a. */ | |
3420 | if (GET_CODE (op1) == CONST_INT && GET_CODE (op0) == MINUS | |
3421 | && GET_CODE (XEXP (op0, 0)) == CONST_INT) | |
3422 | { | |
3423 | rtx tem = simplify_binary_operation (PLUS, mode, op1, | |
3424 | XEXP (op0, 0)); | |
3425 | ||
3426 | return tem ? gen_rtx (MINUS, mode, tem, XEXP (op0, 1)) : 0; | |
3427 | } | |
3428 | ||
3429 | /* Handle both-operands-constant cases. */ | |
3430 | if (CONSTANT_P (op0) && CONSTANT_P (op1) | |
3431 | && GET_CODE (op0) != CONST_DOUBLE | |
3432 | && GET_CODE (op1) != CONST_DOUBLE | |
3433 | && GET_MODE_CLASS (mode) == MODE_INT) | |
3434 | { | |
3435 | if (GET_CODE (op1) == CONST_INT) | |
3436 | return plus_constant (op0, INTVAL (op1)); | |
3437 | else if (GET_CODE (op0) == CONST_INT) | |
3438 | return plus_constant (op1, INTVAL (op0)); | |
51b00347 RS |
3439 | else |
3440 | break; | |
3441 | #if 0 /* No good, because this can produce the sum of two relocatable | |
3442 | symbols, in an assembler instruction. Most UNIX assemblers can't | |
3443 | handle that. */ | |
7afe21cc RK |
3444 | else |
3445 | return gen_rtx (CONST, mode, | |
3446 | gen_rtx (PLUS, mode, | |
3447 | GET_CODE (op0) == CONST | |
3448 | ? XEXP (op0, 0) : op0, | |
3449 | GET_CODE (op1) == CONST | |
3450 | ? XEXP (op1, 0) : op1)); | |
51b00347 | 3451 | #endif |
7afe21cc RK |
3452 | } |
3453 | else if (GET_CODE (op1) == CONST_INT | |
3454 | && GET_CODE (op0) == PLUS | |
3455 | && (CONSTANT_P (XEXP (op0, 0)) | |
3456 | || CONSTANT_P (XEXP (op0, 1)))) | |
3457 | /* constant + (variable + constant) | |
3458 | can result if an index register is made constant. | |
3459 | We simplify this by adding the constants. | |
3460 | If we did not, it would become an invalid address. */ | |
3461 | return plus_constant (op0, INTVAL (op1)); | |
3462 | break; | |
3463 | ||
3464 | case COMPARE: | |
3465 | #ifdef HAVE_cc0 | |
3466 | /* Convert (compare FOO (const_int 0)) to FOO unless we aren't | |
3467 | using cc0, in which case we want to leave it as a COMPARE | |
3468 | so we can distinguish it from a register-register-copy. | |
3469 | ||
3470 | In IEEE floating point, x-0 is not the same as x. */ | |
3471 | ||
3472 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
3473 | || GET_MODE_CLASS (mode) == MODE_INT) | |
3474 | && op1 == CONST0_RTX (mode)) | |
3475 | return op0; | |
3476 | #else | |
3477 | /* Do nothing here. */ | |
3478 | #endif | |
3479 | break; | |
3480 | ||
3481 | case MINUS: | |
21648b45 RK |
3482 | /* None of these optimizations can be done for IEEE |
3483 | floating point. */ | |
3484 | if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT | |
3485 | && GET_MODE_CLASS (mode) != MODE_INT) | |
3486 | break; | |
3487 | ||
3488 | /* We can't assume x-x is 0 even with non-IEEE floating point. */ | |
7afe21cc RK |
3489 | if (rtx_equal_p (op0, op1) |
3490 | && ! side_effects_p (op0) | |
7afe21cc RK |
3491 | && GET_MODE_CLASS (mode) != MODE_FLOAT) |
3492 | return const0_rtx; | |
3493 | ||
3494 | /* Change subtraction from zero into negation. */ | |
3495 | if (op0 == CONST0_RTX (mode)) | |
3496 | return gen_rtx (NEG, mode, op1); | |
3497 | ||
7afe21cc RK |
3498 | /* Subtracting 0 has no effect. */ |
3499 | if (op1 == CONST0_RTX (mode)) | |
3500 | return op0; | |
3501 | ||
3502 | /* Strip off any surrounding CONSTs. They don't matter in any of | |
3503 | the cases below. */ | |
3504 | if (GET_CODE (op0) == CONST) | |
3505 | op0 = XEXP (op0, 0); | |
3506 | if (GET_CODE (op1) == CONST) | |
3507 | op1 = XEXP (op1, 0); | |
3508 | ||
3509 | /* (a - (-b)) -> (a + b). */ | |
3510 | if (GET_CODE (op1) == NEG) | |
3511 | { | |
3512 | rtx tem = simplify_binary_operation (PLUS, mode, | |
3513 | op0, XEXP (op1, 0)); | |
3514 | return tem ? tem : gen_rtx (PLUS, mode, op0, XEXP (op1, 0)); | |
3515 | } | |
3516 | ||
3517 | /* Don't use the associative law for floating point. | |
3518 | The inaccuracy makes it nonassociative, | |
3519 | and subtle programs can break if operations are associated. */ | |
3520 | if (GET_MODE_CLASS (mode) != MODE_INT) | |
3521 | break; | |
3522 | ||
3523 | /* (a + b) - a -> b, and (b - (a + b)) -> -a */ | |
3524 | if (GET_CODE (op0) == PLUS | |
3525 | && rtx_equal_p (XEXP (op0, 0), op1) | |
3526 | && ! side_effects_p (op1)) | |
3527 | return XEXP (op0, 1); | |
3528 | else if (GET_CODE (op0) == PLUS | |
3529 | && rtx_equal_p (XEXP (op0, 1), op1) | |
3530 | && ! side_effects_p (op1)) | |
3531 | return XEXP (op0, 0); | |
3532 | ||
3533 | if (GET_CODE (op1) == PLUS | |
3534 | && rtx_equal_p (XEXP (op1, 0), op0) | |
3535 | && ! side_effects_p (op0)) | |
3536 | { | |
3537 | rtx tem = simplify_unary_operation (NEG, mode, XEXP (op1, 1), | |
3538 | mode); | |
3539 | ||
3540 | return tem ? tem : gen_rtx (NEG, mode, XEXP (op1, 1)); | |
3541 | } | |
3542 | else if (GET_CODE (op1) == PLUS | |
3543 | && rtx_equal_p (XEXP (op1, 1), op0) | |
3544 | && ! side_effects_p (op0)) | |
3545 | { | |
3546 | rtx tem = simplify_unary_operation (NEG, mode, XEXP (op1, 0), | |
3547 | mode); | |
3548 | ||
3549 | return tem ? tem : gen_rtx (NEG, mode, XEXP (op1, 0)); | |
3550 | } | |
3551 | ||
3552 | /* a - (a - b) -> b */ | |
3553 | if (GET_CODE (op1) == MINUS && rtx_equal_p (op0, XEXP (op1, 0)) | |
3554 | && ! side_effects_p (op0)) | |
3555 | return XEXP (op1, 1); | |
3556 | ||
3557 | /* (a +/- b) - (a +/- c) can be simplified. Do variants of | |
3558 | this involving commutativity. The most common case is | |
3559 | (a + C1) - (a + C2), but it's not hard to do all the cases. */ | |
3560 | if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS) | |
3561 | && (GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)) | |
3562 | { | |
3563 | rtx lhs0 = XEXP (op0, 0), lhs1 = XEXP (op0, 1); | |
3564 | rtx rhs0 = XEXP (op1, 0), rhs1 = XEXP (op1, 1); | |
3565 | int lhs_neg = GET_CODE (op0) == MINUS; | |
3566 | int rhs_neg = GET_CODE (op1) == MINUS; | |
3567 | rtx lhs = 0, rhs = 0; | |
3568 | ||
3569 | /* Set LHS and RHS to the two different terms. */ | |
3570 | if (rtx_equal_p (lhs0, rhs0) && ! side_effects_p (lhs0)) | |
3571 | lhs = lhs1, rhs = rhs1; | |
3572 | else if (! rhs_neg && rtx_equal_p (lhs0, rhs1) | |
3573 | && ! side_effects_p (lhs0)) | |
3574 | lhs = lhs1, rhs = rhs0; | |
3575 | else if (! lhs_neg && rtx_equal_p (lhs1, rhs0) | |
3576 | && ! side_effects_p (lhs1)) | |
3577 | lhs = lhs0, rhs = rhs1; | |
3578 | else if (! lhs_neg && ! rhs_neg && rtx_equal_p (lhs1, rhs1) | |
3579 | && ! side_effects_p (lhs1)) | |
3580 | lhs = lhs0, rhs = rhs0; | |
3581 | ||
3582 | /* The RHS is the operand of a MINUS, so its negation | |
3583 | status should be complemented. */ | |
3584 | rhs_neg = ! rhs_neg; | |
3585 | ||
3586 | /* If we found two values equal, form the sum or difference | |
3587 | of the remaining two terms. */ | |
3588 | if (lhs) | |
3589 | { | |
3590 | rtx tem = simplify_binary_operation (lhs_neg == rhs_neg | |
3591 | ? PLUS : MINUS, | |
3592 | mode, | |
3593 | lhs_neg ? rhs : lhs, | |
3594 | lhs_neg ? lhs : rhs); | |
3595 | if (tem == 0) | |
3596 | tem = gen_rtx (lhs_neg == rhs_neg | |
3597 | ? PLUS : MINUS, | |
3598 | mode, lhs_neg ? rhs : lhs, | |
3599 | lhs_neg ? lhs : rhs); | |
3600 | ||
3601 | /* If both sides negated, negate result. */ | |
3602 | if (lhs_neg && rhs_neg) | |
3603 | { | |
3604 | rtx tem1 | |
3605 | = simplify_unary_operation (NEG, mode, tem, mode); | |
3606 | if (tem1 == 0) | |
3607 | tem1 = gen_rtx (NEG, mode, tem); | |
3608 | tem = tem1; | |
3609 | } | |
3610 | ||
3611 | return tem; | |
3612 | } | |
3613 | ||
3614 | return 0; | |
3615 | } | |
3616 | ||
3617 | /* c1 - (a + c2) becomes (c1 - c2) - a. */ | |
3618 | if (GET_CODE (op0) == CONST_INT && GET_CODE (op1) == PLUS | |
3619 | && GET_CODE (XEXP (op1, 1)) == CONST_INT) | |
3620 | { | |
3621 | rtx tem = simplify_binary_operation (MINUS, mode, op0, | |
3622 | XEXP (op1, 1)); | |
3623 | ||
3624 | return tem ? gen_rtx (MINUS, mode, tem, XEXP (op1, 0)) : 0; | |
3625 | } | |
3626 | ||
3627 | /* c1 - (c2 - a) becomes (c1 - c2) + a. */ | |
3628 | if (GET_CODE (op0) == CONST_INT && GET_CODE (op1) == MINUS | |
3629 | && GET_CODE (XEXP (op1, 0)) == CONST_INT) | |
3630 | { | |
3631 | rtx tem = simplify_binary_operation (MINUS, mode, op0, | |
3632 | XEXP (op1, 0)); | |
3633 | ||
3634 | return (tem && GET_CODE (tem) == CONST_INT | |
3635 | ? plus_constant (XEXP (op1, 1), INTVAL (tem)) | |
3636 | : 0); | |
3637 | } | |
3638 | ||
3639 | /* Don't let a relocatable value get a negative coeff. */ | |
3640 | if (GET_CODE (op1) == CONST_INT) | |
3641 | return plus_constant (op0, - INTVAL (op1)); | |
3642 | break; | |
3643 | ||
3644 | case MULT: | |
3645 | if (op1 == constm1_rtx) | |
3646 | { | |
3647 | rtx tem = simplify_unary_operation (NEG, mode, op0, mode); | |
3648 | ||
3649 | return tem ? tem : gen_rtx (NEG, mode, op0); | |
3650 | } | |
3651 | ||
3652 | /* In IEEE floating point, x*0 is not always 0. */ | |
3653 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
3654 | || GET_MODE_CLASS (mode) == MODE_INT) | |
3655 | && op1 == CONST0_RTX (mode) | |
3656 | && ! side_effects_p (op0)) | |
3657 | return op1; | |
3658 | ||
3659 | /* In IEEE floating point, x*1 is not equivalent to x for nans. | |
3660 | However, ANSI says we can drop signals, | |
3661 | so we can do this anyway. */ | |
3662 | if (op1 == CONST1_RTX (mode)) | |
3663 | return op0; | |
3664 | ||
3665 | /* Convert multiply by constant power of two into shift. */ | |
3666 | if (GET_CODE (op1) == CONST_INT | |
3667 | && (val = exact_log2 (INTVAL (op1))) >= 0) | |
906c4e36 | 3668 | return gen_rtx (ASHIFT, mode, op0, GEN_INT (val)); |
7afe21cc RK |
3669 | |
3670 | if (GET_CODE (op1) == CONST_DOUBLE | |
3671 | && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT) | |
3672 | { | |
3673 | REAL_VALUE_TYPE d; | |
3674 | REAL_VALUE_FROM_CONST_DOUBLE (d, op1); | |
3675 | ||
3676 | /* x*2 is x+x and x*(-1) is -x */ | |
3677 | if (REAL_VALUES_EQUAL (d, dconst2) | |
3678 | && GET_MODE (op0) == mode) | |
3679 | return gen_rtx (PLUS, mode, op0, copy_rtx (op0)); | |
3680 | ||
3681 | else if (REAL_VALUES_EQUAL (d, dconstm1) | |
3682 | && GET_MODE (op0) == mode) | |
3683 | return gen_rtx (NEG, mode, op0); | |
3684 | } | |
3685 | break; | |
3686 | ||
3687 | case IOR: | |
3688 | if (op1 == const0_rtx) | |
3689 | return op0; | |
3690 | if (GET_CODE (op1) == CONST_INT | |
3691 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3692 | return op1; | |
3693 | if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3694 | return op0; | |
3695 | /* A | (~A) -> -1 */ | |
3696 | if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) | |
3697 | || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) | |
3698 | && ! side_effects_p (op0)) | |
3699 | return constm1_rtx; | |
3700 | break; | |
3701 | ||
3702 | case XOR: | |
3703 | if (op1 == const0_rtx) | |
3704 | return op0; | |
3705 | if (GET_CODE (op1) == CONST_INT | |
3706 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3707 | return gen_rtx (NOT, mode, op0); | |
3708 | if (op0 == op1 && ! side_effects_p (op0)) | |
3709 | return const0_rtx; | |
3710 | break; | |
3711 | ||
3712 | case AND: | |
3713 | if (op1 == const0_rtx && ! side_effects_p (op0)) | |
3714 | return const0_rtx; | |
3715 | if (GET_CODE (op1) == CONST_INT | |
3716 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3717 | return op0; | |
3718 | if (op0 == op1 && ! side_effects_p (op0)) | |
3719 | return op0; | |
3720 | /* A & (~A) -> 0 */ | |
3721 | if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) | |
3722 | || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) | |
3723 | && ! side_effects_p (op0)) | |
3724 | return const0_rtx; | |
3725 | break; | |
3726 | ||
3727 | case UDIV: | |
3728 | /* Convert divide by power of two into shift (divide by 1 handled | |
3729 | below). */ | |
3730 | if (GET_CODE (op1) == CONST_INT | |
3731 | && (arg1 = exact_log2 (INTVAL (op1))) > 0) | |
906c4e36 | 3732 | return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1)); |
7afe21cc RK |
3733 | |
3734 | /* ... fall through ... */ | |
3735 | ||
3736 | case DIV: | |
3737 | if (op1 == CONST1_RTX (mode)) | |
3738 | return op0; | |
e7a522ba RS |
3739 | |
3740 | /* In IEEE floating point, 0/x is not always 0. */ | |
3741 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
3742 | || GET_MODE_CLASS (mode) == MODE_INT) | |
3743 | && op0 == CONST0_RTX (mode) | |
3744 | && ! side_effects_p (op1)) | |
7afe21cc | 3745 | return op0; |
e7a522ba | 3746 | |
7afe21cc RK |
3747 | #if 0 /* Turned off till an expert says this is a safe thing to do. */ |
3748 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3749 | /* Change division by a constant into multiplication. */ | |
3750 | else if (GET_CODE (op1) == CONST_DOUBLE | |
3751 | && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT | |
3752 | && op1 != CONST0_RTX (mode)) | |
3753 | { | |
3754 | REAL_VALUE_TYPE d; | |
3755 | REAL_VALUE_FROM_CONST_DOUBLE (d, op1); | |
3756 | if (REAL_VALUES_EQUAL (d, dconst0)) | |
3757 | abort(); | |
3758 | #if defined (REAL_ARITHMETIC) | |
3759 | REAL_ARITHMETIC (d, RDIV_EXPR, dconst1, d); | |
3760 | return gen_rtx (MULT, mode, op0, | |
3761 | CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); | |
3762 | #else | |
3763 | return gen_rtx (MULT, mode, op0, | |
3764 | CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode)); | |
3765 | } | |
3766 | #endif | |
3767 | #endif | |
3768 | #endif | |
3769 | break; | |
3770 | ||
3771 | case UMOD: | |
3772 | /* Handle modulus by power of two (mod with 1 handled below). */ | |
3773 | if (GET_CODE (op1) == CONST_INT | |
3774 | && exact_log2 (INTVAL (op1)) > 0) | |
906c4e36 | 3775 | return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1)); |
7afe21cc RK |
3776 | |
3777 | /* ... fall through ... */ | |
3778 | ||
3779 | case MOD: | |
3780 | if ((op0 == const0_rtx || op1 == const1_rtx) | |
3781 | && ! side_effects_p (op0) && ! side_effects_p (op1)) | |
3782 | return const0_rtx; | |
3783 | break; | |
3784 | ||
3785 | case ROTATERT: | |
3786 | case ROTATE: | |
3787 | /* Rotating ~0 always results in ~0. */ | |
906c4e36 | 3788 | if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT |
7afe21cc RK |
3789 | && INTVAL (op0) == GET_MODE_MASK (mode) |
3790 | && ! side_effects_p (op1)) | |
3791 | return op0; | |
3792 | ||
3793 | /* ... fall through ... */ | |
3794 | ||
3795 | case LSHIFT: | |
3796 | case ASHIFT: | |
3797 | case ASHIFTRT: | |
3798 | case LSHIFTRT: | |
3799 | if (op1 == const0_rtx) | |
3800 | return op0; | |
3801 | if (op0 == const0_rtx && ! side_effects_p (op1)) | |
3802 | return op0; | |
3803 | break; | |
3804 | ||
3805 | case SMIN: | |
906c4e36 RK |
3806 | if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT |
3807 | && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1) | |
7afe21cc RK |
3808 | && ! side_effects_p (op0)) |
3809 | return op1; | |
3810 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3811 | return op0; | |
3812 | break; | |
3813 | ||
3814 | case SMAX: | |
906c4e36 | 3815 | if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT |
7afe21cc RK |
3816 | && INTVAL (op1) == GET_MODE_MASK (mode) >> 1 |
3817 | && ! side_effects_p (op0)) | |
3818 | return op1; | |
3819 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3820 | return op0; | |
3821 | break; | |
3822 | ||
3823 | case UMIN: | |
3824 | if (op1 == const0_rtx && ! side_effects_p (op0)) | |
3825 | return op1; | |
3826 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3827 | return op0; | |
3828 | break; | |
3829 | ||
3830 | case UMAX: | |
3831 | if (op1 == constm1_rtx && ! side_effects_p (op0)) | |
3832 | return op1; | |
3833 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3834 | return op0; | |
3835 | break; | |
3836 | ||
3837 | default: | |
3838 | abort (); | |
3839 | } | |
3840 | ||
3841 | return 0; | |
3842 | } | |
3843 | ||
3844 | /* Get the integer argument values in two forms: | |
3845 | zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ | |
3846 | ||
3847 | arg0 = INTVAL (op0); | |
3848 | arg1 = INTVAL (op1); | |
3849 | ||
906c4e36 | 3850 | if (width < HOST_BITS_PER_WIDE_INT) |
7afe21cc | 3851 | { |
906c4e36 RK |
3852 | arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; |
3853 | arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc RK |
3854 | |
3855 | arg0s = arg0; | |
906c4e36 RK |
3856 | if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) |
3857 | arg0s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
3858 | |
3859 | arg1s = arg1; | |
906c4e36 RK |
3860 | if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) |
3861 | arg1s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
3862 | } |
3863 | else | |
3864 | { | |
3865 | arg0s = arg0; | |
3866 | arg1s = arg1; | |
3867 | } | |
3868 | ||
3869 | /* Compute the value of the arithmetic. */ | |
3870 | ||
3871 | switch (code) | |
3872 | { | |
3873 | case PLUS: | |
538b78e7 | 3874 | val = arg0s + arg1s; |
7afe21cc RK |
3875 | break; |
3876 | ||
3877 | case MINUS: | |
538b78e7 | 3878 | val = arg0s - arg1s; |
7afe21cc RK |
3879 | break; |
3880 | ||
3881 | case MULT: | |
3882 | val = arg0s * arg1s; | |
3883 | break; | |
3884 | ||
3885 | case DIV: | |
3886 | if (arg1s == 0) | |
3887 | return 0; | |
3888 | val = arg0s / arg1s; | |
3889 | break; | |
3890 | ||
3891 | case MOD: | |
3892 | if (arg1s == 0) | |
3893 | return 0; | |
3894 | val = arg0s % arg1s; | |
3895 | break; | |
3896 | ||
3897 | case UDIV: | |
3898 | if (arg1 == 0) | |
3899 | return 0; | |
906c4e36 | 3900 | val = (unsigned HOST_WIDE_INT) arg0 / arg1; |
7afe21cc RK |
3901 | break; |
3902 | ||
3903 | case UMOD: | |
3904 | if (arg1 == 0) | |
3905 | return 0; | |
906c4e36 | 3906 | val = (unsigned HOST_WIDE_INT) arg0 % arg1; |
7afe21cc RK |
3907 | break; |
3908 | ||
3909 | case AND: | |
3910 | val = arg0 & arg1; | |
3911 | break; | |
3912 | ||
3913 | case IOR: | |
3914 | val = arg0 | arg1; | |
3915 | break; | |
3916 | ||
3917 | case XOR: | |
3918 | val = arg0 ^ arg1; | |
3919 | break; | |
3920 | ||
3921 | case LSHIFTRT: | |
3922 | /* If shift count is undefined, don't fold it; let the machine do | |
3923 | what it wants. But truncate it if the machine will do that. */ | |
3924 | if (arg1 < 0) | |
3925 | return 0; | |
3926 | ||
3927 | #ifdef SHIFT_COUNT_TRUNCATED | |
3928 | arg1 &= (BITS_PER_WORD - 1); | |
3929 | #endif | |
3930 | ||
3931 | if (arg1 >= width) | |
3932 | return 0; | |
3933 | ||
906c4e36 | 3934 | val = ((unsigned HOST_WIDE_INT) arg0) >> arg1; |
7afe21cc RK |
3935 | break; |
3936 | ||
3937 | case ASHIFT: | |
3938 | case LSHIFT: | |
3939 | if (arg1 < 0) | |
3940 | return 0; | |
3941 | ||
3942 | #ifdef SHIFT_COUNT_TRUNCATED | |
3943 | arg1 &= (BITS_PER_WORD - 1); | |
3944 | #endif | |
3945 | ||
3946 | if (arg1 >= width) | |
3947 | return 0; | |
3948 | ||
906c4e36 | 3949 | val = ((unsigned HOST_WIDE_INT) arg0) << arg1; |
7afe21cc RK |
3950 | break; |
3951 | ||
3952 | case ASHIFTRT: | |
3953 | if (arg1 < 0) | |
3954 | return 0; | |
3955 | ||
3956 | #ifdef SHIFT_COUNT_TRUNCATED | |
3957 | arg1 &= (BITS_PER_WORD - 1); | |
3958 | #endif | |
3959 | ||
3960 | if (arg1 >= width) | |
3961 | return 0; | |
3962 | ||
3963 | val = arg0s >> arg1; | |
3964 | break; | |
3965 | ||
3966 | case ROTATERT: | |
3967 | if (arg1 < 0) | |
3968 | return 0; | |
3969 | ||
3970 | arg1 %= width; | |
906c4e36 RK |
3971 | val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1)) |
3972 | | (((unsigned HOST_WIDE_INT) arg0) >> arg1)); | |
7afe21cc RK |
3973 | break; |
3974 | ||
3975 | case ROTATE: | |
3976 | if (arg1 < 0) | |
3977 | return 0; | |
3978 | ||
3979 | arg1 %= width; | |
906c4e36 RK |
3980 | val = ((((unsigned HOST_WIDE_INT) arg0) << arg1) |
3981 | | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1))); | |
7afe21cc RK |
3982 | break; |
3983 | ||
3984 | case COMPARE: | |
3985 | /* Do nothing here. */ | |
3986 | return 0; | |
3987 | ||
830a38ee RS |
3988 | case SMIN: |
3989 | val = arg0s <= arg1s ? arg0s : arg1s; | |
3990 | break; | |
3991 | ||
3992 | case UMIN: | |
906c4e36 RK |
3993 | val = ((unsigned HOST_WIDE_INT) arg0 |
3994 | <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); | |
830a38ee RS |
3995 | break; |
3996 | ||
3997 | case SMAX: | |
3998 | val = arg0s > arg1s ? arg0s : arg1s; | |
3999 | break; | |
4000 | ||
4001 | case UMAX: | |
906c4e36 RK |
4002 | val = ((unsigned HOST_WIDE_INT) arg0 |
4003 | > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); | |
830a38ee RS |
4004 | break; |
4005 | ||
7afe21cc RK |
4006 | default: |
4007 | abort (); | |
4008 | } | |
4009 | ||
4010 | /* Clear the bits that don't belong in our mode, unless they and our sign | |
4011 | bit are all one. So we get either a reasonable negative value or a | |
4012 | reasonable unsigned value for this mode. */ | |
906c4e36 RK |
4013 | if (width < HOST_BITS_PER_WIDE_INT |
4014 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4015 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4016 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
4017 | ||
4018 | return GEN_INT (val); | |
7afe21cc RK |
4019 | } |
4020 | \f | |
4021 | /* Like simplify_binary_operation except used for relational operators. | |
4022 | MODE is the mode of the operands, not that of the result. */ | |
4023 | ||
4024 | rtx | |
4025 | simplify_relational_operation (code, mode, op0, op1) | |
4026 | enum rtx_code code; | |
4027 | enum machine_mode mode; | |
4028 | rtx op0, op1; | |
4029 | { | |
906c4e36 RK |
4030 | register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; |
4031 | HOST_WIDE_INT val; | |
7afe21cc RK |
4032 | int width = GET_MODE_BITSIZE (mode); |
4033 | ||
4034 | /* If op0 is a compare, extract the comparison arguments from it. */ | |
4035 | if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) | |
4036 | op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); | |
4037 | ||
4038 | if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT | |
906c4e36 | 4039 | || width > HOST_BITS_PER_WIDE_INT || width == 0) |
7afe21cc RK |
4040 | { |
4041 | /* Even if we can't compute a constant result, | |
4042 | there are some cases worth simplifying. */ | |
4043 | ||
4044 | /* For non-IEEE floating-point, if the two operands are equal, we know | |
4045 | the result. */ | |
4046 | if (rtx_equal_p (op0, op1) | |
4047 | && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
4048 | || GET_MODE_CLASS (GET_MODE (op0)) != MODE_FLOAT)) | |
4049 | return (code == EQ || code == GE || code == LE || code == LEU | |
4050 | || code == GEU) ? const_true_rtx : const0_rtx; | |
4051 | else if (GET_CODE (op0) == CONST_DOUBLE | |
4052 | && GET_CODE (op1) == CONST_DOUBLE | |
4053 | && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) | |
4054 | { | |
4055 | REAL_VALUE_TYPE d0, d1; | |
7afe21cc RK |
4056 | jmp_buf handler; |
4057 | int op0lt, op1lt, equal; | |
4058 | ||
4059 | if (setjmp (handler)) | |
4060 | return 0; | |
4061 | ||
4062 | set_float_handler (handler); | |
4063 | REAL_VALUE_FROM_CONST_DOUBLE (d0, op0); | |
4064 | REAL_VALUE_FROM_CONST_DOUBLE (d1, op1); | |
4065 | equal = REAL_VALUES_EQUAL (d0, d1); | |
4066 | op0lt = REAL_VALUES_LESS (d0, d1); | |
4067 | op1lt = REAL_VALUES_LESS (d1, d0); | |
906c4e36 | 4068 | set_float_handler (NULL_PTR); |
7afe21cc RK |
4069 | |
4070 | switch (code) | |
4071 | { | |
4072 | case EQ: | |
4073 | return equal ? const_true_rtx : const0_rtx; | |
4074 | case NE: | |
4075 | return !equal ? const_true_rtx : const0_rtx; | |
4076 | case LE: | |
4077 | return equal || op0lt ? const_true_rtx : const0_rtx; | |
4078 | case LT: | |
4079 | return op0lt ? const_true_rtx : const0_rtx; | |
4080 | case GE: | |
4081 | return equal || op1lt ? const_true_rtx : const0_rtx; | |
4082 | case GT: | |
4083 | return op1lt ? const_true_rtx : const0_rtx; | |
4084 | } | |
4085 | } | |
4086 | ||
4087 | switch (code) | |
4088 | { | |
4089 | case EQ: | |
4090 | { | |
4091 | #if 0 | |
4092 | /* We can't make this assumption due to #pragma weak */ | |
4093 | if (CONSTANT_P (op0) && op1 == const0_rtx) | |
4094 | return const0_rtx; | |
4095 | #endif | |
8b3686ed RK |
4096 | if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx |
4097 | /* On some machines, the ap reg can be 0 sometimes. */ | |
4098 | && op0 != arg_pointer_rtx) | |
7afe21cc RK |
4099 | return const0_rtx; |
4100 | break; | |
4101 | } | |
4102 | ||
4103 | case NE: | |
4104 | #if 0 | |
4105 | /* We can't make this assumption due to #pragma weak */ | |
4106 | if (CONSTANT_P (op0) && op1 == const0_rtx) | |
4107 | return const_true_rtx; | |
4108 | #endif | |
8b3686ed RK |
4109 | if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx |
4110 | /* On some machines, the ap reg can be 0 sometimes. */ | |
4111 | && op0 != arg_pointer_rtx) | |
7afe21cc RK |
4112 | return const_true_rtx; |
4113 | break; | |
4114 | ||
4115 | case GEU: | |
4116 | /* Unsigned values are never negative, but we must be sure we are | |
4117 | actually comparing a value, not a CC operand. */ | |
4118 | if (op1 == const0_rtx | |
4119 | && GET_MODE_CLASS (mode) == MODE_INT) | |
4120 | return const_true_rtx; | |
4121 | break; | |
4122 | ||
4123 | case LTU: | |
4124 | if (op1 == const0_rtx | |
4125 | && GET_MODE_CLASS (mode) == MODE_INT) | |
4126 | return const0_rtx; | |
4127 | break; | |
4128 | ||
4129 | case LEU: | |
4130 | /* Unsigned values are never greater than the largest | |
4131 | unsigned value. */ | |
4132 | if (GET_CODE (op1) == CONST_INT | |
4133 | && INTVAL (op1) == GET_MODE_MASK (mode) | |
4134 | && GET_MODE_CLASS (mode) == MODE_INT) | |
4135 | return const_true_rtx; | |
4136 | break; | |
4137 | ||
4138 | case GTU: | |
4139 | if (GET_CODE (op1) == CONST_INT | |
4140 | && INTVAL (op1) == GET_MODE_MASK (mode) | |
4141 | && GET_MODE_CLASS (mode) == MODE_INT) | |
4142 | return const0_rtx; | |
4143 | break; | |
4144 | } | |
4145 | ||
4146 | return 0; | |
4147 | } | |
4148 | ||
4149 | /* Get the integer argument values in two forms: | |
4150 | zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ | |
4151 | ||
4152 | arg0 = INTVAL (op0); | |
4153 | arg1 = INTVAL (op1); | |
4154 | ||
906c4e36 | 4155 | if (width < HOST_BITS_PER_WIDE_INT) |
7afe21cc | 4156 | { |
906c4e36 RK |
4157 | arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; |
4158 | arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc RK |
4159 | |
4160 | arg0s = arg0; | |
906c4e36 RK |
4161 | if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4162 | arg0s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
4163 | |
4164 | arg1s = arg1; | |
906c4e36 RK |
4165 | if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4166 | arg1s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
4167 | } |
4168 | else | |
4169 | { | |
4170 | arg0s = arg0; | |
4171 | arg1s = arg1; | |
4172 | } | |
4173 | ||
4174 | /* Compute the value of the arithmetic. */ | |
4175 | ||
4176 | switch (code) | |
4177 | { | |
4178 | case NE: | |
4179 | val = arg0 != arg1 ? STORE_FLAG_VALUE : 0; | |
4180 | break; | |
4181 | ||
4182 | case EQ: | |
4183 | val = arg0 == arg1 ? STORE_FLAG_VALUE : 0; | |
4184 | break; | |
4185 | ||
4186 | case LE: | |
4187 | val = arg0s <= arg1s ? STORE_FLAG_VALUE : 0; | |
4188 | break; | |
4189 | ||
4190 | case LT: | |
4191 | val = arg0s < arg1s ? STORE_FLAG_VALUE : 0; | |
4192 | break; | |
4193 | ||
4194 | case GE: | |
4195 | val = arg0s >= arg1s ? STORE_FLAG_VALUE : 0; | |
4196 | break; | |
4197 | ||
4198 | case GT: | |
4199 | val = arg0s > arg1s ? STORE_FLAG_VALUE : 0; | |
4200 | break; | |
4201 | ||
4202 | case LEU: | |
906c4e36 RK |
4203 | val = (((unsigned HOST_WIDE_INT) arg0) |
4204 | <= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); | |
7afe21cc RK |
4205 | break; |
4206 | ||
4207 | case LTU: | |
906c4e36 RK |
4208 | val = (((unsigned HOST_WIDE_INT) arg0) |
4209 | < ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); | |
7afe21cc RK |
4210 | break; |
4211 | ||
4212 | case GEU: | |
906c4e36 RK |
4213 | val = (((unsigned HOST_WIDE_INT) arg0) |
4214 | >= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); | |
7afe21cc RK |
4215 | break; |
4216 | ||
4217 | case GTU: | |
906c4e36 RK |
4218 | val = (((unsigned HOST_WIDE_INT) arg0) |
4219 | > ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); | |
7afe21cc RK |
4220 | break; |
4221 | ||
4222 | default: | |
4223 | abort (); | |
4224 | } | |
4225 | ||
4226 | /* Clear the bits that don't belong in our mode, unless they and our sign | |
4227 | bit are all one. So we get either a reasonable negative value or a | |
4228 | reasonable unsigned value for this mode. */ | |
906c4e36 RK |
4229 | if (width < HOST_BITS_PER_WIDE_INT |
4230 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4231 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4232 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 4233 | |
906c4e36 | 4234 | return GEN_INT (val); |
7afe21cc RK |
4235 | } |
4236 | \f | |
4237 | /* Simplify CODE, an operation with result mode MODE and three operands, | |
4238 | OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became | |
4239 | a constant. Return 0 if no simplifications is possible. */ | |
4240 | ||
4241 | rtx | |
4242 | simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2) | |
4243 | enum rtx_code code; | |
4244 | enum machine_mode mode, op0_mode; | |
4245 | rtx op0, op1, op2; | |
4246 | { | |
4247 | int width = GET_MODE_BITSIZE (mode); | |
4248 | ||
4249 | /* VOIDmode means "infinite" precision. */ | |
4250 | if (width == 0) | |
906c4e36 | 4251 | width = HOST_BITS_PER_WIDE_INT; |
7afe21cc RK |
4252 | |
4253 | switch (code) | |
4254 | { | |
4255 | case SIGN_EXTRACT: | |
4256 | case ZERO_EXTRACT: | |
4257 | if (GET_CODE (op0) == CONST_INT | |
4258 | && GET_CODE (op1) == CONST_INT | |
4259 | && GET_CODE (op2) == CONST_INT | |
4260 | && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode) | |
906c4e36 | 4261 | && width <= HOST_BITS_PER_WIDE_INT) |
7afe21cc RK |
4262 | { |
4263 | /* Extracting a bit-field from a constant */ | |
906c4e36 | 4264 | HOST_WIDE_INT val = INTVAL (op0); |
7afe21cc RK |
4265 | |
4266 | #if BITS_BIG_ENDIAN | |
4267 | val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1)); | |
4268 | #else | |
4269 | val >>= INTVAL (op2); | |
4270 | #endif | |
906c4e36 | 4271 | if (HOST_BITS_PER_WIDE_INT != INTVAL (op1)) |
7afe21cc RK |
4272 | { |
4273 | /* First zero-extend. */ | |
906c4e36 | 4274 | val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1; |
7afe21cc | 4275 | /* If desired, propagate sign bit. */ |
906c4e36 RK |
4276 | if (code == SIGN_EXTRACT |
4277 | && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1)))) | |
4278 | val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1); | |
7afe21cc RK |
4279 | } |
4280 | ||
4281 | /* Clear the bits that don't belong in our mode, | |
4282 | unless they and our sign bit are all one. | |
4283 | So we get either a reasonable negative value or a reasonable | |
4284 | unsigned value for this mode. */ | |
906c4e36 RK |
4285 | if (width < HOST_BITS_PER_WIDE_INT |
4286 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4287 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4288 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 4289 | |
906c4e36 | 4290 | return GEN_INT (val); |
7afe21cc RK |
4291 | } |
4292 | break; | |
4293 | ||
4294 | case IF_THEN_ELSE: | |
4295 | if (GET_CODE (op0) == CONST_INT) | |
4296 | return op0 != const0_rtx ? op1 : op2; | |
4297 | break; | |
4298 | ||
4299 | default: | |
4300 | abort (); | |
4301 | } | |
4302 | ||
4303 | return 0; | |
4304 | } | |
4305 | \f | |
4306 | /* If X is a nontrivial arithmetic operation on an argument | |
4307 | for which a constant value can be determined, return | |
4308 | the result of operating on that value, as a constant. | |
4309 | Otherwise, return X, possibly with one or more operands | |
4310 | modified by recursive calls to this function. | |
4311 | ||
4312 | If X is a register whose contents are known, we do NOT | |
4313 | return those contents. This is because an instruction that | |
4314 | uses a register is usually faster than one that uses a constant. | |
4315 | ||
4316 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
4317 | of X before modifying it. */ | |
4318 | ||
4319 | static rtx | |
4320 | fold_rtx (x, insn) | |
4321 | rtx x; | |
4322 | rtx insn; | |
4323 | { | |
4324 | register enum rtx_code code; | |
4325 | register enum machine_mode mode; | |
4326 | register char *fmt; | |
906c4e36 | 4327 | register int i; |
7afe21cc RK |
4328 | rtx new = 0; |
4329 | int copied = 0; | |
4330 | int must_swap = 0; | |
4331 | ||
4332 | /* Folded equivalents of first two operands of X. */ | |
4333 | rtx folded_arg0; | |
4334 | rtx folded_arg1; | |
4335 | ||
4336 | /* Constant equivalents of first three operands of X; | |
4337 | 0 when no such equivalent is known. */ | |
4338 | rtx const_arg0; | |
4339 | rtx const_arg1; | |
4340 | rtx const_arg2; | |
4341 | ||
4342 | /* The mode of the first operand of X. We need this for sign and zero | |
4343 | extends. */ | |
4344 | enum machine_mode mode_arg0; | |
4345 | ||
4346 | if (x == 0) | |
4347 | return x; | |
4348 | ||
4349 | mode = GET_MODE (x); | |
4350 | code = GET_CODE (x); | |
4351 | switch (code) | |
4352 | { | |
4353 | case CONST: | |
4354 | case CONST_INT: | |
4355 | case CONST_DOUBLE: | |
4356 | case SYMBOL_REF: | |
4357 | case LABEL_REF: | |
4358 | case REG: | |
4359 | /* No use simplifying an EXPR_LIST | |
4360 | since they are used only for lists of args | |
4361 | in a function call's REG_EQUAL note. */ | |
4362 | case EXPR_LIST: | |
4363 | return x; | |
4364 | ||
4365 | #ifdef HAVE_cc0 | |
4366 | case CC0: | |
4367 | return prev_insn_cc0; | |
4368 | #endif | |
4369 | ||
4370 | case PC: | |
4371 | /* If the next insn is a CODE_LABEL followed by a jump table, | |
4372 | PC's value is a LABEL_REF pointing to that label. That | |
4373 | lets us fold switch statements on the Vax. */ | |
4374 | if (insn && GET_CODE (insn) == JUMP_INSN) | |
4375 | { | |
4376 | rtx next = next_nonnote_insn (insn); | |
4377 | ||
4378 | if (next && GET_CODE (next) == CODE_LABEL | |
4379 | && NEXT_INSN (next) != 0 | |
4380 | && GET_CODE (NEXT_INSN (next)) == JUMP_INSN | |
4381 | && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC | |
4382 | || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) | |
4383 | return gen_rtx (LABEL_REF, Pmode, next); | |
4384 | } | |
4385 | break; | |
4386 | ||
4387 | case SUBREG: | |
c610adec RK |
4388 | /* See if we previously assigned a constant value to this SUBREG. */ |
4389 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
4390 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
7afe21cc RK |
4391 | return new; |
4392 | ||
4b980e20 RK |
4393 | /* If this is a paradoxical SUBREG, we have no idea what value the |
4394 | extra bits would have. However, if the operand is equivalent | |
4395 | to a SUBREG whose operand is the same as our mode, and all the | |
4396 | modes are within a word, we can just use the inner operand | |
4397 | because these SUBREGs just say how to treat the register. */ | |
4398 | ||
e5f6a288 | 4399 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
4b980e20 RK |
4400 | { |
4401 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
4402 | struct table_elt *elt; | |
4403 | ||
4404 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
4405 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
4406 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
4407 | imode)) != 0) | |
4408 | { | |
4409 | for (elt = elt->first_same_value; | |
4410 | elt; elt = elt->next_same_value) | |
4411 | if (GET_CODE (elt->exp) == SUBREG | |
4412 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
906c4e36 | 4413 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
4414 | return copy_rtx (SUBREG_REG (elt->exp)); |
4415 | } | |
4416 | ||
4417 | return x; | |
4418 | } | |
e5f6a288 | 4419 | |
7afe21cc RK |
4420 | /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. |
4421 | We might be able to if the SUBREG is extracting a single word in an | |
4422 | integral mode or extracting the low part. */ | |
4423 | ||
4424 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
4425 | const_arg0 = equiv_constant (folded_arg0); | |
4426 | if (const_arg0) | |
4427 | folded_arg0 = const_arg0; | |
4428 | ||
4429 | if (folded_arg0 != SUBREG_REG (x)) | |
4430 | { | |
4431 | new = 0; | |
4432 | ||
4433 | if (GET_MODE_CLASS (mode) == MODE_INT | |
4434 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
4435 | && GET_MODE (SUBREG_REG (x)) != VOIDmode) | |
4436 | new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, | |
4437 | GET_MODE (SUBREG_REG (x))); | |
4438 | if (new == 0 && subreg_lowpart_p (x)) | |
4439 | new = gen_lowpart_if_possible (mode, folded_arg0); | |
4440 | if (new) | |
4441 | return new; | |
4442 | } | |
e5f6a288 RK |
4443 | |
4444 | /* If this is a narrowing SUBREG and our operand is a REG, see if | |
858a47b1 | 4445 | we can find an equivalence for REG that is an arithmetic operation |
e5f6a288 RK |
4446 | in a wider mode where both operands are paradoxical SUBREGs |
4447 | from objects of our result mode. In that case, we couldn't report | |
4448 | an equivalent value for that operation, since we don't know what the | |
4449 | extra bits will be. But we can find an equivalence for this SUBREG | |
4450 | by folding that operation is the narrow mode. This allows us to | |
4451 | fold arithmetic in narrow modes when the machine only supports | |
4b980e20 RK |
4452 | word-sized arithmetic. |
4453 | ||
4454 | Also look for a case where we have a SUBREG whose operand is the | |
4455 | same as our result. If both modes are smaller than a word, we | |
4456 | are simply interpreting a register in different modes and we | |
4457 | can use the inner value. */ | |
e5f6a288 RK |
4458 | |
4459 | if (GET_CODE (folded_arg0) == REG | |
4460 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))) | |
4461 | { | |
4462 | struct table_elt *elt; | |
4463 | ||
4464 | /* We can use HASH here since we know that canon_hash won't be | |
4465 | called. */ | |
4466 | elt = lookup (folded_arg0, | |
4467 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
4468 | GET_MODE (folded_arg0)); | |
4469 | ||
4470 | if (elt) | |
4471 | elt = elt->first_same_value; | |
4472 | ||
4473 | for (; elt; elt = elt->next_same_value) | |
4474 | { | |
4475 | /* Just check for unary and binary operations. */ | |
4476 | if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' | |
4477 | && GET_CODE (elt->exp) != SIGN_EXTEND | |
4478 | && GET_CODE (elt->exp) != ZERO_EXTEND | |
4479 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
4480 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) | |
4481 | { | |
4482 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
4483 | ||
4484 | if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 4485 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
4486 | |
4487 | op0 = equiv_constant (op0); | |
4488 | if (op0) | |
4489 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
4490 | op0, mode); | |
4491 | } | |
4492 | else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' | |
4493 | || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') | |
4494 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
4495 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
4496 | == mode)) | |
4497 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
4498 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
4499 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
4500 | == mode)) | |
4501 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
4502 | { | |
4503 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
4504 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
4505 | ||
4506 | if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 4507 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
4508 | |
4509 | if (op0) | |
4510 | op0 = equiv_constant (op0); | |
4511 | ||
4512 | if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) | |
906c4e36 | 4513 | op1 = fold_rtx (op1, NULL_RTX); |
e5f6a288 RK |
4514 | |
4515 | if (op1) | |
4516 | op1 = equiv_constant (op1); | |
4517 | ||
4518 | if (op0 && op1) | |
4519 | new = simplify_binary_operation (GET_CODE (elt->exp), mode, | |
4520 | op0, op1); | |
4521 | } | |
4522 | ||
4b980e20 RK |
4523 | else if (GET_CODE (elt->exp) == SUBREG |
4524 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
4525 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
4526 | <= UNITS_PER_WORD) | |
906c4e36 | 4527 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
4528 | new = copy_rtx (SUBREG_REG (elt->exp)); |
4529 | ||
e5f6a288 RK |
4530 | if (new) |
4531 | return new; | |
4532 | } | |
4533 | } | |
4534 | ||
7afe21cc RK |
4535 | return x; |
4536 | ||
4537 | case NOT: | |
4538 | case NEG: | |
4539 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
4540 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
4541 | new = lookup_as_function (XEXP (x, 0), code); | |
4542 | if (new) | |
4543 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
4544 | break; | |
4545 | ||
4546 | case MEM: | |
4547 | /* If we are not actually processing an insn, don't try to find the | |
4548 | best address. Not only don't we care, but we could modify the | |
4549 | MEM in an invalid way since we have no insn to validate against. */ | |
4550 | if (insn != 0) | |
4551 | find_best_addr (insn, &XEXP (x, 0)); | |
4552 | ||
4553 | { | |
4554 | /* Even if we don't fold in the insn itself, | |
4555 | we can safely do so here, in hopes of getting a constant. */ | |
906c4e36 | 4556 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); |
7afe21cc | 4557 | rtx base = 0; |
906c4e36 | 4558 | HOST_WIDE_INT offset = 0; |
7afe21cc RK |
4559 | |
4560 | if (GET_CODE (addr) == REG | |
4561 | && REGNO_QTY_VALID_P (REGNO (addr)) | |
4562 | && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]] | |
4563 | && qty_const[reg_qty[REGNO (addr)]] != 0) | |
4564 | addr = qty_const[reg_qty[REGNO (addr)]]; | |
4565 | ||
4566 | /* If address is constant, split it into a base and integer offset. */ | |
4567 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
4568 | base = addr; | |
4569 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
4570 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
4571 | { | |
4572 | base = XEXP (XEXP (addr, 0), 0); | |
4573 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
4574 | } | |
4575 | else if (GET_CODE (addr) == LO_SUM | |
4576 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
4577 | base = XEXP (addr, 1); | |
4578 | ||
4579 | /* If this is a constant pool reference, we can fold it into its | |
4580 | constant to allow better value tracking. */ | |
4581 | if (base && GET_CODE (base) == SYMBOL_REF | |
4582 | && CONSTANT_POOL_ADDRESS_P (base)) | |
4583 | { | |
4584 | rtx constant = get_pool_constant (base); | |
4585 | enum machine_mode const_mode = get_pool_mode (base); | |
4586 | rtx new; | |
4587 | ||
4588 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
4589 | constant_pool_entries_cost = COST (constant); | |
4590 | ||
4591 | /* If we are loading the full constant, we have an equivalence. */ | |
4592 | if (offset == 0 && mode == const_mode) | |
4593 | return constant; | |
4594 | ||
4595 | /* If this actually isn't a constant (wierd!), we can't do | |
4596 | anything. Otherwise, handle the two most common cases: | |
4597 | extracting a word from a multi-word constant, and extracting | |
4598 | the low-order bits. Other cases don't seem common enough to | |
4599 | worry about. */ | |
4600 | if (! CONSTANT_P (constant)) | |
4601 | return x; | |
4602 | ||
4603 | if (GET_MODE_CLASS (mode) == MODE_INT | |
4604 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
4605 | && offset % UNITS_PER_WORD == 0 | |
4606 | && (new = operand_subword (constant, | |
4607 | offset / UNITS_PER_WORD, | |
4608 | 0, const_mode)) != 0) | |
4609 | return new; | |
4610 | ||
4611 | if (((BYTES_BIG_ENDIAN | |
4612 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
4613 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
4614 | && (new = gen_lowpart_if_possible (mode, constant)) != 0) | |
4615 | return new; | |
4616 | } | |
4617 | ||
4618 | /* If this is a reference to a label at a known position in a jump | |
4619 | table, we also know its value. */ | |
4620 | if (base && GET_CODE (base) == LABEL_REF) | |
4621 | { | |
4622 | rtx label = XEXP (base, 0); | |
4623 | rtx table_insn = NEXT_INSN (label); | |
4624 | ||
4625 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
4626 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) | |
4627 | { | |
4628 | rtx table = PATTERN (table_insn); | |
4629 | ||
4630 | if (offset >= 0 | |
4631 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
4632 | < XVECLEN (table, 0))) | |
4633 | return XVECEXP (table, 0, | |
4634 | offset / GET_MODE_SIZE (GET_MODE (table))); | |
4635 | } | |
4636 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
4637 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) | |
4638 | { | |
4639 | rtx table = PATTERN (table_insn); | |
4640 | ||
4641 | if (offset >= 0 | |
4642 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
4643 | < XVECLEN (table, 1))) | |
4644 | { | |
4645 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
4646 | new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset), | |
4647 | XEXP (table, 0)); | |
4648 | ||
4649 | if (GET_MODE (table) != Pmode) | |
4650 | new = gen_rtx (TRUNCATE, GET_MODE (table), new); | |
4651 | ||
4652 | return new; | |
4653 | } | |
4654 | } | |
4655 | } | |
4656 | ||
4657 | return x; | |
4658 | } | |
4659 | } | |
4660 | ||
4661 | const_arg0 = 0; | |
4662 | const_arg1 = 0; | |
4663 | const_arg2 = 0; | |
4664 | mode_arg0 = VOIDmode; | |
4665 | ||
4666 | /* Try folding our operands. | |
4667 | Then see which ones have constant values known. */ | |
4668 | ||
4669 | fmt = GET_RTX_FORMAT (code); | |
4670 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
4671 | if (fmt[i] == 'e') | |
4672 | { | |
4673 | rtx arg = XEXP (x, i); | |
4674 | rtx folded_arg = arg, const_arg = 0; | |
4675 | enum machine_mode mode_arg = GET_MODE (arg); | |
4676 | rtx cheap_arg, expensive_arg; | |
4677 | rtx replacements[2]; | |
4678 | int j; | |
4679 | ||
4680 | /* Most arguments are cheap, so handle them specially. */ | |
4681 | switch (GET_CODE (arg)) | |
4682 | { | |
4683 | case REG: | |
4684 | /* This is the same as calling equiv_constant; it is duplicated | |
4685 | here for speed. */ | |
4686 | if (REGNO_QTY_VALID_P (REGNO (arg)) | |
4687 | && qty_const[reg_qty[REGNO (arg)]] != 0 | |
4688 | && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG | |
4689 | && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS) | |
4690 | const_arg | |
4691 | = gen_lowpart_if_possible (GET_MODE (arg), | |
4692 | qty_const[reg_qty[REGNO (arg)]]); | |
4693 | break; | |
4694 | ||
4695 | case CONST: | |
4696 | case CONST_INT: | |
4697 | case SYMBOL_REF: | |
4698 | case LABEL_REF: | |
4699 | case CONST_DOUBLE: | |
4700 | const_arg = arg; | |
4701 | break; | |
4702 | ||
4703 | #ifdef HAVE_cc0 | |
4704 | case CC0: | |
4705 | folded_arg = prev_insn_cc0; | |
4706 | mode_arg = prev_insn_cc0_mode; | |
4707 | const_arg = equiv_constant (folded_arg); | |
4708 | break; | |
4709 | #endif | |
4710 | ||
4711 | default: | |
4712 | folded_arg = fold_rtx (arg, insn); | |
4713 | const_arg = equiv_constant (folded_arg); | |
4714 | } | |
4715 | ||
4716 | /* For the first three operands, see if the operand | |
4717 | is constant or equivalent to a constant. */ | |
4718 | switch (i) | |
4719 | { | |
4720 | case 0: | |
4721 | folded_arg0 = folded_arg; | |
4722 | const_arg0 = const_arg; | |
4723 | mode_arg0 = mode_arg; | |
4724 | break; | |
4725 | case 1: | |
4726 | folded_arg1 = folded_arg; | |
4727 | const_arg1 = const_arg; | |
4728 | break; | |
4729 | case 2: | |
4730 | const_arg2 = const_arg; | |
4731 | break; | |
4732 | } | |
4733 | ||
4734 | /* Pick the least expensive of the folded argument and an | |
4735 | equivalent constant argument. */ | |
4736 | if (const_arg == 0 || const_arg == folded_arg | |
4737 | || COST (const_arg) > COST (folded_arg)) | |
4738 | cheap_arg = folded_arg, expensive_arg = const_arg; | |
4739 | else | |
4740 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
4741 | ||
4742 | /* Try to replace the operand with the cheapest of the two | |
4743 | possibilities. If it doesn't work and this is either of the first | |
4744 | two operands of a commutative operation, try swapping them. | |
4745 | If THAT fails, try the more expensive, provided it is cheaper | |
4746 | than what is already there. */ | |
4747 | ||
4748 | if (cheap_arg == XEXP (x, i)) | |
4749 | continue; | |
4750 | ||
4751 | if (insn == 0 && ! copied) | |
4752 | { | |
4753 | x = copy_rtx (x); | |
4754 | copied = 1; | |
4755 | } | |
4756 | ||
4757 | replacements[0] = cheap_arg, replacements[1] = expensive_arg; | |
4758 | for (j = 0; | |
4759 | j < 2 && replacements[j] | |
4760 | && COST (replacements[j]) < COST (XEXP (x, i)); | |
4761 | j++) | |
4762 | { | |
4763 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) | |
4764 | break; | |
4765 | ||
4766 | if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') | |
4767 | { | |
4768 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
4769 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
4770 | ||
4771 | if (apply_change_group ()) | |
4772 | { | |
4773 | /* Swap them back to be invalid so that this loop can | |
4774 | continue and flag them to be swapped back later. */ | |
4775 | rtx tem; | |
4776 | ||
4777 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
4778 | XEXP (x, 1) = tem; | |
4779 | must_swap = 1; | |
4780 | break; | |
4781 | } | |
4782 | } | |
4783 | } | |
4784 | } | |
4785 | ||
4786 | else if (fmt[i] == 'E') | |
4787 | /* Don't try to fold inside of a vector of expressions. | |
4788 | Doing nothing is harmless. */ | |
4789 | ; | |
4790 | ||
4791 | /* If a commutative operation, place a constant integer as the second | |
4792 | operand unless the first operand is also a constant integer. Otherwise, | |
4793 | place any constant second unless the first operand is also a constant. */ | |
4794 | ||
4795 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
4796 | { | |
4797 | if (must_swap || (const_arg0 | |
4798 | && (const_arg1 == 0 | |
4799 | || (GET_CODE (const_arg0) == CONST_INT | |
4800 | && GET_CODE (const_arg1) != CONST_INT)))) | |
4801 | { | |
4802 | register rtx tem = XEXP (x, 0); | |
4803 | ||
4804 | if (insn == 0 && ! copied) | |
4805 | { | |
4806 | x = copy_rtx (x); | |
4807 | copied = 1; | |
4808 | } | |
4809 | ||
4810 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
4811 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
4812 | if (apply_change_group ()) | |
4813 | { | |
4814 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
4815 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
4816 | } | |
4817 | } | |
4818 | } | |
4819 | ||
4820 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
4821 | ||
4822 | switch (GET_RTX_CLASS (code)) | |
4823 | { | |
4824 | case '1': | |
e4890d45 RS |
4825 | /* We can't simplify extension ops unless we know the original mode. */ |
4826 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
4827 | && mode_arg0 == VOIDmode) | |
4828 | break; | |
7afe21cc RK |
4829 | new = simplify_unary_operation (code, mode, |
4830 | const_arg0 ? const_arg0 : folded_arg0, | |
4831 | mode_arg0); | |
4832 | break; | |
4833 | ||
4834 | case '<': | |
4835 | /* See what items are actually being compared and set FOLDED_ARG[01] | |
4836 | to those values and CODE to the actual comparison code. If any are | |
4837 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
4838 | do anything if both operands are already known to be constant. */ | |
4839 | ||
4840 | if (const_arg0 == 0 || const_arg1 == 0) | |
4841 | { | |
4842 | struct table_elt *p0, *p1; | |
c610adec RK |
4843 | rtx true = const_true_rtx, false = const0_rtx; |
4844 | ||
4845 | #ifdef FLOAT_STORE_FLAG_VALUE | |
4846 | if (GET_MODE_CLASS (mode)) | |
4847 | { | |
4848 | true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode); | |
4849 | false = CONST0_RTX (mode); | |
4850 | } | |
4851 | #endif | |
7afe21cc RK |
4852 | |
4853 | code = find_comparison_args (code, &folded_arg0, &folded_arg1); | |
4854 | const_arg0 = equiv_constant (folded_arg0); | |
4855 | const_arg1 = equiv_constant (folded_arg1); | |
4856 | ||
4857 | /* Get a mode from the values actually being compared, or from the | |
4858 | old value of MODE_ARG0 if both are constants. If the resulting | |
4859 | mode is VOIDmode or a MODE_CC mode, we don't know what kinds | |
4860 | of things are being compared, so we can't do anything with this | |
4861 | comparison. */ | |
4862 | ||
4863 | if (GET_MODE (folded_arg0) != VOIDmode | |
4864 | && GET_MODE_CLASS (GET_MODE (folded_arg0)) != MODE_CC) | |
4865 | mode_arg0 = GET_MODE (folded_arg0); | |
4866 | ||
4867 | else if (GET_MODE (folded_arg1) != VOIDmode | |
4868 | && GET_MODE_CLASS (GET_MODE (folded_arg1)) != MODE_CC) | |
4869 | mode_arg0 = GET_MODE (folded_arg1); | |
4870 | ||
4871 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
4872 | break; | |
4873 | ||
4874 | /* If we do not now have two constants being compared, see if we | |
4875 | can nevertheless deduce some things about the comparison. */ | |
4876 | if (const_arg0 == 0 || const_arg1 == 0) | |
4877 | { | |
4878 | /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit | |
4879 | constant? These aren't zero, but we don't know their sign. */ | |
4880 | if (const_arg1 == const0_rtx | |
4881 | && (NONZERO_BASE_PLUS_P (folded_arg0) | |
4882 | #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address | |
4883 | come out as 0. */ | |
4884 | || GET_CODE (folded_arg0) == SYMBOL_REF | |
4885 | #endif | |
4886 | || GET_CODE (folded_arg0) == LABEL_REF | |
4887 | || GET_CODE (folded_arg0) == CONST)) | |
4888 | { | |
4889 | if (code == EQ) | |
c610adec | 4890 | return false; |
7afe21cc | 4891 | else if (code == NE) |
c610adec | 4892 | return true; |
7afe21cc RK |
4893 | } |
4894 | ||
4895 | /* See if the two operands are the same. We don't do this | |
4896 | for IEEE floating-point since we can't assume x == x | |
4897 | since x might be a NaN. */ | |
4898 | ||
4899 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
4900 | || GET_MODE_CLASS (mode_arg0) != MODE_FLOAT) | |
4901 | && (folded_arg0 == folded_arg1 | |
4902 | || (GET_CODE (folded_arg0) == REG | |
4903 | && GET_CODE (folded_arg1) == REG | |
4904 | && (reg_qty[REGNO (folded_arg0)] | |
4905 | == reg_qty[REGNO (folded_arg1)])) | |
4906 | || ((p0 = lookup (folded_arg0, | |
4907 | (safe_hash (folded_arg0, mode_arg0) | |
4908 | % NBUCKETS), mode_arg0)) | |
4909 | && (p1 = lookup (folded_arg1, | |
4910 | (safe_hash (folded_arg1, mode_arg0) | |
4911 | % NBUCKETS), mode_arg0)) | |
4912 | && p0->first_same_value == p1->first_same_value))) | |
4913 | return ((code == EQ || code == LE || code == GE | |
4914 | || code == LEU || code == GEU) | |
c610adec | 4915 | ? true : false); |
7afe21cc RK |
4916 | |
4917 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
4918 | doing now is either the same as we did before or the reverse | |
4919 | (we only check the reverse if not floating-point). */ | |
4920 | else if (GET_CODE (folded_arg0) == REG) | |
4921 | { | |
4922 | int qty = reg_qty[REGNO (folded_arg0)]; | |
4923 | ||
4924 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0)) | |
4925 | && (comparison_dominates_p (qty_comparison_code[qty], code) | |
4926 | || (comparison_dominates_p (qty_comparison_code[qty], | |
4927 | reverse_condition (code)) | |
4928 | && GET_MODE_CLASS (mode_arg0) == MODE_INT)) | |
4929 | && (rtx_equal_p (qty_comparison_const[qty], folded_arg1) | |
4930 | || (const_arg1 | |
4931 | && rtx_equal_p (qty_comparison_const[qty], | |
4932 | const_arg1)) | |
4933 | || (GET_CODE (folded_arg1) == REG | |
4934 | && (reg_qty[REGNO (folded_arg1)] | |
4935 | == qty_comparison_qty[qty])))) | |
4936 | return (comparison_dominates_p (qty_comparison_code[qty], | |
4937 | code) | |
c610adec | 4938 | ? true : false); |
7afe21cc RK |
4939 | } |
4940 | } | |
4941 | } | |
4942 | ||
4943 | /* If we are comparing against zero, see if the first operand is | |
4944 | equivalent to an IOR with a constant. If so, we may be able to | |
4945 | determine the result of this comparison. */ | |
4946 | ||
4947 | if (const_arg1 == const0_rtx) | |
4948 | { | |
4949 | rtx y = lookup_as_function (folded_arg0, IOR); | |
4950 | rtx inner_const; | |
4951 | ||
4952 | if (y != 0 | |
4953 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
4954 | && GET_CODE (inner_const) == CONST_INT | |
4955 | && INTVAL (inner_const) != 0) | |
4956 | { | |
4957 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
4958 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
4959 | && (INTVAL (inner_const) | |
4960 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
c610adec RK |
4961 | rtx true = const_true_rtx, false = const0_rtx; |
4962 | ||
4963 | #ifdef FLOAT_STORE_FLAG_VALUE | |
4964 | if (GET_MODE_CLASS (mode)) | |
4965 | { | |
4966 | true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode); | |
4967 | false = CONST0_RTX (mode); | |
4968 | } | |
4969 | #endif | |
7afe21cc RK |
4970 | |
4971 | switch (code) | |
4972 | { | |
4973 | case EQ: | |
c610adec | 4974 | return false; |
7afe21cc | 4975 | case NE: |
c610adec | 4976 | return true; |
7afe21cc RK |
4977 | case LT: case LE: |
4978 | if (has_sign) | |
c610adec | 4979 | return true; |
7afe21cc RK |
4980 | break; |
4981 | case GT: case GE: | |
4982 | if (has_sign) | |
c610adec | 4983 | return false; |
7afe21cc RK |
4984 | break; |
4985 | } | |
4986 | } | |
4987 | } | |
4988 | ||
4989 | new = simplify_relational_operation (code, mode_arg0, | |
4990 | const_arg0 ? const_arg0 : folded_arg0, | |
4991 | const_arg1 ? const_arg1 : folded_arg1); | |
c610adec RK |
4992 | #ifdef FLOAT_STORE_FLAG_VALUE |
4993 | if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4994 | new = ((new == const0_rtx) ? CONST0_RTX (mode) | |
4995 | : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode)); | |
4996 | #endif | |
7afe21cc RK |
4997 | break; |
4998 | ||
4999 | case '2': | |
5000 | case 'c': | |
5001 | switch (code) | |
5002 | { | |
5003 | case PLUS: | |
5004 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
5005 | with that LABEL_REF as its second operand. If so, the result is | |
5006 | the first operand of that MINUS. This handles switches with an | |
5007 | ADDR_DIFF_VEC table. */ | |
5008 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
5009 | { | |
5010 | rtx y = lookup_as_function (folded_arg0, MINUS); | |
5011 | ||
5012 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
5013 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
5014 | return XEXP (y, 0); | |
5015 | } | |
5016 | ||
5017 | /* ... fall through ... */ | |
5018 | ||
5019 | case MINUS: | |
5020 | case SMIN: case SMAX: case UMIN: case UMAX: | |
5021 | case IOR: case AND: case XOR: | |
5022 | case MULT: case DIV: case UDIV: | |
5023 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: | |
5024 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
5025 | is known to be of similar form, we may be able to replace the | |
5026 | operation with a combined operation. This may eliminate the | |
5027 | intermediate operation if every use is simplified in this way. | |
5028 | Note that the similar optimization done by combine.c only works | |
5029 | if the intermediate operation's result has only one reference. */ | |
5030 | ||
5031 | if (GET_CODE (folded_arg0) == REG | |
5032 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) | |
5033 | { | |
5034 | int is_shift | |
5035 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
5036 | rtx y = lookup_as_function (folded_arg0, code); | |
5037 | rtx inner_const; | |
5038 | enum rtx_code associate_code; | |
5039 | rtx new_const; | |
5040 | ||
5041 | if (y == 0 | |
5042 | || 0 == (inner_const | |
5043 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
5044 | || GET_CODE (inner_const) != CONST_INT | |
5045 | /* If we have compiled a statement like | |
5046 | "if (x == (x & mask1))", and now are looking at | |
5047 | "x & mask2", we will have a case where the first operand | |
5048 | of Y is the same as our first operand. Unless we detect | |
5049 | this case, an infinite loop will result. */ | |
5050 | || XEXP (y, 0) == folded_arg0) | |
5051 | break; | |
5052 | ||
5053 | /* Don't associate these operations if they are a PLUS with the | |
5054 | same constant and it is a power of two. These might be doable | |
5055 | with a pre- or post-increment. Similarly for two subtracts of | |
5056 | identical powers of two with post decrement. */ | |
5057 | ||
5058 | if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) | |
5059 | && (0 | |
5060 | #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT) | |
5061 | || exact_log2 (INTVAL (const_arg1)) >= 0 | |
5062 | #endif | |
5063 | #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT) | |
5064 | || exact_log2 (- INTVAL (const_arg1)) >= 0 | |
5065 | #endif | |
5066 | )) | |
5067 | break; | |
5068 | ||
5069 | /* Compute the code used to compose the constants. For example, | |
5070 | A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ | |
5071 | ||
5072 | associate_code | |
5073 | = (code == MULT || code == DIV || code == UDIV ? MULT | |
5074 | : is_shift || code == PLUS || code == MINUS ? PLUS : code); | |
5075 | ||
5076 | new_const = simplify_binary_operation (associate_code, mode, | |
5077 | const_arg1, inner_const); | |
5078 | ||
5079 | if (new_const == 0) | |
5080 | break; | |
5081 | ||
5082 | /* If we are associating shift operations, don't let this | |
5083 | produce a shift of larger than the object. This could | |
5084 | occur when we following a sign-extend by a right shift on | |
5085 | a machine that does a sign-extend as a pair of shifts. */ | |
5086 | ||
5087 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
5088 | && INTVAL (new_const) > GET_MODE_BITSIZE (mode)) | |
5089 | break; | |
5090 | ||
5091 | y = copy_rtx (XEXP (y, 0)); | |
5092 | ||
5093 | /* If Y contains our first operand (the most common way this | |
5094 | can happen is if Y is a MEM), we would do into an infinite | |
5095 | loop if we tried to fold it. So don't in that case. */ | |
5096 | ||
5097 | if (! reg_mentioned_p (folded_arg0, y)) | |
5098 | y = fold_rtx (y, insn); | |
5099 | ||
5100 | new = simplify_binary_operation (code, mode, y, new_const); | |
5101 | if (new) | |
5102 | return new; | |
5103 | ||
5104 | return gen_rtx (code, mode, y, new_const); | |
5105 | } | |
5106 | } | |
5107 | ||
5108 | new = simplify_binary_operation (code, mode, | |
5109 | const_arg0 ? const_arg0 : folded_arg0, | |
5110 | const_arg1 ? const_arg1 : folded_arg1); | |
5111 | break; | |
5112 | ||
5113 | case 'o': | |
5114 | /* (lo_sum (high X) X) is simply X. */ | |
5115 | if (code == LO_SUM && const_arg0 != 0 | |
5116 | && GET_CODE (const_arg0) == HIGH | |
5117 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
5118 | return const_arg1; | |
5119 | break; | |
5120 | ||
5121 | case '3': | |
5122 | case 'b': | |
5123 | new = simplify_ternary_operation (code, mode, mode_arg0, | |
5124 | const_arg0 ? const_arg0 : folded_arg0, | |
5125 | const_arg1 ? const_arg1 : folded_arg1, | |
5126 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
5127 | break; | |
5128 | } | |
5129 | ||
5130 | return new ? new : x; | |
5131 | } | |
5132 | \f | |
5133 | /* Return a constant value currently equivalent to X. | |
5134 | Return 0 if we don't know one. */ | |
5135 | ||
5136 | static rtx | |
5137 | equiv_constant (x) | |
5138 | rtx x; | |
5139 | { | |
5140 | if (GET_CODE (x) == REG | |
5141 | && REGNO_QTY_VALID_P (REGNO (x)) | |
5142 | && qty_const[reg_qty[REGNO (x)]]) | |
5143 | x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]); | |
5144 | ||
5145 | if (x != 0 && CONSTANT_P (x)) | |
5146 | return x; | |
5147 | ||
fc3ffe83 RK |
5148 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
5149 | it might be equivalent to a constant. That handles the case where it | |
5150 | is a constant-pool reference. Then try to look it up in the hash table | |
5151 | in case it is something whose value we have seen before. */ | |
5152 | ||
5153 | if (GET_CODE (x) == MEM) | |
5154 | { | |
5155 | struct table_elt *elt; | |
5156 | ||
906c4e36 | 5157 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
5158 | if (CONSTANT_P (x)) |
5159 | return x; | |
5160 | ||
5161 | elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x)); | |
5162 | if (elt == 0) | |
5163 | return 0; | |
5164 | ||
5165 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
5166 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
5167 | return elt->exp; | |
5168 | } | |
5169 | ||
7afe21cc RK |
5170 | return 0; |
5171 | } | |
5172 | \f | |
5173 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point | |
5174 | number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
5175 | least-significant part of X. | |
5176 | MODE specifies how big a part of X to return. | |
5177 | ||
5178 | If the requested operation cannot be done, 0 is returned. | |
5179 | ||
5180 | This is similar to gen_lowpart in emit-rtl.c. */ | |
5181 | ||
5182 | rtx | |
5183 | gen_lowpart_if_possible (mode, x) | |
5184 | enum machine_mode mode; | |
5185 | register rtx x; | |
5186 | { | |
5187 | rtx result = gen_lowpart_common (mode, x); | |
5188 | ||
5189 | if (result) | |
5190 | return result; | |
5191 | else if (GET_CODE (x) == MEM) | |
5192 | { | |
5193 | /* This is the only other case we handle. */ | |
5194 | register int offset = 0; | |
5195 | rtx new; | |
5196 | ||
5197 | #if WORDS_BIG_ENDIAN | |
5198 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
5199 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
5200 | #endif | |
5201 | #if BYTES_BIG_ENDIAN | |
5202 | /* Adjust the address so that the address-after-the-data | |
5203 | is unchanged. */ | |
5204 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
5205 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
5206 | #endif | |
5207 | new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset)); | |
5208 | if (! memory_address_p (mode, XEXP (new, 0))) | |
5209 | return 0; | |
5210 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); | |
5211 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); | |
5212 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); | |
5213 | return new; | |
5214 | } | |
5215 | else | |
5216 | return 0; | |
5217 | } | |
5218 | \f | |
5219 | /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" | |
5220 | branch. It will be zero if not. | |
5221 | ||
5222 | In certain cases, this can cause us to add an equivalence. For example, | |
5223 | if we are following the taken case of | |
5224 | if (i == 2) | |
5225 | we can add the fact that `i' and '2' are now equivalent. | |
5226 | ||
5227 | In any case, we can record that this comparison was passed. If the same | |
5228 | comparison is seen later, we will know its value. */ | |
5229 | ||
5230 | static void | |
5231 | record_jump_equiv (insn, taken) | |
5232 | rtx insn; | |
5233 | int taken; | |
5234 | { | |
5235 | int cond_known_true; | |
5236 | rtx op0, op1; | |
5237 | enum machine_mode mode; | |
5238 | int reversed_nonequality = 0; | |
5239 | enum rtx_code code; | |
5240 | ||
5241 | /* Ensure this is the right kind of insn. */ | |
5242 | if (! condjump_p (insn) || simplejump_p (insn)) | |
5243 | return; | |
5244 | ||
5245 | /* See if this jump condition is known true or false. */ | |
5246 | if (taken) | |
5247 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx); | |
5248 | else | |
5249 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx); | |
5250 | ||
5251 | /* Get the type of comparison being done and the operands being compared. | |
5252 | If we had to reverse a non-equality condition, record that fact so we | |
5253 | know that it isn't valid for floating-point. */ | |
5254 | code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0)); | |
5255 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn); | |
5256 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn); | |
5257 | ||
5258 | code = find_comparison_args (code, &op0, &op1); | |
5259 | if (! cond_known_true) | |
5260 | { | |
5261 | reversed_nonequality = (code != EQ && code != NE); | |
5262 | code = reverse_condition (code); | |
5263 | } | |
5264 | ||
5265 | /* The mode is the mode of the non-constant. */ | |
5266 | mode = GET_MODE (op0); | |
5267 | if (mode == VOIDmode) mode = GET_MODE (op1); | |
5268 | ||
5269 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
5270 | } | |
5271 | ||
5272 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. | |
5273 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
5274 | Make any useful entries we can with that information. Called from | |
5275 | above function and called recursively. */ | |
5276 | ||
5277 | static void | |
5278 | record_jump_cond (code, mode, op0, op1, reversed_nonequality) | |
5279 | enum rtx_code code; | |
5280 | enum machine_mode mode; | |
5281 | rtx op0, op1; | |
5282 | int reversed_nonequality; | |
5283 | { | |
5284 | int op0_hash_code, op1_hash_code; | |
5285 | int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct; | |
5286 | struct table_elt *op0_elt, *op1_elt; | |
5287 | ||
5288 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
5289 | we know that they are also equal in the smaller mode (this is also | |
5290 | true for all smaller modes whether or not there is a SUBREG, but | |
5291 | is not worth testing for with no SUBREG. */ | |
5292 | ||
5293 | if (code == EQ && GET_CODE (op0) == SUBREG | |
5294 | && GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))) | |
5295 | { | |
5296 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
5297 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
5298 | ||
5299 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
5300 | tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), | |
5301 | reversed_nonequality); | |
5302 | } | |
5303 | ||
5304 | if (code == EQ && GET_CODE (op1) == SUBREG | |
5305 | && GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))) | |
5306 | { | |
5307 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
5308 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
5309 | ||
5310 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
5311 | tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), | |
5312 | reversed_nonequality); | |
5313 | } | |
5314 | ||
5315 | /* Similarly, if this is an NE comparison, and either is a SUBREG | |
5316 | making a smaller mode, we know the whole thing is also NE. */ | |
5317 | ||
5318 | if (code == NE && GET_CODE (op0) == SUBREG | |
5319 | && subreg_lowpart_p (op0) | |
5320 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))) | |
5321 | { | |
5322 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
5323 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
5324 | ||
5325 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
5326 | tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), | |
5327 | reversed_nonequality); | |
5328 | } | |
5329 | ||
5330 | if (code == NE && GET_CODE (op1) == SUBREG | |
5331 | && subreg_lowpart_p (op1) | |
5332 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))) | |
5333 | { | |
5334 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
5335 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
5336 | ||
5337 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
5338 | tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), | |
5339 | reversed_nonequality); | |
5340 | } | |
5341 | ||
5342 | /* Hash both operands. */ | |
5343 | ||
5344 | do_not_record = 0; | |
5345 | hash_arg_in_memory = 0; | |
5346 | hash_arg_in_struct = 0; | |
5347 | op0_hash_code = HASH (op0, mode); | |
5348 | op0_in_memory = hash_arg_in_memory; | |
5349 | op0_in_struct = hash_arg_in_struct; | |
5350 | ||
5351 | if (do_not_record) | |
5352 | return; | |
5353 | ||
5354 | do_not_record = 0; | |
5355 | hash_arg_in_memory = 0; | |
5356 | hash_arg_in_struct = 0; | |
5357 | op1_hash_code = HASH (op1, mode); | |
5358 | op1_in_memory = hash_arg_in_memory; | |
5359 | op1_in_struct = hash_arg_in_struct; | |
5360 | ||
5361 | if (do_not_record) | |
5362 | return; | |
5363 | ||
5364 | /* Look up both operands. */ | |
5365 | op0_elt = lookup (op0, op0_hash_code, mode); | |
5366 | op1_elt = lookup (op1, op1_hash_code, mode); | |
5367 | ||
5368 | /* If we aren't setting two things equal all we can do is save this | |
5369 | comparison. */ | |
5370 | if (code != EQ) | |
5371 | { | |
5372 | /* If we reversed a floating-point comparison, if OP0 is not a | |
5373 | register, or if OP1 is neither a register or constant, we can't | |
5374 | do anything. */ | |
5375 | ||
5376 | if (GET_CODE (op1) != REG) | |
5377 | op1 = equiv_constant (op1); | |
5378 | ||
5379 | if ((reversed_nonequality && GET_MODE_CLASS (mode) != MODE_INT) | |
5380 | || GET_CODE (op0) != REG || op1 == 0) | |
5381 | return; | |
5382 | ||
5383 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
5384 | new quantity number. */ | |
5385 | if (op0_elt == 0) | |
5386 | { | |
906c4e36 | 5387 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
5388 | { |
5389 | rehash_using_reg (op0); | |
5390 | op0_hash_code = HASH (op0, mode); | |
5391 | } | |
5392 | ||
906c4e36 | 5393 | op0_elt = insert (op0, NULL_PTR, op0_hash_code, mode); |
7afe21cc RK |
5394 | op0_elt->in_memory = op0_in_memory; |
5395 | op0_elt->in_struct = op0_in_struct; | |
5396 | } | |
5397 | ||
5398 | qty_comparison_code[reg_qty[REGNO (op0)]] = code; | |
5399 | if (GET_CODE (op1) == REG) | |
5400 | { | |
5401 | /* Put OP1 in the hash table so it gets a new quantity number. */ | |
5402 | if (op1_elt == 0) | |
5403 | { | |
906c4e36 | 5404 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
5405 | { |
5406 | rehash_using_reg (op1); | |
5407 | op1_hash_code = HASH (op1, mode); | |
5408 | } | |
5409 | ||
906c4e36 | 5410 | op1_elt = insert (op1, NULL_PTR, op1_hash_code, mode); |
7afe21cc RK |
5411 | op1_elt->in_memory = op1_in_memory; |
5412 | op1_elt->in_struct = op1_in_struct; | |
5413 | } | |
5414 | ||
5415 | qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)]; | |
5416 | qty_comparison_const[reg_qty[REGNO (op0)]] = 0; | |
5417 | } | |
5418 | else | |
5419 | { | |
5420 | qty_comparison_qty[reg_qty[REGNO (op0)]] = -1; | |
5421 | qty_comparison_const[reg_qty[REGNO (op0)]] = op1; | |
5422 | } | |
5423 | ||
5424 | return; | |
5425 | } | |
5426 | ||
5427 | /* If both are equivalent, merge the two classes. Save this class for | |
5428 | `cse_set_around_loop'. */ | |
5429 | if (op0_elt && op1_elt) | |
5430 | { | |
5431 | merge_equiv_classes (op0_elt, op1_elt); | |
5432 | last_jump_equiv_class = op0_elt; | |
5433 | } | |
5434 | ||
5435 | /* For whichever side doesn't have an equivalence, make one. */ | |
5436 | if (op0_elt == 0) | |
5437 | { | |
5438 | if (insert_regs (op0, op1_elt, 0)) | |
5439 | { | |
5440 | rehash_using_reg (op0); | |
5441 | op0_hash_code = HASH (op0, mode); | |
5442 | } | |
5443 | ||
5444 | op0_elt = insert (op0, op1_elt, op0_hash_code, mode); | |
5445 | op0_elt->in_memory = op0_in_memory; | |
5446 | op0_elt->in_struct = op0_in_struct; | |
5447 | last_jump_equiv_class = op0_elt; | |
5448 | } | |
5449 | ||
5450 | if (op1_elt == 0) | |
5451 | { | |
5452 | if (insert_regs (op1, op0_elt, 0)) | |
5453 | { | |
5454 | rehash_using_reg (op1); | |
5455 | op1_hash_code = HASH (op1, mode); | |
5456 | } | |
5457 | ||
5458 | op1_elt = insert (op1, op0_elt, op1_hash_code, mode); | |
5459 | op1_elt->in_memory = op1_in_memory; | |
5460 | op1_elt->in_struct = op1_in_struct; | |
5461 | last_jump_equiv_class = op1_elt; | |
5462 | } | |
5463 | } | |
5464 | \f | |
5465 | /* CSE processing for one instruction. | |
5466 | First simplify sources and addresses of all assignments | |
5467 | in the instruction, using previously-computed equivalents values. | |
5468 | Then install the new sources and destinations in the table | |
5469 | of available values. | |
5470 | ||
5471 | If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in | |
5472 | the insn. */ | |
5473 | ||
5474 | /* Data on one SET contained in the instruction. */ | |
5475 | ||
5476 | struct set | |
5477 | { | |
5478 | /* The SET rtx itself. */ | |
5479 | rtx rtl; | |
5480 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
5481 | rtx src; | |
5482 | /* The hash-table element for the SET_SRC of the SET. */ | |
5483 | struct table_elt *src_elt; | |
5484 | /* Hash code for the SET_SRC. */ | |
5485 | int src_hash_code; | |
5486 | /* Hash code for the SET_DEST. */ | |
5487 | int dest_hash_code; | |
5488 | /* The SET_DEST, with SUBREG, etc., stripped. */ | |
5489 | rtx inner_dest; | |
5490 | /* Place where the pointer to the INNER_DEST was found. */ | |
5491 | rtx *inner_dest_loc; | |
5492 | /* Nonzero if the SET_SRC is in memory. */ | |
5493 | char src_in_memory; | |
5494 | /* Nonzero if the SET_SRC is in a structure. */ | |
5495 | char src_in_struct; | |
5496 | /* Nonzero if the SET_SRC contains something | |
5497 | whose value cannot be predicted and understood. */ | |
5498 | char src_volatile; | |
5499 | /* Original machine mode, in case it becomes a CONST_INT. */ | |
5500 | enum machine_mode mode; | |
5501 | /* A constant equivalent for SET_SRC, if any. */ | |
5502 | rtx src_const; | |
5503 | /* Hash code of constant equivalent for SET_SRC. */ | |
5504 | int src_const_hash_code; | |
5505 | /* Table entry for constant equivalent for SET_SRC, if any. */ | |
5506 | struct table_elt *src_const_elt; | |
5507 | }; | |
5508 | ||
5509 | static void | |
5510 | cse_insn (insn, in_libcall_block) | |
5511 | rtx insn; | |
5512 | int in_libcall_block; | |
5513 | { | |
5514 | register rtx x = PATTERN (insn); | |
5515 | rtx tem; | |
5516 | register int i; | |
5517 | register int n_sets = 0; | |
5518 | ||
5519 | /* Records what this insn does to set CC0. */ | |
5520 | rtx this_insn_cc0 = 0; | |
5521 | enum machine_mode this_insn_cc0_mode; | |
5522 | struct write_data writes_memory; | |
5523 | static struct write_data init = {0, 0, 0, 0}; | |
5524 | ||
5525 | rtx src_eqv = 0; | |
5526 | struct table_elt *src_eqv_elt = 0; | |
5527 | int src_eqv_volatile; | |
5528 | int src_eqv_in_memory; | |
5529 | int src_eqv_in_struct; | |
5530 | int src_eqv_hash_code; | |
5531 | ||
5532 | struct set *sets; | |
5533 | ||
5534 | this_insn = insn; | |
5535 | writes_memory = init; | |
5536 | ||
5537 | /* Find all the SETs and CLOBBERs in this instruction. | |
5538 | Record all the SETs in the array `set' and count them. | |
5539 | Also determine whether there is a CLOBBER that invalidates | |
5540 | all memory references, or all references at varying addresses. */ | |
5541 | ||
5542 | if (GET_CODE (x) == SET) | |
5543 | { | |
5544 | sets = (struct set *) alloca (sizeof (struct set)); | |
5545 | sets[0].rtl = x; | |
5546 | ||
5547 | /* Ignore SETs that are unconditional jumps. | |
5548 | They never need cse processing, so this does not hurt. | |
5549 | The reason is not efficiency but rather | |
5550 | so that we can test at the end for instructions | |
5551 | that have been simplified to unconditional jumps | |
5552 | and not be misled by unchanged instructions | |
5553 | that were unconditional jumps to begin with. */ | |
5554 | if (SET_DEST (x) == pc_rtx | |
5555 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
5556 | ; | |
5557 | ||
5558 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
5559 | The hard function value register is used only once, to copy to | |
5560 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
5561 | Ensure we invalidate the destination register. On the 80386 no | |
5562 | other code would invalidate it since it is a fixed_reg. */ | |
5563 | ||
5564 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
5565 | { | |
5566 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 5567 | apply_change_group (); |
7afe21cc RK |
5568 | fold_rtx (SET_SRC (x), insn); |
5569 | invalidate (SET_DEST (x)); | |
5570 | } | |
5571 | else | |
5572 | n_sets = 1; | |
5573 | } | |
5574 | else if (GET_CODE (x) == PARALLEL) | |
5575 | { | |
5576 | register int lim = XVECLEN (x, 0); | |
5577 | ||
5578 | sets = (struct set *) alloca (lim * sizeof (struct set)); | |
5579 | ||
5580 | /* Find all regs explicitly clobbered in this insn, | |
5581 | and ensure they are not replaced with any other regs | |
5582 | elsewhere in this insn. | |
5583 | When a reg that is clobbered is also used for input, | |
5584 | we should presume that that is for a reason, | |
5585 | and we should not substitute some other register | |
5586 | which is not supposed to be clobbered. | |
5587 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 5588 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
5589 | value clobbered. We must not let a canonicalization do |
5590 | anything in that case. */ | |
5591 | for (i = 0; i < lim; i++) | |
5592 | { | |
5593 | register rtx y = XVECEXP (x, 0, i); | |
830a38ee RS |
5594 | if (GET_CODE (y) == CLOBBER |
5595 | && (GET_CODE (XEXP (y, 0)) == REG | |
5596 | || GET_CODE (XEXP (y, 0)) == SUBREG)) | |
7afe21cc RK |
5597 | invalidate (XEXP (y, 0)); |
5598 | } | |
5599 | ||
5600 | for (i = 0; i < lim; i++) | |
5601 | { | |
5602 | register rtx y = XVECEXP (x, 0, i); | |
5603 | if (GET_CODE (y) == SET) | |
5604 | { | |
5605 | /* As above, we ignore unconditional jumps and call-insns. */ | |
5606 | if (GET_CODE (SET_SRC (y)) == CALL) | |
5607 | { | |
5608 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 5609 | apply_change_group (); |
7afe21cc RK |
5610 | fold_rtx (SET_SRC (y), insn); |
5611 | invalidate (SET_DEST (y)); | |
5612 | } | |
5613 | else if (SET_DEST (y) == pc_rtx | |
5614 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
5615 | ; | |
5616 | else | |
5617 | sets[n_sets++].rtl = y; | |
5618 | } | |
5619 | else if (GET_CODE (y) == CLOBBER) | |
5620 | { | |
5621 | /* If we clobber memory, take note of that, | |
5622 | and canon the address. | |
5623 | This does nothing when a register is clobbered | |
5624 | because we have already invalidated the reg. */ | |
5625 | if (GET_CODE (XEXP (y, 0)) == MEM) | |
5626 | { | |
906c4e36 | 5627 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
5628 | note_mem_written (XEXP (y, 0), &writes_memory); |
5629 | } | |
5630 | } | |
5631 | else if (GET_CODE (y) == USE | |
5632 | && ! (GET_CODE (XEXP (y, 0)) == REG | |
5633 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 5634 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
5635 | else if (GET_CODE (y) == CALL) |
5636 | { | |
5637 | canon_reg (y, insn); | |
77fa0940 | 5638 | apply_change_group (); |
7afe21cc RK |
5639 | fold_rtx (y, insn); |
5640 | } | |
5641 | } | |
5642 | } | |
5643 | else if (GET_CODE (x) == CLOBBER) | |
5644 | { | |
5645 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
5646 | { | |
906c4e36 | 5647 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
5648 | note_mem_written (XEXP (x, 0), &writes_memory); |
5649 | } | |
5650 | } | |
5651 | ||
5652 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
5653 | else if (GET_CODE (x) == USE | |
5654 | && ! (GET_CODE (XEXP (x, 0)) == REG | |
5655 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 5656 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
5657 | else if (GET_CODE (x) == CALL) |
5658 | { | |
5659 | canon_reg (x, insn); | |
77fa0940 | 5660 | apply_change_group (); |
7afe21cc RK |
5661 | fold_rtx (x, insn); |
5662 | } | |
5663 | ||
5664 | if (n_sets == 1 && REG_NOTES (insn) != 0) | |
5665 | { | |
5666 | /* Store the equivalent value in SRC_EQV, if different. */ | |
906c4e36 | 5667 | rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
7afe21cc RK |
5668 | |
5669 | if (tem && ! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) | |
906c4e36 | 5670 | src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); |
7afe21cc RK |
5671 | } |
5672 | ||
5673 | /* Canonicalize sources and addresses of destinations. | |
5674 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
5675 | present in the insn pattern. In that case, we want to ensure that | |
5676 | we don't break the duplicate nature of the pattern. So we will replace | |
5677 | both operands at the same time. Otherwise, we would fail to find an | |
5678 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
5679 | |
5680 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 5681 | but we don't do this any more. */ |
7afe21cc RK |
5682 | |
5683 | for (i = 0; i < n_sets; i++) | |
5684 | { | |
5685 | rtx dest = SET_DEST (sets[i].rtl); | |
5686 | rtx src = SET_SRC (sets[i].rtl); | |
5687 | rtx new = canon_reg (src, insn); | |
5688 | ||
77fa0940 RK |
5689 | if ((GET_CODE (new) == REG && GET_CODE (src) == REG |
5690 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
5691 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
5692 | || insn_n_dups[recog_memoized (insn)] > 0) | |
5693 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); | |
7afe21cc RK |
5694 | else |
5695 | SET_SRC (sets[i].rtl) = new; | |
5696 | ||
5697 | if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) | |
5698 | { | |
5699 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 5700 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 5701 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 5702 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
5703 | } |
5704 | ||
5705 | while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART | |
5706 | || GET_CODE (dest) == ZERO_EXTRACT | |
5707 | || GET_CODE (dest) == SIGN_EXTRACT) | |
5708 | dest = XEXP (dest, 0); | |
5709 | ||
5710 | if (GET_CODE (dest) == MEM) | |
5711 | canon_reg (dest, insn); | |
5712 | } | |
5713 | ||
77fa0940 RK |
5714 | /* Now that we have done all the replacements, we can apply the change |
5715 | group and see if they all work. Note that this will cause some | |
5716 | canonicalizations that would have worked individually not to be applied | |
5717 | because some other canonicalization didn't work, but this should not | |
5718 | occur often. */ | |
5719 | ||
5720 | apply_change_group (); | |
5721 | ||
7afe21cc RK |
5722 | /* Set sets[i].src_elt to the class each source belongs to. |
5723 | Detect assignments from or to volatile things | |
5724 | and set set[i] to zero so they will be ignored | |
5725 | in the rest of this function. | |
5726 | ||
5727 | Nothing in this loop changes the hash table or the register chains. */ | |
5728 | ||
5729 | for (i = 0; i < n_sets; i++) | |
5730 | { | |
5731 | register rtx src, dest; | |
5732 | register rtx src_folded; | |
5733 | register struct table_elt *elt = 0, *p; | |
5734 | enum machine_mode mode; | |
5735 | rtx src_eqv_here; | |
5736 | rtx src_const = 0; | |
5737 | rtx src_related = 0; | |
5738 | struct table_elt *src_const_elt = 0; | |
5739 | int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000; | |
5740 | int src_related_cost = 10000, src_elt_cost = 10000; | |
5741 | /* Set non-zero if we need to call force_const_mem on with the | |
5742 | contents of src_folded before using it. */ | |
5743 | int src_folded_force_flag = 0; | |
5744 | ||
5745 | dest = SET_DEST (sets[i].rtl); | |
5746 | src = SET_SRC (sets[i].rtl); | |
5747 | ||
5748 | /* If SRC is a constant that has no machine mode, | |
5749 | hash it with the destination's machine mode. | |
5750 | This way we can keep different modes separate. */ | |
5751 | ||
5752 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5753 | sets[i].mode = mode; | |
5754 | ||
5755 | if (src_eqv) | |
5756 | { | |
5757 | enum machine_mode eqvmode = mode; | |
5758 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5759 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5760 | do_not_record = 0; | |
5761 | hash_arg_in_memory = 0; | |
5762 | hash_arg_in_struct = 0; | |
5763 | src_eqv = fold_rtx (src_eqv, insn); | |
5764 | src_eqv_hash_code = HASH (src_eqv, eqvmode); | |
5765 | ||
5766 | /* Find the equivalence class for the equivalent expression. */ | |
5767 | ||
5768 | if (!do_not_record) | |
5769 | src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, eqvmode); | |
5770 | ||
5771 | src_eqv_volatile = do_not_record; | |
5772 | src_eqv_in_memory = hash_arg_in_memory; | |
5773 | src_eqv_in_struct = hash_arg_in_struct; | |
5774 | } | |
5775 | ||
5776 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
5777 | value of the INNER register, not the destination. So it is not | |
5778 | a legal substitution for the source. But save it for later. */ | |
5779 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5780 | src_eqv_here = 0; | |
5781 | else | |
5782 | src_eqv_here = src_eqv; | |
5783 | ||
5784 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
5785 | simplified result, which may not necessarily be valid. */ | |
5786 | src_folded = fold_rtx (src, insn); | |
5787 | ||
5788 | /* If storing a constant in a bitfield, pre-truncate the constant | |
5789 | so we will be able to record it later. */ | |
5790 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
5791 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
5792 | { | |
5793 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5794 | ||
5795 | if (GET_CODE (src) == CONST_INT | |
5796 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5797 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5798 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
5799 | src_folded | |
5800 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
5801 | << INTVAL (width)) - 1)); | |
7afe21cc RK |
5802 | } |
5803 | ||
5804 | /* Compute SRC's hash code, and also notice if it | |
5805 | should not be recorded at all. In that case, | |
5806 | prevent any further processing of this assignment. */ | |
5807 | do_not_record = 0; | |
5808 | hash_arg_in_memory = 0; | |
5809 | hash_arg_in_struct = 0; | |
5810 | ||
5811 | sets[i].src = src; | |
5812 | sets[i].src_hash_code = HASH (src, mode); | |
5813 | sets[i].src_volatile = do_not_record; | |
5814 | sets[i].src_in_memory = hash_arg_in_memory; | |
5815 | sets[i].src_in_struct = hash_arg_in_struct; | |
5816 | ||
0dadecf6 RK |
5817 | #if 0 |
5818 | /* It is no longer clear why we used to do this, but it doesn't | |
5819 | appear to still be needed. So let's try without it since this | |
5820 | code hurts cse'ing widened ops. */ | |
7afe21cc RK |
5821 | /* If source is a perverse subreg (such as QI treated as an SI), |
5822 | treat it as volatile. It may do the work of an SI in one context | |
5823 | where the extra bits are not being used, but cannot replace an SI | |
5824 | in general. */ | |
5825 | if (GET_CODE (src) == SUBREG | |
5826 | && (GET_MODE_SIZE (GET_MODE (src)) | |
5827 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
5828 | sets[i].src_volatile = 1; | |
0dadecf6 | 5829 | #endif |
7afe21cc RK |
5830 | |
5831 | /* Locate all possible equivalent forms for SRC. Try to replace | |
5832 | SRC in the insn with each cheaper equivalent. | |
5833 | ||
5834 | We have the following types of equivalents: SRC itself, a folded | |
5835 | version, a value given in a REG_EQUAL note, or a value related | |
5836 | to a constant. | |
5837 | ||
5838 | Each of these equivalents may be part of an additional class | |
5839 | of equivalents (if more than one is in the table, they must be in | |
5840 | the same class; we check for this). | |
5841 | ||
5842 | If the source is volatile, we don't do any table lookups. | |
5843 | ||
5844 | We note any constant equivalent for possible later use in a | |
5845 | REG_NOTE. */ | |
5846 | ||
5847 | if (!sets[i].src_volatile) | |
5848 | elt = lookup (src, sets[i].src_hash_code, mode); | |
5849 | ||
5850 | sets[i].src_elt = elt; | |
5851 | ||
5852 | if (elt && src_eqv_here && src_eqv_elt) | |
5853 | { | |
5854 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
5855 | { | |
5856 | /* The REG_EQUAL is indicating that two formerly distinct | |
5857 | classes are now equivalent. So merge them. */ | |
5858 | merge_equiv_classes (elt, src_eqv_elt); | |
5859 | src_eqv_hash_code = HASH (src_eqv, elt->mode); | |
5860 | src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, elt->mode); | |
5861 | } | |
5862 | ||
5863 | src_eqv_here = 0; | |
5864 | } | |
5865 | ||
5866 | else if (src_eqv_elt) | |
5867 | elt = src_eqv_elt; | |
5868 | ||
5869 | /* Try to find a constant somewhere and record it in `src_const'. | |
5870 | Record its table element, if any, in `src_const_elt'. Look in | |
5871 | any known equivalences first. (If the constant is not in the | |
5872 | table, also set `sets[i].src_const_hash_code'). */ | |
5873 | if (elt) | |
5874 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
5875 | if (p->is_const) | |
5876 | { | |
5877 | src_const = p->exp; | |
5878 | src_const_elt = elt; | |
5879 | break; | |
5880 | } | |
5881 | ||
5882 | if (src_const == 0 | |
5883 | && (CONSTANT_P (src_folded) | |
5884 | /* Consider (minus (label_ref L1) (label_ref L2)) as | |
5885 | "constant" here so we will record it. This allows us | |
5886 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
5887 | || (GET_CODE (src_folded) == MINUS | |
5888 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
5889 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
5890 | src_const = src_folded, src_const_elt = elt; | |
5891 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
5892 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
5893 | ||
5894 | /* If we don't know if the constant is in the table, get its | |
5895 | hash code and look it up. */ | |
5896 | if (src_const && src_const_elt == 0) | |
5897 | { | |
5898 | sets[i].src_const_hash_code = HASH (src_const, mode); | |
5899 | src_const_elt = lookup (src_const, sets[i].src_const_hash_code, | |
5900 | mode); | |
5901 | } | |
5902 | ||
5903 | sets[i].src_const = src_const; | |
5904 | sets[i].src_const_elt = src_const_elt; | |
5905 | ||
5906 | /* If the constant and our source are both in the table, mark them as | |
5907 | equivalent. Otherwise, if a constant is in the table but the source | |
5908 | isn't, set ELT to it. */ | |
5909 | if (src_const_elt && elt | |
5910 | && src_const_elt->first_same_value != elt->first_same_value) | |
5911 | merge_equiv_classes (elt, src_const_elt); | |
5912 | else if (src_const_elt && elt == 0) | |
5913 | elt = src_const_elt; | |
5914 | ||
5915 | /* See if there is a register linearly related to a constant | |
5916 | equivalent of SRC. */ | |
5917 | if (src_const | |
5918 | && (GET_CODE (src_const) == CONST | |
5919 | || (src_const_elt && src_const_elt->related_value != 0))) | |
5920 | { | |
5921 | src_related = use_related_value (src_const, src_const_elt); | |
5922 | if (src_related) | |
5923 | { | |
5924 | struct table_elt *src_related_elt | |
5925 | = lookup (src_related, HASH (src_related, mode), mode); | |
5926 | if (src_related_elt && elt) | |
5927 | { | |
5928 | if (elt->first_same_value | |
5929 | != src_related_elt->first_same_value) | |
5930 | /* This can occur when we previously saw a CONST | |
5931 | involving a SYMBOL_REF and then see the SYMBOL_REF | |
5932 | twice. Merge the involved classes. */ | |
5933 | merge_equiv_classes (elt, src_related_elt); | |
5934 | ||
5935 | src_related = 0; | |
5936 | src_related_elt = 0; | |
5937 | } | |
5938 | else if (src_related_elt && elt == 0) | |
5939 | elt = src_related_elt; | |
5940 | } | |
5941 | } | |
5942 | ||
e4600702 RK |
5943 | /* See if we have a CONST_INT that is already in a register in a |
5944 | wider mode. */ | |
5945 | ||
5946 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
5947 | && GET_MODE_CLASS (mode) == MODE_INT | |
5948 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
5949 | { | |
5950 | enum machine_mode wider_mode; | |
5951 | ||
5952 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
5953 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
5954 | && src_related == 0; | |
5955 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
5956 | { | |
5957 | struct table_elt *const_elt | |
5958 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
5959 | ||
5960 | if (const_elt == 0) | |
5961 | continue; | |
5962 | ||
5963 | for (const_elt = const_elt->first_same_value; | |
5964 | const_elt; const_elt = const_elt->next_same_value) | |
5965 | if (GET_CODE (const_elt->exp) == REG) | |
5966 | { | |
5967 | src_related = gen_lowpart_if_possible (mode, | |
5968 | const_elt->exp); | |
5969 | break; | |
5970 | } | |
5971 | } | |
5972 | } | |
5973 | ||
d45cf215 RS |
5974 | /* Another possibility is that we have an AND with a constant in |
5975 | a mode narrower than a word. If so, it might have been generated | |
5976 | as part of an "if" which would narrow the AND. If we already | |
5977 | have done the AND in a wider mode, we can use a SUBREG of that | |
5978 | value. */ | |
5979 | ||
5980 | if (flag_expensive_optimizations && ! src_related | |
5981 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
5982 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
5983 | { | |
5984 | enum machine_mode tmode; | |
906c4e36 | 5985 | rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
5986 | |
5987 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
5988 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5989 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5990 | { | |
5991 | rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); | |
5992 | struct table_elt *larger_elt; | |
5993 | ||
5994 | if (inner) | |
5995 | { | |
5996 | PUT_MODE (new_and, tmode); | |
5997 | XEXP (new_and, 0) = inner; | |
5998 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
5999 | if (larger_elt == 0) | |
6000 | continue; | |
6001 | ||
6002 | for (larger_elt = larger_elt->first_same_value; | |
6003 | larger_elt; larger_elt = larger_elt->next_same_value) | |
6004 | if (GET_CODE (larger_elt->exp) == REG) | |
6005 | { | |
6006 | src_related | |
6007 | = gen_lowpart_if_possible (mode, larger_elt->exp); | |
6008 | break; | |
6009 | } | |
6010 | ||
6011 | if (src_related) | |
6012 | break; | |
6013 | } | |
6014 | } | |
6015 | } | |
6016 | ||
7afe21cc RK |
6017 | if (src == src_folded) |
6018 | src_folded = 0; | |
6019 | ||
6020 | /* At this point, ELT, if non-zero, points to a class of expressions | |
6021 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, | |
6022 | and SRC_RELATED, if non-zero, each contain additional equivalent | |
6023 | expressions. Prune these latter expressions by deleting expressions | |
6024 | already in the equivalence class. | |
6025 | ||
6026 | Check for an equivalent identical to the destination. If found, | |
6027 | this is the preferred equivalent since it will likely lead to | |
6028 | elimination of the insn. Indicate this by placing it in | |
6029 | `src_related'. */ | |
6030 | ||
6031 | if (elt) elt = elt->first_same_value; | |
6032 | for (p = elt; p; p = p->next_same_value) | |
6033 | { | |
6034 | enum rtx_code code = GET_CODE (p->exp); | |
6035 | ||
6036 | /* If the expression is not valid, ignore it. Then we do not | |
6037 | have to check for validity below. In most cases, we can use | |
6038 | `rtx_equal_p', since canonicalization has already been done. */ | |
6039 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
6040 | continue; | |
6041 | ||
6042 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) | |
6043 | src = 0; | |
6044 | else if (src_folded && GET_CODE (src_folded) == code | |
6045 | && rtx_equal_p (src_folded, p->exp)) | |
6046 | src_folded = 0; | |
6047 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code | |
6048 | && rtx_equal_p (src_eqv_here, p->exp)) | |
6049 | src_eqv_here = 0; | |
6050 | else if (src_related && GET_CODE (src_related) == code | |
6051 | && rtx_equal_p (src_related, p->exp)) | |
6052 | src_related = 0; | |
6053 | ||
6054 | /* This is the same as the destination of the insns, we want | |
6055 | to prefer it. Copy it to src_related. The code below will | |
6056 | then give it a negative cost. */ | |
6057 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
6058 | src_related = dest; | |
6059 | ||
6060 | } | |
6061 | ||
6062 | /* Find the cheapest valid equivalent, trying all the available | |
6063 | possibilities. Prefer items not in the hash table to ones | |
6064 | that are when they are equal cost. Note that we can never | |
6065 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 6066 | If we find an equivalent identical to the destination, use it as best, |
7afe21cc RK |
6067 | since this insn will probably be eliminated in that case. */ |
6068 | if (src) | |
6069 | { | |
6070 | if (rtx_equal_p (src, dest)) | |
6071 | src_cost = -1; | |
6072 | else | |
6073 | src_cost = COST (src); | |
6074 | } | |
6075 | ||
6076 | if (src_eqv_here) | |
6077 | { | |
6078 | if (rtx_equal_p (src_eqv_here, dest)) | |
6079 | src_eqv_cost = -1; | |
6080 | else | |
6081 | src_eqv_cost = COST (src_eqv_here); | |
6082 | } | |
6083 | ||
6084 | if (src_folded) | |
6085 | { | |
6086 | if (rtx_equal_p (src_folded, dest)) | |
6087 | src_folded_cost = -1; | |
6088 | else | |
6089 | src_folded_cost = COST (src_folded); | |
6090 | } | |
6091 | ||
6092 | if (src_related) | |
6093 | { | |
6094 | if (rtx_equal_p (src_related, dest)) | |
6095 | src_related_cost = -1; | |
6096 | else | |
6097 | src_related_cost = COST (src_related); | |
6098 | } | |
6099 | ||
6100 | /* If this was an indirect jump insn, a known label will really be | |
6101 | cheaper even though it looks more expensive. */ | |
6102 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
6103 | src_folded = src_const, src_folded_cost = -1; | |
6104 | ||
6105 | /* Terminate loop when replacement made. This must terminate since | |
6106 | the current contents will be tested and will always be valid. */ | |
6107 | while (1) | |
6108 | { | |
6109 | rtx trial; | |
6110 | ||
6111 | /* Skip invalid entries. */ | |
6112 | while (elt && GET_CODE (elt->exp) != REG | |
6113 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
6114 | elt = elt->next_same_value; | |
6115 | ||
6116 | if (elt) src_elt_cost = elt->cost; | |
6117 | ||
6118 | /* Find cheapest and skip it for the next time. For items | |
6119 | of equal cost, use this order: | |
6120 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
6121 | if (src_folded_cost <= src_cost | |
6122 | && src_folded_cost <= src_eqv_cost | |
6123 | && src_folded_cost <= src_related_cost | |
6124 | && src_folded_cost <= src_elt_cost) | |
6125 | { | |
6126 | trial = src_folded, src_folded_cost = 10000; | |
6127 | if (src_folded_force_flag) | |
6128 | trial = force_const_mem (mode, trial); | |
6129 | } | |
6130 | else if (src_cost <= src_eqv_cost | |
6131 | && src_cost <= src_related_cost | |
6132 | && src_cost <= src_elt_cost) | |
6133 | trial = src, src_cost = 10000; | |
6134 | else if (src_eqv_cost <= src_related_cost | |
6135 | && src_eqv_cost <= src_elt_cost) | |
6136 | trial = src_eqv_here, src_eqv_cost = 10000; | |
6137 | else if (src_related_cost <= src_elt_cost) | |
6138 | trial = src_related, src_related_cost = 10000; | |
6139 | else | |
6140 | { | |
05c33dd8 | 6141 | trial = copy_rtx (elt->exp); |
7afe21cc RK |
6142 | elt = elt->next_same_value; |
6143 | src_elt_cost = 10000; | |
6144 | } | |
6145 | ||
6146 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
6147 | check for this separately here. We will delete such an | |
6148 | insn below. | |
6149 | ||
6150 | Tablejump insns contain a USE of the table, so simply replacing | |
6151 | the operand with the constant won't match. This is simply an | |
6152 | unconditional branch, however, and is therefore valid. Just | |
6153 | insert the substitution here and we will delete and re-emit | |
6154 | the insn later. */ | |
6155 | ||
6156 | if (n_sets == 1 && dest == pc_rtx | |
6157 | && (trial == pc_rtx | |
6158 | || (GET_CODE (trial) == LABEL_REF | |
6159 | && ! condjump_p (insn)))) | |
6160 | { | |
6161 | /* If TRIAL is a label in front of a jump table, we are | |
6162 | really falling through the switch (this is how casesi | |
6163 | insns work), so we must branch around the table. */ | |
6164 | if (GET_CODE (trial) == CODE_LABEL | |
6165 | && NEXT_INSN (trial) != 0 | |
6166 | && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN | |
6167 | && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC | |
6168 | || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC)) | |
6169 | ||
6170 | trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial)); | |
6171 | ||
6172 | SET_SRC (sets[i].rtl) = trial; | |
6173 | break; | |
6174 | } | |
6175 | ||
6176 | /* Look for a substitution that makes a valid insn. */ | |
6177 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) | |
05c33dd8 RK |
6178 | { |
6179 | SET_SRC (sets[i].rtl) = canon_reg (SET_SRC (sets[i].rtl), insn); | |
6180 | break; | |
6181 | } | |
7afe21cc RK |
6182 | |
6183 | /* If we previously found constant pool entries for | |
6184 | constants and this is a constant, try making a | |
6185 | pool entry. Put it in src_folded unless we already have done | |
6186 | this since that is where it likely came from. */ | |
6187 | ||
6188 | else if (constant_pool_entries_cost | |
6189 | && CONSTANT_P (trial) | |
6190 | && (src_folded == 0 || GET_CODE (src_folded) != MEM) | |
6191 | && GET_MODE_CLASS (mode) != MODE_CC) | |
6192 | { | |
6193 | src_folded_force_flag = 1; | |
6194 | src_folded = trial; | |
6195 | src_folded_cost = constant_pool_entries_cost; | |
6196 | } | |
6197 | } | |
6198 | ||
6199 | src = SET_SRC (sets[i].rtl); | |
6200 | ||
6201 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
6202 | However, there is an important exception: If both are registers | |
6203 | that are not the head of their equivalence class, replace SET_SRC | |
6204 | with the head of the class. If we do not do this, we will have | |
6205 | both registers live over a portion of the basic block. This way, | |
6206 | their lifetimes will likely abut instead of overlapping. */ | |
6207 | if (GET_CODE (dest) == REG | |
6208 | && REGNO_QTY_VALID_P (REGNO (dest)) | |
6209 | && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest) | |
6210 | && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest) | |
6211 | && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) | |
6212 | /* Don't do this if the original insn had a hard reg as | |
6213 | SET_SRC. */ | |
6214 | && (GET_CODE (sets[i].src) != REG | |
6215 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)) | |
6216 | /* We can't call canon_reg here because it won't do anything if | |
6217 | SRC is a hard register. */ | |
6218 | { | |
6219 | int first = qty_first_reg[reg_qty[REGNO (src)]]; | |
6220 | ||
6221 | src = SET_SRC (sets[i].rtl) | |
6222 | = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] | |
6223 | : gen_rtx (REG, GET_MODE (src), first); | |
6224 | ||
6225 | /* If we had a constant that is cheaper than what we are now | |
6226 | setting SRC to, use that constant. We ignored it when we | |
6227 | thought we could make this into a no-op. */ | |
6228 | if (src_const && COST (src_const) < COST (src) | |
6229 | && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0)) | |
6230 | src = src_const; | |
6231 | } | |
6232 | ||
6233 | /* If we made a change, recompute SRC values. */ | |
6234 | if (src != sets[i].src) | |
6235 | { | |
6236 | do_not_record = 0; | |
6237 | hash_arg_in_memory = 0; | |
6238 | hash_arg_in_struct = 0; | |
6239 | sets[i].src = src; | |
6240 | sets[i].src_hash_code = HASH (src, mode); | |
6241 | sets[i].src_volatile = do_not_record; | |
6242 | sets[i].src_in_memory = hash_arg_in_memory; | |
6243 | sets[i].src_in_struct = hash_arg_in_struct; | |
6244 | sets[i].src_elt = lookup (src, sets[i].src_hash_code, mode); | |
6245 | } | |
6246 | ||
6247 | /* If this is a single SET, we are setting a register, and we have an | |
6248 | equivalent constant, we want to add a REG_NOTE. We don't want | |
6249 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 6250 | that pseudo hasn't been eliminated is a pain. Such a note also |
7afe21cc RK |
6251 | won't help anything. */ |
6252 | if (n_sets == 1 && src_const && GET_CODE (dest) == REG | |
6253 | && GET_CODE (src_const) != REG) | |
6254 | { | |
906c4e36 | 6255 | rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
7afe21cc RK |
6256 | |
6257 | /* Record the actual constant value in a REG_EQUAL note, making | |
6258 | a new one if one does not already exist. */ | |
6259 | if (tem) | |
6260 | XEXP (tem, 0) = src_const; | |
6261 | else | |
6262 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, | |
6263 | src_const, REG_NOTES (insn)); | |
6264 | ||
6265 | /* If storing a constant value in a register that | |
6266 | previously held the constant value 0, | |
6267 | record this fact with a REG_WAS_0 note on this insn. | |
6268 | ||
6269 | Note that the *register* is required to have previously held 0, | |
6270 | not just any register in the quantity and we must point to the | |
6271 | insn that set that register to zero. | |
6272 | ||
6273 | Rather than track each register individually, we just see if | |
6274 | the last set for this quantity was for this register. */ | |
6275 | ||
6276 | if (REGNO_QTY_VALID_P (REGNO (dest)) | |
6277 | && qty_const[reg_qty[REGNO (dest)]] == const0_rtx) | |
6278 | { | |
6279 | /* See if we previously had a REG_WAS_0 note. */ | |
906c4e36 | 6280 | rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
6281 | rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]]; |
6282 | ||
6283 | if ((tem = single_set (const_insn)) != 0 | |
6284 | && rtx_equal_p (SET_DEST (tem), dest)) | |
6285 | { | |
6286 | if (note) | |
6287 | XEXP (note, 0) = const_insn; | |
6288 | else | |
6289 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0, | |
6290 | const_insn, REG_NOTES (insn)); | |
6291 | } | |
6292 | } | |
6293 | } | |
6294 | ||
6295 | /* Now deal with the destination. */ | |
6296 | do_not_record = 0; | |
6297 | sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl); | |
6298 | ||
6299 | /* Look within any SIGN_EXTRACT or ZERO_EXTRACT | |
6300 | to the MEM or REG within it. */ | |
6301 | while (GET_CODE (dest) == SIGN_EXTRACT | |
6302 | || GET_CODE (dest) == ZERO_EXTRACT | |
6303 | || GET_CODE (dest) == SUBREG | |
6304 | || GET_CODE (dest) == STRICT_LOW_PART) | |
6305 | { | |
6306 | sets[i].inner_dest_loc = &XEXP (dest, 0); | |
6307 | dest = XEXP (dest, 0); | |
6308 | } | |
6309 | ||
6310 | sets[i].inner_dest = dest; | |
6311 | ||
6312 | if (GET_CODE (dest) == MEM) | |
6313 | { | |
6314 | dest = fold_rtx (dest, insn); | |
6315 | ||
6316 | /* Decide whether we invalidate everything in memory, | |
6317 | or just things at non-fixed places. | |
6318 | Writing a large aggregate must invalidate everything | |
6319 | because we don't know how long it is. */ | |
6320 | note_mem_written (dest, &writes_memory); | |
6321 | } | |
6322 | ||
6323 | /* Compute the hash code of the destination now, | |
6324 | before the effects of this instruction are recorded, | |
6325 | since the register values used in the address computation | |
6326 | are those before this instruction. */ | |
6327 | sets[i].dest_hash_code = HASH (dest, mode); | |
6328 | ||
6329 | /* Don't enter a bit-field in the hash table | |
6330 | because the value in it after the store | |
6331 | may not equal what was stored, due to truncation. */ | |
6332 | ||
6333 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
6334 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
6335 | { | |
6336 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
6337 | ||
6338 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
6339 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
6340 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
6341 | && ! (INTVAL (src_const) | |
6342 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
6343 | /* Exception: if the value is constant, |
6344 | and it won't be truncated, record it. */ | |
6345 | ; | |
6346 | else | |
6347 | { | |
6348 | /* This is chosen so that the destination will be invalidated | |
6349 | but no new value will be recorded. | |
6350 | We must invalidate because sometimes constant | |
6351 | values can be recorded for bitfields. */ | |
6352 | sets[i].src_elt = 0; | |
6353 | sets[i].src_volatile = 1; | |
6354 | src_eqv = 0; | |
6355 | src_eqv_elt = 0; | |
6356 | } | |
6357 | } | |
6358 | ||
6359 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
6360 | the insn. */ | |
6361 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
6362 | { | |
6363 | PUT_CODE (insn, NOTE); | |
6364 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
6365 | NOTE_SOURCE_FILE (insn) = 0; | |
6366 | cse_jumps_altered = 1; | |
6367 | /* One less use of the label this insn used to jump to. */ | |
6368 | --LABEL_NUSES (JUMP_LABEL (insn)); | |
6369 | /* No more processing for this set. */ | |
6370 | sets[i].rtl = 0; | |
6371 | } | |
6372 | ||
6373 | /* If this SET is now setting PC to a label, we know it used to | |
6374 | be a conditional or computed branch. So we see if we can follow | |
6375 | it. If it was a computed branch, delete it and re-emit. */ | |
6376 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) | |
6377 | { | |
6378 | rtx p; | |
6379 | ||
6380 | /* If this is not in the format for a simple branch and | |
6381 | we are the only SET in it, re-emit it. */ | |
6382 | if (! simplejump_p (insn) && n_sets == 1) | |
6383 | { | |
6384 | rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); | |
6385 | JUMP_LABEL (new) = XEXP (src, 0); | |
6386 | LABEL_NUSES (XEXP (src, 0))++; | |
6387 | delete_insn (insn); | |
6388 | insn = new; | |
6389 | } | |
6390 | ||
6391 | /* Now that we've converted this jump to an unconditional jump, | |
6392 | there is dead code after it. Delete the dead code until we | |
6393 | reach a BARRIER, the end of the function, or a label. Do | |
6394 | not delete NOTEs except for NOTE_INSN_DELETED since later | |
6395 | phases assume these notes are retained. */ | |
6396 | ||
6397 | p = insn; | |
6398 | ||
6399 | while (NEXT_INSN (p) != 0 | |
6400 | && GET_CODE (NEXT_INSN (p)) != BARRIER | |
6401 | && GET_CODE (NEXT_INSN (p)) != CODE_LABEL) | |
6402 | { | |
6403 | if (GET_CODE (NEXT_INSN (p)) != NOTE | |
6404 | || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED) | |
6405 | delete_insn (NEXT_INSN (p)); | |
6406 | else | |
6407 | p = NEXT_INSN (p); | |
6408 | } | |
6409 | ||
6410 | /* If we don't have a BARRIER immediately after INSN, put one there. | |
6411 | Much code assumes that there are no NOTEs between a JUMP_INSN and | |
6412 | BARRIER. */ | |
6413 | ||
6414 | if (NEXT_INSN (insn) == 0 | |
6415 | || GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
6416 | emit_barrier_after (insn); | |
6417 | ||
6418 | /* We might have two BARRIERs separated by notes. Delete the second | |
6419 | one if so. */ | |
6420 | ||
538b78e7 RS |
6421 | if (p != insn && NEXT_INSN (p) != 0 |
6422 | && GET_CODE (NEXT_INSN (p)) == BARRIER) | |
7afe21cc RK |
6423 | delete_insn (NEXT_INSN (p)); |
6424 | ||
6425 | cse_jumps_altered = 1; | |
6426 | sets[i].rtl = 0; | |
6427 | } | |
6428 | ||
c2a47e48 RK |
6429 | /* If destination is volatile, invalidate it and then do no further |
6430 | processing for this assignment. */ | |
7afe21cc RK |
6431 | |
6432 | else if (do_not_record) | |
c2a47e48 RK |
6433 | { |
6434 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
6435 | || GET_CODE (dest) == MEM) | |
6436 | invalidate (dest); | |
6437 | sets[i].rtl = 0; | |
6438 | } | |
7afe21cc RK |
6439 | |
6440 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
6441 | sets[i].dest_hash_code = HASH (SET_DEST (sets[i].rtl), mode); | |
6442 | ||
6443 | #ifdef HAVE_cc0 | |
6444 | /* If setting CC0, record what it was set to, or a constant, if it | |
6445 | is equivalent to a constant. If it is being set to a floating-point | |
6446 | value, make a COMPARE with the appropriate constant of 0. If we | |
6447 | don't do this, later code can interpret this as a test against | |
6448 | const0_rtx, which can cause problems if we try to put it into an | |
6449 | insn as a floating-point operand. */ | |
6450 | if (dest == cc0_rtx) | |
6451 | { | |
6452 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
6453 | this_insn_cc0_mode = mode; | |
6454 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
6455 | this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0, | |
6456 | CONST0_RTX (mode)); | |
6457 | } | |
6458 | #endif | |
6459 | } | |
6460 | ||
6461 | /* Now enter all non-volatile source expressions in the hash table | |
6462 | if they are not already present. | |
6463 | Record their equivalence classes in src_elt. | |
6464 | This way we can insert the corresponding destinations into | |
6465 | the same classes even if the actual sources are no longer in them | |
6466 | (having been invalidated). */ | |
6467 | ||
6468 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
6469 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
6470 | { | |
6471 | register struct table_elt *elt; | |
6472 | register struct table_elt *classp = sets[0].src_elt; | |
6473 | rtx dest = SET_DEST (sets[0].rtl); | |
6474 | enum machine_mode eqvmode = GET_MODE (dest); | |
6475 | ||
6476 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6477 | { | |
6478 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
6479 | classp = 0; | |
6480 | } | |
6481 | if (insert_regs (src_eqv, classp, 0)) | |
6482 | src_eqv_hash_code = HASH (src_eqv, eqvmode); | |
6483 | elt = insert (src_eqv, classp, src_eqv_hash_code, eqvmode); | |
6484 | elt->in_memory = src_eqv_in_memory; | |
6485 | elt->in_struct = src_eqv_in_struct; | |
6486 | src_eqv_elt = elt; | |
6487 | } | |
6488 | ||
6489 | for (i = 0; i < n_sets; i++) | |
6490 | if (sets[i].rtl && ! sets[i].src_volatile | |
6491 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
6492 | { | |
6493 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
6494 | { | |
6495 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
6496 | gives an equivalent for the entire destination register, | |
6497 | not just for the subreg being stored in now. | |
6498 | This is a more interesting equivalence, so we arrange later | |
6499 | to treat the entire reg as the destination. */ | |
6500 | sets[i].src_elt = src_eqv_elt; | |
6501 | sets[i].src_hash_code = src_eqv_hash_code; | |
6502 | } | |
6503 | else | |
6504 | { | |
6505 | /* Insert source and constant equivalent into hash table, if not | |
6506 | already present. */ | |
6507 | register struct table_elt *classp = src_eqv_elt; | |
6508 | register rtx src = sets[i].src; | |
6509 | register rtx dest = SET_DEST (sets[i].rtl); | |
6510 | enum machine_mode mode | |
6511 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
6512 | ||
6513 | if (sets[i].src_elt == 0) | |
6514 | { | |
6515 | register struct table_elt *elt; | |
6516 | ||
6517 | /* Note that these insert_regs calls cannot remove | |
6518 | any of the src_elt's, because they would have failed to | |
6519 | match if not still valid. */ | |
6520 | if (insert_regs (src, classp, 0)) | |
6521 | sets[i].src_hash_code = HASH (src, mode); | |
6522 | elt = insert (src, classp, sets[i].src_hash_code, mode); | |
6523 | elt->in_memory = sets[i].src_in_memory; | |
6524 | elt->in_struct = sets[i].src_in_struct; | |
6525 | sets[i].src_elt = classp = elt; | |
6526 | } | |
6527 | ||
6528 | if (sets[i].src_const && sets[i].src_const_elt == 0 | |
6529 | && src != sets[i].src_const | |
6530 | && ! rtx_equal_p (sets[i].src_const, src)) | |
6531 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
6532 | sets[i].src_const_hash_code, mode); | |
6533 | } | |
6534 | } | |
6535 | else if (sets[i].src_elt == 0) | |
6536 | /* If we did not insert the source into the hash table (e.g., it was | |
6537 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
6538 | so that the destination goes into that class. */ | |
6539 | sets[i].src_elt = src_eqv_elt; | |
6540 | ||
6541 | invalidate_from_clobbers (&writes_memory, x); | |
77fa0940 RK |
6542 | |
6543 | /* Some registers are invalidated by subroutine calls. Memory is | |
6544 | invalidated by non-constant calls. */ | |
6545 | ||
7afe21cc RK |
6546 | if (GET_CODE (insn) == CALL_INSN) |
6547 | { | |
6548 | static struct write_data everything = {0, 1, 1, 1}; | |
77fa0940 RK |
6549 | |
6550 | if (! CONST_CALL_P (insn)) | |
6551 | invalidate_memory (&everything); | |
7afe21cc RK |
6552 | invalidate_for_call (); |
6553 | } | |
6554 | ||
6555 | /* Now invalidate everything set by this instruction. | |
6556 | If a SUBREG or other funny destination is being set, | |
6557 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
6558 | a part of which is being set. */ | |
6559 | ||
6560 | for (i = 0; i < n_sets; i++) | |
6561 | if (sets[i].rtl) | |
6562 | { | |
6563 | register rtx dest = sets[i].inner_dest; | |
6564 | ||
6565 | /* Needed for registers to remove the register from its | |
6566 | previous quantity's chain. | |
6567 | Needed for memory if this is a nonvarying address, unless | |
6568 | we have just done an invalidate_memory that covers even those. */ | |
6569 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
6570 | || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest))) | |
6571 | invalidate (dest); | |
6572 | } | |
6573 | ||
6574 | /* Make sure registers mentioned in destinations | |
6575 | are safe for use in an expression to be inserted. | |
6576 | This removes from the hash table | |
6577 | any invalid entry that refers to one of these registers. | |
6578 | ||
6579 | We don't care about the return value from mention_regs because | |
6580 | we are going to hash the SET_DEST values unconditionally. */ | |
6581 | ||
6582 | for (i = 0; i < n_sets; i++) | |
6583 | if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG) | |
6584 | mention_regs (SET_DEST (sets[i].rtl)); | |
6585 | ||
6586 | /* We may have just removed some of the src_elt's from the hash table. | |
6587 | So replace each one with the current head of the same class. */ | |
6588 | ||
6589 | for (i = 0; i < n_sets; i++) | |
6590 | if (sets[i].rtl) | |
6591 | { | |
6592 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
6593 | /* If elt was removed, find current head of same class, | |
6594 | or 0 if nothing remains of that class. */ | |
6595 | { | |
6596 | register struct table_elt *elt = sets[i].src_elt; | |
6597 | ||
6598 | while (elt && elt->prev_same_value) | |
6599 | elt = elt->prev_same_value; | |
6600 | ||
6601 | while (elt && elt->first_same_value == 0) | |
6602 | elt = elt->next_same_value; | |
6603 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
6604 | } | |
6605 | } | |
6606 | ||
6607 | /* Now insert the destinations into their equivalence classes. */ | |
6608 | ||
6609 | for (i = 0; i < n_sets; i++) | |
6610 | if (sets[i].rtl) | |
6611 | { | |
6612 | register rtx dest = SET_DEST (sets[i].rtl); | |
6613 | register struct table_elt *elt; | |
6614 | ||
6615 | /* Don't record value if we are not supposed to risk allocating | |
6616 | floating-point values in registers that might be wider than | |
6617 | memory. */ | |
6618 | if ((flag_float_store | |
6619 | && GET_CODE (dest) == MEM | |
6620 | && GET_MODE_CLASS (GET_MODE (dest)) == MODE_FLOAT) | |
6621 | /* Don't record values of destinations set inside a libcall block | |
6622 | since we might delete the libcall. Things should have been set | |
6623 | up so we won't want to reuse such a value, but we play it safe | |
6624 | here. */ | |
6625 | || in_libcall_block | |
6626 | /* If we didn't put a REG_EQUAL value or a source into the hash | |
6627 | table, there is no point is recording DEST. */ | |
6628 | || sets[i].src_elt == 0) | |
6629 | continue; | |
6630 | ||
6631 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
6632 | and neither is the SUBREG inside it. | |
6633 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
6634 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6635 | dest = SUBREG_REG (XEXP (dest, 0)); | |
6636 | ||
c610adec | 6637 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
6638 | /* Registers must also be inserted into chains for quantities. */ |
6639 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
6640 | /* If `insert_regs' changes something, the hash code must be | |
6641 | recalculated. */ | |
6642 | sets[i].dest_hash_code = HASH (dest, GET_MODE (dest)); | |
6643 | ||
6644 | elt = insert (dest, sets[i].src_elt, | |
6645 | sets[i].dest_hash_code, GET_MODE (dest)); | |
6646 | elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM; | |
6647 | if (elt->in_memory) | |
6648 | { | |
6649 | /* This implicitly assumes a whole struct | |
6650 | need not have MEM_IN_STRUCT_P. | |
6651 | But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */ | |
6652 | elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest) | |
6653 | || sets[i].inner_dest != SET_DEST (sets[i].rtl)); | |
6654 | } | |
6655 | ||
fc3ffe83 RK |
6656 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
6657 | narrower than M2, and both M1 and M2 are the same number of words, | |
6658 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
6659 | make that equivalence as well. | |
7afe21cc RK |
6660 | |
6661 | However, BAR may have equivalences for which gen_lowpart_if_possible | |
6662 | will produce a simpler value than gen_lowpart_if_possible applied to | |
6663 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all | |
6664 | BAR's equivalences. If we don't get a simplified form, make | |
6665 | the SUBREG. It will not be used in an equivalence, but will | |
6666 | cause two similar assignments to be detected. | |
6667 | ||
6668 | Note the loop below will find SUBREG_REG (DEST) since we have | |
6669 | already entered SRC and DEST of the SET in the table. */ | |
6670 | ||
6671 | if (GET_CODE (dest) == SUBREG | |
fc3ffe83 RK |
6672 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) / UNITS_PER_WORD |
6673 | == GET_MODE_SIZE (GET_MODE (dest)) / UNITS_PER_WORD) | |
7afe21cc RK |
6674 | && (GET_MODE_SIZE (GET_MODE (dest)) |
6675 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6676 | && sets[i].src_elt != 0) | |
6677 | { | |
6678 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
6679 | struct table_elt *elt, *classp = 0; | |
6680 | ||
6681 | for (elt = sets[i].src_elt->first_same_value; elt; | |
6682 | elt = elt->next_same_value) | |
6683 | { | |
6684 | rtx new_src = 0; | |
6685 | int src_hash; | |
6686 | struct table_elt *src_elt; | |
6687 | ||
6688 | /* Ignore invalid entries. */ | |
6689 | if (GET_CODE (elt->exp) != REG | |
6690 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
6691 | continue; | |
6692 | ||
6693 | new_src = gen_lowpart_if_possible (new_mode, elt->exp); | |
6694 | if (new_src == 0) | |
6695 | new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0); | |
6696 | ||
6697 | src_hash = HASH (new_src, new_mode); | |
6698 | src_elt = lookup (new_src, src_hash, new_mode); | |
6699 | ||
6700 | /* Put the new source in the hash table is if isn't | |
6701 | already. */ | |
6702 | if (src_elt == 0) | |
6703 | { | |
6704 | if (insert_regs (new_src, classp, 0)) | |
6705 | src_hash = HASH (new_src, new_mode); | |
6706 | src_elt = insert (new_src, classp, src_hash, new_mode); | |
6707 | src_elt->in_memory = elt->in_memory; | |
6708 | src_elt->in_struct = elt->in_struct; | |
6709 | } | |
6710 | else if (classp && classp != src_elt->first_same_value) | |
6711 | /* Show that two things that we've seen before are | |
6712 | actually the same. */ | |
6713 | merge_equiv_classes (src_elt, classp); | |
6714 | ||
6715 | classp = src_elt->first_same_value; | |
6716 | } | |
6717 | } | |
6718 | } | |
6719 | ||
6720 | /* Special handling for (set REG0 REG1) | |
6721 | where REG0 is the "cheapest", cheaper than REG1. | |
6722 | After cse, REG1 will probably not be used in the sequel, | |
6723 | so (if easily done) change this insn to (set REG1 REG0) and | |
6724 | replace REG1 with REG0 in the previous insn that computed their value. | |
6725 | Then REG1 will become a dead store and won't cloud the situation | |
6726 | for later optimizations. | |
6727 | ||
6728 | Do not make this change if REG1 is a hard register, because it will | |
6729 | then be used in the sequel and we may be changing a two-operand insn | |
6730 | into a three-operand insn. | |
6731 | ||
6732 | Also do not do this if we are operating on a copy of INSN. */ | |
6733 | ||
6734 | if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG | |
6735 | && NEXT_INSN (PREV_INSN (insn)) == insn | |
6736 | && GET_CODE (SET_SRC (sets[0].rtl)) == REG | |
6737 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER | |
6738 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))) | |
6739 | && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]] | |
6740 | == REGNO (SET_DEST (sets[0].rtl)))) | |
6741 | { | |
6742 | rtx prev = PREV_INSN (insn); | |
6743 | while (prev && GET_CODE (prev) == NOTE) | |
6744 | prev = PREV_INSN (prev); | |
6745 | ||
6746 | if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET | |
6747 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) | |
6748 | { | |
6749 | rtx dest = SET_DEST (sets[0].rtl); | |
906c4e36 | 6750 | rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); |
7afe21cc RK |
6751 | |
6752 | validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1); | |
6753 | validate_change (insn, & SET_DEST (sets[0].rtl), | |
6754 | SET_SRC (sets[0].rtl), 1); | |
6755 | validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1); | |
6756 | apply_change_group (); | |
6757 | ||
6758 | /* If REG1 was equivalent to a constant, REG0 is not. */ | |
6759 | if (note) | |
6760 | PUT_REG_NOTE_KIND (note, REG_EQUAL); | |
6761 | ||
6762 | /* If there was a REG_WAS_0 note on PREV, remove it. Move | |
6763 | any REG_WAS_0 note on INSN to PREV. */ | |
906c4e36 | 6764 | note = find_reg_note (prev, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
6765 | if (note) |
6766 | remove_note (prev, note); | |
6767 | ||
906c4e36 | 6768 | note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
6769 | if (note) |
6770 | { | |
6771 | remove_note (insn, note); | |
6772 | XEXP (note, 1) = REG_NOTES (prev); | |
6773 | REG_NOTES (prev) = note; | |
6774 | } | |
6775 | } | |
6776 | } | |
6777 | ||
6778 | /* If this is a conditional jump insn, record any known equivalences due to | |
6779 | the condition being tested. */ | |
6780 | ||
6781 | last_jump_equiv_class = 0; | |
6782 | if (GET_CODE (insn) == JUMP_INSN | |
6783 | && n_sets == 1 && GET_CODE (x) == SET | |
6784 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
6785 | record_jump_equiv (insn, 0); | |
6786 | ||
6787 | #ifdef HAVE_cc0 | |
6788 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
6789 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
6790 | to be valid over an insn, which is true until the final pass. */ | |
6791 | if (prev_insn && GET_CODE (prev_insn) == INSN | |
6792 | && (tem = single_set (prev_insn)) != 0 | |
6793 | && SET_DEST (tem) == cc0_rtx | |
6794 | && ! reg_mentioned_p (cc0_rtx, x)) | |
6795 | { | |
6796 | PUT_CODE (prev_insn, NOTE); | |
6797 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
6798 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
6799 | } | |
6800 | ||
6801 | prev_insn_cc0 = this_insn_cc0; | |
6802 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
6803 | #endif | |
6804 | ||
6805 | prev_insn = insn; | |
6806 | } | |
6807 | \f | |
6808 | /* Store 1 in *WRITES_PTR for those categories of memory ref | |
6809 | that must be invalidated when the expression WRITTEN is stored in. | |
6810 | If WRITTEN is null, say everything must be invalidated. */ | |
6811 | ||
6812 | static void | |
6813 | note_mem_written (written, writes_ptr) | |
6814 | rtx written; | |
6815 | struct write_data *writes_ptr; | |
6816 | { | |
6817 | static struct write_data everything = {0, 1, 1, 1}; | |
6818 | ||
6819 | if (written == 0) | |
6820 | *writes_ptr = everything; | |
6821 | else if (GET_CODE (written) == MEM) | |
6822 | { | |
6823 | /* Pushing or popping the stack invalidates just the stack pointer. */ | |
6824 | rtx addr = XEXP (written, 0); | |
6825 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
6826 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
6827 | && GET_CODE (XEXP (addr, 0)) == REG | |
6828 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
6829 | { | |
6830 | writes_ptr->sp = 1; | |
6831 | return; | |
6832 | } | |
6833 | else if (GET_MODE (written) == BLKmode) | |
6834 | *writes_ptr = everything; | |
6835 | else if (cse_rtx_addr_varies_p (written)) | |
6836 | { | |
6837 | /* A varying address that is a sum indicates an array element, | |
6838 | and that's just as good as a structure element | |
6839 | in implying that we need not invalidate scalar variables. */ | |
6840 | if (!(MEM_IN_STRUCT_P (written) | |
6841 | || GET_CODE (XEXP (written, 0)) == PLUS)) | |
6842 | writes_ptr->all = 1; | |
6843 | writes_ptr->nonscalar = 1; | |
6844 | } | |
6845 | writes_ptr->var = 1; | |
6846 | } | |
6847 | } | |
6848 | ||
6849 | /* Perform invalidation on the basis of everything about an insn | |
6850 | except for invalidating the actual places that are SET in it. | |
6851 | This includes the places CLOBBERed, and anything that might | |
6852 | alias with something that is SET or CLOBBERed. | |
6853 | ||
6854 | W points to the writes_memory for this insn, a struct write_data | |
6855 | saying which kinds of memory references must be invalidated. | |
6856 | X is the pattern of the insn. */ | |
6857 | ||
6858 | static void | |
6859 | invalidate_from_clobbers (w, x) | |
6860 | struct write_data *w; | |
6861 | rtx x; | |
6862 | { | |
6863 | /* If W->var is not set, W specifies no action. | |
6864 | If W->all is set, this step gets all memory refs | |
6865 | so they can be ignored in the rest of this function. */ | |
6866 | if (w->var) | |
6867 | invalidate_memory (w); | |
6868 | ||
6869 | if (w->sp) | |
6870 | { | |
6871 | if (reg_tick[STACK_POINTER_REGNUM] >= 0) | |
6872 | reg_tick[STACK_POINTER_REGNUM]++; | |
6873 | ||
6874 | /* This should be *very* rare. */ | |
6875 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
6876 | invalidate (stack_pointer_rtx); | |
6877 | } | |
6878 | ||
6879 | if (GET_CODE (x) == CLOBBER) | |
6880 | { | |
6881 | rtx ref = XEXP (x, 0); | |
6882 | if (ref | |
6883 | && (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
6884 | || (GET_CODE (ref) == MEM && ! w->all))) | |
6885 | invalidate (ref); | |
6886 | } | |
6887 | else if (GET_CODE (x) == PARALLEL) | |
6888 | { | |
6889 | register int i; | |
6890 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
6891 | { | |
6892 | register rtx y = XVECEXP (x, 0, i); | |
6893 | if (GET_CODE (y) == CLOBBER) | |
6894 | { | |
6895 | rtx ref = XEXP (y, 0); | |
6896 | if (ref | |
6897 | &&(GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
6898 | || (GET_CODE (ref) == MEM && !w->all))) | |
6899 | invalidate (ref); | |
6900 | } | |
6901 | } | |
6902 | } | |
6903 | } | |
6904 | \f | |
6905 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
6906 | and replace any registers in them with either an equivalent constant | |
6907 | or the canonical form of the register. If we are inside an address, | |
6908 | only do this if the address remains valid. | |
6909 | ||
6910 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6911 | ||
6912 | Return the replacement for X. */ | |
6913 | ||
6914 | static rtx | |
6915 | cse_process_notes (x, object) | |
6916 | rtx x; | |
6917 | rtx object; | |
6918 | { | |
6919 | enum rtx_code code = GET_CODE (x); | |
6920 | char *fmt = GET_RTX_FORMAT (code); | |
6921 | int qty; | |
6922 | int i; | |
6923 | ||
6924 | switch (code) | |
6925 | { | |
6926 | case CONST_INT: | |
6927 | case CONST: | |
6928 | case SYMBOL_REF: | |
6929 | case LABEL_REF: | |
6930 | case CONST_DOUBLE: | |
6931 | case PC: | |
6932 | case CC0: | |
6933 | case LO_SUM: | |
6934 | return x; | |
6935 | ||
6936 | case MEM: | |
6937 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); | |
6938 | return x; | |
6939 | ||
6940 | case EXPR_LIST: | |
6941 | case INSN_LIST: | |
6942 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 6943 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 6944 | if (XEXP (x, 1)) |
906c4e36 | 6945 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
6946 | return x; |
6947 | ||
e4890d45 RS |
6948 | case SIGN_EXTEND: |
6949 | case ZERO_EXTEND: | |
6950 | { | |
6951 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
6952 | /* We don't substitute VOIDmode constants into these rtx, | |
6953 | since they would impede folding. */ | |
6954 | if (GET_MODE (new) != VOIDmode) | |
6955 | validate_change (object, &XEXP (x, 0), new, 0); | |
6956 | return x; | |
6957 | } | |
6958 | ||
7afe21cc RK |
6959 | case REG: |
6960 | i = reg_qty[REGNO (x)]; | |
6961 | ||
6962 | /* Return a constant or a constant register. */ | |
6963 | if (REGNO_QTY_VALID_P (REGNO (x)) | |
6964 | && qty_const[i] != 0 | |
6965 | && (CONSTANT_P (qty_const[i]) | |
6966 | || GET_CODE (qty_const[i]) == REG)) | |
6967 | { | |
6968 | rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]); | |
6969 | if (new) | |
6970 | return new; | |
6971 | } | |
6972 | ||
6973 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 6974 | return canon_reg (x, NULL_RTX); |
7afe21cc RK |
6975 | } |
6976 | ||
6977 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6978 | if (fmt[i] == 'e') | |
6979 | validate_change (object, &XEXP (x, i), | |
906c4e36 | 6980 | cse_process_notes (XEXP (x, i), object), NULL_RTX); |
7afe21cc RK |
6981 | |
6982 | return x; | |
6983 | } | |
6984 | \f | |
6985 | /* Find common subexpressions between the end test of a loop and the beginning | |
6986 | of the loop. LOOP_START is the CODE_LABEL at the start of a loop. | |
6987 | ||
6988 | Often we have a loop where an expression in the exit test is used | |
6989 | in the body of the loop. For example "while (*p) *q++ = *p++;". | |
6990 | Because of the way we duplicate the loop exit test in front of the loop, | |
6991 | however, we don't detect that common subexpression. This will be caught | |
6992 | when global cse is implemented, but this is a quite common case. | |
6993 | ||
6994 | This function handles the most common cases of these common expressions. | |
6995 | It is called after we have processed the basic block ending with the | |
6996 | NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN | |
6997 | jumps to a label used only once. */ | |
6998 | ||
6999 | static void | |
7000 | cse_around_loop (loop_start) | |
7001 | rtx loop_start; | |
7002 | { | |
7003 | rtx insn; | |
7004 | int i; | |
7005 | struct table_elt *p; | |
7006 | ||
7007 | /* If the jump at the end of the loop doesn't go to the start, we don't | |
7008 | do anything. */ | |
7009 | for (insn = PREV_INSN (loop_start); | |
7010 | insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); | |
7011 | insn = PREV_INSN (insn)) | |
7012 | ; | |
7013 | ||
7014 | if (insn == 0 | |
7015 | || GET_CODE (insn) != NOTE | |
7016 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) | |
7017 | return; | |
7018 | ||
7019 | /* If the last insn of the loop (the end test) was an NE comparison, | |
7020 | we will interpret it as an EQ comparison, since we fell through | |
f72aed24 | 7021 | the loop. Any equivalences resulting from that comparison are |
7afe21cc RK |
7022 | therefore not valid and must be invalidated. */ |
7023 | if (last_jump_equiv_class) | |
7024 | for (p = last_jump_equiv_class->first_same_value; p; | |
7025 | p = p->next_same_value) | |
7026 | if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG | |
7027 | || GET_CODE (p->exp) == SUBREG) | |
7028 | invalidate (p->exp); | |
7029 | ||
7030 | /* Process insns starting after LOOP_START until we hit a CALL_INSN or | |
7031 | a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). | |
7032 | ||
7033 | The only thing we do with SET_DEST is invalidate entries, so we | |
7034 | can safely process each SET in order. It is slightly less efficient | |
7035 | to do so, but we only want to handle the most common cases. */ | |
7036 | ||
7037 | for (insn = NEXT_INSN (loop_start); | |
7038 | GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL | |
7039 | && ! (GET_CODE (insn) == NOTE | |
7040 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); | |
7041 | insn = NEXT_INSN (insn)) | |
7042 | { | |
7043 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
7044 | && (GET_CODE (PATTERN (insn)) == SET | |
7045 | || GET_CODE (PATTERN (insn)) == CLOBBER)) | |
7046 | cse_set_around_loop (PATTERN (insn), insn, loop_start); | |
7047 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
7048 | && GET_CODE (PATTERN (insn)) == PARALLEL) | |
7049 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7050 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET | |
7051 | || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
7052 | cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, | |
7053 | loop_start); | |
7054 | } | |
7055 | } | |
7056 | \f | |
8b3686ed RK |
7057 | /* Variable used for communications between the next two routines. */ |
7058 | ||
7059 | static struct write_data skipped_writes_memory; | |
7060 | ||
7061 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs | |
7062 | since they are done elsewhere. This function is called via note_stores. */ | |
7063 | ||
7064 | static void | |
7065 | invalidate_skipped_set (dest, set) | |
7066 | rtx set; | |
7067 | rtx dest; | |
7068 | { | |
7069 | if (GET_CODE (set) == CLOBBER | |
7070 | #ifdef HAVE_cc0 | |
7071 | || dest == cc0_rtx | |
7072 | #endif | |
7073 | || dest == pc_rtx) | |
7074 | return; | |
7075 | ||
7076 | if (GET_CODE (dest) == MEM) | |
7077 | note_mem_written (dest, &skipped_writes_memory); | |
7078 | ||
7079 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
7080 | || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest))) | |
7081 | invalidate (dest); | |
7082 | } | |
7083 | ||
7084 | /* Invalidate all insns from START up to the end of the function or the | |
7085 | next label. This called when we wish to CSE around a block that is | |
7086 | conditionally executed. */ | |
7087 | ||
7088 | static void | |
7089 | invalidate_skipped_block (start) | |
7090 | rtx start; | |
7091 | { | |
7092 | rtx insn; | |
7093 | int i; | |
7094 | static struct write_data init = {0, 0, 0, 0}; | |
7095 | static struct write_data everything = {0, 1, 1, 1}; | |
7096 | ||
7097 | for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; | |
7098 | insn = NEXT_INSN (insn)) | |
7099 | { | |
7100 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
7101 | continue; | |
7102 | ||
7103 | skipped_writes_memory = init; | |
7104 | ||
7105 | if (GET_CODE (insn) == CALL_INSN) | |
7106 | { | |
7107 | invalidate_for_call (); | |
7108 | skipped_writes_memory = everything; | |
7109 | } | |
7110 | ||
7111 | note_stores (PATTERN (insn), invalidate_skipped_set); | |
7112 | invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn)); | |
7113 | } | |
7114 | } | |
7115 | \f | |
7afe21cc RK |
7116 | /* Used for communication between the following two routines; contains a |
7117 | value to be checked for modification. */ | |
7118 | ||
7119 | static rtx cse_check_loop_start_value; | |
7120 | ||
7121 | /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE, | |
7122 | indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */ | |
7123 | ||
7124 | static void | |
7125 | cse_check_loop_start (x, set) | |
7126 | rtx x; | |
7127 | rtx set; | |
7128 | { | |
7129 | if (cse_check_loop_start_value == 0 | |
7130 | || GET_CODE (x) == CC0 || GET_CODE (x) == PC) | |
7131 | return; | |
7132 | ||
7133 | if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM) | |
7134 | || reg_overlap_mentioned_p (x, cse_check_loop_start_value)) | |
7135 | cse_check_loop_start_value = 0; | |
7136 | } | |
7137 | ||
7138 | /* X is a SET or CLOBBER contained in INSN that was found near the start of | |
7139 | a loop that starts with the label at LOOP_START. | |
7140 | ||
7141 | If X is a SET, we see if its SET_SRC is currently in our hash table. | |
7142 | If so, we see if it has a value equal to some register used only in the | |
7143 | loop exit code (as marked by jump.c). | |
7144 | ||
7145 | If those two conditions are true, we search backwards from the start of | |
7146 | the loop to see if that same value was loaded into a register that still | |
7147 | retains its value at the start of the loop. | |
7148 | ||
7149 | If so, we insert an insn after the load to copy the destination of that | |
7150 | load into the equivalent register and (try to) replace our SET_SRC with that | |
7151 | register. | |
7152 | ||
7153 | In any event, we invalidate whatever this SET or CLOBBER modifies. */ | |
7154 | ||
7155 | static void | |
7156 | cse_set_around_loop (x, insn, loop_start) | |
7157 | rtx x; | |
7158 | rtx insn; | |
7159 | rtx loop_start; | |
7160 | { | |
7161 | rtx p; | |
7162 | struct table_elt *src_elt; | |
7163 | static struct write_data init = {0, 0, 0, 0}; | |
7164 | struct write_data writes_memory; | |
7165 | ||
7166 | writes_memory = init; | |
7167 | ||
7168 | /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that | |
7169 | are setting PC or CC0 or whose SET_SRC is already a register. */ | |
7170 | if (GET_CODE (x) == SET | |
7171 | && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 | |
7172 | && GET_CODE (SET_SRC (x)) != REG) | |
7173 | { | |
7174 | src_elt = lookup (SET_SRC (x), | |
7175 | HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), | |
7176 | GET_MODE (SET_DEST (x))); | |
7177 | ||
7178 | if (src_elt) | |
7179 | for (src_elt = src_elt->first_same_value; src_elt; | |
7180 | src_elt = src_elt->next_same_value) | |
7181 | if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) | |
7182 | && COST (src_elt->exp) < COST (SET_SRC (x))) | |
7183 | { | |
7184 | rtx p, set; | |
7185 | ||
7186 | /* Look for an insn in front of LOOP_START that sets | |
7187 | something in the desired mode to SET_SRC (x) before we hit | |
7188 | a label or CALL_INSN. */ | |
7189 | ||
7190 | for (p = prev_nonnote_insn (loop_start); | |
7191 | p && GET_CODE (p) != CALL_INSN | |
7192 | && GET_CODE (p) != CODE_LABEL; | |
7193 | p = prev_nonnote_insn (p)) | |
7194 | if ((set = single_set (p)) != 0 | |
7195 | && GET_CODE (SET_DEST (set)) == REG | |
7196 | && GET_MODE (SET_DEST (set)) == src_elt->mode | |
7197 | && rtx_equal_p (SET_SRC (set), SET_SRC (x))) | |
7198 | { | |
7199 | /* We now have to ensure that nothing between P | |
7200 | and LOOP_START modified anything referenced in | |
7201 | SET_SRC (x). We know that nothing within the loop | |
7202 | can modify it, or we would have invalidated it in | |
7203 | the hash table. */ | |
7204 | rtx q; | |
7205 | ||
7206 | cse_check_loop_start_value = SET_SRC (x); | |
7207 | for (q = p; q != loop_start; q = NEXT_INSN (q)) | |
7208 | if (GET_RTX_CLASS (GET_CODE (q)) == 'i') | |
7209 | note_stores (PATTERN (q), cse_check_loop_start); | |
7210 | ||
7211 | /* If nothing was changed and we can replace our | |
7212 | SET_SRC, add an insn after P to copy its destination | |
7213 | to what we will be replacing SET_SRC with. */ | |
7214 | if (cse_check_loop_start_value | |
7215 | && validate_change (insn, &SET_SRC (x), | |
7216 | src_elt->exp, 0)) | |
7217 | emit_insn_after (gen_move_insn (src_elt->exp, | |
7218 | SET_DEST (set)), | |
7219 | p); | |
7220 | break; | |
7221 | } | |
7222 | } | |
7223 | } | |
7224 | ||
7225 | /* Now invalidate anything modified by X. */ | |
7226 | note_mem_written (SET_DEST (x), &writes_memory); | |
7227 | ||
7228 | if (writes_memory.var) | |
7229 | invalidate_memory (&writes_memory); | |
7230 | ||
7231 | /* See comment on similar code in cse_insn for explanation of these tests. */ | |
7232 | if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG | |
7233 | || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all | |
7234 | && ! cse_rtx_addr_varies_p (SET_DEST (x)))) | |
7235 | invalidate (SET_DEST (x)); | |
7236 | } | |
7237 | \f | |
7238 | /* Find the end of INSN's basic block and return its range, | |
7239 | the total number of SETs in all the insns of the block, the last insn of the | |
7240 | block, and the branch path. | |
7241 | ||
7242 | The branch path indicates which branches should be followed. If a non-zero | |
7243 | path size is specified, the block should be rescanned and a different set | |
7244 | of branches will be taken. The branch path is only used if | |
8b3686ed | 7245 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. |
7afe21cc RK |
7246 | |
7247 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
7248 | used to describe the block. It is filled in with the information about | |
7249 | the current block. The incoming structure's branch path, if any, is used | |
7250 | to construct the output branch path. */ | |
7251 | ||
7252 | /* Define maximum length of a branch path. */ | |
7253 | ||
7254 | #define PATHLENGTH 20 | |
7255 | ||
7256 | struct cse_basic_block_data { | |
7257 | /* Lowest CUID value of insns in block. */ | |
7258 | int low_cuid; | |
7259 | /* Highest CUID value of insns in block. */ | |
7260 | int high_cuid; | |
7261 | /* Total number of SETs in block. */ | |
7262 | int nsets; | |
7263 | /* Last insn in the block. */ | |
7264 | rtx last; | |
7265 | /* Size of current branch path, if any. */ | |
7266 | int path_size; | |
7267 | /* Current branch path, indicating which branches will be taken. */ | |
7268 | struct branch_path { | |
7269 | /* The branch insn. */ | |
7270 | rtx branch; | |
8b3686ed RK |
7271 | /* Whether it should be taken or not. AROUND is the same as taken |
7272 | except that it is used when the destination label is not preceded | |
7273 | by a BARRIER. */ | |
7274 | enum taken {TAKEN, NOT_TAKEN, AROUND} status; | |
7afe21cc RK |
7275 | } path[PATHLENGTH]; |
7276 | }; | |
7277 | ||
7278 | void | |
8b3686ed | 7279 | cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) |
7afe21cc RK |
7280 | rtx insn; |
7281 | struct cse_basic_block_data *data; | |
7282 | int follow_jumps; | |
7283 | int after_loop; | |
8b3686ed | 7284 | int skip_blocks; |
7afe21cc RK |
7285 | { |
7286 | rtx p = insn, q; | |
7287 | int nsets = 0; | |
7288 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
fc3ffe83 | 7289 | rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn); |
7afe21cc RK |
7290 | int path_size = data->path_size; |
7291 | int path_entry = 0; | |
7292 | int i; | |
7293 | ||
7294 | /* Update the previous branch path, if any. If the last branch was | |
7295 | previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, | |
7296 | shorten the path by one and look at the previous branch. We know that | |
7297 | at least one branch must have been taken if PATH_SIZE is non-zero. */ | |
7298 | while (path_size > 0) | |
7299 | { | |
8b3686ed | 7300 | if (data->path[path_size - 1].status != NOT_TAKEN) |
7afe21cc RK |
7301 | { |
7302 | data->path[path_size - 1].status = NOT_TAKEN; | |
7303 | break; | |
7304 | } | |
7305 | else | |
7306 | path_size--; | |
7307 | } | |
7308 | ||
7309 | /* Scan to end of this basic block. */ | |
7310 | while (p && GET_CODE (p) != CODE_LABEL) | |
7311 | { | |
7312 | /* Don't cse out the end of a loop. This makes a difference | |
7313 | only for the unusual loops that always execute at least once; | |
7314 | all other loops have labels there so we will stop in any case. | |
7315 | Cse'ing out the end of the loop is dangerous because it | |
7316 | might cause an invariant expression inside the loop | |
7317 | to be reused after the end of the loop. This would make it | |
7318 | hard to move the expression out of the loop in loop.c, | |
7319 | especially if it is one of several equivalent expressions | |
7320 | and loop.c would like to eliminate it. | |
7321 | ||
7322 | If we are running after loop.c has finished, we can ignore | |
7323 | the NOTE_INSN_LOOP_END. */ | |
7324 | ||
7325 | if (! after_loop && GET_CODE (p) == NOTE | |
7326 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
7327 | break; | |
7328 | ||
7329 | /* Don't cse over a call to setjmp; on some machines (eg vax) | |
7330 | the regs restored by the longjmp come from | |
7331 | a later time than the setjmp. */ | |
7332 | if (GET_CODE (p) == NOTE | |
7333 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) | |
7334 | break; | |
7335 | ||
7336 | /* A PARALLEL can have lots of SETs in it, | |
7337 | especially if it is really an ASM_OPERANDS. */ | |
7338 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i' | |
7339 | && GET_CODE (PATTERN (p)) == PARALLEL) | |
7340 | nsets += XVECLEN (PATTERN (p), 0); | |
7341 | else if (GET_CODE (p) != NOTE) | |
7342 | nsets += 1; | |
7343 | ||
7344 | if (INSN_CUID (p) > high_cuid) | |
8b3686ed | 7345 | high_cuid = INSN_CUID (p); |
7afe21cc | 7346 | if (INSN_CUID (p) < low_cuid) |
8b3686ed | 7347 | low_cuid = INSN_CUID(p); |
7afe21cc RK |
7348 | |
7349 | /* See if this insn is in our branch path. If it is and we are to | |
7350 | take it, do so. */ | |
7351 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
7352 | { | |
8b3686ed | 7353 | if (data->path[path_entry].status != NOT_TAKEN) |
7afe21cc RK |
7354 | p = JUMP_LABEL (p); |
7355 | ||
7356 | /* Point to next entry in path, if any. */ | |
7357 | path_entry++; | |
7358 | } | |
7359 | ||
7360 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
7361 | was specified, we haven't reached our maximum path length, there are | |
7362 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
7363 | jump label, and the target label is preceded by a BARRIER. |
7364 | ||
7365 | Alternatively, we can follow the jump if it branches around a | |
7366 | block of code and there are no other branches into the block. | |
7367 | In this case invalidate_skipped_block will be called to invalidate any | |
7368 | registers set in the block when following the jump. */ | |
7369 | ||
7370 | else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 | |
7afe21cc RK |
7371 | && GET_CODE (p) == JUMP_INSN |
7372 | && GET_CODE (PATTERN (p)) == SET | |
7373 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE | |
7374 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 | |
7375 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
7376 | { | |
7377 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
7378 | if ((GET_CODE (q) != NOTE | |
7379 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END | |
7380 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) | |
7381 | && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) | |
7382 | break; | |
7383 | ||
7384 | /* If we ran into a BARRIER, this code is an extension of the | |
7385 | basic block when the branch is taken. */ | |
8b3686ed | 7386 | if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) |
7afe21cc RK |
7387 | { |
7388 | /* Don't allow ourself to keep walking around an | |
7389 | always-executed loop. */ | |
fc3ffe83 RK |
7390 | if (next_real_insn (q) == next) |
7391 | { | |
7392 | p = NEXT_INSN (p); | |
7393 | continue; | |
7394 | } | |
7afe21cc RK |
7395 | |
7396 | /* Similarly, don't put a branch in our path more than once. */ | |
7397 | for (i = 0; i < path_entry; i++) | |
7398 | if (data->path[i].branch == p) | |
7399 | break; | |
7400 | ||
7401 | if (i != path_entry) | |
7402 | break; | |
7403 | ||
7404 | data->path[path_entry].branch = p; | |
7405 | data->path[path_entry++].status = TAKEN; | |
7406 | ||
7407 | /* This branch now ends our path. It was possible that we | |
7408 | didn't see this branch the last time around (when the | |
7409 | insn in front of the target was a JUMP_INSN that was | |
7410 | turned into a no-op). */ | |
7411 | path_size = path_entry; | |
7412 | ||
7413 | p = JUMP_LABEL (p); | |
7414 | /* Mark block so we won't scan it again later. */ | |
7415 | PUT_MODE (NEXT_INSN (p), QImode); | |
7416 | } | |
8b3686ed RK |
7417 | /* Detect a branch around a block of code. */ |
7418 | else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) | |
7419 | { | |
7420 | register rtx tmp; | |
7421 | ||
fc3ffe83 RK |
7422 | if (next_real_insn (q) == next) |
7423 | { | |
7424 | p = NEXT_INSN (p); | |
7425 | continue; | |
7426 | } | |
8b3686ed RK |
7427 | |
7428 | for (i = 0; i < path_entry; i++) | |
7429 | if (data->path[i].branch == p) | |
7430 | break; | |
7431 | ||
7432 | if (i != path_entry) | |
7433 | break; | |
7434 | ||
7435 | /* This is no_labels_between_p (p, q) with an added check for | |
7436 | reaching the end of a function (in case Q precedes P). */ | |
7437 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
7438 | if (GET_CODE (tmp) == CODE_LABEL) | |
7439 | break; | |
7440 | ||
7441 | if (tmp == q) | |
7442 | { | |
7443 | data->path[path_entry].branch = p; | |
7444 | data->path[path_entry++].status = AROUND; | |
7445 | ||
7446 | path_size = path_entry; | |
7447 | ||
7448 | p = JUMP_LABEL (p); | |
7449 | /* Mark block so we won't scan it again later. */ | |
7450 | PUT_MODE (NEXT_INSN (p), QImode); | |
7451 | } | |
7452 | } | |
7afe21cc | 7453 | } |
7afe21cc RK |
7454 | p = NEXT_INSN (p); |
7455 | } | |
7456 | ||
7457 | data->low_cuid = low_cuid; | |
7458 | data->high_cuid = high_cuid; | |
7459 | data->nsets = nsets; | |
7460 | data->last = p; | |
7461 | ||
7462 | /* If all jumps in the path are not taken, set our path length to zero | |
7463 | so a rescan won't be done. */ | |
7464 | for (i = path_size - 1; i >= 0; i--) | |
8b3686ed | 7465 | if (data->path[i].status != NOT_TAKEN) |
7afe21cc RK |
7466 | break; |
7467 | ||
7468 | if (i == -1) | |
7469 | data->path_size = 0; | |
7470 | else | |
7471 | data->path_size = path_size; | |
7472 | ||
7473 | /* End the current branch path. */ | |
7474 | data->path[path_size].branch = 0; | |
7475 | } | |
7476 | \f | |
7477 | static rtx cse_basic_block (); | |
7478 | ||
7479 | /* Perform cse on the instructions of a function. | |
7480 | F is the first instruction. | |
7481 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
7482 | ||
7483 | AFTER_LOOP is 1 if this is the cse call done after loop optimization | |
7484 | (only if -frerun-cse-after-loop). | |
7485 | ||
7486 | Returns 1 if jump_optimize should be redone due to simplifications | |
7487 | in conditional jump instructions. */ | |
7488 | ||
7489 | int | |
7490 | cse_main (f, nregs, after_loop, file) | |
7491 | rtx f; | |
7492 | int nregs; | |
7493 | int after_loop; | |
7494 | FILE *file; | |
7495 | { | |
7496 | struct cse_basic_block_data val; | |
7497 | register rtx insn = f; | |
7498 | register int i; | |
7499 | ||
7500 | cse_jumps_altered = 0; | |
7501 | constant_pool_entries_cost = 0; | |
7502 | val.path_size = 0; | |
7503 | ||
7504 | init_recog (); | |
7505 | ||
7506 | max_reg = nregs; | |
7507 | ||
7508 | all_minus_one = (int *) alloca (nregs * sizeof (int)); | |
7509 | consec_ints = (int *) alloca (nregs * sizeof (int)); | |
7510 | ||
7511 | for (i = 0; i < nregs; i++) | |
7512 | { | |
7513 | all_minus_one[i] = -1; | |
7514 | consec_ints[i] = i; | |
7515 | } | |
7516 | ||
7517 | reg_next_eqv = (int *) alloca (nregs * sizeof (int)); | |
7518 | reg_prev_eqv = (int *) alloca (nregs * sizeof (int)); | |
7519 | reg_qty = (int *) alloca (nregs * sizeof (int)); | |
7520 | reg_in_table = (int *) alloca (nregs * sizeof (int)); | |
7521 | reg_tick = (int *) alloca (nregs * sizeof (int)); | |
7522 | ||
7523 | /* Discard all the free elements of the previous function | |
7524 | since they are allocated in the temporarily obstack. */ | |
7525 | bzero (table, sizeof table); | |
7526 | free_element_chain = 0; | |
7527 | n_elements_made = 0; | |
7528 | ||
7529 | /* Find the largest uid. */ | |
7530 | ||
7531 | i = get_max_uid (); | |
906c4e36 RK |
7532 | uid_cuid = (int *) alloca ((i + 1) * sizeof (int)); |
7533 | bzero (uid_cuid, (i + 1) * sizeof (int)); | |
7afe21cc RK |
7534 | |
7535 | /* Compute the mapping from uids to cuids. | |
7536 | CUIDs are numbers assigned to insns, like uids, | |
7537 | except that cuids increase monotonically through the code. | |
7538 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
7539 | between two insns is not affected by -g. */ | |
7540 | ||
7541 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
7542 | { | |
7543 | if (GET_CODE (insn) != NOTE | |
7544 | || NOTE_LINE_NUMBER (insn) < 0) | |
7545 | INSN_CUID (insn) = ++i; | |
7546 | else | |
7547 | /* Give a line number note the same cuid as preceding insn. */ | |
7548 | INSN_CUID (insn) = i; | |
7549 | } | |
7550 | ||
7551 | /* Initialize which registers are clobbered by calls. */ | |
7552 | ||
7553 | CLEAR_HARD_REG_SET (regs_invalidated_by_call); | |
7554 | ||
7555 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
7556 | if ((call_used_regs[i] | |
7557 | /* Used to check !fixed_regs[i] here, but that isn't safe; | |
7558 | fixed regs are still call-clobbered, and sched can get | |
7559 | confused if they can "live across calls". | |
7560 | ||
7561 | The frame pointer is always preserved across calls. The arg | |
7562 | pointer is if it is fixed. The stack pointer usually is, unless | |
7563 | RETURN_POPS_ARGS, in which case an explicit CLOBBER | |
7564 | will be present. If we are generating PIC code, the PIC offset | |
7565 | table register is preserved across calls. */ | |
7566 | ||
7567 | && i != STACK_POINTER_REGNUM | |
7568 | && i != FRAME_POINTER_REGNUM | |
7569 | #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
7570 | && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) | |
7571 | #endif | |
7572 | #ifdef PIC_OFFSET_TABLE_REGNUM | |
7573 | && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) | |
7574 | #endif | |
7575 | ) | |
7576 | || global_regs[i]) | |
7577 | SET_HARD_REG_BIT (regs_invalidated_by_call, i); | |
7578 | ||
7579 | /* Loop over basic blocks. | |
7580 | Compute the maximum number of qty's needed for each basic block | |
7581 | (which is 2 for each SET). */ | |
7582 | insn = f; | |
7583 | while (insn) | |
7584 | { | |
8b3686ed RK |
7585 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, |
7586 | flag_cse_skip_blocks); | |
7afe21cc RK |
7587 | |
7588 | /* If this basic block was already processed or has no sets, skip it. */ | |
7589 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
7590 | { | |
7591 | PUT_MODE (insn, VOIDmode); | |
7592 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
7593 | val.path_size = 0; | |
7594 | continue; | |
7595 | } | |
7596 | ||
7597 | cse_basic_block_start = val.low_cuid; | |
7598 | cse_basic_block_end = val.high_cuid; | |
7599 | max_qty = val.nsets * 2; | |
7600 | ||
7601 | if (file) | |
7602 | fprintf (file, ";; Processing block from %d to %d, %d sets.\n", | |
7603 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, | |
7604 | val.nsets); | |
7605 | ||
7606 | /* Make MAX_QTY bigger to give us room to optimize | |
7607 | past the end of this basic block, if that should prove useful. */ | |
7608 | if (max_qty < 500) | |
7609 | max_qty = 500; | |
7610 | ||
7611 | max_qty += max_reg; | |
7612 | ||
7613 | /* If this basic block is being extended by following certain jumps, | |
7614 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
7615 | Otherwise, we start after this basic block. */ | |
7616 | if (val.path_size > 0) | |
7617 | cse_basic_block (insn, val.last, val.path, 0); | |
7618 | else | |
7619 | { | |
7620 | int old_cse_jumps_altered = cse_jumps_altered; | |
7621 | rtx temp; | |
7622 | ||
7623 | /* When cse changes a conditional jump to an unconditional | |
7624 | jump, we want to reprocess the block, since it will give | |
7625 | us a new branch path to investigate. */ | |
7626 | cse_jumps_altered = 0; | |
7627 | temp = cse_basic_block (insn, val.last, val.path, ! after_loop); | |
8b3686ed RK |
7628 | if (cse_jumps_altered == 0 |
7629 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
7630 | insn = temp; |
7631 | ||
7632 | cse_jumps_altered |= old_cse_jumps_altered; | |
7633 | } | |
7634 | ||
7635 | #ifdef USE_C_ALLOCA | |
7636 | alloca (0); | |
7637 | #endif | |
7638 | } | |
7639 | ||
7640 | /* Tell refers_to_mem_p that qty_const info is not available. */ | |
7641 | qty_const = 0; | |
7642 | ||
7643 | if (max_elements_made < n_elements_made) | |
7644 | max_elements_made = n_elements_made; | |
7645 | ||
7646 | return cse_jumps_altered; | |
7647 | } | |
7648 | ||
7649 | /* Process a single basic block. FROM and TO and the limits of the basic | |
7650 | block. NEXT_BRANCH points to the branch path when following jumps or | |
7651 | a null path when not following jumps. | |
7652 | ||
7653 | AROUND_LOOP is non-zero if we are to try to cse around to the start of a | |
7654 | loop. This is true when we are being called for the last time on a | |
7655 | block and this CSE pass is before loop.c. */ | |
7656 | ||
7657 | static rtx | |
7658 | cse_basic_block (from, to, next_branch, around_loop) | |
7659 | register rtx from, to; | |
7660 | struct branch_path *next_branch; | |
7661 | int around_loop; | |
7662 | { | |
7663 | register rtx insn; | |
7664 | int to_usage = 0; | |
7665 | int in_libcall_block = 0; | |
7666 | ||
7667 | /* Each of these arrays is undefined before max_reg, so only allocate | |
7668 | the space actually needed and adjust the start below. */ | |
7669 | ||
7670 | qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
7671 | qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
7672 | qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode)); | |
7673 | qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
7674 | qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
7675 | qty_comparison_code | |
7676 | = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code)); | |
7677 | qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
7678 | qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
7679 | ||
7680 | qty_first_reg -= max_reg; | |
7681 | qty_last_reg -= max_reg; | |
7682 | qty_mode -= max_reg; | |
7683 | qty_const -= max_reg; | |
7684 | qty_const_insn -= max_reg; | |
7685 | qty_comparison_code -= max_reg; | |
7686 | qty_comparison_qty -= max_reg; | |
7687 | qty_comparison_const -= max_reg; | |
7688 | ||
7689 | new_basic_block (); | |
7690 | ||
7691 | /* TO might be a label. If so, protect it from being deleted. */ | |
7692 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
7693 | ++LABEL_NUSES (to); | |
7694 | ||
7695 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
7696 | { | |
7697 | register enum rtx_code code; | |
7698 | ||
7699 | /* See if this is a branch that is part of the path. If so, and it is | |
7700 | to be taken, do so. */ | |
7701 | if (next_branch->branch == insn) | |
7702 | { | |
8b3686ed RK |
7703 | enum taken status = next_branch++->status; |
7704 | if (status != NOT_TAKEN) | |
7afe21cc | 7705 | { |
8b3686ed RK |
7706 | if (status == TAKEN) |
7707 | record_jump_equiv (insn, 1); | |
7708 | else | |
7709 | invalidate_skipped_block (NEXT_INSN (insn)); | |
7710 | ||
7afe21cc RK |
7711 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
7712 | Then follow this branch. */ | |
7713 | #ifdef HAVE_cc0 | |
7714 | prev_insn_cc0 = 0; | |
7715 | #endif | |
7716 | prev_insn = insn; | |
7717 | insn = JUMP_LABEL (insn); | |
7718 | continue; | |
7719 | } | |
7720 | } | |
7721 | ||
7722 | code = GET_CODE (insn); | |
7723 | if (GET_MODE (insn) == QImode) | |
7724 | PUT_MODE (insn, VOIDmode); | |
7725 | ||
7726 | if (GET_RTX_CLASS (code) == 'i') | |
7727 | { | |
7728 | /* Process notes first so we have all notes in canonical forms when | |
7729 | looking for duplicate operations. */ | |
7730 | ||
7731 | if (REG_NOTES (insn)) | |
906c4e36 | 7732 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
7733 | |
7734 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
7735 | we do not want to record destinations. The last insn of a | |
7736 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 7737 | its destination is the result of the block and hence should be |
7afe21cc RK |
7738 | recorded. */ |
7739 | ||
906c4e36 | 7740 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
7afe21cc | 7741 | in_libcall_block = 1; |
906c4e36 | 7742 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
7afe21cc RK |
7743 | in_libcall_block = 0; |
7744 | ||
7745 | cse_insn (insn, in_libcall_block); | |
7746 | } | |
7747 | ||
7748 | /* If INSN is now an unconditional jump, skip to the end of our | |
7749 | basic block by pretending that we just did the last insn in the | |
7750 | basic block. If we are jumping to the end of our block, show | |
7751 | that we can have one usage of TO. */ | |
7752 | ||
7753 | if (simplejump_p (insn)) | |
7754 | { | |
7755 | if (to == 0) | |
7756 | return 0; | |
7757 | ||
7758 | if (JUMP_LABEL (insn) == to) | |
7759 | to_usage = 1; | |
7760 | ||
6a5293dc RS |
7761 | /* Maybe TO was deleted because the jump is unconditional. |
7762 | If so, there is nothing left in this basic block. */ | |
7763 | /* ??? Perhaps it would be smarter to set TO | |
7764 | to whatever follows this insn, | |
7765 | and pretend the basic block had always ended here. */ | |
7766 | if (INSN_DELETED_P (to)) | |
7767 | break; | |
7768 | ||
7afe21cc RK |
7769 | insn = PREV_INSN (to); |
7770 | } | |
7771 | ||
7772 | /* See if it is ok to keep on going past the label | |
7773 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 7774 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
7775 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
7776 | want to count the use in that jump. */ | |
7777 | ||
7778 | if (to != 0 && NEXT_INSN (insn) == to | |
7779 | && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) | |
7780 | { | |
7781 | struct cse_basic_block_data val; | |
7782 | ||
7783 | insn = NEXT_INSN (to); | |
7784 | ||
7785 | if (LABEL_NUSES (to) == 0) | |
7786 | delete_insn (to); | |
7787 | ||
7788 | /* Find the end of the following block. Note that we won't be | |
7789 | following branches in this case. If TO was the last insn | |
7790 | in the function, we are done. Similarly, if we deleted the | |
d45cf215 | 7791 | insn after TO, it must have been because it was preceded by |
7afe21cc RK |
7792 | a BARRIER. In that case, we are done with this block because it |
7793 | has no continuation. */ | |
7794 | ||
7795 | if (insn == 0 || INSN_DELETED_P (insn)) | |
7796 | return 0; | |
7797 | ||
7798 | to_usage = 0; | |
7799 | val.path_size = 0; | |
8b3686ed | 7800 | cse_end_of_basic_block (insn, &val, 0, 0, 0); |
7afe21cc RK |
7801 | |
7802 | /* If the tables we allocated have enough space left | |
7803 | to handle all the SETs in the next basic block, | |
7804 | continue through it. Otherwise, return, | |
7805 | and that block will be scanned individually. */ | |
7806 | if (val.nsets * 2 + next_qty > max_qty) | |
7807 | break; | |
7808 | ||
7809 | cse_basic_block_start = val.low_cuid; | |
7810 | cse_basic_block_end = val.high_cuid; | |
7811 | to = val.last; | |
7812 | ||
7813 | /* Prevent TO from being deleted if it is a label. */ | |
7814 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
7815 | ++LABEL_NUSES (to); | |
7816 | ||
7817 | /* Back up so we process the first insn in the extension. */ | |
7818 | insn = PREV_INSN (insn); | |
7819 | } | |
7820 | } | |
7821 | ||
7822 | if (next_qty > max_qty) | |
7823 | abort (); | |
7824 | ||
7825 | /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and | |
7826 | the previous insn is the only insn that branches to the head of a loop, | |
7827 | we can cse into the loop. Don't do this if we changed the jump | |
7828 | structure of a loop unless we aren't going to be following jumps. */ | |
7829 | ||
8b3686ed RK |
7830 | if ((cse_jumps_altered == 0 |
7831 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
7832 | && around_loop && to != 0 |
7833 | && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END | |
7834 | && GET_CODE (PREV_INSN (to)) == JUMP_INSN | |
7835 | && JUMP_LABEL (PREV_INSN (to)) != 0 | |
7836 | && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) | |
7837 | cse_around_loop (JUMP_LABEL (PREV_INSN (to))); | |
7838 | ||
7839 | return to ? NEXT_INSN (to) : 0; | |
7840 | } | |
7841 | \f | |
7842 | /* Count the number of times registers are used (not set) in X. | |
7843 | COUNTS is an array in which we accumulate the count, INCR is how much | |
7844 | we count each register usage. */ | |
7845 | ||
7846 | static void | |
7847 | count_reg_usage (x, counts, incr) | |
7848 | rtx x; | |
7849 | int *counts; | |
7850 | int incr; | |
7851 | { | |
7852 | enum rtx_code code = GET_CODE (x); | |
7853 | char *fmt; | |
7854 | int i, j; | |
7855 | ||
7856 | switch (code) | |
7857 | { | |
7858 | case REG: | |
7859 | counts[REGNO (x)] += incr; | |
7860 | return; | |
7861 | ||
7862 | case PC: | |
7863 | case CC0: | |
7864 | case CONST: | |
7865 | case CONST_INT: | |
7866 | case CONST_DOUBLE: | |
7867 | case SYMBOL_REF: | |
7868 | case LABEL_REF: | |
7869 | case CLOBBER: | |
7870 | return; | |
7871 | ||
7872 | case SET: | |
7873 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
7874 | if (GET_CODE (SET_DEST (x)) != REG) | |
7875 | count_reg_usage (SET_DEST (x), counts, incr); | |
7876 | count_reg_usage (SET_SRC (x), counts, incr); | |
7877 | return; | |
7878 | ||
7879 | case INSN: | |
7880 | case JUMP_INSN: | |
7881 | case CALL_INSN: | |
7882 | count_reg_usage (PATTERN (x), counts, incr); | |
7883 | ||
7884 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
7885 | use them. */ | |
7886 | ||
7887 | if (REG_NOTES (x)) | |
7888 | count_reg_usage (REG_NOTES (x), counts, incr); | |
7889 | return; | |
7890 | ||
7891 | case EXPR_LIST: | |
7892 | case INSN_LIST: | |
7893 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
7894 | count_reg_usage (XEXP (x, 0), counts, incr); | |
7895 | if (XEXP (x, 1)) | |
7896 | count_reg_usage (XEXP (x, 1), counts, incr); | |
7897 | return; | |
7898 | } | |
7899 | ||
7900 | fmt = GET_RTX_FORMAT (code); | |
7901 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7902 | { | |
7903 | if (fmt[i] == 'e') | |
7904 | count_reg_usage (XEXP (x, i), counts, incr); | |
7905 | else if (fmt[i] == 'E') | |
7906 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
7907 | count_reg_usage (XVECEXP (x, i, j), counts, incr); | |
7908 | } | |
7909 | } | |
7910 | \f | |
7911 | /* Scan all the insns and delete any that are dead; i.e., they store a register | |
7912 | that is never used or they copy a register to itself. | |
7913 | ||
7914 | This is used to remove insns made obviously dead by cse. It improves the | |
7915 | heuristics in loop since it won't try to move dead invariants out of loops | |
7916 | or make givs for dead quantities. The remaining passes of the compilation | |
7917 | are also sped up. */ | |
7918 | ||
7919 | void | |
7920 | delete_dead_from_cse (insns, nreg) | |
7921 | rtx insns; | |
7922 | int nreg; | |
7923 | { | |
7924 | int *counts = (int *) alloca (nreg * sizeof (int)); | |
77fa0940 | 7925 | rtx insn, prev; |
d45cf215 | 7926 | rtx tem; |
7afe21cc | 7927 | int i; |
e4890d45 | 7928 | int in_libcall = 0; |
7afe21cc RK |
7929 | |
7930 | /* First count the number of times each register is used. */ | |
7931 | bzero (counts, sizeof (int) * nreg); | |
7932 | for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) | |
7933 | count_reg_usage (insn, counts, 1); | |
7934 | ||
7935 | /* Go from the last insn to the first and delete insns that only set unused | |
7936 | registers or copy a register to itself. As we delete an insn, remove | |
7937 | usage counts for registers it uses. */ | |
77fa0940 | 7938 | for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev) |
7afe21cc RK |
7939 | { |
7940 | int live_insn = 0; | |
7941 | ||
77fa0940 RK |
7942 | prev = prev_real_insn (insn); |
7943 | ||
e4890d45 | 7944 | /* Don't delete any insns that are part of a libcall block. |
77fa0940 RK |
7945 | Flow or loop might get confused if we did that. Remember |
7946 | that we are scanning backwards. */ | |
906c4e36 | 7947 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
e4890d45 RS |
7948 | in_libcall = 1; |
7949 | ||
7950 | if (in_libcall) | |
7951 | live_insn = 1; | |
7952 | else if (GET_CODE (PATTERN (insn)) == SET) | |
7afe21cc RK |
7953 | { |
7954 | if (GET_CODE (SET_DEST (PATTERN (insn))) == REG | |
7955 | && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn))) | |
7956 | ; | |
7957 | ||
d45cf215 RS |
7958 | #ifdef HAVE_cc0 |
7959 | else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 | |
7960 | && ! side_effects_p (SET_SRC (PATTERN (insn))) | |
7961 | && ((tem = next_nonnote_insn (insn)) == 0 | |
7962 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
7963 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
7964 | ; | |
7965 | #endif | |
7afe21cc RK |
7966 | else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG |
7967 | || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER | |
7968 | || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 | |
7969 | || side_effects_p (SET_SRC (PATTERN (insn)))) | |
7970 | live_insn = 1; | |
7971 | } | |
7972 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
7973 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7974 | { | |
7975 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
7976 | ||
7977 | if (GET_CODE (elt) == SET) | |
7978 | { | |
7979 | if (GET_CODE (SET_DEST (elt)) == REG | |
7980 | && SET_DEST (elt) == SET_SRC (elt)) | |
7981 | ; | |
7982 | ||
d45cf215 RS |
7983 | #ifdef HAVE_cc0 |
7984 | else if (GET_CODE (SET_DEST (elt)) == CC0 | |
7985 | && ! side_effects_p (SET_SRC (elt)) | |
7986 | && ((tem = next_nonnote_insn (insn)) == 0 | |
7987 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
7988 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
7989 | ; | |
7990 | #endif | |
7afe21cc RK |
7991 | else if (GET_CODE (SET_DEST (elt)) != REG |
7992 | || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER | |
7993 | || counts[REGNO (SET_DEST (elt))] != 0 | |
7994 | || side_effects_p (SET_SRC (elt))) | |
7995 | live_insn = 1; | |
7996 | } | |
7997 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
7998 | live_insn = 1; | |
7999 | } | |
8000 | else | |
8001 | live_insn = 1; | |
8002 | ||
8003 | /* If this is a dead insn, delete it and show registers in it aren't | |
e4890d45 | 8004 | being used. */ |
7afe21cc | 8005 | |
e4890d45 | 8006 | if (! live_insn) |
7afe21cc RK |
8007 | { |
8008 | count_reg_usage (insn, counts, -1); | |
77fa0940 | 8009 | delete_insn (insn); |
7afe21cc | 8010 | } |
e4890d45 | 8011 | |
906c4e36 | 8012 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
e4890d45 | 8013 | in_libcall = 0; |
7afe21cc RK |
8014 | } |
8015 | } |