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c6243b4c | 1 | /* Xstormy16 cpu description. |
7e43c821 | 2 | Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
4b58290f GK |
3 | Free Software Foundation, Inc. |
4 | Contributed by Red Hat, Inc. | |
5 | ||
595cac16 | 6 | This file is part of GCC. |
4b58290f | 7 | |
595cac16 | 8 | GCC is free software; you can redistribute it and/or modify |
4b58290f GK |
9 | it under the terms of the GNU General Public License as published by |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
595cac16 | 13 | GCC is distributed in the hope that it will be useful, |
4b58290f GK |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
595cac16 | 19 | along with GCC; see the file COPYING. If not, write to |
4b58290f GK |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
4b58290f GK |
23 | \f |
24 | /* Driver configuration */ | |
25 | ||
d1552d7b | 26 | /* Defined in svr4.h. */ |
4b58290f | 27 | #undef ASM_SPEC |
322fe6e1 | 28 | #define ASM_SPEC "" |
4b58290f | 29 | |
d1552d7b | 30 | /* For xstormy16: |
3eaaf577 GK |
31 | - If -msim is specified, everything is built and linked as for the sim. |
32 | - If -T is specified, that linker script is used, and it should provide | |
33 | appropriate libraries. | |
34 | - If neither is specified, everything is built as for the sim, but no | |
35 | I/O support is assumed. | |
36 | ||
37 | */ | |
4b58290f | 38 | #undef LIB_SPEC |
3eaaf577 | 39 | #define LIB_SPEC "-( -lc %{msim:-lsim}%{!msim:%{!T*:-lnosys}} -)" |
4b58290f | 40 | |
d1552d7b | 41 | /* Defined in svr4.h. */ |
4b58290f GK |
42 | #undef STARTFILE_SPEC |
43 | #define STARTFILE_SPEC "crt0.o%s crti.o%s crtbegin.o%s" | |
44 | ||
d1552d7b | 45 | /* Defined in svr4.h. */ |
4b58290f GK |
46 | #undef ENDFILE_SPEC |
47 | #define ENDFILE_SPEC "crtend.o%s crtn.o%s" | |
48 | ||
d1552d7b | 49 | /* Defined in svr4.h for host compilers. */ |
4b58290f GK |
50 | /* #define MD_EXEC_PREFIX "" */ |
51 | ||
d1552d7b | 52 | /* Defined in svr4.h for host compilers. */ |
4b58290f GK |
53 | /* #define MD_STARTFILE_PREFIX "" */ |
54 | ||
4b58290f GK |
55 | \f |
56 | /* Run-time target specifications */ | |
57 | ||
4555be98 NB |
58 | #define TARGET_CPU_CPP_BUILTINS() do { \ |
59 | builtin_define_std ("xstormy16"); \ | |
60 | builtin_assert ("machine=xstormy16"); \ | |
61 | } while (0) | |
4b58290f GK |
62 | |
63 | /* This declaration should be present. */ | |
64 | extern int target_flags; | |
65 | ||
4b58290f GK |
66 | #define TARGET_SWITCHES \ |
67 | {{ "sim", 0, "Provide libraries for the simulator" }, \ | |
68 | { "", 0, "" }} | |
69 | ||
c6243b4c | 70 | #define TARGET_VERSION fprintf (stderr, " (xstormy16 cpu core)"); |
4b58290f | 71 | |
4b58290f GK |
72 | #define CAN_DEBUG_WITHOUT_FP |
73 | ||
74 | \f | |
75 | /* Storage Layout */ | |
76 | ||
4b58290f GK |
77 | #define BITS_BIG_ENDIAN 1 |
78 | ||
4b58290f GK |
79 | #define BYTES_BIG_ENDIAN 0 |
80 | ||
4b58290f GK |
81 | #define WORDS_BIG_ENDIAN 0 |
82 | ||
4b58290f GK |
83 | #define UNITS_PER_WORD 2 |
84 | ||
4b58290f GK |
85 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ |
86 | do { \ | |
87 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
88 | && GET_MODE_SIZE (MODE) < 2) \ | |
89 | (MODE) = HImode; \ | |
90 | } while (0) | |
91 | ||
4b58290f GK |
92 | #define PARM_BOUNDARY 16 |
93 | ||
4b58290f GK |
94 | #define STACK_BOUNDARY 16 |
95 | ||
4b58290f GK |
96 | #define FUNCTION_BOUNDARY 16 |
97 | ||
4b58290f GK |
98 | #define BIGGEST_ALIGNMENT 16 |
99 | ||
d1552d7b | 100 | /* Defined in svr4.h. */ |
4b58290f GK |
101 | /* #define MAX_OFILE_ALIGNMENT */ |
102 | ||
4b58290f GK |
103 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ |
104 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
105 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
106 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
107 | ||
4b58290f GK |
108 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ |
109 | (TREE_CODE (EXP) == STRING_CST \ | |
110 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
111 | ||
4b58290f GK |
112 | #define STRICT_ALIGNMENT 1 |
113 | ||
d1552d7b | 114 | /* Defined in svr4.h. */ |
4b58290f | 115 | #define PCC_BITFIELD_TYPE_MATTERS 1 |
4b58290f GK |
116 | \f |
117 | /* Layout of Source Language Data Types */ | |
118 | ||
4b58290f GK |
119 | #define INT_TYPE_SIZE 16 |
120 | ||
4b58290f GK |
121 | #define SHORT_TYPE_SIZE 16 |
122 | ||
4b58290f GK |
123 | #define LONG_TYPE_SIZE 32 |
124 | ||
4b58290f GK |
125 | #define LONG_LONG_TYPE_SIZE 64 |
126 | ||
4b58290f GK |
127 | #define FLOAT_TYPE_SIZE 32 |
128 | ||
4b58290f GK |
129 | #define DOUBLE_TYPE_SIZE 64 |
130 | ||
4b58290f GK |
131 | #define LONG_DOUBLE_TYPE_SIZE 64 |
132 | ||
4b58290f GK |
133 | #define DEFAULT_SIGNED_CHAR 0 |
134 | ||
d1552d7b | 135 | /* Defined in svr4.h. */ |
4b58290f GK |
136 | #define SIZE_TYPE "unsigned int" |
137 | ||
d1552d7b | 138 | /* Defined in svr4.h. */ |
4b58290f GK |
139 | #define PTRDIFF_TYPE "int" |
140 | ||
d1552d7b | 141 | /* Defined in svr4.h, to "long int". */ |
4b58290f GK |
142 | /* #define WCHAR_TYPE "long int" */ |
143 | ||
d1552d7b | 144 | /* Defined in svr4.h. */ |
4b58290f GK |
145 | #undef WCHAR_TYPE_SIZE |
146 | #define WCHAR_TYPE_SIZE 32 | |
147 | ||
43a88a8c | 148 | /* Define this macro if the type of Objective-C selectors should be `int'. |
4b58290f GK |
149 | |
150 | If this macro is not defined, then selectors should have the type `struct | |
151 | objc_selector *'. */ | |
152 | /* #define OBJC_INT_SELECTORS */ | |
153 | ||
4b58290f GK |
154 | \f |
155 | /* Register Basics */ | |
156 | ||
4b58290f GK |
157 | #define FIRST_PSEUDO_REGISTER 19 |
158 | ||
4b58290f GK |
159 | #define FIXED_REGISTERS \ |
160 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1 } | |
161 | ||
4b58290f GK |
162 | #define CALL_USED_REGISTERS \ |
163 | { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1 } | |
164 | ||
4b58290f GK |
165 | \f |
166 | /* Order of allocation of registers */ | |
167 | ||
da6e254e | 168 | #define REG_ALLOC_ORDER { 7, 6, 5, 4, 3, 2, 1, 0, 9, 8, 10, 11, 12, 13, 14, 15, 16 } |
4b58290f | 169 | |
4b58290f GK |
170 | \f |
171 | /* How Values Fit in Registers */ | |
172 | ||
4b58290f GK |
173 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
174 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
175 | ||
4b58290f GK |
176 | #define HARD_REGNO_MODE_OK(REGNO, MODE) ((REGNO) != 16 || (MODE) == BImode) |
177 | ||
178 | /* A C expression that is nonzero if it is desirable to choose register | |
179 | allocation so as to avoid move instructions between a value of mode MODE1 | |
180 | and a value of mode MODE2. | |
181 | ||
182 | If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are | |
183 | ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be | |
184 | zero. */ | |
185 | #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) != BImode && (MODE2) != BImode) | |
186 | ||
4b58290f GK |
187 | \f |
188 | /* Register Classes */ | |
189 | ||
4b58290f GK |
190 | enum reg_class |
191 | { | |
192 | NO_REGS, | |
193 | R0_REGS, | |
194 | R1_REGS, | |
195 | TWO_REGS, | |
196 | R2_REGS, | |
197 | EIGHT_REGS, | |
198 | R8_REGS, | |
da6e254e | 199 | ICALL_REGS, |
4b58290f GK |
200 | GENERAL_REGS, |
201 | CARRY_REGS, | |
202 | ALL_REGS, | |
203 | LIM_REG_CLASSES | |
204 | }; | |
205 | ||
4b58290f GK |
206 | #define N_REG_CLASSES ((int) LIM_REG_CLASSES) |
207 | ||
4b58290f GK |
208 | #define REG_CLASS_NAMES \ |
209 | { \ | |
210 | "NO_REGS", \ | |
211 | "R0_REGS", \ | |
212 | "R1_REGS", \ | |
213 | "TWO_REGS", \ | |
214 | "R2_REGS", \ | |
215 | "EIGHT_REGS", \ | |
216 | "R8_REGS", \ | |
da6e254e | 217 | "ICALL_REGS", \ |
4b58290f GK |
218 | "GENERAL_REGS", \ |
219 | "CARRY_REGS", \ | |
220 | "ALL_REGS" \ | |
221 | } | |
222 | ||
4b58290f GK |
223 | #define REG_CLASS_CONTENTS \ |
224 | { \ | |
b3656137 KG |
225 | { 0x00000 }, \ |
226 | { 0x00001 }, \ | |
227 | { 0x00002 }, \ | |
228 | { 0x00003 }, \ | |
229 | { 0x00004 }, \ | |
230 | { 0x000FF }, \ | |
231 | { 0x00100 }, \ | |
232 | { 0x00300 }, \ | |
233 | { 0x6FFFF }, \ | |
234 | { 0x10000 }, \ | |
235 | { (1 << FIRST_PSEUDO_REGISTER) - 1 } \ | |
4b58290f GK |
236 | } |
237 | ||
4b58290f GK |
238 | #define REGNO_REG_CLASS(REGNO) \ |
239 | ((REGNO) == 0 ? R0_REGS \ | |
240 | : (REGNO) == 1 ? R1_REGS \ | |
241 | : (REGNO) == 2 ? R2_REGS \ | |
242 | : (REGNO) < 8 ? EIGHT_REGS \ | |
243 | : (REGNO) == 8 ? R8_REGS \ | |
244 | : (REGNO) == 16 ? CARRY_REGS \ | |
245 | : (REGNO) <= 18 ? GENERAL_REGS \ | |
246 | : ALL_REGS) | |
247 | ||
4b58290f GK |
248 | #define BASE_REG_CLASS GENERAL_REGS |
249 | ||
4b58290f GK |
250 | #define INDEX_REG_CLASS GENERAL_REGS |
251 | ||
595cac16 | 252 | /* The following letters are unavailable, due to being used as |
4b58290f GK |
253 | constraints: |
254 | '0'..'9' | |
255 | '<', '>' | |
256 | 'E', 'F', 'G', 'H' | |
257 | 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' | |
258 | 'Q', 'R', 'S', 'T', 'U' | |
259 | 'V', 'X' | |
260 | 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ | |
261 | ||
262 | #define REG_CLASS_FROM_LETTER(CHAR) \ | |
263 | ( (CHAR) == 'a' ? R0_REGS \ | |
264 | : (CHAR) == 'b' ? R1_REGS \ | |
265 | : (CHAR) == 'c' ? R2_REGS \ | |
1853547e | 266 | : (CHAR) == 'd' ? R8_REGS \ |
4b58290f | 267 | : (CHAR) == 'e' ? EIGHT_REGS \ |
1853547e | 268 | : (CHAR) == 't' ? TWO_REGS \ |
4b58290f | 269 | : (CHAR) == 'y' ? CARRY_REGS \ |
da6e254e | 270 | : (CHAR) == 'z' ? ICALL_REGS \ |
4b58290f GK |
271 | : NO_REGS) |
272 | ||
4b58290f GK |
273 | #define REGNO_OK_FOR_BASE_P(NUM) 1 |
274 | ||
4b58290f GK |
275 | #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM) |
276 | ||
595cac16 | 277 | /* This declaration must be present. */ |
4b58290f | 278 | #define PREFERRED_RELOAD_CLASS(X, CLASS) \ |
c6243b4c | 279 | xstormy16_preferred_reload_class (X, CLASS) |
4b58290f | 280 | |
4b58290f | 281 | #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \ |
c6243b4c | 282 | xstormy16_preferred_reload_class (X, CLASS) |
4b58290f | 283 | |
4b58290f GK |
284 | /* This chip has the interesting property that only the first eight |
285 | registers can be moved to/from memory. */ | |
286 | #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ | |
c6243b4c | 287 | xstormy16_secondary_reload_class (CLASS, MODE, X) |
4b58290f | 288 | |
4b58290f GK |
289 | /* Normally the compiler avoids choosing registers that have been explicitly |
290 | mentioned in the rtl as spill registers (these registers are normally those | |
291 | used to pass parameters and return values). However, some machines have so | |
292 | few registers of certain classes that there would not be enough registers to | |
293 | use as spill registers if this were done. | |
294 | ||
5e7a8ee0 KH |
295 | Define `SMALL_REGISTER_CLASSES' to be an expression with a nonzero value on |
296 | these machines. When this macro has a nonzero value, the compiler allows | |
4b58290f GK |
297 | registers explicitly used in the rtl to be used as spill registers but |
298 | avoids extending the lifetime of these registers. | |
299 | ||
5e7a8ee0 | 300 | It is always safe to define this macro with a nonzero value, but if you |
4b58290f GK |
301 | unnecessarily define it, you will reduce the amount of optimizations that |
302 | can be performed in some cases. If you do not define this macro with a | |
5e7a8ee0 | 303 | nonzero value when it is required, the compiler will run out of spill |
4b58290f GK |
304 | registers and print a fatal error message. For most machines, you should |
305 | not define this macro at all. */ | |
306 | /* #define SMALL_REGISTER_CLASSES */ | |
307 | ||
595cac16 | 308 | /* This declaration is required. */ |
4b58290f GK |
309 | #define CLASS_MAX_NREGS(CLASS, MODE) \ |
310 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
311 | ||
312 | /* If defined, a C expression for a class that contains registers which the | |
313 | compiler must always access in a mode that is the same size as the mode in | |
314 | which it loaded the register. | |
315 | ||
316 | For the example, loading 32-bit integer or floating-point objects into | |
317 | floating-point registers on the Alpha extends them to 64-bits. Therefore | |
318 | loading a 64-bit object and then storing it as a 32-bit object does not | |
319 | store the low-order 32-bits, as would be the case for a normal register. | |
320 | Therefore, `alpha.h' defines this macro as `FLOAT_REGS'. */ | |
321 | /* #define CLASS_CANNOT_CHANGE_SIZE */ | |
322 | ||
4b58290f GK |
323 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ |
324 | ( (C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 3 \ | |
325 | : (C) == 'J' ? exact_log2 (VALUE) != -1 \ | |
326 | : (C) == 'K' ? exact_log2 (~(VALUE)) != -1 \ | |
327 | : (C) == 'L' ? (VALUE) >= 0 && (VALUE) <= 255 \ | |
328 | : (C) == 'M' ? (VALUE) >= -255 && (VALUE) <= 0 \ | |
329 | : (C) == 'N' ? (VALUE) >= -3 && (VALUE) <= 0 \ | |
330 | : (C) == 'O' ? (VALUE) >= 1 && (VALUE) <= 4 \ | |
331 | : (C) == 'P' ? (VALUE) >= -4 && (VALUE) <= -1 \ | |
332 | : 0 ) | |
333 | ||
4b58290f GK |
334 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0 |
335 | ||
4b58290f | 336 | #define EXTRA_CONSTRAINT(VALUE, C) \ |
c6243b4c | 337 | xstormy16_extra_constraint_p (VALUE, C) |
4b58290f GK |
338 | |
339 | \f | |
340 | /* Basic Stack Layout */ | |
341 | ||
4b58290f GK |
342 | /* We want to use post-increment instructions to push things on the stack, |
343 | because we don't have any pre-increment ones. */ | |
344 | #define STACK_PUSH_CODE POST_INC | |
345 | ||
4b58290f GK |
346 | /* #define FRAME_GROWS_DOWNWARD */ |
347 | ||
4b58290f GK |
348 | #define ARGS_GROW_DOWNWARD 1 |
349 | ||
4b58290f GK |
350 | #define STARTING_FRAME_OFFSET 0 |
351 | ||
4b58290f GK |
352 | #define FIRST_PARM_OFFSET(FUNDECL) 0 |
353 | ||
4b58290f GK |
354 | #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ |
355 | ((COUNT) == 0 \ | |
356 | ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ | |
357 | : NULL_RTX) | |
358 | ||
4b58290f GK |
359 | #define INCOMING_RETURN_ADDR_RTX \ |
360 | gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-4))) | |
361 | ||
c6243b4c | 362 | #define INCOMING_FRAME_SP_OFFSET (xstormy16_interrupt_function_p () ? 6 : 4) |
4b58290f | 363 | |
4b58290f GK |
364 | \f |
365 | /* Register That Address the Stack Frame. */ | |
366 | ||
4b58290f GK |
367 | #define STACK_POINTER_REGNUM 15 |
368 | ||
4b58290f GK |
369 | #define FRAME_POINTER_REGNUM 17 |
370 | ||
4b58290f GK |
371 | #define HARD_FRAME_POINTER_REGNUM 13 |
372 | ||
4b58290f GK |
373 | #define ARG_POINTER_REGNUM 18 |
374 | ||
e2470e1b | 375 | #define STATIC_CHAIN_REGNUM 1 |
4b58290f GK |
376 | |
377 | \f | |
378 | /* Eliminating the Frame Pointer and the Arg Pointer */ | |
379 | ||
4b58290f GK |
380 | #define FRAME_POINTER_REQUIRED 0 |
381 | ||
4b58290f GK |
382 | #define ELIMINABLE_REGS \ |
383 | { \ | |
384 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
385 | {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
386 | {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
387 | {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
388 | } | |
389 | ||
4b58290f GK |
390 | #define CAN_ELIMINATE(FROM, TO) \ |
391 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
392 | ? ! frame_pointer_needed \ | |
393 | : 1) | |
394 | ||
4b58290f | 395 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
c6243b4c | 396 | (OFFSET) = xstormy16_initial_elimination_offset (FROM, TO) |
4b58290f | 397 | |
4b58290f GK |
398 | \f |
399 | /* Passing Function Arguments on the Stack */ | |
400 | ||
4b58290f GK |
401 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) |
402 | ||
4b58290f GK |
403 | #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0 |
404 | ||
405 | \f | |
406 | /* Function Arguments in Registers */ | |
407 | ||
da6e254e | 408 | #define NUM_ARGUMENT_REGISTERS 6 |
4b58290f GK |
409 | #define FIRST_ARGUMENT_REGISTER 2 |
410 | ||
c6243b4c | 411 | #define XSTORMY16_WORD_SIZE(TYPE, MODE) \ |
4b58290f GK |
412 | ((((TYPE) ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \ |
413 | + 1) \ | |
414 | / 2) | |
415 | ||
06d22853 DD |
416 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
417 | xstormy16_function_arg (CUM, MODE, TYPE, NAMED) | |
4b58290f | 418 | |
4b58290f GK |
419 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 |
420 | ||
4b58290f GK |
421 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0 |
422 | ||
595cac16 | 423 | /* For this platform, the value of CUMULATIVE_ARGS is the number of words |
4b58290f | 424 | of arguments that have been passed in registers so far. */ |
c8f863fc | 425 | #define CUMULATIVE_ARGS int |
4b58290f | 426 | |
0f6937fe AM |
427 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
428 | (CUM) = 0 | |
4b58290f | 429 | |
4b58290f | 430 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ |
c6243b4c | 431 | ((CUM) = xstormy16_function_arg_advance (CUM, MODE, TYPE, NAMED)) |
4b58290f | 432 | |
4b58290f GK |
433 | #define FUNCTION_ARG_REGNO_P(REGNO) \ |
434 | ((REGNO) >= FIRST_ARGUMENT_REGISTER \ | |
435 | && (REGNO) < FIRST_ARGUMENT_REGISTER + NUM_ARGUMENT_REGISTERS) | |
436 | ||
437 | \f | |
438 | /* How Scalar Function Values are Returned */ | |
439 | ||
440 | /* The number of the hard register that is used to return a scalar value from a | |
441 | function call. */ | |
442 | #define RETURN_VALUE_REGNUM FIRST_ARGUMENT_REGISTER | |
443 | ||
4b58290f | 444 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
c6243b4c | 445 | xstormy16_function_value (VALTYPE, FUNC) |
4b58290f | 446 | |
4b58290f GK |
447 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM) |
448 | ||
4b58290f GK |
449 | #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM) |
450 | ||
4b58290f GK |
451 | \f |
452 | /* Function Entry and Exit */ | |
453 | ||
4b58290f | 454 | #define EPILOGUE_USES(REGNO) \ |
c6243b4c | 455 | xstormy16_epilogue_uses (REGNO) |
4b58290f | 456 | |
4b58290f GK |
457 | \f |
458 | /* Generating Code for Profiling. */ | |
459 | ||
595cac16 | 460 | /* This declaration must be present, but it can be an abort if profiling is |
4b58290f GK |
461 | not implemented. */ |
462 | ||
14b56832 | 463 | #define FUNCTION_PROFILER(FILE, LABELNO) xstormy16_function_profiler () |
4b58290f | 464 | |
4b58290f GK |
465 | \f |
466 | /* If the target has particular reasons why a function cannot be inlined, | |
467 | it may define the TARGET_CANNOT_INLINE_P. This macro takes one argument, | |
468 | the DECL describing the function. The function should NULL if the function | |
469 | *can* be inlined. Otherwise it should return a pointer to a string containing | |
470 | a message describing why the function could not be inlined. The message will | |
471 | displayed if the '-Winline' command line switch has been given. If the message | |
472 | contains a '%s' sequence, this will be replaced by the name of the function. */ | |
c6243b4c | 473 | /* #define TARGET_CANNOT_INLINE_P(FN_DECL) xstormy16_cannot_inline_p (FN_DECL) */ |
4b58290f GK |
474 | \f |
475 | /* Implementing the Varargs Macros. */ | |
476 | ||
5e7a8ee0 | 477 | /* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this |
4b58290f GK |
478 | is stdarg.h instead of varargs.h. VALIST is the tree of the va_list |
479 | variable to initialize. NEXTARG is the machine independent notion of the | |
480 | 'next' argument after the variable arguments. If not defined, a standard | |
481 | implementation will be defined that works for arguments passed on the stack. */ | |
e5faf155 ZW |
482 | #define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ |
483 | xstormy16_expand_builtin_va_start (VALIST, NEXTARG) | |
4b58290f GK |
484 | |
485 | /* Implement the stdarg/varargs va_arg macro. VALIST is the variable of type | |
486 | va_list as a tree, TYPE is the type passed to va_arg. */ | |
487 | #define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \ | |
c6243b4c | 488 | xstormy16_expand_builtin_va_arg (VALIST, TYPE) |
4b58290f GK |
489 | \f |
490 | /* Trampolines for Nested Functions. */ | |
491 | ||
4b58290f GK |
492 | #define TRAMPOLINE_SIZE 8 |
493 | ||
4b58290f GK |
494 | #define TRAMPOLINE_ALIGNMENT 16 |
495 | ||
4b58290f | 496 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \ |
c6243b4c | 497 | xstormy16_initialize_trampoline (ADDR, FNADDR, STATIC_CHAIN) |
4b58290f | 498 | |
4b58290f | 499 | \f |
4b58290f GK |
500 | /* Define this macro to override the type used by the library routines to pick |
501 | up arguments of type `float'. (By default, they use a union of `float' and | |
502 | `int'.) | |
503 | ||
504 | The obvious choice would be `float'--but that won't work with traditional C | |
505 | compilers that expect all arguments declared as `float' to arrive as | |
506 | `double'. To avoid this conversion, the library routines ask for the value | |
edf11bda | 507 | as some other type and then treat it as a `float'. */ |
4b58290f GK |
508 | /* #define FLOAT_ARG_TYPE */ |
509 | ||
510 | /* Define this macro to override the way library routines redesignate a `float' | |
511 | argument as a `float' instead of the type it was passed as. The default is | |
512 | an expression which takes the `float' field of the union. */ | |
513 | /* #define FLOATIFY(PASSED_VALUE) */ | |
514 | ||
515 | /* Define this macro to override the type used by the library routines to | |
516 | return values that ought to have type `float'. (By default, they use | |
517 | `int'.) | |
518 | ||
519 | The obvious choice would be `float'--but that won't work with traditional C | |
520 | compilers gratuitously convert values declared as `float' into `double'. */ | |
521 | /* #define FLOAT_VALUE_TYPE */ | |
522 | ||
523 | /* Define this macro to override the way the value of a `float'-returning | |
524 | library routine should be packaged in order to return it. These functions | |
525 | are actually declared to return type `FLOAT_VALUE_TYPE' (normally `int'). | |
526 | ||
527 | These values can't be returned as type `float' because traditional C | |
528 | compilers would gratuitously convert the value to a `double'. | |
529 | ||
530 | A local variable named `intify' is always available when the macro `INTIFY' | |
531 | is used. It is a union of a `float' field named `f' and a field named `i' | |
532 | whose type is `FLOAT_VALUE_TYPE' or `int'. | |
533 | ||
534 | If you don't define this macro, the default definition works by copying the | |
535 | value through that union. */ | |
536 | /* #define INTIFY(FLOAT_VALUE) */ | |
537 | ||
538 | /* Define this macro as the name of the data type corresponding to `SImode' in | |
539 | the system's own C compiler. | |
540 | ||
541 | You need not define this macro if that type is `long int', as it usually is. */ | |
542 | /* #define nongcc_SI_type */ | |
543 | ||
544 | /* Define this macro as the name of the data type corresponding to the | |
545 | word_mode in the system's own C compiler. | |
546 | ||
547 | You need not define this macro if that type is `long int', as it usually is. */ | |
548 | /* #define nongcc_word_type */ | |
549 | ||
550 | /* Define these macros to supply explicit C statements to carry out various | |
551 | arithmetic operations on types `float' and `double' in the library routines | |
552 | in `libgcc1.c'. See that file for a full list of these macros and their | |
553 | arguments. | |
554 | ||
555 | On most machines, you don't need to define any of these macros, because the | |
556 | C compiler that comes with the system takes care of doing them. */ | |
b1c9bc51 | 557 | /* #define perform_... */ |
4b58290f | 558 | |
4b58290f GK |
559 | \f |
560 | /* Addressing Modes */ | |
561 | ||
4b58290f GK |
562 | #define HAVE_POST_INCREMENT 1 |
563 | ||
4b58290f GK |
564 | #define HAVE_PRE_DECREMENT 1 |
565 | ||
4b58290f GK |
566 | #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) |
567 | ||
4b58290f GK |
568 | #define MAX_REGS_PER_ADDRESS 1 |
569 | ||
4b58290f GK |
570 | #ifdef REG_OK_STRICT |
571 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ | |
572 | do { \ | |
c6243b4c | 573 | if (xstormy16_legitimate_address_p (MODE, X, 1)) \ |
4b58290f GK |
574 | goto LABEL; \ |
575 | } while (0) | |
576 | #else | |
577 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ | |
578 | do { \ | |
c6243b4c | 579 | if (xstormy16_legitimate_address_p (MODE, X, 0)) \ |
4b58290f GK |
580 | goto LABEL; \ |
581 | } while (0) | |
582 | #endif | |
595cac16 | 583 | |
4b58290f GK |
584 | #ifdef REG_OK_STRICT |
585 | #define REG_OK_FOR_BASE_P(X) \ | |
586 | (REGNO_OK_FOR_BASE_P (REGNO (X)) && (REGNO (X) < FIRST_PSEUDO_REGISTER)) | |
587 | #else | |
588 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
589 | #endif | |
590 | ||
4b58290f GK |
591 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) |
592 | ||
595cac16 | 593 | /* On this chip, this is true if the address is valid with an offset |
4b58290f GK |
594 | of 0 but not of 6, because in that case it cannot be used as an |
595 | address for DImode or DFmode, or if the address is a post-increment | |
596 | or pre-decrement address. | |
597 | */ | |
598 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
c6243b4c | 599 | if (xstormy16_mode_dependent_address_p (ADDR)) \ |
4b58290f GK |
600 | goto LABEL |
601 | ||
4b58290f GK |
602 | #define LEGITIMATE_CONSTANT_P(X) 1 |
603 | ||
4b58290f GK |
604 | \f |
605 | /* Describing Relative Costs of Operations */ | |
606 | ||
4b58290f GK |
607 | #define REGISTER_MOVE_COST(MODE, FROM, TO) 2 |
608 | ||
3fdb2f71 | 609 | #define MEMORY_MOVE_COST(M,C,I) (5 + memory_move_secondary_cost (M, C, I)) |
4b58290f | 610 | |
4b58290f GK |
611 | #define BRANCH_COST 5 |
612 | ||
4b58290f GK |
613 | #define SLOW_BYTE_ACCESS 0 |
614 | ||
4b58290f GK |
615 | #define NO_FUNCTION_CSE |
616 | ||
4b58290f GK |
617 | \f |
618 | /* Dividing the output into sections. */ | |
619 | ||
4b58290f GK |
620 | #define TEXT_SECTION_ASM_OP ".text" |
621 | ||
4b58290f GK |
622 | #define DATA_SECTION_ASM_OP ".data" |
623 | ||
752151e8 | 624 | #define BSS_SECTION_ASM_OP "\t.section\t.bss" |
4b58290f | 625 | |
4b58290f GK |
626 | /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. |
627 | There are no shared libraries on this target so these sections need | |
628 | not be writable. | |
629 | ||
630 | Defined in elfos.h. */ | |
631 | ||
632 | #undef CTORS_SECTION_ASM_OP | |
633 | #undef DTORS_SECTION_ASM_OP | |
634 | #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\"" | |
635 | #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\"" | |
636 | ||
4b58290f | 637 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
4b58290f GK |
638 | |
639 | \f | |
640 | /* The Overall Framework of an Assembler File. */ | |
641 | ||
7c87e9f9 | 642 | #define ASM_COMMENT_START ";" |
4b58290f | 643 | |
4b58290f GK |
644 | #define ASM_APP_ON "#APP\n" |
645 | ||
4b58290f | 646 | #define ASM_APP_OFF "#NO_APP\n" |
4b58290f GK |
647 | \f |
648 | /* Output of Data. */ | |
649 | ||
4b58290f GK |
650 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '|') |
651 | ||
4b58290f GK |
652 | \f |
653 | /* Output and Generation of Labels. */ | |
654 | ||
4b58290f GK |
655 | #define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL) \ |
656 | do { \ | |
e7d687bb | 657 | if (SYMBOL_REF_FUNCTION_P (SYMBOL)) \ |
c27c15db | 658 | ASM_OUTPUT_LABEL_REF ((STREAM), XSTR (SYMBOL, 0)); \ |
4b58290f GK |
659 | else \ |
660 | assemble_name (STREAM, XSTR (SYMBOL, 0)); \ | |
661 | } while (0) | |
662 | ||
2f0b7af6 GK |
663 | #define ASM_OUTPUT_LABEL_REF(STREAM, NAME) \ |
664 | do { \ | |
665 | fputs ("@fptr(", STREAM); \ | |
666 | assemble_name (STREAM, NAME); \ | |
667 | fputc (')', STREAM); \ | |
668 | } while (0) | |
669 | ||
506a61b1 KG |
670 | /* Globalizing directive for a label. */ |
671 | #define GLOBAL_ASM_OP "\t.globl " | |
4b58290f | 672 | |
4b58290f GK |
673 | \f |
674 | /* Macros Controlling Initialization Routines. */ | |
675 | ||
595cac16 | 676 | /* When you are using special sections for |
4b58290f GK |
677 | initialization and termination functions, this macro also controls how |
678 | `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions. | |
679 | ||
680 | Defined in svr4.h. */ | |
681 | /* #define INIT_SECTION_ASM_OP */ | |
682 | ||
4b58290f GK |
683 | /* Define this macro as a C statement to output on the stream STREAM the |
684 | assembler code to arrange to call the function named NAME at initialization | |
685 | time. | |
686 | ||
687 | Assume that NAME is the name of a C function generated automatically by the | |
688 | compiler. This function takes no arguments. Use the function | |
689 | `assemble_name' to output the name NAME; this performs any system-specific | |
690 | syntactic transformations such as adding an underscore. | |
691 | ||
692 | If you don't define this macro, nothing special is output to arrange to call | |
693 | the function. This is correct when the function will be called in some | |
694 | other manner--for example, by means of the `collect2' program, which looks | |
695 | through the symbol table to find these functions by their names. | |
696 | ||
697 | Defined in svr4.h. */ | |
698 | /* #define ASM_OUTPUT_CONSTRUCTOR(STREAM, NAME) */ | |
699 | ||
700 | /* This is like `ASM_OUTPUT_CONSTRUCTOR' but used for termination functions | |
701 | rather than initialization functions. | |
702 | ||
703 | Defined in svr4.h. */ | |
704 | /* #define ASM_OUTPUT_DESTRUCTOR(STREAM, NAME) */ | |
705 | ||
4b58290f GK |
706 | /* Define this macro if the system uses ELF format object files. |
707 | ||
708 | Defined in svr4.h. */ | |
709 | /* #define OBJECT_FORMAT_ELF */ | |
710 | ||
4b58290f GK |
711 | \f |
712 | /* Output of Assembler Instructions. */ | |
713 | ||
4b58290f GK |
714 | #define REGISTER_NAMES \ |
715 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", \ | |
716 | "r11", "r12", "r13", "psw", "sp", "carry", "fp", "ap" } | |
717 | ||
4b58290f GK |
718 | #define ADDITIONAL_REGISTER_NAMES \ |
719 | { { "r14", 14 }, \ | |
720 | { "r15", 15 } } | |
721 | ||
c6243b4c | 722 | #define PRINT_OPERAND(STREAM, X, CODE) xstormy16_print_operand (STREAM, X, CODE) |
4b58290f | 723 | |
c6243b4c | 724 | #define PRINT_OPERAND_ADDRESS(STREAM, X) xstormy16_print_operand_address (STREAM, X) |
4b58290f | 725 | |
595cac16 | 726 | /* USER_LABEL_PREFIX is defined in svr4.h. */ |
4b58290f GK |
727 | #define REGISTER_PREFIX "" |
728 | #define LOCAL_LABEL_PREFIX "." | |
729 | #define USER_LABEL_PREFIX "" | |
730 | #define IMMEDIATE_PREFIX "#" | |
731 | ||
4b58290f GK |
732 | #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ |
733 | fprintf (STREAM, "\tpush %d\n", REGNO) | |
734 | ||
4b58290f GK |
735 | #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ |
736 | fprintf (STREAM, "\tpop %d\n", REGNO) | |
737 | ||
738 | \f | |
739 | /* Output of dispatch tables. */ | |
740 | ||
741 | /* This port does not use the ASM_OUTPUT_ADDR_VEC_ELT macro, because | |
742 | this could cause label alignment to appear between the 'br' and the table, | |
743 | which would be bad. Instead, it controls the output of the table | |
744 | itself. */ | |
745 | #define ASM_OUTPUT_ADDR_VEC(LABEL, BODY) \ | |
c6243b4c | 746 | xstormy16_output_addr_vec (file, LABEL, BODY) |
4b58290f GK |
747 | |
748 | /* Alignment for ADDR_VECs is the same as for code. */ | |
749 | #define ADDR_VEC_ALIGN(ADDR_VEC) 1 | |
750 | ||
751 | \f | |
752 | /* Assembler Commands for Exception Regions. */ | |
753 | ||
e27e731d | 754 | #define DWARF2_UNWIND_INFO 0 |
4b58290f | 755 | |
9defc9b7 RH |
756 | /* Don't use __builtin_setjmp for unwinding, since it's tricky to get |
757 | at the high 16 bits of an address. */ | |
758 | #define DONT_USE_BUILTIN_SETJMP | |
759 | #define JMP_BUF_SIZE 8 | |
4b58290f GK |
760 | \f |
761 | /* Assembler Commands for Alignment. */ | |
762 | ||
4b58290f GK |
763 | #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ |
764 | fprintf ((STREAM), "\t.p2align %d\n", (POWER)) | |
765 | ||
766 | \f | |
767 | /* Macros Affecting all Debug Formats. */ | |
768 | ||
595cac16 | 769 | /* Defined in svr4.h. */ |
4b58290f GK |
770 | #undef PREFERRED_DEBUGGING_TYPE |
771 | #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG | |
772 | ||
4b58290f GK |
773 | \f |
774 | /* Macros for SDB and Dwarf Output. */ | |
775 | ||
4b58290f GK |
776 | /* Define this macro if addresses in Dwarf 2 debugging info should not |
777 | be the same size as pointers on the target architecture. The | |
778 | macro's value should be the size, in bytes, to use for addresses in | |
779 | the debugging info. | |
780 | ||
781 | Some architectures use word addresses to refer to code locations, | |
782 | but Dwarf 2 info always uses byte addresses. On such machines, | |
783 | Dwarf 2 addresses need to be larger than the architecture's | |
784 | pointers. */ | |
785 | #define DWARF2_ADDR_SIZE 4 | |
786 | ||
4b58290f GK |
787 | \f |
788 | /* Miscellaneous Parameters. */ | |
789 | ||
4b58290f GK |
790 | #define PREDICATE_CODES \ |
791 | {"shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT }}, \ | |
792 | {"equality_operator", {EQ, NE }}, \ | |
793 | {"inequality_operator", {GE, GT, LE, LT, GEU, GTU, LEU, LTU }}, \ | |
5ee4950e AH |
794 | {"xstormy16_ineqsi_operator", {LT, GE, LTU, GEU }}, \ |
795 | {"nonimmediate_nonstack_operand", {REG, MEM}}, | |
595cac16 | 796 | |
4b58290f GK |
797 | #define CASE_VECTOR_MODE SImode |
798 | ||
4b58290f GK |
799 | #define WORD_REGISTER_OPERATIONS |
800 | ||
4b58290f GK |
801 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND |
802 | ||
4b58290f GK |
803 | #define MOVE_MAX 2 |
804 | ||
4b58290f GK |
805 | #define SHIFT_COUNT_TRUNCATED 1 |
806 | ||
4b58290f GK |
807 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 |
808 | ||
4b58290f GK |
809 | #define Pmode HImode |
810 | ||
4b58290f GK |
811 | #define FUNCTION_MODE HImode |
812 | ||
4b58290f GK |
813 | #define NO_IMPLICIT_EXTERN_C |
814 | ||
595cac16 | 815 | /* Defined in svr4.h. */ |
32f0ffb3 | 816 | #define HANDLE_SYSV_PRAGMA 1 |
4b58290f | 817 | |
4b58290f GK |
818 | /* Define this if the target system supports the function `atexit' from the |
819 | ANSI C standard. If this is not defined, and `INIT_SECTION_ASM_OP' is not | |
820 | defined, a default `exit' function will be provided to support C++. | |
821 | ||
822 | Defined by svr4.h */ | |
823 | /* #define HAVE_ATEXIT */ | |
824 | ||
4b58290f GK |
825 | /* A C statement which is executed by the Haifa scheduler after it has scheduled |
826 | an insn from the ready list. FILE is either a null pointer, or a stdio stream | |
827 | to write any debug output to. VERBOSE is the verbose level provided by | |
828 | -fsched-verbose-<n>. INSN is the instruction that was scheduled. MORE is the | |
829 | number of instructions that can be issued in the current cycle. This macro | |
b1c9bc51 | 830 | is responsible for updating the value of MORE (typically by (MORE)--). */ |
4b58290f GK |
831 | /* #define MD_SCHED_VARIABLE_ISSUE (FILE, VERBOSE, INSN, MORE) */ |
832 | ||
4b58290f GK |
833 | \f |
834 | /* Define the information needed to generate branch and scc insns. This is | |
835 | stored from the compare operation. Note that we can't use "rtx" here | |
836 | since it hasn't been defined! */ | |
837 | ||
c6243b4c | 838 | extern struct rtx_def *xstormy16_compare_op0, *xstormy16_compare_op1; |
4b58290f | 839 | |
c6243b4c | 840 | /* End of xstormy16.h */ |