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17fd0700 | 1 | /* Target definitions for GNU compiler for Sparc running System V.4 |
19c3fc24 | 2 | Copyright (C) 1991, 1992 Free Software Foundation, Inc. |
17fd0700 RS |
3 | |
4 | Written by Ron Guilmette (rfg@ncd.com). | |
5 | ||
6 | This file is part of GNU CC. | |
7 | ||
8 | GNU CC is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GNU CC is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GNU CC; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
21 | ||
22 | #include "sparc.h" | |
19c3fc24 RS |
23 | |
24 | /* Undefine some symbols which are defined in "sparc.h" but which are | |
25 | appropriate only for SunOS 4.x, and not for svr4. */ | |
26 | ||
27 | #undef DBX_DEBUGGING_INFO | |
28 | #undef WORD_SWITCH_TAKES_ARG | |
29 | #undef SELECT_SECTION | |
30 | #undef ASM_DECLARE_FUNCTION_NAME | |
31 | #undef TEXT_SECTION_ASM_OP | |
32 | #undef DATA_SECTION_ASM_OP | |
33 | ||
17fd0700 RS |
34 | #include "svr4.h" |
35 | ||
19c3fc24 RS |
36 | /* Undefined some symbols which are defined in "svr4.h" but which are |
37 | appropriate only for typical svr4 systems, but not for the specific | |
38 | case of svr4 running on a Sparc. */ | |
39 | ||
40 | #undef CTORS_SECTION_ASM_OP | |
41 | #undef DTORS_SECTION_ASM_OP | |
42 | #undef INIT_SECTION_ASM_OP | |
43 | #undef CONST_SECTION_ASM_OP | |
44 | #undef TYPE_OPERAND_FMT | |
45 | #undef PUSHSECTION_FORMAT | |
46 | #undef STRING_ASM_OP | |
47 | #undef COMMON_ASM_OP | |
48 | #undef SKIP_ASM_OP | |
19c3fc24 | 49 | |
17fd0700 | 50 | /* Provide a set of pre-definitions and pre-assertions appropriate for |
19c3fc24 | 51 | the Sparc running svr4. __svr4__ is our extension. */ |
17fd0700 RS |
52 | |
53 | #define CPP_PREDEFINES \ | |
54 | "-Dsparc -Dunix -D__svr4__ -Asystem(unix) -Acpu(sparc) -Amachine(sparc)" | |
55 | ||
ead69aea JW |
56 | /* The specialized code which needs to appear in the .init section prior |
57 | to the prologue code for `__do_global_ctors' (see crtstuff.c). | |
58 | ||
59 | On Sparcs running svr4, the /usr/ccs/lib/crti.o file (with gets linked | |
60 | in prior to the crtbegin.o file) has a single `save' instruction in its | |
61 | .init section. That `save' instruction tries to setup a stack frame for | |
62 | the sake of any subsequent code in the .init section. Unfortunately, | |
63 | the size it uses for the stack frame is only a guess, and is not really | |
64 | adequate for our purposes. More importantly, we independently put our | |
65 | own standard function prologue (for __do_global_ctors) into the .init | |
66 | section and that function prologue includes its own `save' instruction! | |
67 | Thus, unless we do something to correct the situation, we'll get *two* | |
68 | stack frames allocated when crt0.o calls the code in the .init section, | |
69 | and havoc will ensue. The following macro definition prevents such woes. | |
70 | */ | |
71 | ||
72 | #define INIT_SECTION_PREAMBLE asm ("restore") | |
73 | ||
19c3fc24 RS |
74 | /* This is the string used to begin an assembly language comment for the |
75 | Sparc/svr4 assembler. */ | |
76 | ||
17fd0700 RS |
77 | #define ASM_COMMENT_START "!" |
78 | ||
19c3fc24 RS |
79 | /* Define the names of various pseudo-op used by the Sparc/svr4 assembler. |
80 | Note that many of these are different from the typical pseudo-ops used | |
81 | by most svr4 assemblers. That is probably due to a (misguided?) attempt | |
82 | to keep the Sparc/svr4 assembler somewhat compatible with the Sparc/SunOS | |
83 | assembler. */ | |
84 | ||
aa6b905d RS |
85 | #define STRING_ASM_OP ".asciz" |
86 | #define COMMON_ASM_OP ".common" | |
87 | #define SKIP_ASM_OP ".skip" | |
88 | #define UNALIGNED_INT_ASM_OP ".uaword" | |
89 | #define UNALIGNED_SHORT_ASM_OP ".uahalf" | |
90 | #define PUSHSECTION_ASM_OP ".pushsection" | |
91 | #define POPSECTION_ASM_OP ".popsection" | |
19c3fc24 RS |
92 | |
93 | /* This is the format used to print the second operand of a .type pseudo-op | |
94 | for the Sparc/svr4 assembler. */ | |
95 | ||
17fd0700 RS |
96 | #define TYPE_OPERAND_FMT "#%s" |
97 | ||
19c3fc24 RS |
98 | /* This is the format used to print a .pushsection pseudo-op (and its operand) |
99 | for the Sparc/svr4 assembler. */ | |
100 | ||
ead69aea | 101 | #define PUSHSECTION_FORMAT "\t%s\t\"%s\"\n" |
19c3fc24 | 102 | |
32686e40 JW |
103 | #undef ASM_OUTPUT_CASE_LABEL |
104 | #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ | |
105 | do { ASM_OUTPUT_ALIGN ((FILE), 2); \ | |
106 | ASM_OUTPUT_INTERNAL_LABEL ((FILE), PREFIX, NUM); \ | |
107 | } while (0) | |
108 | ||
19c3fc24 RS |
109 | /* This is how to equate one symbol to another symbol. The syntax used is |
110 | `SYM1=SYM2'. Note that this is different from the way equates are done | |
111 | with most svr4 assemblers, where the syntax is `.set SYM1,SYM2'. */ | |
112 | ||
113 | #define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \ | |
114 | do { fprintf ((FILE), "\t"); \ | |
115 | assemble_name (FILE, LABEL1); \ | |
116 | fprintf (FILE, " = "); \ | |
117 | assemble_name (FILE, LABEL2); \ | |
118 | fprintf (FILE, "\n"); \ | |
119 | } while (0) | |
120 | ||
19c3fc24 | 121 | /* Define how the Sparc registers should be numbered for Dwarf output. |
17fd0700 | 122 | The numbering provided here should be compatible with the native |
19c3fc24 RS |
123 | svr4 SDB debugger in the Sparc/svr4 reference port. The numbering |
124 | is as follows: | |
125 | ||
126 | Assembly name gcc internal regno Dwarf regno | |
127 | ---------------------------------------------------------- | |
128 | g0-g7 0-7 0-7 | |
129 | o0-o7 8-15 8-15 | |
130 | l0-l7 16-23 16-23 | |
131 | i0-i7 24-31 24-31 | |
132 | f0-f31 32-63 40-71 | |
133 | */ | |
17fd0700 RS |
134 | |
135 | #define DBX_REGISTER_NUMBER(REGNO) \ | |
19c3fc24 RS |
136 | (((REGNO) < 32) ? (REGNO) \ |
137 | : ((REGNO) < 63) ? ((REGNO) + 8) \ | |
138 | : (abort (), 0)) | |
17fd0700 | 139 | |
19c3fc24 RS |
140 | /* A set of symbol definitions for assembly pseudo-ops which will |
141 | get us switched to various sections of interest. These are used | |
142 | in all places where we simply want to switch to a section, and | |
143 | *not* to push the previous section name onto the assembler's | |
144 | section names stack (as we do often in dwarfout.c). */ | |
17fd0700 | 145 | |
aa6b905d RS |
146 | #define TEXT_SECTION_ASM_OP ".section\t\".text\"" |
147 | #define DATA_SECTION_ASM_OP ".section\t\".data\"" | |
148 | #define BSS_SECTION_ASM_OP ".section\t\".bss\"" | |
149 | #define CONST_SECTION_ASM_OP ".section\t\".rodata\"" | |
150 | #define INIT_SECTION_ASM_OP ".section\t\".init\",#alloc" | |
151 | #define CTORS_SECTION_ASM_OP ".section\t\".ctors\",#alloc" | |
152 | #define DTORS_SECTION_ASM_OP ".section\t\".dtors\",#alloc" | |
ead69aea JW |
153 | |
154 | /* Code to handle #pragma directives. The interface is a bit messy, | |
155 | but there's no simpler way to do this while still using yylex. */ | |
156 | #define HANDLE_PRAGMA(FILE) \ | |
157 | do { \ | |
158 | while (c == ' ' || c == '\t') \ | |
159 | c = getc (FILE); \ | |
160 | if (c == '\n' || c == EOF) \ | |
161 | { \ | |
162 | handle_pragma_token (0, 0); \ | |
163 | return c; \ | |
164 | } \ | |
165 | ungetc (c, FILE); \ | |
166 | switch (yylex ()) \ | |
167 | { \ | |
168 | case IDENTIFIER: \ | |
169 | case TYPENAME: \ | |
170 | case STRING: \ | |
171 | case CONSTANT: \ | |
172 | handle_pragma_token (token_buffer, yylval.ttype); \ | |
173 | break; \ | |
174 | default: \ | |
175 | handle_pragma_token (token_buffer, 0); \ | |
176 | } \ | |
177 | if (nextchar >= 0) \ | |
178 | c = nextchar, nextchar = -1; \ | |
179 | else \ | |
180 | c = getc (FILE); \ | |
181 | } while (1) | |
e1c8af5c RS |
182 | |
183 | /* If the host and target formats match, output the floats as hex. */ | |
184 | #if HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
185 | #if defined (HOST_WORDS_BIG_ENDIAN) == WORDS_BIG_ENDIAN | |
186 | ||
187 | /* This is how to output assembly code to define a `float' constant. | |
188 | We always have to use a .long pseudo-op to do this because the native | |
189 | SVR4 ELF assembler is buggy and it generates incorrect values when we | |
190 | try to use the .float pseudo-op instead. */ | |
191 | ||
192 | #undef ASM_OUTPUT_FLOAT | |
193 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
194 | do { long value; \ | |
195 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), value); \ | |
196 | fprintf((FILE), "\t.long\t0x%x\n", value); \ | |
197 | } while (0) | |
198 | ||
199 | /* This is how to output assembly code to define a `double' constant. | |
200 | We always have to use a pair of .long pseudo-ops to do this because | |
201 | the native SVR4 ELF assembler is buggy and it generates incorrect | |
202 | values when we try to use the the .double pseudo-op instead. */ | |
203 | ||
204 | #undef ASM_OUTPUT_DOUBLE | |
205 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
206 | do { long value[2]; \ | |
207 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), value); \ | |
208 | fprintf((FILE), "\t.long\t0x%x\n", value[0]); \ | |
209 | fprintf((FILE), "\t.long\t0x%x\n", value[1]); \ | |
210 | } while (0) | |
211 | ||
212 | #endif /* word order matches */ | |
213 | #endif /* HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT */ |