]>
Commit | Line | Data |
---|---|---|
f045b2c9 | 1 | /* Definitions of target machine for GNU compiler, for IBM RS/6000. |
cf27b467 | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. |
6a7ec0a7 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
f045b2c9 RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
f045b2c9 RS |
21 | |
22 | ||
23 | /* Note that some other tm.h files include this one and then override | |
24 | many of the definitions that relate to assembler syntax. */ | |
25 | ||
26 | ||
27 | /* Names to predefine in the preprocessor for this target machine. */ | |
28 | ||
84b49fa7 RK |
29 | #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ |
30 | -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" | |
f045b2c9 RS |
31 | |
32 | /* Print subsidiary information on the compiler version in use. */ | |
33 | #define TARGET_VERSION ; | |
34 | ||
8e3f41e7 MM |
35 | /* Default string to use for cpu if not specified. */ |
36 | #ifndef TARGET_CPU_DEFAULT | |
37 | #define TARGET_CPU_DEFAULT ((char *)0) | |
38 | #endif | |
39 | ||
fdaff8ba RS |
40 | /* Tell the assembler to assume that all undefined names are external. |
41 | ||
42 | Don't do this until the fixed IBM assembler is more generally available. | |
43 | When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, | |
44 | ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no | |
b4d6689b RK |
45 | longer be needed. Also, the extern declaration of mcount in ASM_FILE_START |
46 | will no longer be needed. */ | |
f045b2c9 | 47 | |
841faeed | 48 | /* #define ASM_SPEC "-u %(asm_cpu)" */ |
f045b2c9 | 49 | |
84b49fa7 RK |
50 | /* Define appropriate architecture macros for preprocessor depending on |
51 | target switches. */ | |
52 | ||
841faeed MM |
53 | #define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_cpu)" |
54 | ||
55 | /* Common CPP definitions used by CPP_SPEC amonst the various targets | |
56 | for handling -mcpu=xxx switches. */ | |
57 | #define CPP_CPU_SPEC \ | |
58 | "%{!mcpu*: \ | |
84b49fa7 RK |
59 | %{mpower: %{!mpower2: -D_ARCH_PWR}} \ |
60 | %{mpower2: -D_ARCH_PWR2} \ | |
61 | %{mpowerpc*: -D_ARCH_PPC} \ | |
62 | %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ | |
841faeed | 63 | %{!mno-power: %{!mpower2: %(cpp_default)}}} \ |
84b49fa7 RK |
64 | %{mcpu=common: -D_ARCH_COM} \ |
65 | %{mcpu=power: -D_ARCH_PWR} \ | |
8e3f41e7 | 66 | %{mcpu=power2: -D_ARCH_PWR2} \ |
84b49fa7 RK |
67 | %{mcpu=powerpc: -D_ARCH_PPC} \ |
68 | %{mcpu=rios: -D_ARCH_PWR} \ | |
69 | %{mcpu=rios1: -D_ARCH_PWR} \ | |
70 | %{mcpu=rios2: -D_ARCH_PWR2} \ | |
71 | %{mcpu=rsc: -D_ARCH_PWR} \ | |
72 | %{mcpu=rsc1: -D_ARCH_PWR} \ | |
49a0b204 | 73 | %{mcpu=403: -D_ARCH_PPC} \ |
cf27b467 | 74 | %{mcpu=505: -D_ARCH_PPC} \ |
84b49fa7 | 75 | %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ |
841faeed | 76 | %{mcpu=602: -D_ARCH_PPC} \ |
fada905b MM |
77 | %{mcpu=603: -D_ARCH_PPC} \ |
78 | %{mcpu=603e: -D_ARCH_PPC} \ | |
79 | %{mcpu=604: -D_ARCH_PPC} \ | |
cf27b467 MM |
80 | %{mcpu=620: -D_ARCH_PPC} \ |
81 | %{mcpu=821: -D_ARCH_PPC} \ | |
82 | %{mcpu=860: -D_ARCH_PPC}" | |
84b49fa7 | 83 | |
841faeed MM |
84 | #ifndef CPP_DEFAULT_SPEC |
85 | #define CPP_DEFAULT_SPEC "-D_ARCH_PWR" | |
86 | #endif | |
87 | ||
88 | #ifndef CPP_SYSV_SPEC | |
89 | #define CPP_SYSV_SPEC "" | |
90 | #endif | |
91 | ||
92 | #ifndef CPP_ENDIAN_SPEC | |
93 | #define CPP_ENDIAN_SPEC "" | |
94 | #endif | |
95 | ||
96 | #ifndef CPP_SYSV_DEFAULT_SPEC | |
97 | #define CPP_SYSV_DEFAULT_SPEC "" | |
98 | #endif | |
99 | ||
100 | /* Common ASM definitions used by ASM_SPEC amonst the various targets | |
101 | for handling -mcpu=xxx switches. */ | |
102 | #define ASM_CPU_SPEC \ | |
103 | "%{!mcpu*: \ | |
104 | %{mpower: %{!mpower2: -mpwr}} \ | |
105 | %{mpower2: -mpwrx} \ | |
106 | %{mpowerpc*: -mppc} \ | |
107 | %{mno-power: %{!mpowerpc*: -mcom}} \ | |
108 | %{!mno-power: %{!mpower2: %(asm_default)}}} \ | |
109 | %{mcpu=common: -mcom} \ | |
110 | %{mcpu=power: -mpwr} \ | |
111 | %{mcpu=power2: -mpwrx} \ | |
112 | %{mcpu=powerpc: -mppc} \ | |
113 | %{mcpu=rios: -mpwr} \ | |
114 | %{mcpu=rios1: -mpwr} \ | |
115 | %{mcpu=rios2: -mpwrx} \ | |
116 | %{mcpu=rsc: -mpwr} \ | |
117 | %{mcpu=rsc1: -mpwr} \ | |
118 | %{mcpu=403: -mppc} \ | |
119 | %{mcpu=505: -mppc} \ | |
120 | %{mcpu=601: -m601} \ | |
121 | %{mcpu=602: -mppc} \ | |
122 | %{mcpu=603: -mppc} \ | |
123 | %{mcpu=603e: -mppc} \ | |
124 | %{mcpu=604: -mppc} \ | |
125 | %{mcpu=620: -mppc} \ | |
126 | %{mcpu=821: -mppc} \ | |
127 | %{mcpu=860: -mppc}" | |
128 | ||
129 | #ifndef ASM_DEFAULT_SPEC | |
130 | #define ASM_DEFAULT_SPEC "-mpwr" | |
131 | #endif | |
132 | ||
133 | /* This macro defines names of additional specifications to put in the specs | |
134 | that can be used in various specifications like CC1_SPEC. Its definition | |
135 | is an initializer with a subgrouping for each command option. | |
136 | ||
137 | Each subgrouping contains a string constant, that defines the | |
138 | specification name, and a string constant that used by the GNU CC driver | |
139 | program. | |
140 | ||
141 | Do not define this macro if it does not need to do anything. */ | |
142 | ||
7509c759 MM |
143 | #ifndef SUBTARGET_EXTRA_SPECS |
144 | #define SUBTARGET_EXTRA_SPECS | |
145 | #endif | |
146 | ||
841faeed MM |
147 | #define EXTRA_SPECS \ |
148 | { "cpp_cpu", CPP_CPU_SPEC }, \ | |
149 | { "cpp_default", CPP_DEFAULT_SPEC }, \ | |
150 | { "cpp_sysv", CPP_SYSV_SPEC }, \ | |
151 | { "cpp_sysv_default", CPP_SYSV_DEFAULT_SPEC }, \ | |
152 | { "cpp_endian", CPP_ENDIAN_SPEC }, \ | |
153 | { "asm_cpu", ASM_CPU_SPEC }, \ | |
7509c759 MM |
154 | { "asm_default", ASM_DEFAULT_SPEC }, \ |
155 | { "link_syscalls", LINK_SYSCALLS_SPEC }, \ | |
156 | { "link_libg", LINK_LIBG_SPEC }, \ | |
157 | { "link_path", LINK_PATH_SPEC }, \ | |
158 | { "link_start", LINK_START_SPEC }, \ | |
159 | SUBTARGET_EXTRA_SPECS | |
160 | ||
161 | /* Default paths to give linker under V.4 */ | |
162 | #ifndef LINK_PATH_SPEC | |
163 | #define LINK_PATH_SPEC "" | |
164 | #endif | |
165 | ||
166 | /* Default location of syscalls.exp under AIX */ | |
167 | #ifndef CROSS_COMPILE | |
168 | #define LINK_SYSCALLS_SPEC "-bI:/lib/syscalls.exp" | |
169 | #else | |
170 | #define LINK_SYSCALLS_SPEC "" | |
171 | #endif | |
172 | ||
173 | /* Default location of libg.exp under AIX */ | |
174 | #ifndef CROSS_COMPILE | |
175 | #define LINK_LIBG_SPEC "-bexport:/usr/lib/libg.exp" | |
176 | #else | |
177 | #define LINK_LIBG_SPEC "" | |
178 | #endif | |
179 | ||
180 | /* Default starting address if specified */ | |
181 | #ifndef LINK_START_SPEC | |
182 | #define LINK_START_SPEC "" | |
183 | #endif | |
841faeed | 184 | |
f045b2c9 RS |
185 | /* Define the options for the binder: Start text at 512, align all segments |
186 | to 512 bytes, and warn if there is text relocation. | |
187 | ||
188 | The -bhalt:4 option supposedly changes the level at which ld will abort, | |
189 | but it also suppresses warnings about multiply defined symbols and is | |
190 | used by the AIX cc command. So we use it here. | |
191 | ||
192 | -bnodelcsect undoes a poor choice of default relating to multiply-defined | |
52c0eaf8 JM |
193 | csects. See AIX documentation for more information about this. |
194 | ||
195 | -bM:SRE tells the linker that the output file is Shared REusable. Note | |
196 | that to actually build a shared library you will also need to specify an | |
197 | export list with the -Wl,-bE option. */ | |
f045b2c9 | 198 | |
c1950f1c | 199 | #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\ |
7509c759 MM |
200 | %{static:-bnso %(link_syscalls) } \ |
201 | %{!shared:%{g*: %(link_libg) }} %{shared:-bM:SRE}" | |
f045b2c9 | 202 | |
58a39e45 RS |
203 | /* Profiled library versions are used by linking with special directories. */ |
204 | #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ | |
788d9012 | 205 | %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc" |
f045b2c9 RS |
206 | |
207 | /* gcc must do the search itself to find libgcc.a, not use -l. */ | |
046b1537 | 208 | #define LIBGCC_SPEC "libgcc.a%s" |
f045b2c9 RS |
209 | |
210 | /* Don't turn -B into -L if the argument specifies a relative file name. */ | |
211 | #define RELATIVE_PREFIX_NOT_LINKDIR | |
212 | ||
fb623df5 | 213 | /* Architecture type. */ |
f045b2c9 | 214 | |
fb623df5 RK |
215 | extern int target_flags; |
216 | ||
217 | /* Use POWER architecture instructions and MQ register. */ | |
218 | #define MASK_POWER 0x01 | |
219 | ||
6febd581 RK |
220 | /* Use POWER2 extensions to POWER architecture. */ |
221 | #define MASK_POWER2 0x02 | |
222 | ||
fb623df5 | 223 | /* Use PowerPC architecture instructions. */ |
6febd581 RK |
224 | #define MASK_POWERPC 0x04 |
225 | ||
583cf4db RK |
226 | /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */ |
227 | #define MASK_PPC_GPOPT 0x08 | |
228 | ||
229 | /* Use PowerPC Graphics group optional instructions, e.g. fsel. */ | |
230 | #define MASK_PPC_GFXOPT 0x10 | |
f045b2c9 | 231 | |
fb623df5 | 232 | /* Use PowerPC-64 architecture instructions. */ |
583cf4db | 233 | #define MASK_POWERPC64 0x20 |
f045b2c9 | 234 | |
fb623df5 | 235 | /* Use revised mnemonic names defined for PowerPC architecture. */ |
583cf4db | 236 | #define MASK_NEW_MNEMONICS 0x40 |
fb623df5 RK |
237 | |
238 | /* Disable placing fp constants in the TOC; can be turned on when the | |
239 | TOC overflows. */ | |
583cf4db | 240 | #define MASK_NO_FP_IN_TOC 0x80 |
fb623df5 | 241 | |
0b9ccabc RK |
242 | /* Disable placing symbol+offset constants in the TOC; can be turned on when |
243 | the TOC overflows. */ | |
583cf4db | 244 | #define MASK_NO_SUM_IN_TOC 0x100 |
0b9ccabc | 245 | |
fb623df5 | 246 | /* Output only one TOC entry per module. Normally linking fails if |
642a35f1 JW |
247 | there are more than 16K unique variables/constants in an executable. With |
248 | this option, linking fails only if there are more than 16K modules, or | |
249 | if there are more than 16K unique variables/constant in a single module. | |
250 | ||
251 | This is at the cost of having 2 extra loads and one extra store per | |
252 | function, and one less allocatable register. */ | |
583cf4db | 253 | #define MASK_MINIMAL_TOC 0x200 |
642a35f1 | 254 | |
9e654916 RK |
255 | /* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */ |
256 | #define MASK_64BIT 0x400 | |
257 | ||
f85f4585 | 258 | /* Disable use of FPRs. */ |
d14a6d05 | 259 | #define MASK_SOFT_FLOAT 0x800 |
f85f4585 | 260 | |
4d30c363 MM |
261 | /* Enable load/store multiple, even on powerpc */ |
262 | #define MASK_MULTIPLE 0x1000 | |
8a61d227 | 263 | #define MASK_MULTIPLE_SET 0x2000 |
4d30c363 | 264 | |
7e69e155 MM |
265 | /* Use string instructions for block moves */ |
266 | #define MASK_STRING 0x4000 | |
938937d8 | 267 | #define MASK_STRING_SET 0x8000 |
7e69e155 | 268 | |
4697a36c MM |
269 | /* Temporary debug switches */ |
270 | #define MASK_DEBUG_STACK 0x10000 | |
271 | #define MASK_DEBUG_ARG 0x20000 | |
272 | ||
7e69e155 MM |
273 | #define TARGET_POWER (target_flags & MASK_POWER) |
274 | #define TARGET_POWER2 (target_flags & MASK_POWER2) | |
275 | #define TARGET_POWERPC (target_flags & MASK_POWERPC) | |
276 | #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT) | |
277 | #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT) | |
278 | #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) | |
279 | #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) | |
280 | #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) | |
281 | #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) | |
282 | #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) | |
283 | #define TARGET_64BIT (target_flags & MASK_64BIT) | |
284 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) | |
285 | #define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE) | |
286 | #define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET) | |
287 | #define TARGET_STRING (target_flags & MASK_STRING) | |
938937d8 | 288 | #define TARGET_STRING_SET (target_flags & MASK_STRING_SET) |
4697a36c MM |
289 | #define TARGET_DEBUG_STACK (target_flags & MASK_DEBUG_STACK) |
290 | #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG) | |
7e69e155 | 291 | |
2f3e5814 | 292 | #define TARGET_32BIT (! TARGET_64BIT) |
7e69e155 | 293 | #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) |
d14a6d05 | 294 | |
4697a36c MM |
295 | /* Pseudo target to indicate whether the object format is ELF |
296 | (to get around not having conditional compilation in the md file) */ | |
297 | #ifndef TARGET_ELF | |
298 | #define TARGET_ELF 0 | |
299 | #endif | |
300 | ||
301 | /* If this isn't V.4, don't support -mno-toc. */ | |
302 | #ifndef TARGET_NO_TOC | |
303 | #define TARGET_NO_TOC 0 | |
304 | #define TARGET_TOC 1 | |
305 | #endif | |
306 | ||
b6c9286a MM |
307 | /* Pseudo target to say whether this is Windows NT */ |
308 | #ifndef TARGET_WINDOWS_NT | |
309 | #define TARGET_WINDOWS_NT 0 | |
310 | #endif | |
311 | ||
312 | /* Pseudo target to say whether this is MAC */ | |
313 | #ifndef TARGET_MACOS | |
314 | #define TARGET_MACOS 0 | |
315 | #endif | |
316 | ||
317 | /* Pseudo target to say whether this is AIX */ | |
318 | #ifndef TARGET_AIX | |
319 | #if (TARGET_ELF || TARGET_WINDOWS_NT || TARGET_MACOS) | |
320 | #define TARGET_AIX 0 | |
321 | #else | |
322 | #define TARGET_AIX 1 | |
323 | #endif | |
324 | #endif | |
325 | ||
fb623df5 | 326 | /* Run-time compilation parameters selecting different hardware subsets. |
f045b2c9 | 327 | |
fb623df5 | 328 | Macro to define tables used to set the flags. |
f045b2c9 RS |
329 | This is a list in braces of pairs in braces, |
330 | each pair being { "NAME", VALUE } | |
331 | where VALUE is the bits to set or minus the bits to clear. | |
332 | An empty string NAME is used to identify the default VALUE. */ | |
333 | ||
4d30c363 MM |
334 | /* This is meant to be redefined in the host dependent files */ |
335 | #ifndef SUBTARGET_SWITCHES | |
336 | #define SUBTARGET_SWITCHES | |
337 | #endif | |
338 | ||
938937d8 MM |
339 | #define TARGET_SWITCHES \ |
340 | {{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING}, \ | |
341 | {"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \ | |
342 | | MASK_POWER2)}, \ | |
343 | {"no-power2", - MASK_POWER2}, \ | |
344 | {"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \ | |
345 | | MASK_STRING)}, \ | |
346 | {"powerpc", MASK_POWERPC}, \ | |
347 | {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \ | |
348 | | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \ | |
349 | {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \ | |
350 | {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \ | |
351 | {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \ | |
352 | {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \ | |
353 | {"new-mnemonics", MASK_NEW_MNEMONICS}, \ | |
354 | {"old-mnemonics", -MASK_NEW_MNEMONICS}, \ | |
355 | {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ | |
356 | | MASK_MINIMAL_TOC)}, \ | |
357 | {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \ | |
358 | {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \ | |
359 | {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \ | |
360 | {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \ | |
361 | {"minimal-toc", MASK_MINIMAL_TOC}, \ | |
362 | {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \ | |
363 | {"no-minimal-toc", - MASK_MINIMAL_TOC}, \ | |
364 | {"hard-float", - MASK_SOFT_FLOAT}, \ | |
365 | {"soft-float", MASK_SOFT_FLOAT}, \ | |
366 | {"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET}, \ | |
367 | {"no-multiple", - MASK_MULTIPLE}, \ | |
368 | {"no-multiple", MASK_MULTIPLE_SET}, \ | |
369 | {"string", MASK_STRING | MASK_STRING_SET}, \ | |
370 | {"no-string", - MASK_STRING}, \ | |
bbdd88df | 371 | {"no-string", MASK_STRING_SET}, \ |
4697a36c MM |
372 | {"debug-stack", MASK_DEBUG_STACK}, \ |
373 | {"debug-arg", MASK_DEBUG_ARG}, \ | |
938937d8 | 374 | SUBTARGET_SWITCHES \ |
fb623df5 RK |
375 | {"", TARGET_DEFAULT}} |
376 | ||
938937d8 | 377 | #define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING) |
fb623df5 RK |
378 | |
379 | /* Processor type. */ | |
380 | enum processor_type | |
f86fe1fb | 381 | {PROCESSOR_RIOS1, |
fb623df5 | 382 | PROCESSOR_RIOS2, |
cf27b467 | 383 | PROCESSOR_MPCCORE, |
49a0b204 | 384 | PROCESSOR_PPC403, |
fb623df5 RK |
385 | PROCESSOR_PPC601, |
386 | PROCESSOR_PPC603, | |
387 | PROCESSOR_PPC604, | |
388 | PROCESSOR_PPC620}; | |
389 | ||
390 | extern enum processor_type rs6000_cpu; | |
391 | ||
392 | /* Recast the processor type to the cpu attribute. */ | |
393 | #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) | |
394 | ||
8482e358 | 395 | /* Define generic processor types based upon current deployment. */ |
8e3f41e7 | 396 | #define PROCESSOR_COMMON PROCESSOR_PPC601 |
8482e358 | 397 | #define PROCESSOR_POWER PROCESSOR_RIOS1 |
8e3f41e7 | 398 | #define PROCESSOR_POWERPC PROCESSOR_PPC604 |
6e151478 | 399 | |
fb623df5 | 400 | /* Define the default processor. This is overridden by other tm.h files. */ |
f86fe1fb | 401 | #define PROCESSOR_DEFAULT PROCESSOR_RIOS1 |
fb623df5 | 402 | |
6febd581 RK |
403 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
404 | and the old mnemonics are dialect zero. */ | |
405 | #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0 | |
406 | ||
fb623df5 RK |
407 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
408 | command options that have values. Its definition is an | |
409 | initializer with a subgrouping for each command option. | |
410 | ||
411 | Each subgrouping contains a string constant, that defines the | |
412 | fixed part of the option name, and the address of a variable. | |
413 | The variable, type `char *', is set to the variable part of the | |
414 | given option if the fixed part matches. The actual option name | |
415 | is made by appending `-m' to the specified name. | |
416 | ||
417 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
418 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
419 | will be set to the string `"512"'. | |
420 | ||
421 | extern char *m88k_short_data; | |
422 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
423 | ||
b6c9286a MM |
424 | /* This is meant to be overriden in target specific files. */ |
425 | #ifndef SUBTARGET_OPTIONS | |
426 | #define SUBTARGET_OPTIONS | |
427 | #endif | |
428 | ||
8e3f41e7 MM |
429 | #define TARGET_OPTIONS \ |
430 | { \ | |
431 | {"cpu=", &rs6000_select[1].string}, \ | |
432 | {"tune=", &rs6000_select[2].string}, \ | |
433 | SUBTARGET_OPTIONS \ | |
b6c9286a | 434 | } |
fb623df5 | 435 | |
ff222560 | 436 | /* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */ |
8e3f41e7 MM |
437 | struct rs6000_cpu_select |
438 | { | |
439 | char *string; | |
440 | char *name; | |
441 | int set_tune_p; | |
442 | int set_arch_p; | |
443 | }; | |
444 | ||
445 | extern struct rs6000_cpu_select rs6000_select[]; | |
fb623df5 RK |
446 | |
447 | /* Sometimes certain combinations of command options do not make sense | |
448 | on a particular target machine. You can define a macro | |
449 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
450 | defined, is executed once just after all the command options have | |
451 | been parsed. | |
452 | ||
453 | On the RS/6000 this is used to define the target cpu type. */ | |
454 | ||
8e3f41e7 | 455 | #define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT) |
f045b2c9 | 456 | |
4f074454 RK |
457 | /* Show we can debug even without a frame pointer. */ |
458 | #define CAN_DEBUG_WITHOUT_FP | |
f045b2c9 RS |
459 | \f |
460 | /* target machine storage layout */ | |
461 | ||
df44fa77 RK |
462 | /* Define to support cross compilation to an RS6000 target. */ |
463 | #define REAL_ARITHMETIC | |
464 | ||
13d39dbc | 465 | /* Define this macro if it is advisable to hold scalars in registers |
ef457bda RK |
466 | in a wider mode than that declared by the program. In such cases, |
467 | the value is constrained to be within the bounds of the declared | |
468 | type, but kept valid in the wider mode. The signedness of the | |
469 | extension may differ from that of the type. */ | |
470 | ||
471 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
472 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
473 | && GET_MODE_SIZE (MODE) < 4) \ | |
dac29d65 | 474 | (MODE) = SImode; |
ef457bda | 475 | |
f045b2c9 RS |
476 | /* Define this if most significant bit is lowest numbered |
477 | in instructions that operate on numbered bit-fields. */ | |
478 | /* That is true on RS/6000. */ | |
479 | #define BITS_BIG_ENDIAN 1 | |
480 | ||
481 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
482 | /* That is true on RS/6000. */ | |
483 | #define BYTES_BIG_ENDIAN 1 | |
484 | ||
485 | /* Define this if most significant word of a multiword number is lowest | |
486 | numbered. | |
487 | ||
488 | For RS/6000 we can decide arbitrarily since there are no machine | |
489 | instructions for them. Might as well be consistent with bits and bytes. */ | |
490 | #define WORDS_BIG_ENDIAN 1 | |
491 | ||
fdaff8ba | 492 | /* number of bits in an addressable storage unit */ |
f045b2c9 RS |
493 | #define BITS_PER_UNIT 8 |
494 | ||
495 | /* Width in bits of a "word", which is the contents of a machine register. | |
496 | Note that this is not necessarily the width of data type `int'; | |
497 | if using 16-bit ints on a 68000, this would still be 32. | |
498 | But on a machine with 16-bit registers, this would be 16. */ | |
2f3e5814 | 499 | #define BITS_PER_WORD (! TARGET_POWERPC64 ? 32 : 64) |
2e360ab3 | 500 | #define MAX_BITS_PER_WORD 64 |
f045b2c9 RS |
501 | |
502 | /* Width of a word, in units (bytes). */ | |
2f3e5814 | 503 | #define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8) |
ef0e53ce | 504 | #define MIN_UNITS_PER_WORD 4 |
2e360ab3 | 505 | #define UNITS_PER_FP_WORD 8 |
f045b2c9 | 506 | |
915f619f JW |
507 | /* Type used for ptrdiff_t, as a string used in a declaration. */ |
508 | #define PTRDIFF_TYPE "int" | |
509 | ||
f045b2c9 RS |
510 | /* Type used for wchar_t, as a string used in a declaration. */ |
511 | #define WCHAR_TYPE "short unsigned int" | |
512 | ||
513 | /* Width of wchar_t in bits. */ | |
514 | #define WCHAR_TYPE_SIZE 16 | |
515 | ||
9e654916 RK |
516 | /* A C expression for the size in bits of the type `short' on the |
517 | target machine. If you don't define this, the default is half a | |
518 | word. (If this would be less than one storage unit, it is | |
519 | rounded up to one unit.) */ | |
520 | #define SHORT_TYPE_SIZE 16 | |
521 | ||
522 | /* A C expression for the size in bits of the type `int' on the | |
523 | target machine. If you don't define this, the default is one | |
524 | word. */ | |
19d2d16f | 525 | #define INT_TYPE_SIZE 32 |
9e654916 RK |
526 | |
527 | /* A C expression for the size in bits of the type `long' on the | |
528 | target machine. If you don't define this, the default is one | |
529 | word. */ | |
2f3e5814 | 530 | #define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64) |
9e654916 RK |
531 | #define MAX_LONG_TYPE_SIZE 64 |
532 | ||
533 | /* A C expression for the size in bits of the type `long long' on the | |
534 | target machine. If you don't define this, the default is two | |
535 | words. */ | |
536 | #define LONG_LONG_TYPE_SIZE 64 | |
537 | ||
538 | /* A C expression for the size in bits of the type `char' on the | |
539 | target machine. If you don't define this, the default is one | |
540 | quarter of a word. (If this would be less than one storage unit, | |
541 | it is rounded up to one unit.) */ | |
542 | #define CHAR_TYPE_SIZE BITS_PER_UNIT | |
543 | ||
544 | /* A C expression for the size in bits of the type `float' on the | |
545 | target machine. If you don't define this, the default is one | |
546 | word. */ | |
547 | #define FLOAT_TYPE_SIZE 32 | |
548 | ||
549 | /* A C expression for the size in bits of the type `double' on the | |
550 | target machine. If you don't define this, the default is two | |
551 | words. */ | |
552 | #define DOUBLE_TYPE_SIZE 64 | |
553 | ||
554 | /* A C expression for the size in bits of the type `long double' on | |
555 | the target machine. If you don't define this, the default is two | |
556 | words. */ | |
557 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
558 | ||
f045b2c9 RS |
559 | /* Width in bits of a pointer. |
560 | See also the macro `Pmode' defined below. */ | |
2f3e5814 | 561 | #define POINTER_SIZE (TARGET_32BIT ? 32 : 64) |
f045b2c9 RS |
562 | |
563 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
2f3e5814 | 564 | #define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64) |
f045b2c9 RS |
565 | |
566 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
567 | #define STACK_BOUNDARY 64 | |
568 | ||
569 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
570 | #define FUNCTION_BOUNDARY 32 | |
571 | ||
572 | /* No data type wants to be aligned rounder than this. */ | |
b73fd26c DE |
573 | #define BIGGEST_ALIGNMENT 64 |
574 | ||
575 | /* AIX aligns internal doubles in structures on word boundaries. */ | |
576 | #define BIGGEST_FIELD_ALIGNMENT 32 | |
f045b2c9 RS |
577 | |
578 | /* Alignment of field after `int : 0' in a structure. */ | |
579 | #define EMPTY_FIELD_BOUNDARY 32 | |
580 | ||
581 | /* Every structure's size must be a multiple of this. */ | |
582 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
583 | ||
584 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
585 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
586 | ||
587 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
588 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
589 | (TREE_CODE (EXP) == STRING_CST \ | |
590 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
591 | ||
592 | /* Make arrays of chars word-aligned for the same reasons. */ | |
593 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
594 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
595 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
596 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
597 | ||
fdaff8ba | 598 | /* Non-zero if move instructions will actually fail to work |
f045b2c9 | 599 | when given unaligned data. */ |
fdaff8ba | 600 | #define STRICT_ALIGNMENT 0 |
f045b2c9 RS |
601 | \f |
602 | /* Standard register usage. */ | |
603 | ||
604 | /* Number of actual hardware registers. | |
605 | The hardware registers are assigned numbers for the compiler | |
606 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
607 | All registers that the compiler knows about must be given numbers, | |
608 | even those that are not normally considered general registers. | |
609 | ||
610 | RS/6000 has 32 fixed-point registers, 32 floating-point registers, | |
611 | an MQ register, a count register, a link register, and 8 condition | |
612 | register fields, which we view here as separate registers. | |
613 | ||
614 | In addition, the difference between the frame and argument pointers is | |
615 | a function of the number of registers saved, so we need to have a | |
616 | register for AP that will later be eliminated in favor of SP or FP. | |
617 | This is a normal register, but it is fixed. */ | |
618 | ||
619 | #define FIRST_PSEUDO_REGISTER 76 | |
620 | ||
621 | /* 1 for registers that have pervasive standard uses | |
622 | and are not available for the register allocator. | |
623 | ||
624 | On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer. | |
625 | ||
a127c4e5 RK |
626 | cr5 is not supposed to be used. |
627 | ||
628 | On System V implementations, r13 is fixed and not available for use. */ | |
629 | ||
630 | #ifndef FIXED_R13 | |
631 | #define FIXED_R13 0 | |
632 | #endif | |
f045b2c9 RS |
633 | |
634 | #define FIXED_REGISTERS \ | |
a127c4e5 | 635 | {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \ |
f045b2c9 RS |
636 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
637 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
638 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
639 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0} | |
640 | ||
641 | /* 1 for registers not available across function calls. | |
642 | These must include the FIXED_REGISTERS and also any | |
643 | registers that can be used without being saved. | |
644 | The latter must include the registers where values are returned | |
645 | and the register where structure-value addresses are passed. | |
646 | Aside from that, you can include as many other registers as you like. */ | |
647 | ||
648 | #define CALL_USED_REGISTERS \ | |
a127c4e5 | 649 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ |
f045b2c9 RS |
650 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
651 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ | |
652 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
653 | 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1} | |
654 | ||
655 | /* List the order in which to allocate registers. Each register must be | |
656 | listed once, even those in FIXED_REGISTERS. | |
657 | ||
658 | We allocate in the following order: | |
659 | fp0 (not saved or used for anything) | |
660 | fp13 - fp2 (not saved; incoming fp arg registers) | |
661 | fp1 (not saved; return value) | |
662 | fp31 - fp14 (saved; order given to save least number) | |
663 | cr1, cr6, cr7 (not saved or special) | |
664 | cr0 (not saved, but used for arithmetic operations) | |
665 | cr2, cr3, cr4 (saved) | |
666 | r0 (not saved; cannot be base reg) | |
667 | r9 (not saved; best for TImode) | |
668 | r11, r10, r8-r4 (not saved; highest used first to make less conflict) | |
669 | r3 (not saved; return value register) | |
670 | r31 - r13 (saved; order given to save least number) | |
671 | r12 (not saved; if used for DImode or DFmode would use r13) | |
672 | mq (not saved; best to use it if we can) | |
673 | ctr (not saved; when we have the choice ctr is better) | |
674 | lr (saved) | |
675 | cr5, r1, r2, ap (fixed) */ | |
676 | ||
677 | #define REG_ALLOC_ORDER \ | |
678 | {32, \ | |
679 | 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ | |
680 | 33, \ | |
681 | 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ | |
682 | 50, 49, 48, 47, 46, \ | |
683 | 69, 74, 75, 68, 70, 71, 72, \ | |
684 | 0, \ | |
685 | 9, 11, 10, 8, 7, 6, 5, 4, \ | |
686 | 3, \ | |
687 | 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ | |
688 | 18, 17, 16, 15, 14, 13, 12, \ | |
689 | 64, 66, 65, \ | |
690 | 73, 1, 2, 67} | |
691 | ||
692 | /* True if register is floating-point. */ | |
693 | #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) | |
694 | ||
695 | /* True if register is a condition register. */ | |
696 | #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) | |
697 | ||
698 | /* True if register is an integer register. */ | |
699 | #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67) | |
700 | ||
701 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
702 | to hold something of mode MODE. | |
703 | This is ordinarily the length in words of a value of mode MODE | |
704 | but can be less for certain modes in special long registers. | |
705 | ||
706 | On RS/6000, ordinary registers hold 32 bits worth; | |
707 | a single floating point register holds 64 bits worth. */ | |
708 | ||
709 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
710 | (FP_REGNO_P (REGNO) \ | |
2e360ab3 | 711 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 RS |
712 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
713 | ||
714 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
bdfd4e31 RK |
715 | For POWER and PowerPC, the GPRs can hold any mode, but the float |
716 | registers only can hold floating modes and DImode, and CR register only | |
717 | can hold CC modes. We cannot put TImode anywhere except general | |
718 | register and it must be able to fit within the register set. */ | |
f045b2c9 RS |
719 | |
720 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
bdfd4e31 RK |
721 | (FP_REGNO_P (REGNO) ? \ |
722 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
723 | || (GET_MODE_CLASS (MODE) == MODE_INT \ | |
2e360ab3 | 724 | && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \ |
f045b2c9 | 725 | : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ |
bdfd4e31 RK |
726 | : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ |
727 | && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ | |
f045b2c9 RS |
728 | : 1) |
729 | ||
730 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
731 | when one has mode MODE1 and one has mode MODE2. | |
732 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
733 | for any hard reg, then this must be 0 for correct output. */ | |
734 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
735 | (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
736 | ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
737 | : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
738 | ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
739 | : GET_MODE_CLASS (MODE1) == MODE_CC \ | |
740 | ? GET_MODE_CLASS (MODE2) == MODE_CC \ | |
741 | : GET_MODE_CLASS (MODE2) == MODE_CC \ | |
742 | ? GET_MODE_CLASS (MODE1) == MODE_CC \ | |
743 | : 1) | |
744 | ||
745 | /* A C expression returning the cost of moving data from a register of class | |
746 | CLASS1 to one of CLASS2. | |
747 | ||
748 | On the RS/6000, copying between floating-point and fixed-point | |
749 | registers is expensive. */ | |
750 | ||
751 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
752 | ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ | |
753 | : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ | |
754 | : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ | |
a4b970a0 | 755 | : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \ |
5119dc13 RK |
756 | || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \ |
757 | || (CLASS1) == LINK_OR_CTR_REGS) \ | |
a4b970a0 | 758 | && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \ |
5119dc13 RK |
759 | || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \ |
760 | || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \ | |
f045b2c9 RS |
761 | : 2) |
762 | ||
763 | /* A C expressions returning the cost of moving data of MODE from a register to | |
764 | or from memory. | |
765 | ||
766 | On the RS/6000, bump this up a bit. */ | |
767 | ||
ab4a5fc9 RK |
768 | #define MEMORY_MOVE_COST(MODE) \ |
769 | ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
770 | && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \ | |
771 | ? 3 : 2) \ | |
772 | + 4) | |
f045b2c9 RS |
773 | |
774 | /* Specify the cost of a branch insn; roughly the number of extra insns that | |
775 | should be added to avoid a branch. | |
776 | ||
ef457bda | 777 | Set this to 3 on the RS/6000 since that is roughly the average cost of an |
f045b2c9 RS |
778 | unscheduled conditional branch. */ |
779 | ||
ef457bda | 780 | #define BRANCH_COST 3 |
f045b2c9 | 781 | |
5a5e4c2c RK |
782 | /* A C statement (sans semicolon) to update the integer variable COST |
783 | based on the relationship between INSN that is dependent on | |
784 | DEP_INSN through the dependence LINK. The default is to make no | |
785 | adjustment to COST. On the RS/6000, ignore the cost of anti- and | |
786 | output-dependencies. In fact, output dependencies on the CR do have | |
787 | a cost, but it is probably not worthwhile to track it. */ | |
788 | ||
789 | #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ | |
b0634e74 | 790 | (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST) |
5a5e4c2c | 791 | |
6febd581 RK |
792 | /* Define this macro to change register usage conditional on target flags. |
793 | Set MQ register fixed (already call_used) if not POWER architecture | |
f85f4585 RK |
794 | (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. |
795 | Conditionally disable FPRs. */ | |
796 | ||
797 | #define CONDITIONAL_REGISTER_USAGE \ | |
798 | { \ | |
799 | if (! TARGET_POWER) \ | |
800 | fixed_regs[64] = 1; \ | |
d14a6d05 MM |
801 | if (TARGET_SOFT_FLOAT) \ |
802 | for (i = 32; i < 64; i++) \ | |
f85f4585 RK |
803 | fixed_regs[i] = call_used_regs[i] = 1; \ |
804 | } | |
6febd581 | 805 | |
f045b2c9 RS |
806 | /* Specify the registers used for certain standard purposes. |
807 | The values of these macros are register numbers. */ | |
808 | ||
809 | /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ | |
810 | /* #define PC_REGNUM */ | |
811 | ||
812 | /* Register to use for pushing function arguments. */ | |
813 | #define STACK_POINTER_REGNUM 1 | |
814 | ||
815 | /* Base register for access to local variables of the function. */ | |
816 | #define FRAME_POINTER_REGNUM 31 | |
817 | ||
818 | /* Value should be nonzero if functions must have frame pointers. | |
819 | Zero means the frame pointer need not be set up (and parms | |
820 | may be accessed via the stack pointer) in functions that seem suitable. | |
821 | This is computed in `reload', in reload1.c. */ | |
822 | #define FRAME_POINTER_REQUIRED 0 | |
823 | ||
824 | /* Base register for access to arguments of the function. */ | |
825 | #define ARG_POINTER_REGNUM 67 | |
826 | ||
827 | /* Place to put static chain when calling a function that requires it. */ | |
828 | #define STATIC_CHAIN_REGNUM 11 | |
829 | ||
b6c9286a MM |
830 | /* count register number for special purposes */ |
831 | #define COUNT_REGISTER_REGNUM 66 | |
832 | ||
f045b2c9 RS |
833 | /* Place that structure value return address is placed. |
834 | ||
835 | On the RS/6000, it is passed as an extra parameter. */ | |
836 | #define STRUCT_VALUE 0 | |
837 | \f | |
838 | /* Define the classes of registers for register constraints in the | |
839 | machine description. Also define ranges of constants. | |
840 | ||
841 | One of the classes must always be named ALL_REGS and include all hard regs. | |
842 | If there is more than one class, another class must be named NO_REGS | |
843 | and contain no registers. | |
844 | ||
845 | The name GENERAL_REGS must be the name of a class (or an alias for | |
846 | another name such as ALL_REGS). This is the class of registers | |
847 | that is allowed by "g" or "r" in a register constraint. | |
848 | Also, registers outside this class are allocated only when | |
849 | instructions express preferences for them. | |
850 | ||
851 | The classes must be numbered in nondecreasing order; that is, | |
852 | a larger-numbered class must never be contained completely | |
853 | in a smaller-numbered class. | |
854 | ||
855 | For any two classes, it is very desirable that there be another | |
856 | class that represents their union. */ | |
857 | ||
858 | /* The RS/6000 has three types of registers, fixed-point, floating-point, | |
859 | and condition registers, plus three special registers, MQ, CTR, and the | |
860 | link register. | |
861 | ||
862 | However, r0 is special in that it cannot be used as a base register. | |
863 | So make a class for registers valid as base registers. | |
864 | ||
865 | Also, cr0 is the only condition code register that can be used in | |
fada905b | 866 | arithmetic insns, so make a separate class for it. */ |
f045b2c9 | 867 | |
ebedb4dd MM |
868 | enum reg_class |
869 | { | |
870 | NO_REGS, | |
ebedb4dd MM |
871 | BASE_REGS, |
872 | GENERAL_REGS, | |
873 | FLOAT_REGS, | |
874 | NON_SPECIAL_REGS, | |
875 | MQ_REGS, | |
876 | LINK_REGS, | |
877 | CTR_REGS, | |
878 | LINK_OR_CTR_REGS, | |
879 | SPECIAL_REGS, | |
880 | SPEC_OR_GEN_REGS, | |
881 | CR0_REGS, | |
ebedb4dd MM |
882 | CR_REGS, |
883 | NON_FLOAT_REGS, | |
884 | ALL_REGS, | |
885 | LIM_REG_CLASSES | |
886 | }; | |
f045b2c9 RS |
887 | |
888 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
889 | ||
890 | /* Give names of register classes as strings for dump file. */ | |
891 | ||
ebedb4dd MM |
892 | #define REG_CLASS_NAMES \ |
893 | { \ | |
894 | "NO_REGS", \ | |
ebedb4dd MM |
895 | "BASE_REGS", \ |
896 | "GENERAL_REGS", \ | |
897 | "FLOAT_REGS", \ | |
898 | "NON_SPECIAL_REGS", \ | |
899 | "MQ_REGS", \ | |
900 | "LINK_REGS", \ | |
901 | "CTR_REGS", \ | |
902 | "LINK_OR_CTR_REGS", \ | |
903 | "SPECIAL_REGS", \ | |
904 | "SPEC_OR_GEN_REGS", \ | |
905 | "CR0_REGS", \ | |
ebedb4dd MM |
906 | "CR_REGS", \ |
907 | "NON_FLOAT_REGS", \ | |
908 | "ALL_REGS" \ | |
909 | } | |
f045b2c9 RS |
910 | |
911 | /* Define which registers fit in which classes. | |
912 | This is an initializer for a vector of HARD_REG_SET | |
913 | of length N_REG_CLASSES. */ | |
914 | ||
ebedb4dd MM |
915 | #define REG_CLASS_CONTENTS \ |
916 | { \ | |
917 | { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ | |
ebedb4dd MM |
918 | { 0xfffffffe, 0x00000000, 0x00000008 }, /* BASE_REGS */ \ |
919 | { 0xffffffff, 0x00000000, 0x00000008 }, /* GENERAL_REGS */ \ | |
920 | { 0x00000000, 0xffffffff, 0x00000000 }, /* FLOAT_REGS */ \ | |
921 | { 0xffffffff, 0xffffffff, 0x00000008 }, /* NON_SPECIAL_REGS */ \ | |
922 | { 0x00000000, 0x00000000, 0x00000001 }, /* MQ_REGS */ \ | |
923 | { 0x00000000, 0x00000000, 0x00000002 }, /* LINK_REGS */ \ | |
924 | { 0x00000000, 0x00000000, 0x00000004 }, /* CTR_REGS */ \ | |
925 | { 0x00000000, 0x00000000, 0x00000006 }, /* LINK_OR_CTR_REGS */ \ | |
926 | { 0x00000000, 0x00000000, 0x00000007 }, /* SPECIAL_REGS */ \ | |
927 | { 0xffffffff, 0x00000000, 0x0000000f }, /* SPEC_OR_GEN_REGS */ \ | |
928 | { 0x00000000, 0x00000000, 0x00000010 }, /* CR0_REGS */ \ | |
ebedb4dd MM |
929 | { 0x00000000, 0x00000000, 0x00000ff0 }, /* CR_REGS */ \ |
930 | { 0xffffffff, 0x00000000, 0x0000ffff }, /* NON_FLOAT_REGS */ \ | |
931 | { 0xffffffff, 0xffffffff, 0x0000ffff } /* ALL_REGS */ \ | |
932 | } | |
f045b2c9 RS |
933 | |
934 | /* The same information, inverted: | |
935 | Return the class number of the smallest class containing | |
936 | reg number REGNO. This could be a conditional expression | |
937 | or could index an array. */ | |
938 | ||
939 | #define REGNO_REG_CLASS(REGNO) \ | |
fada905b | 940 | ((REGNO) == 0 ? GENERAL_REGS \ |
f045b2c9 RS |
941 | : (REGNO) < 32 ? BASE_REGS \ |
942 | : FP_REGNO_P (REGNO) ? FLOAT_REGS \ | |
943 | : (REGNO) == 68 ? CR0_REGS \ | |
944 | : CR_REGNO_P (REGNO) ? CR_REGS \ | |
945 | : (REGNO) == 64 ? MQ_REGS \ | |
946 | : (REGNO) == 65 ? LINK_REGS \ | |
947 | : (REGNO) == 66 ? CTR_REGS \ | |
948 | : (REGNO) == 67 ? BASE_REGS \ | |
949 | : NO_REGS) | |
950 | ||
951 | /* The class value for index registers, and the one for base regs. */ | |
952 | #define INDEX_REG_CLASS GENERAL_REGS | |
953 | #define BASE_REG_CLASS BASE_REGS | |
954 | ||
955 | /* Get reg_class from a letter such as appears in the machine description. */ | |
956 | ||
957 | #define REG_CLASS_FROM_LETTER(C) \ | |
958 | ((C) == 'f' ? FLOAT_REGS \ | |
959 | : (C) == 'b' ? BASE_REGS \ | |
960 | : (C) == 'h' ? SPECIAL_REGS \ | |
961 | : (C) == 'q' ? MQ_REGS \ | |
962 | : (C) == 'c' ? CTR_REGS \ | |
963 | : (C) == 'l' ? LINK_REGS \ | |
964 | : (C) == 'x' ? CR0_REGS \ | |
965 | : (C) == 'y' ? CR_REGS \ | |
966 | : NO_REGS) | |
967 | ||
968 | /* The letters I, J, K, L, M, N, and P in a register constraint string | |
969 | can be used to stand for particular ranges of immediate operands. | |
970 | This macro defines what the ranges are. | |
971 | C is the letter, and VALUE is a constant value. | |
972 | Return 1 if VALUE is in the range specified by C. | |
973 | ||
974 | `I' is signed 16-bit constants | |
975 | `J' is a constant with only the high-order 16 bits non-zero | |
976 | `K' is a constant with only the low-order 16 bits non-zero | |
977 | `L' is a constant that can be placed into a mask operand | |
978 | `M' is a constant that is greater than 31 | |
979 | `N' is a constant that is an exact power of two | |
980 | `O' is the constant zero | |
981 | `P' is a constant whose negation is a signed 16-bit constant */ | |
982 | ||
983 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
984 | ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \ | |
985 | : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \ | |
986 | : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \ | |
987 | : (C) == 'L' ? mask_constant (VALUE) \ | |
988 | : (C) == 'M' ? (VALUE) > 31 \ | |
989 | : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ | |
990 | : (C) == 'O' ? (VALUE) == 0 \ | |
991 | : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \ | |
992 | : 0) | |
993 | ||
994 | /* Similar, but for floating constants, and defining letters G and H. | |
995 | Here VALUE is the CONST_DOUBLE rtx itself. | |
996 | ||
997 | We flag for special constants when we can copy the constant into | |
4e74d8ec | 998 | a general register in two insns for DF/DI and one insn for SF. |
f045b2c9 | 999 | |
4e74d8ec MM |
1000 | 'H' is used for DI constants that take 3 insns. */ |
1001 | ||
1002 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
1003 | ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : \ | |
1004 | (C) == 'H' ? (num_insns_constant (VALUE, DImode) == 3) : \ | |
1005 | 0) | |
f045b2c9 RS |
1006 | |
1007 | /* Optional extra constraints for this machine. | |
1008 | ||
b6c9286a MM |
1009 | 'Q' means that is a memory operand that is just an offset from a reg. |
1010 | 'R' is for AIX TOC entries. | |
1011 | 'S' is for Windows NT SYMBOL_REFs | |
88228c4b MM |
1012 | 'T' is for Windows NT LABEL_REFs. |
1013 | 'U' is for V.4 small data references. */ | |
f045b2c9 | 1014 | |
e8a8bc24 RK |
1015 | #define EXTRA_CONSTRAINT(OP, C) \ |
1016 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ | |
d537c24d | 1017 | : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \ |
b6c9286a MM |
1018 | : (C) == 'S' ? (TARGET_WINDOWS_NT && DEFAULT_ABI == ABI_NT && GET_CODE (OP) == SYMBOL_REF)\ |
1019 | : (C) == 'T' ? (TARGET_WINDOWS_NT && DEFAULT_ABI == ABI_NT && GET_CODE (OP) == LABEL_REF) \ | |
88228c4b | 1020 | : (C) == 'U' ? (DEFAULT_ABI == ABI_V4 && small_data_operand (OP, GET_MODE (OP))) \ |
e8a8bc24 | 1021 | : 0) |
f045b2c9 RS |
1022 | |
1023 | /* Given an rtx X being reloaded into a reg required to be | |
1024 | in class CLASS, return the class of reg to actually use. | |
1025 | In general this is just CLASS; but on some machines | |
1026 | in some cases it is preferable to use a more restrictive class. | |
1027 | ||
1028 | On the RS/6000, we have to return NO_REGS when we want to reload a | |
1029 | floating-point CONST_DOUBLE to force it to be copied to memory. */ | |
1030 | ||
1031 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
1032 | ((GET_CODE (X) == CONST_DOUBLE \ | |
1033 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1034 | ? NO_REGS : (CLASS)) | |
1035 | ||
1036 | /* Return the register class of a scratch register needed to copy IN into | |
1037 | or out of a register in CLASS in MODE. If it can be done directly, | |
1038 | NO_REGS is returned. */ | |
1039 | ||
1040 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
1041 | secondary_reload_class (CLASS, MODE, IN) | |
1042 | ||
7ea555a4 RK |
1043 | /* If we are copying between FP registers and anything else, we need a memory |
1044 | location. */ | |
1045 | ||
1046 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ | |
1047 | ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS)) | |
1048 | ||
f045b2c9 RS |
1049 | /* Return the maximum number of consecutive registers |
1050 | needed to represent mode MODE in a register of class CLASS. | |
1051 | ||
1052 | On RS/6000, this is the size of MODE in words, | |
1053 | except in the FP regs, where a single reg is enough for two words. */ | |
1054 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
1055 | ((CLASS) == FLOAT_REGS \ | |
2e360ab3 | 1056 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 | 1057 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
580d3230 RK |
1058 | |
1059 | /* If defined, gives a class of registers that cannot be used as the | |
1060 | operand of a SUBREG that changes the size of the object. */ | |
1061 | ||
1062 | #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS | |
f045b2c9 RS |
1063 | \f |
1064 | /* Stack layout; function entry, exit and calling. */ | |
1065 | ||
6b67933e RK |
1066 | /* Enumeration to give which calling sequence to use. */ |
1067 | enum rs6000_abi { | |
1068 | ABI_NONE, | |
1069 | ABI_AIX, /* IBM's AIX */ | |
b6c9286a MM |
1070 | ABI_AIX_NODESC, /* AIX calling sequence minus function descriptors */ |
1071 | ABI_V4, /* System V.4/eabi */ | |
1072 | ABI_NT /* Windows/NT */ | |
6b67933e RK |
1073 | }; |
1074 | ||
b6c9286a MM |
1075 | extern enum rs6000_abi rs6000_current_abi; /* available for use by subtarget */ |
1076 | ||
1077 | /* Default ABI to compile code for */ | |
1078 | #ifndef DEFAULT_ABI | |
1079 | #define DEFAULT_ABI ABI_AIX | |
1080 | #endif | |
1081 | ||
4697a36c MM |
1082 | /* Structure used to define the rs6000 stack */ |
1083 | typedef struct rs6000_stack { | |
1084 | int first_gp_reg_save; /* first callee saved GP register used */ | |
1085 | int first_fp_reg_save; /* first callee saved FP register used */ | |
1086 | int lr_save_p; /* true if the link reg needs to be saved */ | |
1087 | int cr_save_p; /* true if the CR reg needs to be saved */ | |
b6c9286a | 1088 | int toc_save_p; /* true if the TOC needs to be saved */ |
4697a36c MM |
1089 | int push_p; /* true if we need to allocate stack space */ |
1090 | int calls_p; /* true if the function makes any calls */ | |
b6c9286a MM |
1091 | int main_p; /* true if this is main */ |
1092 | int main_save_p; /* true if this is main and we need to save args */ | |
6b67933e | 1093 | enum rs6000_abi abi; /* which ABI to use */ |
abc95ed3 RK |
1094 | int gp_save_offset; /* offset to save GP regs from initial SP */ |
1095 | int fp_save_offset; /* offset to save FP regs from initial SP */ | |
4697a36c MM |
1096 | int lr_save_offset; /* offset to save LR from initial SP */ |
1097 | int cr_save_offset; /* offset to save CR from initial SP */ | |
b6c9286a | 1098 | int toc_save_offset; /* offset to save the TOC pointer */ |
4697a36c | 1099 | int varargs_save_offset; /* offset to save the varargs registers */ |
b6c9286a | 1100 | int main_save_offset; /* offset to save main's args */ |
4697a36c MM |
1101 | int reg_size; /* register size (4 or 8) */ |
1102 | int varargs_size; /* size to hold V.4 args passed in regs */ | |
1103 | int vars_size; /* variable save area size */ | |
1104 | int parm_size; /* outgoing parameter size */ | |
b6c9286a | 1105 | int main_size; /* size to hold saving main's args */ |
4697a36c MM |
1106 | int save_size; /* save area size */ |
1107 | int fixed_size; /* fixed size of stack frame */ | |
1108 | int gp_size; /* size of saved GP registers */ | |
1109 | int fp_size; /* size of saved FP registers */ | |
1110 | int cr_size; /* size to hold CR if not in save_size */ | |
b6c9286a MM |
1111 | int lr_size; /* size to hold LR if not in save_size */ |
1112 | int toc_size; /* size to hold TOC if not in save_size */ | |
4697a36c MM |
1113 | int total_size; /* total bytes allocated for stack */ |
1114 | } rs6000_stack_t; | |
1115 | ||
f045b2c9 RS |
1116 | /* Define this if pushing a word on the stack |
1117 | makes the stack pointer a smaller address. */ | |
1118 | #define STACK_GROWS_DOWNWARD | |
1119 | ||
1120 | /* Define this if the nominal address of the stack frame | |
1121 | is at the high-address end of the local variables; | |
1122 | that is, each additional local variable allocated | |
1123 | goes at a more negative offset in the frame. | |
1124 | ||
1125 | On the RS/6000, we grow upwards, from the area after the outgoing | |
1126 | arguments. */ | |
1127 | /* #define FRAME_GROWS_DOWNWARD */ | |
1128 | ||
4697a36c | 1129 | /* Size of the outgoing register save area */ |
2f3e5814 | 1130 | #define RS6000_REG_SAVE (TARGET_32BIT ? 32 : 64) |
4697a36c MM |
1131 | |
1132 | /* Size of the fixed area on the stack */ | |
2f3e5814 | 1133 | #define RS6000_SAVE_AREA (TARGET_32BIT ? 24 : 48) |
4697a36c | 1134 | |
b6c9286a MM |
1135 | /* Address to save the TOC register */ |
1136 | #define RS6000_SAVE_TOC plus_constant (stack_pointer_rtx, 20) | |
1137 | ||
1138 | /* Whether a separate TOC save area is needed */ | |
1139 | extern int rs6000_save_toc_p; | |
1140 | ||
4697a36c MM |
1141 | /* Size of the V.4 varargs area if needed */ |
1142 | #define RS6000_VARARGS_AREA 0 | |
1143 | ||
1144 | /* Whether a V.4 varargs area is needed */ | |
1145 | extern int rs6000_sysv_varargs_p; | |
1146 | ||
1147 | /* Align an address */ | |
1148 | #define ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1)) | |
1149 | ||
1150 | /* Size of V.4 varargs area in bytes */ | |
1151 | #define RS6000_VARARGS_SIZE \ | |
2f3e5814 | 1152 | ((GP_ARG_NUM_REG * (TARGET_32BIT ? 4 : 8)) + (FP_ARG_NUM_REG * 8) + 8) |
4697a36c MM |
1153 | |
1154 | /* Offset of V.4 varargs area */ | |
1155 | #define RS6000_VARARGS_OFFSET \ | |
1156 | (ALIGN (current_function_outgoing_args_size, 8) + RS6000_SAVE_AREA) | |
1157 | ||
f045b2c9 RS |
1158 | /* Offset within stack frame to start allocating local variables at. |
1159 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
1160 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
1161 | of the first local allocated. | |
1162 | ||
1163 | On the RS/6000, the frame pointer is the same as the stack pointer, | |
1164 | except for dynamic allocations. So we start after the fixed area and | |
1165 | outgoing parameter area. */ | |
1166 | ||
4697a36c MM |
1167 | #define STARTING_FRAME_OFFSET (ALIGN (current_function_outgoing_args_size, 8) \ |
1168 | + RS6000_VARARGS_AREA \ | |
1169 | + RS6000_SAVE_AREA) | |
f045b2c9 RS |
1170 | |
1171 | /* If we generate an insn to push BYTES bytes, | |
1172 | this says how many the stack pointer really advances by. | |
1173 | On RS/6000, don't define this because there are no push insns. */ | |
1174 | /* #define PUSH_ROUNDING(BYTES) */ | |
1175 | ||
1176 | /* Offset of first parameter from the argument pointer register value. | |
1177 | On the RS/6000, we define the argument pointer to the start of the fixed | |
1178 | area. */ | |
4697a36c | 1179 | #define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA |
f045b2c9 RS |
1180 | |
1181 | /* Define this if stack space is still allocated for a parameter passed | |
1182 | in a register. The value is the number of bytes allocated to this | |
1183 | area. */ | |
4697a36c | 1184 | #define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE |
f045b2c9 RS |
1185 | |
1186 | /* Define this if the above stack space is to be considered part of the | |
1187 | space allocated by the caller. */ | |
1188 | #define OUTGOING_REG_PARM_STACK_SPACE | |
1189 | ||
1190 | /* This is the difference between the logical top of stack and the actual sp. | |
1191 | ||
1192 | For the RS/6000, sp points past the fixed area. */ | |
4697a36c | 1193 | #define STACK_POINTER_OFFSET RS6000_SAVE_AREA |
f045b2c9 RS |
1194 | |
1195 | /* Define this if the maximum size of all the outgoing args is to be | |
1196 | accumulated and pushed during the prologue. The amount can be | |
1197 | found in the variable current_function_outgoing_args_size. */ | |
1198 | #define ACCUMULATE_OUTGOING_ARGS | |
1199 | ||
1200 | /* Value is the number of bytes of arguments automatically | |
1201 | popped when returning from a subroutine call. | |
8b109b37 | 1202 | FUNDECL is the declaration node of the function (as a tree), |
f045b2c9 RS |
1203 | FUNTYPE is the data type of the function (as a tree), |
1204 | or for a library call it is an identifier node for the subroutine name. | |
1205 | SIZE is the number of bytes of arguments passed on the stack. */ | |
1206 | ||
8b109b37 | 1207 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
f045b2c9 RS |
1208 | |
1209 | /* Define how to find the value returned by a function. | |
1210 | VALTYPE is the data type of the value (as a tree). | |
1211 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
1212 | otherwise, FUNC is 0. | |
1213 | ||
1214 | On RS/6000 an integer value is in r3 and a floating-point value is in | |
d14a6d05 | 1215 | fp1, unless -msoft-float. */ |
f045b2c9 RS |
1216 | |
1217 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
1218 | gen_rtx (REG, TYPE_MODE (VALTYPE), \ | |
d14a6d05 | 1219 | TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) |
f045b2c9 RS |
1220 | |
1221 | /* Define how to find the value returned by a library function | |
1222 | assuming the value has mode MODE. */ | |
1223 | ||
1224 | #define LIBCALL_VALUE(MODE) \ | |
d14a6d05 | 1225 | gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) |
f045b2c9 RS |
1226 | |
1227 | /* The definition of this macro implies that there are cases where | |
1228 | a scalar value cannot be returned in registers. | |
1229 | ||
1230 | For the RS/6000, any structure or union type is returned in memory. */ | |
1231 | ||
1232 | #define RETURN_IN_MEMORY(TYPE) \ | |
e419152d | 1233 | (TYPE_MODE (TYPE) == BLKmode) |
f045b2c9 | 1234 | |
4697a36c MM |
1235 | /* Minimum and maximum general purpose registers used to hold arguments. */ |
1236 | #define GP_ARG_MIN_REG 3 | |
1237 | #define GP_ARG_MAX_REG 10 | |
1238 | #define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1) | |
1239 | ||
1240 | /* Minimum and maximum floating point registers used to hold arguments. */ | |
1241 | #define FP_ARG_MIN_REG 33 | |
7509c759 MM |
1242 | #define FP_ARG_AIX_MAX_REG 45 |
1243 | #define FP_ARG_V4_MAX_REG 40 | |
1244 | #define FP_ARG_MAX_REG FP_ARG_AIX_MAX_REG | |
4697a36c MM |
1245 | #define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1) |
1246 | ||
1247 | /* Return registers */ | |
1248 | #define GP_ARG_RETURN GP_ARG_MIN_REG | |
1249 | #define FP_ARG_RETURN FP_ARG_MIN_REG | |
1250 | ||
7509c759 | 1251 | /* Flags for the call/call_value rtl operations set up by function_arg */ |
6a4cee5f MM |
1252 | #define CALL_NORMAL 0x00000000 /* no special processing */ |
1253 | #define CALL_NT_DLLIMPORT 0x00000001 /* NT, this is a DLL import call */ | |
1254 | #define CALL_V4_CLEAR_FP_ARGS 0x00000002 /* V.4, no FP args passed */ | |
1255 | #define CALL_V4_SET_FP_ARGS 0x00000004 /* V.4, FP args were passed */ | |
1256 | #define CALL_LONG 0x00000008 /* always call indirect */ | |
7509c759 | 1257 | |
4697a36c MM |
1258 | /* Define cutoff for using external functions to save floating point */ |
1259 | #define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63) | |
1260 | ||
f045b2c9 RS |
1261 | /* 1 if N is a possible register number for a function value |
1262 | as seen by the caller. | |
1263 | ||
1264 | On RS/6000, this is r3 and fp1. */ | |
4697a36c | 1265 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_ARG_RETURN || ((N) == FP_ARG_RETURN)) |
f045b2c9 RS |
1266 | |
1267 | /* 1 if N is a possible register number for function argument passing. | |
1268 | On RS/6000, these are r3-r10 and fp1-fp13. */ | |
4697a36c MM |
1269 | #define FUNCTION_ARG_REGNO_P(N) \ |
1270 | (((unsigned)((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG)) \ | |
1271 | || ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG))) | |
f045b2c9 | 1272 | |
f045b2c9 RS |
1273 | \f |
1274 | /* Define a data type for recording info about an argument list | |
1275 | during the scan of that argument list. This data type should | |
1276 | hold all necessary information about the function itself | |
1277 | and about the args processed so far, enough to enable macros | |
1278 | such as FUNCTION_ARG to determine where the next arg should go. | |
1279 | ||
1280 | On the RS/6000, this is a structure. The first element is the number of | |
1281 | total argument words, the second is used to store the next | |
1282 | floating-point register number, and the third says how many more args we | |
4697a36c MM |
1283 | have prototype types for. |
1284 | ||
1285 | The System V.4 varargs/stdarg support requires that this structure's size | |
1286 | be a multiple of sizeof(int), and that WORDS, FREGNO, NARGS_PROTOTYPE, | |
1287 | ORIG_NARGS, and VARARGS_OFFSET be the first five ints. */ | |
1288 | ||
1289 | typedef struct rs6000_args | |
1290 | { | |
6a4cee5f MM |
1291 | int words; /* # words uses for passing GP registers */ |
1292 | int fregno; /* next available FP register */ | |
1293 | int nargs_prototype; /* # args left in the current prototype */ | |
1294 | int orig_nargs; /* Original value of nargs_prototype */ | |
1295 | int varargs_offset; /* offset of the varargs save area */ | |
1296 | int prototype; /* Whether a prototype was defined */ | |
1297 | int call_cookie; /* Do special things for this call */ | |
4697a36c | 1298 | } CUMULATIVE_ARGS; |
f045b2c9 RS |
1299 | |
1300 | /* Define intermediate macro to compute the size (in registers) of an argument | |
1301 | for the RS/6000. */ | |
1302 | ||
1303 | #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \ | |
1304 | (! (NAMED) ? 0 \ | |
1305 | : (MODE) != BLKmode \ | |
1306 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
1307 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
1308 | ||
1309 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1310 | for a call to a function whose data type is FNTYPE. | |
1311 | For a library call, FNTYPE is 0. */ | |
1312 | ||
4697a36c MM |
1313 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ |
1314 | init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE) | |
f045b2c9 RS |
1315 | |
1316 | /* Similar, but when scanning the definition of a procedure. We always | |
1317 | set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ | |
1318 | ||
4697a36c MM |
1319 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,LIBNAME) \ |
1320 | init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE) | |
f045b2c9 RS |
1321 | |
1322 | /* Update the data in CUM to advance over an argument | |
1323 | of mode MODE and data type TYPE. | |
1324 | (TYPE is null for libcalls where that information may not be available.) */ | |
1325 | ||
1326 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
4697a36c | 1327 | function_arg_advance (&CUM, MODE, TYPE, NAMED) |
f045b2c9 RS |
1328 | |
1329 | /* Non-zero if we can use a floating-point register to pass this arg. */ | |
4697a36c MM |
1330 | #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ |
1331 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1332 | && (CUM).fregno <= FP_ARG_MAX_REG \ | |
1333 | && TARGET_HARD_FLOAT) | |
f045b2c9 RS |
1334 | |
1335 | /* Determine where to put an argument to a function. | |
1336 | Value is zero to push the argument on the stack, | |
1337 | or a hard register in which to store the argument. | |
1338 | ||
1339 | MODE is the argument's machine mode. | |
1340 | TYPE is the data type of the argument (as a tree). | |
1341 | This is null for libcalls where that information may | |
1342 | not be available. | |
1343 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1344 | the preceding args and about the function being called. | |
1345 | NAMED is nonzero if this argument is a named parameter | |
1346 | (otherwise it is an extra parameter matching an ellipsis). | |
1347 | ||
1348 | On RS/6000 the first eight words of non-FP are normally in registers | |
1349 | and the rest are pushed. The first 13 FP args are in registers. | |
1350 | ||
1351 | If this is floating-point and no prototype is specified, we use | |
4d6697ca RK |
1352 | both an FP and integer register (or possibly FP reg and stack). Library |
1353 | functions (when TYPE is zero) always have the proper types for args, | |
1354 | so we can pass the FP value just in one register. emit_library_function | |
1355 | doesn't support EXPR_LIST anyway. */ | |
f045b2c9 | 1356 | |
4697a36c MM |
1357 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
1358 | function_arg (&CUM, MODE, TYPE, NAMED) | |
f045b2c9 RS |
1359 | |
1360 | /* For an arg passed partly in registers and partly in memory, | |
1361 | this is the number of registers used. | |
1362 | For args passed entirely in registers or entirely in memory, zero. */ | |
1363 | ||
4697a36c MM |
1364 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ |
1365 | function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
1366 | ||
1367 | /* A C expression that indicates when an argument must be passed by | |
1368 | reference. If nonzero for an argument, a copy of that argument is | |
1369 | made in memory and a pointer to the argument is passed instead of | |
1370 | the argument itself. The pointer is passed in whatever way is | |
1371 | appropriate for passing a pointer to that type. */ | |
1372 | ||
1373 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
1374 | function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED) | |
f045b2c9 | 1375 | |
b6c9286a MM |
1376 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1377 | of an argument with the specified mode and type. If it is not defined, | |
1378 | PARM_BOUNDARY is used for all arguments. */ | |
1379 | ||
1380 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1381 | function_arg_boundary (MODE, TYPE) | |
1382 | ||
f045b2c9 RS |
1383 | /* Perform any needed actions needed for a function that is receiving a |
1384 | variable number of arguments. | |
1385 | ||
1386 | CUM is as above. | |
1387 | ||
1388 | MODE and TYPE are the mode and type of the current parameter. | |
1389 | ||
1390 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1391 | that must be pushed by the prolog to pretend that our caller pushed | |
1392 | it. | |
1393 | ||
1394 | Normally, this macro will push all remaining incoming registers on the | |
1395 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1396 | ||
4697a36c MM |
1397 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ |
1398 | setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL) | |
1399 | ||
1400 | /* If defined, is a C expression that produces the machine-specific | |
1401 | code for a call to `__builtin_saveregs'. This code will be moved | |
1402 | to the very beginning of the function, before any parameter access | |
1403 | are made. The return value of this function should be an RTX that | |
1404 | contains the value to use as the return of `__builtin_saveregs'. | |
1405 | ||
1406 | The argument ARGS is a `tree_list' containing the arguments that | |
1407 | were passed to `__builtin_saveregs'. | |
1408 | ||
1409 | If this macro is not defined, the compiler will output an ordinary | |
1410 | call to the library function `__builtin_saveregs'. */ | |
1411 | ||
1412 | #define EXPAND_BUILTIN_SAVEREGS(ARGS) \ | |
1413 | expand_builtin_saveregs (ARGS) | |
f045b2c9 RS |
1414 | |
1415 | /* This macro generates the assembly code for function entry. | |
1416 | FILE is a stdio stream to output the code to. | |
1417 | SIZE is an int: how many units of temporary storage to allocate. | |
1418 | Refer to the array `regs_ever_live' to determine which registers | |
1419 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1420 | is ever used in the function. This macro is responsible for | |
1421 | knowing which registers should not be saved even if used. */ | |
1422 | ||
1423 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
1424 | ||
1425 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
58a39e45 | 1426 | for profiling a function entry. */ |
f045b2c9 RS |
1427 | |
1428 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
58a39e45 | 1429 | output_function_profiler ((FILE), (LABELNO)); |
f045b2c9 RS |
1430 | |
1431 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1432 | the stack pointer does not matter. No definition is equivalent to | |
1433 | always zero. | |
1434 | ||
1435 | On the RS/6000, this is non-zero because we can restore the stack from | |
1436 | its backpointer, which we maintain. */ | |
1437 | #define EXIT_IGNORE_STACK 1 | |
1438 | ||
1439 | /* This macro generates the assembly code for function exit, | |
1440 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1441 | then individual return instructions are generated for each | |
1442 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1443 | ||
1444 | The function epilogue should not depend on the current stack pointer! | |
1445 | It should use the frame pointer only. This is mandatory because | |
1446 | of alloca; we also take advantage of it to omit stack adjustments | |
1447 | before returning. */ | |
1448 | ||
1449 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
1450 | \f | |
1451 | /* Output assembler code for a block containing the constant parts | |
1452 | of a trampoline, leaving space for the variable parts. | |
1453 | ||
1454 | The trampoline should set the static chain pointer to value placed | |
b6c9286a MM |
1455 | into the trampoline and should branch to the specified routine. */ |
1456 | #define TRAMPOLINE_TEMPLATE(FILE) rs6000_trampoline_template (FILE) | |
f045b2c9 RS |
1457 | |
1458 | /* Length in units of the trampoline for entering a nested function. */ | |
1459 | ||
b6c9286a | 1460 | #define TRAMPOLINE_SIZE rs6000_trampoline_size () |
f045b2c9 RS |
1461 | |
1462 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1463 | FNADDR is an RTX for the address of the function's pure code. | |
1464 | CXT is an RTX for the static chain value for the function. */ | |
1465 | ||
1466 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
b6c9286a | 1467 | rs6000_initialize_trampoline (ADDR, FNADDR, CXT) |
f045b2c9 | 1468 | \f |
7509c759 MM |
1469 | /* If defined, a C expression whose value is nonzero if IDENTIFIER |
1470 | with arguments ARGS is a valid machine specific attribute for DECL. | |
1471 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
1472 | ||
1473 | #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \ | |
1474 | (rs6000_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS)) | |
1475 | ||
1476 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
1477 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
1478 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
1479 | ||
1480 | #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \ | |
1481 | (rs6000_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS)) | |
1482 | ||
1483 | /* If defined, a C expression whose value is zero if the attributes on | |
1484 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
1485 | two if they are nearly compatible (which causes a warning to be | |
1486 | generated). */ | |
1487 | ||
1488 | #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \ | |
1489 | (rs6000_comp_type_attributes (TYPE1, TYPE2)) | |
1490 | ||
1491 | /* If defined, a C statement that assigns default attributes to newly | |
1492 | defined TYPE. */ | |
1493 | ||
1494 | #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \ | |
1495 | (rs6000_set_default_type_attributes (TYPE)) | |
1496 | ||
1497 | \f | |
f33985c6 MS |
1498 | /* Definitions for __builtin_return_address and __builtin_frame_address. |
1499 | __builtin_return_address (0) should give link register (65), enable | |
1500 | this. */ | |
1501 | /* This should be uncommented, so that the link register is used, but | |
1502 | currently this would result in unmatched insns and spilling fixed | |
1503 | registers so we'll leave it for another day. When these problems are | |
1504 | taken care of one additional fetch will be necessary in RETURN_ADDR_RTX. | |
1505 | (mrs) */ | |
1506 | /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
f09d4c33 | 1507 | |
b6c9286a MM |
1508 | /* Number of bytes into the frame return addresses can be found. See |
1509 | rs6000_stack_info in rs6000.c for more information on how the different | |
1510 | abi's store the return address. */ | |
1511 | #define RETURN_ADDRESS_OFFSET \ | |
1512 | ((DEFAULT_ABI == ABI_AIX \ | |
1513 | || DEFAULT_ABI == ABI_AIX_NODESC) ? 8 : \ | |
2f3e5814 | 1514 | (DEFAULT_ABI == ABI_V4) ? (TARGET_32BIT ? 4 : 8) : \ |
b6c9286a MM |
1515 | (DEFAULT_ABI == ABI_NT) ? -4 : \ |
1516 | (fatal ("RETURN_ADDRESS_OFFSET not supported"), 0)) | |
f09d4c33 | 1517 | |
f33985c6 MS |
1518 | /* The current return address is in link register (65). The return address |
1519 | of anything farther back is accessed normally at an offset of 8 from the | |
1520 | frame pointer. */ | |
1521 | #define RETURN_ADDR_RTX(count, frame) \ | |
1522 | ((count == -1) \ | |
1523 | ? gen_rtx (REG, Pmode, 65) \ | |
f09d4c33 RK |
1524 | : gen_rtx (MEM, Pmode, \ |
1525 | memory_address (Pmode, \ | |
1526 | plus_constant (copy_to_reg (gen_rtx (MEM, Pmode, \ | |
1527 | memory_address (Pmode, frame))), \ | |
1528 | RETURN_ADDRESS_OFFSET)))) | |
f33985c6 | 1529 | \f |
f045b2c9 RS |
1530 | /* Definitions for register eliminations. |
1531 | ||
1532 | We have two registers that can be eliminated on the RS/6000. First, the | |
1533 | frame pointer register can often be eliminated in favor of the stack | |
1534 | pointer register. Secondly, the argument pointer register can always be | |
642a35f1 JW |
1535 | eliminated; it is replaced with either the stack or frame pointer. |
1536 | ||
1537 | In addition, we use the elimination mechanism to see if r30 is needed | |
1538 | Initially we assume that it isn't. If it is, we spill it. This is done | |
1539 | by making it an eliminable register. We replace it with itself so that | |
1540 | if it isn't needed, then existing uses won't be modified. */ | |
f045b2c9 RS |
1541 | |
1542 | /* This is an array of structures. Each structure initializes one pair | |
1543 | of eliminable registers. The "from" register number is given first, | |
1544 | followed by "to". Eliminations of the same "from" register are listed | |
1545 | in order of preference. */ | |
1546 | #define ELIMINABLE_REGS \ | |
1547 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1548 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
642a35f1 JW |
1549 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ |
1550 | { 30, 30} } | |
f045b2c9 RS |
1551 | |
1552 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
1553 | Frame pointer elimination is automatically handled. | |
1554 | ||
1555 | For the RS/6000, if frame pointer elimination is being done, we would like | |
642a35f1 JW |
1556 | to convert ap into fp, not sp. |
1557 | ||
abc95ed3 | 1558 | We need r30 if -mminimal-toc was specified, and there are constant pool |
642a35f1 | 1559 | references. */ |
f045b2c9 RS |
1560 | |
1561 | #define CAN_ELIMINATE(FROM, TO) \ | |
1562 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
1563 | ? ! frame_pointer_needed \ | |
4697a36c | 1564 | : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \ |
f045b2c9 RS |
1565 | : 1) |
1566 | ||
1567 | /* Define the offset between two registers, one to be eliminated, and the other | |
1568 | its replacement, at the start of a routine. */ | |
1569 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1570 | { \ | |
4697a36c | 1571 | rs6000_stack_t *info = rs6000_stack_info (); \ |
f045b2c9 RS |
1572 | \ |
1573 | if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
4697a36c MM |
1574 | (OFFSET) = (info->push_p) ? 0 : - info->total_size; \ |
1575 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1576 | (OFFSET) = info->total_size; \ | |
1577 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1578 | (OFFSET) = (info->push_p) ? info->total_size : 0; \ | |
642a35f1 JW |
1579 | else if ((FROM) == 30) \ |
1580 | (OFFSET) = 0; \ | |
f045b2c9 RS |
1581 | else \ |
1582 | abort (); \ | |
1583 | } | |
1584 | \f | |
1585 | /* Addressing modes, and classification of registers for them. */ | |
1586 | ||
1587 | /* #define HAVE_POST_INCREMENT */ | |
1588 | /* #define HAVE_POST_DECREMENT */ | |
1589 | ||
1590 | #define HAVE_PRE_DECREMENT | |
1591 | #define HAVE_PRE_INCREMENT | |
1592 | ||
1593 | /* Macros to check register numbers against specific register classes. */ | |
1594 | ||
1595 | /* These assume that REGNO is a hard or pseudo reg number. | |
1596 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1597 | or a pseudo reg currently allocated to a suitable hard reg. | |
1598 | Since they use reg_renumber, they are safe only once reg_renumber | |
1599 | has been allocated, which happens in local-alloc.c. */ | |
1600 | ||
1601 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1602 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1603 | ? (REGNO) <= 31 || (REGNO) == 67 \ | |
1604 | : (reg_renumber[REGNO] >= 0 \ | |
1605 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1606 | ||
1607 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1608 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1609 | ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ | |
1610 | : (reg_renumber[REGNO] > 0 \ | |
1611 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1612 | \f | |
1613 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1614 | ||
1615 | #define MAX_REGS_PER_ADDRESS 2 | |
1616 | ||
1617 | /* Recognize any constant value that is a valid address. */ | |
1618 | ||
6eff269e BK |
1619 | #define CONSTANT_ADDRESS_P(X) \ |
1620 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1621 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1622 | || GET_CODE (X) == HIGH) | |
f045b2c9 RS |
1623 | |
1624 | /* Nonzero if the constant value X is a legitimate general operand. | |
1625 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
1626 | ||
1627 | On the RS/6000, all integer constants are acceptable, most won't be valid | |
1628 | for particular insns, though. Only easy FP constants are | |
1629 | acceptable. */ | |
1630 | ||
1631 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1632 | (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ | |
1633 | || easy_fp_constant (X, GET_MODE (X))) | |
1634 | ||
1635 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1636 | and check its validity for a certain class. | |
1637 | We have two alternate definitions for each of them. | |
1638 | The usual definition accepts all pseudo regs; the other rejects | |
1639 | them unless they have been allocated suitable hard regs. | |
1640 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1641 | ||
1642 | Most source files want to accept pseudo regs in the hope that | |
1643 | they will get allocated to the class that the insn wants them to be in. | |
1644 | Source files for reload pass need to be strict. | |
1645 | After reload, it makes no difference, since pseudo regs have | |
1646 | been eliminated by then. */ | |
1647 | ||
1648 | #ifndef REG_OK_STRICT | |
1649 | ||
1650 | /* Nonzero if X is a hard reg that can be used as an index | |
1651 | or if it is a pseudo reg. */ | |
1652 | #define REG_OK_FOR_INDEX_P(X) \ | |
1653 | (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
1654 | ||
1655 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1656 | or if it is a pseudo reg. */ | |
1657 | #define REG_OK_FOR_BASE_P(X) \ | |
1658 | (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X)) | |
1659 | ||
1660 | #else | |
1661 | ||
1662 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1663 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1664 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1665 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1666 | ||
1667 | #endif | |
1668 | \f | |
1669 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1670 | that is a valid memory address for an instruction. | |
1671 | The MODE argument is the machine mode for the MEM expression | |
1672 | that wants to use this address. | |
1673 | ||
1674 | On the RS/6000, there are four valid address: a SYMBOL_REF that | |
1675 | refers to a constant pool entry of an address (or the sum of it | |
1676 | plus a constant), a short (16-bit signed) constant plus a register, | |
1677 | the sum of two registers, or a register indirect, possibly with an | |
1678 | auto-increment. For DFmode and DImode with an constant plus register, | |
2f3e5814 DE |
1679 | we must ensure that both words are addressable or PowerPC64 with offset |
1680 | word aligned. */ | |
f045b2c9 RS |
1681 | |
1682 | #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \ | |
4697a36c MM |
1683 | (TARGET_TOC && GET_CODE (X) == SYMBOL_REF \ |
1684 | && CONSTANT_POOL_ADDRESS_P (X) \ | |
f045b2c9 RS |
1685 | && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X))) |
1686 | ||
2f3e5814 | 1687 | /* TARGET_64BIT TOC64 guaranteed to have 64 bit alignment. */ |
f045b2c9 RS |
1688 | #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ |
1689 | (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \ | |
4697a36c MM |
1690 | || (TARGET_TOC \ |
1691 | && GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
f045b2c9 RS |
1692 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ |
1693 | && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0)))) | |
1694 | ||
7509c759 | 1695 | #define LEGITIMATE_SMALL_DATA_P(MODE, X) \ |
88228c4b MM |
1696 | (DEFAULT_ABI == ABI_V4 \ |
1697 | && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST) \ | |
1698 | && small_data_operand (X, MODE)) | |
7509c759 | 1699 | |
f045b2c9 RS |
1700 | #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ |
1701 | (GET_CODE (X) == CONST_INT \ | |
1702 | && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) | |
1703 | ||
1704 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \ | |
1705 | (GET_CODE (X) == PLUS \ | |
1706 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1707 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1708 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ | |
1709 | && (((MODE) != DFmode && (MODE) != DImode) \ | |
2f3e5814 | 1710 | || (TARGET_32BIT \ |
1465faec DE |
1711 | ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \ |
1712 | : ! (INTVAL (XEXP (X, 1)) & 3))) \ | |
2f3e5814 | 1713 | && ((MODE) != TImode \ |
644d82dd | 1714 | || (TARGET_32BIT \ |
1465faec DE |
1715 | ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 12) \ |
1716 | : (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 8) \ | |
1717 | && ! (INTVAL (XEXP (X, 1)) & 3))))) | |
f045b2c9 RS |
1718 | |
1719 | #define LEGITIMATE_INDEXED_ADDRESS_P(X) \ | |
1720 | (GET_CODE (X) == PLUS \ | |
1721 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1722 | && GET_CODE (XEXP (X, 1)) == REG \ | |
1723 | && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1724 | && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ | |
1725 | || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
1726 | && REG_OK_FOR_INDEX_P (XEXP (X, 0))))) | |
1727 | ||
1728 | #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \ | |
1729 | (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
1730 | ||
4697a36c MM |
1731 | #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \ |
1732 | (TARGET_ELF \ | |
1733 | && (MODE) != DImode \ | |
1734 | && (MODE) != TImode \ | |
1735 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ | |
1736 | && GET_CODE (X) == LO_SUM \ | |
1737 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1738 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1739 | && CONSTANT_P (XEXP (X, 1))) | |
1740 | ||
f045b2c9 RS |
1741 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
1742 | { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \ | |
1743 | goto ADDR; \ | |
0a90c336 | 1744 | if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \ |
f045b2c9 RS |
1745 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ |
1746 | goto ADDR; \ | |
7509c759 MM |
1747 | if (LEGITIMATE_SMALL_DATA_P (MODE, X)) \ |
1748 | goto ADDR; \ | |
f045b2c9 RS |
1749 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \ |
1750 | goto ADDR; \ | |
1751 | if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \ | |
1752 | goto ADDR; \ | |
2f3e5814 DE |
1753 | if ((MODE) != TImode \ |
1754 | && (TARGET_HARD_FLOAT || TARGET_64BIT || (MODE) != DFmode) \ | |
1755 | && (TARGET_64BIT || (MODE) != DImode) \ | |
f045b2c9 RS |
1756 | && LEGITIMATE_INDEXED_ADDRESS_P (X)) \ |
1757 | goto ADDR; \ | |
4697a36c MM |
1758 | if (LEGITIMATE_LO_SUM_ADDRESS_P (MODE, X)) \ |
1759 | goto ADDR; \ | |
f045b2c9 RS |
1760 | } |
1761 | \f | |
1762 | /* Try machine-dependent ways of modifying an illegitimate address | |
1763 | to be legitimate. If we find one, return the new, valid address. | |
1764 | This macro is used in only one place: `memory_address' in explow.c. | |
1765 | ||
1766 | OLDX is the address as it was before break_out_memory_refs was called. | |
1767 | In some cases it is useful to look at this to decide what needs to be done. | |
1768 | ||
1769 | MODE and WIN are passed so that this macro can use | |
1770 | GO_IF_LEGITIMATE_ADDRESS. | |
1771 | ||
1772 | It is always safe for this macro to do nothing. It exists to recognize | |
1773 | opportunities to optimize the output. | |
1774 | ||
1775 | On RS/6000, first check for the sum of a register with a constant | |
1776 | integer that is out of range. If so, generate code to add the | |
1777 | constant with the low-order 16 bits masked to the register and force | |
1778 | this result into another register (this can be done with `cau'). | |
1779 | Then generate an address of REG+(CONST&0xffff), allowing for the | |
1780 | possibility of bit 16 being a one. | |
1781 | ||
1782 | Then check for the sum of a register and something not constant, try to | |
1783 | load the other things into a register and return the sum. */ | |
1784 | ||
4697a36c MM |
1785 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ |
1786 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1787 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1788 | && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ | |
354b734b MM |
1789 | { HOST_WIDE_INT high_int, low_int; \ |
1790 | rtx sum; \ | |
1791 | high_int = INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff); \ | |
4697a36c MM |
1792 | low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ |
1793 | if (low_int & 0x8000) \ | |
354b734b MM |
1794 | high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \ |
1795 | sum = force_operand (gen_rtx (PLUS, Pmode, XEXP (X, 0), \ | |
1796 | GEN_INT (high_int)), 0); \ | |
1797 | (X) = gen_rtx (PLUS, Pmode, sum, GEN_INT (low_int)); \ | |
4697a36c MM |
1798 | goto WIN; \ |
1799 | } \ | |
1800 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1801 | && GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
2f3e5814 DE |
1802 | && (TARGET_HARD_FLOAT || TARGET_64BIT || (MODE) != DFmode) \ |
1803 | && (TARGET_64BIT || (MODE) != DImode) \ | |
1804 | && (MODE) != TImode) \ | |
4697a36c | 1805 | { \ |
0a90c336 DE |
1806 | (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ |
1807 | force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ | |
4697a36c MM |
1808 | goto WIN; \ |
1809 | } \ | |
2f3e5814 | 1810 | else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC \ |
4697a36c MM |
1811 | && GET_CODE (X) != CONST_INT \ |
1812 | && GET_CODE (X) != CONST_DOUBLE && CONSTANT_P (X) \ | |
1813 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ | |
1814 | && (MODE) != DImode && (MODE) != TImode) \ | |
1815 | { \ | |
1816 | rtx reg = gen_reg_rtx (Pmode); \ | |
1817 | emit_insn (gen_elf_high (reg, (X))); \ | |
1818 | (X) = gen_rtx (LO_SUM, Pmode, reg, (X)); \ | |
1819 | } \ | |
f045b2c9 RS |
1820 | } |
1821 | ||
1822 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1823 | has an effect that depends on the machine mode it is used for. | |
1824 | ||
1825 | On the RS/6000 this is true if the address is valid with a zero offset | |
1826 | but not with an offset of four (this means it cannot be used as an | |
1827 | address for DImode or DFmode) or is a pre-increment or decrement. Since | |
1828 | we know it is valid, we just check for an address that is not valid with | |
1829 | an offset of four. */ | |
1830 | ||
1831 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1832 | { if (GET_CODE (ADDR) == PLUS \ | |
1833 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ | |
2f3e5814 DE |
1834 | && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), \ |
1835 | (TARGET_32BIT ? 4 : 8))) \ | |
f045b2c9 RS |
1836 | goto LABEL; \ |
1837 | if (GET_CODE (ADDR) == PRE_INC) \ | |
1838 | goto LABEL; \ | |
1839 | if (GET_CODE (ADDR) == PRE_DEC) \ | |
1840 | goto LABEL; \ | |
4697a36c MM |
1841 | if (GET_CODE (ADDR) == LO_SUM) \ |
1842 | goto LABEL; \ | |
f045b2c9 RS |
1843 | } |
1844 | \f | |
1845 | /* Define this if some processing needs to be done immediately before | |
4255474b | 1846 | emitting code for an insn. */ |
f045b2c9 | 1847 | |
4255474b | 1848 | /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ |
f045b2c9 RS |
1849 | |
1850 | /* Specify the machine mode that this machine uses | |
1851 | for the index in the tablejump instruction. */ | |
2f3e5814 | 1852 | #define CASE_VECTOR_MODE (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
1853 | |
1854 | /* Define this if the tablejump instruction expects the table | |
1855 | to contain offsets from the address of the table. | |
1856 | Do not define this if the table should contain absolute addresses. */ | |
1857 | #define CASE_VECTOR_PC_RELATIVE | |
1858 | ||
1859 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1860 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1861 | ||
1862 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1863 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1864 | ||
1865 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1866 | #define DEFAULT_SIGNED_CHAR 0 | |
1867 | ||
1868 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1869 | also convert validly to an unsigned one. */ | |
1870 | ||
1871 | /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ | |
1872 | ||
1873 | /* Max number of bytes we can move from memory to memory | |
1874 | in one reasonably fast instruction. */ | |
2f3e5814 | 1875 | #define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8) |
7e69e155 | 1876 | #define MAX_MOVE_MAX 8 |
f045b2c9 RS |
1877 | |
1878 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1879 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1880 | is undesirable. */ | |
1881 | #define SLOW_BYTE_ACCESS 1 | |
1882 | ||
9a63901f RK |
1883 | /* Define if operations between registers always perform the operation |
1884 | on the full register even if a narrower mode is specified. */ | |
1885 | #define WORD_REGISTER_OPERATIONS | |
1886 | ||
1887 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1888 | will either zero-extend or sign-extend. The value of this macro should | |
1889 | be the code that says which one of the two operations is implicitly | |
1890 | done, NIL if none. */ | |
1891 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
225211e2 RK |
1892 | |
1893 | /* Define if loading short immediate values into registers sign extends. */ | |
1894 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
fdaff8ba RS |
1895 | \f |
1896 | /* The RS/6000 uses the XCOFF format. */ | |
f045b2c9 | 1897 | |
fdaff8ba | 1898 | #define XCOFF_DEBUGGING_INFO |
f045b2c9 | 1899 | |
c5abcf1d CH |
1900 | /* Define if the object format being used is COFF or a superset. */ |
1901 | #define OBJECT_FORMAT_COFF | |
1902 | ||
2c440f06 RK |
1903 | /* Define the magic numbers that we recognize as COFF. */ |
1904 | ||
1905 | #define MY_ISCOFF(magic) \ | |
1906 | ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC) | |
1907 | ||
115e69a9 RK |
1908 | /* This is the only version of nm that collect2 can work with. */ |
1909 | #define REAL_NM_FILE_NAME "/usr/ucb/nm" | |
1910 | ||
f045b2c9 RS |
1911 | /* We don't have GAS for the RS/6000 yet, so don't write out special |
1912 | .stabs in cc1plus. */ | |
1913 | ||
1914 | #define FASCIST_ASSEMBLER | |
b6c9286a MM |
1915 | |
1916 | #ifndef ASM_OUTPUT_CONSTRUCTOR | |
a6cf191b | 1917 | #define ASM_OUTPUT_CONSTRUCTOR(file, name) |
b6c9286a MM |
1918 | #endif |
1919 | #ifndef ASM_OUTPUT_DESTRUCTOR | |
a6cf191b | 1920 | #define ASM_OUTPUT_DESTRUCTOR(file, name) |
b6c9286a | 1921 | #endif |
f045b2c9 | 1922 | |
f045b2c9 RS |
1923 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1924 | is done just by pretending it is already truncated. */ | |
1925 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1926 | ||
1927 | /* Specify the machine mode that pointers have. | |
1928 | After generation of rtl, the compiler makes no further distinction | |
1929 | between pointers and any other objects of this machine mode. */ | |
2f3e5814 | 1930 | #define Pmode (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
1931 | |
1932 | /* Mode of a function address in a call instruction (for indexing purposes). | |
1933 | ||
1934 | Doesn't matter on RS/6000. */ | |
2f3e5814 | 1935 | #define FUNCTION_MODE (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
1936 | |
1937 | /* Define this if addresses of constant functions | |
1938 | shouldn't be put through pseudo regs where they can be cse'd. | |
1939 | Desirable on machines where ordinary constants are expensive | |
1940 | but a CALL with constant address is cheap. */ | |
1941 | #define NO_FUNCTION_CSE | |
1942 | ||
d969caf8 | 1943 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
6febd581 RK |
1944 | few bits. |
1945 | ||
1946 | The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED | |
1947 | have been dropped from the PowerPC architecture. */ | |
1948 | ||
4697a36c | 1949 | #define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0) |
f045b2c9 RS |
1950 | |
1951 | /* Use atexit for static constructors/destructors, instead of defining | |
1952 | our own exit function. */ | |
1953 | #define HAVE_ATEXIT | |
1954 | ||
1955 | /* Compute the cost of computing a constant rtl expression RTX | |
1956 | whose rtx-code is CODE. The body of this macro is a portion | |
1957 | of a switch statement. If the code is computed here, | |
1958 | return it with a return statement. Otherwise, break from the switch. | |
1959 | ||
01554f00 | 1960 | On the RS/6000, if it is valid in the insn, it is free. So this |
f045b2c9 RS |
1961 | always returns 0. */ |
1962 | ||
4697a36c | 1963 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
f045b2c9 RS |
1964 | case CONST_INT: \ |
1965 | case CONST: \ | |
1966 | case LABEL_REF: \ | |
1967 | case SYMBOL_REF: \ | |
1968 | case CONST_DOUBLE: \ | |
4697a36c | 1969 | case HIGH: \ |
f045b2c9 RS |
1970 | return 0; |
1971 | ||
1972 | /* Provide the costs of a rtl expression. This is in the body of a | |
1973 | switch on CODE. */ | |
1974 | ||
3bb22aee | 1975 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
f045b2c9 | 1976 | case MULT: \ |
bdfd4e31 RK |
1977 | switch (rs6000_cpu) \ |
1978 | { \ | |
1979 | case PROCESSOR_RIOS1: \ | |
1980 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
1981 | ? COSTS_N_INSNS (5) \ | |
1982 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
1983 | ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ | |
1984 | case PROCESSOR_RIOS2: \ | |
cf27b467 | 1985 | case PROCESSOR_MPCCORE: \ |
bdfd4e31 RK |
1986 | return COSTS_N_INSNS (2); \ |
1987 | case PROCESSOR_PPC601: \ | |
869c489d | 1988 | return COSTS_N_INSNS (5); \ |
1ec26da6 DE |
1989 | case PROCESSOR_PPC603: \ |
1990 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
1991 | ? COSTS_N_INSNS (5) \ | |
1992 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
1993 | ? COSTS_N_INSNS (2) : COSTS_N_INSNS (3)); \ | |
49a0b204 | 1994 | case PROCESSOR_PPC403: \ |
bdfd4e31 RK |
1995 | case PROCESSOR_PPC604: \ |
1996 | case PROCESSOR_PPC620: \ | |
869c489d | 1997 | return COSTS_N_INSNS (4); \ |
bdfd4e31 | 1998 | } \ |
f045b2c9 RS |
1999 | case DIV: \ |
2000 | case MOD: \ | |
2001 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
2002 | && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ | |
2003 | return COSTS_N_INSNS (2); \ | |
2004 | /* otherwise fall through to normal divide. */ \ | |
2005 | case UDIV: \ | |
2006 | case UMOD: \ | |
bdfd4e31 RK |
2007 | switch (rs6000_cpu) \ |
2008 | { \ | |
2009 | case PROCESSOR_RIOS1: \ | |
2010 | return COSTS_N_INSNS (19); \ | |
2011 | case PROCESSOR_RIOS2: \ | |
2012 | return COSTS_N_INSNS (13); \ | |
cf27b467 MM |
2013 | case PROCESSOR_MPCCORE: \ |
2014 | return COSTS_N_INSNS (6); \ | |
49a0b204 MM |
2015 | case PROCESSOR_PPC403: \ |
2016 | return COSTS_N_INSNS (33); \ | |
bdfd4e31 | 2017 | case PROCESSOR_PPC601: \ |
869c489d | 2018 | return COSTS_N_INSNS (36); \ |
bdfd4e31 | 2019 | case PROCESSOR_PPC603: \ |
869c489d | 2020 | return COSTS_N_INSNS (37); \ |
bdfd4e31 RK |
2021 | case PROCESSOR_PPC604: \ |
2022 | case PROCESSOR_PPC620: \ | |
869c489d | 2023 | return COSTS_N_INSNS (20); \ |
bdfd4e31 | 2024 | } \ |
3a942930 RK |
2025 | case FFS: \ |
2026 | return COSTS_N_INSNS (4); \ | |
f045b2c9 RS |
2027 | case MEM: \ |
2028 | /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ | |
2029 | return 5; | |
2030 | ||
2031 | /* Compute the cost of an address. This is meant to approximate the size | |
2032 | and/or execution delay of an insn using that address. If the cost is | |
2033 | approximated by the RTL complexity, including CONST_COSTS above, as | |
2034 | is usually the case for CISC machines, this macro should not be defined. | |
2035 | For aggressively RISCy machines, only one insn format is allowed, so | |
2036 | this macro should be a constant. The value of this macro only matters | |
2037 | for valid addresses. | |
2038 | ||
2039 | For the RS/6000, everything is cost 0. */ | |
2040 | ||
2041 | #define ADDRESS_COST(RTX) 0 | |
2042 | ||
2043 | /* Adjust the length of an INSN. LENGTH is the currently-computed length and | |
2044 | should be adjusted to reflect any required changes. This macro is used when | |
2045 | there is some systematic length adjustment required that would be difficult | |
2046 | to express in the length attribute. */ | |
2047 | ||
2048 | /* #define ADJUST_INSN_LENGTH(X,LENGTH) */ | |
2049 | ||
2050 | /* Add any extra modes needed to represent the condition code. | |
2051 | ||
2052 | For the RS/6000, we need separate modes when unsigned (logical) comparisons | |
c5defebb RK |
2053 | are being done and we need a separate mode for floating-point. We also |
2054 | use a mode for the case when we are comparing the results of two | |
2055 | comparisons. */ | |
f045b2c9 | 2056 | |
c5defebb | 2057 | #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode |
f045b2c9 RS |
2058 | |
2059 | /* Define the names for the modes specified above. */ | |
c5defebb | 2060 | #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" |
f045b2c9 RS |
2061 | |
2062 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
2063 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
c5defebb RK |
2064 | should be used. CCUNSmode should be used for unsigned comparisons. |
2065 | CCEQmode should be used when we are doing an inequality comparison on | |
2066 | the result of a comparison. CCmode should be used in all other cases. */ | |
2067 | ||
b565a316 | 2068 | #define SELECT_CC_MODE(OP,X,Y) \ |
f045b2c9 | 2069 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ |
c5defebb RK |
2070 | : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ |
2071 | : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ | |
2072 | ? CCEQmode : CCmode)) | |
f045b2c9 RS |
2073 | |
2074 | /* Define the information needed to generate branch and scc insns. This is | |
2075 | stored from the compare operation. Note that we can't use "rtx" here | |
2076 | since it hasn't been defined! */ | |
2077 | ||
2078 | extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; | |
2079 | extern int rs6000_compare_fp_p; | |
2080 | ||
2081 | /* Set to non-zero by "fix" operation to indicate that itrunc and | |
2082 | uitrunc must be defined. */ | |
2083 | ||
2084 | extern int rs6000_trunc_used; | |
9929b575 ILT |
2085 | |
2086 | /* Function names to call to do floating point truncation. */ | |
2087 | ||
2088 | #define RS6000_ITRUNC "itrunc" | |
2089 | #define RS6000_UITRUNC "uitrunc" | |
4d30c363 MM |
2090 | |
2091 | /* Prefix and suffix to use to saving floating point */ | |
2092 | #ifndef SAVE_FP_PREFIX | |
2093 | #define SAVE_FP_PREFIX "._savef" | |
2094 | #define SAVE_FP_SUFFIX "" | |
2095 | #endif | |
2096 | ||
2097 | /* Prefix and suffix to use to restoring floating point */ | |
2098 | #ifndef RESTORE_FP_PREFIX | |
2099 | #define RESTORE_FP_PREFIX "._restf" | |
2100 | #define RESTORE_FP_SUFFIX "" | |
2101 | #endif | |
2102 | ||
f045b2c9 RS |
2103 | \f |
2104 | /* Control the assembler format that we output. */ | |
2105 | ||
6b67933e RK |
2106 | /* Common macro to output the options used to the asm file. */ |
2107 | #define ASM_OUTPUT_OPTIONS(FILE) \ | |
2108 | output_options (FILE, \ | |
2109 | f_options, sizeof (f_options) / sizeof (f_options[0]), \ | |
2110 | W_options, sizeof (W_options) / sizeof (W_options[0])) \ | |
2111 | ||
f045b2c9 RS |
2112 | /* Output at beginning of assembler file. |
2113 | ||
b4d6689b | 2114 | Initialize the section names for the RS/6000 at this point. |
fdaff8ba | 2115 | |
6355b140 | 2116 | Specify filename to assembler. |
3fc2151d | 2117 | |
b4d6689b | 2118 | We want to go into the TOC section so at least one .toc will be emitted. |
fdaff8ba | 2119 | Also, in order to output proper .bs/.es pairs, we need at least one static |
b4d6689b RK |
2120 | [RW] section emitted. |
2121 | ||
2122 | We then switch back to text to force the gcc2_compiled. label and the space | |
2123 | allocated after it (when profiling) into the text section. | |
2124 | ||
2125 | Finally, declare mcount when profiling to make the assembler happy. */ | |
f045b2c9 RS |
2126 | |
2127 | #define ASM_FILE_START(FILE) \ | |
2128 | { \ | |
6b67933e | 2129 | ASM_OUTPUT_OPTIONS (FILE); \ |
fdaff8ba | 2130 | rs6000_gen_section_name (&xcoff_bss_section_name, \ |
f045b2c9 | 2131 | main_input_filename, ".bss_"); \ |
fdaff8ba | 2132 | rs6000_gen_section_name (&xcoff_private_data_section_name, \ |
f045b2c9 | 2133 | main_input_filename, ".rw_"); \ |
fdaff8ba | 2134 | rs6000_gen_section_name (&xcoff_read_only_section_name, \ |
f045b2c9 RS |
2135 | main_input_filename, ".ro_"); \ |
2136 | \ | |
6355b140 | 2137 | output_file_directive (FILE, main_input_filename); \ |
f045b2c9 | 2138 | toc_section (); \ |
fdaff8ba RS |
2139 | if (write_symbols != NO_DEBUG) \ |
2140 | private_data_section (); \ | |
b4d6689b RK |
2141 | text_section (); \ |
2142 | if (profile_flag) \ | |
19d2d16f | 2143 | fputs ("\t.extern .mcount\n", FILE); \ |
f045b2c9 RS |
2144 | } |
2145 | ||
2146 | /* Output at end of assembler file. | |
2147 | ||
2148 | On the RS/6000, referencing data should automatically pull in text. */ | |
2149 | ||
2150 | #define ASM_FILE_END(FILE) \ | |
2151 | { \ | |
2152 | text_section (); \ | |
19d2d16f | 2153 | fputs ("_section_.text:\n", FILE); \ |
f045b2c9 | 2154 | data_section (); \ |
19d2d16f | 2155 | fputs ("\t.long _section_.text\n", FILE); \ |
f045b2c9 RS |
2156 | } |
2157 | ||
f045b2c9 RS |
2158 | /* We define this to prevent the name mangler from putting dollar signs into |
2159 | function names. */ | |
2160 | ||
2161 | #define NO_DOLLAR_IN_LABEL | |
2162 | ||
2163 | /* We define this to 0 so that gcc will never accept a dollar sign in a | |
2164 | variable name. This is needed because the AIX assembler will not accept | |
2165 | dollar signs. */ | |
2166 | ||
2167 | #define DOLLARS_IN_IDENTIFIERS 0 | |
2168 | ||
fdaff8ba RS |
2169 | /* Implicit library calls should use memcpy, not bcopy, etc. */ |
2170 | ||
2171 | #define TARGET_MEM_FUNCTIONS | |
2172 | ||
f045b2c9 RS |
2173 | /* Define the extra sections we need. We define three: one is the read-only |
2174 | data section which is used for constants. This is a csect whose name is | |
2175 | derived from the name of the input file. The second is for initialized | |
2176 | global variables. This is a csect whose name is that of the variable. | |
2177 | The third is the TOC. */ | |
2178 | ||
2179 | #define EXTRA_SECTIONS \ | |
2180 | read_only_data, private_data, read_only_private_data, toc, bss | |
2181 | ||
2182 | /* Define the name of our readonly data section. */ | |
2183 | ||
2184 | #define READONLY_DATA_SECTION read_only_data_section | |
2185 | ||
b4f892eb RK |
2186 | /* If we are referencing a function that is static or is known to be |
2187 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
2188 | that we can branch to this function without emitting a no-op after the | |
2189 | call. */ | |
2190 | ||
2191 | #define ENCODE_SECTION_INFO(DECL) \ | |
2192 | if (TREE_CODE (DECL) == FUNCTION_DECL \ | |
2193 | && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ | |
2194 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; | |
2195 | ||
f045b2c9 RS |
2196 | /* Indicate that jump tables go in the text section. */ |
2197 | ||
2198 | #define JUMP_TABLES_IN_TEXT_SECTION | |
2199 | ||
2200 | /* Define the routines to implement these extra sections. */ | |
2201 | ||
2202 | #define EXTRA_SECTION_FUNCTIONS \ | |
2203 | \ | |
2204 | void \ | |
2205 | read_only_data_section () \ | |
2206 | { \ | |
2207 | if (in_section != read_only_data) \ | |
2208 | { \ | |
469adec3 | 2209 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 2210 | xcoff_read_only_section_name); \ |
f045b2c9 RS |
2211 | in_section = read_only_data; \ |
2212 | } \ | |
2213 | } \ | |
2214 | \ | |
2215 | void \ | |
2216 | private_data_section () \ | |
2217 | { \ | |
2218 | if (in_section != private_data) \ | |
2219 | { \ | |
469adec3 | 2220 | fprintf (asm_out_file, ".csect %s[RW]\n", \ |
fdaff8ba | 2221 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
2222 | \ |
2223 | in_section = private_data; \ | |
2224 | } \ | |
2225 | } \ | |
2226 | \ | |
2227 | void \ | |
2228 | read_only_private_data_section () \ | |
2229 | { \ | |
2230 | if (in_section != read_only_private_data) \ | |
2231 | { \ | |
f25359b5 | 2232 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 2233 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
2234 | in_section = read_only_private_data; \ |
2235 | } \ | |
2236 | } \ | |
2237 | \ | |
2238 | void \ | |
2239 | toc_section () \ | |
2240 | { \ | |
642a35f1 JW |
2241 | if (TARGET_MINIMAL_TOC) \ |
2242 | { \ | |
2243 | static int toc_initialized = 0; \ | |
2244 | \ | |
2245 | /* toc_section is always called at least once from ASM_FILE_START, \ | |
2246 | so this is guaranteed to always be defined once and only once \ | |
2247 | in each file. */ \ | |
2248 | if (! toc_initialized) \ | |
2249 | { \ | |
19d2d16f MM |
2250 | fputs (".toc\nLCTOC..0:\n", asm_out_file); \ |
2251 | fputs ("\t.tc toc_table[TC],toc_table[RW]\n", asm_out_file); \ | |
642a35f1 JW |
2252 | toc_initialized = 1; \ |
2253 | } \ | |
f045b2c9 | 2254 | \ |
642a35f1 | 2255 | if (in_section != toc) \ |
19d2d16f | 2256 | fputs (".csect toc_table[RW]\n", asm_out_file); \ |
642a35f1 JW |
2257 | } \ |
2258 | else \ | |
2259 | { \ | |
2260 | if (in_section != toc) \ | |
19d2d16f | 2261 | fputs (".toc\n", asm_out_file); \ |
642a35f1 | 2262 | } \ |
f045b2c9 | 2263 | in_section = toc; \ |
fc3ffe83 | 2264 | } |
f045b2c9 RS |
2265 | |
2266 | /* This macro produces the initial definition of a function name. | |
2267 | On the RS/6000, we need to place an extra '.' in the function name and | |
2268 | output the function descriptor. | |
2269 | ||
2270 | The csect for the function will have already been created by the | |
2271 | `text_section' call previously done. We do have to go back to that | |
2272 | csect, however. */ | |
2273 | ||
fdaff8ba RS |
2274 | /* ??? What do the 16 and 044 in the .function line really mean? */ |
2275 | ||
f045b2c9 RS |
2276 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
2277 | { if (TREE_PUBLIC (DECL)) \ | |
2278 | { \ | |
19d2d16f | 2279 | fputs ("\t.globl .", FILE); \ |
f045b2c9 | 2280 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2281 | putc ('\n', FILE); \ |
fdaff8ba | 2282 | } \ |
3ce428da | 2283 | else \ |
fdaff8ba | 2284 | { \ |
19d2d16f | 2285 | fputs ("\t.lglobl .", FILE); \ |
fdaff8ba | 2286 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2287 | putc ('\n', FILE); \ |
f045b2c9 | 2288 | } \ |
19d2d16f | 2289 | fputs (".csect ", FILE); \ |
f045b2c9 | 2290 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2291 | fputs ("[DS]\n", FILE); \ |
f045b2c9 | 2292 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2293 | fputs (":\n", FILE); \ |
5854b0d0 | 2294 | fputs ((TARGET_32BIT) ? "\t.long ." : "\t.llong .", FILE); \ |
f045b2c9 | 2295 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f MM |
2296 | fputs (", TOC[tc0], 0\n", FILE); \ |
2297 | fputs (".csect .text[PR]\n.", FILE); \ | |
f045b2c9 | 2298 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2299 | fputs (":\n", FILE); \ |
fdaff8ba | 2300 | if (write_symbols == XCOFF_DEBUG) \ |
c2a47e48 | 2301 | xcoffout_declare_function (FILE, DECL, NAME); \ |
f045b2c9 RS |
2302 | } |
2303 | ||
2304 | /* Return non-zero if this entry is to be written into the constant pool | |
2305 | in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST | |
2306 | containing one of them. If -mfp-in-toc (the default), we also do | |
2307 | this for floating-point constants. We actually can only do this | |
2308 | if the FP formats of the target and host machines are the same, but | |
2309 | we can't check that since not every file that uses | |
2310 | GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */ | |
2311 | ||
4697a36c MM |
2312 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \ |
2313 | (TARGET_TOC \ | |
2314 | && (GET_CODE (X) == SYMBOL_REF \ | |
2315 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
2316 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \ | |
2317 | || GET_CODE (X) == LABEL_REF \ | |
2318 | || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \ | |
2319 | && GET_CODE (X) == CONST_DOUBLE \ | |
2320 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ | |
2321 | && BITS_PER_WORD == HOST_BITS_PER_INT))) | |
f045b2c9 RS |
2322 | |
2323 | /* Select section for constant in constant pool. | |
2324 | ||
2325 | On RS/6000, all constants are in the private read-only data area. | |
2326 | However, if this is being placed in the TOC it must be output as a | |
2327 | toc entry. */ | |
2328 | ||
2329 | #define SELECT_RTX_SECTION(MODE, X) \ | |
2330 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
2331 | toc_section (); \ | |
2332 | else \ | |
2333 | read_only_private_data_section (); \ | |
2334 | } | |
2335 | ||
2336 | /* Macro to output a special constant pool entry. Go to WIN if we output | |
2337 | it. Otherwise, it is written the usual way. | |
2338 | ||
2339 | On the RS/6000, toc entries are handled this way. */ | |
2340 | ||
2341 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ | |
2342 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
2343 | { \ | |
2344 | output_toc (FILE, X, LABELNO); \ | |
2345 | goto WIN; \ | |
2346 | } \ | |
2347 | } | |
2348 | ||
2349 | /* Select the section for an initialized data object. | |
2350 | ||
2351 | On the RS/6000, we have a special section for all variables except those | |
2352 | that are static. */ | |
2353 | ||
2354 | #define SELECT_SECTION(EXP,RELOC) \ | |
2355 | { \ | |
ed8969fa JW |
2356 | if ((TREE_CODE (EXP) == STRING_CST \ |
2357 | && !flag_writable_strings) \ | |
128e5769 | 2358 | || (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'd' \ |
1ff5cbcd | 2359 | && TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \ |
ed8969fa JW |
2360 | && DECL_INITIAL (EXP) \ |
2361 | && (DECL_INITIAL (EXP) == error_mark_node \ | |
2362 | || TREE_CONSTANT (DECL_INITIAL (EXP))) \ | |
2363 | && ! (RELOC))) \ | |
f045b2c9 RS |
2364 | { \ |
2365 | if (TREE_PUBLIC (EXP)) \ | |
2366 | read_only_data_section (); \ | |
2367 | else \ | |
2368 | read_only_private_data_section (); \ | |
2369 | } \ | |
2370 | else \ | |
2371 | { \ | |
2372 | if (TREE_PUBLIC (EXP)) \ | |
2373 | data_section (); \ | |
2374 | else \ | |
2375 | private_data_section (); \ | |
2376 | } \ | |
2377 | } | |
2378 | ||
2379 | /* This outputs NAME to FILE up to the first null or '['. */ | |
2380 | ||
2381 | #define RS6000_OUTPUT_BASENAME(FILE, NAME) \ | |
c23a9d0e JM |
2382 | { \ |
2383 | char *_p; \ | |
99d3d26e | 2384 | \ |
c23a9d0e JM |
2385 | STRIP_NAME_ENCODING (_p, (NAME)); \ |
2386 | assemble_name ((FILE), _p); \ | |
2387 | } | |
2388 | ||
2389 | /* Remove any trailing [DS] or the like from the symbol name. */ | |
2390 | ||
28c57785 MM |
2391 | #define STRIP_NAME_ENCODING(VAR,NAME) \ |
2392 | do \ | |
2393 | { \ | |
2394 | char *_name = (NAME); \ | |
b6c9286a | 2395 | int _len; \ |
28c57785 | 2396 | if (_name[0] == '*') \ |
b6c9286a MM |
2397 | _name++; \ |
2398 | _len = strlen (_name); \ | |
2399 | if (_name[_len - 1] != ']') \ | |
2400 | (VAR) = _name; \ | |
28c57785 MM |
2401 | else \ |
2402 | { \ | |
b6c9286a MM |
2403 | (VAR) = (char *) alloca (_len + 1); \ |
2404 | strcpy ((VAR), _name); \ | |
2405 | (VAR)[_len - 4] = '\0'; \ | |
28c57785 MM |
2406 | } \ |
2407 | } \ | |
c23a9d0e | 2408 | while (0) |
f045b2c9 RS |
2409 | |
2410 | /* Output something to declare an external symbol to the assembler. Most | |
2411 | assemblers don't need this. | |
2412 | ||
2413 | If we haven't already, add "[RW]" (or "[DS]" for a function) to the | |
2414 | name. Normally we write this out along with the name. In the few cases | |
2415 | where we can't, it gets stripped off. */ | |
2416 | ||
2417 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
2418 | { rtx _symref = XEXP (DECL_RTL (DECL), 0); \ | |
2419 | if ((TREE_CODE (DECL) == VAR_DECL \ | |
2420 | || TREE_CODE (DECL) == FUNCTION_DECL) \ | |
f045b2c9 RS |
2421 | && (NAME)[strlen (NAME) - 1] != ']') \ |
2422 | { \ | |
2423 | char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \ | |
2424 | strcpy (_name, XSTR (_symref, 0)); \ | |
2425 | strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \ | |
2426 | XSTR (_symref, 0) = _name; \ | |
2427 | } \ | |
19d2d16f | 2428 | fputs ("\t.extern ", FILE); \ |
f045b2c9 RS |
2429 | assemble_name (FILE, XSTR (_symref, 0)); \ |
2430 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
2431 | { \ | |
19d2d16f | 2432 | fputs ("\n\t.extern .", FILE); \ |
f045b2c9 RS |
2433 | RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \ |
2434 | } \ | |
19d2d16f | 2435 | putc ('\n', FILE); \ |
f045b2c9 RS |
2436 | } |
2437 | ||
2438 | /* Similar, but for libcall. We only have to worry about the function name, | |
2439 | not that of the descriptor. */ | |
2440 | ||
2441 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ | |
19d2d16f | 2442 | { fputs ("\t.extern .", FILE); \ |
f045b2c9 | 2443 | assemble_name (FILE, XSTR (FUN, 0)); \ |
19d2d16f | 2444 | putc ('\n', FILE); \ |
f045b2c9 RS |
2445 | } |
2446 | ||
2447 | /* Output to assembler file text saying following lines | |
2448 | may contain character constants, extra white space, comments, etc. */ | |
2449 | ||
2450 | #define ASM_APP_ON "" | |
2451 | ||
2452 | /* Output to assembler file text saying following lines | |
2453 | no longer contain unusual constructs. */ | |
2454 | ||
2455 | #define ASM_APP_OFF "" | |
2456 | ||
2457 | /* Output before instructions. */ | |
2458 | ||
11117bb9 | 2459 | #define TEXT_SECTION_ASM_OP ".csect .text[PR]" |
f045b2c9 RS |
2460 | |
2461 | /* Output before writable data. */ | |
2462 | ||
fdaff8ba | 2463 | #define DATA_SECTION_ASM_OP ".csect .data[RW]" |
f045b2c9 RS |
2464 | |
2465 | /* How to refer to registers in assembler output. | |
2466 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
2467 | ||
2468 | #define REGISTER_NAMES \ | |
2469 | {"0", "1", "2", "3", "4", "5", "6", "7", \ | |
2470 | "8", "9", "10", "11", "12", "13", "14", "15", \ | |
2471 | "16", "17", "18", "19", "20", "21", "22", "23", \ | |
2472 | "24", "25", "26", "27", "28", "29", "30", "31", \ | |
2473 | "0", "1", "2", "3", "4", "5", "6", "7", \ | |
2474 | "8", "9", "10", "11", "12", "13", "14", "15", \ | |
2475 | "16", "17", "18", "19", "20", "21", "22", "23", \ | |
2476 | "24", "25", "26", "27", "28", "29", "30", "31", \ | |
2477 | "mq", "lr", "ctr", "ap", \ | |
2478 | "0", "1", "2", "3", "4", "5", "6", "7" } | |
2479 | ||
2480 | /* Table of additional register names to use in user input. */ | |
2481 | ||
2482 | #define ADDITIONAL_REGISTER_NAMES \ | |
2483 | {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \ | |
2484 | "r4", 4, "r5", 5, "r6", 6, "r7", 7, \ | |
2485 | "r8", 8, "r9", 9, "r10", 10, "r11", 11, \ | |
2486 | "r12", 12, "r13", 13, "r14", 14, "r15", 15, \ | |
2487 | "r16", 16, "r17", 17, "r18", 18, "r19", 19, \ | |
2488 | "r20", 20, "r21", 21, "r22", 22, "r23", 23, \ | |
2489 | "r24", 24, "r25", 25, "r26", 26, "r27", 27, \ | |
2490 | "r28", 28, "r29", 29, "r30", 30, "r31", 31, \ | |
2491 | "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \ | |
2492 | "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \ | |
2493 | "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \ | |
2494 | "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \ | |
2495 | "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \ | |
2496 | "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \ | |
2497 | "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \ | |
2498 | "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \ | |
2499 | /* no additional names for: mq, lr, ctr, ap */ \ | |
2500 | "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \ | |
fc3ffe83 RK |
2501 | "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \ |
2502 | "cc", 68 } | |
f045b2c9 RS |
2503 | |
2504 | /* How to renumber registers for dbx and gdb. */ | |
2505 | ||
2506 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
2507 | ||
0da40b09 RK |
2508 | /* Text to write out after a CALL that may be replaced by glue code by |
2509 | the loader. This depends on the AIX version. */ | |
2510 | #define RS6000_CALL_GLUE "cror 31,31,31" | |
11117bb9 | 2511 | |
f045b2c9 RS |
2512 | /* This is how to output the definition of a user-level label named NAME, |
2513 | such as the label on a static function or variable NAME. */ | |
2514 | ||
2515 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
2516 | do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0) | |
2517 | ||
2518 | /* This is how to output a command to make the user-level label named NAME | |
2519 | defined for reference from other files. */ | |
2520 | ||
2521 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
2522 | do { fputs ("\t.globl ", FILE); \ | |
2523 | RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0) | |
2524 | ||
2525 | /* This is how to output a reference to a user-level label named NAME. | |
2526 | `assemble_name' uses this. */ | |
2527 | ||
2528 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
7509c759 | 2529 | fputs (NAME, FILE) |
f045b2c9 RS |
2530 | |
2531 | /* This is how to output an internal numbered label where | |
2532 | PREFIX is the class of label and NUM is the number within the class. */ | |
2533 | ||
2534 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
2535 | fprintf (FILE, "%s..%d:\n", PREFIX, NUM) | |
2536 | ||
3daf36a4 ILT |
2537 | /* This is how to output an internal label prefix. rs6000.c uses this |
2538 | when generating traceback tables. */ | |
2539 | ||
2540 | #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ | |
2541 | fprintf (FILE, "%s..", PREFIX) | |
2542 | ||
f045b2c9 RS |
2543 | /* This is how to output a label for a jump table. Arguments are the same as |
2544 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
2545 | passed. */ | |
2546 | ||
2547 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
2548 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
2549 | ||
2550 | /* This is how to store into the string LABEL | |
2551 | the symbol_ref name of an internal numbered label where | |
2552 | PREFIX is the class of label and NUM is the number within the class. | |
2553 | This is suitable for output with `assemble_name'. */ | |
2554 | ||
2555 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
3d199f7a | 2556 | sprintf (LABEL, "*%s..%d", PREFIX, NUM) |
f045b2c9 RS |
2557 | |
2558 | /* This is how to output an assembler line defining a `double' constant. */ | |
2559 | ||
a5b1eb34 RS |
2560 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ |
2561 | { \ | |
2562 | if (REAL_VALUE_ISINF (VALUE) \ | |
2563 | || REAL_VALUE_ISNAN (VALUE) \ | |
2564 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
2565 | { \ | |
2566 | long t[2]; \ | |
2567 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
2568 | fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \ | |
2569 | t[0] & 0xffffffff, t[1] & 0xffffffff); \ | |
2570 | } \ | |
2571 | else \ | |
2572 | { \ | |
2573 | char str[30]; \ | |
2574 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ | |
2575 | fprintf (FILE, "\t.double 0d%s\n", str); \ | |
2576 | } \ | |
2577 | } | |
f045b2c9 RS |
2578 | |
2579 | /* This is how to output an assembler line defining a `float' constant. */ | |
2580 | ||
a5b1eb34 RS |
2581 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ |
2582 | { \ | |
2583 | if (REAL_VALUE_ISINF (VALUE) \ | |
2584 | || REAL_VALUE_ISNAN (VALUE) \ | |
2585 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
2586 | { \ | |
2587 | long t; \ | |
2588 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
2589 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
2590 | } \ | |
2591 | else \ | |
2592 | { \ | |
2593 | char str[30]; \ | |
2594 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
2595 | fprintf (FILE, "\t.float 0d%s\n", str); \ | |
2596 | } \ | |
2597 | } | |
f045b2c9 RS |
2598 | |
2599 | /* This is how to output an assembler line defining an `int' constant. */ | |
2600 | ||
5854b0d0 DE |
2601 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ |
2602 | do { \ | |
2603 | if (TARGET_32BIT) \ | |
2604 | { \ | |
2605 | assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \ | |
2606 | UNITS_PER_WORD, 1); \ | |
2607 | assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \ | |
2608 | UNITS_PER_WORD, 1); \ | |
2609 | } \ | |
2610 | else \ | |
2611 | { \ | |
2612 | fputs ("\t.llong ", FILE); \ | |
2613 | output_addr_const (FILE, (VALUE)); \ | |
2614 | putc ('\n', FILE); \ | |
2615 | } \ | |
2616 | } while (0) | |
2617 | ||
f045b2c9 | 2618 | #define ASM_OUTPUT_INT(FILE,VALUE) \ |
19d2d16f | 2619 | ( fputs ("\t.long ", FILE), \ |
f045b2c9 | 2620 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 2621 | putc ('\n', FILE)) |
f045b2c9 RS |
2622 | |
2623 | /* Likewise for `char' and `short' constants. */ | |
2624 | ||
2625 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
19d2d16f | 2626 | ( fputs ("\t.short ", FILE), \ |
f045b2c9 | 2627 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 2628 | putc ('\n', FILE)) |
f045b2c9 RS |
2629 | |
2630 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
19d2d16f | 2631 | ( fputs ("\t.byte ", FILE), \ |
f045b2c9 | 2632 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 2633 | putc ('\n', FILE)) |
f045b2c9 RS |
2634 | |
2635 | /* This is how to output an assembler line for a numeric constant byte. */ | |
2636 | ||
2637 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
2638 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
2639 | ||
2640 | /* This is how to output an assembler line to define N characters starting | |
2641 | at P to FILE. */ | |
2642 | ||
2643 | #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N)) | |
2644 | ||
2645 | /* This is how to output code to push a register on the stack. | |
2646 | It need not be very fast code. */ | |
2647 | ||
4697a36c MM |
2648 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ |
2649 | do { \ | |
2650 | extern char *reg_names[]; \ | |
2651 | asm_fprintf (FILE, "\{tstu|stwu} %s,-4(%s)\n", reg_names[REGNO], \ | |
2652 | reg_names[1]); \ | |
2653 | } while (0) | |
f045b2c9 RS |
2654 | |
2655 | /* This is how to output an insn to pop a register from the stack. | |
2656 | It need not be very fast code. */ | |
2657 | ||
4697a36c MM |
2658 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ |
2659 | do { \ | |
2660 | extern char *reg_names[]; \ | |
2661 | asm_fprintf (FILE, "\t{l|lwz} %s,0(%s)\n\t{ai|addic} %s,%s,4\n", \ | |
2662 | reg_names[REGNO], reg_names[1], reg_names[1], \ | |
2663 | reg_names[1]); \ | |
2664 | } while (0) | |
f045b2c9 RS |
2665 | |
2666 | /* This is how to output an element of a case-vector that is absolute. | |
2667 | (RS/6000 does not use such vectors, but we must define this macro | |
2668 | anyway.) */ | |
2669 | ||
3daf36a4 ILT |
2670 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ |
2671 | do { char buf[100]; \ | |
5854b0d0 | 2672 | fputs ((TARGET_32BIT) ? "\t.long " : "\t.llong ", FILE); \ |
3daf36a4 ILT |
2673 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ |
2674 | assemble_name (FILE, buf); \ | |
19d2d16f | 2675 | putc ('\n', FILE); \ |
3daf36a4 | 2676 | } while (0) |
f045b2c9 RS |
2677 | |
2678 | /* This is how to output an element of a case-vector that is relative. */ | |
2679 | ||
2680 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
3daf36a4 | 2681 | do { char buf[100]; \ |
5854b0d0 | 2682 | fputs ((TARGET_32BIT) ? "\t.long " : "\t.llong ", FILE); \ |
3daf36a4 ILT |
2683 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ |
2684 | assemble_name (FILE, buf); \ | |
19d2d16f | 2685 | putc ('-', FILE); \ |
3daf36a4 ILT |
2686 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ |
2687 | assemble_name (FILE, buf); \ | |
19d2d16f | 2688 | putc ('\n', FILE); \ |
3daf36a4 | 2689 | } while (0) |
f045b2c9 RS |
2690 | |
2691 | /* This is how to output an assembler line | |
2692 | that says to advance the location counter | |
2693 | to a multiple of 2**LOG bytes. */ | |
2694 | ||
2695 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
2696 | if ((LOG) != 0) \ | |
2697 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
2698 | ||
2699 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
2700 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
2701 | ||
2702 | /* This says how to output an assembler line | |
2703 | to define a global common symbol. */ | |
2704 | ||
b73fd26c | 2705 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNMENT) \ |
fc3ffe83 | 2706 | do { fputs (".comm ", (FILE)); \ |
f045b2c9 | 2707 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
b73fd26c DE |
2708 | if ( (SIZE) > 4) \ |
2709 | fprintf ((FILE), ",%d,3\n", (SIZE)); \ | |
2710 | else \ | |
2711 | fprintf( (FILE), ",%d\n", (SIZE)); \ | |
2712 | } while (0) | |
f045b2c9 RS |
2713 | |
2714 | /* This says how to output an assembler line | |
2715 | to define a local common symbol. */ | |
2716 | ||
2717 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
fc3ffe83 | 2718 | do { fputs (".lcomm ", (FILE)); \ |
f045b2c9 | 2719 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
fdaff8ba | 2720 | fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \ |
f045b2c9 RS |
2721 | } while (0) |
2722 | ||
2723 | /* Store in OUTPUT a string (made with alloca) containing | |
2724 | an assembler-name for a local static variable named NAME. | |
2725 | LABELNO is an integer which is different for each call. */ | |
2726 | ||
2727 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
2728 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
2729 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
2730 | ||
2731 | /* Define the parentheses used to group arithmetic operations | |
2732 | in assembler code. */ | |
2733 | ||
2734 | #define ASM_OPEN_PAREN "(" | |
2735 | #define ASM_CLOSE_PAREN ")" | |
2736 | ||
2737 | /* Define results of standard character escape sequences. */ | |
2738 | #define TARGET_BELL 007 | |
2739 | #define TARGET_BS 010 | |
2740 | #define TARGET_TAB 011 | |
2741 | #define TARGET_NEWLINE 012 | |
2742 | #define TARGET_VT 013 | |
2743 | #define TARGET_FF 014 | |
2744 | #define TARGET_CR 015 | |
2745 | ||
2746 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
2747 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
2748 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
2749 | ||
2750 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
2751 | ||
2752 | /* Define which CODE values are valid. */ | |
2753 | ||
38250554 | 2754 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '.' || (CODE) == '*') |
f045b2c9 RS |
2755 | |
2756 | /* Print a memory address as an operand to reference that memory location. */ | |
2757 | ||
2758 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
2759 | ||
2760 | /* Define the codes that are matched by predicates in rs6000.c. */ | |
2761 | ||
2762 | #define PREDICATE_CODES \ | |
2763 | {"short_cint_operand", {CONST_INT}}, \ | |
2764 | {"u_short_cint_operand", {CONST_INT}}, \ | |
f357808b | 2765 | {"non_short_cint_operand", {CONST_INT}}, \ |
cd2b37d9 | 2766 | {"gpc_reg_operand", {SUBREG, REG}}, \ |
f045b2c9 RS |
2767 | {"cc_reg_operand", {SUBREG, REG}}, \ |
2768 | {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2769 | {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2770 | {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2771 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
2772 | {"easy_fp_constant", {CONST_DOUBLE}}, \ | |
2773 | {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ | |
414d3ee4 | 2774 | {"lwa_operand", {SUBREG, MEM, REG}}, \ |
b6c9286a | 2775 | {"volatile_mem_operand", {MEM}}, \ |
b7676b46 | 2776 | {"offsettable_addr_operand", {REG, SUBREG, PLUS}}, \ |
f045b2c9 RS |
2777 | {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \ |
2778 | {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ | |
2779 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ | |
f357808b | 2780 | {"non_add_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2781 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 2782 | {"non_and_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2783 | {"logical_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 2784 | {"non_logical_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2785 | {"mask_operand", {CONST_INT}}, \ |
b6c9286a | 2786 | {"count_register_operand", {REG}}, \ |
f045b2c9 | 2787 | {"call_operand", {SYMBOL_REF, REG}}, \ |
f8634644 | 2788 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
38250554 | 2789 | {"input_operand", {SUBREG, MEM, REG, CONST_INT, SYMBOL_REF}}, \ |
f8634644 RK |
2790 | {"load_multiple_operation", {PARALLEL}}, \ |
2791 | {"store_multiple_operation", {PARALLEL}}, \ | |
2792 | {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
e477bbc7 | 2793 | GT, LEU, LTU, GEU, GTU}}, \ |
f8634644 | 2794 | {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ |
e477bbc7 | 2795 | GT, LEU, LTU, GEU, GTU}}, |
75814ad4 | 2796 | |
b6c9286a MM |
2797 | |
2798 | /* uncomment for disabling the corresponding default options */ | |
2799 | /* #define MACHINE_no_sched_interblock */ | |
2800 | /* #define MACHINE_no_sched_speculative */ | |
2801 | /* #define MACHINE_no_sched_speculative_load */ | |
2802 | ||
2803 | /* indicate that issue rate is defined for this machine | |
2804 | (no need to use the default) */ | |
2805 | #define MACHINE_issue_rate | |
2806 | ||
354b734b MM |
2807 | /* General optimization flags. */ |
2808 | extern int optimize; | |
2809 | extern int flag_expensive_optimizations; | |
2810 | ||
75814ad4 | 2811 | /* Declare functions in rs6000.c */ |
6b67933e | 2812 | extern void output_options (); |
75814ad4 | 2813 | extern void rs6000_override_options (); |
6b67933e | 2814 | extern struct rtx_def *rs6000_float_const (); |
75814ad4 MM |
2815 | extern struct rtx_def *rs6000_immed_double_const (); |
2816 | extern int direct_return (); | |
2817 | extern int any_operand (); | |
2818 | extern int short_cint_operand (); | |
2819 | extern int u_short_cint_operand (); | |
2820 | extern int non_short_cint_operand (); | |
2821 | extern int gpc_reg_operand (); | |
2822 | extern int cc_reg_operand (); | |
2823 | extern int reg_or_short_operand (); | |
2824 | extern int reg_or_neg_short_operand (); | |
2825 | extern int reg_or_u_short_operand (); | |
2826 | extern int reg_or_cint_operand (); | |
4e74d8ec | 2827 | extern int num_insns_constant (); |
75814ad4 | 2828 | extern int easy_fp_constant (); |
b7676b46 RK |
2829 | extern int volatile_mem_operand (); |
2830 | extern int offsettable_addr_operand (); | |
75814ad4 MM |
2831 | extern int fp_reg_or_mem_operand (); |
2832 | extern int mem_or_easy_const_operand (); | |
2833 | extern int add_operand (); | |
2834 | extern int non_add_cint_operand (); | |
2835 | extern int logical_operand (); | |
2836 | extern int non_logical_operand (); | |
2837 | extern int mask_constant (); | |
2838 | extern int mask_operand (); | |
2839 | extern int and_operand (); | |
2840 | extern int non_and_cint_operand (); | |
2841 | extern int reg_or_mem_operand (); | |
2842 | extern int lwa_operand (); | |
2843 | extern int call_operand (); | |
2844 | extern int current_file_function_operand (); | |
2845 | extern int input_operand (); | |
7509c759 | 2846 | extern int small_data_operand (); |
4697a36c MM |
2847 | extern void init_cumulative_args (); |
2848 | extern void function_arg_advance (); | |
b6c9286a | 2849 | extern int function_arg_boundary (); |
4697a36c MM |
2850 | extern struct rtx_def *function_arg (); |
2851 | extern int function_arg_partial_nregs (); | |
2852 | extern int function_arg_pass_by_reference (); | |
2853 | extern void setup_incoming_varargs (); | |
2854 | extern struct rtx_def *expand_builtin_saveregs (); | |
b7676b46 | 2855 | extern struct rtx_def *rs6000_stack_temp (); |
7e69e155 | 2856 | extern int expand_block_move (); |
75814ad4 MM |
2857 | extern int load_multiple_operation (); |
2858 | extern int store_multiple_operation (); | |
2859 | extern int branch_comparison_operator (); | |
2860 | extern int scc_comparison_operator (); | |
2861 | extern int includes_lshift_p (); | |
2862 | extern int includes_rshift_p (); | |
2863 | extern int registers_ok_for_quad_peep (); | |
2864 | extern int addrs_ok_for_quad_peep (); | |
2865 | extern enum reg_class secondary_reload_class (); | |
2866 | extern int ccr_bit (); | |
2867 | extern void print_operand (); | |
2868 | extern void print_operand_address (); | |
2869 | extern int first_reg_to_save (); | |
2870 | extern int first_fp_reg_to_save (); | |
75814ad4 | 2871 | extern int rs6000_makes_calls (); |
4697a36c | 2872 | extern rs6000_stack_t *rs6000_stack_info (); |
75814ad4 MM |
2873 | extern void svr4_traceback (); |
2874 | extern void output_prolog (); | |
2875 | extern void output_epilog (); | |
2876 | extern void output_toc (); | |
2877 | extern void output_ascii (); | |
2878 | extern void rs6000_gen_section_name (); | |
2879 | extern void output_function_profiler (); | |
2880 | extern int rs6000_adjust_cost (); | |
b6c9286a MM |
2881 | extern void rs6000_trampoline_template (); |
2882 | extern int rs6000_trampoline_size (); | |
2883 | extern void rs6000_initialize_trampoline (); | |
7509c759 MM |
2884 | extern int rs6000_comp_type_attributes (); |
2885 | extern int rs6000_valid_decl_attribute_p (); | |
2886 | extern int rs6000_valid_type_attribute_p (); | |
2887 | extern void rs6000_set_default_type_attributes (); | |
2888 | extern struct rtx_def *rs6000_dll_import_ref (); | |
6a4cee5f | 2889 | extern struct rtx_def *rs6000_longcall_ref (); |