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f045b2c9 | 1 | /* Definitions of target machine for GNU compiler, for IBM RS/6000. |
5119dc13 | 2 | Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. |
6a7ec0a7 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
f045b2c9 RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
20 | ||
21 | ||
22 | /* Note that some other tm.h files include this one and then override | |
23 | many of the definitions that relate to assembler syntax. */ | |
24 | ||
25 | ||
26 | /* Names to predefine in the preprocessor for this target machine. */ | |
27 | ||
84b49fa7 RK |
28 | #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ |
29 | -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" | |
f045b2c9 RS |
30 | |
31 | /* Print subsidiary information on the compiler version in use. */ | |
32 | #define TARGET_VERSION ; | |
33 | ||
fdaff8ba RS |
34 | /* Tell the assembler to assume that all undefined names are external. |
35 | ||
36 | Don't do this until the fixed IBM assembler is more generally available. | |
37 | When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, | |
38 | ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no | |
b4d6689b RK |
39 | longer be needed. Also, the extern declaration of mcount in ASM_FILE_START |
40 | will no longer be needed. */ | |
f045b2c9 RS |
41 | |
42 | /* #define ASM_SPEC "-u" */ | |
43 | ||
84b49fa7 RK |
44 | /* Define appropriate architecture macros for preprocessor depending on |
45 | target switches. */ | |
46 | ||
47 | #define CPP_SPEC "\ | |
50124474 | 48 | %{posix: -D_POSIX_SOURCE} \ |
84b49fa7 RK |
49 | %{!mcpu*: \ |
50 | %{mpower: %{!mpower2: -D_ARCH_PWR}} \ | |
51 | %{mpower2: -D_ARCH_PWR2} \ | |
52 | %{mpowerpc*: -D_ARCH_PPC} \ | |
53 | %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ | |
54 | %{!mno-power: %{!mpower2: -D_ARCH_PWR}}} \ | |
55 | %{mcpu=common: -D_ARCH_COM} \ | |
56 | %{mcpu=power: -D_ARCH_PWR} \ | |
57 | %{mcpu=powerpc: -D_ARCH_PPC} \ | |
58 | %{mcpu=rios: -D_ARCH_PWR} \ | |
59 | %{mcpu=rios1: -D_ARCH_PWR} \ | |
60 | %{mcpu=rios2: -D_ARCH_PWR2} \ | |
61 | %{mcpu=rsc: -D_ARCH_PWR} \ | |
62 | %{mcpu=rsc1: -D_ARCH_PWR} \ | |
49a0b204 MM |
63 | %{mcpu=403: -D_ARCH_PPC} \ |
64 | %{mcpu=mpc403: -D_ARCH_PPC} \ | |
65 | %{mcpu=ppc403: -D_ARCH_PPC} \ | |
84b49fa7 RK |
66 | %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ |
67 | %{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \ | |
68 | %{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \ | |
69 | %{mcpu=603: -D_ARCH_PPC} \ | |
70 | %{mcpu=mpc603: -D_ARCH_PPC} \ | |
71 | %{mcpu=ppc603: -D_ARCH_PPC} \ | |
72 | %{mcpu=604: -D_ARCH_PPC} \ | |
73 | %{mcpu=mpc604: -D_ARCH_PPC} \ | |
74 | %{mcpu=ppc604: -D_ARCH_PPC}" | |
75 | ||
f045b2c9 RS |
76 | /* Define the options for the binder: Start text at 512, align all segments |
77 | to 512 bytes, and warn if there is text relocation. | |
78 | ||
79 | The -bhalt:4 option supposedly changes the level at which ld will abort, | |
80 | but it also suppresses warnings about multiply defined symbols and is | |
81 | used by the AIX cc command. So we use it here. | |
82 | ||
83 | -bnodelcsect undoes a poor choice of default relating to multiply-defined | |
52c0eaf8 JM |
84 | csects. See AIX documentation for more information about this. |
85 | ||
86 | -bM:SRE tells the linker that the output file is Shared REusable. Note | |
87 | that to actually build a shared library you will also need to specify an | |
88 | export list with the -Wl,-bE option. */ | |
f045b2c9 | 89 | |
c1950f1c | 90 | #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\ |
52c0eaf8 JM |
91 | %{static:-bnso -bI:/lib/syscalls.exp} %{g*:-bexport:/usr/lib/libg.exp}\ |
92 | %{shared:-bM:SRE}" | |
f045b2c9 | 93 | |
58a39e45 RS |
94 | /* Profiled library versions are used by linking with special directories. */ |
95 | #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ | |
96 | %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc" | |
f045b2c9 RS |
97 | |
98 | /* gcc must do the search itself to find libgcc.a, not use -l. */ | |
52c0eaf8 | 99 | #define LIBGCC_SPEC "%{!shared:libgcc.a%s}" |
f045b2c9 RS |
100 | |
101 | /* Don't turn -B into -L if the argument specifies a relative file name. */ | |
102 | #define RELATIVE_PREFIX_NOT_LINKDIR | |
103 | ||
fb623df5 | 104 | /* Architecture type. */ |
f045b2c9 | 105 | |
fb623df5 RK |
106 | extern int target_flags; |
107 | ||
108 | /* Use POWER architecture instructions and MQ register. */ | |
109 | #define MASK_POWER 0x01 | |
110 | ||
6febd581 RK |
111 | /* Use POWER2 extensions to POWER architecture. */ |
112 | #define MASK_POWER2 0x02 | |
113 | ||
fb623df5 | 114 | /* Use PowerPC architecture instructions. */ |
6febd581 RK |
115 | #define MASK_POWERPC 0x04 |
116 | ||
583cf4db RK |
117 | /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */ |
118 | #define MASK_PPC_GPOPT 0x08 | |
119 | ||
120 | /* Use PowerPC Graphics group optional instructions, e.g. fsel. */ | |
121 | #define MASK_PPC_GFXOPT 0x10 | |
f045b2c9 | 122 | |
fb623df5 | 123 | /* Use PowerPC-64 architecture instructions. */ |
583cf4db | 124 | #define MASK_POWERPC64 0x20 |
f045b2c9 | 125 | |
fb623df5 | 126 | /* Use revised mnemonic names defined for PowerPC architecture. */ |
583cf4db | 127 | #define MASK_NEW_MNEMONICS 0x40 |
fb623df5 RK |
128 | |
129 | /* Disable placing fp constants in the TOC; can be turned on when the | |
130 | TOC overflows. */ | |
583cf4db | 131 | #define MASK_NO_FP_IN_TOC 0x80 |
fb623df5 | 132 | |
0b9ccabc RK |
133 | /* Disable placing symbol+offset constants in the TOC; can be turned on when |
134 | the TOC overflows. */ | |
583cf4db | 135 | #define MASK_NO_SUM_IN_TOC 0x100 |
0b9ccabc | 136 | |
fb623df5 | 137 | /* Output only one TOC entry per module. Normally linking fails if |
642a35f1 JW |
138 | there are more than 16K unique variables/constants in an executable. With |
139 | this option, linking fails only if there are more than 16K modules, or | |
140 | if there are more than 16K unique variables/constant in a single module. | |
141 | ||
142 | This is at the cost of having 2 extra loads and one extra store per | |
143 | function, and one less allocatable register. */ | |
583cf4db | 144 | #define MASK_MINIMAL_TOC 0x200 |
642a35f1 | 145 | |
9e654916 RK |
146 | /* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */ |
147 | #define MASK_64BIT 0x400 | |
148 | ||
f85f4585 | 149 | /* Disable use of FPRs. */ |
d14a6d05 | 150 | #define MASK_SOFT_FLOAT 0x800 |
f85f4585 | 151 | |
4d30c363 MM |
152 | /* Enable load/store multiple, even on powerpc */ |
153 | #define MASK_MULTIPLE 0x1000 | |
8a61d227 | 154 | #define MASK_MULTIPLE_SET 0x2000 |
4d30c363 | 155 | |
fb623df5 | 156 | #define TARGET_POWER (target_flags & MASK_POWER) |
6febd581 | 157 | #define TARGET_POWER2 (target_flags & MASK_POWER2) |
fb623df5 | 158 | #define TARGET_POWERPC (target_flags & MASK_POWERPC) |
583cf4db RK |
159 | #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT) |
160 | #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT) | |
fb623df5 RK |
161 | #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) |
162 | #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) | |
163 | #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) | |
0b9ccabc | 164 | #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) |
fb623df5 | 165 | #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) |
9e654916 | 166 | #define TARGET_64BIT (target_flags & MASK_64BIT) |
d14a6d05 | 167 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) |
4d30c363 | 168 | #define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE) |
8a61d227 | 169 | #define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET) |
642a35f1 | 170 | |
d14a6d05 MM |
171 | #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) |
172 | ||
fb623df5 | 173 | /* Run-time compilation parameters selecting different hardware subsets. |
f045b2c9 | 174 | |
fb623df5 | 175 | Macro to define tables used to set the flags. |
f045b2c9 RS |
176 | This is a list in braces of pairs in braces, |
177 | each pair being { "NAME", VALUE } | |
178 | where VALUE is the bits to set or minus the bits to clear. | |
179 | An empty string NAME is used to identify the default VALUE. */ | |
180 | ||
4d30c363 MM |
181 | /* This is meant to be redefined in the host dependent files */ |
182 | #ifndef SUBTARGET_SWITCHES | |
183 | #define SUBTARGET_SWITCHES | |
184 | #endif | |
185 | ||
fb623df5 | 186 | #define TARGET_SWITCHES \ |
d14a6d05 MM |
187 | {{"power", MASK_POWER | MASK_MULTIPLE}, \ |
188 | {"power2", MASK_POWER | MASK_MULTIPLE | MASK_POWER2}, \ | |
6febd581 | 189 | {"no-power2", - MASK_POWER2}, \ |
d14a6d05 | 190 | {"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE)}, \ |
fb623df5 | 191 | {"powerpc", MASK_POWERPC}, \ |
583cf4db RK |
192 | {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \ |
193 | | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \ | |
194 | {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \ | |
195 | {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \ | |
196 | {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \ | |
197 | {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \ | |
fb623df5 RK |
198 | {"new-mnemonics", MASK_NEW_MNEMONICS}, \ |
199 | {"old-mnemonics", -MASK_NEW_MNEMONICS}, \ | |
0b9ccabc RK |
200 | {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ |
201 | | MASK_MINIMAL_TOC)}, \ | |
fb623df5 RK |
202 | {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \ |
203 | {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \ | |
0b9ccabc RK |
204 | {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \ |
205 | {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \ | |
fb623df5 | 206 | {"minimal-toc", MASK_MINIMAL_TOC}, \ |
0b9ccabc | 207 | {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \ |
fb623df5 | 208 | {"no-minimal-toc", - MASK_MINIMAL_TOC}, \ |
d14a6d05 MM |
209 | {"hard-float", - MASK_SOFT_FLOAT}, \ |
210 | {"soft-float", MASK_SOFT_FLOAT}, \ | |
8a61d227 | 211 | {"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET}, \ |
4d30c363 | 212 | {"no-multiple", - MASK_MULTIPLE}, \ |
8a61d227 | 213 | {"no-multiple", MASK_MULTIPLE_SET}, \ |
4d30c363 | 214 | SUBTARGET_SWITCHES \ |
fb623df5 RK |
215 | {"", TARGET_DEFAULT}} |
216 | ||
4d30c363 | 217 | #define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE) |
fb623df5 RK |
218 | |
219 | /* Processor type. */ | |
220 | enum processor_type | |
f86fe1fb | 221 | {PROCESSOR_RIOS1, |
fb623df5 | 222 | PROCESSOR_RIOS2, |
49a0b204 | 223 | PROCESSOR_PPC403, |
fb623df5 RK |
224 | PROCESSOR_PPC601, |
225 | PROCESSOR_PPC603, | |
226 | PROCESSOR_PPC604, | |
227 | PROCESSOR_PPC620}; | |
228 | ||
229 | extern enum processor_type rs6000_cpu; | |
230 | ||
231 | /* Recast the processor type to the cpu attribute. */ | |
232 | #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) | |
233 | ||
8482e358 RK |
234 | /* Define generic processor types based upon current deployment. */ |
235 | #define PROCESSOR_COMMON PROCESSOR_PPC601 | |
236 | #define PROCESSOR_POWER PROCESSOR_RIOS1 | |
237 | #define PROCESSOR_POWERPC PROCESSOR_PPC601 | |
6e151478 | 238 | |
fb623df5 | 239 | /* Define the default processor. This is overridden by other tm.h files. */ |
f86fe1fb | 240 | #define PROCESSOR_DEFAULT PROCESSOR_RIOS1 |
fb623df5 | 241 | |
6febd581 RK |
242 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
243 | and the old mnemonics are dialect zero. */ | |
244 | #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0 | |
245 | ||
fb623df5 RK |
246 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
247 | command options that have values. Its definition is an | |
248 | initializer with a subgrouping for each command option. | |
249 | ||
250 | Each subgrouping contains a string constant, that defines the | |
251 | fixed part of the option name, and the address of a variable. | |
252 | The variable, type `char *', is set to the variable part of the | |
253 | given option if the fixed part matches. The actual option name | |
254 | is made by appending `-m' to the specified name. | |
255 | ||
256 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
257 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
258 | will be set to the string `"512"'. | |
259 | ||
260 | extern char *m88k_short_data; | |
261 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
262 | ||
263 | #define TARGET_OPTIONS \ | |
264 | { {"cpu=", &rs6000_cpu_string}} | |
265 | ||
266 | extern char *rs6000_cpu_string; | |
267 | ||
268 | /* Sometimes certain combinations of command options do not make sense | |
269 | on a particular target machine. You can define a macro | |
270 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
271 | defined, is executed once just after all the command options have | |
272 | been parsed. | |
273 | ||
274 | On the RS/6000 this is used to define the target cpu type. */ | |
275 | ||
b6a2d236 DE |
276 | #define OVERRIDE_OPTIONS \ |
277 | do { \ | |
278 | rs6000_override_options (); \ | |
279 | SUBTARGET_OVERRIDE_OPTIONS; \ | |
280 | } while (0) | |
281 | ||
282 | /* For OS-dependent options */ | |
283 | #ifndef SUBTARGET_OVERRIDE_OPTIONS | |
284 | #define SUBTARGET_OVERRIDE_OPTIONS | |
285 | #endif | |
f045b2c9 | 286 | |
4f074454 RK |
287 | /* Show we can debug even without a frame pointer. */ |
288 | #define CAN_DEBUG_WITHOUT_FP | |
f045b2c9 RS |
289 | \f |
290 | /* target machine storage layout */ | |
291 | ||
df44fa77 RK |
292 | /* Define to support cross compilation to an RS6000 target. */ |
293 | #define REAL_ARITHMETIC | |
294 | ||
13d39dbc | 295 | /* Define this macro if it is advisable to hold scalars in registers |
ef457bda RK |
296 | in a wider mode than that declared by the program. In such cases, |
297 | the value is constrained to be within the bounds of the declared | |
298 | type, but kept valid in the wider mode. The signedness of the | |
299 | extension may differ from that of the type. */ | |
300 | ||
301 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
302 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
303 | && GET_MODE_SIZE (MODE) < 4) \ | |
dac29d65 | 304 | (MODE) = SImode; |
ef457bda | 305 | |
f045b2c9 RS |
306 | /* Define this if most significant bit is lowest numbered |
307 | in instructions that operate on numbered bit-fields. */ | |
308 | /* That is true on RS/6000. */ | |
309 | #define BITS_BIG_ENDIAN 1 | |
310 | ||
311 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
312 | /* That is true on RS/6000. */ | |
313 | #define BYTES_BIG_ENDIAN 1 | |
314 | ||
315 | /* Define this if most significant word of a multiword number is lowest | |
316 | numbered. | |
317 | ||
318 | For RS/6000 we can decide arbitrarily since there are no machine | |
319 | instructions for them. Might as well be consistent with bits and bytes. */ | |
320 | #define WORDS_BIG_ENDIAN 1 | |
321 | ||
fdaff8ba | 322 | /* number of bits in an addressable storage unit */ |
f045b2c9 RS |
323 | #define BITS_PER_UNIT 8 |
324 | ||
325 | /* Width in bits of a "word", which is the contents of a machine register. | |
326 | Note that this is not necessarily the width of data type `int'; | |
327 | if using 16-bit ints on a 68000, this would still be 32. | |
328 | But on a machine with 16-bit registers, this would be 16. */ | |
2e360ab3 RK |
329 | #define BITS_PER_WORD (TARGET_POWERPC64 ? 64 : 32) |
330 | #define MAX_BITS_PER_WORD 64 | |
f045b2c9 RS |
331 | |
332 | /* Width of a word, in units (bytes). */ | |
2e360ab3 | 333 | #define UNITS_PER_WORD (TARGET_POWERPC64 ? 8 : 4) |
ef0e53ce | 334 | #define MIN_UNITS_PER_WORD 4 |
2e360ab3 | 335 | #define UNITS_PER_FP_WORD 8 |
f045b2c9 | 336 | |
915f619f JW |
337 | /* Type used for ptrdiff_t, as a string used in a declaration. */ |
338 | #define PTRDIFF_TYPE "int" | |
339 | ||
f045b2c9 RS |
340 | /* Type used for wchar_t, as a string used in a declaration. */ |
341 | #define WCHAR_TYPE "short unsigned int" | |
342 | ||
343 | /* Width of wchar_t in bits. */ | |
344 | #define WCHAR_TYPE_SIZE 16 | |
345 | ||
9e654916 RK |
346 | /* A C expression for the size in bits of the type `short' on the |
347 | target machine. If you don't define this, the default is half a | |
348 | word. (If this would be less than one storage unit, it is | |
349 | rounded up to one unit.) */ | |
350 | #define SHORT_TYPE_SIZE 16 | |
351 | ||
352 | /* A C expression for the size in bits of the type `int' on the | |
353 | target machine. If you don't define this, the default is one | |
354 | word. */ | |
355 | #define INT_TYPE_SIZE (TARGET_64BIT ? 64 : 32) | |
356 | #define MAX_INT_TYPE_SIZE 64 | |
357 | ||
358 | /* A C expression for the size in bits of the type `long' on the | |
359 | target machine. If you don't define this, the default is one | |
360 | word. */ | |
361 | #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32) | |
362 | #define MAX_LONG_TYPE_SIZE 64 | |
363 | ||
364 | /* A C expression for the size in bits of the type `long long' on the | |
365 | target machine. If you don't define this, the default is two | |
366 | words. */ | |
367 | #define LONG_LONG_TYPE_SIZE 64 | |
368 | ||
369 | /* A C expression for the size in bits of the type `char' on the | |
370 | target machine. If you don't define this, the default is one | |
371 | quarter of a word. (If this would be less than one storage unit, | |
372 | it is rounded up to one unit.) */ | |
373 | #define CHAR_TYPE_SIZE BITS_PER_UNIT | |
374 | ||
375 | /* A C expression for the size in bits of the type `float' on the | |
376 | target machine. If you don't define this, the default is one | |
377 | word. */ | |
378 | #define FLOAT_TYPE_SIZE 32 | |
379 | ||
380 | /* A C expression for the size in bits of the type `double' on the | |
381 | target machine. If you don't define this, the default is two | |
382 | words. */ | |
383 | #define DOUBLE_TYPE_SIZE 64 | |
384 | ||
385 | /* A C expression for the size in bits of the type `long double' on | |
386 | the target machine. If you don't define this, the default is two | |
387 | words. */ | |
388 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
389 | ||
f045b2c9 RS |
390 | /* Width in bits of a pointer. |
391 | See also the macro `Pmode' defined below. */ | |
9e654916 | 392 | #define POINTER_SIZE (TARGET_64BIT ? 64 : 32) |
f045b2c9 RS |
393 | |
394 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
9e654916 | 395 | #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32) |
f045b2c9 RS |
396 | |
397 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
398 | #define STACK_BOUNDARY 64 | |
399 | ||
400 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
401 | #define FUNCTION_BOUNDARY 32 | |
402 | ||
403 | /* No data type wants to be aligned rounder than this. */ | |
9e654916 | 404 | #define BIGGEST_ALIGNMENT (TARGET_64BIT ? 64 : 32) |
f045b2c9 RS |
405 | |
406 | /* Alignment of field after `int : 0' in a structure. */ | |
407 | #define EMPTY_FIELD_BOUNDARY 32 | |
408 | ||
409 | /* Every structure's size must be a multiple of this. */ | |
410 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
411 | ||
412 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
413 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
414 | ||
415 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
416 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
417 | (TREE_CODE (EXP) == STRING_CST \ | |
418 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
419 | ||
420 | /* Make arrays of chars word-aligned for the same reasons. */ | |
421 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
422 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
423 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
424 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
425 | ||
fdaff8ba | 426 | /* Non-zero if move instructions will actually fail to work |
f045b2c9 | 427 | when given unaligned data. */ |
fdaff8ba | 428 | #define STRICT_ALIGNMENT 0 |
f045b2c9 RS |
429 | \f |
430 | /* Standard register usage. */ | |
431 | ||
432 | /* Number of actual hardware registers. | |
433 | The hardware registers are assigned numbers for the compiler | |
434 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
435 | All registers that the compiler knows about must be given numbers, | |
436 | even those that are not normally considered general registers. | |
437 | ||
438 | RS/6000 has 32 fixed-point registers, 32 floating-point registers, | |
439 | an MQ register, a count register, a link register, and 8 condition | |
440 | register fields, which we view here as separate registers. | |
441 | ||
442 | In addition, the difference between the frame and argument pointers is | |
443 | a function of the number of registers saved, so we need to have a | |
444 | register for AP that will later be eliminated in favor of SP or FP. | |
445 | This is a normal register, but it is fixed. */ | |
446 | ||
447 | #define FIRST_PSEUDO_REGISTER 76 | |
448 | ||
449 | /* 1 for registers that have pervasive standard uses | |
450 | and are not available for the register allocator. | |
451 | ||
452 | On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer. | |
453 | ||
454 | cr5 is not supposed to be used. */ | |
455 | ||
456 | #define FIXED_REGISTERS \ | |
457 | {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
458 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
459 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
460 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
461 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0} | |
462 | ||
463 | /* 1 for registers not available across function calls. | |
464 | These must include the FIXED_REGISTERS and also any | |
465 | registers that can be used without being saved. | |
466 | The latter must include the registers where values are returned | |
467 | and the register where structure-value addresses are passed. | |
468 | Aside from that, you can include as many other registers as you like. */ | |
469 | ||
470 | #define CALL_USED_REGISTERS \ | |
471 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \ | |
472 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
473 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ | |
474 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
475 | 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1} | |
476 | ||
477 | /* List the order in which to allocate registers. Each register must be | |
478 | listed once, even those in FIXED_REGISTERS. | |
479 | ||
480 | We allocate in the following order: | |
481 | fp0 (not saved or used for anything) | |
482 | fp13 - fp2 (not saved; incoming fp arg registers) | |
483 | fp1 (not saved; return value) | |
484 | fp31 - fp14 (saved; order given to save least number) | |
485 | cr1, cr6, cr7 (not saved or special) | |
486 | cr0 (not saved, but used for arithmetic operations) | |
487 | cr2, cr3, cr4 (saved) | |
488 | r0 (not saved; cannot be base reg) | |
489 | r9 (not saved; best for TImode) | |
490 | r11, r10, r8-r4 (not saved; highest used first to make less conflict) | |
491 | r3 (not saved; return value register) | |
492 | r31 - r13 (saved; order given to save least number) | |
493 | r12 (not saved; if used for DImode or DFmode would use r13) | |
494 | mq (not saved; best to use it if we can) | |
495 | ctr (not saved; when we have the choice ctr is better) | |
496 | lr (saved) | |
497 | cr5, r1, r2, ap (fixed) */ | |
498 | ||
499 | #define REG_ALLOC_ORDER \ | |
500 | {32, \ | |
501 | 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ | |
502 | 33, \ | |
503 | 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ | |
504 | 50, 49, 48, 47, 46, \ | |
505 | 69, 74, 75, 68, 70, 71, 72, \ | |
506 | 0, \ | |
507 | 9, 11, 10, 8, 7, 6, 5, 4, \ | |
508 | 3, \ | |
509 | 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ | |
510 | 18, 17, 16, 15, 14, 13, 12, \ | |
511 | 64, 66, 65, \ | |
512 | 73, 1, 2, 67} | |
513 | ||
514 | /* True if register is floating-point. */ | |
515 | #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) | |
516 | ||
517 | /* True if register is a condition register. */ | |
518 | #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) | |
519 | ||
520 | /* True if register is an integer register. */ | |
521 | #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67) | |
522 | ||
523 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
524 | to hold something of mode MODE. | |
525 | This is ordinarily the length in words of a value of mode MODE | |
526 | but can be less for certain modes in special long registers. | |
527 | ||
528 | On RS/6000, ordinary registers hold 32 bits worth; | |
529 | a single floating point register holds 64 bits worth. */ | |
530 | ||
531 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
532 | (FP_REGNO_P (REGNO) \ | |
2e360ab3 | 533 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 RS |
534 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
535 | ||
536 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
bdfd4e31 RK |
537 | For POWER and PowerPC, the GPRs can hold any mode, but the float |
538 | registers only can hold floating modes and DImode, and CR register only | |
539 | can hold CC modes. We cannot put TImode anywhere except general | |
540 | register and it must be able to fit within the register set. */ | |
f045b2c9 RS |
541 | |
542 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
bdfd4e31 RK |
543 | (FP_REGNO_P (REGNO) ? \ |
544 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
545 | || (GET_MODE_CLASS (MODE) == MODE_INT \ | |
2e360ab3 | 546 | && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \ |
f045b2c9 | 547 | : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ |
bdfd4e31 RK |
548 | : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ |
549 | && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ | |
f045b2c9 RS |
550 | : 1) |
551 | ||
552 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
553 | when one has mode MODE1 and one has mode MODE2. | |
554 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
555 | for any hard reg, then this must be 0 for correct output. */ | |
556 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
557 | (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
558 | ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
559 | : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
560 | ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
561 | : GET_MODE_CLASS (MODE1) == MODE_CC \ | |
562 | ? GET_MODE_CLASS (MODE2) == MODE_CC \ | |
563 | : GET_MODE_CLASS (MODE2) == MODE_CC \ | |
564 | ? GET_MODE_CLASS (MODE1) == MODE_CC \ | |
565 | : 1) | |
566 | ||
567 | /* A C expression returning the cost of moving data from a register of class | |
568 | CLASS1 to one of CLASS2. | |
569 | ||
570 | On the RS/6000, copying between floating-point and fixed-point | |
571 | registers is expensive. */ | |
572 | ||
573 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
574 | ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ | |
575 | : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ | |
576 | : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ | |
a4b970a0 | 577 | : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \ |
5119dc13 RK |
578 | || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \ |
579 | || (CLASS1) == LINK_OR_CTR_REGS) \ | |
a4b970a0 | 580 | && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \ |
5119dc13 RK |
581 | || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \ |
582 | || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \ | |
f045b2c9 RS |
583 | : 2) |
584 | ||
585 | /* A C expressions returning the cost of moving data of MODE from a register to | |
586 | or from memory. | |
587 | ||
588 | On the RS/6000, bump this up a bit. */ | |
589 | ||
ab4a5fc9 RK |
590 | #define MEMORY_MOVE_COST(MODE) \ |
591 | ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
592 | && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \ | |
593 | ? 3 : 2) \ | |
594 | + 4) | |
f045b2c9 RS |
595 | |
596 | /* Specify the cost of a branch insn; roughly the number of extra insns that | |
597 | should be added to avoid a branch. | |
598 | ||
ef457bda | 599 | Set this to 3 on the RS/6000 since that is roughly the average cost of an |
f045b2c9 RS |
600 | unscheduled conditional branch. */ |
601 | ||
ef457bda | 602 | #define BRANCH_COST 3 |
f045b2c9 | 603 | |
5a5e4c2c RK |
604 | /* A C statement (sans semicolon) to update the integer variable COST |
605 | based on the relationship between INSN that is dependent on | |
606 | DEP_INSN through the dependence LINK. The default is to make no | |
607 | adjustment to COST. On the RS/6000, ignore the cost of anti- and | |
608 | output-dependencies. In fact, output dependencies on the CR do have | |
609 | a cost, but it is probably not worthwhile to track it. */ | |
610 | ||
611 | #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ | |
b0634e74 | 612 | (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST) |
5a5e4c2c | 613 | |
6febd581 RK |
614 | /* Define this macro to change register usage conditional on target flags. |
615 | Set MQ register fixed (already call_used) if not POWER architecture | |
f85f4585 RK |
616 | (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. |
617 | Conditionally disable FPRs. */ | |
618 | ||
619 | #define CONDITIONAL_REGISTER_USAGE \ | |
620 | { \ | |
621 | if (! TARGET_POWER) \ | |
622 | fixed_regs[64] = 1; \ | |
d14a6d05 MM |
623 | if (TARGET_SOFT_FLOAT) \ |
624 | for (i = 32; i < 64; i++) \ | |
f85f4585 RK |
625 | fixed_regs[i] = call_used_regs[i] = 1; \ |
626 | } | |
6febd581 | 627 | |
f045b2c9 RS |
628 | /* Specify the registers used for certain standard purposes. |
629 | The values of these macros are register numbers. */ | |
630 | ||
631 | /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ | |
632 | /* #define PC_REGNUM */ | |
633 | ||
634 | /* Register to use for pushing function arguments. */ | |
635 | #define STACK_POINTER_REGNUM 1 | |
636 | ||
637 | /* Base register for access to local variables of the function. */ | |
638 | #define FRAME_POINTER_REGNUM 31 | |
639 | ||
640 | /* Value should be nonzero if functions must have frame pointers. | |
641 | Zero means the frame pointer need not be set up (and parms | |
642 | may be accessed via the stack pointer) in functions that seem suitable. | |
643 | This is computed in `reload', in reload1.c. */ | |
644 | #define FRAME_POINTER_REQUIRED 0 | |
645 | ||
646 | /* Base register for access to arguments of the function. */ | |
647 | #define ARG_POINTER_REGNUM 67 | |
648 | ||
649 | /* Place to put static chain when calling a function that requires it. */ | |
650 | #define STATIC_CHAIN_REGNUM 11 | |
651 | ||
652 | /* Place that structure value return address is placed. | |
653 | ||
654 | On the RS/6000, it is passed as an extra parameter. */ | |
655 | #define STRUCT_VALUE 0 | |
656 | \f | |
657 | /* Define the classes of registers for register constraints in the | |
658 | machine description. Also define ranges of constants. | |
659 | ||
660 | One of the classes must always be named ALL_REGS and include all hard regs. | |
661 | If there is more than one class, another class must be named NO_REGS | |
662 | and contain no registers. | |
663 | ||
664 | The name GENERAL_REGS must be the name of a class (or an alias for | |
665 | another name such as ALL_REGS). This is the class of registers | |
666 | that is allowed by "g" or "r" in a register constraint. | |
667 | Also, registers outside this class are allocated only when | |
668 | instructions express preferences for them. | |
669 | ||
670 | The classes must be numbered in nondecreasing order; that is, | |
671 | a larger-numbered class must never be contained completely | |
672 | in a smaller-numbered class. | |
673 | ||
674 | For any two classes, it is very desirable that there be another | |
675 | class that represents their union. */ | |
676 | ||
677 | /* The RS/6000 has three types of registers, fixed-point, floating-point, | |
678 | and condition registers, plus three special registers, MQ, CTR, and the | |
679 | link register. | |
680 | ||
681 | However, r0 is special in that it cannot be used as a base register. | |
682 | So make a class for registers valid as base registers. | |
683 | ||
684 | Also, cr0 is the only condition code register that can be used in | |
685 | arithmetic insns, so make a separate class for it. */ | |
686 | ||
687 | enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS, | |
688 | NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, | |
e8a8bc24 RK |
689 | SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS, |
690 | ALL_REGS, LIM_REG_CLASSES }; | |
f045b2c9 RS |
691 | |
692 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
693 | ||
694 | /* Give names of register classes as strings for dump file. */ | |
695 | ||
696 | #define REG_CLASS_NAMES \ | |
697 | { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \ | |
698 | "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \ | |
e8a8bc24 RK |
699 | "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \ |
700 | "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" } | |
f045b2c9 RS |
701 | |
702 | /* Define which registers fit in which classes. | |
703 | This is an initializer for a vector of HARD_REG_SET | |
704 | of length N_REG_CLASSES. */ | |
705 | ||
706 | #define REG_CLASS_CONTENTS \ | |
707 | { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \ | |
e8a8bc24 RK |
708 | {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \ |
709 | {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \ | |
710 | {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \ | |
711 | {~0, ~0, 0xffff} } | |
f045b2c9 RS |
712 | |
713 | /* The same information, inverted: | |
714 | Return the class number of the smallest class containing | |
715 | reg number REGNO. This could be a conditional expression | |
716 | or could index an array. */ | |
717 | ||
718 | #define REGNO_REG_CLASS(REGNO) \ | |
719 | ((REGNO) == 0 ? GENERAL_REGS \ | |
720 | : (REGNO) < 32 ? BASE_REGS \ | |
721 | : FP_REGNO_P (REGNO) ? FLOAT_REGS \ | |
722 | : (REGNO) == 68 ? CR0_REGS \ | |
723 | : CR_REGNO_P (REGNO) ? CR_REGS \ | |
724 | : (REGNO) == 64 ? MQ_REGS \ | |
725 | : (REGNO) == 65 ? LINK_REGS \ | |
726 | : (REGNO) == 66 ? CTR_REGS \ | |
727 | : (REGNO) == 67 ? BASE_REGS \ | |
728 | : NO_REGS) | |
729 | ||
730 | /* The class value for index registers, and the one for base regs. */ | |
731 | #define INDEX_REG_CLASS GENERAL_REGS | |
732 | #define BASE_REG_CLASS BASE_REGS | |
733 | ||
734 | /* Get reg_class from a letter such as appears in the machine description. */ | |
735 | ||
736 | #define REG_CLASS_FROM_LETTER(C) \ | |
737 | ((C) == 'f' ? FLOAT_REGS \ | |
738 | : (C) == 'b' ? BASE_REGS \ | |
739 | : (C) == 'h' ? SPECIAL_REGS \ | |
740 | : (C) == 'q' ? MQ_REGS \ | |
741 | : (C) == 'c' ? CTR_REGS \ | |
742 | : (C) == 'l' ? LINK_REGS \ | |
743 | : (C) == 'x' ? CR0_REGS \ | |
744 | : (C) == 'y' ? CR_REGS \ | |
745 | : NO_REGS) | |
746 | ||
747 | /* The letters I, J, K, L, M, N, and P in a register constraint string | |
748 | can be used to stand for particular ranges of immediate operands. | |
749 | This macro defines what the ranges are. | |
750 | C is the letter, and VALUE is a constant value. | |
751 | Return 1 if VALUE is in the range specified by C. | |
752 | ||
753 | `I' is signed 16-bit constants | |
754 | `J' is a constant with only the high-order 16 bits non-zero | |
755 | `K' is a constant with only the low-order 16 bits non-zero | |
756 | `L' is a constant that can be placed into a mask operand | |
757 | `M' is a constant that is greater than 31 | |
758 | `N' is a constant that is an exact power of two | |
759 | `O' is the constant zero | |
760 | `P' is a constant whose negation is a signed 16-bit constant */ | |
761 | ||
762 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
763 | ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \ | |
764 | : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \ | |
765 | : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \ | |
766 | : (C) == 'L' ? mask_constant (VALUE) \ | |
767 | : (C) == 'M' ? (VALUE) > 31 \ | |
768 | : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ | |
769 | : (C) == 'O' ? (VALUE) == 0 \ | |
770 | : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \ | |
771 | : 0) | |
772 | ||
773 | /* Similar, but for floating constants, and defining letters G and H. | |
774 | Here VALUE is the CONST_DOUBLE rtx itself. | |
775 | ||
776 | We flag for special constants when we can copy the constant into | |
777 | a general register in two insns for DF and one insn for SF. */ | |
778 | ||
779 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
780 | ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0) | |
781 | ||
782 | /* Optional extra constraints for this machine. | |
783 | ||
784 | For the RS/6000, `Q' means that this is a memory operand that is just | |
785 | an offset from a register. */ | |
786 | ||
e8a8bc24 RK |
787 | #define EXTRA_CONSTRAINT(OP, C) \ |
788 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ | |
d537c24d | 789 | : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \ |
e8a8bc24 | 790 | : 0) |
f045b2c9 RS |
791 | |
792 | /* Given an rtx X being reloaded into a reg required to be | |
793 | in class CLASS, return the class of reg to actually use. | |
794 | In general this is just CLASS; but on some machines | |
795 | in some cases it is preferable to use a more restrictive class. | |
796 | ||
797 | On the RS/6000, we have to return NO_REGS when we want to reload a | |
798 | floating-point CONST_DOUBLE to force it to be copied to memory. */ | |
799 | ||
800 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
801 | ((GET_CODE (X) == CONST_DOUBLE \ | |
802 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
803 | ? NO_REGS : (CLASS)) | |
804 | ||
805 | /* Return the register class of a scratch register needed to copy IN into | |
806 | or out of a register in CLASS in MODE. If it can be done directly, | |
807 | NO_REGS is returned. */ | |
808 | ||
809 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
810 | secondary_reload_class (CLASS, MODE, IN) | |
811 | ||
7ea555a4 RK |
812 | /* If we are copying between FP registers and anything else, we need a memory |
813 | location. */ | |
814 | ||
815 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ | |
816 | ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS)) | |
817 | ||
f045b2c9 RS |
818 | /* Return the maximum number of consecutive registers |
819 | needed to represent mode MODE in a register of class CLASS. | |
820 | ||
821 | On RS/6000, this is the size of MODE in words, | |
822 | except in the FP regs, where a single reg is enough for two words. */ | |
823 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
824 | ((CLASS) == FLOAT_REGS \ | |
2e360ab3 | 825 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 | 826 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
580d3230 RK |
827 | |
828 | /* If defined, gives a class of registers that cannot be used as the | |
829 | operand of a SUBREG that changes the size of the object. */ | |
830 | ||
831 | #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS | |
f045b2c9 RS |
832 | \f |
833 | /* Stack layout; function entry, exit and calling. */ | |
834 | ||
835 | /* Define this if pushing a word on the stack | |
836 | makes the stack pointer a smaller address. */ | |
837 | #define STACK_GROWS_DOWNWARD | |
838 | ||
839 | /* Define this if the nominal address of the stack frame | |
840 | is at the high-address end of the local variables; | |
841 | that is, each additional local variable allocated | |
842 | goes at a more negative offset in the frame. | |
843 | ||
844 | On the RS/6000, we grow upwards, from the area after the outgoing | |
845 | arguments. */ | |
846 | /* #define FRAME_GROWS_DOWNWARD */ | |
847 | ||
848 | /* Offset within stack frame to start allocating local variables at. | |
849 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
850 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
851 | of the first local allocated. | |
852 | ||
853 | On the RS/6000, the frame pointer is the same as the stack pointer, | |
854 | except for dynamic allocations. So we start after the fixed area and | |
855 | outgoing parameter area. */ | |
856 | ||
9e654916 RK |
857 | #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size \ |
858 | + (TARGET_64BIT ? 48 : 24)) | |
f045b2c9 RS |
859 | |
860 | /* If we generate an insn to push BYTES bytes, | |
861 | this says how many the stack pointer really advances by. | |
862 | On RS/6000, don't define this because there are no push insns. */ | |
863 | /* #define PUSH_ROUNDING(BYTES) */ | |
864 | ||
865 | /* Offset of first parameter from the argument pointer register value. | |
866 | On the RS/6000, we define the argument pointer to the start of the fixed | |
867 | area. */ | |
9e654916 | 868 | #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? 48 : 24) |
f045b2c9 RS |
869 | |
870 | /* Define this if stack space is still allocated for a parameter passed | |
871 | in a register. The value is the number of bytes allocated to this | |
872 | area. */ | |
9e654916 | 873 | #define REG_PARM_STACK_SPACE(FNDECL) (TARGET_64BIT ? 64 : 32) |
f045b2c9 RS |
874 | |
875 | /* Define this if the above stack space is to be considered part of the | |
876 | space allocated by the caller. */ | |
877 | #define OUTGOING_REG_PARM_STACK_SPACE | |
878 | ||
879 | /* This is the difference between the logical top of stack and the actual sp. | |
880 | ||
881 | For the RS/6000, sp points past the fixed area. */ | |
9e654916 | 882 | #define STACK_POINTER_OFFSET (TARGET_64BIT ? 48 : 24) |
f045b2c9 RS |
883 | |
884 | /* Define this if the maximum size of all the outgoing args is to be | |
885 | accumulated and pushed during the prologue. The amount can be | |
886 | found in the variable current_function_outgoing_args_size. */ | |
887 | #define ACCUMULATE_OUTGOING_ARGS | |
888 | ||
889 | /* Value is the number of bytes of arguments automatically | |
890 | popped when returning from a subroutine call. | |
8b109b37 | 891 | FUNDECL is the declaration node of the function (as a tree), |
f045b2c9 RS |
892 | FUNTYPE is the data type of the function (as a tree), |
893 | or for a library call it is an identifier node for the subroutine name. | |
894 | SIZE is the number of bytes of arguments passed on the stack. */ | |
895 | ||
8b109b37 | 896 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
f045b2c9 RS |
897 | |
898 | /* Define how to find the value returned by a function. | |
899 | VALTYPE is the data type of the value (as a tree). | |
900 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
901 | otherwise, FUNC is 0. | |
902 | ||
903 | On RS/6000 an integer value is in r3 and a floating-point value is in | |
d14a6d05 | 904 | fp1, unless -msoft-float. */ |
f045b2c9 RS |
905 | |
906 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
907 | gen_rtx (REG, TYPE_MODE (VALTYPE), \ | |
d14a6d05 | 908 | TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) |
f045b2c9 RS |
909 | |
910 | /* Define how to find the value returned by a library function | |
911 | assuming the value has mode MODE. */ | |
912 | ||
913 | #define LIBCALL_VALUE(MODE) \ | |
d14a6d05 | 914 | gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) |
f045b2c9 RS |
915 | |
916 | /* The definition of this macro implies that there are cases where | |
917 | a scalar value cannot be returned in registers. | |
918 | ||
919 | For the RS/6000, any structure or union type is returned in memory. */ | |
920 | ||
921 | #define RETURN_IN_MEMORY(TYPE) \ | |
e419152d | 922 | (TYPE_MODE (TYPE) == BLKmode) |
f045b2c9 RS |
923 | |
924 | /* 1 if N is a possible register number for a function value | |
925 | as seen by the caller. | |
926 | ||
927 | On RS/6000, this is r3 and fp1. */ | |
928 | ||
929 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33)) | |
930 | ||
931 | /* 1 if N is a possible register number for function argument passing. | |
932 | On RS/6000, these are r3-r10 and fp1-fp13. */ | |
933 | ||
934 | #define FUNCTION_ARG_REGNO_P(N) \ | |
935 | (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45)) | |
936 | \f | |
937 | /* Define a data type for recording info about an argument list | |
938 | during the scan of that argument list. This data type should | |
939 | hold all necessary information about the function itself | |
940 | and about the args processed so far, enough to enable macros | |
941 | such as FUNCTION_ARG to determine where the next arg should go. | |
942 | ||
943 | On the RS/6000, this is a structure. The first element is the number of | |
944 | total argument words, the second is used to store the next | |
945 | floating-point register number, and the third says how many more args we | |
946 | have prototype types for. */ | |
947 | ||
948 | struct rs6000_args {int words, fregno, nargs_prototype; }; | |
949 | #define CUMULATIVE_ARGS struct rs6000_args | |
950 | ||
951 | /* Define intermediate macro to compute the size (in registers) of an argument | |
952 | for the RS/6000. */ | |
953 | ||
954 | #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \ | |
955 | (! (NAMED) ? 0 \ | |
956 | : (MODE) != BLKmode \ | |
957 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
958 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
959 | ||
960 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
961 | for a call to a function whose data type is FNTYPE. | |
962 | For a library call, FNTYPE is 0. */ | |
963 | ||
964 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
965 | (CUM).words = 0, \ | |
966 | (CUM).fregno = 33, \ | |
967 | (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ | |
968 | ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ | |
969 | + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ | |
970 | || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \ | |
971 | : 0) | |
972 | ||
973 | /* Similar, but when scanning the definition of a procedure. We always | |
974 | set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ | |
975 | ||
976 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ | |
977 | (CUM).words = 0, \ | |
978 | (CUM).fregno = 33, \ | |
979 | (CUM).nargs_prototype = 1000 | |
980 | ||
981 | /* Update the data in CUM to advance over an argument | |
982 | of mode MODE and data type TYPE. | |
983 | (TYPE is null for libcalls where that information may not be available.) */ | |
984 | ||
985 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
986 | { (CUM).nargs_prototype--; \ | |
987 | if (NAMED) \ | |
988 | { \ | |
989 | (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \ | |
990 | if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \ | |
991 | (CUM).fregno++; \ | |
992 | } \ | |
993 | } | |
994 | ||
995 | /* Non-zero if we can use a floating-point register to pass this arg. */ | |
996 | #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ | |
d14a6d05 | 997 | (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46 && TARGET_HARD_FLOAT) |
f045b2c9 RS |
998 | |
999 | /* Determine where to put an argument to a function. | |
1000 | Value is zero to push the argument on the stack, | |
1001 | or a hard register in which to store the argument. | |
1002 | ||
1003 | MODE is the argument's machine mode. | |
1004 | TYPE is the data type of the argument (as a tree). | |
1005 | This is null for libcalls where that information may | |
1006 | not be available. | |
1007 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1008 | the preceding args and about the function being called. | |
1009 | NAMED is nonzero if this argument is a named parameter | |
1010 | (otherwise it is an extra parameter matching an ellipsis). | |
1011 | ||
1012 | On RS/6000 the first eight words of non-FP are normally in registers | |
1013 | and the rest are pushed. The first 13 FP args are in registers. | |
1014 | ||
1015 | If this is floating-point and no prototype is specified, we use | |
4d6697ca RK |
1016 | both an FP and integer register (or possibly FP reg and stack). Library |
1017 | functions (when TYPE is zero) always have the proper types for args, | |
1018 | so we can pass the FP value just in one register. emit_library_function | |
1019 | doesn't support EXPR_LIST anyway. */ | |
f045b2c9 RS |
1020 | |
1021 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
1022 | (! (NAMED) ? 0 \ | |
38bd31fc | 1023 | : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ |
d072107f | 1024 | : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \ |
4d6697ca | 1025 | ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \ |
f045b2c9 RS |
1026 | ? gen_rtx (REG, MODE, (CUM).fregno) \ |
1027 | : ((CUM).words < 8 \ | |
1028 | ? gen_rtx (EXPR_LIST, VOIDmode, \ | |
1029 | gen_rtx (REG, (MODE), 3 + (CUM).words), \ | |
1030 | gen_rtx (REG, (MODE), (CUM).fregno)) \ | |
1031 | : gen_rtx (EXPR_LIST, VOIDmode, 0, \ | |
1032 | gen_rtx (REG, (MODE), (CUM).fregno)))) \ | |
1033 | : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0) | |
1034 | ||
1035 | /* For an arg passed partly in registers and partly in memory, | |
1036 | this is the number of registers used. | |
1037 | For args passed entirely in registers or entirely in memory, zero. */ | |
1038 | ||
1039 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
1040 | (! (NAMED) ? 0 \ | |
1041 | : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \ | |
1042 | : (((CUM).words < 8 \ | |
1043 | && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \ | |
1044 | ? 8 - (CUM).words : 0)) | |
1045 | ||
1046 | /* Perform any needed actions needed for a function that is receiving a | |
1047 | variable number of arguments. | |
1048 | ||
1049 | CUM is as above. | |
1050 | ||
1051 | MODE and TYPE are the mode and type of the current parameter. | |
1052 | ||
1053 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1054 | that must be pushed by the prolog to pretend that our caller pushed | |
1055 | it. | |
1056 | ||
1057 | Normally, this macro will push all remaining incoming registers on the | |
1058 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1059 | ||
1060 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ | |
1061 | { if ((CUM).words < 8) \ | |
1062 | { \ | |
1063 | int first_reg_offset = (CUM).words; \ | |
1064 | \ | |
1065 | if (MUST_PASS_IN_STACK (MODE, TYPE)) \ | |
1066 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ | |
1067 | \ | |
1068 | if (first_reg_offset > 8) \ | |
1069 | first_reg_offset = 8; \ | |
1070 | \ | |
1071 | if (! (NO_RTL) && first_reg_offset != 8) \ | |
1072 | move_block_from_reg \ | |
1073 | (3 + first_reg_offset, \ | |
1074 | gen_rtx (MEM, BLKmode, \ | |
1075 | plus_constant (virtual_incoming_args_rtx, \ | |
1076 | first_reg_offset * 4)), \ | |
02892e06 | 1077 | 8 - first_reg_offset, (8 - first_reg_offset) * UNITS_PER_WORD); \ |
f045b2c9 RS |
1078 | PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \ |
1079 | } \ | |
1080 | } | |
1081 | ||
1082 | /* This macro generates the assembly code for function entry. | |
1083 | FILE is a stdio stream to output the code to. | |
1084 | SIZE is an int: how many units of temporary storage to allocate. | |
1085 | Refer to the array `regs_ever_live' to determine which registers | |
1086 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1087 | is ever used in the function. This macro is responsible for | |
1088 | knowing which registers should not be saved even if used. */ | |
1089 | ||
1090 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
1091 | ||
1092 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
58a39e45 | 1093 | for profiling a function entry. */ |
f045b2c9 RS |
1094 | |
1095 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
58a39e45 | 1096 | output_function_profiler ((FILE), (LABELNO)); |
f045b2c9 RS |
1097 | |
1098 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1099 | the stack pointer does not matter. No definition is equivalent to | |
1100 | always zero. | |
1101 | ||
1102 | On the RS/6000, this is non-zero because we can restore the stack from | |
1103 | its backpointer, which we maintain. */ | |
1104 | #define EXIT_IGNORE_STACK 1 | |
1105 | ||
1106 | /* This macro generates the assembly code for function exit, | |
1107 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1108 | then individual return instructions are generated for each | |
1109 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1110 | ||
1111 | The function epilogue should not depend on the current stack pointer! | |
1112 | It should use the frame pointer only. This is mandatory because | |
1113 | of alloca; we also take advantage of it to omit stack adjustments | |
1114 | before returning. */ | |
1115 | ||
1116 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
1117 | \f | |
1118 | /* Output assembler code for a block containing the constant parts | |
1119 | of a trampoline, leaving space for the variable parts. | |
1120 | ||
1121 | The trampoline should set the static chain pointer to value placed | |
1122 | into the trampoline and should branch to the specified routine. | |
1123 | ||
1124 | On the RS/6000, this is not code at all, but merely a data area, | |
1125 | since that is the way all functions are called. The first word is | |
1126 | the address of the function, the second word is the TOC pointer (r2), | |
1127 | and the third word is the static chain value. */ | |
1128 | ||
1129 | #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); } | |
1130 | ||
1131 | /* Length in units of the trampoline for entering a nested function. */ | |
1132 | ||
1133 | #define TRAMPOLINE_SIZE 12 | |
1134 | ||
1135 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1136 | FNADDR is an RTX for the address of the function's pure code. | |
1137 | CXT is an RTX for the static chain value for the function. */ | |
1138 | ||
1139 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
1140 | { \ | |
f045b2c9 | 1141 | emit_move_insn (gen_rtx (MEM, SImode, \ |
858b728c RK |
1142 | memory_address (SImode, (ADDR))), \ |
1143 | gen_rtx (MEM, SImode, \ | |
1144 | memory_address (SImode, (FNADDR)))); \ | |
f045b2c9 | 1145 | emit_move_insn (gen_rtx (MEM, SImode, \ |
858b728c RK |
1146 | memory_address (SImode, \ |
1147 | plus_constant ((ADDR), 4))), \ | |
1148 | gen_rtx (MEM, SImode, \ | |
1149 | memory_address (SImode, \ | |
1150 | plus_constant ((FNADDR), 4)))); \ | |
1151 | emit_move_insn (gen_rtx (MEM, SImode, \ | |
1152 | memory_address (SImode, \ | |
1153 | plus_constant ((ADDR), 8))), \ | |
1154 | force_reg (SImode, (CXT))); \ | |
f045b2c9 RS |
1155 | } |
1156 | \f | |
f33985c6 MS |
1157 | /* Definitions for __builtin_return_address and __builtin_frame_address. |
1158 | __builtin_return_address (0) should give link register (65), enable | |
1159 | this. */ | |
1160 | /* This should be uncommented, so that the link register is used, but | |
1161 | currently this would result in unmatched insns and spilling fixed | |
1162 | registers so we'll leave it for another day. When these problems are | |
1163 | taken care of one additional fetch will be necessary in RETURN_ADDR_RTX. | |
1164 | (mrs) */ | |
1165 | /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
1166 | /* The current return address is in link register (65). The return address | |
1167 | of anything farther back is accessed normally at an offset of 8 from the | |
1168 | frame pointer. */ | |
1169 | #define RETURN_ADDR_RTX(count, frame) \ | |
1170 | ((count == -1) \ | |
1171 | ? gen_rtx (REG, Pmode, 65) \ | |
1172 | : copy_to_reg (gen_rtx (MEM, Pmode, \ | |
1173 | memory_address (Pmode, \ | |
1174 | plus_constant (copy_to_reg (gen_rtx (MEM, Pmode, \ | |
1175 | memory_address (Pmode, frame))), \ | |
1176 | 8))))) | |
1177 | \f | |
f045b2c9 RS |
1178 | /* Definitions for register eliminations. |
1179 | ||
1180 | We have two registers that can be eliminated on the RS/6000. First, the | |
1181 | frame pointer register can often be eliminated in favor of the stack | |
1182 | pointer register. Secondly, the argument pointer register can always be | |
642a35f1 JW |
1183 | eliminated; it is replaced with either the stack or frame pointer. |
1184 | ||
1185 | In addition, we use the elimination mechanism to see if r30 is needed | |
1186 | Initially we assume that it isn't. If it is, we spill it. This is done | |
1187 | by making it an eliminable register. We replace it with itself so that | |
1188 | if it isn't needed, then existing uses won't be modified. */ | |
f045b2c9 RS |
1189 | |
1190 | /* This is an array of structures. Each structure initializes one pair | |
1191 | of eliminable registers. The "from" register number is given first, | |
1192 | followed by "to". Eliminations of the same "from" register are listed | |
1193 | in order of preference. */ | |
1194 | #define ELIMINABLE_REGS \ | |
1195 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1196 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
642a35f1 JW |
1197 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ |
1198 | { 30, 30} } | |
f045b2c9 RS |
1199 | |
1200 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
1201 | Frame pointer elimination is automatically handled. | |
1202 | ||
1203 | For the RS/6000, if frame pointer elimination is being done, we would like | |
642a35f1 JW |
1204 | to convert ap into fp, not sp. |
1205 | ||
1206 | We need r30 if -mmininal-toc was specified, and there are constant pool | |
1207 | references. */ | |
f045b2c9 RS |
1208 | |
1209 | #define CAN_ELIMINATE(FROM, TO) \ | |
1210 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
1211 | ? ! frame_pointer_needed \ | |
642a35f1 | 1212 | : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || get_pool_size () == 0 \ |
f045b2c9 RS |
1213 | : 1) |
1214 | ||
1215 | /* Define the offset between two registers, one to be eliminated, and the other | |
1216 | its replacement, at the start of a routine. */ | |
1217 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1218 | { \ | |
1219 | int total_stack_size = (rs6000_sa_size () + get_frame_size () \ | |
1220 | + current_function_outgoing_args_size); \ | |
1221 | \ | |
1222 | total_stack_size = (total_stack_size + 7) & ~7; \ | |
1223 | \ | |
1224 | if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1225 | { \ | |
1226 | if (rs6000_pushes_stack ()) \ | |
1227 | (OFFSET) = 0; \ | |
1228 | else \ | |
1229 | (OFFSET) = - total_stack_size; \ | |
1230 | } \ | |
1231 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1232 | (OFFSET) = total_stack_size; \ | |
1233 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1234 | { \ | |
1235 | if (rs6000_pushes_stack ()) \ | |
1236 | (OFFSET) = total_stack_size; \ | |
1237 | else \ | |
1238 | (OFFSET) = 0; \ | |
1239 | } \ | |
642a35f1 JW |
1240 | else if ((FROM) == 30) \ |
1241 | (OFFSET) = 0; \ | |
f045b2c9 RS |
1242 | else \ |
1243 | abort (); \ | |
1244 | } | |
1245 | \f | |
1246 | /* Addressing modes, and classification of registers for them. */ | |
1247 | ||
1248 | /* #define HAVE_POST_INCREMENT */ | |
1249 | /* #define HAVE_POST_DECREMENT */ | |
1250 | ||
1251 | #define HAVE_PRE_DECREMENT | |
1252 | #define HAVE_PRE_INCREMENT | |
1253 | ||
1254 | /* Macros to check register numbers against specific register classes. */ | |
1255 | ||
1256 | /* These assume that REGNO is a hard or pseudo reg number. | |
1257 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1258 | or a pseudo reg currently allocated to a suitable hard reg. | |
1259 | Since they use reg_renumber, they are safe only once reg_renumber | |
1260 | has been allocated, which happens in local-alloc.c. */ | |
1261 | ||
1262 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1263 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1264 | ? (REGNO) <= 31 || (REGNO) == 67 \ | |
1265 | : (reg_renumber[REGNO] >= 0 \ | |
1266 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1267 | ||
1268 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1269 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1270 | ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ | |
1271 | : (reg_renumber[REGNO] > 0 \ | |
1272 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1273 | \f | |
1274 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1275 | ||
1276 | #define MAX_REGS_PER_ADDRESS 2 | |
1277 | ||
1278 | /* Recognize any constant value that is a valid address. */ | |
1279 | ||
6eff269e BK |
1280 | #define CONSTANT_ADDRESS_P(X) \ |
1281 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1282 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1283 | || GET_CODE (X) == HIGH) | |
f045b2c9 RS |
1284 | |
1285 | /* Nonzero if the constant value X is a legitimate general operand. | |
1286 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
1287 | ||
1288 | On the RS/6000, all integer constants are acceptable, most won't be valid | |
1289 | for particular insns, though. Only easy FP constants are | |
1290 | acceptable. */ | |
1291 | ||
1292 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1293 | (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ | |
1294 | || easy_fp_constant (X, GET_MODE (X))) | |
1295 | ||
1296 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1297 | and check its validity for a certain class. | |
1298 | We have two alternate definitions for each of them. | |
1299 | The usual definition accepts all pseudo regs; the other rejects | |
1300 | them unless they have been allocated suitable hard regs. | |
1301 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1302 | ||
1303 | Most source files want to accept pseudo regs in the hope that | |
1304 | they will get allocated to the class that the insn wants them to be in. | |
1305 | Source files for reload pass need to be strict. | |
1306 | After reload, it makes no difference, since pseudo regs have | |
1307 | been eliminated by then. */ | |
1308 | ||
1309 | #ifndef REG_OK_STRICT | |
1310 | ||
1311 | /* Nonzero if X is a hard reg that can be used as an index | |
1312 | or if it is a pseudo reg. */ | |
1313 | #define REG_OK_FOR_INDEX_P(X) \ | |
1314 | (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
1315 | ||
1316 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1317 | or if it is a pseudo reg. */ | |
1318 | #define REG_OK_FOR_BASE_P(X) \ | |
1319 | (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X)) | |
1320 | ||
1321 | #else | |
1322 | ||
1323 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1324 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1325 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1326 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1327 | ||
1328 | #endif | |
1329 | \f | |
1330 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1331 | that is a valid memory address for an instruction. | |
1332 | The MODE argument is the machine mode for the MEM expression | |
1333 | that wants to use this address. | |
1334 | ||
1335 | On the RS/6000, there are four valid address: a SYMBOL_REF that | |
1336 | refers to a constant pool entry of an address (or the sum of it | |
1337 | plus a constant), a short (16-bit signed) constant plus a register, | |
1338 | the sum of two registers, or a register indirect, possibly with an | |
1339 | auto-increment. For DFmode and DImode with an constant plus register, | |
1340 | we must ensure that both words are addressable. */ | |
1341 | ||
1342 | #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \ | |
1343 | (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \ | |
1344 | && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X))) | |
1345 | ||
1346 | #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ | |
1347 | (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \ | |
1348 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
1349 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ | |
1350 | && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0)))) | |
1351 | ||
1352 | #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ | |
1353 | (GET_CODE (X) == CONST_INT \ | |
1354 | && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) | |
1355 | ||
1356 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \ | |
1357 | (GET_CODE (X) == PLUS \ | |
1358 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1359 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1360 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ | |
1361 | && (((MODE) != DFmode && (MODE) != DImode) \ | |
1362 | || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4))) | |
1363 | ||
1364 | #define LEGITIMATE_INDEXED_ADDRESS_P(X) \ | |
1365 | (GET_CODE (X) == PLUS \ | |
1366 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1367 | && GET_CODE (XEXP (X, 1)) == REG \ | |
1368 | && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1369 | && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ | |
1370 | || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
1371 | && REG_OK_FOR_INDEX_P (XEXP (X, 0))))) | |
1372 | ||
1373 | #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \ | |
1374 | (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
1375 | ||
1376 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1377 | { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \ | |
1378 | goto ADDR; \ | |
1379 | if (GET_CODE (X) == PRE_INC \ | |
1380 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ | |
1381 | goto ADDR; \ | |
1382 | if (GET_CODE (X) == PRE_DEC \ | |
1383 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ | |
1384 | goto ADDR; \ | |
1385 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \ | |
1386 | goto ADDR; \ | |
1387 | if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \ | |
1388 | goto ADDR; \ | |
1389 | if ((MODE) != DImode && (MODE) != TImode \ | |
d14a6d05 | 1390 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ |
f045b2c9 RS |
1391 | && LEGITIMATE_INDEXED_ADDRESS_P (X)) \ |
1392 | goto ADDR; \ | |
1393 | } | |
1394 | \f | |
1395 | /* Try machine-dependent ways of modifying an illegitimate address | |
1396 | to be legitimate. If we find one, return the new, valid address. | |
1397 | This macro is used in only one place: `memory_address' in explow.c. | |
1398 | ||
1399 | OLDX is the address as it was before break_out_memory_refs was called. | |
1400 | In some cases it is useful to look at this to decide what needs to be done. | |
1401 | ||
1402 | MODE and WIN are passed so that this macro can use | |
1403 | GO_IF_LEGITIMATE_ADDRESS. | |
1404 | ||
1405 | It is always safe for this macro to do nothing. It exists to recognize | |
1406 | opportunities to optimize the output. | |
1407 | ||
1408 | On RS/6000, first check for the sum of a register with a constant | |
1409 | integer that is out of range. If so, generate code to add the | |
1410 | constant with the low-order 16 bits masked to the register and force | |
1411 | this result into another register (this can be done with `cau'). | |
1412 | Then generate an address of REG+(CONST&0xffff), allowing for the | |
1413 | possibility of bit 16 being a one. | |
1414 | ||
1415 | Then check for the sum of a register and something not constant, try to | |
1416 | load the other things into a register and return the sum. */ | |
1417 | ||
1418 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
1419 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1420 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1421 | && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ | |
1422 | { int high_int, low_int; \ | |
1423 | high_int = INTVAL (XEXP (X, 1)) >> 16; \ | |
1424 | low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ | |
1425 | if (low_int & 0x8000) \ | |
1426 | high_int += 1, low_int |= 0xffff0000; \ | |
1427 | (X) = gen_rtx (PLUS, SImode, \ | |
1428 | force_operand \ | |
1429 | (gen_rtx (PLUS, SImode, XEXP (X, 0), \ | |
1430 | gen_rtx (CONST_INT, VOIDmode, \ | |
1431 | high_int << 16)), 0),\ | |
1432 | gen_rtx (CONST_INT, VOIDmode, low_int)); \ | |
f357808b | 1433 | goto WIN; \ |
f045b2c9 RS |
1434 | } \ |
1435 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
27a2a2f1 | 1436 | && GET_CODE (XEXP (X, 1)) != CONST_INT \ |
17ea6633 | 1437 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ |
27a2a2f1 | 1438 | && (MODE) != DImode && (MODE) != TImode) \ |
f357808b RK |
1439 | { \ |
1440 | (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ | |
1441 | force_reg (SImode, force_operand (XEXP (X, 1), 0))); \ | |
1442 | goto WIN; \ | |
1443 | } \ | |
f045b2c9 RS |
1444 | } |
1445 | ||
1446 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1447 | has an effect that depends on the machine mode it is used for. | |
1448 | ||
1449 | On the RS/6000 this is true if the address is valid with a zero offset | |
1450 | but not with an offset of four (this means it cannot be used as an | |
1451 | address for DImode or DFmode) or is a pre-increment or decrement. Since | |
1452 | we know it is valid, we just check for an address that is not valid with | |
1453 | an offset of four. */ | |
1454 | ||
1455 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1456 | { if (GET_CODE (ADDR) == PLUS \ | |
1457 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ | |
1458 | && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \ | |
1459 | goto LABEL; \ | |
1460 | if (GET_CODE (ADDR) == PRE_INC) \ | |
1461 | goto LABEL; \ | |
1462 | if (GET_CODE (ADDR) == PRE_DEC) \ | |
1463 | goto LABEL; \ | |
1464 | } | |
1465 | \f | |
1466 | /* Define this if some processing needs to be done immediately before | |
4255474b | 1467 | emitting code for an insn. */ |
f045b2c9 | 1468 | |
4255474b | 1469 | /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ |
f045b2c9 RS |
1470 | |
1471 | /* Specify the machine mode that this machine uses | |
1472 | for the index in the tablejump instruction. */ | |
1473 | #define CASE_VECTOR_MODE SImode | |
1474 | ||
1475 | /* Define this if the tablejump instruction expects the table | |
1476 | to contain offsets from the address of the table. | |
1477 | Do not define this if the table should contain absolute addresses. */ | |
1478 | #define CASE_VECTOR_PC_RELATIVE | |
1479 | ||
1480 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1481 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1482 | ||
1483 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1484 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1485 | ||
1486 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1487 | #define DEFAULT_SIGNED_CHAR 0 | |
1488 | ||
1489 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1490 | also convert validly to an unsigned one. */ | |
1491 | ||
1492 | /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ | |
1493 | ||
1494 | /* Max number of bytes we can move from memory to memory | |
1495 | in one reasonably fast instruction. */ | |
d14a6d05 | 1496 | #define MOVE_MAX (TARGET_MULTIPLE ? 16 : (TARGET_POWERPC64 ? 8 : 4)) |
2e360ab3 | 1497 | #define MAX_MOVE_MAX 16 |
f045b2c9 RS |
1498 | |
1499 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1500 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1501 | is undesirable. */ | |
1502 | #define SLOW_BYTE_ACCESS 1 | |
1503 | ||
9a63901f RK |
1504 | /* Define if operations between registers always perform the operation |
1505 | on the full register even if a narrower mode is specified. */ | |
1506 | #define WORD_REGISTER_OPERATIONS | |
1507 | ||
1508 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1509 | will either zero-extend or sign-extend. The value of this macro should | |
1510 | be the code that says which one of the two operations is implicitly | |
1511 | done, NIL if none. */ | |
1512 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
225211e2 RK |
1513 | |
1514 | /* Define if loading short immediate values into registers sign extends. */ | |
1515 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
fdaff8ba RS |
1516 | \f |
1517 | /* The RS/6000 uses the XCOFF format. */ | |
f045b2c9 | 1518 | |
fdaff8ba | 1519 | #define XCOFF_DEBUGGING_INFO |
f045b2c9 | 1520 | |
c5abcf1d CH |
1521 | /* Define if the object format being used is COFF or a superset. */ |
1522 | #define OBJECT_FORMAT_COFF | |
1523 | ||
2c440f06 RK |
1524 | /* Define the magic numbers that we recognize as COFF. */ |
1525 | ||
1526 | #define MY_ISCOFF(magic) \ | |
1527 | ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC) | |
1528 | ||
115e69a9 RK |
1529 | /* This is the only version of nm that collect2 can work with. */ |
1530 | #define REAL_NM_FILE_NAME "/usr/ucb/nm" | |
1531 | ||
f045b2c9 RS |
1532 | /* We don't have GAS for the RS/6000 yet, so don't write out special |
1533 | .stabs in cc1plus. */ | |
1534 | ||
1535 | #define FASCIST_ASSEMBLER | |
1536 | ||
f045b2c9 RS |
1537 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1538 | is done just by pretending it is already truncated. */ | |
1539 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1540 | ||
1541 | /* Specify the machine mode that pointers have. | |
1542 | After generation of rtl, the compiler makes no further distinction | |
1543 | between pointers and any other objects of this machine mode. */ | |
9e654916 | 1544 | #define Pmode (TARGET_64BIT ? DImode : SImode) |
f045b2c9 RS |
1545 | |
1546 | /* Mode of a function address in a call instruction (for indexing purposes). | |
1547 | ||
1548 | Doesn't matter on RS/6000. */ | |
9e654916 | 1549 | #define FUNCTION_MODE (TARGET_64BIT ? DImode : SImode) |
f045b2c9 RS |
1550 | |
1551 | /* Define this if addresses of constant functions | |
1552 | shouldn't be put through pseudo regs where they can be cse'd. | |
1553 | Desirable on machines where ordinary constants are expensive | |
1554 | but a CALL with constant address is cheap. */ | |
1555 | #define NO_FUNCTION_CSE | |
1556 | ||
d969caf8 | 1557 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
6febd581 RK |
1558 | few bits. |
1559 | ||
1560 | The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED | |
1561 | have been dropped from the PowerPC architecture. */ | |
1562 | ||
1563 | #define SHIFT_COUNT_TRUNCATED TARGET_POWER ? 1 : 0 | |
f045b2c9 RS |
1564 | |
1565 | /* Use atexit for static constructors/destructors, instead of defining | |
1566 | our own exit function. */ | |
1567 | #define HAVE_ATEXIT | |
1568 | ||
1569 | /* Compute the cost of computing a constant rtl expression RTX | |
1570 | whose rtx-code is CODE. The body of this macro is a portion | |
1571 | of a switch statement. If the code is computed here, | |
1572 | return it with a return statement. Otherwise, break from the switch. | |
1573 | ||
01554f00 | 1574 | On the RS/6000, if it is valid in the insn, it is free. So this |
f045b2c9 RS |
1575 | always returns 0. */ |
1576 | ||
3bb22aee | 1577 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
f045b2c9 RS |
1578 | case CONST_INT: \ |
1579 | case CONST: \ | |
1580 | case LABEL_REF: \ | |
1581 | case SYMBOL_REF: \ | |
1582 | case CONST_DOUBLE: \ | |
1583 | return 0; | |
1584 | ||
1585 | /* Provide the costs of a rtl expression. This is in the body of a | |
1586 | switch on CODE. */ | |
1587 | ||
3bb22aee | 1588 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
f045b2c9 | 1589 | case MULT: \ |
bdfd4e31 RK |
1590 | switch (rs6000_cpu) \ |
1591 | { \ | |
1592 | case PROCESSOR_RIOS1: \ | |
1593 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
1594 | ? COSTS_N_INSNS (5) \ | |
1595 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
1596 | ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ | |
1597 | case PROCESSOR_RIOS2: \ | |
1598 | return COSTS_N_INSNS (2); \ | |
1599 | case PROCESSOR_PPC601: \ | |
1600 | case PROCESSOR_PPC603: \ | |
869c489d | 1601 | return COSTS_N_INSNS (5); \ |
49a0b204 | 1602 | case PROCESSOR_PPC403: \ |
bdfd4e31 RK |
1603 | case PROCESSOR_PPC604: \ |
1604 | case PROCESSOR_PPC620: \ | |
869c489d | 1605 | return COSTS_N_INSNS (4); \ |
bdfd4e31 | 1606 | } \ |
f045b2c9 RS |
1607 | case DIV: \ |
1608 | case MOD: \ | |
1609 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1610 | && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ | |
1611 | return COSTS_N_INSNS (2); \ | |
1612 | /* otherwise fall through to normal divide. */ \ | |
1613 | case UDIV: \ | |
1614 | case UMOD: \ | |
bdfd4e31 RK |
1615 | switch (rs6000_cpu) \ |
1616 | { \ | |
1617 | case PROCESSOR_RIOS1: \ | |
1618 | return COSTS_N_INSNS (19); \ | |
1619 | case PROCESSOR_RIOS2: \ | |
1620 | return COSTS_N_INSNS (13); \ | |
49a0b204 MM |
1621 | case PROCESSOR_PPC403: \ |
1622 | return COSTS_N_INSNS (33); \ | |
bdfd4e31 | 1623 | case PROCESSOR_PPC601: \ |
869c489d | 1624 | return COSTS_N_INSNS (36); \ |
bdfd4e31 | 1625 | case PROCESSOR_PPC603: \ |
869c489d | 1626 | return COSTS_N_INSNS (37); \ |
bdfd4e31 RK |
1627 | case PROCESSOR_PPC604: \ |
1628 | case PROCESSOR_PPC620: \ | |
869c489d | 1629 | return COSTS_N_INSNS (20); \ |
bdfd4e31 | 1630 | } \ |
3a942930 RK |
1631 | case FFS: \ |
1632 | return COSTS_N_INSNS (4); \ | |
f045b2c9 RS |
1633 | case MEM: \ |
1634 | /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ | |
1635 | return 5; | |
1636 | ||
1637 | /* Compute the cost of an address. This is meant to approximate the size | |
1638 | and/or execution delay of an insn using that address. If the cost is | |
1639 | approximated by the RTL complexity, including CONST_COSTS above, as | |
1640 | is usually the case for CISC machines, this macro should not be defined. | |
1641 | For aggressively RISCy machines, only one insn format is allowed, so | |
1642 | this macro should be a constant. The value of this macro only matters | |
1643 | for valid addresses. | |
1644 | ||
1645 | For the RS/6000, everything is cost 0. */ | |
1646 | ||
1647 | #define ADDRESS_COST(RTX) 0 | |
1648 | ||
1649 | /* Adjust the length of an INSN. LENGTH is the currently-computed length and | |
1650 | should be adjusted to reflect any required changes. This macro is used when | |
1651 | there is some systematic length adjustment required that would be difficult | |
1652 | to express in the length attribute. */ | |
1653 | ||
1654 | /* #define ADJUST_INSN_LENGTH(X,LENGTH) */ | |
1655 | ||
1656 | /* Add any extra modes needed to represent the condition code. | |
1657 | ||
1658 | For the RS/6000, we need separate modes when unsigned (logical) comparisons | |
c5defebb RK |
1659 | are being done and we need a separate mode for floating-point. We also |
1660 | use a mode for the case when we are comparing the results of two | |
1661 | comparisons. */ | |
f045b2c9 | 1662 | |
c5defebb | 1663 | #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode |
f045b2c9 RS |
1664 | |
1665 | /* Define the names for the modes specified above. */ | |
c5defebb | 1666 | #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" |
f045b2c9 RS |
1667 | |
1668 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1669 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
c5defebb RK |
1670 | should be used. CCUNSmode should be used for unsigned comparisons. |
1671 | CCEQmode should be used when we are doing an inequality comparison on | |
1672 | the result of a comparison. CCmode should be used in all other cases. */ | |
1673 | ||
b565a316 | 1674 | #define SELECT_CC_MODE(OP,X,Y) \ |
f045b2c9 | 1675 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ |
c5defebb RK |
1676 | : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ |
1677 | : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ | |
1678 | ? CCEQmode : CCmode)) | |
f045b2c9 RS |
1679 | |
1680 | /* Define the information needed to generate branch and scc insns. This is | |
1681 | stored from the compare operation. Note that we can't use "rtx" here | |
1682 | since it hasn't been defined! */ | |
1683 | ||
1684 | extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; | |
1685 | extern int rs6000_compare_fp_p; | |
1686 | ||
1687 | /* Set to non-zero by "fix" operation to indicate that itrunc and | |
1688 | uitrunc must be defined. */ | |
1689 | ||
1690 | extern int rs6000_trunc_used; | |
9929b575 ILT |
1691 | |
1692 | /* Function names to call to do floating point truncation. */ | |
1693 | ||
1694 | #define RS6000_ITRUNC "itrunc" | |
1695 | #define RS6000_UITRUNC "uitrunc" | |
4d30c363 MM |
1696 | |
1697 | /* Prefix and suffix to use to saving floating point */ | |
1698 | #ifndef SAVE_FP_PREFIX | |
1699 | #define SAVE_FP_PREFIX "._savef" | |
1700 | #define SAVE_FP_SUFFIX "" | |
1701 | #endif | |
1702 | ||
1703 | /* Prefix and suffix to use to restoring floating point */ | |
1704 | #ifndef RESTORE_FP_PREFIX | |
1705 | #define RESTORE_FP_PREFIX "._restf" | |
1706 | #define RESTORE_FP_SUFFIX "" | |
1707 | #endif | |
1708 | ||
f045b2c9 RS |
1709 | \f |
1710 | /* Control the assembler format that we output. */ | |
1711 | ||
1712 | /* Output at beginning of assembler file. | |
1713 | ||
b4d6689b | 1714 | Initialize the section names for the RS/6000 at this point. |
fdaff8ba | 1715 | |
6355b140 | 1716 | Specify filename to assembler. |
3fc2151d | 1717 | |
b4d6689b | 1718 | We want to go into the TOC section so at least one .toc will be emitted. |
fdaff8ba | 1719 | Also, in order to output proper .bs/.es pairs, we need at least one static |
b4d6689b RK |
1720 | [RW] section emitted. |
1721 | ||
1722 | We then switch back to text to force the gcc2_compiled. label and the space | |
1723 | allocated after it (when profiling) into the text section. | |
1724 | ||
1725 | Finally, declare mcount when profiling to make the assembler happy. */ | |
f045b2c9 RS |
1726 | |
1727 | #define ASM_FILE_START(FILE) \ | |
1728 | { \ | |
fdaff8ba | 1729 | rs6000_gen_section_name (&xcoff_bss_section_name, \ |
f045b2c9 | 1730 | main_input_filename, ".bss_"); \ |
fdaff8ba | 1731 | rs6000_gen_section_name (&xcoff_private_data_section_name, \ |
f045b2c9 | 1732 | main_input_filename, ".rw_"); \ |
fdaff8ba | 1733 | rs6000_gen_section_name (&xcoff_read_only_section_name, \ |
f045b2c9 RS |
1734 | main_input_filename, ".ro_"); \ |
1735 | \ | |
6355b140 | 1736 | output_file_directive (FILE, main_input_filename); \ |
f045b2c9 | 1737 | toc_section (); \ |
fdaff8ba RS |
1738 | if (write_symbols != NO_DEBUG) \ |
1739 | private_data_section (); \ | |
b4d6689b RK |
1740 | text_section (); \ |
1741 | if (profile_flag) \ | |
1742 | fprintf (FILE, "\t.extern .mcount\n"); \ | |
f045b2c9 RS |
1743 | } |
1744 | ||
1745 | /* Output at end of assembler file. | |
1746 | ||
1747 | On the RS/6000, referencing data should automatically pull in text. */ | |
1748 | ||
1749 | #define ASM_FILE_END(FILE) \ | |
1750 | { \ | |
1751 | text_section (); \ | |
1752 | fprintf (FILE, "_section_.text:\n"); \ | |
1753 | data_section (); \ | |
1754 | fprintf (FILE, "\t.long _section_.text\n"); \ | |
1755 | } | |
1756 | ||
f045b2c9 RS |
1757 | /* We define this to prevent the name mangler from putting dollar signs into |
1758 | function names. */ | |
1759 | ||
1760 | #define NO_DOLLAR_IN_LABEL | |
1761 | ||
1762 | /* We define this to 0 so that gcc will never accept a dollar sign in a | |
1763 | variable name. This is needed because the AIX assembler will not accept | |
1764 | dollar signs. */ | |
1765 | ||
1766 | #define DOLLARS_IN_IDENTIFIERS 0 | |
1767 | ||
fdaff8ba RS |
1768 | /* Implicit library calls should use memcpy, not bcopy, etc. */ |
1769 | ||
1770 | #define TARGET_MEM_FUNCTIONS | |
1771 | ||
f045b2c9 RS |
1772 | /* Define the extra sections we need. We define three: one is the read-only |
1773 | data section which is used for constants. This is a csect whose name is | |
1774 | derived from the name of the input file. The second is for initialized | |
1775 | global variables. This is a csect whose name is that of the variable. | |
1776 | The third is the TOC. */ | |
1777 | ||
1778 | #define EXTRA_SECTIONS \ | |
1779 | read_only_data, private_data, read_only_private_data, toc, bss | |
1780 | ||
1781 | /* Define the name of our readonly data section. */ | |
1782 | ||
1783 | #define READONLY_DATA_SECTION read_only_data_section | |
1784 | ||
b4f892eb RK |
1785 | /* If we are referencing a function that is static or is known to be |
1786 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
1787 | that we can branch to this function without emitting a no-op after the | |
1788 | call. */ | |
1789 | ||
1790 | #define ENCODE_SECTION_INFO(DECL) \ | |
1791 | if (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1792 | && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ | |
1793 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; | |
1794 | ||
f045b2c9 RS |
1795 | /* Indicate that jump tables go in the text section. */ |
1796 | ||
1797 | #define JUMP_TABLES_IN_TEXT_SECTION | |
1798 | ||
1799 | /* Define the routines to implement these extra sections. */ | |
1800 | ||
1801 | #define EXTRA_SECTION_FUNCTIONS \ | |
1802 | \ | |
1803 | void \ | |
1804 | read_only_data_section () \ | |
1805 | { \ | |
1806 | if (in_section != read_only_data) \ | |
1807 | { \ | |
469adec3 | 1808 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 1809 | xcoff_read_only_section_name); \ |
f045b2c9 RS |
1810 | in_section = read_only_data; \ |
1811 | } \ | |
1812 | } \ | |
1813 | \ | |
1814 | void \ | |
1815 | private_data_section () \ | |
1816 | { \ | |
1817 | if (in_section != private_data) \ | |
1818 | { \ | |
469adec3 | 1819 | fprintf (asm_out_file, ".csect %s[RW]\n", \ |
fdaff8ba | 1820 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
1821 | \ |
1822 | in_section = private_data; \ | |
1823 | } \ | |
1824 | } \ | |
1825 | \ | |
1826 | void \ | |
1827 | read_only_private_data_section () \ | |
1828 | { \ | |
1829 | if (in_section != read_only_private_data) \ | |
1830 | { \ | |
f25359b5 | 1831 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 1832 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
1833 | in_section = read_only_private_data; \ |
1834 | } \ | |
1835 | } \ | |
1836 | \ | |
1837 | void \ | |
1838 | toc_section () \ | |
1839 | { \ | |
642a35f1 JW |
1840 | if (TARGET_MINIMAL_TOC) \ |
1841 | { \ | |
1842 | static int toc_initialized = 0; \ | |
1843 | \ | |
1844 | /* toc_section is always called at least once from ASM_FILE_START, \ | |
1845 | so this is guaranteed to always be defined once and only once \ | |
1846 | in each file. */ \ | |
1847 | if (! toc_initialized) \ | |
1848 | { \ | |
1849 | fprintf (asm_out_file, ".toc\nLCTOC..0:\n"); \ | |
1850 | fprintf (asm_out_file, "\t.tc toc_table[TC],toc_table[RW]\n"); \ | |
1851 | toc_initialized = 1; \ | |
1852 | } \ | |
f045b2c9 | 1853 | \ |
642a35f1 JW |
1854 | if (in_section != toc) \ |
1855 | fprintf (asm_out_file, ".csect toc_table[RW]\n"); \ | |
1856 | } \ | |
1857 | else \ | |
1858 | { \ | |
1859 | if (in_section != toc) \ | |
1860 | fprintf (asm_out_file, ".toc\n"); \ | |
1861 | } \ | |
f045b2c9 | 1862 | in_section = toc; \ |
fc3ffe83 | 1863 | } |
f045b2c9 RS |
1864 | |
1865 | /* This macro produces the initial definition of a function name. | |
1866 | On the RS/6000, we need to place an extra '.' in the function name and | |
1867 | output the function descriptor. | |
1868 | ||
1869 | The csect for the function will have already been created by the | |
1870 | `text_section' call previously done. We do have to go back to that | |
1871 | csect, however. */ | |
1872 | ||
fdaff8ba RS |
1873 | /* ??? What do the 16 and 044 in the .function line really mean? */ |
1874 | ||
f045b2c9 RS |
1875 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
1876 | { if (TREE_PUBLIC (DECL)) \ | |
1877 | { \ | |
1878 | fprintf (FILE, "\t.globl ."); \ | |
1879 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
fdaff8ba RS |
1880 | fprintf (FILE, "\n"); \ |
1881 | } \ | |
3ce428da | 1882 | else \ |
fdaff8ba RS |
1883 | { \ |
1884 | fprintf (FILE, "\t.lglobl ."); \ | |
1885 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
1886 | fprintf (FILE, "\n"); \ | |
f045b2c9 | 1887 | } \ |
f25359b5 | 1888 | fprintf (FILE, ".csect "); \ |
f045b2c9 RS |
1889 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
1890 | fprintf (FILE, "[DS]\n"); \ | |
1891 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
1892 | fprintf (FILE, ":\n"); \ | |
1893 | fprintf (FILE, "\t.long ."); \ | |
1894 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
fdaff8ba | 1895 | fprintf (FILE, ", TOC[tc0], 0\n"); \ |
11117bb9 | 1896 | fprintf (FILE, ".csect .text[PR]\n."); \ |
f045b2c9 RS |
1897 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
1898 | fprintf (FILE, ":\n"); \ | |
fdaff8ba | 1899 | if (write_symbols == XCOFF_DEBUG) \ |
c2a47e48 | 1900 | xcoffout_declare_function (FILE, DECL, NAME); \ |
f045b2c9 RS |
1901 | } |
1902 | ||
1903 | /* Return non-zero if this entry is to be written into the constant pool | |
1904 | in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST | |
1905 | containing one of them. If -mfp-in-toc (the default), we also do | |
1906 | this for floating-point constants. We actually can only do this | |
1907 | if the FP formats of the target and host machines are the same, but | |
1908 | we can't check that since not every file that uses | |
1909 | GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */ | |
1910 | ||
1911 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \ | |
1912 | (GET_CODE (X) == SYMBOL_REF \ | |
1913 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
1914 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \ | |
1915 | || GET_CODE (X) == LABEL_REF \ | |
72847b95 RK |
1916 | || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \ |
1917 | && GET_CODE (X) == CONST_DOUBLE \ | |
f045b2c9 RS |
1918 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ |
1919 | && BITS_PER_WORD == HOST_BITS_PER_INT)) | |
1920 | ||
1921 | /* Select section for constant in constant pool. | |
1922 | ||
1923 | On RS/6000, all constants are in the private read-only data area. | |
1924 | However, if this is being placed in the TOC it must be output as a | |
1925 | toc entry. */ | |
1926 | ||
1927 | #define SELECT_RTX_SECTION(MODE, X) \ | |
1928 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
1929 | toc_section (); \ | |
1930 | else \ | |
1931 | read_only_private_data_section (); \ | |
1932 | } | |
1933 | ||
1934 | /* Macro to output a special constant pool entry. Go to WIN if we output | |
1935 | it. Otherwise, it is written the usual way. | |
1936 | ||
1937 | On the RS/6000, toc entries are handled this way. */ | |
1938 | ||
1939 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ | |
1940 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
1941 | { \ | |
1942 | output_toc (FILE, X, LABELNO); \ | |
1943 | goto WIN; \ | |
1944 | } \ | |
1945 | } | |
1946 | ||
1947 | /* Select the section for an initialized data object. | |
1948 | ||
1949 | On the RS/6000, we have a special section for all variables except those | |
1950 | that are static. */ | |
1951 | ||
1952 | #define SELECT_SECTION(EXP,RELOC) \ | |
1953 | { \ | |
ed8969fa JW |
1954 | if ((TREE_CODE (EXP) == STRING_CST \ |
1955 | && !flag_writable_strings) \ | |
128e5769 | 1956 | || (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'd' \ |
1ff5cbcd | 1957 | && TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \ |
ed8969fa JW |
1958 | && DECL_INITIAL (EXP) \ |
1959 | && (DECL_INITIAL (EXP) == error_mark_node \ | |
1960 | || TREE_CONSTANT (DECL_INITIAL (EXP))) \ | |
1961 | && ! (RELOC))) \ | |
f045b2c9 RS |
1962 | { \ |
1963 | if (TREE_PUBLIC (EXP)) \ | |
1964 | read_only_data_section (); \ | |
1965 | else \ | |
1966 | read_only_private_data_section (); \ | |
1967 | } \ | |
1968 | else \ | |
1969 | { \ | |
1970 | if (TREE_PUBLIC (EXP)) \ | |
1971 | data_section (); \ | |
1972 | else \ | |
1973 | private_data_section (); \ | |
1974 | } \ | |
1975 | } | |
1976 | ||
1977 | /* This outputs NAME to FILE up to the first null or '['. */ | |
1978 | ||
1979 | #define RS6000_OUTPUT_BASENAME(FILE, NAME) \ | |
99d3d26e | 1980 | if ((NAME)[0] == '*' || (NAME)[strlen (NAME) - 1] != ']') \ |
f045b2c9 RS |
1981 | assemble_name (FILE, NAME); \ |
1982 | else \ | |
1983 | { \ | |
99d3d26e RK |
1984 | int _len = strlen (NAME); \ |
1985 | char *_p = alloca (_len + 1); \ | |
1986 | \ | |
1987 | strcpy (_p, NAME); \ | |
1988 | _p[_len - 4] = '\0'; \ | |
1989 | assemble_name (FILE, _p); \ | |
f045b2c9 RS |
1990 | } |
1991 | ||
1992 | /* Output something to declare an external symbol to the assembler. Most | |
1993 | assemblers don't need this. | |
1994 | ||
1995 | If we haven't already, add "[RW]" (or "[DS]" for a function) to the | |
1996 | name. Normally we write this out along with the name. In the few cases | |
1997 | where we can't, it gets stripped off. */ | |
1998 | ||
1999 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
2000 | { rtx _symref = XEXP (DECL_RTL (DECL), 0); \ | |
2001 | if ((TREE_CODE (DECL) == VAR_DECL \ | |
2002 | || TREE_CODE (DECL) == FUNCTION_DECL) \ | |
2003 | && (NAME)[0] != '*' \ | |
2004 | && (NAME)[strlen (NAME) - 1] != ']') \ | |
2005 | { \ | |
2006 | char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \ | |
2007 | strcpy (_name, XSTR (_symref, 0)); \ | |
2008 | strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \ | |
2009 | XSTR (_symref, 0) = _name; \ | |
2010 | } \ | |
2011 | fprintf (FILE, "\t.extern "); \ | |
2012 | assemble_name (FILE, XSTR (_symref, 0)); \ | |
2013 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
2014 | { \ | |
2015 | fprintf (FILE, "\n\t.extern ."); \ | |
2016 | RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \ | |
2017 | } \ | |
2018 | fprintf (FILE, "\n"); \ | |
2019 | } | |
2020 | ||
2021 | /* Similar, but for libcall. We only have to worry about the function name, | |
2022 | not that of the descriptor. */ | |
2023 | ||
2024 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ | |
2025 | { fprintf (FILE, "\t.extern ."); \ | |
2026 | assemble_name (FILE, XSTR (FUN, 0)); \ | |
2027 | fprintf (FILE, "\n"); \ | |
2028 | } | |
2029 | ||
2030 | /* Output to assembler file text saying following lines | |
2031 | may contain character constants, extra white space, comments, etc. */ | |
2032 | ||
2033 | #define ASM_APP_ON "" | |
2034 | ||
2035 | /* Output to assembler file text saying following lines | |
2036 | no longer contain unusual constructs. */ | |
2037 | ||
2038 | #define ASM_APP_OFF "" | |
2039 | ||
2040 | /* Output before instructions. */ | |
2041 | ||
11117bb9 | 2042 | #define TEXT_SECTION_ASM_OP ".csect .text[PR]" |
f045b2c9 RS |
2043 | |
2044 | /* Output before writable data. */ | |
2045 | ||
fdaff8ba | 2046 | #define DATA_SECTION_ASM_OP ".csect .data[RW]" |
f045b2c9 RS |
2047 | |
2048 | /* How to refer to registers in assembler output. | |
2049 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
2050 | ||
2051 | #define REGISTER_NAMES \ | |
2052 | {"0", "1", "2", "3", "4", "5", "6", "7", \ | |
2053 | "8", "9", "10", "11", "12", "13", "14", "15", \ | |
2054 | "16", "17", "18", "19", "20", "21", "22", "23", \ | |
2055 | "24", "25", "26", "27", "28", "29", "30", "31", \ | |
2056 | "0", "1", "2", "3", "4", "5", "6", "7", \ | |
2057 | "8", "9", "10", "11", "12", "13", "14", "15", \ | |
2058 | "16", "17", "18", "19", "20", "21", "22", "23", \ | |
2059 | "24", "25", "26", "27", "28", "29", "30", "31", \ | |
2060 | "mq", "lr", "ctr", "ap", \ | |
2061 | "0", "1", "2", "3", "4", "5", "6", "7" } | |
2062 | ||
2063 | /* Table of additional register names to use in user input. */ | |
2064 | ||
2065 | #define ADDITIONAL_REGISTER_NAMES \ | |
2066 | {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \ | |
2067 | "r4", 4, "r5", 5, "r6", 6, "r7", 7, \ | |
2068 | "r8", 8, "r9", 9, "r10", 10, "r11", 11, \ | |
2069 | "r12", 12, "r13", 13, "r14", 14, "r15", 15, \ | |
2070 | "r16", 16, "r17", 17, "r18", 18, "r19", 19, \ | |
2071 | "r20", 20, "r21", 21, "r22", 22, "r23", 23, \ | |
2072 | "r24", 24, "r25", 25, "r26", 26, "r27", 27, \ | |
2073 | "r28", 28, "r29", 29, "r30", 30, "r31", 31, \ | |
2074 | "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \ | |
2075 | "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \ | |
2076 | "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \ | |
2077 | "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \ | |
2078 | "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \ | |
2079 | "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \ | |
2080 | "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \ | |
2081 | "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \ | |
2082 | /* no additional names for: mq, lr, ctr, ap */ \ | |
2083 | "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \ | |
fc3ffe83 RK |
2084 | "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \ |
2085 | "cc", 68 } | |
f045b2c9 RS |
2086 | |
2087 | /* How to renumber registers for dbx and gdb. */ | |
2088 | ||
2089 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
2090 | ||
0da40b09 RK |
2091 | /* Text to write out after a CALL that may be replaced by glue code by |
2092 | the loader. This depends on the AIX version. */ | |
2093 | #define RS6000_CALL_GLUE "cror 31,31,31" | |
11117bb9 | 2094 | |
f045b2c9 RS |
2095 | /* This is how to output the definition of a user-level label named NAME, |
2096 | such as the label on a static function or variable NAME. */ | |
2097 | ||
2098 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
2099 | do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0) | |
2100 | ||
2101 | /* This is how to output a command to make the user-level label named NAME | |
2102 | defined for reference from other files. */ | |
2103 | ||
2104 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
2105 | do { fputs ("\t.globl ", FILE); \ | |
2106 | RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0) | |
2107 | ||
2108 | /* This is how to output a reference to a user-level label named NAME. | |
2109 | `assemble_name' uses this. */ | |
2110 | ||
2111 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
2112 | fprintf (FILE, NAME) | |
2113 | ||
2114 | /* This is how to output an internal numbered label where | |
2115 | PREFIX is the class of label and NUM is the number within the class. */ | |
2116 | ||
2117 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
2118 | fprintf (FILE, "%s..%d:\n", PREFIX, NUM) | |
2119 | ||
3daf36a4 ILT |
2120 | /* This is how to output an internal label prefix. rs6000.c uses this |
2121 | when generating traceback tables. */ | |
2122 | ||
2123 | #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ | |
2124 | fprintf (FILE, "%s..", PREFIX) | |
2125 | ||
f045b2c9 RS |
2126 | /* This is how to output a label for a jump table. Arguments are the same as |
2127 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
2128 | passed. */ | |
2129 | ||
2130 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
2131 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
2132 | ||
2133 | /* This is how to store into the string LABEL | |
2134 | the symbol_ref name of an internal numbered label where | |
2135 | PREFIX is the class of label and NUM is the number within the class. | |
2136 | This is suitable for output with `assemble_name'. */ | |
2137 | ||
2138 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
2139 | sprintf (LABEL, "%s..%d", PREFIX, NUM) | |
2140 | ||
2141 | /* This is how to output an assembler line defining a `double' constant. */ | |
2142 | ||
a5b1eb34 RS |
2143 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ |
2144 | { \ | |
2145 | if (REAL_VALUE_ISINF (VALUE) \ | |
2146 | || REAL_VALUE_ISNAN (VALUE) \ | |
2147 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
2148 | { \ | |
2149 | long t[2]; \ | |
2150 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
2151 | fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \ | |
2152 | t[0] & 0xffffffff, t[1] & 0xffffffff); \ | |
2153 | } \ | |
2154 | else \ | |
2155 | { \ | |
2156 | char str[30]; \ | |
2157 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ | |
2158 | fprintf (FILE, "\t.double 0d%s\n", str); \ | |
2159 | } \ | |
2160 | } | |
f045b2c9 RS |
2161 | |
2162 | /* This is how to output an assembler line defining a `float' constant. */ | |
2163 | ||
a5b1eb34 RS |
2164 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ |
2165 | { \ | |
2166 | if (REAL_VALUE_ISINF (VALUE) \ | |
2167 | || REAL_VALUE_ISNAN (VALUE) \ | |
2168 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
2169 | { \ | |
2170 | long t; \ | |
2171 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
2172 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
2173 | } \ | |
2174 | else \ | |
2175 | { \ | |
2176 | char str[30]; \ | |
2177 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
2178 | fprintf (FILE, "\t.float 0d%s\n", str); \ | |
2179 | } \ | |
2180 | } | |
f045b2c9 RS |
2181 | |
2182 | /* This is how to output an assembler line defining an `int' constant. */ | |
2183 | ||
2184 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
2185 | ( fprintf (FILE, "\t.long "), \ | |
2186 | output_addr_const (FILE, (VALUE)), \ | |
2187 | fprintf (FILE, "\n")) | |
2188 | ||
2189 | /* Likewise for `char' and `short' constants. */ | |
2190 | ||
2191 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
2192 | ( fprintf (FILE, "\t.short "), \ | |
2193 | output_addr_const (FILE, (VALUE)), \ | |
2194 | fprintf (FILE, "\n")) | |
2195 | ||
2196 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
2197 | ( fprintf (FILE, "\t.byte "), \ | |
2198 | output_addr_const (FILE, (VALUE)), \ | |
2199 | fprintf (FILE, "\n")) | |
2200 | ||
2201 | /* This is how to output an assembler line for a numeric constant byte. */ | |
2202 | ||
2203 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
2204 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
2205 | ||
2206 | /* This is how to output an assembler line to define N characters starting | |
2207 | at P to FILE. */ | |
2208 | ||
2209 | #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N)) | |
2210 | ||
2211 | /* This is how to output code to push a register on the stack. | |
2212 | It need not be very fast code. */ | |
2213 | ||
2214 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
6febd581 | 2215 | asm_fprintf (FILE, "\{tstu|stwu} %s,-4(r1)\n", reg_names[REGNO]); |
f045b2c9 RS |
2216 | |
2217 | /* This is how to output an insn to pop a register from the stack. | |
2218 | It need not be very fast code. */ | |
2219 | ||
2220 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
6febd581 RK |
2221 | asm_fprintf (FILE, "\t{l|lwz} %s,0(r1)\n\t{ai|addic} r1,r1,4\n", \ |
2222 | reg_names[REGNO]) | |
f045b2c9 RS |
2223 | |
2224 | /* This is how to output an element of a case-vector that is absolute. | |
2225 | (RS/6000 does not use such vectors, but we must define this macro | |
2226 | anyway.) */ | |
2227 | ||
3daf36a4 ILT |
2228 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ |
2229 | do { char buf[100]; \ | |
2230 | fprintf (FILE, "\t.long "); \ | |
2231 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ | |
2232 | assemble_name (FILE, buf); \ | |
2233 | fprintf (FILE, "\n"); \ | |
2234 | } while (0) | |
f045b2c9 RS |
2235 | |
2236 | /* This is how to output an element of a case-vector that is relative. */ | |
2237 | ||
2238 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
3daf36a4 ILT |
2239 | do { char buf[100]; \ |
2240 | fprintf (FILE, "\t.long "); \ | |
2241 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ | |
2242 | assemble_name (FILE, buf); \ | |
2243 | fprintf (FILE, "-"); \ | |
2244 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ | |
2245 | assemble_name (FILE, buf); \ | |
2246 | fprintf (FILE, "\n"); \ | |
2247 | } while (0) | |
f045b2c9 RS |
2248 | |
2249 | /* This is how to output an assembler line | |
2250 | that says to advance the location counter | |
2251 | to a multiple of 2**LOG bytes. */ | |
2252 | ||
2253 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
2254 | if ((LOG) != 0) \ | |
2255 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
2256 | ||
2257 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
2258 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
2259 | ||
2260 | /* This says how to output an assembler line | |
2261 | to define a global common symbol. */ | |
2262 | ||
2263 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
fc3ffe83 | 2264 | do { fputs (".comm ", (FILE)); \ |
f045b2c9 RS |
2265 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
2266 | fprintf ((FILE), ",%d\n", (SIZE)); } while (0) | |
2267 | ||
2268 | /* This says how to output an assembler line | |
2269 | to define a local common symbol. */ | |
2270 | ||
2271 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
fc3ffe83 | 2272 | do { fputs (".lcomm ", (FILE)); \ |
f045b2c9 | 2273 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
fdaff8ba | 2274 | fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \ |
f045b2c9 RS |
2275 | } while (0) |
2276 | ||
2277 | /* Store in OUTPUT a string (made with alloca) containing | |
2278 | an assembler-name for a local static variable named NAME. | |
2279 | LABELNO is an integer which is different for each call. */ | |
2280 | ||
2281 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
2282 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
2283 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
2284 | ||
2285 | /* Define the parentheses used to group arithmetic operations | |
2286 | in assembler code. */ | |
2287 | ||
2288 | #define ASM_OPEN_PAREN "(" | |
2289 | #define ASM_CLOSE_PAREN ")" | |
2290 | ||
2291 | /* Define results of standard character escape sequences. */ | |
2292 | #define TARGET_BELL 007 | |
2293 | #define TARGET_BS 010 | |
2294 | #define TARGET_TAB 011 | |
2295 | #define TARGET_NEWLINE 012 | |
2296 | #define TARGET_VT 013 | |
2297 | #define TARGET_FF 014 | |
2298 | #define TARGET_CR 015 | |
2299 | ||
2300 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
2301 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
2302 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
2303 | ||
2304 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
2305 | ||
2306 | /* Define which CODE values are valid. */ | |
2307 | ||
38250554 | 2308 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '.' || (CODE) == '*') |
f045b2c9 RS |
2309 | |
2310 | /* Print a memory address as an operand to reference that memory location. */ | |
2311 | ||
2312 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
2313 | ||
2314 | /* Define the codes that are matched by predicates in rs6000.c. */ | |
2315 | ||
2316 | #define PREDICATE_CODES \ | |
2317 | {"short_cint_operand", {CONST_INT}}, \ | |
2318 | {"u_short_cint_operand", {CONST_INT}}, \ | |
f357808b | 2319 | {"non_short_cint_operand", {CONST_INT}}, \ |
cd2b37d9 | 2320 | {"gpc_reg_operand", {SUBREG, REG}}, \ |
f045b2c9 RS |
2321 | {"cc_reg_operand", {SUBREG, REG}}, \ |
2322 | {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2323 | {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2324 | {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2325 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
2326 | {"easy_fp_constant", {CONST_DOUBLE}}, \ | |
2327 | {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ | |
414d3ee4 | 2328 | {"lwa_operand", {SUBREG, MEM, REG}}, \ |
1c71b69d | 2329 | {"low_32_bit_operand", {CONST_DOUBLE, CONST_INT}}, \ |
f045b2c9 RS |
2330 | {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \ |
2331 | {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ | |
2332 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ | |
f357808b | 2333 | {"non_add_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2334 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 2335 | {"non_and_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2336 | {"logical_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 2337 | {"non_logical_cint_operand", {CONST_INT}}, \ |
f045b2c9 RS |
2338 | {"mask_operand", {CONST_INT}}, \ |
2339 | {"call_operand", {SYMBOL_REF, REG}}, \ | |
f8634644 | 2340 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
38250554 | 2341 | {"input_operand", {SUBREG, MEM, REG, CONST_INT, SYMBOL_REF}}, \ |
f8634644 RK |
2342 | {"load_multiple_operation", {PARALLEL}}, \ |
2343 | {"store_multiple_operation", {PARALLEL}}, \ | |
2344 | {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
e477bbc7 | 2345 | GT, LEU, LTU, GEU, GTU}}, \ |
f8634644 | 2346 | {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ |
e477bbc7 | 2347 | GT, LEU, LTU, GEU, GTU}}, |