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f045b2c9 | 1 | /* Definitions of target machine for GNU compiler, for IBM RS/6000. |
6a7ec0a7 RK |
2 | Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. |
3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) | |
f045b2c9 RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
20 | ||
21 | ||
22 | /* Note that some other tm.h files include this one and then override | |
23 | many of the definitions that relate to assembler syntax. */ | |
24 | ||
25 | ||
26 | /* Names to predefine in the preprocessor for this target machine. */ | |
27 | ||
65c42379 | 28 | #define CPP_PREDEFINES "-D_IBMR2 -D_AIX -D_AIX32 -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" |
f045b2c9 RS |
29 | |
30 | /* Print subsidiary information on the compiler version in use. */ | |
31 | #define TARGET_VERSION ; | |
32 | ||
fdaff8ba RS |
33 | /* Tell the assembler to assume that all undefined names are external. |
34 | ||
35 | Don't do this until the fixed IBM assembler is more generally available. | |
36 | When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, | |
37 | ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no | |
b4d6689b RK |
38 | longer be needed. Also, the extern declaration of mcount in ASM_FILE_START |
39 | will no longer be needed. */ | |
f045b2c9 RS |
40 | |
41 | /* #define ASM_SPEC "-u" */ | |
42 | ||
43 | /* Define the options for the binder: Start text at 512, align all segments | |
44 | to 512 bytes, and warn if there is text relocation. | |
45 | ||
46 | The -bhalt:4 option supposedly changes the level at which ld will abort, | |
47 | but it also suppresses warnings about multiply defined symbols and is | |
48 | used by the AIX cc command. So we use it here. | |
49 | ||
50 | -bnodelcsect undoes a poor choice of default relating to multiply-defined | |
51 | csects. See AIX documentation for more information about this. */ | |
52 | ||
c1950f1c | 53 | #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\ |
561260fe | 54 | %{static:-bnso -bI:/lib/syscalls.exp} %{g*:-bexport:/usr/lib/libg.exp}" |
f045b2c9 | 55 | |
58a39e45 RS |
56 | /* Profiled library versions are used by linking with special directories. */ |
57 | #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ | |
58 | %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc" | |
f045b2c9 RS |
59 | |
60 | /* gcc must do the search itself to find libgcc.a, not use -l. */ | |
33f3c4c0 | 61 | #define LINK_LIBGCC_SPECIAL_1 |
f045b2c9 RS |
62 | |
63 | /* Don't turn -B into -L if the argument specifies a relative file name. */ | |
64 | #define RELATIVE_PREFIX_NOT_LINKDIR | |
65 | ||
fb623df5 | 66 | /* Architecture type. */ |
f045b2c9 | 67 | |
fb623df5 RK |
68 | extern int target_flags; |
69 | ||
70 | /* Use POWER architecture instructions and MQ register. */ | |
71 | #define MASK_POWER 0x01 | |
72 | ||
6febd581 RK |
73 | /* Use POWER2 extensions to POWER architecture. */ |
74 | #define MASK_POWER2 0x02 | |
75 | ||
fb623df5 | 76 | /* Use PowerPC architecture instructions. */ |
6febd581 RK |
77 | #define MASK_POWERPC 0x04 |
78 | ||
6a7ec0a7 RK |
79 | /* Use PowerPC extended FP instruction including sqrt and fsel. */ |
80 | #define MASK_PPCFPX 0x08 | |
f045b2c9 | 81 | |
fb623df5 | 82 | /* Use PowerPC-64 architecture instructions. */ |
6febd581 | 83 | #define MASK_POWERPC64 0x10 |
f045b2c9 | 84 | |
fb623df5 | 85 | /* Use revised mnemonic names defined for PowerPC architecture. */ |
6febd581 | 86 | #define MASK_NEW_MNEMONICS 0x20 |
fb623df5 RK |
87 | |
88 | /* Disable placing fp constants in the TOC; can be turned on when the | |
89 | TOC overflows. */ | |
6febd581 | 90 | #define MASK_NO_FP_IN_TOC 0x40 |
fb623df5 | 91 | |
0b9ccabc RK |
92 | /* Disable placing symbol+offset constants in the TOC; can be turned on when |
93 | the TOC overflows. */ | |
94 | #define MASK_NO_SUM_IN_TOC 0x80 | |
95 | ||
fb623df5 | 96 | /* Output only one TOC entry per module. Normally linking fails if |
642a35f1 JW |
97 | there are more than 16K unique variables/constants in an executable. With |
98 | this option, linking fails only if there are more than 16K modules, or | |
99 | if there are more than 16K unique variables/constant in a single module. | |
100 | ||
101 | This is at the cost of having 2 extra loads and one extra store per | |
102 | function, and one less allocatable register. */ | |
0b9ccabc | 103 | #define MASK_MINIMAL_TOC 0x100 |
642a35f1 | 104 | |
fb623df5 | 105 | #define TARGET_POWER (target_flags & MASK_POWER) |
6febd581 | 106 | #define TARGET_POWER2 (target_flags & MASK_POWER2) |
fb623df5 | 107 | #define TARGET_POWERPC (target_flags & MASK_POWERPC) |
6a7ec0a7 | 108 | #define TARGET_PPCFPX (target_flags & MASK_PPCFPX) |
fb623df5 RK |
109 | #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) |
110 | #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) | |
111 | #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) | |
0b9ccabc | 112 | #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) |
fb623df5 | 113 | #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) |
642a35f1 | 114 | |
fb623df5 | 115 | /* Run-time compilation parameters selecting different hardware subsets. |
f045b2c9 | 116 | |
fb623df5 | 117 | Macro to define tables used to set the flags. |
f045b2c9 RS |
118 | This is a list in braces of pairs in braces, |
119 | each pair being { "NAME", VALUE } | |
120 | where VALUE is the bits to set or minus the bits to clear. | |
121 | An empty string NAME is used to identify the default VALUE. */ | |
122 | ||
fb623df5 RK |
123 | #define TARGET_SWITCHES \ |
124 | {{"power", MASK_POWER}, \ | |
6febd581 RK |
125 | {"power2", MASK_POWER | MASK_POWER2}, \ |
126 | {"no-power2", - MASK_POWER2}, \ | |
127 | {"no-power", - (MASK_POWER | MASK_POWER2)}, \ | |
fb623df5 | 128 | {"powerpc", MASK_POWERPC}, \ |
6a7ec0a7 RK |
129 | {"no-powerpc", - (MASK_POWERPC | MASK_PPCFPX | MASK_POWERPC64)}, \ |
130 | {"powerpc-fpx", MASK_POWERPC | MASK_PPCFPX}, \ | |
131 | {"no-powerpc-fpx", - MASK_PPCFPX}, \ | |
132 | {"powerpc64", MASK_POWERPC | MASK_PPCFPX | MASK_POWERPC64}, \ | |
fb623df5 RK |
133 | {"no-powerpc64", -MASK_POWERPC64}, \ |
134 | {"new-mnemonics", MASK_NEW_MNEMONICS}, \ | |
135 | {"old-mnemonics", -MASK_NEW_MNEMONICS}, \ | |
0b9ccabc RK |
136 | {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ |
137 | | MASK_MINIMAL_TOC)}, \ | |
fb623df5 RK |
138 | {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \ |
139 | {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \ | |
0b9ccabc RK |
140 | {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \ |
141 | {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \ | |
fb623df5 | 142 | {"minimal-toc", MASK_MINIMAL_TOC}, \ |
0b9ccabc | 143 | {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \ |
fb623df5 RK |
144 | {"no-minimal-toc", - MASK_MINIMAL_TOC}, \ |
145 | {"", TARGET_DEFAULT}} | |
146 | ||
147 | #define TARGET_DEFAULT MASK_POWER | |
148 | ||
149 | /* Processor type. */ | |
150 | enum processor_type | |
f86fe1fb | 151 | {PROCESSOR_RIOS1, |
fb623df5 RK |
152 | PROCESSOR_RIOS2, |
153 | PROCESSOR_PPC601, | |
154 | PROCESSOR_PPC603, | |
155 | PROCESSOR_PPC604, | |
156 | PROCESSOR_PPC620}; | |
157 | ||
158 | extern enum processor_type rs6000_cpu; | |
159 | ||
160 | /* Recast the processor type to the cpu attribute. */ | |
161 | #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) | |
162 | ||
163 | /* Define the default processor. This is overridden by other tm.h files. */ | |
f86fe1fb | 164 | #define PROCESSOR_DEFAULT PROCESSOR_RIOS1 |
fb623df5 | 165 | |
6febd581 RK |
166 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
167 | and the old mnemonics are dialect zero. */ | |
168 | #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0 | |
169 | ||
fb623df5 RK |
170 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
171 | command options that have values. Its definition is an | |
172 | initializer with a subgrouping for each command option. | |
173 | ||
174 | Each subgrouping contains a string constant, that defines the | |
175 | fixed part of the option name, and the address of a variable. | |
176 | The variable, type `char *', is set to the variable part of the | |
177 | given option if the fixed part matches. The actual option name | |
178 | is made by appending `-m' to the specified name. | |
179 | ||
180 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
181 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
182 | will be set to the string `"512"'. | |
183 | ||
184 | extern char *m88k_short_data; | |
185 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
186 | ||
187 | #define TARGET_OPTIONS \ | |
188 | { {"cpu=", &rs6000_cpu_string}} | |
189 | ||
190 | extern char *rs6000_cpu_string; | |
191 | ||
192 | /* Sometimes certain combinations of command options do not make sense | |
193 | on a particular target machine. You can define a macro | |
194 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
195 | defined, is executed once just after all the command options have | |
196 | been parsed. | |
197 | ||
198 | On the RS/6000 this is used to define the target cpu type. */ | |
199 | ||
200 | #define OVERRIDE_OPTIONS rs6000_override_options () | |
f045b2c9 | 201 | |
4f074454 RK |
202 | /* Show we can debug even without a frame pointer. */ |
203 | #define CAN_DEBUG_WITHOUT_FP | |
f045b2c9 RS |
204 | \f |
205 | /* target machine storage layout */ | |
206 | ||
13d39dbc | 207 | /* Define this macro if it is advisable to hold scalars in registers |
ef457bda RK |
208 | in a wider mode than that declared by the program. In such cases, |
209 | the value is constrained to be within the bounds of the declared | |
210 | type, but kept valid in the wider mode. The signedness of the | |
211 | extension may differ from that of the type. */ | |
212 | ||
213 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
214 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
215 | && GET_MODE_SIZE (MODE) < 4) \ | |
dac29d65 | 216 | (MODE) = SImode; |
ef457bda | 217 | |
f045b2c9 RS |
218 | /* Define this if most significant bit is lowest numbered |
219 | in instructions that operate on numbered bit-fields. */ | |
220 | /* That is true on RS/6000. */ | |
221 | #define BITS_BIG_ENDIAN 1 | |
222 | ||
223 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
224 | /* That is true on RS/6000. */ | |
225 | #define BYTES_BIG_ENDIAN 1 | |
226 | ||
227 | /* Define this if most significant word of a multiword number is lowest | |
228 | numbered. | |
229 | ||
230 | For RS/6000 we can decide arbitrarily since there are no machine | |
231 | instructions for them. Might as well be consistent with bits and bytes. */ | |
232 | #define WORDS_BIG_ENDIAN 1 | |
233 | ||
fdaff8ba | 234 | /* number of bits in an addressable storage unit */ |
f045b2c9 RS |
235 | #define BITS_PER_UNIT 8 |
236 | ||
237 | /* Width in bits of a "word", which is the contents of a machine register. | |
238 | Note that this is not necessarily the width of data type `int'; | |
239 | if using 16-bit ints on a 68000, this would still be 32. | |
240 | But on a machine with 16-bit registers, this would be 16. */ | |
241 | #define BITS_PER_WORD 32 | |
242 | ||
243 | /* Width of a word, in units (bytes). */ | |
244 | #define UNITS_PER_WORD 4 | |
245 | ||
915f619f JW |
246 | /* Type used for ptrdiff_t, as a string used in a declaration. */ |
247 | #define PTRDIFF_TYPE "int" | |
248 | ||
f045b2c9 RS |
249 | /* Type used for wchar_t, as a string used in a declaration. */ |
250 | #define WCHAR_TYPE "short unsigned int" | |
251 | ||
252 | /* Width of wchar_t in bits. */ | |
253 | #define WCHAR_TYPE_SIZE 16 | |
254 | ||
255 | /* Width in bits of a pointer. | |
256 | See also the macro `Pmode' defined below. */ | |
257 | #define POINTER_SIZE 32 | |
258 | ||
259 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
260 | #define PARM_BOUNDARY 32 | |
261 | ||
262 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
263 | #define STACK_BOUNDARY 64 | |
264 | ||
265 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
266 | #define FUNCTION_BOUNDARY 32 | |
267 | ||
268 | /* No data type wants to be aligned rounder than this. */ | |
269 | #define BIGGEST_ALIGNMENT 32 | |
270 | ||
271 | /* Alignment of field after `int : 0' in a structure. */ | |
272 | #define EMPTY_FIELD_BOUNDARY 32 | |
273 | ||
274 | /* Every structure's size must be a multiple of this. */ | |
275 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
276 | ||
277 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
278 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
279 | ||
280 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
281 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
282 | (TREE_CODE (EXP) == STRING_CST \ | |
283 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
284 | ||
285 | /* Make arrays of chars word-aligned for the same reasons. */ | |
286 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
287 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
288 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
289 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
290 | ||
fdaff8ba | 291 | /* Non-zero if move instructions will actually fail to work |
f045b2c9 | 292 | when given unaligned data. */ |
fdaff8ba | 293 | #define STRICT_ALIGNMENT 0 |
f045b2c9 RS |
294 | \f |
295 | /* Standard register usage. */ | |
296 | ||
297 | /* Number of actual hardware registers. | |
298 | The hardware registers are assigned numbers for the compiler | |
299 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
300 | All registers that the compiler knows about must be given numbers, | |
301 | even those that are not normally considered general registers. | |
302 | ||
303 | RS/6000 has 32 fixed-point registers, 32 floating-point registers, | |
304 | an MQ register, a count register, a link register, and 8 condition | |
305 | register fields, which we view here as separate registers. | |
306 | ||
307 | In addition, the difference between the frame and argument pointers is | |
308 | a function of the number of registers saved, so we need to have a | |
309 | register for AP that will later be eliminated in favor of SP or FP. | |
310 | This is a normal register, but it is fixed. */ | |
311 | ||
312 | #define FIRST_PSEUDO_REGISTER 76 | |
313 | ||
314 | /* 1 for registers that have pervasive standard uses | |
315 | and are not available for the register allocator. | |
316 | ||
317 | On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer. | |
318 | ||
319 | cr5 is not supposed to be used. */ | |
320 | ||
321 | #define FIXED_REGISTERS \ | |
322 | {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
323 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
324 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
325 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
326 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0} | |
327 | ||
328 | /* 1 for registers not available across function calls. | |
329 | These must include the FIXED_REGISTERS and also any | |
330 | registers that can be used without being saved. | |
331 | The latter must include the registers where values are returned | |
332 | and the register where structure-value addresses are passed. | |
333 | Aside from that, you can include as many other registers as you like. */ | |
334 | ||
335 | #define CALL_USED_REGISTERS \ | |
336 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \ | |
337 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
338 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ | |
339 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
340 | 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1} | |
341 | ||
342 | /* List the order in which to allocate registers. Each register must be | |
343 | listed once, even those in FIXED_REGISTERS. | |
344 | ||
345 | We allocate in the following order: | |
346 | fp0 (not saved or used for anything) | |
347 | fp13 - fp2 (not saved; incoming fp arg registers) | |
348 | fp1 (not saved; return value) | |
349 | fp31 - fp14 (saved; order given to save least number) | |
350 | cr1, cr6, cr7 (not saved or special) | |
351 | cr0 (not saved, but used for arithmetic operations) | |
352 | cr2, cr3, cr4 (saved) | |
353 | r0 (not saved; cannot be base reg) | |
354 | r9 (not saved; best for TImode) | |
355 | r11, r10, r8-r4 (not saved; highest used first to make less conflict) | |
356 | r3 (not saved; return value register) | |
357 | r31 - r13 (saved; order given to save least number) | |
358 | r12 (not saved; if used for DImode or DFmode would use r13) | |
359 | mq (not saved; best to use it if we can) | |
360 | ctr (not saved; when we have the choice ctr is better) | |
361 | lr (saved) | |
362 | cr5, r1, r2, ap (fixed) */ | |
363 | ||
364 | #define REG_ALLOC_ORDER \ | |
365 | {32, \ | |
366 | 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ | |
367 | 33, \ | |
368 | 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ | |
369 | 50, 49, 48, 47, 46, \ | |
370 | 69, 74, 75, 68, 70, 71, 72, \ | |
371 | 0, \ | |
372 | 9, 11, 10, 8, 7, 6, 5, 4, \ | |
373 | 3, \ | |
374 | 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ | |
375 | 18, 17, 16, 15, 14, 13, 12, \ | |
376 | 64, 66, 65, \ | |
377 | 73, 1, 2, 67} | |
378 | ||
379 | /* True if register is floating-point. */ | |
380 | #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) | |
381 | ||
382 | /* True if register is a condition register. */ | |
383 | #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) | |
384 | ||
385 | /* True if register is an integer register. */ | |
386 | #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67) | |
387 | ||
388 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
389 | to hold something of mode MODE. | |
390 | This is ordinarily the length in words of a value of mode MODE | |
391 | but can be less for certain modes in special long registers. | |
392 | ||
393 | On RS/6000, ordinary registers hold 32 bits worth; | |
394 | a single floating point register holds 64 bits worth. */ | |
395 | ||
396 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
397 | (FP_REGNO_P (REGNO) \ | |
398 | ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \ | |
399 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
400 | ||
401 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
bdfd4e31 RK |
402 | For POWER and PowerPC, the GPRs can hold any mode, but the float |
403 | registers only can hold floating modes and DImode, and CR register only | |
404 | can hold CC modes. We cannot put TImode anywhere except general | |
405 | register and it must be able to fit within the register set. */ | |
f045b2c9 RS |
406 | |
407 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
bdfd4e31 RK |
408 | (FP_REGNO_P (REGNO) ? \ |
409 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
410 | || (GET_MODE_CLASS (MODE) == MODE_INT \ | |
411 | && GET_MODE_SIZE (MODE) == 2 * UNITS_PER_WORD)) \ | |
f045b2c9 | 412 | : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ |
bdfd4e31 RK |
413 | : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ |
414 | && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ | |
f045b2c9 RS |
415 | : 1) |
416 | ||
417 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
418 | when one has mode MODE1 and one has mode MODE2. | |
419 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
420 | for any hard reg, then this must be 0 for correct output. */ | |
421 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
422 | (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
423 | ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
424 | : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
425 | ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
426 | : GET_MODE_CLASS (MODE1) == MODE_CC \ | |
427 | ? GET_MODE_CLASS (MODE2) == MODE_CC \ | |
428 | : GET_MODE_CLASS (MODE2) == MODE_CC \ | |
429 | ? GET_MODE_CLASS (MODE1) == MODE_CC \ | |
430 | : 1) | |
431 | ||
432 | /* A C expression returning the cost of moving data from a register of class | |
433 | CLASS1 to one of CLASS2. | |
434 | ||
435 | On the RS/6000, copying between floating-point and fixed-point | |
436 | registers is expensive. */ | |
437 | ||
438 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
439 | ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ | |
440 | : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ | |
441 | : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ | |
442 | : 2) | |
443 | ||
444 | /* A C expressions returning the cost of moving data of MODE from a register to | |
445 | or from memory. | |
446 | ||
447 | On the RS/6000, bump this up a bit. */ | |
448 | ||
e8a8bc24 | 449 | #define MEMORY_MOVE_COST(MODE) 6 |
f045b2c9 RS |
450 | |
451 | /* Specify the cost of a branch insn; roughly the number of extra insns that | |
452 | should be added to avoid a branch. | |
453 | ||
ef457bda | 454 | Set this to 3 on the RS/6000 since that is roughly the average cost of an |
f045b2c9 RS |
455 | unscheduled conditional branch. */ |
456 | ||
ef457bda | 457 | #define BRANCH_COST 3 |
f045b2c9 | 458 | |
5a5e4c2c RK |
459 | /* A C statement (sans semicolon) to update the integer variable COST |
460 | based on the relationship between INSN that is dependent on | |
461 | DEP_INSN through the dependence LINK. The default is to make no | |
462 | adjustment to COST. On the RS/6000, ignore the cost of anti- and | |
463 | output-dependencies. In fact, output dependencies on the CR do have | |
464 | a cost, but it is probably not worthwhile to track it. */ | |
465 | ||
466 | #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ | |
b0634e74 | 467 | (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST) |
5a5e4c2c | 468 | |
6febd581 RK |
469 | /* Define this macro to change register usage conditional on target flags. |
470 | Set MQ register fixed (already call_used) if not POWER architecture | |
bdfd4e31 | 471 | (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. */ |
6febd581 RK |
472 | |
473 | #define CONDITIONAL_REGISTER_USAGE \ | |
474 | if (!TARGET_POWER) \ | |
475 | fixed_regs[64] = 1; | |
476 | ||
f045b2c9 RS |
477 | /* Specify the registers used for certain standard purposes. |
478 | The values of these macros are register numbers. */ | |
479 | ||
480 | /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ | |
481 | /* #define PC_REGNUM */ | |
482 | ||
483 | /* Register to use for pushing function arguments. */ | |
484 | #define STACK_POINTER_REGNUM 1 | |
485 | ||
486 | /* Base register for access to local variables of the function. */ | |
487 | #define FRAME_POINTER_REGNUM 31 | |
488 | ||
489 | /* Value should be nonzero if functions must have frame pointers. | |
490 | Zero means the frame pointer need not be set up (and parms | |
491 | may be accessed via the stack pointer) in functions that seem suitable. | |
492 | This is computed in `reload', in reload1.c. */ | |
493 | #define FRAME_POINTER_REQUIRED 0 | |
494 | ||
495 | /* Base register for access to arguments of the function. */ | |
496 | #define ARG_POINTER_REGNUM 67 | |
497 | ||
498 | /* Place to put static chain when calling a function that requires it. */ | |
499 | #define STATIC_CHAIN_REGNUM 11 | |
500 | ||
501 | /* Place that structure value return address is placed. | |
502 | ||
503 | On the RS/6000, it is passed as an extra parameter. */ | |
504 | #define STRUCT_VALUE 0 | |
505 | \f | |
506 | /* Define the classes of registers for register constraints in the | |
507 | machine description. Also define ranges of constants. | |
508 | ||
509 | One of the classes must always be named ALL_REGS and include all hard regs. | |
510 | If there is more than one class, another class must be named NO_REGS | |
511 | and contain no registers. | |
512 | ||
513 | The name GENERAL_REGS must be the name of a class (or an alias for | |
514 | another name such as ALL_REGS). This is the class of registers | |
515 | that is allowed by "g" or "r" in a register constraint. | |
516 | Also, registers outside this class are allocated only when | |
517 | instructions express preferences for them. | |
518 | ||
519 | The classes must be numbered in nondecreasing order; that is, | |
520 | a larger-numbered class must never be contained completely | |
521 | in a smaller-numbered class. | |
522 | ||
523 | For any two classes, it is very desirable that there be another | |
524 | class that represents their union. */ | |
525 | ||
526 | /* The RS/6000 has three types of registers, fixed-point, floating-point, | |
527 | and condition registers, plus three special registers, MQ, CTR, and the | |
528 | link register. | |
529 | ||
530 | However, r0 is special in that it cannot be used as a base register. | |
531 | So make a class for registers valid as base registers. | |
532 | ||
533 | Also, cr0 is the only condition code register that can be used in | |
534 | arithmetic insns, so make a separate class for it. */ | |
535 | ||
536 | enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS, | |
537 | NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, | |
e8a8bc24 RK |
538 | SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS, |
539 | ALL_REGS, LIM_REG_CLASSES }; | |
f045b2c9 RS |
540 | |
541 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
542 | ||
543 | /* Give names of register classes as strings for dump file. */ | |
544 | ||
545 | #define REG_CLASS_NAMES \ | |
546 | { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \ | |
547 | "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \ | |
e8a8bc24 RK |
548 | "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \ |
549 | "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" } | |
f045b2c9 RS |
550 | |
551 | /* Define which registers fit in which classes. | |
552 | This is an initializer for a vector of HARD_REG_SET | |
553 | of length N_REG_CLASSES. */ | |
554 | ||
555 | #define REG_CLASS_CONTENTS \ | |
556 | { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \ | |
e8a8bc24 RK |
557 | {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \ |
558 | {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \ | |
559 | {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \ | |
560 | {~0, ~0, 0xffff} } | |
f045b2c9 RS |
561 | |
562 | /* The same information, inverted: | |
563 | Return the class number of the smallest class containing | |
564 | reg number REGNO. This could be a conditional expression | |
565 | or could index an array. */ | |
566 | ||
567 | #define REGNO_REG_CLASS(REGNO) \ | |
568 | ((REGNO) == 0 ? GENERAL_REGS \ | |
569 | : (REGNO) < 32 ? BASE_REGS \ | |
570 | : FP_REGNO_P (REGNO) ? FLOAT_REGS \ | |
571 | : (REGNO) == 68 ? CR0_REGS \ | |
572 | : CR_REGNO_P (REGNO) ? CR_REGS \ | |
573 | : (REGNO) == 64 ? MQ_REGS \ | |
574 | : (REGNO) == 65 ? LINK_REGS \ | |
575 | : (REGNO) == 66 ? CTR_REGS \ | |
576 | : (REGNO) == 67 ? BASE_REGS \ | |
577 | : NO_REGS) | |
578 | ||
579 | /* The class value for index registers, and the one for base regs. */ | |
580 | #define INDEX_REG_CLASS GENERAL_REGS | |
581 | #define BASE_REG_CLASS BASE_REGS | |
582 | ||
583 | /* Get reg_class from a letter such as appears in the machine description. */ | |
584 | ||
585 | #define REG_CLASS_FROM_LETTER(C) \ | |
586 | ((C) == 'f' ? FLOAT_REGS \ | |
587 | : (C) == 'b' ? BASE_REGS \ | |
588 | : (C) == 'h' ? SPECIAL_REGS \ | |
589 | : (C) == 'q' ? MQ_REGS \ | |
590 | : (C) == 'c' ? CTR_REGS \ | |
591 | : (C) == 'l' ? LINK_REGS \ | |
592 | : (C) == 'x' ? CR0_REGS \ | |
593 | : (C) == 'y' ? CR_REGS \ | |
594 | : NO_REGS) | |
595 | ||
596 | /* The letters I, J, K, L, M, N, and P in a register constraint string | |
597 | can be used to stand for particular ranges of immediate operands. | |
598 | This macro defines what the ranges are. | |
599 | C is the letter, and VALUE is a constant value. | |
600 | Return 1 if VALUE is in the range specified by C. | |
601 | ||
602 | `I' is signed 16-bit constants | |
603 | `J' is a constant with only the high-order 16 bits non-zero | |
604 | `K' is a constant with only the low-order 16 bits non-zero | |
605 | `L' is a constant that can be placed into a mask operand | |
606 | `M' is a constant that is greater than 31 | |
607 | `N' is a constant that is an exact power of two | |
608 | `O' is the constant zero | |
609 | `P' is a constant whose negation is a signed 16-bit constant */ | |
610 | ||
611 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
612 | ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \ | |
613 | : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \ | |
614 | : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \ | |
615 | : (C) == 'L' ? mask_constant (VALUE) \ | |
616 | : (C) == 'M' ? (VALUE) > 31 \ | |
617 | : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ | |
618 | : (C) == 'O' ? (VALUE) == 0 \ | |
619 | : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \ | |
620 | : 0) | |
621 | ||
622 | /* Similar, but for floating constants, and defining letters G and H. | |
623 | Here VALUE is the CONST_DOUBLE rtx itself. | |
624 | ||
625 | We flag for special constants when we can copy the constant into | |
626 | a general register in two insns for DF and one insn for SF. */ | |
627 | ||
628 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
629 | ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0) | |
630 | ||
631 | /* Optional extra constraints for this machine. | |
632 | ||
633 | For the RS/6000, `Q' means that this is a memory operand that is just | |
634 | an offset from a register. */ | |
635 | ||
e8a8bc24 RK |
636 | #define EXTRA_CONSTRAINT(OP, C) \ |
637 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ | |
638 | : 0) | |
f045b2c9 RS |
639 | |
640 | /* Given an rtx X being reloaded into a reg required to be | |
641 | in class CLASS, return the class of reg to actually use. | |
642 | In general this is just CLASS; but on some machines | |
643 | in some cases it is preferable to use a more restrictive class. | |
644 | ||
645 | On the RS/6000, we have to return NO_REGS when we want to reload a | |
646 | floating-point CONST_DOUBLE to force it to be copied to memory. */ | |
647 | ||
648 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
649 | ((GET_CODE (X) == CONST_DOUBLE \ | |
650 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
651 | ? NO_REGS : (CLASS)) | |
652 | ||
653 | /* Return the register class of a scratch register needed to copy IN into | |
654 | or out of a register in CLASS in MODE. If it can be done directly, | |
655 | NO_REGS is returned. */ | |
656 | ||
657 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
658 | secondary_reload_class (CLASS, MODE, IN) | |
659 | ||
7ea555a4 RK |
660 | /* If we are copying between FP registers and anything else, we need a memory |
661 | location. */ | |
662 | ||
663 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ | |
664 | ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS)) | |
665 | ||
f045b2c9 RS |
666 | /* Return the maximum number of consecutive registers |
667 | needed to represent mode MODE in a register of class CLASS. | |
668 | ||
669 | On RS/6000, this is the size of MODE in words, | |
670 | except in the FP regs, where a single reg is enough for two words. */ | |
671 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
672 | ((CLASS) == FLOAT_REGS \ | |
673 | ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \ | |
674 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
675 | \f | |
676 | /* Stack layout; function entry, exit and calling. */ | |
677 | ||
678 | /* Define this if pushing a word on the stack | |
679 | makes the stack pointer a smaller address. */ | |
680 | #define STACK_GROWS_DOWNWARD | |
681 | ||
682 | /* Define this if the nominal address of the stack frame | |
683 | is at the high-address end of the local variables; | |
684 | that is, each additional local variable allocated | |
685 | goes at a more negative offset in the frame. | |
686 | ||
687 | On the RS/6000, we grow upwards, from the area after the outgoing | |
688 | arguments. */ | |
689 | /* #define FRAME_GROWS_DOWNWARD */ | |
690 | ||
691 | /* Offset within stack frame to start allocating local variables at. | |
692 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
693 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
694 | of the first local allocated. | |
695 | ||
696 | On the RS/6000, the frame pointer is the same as the stack pointer, | |
697 | except for dynamic allocations. So we start after the fixed area and | |
698 | outgoing parameter area. */ | |
699 | ||
700 | #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24) | |
701 | ||
702 | /* If we generate an insn to push BYTES bytes, | |
703 | this says how many the stack pointer really advances by. | |
704 | On RS/6000, don't define this because there are no push insns. */ | |
705 | /* #define PUSH_ROUNDING(BYTES) */ | |
706 | ||
707 | /* Offset of first parameter from the argument pointer register value. | |
708 | On the RS/6000, we define the argument pointer to the start of the fixed | |
709 | area. */ | |
710 | #define FIRST_PARM_OFFSET(FNDECL) 24 | |
711 | ||
712 | /* Define this if stack space is still allocated for a parameter passed | |
713 | in a register. The value is the number of bytes allocated to this | |
714 | area. */ | |
715 | #define REG_PARM_STACK_SPACE(FNDECL) 32 | |
716 | ||
717 | /* Define this if the above stack space is to be considered part of the | |
718 | space allocated by the caller. */ | |
719 | #define OUTGOING_REG_PARM_STACK_SPACE | |
720 | ||
721 | /* This is the difference between the logical top of stack and the actual sp. | |
722 | ||
723 | For the RS/6000, sp points past the fixed area. */ | |
724 | #define STACK_POINTER_OFFSET 24 | |
725 | ||
726 | /* Define this if the maximum size of all the outgoing args is to be | |
727 | accumulated and pushed during the prologue. The amount can be | |
728 | found in the variable current_function_outgoing_args_size. */ | |
729 | #define ACCUMULATE_OUTGOING_ARGS | |
730 | ||
731 | /* Value is the number of bytes of arguments automatically | |
732 | popped when returning from a subroutine call. | |
733 | FUNTYPE is the data type of the function (as a tree), | |
734 | or for a library call it is an identifier node for the subroutine name. | |
735 | SIZE is the number of bytes of arguments passed on the stack. */ | |
736 | ||
737 | #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 | |
738 | ||
739 | /* Define how to find the value returned by a function. | |
740 | VALTYPE is the data type of the value (as a tree). | |
741 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
742 | otherwise, FUNC is 0. | |
743 | ||
744 | On RS/6000 an integer value is in r3 and a floating-point value is in | |
745 | fp1. */ | |
746 | ||
747 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
748 | gen_rtx (REG, TYPE_MODE (VALTYPE), \ | |
749 | TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3) | |
750 | ||
751 | /* Define how to find the value returned by a library function | |
752 | assuming the value has mode MODE. */ | |
753 | ||
754 | #define LIBCALL_VALUE(MODE) \ | |
755 | gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3) | |
756 | ||
757 | /* The definition of this macro implies that there are cases where | |
758 | a scalar value cannot be returned in registers. | |
759 | ||
760 | For the RS/6000, any structure or union type is returned in memory. */ | |
761 | ||
762 | #define RETURN_IN_MEMORY(TYPE) \ | |
e419152d | 763 | (TYPE_MODE (TYPE) == BLKmode) |
f045b2c9 RS |
764 | |
765 | /* 1 if N is a possible register number for a function value | |
766 | as seen by the caller. | |
767 | ||
768 | On RS/6000, this is r3 and fp1. */ | |
769 | ||
770 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33)) | |
771 | ||
772 | /* 1 if N is a possible register number for function argument passing. | |
773 | On RS/6000, these are r3-r10 and fp1-fp13. */ | |
774 | ||
775 | #define FUNCTION_ARG_REGNO_P(N) \ | |
776 | (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45)) | |
777 | \f | |
778 | /* Define a data type for recording info about an argument list | |
779 | during the scan of that argument list. This data type should | |
780 | hold all necessary information about the function itself | |
781 | and about the args processed so far, enough to enable macros | |
782 | such as FUNCTION_ARG to determine where the next arg should go. | |
783 | ||
784 | On the RS/6000, this is a structure. The first element is the number of | |
785 | total argument words, the second is used to store the next | |
786 | floating-point register number, and the third says how many more args we | |
787 | have prototype types for. */ | |
788 | ||
789 | struct rs6000_args {int words, fregno, nargs_prototype; }; | |
790 | #define CUMULATIVE_ARGS struct rs6000_args | |
791 | ||
792 | /* Define intermediate macro to compute the size (in registers) of an argument | |
793 | for the RS/6000. */ | |
794 | ||
795 | #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \ | |
796 | (! (NAMED) ? 0 \ | |
797 | : (MODE) != BLKmode \ | |
798 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
799 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
800 | ||
801 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
802 | for a call to a function whose data type is FNTYPE. | |
803 | For a library call, FNTYPE is 0. */ | |
804 | ||
805 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
806 | (CUM).words = 0, \ | |
807 | (CUM).fregno = 33, \ | |
808 | (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ | |
809 | ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ | |
810 | + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ | |
811 | || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \ | |
812 | : 0) | |
813 | ||
814 | /* Similar, but when scanning the definition of a procedure. We always | |
815 | set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ | |
816 | ||
817 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ | |
818 | (CUM).words = 0, \ | |
819 | (CUM).fregno = 33, \ | |
820 | (CUM).nargs_prototype = 1000 | |
821 | ||
822 | /* Update the data in CUM to advance over an argument | |
823 | of mode MODE and data type TYPE. | |
824 | (TYPE is null for libcalls where that information may not be available.) */ | |
825 | ||
826 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
827 | { (CUM).nargs_prototype--; \ | |
828 | if (NAMED) \ | |
829 | { \ | |
830 | (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \ | |
831 | if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \ | |
832 | (CUM).fregno++; \ | |
833 | } \ | |
834 | } | |
835 | ||
836 | /* Non-zero if we can use a floating-point register to pass this arg. */ | |
837 | #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ | |
838 | (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46) | |
839 | ||
840 | /* Determine where to put an argument to a function. | |
841 | Value is zero to push the argument on the stack, | |
842 | or a hard register in which to store the argument. | |
843 | ||
844 | MODE is the argument's machine mode. | |
845 | TYPE is the data type of the argument (as a tree). | |
846 | This is null for libcalls where that information may | |
847 | not be available. | |
848 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
849 | the preceding args and about the function being called. | |
850 | NAMED is nonzero if this argument is a named parameter | |
851 | (otherwise it is an extra parameter matching an ellipsis). | |
852 | ||
853 | On RS/6000 the first eight words of non-FP are normally in registers | |
854 | and the rest are pushed. The first 13 FP args are in registers. | |
855 | ||
856 | If this is floating-point and no prototype is specified, we use | |
4d6697ca RK |
857 | both an FP and integer register (or possibly FP reg and stack). Library |
858 | functions (when TYPE is zero) always have the proper types for args, | |
859 | so we can pass the FP value just in one register. emit_library_function | |
860 | doesn't support EXPR_LIST anyway. */ | |
f045b2c9 RS |
861 | |
862 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
863 | (! (NAMED) ? 0 \ | |
38bd31fc | 864 | : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ |
d072107f | 865 | : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \ |
4d6697ca | 866 | ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \ |
f045b2c9 RS |
867 | ? gen_rtx (REG, MODE, (CUM).fregno) \ |
868 | : ((CUM).words < 8 \ | |
869 | ? gen_rtx (EXPR_LIST, VOIDmode, \ | |
870 | gen_rtx (REG, (MODE), 3 + (CUM).words), \ | |
871 | gen_rtx (REG, (MODE), (CUM).fregno)) \ | |
872 | : gen_rtx (EXPR_LIST, VOIDmode, 0, \ | |
873 | gen_rtx (REG, (MODE), (CUM).fregno)))) \ | |
874 | : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0) | |
875 | ||
876 | /* For an arg passed partly in registers and partly in memory, | |
877 | this is the number of registers used. | |
878 | For args passed entirely in registers or entirely in memory, zero. */ | |
879 | ||
880 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
881 | (! (NAMED) ? 0 \ | |
882 | : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \ | |
883 | : (((CUM).words < 8 \ | |
884 | && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \ | |
885 | ? 8 - (CUM).words : 0)) | |
886 | ||
887 | /* Perform any needed actions needed for a function that is receiving a | |
888 | variable number of arguments. | |
889 | ||
890 | CUM is as above. | |
891 | ||
892 | MODE and TYPE are the mode and type of the current parameter. | |
893 | ||
894 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
895 | that must be pushed by the prolog to pretend that our caller pushed | |
896 | it. | |
897 | ||
898 | Normally, this macro will push all remaining incoming registers on the | |
899 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
900 | ||
901 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ | |
902 | { if ((CUM).words < 8) \ | |
903 | { \ | |
904 | int first_reg_offset = (CUM).words; \ | |
905 | \ | |
906 | if (MUST_PASS_IN_STACK (MODE, TYPE)) \ | |
907 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ | |
908 | \ | |
909 | if (first_reg_offset > 8) \ | |
910 | first_reg_offset = 8; \ | |
911 | \ | |
912 | if (! (NO_RTL) && first_reg_offset != 8) \ | |
913 | move_block_from_reg \ | |
914 | (3 + first_reg_offset, \ | |
915 | gen_rtx (MEM, BLKmode, \ | |
916 | plus_constant (virtual_incoming_args_rtx, \ | |
917 | first_reg_offset * 4)), \ | |
02892e06 | 918 | 8 - first_reg_offset, (8 - first_reg_offset) * UNITS_PER_WORD); \ |
f045b2c9 RS |
919 | PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \ |
920 | } \ | |
921 | } | |
922 | ||
923 | /* This macro generates the assembly code for function entry. | |
924 | FILE is a stdio stream to output the code to. | |
925 | SIZE is an int: how many units of temporary storage to allocate. | |
926 | Refer to the array `regs_ever_live' to determine which registers | |
927 | to save; `regs_ever_live[I]' is nonzero if register number I | |
928 | is ever used in the function. This macro is responsible for | |
929 | knowing which registers should not be saved even if used. */ | |
930 | ||
931 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
932 | ||
933 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
58a39e45 | 934 | for profiling a function entry. */ |
f045b2c9 RS |
935 | |
936 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
58a39e45 | 937 | output_function_profiler ((FILE), (LABELNO)); |
f045b2c9 RS |
938 | |
939 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
940 | the stack pointer does not matter. No definition is equivalent to | |
941 | always zero. | |
942 | ||
943 | On the RS/6000, this is non-zero because we can restore the stack from | |
944 | its backpointer, which we maintain. */ | |
945 | #define EXIT_IGNORE_STACK 1 | |
946 | ||
947 | /* This macro generates the assembly code for function exit, | |
948 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
949 | then individual return instructions are generated for each | |
950 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
951 | ||
952 | The function epilogue should not depend on the current stack pointer! | |
953 | It should use the frame pointer only. This is mandatory because | |
954 | of alloca; we also take advantage of it to omit stack adjustments | |
955 | before returning. */ | |
956 | ||
957 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
958 | \f | |
959 | /* Output assembler code for a block containing the constant parts | |
960 | of a trampoline, leaving space for the variable parts. | |
961 | ||
962 | The trampoline should set the static chain pointer to value placed | |
963 | into the trampoline and should branch to the specified routine. | |
964 | ||
965 | On the RS/6000, this is not code at all, but merely a data area, | |
966 | since that is the way all functions are called. The first word is | |
967 | the address of the function, the second word is the TOC pointer (r2), | |
968 | and the third word is the static chain value. */ | |
969 | ||
970 | #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); } | |
971 | ||
972 | /* Length in units of the trampoline for entering a nested function. */ | |
973 | ||
974 | #define TRAMPOLINE_SIZE 12 | |
975 | ||
976 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
977 | FNADDR is an RTX for the address of the function's pure code. | |
978 | CXT is an RTX for the static chain value for the function. */ | |
979 | ||
980 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
981 | { \ | |
f045b2c9 | 982 | emit_move_insn (gen_rtx (MEM, SImode, \ |
858b728c RK |
983 | memory_address (SImode, (ADDR))), \ |
984 | gen_rtx (MEM, SImode, \ | |
985 | memory_address (SImode, (FNADDR)))); \ | |
f045b2c9 | 986 | emit_move_insn (gen_rtx (MEM, SImode, \ |
858b728c RK |
987 | memory_address (SImode, \ |
988 | plus_constant ((ADDR), 4))), \ | |
989 | gen_rtx (MEM, SImode, \ | |
990 | memory_address (SImode, \ | |
991 | plus_constant ((FNADDR), 4)))); \ | |
992 | emit_move_insn (gen_rtx (MEM, SImode, \ | |
993 | memory_address (SImode, \ | |
994 | plus_constant ((ADDR), 8))), \ | |
995 | force_reg (SImode, (CXT))); \ | |
f045b2c9 RS |
996 | } |
997 | \f | |
998 | /* Definitions for register eliminations. | |
999 | ||
1000 | We have two registers that can be eliminated on the RS/6000. First, the | |
1001 | frame pointer register can often be eliminated in favor of the stack | |
1002 | pointer register. Secondly, the argument pointer register can always be | |
642a35f1 JW |
1003 | eliminated; it is replaced with either the stack or frame pointer. |
1004 | ||
1005 | In addition, we use the elimination mechanism to see if r30 is needed | |
1006 | Initially we assume that it isn't. If it is, we spill it. This is done | |
1007 | by making it an eliminable register. We replace it with itself so that | |
1008 | if it isn't needed, then existing uses won't be modified. */ | |
f045b2c9 RS |
1009 | |
1010 | /* This is an array of structures. Each structure initializes one pair | |
1011 | of eliminable registers. The "from" register number is given first, | |
1012 | followed by "to". Eliminations of the same "from" register are listed | |
1013 | in order of preference. */ | |
1014 | #define ELIMINABLE_REGS \ | |
1015 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1016 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
642a35f1 JW |
1017 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ |
1018 | { 30, 30} } | |
f045b2c9 RS |
1019 | |
1020 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
1021 | Frame pointer elimination is automatically handled. | |
1022 | ||
1023 | For the RS/6000, if frame pointer elimination is being done, we would like | |
642a35f1 JW |
1024 | to convert ap into fp, not sp. |
1025 | ||
1026 | We need r30 if -mmininal-toc was specified, and there are constant pool | |
1027 | references. */ | |
f045b2c9 RS |
1028 | |
1029 | #define CAN_ELIMINATE(FROM, TO) \ | |
1030 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
1031 | ? ! frame_pointer_needed \ | |
642a35f1 | 1032 | : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || get_pool_size () == 0 \ |
f045b2c9 RS |
1033 | : 1) |
1034 | ||
1035 | /* Define the offset between two registers, one to be eliminated, and the other | |
1036 | its replacement, at the start of a routine. */ | |
1037 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1038 | { \ | |
1039 | int total_stack_size = (rs6000_sa_size () + get_frame_size () \ | |
1040 | + current_function_outgoing_args_size); \ | |
1041 | \ | |
1042 | total_stack_size = (total_stack_size + 7) & ~7; \ | |
1043 | \ | |
1044 | if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1045 | { \ | |
1046 | if (rs6000_pushes_stack ()) \ | |
1047 | (OFFSET) = 0; \ | |
1048 | else \ | |
1049 | (OFFSET) = - total_stack_size; \ | |
1050 | } \ | |
1051 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1052 | (OFFSET) = total_stack_size; \ | |
1053 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1054 | { \ | |
1055 | if (rs6000_pushes_stack ()) \ | |
1056 | (OFFSET) = total_stack_size; \ | |
1057 | else \ | |
1058 | (OFFSET) = 0; \ | |
1059 | } \ | |
642a35f1 JW |
1060 | else if ((FROM) == 30) \ |
1061 | (OFFSET) = 0; \ | |
f045b2c9 RS |
1062 | else \ |
1063 | abort (); \ | |
1064 | } | |
1065 | \f | |
1066 | /* Addressing modes, and classification of registers for them. */ | |
1067 | ||
1068 | /* #define HAVE_POST_INCREMENT */ | |
1069 | /* #define HAVE_POST_DECREMENT */ | |
1070 | ||
1071 | #define HAVE_PRE_DECREMENT | |
1072 | #define HAVE_PRE_INCREMENT | |
1073 | ||
1074 | /* Macros to check register numbers against specific register classes. */ | |
1075 | ||
1076 | /* These assume that REGNO is a hard or pseudo reg number. | |
1077 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1078 | or a pseudo reg currently allocated to a suitable hard reg. | |
1079 | Since they use reg_renumber, they are safe only once reg_renumber | |
1080 | has been allocated, which happens in local-alloc.c. */ | |
1081 | ||
1082 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1083 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1084 | ? (REGNO) <= 31 || (REGNO) == 67 \ | |
1085 | : (reg_renumber[REGNO] >= 0 \ | |
1086 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1087 | ||
1088 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1089 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1090 | ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ | |
1091 | : (reg_renumber[REGNO] > 0 \ | |
1092 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1093 | \f | |
1094 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1095 | ||
1096 | #define MAX_REGS_PER_ADDRESS 2 | |
1097 | ||
1098 | /* Recognize any constant value that is a valid address. */ | |
1099 | ||
6eff269e BK |
1100 | #define CONSTANT_ADDRESS_P(X) \ |
1101 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1102 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1103 | || GET_CODE (X) == HIGH) | |
f045b2c9 RS |
1104 | |
1105 | /* Nonzero if the constant value X is a legitimate general operand. | |
1106 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
1107 | ||
1108 | On the RS/6000, all integer constants are acceptable, most won't be valid | |
1109 | for particular insns, though. Only easy FP constants are | |
1110 | acceptable. */ | |
1111 | ||
1112 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1113 | (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ | |
1114 | || easy_fp_constant (X, GET_MODE (X))) | |
1115 | ||
1116 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1117 | and check its validity for a certain class. | |
1118 | We have two alternate definitions for each of them. | |
1119 | The usual definition accepts all pseudo regs; the other rejects | |
1120 | them unless they have been allocated suitable hard regs. | |
1121 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1122 | ||
1123 | Most source files want to accept pseudo regs in the hope that | |
1124 | they will get allocated to the class that the insn wants them to be in. | |
1125 | Source files for reload pass need to be strict. | |
1126 | After reload, it makes no difference, since pseudo regs have | |
1127 | been eliminated by then. */ | |
1128 | ||
1129 | #ifndef REG_OK_STRICT | |
1130 | ||
1131 | /* Nonzero if X is a hard reg that can be used as an index | |
1132 | or if it is a pseudo reg. */ | |
1133 | #define REG_OK_FOR_INDEX_P(X) \ | |
1134 | (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
1135 | ||
1136 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1137 | or if it is a pseudo reg. */ | |
1138 | #define REG_OK_FOR_BASE_P(X) \ | |
1139 | (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X)) | |
1140 | ||
1141 | #else | |
1142 | ||
1143 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1144 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1145 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1146 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1147 | ||
1148 | #endif | |
1149 | \f | |
1150 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1151 | that is a valid memory address for an instruction. | |
1152 | The MODE argument is the machine mode for the MEM expression | |
1153 | that wants to use this address. | |
1154 | ||
1155 | On the RS/6000, there are four valid address: a SYMBOL_REF that | |
1156 | refers to a constant pool entry of an address (or the sum of it | |
1157 | plus a constant), a short (16-bit signed) constant plus a register, | |
1158 | the sum of two registers, or a register indirect, possibly with an | |
1159 | auto-increment. For DFmode and DImode with an constant plus register, | |
1160 | we must ensure that both words are addressable. */ | |
1161 | ||
1162 | #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \ | |
1163 | (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \ | |
1164 | && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X))) | |
1165 | ||
1166 | #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ | |
1167 | (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \ | |
1168 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
1169 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ | |
1170 | && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0)))) | |
1171 | ||
1172 | #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ | |
1173 | (GET_CODE (X) == CONST_INT \ | |
1174 | && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) | |
1175 | ||
1176 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \ | |
1177 | (GET_CODE (X) == PLUS \ | |
1178 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1179 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1180 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ | |
1181 | && (((MODE) != DFmode && (MODE) != DImode) \ | |
1182 | || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4))) | |
1183 | ||
1184 | #define LEGITIMATE_INDEXED_ADDRESS_P(X) \ | |
1185 | (GET_CODE (X) == PLUS \ | |
1186 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1187 | && GET_CODE (XEXP (X, 1)) == REG \ | |
1188 | && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1189 | && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ | |
1190 | || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
1191 | && REG_OK_FOR_INDEX_P (XEXP (X, 0))))) | |
1192 | ||
1193 | #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \ | |
1194 | (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
1195 | ||
1196 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1197 | { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \ | |
1198 | goto ADDR; \ | |
1199 | if (GET_CODE (X) == PRE_INC \ | |
1200 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ | |
1201 | goto ADDR; \ | |
1202 | if (GET_CODE (X) == PRE_DEC \ | |
1203 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ | |
1204 | goto ADDR; \ | |
1205 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \ | |
1206 | goto ADDR; \ | |
1207 | if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \ | |
1208 | goto ADDR; \ | |
1209 | if ((MODE) != DImode && (MODE) != TImode \ | |
1210 | && LEGITIMATE_INDEXED_ADDRESS_P (X)) \ | |
1211 | goto ADDR; \ | |
1212 | } | |
1213 | \f | |
1214 | /* Try machine-dependent ways of modifying an illegitimate address | |
1215 | to be legitimate. If we find one, return the new, valid address. | |
1216 | This macro is used in only one place: `memory_address' in explow.c. | |
1217 | ||
1218 | OLDX is the address as it was before break_out_memory_refs was called. | |
1219 | In some cases it is useful to look at this to decide what needs to be done. | |
1220 | ||
1221 | MODE and WIN are passed so that this macro can use | |
1222 | GO_IF_LEGITIMATE_ADDRESS. | |
1223 | ||
1224 | It is always safe for this macro to do nothing. It exists to recognize | |
1225 | opportunities to optimize the output. | |
1226 | ||
1227 | On RS/6000, first check for the sum of a register with a constant | |
1228 | integer that is out of range. If so, generate code to add the | |
1229 | constant with the low-order 16 bits masked to the register and force | |
1230 | this result into another register (this can be done with `cau'). | |
1231 | Then generate an address of REG+(CONST&0xffff), allowing for the | |
1232 | possibility of bit 16 being a one. | |
1233 | ||
1234 | Then check for the sum of a register and something not constant, try to | |
1235 | load the other things into a register and return the sum. */ | |
1236 | ||
1237 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
1238 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1239 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1240 | && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ | |
1241 | { int high_int, low_int; \ | |
1242 | high_int = INTVAL (XEXP (X, 1)) >> 16; \ | |
1243 | low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ | |
1244 | if (low_int & 0x8000) \ | |
1245 | high_int += 1, low_int |= 0xffff0000; \ | |
1246 | (X) = gen_rtx (PLUS, SImode, \ | |
1247 | force_operand \ | |
1248 | (gen_rtx (PLUS, SImode, XEXP (X, 0), \ | |
1249 | gen_rtx (CONST_INT, VOIDmode, \ | |
1250 | high_int << 16)), 0),\ | |
1251 | gen_rtx (CONST_INT, VOIDmode, low_int)); \ | |
f357808b | 1252 | goto WIN; \ |
f045b2c9 RS |
1253 | } \ |
1254 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
27a2a2f1 RK |
1255 | && GET_CODE (XEXP (X, 1)) != CONST_INT \ |
1256 | && (MODE) != DImode && (MODE) != TImode) \ | |
f357808b RK |
1257 | { \ |
1258 | (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ | |
1259 | force_reg (SImode, force_operand (XEXP (X, 1), 0))); \ | |
1260 | goto WIN; \ | |
1261 | } \ | |
f045b2c9 RS |
1262 | } |
1263 | ||
1264 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1265 | has an effect that depends on the machine mode it is used for. | |
1266 | ||
1267 | On the RS/6000 this is true if the address is valid with a zero offset | |
1268 | but not with an offset of four (this means it cannot be used as an | |
1269 | address for DImode or DFmode) or is a pre-increment or decrement. Since | |
1270 | we know it is valid, we just check for an address that is not valid with | |
1271 | an offset of four. */ | |
1272 | ||
1273 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1274 | { if (GET_CODE (ADDR) == PLUS \ | |
1275 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ | |
1276 | && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \ | |
1277 | goto LABEL; \ | |
1278 | if (GET_CODE (ADDR) == PRE_INC) \ | |
1279 | goto LABEL; \ | |
1280 | if (GET_CODE (ADDR) == PRE_DEC) \ | |
1281 | goto LABEL; \ | |
1282 | } | |
1283 | \f | |
1284 | /* Define this if some processing needs to be done immediately before | |
1285 | emitting code for an insn. */ | |
1286 | ||
1287 | /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ | |
1288 | ||
1289 | /* Specify the machine mode that this machine uses | |
1290 | for the index in the tablejump instruction. */ | |
1291 | #define CASE_VECTOR_MODE SImode | |
1292 | ||
1293 | /* Define this if the tablejump instruction expects the table | |
1294 | to contain offsets from the address of the table. | |
1295 | Do not define this if the table should contain absolute addresses. */ | |
1296 | #define CASE_VECTOR_PC_RELATIVE | |
1297 | ||
1298 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1299 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1300 | ||
1301 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1302 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1303 | ||
1304 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1305 | #define DEFAULT_SIGNED_CHAR 0 | |
1306 | ||
1307 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1308 | also convert validly to an unsigned one. */ | |
1309 | ||
1310 | /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ | |
1311 | ||
1312 | /* Max number of bytes we can move from memory to memory | |
1313 | in one reasonably fast instruction. */ | |
1314 | #define MOVE_MAX 16 | |
1315 | ||
1316 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1317 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1318 | is undesirable. */ | |
1319 | #define SLOW_BYTE_ACCESS 1 | |
1320 | ||
9a63901f RK |
1321 | /* Define if operations between registers always perform the operation |
1322 | on the full register even if a narrower mode is specified. */ | |
1323 | #define WORD_REGISTER_OPERATIONS | |
1324 | ||
1325 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1326 | will either zero-extend or sign-extend. The value of this macro should | |
1327 | be the code that says which one of the two operations is implicitly | |
1328 | done, NIL if none. */ | |
1329 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
225211e2 RK |
1330 | |
1331 | /* Define if loading short immediate values into registers sign extends. */ | |
1332 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
fdaff8ba RS |
1333 | \f |
1334 | /* The RS/6000 uses the XCOFF format. */ | |
f045b2c9 | 1335 | |
fdaff8ba | 1336 | #define XCOFF_DEBUGGING_INFO |
f045b2c9 | 1337 | |
c5abcf1d CH |
1338 | /* Define if the object format being used is COFF or a superset. */ |
1339 | #define OBJECT_FORMAT_COFF | |
1340 | ||
2c440f06 RK |
1341 | /* Define the magic numbers that we recognize as COFF. */ |
1342 | ||
1343 | #define MY_ISCOFF(magic) \ | |
1344 | ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC) | |
1345 | ||
115e69a9 RK |
1346 | /* This is the only version of nm that collect2 can work with. */ |
1347 | #define REAL_NM_FILE_NAME "/usr/ucb/nm" | |
1348 | ||
f045b2c9 RS |
1349 | /* We don't have GAS for the RS/6000 yet, so don't write out special |
1350 | .stabs in cc1plus. */ | |
1351 | ||
1352 | #define FASCIST_ASSEMBLER | |
1353 | ||
f045b2c9 RS |
1354 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1355 | is done just by pretending it is already truncated. */ | |
1356 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1357 | ||
1358 | /* Specify the machine mode that pointers have. | |
1359 | After generation of rtl, the compiler makes no further distinction | |
1360 | between pointers and any other objects of this machine mode. */ | |
1361 | #define Pmode SImode | |
1362 | ||
1363 | /* Mode of a function address in a call instruction (for indexing purposes). | |
1364 | ||
1365 | Doesn't matter on RS/6000. */ | |
1366 | #define FUNCTION_MODE SImode | |
1367 | ||
1368 | /* Define this if addresses of constant functions | |
1369 | shouldn't be put through pseudo regs where they can be cse'd. | |
1370 | Desirable on machines where ordinary constants are expensive | |
1371 | but a CALL with constant address is cheap. */ | |
1372 | #define NO_FUNCTION_CSE | |
1373 | ||
d969caf8 | 1374 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
6febd581 RK |
1375 | few bits. |
1376 | ||
1377 | The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED | |
1378 | have been dropped from the PowerPC architecture. */ | |
1379 | ||
1380 | #define SHIFT_COUNT_TRUNCATED TARGET_POWER ? 1 : 0 | |
f045b2c9 RS |
1381 | |
1382 | /* Use atexit for static constructors/destructors, instead of defining | |
1383 | our own exit function. */ | |
1384 | #define HAVE_ATEXIT | |
1385 | ||
1386 | /* Compute the cost of computing a constant rtl expression RTX | |
1387 | whose rtx-code is CODE. The body of this macro is a portion | |
1388 | of a switch statement. If the code is computed here, | |
1389 | return it with a return statement. Otherwise, break from the switch. | |
1390 | ||
1391 | On the RS/6000, if it is legal in the insn, it is free. So this | |
1392 | always returns 0. */ | |
1393 | ||
3bb22aee | 1394 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
f045b2c9 RS |
1395 | case CONST_INT: \ |
1396 | case CONST: \ | |
1397 | case LABEL_REF: \ | |
1398 | case SYMBOL_REF: \ | |
1399 | case CONST_DOUBLE: \ | |
1400 | return 0; | |
1401 | ||
1402 | /* Provide the costs of a rtl expression. This is in the body of a | |
1403 | switch on CODE. */ | |
1404 | ||
3bb22aee | 1405 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
f045b2c9 | 1406 | case MULT: \ |
bdfd4e31 RK |
1407 | switch (rs6000_cpu) \ |
1408 | { \ | |
1409 | case PROCESSOR_RIOS1: \ | |
1410 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
1411 | ? COSTS_N_INSNS (5) \ | |
1412 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
1413 | ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ | |
1414 | case PROCESSOR_RIOS2: \ | |
1415 | return COSTS_N_INSNS (2); \ | |
1416 | case PROCESSOR_PPC601: \ | |
1417 | case PROCESSOR_PPC603: \ | |
1418 | case PROCESSOR_PPC604: \ | |
1419 | case PROCESSOR_PPC620: \ | |
1420 | return COSTS_N_INSNS (5); \ | |
1421 | } \ | |
f045b2c9 RS |
1422 | case DIV: \ |
1423 | case MOD: \ | |
1424 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1425 | && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ | |
1426 | return COSTS_N_INSNS (2); \ | |
1427 | /* otherwise fall through to normal divide. */ \ | |
1428 | case UDIV: \ | |
1429 | case UMOD: \ | |
bdfd4e31 RK |
1430 | switch (rs6000_cpu) \ |
1431 | { \ | |
1432 | case PROCESSOR_RIOS1: \ | |
1433 | return COSTS_N_INSNS (19); \ | |
1434 | case PROCESSOR_RIOS2: \ | |
1435 | return COSTS_N_INSNS (13); \ | |
1436 | case PROCESSOR_PPC601: \ | |
1437 | case PROCESSOR_PPC603: \ | |
1438 | case PROCESSOR_PPC604: \ | |
1439 | case PROCESSOR_PPC620: \ | |
1440 | return COSTS_N_INSNS (36); \ | |
1441 | } \ | |
f045b2c9 RS |
1442 | case MEM: \ |
1443 | /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ | |
1444 | return 5; | |
1445 | ||
1446 | /* Compute the cost of an address. This is meant to approximate the size | |
1447 | and/or execution delay of an insn using that address. If the cost is | |
1448 | approximated by the RTL complexity, including CONST_COSTS above, as | |
1449 | is usually the case for CISC machines, this macro should not be defined. | |
1450 | For aggressively RISCy machines, only one insn format is allowed, so | |
1451 | this macro should be a constant. The value of this macro only matters | |
1452 | for valid addresses. | |
1453 | ||
1454 | For the RS/6000, everything is cost 0. */ | |
1455 | ||
1456 | #define ADDRESS_COST(RTX) 0 | |
1457 | ||
1458 | /* Adjust the length of an INSN. LENGTH is the currently-computed length and | |
1459 | should be adjusted to reflect any required changes. This macro is used when | |
1460 | there is some systematic length adjustment required that would be difficult | |
1461 | to express in the length attribute. */ | |
1462 | ||
1463 | /* #define ADJUST_INSN_LENGTH(X,LENGTH) */ | |
1464 | ||
1465 | /* Add any extra modes needed to represent the condition code. | |
1466 | ||
1467 | For the RS/6000, we need separate modes when unsigned (logical) comparisons | |
c5defebb RK |
1468 | are being done and we need a separate mode for floating-point. We also |
1469 | use a mode for the case when we are comparing the results of two | |
1470 | comparisons. */ | |
f045b2c9 | 1471 | |
c5defebb | 1472 | #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode |
f045b2c9 RS |
1473 | |
1474 | /* Define the names for the modes specified above. */ | |
c5defebb | 1475 | #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" |
f045b2c9 RS |
1476 | |
1477 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1478 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
c5defebb RK |
1479 | should be used. CCUNSmode should be used for unsigned comparisons. |
1480 | CCEQmode should be used when we are doing an inequality comparison on | |
1481 | the result of a comparison. CCmode should be used in all other cases. */ | |
1482 | ||
b565a316 | 1483 | #define SELECT_CC_MODE(OP,X,Y) \ |
f045b2c9 | 1484 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ |
c5defebb RK |
1485 | : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ |
1486 | : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ | |
1487 | ? CCEQmode : CCmode)) | |
f045b2c9 RS |
1488 | |
1489 | /* Define the information needed to generate branch and scc insns. This is | |
1490 | stored from the compare operation. Note that we can't use "rtx" here | |
1491 | since it hasn't been defined! */ | |
1492 | ||
1493 | extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; | |
1494 | extern int rs6000_compare_fp_p; | |
1495 | ||
1496 | /* Set to non-zero by "fix" operation to indicate that itrunc and | |
1497 | uitrunc must be defined. */ | |
1498 | ||
1499 | extern int rs6000_trunc_used; | |
9929b575 ILT |
1500 | |
1501 | /* Function names to call to do floating point truncation. */ | |
1502 | ||
1503 | #define RS6000_ITRUNC "itrunc" | |
1504 | #define RS6000_UITRUNC "uitrunc" | |
f045b2c9 RS |
1505 | \f |
1506 | /* Control the assembler format that we output. */ | |
1507 | ||
1508 | /* Output at beginning of assembler file. | |
1509 | ||
b4d6689b | 1510 | Initialize the section names for the RS/6000 at this point. |
fdaff8ba | 1511 | |
6355b140 | 1512 | Specify filename to assembler. |
3fc2151d | 1513 | |
b4d6689b | 1514 | We want to go into the TOC section so at least one .toc will be emitted. |
fdaff8ba | 1515 | Also, in order to output proper .bs/.es pairs, we need at least one static |
b4d6689b RK |
1516 | [RW] section emitted. |
1517 | ||
1518 | We then switch back to text to force the gcc2_compiled. label and the space | |
1519 | allocated after it (when profiling) into the text section. | |
1520 | ||
1521 | Finally, declare mcount when profiling to make the assembler happy. */ | |
f045b2c9 RS |
1522 | |
1523 | #define ASM_FILE_START(FILE) \ | |
1524 | { \ | |
fdaff8ba | 1525 | rs6000_gen_section_name (&xcoff_bss_section_name, \ |
f045b2c9 | 1526 | main_input_filename, ".bss_"); \ |
fdaff8ba | 1527 | rs6000_gen_section_name (&xcoff_private_data_section_name, \ |
f045b2c9 | 1528 | main_input_filename, ".rw_"); \ |
fdaff8ba | 1529 | rs6000_gen_section_name (&xcoff_read_only_section_name, \ |
f045b2c9 RS |
1530 | main_input_filename, ".ro_"); \ |
1531 | \ | |
6355b140 | 1532 | output_file_directive (FILE, main_input_filename); \ |
f045b2c9 | 1533 | toc_section (); \ |
fdaff8ba RS |
1534 | if (write_symbols != NO_DEBUG) \ |
1535 | private_data_section (); \ | |
b4d6689b RK |
1536 | text_section (); \ |
1537 | if (profile_flag) \ | |
1538 | fprintf (FILE, "\t.extern .mcount\n"); \ | |
f045b2c9 RS |
1539 | } |
1540 | ||
1541 | /* Output at end of assembler file. | |
1542 | ||
1543 | On the RS/6000, referencing data should automatically pull in text. */ | |
1544 | ||
1545 | #define ASM_FILE_END(FILE) \ | |
1546 | { \ | |
1547 | text_section (); \ | |
1548 | fprintf (FILE, "_section_.text:\n"); \ | |
1549 | data_section (); \ | |
1550 | fprintf (FILE, "\t.long _section_.text\n"); \ | |
1551 | } | |
1552 | ||
f045b2c9 RS |
1553 | /* We define this to prevent the name mangler from putting dollar signs into |
1554 | function names. */ | |
1555 | ||
1556 | #define NO_DOLLAR_IN_LABEL | |
1557 | ||
1558 | /* We define this to 0 so that gcc will never accept a dollar sign in a | |
1559 | variable name. This is needed because the AIX assembler will not accept | |
1560 | dollar signs. */ | |
1561 | ||
1562 | #define DOLLARS_IN_IDENTIFIERS 0 | |
1563 | ||
fdaff8ba RS |
1564 | /* Implicit library calls should use memcpy, not bcopy, etc. */ |
1565 | ||
1566 | #define TARGET_MEM_FUNCTIONS | |
1567 | ||
f045b2c9 RS |
1568 | /* Define the extra sections we need. We define three: one is the read-only |
1569 | data section which is used for constants. This is a csect whose name is | |
1570 | derived from the name of the input file. The second is for initialized | |
1571 | global variables. This is a csect whose name is that of the variable. | |
1572 | The third is the TOC. */ | |
1573 | ||
1574 | #define EXTRA_SECTIONS \ | |
1575 | read_only_data, private_data, read_only_private_data, toc, bss | |
1576 | ||
1577 | /* Define the name of our readonly data section. */ | |
1578 | ||
1579 | #define READONLY_DATA_SECTION read_only_data_section | |
1580 | ||
b4f892eb RK |
1581 | /* If we are referencing a function that is static or is known to be |
1582 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
1583 | that we can branch to this function without emitting a no-op after the | |
1584 | call. */ | |
1585 | ||
1586 | #define ENCODE_SECTION_INFO(DECL) \ | |
1587 | if (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1588 | && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ | |
1589 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; | |
1590 | ||
f045b2c9 RS |
1591 | /* Indicate that jump tables go in the text section. */ |
1592 | ||
1593 | #define JUMP_TABLES_IN_TEXT_SECTION | |
1594 | ||
1595 | /* Define the routines to implement these extra sections. */ | |
1596 | ||
1597 | #define EXTRA_SECTION_FUNCTIONS \ | |
1598 | \ | |
1599 | void \ | |
1600 | read_only_data_section () \ | |
1601 | { \ | |
1602 | if (in_section != read_only_data) \ | |
1603 | { \ | |
469adec3 | 1604 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 1605 | xcoff_read_only_section_name); \ |
f045b2c9 RS |
1606 | in_section = read_only_data; \ |
1607 | } \ | |
1608 | } \ | |
1609 | \ | |
1610 | void \ | |
1611 | private_data_section () \ | |
1612 | { \ | |
1613 | if (in_section != private_data) \ | |
1614 | { \ | |
469adec3 | 1615 | fprintf (asm_out_file, ".csect %s[RW]\n", \ |
fdaff8ba | 1616 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
1617 | \ |
1618 | in_section = private_data; \ | |
1619 | } \ | |
1620 | } \ | |
1621 | \ | |
1622 | void \ | |
1623 | read_only_private_data_section () \ | |
1624 | { \ | |
1625 | if (in_section != read_only_private_data) \ | |
1626 | { \ | |
f25359b5 | 1627 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 1628 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
1629 | in_section = read_only_private_data; \ |
1630 | } \ | |
1631 | } \ | |
1632 | \ | |
1633 | void \ | |
1634 | toc_section () \ | |
1635 | { \ | |
642a35f1 JW |
1636 | if (TARGET_MINIMAL_TOC) \ |
1637 | { \ | |
1638 | static int toc_initialized = 0; \ | |
1639 | \ | |
1640 | /* toc_section is always called at least once from ASM_FILE_START, \ | |
1641 | so this is guaranteed to always be defined once and only once \ | |
1642 | in each file. */ \ | |
1643 | if (! toc_initialized) \ | |
1644 | { \ | |
1645 | fprintf (asm_out_file, ".toc\nLCTOC..0:\n"); \ | |
1646 | fprintf (asm_out_file, "\t.tc toc_table[TC],toc_table[RW]\n"); \ | |
1647 | toc_initialized = 1; \ | |
1648 | } \ | |
f045b2c9 | 1649 | \ |
642a35f1 JW |
1650 | if (in_section != toc) \ |
1651 | fprintf (asm_out_file, ".csect toc_table[RW]\n"); \ | |
1652 | } \ | |
1653 | else \ | |
1654 | { \ | |
1655 | if (in_section != toc) \ | |
1656 | fprintf (asm_out_file, ".toc\n"); \ | |
1657 | } \ | |
f045b2c9 | 1658 | in_section = toc; \ |
fc3ffe83 | 1659 | } |
f045b2c9 RS |
1660 | |
1661 | /* This macro produces the initial definition of a function name. | |
1662 | On the RS/6000, we need to place an extra '.' in the function name and | |
1663 | output the function descriptor. | |
1664 | ||
1665 | The csect for the function will have already been created by the | |
1666 | `text_section' call previously done. We do have to go back to that | |
1667 | csect, however. */ | |
1668 | ||
fdaff8ba RS |
1669 | /* ??? What do the 16 and 044 in the .function line really mean? */ |
1670 | ||
f045b2c9 RS |
1671 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
1672 | { if (TREE_PUBLIC (DECL)) \ | |
1673 | { \ | |
1674 | fprintf (FILE, "\t.globl ."); \ | |
1675 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
fdaff8ba RS |
1676 | fprintf (FILE, "\n"); \ |
1677 | } \ | |
1678 | else if (write_symbols == XCOFF_DEBUG) \ | |
1679 | { \ | |
1680 | fprintf (FILE, "\t.lglobl ."); \ | |
1681 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
1682 | fprintf (FILE, "\n"); \ | |
f045b2c9 | 1683 | } \ |
f25359b5 | 1684 | fprintf (FILE, ".csect "); \ |
f045b2c9 RS |
1685 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
1686 | fprintf (FILE, "[DS]\n"); \ | |
1687 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
1688 | fprintf (FILE, ":\n"); \ | |
1689 | fprintf (FILE, "\t.long ."); \ | |
1690 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ | |
fdaff8ba | 1691 | fprintf (FILE, ", TOC[tc0], 0\n"); \ |
11117bb9 | 1692 | fprintf (FILE, ".csect .text[PR]\n."); \ |
f045b2c9 RS |
1693 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
1694 | fprintf (FILE, ":\n"); \ | |
fdaff8ba | 1695 | if (write_symbols == XCOFF_DEBUG) \ |
c2a47e48 | 1696 | xcoffout_declare_function (FILE, DECL, NAME); \ |
f045b2c9 RS |
1697 | } |
1698 | ||
1699 | /* Return non-zero if this entry is to be written into the constant pool | |
1700 | in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST | |
1701 | containing one of them. If -mfp-in-toc (the default), we also do | |
1702 | this for floating-point constants. We actually can only do this | |
1703 | if the FP formats of the target and host machines are the same, but | |
1704 | we can't check that since not every file that uses | |
1705 | GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */ | |
1706 | ||
1707 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \ | |
1708 | (GET_CODE (X) == SYMBOL_REF \ | |
1709 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
1710 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \ | |
1711 | || GET_CODE (X) == LABEL_REF \ | |
72847b95 RK |
1712 | || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \ |
1713 | && GET_CODE (X) == CONST_DOUBLE \ | |
f045b2c9 RS |
1714 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ |
1715 | && BITS_PER_WORD == HOST_BITS_PER_INT)) | |
1716 | ||
1717 | /* Select section for constant in constant pool. | |
1718 | ||
1719 | On RS/6000, all constants are in the private read-only data area. | |
1720 | However, if this is being placed in the TOC it must be output as a | |
1721 | toc entry. */ | |
1722 | ||
1723 | #define SELECT_RTX_SECTION(MODE, X) \ | |
1724 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
1725 | toc_section (); \ | |
1726 | else \ | |
1727 | read_only_private_data_section (); \ | |
1728 | } | |
1729 | ||
1730 | /* Macro to output a special constant pool entry. Go to WIN if we output | |
1731 | it. Otherwise, it is written the usual way. | |
1732 | ||
1733 | On the RS/6000, toc entries are handled this way. */ | |
1734 | ||
1735 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ | |
1736 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
1737 | { \ | |
1738 | output_toc (FILE, X, LABELNO); \ | |
1739 | goto WIN; \ | |
1740 | } \ | |
1741 | } | |
1742 | ||
1743 | /* Select the section for an initialized data object. | |
1744 | ||
1745 | On the RS/6000, we have a special section for all variables except those | |
1746 | that are static. */ | |
1747 | ||
1748 | #define SELECT_SECTION(EXP,RELOC) \ | |
1749 | { \ | |
1750 | if ((TREE_READONLY (EXP) \ | |
1751 | || (TREE_CODE (EXP) == STRING_CST \ | |
1752 | && !flag_writable_strings)) \ | |
1753 | && ! TREE_THIS_VOLATILE (EXP) \ | |
1754 | && ! (RELOC)) \ | |
1755 | { \ | |
1756 | if (TREE_PUBLIC (EXP)) \ | |
1757 | read_only_data_section (); \ | |
1758 | else \ | |
1759 | read_only_private_data_section (); \ | |
1760 | } \ | |
1761 | else \ | |
1762 | { \ | |
1763 | if (TREE_PUBLIC (EXP)) \ | |
1764 | data_section (); \ | |
1765 | else \ | |
1766 | private_data_section (); \ | |
1767 | } \ | |
1768 | } | |
1769 | ||
1770 | /* This outputs NAME to FILE up to the first null or '['. */ | |
1771 | ||
1772 | #define RS6000_OUTPUT_BASENAME(FILE, NAME) \ | |
1773 | if ((NAME)[0] == '*') \ | |
1774 | assemble_name (FILE, NAME); \ | |
1775 | else \ | |
1776 | { \ | |
1777 | char *_p; \ | |
1778 | for (_p = (NAME); *_p && *_p != '['; _p++) \ | |
1779 | fputc (*_p, FILE); \ | |
1780 | } | |
1781 | ||
1782 | /* Output something to declare an external symbol to the assembler. Most | |
1783 | assemblers don't need this. | |
1784 | ||
1785 | If we haven't already, add "[RW]" (or "[DS]" for a function) to the | |
1786 | name. Normally we write this out along with the name. In the few cases | |
1787 | where we can't, it gets stripped off. */ | |
1788 | ||
1789 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
1790 | { rtx _symref = XEXP (DECL_RTL (DECL), 0); \ | |
1791 | if ((TREE_CODE (DECL) == VAR_DECL \ | |
1792 | || TREE_CODE (DECL) == FUNCTION_DECL) \ | |
1793 | && (NAME)[0] != '*' \ | |
1794 | && (NAME)[strlen (NAME) - 1] != ']') \ | |
1795 | { \ | |
1796 | char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \ | |
1797 | strcpy (_name, XSTR (_symref, 0)); \ | |
1798 | strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \ | |
1799 | XSTR (_symref, 0) = _name; \ | |
1800 | } \ | |
1801 | fprintf (FILE, "\t.extern "); \ | |
1802 | assemble_name (FILE, XSTR (_symref, 0)); \ | |
1803 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
1804 | { \ | |
1805 | fprintf (FILE, "\n\t.extern ."); \ | |
1806 | RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \ | |
1807 | } \ | |
1808 | fprintf (FILE, "\n"); \ | |
1809 | } | |
1810 | ||
1811 | /* Similar, but for libcall. We only have to worry about the function name, | |
1812 | not that of the descriptor. */ | |
1813 | ||
1814 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ | |
1815 | { fprintf (FILE, "\t.extern ."); \ | |
1816 | assemble_name (FILE, XSTR (FUN, 0)); \ | |
1817 | fprintf (FILE, "\n"); \ | |
1818 | } | |
1819 | ||
1820 | /* Output to assembler file text saying following lines | |
1821 | may contain character constants, extra white space, comments, etc. */ | |
1822 | ||
1823 | #define ASM_APP_ON "" | |
1824 | ||
1825 | /* Output to assembler file text saying following lines | |
1826 | no longer contain unusual constructs. */ | |
1827 | ||
1828 | #define ASM_APP_OFF "" | |
1829 | ||
1830 | /* Output before instructions. */ | |
1831 | ||
11117bb9 | 1832 | #define TEXT_SECTION_ASM_OP ".csect .text[PR]" |
f045b2c9 RS |
1833 | |
1834 | /* Output before writable data. */ | |
1835 | ||
fdaff8ba | 1836 | #define DATA_SECTION_ASM_OP ".csect .data[RW]" |
f045b2c9 RS |
1837 | |
1838 | /* How to refer to registers in assembler output. | |
1839 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1840 | ||
1841 | #define REGISTER_NAMES \ | |
1842 | {"0", "1", "2", "3", "4", "5", "6", "7", \ | |
1843 | "8", "9", "10", "11", "12", "13", "14", "15", \ | |
1844 | "16", "17", "18", "19", "20", "21", "22", "23", \ | |
1845 | "24", "25", "26", "27", "28", "29", "30", "31", \ | |
1846 | "0", "1", "2", "3", "4", "5", "6", "7", \ | |
1847 | "8", "9", "10", "11", "12", "13", "14", "15", \ | |
1848 | "16", "17", "18", "19", "20", "21", "22", "23", \ | |
1849 | "24", "25", "26", "27", "28", "29", "30", "31", \ | |
1850 | "mq", "lr", "ctr", "ap", \ | |
1851 | "0", "1", "2", "3", "4", "5", "6", "7" } | |
1852 | ||
1853 | /* Table of additional register names to use in user input. */ | |
1854 | ||
1855 | #define ADDITIONAL_REGISTER_NAMES \ | |
1856 | {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \ | |
1857 | "r4", 4, "r5", 5, "r6", 6, "r7", 7, \ | |
1858 | "r8", 8, "r9", 9, "r10", 10, "r11", 11, \ | |
1859 | "r12", 12, "r13", 13, "r14", 14, "r15", 15, \ | |
1860 | "r16", 16, "r17", 17, "r18", 18, "r19", 19, \ | |
1861 | "r20", 20, "r21", 21, "r22", 22, "r23", 23, \ | |
1862 | "r24", 24, "r25", 25, "r26", 26, "r27", 27, \ | |
1863 | "r28", 28, "r29", 29, "r30", 30, "r31", 31, \ | |
1864 | "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \ | |
1865 | "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \ | |
1866 | "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \ | |
1867 | "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \ | |
1868 | "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \ | |
1869 | "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \ | |
1870 | "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \ | |
1871 | "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \ | |
1872 | /* no additional names for: mq, lr, ctr, ap */ \ | |
1873 | "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \ | |
fc3ffe83 RK |
1874 | "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \ |
1875 | "cc", 68 } | |
f045b2c9 RS |
1876 | |
1877 | /* How to renumber registers for dbx and gdb. */ | |
1878 | ||
1879 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
1880 | ||
0da40b09 RK |
1881 | /* Text to write out after a CALL that may be replaced by glue code by |
1882 | the loader. This depends on the AIX version. */ | |
1883 | #define RS6000_CALL_GLUE "cror 31,31,31" | |
11117bb9 | 1884 | |
f045b2c9 RS |
1885 | /* This is how to output the definition of a user-level label named NAME, |
1886 | such as the label on a static function or variable NAME. */ | |
1887 | ||
1888 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1889 | do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1890 | ||
1891 | /* This is how to output a command to make the user-level label named NAME | |
1892 | defined for reference from other files. */ | |
1893 | ||
1894 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1895 | do { fputs ("\t.globl ", FILE); \ | |
1896 | RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1897 | ||
1898 | /* This is how to output a reference to a user-level label named NAME. | |
1899 | `assemble_name' uses this. */ | |
1900 | ||
1901 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
1902 | fprintf (FILE, NAME) | |
1903 | ||
1904 | /* This is how to output an internal numbered label where | |
1905 | PREFIX is the class of label and NUM is the number within the class. */ | |
1906 | ||
1907 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
1908 | fprintf (FILE, "%s..%d:\n", PREFIX, NUM) | |
1909 | ||
3daf36a4 ILT |
1910 | /* This is how to output an internal label prefix. rs6000.c uses this |
1911 | when generating traceback tables. */ | |
1912 | ||
1913 | #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ | |
1914 | fprintf (FILE, "%s..", PREFIX) | |
1915 | ||
f045b2c9 RS |
1916 | /* This is how to output a label for a jump table. Arguments are the same as |
1917 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
1918 | passed. */ | |
1919 | ||
1920 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
1921 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
1922 | ||
1923 | /* This is how to store into the string LABEL | |
1924 | the symbol_ref name of an internal numbered label where | |
1925 | PREFIX is the class of label and NUM is the number within the class. | |
1926 | This is suitable for output with `assemble_name'. */ | |
1927 | ||
1928 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1929 | sprintf (LABEL, "%s..%d", PREFIX, NUM) | |
1930 | ||
1931 | /* This is how to output an assembler line defining a `double' constant. */ | |
1932 | ||
a5b1eb34 RS |
1933 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ |
1934 | { \ | |
1935 | if (REAL_VALUE_ISINF (VALUE) \ | |
1936 | || REAL_VALUE_ISNAN (VALUE) \ | |
1937 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
1938 | { \ | |
1939 | long t[2]; \ | |
1940 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
1941 | fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \ | |
1942 | t[0] & 0xffffffff, t[1] & 0xffffffff); \ | |
1943 | } \ | |
1944 | else \ | |
1945 | { \ | |
1946 | char str[30]; \ | |
1947 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ | |
1948 | fprintf (FILE, "\t.double 0d%s\n", str); \ | |
1949 | } \ | |
1950 | } | |
f045b2c9 RS |
1951 | |
1952 | /* This is how to output an assembler line defining a `float' constant. */ | |
1953 | ||
a5b1eb34 RS |
1954 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ |
1955 | { \ | |
1956 | if (REAL_VALUE_ISINF (VALUE) \ | |
1957 | || REAL_VALUE_ISNAN (VALUE) \ | |
1958 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
1959 | { \ | |
1960 | long t; \ | |
1961 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
1962 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
1963 | } \ | |
1964 | else \ | |
1965 | { \ | |
1966 | char str[30]; \ | |
1967 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
1968 | fprintf (FILE, "\t.float 0d%s\n", str); \ | |
1969 | } \ | |
1970 | } | |
f045b2c9 RS |
1971 | |
1972 | /* This is how to output an assembler line defining an `int' constant. */ | |
1973 | ||
1974 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
1975 | ( fprintf (FILE, "\t.long "), \ | |
1976 | output_addr_const (FILE, (VALUE)), \ | |
1977 | fprintf (FILE, "\n")) | |
1978 | ||
1979 | /* Likewise for `char' and `short' constants. */ | |
1980 | ||
1981 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1982 | ( fprintf (FILE, "\t.short "), \ | |
1983 | output_addr_const (FILE, (VALUE)), \ | |
1984 | fprintf (FILE, "\n")) | |
1985 | ||
1986 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1987 | ( fprintf (FILE, "\t.byte "), \ | |
1988 | output_addr_const (FILE, (VALUE)), \ | |
1989 | fprintf (FILE, "\n")) | |
1990 | ||
1991 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1992 | ||
1993 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1994 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
1995 | ||
1996 | /* This is how to output an assembler line to define N characters starting | |
1997 | at P to FILE. */ | |
1998 | ||
1999 | #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N)) | |
2000 | ||
2001 | /* This is how to output code to push a register on the stack. | |
2002 | It need not be very fast code. */ | |
2003 | ||
2004 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
6febd581 | 2005 | asm_fprintf (FILE, "\{tstu|stwu} %s,-4(r1)\n", reg_names[REGNO]); |
f045b2c9 RS |
2006 | |
2007 | /* This is how to output an insn to pop a register from the stack. | |
2008 | It need not be very fast code. */ | |
2009 | ||
2010 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
6febd581 RK |
2011 | asm_fprintf (FILE, "\t{l|lwz} %s,0(r1)\n\t{ai|addic} r1,r1,4\n", \ |
2012 | reg_names[REGNO]) | |
f045b2c9 RS |
2013 | |
2014 | /* This is how to output an element of a case-vector that is absolute. | |
2015 | (RS/6000 does not use such vectors, but we must define this macro | |
2016 | anyway.) */ | |
2017 | ||
3daf36a4 ILT |
2018 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ |
2019 | do { char buf[100]; \ | |
2020 | fprintf (FILE, "\t.long "); \ | |
2021 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ | |
2022 | assemble_name (FILE, buf); \ | |
2023 | fprintf (FILE, "\n"); \ | |
2024 | } while (0) | |
f045b2c9 RS |
2025 | |
2026 | /* This is how to output an element of a case-vector that is relative. */ | |
2027 | ||
2028 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
3daf36a4 ILT |
2029 | do { char buf[100]; \ |
2030 | fprintf (FILE, "\t.long "); \ | |
2031 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ | |
2032 | assemble_name (FILE, buf); \ | |
2033 | fprintf (FILE, "-"); \ | |
2034 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ | |
2035 | assemble_name (FILE, buf); \ | |
2036 | fprintf (FILE, "\n"); \ | |
2037 | } while (0) | |
f045b2c9 RS |
2038 | |
2039 | /* This is how to output an assembler line | |
2040 | that says to advance the location counter | |
2041 | to a multiple of 2**LOG bytes. */ | |
2042 | ||
2043 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
2044 | if ((LOG) != 0) \ | |
2045 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
2046 | ||
2047 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
2048 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
2049 | ||
2050 | /* This says how to output an assembler line | |
2051 | to define a global common symbol. */ | |
2052 | ||
2053 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
fc3ffe83 | 2054 | do { fputs (".comm ", (FILE)); \ |
f045b2c9 RS |
2055 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
2056 | fprintf ((FILE), ",%d\n", (SIZE)); } while (0) | |
2057 | ||
2058 | /* This says how to output an assembler line | |
2059 | to define a local common symbol. */ | |
2060 | ||
2061 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
fc3ffe83 | 2062 | do { fputs (".lcomm ", (FILE)); \ |
f045b2c9 | 2063 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
fdaff8ba | 2064 | fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \ |
f045b2c9 RS |
2065 | } while (0) |
2066 | ||
2067 | /* Store in OUTPUT a string (made with alloca) containing | |
2068 | an assembler-name for a local static variable named NAME. | |
2069 | LABELNO is an integer which is different for each call. */ | |
2070 | ||
2071 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
2072 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
2073 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
2074 | ||
2075 | /* Define the parentheses used to group arithmetic operations | |
2076 | in assembler code. */ | |
2077 | ||
2078 | #define ASM_OPEN_PAREN "(" | |
2079 | #define ASM_CLOSE_PAREN ")" | |
2080 | ||
2081 | /* Define results of standard character escape sequences. */ | |
2082 | #define TARGET_BELL 007 | |
2083 | #define TARGET_BS 010 | |
2084 | #define TARGET_TAB 011 | |
2085 | #define TARGET_NEWLINE 012 | |
2086 | #define TARGET_VT 013 | |
2087 | #define TARGET_FF 014 | |
2088 | #define TARGET_CR 015 | |
2089 | ||
2090 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
2091 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
2092 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
2093 | ||
2094 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
2095 | ||
2096 | /* Define which CODE values are valid. */ | |
2097 | ||
11117bb9 | 2098 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '.') |
f045b2c9 RS |
2099 | |
2100 | /* Print a memory address as an operand to reference that memory location. */ | |
2101 | ||
2102 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
2103 | ||
2104 | /* Define the codes that are matched by predicates in rs6000.c. */ | |
2105 | ||
2106 | #define PREDICATE_CODES \ | |
2107 | {"short_cint_operand", {CONST_INT}}, \ | |
2108 | {"u_short_cint_operand", {CONST_INT}}, \ | |
f357808b | 2109 | {"non_short_cint_operand", {CONST_INT}}, \ |
cd2b37d9 | 2110 | {"gpc_reg_operand", {SUBREG, REG}}, \ |
f045b2c9 RS |
2111 | {"cc_reg_operand", {SUBREG, REG}}, \ |
2112 | {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2113 | {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2114 | {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ | |
2115 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
2116 | {"easy_fp_constant", {CONST_DOUBLE}}, \ | |
2117 | {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ | |
2118 | {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \ | |
2119 | {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ | |
2120 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ | |
f357808b | 2121 | {"non_add_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2122 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 2123 | {"non_and_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 2124 | {"logical_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 2125 | {"non_logical_cint_operand", {CONST_INT}}, \ |
f045b2c9 RS |
2126 | {"mask_operand", {CONST_INT}}, \ |
2127 | {"call_operand", {SYMBOL_REF, REG}}, \ | |
f8634644 | 2128 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
f045b2c9 | 2129 | {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \ |
f8634644 RK |
2130 | {"load_multiple_operation", {PARALLEL}}, \ |
2131 | {"store_multiple_operation", {PARALLEL}}, \ | |
2132 | {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
e477bbc7 | 2133 | GT, LEU, LTU, GEU, GTU}}, \ |
f8634644 | 2134 | {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ |
e477bbc7 | 2135 | GT, LEU, LTU, GEU, GTU}}, |