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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
34f94b1f | 2 | Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
9878760c RK |
31 | #include "insn-attr.h" |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
34 | #include "expr.h" | |
35 | #include "obstack.h" | |
9b30bae2 | 36 | #include "tree.h" |
2a430ec1 | 37 | #include "except.h" |
a7df97e6 | 38 | #include "function.h" |
296b8152 KG |
39 | #include "output.h" |
40 | #include "toplev.h" | |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
57 | /* switch name, tune arch */ | |
5d6426e0 | 58 | { (char *)0, "--with-cpu=", 1, 1 }, |
8e3f41e7 MM |
59 | { (char *)0, "-mcpu=", 1, 1 }, |
60 | { (char *)0, "-mtune=", 1, 0 }, | |
61 | }; | |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
87 | char *rs6000_abi_name = RS6000_ABI_NAME; | |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
93 | char *rs6000_sdata_name = (char *)0; | |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
38c1f2d7 MM |
107 | /* Debug flags */ |
108 | char *rs6000_debug_name; | |
109 | int rs6000_debug_stack; /* debug stack applications */ | |
110 | int rs6000_debug_arg; /* debug argument handling */ | |
111 | ||
112 | /* Flag to say the TOC is initialized */ | |
113 | int toc_initialized; | |
114 | ||
c81bebd7 MM |
115 | \f |
116 | /* Default register names. */ | |
117 | char rs6000_reg_names[][8] = | |
118 | { | |
802a0058 MM |
119 | "0", "1", "2", "3", "4", "5", "6", "7", |
120 | "8", "9", "10", "11", "12", "13", "14", "15", | |
121 | "16", "17", "18", "19", "20", "21", "22", "23", | |
122 | "24", "25", "26", "27", "28", "29", "30", "31", | |
123 | "0", "1", "2", "3", "4", "5", "6", "7", | |
124 | "8", "9", "10", "11", "12", "13", "14", "15", | |
125 | "16", "17", "18", "19", "20", "21", "22", "23", | |
126 | "24", "25", "26", "27", "28", "29", "30", "31", | |
127 | "mq", "lr", "ctr","ap", | |
128 | "0", "1", "2", "3", "4", "5", "6", "7", | |
129 | "fpmem" | |
c81bebd7 MM |
130 | }; |
131 | ||
132 | #ifdef TARGET_REGNAMES | |
133 | static char alt_reg_names[][8] = | |
134 | { | |
802a0058 MM |
135 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
136 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
137 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
138 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
139 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
140 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
141 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
142 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
143 | "mq", "lr", "ctr", "ap", | |
144 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
145 | "fpmem" | |
c81bebd7 MM |
146 | }; |
147 | #endif | |
9878760c | 148 | \f |
daf11973 MM |
149 | #ifndef MASK_STRICT_ALIGN |
150 | #define MASK_STRICT_ALIGN 0 | |
151 | #endif | |
152 | ||
5248c961 RK |
153 | /* Override command line options. Mostly we process the processor |
154 | type and sometimes adjust other TARGET_ options. */ | |
155 | ||
156 | void | |
8e3f41e7 MM |
157 | rs6000_override_options (default_cpu) |
158 | char *default_cpu; | |
5248c961 | 159 | { |
c4d38ccb | 160 | size_t i, j; |
8e3f41e7 | 161 | struct rs6000_cpu_select *ptr; |
5248c961 | 162 | |
85638c0d RK |
163 | /* Simplify the entries below by making a mask for any POWER |
164 | variant and any PowerPC variant. */ | |
165 | ||
938937d8 | 166 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
167 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
168 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
169 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 170 | |
5248c961 RK |
171 | static struct ptt |
172 | { | |
173 | char *name; /* Canonical processor name. */ | |
174 | enum processor_type processor; /* Processor type enum value. */ | |
175 | int target_enable; /* Target flags to enable. */ | |
176 | int target_disable; /* Target flags to disable. */ | |
177 | } processor_target_table[] | |
cf27b467 MM |
178 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
179 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 180 | {"power", PROCESSOR_POWER, |
938937d8 | 181 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 182 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
183 | {"power2", PROCESSOR_POWER, |
184 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
185 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
186 | {"powerpc", PROCESSOR_POWERPC, |
187 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 188 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
db7f1e43 | 189 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 190 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
191 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
192 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 193 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
194 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
195 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 196 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
197 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
198 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 199 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
200 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
201 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 202 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 203 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
a3a1dbf6 MM |
204 | {"401", PROCESSOR_PPC403, |
205 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
206 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
49a0b204 | 207 | {"403", PROCESSOR_PPC403, |
daf11973 | 208 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 209 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
210 | {"505", PROCESSOR_MPCCORE, |
211 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
212 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 213 | {"601", PROCESSOR_PPC601, |
938937d8 | 214 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 215 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 216 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
217 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
218 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 219 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
220 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
221 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
222 | {"603e", PROCESSOR_PPC603, |
223 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
224 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b5370a88 | 225 | {"ec603e", PROCESSOR_PPC603, |
a3a1dbf6 MM |
226 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, |
227 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 228 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
229 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
230 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
cac8ce95 | 231 | {"604e", PROCESSOR_PPC604e, |
07e6159a MM |
232 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
233 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 234 | {"620", PROCESSOR_PPC620, |
68c49ffa | 235 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
a260abc9 | 236 | POWER_MASKS | MASK_PPC_GPOPT}, |
bef84347 VM |
237 | {"740", PROCESSOR_PPC750, |
238 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
239 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
240 | {"750", PROCESSOR_PPC750, | |
241 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
242 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
243 | {"801", PROCESSOR_MPCCORE, |
244 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
245 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
246 | {"821", PROCESSOR_MPCCORE, |
247 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
248 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
249 | {"823", PROCESSOR_MPCCORE, |
250 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
251 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
252 | {"860", PROCESSOR_MPCCORE, |
253 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
254 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 255 | |
c4d38ccb | 256 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 257 | |
8a61d227 | 258 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 259 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 260 | |
5248c961 RK |
261 | profile_block_flag = 0; |
262 | ||
263 | /* Identify the processor type */ | |
8e3f41e7 MM |
264 | rs6000_select[0].string = default_cpu; |
265 | rs6000_cpu = PROCESSOR_DEFAULT; | |
8e3f41e7 MM |
266 | |
267 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 268 | { |
8e3f41e7 MM |
269 | ptr = &rs6000_select[i]; |
270 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 271 | { |
8e3f41e7 MM |
272 | for (j = 0; j < ptt_size; j++) |
273 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
274 | { | |
275 | if (ptr->set_tune_p) | |
276 | rs6000_cpu = processor_target_table[j].processor; | |
277 | ||
278 | if (ptr->set_arch_p) | |
279 | { | |
280 | target_flags |= processor_target_table[j].target_enable; | |
281 | target_flags &= ~processor_target_table[j].target_disable; | |
282 | } | |
283 | break; | |
284 | } | |
285 | ||
286 | if (i == ptt_size) | |
287 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
288 | } |
289 | } | |
8a61d227 | 290 | |
ef792183 MM |
291 | /* If we are optimizing big endian systems for space, use the |
292 | store multiple instructions. */ | |
293 | if (BYTES_BIG_ENDIAN && optimize_size) | |
294 | target_flags |= MASK_MULTIPLE; | |
295 | ||
8a61d227 MM |
296 | /* If -mmultiple or -mno-multiple was explicitly used, don't |
297 | override with the processor default */ | |
298 | if (TARGET_MULTIPLE_SET) | |
299 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 300 | |
938937d8 MM |
301 | /* If -mstring or -mno-string was explicitly used, don't |
302 | override with the processor default */ | |
303 | if (TARGET_STRING_SET) | |
1f5515bf | 304 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 305 | |
bef84347 VM |
306 | /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu |
307 | is a 750, because the hardware doesn't support the instructions used in | |
308 | little endian mode, and causes an alignment trap. The 750 does not cause | |
309 | an alignment trap (except when the target is unaligned). */ | |
310 | ||
311 | if (!BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750) | |
7e69e155 MM |
312 | { |
313 | if (TARGET_MULTIPLE) | |
314 | { | |
315 | target_flags &= ~MASK_MULTIPLE; | |
316 | if (TARGET_MULTIPLE_SET) | |
317 | warning ("-mmultiple is not supported on little endian systems"); | |
318 | } | |
319 | ||
320 | if (TARGET_STRING) | |
321 | { | |
322 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
323 | if (TARGET_STRING_SET) |
324 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
325 | } |
326 | } | |
3933e0e1 | 327 | |
a260abc9 DE |
328 | if (flag_pic && (DEFAULT_ABI == ABI_AIX)) |
329 | { | |
330 | warning ("-f%s ignored for AIX (all code is position independent)", | |
331 | (flag_pic > 1) ? "PIC" : "pic"); | |
332 | flag_pic = 0; | |
333 | } | |
334 | ||
38c1f2d7 MM |
335 | /* Set debug flags */ |
336 | if (rs6000_debug_name) | |
337 | { | |
338 | if (!strcmp (rs6000_debug_name, "all")) | |
339 | rs6000_debug_stack = rs6000_debug_arg = 1; | |
340 | else if (!strcmp (rs6000_debug_name, "stack")) | |
341 | rs6000_debug_stack = 1; | |
342 | else if (!strcmp (rs6000_debug_name, "arg")) | |
343 | rs6000_debug_arg = 1; | |
344 | else | |
345 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
346 | } | |
347 | ||
c81bebd7 MM |
348 | #ifdef TARGET_REGNAMES |
349 | /* If the user desires alternate register names, copy in the alternate names | |
350 | now. */ | |
351 | if (TARGET_REGNAMES) | |
352 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names)); | |
353 | #endif | |
354 | ||
3933e0e1 MM |
355 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
356 | SUBTARGET_OVERRIDE_OPTIONS; | |
357 | #endif | |
5248c961 | 358 | } |
5accd822 DE |
359 | |
360 | void | |
361 | optimization_options (level, size) | |
362 | int level; | |
363 | int size ATTRIBUTE_UNUSED; | |
364 | { | |
fca812fa | 365 | #ifdef HAVE_decrement_and_branch_on_count |
5accd822 DE |
366 | /* When optimizing, enable use of BCT instruction. */ |
367 | if (level >= 1) | |
368 | flag_branch_on_count_reg = 1; | |
369 | #endif | |
5accd822 | 370 | } |
3cfa4909 MM |
371 | \f |
372 | /* Do anything needed at the start of the asm file. */ | |
373 | ||
374 | void | |
375 | rs6000_file_start (file, default_cpu) | |
376 | FILE *file; | |
377 | char *default_cpu; | |
378 | { | |
c4d38ccb | 379 | size_t i; |
3cfa4909 MM |
380 | char buffer[80]; |
381 | char *start = buffer; | |
382 | struct rs6000_cpu_select *ptr; | |
383 | ||
384 | if (flag_verbose_asm) | |
385 | { | |
386 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
387 | rs6000_select[0].string = default_cpu; | |
388 | ||
389 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
390 | { | |
391 | ptr = &rs6000_select[i]; | |
392 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
393 | { | |
394 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
395 | start = ""; | |
396 | } | |
397 | } | |
398 | ||
399 | #ifdef USING_SVR4_H | |
400 | switch (rs6000_sdata) | |
401 | { | |
402 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
403 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
404 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
405 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
406 | } | |
407 | ||
408 | if (rs6000_sdata && g_switch_value) | |
409 | { | |
410 | fprintf (file, "%s -G %d", start, g_switch_value); | |
411 | start = ""; | |
412 | } | |
413 | #endif | |
414 | ||
415 | if (*start == '\0') | |
416 | fputs ("\n", file); | |
417 | } | |
418 | } | |
419 | ||
24d304eb RK |
420 | \f |
421 | /* Create a CONST_DOUBLE from a string. */ | |
422 | ||
423 | struct rtx_def * | |
424 | rs6000_float_const (string, mode) | |
425 | char *string; | |
426 | enum machine_mode mode; | |
427 | { | |
428 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
429 | return immed_real_const_1 (value, mode); | |
430 | } | |
5248c961 | 431 | \f |
9878760c RK |
432 | /* Return non-zero if this function is known to have a null epilogue. */ |
433 | ||
434 | int | |
435 | direct_return () | |
436 | { | |
4697a36c MM |
437 | if (reload_completed) |
438 | { | |
439 | rs6000_stack_t *info = rs6000_stack_info (); | |
440 | ||
441 | if (info->first_gp_reg_save == 32 | |
442 | && info->first_fp_reg_save == 64 | |
443 | && !info->lr_save_p | |
1b4a2731 | 444 | && !info->cr_save_p |
4697a36c MM |
445 | && !info->push_p) |
446 | return 1; | |
447 | } | |
448 | ||
449 | return 0; | |
9878760c RK |
450 | } |
451 | ||
452 | /* Returns 1 always. */ | |
453 | ||
454 | int | |
455 | any_operand (op, mode) | |
296b8152 KG |
456 | register rtx op ATTRIBUTE_UNUSED; |
457 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c RK |
458 | { |
459 | return 1; | |
460 | } | |
461 | ||
b6c9286a | 462 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
463 | int |
464 | count_register_operand(op, mode) | |
b6c9286a | 465 | register rtx op; |
296b8152 | 466 | enum machine_mode mode ATTRIBUTE_UNUSED; |
b6c9286a MM |
467 | { |
468 | if (GET_CODE (op) != REG) | |
469 | return 0; | |
470 | ||
471 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
472 | return 1; | |
473 | ||
474 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
475 | return 1; | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
802a0058 MM |
480 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
481 | as a register. */ | |
38c1f2d7 MM |
482 | int |
483 | fpmem_operand(op, mode) | |
802a0058 | 484 | register rtx op; |
296b8152 | 485 | enum machine_mode mode ATTRIBUTE_UNUSED; |
802a0058 MM |
486 | { |
487 | if (GET_CODE (op) != REG) | |
488 | return 0; | |
489 | ||
490 | if (FPMEM_REGNO_P (REGNO (op))) | |
491 | return 1; | |
492 | ||
493 | #if 0 | |
494 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
495 | return 1; | |
496 | #endif | |
497 | ||
498 | return 0; | |
499 | } | |
500 | ||
9878760c RK |
501 | /* Return 1 if OP is a constant that can fit in a D field. */ |
502 | ||
503 | int | |
504 | short_cint_operand (op, mode) | |
505 | register rtx op; | |
296b8152 | 506 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 507 | { |
e675f625 | 508 | return ((GET_CODE (op) == CONST_INT |
34792e82 | 509 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000)); |
9878760c RK |
510 | } |
511 | ||
512 | /* Similar for a unsigned D field. */ | |
513 | ||
514 | int | |
515 | u_short_cint_operand (op, mode) | |
516 | register rtx op; | |
296b8152 | 517 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 518 | { |
19684119 DE |
519 | return (GET_CODE (op) == CONST_INT |
520 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0); | |
9878760c RK |
521 | } |
522 | ||
dcfedcd0 RK |
523 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
524 | ||
525 | int | |
526 | non_short_cint_operand (op, mode) | |
527 | register rtx op; | |
296b8152 | 528 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
529 | { |
530 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 531 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
532 | } |
533 | ||
9878760c RK |
534 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
535 | ctr, or lr). */ | |
536 | ||
537 | int | |
cd2b37d9 | 538 | gpc_reg_operand (op, mode) |
9878760c RK |
539 | register rtx op; |
540 | enum machine_mode mode; | |
541 | { | |
542 | return (register_operand (op, mode) | |
802a0058 MM |
543 | && (GET_CODE (op) != REG |
544 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
545 | || REGNO (op) < 64)); | |
9878760c RK |
546 | } |
547 | ||
548 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
549 | CR field. */ | |
550 | ||
551 | int | |
552 | cc_reg_operand (op, mode) | |
553 | register rtx op; | |
554 | enum machine_mode mode; | |
555 | { | |
556 | return (register_operand (op, mode) | |
557 | && (GET_CODE (op) != REG | |
558 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
559 | || CR_REGNO_P (REGNO (op)))); | |
560 | } | |
561 | ||
562 | /* Returns 1 if OP is either a constant integer valid for a D-field or a | |
563 | non-special register. If a register, it must be in the proper mode unless | |
564 | MODE is VOIDmode. */ | |
565 | ||
566 | int | |
567 | reg_or_short_operand (op, mode) | |
568 | register rtx op; | |
569 | enum machine_mode mode; | |
570 | { | |
f5a28898 | 571 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
572 | } |
573 | ||
574 | /* Similar, except check if the negation of the constant would be valid for | |
575 | a D-field. */ | |
576 | ||
577 | int | |
578 | reg_or_neg_short_operand (op, mode) | |
579 | register rtx op; | |
580 | enum machine_mode mode; | |
581 | { | |
582 | if (GET_CODE (op) == CONST_INT) | |
583 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
584 | ||
cd2b37d9 | 585 | return gpc_reg_operand (op, mode); |
9878760c RK |
586 | } |
587 | ||
588 | /* Return 1 if the operand is either a register or an integer whose high-order | |
589 | 16 bits are zero. */ | |
590 | ||
591 | int | |
592 | reg_or_u_short_operand (op, mode) | |
593 | register rtx op; | |
594 | enum machine_mode mode; | |
595 | { | |
e675f625 | 596 | return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
597 | } |
598 | ||
599 | /* Return 1 is the operand is either a non-special register or ANY | |
600 | constant integer. */ | |
601 | ||
602 | int | |
603 | reg_or_cint_operand (op, mode) | |
604 | register rtx op; | |
605 | enum machine_mode mode; | |
606 | { | |
e675f625 | 607 | return (GET_CODE (op) == CONST_INT |
e675f625 | 608 | || gpc_reg_operand (op, mode)); |
9878760c RK |
609 | } |
610 | ||
766a866c MM |
611 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
612 | ||
613 | int | |
614 | got_operand (op, mode) | |
615 | register rtx op; | |
296b8152 | 616 | enum machine_mode mode ATTRIBUTE_UNUSED; |
766a866c MM |
617 | { |
618 | return (GET_CODE (op) == SYMBOL_REF | |
619 | || GET_CODE (op) == CONST | |
620 | || GET_CODE (op) == LABEL_REF); | |
621 | } | |
622 | ||
38c1f2d7 MM |
623 | /* Return 1 if the operand is a simple references that can be loaded via |
624 | the GOT (labels involving addition aren't allowed). */ | |
625 | ||
626 | int | |
627 | got_no_const_operand (op, mode) | |
628 | register rtx op; | |
296b8152 | 629 | enum machine_mode mode ATTRIBUTE_UNUSED; |
38c1f2d7 MM |
630 | { |
631 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
632 | } | |
633 | ||
4e74d8ec MM |
634 | /* Return the number of instructions it takes to form a constant in an |
635 | integer register. */ | |
636 | ||
637 | static int | |
638 | num_insns_constant_wide (value) | |
639 | HOST_WIDE_INT value; | |
640 | { | |
641 | /* signed constant loadable with {cal|addi} */ | |
642 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
643 | return 1; | |
644 | ||
645 | #if HOST_BITS_PER_WIDE_INT == 32 | |
646 | /* constant loadable with {cau|addis} */ | |
647 | else if ((value & 0xffff) == 0) | |
648 | return 1; | |
649 | ||
650 | #else | |
651 | /* constant loadable with {cau|addis} */ | |
652 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) | |
653 | return 1; | |
654 | ||
655 | else if (TARGET_64BIT) | |
656 | { | |
657 | HOST_WIDE_INT low = value & 0xffffffff; | |
658 | HOST_WIDE_INT high = value >> 32; | |
659 | ||
660 | if (high == 0 && (low & 0x80000000) == 0) | |
661 | return 2; | |
662 | ||
663 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
664 | return 2; | |
665 | ||
666 | else if (!low) | |
667 | return num_insns_constant_wide (high) + 1; | |
668 | ||
669 | else | |
670 | return (num_insns_constant_wide (high) | |
e396202a | 671 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
672 | } |
673 | #endif | |
674 | ||
675 | else | |
676 | return 2; | |
677 | } | |
678 | ||
679 | int | |
680 | num_insns_constant (op, mode) | |
681 | rtx op; | |
682 | enum machine_mode mode; | |
683 | { | |
4e74d8ec MM |
684 | if (GET_CODE (op) == CONST_INT) |
685 | return num_insns_constant_wide (INTVAL (op)); | |
686 | ||
6fc48950 MM |
687 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
688 | { | |
689 | long l; | |
690 | REAL_VALUE_TYPE rv; | |
691 | ||
692 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
693 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
694 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
695 | } | |
696 | ||
47ad8c61 | 697 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 698 | { |
47ad8c61 MM |
699 | HOST_WIDE_INT low; |
700 | HOST_WIDE_INT high; | |
701 | long l[2]; | |
702 | REAL_VALUE_TYPE rv; | |
703 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 704 | |
47ad8c61 MM |
705 | if (mode == VOIDmode || mode == DImode) |
706 | { | |
707 | high = CONST_DOUBLE_HIGH (op); | |
708 | low = CONST_DOUBLE_LOW (op); | |
709 | } | |
710 | else | |
711 | { | |
712 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
713 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
714 | high = l[endian]; | |
715 | low = l[1 - endian]; | |
716 | } | |
4e74d8ec | 717 | |
47ad8c61 MM |
718 | if (TARGET_32BIT) |
719 | return (num_insns_constant_wide (low) | |
720 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
721 | |
722 | else | |
47ad8c61 MM |
723 | { |
724 | if (high == 0 && (low & 0x80000000) == 0) | |
725 | return num_insns_constant_wide (low); | |
726 | ||
727 | else if (((high & 0xffffffff) == 0xffffffff) | |
728 | && ((low & 0x80000000) != 0)) | |
729 | return num_insns_constant_wide (low); | |
730 | ||
a260abc9 DE |
731 | else if (mask64_operand (op, mode)) |
732 | return 2; | |
733 | ||
47ad8c61 MM |
734 | else if (low == 0) |
735 | return num_insns_constant_wide (high) + 1; | |
736 | ||
737 | else | |
738 | return (num_insns_constant_wide (high) | |
739 | + num_insns_constant_wide (low) + 1); | |
740 | } | |
4e74d8ec MM |
741 | } |
742 | ||
743 | else | |
744 | abort (); | |
745 | } | |
746 | ||
6f2f8311 RK |
747 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
748 | with one instruction per word. We only do this if we can safely read | |
749 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
750 | |
751 | int | |
752 | easy_fp_constant (op, mode) | |
753 | register rtx op; | |
754 | register enum machine_mode mode; | |
755 | { | |
9878760c RK |
756 | if (GET_CODE (op) != CONST_DOUBLE |
757 | || GET_MODE (op) != mode | |
4e74d8ec | 758 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
759 | return 0; |
760 | ||
b6c9286a | 761 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 762 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
763 | return 1; |
764 | ||
a7273471 MM |
765 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
766 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
767 | return 0; | |
768 | ||
5ae4759c MM |
769 | #ifdef TARGET_RELOCATABLE |
770 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
771 | if (TARGET_RELOCATABLE) | |
772 | return 0; | |
773 | #endif | |
774 | ||
042259f2 DE |
775 | if (mode == DFmode) |
776 | { | |
777 | long k[2]; | |
778 | REAL_VALUE_TYPE rv; | |
779 | ||
780 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
781 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 782 | |
4e74d8ec MM |
783 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
784 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 785 | } |
4e74d8ec MM |
786 | |
787 | else if (mode == SFmode) | |
042259f2 DE |
788 | { |
789 | long l; | |
790 | REAL_VALUE_TYPE rv; | |
791 | ||
792 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
793 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 794 | |
4e74d8ec | 795 | return num_insns_constant_wide (l) == 1; |
042259f2 | 796 | } |
4e74d8ec | 797 | |
a260abc9 DE |
798 | else if (mode == DImode) |
799 | return ((TARGET_64BIT | |
800 | && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) | |
801 | || (num_insns_constant (op, DImode) <= 2)); | |
4e74d8ec MM |
802 | |
803 | else | |
804 | abort (); | |
9878760c | 805 | } |
8f75773e | 806 | |
b6c9286a MM |
807 | /* Return 1 if the operand is in volatile memory. Note that during the |
808 | RTL generation phase, memory_operand does not return TRUE for | |
809 | volatile memory references. So this function allows us to | |
810 | recognize volatile references where its safe. */ | |
811 | ||
812 | int | |
813 | volatile_mem_operand (op, mode) | |
814 | register rtx op; | |
815 | enum machine_mode mode; | |
816 | { | |
817 | if (GET_CODE (op) != MEM) | |
818 | return 0; | |
819 | ||
820 | if (!MEM_VOLATILE_P (op)) | |
821 | return 0; | |
822 | ||
823 | if (mode != GET_MODE (op)) | |
824 | return 0; | |
825 | ||
826 | if (reload_completed) | |
827 | return memory_operand (op, mode); | |
828 | ||
829 | if (reload_in_progress) | |
830 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
831 | ||
832 | return memory_address_p (mode, XEXP (op, 0)); | |
833 | } | |
834 | ||
5b5040b9 | 835 | /* Return 1 if the operand is an offsettable memory address. */ |
914c2e77 RK |
836 | |
837 | int | |
5b5040b9 | 838 | offsettable_addr_operand (op, mode) |
914c2e77 RK |
839 | register rtx op; |
840 | enum machine_mode mode; | |
841 | { | |
8f75773e | 842 | return offsettable_address_p (reload_completed | reload_in_progress, |
5b5040b9 | 843 | mode, op); |
914c2e77 RK |
844 | } |
845 | ||
9878760c RK |
846 | /* Return 1 if the operand is either an easy FP constant (see above) or |
847 | memory. */ | |
848 | ||
849 | int | |
850 | mem_or_easy_const_operand (op, mode) | |
851 | register rtx op; | |
852 | enum machine_mode mode; | |
853 | { | |
854 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
855 | } | |
856 | ||
857 | /* Return 1 if the operand is either a non-special register or an item | |
858 | that can be used as the operand of an SI add insn. */ | |
859 | ||
860 | int | |
861 | add_operand (op, mode) | |
862 | register rtx op; | |
863 | enum machine_mode mode; | |
864 | { | |
865 | return (reg_or_short_operand (op, mode) | |
19684119 DE |
866 | || (GET_CODE (op) == CONST_INT |
867 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0)); | |
9878760c RK |
868 | } |
869 | ||
dcfedcd0 RK |
870 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
871 | ||
872 | int | |
873 | non_add_cint_operand (op, mode) | |
874 | register rtx op; | |
296b8152 | 875 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
876 | { |
877 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 878 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
19684119 | 879 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); |
dcfedcd0 RK |
880 | } |
881 | ||
9878760c RK |
882 | /* Return 1 if the operand is a non-special register or a constant that |
883 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
884 | ||
885 | int | |
886 | logical_operand (op, mode) | |
887 | register rtx op; | |
888 | enum machine_mode mode; | |
889 | { | |
cd2b37d9 | 890 | return (gpc_reg_operand (op, mode) |
9878760c | 891 | || (GET_CODE (op) == CONST_INT |
a260abc9 | 892 | && ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0 |
19684119 | 893 | || (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0))); |
9878760c RK |
894 | } |
895 | ||
dcfedcd0 RK |
896 | /* Return 1 if C is a constant that is not a logical operand (as |
897 | above). */ | |
898 | ||
899 | int | |
900 | non_logical_cint_operand (op, mode) | |
901 | register rtx op; | |
296b8152 | 902 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
903 | { |
904 | return (GET_CODE (op) == CONST_INT | |
a260abc9 | 905 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0 |
19684119 | 906 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); |
dcfedcd0 RK |
907 | } |
908 | ||
9878760c RK |
909 | /* Return 1 if C is a constant that can be encoded in a mask on the |
910 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. | |
911 | Reject all ones and all zeros, since these should have been optimized | |
912 | away and confuse the making of MB and ME. */ | |
913 | ||
914 | int | |
915 | mask_constant (c) | |
a260abc9 | 916 | register HOST_WIDE_INT c; |
9878760c RK |
917 | { |
918 | int i; | |
919 | int last_bit_value; | |
920 | int transitions = 0; | |
921 | ||
922 | if (c == 0 || c == ~0) | |
923 | return 0; | |
924 | ||
925 | last_bit_value = c & 1; | |
926 | ||
927 | for (i = 1; i < 32; i++) | |
928 | if (((c >>= 1) & 1) != last_bit_value) | |
929 | last_bit_value ^= 1, transitions++; | |
930 | ||
931 | return transitions <= 2; | |
932 | } | |
933 | ||
934 | /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ | |
935 | ||
936 | int | |
937 | mask_operand (op, mode) | |
938 | register rtx op; | |
296b8152 | 939 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
940 | { |
941 | return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); | |
942 | } | |
943 | ||
a260abc9 DE |
944 | /* Return 1 if the operand is a constant that is a PowerPC64 mask. |
945 | It is if there are no more than one 1->0 or 0->1 transitions. | |
946 | Reject all ones and all zeros, since these should have been optimized | |
947 | away and confuse the making of MB and ME. */ | |
9878760c RK |
948 | |
949 | int | |
a260abc9 DE |
950 | mask64_operand (op, mode) |
951 | register rtx op; | |
952 | enum machine_mode mode; | |
953 | { | |
954 | if (GET_CODE (op) == CONST_INT) | |
955 | { | |
956 | HOST_WIDE_INT c = INTVAL (op); | |
957 | int i; | |
958 | int last_bit_value; | |
959 | int transitions = 0; | |
960 | ||
961 | if (c == 0 || c == ~0) | |
962 | return 0; | |
963 | ||
964 | last_bit_value = c & 1; | |
965 | ||
966 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
967 | if (((c >>= 1) & 1) != last_bit_value) | |
968 | last_bit_value ^= 1, transitions++; | |
969 | ||
a238cd8b | 970 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
971 | /* Consider CONST_INT sign-extended. */ |
972 | transitions += (last_bit_value != 1); | |
973 | #endif | |
974 | ||
975 | return transitions <= 1; | |
976 | } | |
977 | else if (GET_CODE (op) == CONST_DOUBLE | |
978 | && (mode == VOIDmode || mode == DImode)) | |
979 | { | |
980 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
a238cd8b | 981 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
982 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); |
983 | #endif | |
984 | int i; | |
985 | int last_bit_value; | |
986 | int transitions = 0; | |
987 | ||
988 | if ((low == 0 | |
a238cd8b | 989 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
990 | && high == 0 |
991 | #endif | |
992 | ) | |
993 | || (low == ~0 | |
a238cd8b | 994 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
995 | && high == ~0 |
996 | #endif | |
997 | )) | |
998 | return 0; | |
999 | ||
1000 | last_bit_value = low & 1; | |
1001 | ||
1002 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1003 | if (((low >>= 1) & 1) != last_bit_value) | |
1004 | last_bit_value ^= 1, transitions++; | |
1005 | ||
a238cd8b | 1006 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1007 | if ((high & 1) != last_bit_value) |
1008 | last_bit_value ^= 1, transitions++; | |
1009 | ||
1010 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1011 | if (((high >>= 1) & 1) != last_bit_value) | |
1012 | last_bit_value ^= 1, transitions++; | |
1013 | #endif | |
1014 | ||
1015 | return transitions <= 1; | |
1016 | } | |
1017 | else | |
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | /* Return 1 if the operand is either a non-special register or a constant | |
1022 | that can be used as the operand of a PowerPC64 logical AND insn. */ | |
1023 | ||
1024 | int | |
1025 | and64_operand (op, mode) | |
9878760c RK |
1026 | register rtx op; |
1027 | enum machine_mode mode; | |
1028 | { | |
38c1f2d7 | 1029 | return (logical_operand (op, mode) |
a260abc9 | 1030 | || mask64_operand (op, mode)); |
9878760c RK |
1031 | } |
1032 | ||
a260abc9 DE |
1033 | /* Return 1 if the operand is either a non-special register or a |
1034 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
dcfedcd0 RK |
1035 | |
1036 | int | |
a260abc9 DE |
1037 | and_operand (op, mode) |
1038 | register rtx op; | |
1039 | enum machine_mode mode; | |
dcfedcd0 | 1040 | { |
a260abc9 DE |
1041 | return (logical_operand (op, mode) |
1042 | || mask_operand (op, mode)); | |
dcfedcd0 RK |
1043 | } |
1044 | ||
9878760c RK |
1045 | /* Return 1 if the operand is a general register or memory operand. */ |
1046 | ||
1047 | int | |
1048 | reg_or_mem_operand (op, mode) | |
1049 | register rtx op; | |
1050 | register enum machine_mode mode; | |
1051 | { | |
b6c9286a MM |
1052 | return (gpc_reg_operand (op, mode) |
1053 | || memory_operand (op, mode) | |
1054 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
1055 | } |
1056 | ||
a7a813f7 RK |
1057 | /* Return 1 if the operand is a general register or memory operand without |
1058 | pre-inc or pre_dec which produces invalid form of PowerPC lwa | |
1059 | instruction. */ | |
1060 | ||
1061 | int | |
1062 | lwa_operand (op, mode) | |
1063 | register rtx op; | |
1064 | register enum machine_mode mode; | |
1065 | { | |
1066 | rtx inner = op; | |
1067 | ||
1068 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
1069 | inner = SUBREG_REG (inner); | |
1070 | ||
1071 | return gpc_reg_operand (inner, mode) | |
1072 | || (memory_operand (inner, mode) | |
1073 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
1074 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
1075 | } | |
1076 | ||
9878760c RK |
1077 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
1078 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
1079 | forced to lr. */ | |
1080 | ||
1081 | int | |
1082 | call_operand (op, mode) | |
1083 | register rtx op; | |
1084 | enum machine_mode mode; | |
1085 | { | |
1086 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
1087 | return 0; | |
1088 | ||
1089 | return (GET_CODE (op) == SYMBOL_REF | |
1090 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
1091 | } | |
1092 | ||
2af3d377 RK |
1093 | |
1094 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
1095 | this file. */ | |
1096 | ||
1097 | int | |
1098 | current_file_function_operand (op, mode) | |
1099 | register rtx op; | |
296b8152 | 1100 | enum machine_mode mode ATTRIBUTE_UNUSED; |
2af3d377 RK |
1101 | { |
1102 | return (GET_CODE (op) == SYMBOL_REF | |
1103 | && (SYMBOL_REF_FLAG (op) | |
1104 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
1105 | } | |
1106 | ||
1107 | ||
9878760c RK |
1108 | /* Return 1 if this operand is a valid input for a move insn. */ |
1109 | ||
1110 | int | |
1111 | input_operand (op, mode) | |
1112 | register rtx op; | |
1113 | enum machine_mode mode; | |
1114 | { | |
eb4e8003 | 1115 | /* Memory is always valid. */ |
9878760c RK |
1116 | if (memory_operand (op, mode)) |
1117 | return 1; | |
1118 | ||
34792e82 JL |
1119 | /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */ |
1120 | if (GET_CODE (op) == CONST && GET_CODE (XEXP (op, 0)) == CONSTANT_P_RTX) | |
1121 | return 1; | |
1122 | ||
eb4e8003 RK |
1123 | /* For floating-point, easy constants are valid. */ |
1124 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1125 | && CONSTANT_P (op) | |
1126 | && easy_fp_constant (op, mode)) | |
1127 | return 1; | |
1128 | ||
4e74d8ec MM |
1129 | /* Allow any integer constant. */ |
1130 | if (GET_MODE_CLASS (mode) == MODE_INT | |
e675f625 | 1131 | && (GET_CODE (op) == CONST_INT |
e675f625 | 1132 | || GET_CODE (op) == CONST_DOUBLE)) |
4e74d8ec MM |
1133 | return 1; |
1134 | ||
eb4e8003 RK |
1135 | /* For floating-point or multi-word mode, the only remaining valid type |
1136 | is a register. */ | |
9878760c RK |
1137 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1138 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1139 | return register_operand (op, mode); |
9878760c | 1140 | |
88fe15a1 RK |
1141 | /* The only cases left are integral modes one word or smaller (we |
1142 | do not get called for MODE_CC values). These can be in any | |
1143 | register. */ | |
1144 | if (register_operand (op, mode)) | |
a8b3aeda | 1145 | return 1; |
88fe15a1 | 1146 | |
84cf9dda | 1147 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1148 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1149 | return 1; |
1150 | ||
b6c9286a MM |
1151 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1152 | directly in the instruction stream */ | |
1153 | if (DEFAULT_ABI == ABI_NT | |
1154 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1155 | return 1; | |
1156 | ||
88228c4b MM |
1157 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1158 | to be valid. */ | |
c81bebd7 | 1159 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1160 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1161 | && small_data_operand (op, Pmode)) | |
1162 | return 1; | |
1163 | ||
042259f2 | 1164 | return 0; |
9878760c | 1165 | } |
7509c759 MM |
1166 | |
1167 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1168 | ||
1169 | int | |
1170 | small_data_operand (op, mode) | |
296b8152 KG |
1171 | rtx op ATTRIBUTE_UNUSED; |
1172 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
7509c759 | 1173 | { |
38c1f2d7 | 1174 | #if TARGET_ELF |
7509c759 MM |
1175 | rtx sym_ref, const_part; |
1176 | ||
d9407988 | 1177 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1178 | return 0; |
a54d04b7 | 1179 | |
5b9d9a0c | 1180 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1181 | return 0; |
1182 | ||
88228c4b MM |
1183 | if (GET_CODE (op) == SYMBOL_REF) |
1184 | sym_ref = op; | |
1185 | ||
1186 | else if (GET_CODE (op) != CONST | |
1187 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1188 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1189 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1190 | return 0; |
1191 | ||
88228c4b | 1192 | else |
dbf55e53 MM |
1193 | { |
1194 | rtx sum = XEXP (op, 0); | |
1195 | HOST_WIDE_INT summand; | |
1196 | ||
1197 | /* We have to be careful here, because it is the referenced address | |
1198 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1199 | summand = INTVAL (XEXP (sum, 1)); | |
1200 | if (summand < 0 || summand > g_switch_value) | |
1201 | return 0; | |
1202 | ||
1203 | sym_ref = XEXP (sum, 0); | |
1204 | } | |
88228c4b MM |
1205 | |
1206 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1207 | return 0; |
1208 | ||
1209 | return 1; | |
d9407988 MM |
1210 | |
1211 | #else | |
1212 | return 0; | |
1213 | #endif | |
7509c759 MM |
1214 | } |
1215 | ||
4697a36c MM |
1216 | \f |
1217 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1218 | for a call to a function whose data type is FNTYPE. | |
1219 | For a library call, FNTYPE is 0. | |
1220 | ||
1221 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1222 | so we never return a PARALLEL. */ |
4697a36c MM |
1223 | |
1224 | void | |
1225 | init_cumulative_args (cum, fntype, libname, incoming) | |
1226 | CUMULATIVE_ARGS *cum; | |
1227 | tree fntype; | |
296b8152 | 1228 | rtx libname ATTRIBUTE_UNUSED; |
4697a36c MM |
1229 | int incoming; |
1230 | { | |
1231 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1232 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1233 | |
1234 | *cum = zero_cumulative; | |
1235 | cum->words = 0; | |
1236 | cum->fregno = FP_ARG_MIN_REG; | |
1237 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1238 | cum->call_cookie = CALL_NORMAL; |
4697a36c MM |
1239 | |
1240 | if (incoming) | |
1241 | { | |
1c20ae99 | 1242 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
c81bebd7 | 1243 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1244 | cum->varargs_offset = RS6000_VARARGS_OFFSET; |
4697a36c MM |
1245 | } |
1246 | ||
1247 | else if (cum->prototype) | |
1248 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1249 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1250 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1251 | ||
1252 | else | |
1253 | cum->nargs_prototype = 0; | |
1254 | ||
1255 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1256 | |
1257 | /* Check for DLL import functions */ | |
1258 | if (abi == ABI_NT | |
1259 | && fntype | |
1260 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1261 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1262 | ||
6a4cee5f MM |
1263 | /* Also check for longcall's */ |
1264 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1265 | cum->call_cookie = CALL_LONG; | |
1266 | ||
4697a36c MM |
1267 | if (TARGET_DEBUG_ARG) |
1268 | { | |
1269 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1270 | if (fntype) | |
1271 | { | |
1272 | tree ret_type = TREE_TYPE (fntype); | |
1273 | fprintf (stderr, " ret code = %s,", | |
1274 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1275 | } | |
1276 | ||
c81bebd7 | 1277 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming) |
4697a36c | 1278 | fprintf (stderr, " varargs = %d, ", cum->varargs_offset); |
7509c759 | 1279 | |
6a4cee5f | 1280 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1281 | fprintf (stderr, " dllimport,"); |
4697a36c | 1282 | |
6a4cee5f MM |
1283 | if (cum->call_cookie & CALL_LONG) |
1284 | fprintf (stderr, " longcall,"); | |
1285 | ||
4697a36c MM |
1286 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1287 | cum->prototype, cum->nargs_prototype); | |
1288 | } | |
1289 | } | |
1290 | \f | |
c229cba9 DE |
1291 | /* If defined, a C expression which determines whether, and in which |
1292 | direction, to pad out an argument with extra space. The value | |
1293 | should be of type `enum direction': either `upward' to pad above | |
1294 | the argument, `downward' to pad below, or `none' to inhibit | |
1295 | padding. | |
1296 | ||
1297 | For the AIX ABI structs are always stored left shifted in their | |
1298 | argument slot. */ | |
1299 | ||
c4d38ccb | 1300 | int |
c229cba9 DE |
1301 | function_arg_padding (mode, type) |
1302 | enum machine_mode mode; | |
1303 | tree type; | |
1304 | { | |
c85f7c16 | 1305 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1306 | return (int)upward; |
c229cba9 DE |
1307 | |
1308 | /* This is the default definition. */ | |
1309 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1310 | ? (int)upward |
c229cba9 DE |
1311 | : ((mode == BLKmode |
1312 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1313 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1314 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1315 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1316 | } |
1317 | ||
b6c9286a MM |
1318 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1319 | of an argument with the specified mode and type. If it is not defined, | |
1320 | PARM_BOUNDARY is used for all arguments. | |
1321 | ||
e1f83b4d MM |
1322 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1323 | ||
2310f99a | 1324 | V.4 wants long longs to be double word aligned. */ |
b6c9286a MM |
1325 | |
1326 | int | |
1327 | function_arg_boundary (mode, type) | |
1328 | enum machine_mode mode; | |
1329 | tree type; | |
1330 | { | |
2310f99a | 1331 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode) |
e1f83b4d MM |
1332 | return 64; |
1333 | ||
b6c9286a MM |
1334 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1335 | return PARM_BOUNDARY; | |
1336 | ||
1337 | if (mode != BLKmode) | |
1338 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1339 | ||
1340 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1341 | } | |
1342 | \f | |
4697a36c MM |
1343 | /* Update the data in CUM to advance over an argument |
1344 | of mode MODE and data type TYPE. | |
1345 | (TYPE is null for libcalls where that information may not be available.) */ | |
1346 | ||
1347 | void | |
1348 | function_arg_advance (cum, mode, type, named) | |
1349 | CUMULATIVE_ARGS *cum; | |
1350 | enum machine_mode mode; | |
1351 | tree type; | |
1352 | int named; | |
1353 | { | |
a260abc9 DE |
1354 | int align = (TARGET_32BIT && (cum->words & 1) != 0 |
1355 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
b6c9286a | 1356 | cum->words += align; |
4697a36c MM |
1357 | cum->nargs_prototype--; |
1358 | ||
c81bebd7 | 1359 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1360 | { |
1361 | /* Long longs must not be split between registers and stack */ | |
1362 | if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) | |
1363 | && type && !AGGREGATE_TYPE_P (type) | |
1364 | && cum->words < GP_ARG_NUM_REG | |
1365 | && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) | |
1366 | { | |
1367 | cum->words = GP_ARG_NUM_REG; | |
1368 | } | |
1369 | ||
1370 | /* Aggregates get passed as pointers */ | |
1371 | if (type && AGGREGATE_TYPE_P (type)) | |
1372 | cum->words++; | |
1373 | ||
1374 | /* Floats go in registers, & don't occupy space in the GP registers | |
1375 | like they do for AIX unless software floating point. */ | |
1376 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1377 | && TARGET_HARD_FLOAT | |
1378 | && cum->fregno <= FP_ARG_V4_MAX_REG) | |
1379 | cum->fregno++; | |
1380 | ||
1381 | else | |
1382 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1383 | } | |
1384 | else | |
4697a36c MM |
1385 | if (named) |
1386 | { | |
1387 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1388 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1389 | cum->fregno++; | |
1390 | } | |
1391 | ||
1392 | if (TARGET_DEBUG_ARG) | |
1393 | fprintf (stderr, | |
b6c9286a MM |
1394 | "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1395 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1396 | } |
1397 | \f | |
1398 | /* Determine where to put an argument to a function. | |
1399 | Value is zero to push the argument on the stack, | |
1400 | or a hard register in which to store the argument. | |
1401 | ||
1402 | MODE is the argument's machine mode. | |
1403 | TYPE is the data type of the argument (as a tree). | |
1404 | This is null for libcalls where that information may | |
1405 | not be available. | |
1406 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1407 | the preceding args and about the function being called. | |
1408 | NAMED is nonzero if this argument is a named parameter | |
1409 | (otherwise it is an extra parameter matching an ellipsis). | |
1410 | ||
1411 | On RS/6000 the first eight words of non-FP are normally in registers | |
1412 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1413 | Under V.4, the first 8 FP args are in registers. | |
1414 | ||
1415 | If this is floating-point and no prototype is specified, we use | |
1416 | both an FP and integer register (or possibly FP reg and stack). Library | |
1417 | functions (when TYPE is zero) always have the proper types for args, | |
1418 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1419 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1420 | |
1421 | struct rtx_def * | |
1422 | function_arg (cum, mode, type, named) | |
1423 | CUMULATIVE_ARGS *cum; | |
1424 | enum machine_mode mode; | |
1425 | tree type; | |
1426 | int named; | |
1427 | { | |
a260abc9 DE |
1428 | int align = (TARGET_32BIT && (cum->words & 1) != 0 |
1429 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
b6c9286a MM |
1430 | int align_words = cum->words + align; |
1431 | ||
4697a36c MM |
1432 | if (TARGET_DEBUG_ARG) |
1433 | fprintf (stderr, | |
b6c9286a MM |
1434 | "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1435 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1436 | |
1437 | /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 | |
1438 | uses to say fp args were passed in registers. Assume that we don't need the | |
1439 | marker for software floating point, or compiler generated library calls. */ | |
1440 | if (mode == VOIDmode) | |
1441 | { | |
7509c759 MM |
1442 | enum rs6000_abi abi = DEFAULT_ABI; |
1443 | ||
c81bebd7 | 1444 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1445 | && TARGET_HARD_FLOAT |
1446 | && cum->nargs_prototype < 0 | |
4697a36c | 1447 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1448 | { |
6a4cee5f MM |
1449 | return GEN_INT (cum->call_cookie |
1450 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1451 | ? CALL_V4_SET_FP_ARGS | |
1452 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1453 | } |
4697a36c | 1454 | |
7509c759 | 1455 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1456 | } |
1457 | ||
1458 | if (!named) | |
1459 | { | |
c81bebd7 | 1460 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
4697a36c MM |
1461 | return NULL_RTX; |
1462 | } | |
1463 | ||
1464 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
1465 | return NULL_RTX; | |
1466 | ||
1467 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1468 | { | |
5b9d9a0c | 1469 | if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */ |
c81bebd7 | 1470 | || DEFAULT_ABI == ABI_SOLARIS |
5b9d9a0c MM |
1471 | || ! type |
1472 | || ((cum->nargs_prototype > 0) | |
1473 | /* IBM AIX extended its linkage convention definition always to | |
1474 | require FP args after register save area hole on the stack. */ | |
1475 | && (DEFAULT_ABI != ABI_AIX | |
1476 | || ! TARGET_XL_CALL | |
1477 | || (align_words < GP_ARG_NUM_REG)))) | |
39403d82 | 1478 | return gen_rtx_REG (mode, cum->fregno); |
4697a36c | 1479 | |
39403d82 | 1480 | return gen_rtx_PARALLEL (mode, |
1c20ae99 JW |
1481 | gen_rtvec |
1482 | (2, | |
39403d82 | 1483 | gen_rtx_EXPR_LIST (VOIDmode, |
1c20ae99 JW |
1484 | ((align_words >= GP_ARG_NUM_REG) |
1485 | ? NULL_RTX | |
1486 | : (align_words | |
1487 | + RS6000_ARG_SIZE (mode, type, named) | |
1488 | > GP_ARG_NUM_REG | |
1489 | /* If this is partially on the stack, then | |
1490 | we only include the portion actually | |
1491 | in registers here. */ | |
39403d82 | 1492 | ? gen_rtx_REG (SImode, |
1c20ae99 | 1493 | GP_ARG_MIN_REG + align_words) |
39403d82 | 1494 | : gen_rtx_REG (mode, |
1c20ae99 JW |
1495 | GP_ARG_MIN_REG + align_words))), |
1496 | const0_rtx), | |
39403d82 DE |
1497 | gen_rtx_EXPR_LIST (VOIDmode, |
1498 | gen_rtx_REG (mode, cum->fregno), | |
1c20ae99 | 1499 | const0_rtx))); |
4697a36c MM |
1500 | } |
1501 | ||
92dcf4c8 MM |
1502 | /* Long longs won't be split between register and stack; |
1503 | FP arguments get passed on the stack if they didn't get a register. */ | |
c81bebd7 | 1504 | else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && |
92dcf4c8 MM |
1505 | (align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG |
1506 | || (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT))) | |
4697a36c MM |
1507 | { |
1508 | return NULL_RTX; | |
1509 | } | |
4697a36c | 1510 | |
b6c9286a | 1511 | else if (align_words < GP_ARG_NUM_REG) |
39403d82 | 1512 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); |
4697a36c MM |
1513 | |
1514 | return NULL_RTX; | |
1515 | } | |
1516 | \f | |
1517 | /* For an arg passed partly in registers and partly in memory, | |
1518 | this is the number of registers used. | |
1519 | For args passed entirely in registers or entirely in memory, zero. */ | |
1520 | ||
1521 | int | |
1522 | function_arg_partial_nregs (cum, mode, type, named) | |
1523 | CUMULATIVE_ARGS *cum; | |
1524 | enum machine_mode mode; | |
1525 | tree type; | |
1526 | int named; | |
1527 | { | |
1528 | if (! named) | |
1529 | return 0; | |
1530 | ||
c81bebd7 | 1531 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1532 | return 0; |
4697a36c MM |
1533 | |
1534 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1535 | { | |
1536 | if (cum->nargs_prototype >= 0) | |
1537 | return 0; | |
1538 | } | |
1539 | ||
1540 | if (cum->words < GP_ARG_NUM_REG | |
1541 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1542 | { | |
1543 | int ret = GP_ARG_NUM_REG - cum->words; | |
1544 | if (ret && TARGET_DEBUG_ARG) | |
1545 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1546 | ||
1547 | return ret; | |
1548 | } | |
1549 | ||
1550 | return 0; | |
1551 | } | |
1552 | \f | |
1553 | /* A C expression that indicates when an argument must be passed by | |
1554 | reference. If nonzero for an argument, a copy of that argument is | |
1555 | made in memory and a pointer to the argument is passed instead of | |
1556 | the argument itself. The pointer is passed in whatever way is | |
1557 | appropriate for passing a pointer to that type. | |
1558 | ||
1559 | Under V.4, structures and unions are passed by reference. */ | |
1560 | ||
1561 | int | |
1562 | function_arg_pass_by_reference (cum, mode, type, named) | |
296b8152 KG |
1563 | CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; |
1564 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
4697a36c | 1565 | tree type; |
296b8152 | 1566 | int named ATTRIBUTE_UNUSED; |
4697a36c | 1567 | { |
c81bebd7 MM |
1568 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1569 | && type && AGGREGATE_TYPE_P (type)) | |
4697a36c MM |
1570 | { |
1571 | if (TARGET_DEBUG_ARG) | |
1572 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1573 | ||
1574 | return 1; | |
1575 | } | |
4697a36c MM |
1576 | |
1577 | return 0; | |
1578 | } | |
1579 | ||
1580 | \f | |
1581 | /* Perform any needed actions needed for a function that is receiving a | |
1582 | variable number of arguments. | |
1583 | ||
1584 | CUM is as above. | |
1585 | ||
1586 | MODE and TYPE are the mode and type of the current parameter. | |
1587 | ||
1588 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1589 | that must be pushed by the prolog to pretend that our caller pushed | |
1590 | it. | |
1591 | ||
1592 | Normally, this macro will push all remaining incoming registers on the | |
1593 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1594 | ||
1595 | void | |
1596 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1597 | CUMULATIVE_ARGS *cum; | |
1598 | enum machine_mode mode; | |
1599 | tree type; | |
1600 | int *pretend_size; | |
1601 | int no_rtl; | |
1602 | ||
1603 | { | |
1604 | rtx save_area = virtual_incoming_args_rtx; | |
a260abc9 | 1605 | int reg_size = TARGET_32BIT ? 4 : 8; |
4697a36c MM |
1606 | |
1607 | if (TARGET_DEBUG_ARG) | |
1608 | fprintf (stderr, | |
1609 | "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", | |
1610 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); | |
1611 | ||
60e2d0ca | 1612 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1613 | { |
1614 | rs6000_sysv_varargs_p = 1; | |
60e2d0ca RK |
1615 | if (! no_rtl) |
1616 | save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET); | |
4697a36c | 1617 | } |
60e2d0ca RK |
1618 | else |
1619 | rs6000_sysv_varargs_p = 0; | |
4697a36c MM |
1620 | |
1621 | if (cum->words < 8) | |
1622 | { | |
1623 | int first_reg_offset = cum->words; | |
1624 | ||
1625 | if (MUST_PASS_IN_STACK (mode, type)) | |
1626 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
1627 | ||
1628 | if (first_reg_offset > GP_ARG_NUM_REG) | |
1629 | first_reg_offset = GP_ARG_NUM_REG; | |
1630 | ||
1631 | if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) | |
1632 | move_block_from_reg | |
1633 | (GP_ARG_MIN_REG + first_reg_offset, | |
39403d82 | 1634 | gen_rtx_MEM (BLKmode, |
4697a36c MM |
1635 | plus_constant (save_area, first_reg_offset * reg_size)), |
1636 | GP_ARG_NUM_REG - first_reg_offset, | |
1637 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1638 | ||
1639 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; | |
1640 | } | |
1641 | ||
4697a36c | 1642 | /* Save FP registers if needed. */ |
c81bebd7 | 1643 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl) |
4697a36c MM |
1644 | { |
1645 | int fregno = cum->fregno; | |
1646 | int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; | |
1647 | ||
1648 | if (num_fp_reg >= 0) | |
1649 | { | |
39403d82 | 1650 | rtx cr1 = gen_rtx_REG (CCmode, 69); |
4697a36c MM |
1651 | rtx lab = gen_label_rtx (); |
1652 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
1653 | ||
39403d82 | 1654 | emit_jump_insn (gen_rtx_SET (VOIDmode, |
4697a36c | 1655 | pc_rtx, |
39403d82 DE |
1656 | gen_rtx_IF_THEN_ELSE (VOIDmode, |
1657 | gen_rtx_NE (VOIDmode, cr1, const0_rtx), | |
1658 | gen_rtx_LABEL_REF (VOIDmode, lab), | |
4697a36c MM |
1659 | pc_rtx))); |
1660 | ||
1661 | while ( num_fp_reg-- >= 0) | |
1662 | { | |
39403d82 DE |
1663 | emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)), |
1664 | gen_rtx_REG (DFmode, fregno++)); | |
4697a36c MM |
1665 | off += 8; |
1666 | } | |
1667 | ||
1668 | emit_label (lab); | |
1669 | } | |
1670 | } | |
4697a36c MM |
1671 | } |
1672 | \f | |
1673 | /* If defined, is a C expression that produces the machine-specific | |
1674 | code for a call to `__builtin_saveregs'. This code will be moved | |
1675 | to the very beginning of the function, before any parameter access | |
1676 | are made. The return value of this function should be an RTX that | |
1677 | contains the value to use as the return of `__builtin_saveregs'. | |
1678 | ||
1679 | The argument ARGS is a `tree_list' containing the arguments that | |
1680 | were passed to `__builtin_saveregs'. | |
1681 | ||
1682 | If this macro is not defined, the compiler will output an ordinary | |
1683 | call to the library function `__builtin_saveregs'. | |
1684 | ||
1685 | On the Power/PowerPC return the address of the area on the stack | |
1686 | used to hold arguments. Under AIX, this includes the 8 word register | |
1687 | save area. Under V.4 this does not. */ | |
1688 | ||
1689 | struct rtx_def * | |
1690 | expand_builtin_saveregs (args) | |
296b8152 | 1691 | tree args ATTRIBUTE_UNUSED; |
4697a36c MM |
1692 | { |
1693 | return virtual_incoming_args_rtx; | |
1694 | } | |
1695 | ||
5b5040b9 RK |
1696 | \f |
1697 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1698 | and other bits from an original memory reference. */ | |
1699 | ||
1700 | static rtx | |
1701 | expand_block_move_mem (mode, addr, orig_mem) | |
1702 | enum machine_mode mode; | |
1703 | rtx addr; | |
1704 | rtx orig_mem; | |
1705 | { | |
39403d82 | 1706 | rtx mem = gen_rtx_MEM (mode, addr); |
b6c9286a MM |
1707 | |
1708 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
c6df88cb | 1709 | MEM_COPY_ATTRIBUTES (mem, orig_mem); |
b6c9286a MM |
1710 | #ifdef MEM_UNALIGNED_P |
1711 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1712 | #endif | |
5b5040b9 RK |
1713 | return mem; |
1714 | } | |
1715 | ||
7e69e155 MM |
1716 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1717 | if we should let the compiler generate normal code. | |
1718 | ||
1719 | operands[0] is the destination | |
1720 | operands[1] is the source | |
1721 | operands[2] is the length | |
1722 | operands[3] is the alignment */ | |
1723 | ||
3933e0e1 MM |
1724 | #define MAX_MOVE_REG 4 |
1725 | ||
7e69e155 MM |
1726 | int |
1727 | expand_block_move (operands) | |
1728 | rtx operands[]; | |
1729 | { | |
b6c9286a MM |
1730 | rtx orig_dest = operands[0]; |
1731 | rtx orig_src = operands[1]; | |
7e69e155 | 1732 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1733 | rtx align_rtx = operands[3]; |
3933e0e1 | 1734 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1735 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1736 | int bytes; |
1737 | int offset; | |
1738 | int num_reg; | |
1739 | int i; | |
7e69e155 MM |
1740 | rtx src_reg; |
1741 | rtx dest_reg; | |
3933e0e1 MM |
1742 | rtx src_addr; |
1743 | rtx dest_addr; | |
7e69e155 | 1744 | rtx tmp_reg; |
3933e0e1 | 1745 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1746 | int move_bytes; |
1747 | ||
3933e0e1 MM |
1748 | /* If this is not a fixed size move, just call memcpy */ |
1749 | if (!constp) | |
1750 | return 0; | |
1751 | ||
7e69e155 | 1752 | /* Anything to move? */ |
3933e0e1 MM |
1753 | bytes = INTVAL (bytes_rtx); |
1754 | if (bytes <= 0) | |
7e69e155 MM |
1755 | return 1; |
1756 | ||
3933e0e1 MM |
1757 | /* Don't support real large moves. If string instructions are not used, |
1758 | then don't generate more than 8 loads. */ | |
1759 | if (TARGET_STRING) | |
1760 | { | |
1cab3be1 | 1761 | if (bytes > 4*8) |
3933e0e1 MM |
1762 | return 0; |
1763 | } | |
1764 | else if (!STRICT_ALIGNMENT) | |
1765 | { | |
1766 | if (bytes > 4*8) | |
1767 | return 0; | |
1768 | } | |
1769 | else if (bytes > 8*align) | |
7e69e155 MM |
1770 | return 0; |
1771 | ||
1772 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1773 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1774 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1775 | |
3933e0e1 | 1776 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1777 | { |
3933e0e1 | 1778 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1779 | { |
3933e0e1 MM |
1780 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1781 | && !fixed_regs[5] | |
1782 | && !fixed_regs[6] | |
1783 | && !fixed_regs[7] | |
1784 | && !fixed_regs[8] | |
1785 | && !fixed_regs[9] | |
1786 | && !fixed_regs[10] | |
1787 | && !fixed_regs[11] | |
1788 | && !fixed_regs[12]) | |
1789 | { | |
1790 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1791 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1792 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1793 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1794 | align_rtx)); |
3933e0e1 MM |
1795 | } |
1796 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1797 | && !fixed_regs[7] | |
1798 | && !fixed_regs[8] | |
1799 | && !fixed_regs[9] | |
1800 | && !fixed_regs[10] | |
1801 | && !fixed_regs[11] | |
1802 | && !fixed_regs[12]) | |
1803 | { | |
1804 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1805 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1806 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1807 | GEN_INT (move_bytes), |
4c64a852 | 1808 | align_rtx)); |
3933e0e1 MM |
1809 | } |
1810 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1811 | && !fixed_regs[9] | |
1812 | && !fixed_regs[10] | |
1813 | && !fixed_regs[11] | |
1814 | && !fixed_regs[12]) | |
1815 | { | |
1816 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1817 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1818 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1819 | GEN_INT (move_bytes), |
4c64a852 | 1820 | align_rtx)); |
3933e0e1 | 1821 | } |
d679bebf | 1822 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1823 | { /* move up to 8 bytes at a time */ |
1824 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1825 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1826 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1827 | GEN_INT (move_bytes), |
4c64a852 | 1828 | align_rtx)); |
3933e0e1 MM |
1829 | } |
1830 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1831 | { /* move 4 bytes */ | |
1832 | move_bytes = 4; | |
1833 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1834 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1835 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1836 | } |
1837 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1838 | { /* move 2 bytes */ | |
1839 | move_bytes = 2; | |
1840 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1841 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
1842 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1843 | } |
1844 | else if (bytes == 1) /* move 1 byte */ | |
1845 | { | |
1846 | move_bytes = 1; | |
1847 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1848 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
1849 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1850 | } |
1851 | else | |
1852 | { /* move up to 4 bytes at a time */ | |
1853 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
1854 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1855 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1856 | GEN_INT (move_bytes), |
4c64a852 | 1857 | align_rtx)); |
3933e0e1 | 1858 | } |
4c64a852 | 1859 | |
015892ee RK |
1860 | if (bytes > move_bytes) |
1861 | { | |
1862 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
1863 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
1864 | } | |
4c64a852 | 1865 | } |
3933e0e1 MM |
1866 | } |
1867 | ||
1868 | else /* string instructions not available */ | |
1869 | { | |
1870 | num_reg = offset = 0; | |
1871 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 1872 | { |
3933e0e1 MM |
1873 | /* Calculate the correct offset for src/dest */ |
1874 | if (offset == 0) | |
7e69e155 | 1875 | { |
3933e0e1 MM |
1876 | src_addr = src_reg; |
1877 | dest_addr = dest_reg; | |
1878 | } | |
1879 | else | |
1880 | { | |
39403d82 DE |
1881 | src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); |
1882 | dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); | |
3933e0e1 MM |
1883 | } |
1884 | ||
1885 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
1886 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
1887 | { | |
1888 | move_bytes = 8; | |
1889 | tmp_reg = gen_reg_rtx (DImode); | |
1890 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
1891 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
1892 | } | |
1893 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
1894 | { |
1895 | move_bytes = 4; | |
1896 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1897 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
1898 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1899 | } |
1900 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1901 | { | |
1902 | move_bytes = 2; | |
1903 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1904 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
1905 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1906 | } |
1907 | else | |
1908 | { | |
1909 | move_bytes = 1; | |
1910 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1911 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
1912 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1913 | } |
1914 | ||
1915 | if (num_reg >= MAX_MOVE_REG) | |
1916 | { | |
1917 | for (i = 0; i < num_reg; i++) | |
1918 | emit_insn (stores[i]); | |
1919 | num_reg = 0; | |
7e69e155 MM |
1920 | } |
1921 | } | |
3933e0e1 | 1922 | |
b6c9286a MM |
1923 | for (i = 0; i < num_reg; i++) |
1924 | emit_insn (stores[i]); | |
7e69e155 MM |
1925 | } |
1926 | ||
1927 | return 1; | |
1928 | } | |
1929 | ||
9878760c RK |
1930 | \f |
1931 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
1932 | PARALLEL and the first section will be tested. */ | |
1933 | ||
1934 | int | |
1935 | load_multiple_operation (op, mode) | |
1936 | rtx op; | |
296b8152 | 1937 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
1938 | { |
1939 | int count = XVECLEN (op, 0); | |
1940 | int dest_regno; | |
1941 | rtx src_addr; | |
1942 | int i; | |
1943 | ||
1944 | /* Perform a quick check so we don't blow up below. */ | |
1945 | if (count <= 1 | |
1946 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1947 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
1948 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
1949 | return 0; | |
1950 | ||
1951 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
1952 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
1953 | ||
1954 | for (i = 1; i < count; i++) | |
1955 | { | |
1956 | rtx elt = XVECEXP (op, 0, i); | |
1957 | ||
1958 | if (GET_CODE (elt) != SET | |
1959 | || GET_CODE (SET_DEST (elt)) != REG | |
1960 | || GET_MODE (SET_DEST (elt)) != SImode | |
1961 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
1962 | || GET_CODE (SET_SRC (elt)) != MEM | |
1963 | || GET_MODE (SET_SRC (elt)) != SImode | |
1964 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
1965 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
1966 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
1967 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
1968 | return 0; | |
1969 | } | |
1970 | ||
1971 | return 1; | |
1972 | } | |
1973 | ||
1974 | /* Similar, but tests for store multiple. Here, the second vector element | |
1975 | is a CLOBBER. It will be tested later. */ | |
1976 | ||
1977 | int | |
1978 | store_multiple_operation (op, mode) | |
1979 | rtx op; | |
296b8152 | 1980 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
1981 | { |
1982 | int count = XVECLEN (op, 0) - 1; | |
1983 | int src_regno; | |
1984 | rtx dest_addr; | |
1985 | int i; | |
1986 | ||
1987 | /* Perform a quick check so we don't blow up below. */ | |
1988 | if (count <= 1 | |
1989 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1990 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
1991 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
1992 | return 0; | |
1993 | ||
1994 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
1995 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
1996 | ||
1997 | for (i = 1; i < count; i++) | |
1998 | { | |
1999 | rtx elt = XVECEXP (op, 0, i + 1); | |
2000 | ||
2001 | if (GET_CODE (elt) != SET | |
2002 | || GET_CODE (SET_SRC (elt)) != REG | |
2003 | || GET_MODE (SET_SRC (elt)) != SImode | |
2004 | || REGNO (SET_SRC (elt)) != src_regno + i | |
2005 | || GET_CODE (SET_DEST (elt)) != MEM | |
2006 | || GET_MODE (SET_DEST (elt)) != SImode | |
2007 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
2008 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
2009 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
2010 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
2011 | return 0; | |
2012 | } | |
2013 | ||
2014 | return 1; | |
2015 | } | |
2016 | \f | |
2017 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
2018 | We only check the opcode against the mode of the CC value here. */ | |
2019 | ||
2020 | int | |
2021 | branch_comparison_operator (op, mode) | |
2022 | register rtx op; | |
296b8152 | 2023 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2024 | { |
2025 | enum rtx_code code = GET_CODE (op); | |
2026 | enum machine_mode cc_mode; | |
2027 | ||
2028 | if (GET_RTX_CLASS (code) != '<') | |
2029 | return 0; | |
2030 | ||
2031 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2032 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2033 | return 0; | |
2034 | ||
2035 | if ((code == GT || code == LT || code == GE || code == LE) | |
2036 | && cc_mode == CCUNSmode) | |
2037 | return 0; | |
2038 | ||
2039 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2040 | && (cc_mode != CCUNSmode)) | |
2041 | return 0; | |
2042 | ||
2043 | return 1; | |
2044 | } | |
2045 | ||
2046 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
2047 | We check the opcode against the mode of the CC value and disallow EQ or | |
2048 | NE comparisons for integers. */ | |
2049 | ||
2050 | int | |
2051 | scc_comparison_operator (op, mode) | |
2052 | register rtx op; | |
2053 | enum machine_mode mode; | |
2054 | { | |
2055 | enum rtx_code code = GET_CODE (op); | |
2056 | enum machine_mode cc_mode; | |
2057 | ||
2058 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
2059 | return 0; | |
2060 | ||
2061 | if (GET_RTX_CLASS (code) != '<') | |
2062 | return 0; | |
2063 | ||
2064 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2065 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2066 | return 0; | |
2067 | ||
2068 | if (code == NE && cc_mode != CCFPmode) | |
2069 | return 0; | |
2070 | ||
2071 | if ((code == GT || code == LT || code == GE || code == LE) | |
2072 | && cc_mode == CCUNSmode) | |
2073 | return 0; | |
2074 | ||
2075 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2076 | && (cc_mode != CCUNSmode)) | |
2077 | return 0; | |
2078 | ||
c5defebb RK |
2079 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
2080 | return 0; | |
2081 | ||
9878760c RK |
2082 | return 1; |
2083 | } | |
e0cd0770 JC |
2084 | |
2085 | int | |
2086 | trap_comparison_operator (op, mode) | |
2087 | rtx op; | |
2088 | enum machine_mode mode; | |
2089 | { | |
2090 | if (mode != VOIDmode && mode != GET_MODE (op)) | |
2091 | return 0; | |
2092 | return (GET_RTX_CLASS (GET_CODE (op)) == '<' | |
2093 | || GET_CODE (op) == EQ || GET_CODE (op) == NE); | |
2094 | } | |
9878760c RK |
2095 | \f |
2096 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
2097 | mask required to convert the result of a rotate insn into a shift | |
2098 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
2099 | ||
2100 | int | |
2101 | includes_lshift_p (shiftop, andop) | |
2102 | register rtx shiftop; | |
2103 | register rtx andop; | |
2104 | { | |
2105 | int shift_mask = (~0 << INTVAL (shiftop)); | |
2106 | ||
2107 | return (INTVAL (andop) & ~shift_mask) == 0; | |
2108 | } | |
2109 | ||
2110 | /* Similar, but for right shift. */ | |
2111 | ||
2112 | int | |
2113 | includes_rshift_p (shiftop, andop) | |
2114 | register rtx shiftop; | |
2115 | register rtx andop; | |
2116 | { | |
a7653a2c | 2117 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
2118 | |
2119 | shift_mask >>= INTVAL (shiftop); | |
2120 | ||
2121 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
2122 | } | |
35068b43 RK |
2123 | |
2124 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2125 | for lfq and stfq insns. | |
2126 | ||
2127 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2128 | abort if we are passed pseudo registers. */ | |
2129 | ||
2130 | int | |
2131 | registers_ok_for_quad_peep (reg1, reg2) | |
2132 | rtx reg1, reg2; | |
2133 | { | |
2134 | /* We might have been passed a SUBREG. */ | |
2135 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2136 | return 0; | |
2137 | ||
2138 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2139 | } | |
2140 | ||
2141 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2142 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2143 | ||
2144 | int | |
2145 | addrs_ok_for_quad_peep (addr1, addr2) | |
2146 | register rtx addr1; | |
2147 | register rtx addr2; | |
2148 | { | |
2149 | int reg1; | |
2150 | int offset1; | |
2151 | ||
2152 | /* Extract an offset (if used) from the first addr. */ | |
2153 | if (GET_CODE (addr1) == PLUS) | |
2154 | { | |
2155 | /* If not a REG, return zero. */ | |
2156 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2157 | return 0; | |
2158 | else | |
2159 | { | |
2160 | reg1 = REGNO (XEXP (addr1, 0)); | |
2161 | /* The offset must be constant! */ | |
2162 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2163 | return 0; | |
2164 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2165 | } | |
2166 | } | |
2167 | else if (GET_CODE (addr1) != REG) | |
2168 | return 0; | |
2169 | else | |
2170 | { | |
2171 | reg1 = REGNO (addr1); | |
2172 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2173 | offset1 = 0; | |
2174 | } | |
2175 | ||
2176 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2177 | if (GET_CODE (addr2) != PLUS) | |
2178 | return 0; | |
2179 | ||
2180 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2181 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2182 | return 0; | |
2183 | ||
2184 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2185 | return 0; | |
2186 | ||
2187 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2188 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2189 | return 0; | |
2190 | ||
2191 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2192 | instructions. */ | |
2193 | return 1; | |
2194 | } | |
9878760c RK |
2195 | \f |
2196 | /* Return the register class of a scratch register needed to copy IN into | |
2197 | or out of a register in CLASS in MODE. If it can be done directly, | |
2198 | NO_REGS is returned. */ | |
2199 | ||
2200 | enum reg_class | |
2201 | secondary_reload_class (class, mode, in) | |
2202 | enum reg_class class; | |
296b8152 | 2203 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2204 | rtx in; |
2205 | { | |
5accd822 | 2206 | int regno; |
9878760c | 2207 | |
1427100a | 2208 | /* We can not copy a symbolic operand directly into anything other than |
e7b7998a JL |
2209 | BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS |
2210 | is needed as an intermediate register. */ | |
2211 | if (TARGET_ELF | |
2212 | && class != BASE_REGS | |
2213 | && (GET_CODE (in) == SYMBOL_REF | |
2214 | || GET_CODE (in) == LABEL_REF | |
2215 | || GET_CODE (in) == CONST)) | |
2216 | return BASE_REGS; | |
2217 | ||
5accd822 DE |
2218 | if (GET_CODE (in) == REG) |
2219 | { | |
2220 | regno = REGNO (in); | |
2221 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2222 | { | |
2223 | regno = true_regnum (in); | |
2224 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2225 | regno = -1; | |
2226 | } | |
2227 | } | |
2228 | else if (GET_CODE (in) == SUBREG) | |
2229 | { | |
2230 | regno = true_regnum (in); | |
2231 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2232 | regno = -1; | |
2233 | } | |
2234 | else | |
2235 | regno = -1; | |
2236 | ||
9878760c RK |
2237 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS |
2238 | into anything. */ | |
2239 | if (class == GENERAL_REGS || class == BASE_REGS | |
2240 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2241 | return NO_REGS; | |
2242 | ||
2243 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2244 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2245 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2246 | return NO_REGS; | |
2247 | ||
2248 | /* We can copy among the CR registers. */ | |
2249 | if ((class == CR_REGS || class == CR0_REGS) | |
2250 | && regno >= 0 && CR_REGNO_P (regno)) | |
2251 | return NO_REGS; | |
2252 | ||
2253 | /* Otherwise, we need GENERAL_REGS. */ | |
2254 | return GENERAL_REGS; | |
2255 | } | |
2256 | \f | |
2257 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2258 | know this is a valid comparison. | |
2259 | ||
2260 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2261 | used instead of %C, so the bits will be in different places. | |
2262 | ||
b4ac57ab | 2263 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2264 | |
2265 | int | |
2266 | ccr_bit (op, scc_p) | |
2267 | register rtx op; | |
2268 | int scc_p; | |
2269 | { | |
2270 | enum rtx_code code = GET_CODE (op); | |
2271 | enum machine_mode cc_mode; | |
2272 | int cc_regnum; | |
2273 | int base_bit; | |
2274 | ||
2275 | if (GET_RTX_CLASS (code) != '<') | |
2276 | return -1; | |
2277 | ||
2278 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2279 | cc_regnum = REGNO (XEXP (op, 0)); | |
2280 | base_bit = 4 * (cc_regnum - 68); | |
2281 | ||
c5defebb RK |
2282 | /* In CCEQmode cases we have made sure that the result is always in the |
2283 | third bit of the CR field. */ | |
2284 | ||
2285 | if (cc_mode == CCEQmode) | |
2286 | return base_bit + 3; | |
2287 | ||
9878760c RK |
2288 | switch (code) |
2289 | { | |
2290 | case NE: | |
2291 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2292 | case EQ: | |
2293 | return base_bit + 2; | |
2294 | case GT: case GTU: | |
2295 | return base_bit + 1; | |
2296 | case LT: case LTU: | |
2297 | return base_bit; | |
2298 | ||
2299 | case GE: case GEU: | |
2300 | /* If floating-point, we will have done a cror to put the bit in the | |
2301 | unordered position. So test that bit. For integer, this is ! LT | |
2302 | unless this is an scc insn. */ | |
2303 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2304 | ||
2305 | case LE: case LEU: | |
2306 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2307 | ||
2308 | default: | |
2309 | abort (); | |
2310 | } | |
2311 | } | |
1ff7789b MM |
2312 | \f |
2313 | /* Return the GOT register, creating it if needed. */ | |
2314 | ||
2315 | struct rtx_def * | |
2316 | rs6000_got_register (value) | |
2317 | rtx value; | |
2318 | { | |
da39823a | 2319 | if (!current_function_uses_pic_offset_table || !pic_offset_table_rtx) |
1ff7789b MM |
2320 | { |
2321 | if (reload_in_progress || reload_completed) | |
2322 | fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); | |
2323 | ||
2324 | current_function_uses_pic_offset_table = 1; | |
39403d82 | 2325 | pic_offset_table_rtx = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); |
1ff7789b MM |
2326 | } |
2327 | ||
2328 | return pic_offset_table_rtx; | |
2329 | } | |
2330 | ||
2331 | \f | |
956d6950 | 2332 | /* Replace all occurrences of register FROM with an new pseudo register in an insn X. |
1ff7789b MM |
2333 | Store the pseudo register used in REG. |
2334 | This is only safe during FINALIZE_PIC, since the registers haven't been setup | |
2335 | yet. */ | |
2336 | ||
2337 | static rtx | |
2338 | rs6000_replace_regno (x, from, reg) | |
2339 | rtx x; | |
2340 | int from; | |
2341 | rtx *reg; | |
2342 | { | |
2343 | register int i, j; | |
2344 | register char *fmt; | |
2345 | ||
2346 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2347 | if (!x) | |
2348 | return x; | |
2349 | ||
2350 | switch (GET_CODE (x)) | |
2351 | { | |
2352 | case SCRATCH: | |
2353 | case PC: | |
2354 | case CC0: | |
2355 | case CONST_INT: | |
2356 | case CONST_DOUBLE: | |
2357 | case CONST: | |
2358 | case SYMBOL_REF: | |
2359 | case LABEL_REF: | |
2360 | return x; | |
2361 | ||
2362 | case REG: | |
2363 | if (REGNO (x) == from) | |
2364 | { | |
2365 | if (! *reg) | |
84f414bc | 2366 | *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode); |
1ff7789b MM |
2367 | |
2368 | return *reg; | |
2369 | } | |
2370 | ||
2371 | return x; | |
c4d38ccb MM |
2372 | |
2373 | default: | |
2374 | break; | |
1ff7789b MM |
2375 | } |
2376 | ||
2377 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2378 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2379 | { | |
2380 | if (fmt[i] == 'e') | |
2381 | XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg); | |
2382 | else if (fmt[i] == 'E') | |
2383 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2384 | XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg); | |
2385 | } | |
2386 | ||
2387 | return x; | |
2388 | } | |
2389 | ||
d266da75 MM |
2390 | \f |
2391 | /* By generating position-independent code, when two different | |
2392 | programs (A and B) share a common library (libC.a), the text of | |
2393 | the library can be shared whether or not the library is linked at | |
2394 | the same address for both programs. In some of these | |
2395 | environments, position-independent code requires not only the use | |
2396 | of different addressing modes, but also special code to enable the | |
2397 | use of these addressing modes. | |
2398 | ||
2399 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2400 | codes once the function is being compiled into assembly code, but | |
2401 | not before. (It is not done before, because in the case of | |
2402 | compiling an inline function, it would lead to multiple PIC | |
2403 | prologues being included in functions which used inline functions | |
2404 | and were compiled to assembly language.) */ | |
2405 | ||
2406 | void | |
2407 | rs6000_finalize_pic () | |
2408 | { | |
30ea98f1 | 2409 | /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM |
956d6950 | 2410 | with an appropriate pseudo register. If we find we need GOT/TOC, |
30ea98f1 MM |
2411 | add the appropriate init code. */ |
2412 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
d266da75 | 2413 | { |
30ea98f1 MM |
2414 | rtx insn = get_insns (); |
2415 | rtx reg = NULL_RTX; | |
2416 | rtx first_insn; | |
38c1f2d7 | 2417 | rtx last_insn = NULL_RTX; |
d266da75 | 2418 | |
30ea98f1 MM |
2419 | if (GET_CODE (insn) == NOTE) |
2420 | insn = next_nonnote_insn (insn); | |
d266da75 | 2421 | |
30ea98f1 MM |
2422 | first_insn = insn; |
2423 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2424 | { | |
2425 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1ff7789b | 2426 | { |
30ea98f1 MM |
2427 | PATTERN (insn) = rs6000_replace_regno (PATTERN (insn), |
2428 | GOT_TOC_REGNUM, | |
2429 | ®); | |
2430 | ||
2431 | if (REG_NOTES (insn)) | |
2432 | REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn), | |
1ff7789b MM |
2433 | GOT_TOC_REGNUM, |
2434 | ®); | |
1ff7789b | 2435 | } |
38c1f2d7 MM |
2436 | |
2437 | if (GET_CODE (insn) != NOTE) | |
2438 | last_insn = insn; | |
30ea98f1 | 2439 | } |
1ff7789b | 2440 | |
30ea98f1 MM |
2441 | if (reg) |
2442 | { | |
2443 | rtx init = gen_init_v4_pic (reg); | |
2444 | emit_insn_before (init, first_insn); | |
38c1f2d7 | 2445 | if (!optimize && last_insn) |
39403d82 | 2446 | emit_insn_after (gen_rtx_USE (VOIDmode, reg), last_insn); |
d266da75 MM |
2447 | } |
2448 | } | |
2449 | } | |
2450 | ||
30ea98f1 | 2451 | \f |
956d6950 | 2452 | /* Search for any occurrence of the GOT_TOC register marker that should |
30ea98f1 MM |
2453 | have been eliminated, but may have crept back in. */ |
2454 | ||
2455 | void | |
2456 | rs6000_reorg (insn) | |
2457 | rtx insn; | |
2458 | { | |
2459 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2460 | { | |
39403d82 | 2461 | rtx got_reg = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); |
30ea98f1 MM |
2462 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) |
2463 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2464 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2465 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2466 | } | |
2467 | } | |
2468 | ||
a7df97e6 MM |
2469 | \f |
2470 | /* Define the structure for the machine field in struct function. */ | |
2471 | struct machine_function | |
2472 | { | |
2473 | int sysv_varargs_p; | |
2474 | int save_toc_p; | |
2475 | int fpmem_size; | |
2476 | int fpmem_offset; | |
a04232e5 | 2477 | rtx pic_offset_table_rtx; |
a7df97e6 MM |
2478 | }; |
2479 | ||
2480 | /* Functions to save and restore rs6000_fpmem_size. | |
2481 | These will be called, via pointer variables, | |
2482 | from push_function_context and pop_function_context. */ | |
2483 | ||
2484 | void | |
2485 | rs6000_save_machine_status (p) | |
2486 | struct function *p; | |
2487 | { | |
2488 | struct machine_function *machine = | |
2489 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2490 | ||
2491 | p->machine = machine; | |
2492 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2493 | machine->fpmem_size = rs6000_fpmem_size; |
2494 | machine->fpmem_offset = rs6000_fpmem_offset; | |
a04232e5 | 2495 | machine->pic_offset_table_rtx = pic_offset_table_rtx; |
a7df97e6 MM |
2496 | } |
2497 | ||
2498 | void | |
2499 | rs6000_restore_machine_status (p) | |
2500 | struct function *p; | |
2501 | { | |
2502 | struct machine_function *machine = p->machine; | |
2503 | ||
2504 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2505 | rs6000_fpmem_size = machine->fpmem_size; |
2506 | rs6000_fpmem_offset = machine->fpmem_offset; | |
a04232e5 | 2507 | pic_offset_table_rtx = machine->pic_offset_table_rtx; |
a7df97e6 MM |
2508 | |
2509 | free (machine); | |
2510 | p->machine = (struct machine_function *)0; | |
2511 | } | |
2512 | ||
2513 | /* Do anything needed before RTL is emitted for each function. */ | |
2514 | ||
2515 | void | |
2516 | rs6000_init_expanders () | |
2517 | { | |
2518 | /* Reset varargs and save TOC indicator */ | |
2519 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2520 | rs6000_fpmem_size = 0; |
2521 | rs6000_fpmem_offset = 0; | |
2522 | pic_offset_table_rtx = (rtx)0; | |
2523 | ||
2524 | /* Arrange to save and restore machine status around nested functions. */ | |
2525 | save_machine_status = rs6000_save_machine_status; | |
2526 | restore_machine_status = rs6000_restore_machine_status; | |
2527 | } | |
2528 | ||
9878760c RK |
2529 | \f |
2530 | /* Print an operand. Recognize special options, documented below. */ | |
2531 | ||
38c1f2d7 | 2532 | #if TARGET_ELF |
d9407988 | 2533 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2534 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2535 | #else |
2536 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2537 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2538 | #endif |
2539 | ||
9878760c RK |
2540 | void |
2541 | print_operand (file, x, code) | |
2542 | FILE *file; | |
2543 | rtx x; | |
2544 | char code; | |
2545 | { | |
2546 | int i; | |
a260abc9 | 2547 | HOST_WIDE_INT val; |
9878760c RK |
2548 | |
2549 | /* These macros test for integers and extract the low-order bits. */ | |
2550 | #define INT_P(X) \ | |
2551 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2552 | && GET_MODE (X) == VOIDmode) | |
2553 | ||
2554 | #define INT_LOWPART(X) \ | |
2555 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2556 | ||
2557 | switch (code) | |
2558 | { | |
a8b3aeda | 2559 | case '.': |
a85d226b RK |
2560 | /* Write out an instruction after the call which may be replaced |
2561 | with glue code by the loader. This depends on the AIX version. */ | |
2562 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2563 | return; |
2564 | ||
cfaaaf2e RK |
2565 | case '*': |
2566 | /* Write the register number of the TOC register. */ | |
4697a36c | 2567 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); |
cfaaaf2e RK |
2568 | return; |
2569 | ||
c81bebd7 MM |
2570 | case '$': |
2571 | /* Write out either a '.' or '$' for the current location, depending | |
2572 | on whether this is Solaris or not. */ | |
2573 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2574 | return; | |
2575 | ||
9854d9ed RK |
2576 | case 'A': |
2577 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2578 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2579 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2580 | write a trash instruction. */ |
2581 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2582 | putc ('l', file); |
9854d9ed | 2583 | else |
76229ac8 | 2584 | putc ('r', file); |
9854d9ed RK |
2585 | return; |
2586 | ||
2587 | case 'b': | |
2588 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2589 | if (! INT_P (x)) |
9854d9ed | 2590 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2591 | |
9854d9ed | 2592 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2593 | return; |
2594 | ||
a260abc9 DE |
2595 | case 'B': |
2596 | /* If the low-order bit is zero, write 'r'; otherwise, write 'l' | |
2597 | for 64-bit mask direction. */ | |
296b8152 | 2598 | putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); |
a238cd8b | 2599 | return; |
a260abc9 | 2600 | |
9854d9ed RK |
2601 | case 'C': |
2602 | /* This is an optional cror needed for LE or GE floating-point | |
2603 | comparisons. Otherwise write nothing. */ | |
2604 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2605 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2606 | { | |
2607 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2608 | ||
2609 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2610 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2611 | } | |
2612 | return; | |
2613 | ||
2614 | case 'D': | |
2615 | /* Similar, except that this is for an scc, so we must be able to | |
2616 | encode the test in a single bit that is one. We do the above | |
2617 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2618 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2619 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2620 | { | |
2621 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2622 | ||
2623 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2624 | base_bit + 2, | |
2625 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2626 | } | |
2627 | ||
2628 | else if (GET_CODE (x) == NE) | |
2629 | { | |
2630 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2631 | ||
2632 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2633 | base_bit + 2, base_bit + 2); | |
2634 | } | |
2635 | return; | |
2636 | ||
2637 | case 'E': | |
2638 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2639 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2640 | output_operand_lossage ("invalid %%E value"); | |
2641 | ||
2642 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2643 | return; |
9854d9ed RK |
2644 | |
2645 | case 'f': | |
2646 | /* X is a CR register. Print the shift count needed to move it | |
2647 | to the high-order four bits. */ | |
2648 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2649 | output_operand_lossage ("invalid %%f value"); | |
2650 | else | |
2651 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2652 | return; | |
2653 | ||
2654 | case 'F': | |
2655 | /* Similar, but print the count for the rotate in the opposite | |
2656 | direction. */ | |
2657 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2658 | output_operand_lossage ("invalid %%F value"); | |
2659 | else | |
2660 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2661 | return; | |
2662 | ||
2663 | case 'G': | |
2664 | /* X is a constant integer. If it is negative, print "m", | |
2665 | otherwise print "z". This is to make a aze or ame insn. */ | |
2666 | if (GET_CODE (x) != CONST_INT) | |
2667 | output_operand_lossage ("invalid %%G value"); | |
2668 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2669 | putc ('z', file); |
9854d9ed | 2670 | else |
76229ac8 | 2671 | putc ('m', file); |
9854d9ed RK |
2672 | return; |
2673 | ||
9878760c | 2674 | case 'h': |
df3d94ed RK |
2675 | /* If constant, output low-order five bits. Otherwise, |
2676 | write normally. */ | |
9878760c RK |
2677 | if (INT_P (x)) |
2678 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
2679 | else | |
2680 | print_operand (file, x, 0); | |
2681 | return; | |
2682 | ||
64305719 DE |
2683 | case 'H': |
2684 | /* If constant, output low-order six bits. Otherwise, | |
2685 | write normally. */ | |
2686 | if (INT_P (x)) | |
2687 | fprintf (file, "%d", INT_LOWPART (x) & 63); | |
2688 | else | |
2689 | print_operand (file, x, 0); | |
2690 | return; | |
2691 | ||
9854d9ed RK |
2692 | case 'I': |
2693 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2694 | if (INT_P (x)) |
76229ac8 | 2695 | putc ('i', file); |
9878760c RK |
2696 | return; |
2697 | ||
9854d9ed RK |
2698 | case 'j': |
2699 | /* Write the bit number in CCR for jump. */ | |
2700 | i = ccr_bit (x, 0); | |
2701 | if (i == -1) | |
2702 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2703 | else |
9854d9ed | 2704 | fprintf (file, "%d", i); |
9878760c RK |
2705 | return; |
2706 | ||
9854d9ed RK |
2707 | case 'J': |
2708 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2709 | scc flag to `ccr_bit'. */ | |
2710 | i = ccr_bit (x, 1); | |
2711 | if (i == -1) | |
2712 | output_operand_lossage ("invalid %%J code"); | |
2713 | else | |
a0466a68 RK |
2714 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2715 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2716 | return; |
2717 | ||
9854d9ed RK |
2718 | case 'k': |
2719 | /* X must be a constant. Write the 1's complement of the | |
2720 | constant. */ | |
9878760c | 2721 | if (! INT_P (x)) |
9854d9ed | 2722 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2723 | |
9854d9ed | 2724 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2725 | return; |
2726 | ||
9854d9ed RK |
2727 | case 'L': |
2728 | /* Write second word of DImode or DFmode reference. Works on register | |
2729 | or non-indexed memory only. */ | |
2730 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2731 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2732 | else if (GET_CODE (x) == MEM) |
2733 | { | |
2734 | /* Handle possible auto-increment. Since it is pre-increment and | |
1427100a | 2735 | we have already done it, we can just use an offset of word. */ |
9854d9ed RK |
2736 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2737 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
1427100a DE |
2738 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), |
2739 | UNITS_PER_WORD)); | |
9854d9ed | 2740 | else |
1427100a | 2741 | output_address (plus_constant (XEXP (x, 0), UNITS_PER_WORD)); |
ba5e43aa | 2742 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2743 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2744 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2745 | } |
9878760c | 2746 | return; |
9854d9ed | 2747 | |
9878760c RK |
2748 | case 'm': |
2749 | /* MB value for a mask operand. */ | |
2750 | if (! mask_operand (x, VOIDmode)) | |
2751 | output_operand_lossage ("invalid %%m value"); | |
2752 | ||
2753 | val = INT_LOWPART (x); | |
2754 | ||
2755 | /* If the high bit is set and the low bit is not, the value is zero. | |
2756 | If the high bit is zero, the value is the first 1 bit we find from | |
2757 | the left. */ | |
34792e82 | 2758 | if ((val & 0x80000000) && ((val & 1) == 0)) |
9878760c | 2759 | { |
19d2d16f | 2760 | putc ('0', file); |
9878760c RK |
2761 | return; |
2762 | } | |
34792e82 | 2763 | else if ((val & 0x80000000) == 0) |
9878760c RK |
2764 | { |
2765 | for (i = 1; i < 32; i++) | |
34792e82 | 2766 | if ((val <<= 1) & 0x80000000) |
9878760c RK |
2767 | break; |
2768 | fprintf (file, "%d", i); | |
2769 | return; | |
2770 | } | |
2771 | ||
2772 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2773 | number plus 1. We know the low-order bit is one. */ | |
2774 | for (i = 0; i < 32; i++) | |
2775 | if (((val >>= 1) & 1) == 0) | |
2776 | break; | |
2777 | ||
a260abc9 | 2778 | /* If we ended in ...01, i would be 0. The correct value is 31, so |
9878760c RK |
2779 | we want 31 - i. */ |
2780 | fprintf (file, "%d", 31 - i); | |
2781 | return; | |
2782 | ||
2783 | case 'M': | |
2784 | /* ME value for a mask operand. */ | |
2785 | if (! mask_operand (x, VOIDmode)) | |
a260abc9 | 2786 | output_operand_lossage ("invalid %%M value"); |
9878760c RK |
2787 | |
2788 | val = INT_LOWPART (x); | |
2789 | ||
2790 | /* If the low bit is set and the high bit is not, the value is 31. | |
2791 | If the low bit is zero, the value is the first 1 bit we find from | |
2792 | the right. */ | |
34792e82 | 2793 | if ((val & 1) && ((val & 0x80000000) == 0)) |
9878760c | 2794 | { |
76229ac8 | 2795 | fputs ("31", file); |
9878760c RK |
2796 | return; |
2797 | } | |
2798 | else if ((val & 1) == 0) | |
2799 | { | |
2800 | for (i = 0; i < 32; i++) | |
2801 | if ((val >>= 1) & 1) | |
2802 | break; | |
2803 | ||
a260abc9 | 2804 | /* If we had ....10, i would be 0. The result should be |
9878760c RK |
2805 | 30, so we need 30 - i. */ |
2806 | fprintf (file, "%d", 30 - i); | |
2807 | return; | |
2808 | } | |
2809 | ||
2810 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2811 | number minus 1. We know the high-order bit is one. */ | |
2812 | for (i = 0; i < 32; i++) | |
34792e82 | 2813 | if (((val <<= 1) & 0x80000000) == 0) |
9878760c RK |
2814 | break; |
2815 | ||
2816 | fprintf (file, "%d", i); | |
2817 | return; | |
2818 | ||
9878760c RK |
2819 | case 'N': |
2820 | /* Write the number of elements in the vector times 4. */ | |
2821 | if (GET_CODE (x) != PARALLEL) | |
2822 | output_operand_lossage ("invalid %%N value"); | |
2823 | ||
2824 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2825 | return; | |
2826 | ||
2827 | case 'O': | |
2828 | /* Similar, but subtract 1 first. */ | |
2829 | if (GET_CODE (x) != PARALLEL) | |
1427100a | 2830 | output_operand_lossage ("invalid %%O value"); |
9878760c RK |
2831 | |
2832 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2833 | return; | |
2834 | ||
9854d9ed RK |
2835 | case 'p': |
2836 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2837 | if (! INT_P (x) | |
2838 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2839 | output_operand_lossage ("invalid %%p value"); | |
2840 | ||
2841 | fprintf (file, "%d", i); | |
2842 | return; | |
2843 | ||
9878760c RK |
2844 | case 'P': |
2845 | /* The operand must be an indirect memory reference. The result | |
2846 | is the register number. */ | |
2847 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2848 | || REGNO (XEXP (x, 0)) >= 32) | |
2849 | output_operand_lossage ("invalid %%P value"); | |
2850 | ||
2851 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2852 | return; | |
2853 | ||
9854d9ed RK |
2854 | case 'R': |
2855 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2856 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2857 | output_operand_lossage ("invalid %%R value"); | |
2858 | else | |
2859 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2860 | return; |
9854d9ed RK |
2861 | |
2862 | case 's': | |
2863 | /* Low 5 bits of 32 - value */ | |
2864 | if (! INT_P (x)) | |
2865 | output_operand_lossage ("invalid %%s value"); | |
2866 | ||
2867 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 2868 | return; |
9854d9ed | 2869 | |
a260abc9 DE |
2870 | case 'S': |
2871 | /* PowerPC64 mask position. All 0's and all 1's are excluded. | |
2872 | CONST_INT 32-bit mask is considered sign-extended so any | |
2873 | transition must occur within the CONST_INT, not on the boundary. */ | |
2874 | if (! mask64_operand (x, VOIDmode)) | |
2875 | output_operand_lossage ("invalid %%S value"); | |
2876 | ||
2877 | val = INT_LOWPART (x); | |
2878 | ||
2879 | if (val & 1) /* Clear Left */ | |
2880 | { | |
a238cd8b DE |
2881 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2882 | if (!((val >>= 1) & 1)) | |
2883 | break; | |
a260abc9 | 2884 | |
a238cd8b DE |
2885 | #if HOST_BITS_PER_WIDE_INT == 32 |
2886 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) | |
2887 | { | |
2888 | val = CONST_DOUBLE_HIGH (x); | |
2889 | ||
2890 | if (val == 0) | |
2891 | --i; | |
2892 | else | |
2893 | for (i = 32; i < 64; i++) | |
2894 | if (!((val >>= 1) & 1)) | |
2895 | break; | |
2896 | } | |
a260abc9 | 2897 | #endif |
a238cd8b DE |
2898 | /* i = index of last set bit from right |
2899 | mask begins at 63 - i from left */ | |
2900 | if (i > 63) | |
2901 | output_operand_lossage ("%%S computed all 1's mask"); | |
a260abc9 DE |
2902 | fprintf (file, "%d", 63 - i); |
2903 | return; | |
2904 | } | |
2905 | else /* Clear Right */ | |
2906 | { | |
a238cd8b DE |
2907 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2908 | if ((val >>= 1) & 1) | |
2909 | break; | |
a260abc9 | 2910 | |
a238cd8b | 2911 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
2912 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) |
2913 | { | |
a238cd8b | 2914 | val = CONST_DOUBLE_HIGH (x); |
a260abc9 | 2915 | |
a238cd8b | 2916 | if (val == (HOST_WIDE_INT) -1) |
a260abc9 | 2917 | --i; |
a260abc9 | 2918 | else |
a238cd8b DE |
2919 | for (i = 32; i < 64; i++) |
2920 | if ((val >>= 1) & 1) | |
a260abc9 DE |
2921 | break; |
2922 | } | |
2923 | #endif | |
a238cd8b DE |
2924 | /* i = index of last clear bit from right |
2925 | mask ends at 62 - i from left */ | |
2926 | if (i > 62) | |
2927 | output_operand_lossage ("%%S computed all 0's mask"); | |
2928 | fprintf (file, "%d", 62 - i); | |
a260abc9 DE |
2929 | return; |
2930 | } | |
2931 | ||
9878760c RK |
2932 | case 't': |
2933 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2934 | All floating-point operations except NE branch true and integer | |
2935 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2936 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2937 | output_operand_lossage ("invalid %%t value"); | |
2938 | ||
2939 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2940 | && GET_CODE (x) != NE) | |
2941 | || GET_CODE (x) == EQ | |
2942 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2943 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2944 | fputs ("12", file); |
9878760c | 2945 | else |
76229ac8 | 2946 | putc ('4', file); |
9878760c RK |
2947 | return; |
2948 | ||
2949 | case 'T': | |
2950 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2951 | 12 otherwise. */ | |
2952 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1427100a | 2953 | output_operand_lossage ("invalid %%T value"); |
9878760c RK |
2954 | |
2955 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2956 | && GET_CODE (x) != NE) | |
2957 | || GET_CODE (x) == EQ | |
2958 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2959 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2960 | putc ('4', file); |
9878760c | 2961 | else |
76229ac8 | 2962 | fputs ("12", file); |
9878760c RK |
2963 | return; |
2964 | ||
9854d9ed | 2965 | case 'u': |
802a0058 | 2966 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
2967 | if (! INT_P (x)) |
2968 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 2969 | |
76229ac8 | 2970 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
2971 | return; |
2972 | ||
802a0058 MM |
2973 | case 'v': |
2974 | /* High-order 16 bits of constant for use in signed operand. */ | |
2975 | if (! INT_P (x)) | |
2976 | output_operand_lossage ("invalid %%v value"); | |
2977 | ||
2978 | { | |
2979 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
2980 | ||
2981 | /* Solaris assembler doesn't like lis 0,0x80000 */ | |
2982 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) | |
2983 | fprintf (file, "%d", value | (~0 << 16)); | |
2984 | else | |
2985 | fprintf (file, "0x%x", value); | |
2986 | return; | |
2987 | } | |
2988 | ||
9854d9ed RK |
2989 | case 'U': |
2990 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
2991 | if (GET_CODE (x) == MEM | |
2992 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2993 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 2994 | putc ('u', file); |
9854d9ed | 2995 | return; |
9878760c | 2996 | |
e0cd0770 JC |
2997 | case 'V': |
2998 | /* Print the trap code for this operand. */ | |
2999 | switch (GET_CODE (x)) | |
3000 | { | |
3001 | case EQ: | |
3002 | fputs ("eq", file); /* 4 */ | |
3003 | break; | |
3004 | case NE: | |
3005 | fputs ("ne", file); /* 24 */ | |
3006 | break; | |
3007 | case LT: | |
3008 | fputs ("lt", file); /* 16 */ | |
3009 | break; | |
3010 | case LE: | |
3011 | fputs ("le", file); /* 20 */ | |
3012 | break; | |
3013 | case GT: | |
3014 | fputs ("gt", file); /* 8 */ | |
3015 | break; | |
3016 | case GE: | |
3017 | fputs ("ge", file); /* 12 */ | |
3018 | break; | |
3019 | case LTU: | |
3020 | fputs ("llt", file); /* 2 */ | |
3021 | break; | |
3022 | case LEU: | |
3023 | fputs ("lle", file); /* 6 */ | |
3024 | break; | |
3025 | case GTU: | |
3026 | fputs ("lgt", file); /* 1 */ | |
3027 | break; | |
3028 | case GEU: | |
3029 | fputs ("lge", file); /* 5 */ | |
3030 | break; | |
3031 | default: | |
3032 | abort (); | |
3033 | } | |
3034 | break; | |
3035 | ||
9854d9ed RK |
3036 | case 'w': |
3037 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
3038 | normally. */ | |
3039 | if (INT_P (x)) | |
3040 | fprintf (file, "%d", | |
3041 | (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); | |
3042 | else | |
3043 | print_operand (file, x, 0); | |
9878760c RK |
3044 | return; |
3045 | ||
9854d9ed RK |
3046 | case 'W': |
3047 | /* If constant, low-order 16 bits of constant, unsigned. | |
3048 | Otherwise, write normally. */ | |
3049 | if (INT_P (x)) | |
3050 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
3051 | else | |
3052 | print_operand (file, x, 0); | |
3053 | return; | |
9878760c | 3054 | |
9854d9ed RK |
3055 | case 'X': |
3056 | if (GET_CODE (x) == MEM | |
3057 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 3058 | putc ('x', file); |
9854d9ed | 3059 | return; |
9878760c | 3060 | |
9854d9ed RK |
3061 | case 'Y': |
3062 | /* Like 'L', for third word of TImode */ | |
3063 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3064 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 3065 | else if (GET_CODE (x) == MEM) |
9878760c | 3066 | { |
9854d9ed RK |
3067 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3068 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3069 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 3070 | else |
a54d04b7 | 3071 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 3072 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3073 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3074 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
3075 | } |
3076 | return; | |
9854d9ed | 3077 | |
9878760c | 3078 | case 'z': |
b4ac57ab RS |
3079 | /* X is a SYMBOL_REF. Write out the name preceded by a |
3080 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
3081 | names. If we are configured for System V (or the embedded ABI) on |
3082 | the PowerPC, do not emit the period, since those systems do not use | |
3083 | TOCs and the like. */ | |
9878760c RK |
3084 | if (GET_CODE (x) != SYMBOL_REF) |
3085 | abort (); | |
3086 | ||
b6c9286a MM |
3087 | if (XSTR (x, 0)[0] != '.') |
3088 | { | |
3089 | switch (DEFAULT_ABI) | |
3090 | { | |
3091 | default: | |
3092 | abort (); | |
3093 | ||
3094 | case ABI_AIX: | |
3095 | putc ('.', file); | |
3096 | break; | |
3097 | ||
3098 | case ABI_V4: | |
3099 | case ABI_AIX_NODESC: | |
c81bebd7 | 3100 | case ABI_SOLARIS: |
b6c9286a MM |
3101 | break; |
3102 | ||
3103 | case ABI_NT: | |
3104 | fputs ("..", file); | |
3105 | break; | |
3106 | } | |
3107 | } | |
9878760c RK |
3108 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
3109 | return; | |
3110 | ||
9854d9ed RK |
3111 | case 'Z': |
3112 | /* Like 'L', for last word of TImode. */ | |
3113 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3114 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
3115 | else if (GET_CODE (x) == MEM) |
3116 | { | |
3117 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3118 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3119 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 3120 | else |
a54d04b7 | 3121 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 3122 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3123 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3124 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3125 | } |
5c23c401 | 3126 | return; |
9854d9ed | 3127 | |
9878760c RK |
3128 | case 0: |
3129 | if (GET_CODE (x) == REG) | |
3130 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
3131 | else if (GET_CODE (x) == MEM) | |
3132 | { | |
3133 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
3134 | know the width from the mode. */ | |
3135 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
3136 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
3137 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3138 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
3139 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
3140 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3141 | else | |
a54d04b7 | 3142 | output_address (XEXP (x, 0)); |
9878760c RK |
3143 | } |
3144 | else | |
a54d04b7 | 3145 | output_addr_const (file, x); |
a85d226b | 3146 | return; |
9878760c RK |
3147 | |
3148 | default: | |
3149 | output_operand_lossage ("invalid %%xn code"); | |
3150 | } | |
3151 | } | |
3152 | \f | |
3153 | /* Print the address of an operand. */ | |
3154 | ||
3155 | void | |
3156 | print_operand_address (file, x) | |
3157 | FILE *file; | |
3158 | register rtx x; | |
3159 | { | |
3160 | if (GET_CODE (x) == REG) | |
4697a36c | 3161 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 3162 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
3163 | { |
3164 | output_addr_const (file, x); | |
ba5e43aa | 3165 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3166 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3167 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 3168 | |
4697a36c | 3169 | #ifdef TARGET_NO_TOC |
7509c759 | 3170 | else if (TARGET_NO_TOC) |
4697a36c | 3171 | ; |
4697a36c | 3172 | #endif |
7509c759 | 3173 | else |
4697a36c | 3174 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); |
9878760c RK |
3175 | } |
3176 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
3177 | { | |
3178 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
3179 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
3180 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 3181 | else |
4697a36c MM |
3182 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
3183 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
3184 | } |
3185 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
4697a36c MM |
3186 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
3187 | else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM | |
3188 | && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) | |
3189 | { | |
3190 | output_addr_const (file, XEXP (x, 1)); | |
3191 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3192 | } | |
9878760c RK |
3193 | else |
3194 | abort (); | |
3195 | } | |
3196 | \f | |
3197 | /* This page contains routines that are used to determine what the function | |
3198 | prologue and epilogue code will do and write them out. */ | |
3199 | ||
3200 | /* Return the first fixed-point register that is required to be saved. 32 if | |
3201 | none. */ | |
3202 | ||
3203 | int | |
3204 | first_reg_to_save () | |
3205 | { | |
3206 | int first_reg; | |
3207 | ||
3208 | /* Find lowest numbered live register. */ | |
3209 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
3210 | if (regs_ever_live[first_reg]) | |
3211 | break; | |
3212 | ||
e165f3f0 | 3213 | /* If profiling, then we must save/restore every register that contains |
9c849d2a | 3214 | a parameter before/after the .__mcount call. Use registers from 30 down |
e165f3f0 RK |
3215 | to 23 to do this. Don't use the frame pointer in reg 31. |
3216 | ||
3217 | For now, save enough room for all of the parameter registers. */ | |
b6c9286a | 3218 | if (DEFAULT_ABI == ABI_AIX && profile_flag) |
e165f3f0 RK |
3219 | if (first_reg > 23) |
3220 | first_reg = 23; | |
3221 | ||
9878760c RK |
3222 | return first_reg; |
3223 | } | |
3224 | ||
3225 | /* Similar, for FP regs. */ | |
3226 | ||
3227 | int | |
3228 | first_fp_reg_to_save () | |
3229 | { | |
3230 | int first_reg; | |
3231 | ||
3232 | /* Find lowest numbered live register. */ | |
3233 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
3234 | if (regs_ever_live[first_reg]) | |
3235 | break; | |
3236 | ||
3237 | return first_reg; | |
3238 | } | |
3239 | ||
9878760c RK |
3240 | /* Return non-zero if this function makes calls. */ |
3241 | ||
3242 | int | |
3243 | rs6000_makes_calls () | |
3244 | { | |
3245 | rtx insn; | |
3246 | ||
38c1f2d7 MM |
3247 | /* If we are profiling, we will be making a call to __mcount. |
3248 | Under the System V ABI's, we store the LR directly, so | |
3249 | we don't need to do it here. */ | |
3250 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
3251 | return 1; |
3252 | ||
9878760c RK |
3253 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
3254 | if (GET_CODE (insn) == CALL_INSN) | |
3255 | return 1; | |
3256 | ||
3257 | return 0; | |
3258 | } | |
3259 | ||
4697a36c MM |
3260 | \f |
3261 | /* Calculate the stack information for the current function. This is | |
3262 | complicated by having two separate calling sequences, the AIX calling | |
3263 | sequence and the V.4 calling sequence. | |
3264 | ||
3265 | AIX stack frames look like: | |
a260abc9 | 3266 | 32-bit 64-bit |
4697a36c | 3267 | SP----> +---------------------------------------+ |
a260abc9 | 3268 | | back chain to caller | 0 0 |
4697a36c | 3269 | +---------------------------------------+ |
a260abc9 | 3270 | | saved CR | 4 8 (8-11) |
4697a36c | 3271 | +---------------------------------------+ |
a260abc9 | 3272 | | saved LR | 8 16 |
4697a36c | 3273 | +---------------------------------------+ |
a260abc9 | 3274 | | reserved for compilers | 12 24 |
4697a36c | 3275 | +---------------------------------------+ |
a260abc9 | 3276 | | reserved for binders | 16 32 |
4697a36c | 3277 | +---------------------------------------+ |
a260abc9 | 3278 | | saved TOC pointer | 20 40 |
4697a36c | 3279 | +---------------------------------------+ |
a260abc9 | 3280 | | Parameter save area (P) | 24 48 |
4697a36c | 3281 | +---------------------------------------+ |
a260abc9 | 3282 | | Alloca space (A) | 24+P etc. |
802a0058 | 3283 | +---------------------------------------+ |
a7df97e6 | 3284 | | Local variable space (L) | 24+P+A |
4697a36c | 3285 | +---------------------------------------+ |
a7df97e6 | 3286 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3287 | +---------------------------------------+ |
a7df97e6 | 3288 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3289 | +---------------------------------------+ |
a7df97e6 | 3290 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3291 | +---------------------------------------+ |
3292 | old SP->| back chain to caller's caller | | |
3293 | +---------------------------------------+ | |
3294 | ||
5376a30c KR |
3295 | The required alignment for AIX configurations is two words (i.e., 8 |
3296 | or 16 bytes). | |
3297 | ||
3298 | ||
4697a36c MM |
3299 | V.4 stack frames look like: |
3300 | ||
3301 | SP----> +---------------------------------------+ | |
3302 | | back chain to caller | 0 | |
3303 | +---------------------------------------+ | |
5eb387b8 | 3304 | | caller's saved LR | 4 |
4697a36c MM |
3305 | +---------------------------------------+ |
3306 | | Parameter save area (P) | 8 | |
3307 | +---------------------------------------+ | |
a7df97e6 MM |
3308 | | Alloca space (A) | 8+P |
3309 | +---------------------------------------+ | |
3310 | | Varargs save area (V) | 8+P+A | |
3311 | +---------------------------------------+ | |
3312 | | Local variable space (L) | 8+P+A+V | |
3313 | +---------------------------------------+ | |
3314 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3315 | +---------------------------------------+ |
a7df97e6 MM |
3316 | | saved CR (C) | 8+P+A+V+L+X |
3317 | +---------------------------------------+ | |
3318 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3319 | +---------------------------------------+ | |
3320 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3321 | +---------------------------------------+ |
3322 | old SP->| back chain to caller's caller | | |
3323 | +---------------------------------------+ | |
b6c9286a | 3324 | |
5376a30c KR |
3325 | The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is |
3326 | given. (But note below and in sysv4.h that we require only 8 and | |
3327 | may round up the size of our stack frame anyways. The historical | |
3328 | reason is early versions of powerpc-linux which didn't properly | |
3329 | align the stack at program startup. A happy side-effect is that | |
3330 | -mno-eabi libraries can be used with -meabi programs.) | |
3331 | ||
b6c9286a MM |
3332 | |
3333 | A PowerPC Windows/NT frame looks like: | |
3334 | ||
3335 | SP----> +---------------------------------------+ | |
3336 | | back chain to caller | 0 | |
3337 | +---------------------------------------+ | |
3338 | | reserved | 4 | |
3339 | +---------------------------------------+ | |
3340 | | reserved | 8 | |
3341 | +---------------------------------------+ | |
3342 | | reserved | 12 | |
3343 | +---------------------------------------+ | |
3344 | | reserved | 16 | |
3345 | +---------------------------------------+ | |
3346 | | reserved | 20 | |
3347 | +---------------------------------------+ | |
3348 | | Parameter save area (P) | 24 | |
3349 | +---------------------------------------+ | |
a7df97e6 MM |
3350 | | Alloca space (A) | 24+P |
3351 | +---------------------------------------+ | |
3352 | | Local variable space (L) | 24+P+A | |
3353 | +---------------------------------------+ | |
3354 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3355 | +---------------------------------------+ |
a7df97e6 MM |
3356 | | Save area for FP registers (F) | 24+P+A+L+X |
3357 | +---------------------------------------+ | |
3358 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3359 | +---------------------------------------+ | |
3360 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3361 | +---------------------------------------+ | |
3362 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3363 | +---------------------------------------+ | |
3364 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3365 | +---------------------------------------+ | |
3366 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3367 | +---------------------------------------+ |
3368 | old SP->| back chain to caller's caller | | |
3369 | +---------------------------------------+ | |
3370 | ||
3371 | For NT, there is no specific order to save the registers, but in | |
3372 | order to support __builtin_return_address, the save area for the | |
3373 | link register needs to be in a known place, so we use -4 off of the | |
3374 | old SP. To support calls through pointers, we also allocate a | |
5376a30c KR |
3375 | fixed slot to store the TOC, -8 off the old SP. |
3376 | ||
3377 | The required alignment for NT is 16 bytes. | |
3378 | ||
3379 | ||
3380 | The EABI configuration defaults to the V.4 layout, unless | |
3381 | -mcall-aix is used, in which case the AIX layout is used. However, | |
3382 | the stack alignment requirements may differ. If -mno-eabi is not | |
3383 | given, the required stack alignment is 8 bytes; if -mno-eabi is | |
3384 | given, the required alignment is 16 bytes. (But see V.4 comment | |
3385 | above.) */ | |
4697a36c | 3386 | |
61b2fbe7 MM |
3387 | #ifndef ABI_STACK_BOUNDARY |
3388 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3389 | #endif | |
3390 | ||
4697a36c MM |
3391 | rs6000_stack_t * |
3392 | rs6000_stack_info () | |
3393 | { | |
3394 | static rs6000_stack_t info, zero_info; | |
3395 | rs6000_stack_t *info_ptr = &info; | |
a260abc9 | 3396 | int reg_size = TARGET_32BIT ? 4 : 8; |
24d304eb | 3397 | enum rs6000_abi abi; |
b6c9286a | 3398 | int total_raw_size; |
4697a36c MM |
3399 | |
3400 | /* Zero all fields portably */ | |
3401 | info = zero_info; | |
3402 | ||
3403 | /* Select which calling sequence */ | |
b6c9286a | 3404 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3405 | |
4697a36c MM |
3406 | /* Calculate which registers need to be saved & save area size */ |
3407 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3408 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3409 | ||
3410 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3411 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3412 | ||
3413 | /* Does this function call anything? */ | |
3414 | info_ptr->calls_p = rs6000_makes_calls (); | |
3415 | ||
62c0fb87 | 3416 | /* Allocate space to save the toc. */ |
82280d5e | 3417 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3418 | { |
3419 | info_ptr->toc_save_p = 1; | |
3420 | info_ptr->toc_size = reg_size; | |
3421 | } | |
3422 | ||
802a0058 MM |
3423 | /* Does this machine need the float/int conversion area? */ |
3424 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3425 | ||
b6c9286a MM |
3426 | /* If this is main and we need to call a function to set things up, |
3427 | save main's arguments around the call. */ | |
c81bebd7 MM |
3428 | #ifdef TARGET_EABI |
3429 | if (TARGET_EABI) | |
3430 | #endif | |
b6c9286a | 3431 | { |
30ccf55d MS |
3432 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3433 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3434 | { |
c81bebd7 | 3435 | info_ptr->main_p = 1; |
b6c9286a | 3436 | |
c81bebd7 MM |
3437 | #ifdef NAME__MAIN |
3438 | info_ptr->calls_p = 1; | |
b6c9286a | 3439 | |
c81bebd7 | 3440 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3441 | { |
c81bebd7 MM |
3442 | int i; |
3443 | tree arg; | |
3444 | ||
3445 | info_ptr->main_save_p = 1; | |
3446 | info_ptr->main_size = 0; | |
3447 | ||
3448 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3449 | arg != NULL_TREE && i < 8; | |
3450 | (arg = TREE_CHAIN (arg)), i++) | |
3451 | { | |
3452 | info_ptr->main_size += reg_size; | |
3453 | } | |
b6c9286a | 3454 | } |
b6c9286a | 3455 | #endif |
c81bebd7 | 3456 | } |
b6c9286a MM |
3457 | } |
3458 | ||
4697a36c | 3459 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3460 | if (regs_ever_live[65] |
3461 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3462 | #ifdef TARGET_RELOCATABLE |
3463 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3464 | #endif | |
3465 | || (info_ptr->first_fp_reg_save != 64 | |
3466 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3467 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3468 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3469 | || info_ptr->calls_p) |
3470 | { | |
3471 | info_ptr->lr_save_p = 1; | |
3472 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3473 | if (abi == ABI_NT) |
3474 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3475 | } |
3476 | ||
3477 | /* Determine if we need to save the condition code registers */ | |
3478 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3479 | { | |
3480 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3481 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3482 | info_ptr->cr_size = reg_size; |
3483 | } | |
3484 | ||
3485 | /* Determine various sizes */ | |
3486 | info_ptr->reg_size = reg_size; | |
3487 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3488 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3489 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3490 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3491 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3492 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3493 | + info_ptr->gp_size |
3494 | + info_ptr->cr_size | |
3495 | + info_ptr->lr_size | |
3496 | + info_ptr->toc_size | |
3497 | + info_ptr->main_size, 8); | |
3498 | ||
4697a36c | 3499 | /* Calculate the offsets */ |
24d304eb | 3500 | switch (abi) |
4697a36c | 3501 | { |
b6c9286a | 3502 | case ABI_NONE: |
24d304eb | 3503 | default: |
b6c9286a MM |
3504 | abort (); |
3505 | ||
3506 | case ABI_AIX: | |
3507 | case ABI_AIX_NODESC: | |
3508 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3509 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3510 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
a260abc9 DE |
3511 | info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ |
3512 | info_ptr->lr_save_offset = 2*reg_size; | |
24d304eb RK |
3513 | break; |
3514 | ||
3515 | case ABI_V4: | |
c81bebd7 | 3516 | case ABI_SOLARIS: |
b6c9286a MM |
3517 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3518 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3519 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3520 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3521 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3522 | info_ptr->lr_save_offset = reg_size; |
3523 | break; | |
3524 | ||
3525 | case ABI_NT: | |
a260abc9 | 3526 | info_ptr->lr_save_offset = -reg_size; |
b6c9286a MM |
3527 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; |
3528 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3529 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3530 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3531 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
a260abc9 | 3532 | info_ptr->fp_save_offset -= reg_size; |
b6c9286a MM |
3533 | |
3534 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3535 | break; |
4697a36c MM |
3536 | } |
3537 | ||
34792e82 | 3538 | /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */ |
ff381587 MM |
3539 | if (info_ptr->fpmem_p |
3540 | && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8) | |
3541 | info_ptr->fpmem_size += reg_size; | |
3542 | ||
3543 | total_raw_size = (info_ptr->vars_size | |
3544 | + info_ptr->parm_size | |
3545 | + info_ptr->fpmem_size | |
3546 | + info_ptr->save_size | |
3547 | + info_ptr->varargs_size | |
3548 | + info_ptr->fixed_size); | |
3549 | ||
3550 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); | |
3551 | ||
3552 | /* Determine if we need to allocate any stack frame: | |
3553 | ||
3554 | For AIX we need to push the stack if a frame pointer is needed (because | |
3555 | the stack might be dynamically adjusted), if we are debugging, if we | |
3556 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3557 | are more than the space needed to save all non-volatile registers: | |
3558 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 19*8 = 296 | |
3559 | ||
3560 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3561 | the debugger can handle stackless frames. */ | |
3562 | ||
3563 | if (info_ptr->calls_p) | |
3564 | info_ptr->push_p = 1; | |
3565 | ||
3566 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) | |
3567 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size | |
3568 | || (abi == ABI_NT ? info_ptr->lr_save_p | |
3569 | : info_ptr->calls_p)); | |
3570 | ||
3571 | else | |
3572 | info_ptr->push_p = (frame_pointer_needed | |
3573 | || write_symbols != NO_DEBUG | |
3574 | || ((total_raw_size - info_ptr->fixed_size) | |
3575 | > (TARGET_32BIT ? 220 : 296))); | |
3576 | ||
a7df97e6 | 3577 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3578 | { |
3579 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3580 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a260abc9 DE |
3581 | rs6000_fpmem_offset = (info_ptr->push_p |
3582 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3583 | : info_ptr->fpmem_offset); | |
db72d7a1 DE |
3584 | } |
3585 | else | |
3586 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3587 | |
4697a36c | 3588 | /* Zero offsets if we're not saving those registers */ |
8dda1a21 | 3589 | if (info_ptr->fp_size == 0) |
4697a36c MM |
3590 | info_ptr->fp_save_offset = 0; |
3591 | ||
8dda1a21 | 3592 | if (info_ptr->gp_size == 0) |
4697a36c MM |
3593 | info_ptr->gp_save_offset = 0; |
3594 | ||
3595 | if (!info_ptr->lr_save_p) | |
3596 | info_ptr->lr_save_offset = 0; | |
3597 | ||
3598 | if (!info_ptr->cr_save_p) | |
3599 | info_ptr->cr_save_offset = 0; | |
3600 | ||
b6c9286a MM |
3601 | if (!info_ptr->toc_save_p) |
3602 | info_ptr->toc_save_offset = 0; | |
3603 | ||
3604 | if (!info_ptr->main_save_p) | |
3605 | info_ptr->main_save_offset = 0; | |
3606 | ||
4697a36c MM |
3607 | return info_ptr; |
3608 | } | |
3609 | ||
3610 | void | |
3611 | debug_stack_info (info) | |
3612 | rs6000_stack_t *info; | |
9878760c | 3613 | { |
24d304eb RK |
3614 | char *abi_string; |
3615 | ||
4697a36c MM |
3616 | if (!info) |
3617 | info = rs6000_stack_info (); | |
3618 | ||
3619 | fprintf (stderr, "\nStack information for function %s:\n", | |
3620 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3621 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3622 | : "<unknown>")); | |
3623 | ||
24d304eb RK |
3624 | switch (info->abi) |
3625 | { | |
b6c9286a MM |
3626 | default: abi_string = "Unknown"; break; |
3627 | case ABI_NONE: abi_string = "NONE"; break; | |
3628 | case ABI_AIX: abi_string = "AIX"; break; | |
3629 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3630 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3631 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3632 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3633 | } |
3634 | ||
3635 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3636 | ||
4697a36c MM |
3637 | if (info->first_gp_reg_save != 32) |
3638 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3639 | ||
3640 | if (info->first_fp_reg_save != 64) | |
3641 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3642 | |
4697a36c MM |
3643 | if (info->lr_save_p) |
3644 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3645 | |
4697a36c MM |
3646 | if (info->cr_save_p) |
3647 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3648 | ||
b6c9286a MM |
3649 | if (info->toc_save_p) |
3650 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3651 | ||
4697a36c MM |
3652 | if (info->push_p) |
3653 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3654 | ||
3655 | if (info->calls_p) | |
3656 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3657 | ||
b6c9286a MM |
3658 | if (info->main_p) |
3659 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3660 | ||
3661 | if (info->main_save_p) | |
3662 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3663 | ||
802a0058 MM |
3664 | if (info->fpmem_p) |
3665 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3666 | ||
4697a36c MM |
3667 | if (info->gp_save_offset) |
3668 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3669 | ||
3670 | if (info->fp_save_offset) | |
3671 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3672 | ||
3673 | if (info->lr_save_offset) | |
3674 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3675 | ||
3676 | if (info->cr_save_offset) | |
3677 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3678 | ||
b6c9286a MM |
3679 | if (info->toc_save_offset) |
3680 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3681 | ||
4697a36c MM |
3682 | if (info->varargs_save_offset) |
3683 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3684 | ||
b6c9286a MM |
3685 | if (info->main_save_offset) |
3686 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3687 | ||
802a0058 MM |
3688 | if (info->fpmem_offset) |
3689 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3690 | ||
4697a36c MM |
3691 | if (info->total_size) |
3692 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3693 | ||
3694 | if (info->varargs_size) | |
3695 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3696 | ||
3697 | if (info->vars_size) | |
3698 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3699 | ||
3700 | if (info->parm_size) | |
3701 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3702 | ||
802a0058 MM |
3703 | if (info->fpmem_size) |
3704 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3705 | ||
4697a36c MM |
3706 | if (info->fixed_size) |
3707 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3708 | ||
3709 | if (info->gp_size) | |
3710 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3711 | ||
3712 | if (info->fp_size) | |
3713 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3714 | ||
b6c9286a MM |
3715 | if (info->lr_size) |
3716 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3717 | ||
4697a36c MM |
3718 | if (info->cr_size) |
3719 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3720 | ||
b6c9286a MM |
3721 | if (info->toc_size) |
3722 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3723 | ||
3724 | if (info->main_size) | |
3725 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3726 | ||
4697a36c MM |
3727 | if (info->save_size) |
3728 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3729 | ||
3730 | if (info->reg_size != 4) | |
3731 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3732 | ||
3733 | fprintf (stderr, "\n"); | |
9878760c | 3734 | } |
4697a36c | 3735 | \f |
c7ca610e RK |
3736 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3737 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3738 | a constant pool. */ | |
3739 | ||
3740 | void | |
38c1f2d7 | 3741 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 3742 | FILE *file; |
38c1f2d7 | 3743 | int reg; |
c7ca610e RK |
3744 | { |
3745 | char buf[256]; | |
3746 | ||
3747 | #ifdef USING_SVR4_H | |
3748 | if (TARGET_RELOCATABLE) | |
3749 | { | |
3750 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3751 | fprintf (file, "\tbl "); | |
3752 | assemble_name (file, buf); | |
3753 | fprintf (file, "\n"); | |
3754 | ||
38c1f2d7 MM |
3755 | /* possibly create the toc section */ |
3756 | if (!toc_initialized) | |
3757 | { | |
3758 | toc_section (); | |
3759 | function_section (current_function_decl); | |
3760 | } | |
3761 | ||
3762 | /* If not first call in this function, we need to put the | |
3763 | different between .LCTOC1 and the address we get to right | |
3764 | after the bl. It will mess up disassembling the instructions | |
3765 | but that can't be helped. We will later need to bias the | |
3766 | address before loading. */ | |
3767 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3768 | { | |
a260abc9 | 3769 | char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; |
38c1f2d7 MM |
3770 | char *buf_ptr; |
3771 | ||
3772 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
3773 | ||
3774 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3775 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
3776 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
3777 | ||
3778 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3779 | fprintf (file, "%s\n", buf_ptr); | |
3780 | } | |
3781 | ||
c7ca610e | 3782 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
3783 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
3784 | ||
3785 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
a260abc9 DE |
3786 | asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], |
3787 | (TARGET_32BIT ? 4 : 8), reg_names[reg]); | |
c7ca610e | 3788 | |
a260abc9 DE |
3789 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", |
3790 | reg_names[0]); | |
38c1f2d7 | 3791 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e | 3792 | assemble_name (file, buf); |
a260abc9 | 3793 | fputs ("-", file); |
c7ca610e RK |
3794 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
3795 | assemble_name (file, buf); | |
38c1f2d7 | 3796 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 3797 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 3798 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
3799 | rs6000_pic_labelno++; |
3800 | } | |
3801 | else if (!TARGET_64BIT) | |
3802 | { | |
3803 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
a260abc9 | 3804 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); |
c7ca610e | 3805 | assemble_name (file, buf); |
dfdfa60f | 3806 | fputs ("@ha\n", file); |
a260abc9 DE |
3807 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); |
3808 | assemble_name (file, buf); | |
3809 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); | |
c7ca610e RK |
3810 | } |
3811 | else | |
3812 | abort (); | |
3813 | ||
3814 | #else /* !USING_SVR4_H */ | |
3815 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
13ded975 DE |
3816 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
3817 | reg_names[reg]); | |
c7ca610e RK |
3818 | assemble_name (file, buf); |
3819 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3820 | #endif /* USING_SVR4_H */ | |
3821 | } | |
3822 | ||
38c1f2d7 MM |
3823 | \f |
3824 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
3825 | of the old frame is left in r12. */ | |
3826 | ||
3827 | void | |
3828 | rs6000_allocate_stack_space (file, size, copy_r12) | |
3829 | FILE *file; | |
3830 | int size; | |
3831 | int copy_r12; | |
3832 | { | |
3833 | int neg_size = -size; | |
3834 | if (TARGET_UPDATE) | |
3835 | { | |
3836 | if (size < 32767) | |
3837 | asm_fprintf (file, | |
3838 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3839 | reg_names[1], neg_size, reg_names[1]); | |
3840 | else | |
3841 | { | |
3842 | if (copy_r12) | |
3843 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3844 | ||
3845 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3846 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3847 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3848 | asm_fprintf (file, | |
3849 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3850 | reg_names[1], reg_names[1], reg_names[0]); | |
3851 | } | |
3852 | } | |
3853 | else | |
3854 | { | |
3855 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3856 | if (size < 32767) | |
aa4201ad | 3857 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
a260abc9 | 3858 | reg_names[1], neg_size, reg_names[1]); |
38c1f2d7 MM |
3859 | else |
3860 | { | |
3861 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3862 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3863 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3864 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
3865 | reg_names[0], reg_names[1]); | |
3866 | } | |
3867 | ||
3868 | asm_fprintf (file, | |
3869 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
3870 | reg_names[12], reg_names[1]); | |
3871 | } | |
3872 | } | |
3873 | ||
3874 | \f | |
9878760c | 3875 | /* Write function prologue. */ |
9878760c RK |
3876 | void |
3877 | output_prolog (file, size) | |
3878 | FILE *file; | |
296b8152 | 3879 | int size ATTRIBUTE_UNUSED; |
9878760c | 3880 | { |
4697a36c | 3881 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a MM |
3882 | int reg_size = info->reg_size; |
3883 | char *store_reg; | |
3884 | char *load_reg; | |
979721f8 MM |
3885 | int sp_reg = 1; |
3886 | int sp_offset = 0; | |
b6c9286a | 3887 | |
8f802bfb | 3888 | if (TARGET_32BIT) |
b6c9286a | 3889 | { |
8f802bfb DE |
3890 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3891 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3892 | } |
3893 | else | |
3894 | { | |
8f802bfb DE |
3895 | store_reg = "\tstd %s,%d(%s)\n"; |
3896 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3897 | } |
9878760c | 3898 | |
4697a36c MM |
3899 | if (TARGET_DEBUG_STACK) |
3900 | debug_stack_info (info); | |
9878760c RK |
3901 | |
3902 | /* Write .extern for any function we will call to save and restore fp | |
3903 | values. */ | |
b6c9286a | 3904 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3905 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3906 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3907 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3908 | |
3909 | /* Write .extern for truncation routines, if needed. */ | |
3910 | if (rs6000_trunc_used && ! trunc_defined) | |
3911 | { | |
e138174b ILT |
3912 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3913 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3914 | trunc_defined = 1; |
3915 | } | |
4697a36c | 3916 | |
c764f757 RK |
3917 | /* Write .extern for AIX common mode routines, if needed. */ |
3918 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3919 | { | |
f6709c70 JW |
3920 | fputs ("\t.extern __mulh\n", file); |
3921 | fputs ("\t.extern __mull\n", file); | |
3922 | fputs ("\t.extern __divss\n", file); | |
3923 | fputs ("\t.extern __divus\n", file); | |
3924 | fputs ("\t.extern __quoss\n", file); | |
3925 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
3926 | common_mode_defined = 1; |
3927 | } | |
9878760c | 3928 | |
979721f8 | 3929 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 3930 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
3931 | { |
3932 | if (info->total_size < 32767) | |
38c1f2d7 | 3933 | sp_offset = info->total_size; |
979721f8 | 3934 | else |
38c1f2d7 MM |
3935 | sp_reg = 12; |
3936 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
3937 | } |
3938 | ||
9878760c | 3939 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
3940 | if (info->lr_save_p) |
3941 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
3942 | |
3943 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 3944 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 3945 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
3946 | |
3947 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
3948 | ourself. Otherwise, call function. Note that since they are statically |
3949 | linked, we do not need a nop following them. */ | |
4697a36c | 3950 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 3951 | { |
4697a36c | 3952 | int regno = info->first_fp_reg_save; |
979721f8 | 3953 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3954 | |
3955 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3956 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 3957 | } |
4697a36c MM |
3958 | else if (info->first_fp_reg_save != 64) |
3959 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
3960 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
3961 | |
3962 | /* Now save gpr's. */ | |
4697a36c | 3963 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3964 | { |
4697a36c | 3965 | int regno = info->first_gp_reg_save; |
979721f8 | 3966 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 3967 | |
4697a36c | 3968 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3969 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3970 | } |
3971 | ||
4697a36c MM |
3972 | else if (info->first_gp_reg_save != 32) |
3973 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
3974 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3975 | info->gp_save_offset + sp_offset, |
3976 | reg_names[sp_reg]); | |
9878760c | 3977 | |
b6c9286a MM |
3978 | /* Save main's arguments if we need to call a function */ |
3979 | #ifdef NAME__MAIN | |
3980 | if (info->main_save_p) | |
3981 | { | |
3982 | int regno; | |
5ebfb2ba | 3983 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
3984 | int size = info->main_size; |
3985 | ||
2682eae9 | 3986 | for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) |
979721f8 | 3987 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
3988 | } |
3989 | #endif | |
3990 | ||
9878760c | 3991 | /* Save lr if we used it. */ |
4697a36c | 3992 | if (info->lr_save_p) |
979721f8 MM |
3993 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
3994 | reg_names[sp_reg]); | |
9878760c RK |
3995 | |
3996 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 3997 | if (info->cr_save_p) |
979721f8 MM |
3998 | { |
3999 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
4000 | { | |
4001 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
4002 | asm_fprintf (file, store_reg, reg_names[0], | |
4003 | info->cr_save_offset + sp_offset, | |
4004 | reg_names[sp_reg]); | |
4005 | } | |
4006 | else | |
4007 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
4008 | reg_names[sp_reg]); | |
4009 | } | |
9878760c | 4010 | |
979721f8 MM |
4011 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
4012 | do it here. */ | |
4013 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
4014 | { | |
4015 | if (info->total_size < 32768) | |
4016 | { | |
4017 | int probe_offset = 4096; | |
4018 | while (probe_offset < info->total_size) | |
4019 | { | |
4020 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
4021 | probe_offset += 4096; | |
4022 | } | |
4023 | } | |
4024 | else | |
4025 | { | |
4026 | int probe_iterations = info->total_size / 4096; | |
4027 | static int probe_labelno = 0; | |
4028 | char buf[256]; | |
4029 | ||
4030 | if (probe_iterations < 32768) | |
4031 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
4032 | else | |
4033 | { | |
4034 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
4035 | if (probe_iterations & 0xffff) | |
4036 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
4037 | probe_iterations & 0xffff); | |
4038 | } | |
4039 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
4040 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4041 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
4042 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 4043 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
4044 | fputs ("\tbdnz ", file); |
4045 | assemble_name (file, buf); | |
4046 | fputs ("\n", file); | |
4047 | } | |
4048 | } | |
4049 | ||
38c1f2d7 | 4050 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 4051 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 4052 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
4053 | |
4054 | /* Set frame pointer, if needed. */ | |
4055 | if (frame_pointer_needed) | |
4697a36c | 4056 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 4057 | |
b6c9286a MM |
4058 | #ifdef NAME__MAIN |
4059 | /* If we need to call a function to set things up for main, do so now | |
4060 | before dealing with the TOC. */ | |
4061 | if (info->main_p) | |
4062 | { | |
4063 | char *prefix = ""; | |
4064 | ||
4065 | switch (DEFAULT_ABI) | |
4066 | { | |
4067 | case ABI_AIX: prefix = "."; break; | |
4068 | case ABI_NT: prefix = ".."; break; | |
4069 | } | |
4070 | ||
4071 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
4072 | #ifdef RS6000_CALL_GLUE2 | |
4073 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
4074 | #else | |
4075 | #ifdef RS6000_CALL_GLUE | |
4076 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
4077 | fprintf (file, "\t%s\n", RS6000_CALL_GLUE); | |
4078 | #endif | |
4079 | #endif | |
4080 | ||
4081 | if (info->main_save_p) | |
4082 | { | |
4083 | int regno; | |
4084 | int loc; | |
4085 | int size = info->main_size; | |
4086 | ||
4087 | if (info->total_size < 32767) | |
4088 | { | |
4089 | loc = info->total_size + info->main_save_offset; | |
2682eae9 | 4090 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4091 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); |
4092 | } | |
4093 | else | |
5ebfb2ba MM |
4094 | { |
4095 | int neg_size = info->main_save_offset - info->total_size; | |
4096 | loc = 0; | |
4097 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
4098 | reg_names[0], (neg_size >> 16) & 0xffff, | |
4099 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 4100 | |
b6c9286a MM |
4101 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
4102 | reg_names[1]); | |
4103 | ||
2682eae9 | 4104 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4105 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); |
4106 | } | |
4107 | } | |
4108 | } | |
4109 | #endif | |
4110 | ||
4111 | ||
1875cc88 JW |
4112 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
4113 | TOC_TABLE address into register 30. */ | |
4697a36c | 4114 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
4115 | { |
4116 | #ifdef USING_SVR4_H | |
38c1f2d7 MM |
4117 | if (!profile_flag) |
4118 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
ab9eef41 | 4119 | #endif |
38c1f2d7 | 4120 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 4121 | } |
4697a36c | 4122 | |
b6c9286a MM |
4123 | if (DEFAULT_ABI == ABI_NT) |
4124 | { | |
4125 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4126 | fputs (".b:\n", file); | |
3daf36a4 | 4127 | } |
9878760c RK |
4128 | } |
4129 | ||
4130 | /* Write function epilogue. */ | |
4131 | ||
4132 | void | |
4133 | output_epilog (file, size) | |
4134 | FILE *file; | |
296b8152 | 4135 | int size ATTRIBUTE_UNUSED; |
9878760c | 4136 | { |
4697a36c | 4137 | rs6000_stack_t *info = rs6000_stack_info (); |
8f802bfb | 4138 | char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 4139 | rtx insn = get_last_insn (); |
979721f8 MM |
4140 | int sp_reg = 1; |
4141 | int sp_offset = 0; | |
9878760c | 4142 | |
9878760c RK |
4143 | /* If the last insn was a BARRIER, we don't have to write anything except |
4144 | the trace table. */ | |
4145 | if (GET_CODE (insn) == NOTE) | |
4146 | insn = prev_nonnote_insn (insn); | |
4147 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
4148 | { | |
4149 | /* If we have a frame pointer, a call to alloca, or a large stack | |
4150 | frame, restore the old stack pointer using the backchain. Otherwise, | |
4151 | we know what size to update it with. */ | |
4152 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 4153 | || info->total_size > 32767) |
979721f8 MM |
4154 | { |
4155 | /* Under V.4, don't reset the stack pointer until after we're done | |
4156 | loading the saved registers. */ | |
c81bebd7 | 4157 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
4158 | sp_reg = 11; |
4159 | ||
4160 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
4161 | } | |
4697a36c MM |
4162 | else if (info->push_p) |
4163 | { | |
c81bebd7 | 4164 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 | 4165 | sp_offset = info->total_size; |
4697a36c | 4166 | else |
a260abc9 DE |
4167 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4168 | reg_names[1], info->total_size, reg_names[1]); | |
4697a36c | 4169 | } |
9878760c | 4170 | |
b4ac57ab | 4171 | /* Get the old lr if we saved it. */ |
4697a36c | 4172 | if (info->lr_save_p) |
979721f8 | 4173 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
4174 | |
4175 | /* Get the old cr if we saved it. */ | |
4697a36c | 4176 | if (info->cr_save_p) |
979721f8 | 4177 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 4178 | |
b4ac57ab | 4179 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
4180 | if (info->lr_save_p) |
4181 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 4182 | |
9878760c | 4183 | /* Restore gpr's. */ |
4697a36c | 4184 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4185 | { |
4697a36c | 4186 | int regno = info->first_gp_reg_save; |
979721f8 | 4187 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 4188 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 4189 | |
4697a36c | 4190 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4191 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4192 | } |
4193 | ||
4697a36c MM |
4194 | else if (info->first_gp_reg_save != 32) |
4195 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
4196 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4197 | info->gp_save_offset + sp_offset, |
4198 | reg_names[sp_reg]); | |
9878760c | 4199 | |
b4ac57ab | 4200 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
4201 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
4202 | { | |
4203 | int regno = info->first_fp_reg_save; | |
979721f8 | 4204 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4205 | |
4206 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4207 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 4208 | } |
9878760c | 4209 | |
28edebac RK |
4210 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
4211 | that were used. */ | |
4697a36c MM |
4212 | if (info->cr_save_p) |
4213 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
4214 | (regs_ever_live[70] != 0) * 0x20 |
4215 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 4216 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 4217 | |
a6c2a102 DE |
4218 | /* If this is V.4, unwind the stack pointer after all of the loads |
4219 | have been done */ | |
4220 | if (sp_offset != 0) | |
a260abc9 DE |
4221 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4222 | reg_names[1], sp_offset, reg_names[1]); | |
979721f8 MM |
4223 | else if (sp_reg != 1) |
4224 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
4225 | ||
b4ac57ab RS |
4226 | /* If we have to restore more than two FP registers, branch to the |
4227 | restore function. It will return to our caller. */ | |
4697a36c MM |
4228 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4229 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
4230 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 4231 | else |
85638c0d | 4232 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 4233 | } |
b4ac57ab | 4234 | |
9b30bae2 | 4235 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
4236 | on its format. |
4237 | ||
4238 | We don't output a traceback table if -finhibit-size-directive was | |
4239 | used. The documentation for -finhibit-size-directive reads | |
4240 | ``don't output a @code{.size} assembler directive, or anything | |
4241 | else that would cause trouble if the function is split in the | |
4242 | middle, and the two halves are placed at locations far apart in | |
4243 | memory.'' The traceback table has this property, since it | |
4244 | includes the offset from the start of the function to the | |
4d30c363 MM |
4245 | traceback table itself. |
4246 | ||
4247 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4248 | different traceback table. */ |
4249 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4250 | { |
314fc5a9 ILT |
4251 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4252 | int fixed_parms, float_parms, parm_info; | |
4253 | int i; | |
4254 | ||
b6c9286a MM |
4255 | while (*fname == '.') /* V.4 encodes . in the name */ |
4256 | fname++; | |
4257 | ||
314fc5a9 ILT |
4258 | /* Need label immediately before tbtab, so we can compute its offset |
4259 | from the function start. */ | |
4260 | if (*fname == '*') | |
4261 | ++fname; | |
4262 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4263 | ASM_OUTPUT_LABEL (file, fname); | |
4264 | ||
4265 | /* The .tbtab pseudo-op can only be used for the first eight | |
4266 | expressions, since it can't handle the possibly variable | |
4267 | length fields that follow. However, if you omit the optional | |
4268 | fields, the assembler outputs zeros for all optional fields | |
4269 | anyways, giving each variable length field is minimum length | |
4270 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4271 | pseudo-op at all. */ | |
4272 | ||
4273 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4274 | that have to find it by searching forward from the entry | |
4275 | point or from the current pc. */ | |
19d2d16f | 4276 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4277 | |
4278 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4279 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4280 | |
4281 | /* Language type. Unfortunately, there doesn't seem to be any | |
4282 | official way to get this info, so we use language_string. C | |
4283 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
9517ead8 | 4284 | value for C for now. There is no official value for Java, |
6f573ff9 JL |
4285 | although IBM appears to be using 13. There is no official value |
4286 | for Chill, so we've choosen 44 pseudo-randomly. */ | |
314fc5a9 ILT |
4287 | if (! strcmp (language_string, "GNU C") |
4288 | || ! strcmp (language_string, "GNU Obj-C")) | |
4289 | i = 0; | |
4290 | else if (! strcmp (language_string, "GNU F77")) | |
4291 | i = 1; | |
4292 | else if (! strcmp (language_string, "GNU Ada")) | |
4293 | i = 3; | |
8b83775b | 4294 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4295 | i = 2; |
4296 | else if (! strcmp (language_string, "GNU C++")) | |
4297 | i = 9; | |
9517ead8 AG |
4298 | else if (! strcmp (language_string, "GNU Java")) |
4299 | i = 13; | |
6f573ff9 JL |
4300 | else if (! strcmp (language_string, "GNU CHILL")) |
4301 | i = 44; | |
314fc5a9 ILT |
4302 | else |
4303 | abort (); | |
4304 | fprintf (file, "%d,", i); | |
4305 | ||
4306 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4307 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4308 | from start of procedure stored in tbtab, internal function, function | |
4309 | has controlled storage, function has no toc, function uses fp, | |
4310 | function logs/aborts fp operations. */ | |
4311 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4312 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4313 | |
4314 | /* 6 bitfields: function is interrupt handler, name present in | |
4315 | proc table, function calls alloca, on condition directives | |
4316 | (controls stack walks, 3 bits), saves condition reg, saves | |
4317 | link reg. */ | |
4318 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4319 | set up as a frame pointer, even when there is no alloca call. */ | |
4320 | fprintf (file, "%d,", | |
4321 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4322 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4323 | |
4324 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4325 | (6 bits). */ | |
4326 | fprintf (file, "%d,", | |
4697a36c | 4327 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4328 | |
4329 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4330 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4331 | ||
4332 | { | |
4333 | /* Compute the parameter info from the function decl argument | |
4334 | list. */ | |
4335 | tree decl; | |
4336 | int next_parm_info_bit; | |
4337 | ||
4338 | next_parm_info_bit = 31; | |
4339 | parm_info = 0; | |
4340 | fixed_parms = 0; | |
4341 | float_parms = 0; | |
4342 | ||
4343 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4344 | decl; decl = TREE_CHAIN (decl)) | |
4345 | { | |
4346 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4347 | enum machine_mode mode = GET_MODE (parameter); | |
4348 | ||
4349 | if (GET_CODE (parameter) == REG) | |
4350 | { | |
4351 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4352 | { | |
4353 | int bits; | |
4354 | ||
4355 | float_parms++; | |
4356 | ||
4357 | if (mode == SFmode) | |
4358 | bits = 0x2; | |
4359 | else if (mode == DFmode) | |
4360 | bits = 0x3; | |
4361 | else | |
4362 | abort (); | |
4363 | ||
4364 | /* If only one bit will fit, don't or in this entry. */ | |
4365 | if (next_parm_info_bit > 0) | |
4366 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4367 | next_parm_info_bit -= 2; | |
4368 | } | |
4369 | else | |
4370 | { | |
4371 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4372 | + (UNITS_PER_WORD - 1)) | |
4373 | / UNITS_PER_WORD); | |
4374 | next_parm_info_bit -= 1; | |
4375 | } | |
4376 | } | |
4377 | } | |
4378 | } | |
4379 | ||
4380 | /* Number of fixed point parameters. */ | |
4381 | /* This is actually the number of words of fixed point parameters; thus | |
4382 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4383 | fprintf (file, "%d,", fixed_parms); | |
4384 | ||
4385 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4386 | all on stack. */ | |
4387 | /* This is actually the number of fp registers that hold parameters; | |
4388 | and thus the maximum value is 13. */ | |
4389 | /* Set parameters on stack bit if parameters are not in their original | |
4390 | registers, regardless of whether they are on the stack? Xlc | |
4391 | seems to set the bit when not optimizing. */ | |
4392 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4393 | ||
4394 | /* Optional fields follow. Some are variable length. */ | |
4395 | ||
4396 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4397 | 11 double float. */ | |
4398 | /* There is an entry for each parameter in a register, in the order that | |
4399 | they occur in the parameter list. Any intervening arguments on the | |
4400 | stack are ignored. If the list overflows a long (max possible length | |
4401 | 34 bits) then completely leave off all elements that don't fit. */ | |
4402 | /* Only emit this long if there was at least one parameter. */ | |
4403 | if (fixed_parms || float_parms) | |
4404 | fprintf (file, "\t.long %d\n", parm_info); | |
4405 | ||
4406 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4407 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4408 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4409 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4410 | fputs ("-.", file); |
314fc5a9 | 4411 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4412 | putc ('\n', file); |
314fc5a9 ILT |
4413 | |
4414 | /* Interrupt handler mask. */ | |
4415 | /* Omit this long, since we never set the interrupt handler bit | |
4416 | above. */ | |
4417 | ||
4418 | /* Number of CTL (controlled storage) anchors. */ | |
4419 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4420 | ||
4421 | /* Displacement into stack of each CTL anchor. */ | |
4422 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4423 | ||
4424 | /* Length of function name. */ | |
296b8152 | 4425 | fprintf (file, "\t.short %d\n", (int) strlen (fname)); |
314fc5a9 ILT |
4426 | |
4427 | /* Function name. */ | |
4428 | assemble_string (fname, strlen (fname)); | |
4429 | ||
4430 | /* Register for alloca automatic storage; this is always reg 31. | |
4431 | Only emit this if the alloca bit was set above. */ | |
4432 | if (frame_pointer_needed) | |
19d2d16f | 4433 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4434 | } |
4697a36c | 4435 | |
b6c9286a MM |
4436 | if (DEFAULT_ABI == ABI_NT) |
4437 | { | |
4438 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4439 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4440 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4441 | fputs (":\n", file); | |
4442 | } | |
9878760c | 4443 | } |
17167fd8 MM |
4444 | \f |
4445 | /* A C compound statement that outputs the assembler code for a thunk function, | |
4446 | used to implement C++ virtual function calls with multiple inheritance. The | |
4447 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
4448 | object parameter before handing control off to the real function. | |
4449 | ||
4450 | First, emit code to add the integer DELTA to the location that contains the | |
4451 | incoming first argument. Assume that this argument contains a pointer, and | |
4452 | is the one used to pass the `this' pointer in C++. This is the incoming | |
4453 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
4454 | addition must preserve the values of all other incoming arguments. | |
4455 | ||
4456 | After the addition, emit code to jump to FUNCTION, which is a | |
4457 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
4458 | the return address. Hence returning from FUNCTION will return to whoever | |
4459 | called the current `thunk'. | |
4460 | ||
4461 | The effect must be as if FUNCTION had been called directly with the adjusted | |
4462 | first argument. This macro is responsible for emitting all of the code for | |
4463 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
4464 | invoked. | |
4465 | ||
4466 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
4467 | extracted from it.) It might possibly be useful on some targets, but | |
4468 | probably not. | |
4469 | ||
4470 | If you do not define this macro, the target-independent code in the C++ | |
4471 | frontend will generate a less efficient heavyweight thunk that calls | |
4472 | FUNCTION instead of jumping to it. The generic approach does not support | |
4473 | varargs. */ | |
4474 | ||
4475 | void | |
4476 | output_mi_thunk (file, thunk_fndecl, delta, function) | |
4477 | FILE *file; | |
4478 | tree thunk_fndecl; | |
4479 | int delta; | |
4480 | tree function; | |
4481 | { | |
efc97ef0 | 4482 | char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ]; |
17167fd8 MM |
4483 | char *r0 = reg_names[0]; |
4484 | char *sp = reg_names[1]; | |
4485 | char *toc = reg_names[2]; | |
4486 | char *schain = reg_names[11]; | |
4487 | char *r12 = reg_names[12]; | |
4488 | char *prefix; | |
4489 | char *fname; | |
4490 | char buf[512]; | |
4491 | static int labelno = 0; | |
4492 | ||
4493 | /* Small constants that can be done by one add instruction */ | |
4494 | if (delta >= -32768 && delta <= 32767) | |
4495 | { | |
4496 | if (!TARGET_NEW_MNEMONICS) | |
4497 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg); | |
4498 | else | |
4499 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta); | |
4500 | } | |
4501 | ||
4502 | /* Large constants that can be done by one addis instruction */ | |
4503 | else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1) | |
4504 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4505 | delta >> 16); | |
4506 | ||
4507 | /* 32-bit constants that can be done by an add and addis instruction. */ | |
4508 | else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1) | |
4509 | { | |
4510 | /* Break into two pieces, propigating the sign bit from the low word to | |
4511 | the upper word. */ | |
4512 | int delta_high = delta >> 16; | |
4513 | int delta_low = delta & 0xffff; | |
4514 | if ((delta_low & 0x8000) != 0) | |
4515 | { | |
4516 | delta_high++; | |
4517 | delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */ | |
4518 | } | |
4519 | ||
4520 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4521 | delta_high); | |
4522 | ||
4523 | if (!TARGET_NEW_MNEMONICS) | |
4524 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg); | |
4525 | else | |
4526 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low); | |
4527 | } | |
4528 | ||
4529 | /* 64-bit constants, fixme */ | |
4530 | else | |
4531 | abort (); | |
4532 | ||
4533 | /* Get the prefix in front of the names. */ | |
4534 | switch (DEFAULT_ABI) | |
4535 | { | |
4536 | default: | |
4537 | abort (); | |
4538 | ||
4539 | case ABI_AIX: | |
4540 | prefix = "."; | |
4541 | break; | |
4542 | ||
4543 | case ABI_V4: | |
4544 | case ABI_AIX_NODESC: | |
4545 | case ABI_SOLARIS: | |
4546 | prefix = ""; | |
4547 | break; | |
4548 | ||
4549 | case ABI_NT: | |
4550 | prefix = ".."; | |
4551 | break; | |
4552 | } | |
4553 | ||
4554 | /* If the function is compiled in this module, jump to it directly. | |
4555 | Otherwise, load up its address and jump to it. */ | |
4556 | ||
4557 | fname = XSTR (XEXP (DECL_RTL (function), 0), 0); | |
42820a49 MM |
4558 | #if 1 |
4559 | /* For now, just emit a branch always, until we can figure out better when we | |
4560 | need to load the address into the count register and emit the slower bctr | |
4561 | instruction. */ | |
4562 | fprintf (file, "\tb %s", prefix); | |
4563 | assemble_name (file, fname); | |
4564 | fprintf (file, "\n"); | |
4565 | ||
4566 | #else | |
efc97ef0 | 4567 | if (current_file_function_operand (XEXP (DECL_RTL (function), 0)) |
17167fd8 MM |
4568 | && !lookup_attribute ("longcall", TYPE_ATTRIBUTES (TREE_TYPE (function)))) |
4569 | { | |
4570 | fprintf (file, "\tb %s", prefix); | |
4571 | assemble_name (file, fname); | |
4572 | fprintf (file, "\n"); | |
4573 | } | |
4574 | ||
4575 | else | |
4576 | { | |
4577 | switch (DEFAULT_ABI) | |
4578 | { | |
4579 | default: | |
4580 | case ABI_NT: | |
4581 | abort (); | |
4582 | ||
4583 | case ABI_AIX: | |
4584 | /* Set up a TOC entry for the function. */ | |
4585 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4586 | toc_section (); | |
4587 | ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); | |
4588 | labelno++; | |
4589 | ||
4590 | /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since | |
4591 | there will be only one TOC entry for this function. */ | |
4592 | fputs ("\t.tc\t", file); | |
4593 | assemble_name (file, buf); | |
4594 | fputs ("[TC],", file); | |
4595 | assemble_name (file, buf); | |
4596 | putc ('\n', file); | |
4597 | text_section (); | |
4598 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12); | |
4599 | assemble_name (file, buf); | |
4600 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
4601 | asm_fprintf (file, | |
4602 | (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n", | |
4603 | r0, r12); | |
4604 | ||
4605 | asm_fprintf (file, | |
4606 | (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n", | |
4607 | toc, r12); | |
4608 | ||
4609 | asm_fprintf (file, "\tmtctr %s\n", r0); | |
4610 | asm_fprintf (file, | |
4611 | (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n", | |
4612 | schain, r12); | |
4613 | ||
4614 | asm_fprintf (file, "\tbctr\n"); | |
4615 | break; | |
4616 | ||
4617 | /* Don't use r11, that contains the static chain, just use r0/r12. */ | |
4618 | case ABI_V4: | |
4619 | case ABI_AIX_NODESC: | |
4620 | case ABI_SOLARIS: | |
4621 | if (flag_pic == 1) | |
4622 | { | |
4623 | fprintf (file, "\tmflr %s\n", r0); | |
4624 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4625 | asm_fprintf (file, "\tmflr %s\n", r12); | |
4626 | asm_fprintf (file, "\tmtlr %s\n", r0); | |
4627 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4628 | assemble_name (file, fname); | |
4629 | asm_fprintf (file, "@got(%s)\n", r12); | |
42820a49 MM |
4630 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4631 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4632 | } |
4633 | #if TARGET_ELF | |
4634 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4635 | { | |
4636 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4637 | labelno++; | |
4638 | fprintf (file, "\tmflr %s\n", r0); | |
4639 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", r0, sp); | |
4640 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
4641 | rs6000_output_load_toc_table (file, 12); | |
4642 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4643 | assemble_name (file, buf); | |
4644 | asm_fprintf (file, "(%s)\n", r12); | |
4645 | asm_fprintf (file, "\t{l|lwz} %s,4(%s)\n", r12, sp); | |
4646 | asm_fprintf (file, "\tmtlr %s\n", r12); | |
42820a49 MM |
4647 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4648 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4649 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
4650 | assemble_name (file, buf); | |
4651 | fputs (" = .-.LCTOC1\n", file); | |
4652 | fputs ("\t.long ", file); | |
4653 | assemble_name (file, fname); | |
4654 | fputs ("\n\t.previous\n", file); | |
4655 | } | |
42820a49 MM |
4656 | #endif /* TARGET_ELF */ |
4657 | ||
17167fd8 MM |
4658 | else |
4659 | { | |
42820a49 | 4660 | asm_fprintf (file, "\t{liu|lis} %s,", r12); |
17167fd8 MM |
4661 | assemble_name (file, fname); |
4662 | asm_fprintf (file, "@ha\n"); | |
42820a49 | 4663 | asm_fprintf (file, "\t{cal|la} %s,", r12); |
17167fd8 | 4664 | assemble_name (file, fname); |
42820a49 MM |
4665 | asm_fprintf (file, "@l(%s)\n", r12); |
4666 | asm_fprintf (file, "\tmtctr %s\n", r12); | |
4667 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4668 | } |
4669 | ||
17167fd8 MM |
4670 | break; |
4671 | } | |
4672 | } | |
42820a49 | 4673 | #endif /* #if 0 out code to use bctr for far away jumps */ |
17167fd8 MM |
4674 | } |
4675 | ||
9878760c RK |
4676 | \f |
4677 | /* Output a TOC entry. We derive the entry name from what is | |
4678 | being written. */ | |
4679 | ||
4680 | void | |
4681 | output_toc (file, x, labelno) | |
4682 | FILE *file; | |
4683 | rtx x; | |
4684 | int labelno; | |
4685 | { | |
4686 | char buf[256]; | |
4687 | char *name = buf; | |
b6c9286a | 4688 | char *real_name; |
9878760c RK |
4689 | rtx base = x; |
4690 | int offset = 0; | |
4691 | ||
4697a36c MM |
4692 | if (TARGET_NO_TOC) |
4693 | abort (); | |
4694 | ||
ff1720ed RK |
4695 | /* if we're going to put a double constant in the TOC, make sure it's |
4696 | aligned properly when strict alignment is on. */ | |
4697 | if (GET_CODE (x) == CONST_DOUBLE | |
4698 | && STRICT_ALIGNMENT | |
4699 | && GET_MODE (x) == DFmode | |
4700 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4701 | ASM_OUTPUT_ALIGN (file, 3); | |
4702 | } | |
4703 | ||
4704 | ||
b6c9286a | 4705 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4706 | { |
4707 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4708 | fprintf (file, "%d = .-", labelno); | |
4709 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4710 | fputs ("1\n", file); |
d14a6d05 MM |
4711 | } |
4712 | else | |
d14a6d05 | 4713 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4714 | |
37c37a57 RK |
4715 | /* Handle FP constants specially. Note that if we have a minimal |
4716 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4717 | FP constants. */ | |
042259f2 | 4718 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4719 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4720 | { |
042259f2 DE |
4721 | REAL_VALUE_TYPE rv; |
4722 | long k[2]; | |
0adc764e | 4723 | |
042259f2 DE |
4724 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4725 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
13ded975 DE |
4726 | if (TARGET_64BIT) |
4727 | { | |
4728 | if (TARGET_MINIMAL_TOC) | |
4729 | fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); | |
4730 | else | |
4731 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", | |
4732 | k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); | |
4733 | return; | |
4734 | } | |
1875cc88 | 4735 | else |
13ded975 DE |
4736 | { |
4737 | if (TARGET_MINIMAL_TOC) | |
4738 | fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]); | |
4739 | else | |
4740 | fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", | |
4741 | k[0], k[1], k[0], k[1]); | |
4742 | return; | |
4743 | } | |
9878760c RK |
4744 | } |
4745 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4746 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4747 | { |
042259f2 DE |
4748 | REAL_VALUE_TYPE rv; |
4749 | long l; | |
9878760c | 4750 | |
042259f2 DE |
4751 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4752 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4753 | ||
4754 | if (TARGET_MINIMAL_TOC) | |
13ded975 | 4755 | fprintf (file, TARGET_32BIT ? "\t.long %ld\n" : "\t.llong %ld\n", l); |
042259f2 | 4756 | else |
1883e716 | 4757 | fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l); |
042259f2 DE |
4758 | return; |
4759 | } | |
4760 | else if (GET_MODE (x) == DImode | |
4761 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4762 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4763 | { | |
4764 | HOST_WIDE_INT low; | |
4765 | HOST_WIDE_INT high; | |
4766 | ||
4767 | if (GET_CODE (x) == CONST_DOUBLE) | |
4768 | { | |
4769 | low = CONST_DOUBLE_LOW (x); | |
4770 | high = CONST_DOUBLE_HIGH (x); | |
4771 | } | |
4772 | else | |
4773 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4774 | { | |
4775 | low = INTVAL (x); | |
4776 | high = (low < 0) ? ~0 : 0; | |
4777 | } | |
4778 | #else | |
4779 | { | |
4780 | low = INTVAL (x) & 0xffffffff; | |
4781 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4782 | } | |
4783 | #endif | |
9878760c | 4784 | |
13ded975 DE |
4785 | if (TARGET_64BIT) |
4786 | { | |
4787 | if (TARGET_MINIMAL_TOC) | |
4788 | fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); | |
4789 | else | |
4790 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", | |
4791 | (long)high, (long)low, (long)high, (long)low); | |
4792 | return; | |
4793 | } | |
1875cc88 | 4794 | else |
13ded975 DE |
4795 | { |
4796 | if (TARGET_MINIMAL_TOC) | |
4797 | fprintf (file, "\t.long %ld\n\t.long %ld\n", | |
4798 | (long)high, (long)low); | |
4799 | else | |
4800 | fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", | |
4801 | (long)high, (long)low, (long)high, (long)low); | |
4802 | return; | |
4803 | } | |
9878760c RK |
4804 | } |
4805 | ||
4806 | if (GET_CODE (x) == CONST) | |
4807 | { | |
4808 | base = XEXP (XEXP (x, 0), 0); | |
4809 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4810 | } | |
4811 | ||
4812 | if (GET_CODE (base) == SYMBOL_REF) | |
4813 | name = XSTR (base, 0); | |
4814 | else if (GET_CODE (base) == LABEL_REF) | |
4815 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4816 | else if (GET_CODE (base) == CODE_LABEL) | |
4817 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4818 | else | |
4819 | abort (); | |
4820 | ||
2e4eb9b0 | 4821 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4822 | if (TARGET_MINIMAL_TOC) |
13ded975 | 4823 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
1875cc88 JW |
4824 | else |
4825 | { | |
b6c9286a | 4826 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4827 | |
1875cc88 JW |
4828 | if (offset < 0) |
4829 | fprintf (file, ".N%d", - offset); | |
4830 | else if (offset) | |
4831 | fprintf (file, ".P%d", offset); | |
9878760c | 4832 | |
19d2d16f | 4833 | fputs ("[TC],", file); |
1875cc88 | 4834 | } |
581bc4de MM |
4835 | |
4836 | /* Currently C++ toc references to vtables can be emitted before it | |
4837 | is decided whether the vtable is public or private. If this is | |
4838 | the case, then the linker will eventually complain that there is | |
4839 | a TOC reference to an unknown section. Thus, for vtables only, | |
4840 | we emit the TOC reference to reference the symbol and not the | |
4841 | section. */ | |
3807773b | 4842 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4843 | { |
3807773b | 4844 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4845 | if (offset < 0) |
4846 | fprintf (file, "%d", offset); | |
4847 | else if (offset > 0) | |
4848 | fprintf (file, "+%d", offset); | |
4849 | } | |
4850 | else | |
4851 | output_addr_const (file, x); | |
19d2d16f | 4852 | putc ('\n', file); |
9878760c RK |
4853 | } |
4854 | \f | |
4855 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4856 | starting at P to FILE. | |
4857 | ||
4858 | On the RS/6000, we have to do this using the .byte operation and | |
4859 | write out special characters outside the quoted string. | |
4860 | Also, the assembler is broken; very long strings are truncated, | |
4861 | so we must artificially break them up early. */ | |
4862 | ||
4863 | void | |
4864 | output_ascii (file, p, n) | |
4865 | FILE *file; | |
4866 | char *p; | |
4867 | int n; | |
4868 | { | |
4869 | char c; | |
4870 | int i, count_string; | |
4871 | char *for_string = "\t.byte \""; | |
4872 | char *for_decimal = "\t.byte "; | |
4873 | char *to_close = NULL; | |
4874 | ||
4875 | count_string = 0; | |
4876 | for (i = 0; i < n; i++) | |
4877 | { | |
4878 | c = *p++; | |
4879 | if (c >= ' ' && c < 0177) | |
4880 | { | |
4881 | if (for_string) | |
4882 | fputs (for_string, file); | |
4883 | putc (c, file); | |
4884 | ||
4885 | /* Write two quotes to get one. */ | |
4886 | if (c == '"') | |
4887 | { | |
4888 | putc (c, file); | |
4889 | ++count_string; | |
4890 | } | |
4891 | ||
4892 | for_string = NULL; | |
4893 | for_decimal = "\"\n\t.byte "; | |
4894 | to_close = "\"\n"; | |
4895 | ++count_string; | |
4896 | ||
4897 | if (count_string >= 512) | |
4898 | { | |
4899 | fputs (to_close, file); | |
4900 | ||
4901 | for_string = "\t.byte \""; | |
4902 | for_decimal = "\t.byte "; | |
4903 | to_close = NULL; | |
4904 | count_string = 0; | |
4905 | } | |
4906 | } | |
4907 | else | |
4908 | { | |
4909 | if (for_decimal) | |
4910 | fputs (for_decimal, file); | |
4911 | fprintf (file, "%d", c); | |
4912 | ||
4913 | for_string = "\n\t.byte \""; | |
4914 | for_decimal = ", "; | |
4915 | to_close = "\n"; | |
4916 | count_string = 0; | |
4917 | } | |
4918 | } | |
4919 | ||
4920 | /* Now close the string if we have written one. Then end the line. */ | |
4921 | if (to_close) | |
4922 | fprintf (file, to_close); | |
4923 | } | |
4924 | \f | |
4925 | /* Generate a unique section name for FILENAME for a section type | |
4926 | represented by SECTION_DESC. Output goes into BUF. | |
4927 | ||
4928 | SECTION_DESC can be any string, as long as it is different for each | |
4929 | possible section type. | |
4930 | ||
4931 | We name the section in the same manner as xlc. The name begins with an | |
4932 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
4933 | names) with the last period replaced by the string SECTION_DESC. If |
4934 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
4935 | the name. */ | |
9878760c RK |
4936 | |
4937 | void | |
4938 | rs6000_gen_section_name (buf, filename, section_desc) | |
4939 | char **buf; | |
4940 | char *filename; | |
4941 | char *section_desc; | |
4942 | { | |
11e5fe42 | 4943 | char *q, *after_last_slash, *last_period; |
9878760c RK |
4944 | char *p; |
4945 | int len; | |
9878760c RK |
4946 | |
4947 | after_last_slash = filename; | |
4948 | for (q = filename; *q; q++) | |
11e5fe42 RK |
4949 | { |
4950 | if (*q == '/') | |
4951 | after_last_slash = q + 1; | |
4952 | else if (*q == '.') | |
4953 | last_period = q; | |
4954 | } | |
9878760c | 4955 | |
11e5fe42 | 4956 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
4957 | *buf = (char *) permalloc (len); |
4958 | ||
4959 | p = *buf; | |
4960 | *p++ = '_'; | |
4961 | ||
4962 | for (q = after_last_slash; *q; q++) | |
4963 | { | |
11e5fe42 | 4964 | if (q == last_period) |
9878760c RK |
4965 | { |
4966 | strcpy (p, section_desc); | |
4967 | p += strlen (section_desc); | |
9878760c RK |
4968 | } |
4969 | ||
e9a780ec | 4970 | else if (ISALNUM (*q)) |
9878760c RK |
4971 | *p++ = *q; |
4972 | } | |
4973 | ||
11e5fe42 | 4974 | if (last_period == 0) |
9878760c RK |
4975 | strcpy (p, section_desc); |
4976 | else | |
4977 | *p = '\0'; | |
4978 | } | |
e165f3f0 RK |
4979 | \f |
4980 | /* Write function profiler code. */ | |
4981 | ||
4982 | void | |
4983 | output_function_profiler (file, labelno) | |
4984 | FILE *file; | |
4985 | int labelno; | |
4986 | { | |
4987 | /* The last used parameter register. */ | |
4988 | int last_parm_reg; | |
4989 | int i, j; | |
3daf36a4 | 4990 | char buf[100]; |
e165f3f0 | 4991 | |
3daf36a4 | 4992 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 4993 | switch (DEFAULT_ABI) |
3daf36a4 | 4994 | { |
38c1f2d7 MM |
4995 | default: |
4996 | abort (); | |
4997 | ||
4998 | case ABI_V4: | |
4999 | case ABI_SOLARIS: | |
5000 | case ABI_AIX_NODESC: | |
5001 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
5002 | if (flag_pic == 1) | |
5003 | { | |
dfdfa60f DE |
5004 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); |
5005 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", | |
5006 | reg_names[0], reg_names[1]); | |
17167fd8 | 5007 | asm_fprintf (file, "\tmflr %s\n", reg_names[12]); |
dfdfa60f | 5008 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); |
38c1f2d7 | 5009 | assemble_name (file, buf); |
17167fd8 | 5010 | asm_fprintf (file, "@got(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5011 | } |
5012 | #if TARGET_ELF | |
5013 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
5014 | { | |
dfdfa60f DE |
5015 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5016 | reg_names[0], reg_names[1]); | |
38c1f2d7 | 5017 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
17167fd8 MM |
5018 | rs6000_output_load_toc_table (file, 12); |
5019 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[12]); | |
38c1f2d7 | 5020 | assemble_name (file, buf); |
17167fd8 | 5021 | asm_fprintf (file, "X(%s)\n", reg_names[12]); |
dfdfa60f | 5022 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
034e84c4 | 5023 | assemble_name (file, buf); |
dfdfa60f DE |
5024 | fputs ("X = .-.LCTOC1\n", file); |
5025 | fputs ("\t.long ", file); | |
034e84c4 MM |
5026 | assemble_name (file, buf); |
5027 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
5028 | } |
5029 | #endif | |
38c1f2d7 MM |
5030 | else |
5031 | { | |
17167fd8 | 5032 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]); |
38c1f2d7 | 5033 | assemble_name (file, buf); |
dfdfa60f | 5034 | fputs ("@ha\n", file); |
a260abc9 DE |
5035 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", reg_names[0], reg_names[1]); |
5036 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); | |
38c1f2d7 | 5037 | assemble_name (file, buf); |
17167fd8 | 5038 | asm_fprintf (file, "@l(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5039 | } |
5040 | ||
5041 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); | |
5042 | break; | |
5043 | ||
5044 | case ABI_AIX: | |
5045 | /* Set up a TOC entry for the profiler label. */ | |
5046 | toc_section (); | |
5047 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
5048 | if (TARGET_MINIMAL_TOC) | |
5049 | { | |
13ded975 | 5050 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
38c1f2d7 MM |
5051 | assemble_name (file, buf); |
5052 | putc ('\n', file); | |
5053 | } | |
5054 | else | |
5055 | { | |
5056 | fputs ("\t.tc\t", file); | |
5057 | assemble_name (file, buf); | |
5058 | fputs ("[TC],", file); | |
5059 | assemble_name (file, buf); | |
5060 | putc ('\n', file); | |
5061 | } | |
5062 | text_section (); | |
e165f3f0 RK |
5063 | |
5064 | /* Figure out last used parameter register. The proper thing to do is | |
5065 | to walk incoming args of the function. A function might have live | |
5066 | parameter registers even if it has no incoming args. */ | |
5067 | ||
38c1f2d7 MM |
5068 | for (last_parm_reg = 10; |
5069 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
5070 | last_parm_reg--) | |
5071 | ; | |
e165f3f0 RK |
5072 | |
5073 | /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since | |
5074 | it might be set up as the frame pointer. */ | |
5075 | ||
38c1f2d7 MM |
5076 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5077 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
e165f3f0 RK |
5078 | |
5079 | /* Load location address into r3, and call mcount. */ | |
5080 | ||
38c1f2d7 | 5081 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
13ded975 DE |
5082 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
5083 | reg_names[3]); | |
38c1f2d7 | 5084 | assemble_name (file, buf); |
a260abc9 DE |
5085 | asm_fprintf (file, "(%s)\n\tbl %s\n\t%s\n", |
5086 | reg_names[2], RS6000_MCOUNT, RS6000_CALL_GLUE); | |
e165f3f0 RK |
5087 | |
5088 | /* Restore parameter registers. */ | |
5089 | ||
38c1f2d7 MM |
5090 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5091 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
5092 | break; | |
5093 | } | |
e165f3f0 | 5094 | } |
a251ffd0 TG |
5095 | |
5096 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
5097 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
5098 | ||
5099 | int | |
a06faf84 | 5100 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
5101 | rtx insn; |
5102 | rtx link; | |
296b8152 | 5103 | rtx dep_insn ATTRIBUTE_UNUSED; |
a251ffd0 TG |
5104 | int cost; |
5105 | { | |
5106 | if (! recog_memoized (insn)) | |
5107 | return 0; | |
5108 | ||
5109 | if (REG_NOTE_KIND (link) != 0) | |
5110 | return 0; | |
5111 | ||
5112 | if (REG_NOTE_KIND (link) == 0) | |
5113 | { | |
5114 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
5115 | cycles later. */ | |
5116 | ||
5117 | /* Tell the first scheduling pass about the latency between a mtctr | |
5118 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
5119 | know about this latency since the mtctr instruction, which has the | |
5120 | latency associated to it, will be generated by reload. */ | |
5121 | if (get_attr_type (insn) == TYPE_JMPREG) | |
5122 | return TARGET_POWER ? 5 : 4; | |
5123 | ||
5124 | /* Fall out to return default cost. */ | |
5125 | } | |
5126 | ||
5127 | return cost; | |
5128 | } | |
b6c9286a | 5129 | |
bef84347 VM |
5130 | /* A C statement (sans semicolon) to update the integer scheduling priority |
5131 | INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, | |
5132 | increase the priority to execute INSN later. Do not define this macro if | |
5133 | you do not need to adjust the scheduling priorities of insns. */ | |
5134 | ||
5135 | int | |
5136 | rs6000_adjust_priority (insn, priority) | |
5137 | rtx insn; | |
5138 | int priority; | |
5139 | { | |
5140 | /* On machines (like the 750) which have asymetric integer units, where one | |
5141 | integer unit can do multiply and divides and the other can't, reduce the | |
5142 | priority of multiply/divide so it is scheduled before other integer | |
5143 | operationss. */ | |
5144 | ||
5145 | #if 0 | |
5146 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
5147 | return priority; | |
5148 | ||
5149 | if (GET_CODE (PATTERN (insn)) == USE) | |
5150 | return priority; | |
5151 | ||
5152 | switch (rs6000_cpu_attr) { | |
5153 | case CPU_PPC750: | |
5154 | switch (get_attr_type (insn)) | |
5155 | { | |
5156 | default: | |
5157 | break; | |
5158 | ||
5159 | case TYPE_IMUL: | |
5160 | case TYPE_IDIV: | |
5161 | fprintf (stderr, "priority was %#x (%d) before adjustment\n", priority, priority); | |
5162 | if (priority >= 0 && priority < 0x01000000) | |
5163 | priority >>= 3; | |
5164 | break; | |
5165 | } | |
5166 | } | |
5167 | #endif | |
5168 | ||
5169 | return priority; | |
5170 | } | |
5171 | ||
b6c9286a MM |
5172 | /* Return how many instructions the machine can issue per cycle */ |
5173 | int get_issue_rate() | |
5174 | { | |
5175 | switch (rs6000_cpu_attr) { | |
5176 | case CPU_RIOS1: | |
5177 | return 3; /* ? */ | |
5178 | case CPU_RIOS2: | |
5179 | return 4; | |
5180 | case CPU_PPC601: | |
5181 | return 3; /* ? */ | |
b6c9286a MM |
5182 | case CPU_PPC603: |
5183 | return 2; | |
bef84347 VM |
5184 | case CPU_PPC750: |
5185 | return 2; | |
b6c9286a MM |
5186 | case CPU_PPC604: |
5187 | return 4; | |
19684119 DE |
5188 | case CPU_PPC604E: |
5189 | return 4; | |
b6c9286a MM |
5190 | case CPU_PPC620: |
5191 | return 4; | |
5192 | default: | |
5193 | return 1; | |
5194 | } | |
5195 | } | |
5196 | ||
b6c9286a MM |
5197 | \f |
5198 | /* Output assembler code for a block containing the constant parts | |
5199 | of a trampoline, leaving space for the variable parts. | |
5200 | ||
5201 | The trampoline should set the static chain pointer to value placed | |
5202 | into the trampoline and should branch to the specified routine. */ | |
5203 | ||
5204 | void | |
5205 | rs6000_trampoline_template (file) | |
5206 | FILE *file; | |
5207 | { | |
5208 | char *sc = reg_names[STATIC_CHAIN_REGNUM]; | |
5209 | char *r0 = reg_names[0]; | |
7c59dc5d | 5210 | char *r2 = reg_names[2]; |
b6c9286a MM |
5211 | |
5212 | switch (DEFAULT_ABI) | |
5213 | { | |
5214 | default: | |
5215 | abort (); | |
5216 | ||
5217 | /* Under AIX, this is not code at all, but merely a data area, | |
5218 | since that is the way all functions are called. The first word is | |
5219 | the address of the function, the second word is the TOC pointer (r2), | |
5220 | and the third word is the static chain value. */ | |
5221 | case ABI_AIX: | |
b6c9286a MM |
5222 | break; |
5223 | ||
5224 | ||
5225 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
5226 | do the full gory code to load up the static chain. */ | |
5227 | case ABI_V4: | |
c81bebd7 | 5228 | case ABI_SOLARIS: |
b6c9286a | 5229 | case ABI_AIX_NODESC: |
b6c9286a MM |
5230 | break; |
5231 | ||
5232 | /* NT function pointers point to a two word area (real address, TOC) | |
5233 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
5234 | use the function field to point to ..LTRAMP1 and the toc field |
5235 | to point to the whole table. */ | |
b6c9286a | 5236 | case ABI_NT: |
7c59dc5d MM |
5237 | if (STATIC_CHAIN_REGNUM == 0 |
5238 | || STATIC_CHAIN_REGNUM == 2 | |
5239 | || TARGET_64BIT | |
5240 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
5241 | abort (); |
5242 | ||
7c59dc5d MM |
5243 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
5244 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
5245 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
5246 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
5247 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 5248 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
5249 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
5250 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
5251 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
5252 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
5253 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
5254 | break; |
5255 | } | |
5256 | ||
5257 | return; | |
5258 | } | |
5259 | ||
5260 | /* Length in units of the trampoline for entering a nested function. */ | |
5261 | ||
5262 | int | |
5263 | rs6000_trampoline_size () | |
5264 | { | |
5265 | int ret = 0; | |
5266 | ||
5267 | switch (DEFAULT_ABI) | |
5268 | { | |
5269 | default: | |
5270 | abort (); | |
5271 | ||
5272 | case ABI_AIX: | |
8f802bfb | 5273 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
5274 | break; |
5275 | ||
5276 | case ABI_V4: | |
c81bebd7 | 5277 | case ABI_SOLARIS: |
b6c9286a | 5278 | case ABI_AIX_NODESC: |
03a7e1a5 | 5279 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
5280 | break; |
5281 | ||
5282 | case ABI_NT: | |
7c59dc5d | 5283 | ret = 20; |
b6c9286a MM |
5284 | break; |
5285 | } | |
5286 | ||
5287 | return ret; | |
5288 | } | |
5289 | ||
5290 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
5291 | FNADDR is an RTX for the address of the function's pure code. | |
5292 | CXT is an RTX for the static chain value for the function. */ | |
5293 | ||
5294 | void | |
5295 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
5296 | rtx addr; | |
5297 | rtx fnaddr; | |
5298 | rtx cxt; | |
5299 | { | |
ac2a93a1 | 5300 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
5301 | int regsize = (TARGET_32BIT) ? 4 : 8; |
5302 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
5303 | |
5304 | switch (DEFAULT_ABI) | |
5305 | { | |
5306 | default: | |
5307 | abort (); | |
5308 | ||
8bd04c56 | 5309 | /* Macros to shorten the code expansions below. */ |
39403d82 DE |
5310 | #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) |
5311 | #define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) | |
7c59dc5d | 5312 | |
b6c9286a MM |
5313 | /* Under AIX, just build the 3 word function descriptor */ |
5314 | case ABI_AIX: | |
8bd04c56 MM |
5315 | { |
5316 | rtx fn_reg = gen_reg_rtx (pmode); | |
5317 | rtx toc_reg = gen_reg_rtx (pmode); | |
5318 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5319 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
5320 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
5321 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
5322 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
5323 | } | |
b6c9286a MM |
5324 | break; |
5325 | ||
eaf1bcf1 | 5326 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 5327 | case ABI_V4: |
c81bebd7 | 5328 | case ABI_SOLARIS: |
b6c9286a | 5329 | case ABI_AIX_NODESC: |
39403d82 | 5330 | emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), |
eaf1bcf1 MM |
5331 | FALSE, VOIDmode, 4, |
5332 | addr, pmode, | |
5333 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
5334 | fnaddr, pmode, | |
5335 | ctx_reg, pmode); | |
b6c9286a MM |
5336 | break; |
5337 | ||
8bd04c56 MM |
5338 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
5339 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 5340 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 5341 | case ABI_NT: |
8bd04c56 MM |
5342 | { |
5343 | rtx tramp_reg = gen_reg_rtx (pmode); | |
5344 | rtx fn_reg = gen_reg_rtx (pmode); | |
5345 | rtx toc_reg = gen_reg_rtx (pmode); | |
5346 | ||
39403d82 | 5347 | emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); |
8bd04c56 MM |
5348 | addr = force_reg (pmode, addr); |
5349 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5350 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
5351 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
5352 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
5353 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
5354 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
39403d82 | 5355 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); |
8bd04c56 | 5356 | } |
b6c9286a MM |
5357 | break; |
5358 | } | |
5359 | ||
5360 | return; | |
5361 | } | |
7509c759 MM |
5362 | |
5363 | \f | |
5364 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5365 | with arguments ARGS is a valid machine specific attribute for DECL. | |
5366 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
5367 | ||
5368 | int | |
5369 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
296b8152 KG |
5370 | tree decl ATTRIBUTE_UNUSED; |
5371 | tree attributes ATTRIBUTE_UNUSED; | |
5372 | tree identifier ATTRIBUTE_UNUSED; | |
5373 | tree args ATTRIBUTE_UNUSED; | |
7509c759 MM |
5374 | { |
5375 | return 0; | |
5376 | } | |
5377 | ||
5378 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5379 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
5380 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
5381 | ||
5382 | int | |
5383 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
5384 | tree type; | |
296b8152 | 5385 | tree attributes ATTRIBUTE_UNUSED; |
7509c759 MM |
5386 | tree identifier; |
5387 | tree args; | |
5388 | { | |
5389 | if (TREE_CODE (type) != FUNCTION_TYPE | |
5390 | && TREE_CODE (type) != FIELD_DECL | |
5391 | && TREE_CODE (type) != TYPE_DECL) | |
5392 | return 0; | |
5393 | ||
6a4cee5f MM |
5394 | /* Longcall attribute says that the function is not within 2**26 bytes |
5395 | of the current function, and to do an indirect call. */ | |
5396 | if (is_attribute_p ("longcall", identifier)) | |
5397 | return (args == NULL_TREE); | |
5398 | ||
7509c759 MM |
5399 | if (DEFAULT_ABI == ABI_NT) |
5400 | { | |
5401 | /* Stdcall attribute says callee is responsible for popping arguments | |
5402 | if they are not variable. */ | |
5403 | if (is_attribute_p ("stdcall", identifier)) | |
5404 | return (args == NULL_TREE); | |
5405 | ||
5406 | /* Cdecl attribute says the callee is a normal C declaration */ | |
5407 | if (is_attribute_p ("cdecl", identifier)) | |
5408 | return (args == NULL_TREE); | |
5409 | ||
38e01259 | 5410 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
5411 | indirectly through a __imp_<name> pointer. */ |
5412 | if (is_attribute_p ("dllimport", identifier)) | |
5413 | return (args == NULL_TREE); | |
5414 | ||
38e01259 | 5415 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
5416 | pointer. */ |
5417 | if (is_attribute_p ("dllexport", identifier)) | |
5418 | return (args == NULL_TREE); | |
e56bb9ed MM |
5419 | |
5420 | /* Exception attribute allows the user to specify 1-2 strings or identifiers | |
5421 | that will fill in the 3rd and 4th fields of the structured exception | |
5422 | table. */ | |
5423 | if (is_attribute_p ("exception", identifier)) | |
5424 | { | |
5425 | int i; | |
5426 | ||
5427 | if (args == NULL_TREE) | |
5428 | return 0; | |
5429 | ||
5430 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
5431 | { | |
5432 | tree this_arg = TREE_VALUE (args); | |
5433 | args = TREE_PURPOSE (args); | |
5434 | ||
5435 | if (TREE_CODE (this_arg) != STRING_CST | |
5436 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
5437 | return 0; | |
5438 | } | |
5439 | ||
5440 | return (args == NULL_TREE); | |
5441 | } | |
7509c759 MM |
5442 | } |
5443 | ||
5444 | return 0; | |
5445 | } | |
5446 | ||
5447 | /* If defined, a C expression whose value is zero if the attributes on | |
5448 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
5449 | two if they are nearly compatible (which causes a warning to be | |
5450 | generated). */ | |
5451 | ||
5452 | int | |
5453 | rs6000_comp_type_attributes (type1, type2) | |
296b8152 KG |
5454 | tree type1 ATTRIBUTE_UNUSED; |
5455 | tree type2 ATTRIBUTE_UNUSED; | |
7509c759 MM |
5456 | { |
5457 | return 1; | |
5458 | } | |
5459 | ||
5460 | /* If defined, a C statement that assigns default attributes to newly | |
5461 | defined TYPE. */ | |
5462 | ||
5463 | void | |
5464 | rs6000_set_default_type_attributes (type) | |
296b8152 | 5465 | tree type ATTRIBUTE_UNUSED; |
7509c759 MM |
5466 | { |
5467 | } | |
5468 | ||
38e01259 | 5469 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
5470 | struct rtx_def * |
5471 | rs6000_dll_import_ref (call_ref) | |
5472 | rtx call_ref; | |
5473 | { | |
5474 | char *call_name; | |
5475 | int len; | |
5476 | char *p; | |
5477 | rtx reg1, reg2; | |
5478 | tree node; | |
5479 | ||
5480 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5481 | abort (); | |
5482 | ||
5483 | call_name = XSTR (call_ref, 0); | |
5484 | len = sizeof ("__imp_") + strlen (call_name); | |
5485 | p = alloca (len); | |
5486 | reg2 = gen_reg_rtx (Pmode); | |
5487 | ||
5488 | strcpy (p, "__imp_"); | |
5489 | strcat (p, call_name); | |
5490 | node = get_identifier (p); | |
5491 | ||
39403d82 DE |
5492 | reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node))); |
5493 | emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); | |
7509c759 MM |
5494 | |
5495 | return reg2; | |
5496 | } | |
5497 | ||
6a4cee5f MM |
5498 | /* Return a reference suitable for calling a function with the longcall attribute. */ |
5499 | struct rtx_def * | |
5500 | rs6000_longcall_ref (call_ref) | |
5501 | rtx call_ref; | |
5502 | { | |
5503 | char *call_name; | |
6a4cee5f MM |
5504 | tree node; |
5505 | ||
5506 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5507 | return call_ref; | |
5508 | ||
5509 | /* System V adds '.' to the internal name, so skip them. */ | |
5510 | call_name = XSTR (call_ref, 0); | |
5511 | if (*call_name == '.') | |
5512 | { | |
5513 | while (*call_name == '.') | |
5514 | call_name++; | |
5515 | ||
5516 | node = get_identifier (call_name); | |
39403d82 | 5517 | call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); |
6a4cee5f MM |
5518 | } |
5519 | ||
5520 | return force_reg (Pmode, call_ref); | |
5521 | } | |
5522 | ||
7509c759 MM |
5523 | \f |
5524 | /* A C statement or statements to switch to the appropriate section | |
5525 | for output of RTX in mode MODE. You can assume that RTX is some | |
5526 | kind of constant in RTL. The argument MODE is redundant except in | |
5527 | the case of a `const_int' rtx. Select the section by calling | |
5528 | `text_section' or one of the alternatives for other sections. | |
5529 | ||
5530 | Do not define this macro if you put all constants in the read-only | |
5531 | data section. */ | |
5532 | ||
5533 | #ifdef USING_SVR4_H | |
5534 | ||
5535 | void | |
5536 | rs6000_select_rtx_section (mode, x) | |
5537 | enum machine_mode mode; | |
5538 | rtx x; | |
5539 | { | |
5540 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
5541 | toc_section (); | |
7509c759 MM |
5542 | else |
5543 | const_section (); | |
5544 | } | |
5545 | ||
5546 | /* A C statement or statements to switch to the appropriate | |
5547 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5548 | or a constant of some sort. RELOC indicates whether forming | |
5549 | the initial value of DECL requires link-time relocations. */ | |
5550 | ||
5551 | void | |
5552 | rs6000_select_section (decl, reloc) | |
5553 | tree decl; | |
5554 | int reloc; | |
5555 | { | |
5556 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5557 | ||
5558 | if (TREE_CODE (decl) == STRING_CST) | |
5559 | { | |
88228c4b | 5560 | if (! flag_writable_strings) |
7509c759 | 5561 | const_section (); |
7509c759 MM |
5562 | else |
5563 | data_section (); | |
5564 | } | |
5565 | else if (TREE_CODE (decl) == VAR_DECL) | |
5566 | { | |
5567 | if ((flag_pic && reloc) | |
5568 | || !TREE_READONLY (decl) | |
5569 | || TREE_SIDE_EFFECTS (decl) | |
5570 | || !DECL_INITIAL (decl) | |
5571 | || (DECL_INITIAL (decl) != error_mark_node | |
5572 | && !TREE_CONSTANT (DECL_INITIAL (decl)))) | |
5573 | { | |
d9407988 | 5574 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
7509c759 MM |
5575 | sdata_section (); |
5576 | else | |
5577 | data_section (); | |
5578 | } | |
5579 | else | |
5580 | { | |
d9407988 | 5581 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
c81bebd7 | 5582 | { |
d9407988 | 5583 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5584 | sdata2_section (); |
5585 | else | |
5586 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ | |
5587 | } | |
7509c759 MM |
5588 | else |
5589 | const_section (); | |
5590 | } | |
5591 | } | |
5592 | else | |
5593 | const_section (); | |
5594 | } | |
d9407988 MM |
5595 | |
5596 | \f | |
5597 | ||
5598 | /* If we are referencing a function that is static or is known to be | |
5599 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5600 | that we can branch to this function without emitting a no-op after the | |
5601 | call. For real AIX and NT calling sequences, we also replace the | |
5602 | function name with the real name (1 or 2 leading .'s), rather than | |
5603 | the function descriptor name. This saves a lot of overriding code | |
a260abc9 | 5604 | to read the prefixes. */ |
d9407988 MM |
5605 | |
5606 | void | |
5607 | rs6000_encode_section_info (decl) | |
5608 | tree decl; | |
5609 | { | |
5610 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
5611 | { | |
5612 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5613 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
5614 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
5615 | ||
5616 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
5617 | { | |
5618 | char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; | |
5619 | char *str = permalloc (strlen (prefix) + 1 | |
5620 | + strlen (XSTR (sym_ref, 0))); | |
5621 | strcpy (str, prefix); | |
5622 | strcat (str, XSTR (sym_ref, 0)); | |
5623 | XSTR (sym_ref, 0) = str; | |
5624 | } | |
5625 | } | |
5626 | else if (rs6000_sdata != SDATA_NONE | |
5627 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
5628 | && TREE_CODE (decl) == VAR_DECL) | |
5629 | { | |
5630 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5631 | tree section_name = DECL_SECTION_NAME (decl); | |
5632 | char *name = (char *)0; | |
5633 | int len = 0; | |
5634 | ||
5635 | if (section_name) | |
5636 | { | |
5637 | if (TREE_CODE (section_name) == STRING_CST) | |
5638 | { | |
5639 | name = TREE_STRING_POINTER (section_name); | |
5640 | len = TREE_STRING_LENGTH (section_name); | |
5641 | } | |
5642 | else | |
5643 | abort (); | |
5644 | } | |
5645 | ||
5646 | if ((size > 0 && size <= g_switch_value) | |
5647 | || (name | |
5648 | && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) | |
5649 | || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) | |
5650 | || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) | |
5651 | || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) | |
5652 | || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
5653 | || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
5654 | { | |
5655 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5656 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
5657 | strcpy (str, "@"); | |
5658 | strcat (str, XSTR (sym_ref, 0)); | |
5659 | XSTR (sym_ref, 0) = str; | |
5660 | } | |
5661 | } | |
5662 | } | |
5663 | ||
7509c759 | 5664 | #endif /* USING_SVR4_H */ |
a6c2a102 DE |
5665 | \f |
5666 | void | |
5667 | rs6000_fatal_bad_address (op) | |
5668 | rtx op; | |
5669 | { | |
5670 | fatal_insn ("bad address", op); | |
5671 | } |