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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
a7653a2c | 2 | Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c RK |
21 | |
22 | #include <stdio.h> | |
127b0efc | 23 | #include <ctype.h> |
9878760c RK |
24 | #include "config.h" |
25 | #include "rtl.h" | |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "real.h" | |
29 | #include "insn-config.h" | |
30 | #include "conditions.h" | |
31 | #include "insn-flags.h" | |
32 | #include "output.h" | |
33 | #include "insn-attr.h" | |
34 | #include "flags.h" | |
35 | #include "recog.h" | |
36 | #include "expr.h" | |
37 | #include "obstack.h" | |
9b30bae2 | 38 | #include "tree.h" |
2a430ec1 | 39 | #include "except.h" |
a7df97e6 | 40 | #include "function.h" |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
57 | /* switch name, tune arch */ | |
5d6426e0 | 58 | { (char *)0, "--with-cpu=", 1, 1 }, |
8e3f41e7 MM |
59 | { (char *)0, "-mcpu=", 1, 1 }, |
60 | { (char *)0, "-mtune=", 1, 0 }, | |
61 | }; | |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
c81bebd7 MM |
84 | |
85 | /* Which abi to adhere to */ | |
86 | char *rs6000_abi_name = RS6000_ABI_NAME; | |
d9407988 MM |
87 | |
88 | /* Semantics of the small data area */ | |
89 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
90 | ||
91 | /* Which small data model to use */ | |
92 | char *rs6000_sdata_name = (char *)0; | |
874a0744 | 93 | #endif |
4697a36c MM |
94 | |
95 | /* Whether a System V.4 varargs area was created. */ | |
96 | int rs6000_sysv_varargs_p; | |
8f75773e | 97 | |
b6c9286a MM |
98 | /* ABI enumeration available for subtarget to use. */ |
99 | enum rs6000_abi rs6000_current_abi; | |
100 | ||
802a0058 MM |
101 | /* Offset & size for fpmem stack locations used for converting between |
102 | float and integral types. */ | |
103 | int rs6000_fpmem_offset; | |
104 | int rs6000_fpmem_size; | |
105 | ||
c81bebd7 MM |
106 | \f |
107 | /* Default register names. */ | |
108 | char rs6000_reg_names[][8] = | |
109 | { | |
802a0058 MM |
110 | "0", "1", "2", "3", "4", "5", "6", "7", |
111 | "8", "9", "10", "11", "12", "13", "14", "15", | |
112 | "16", "17", "18", "19", "20", "21", "22", "23", | |
113 | "24", "25", "26", "27", "28", "29", "30", "31", | |
114 | "0", "1", "2", "3", "4", "5", "6", "7", | |
115 | "8", "9", "10", "11", "12", "13", "14", "15", | |
116 | "16", "17", "18", "19", "20", "21", "22", "23", | |
117 | "24", "25", "26", "27", "28", "29", "30", "31", | |
118 | "mq", "lr", "ctr","ap", | |
119 | "0", "1", "2", "3", "4", "5", "6", "7", | |
120 | "fpmem" | |
c81bebd7 MM |
121 | }; |
122 | ||
123 | #ifdef TARGET_REGNAMES | |
124 | static char alt_reg_names[][8] = | |
125 | { | |
802a0058 MM |
126 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
127 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
128 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
129 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
130 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
131 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
132 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
133 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
134 | "mq", "lr", "ctr", "ap", | |
135 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
136 | "fpmem" | |
c81bebd7 MM |
137 | }; |
138 | #endif | |
9878760c | 139 | \f |
5248c961 RK |
140 | /* Override command line options. Mostly we process the processor |
141 | type and sometimes adjust other TARGET_ options. */ | |
142 | ||
143 | void | |
8e3f41e7 MM |
144 | rs6000_override_options (default_cpu) |
145 | char *default_cpu; | |
5248c961 | 146 | { |
8e3f41e7 MM |
147 | int i, j; |
148 | struct rs6000_cpu_select *ptr; | |
5248c961 | 149 | |
85638c0d RK |
150 | /* Simplify the entries below by making a mask for any POWER |
151 | variant and any PowerPC variant. */ | |
152 | ||
938937d8 | 153 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
154 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
155 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
156 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 157 | |
5248c961 RK |
158 | static struct ptt |
159 | { | |
160 | char *name; /* Canonical processor name. */ | |
161 | enum processor_type processor; /* Processor type enum value. */ | |
162 | int target_enable; /* Target flags to enable. */ | |
163 | int target_disable; /* Target flags to disable. */ | |
164 | } processor_target_table[] | |
cf27b467 MM |
165 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
166 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 167 | {"power", PROCESSOR_POWER, |
938937d8 | 168 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 169 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
170 | {"power2", PROCESSOR_POWER, |
171 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
172 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
173 | {"powerpc", PROCESSOR_POWERPC, |
174 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 175 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
db7f1e43 | 176 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 177 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
178 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
179 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 180 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
181 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
182 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 183 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
184 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
185 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 186 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
187 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
188 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 189 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 190 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
49a0b204 MM |
191 | {"403", PROCESSOR_PPC403, |
192 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
193 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
194 | {"505", PROCESSOR_MPCCORE, |
195 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
196 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 197 | {"601", PROCESSOR_PPC601, |
938937d8 | 198 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 199 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 200 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
201 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
202 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 203 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
204 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
205 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
206 | {"603e", PROCESSOR_PPC603, |
207 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
208 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 209 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
210 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
211 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
212 | {"620", PROCESSOR_PPC620, | |
68c49ffa | 213 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
cf27b467 MM |
214 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, |
215 | {"821", PROCESSOR_MPCCORE, | |
216 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
217 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
218 | {"860", PROCESSOR_MPCCORE, | |
219 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
220 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 RK |
221 | |
222 | int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); | |
223 | ||
8a61d227 | 224 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 225 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 226 | |
5248c961 RK |
227 | profile_block_flag = 0; |
228 | ||
229 | /* Identify the processor type */ | |
8e3f41e7 MM |
230 | rs6000_select[0].string = default_cpu; |
231 | rs6000_cpu = PROCESSOR_DEFAULT; | |
8e3f41e7 MM |
232 | |
233 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 234 | { |
8e3f41e7 MM |
235 | ptr = &rs6000_select[i]; |
236 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 237 | { |
8e3f41e7 MM |
238 | for (j = 0; j < ptt_size; j++) |
239 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
240 | { | |
241 | if (ptr->set_tune_p) | |
242 | rs6000_cpu = processor_target_table[j].processor; | |
243 | ||
244 | if (ptr->set_arch_p) | |
245 | { | |
246 | target_flags |= processor_target_table[j].target_enable; | |
247 | target_flags &= ~processor_target_table[j].target_disable; | |
248 | } | |
249 | break; | |
250 | } | |
251 | ||
252 | if (i == ptt_size) | |
253 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
254 | } |
255 | } | |
8a61d227 MM |
256 | |
257 | /* If -mmultiple or -mno-multiple was explicitly used, don't | |
258 | override with the processor default */ | |
259 | if (TARGET_MULTIPLE_SET) | |
260 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 261 | |
938937d8 MM |
262 | /* If -mstring or -mno-string was explicitly used, don't |
263 | override with the processor default */ | |
264 | if (TARGET_STRING_SET) | |
1f5515bf | 265 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 266 | |
7e69e155 MM |
267 | /* Don't allow -mmultiple or -mstring on little endian systems, because the |
268 | hardware doesn't support the instructions used in little endian mode */ | |
269 | if (!BYTES_BIG_ENDIAN) | |
270 | { | |
271 | if (TARGET_MULTIPLE) | |
272 | { | |
273 | target_flags &= ~MASK_MULTIPLE; | |
274 | if (TARGET_MULTIPLE_SET) | |
275 | warning ("-mmultiple is not supported on little endian systems"); | |
276 | } | |
277 | ||
278 | if (TARGET_STRING) | |
279 | { | |
280 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
281 | if (TARGET_STRING_SET) |
282 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
283 | } |
284 | } | |
3933e0e1 | 285 | |
c81bebd7 MM |
286 | #ifdef TARGET_REGNAMES |
287 | /* If the user desires alternate register names, copy in the alternate names | |
288 | now. */ | |
289 | if (TARGET_REGNAMES) | |
290 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names)); | |
291 | #endif | |
292 | ||
3933e0e1 MM |
293 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
294 | SUBTARGET_OVERRIDE_OPTIONS; | |
295 | #endif | |
5248c961 | 296 | } |
3cfa4909 MM |
297 | \f |
298 | /* Do anything needed at the start of the asm file. */ | |
299 | ||
300 | void | |
301 | rs6000_file_start (file, default_cpu) | |
302 | FILE *file; | |
303 | char *default_cpu; | |
304 | { | |
305 | int i; | |
306 | char buffer[80]; | |
307 | char *start = buffer; | |
308 | struct rs6000_cpu_select *ptr; | |
309 | ||
310 | if (flag_verbose_asm) | |
311 | { | |
312 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
313 | rs6000_select[0].string = default_cpu; | |
314 | ||
315 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
316 | { | |
317 | ptr = &rs6000_select[i]; | |
318 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
319 | { | |
320 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
321 | start = ""; | |
322 | } | |
323 | } | |
324 | ||
325 | #ifdef USING_SVR4_H | |
326 | switch (rs6000_sdata) | |
327 | { | |
328 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
329 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
330 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
331 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
332 | } | |
333 | ||
334 | if (rs6000_sdata && g_switch_value) | |
335 | { | |
336 | fprintf (file, "%s -G %d", start, g_switch_value); | |
337 | start = ""; | |
338 | } | |
339 | #endif | |
340 | ||
341 | if (*start == '\0') | |
342 | fputs ("\n", file); | |
343 | } | |
344 | } | |
345 | ||
24d304eb RK |
346 | \f |
347 | /* Create a CONST_DOUBLE from a string. */ | |
348 | ||
349 | struct rtx_def * | |
350 | rs6000_float_const (string, mode) | |
351 | char *string; | |
352 | enum machine_mode mode; | |
353 | { | |
354 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
355 | return immed_real_const_1 (value, mode); | |
356 | } | |
357 | ||
75814ad4 MM |
358 | \f |
359 | /* Create a CONST_DOUBLE like immed_double_const, except reverse the | |
360 | two parts of the constant if the target is little endian. */ | |
361 | ||
d679bebf RK |
362 | struct rtx_def * |
363 | rs6000_immed_double_const (i0, i1, mode) | |
75814ad4 MM |
364 | HOST_WIDE_INT i0, i1; |
365 | enum machine_mode mode; | |
366 | { | |
367 | if (! WORDS_BIG_ENDIAN) | |
368 | return immed_double_const (i1, i0, mode); | |
369 | ||
370 | return immed_double_const (i0, i1, mode); | |
371 | } | |
372 | ||
5248c961 | 373 | \f |
9878760c RK |
374 | /* Return non-zero if this function is known to have a null epilogue. */ |
375 | ||
376 | int | |
377 | direct_return () | |
378 | { | |
4697a36c MM |
379 | if (reload_completed) |
380 | { | |
381 | rs6000_stack_t *info = rs6000_stack_info (); | |
382 | ||
383 | if (info->first_gp_reg_save == 32 | |
384 | && info->first_fp_reg_save == 64 | |
385 | && !info->lr_save_p | |
1b4a2731 | 386 | && !info->cr_save_p |
4697a36c MM |
387 | && !info->push_p) |
388 | return 1; | |
389 | } | |
390 | ||
391 | return 0; | |
9878760c RK |
392 | } |
393 | ||
394 | /* Returns 1 always. */ | |
395 | ||
396 | int | |
397 | any_operand (op, mode) | |
398 | register rtx op; | |
399 | enum machine_mode mode; | |
400 | { | |
401 | return 1; | |
402 | } | |
403 | ||
b6c9286a MM |
404 | /* Returns 1 if op is the count register */ |
405 | int count_register_operand(op, mode) | |
406 | register rtx op; | |
407 | enum machine_mode mode; | |
408 | { | |
409 | if (GET_CODE (op) != REG) | |
410 | return 0; | |
411 | ||
412 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
413 | return 1; | |
414 | ||
415 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
416 | return 1; | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
802a0058 MM |
421 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
422 | as a register. */ | |
423 | int fpmem_operand(op, mode) | |
424 | register rtx op; | |
425 | enum machine_mode mode; | |
426 | { | |
427 | if (GET_CODE (op) != REG) | |
428 | return 0; | |
429 | ||
430 | if (FPMEM_REGNO_P (REGNO (op))) | |
431 | return 1; | |
432 | ||
433 | #if 0 | |
434 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
435 | return 1; | |
436 | #endif | |
437 | ||
438 | return 0; | |
439 | } | |
440 | ||
9878760c RK |
441 | /* Return 1 if OP is a constant that can fit in a D field. */ |
442 | ||
443 | int | |
444 | short_cint_operand (op, mode) | |
445 | register rtx op; | |
446 | enum machine_mode mode; | |
447 | { | |
448 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 449 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000); |
9878760c RK |
450 | } |
451 | ||
452 | /* Similar for a unsigned D field. */ | |
453 | ||
454 | int | |
455 | u_short_cint_operand (op, mode) | |
456 | register rtx op; | |
457 | enum machine_mode mode; | |
458 | { | |
459 | return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0); | |
460 | } | |
461 | ||
dcfedcd0 RK |
462 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
463 | ||
464 | int | |
465 | non_short_cint_operand (op, mode) | |
466 | register rtx op; | |
467 | enum machine_mode mode; | |
468 | { | |
469 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 470 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
471 | } |
472 | ||
9878760c RK |
473 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
474 | ctr, or lr). */ | |
475 | ||
476 | int | |
cd2b37d9 | 477 | gpc_reg_operand (op, mode) |
9878760c RK |
478 | register rtx op; |
479 | enum machine_mode mode; | |
480 | { | |
481 | return (register_operand (op, mode) | |
802a0058 MM |
482 | && (GET_CODE (op) != REG |
483 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
484 | || REGNO (op) < 64)); | |
9878760c RK |
485 | } |
486 | ||
487 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
488 | CR field. */ | |
489 | ||
490 | int | |
491 | cc_reg_operand (op, mode) | |
492 | register rtx op; | |
493 | enum machine_mode mode; | |
494 | { | |
495 | return (register_operand (op, mode) | |
496 | && (GET_CODE (op) != REG | |
497 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
498 | || CR_REGNO_P (REGNO (op)))); | |
499 | } | |
500 | ||
501 | /* Returns 1 if OP is either a constant integer valid for a D-field or a | |
502 | non-special register. If a register, it must be in the proper mode unless | |
503 | MODE is VOIDmode. */ | |
504 | ||
505 | int | |
506 | reg_or_short_operand (op, mode) | |
507 | register rtx op; | |
508 | enum machine_mode mode; | |
509 | { | |
f5a28898 | 510 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
511 | } |
512 | ||
513 | /* Similar, except check if the negation of the constant would be valid for | |
514 | a D-field. */ | |
515 | ||
516 | int | |
517 | reg_or_neg_short_operand (op, mode) | |
518 | register rtx op; | |
519 | enum machine_mode mode; | |
520 | { | |
521 | if (GET_CODE (op) == CONST_INT) | |
522 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
523 | ||
cd2b37d9 | 524 | return gpc_reg_operand (op, mode); |
9878760c RK |
525 | } |
526 | ||
527 | /* Return 1 if the operand is either a register or an integer whose high-order | |
528 | 16 bits are zero. */ | |
529 | ||
530 | int | |
531 | reg_or_u_short_operand (op, mode) | |
532 | register rtx op; | |
533 | enum machine_mode mode; | |
534 | { | |
535 | if (GET_CODE (op) == CONST_INT | |
536 | && (INTVAL (op) & 0xffff0000) == 0) | |
537 | return 1; | |
538 | ||
cd2b37d9 | 539 | return gpc_reg_operand (op, mode); |
9878760c RK |
540 | } |
541 | ||
542 | /* Return 1 is the operand is either a non-special register or ANY | |
543 | constant integer. */ | |
544 | ||
545 | int | |
546 | reg_or_cint_operand (op, mode) | |
547 | register rtx op; | |
548 | enum machine_mode mode; | |
549 | { | |
cd2b37d9 | 550 | return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode); |
9878760c RK |
551 | } |
552 | ||
766a866c MM |
553 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
554 | ||
555 | int | |
556 | got_operand (op, mode) | |
557 | register rtx op; | |
558 | enum machine_mode mode; | |
559 | { | |
560 | return (GET_CODE (op) == SYMBOL_REF | |
561 | || GET_CODE (op) == CONST | |
562 | || GET_CODE (op) == LABEL_REF); | |
563 | } | |
564 | ||
4e74d8ec MM |
565 | /* Return the number of instructions it takes to form a constant in an |
566 | integer register. */ | |
567 | ||
568 | static int | |
569 | num_insns_constant_wide (value) | |
570 | HOST_WIDE_INT value; | |
571 | { | |
572 | /* signed constant loadable with {cal|addi} */ | |
573 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
574 | return 1; | |
575 | ||
576 | #if HOST_BITS_PER_WIDE_INT == 32 | |
577 | /* constant loadable with {cau|addis} */ | |
578 | else if ((value & 0xffff) == 0) | |
579 | return 1; | |
580 | ||
581 | #else | |
582 | /* constant loadable with {cau|addis} */ | |
583 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) | |
584 | return 1; | |
585 | ||
586 | else if (TARGET_64BIT) | |
587 | { | |
588 | HOST_WIDE_INT low = value & 0xffffffff; | |
589 | HOST_WIDE_INT high = value >> 32; | |
590 | ||
591 | if (high == 0 && (low & 0x80000000) == 0) | |
592 | return 2; | |
593 | ||
594 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
595 | return 2; | |
596 | ||
597 | else if (!low) | |
598 | return num_insns_constant_wide (high) + 1; | |
599 | ||
600 | else | |
601 | return (num_insns_constant_wide (high) | |
e396202a | 602 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
603 | } |
604 | #endif | |
605 | ||
606 | else | |
607 | return 2; | |
608 | } | |
609 | ||
610 | int | |
611 | num_insns_constant (op, mode) | |
612 | rtx op; | |
613 | enum machine_mode mode; | |
614 | { | |
4e74d8ec MM |
615 | if (GET_CODE (op) == CONST_INT) |
616 | return num_insns_constant_wide (INTVAL (op)); | |
617 | ||
6fc48950 MM |
618 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
619 | { | |
620 | long l; | |
621 | REAL_VALUE_TYPE rv; | |
622 | ||
623 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
624 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
625 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
626 | } | |
627 | ||
4e74d8ec MM |
628 | else if (GET_CODE (op) == CONST_DOUBLE && TARGET_32BIT) |
629 | return (num_insns_constant_wide (CONST_DOUBLE_LOW (op)) | |
630 | + num_insns_constant_wide (CONST_DOUBLE_HIGH (op))); | |
631 | ||
632 | else if (GET_CODE (op) == CONST_DOUBLE && TARGET_64BIT) | |
633 | { | |
634 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
635 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); | |
636 | ||
637 | if (high == 0 && (low & 0x80000000) == 0) | |
638 | return num_insns_constant_wide (low); | |
639 | ||
640 | else if (((high & 0xffffffff) == 0xffffffff) | |
641 | && ((low & 0x80000000) != 0)) | |
642 | return num_insns_constant_wide (low); | |
643 | ||
644 | else if (low == 0) | |
645 | return num_insns_constant_wide (high) + 1; | |
646 | ||
647 | else | |
648 | return (num_insns_constant_wide (high) | |
649 | + num_insns_constant_wide (low) + 1); | |
650 | } | |
651 | ||
652 | else | |
653 | abort (); | |
654 | } | |
655 | ||
6f2f8311 RK |
656 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
657 | with one instruction per word. We only do this if we can safely read | |
658 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
659 | |
660 | int | |
661 | easy_fp_constant (op, mode) | |
662 | register rtx op; | |
663 | register enum machine_mode mode; | |
664 | { | |
9878760c RK |
665 | if (GET_CODE (op) != CONST_DOUBLE |
666 | || GET_MODE (op) != mode | |
4e74d8ec | 667 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
668 | return 0; |
669 | ||
b6c9286a | 670 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 671 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
672 | return 1; |
673 | ||
a7273471 MM |
674 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
675 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
676 | return 0; | |
677 | ||
042259f2 DE |
678 | if (mode == DFmode) |
679 | { | |
680 | long k[2]; | |
681 | REAL_VALUE_TYPE rv; | |
682 | ||
683 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
684 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 685 | |
4e74d8ec MM |
686 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
687 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 688 | } |
4e74d8ec MM |
689 | |
690 | else if (mode == SFmode) | |
042259f2 DE |
691 | { |
692 | long l; | |
693 | REAL_VALUE_TYPE rv; | |
694 | ||
695 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
696 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 697 | |
4e74d8ec | 698 | return num_insns_constant_wide (l) == 1; |
042259f2 | 699 | } |
4e74d8ec MM |
700 | |
701 | else if (mode == DImode && TARGET_32BIT) | |
702 | return num_insns_constant (op, DImode) == 2; | |
703 | ||
704 | else | |
705 | abort (); | |
9878760c | 706 | } |
8f75773e | 707 | |
b6c9286a MM |
708 | /* Return 1 if the operand is in volatile memory. Note that during the |
709 | RTL generation phase, memory_operand does not return TRUE for | |
710 | volatile memory references. So this function allows us to | |
711 | recognize volatile references where its safe. */ | |
712 | ||
713 | int | |
714 | volatile_mem_operand (op, mode) | |
715 | register rtx op; | |
716 | enum machine_mode mode; | |
717 | { | |
718 | if (GET_CODE (op) != MEM) | |
719 | return 0; | |
720 | ||
721 | if (!MEM_VOLATILE_P (op)) | |
722 | return 0; | |
723 | ||
724 | if (mode != GET_MODE (op)) | |
725 | return 0; | |
726 | ||
727 | if (reload_completed) | |
728 | return memory_operand (op, mode); | |
729 | ||
730 | if (reload_in_progress) | |
731 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
732 | ||
733 | return memory_address_p (mode, XEXP (op, 0)); | |
734 | } | |
735 | ||
5b5040b9 | 736 | /* Return 1 if the operand is an offsettable memory address. */ |
914c2e77 RK |
737 | |
738 | int | |
5b5040b9 | 739 | offsettable_addr_operand (op, mode) |
914c2e77 RK |
740 | register rtx op; |
741 | enum machine_mode mode; | |
742 | { | |
8f75773e | 743 | return offsettable_address_p (reload_completed | reload_in_progress, |
5b5040b9 | 744 | mode, op); |
914c2e77 RK |
745 | } |
746 | ||
9878760c RK |
747 | /* Return 1 if the operand is either a floating-point register, a pseudo |
748 | register, or memory. */ | |
749 | ||
750 | int | |
751 | fp_reg_or_mem_operand (op, mode) | |
752 | register rtx op; | |
753 | enum machine_mode mode; | |
754 | { | |
755 | return (memory_operand (op, mode) | |
b6c9286a | 756 | || volatile_mem_operand (op, mode) |
9878760c RK |
757 | || (register_operand (op, mode) |
758 | && (GET_CODE (op) != REG | |
759 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
760 | || FP_REGNO_P (REGNO (op))))); | |
761 | } | |
762 | ||
763 | /* Return 1 if the operand is either an easy FP constant (see above) or | |
764 | memory. */ | |
765 | ||
766 | int | |
767 | mem_or_easy_const_operand (op, mode) | |
768 | register rtx op; | |
769 | enum machine_mode mode; | |
770 | { | |
771 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
772 | } | |
773 | ||
774 | /* Return 1 if the operand is either a non-special register or an item | |
775 | that can be used as the operand of an SI add insn. */ | |
776 | ||
777 | int | |
778 | add_operand (op, mode) | |
779 | register rtx op; | |
780 | enum machine_mode mode; | |
781 | { | |
782 | return (reg_or_short_operand (op, mode) | |
783 | || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); | |
784 | } | |
785 | ||
dcfedcd0 RK |
786 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
787 | ||
788 | int | |
789 | non_add_cint_operand (op, mode) | |
790 | register rtx op; | |
791 | enum machine_mode mode; | |
792 | { | |
793 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 794 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
dcfedcd0 RK |
795 | && (INTVAL (op) & 0xffff) != 0); |
796 | } | |
797 | ||
9878760c RK |
798 | /* Return 1 if the operand is a non-special register or a constant that |
799 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
800 | ||
801 | int | |
802 | logical_operand (op, mode) | |
803 | register rtx op; | |
804 | enum machine_mode mode; | |
805 | { | |
cd2b37d9 | 806 | return (gpc_reg_operand (op, mode) |
9878760c RK |
807 | || (GET_CODE (op) == CONST_INT |
808 | && ((INTVAL (op) & 0xffff0000) == 0 | |
809 | || (INTVAL (op) & 0xffff) == 0))); | |
810 | } | |
811 | ||
dcfedcd0 RK |
812 | /* Return 1 if C is a constant that is not a logical operand (as |
813 | above). */ | |
814 | ||
815 | int | |
816 | non_logical_cint_operand (op, mode) | |
817 | register rtx op; | |
818 | enum machine_mode mode; | |
819 | { | |
820 | return (GET_CODE (op) == CONST_INT | |
821 | && (INTVAL (op) & 0xffff0000) != 0 | |
822 | && (INTVAL (op) & 0xffff) != 0); | |
823 | } | |
824 | ||
9878760c RK |
825 | /* Return 1 if C is a constant that can be encoded in a mask on the |
826 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. | |
827 | Reject all ones and all zeros, since these should have been optimized | |
828 | away and confuse the making of MB and ME. */ | |
829 | ||
830 | int | |
831 | mask_constant (c) | |
832 | register int c; | |
833 | { | |
834 | int i; | |
835 | int last_bit_value; | |
836 | int transitions = 0; | |
837 | ||
838 | if (c == 0 || c == ~0) | |
839 | return 0; | |
840 | ||
841 | last_bit_value = c & 1; | |
842 | ||
843 | for (i = 1; i < 32; i++) | |
844 | if (((c >>= 1) & 1) != last_bit_value) | |
845 | last_bit_value ^= 1, transitions++; | |
846 | ||
847 | return transitions <= 2; | |
848 | } | |
849 | ||
850 | /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ | |
851 | ||
852 | int | |
853 | mask_operand (op, mode) | |
854 | register rtx op; | |
855 | enum machine_mode mode; | |
856 | { | |
857 | return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); | |
858 | } | |
859 | ||
860 | /* Return 1 if the operand is either a non-special register or a | |
861 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
862 | ||
863 | int | |
864 | and_operand (op, mode) | |
865 | register rtx op; | |
866 | enum machine_mode mode; | |
867 | { | |
868 | return (reg_or_short_operand (op, mode) | |
869 | || logical_operand (op, mode) | |
870 | || mask_operand (op, mode)); | |
871 | } | |
872 | ||
dcfedcd0 RK |
873 | /* Return 1 if the operand is a constant but not a valid operand for an AND |
874 | insn. */ | |
875 | ||
876 | int | |
877 | non_and_cint_operand (op, mode) | |
878 | register rtx op; | |
879 | enum machine_mode mode; | |
880 | { | |
881 | return GET_CODE (op) == CONST_INT && ! and_operand (op, mode); | |
882 | } | |
883 | ||
9878760c RK |
884 | /* Return 1 if the operand is a general register or memory operand. */ |
885 | ||
886 | int | |
887 | reg_or_mem_operand (op, mode) | |
888 | register rtx op; | |
889 | register enum machine_mode mode; | |
890 | { | |
b6c9286a MM |
891 | return (gpc_reg_operand (op, mode) |
892 | || memory_operand (op, mode) | |
893 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
894 | } |
895 | ||
a7a813f7 RK |
896 | /* Return 1 if the operand is a general register or memory operand without |
897 | pre-inc or pre_dec which produces invalid form of PowerPC lwa | |
898 | instruction. */ | |
899 | ||
900 | int | |
901 | lwa_operand (op, mode) | |
902 | register rtx op; | |
903 | register enum machine_mode mode; | |
904 | { | |
905 | rtx inner = op; | |
906 | ||
907 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
908 | inner = SUBREG_REG (inner); | |
909 | ||
910 | return gpc_reg_operand (inner, mode) | |
911 | || (memory_operand (inner, mode) | |
912 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
913 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
914 | } | |
915 | ||
9878760c RK |
916 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
917 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
918 | forced to lr. */ | |
919 | ||
920 | int | |
921 | call_operand (op, mode) | |
922 | register rtx op; | |
923 | enum machine_mode mode; | |
924 | { | |
925 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
926 | return 0; | |
927 | ||
928 | return (GET_CODE (op) == SYMBOL_REF | |
929 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
930 | } | |
931 | ||
2af3d377 RK |
932 | |
933 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
934 | this file. */ | |
935 | ||
936 | int | |
937 | current_file_function_operand (op, mode) | |
938 | register rtx op; | |
939 | enum machine_mode mode; | |
940 | { | |
941 | return (GET_CODE (op) == SYMBOL_REF | |
942 | && (SYMBOL_REF_FLAG (op) | |
943 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
944 | } | |
945 | ||
946 | ||
9878760c RK |
947 | /* Return 1 if this operand is a valid input for a move insn. */ |
948 | ||
949 | int | |
950 | input_operand (op, mode) | |
951 | register rtx op; | |
952 | enum machine_mode mode; | |
953 | { | |
eb4e8003 | 954 | /* Memory is always valid. */ |
9878760c RK |
955 | if (memory_operand (op, mode)) |
956 | return 1; | |
957 | ||
eb4e8003 RK |
958 | /* For floating-point, easy constants are valid. */ |
959 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
960 | && CONSTANT_P (op) | |
961 | && easy_fp_constant (op, mode)) | |
962 | return 1; | |
963 | ||
4e74d8ec MM |
964 | /* Allow any integer constant. */ |
965 | if (GET_MODE_CLASS (mode) == MODE_INT | |
966 | && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)) | |
967 | return 1; | |
968 | ||
eb4e8003 RK |
969 | /* For floating-point or multi-word mode, the only remaining valid type |
970 | is a register. */ | |
9878760c RK |
971 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
972 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 973 | return register_operand (op, mode); |
9878760c | 974 | |
88fe15a1 RK |
975 | /* The only cases left are integral modes one word or smaller (we |
976 | do not get called for MODE_CC values). These can be in any | |
977 | register. */ | |
978 | if (register_operand (op, mode)) | |
a8b3aeda | 979 | return 1; |
88fe15a1 | 980 | |
84cf9dda | 981 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 982 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
983 | return 1; |
984 | ||
b6c9286a MM |
985 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
986 | directly in the instruction stream */ | |
987 | if (DEFAULT_ABI == ABI_NT | |
988 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
989 | return 1; | |
990 | ||
88228c4b MM |
991 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
992 | to be valid. */ | |
c81bebd7 | 993 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
994 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
995 | && small_data_operand (op, Pmode)) | |
996 | return 1; | |
997 | ||
042259f2 | 998 | return 0; |
9878760c | 999 | } |
7509c759 MM |
1000 | |
1001 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1002 | ||
1003 | int | |
1004 | small_data_operand (op, mode) | |
1005 | rtx op; | |
1006 | enum machine_mode mode; | |
1007 | { | |
d9407988 | 1008 | #ifdef TARGET_SDATA |
7509c759 MM |
1009 | rtx sym_ref, const_part; |
1010 | ||
d9407988 | 1011 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1012 | return 0; |
a54d04b7 | 1013 | |
5b9d9a0c | 1014 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1015 | return 0; |
1016 | ||
88228c4b MM |
1017 | if (GET_CODE (op) == SYMBOL_REF) |
1018 | sym_ref = op; | |
1019 | ||
1020 | else if (GET_CODE (op) != CONST | |
1021 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1022 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1023 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1024 | return 0; |
1025 | ||
88228c4b MM |
1026 | else |
1027 | sym_ref = XEXP (XEXP (op, 0), 0); | |
1028 | ||
1029 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1030 | return 0; |
1031 | ||
1032 | return 1; | |
d9407988 MM |
1033 | |
1034 | #else | |
1035 | return 0; | |
1036 | #endif | |
7509c759 MM |
1037 | } |
1038 | ||
4697a36c MM |
1039 | \f |
1040 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1041 | for a call to a function whose data type is FNTYPE. | |
1042 | For a library call, FNTYPE is 0. | |
1043 | ||
1044 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1045 | so we never return a PARALLEL. */ |
4697a36c MM |
1046 | |
1047 | void | |
1048 | init_cumulative_args (cum, fntype, libname, incoming) | |
1049 | CUMULATIVE_ARGS *cum; | |
1050 | tree fntype; | |
1051 | rtx libname; | |
1052 | int incoming; | |
1053 | { | |
1054 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1055 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1056 | |
1057 | *cum = zero_cumulative; | |
1058 | cum->words = 0; | |
1059 | cum->fregno = FP_ARG_MIN_REG; | |
1060 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1061 | cum->call_cookie = CALL_NORMAL; |
4697a36c MM |
1062 | |
1063 | if (incoming) | |
1064 | { | |
1c20ae99 | 1065 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
c81bebd7 | 1066 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1067 | cum->varargs_offset = RS6000_VARARGS_OFFSET; |
4697a36c MM |
1068 | } |
1069 | ||
1070 | else if (cum->prototype) | |
1071 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1072 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1073 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1074 | ||
1075 | else | |
1076 | cum->nargs_prototype = 0; | |
1077 | ||
1078 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1079 | |
1080 | /* Check for DLL import functions */ | |
1081 | if (abi == ABI_NT | |
1082 | && fntype | |
1083 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1084 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1085 | ||
6a4cee5f MM |
1086 | /* Also check for longcall's */ |
1087 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1088 | cum->call_cookie = CALL_LONG; | |
1089 | ||
4697a36c MM |
1090 | if (TARGET_DEBUG_ARG) |
1091 | { | |
1092 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1093 | if (fntype) | |
1094 | { | |
1095 | tree ret_type = TREE_TYPE (fntype); | |
1096 | fprintf (stderr, " ret code = %s,", | |
1097 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1098 | } | |
1099 | ||
c81bebd7 | 1100 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming) |
4697a36c | 1101 | fprintf (stderr, " varargs = %d, ", cum->varargs_offset); |
7509c759 | 1102 | |
6a4cee5f | 1103 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1104 | fprintf (stderr, " dllimport,"); |
4697a36c | 1105 | |
6a4cee5f MM |
1106 | if (cum->call_cookie & CALL_LONG) |
1107 | fprintf (stderr, " longcall,"); | |
1108 | ||
4697a36c MM |
1109 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1110 | cum->prototype, cum->nargs_prototype); | |
1111 | } | |
1112 | } | |
1113 | \f | |
b6c9286a MM |
1114 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1115 | of an argument with the specified mode and type. If it is not defined, | |
1116 | PARM_BOUNDARY is used for all arguments. | |
1117 | ||
e1f83b4d MM |
1118 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1119 | ||
1120 | V.4 wants long longs to be double word aligned. */ | |
b6c9286a MM |
1121 | |
1122 | int | |
1123 | function_arg_boundary (mode, type) | |
1124 | enum machine_mode mode; | |
1125 | tree type; | |
1126 | { | |
c81bebd7 | 1127 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode) |
e1f83b4d MM |
1128 | return 64; |
1129 | ||
b6c9286a MM |
1130 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1131 | return PARM_BOUNDARY; | |
1132 | ||
1133 | if (mode != BLKmode) | |
1134 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1135 | ||
1136 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1137 | } | |
1138 | \f | |
4697a36c MM |
1139 | /* Update the data in CUM to advance over an argument |
1140 | of mode MODE and data type TYPE. | |
1141 | (TYPE is null for libcalls where that information may not be available.) */ | |
1142 | ||
1143 | void | |
1144 | function_arg_advance (cum, mode, type, named) | |
1145 | CUMULATIVE_ARGS *cum; | |
1146 | enum machine_mode mode; | |
1147 | tree type; | |
1148 | int named; | |
1149 | { | |
b6c9286a MM |
1150 | int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0; |
1151 | cum->words += align; | |
4697a36c MM |
1152 | cum->nargs_prototype--; |
1153 | ||
c81bebd7 | 1154 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1155 | { |
1156 | /* Long longs must not be split between registers and stack */ | |
1157 | if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) | |
1158 | && type && !AGGREGATE_TYPE_P (type) | |
1159 | && cum->words < GP_ARG_NUM_REG | |
1160 | && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) | |
1161 | { | |
1162 | cum->words = GP_ARG_NUM_REG; | |
1163 | } | |
1164 | ||
1165 | /* Aggregates get passed as pointers */ | |
1166 | if (type && AGGREGATE_TYPE_P (type)) | |
1167 | cum->words++; | |
1168 | ||
1169 | /* Floats go in registers, & don't occupy space in the GP registers | |
1170 | like they do for AIX unless software floating point. */ | |
1171 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1172 | && TARGET_HARD_FLOAT | |
1173 | && cum->fregno <= FP_ARG_V4_MAX_REG) | |
1174 | cum->fregno++; | |
1175 | ||
1176 | else | |
1177 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1178 | } | |
1179 | else | |
4697a36c MM |
1180 | if (named) |
1181 | { | |
1182 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1183 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1184 | cum->fregno++; | |
1185 | } | |
1186 | ||
1187 | if (TARGET_DEBUG_ARG) | |
1188 | fprintf (stderr, | |
b6c9286a MM |
1189 | "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1190 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1191 | } |
1192 | \f | |
1193 | /* Determine where to put an argument to a function. | |
1194 | Value is zero to push the argument on the stack, | |
1195 | or a hard register in which to store the argument. | |
1196 | ||
1197 | MODE is the argument's machine mode. | |
1198 | TYPE is the data type of the argument (as a tree). | |
1199 | This is null for libcalls where that information may | |
1200 | not be available. | |
1201 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1202 | the preceding args and about the function being called. | |
1203 | NAMED is nonzero if this argument is a named parameter | |
1204 | (otherwise it is an extra parameter matching an ellipsis). | |
1205 | ||
1206 | On RS/6000 the first eight words of non-FP are normally in registers | |
1207 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1208 | Under V.4, the first 8 FP args are in registers. | |
1209 | ||
1210 | If this is floating-point and no prototype is specified, we use | |
1211 | both an FP and integer register (or possibly FP reg and stack). Library | |
1212 | functions (when TYPE is zero) always have the proper types for args, | |
1213 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1214 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1215 | |
1216 | struct rtx_def * | |
1217 | function_arg (cum, mode, type, named) | |
1218 | CUMULATIVE_ARGS *cum; | |
1219 | enum machine_mode mode; | |
1220 | tree type; | |
1221 | int named; | |
1222 | { | |
b6c9286a MM |
1223 | int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0; |
1224 | int align_words = cum->words + align; | |
1225 | ||
4697a36c MM |
1226 | if (TARGET_DEBUG_ARG) |
1227 | fprintf (stderr, | |
b6c9286a MM |
1228 | "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1229 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1230 | |
1231 | /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 | |
1232 | uses to say fp args were passed in registers. Assume that we don't need the | |
1233 | marker for software floating point, or compiler generated library calls. */ | |
1234 | if (mode == VOIDmode) | |
1235 | { | |
7509c759 MM |
1236 | enum rs6000_abi abi = DEFAULT_ABI; |
1237 | ||
c81bebd7 | 1238 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1239 | && TARGET_HARD_FLOAT |
1240 | && cum->nargs_prototype < 0 | |
4697a36c | 1241 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1242 | { |
6a4cee5f MM |
1243 | return GEN_INT (cum->call_cookie |
1244 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1245 | ? CALL_V4_SET_FP_ARGS | |
1246 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1247 | } |
4697a36c | 1248 | |
7509c759 | 1249 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1250 | } |
1251 | ||
1252 | if (!named) | |
1253 | { | |
c81bebd7 | 1254 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
4697a36c MM |
1255 | return NULL_RTX; |
1256 | } | |
1257 | ||
1258 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
1259 | return NULL_RTX; | |
1260 | ||
1261 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1262 | { | |
5b9d9a0c | 1263 | if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */ |
c81bebd7 | 1264 | || DEFAULT_ABI == ABI_SOLARIS |
5b9d9a0c MM |
1265 | || ! type |
1266 | || ((cum->nargs_prototype > 0) | |
1267 | /* IBM AIX extended its linkage convention definition always to | |
1268 | require FP args after register save area hole on the stack. */ | |
1269 | && (DEFAULT_ABI != ABI_AIX | |
1270 | || ! TARGET_XL_CALL | |
1271 | || (align_words < GP_ARG_NUM_REG)))) | |
4697a36c MM |
1272 | return gen_rtx (REG, mode, cum->fregno); |
1273 | ||
1c20ae99 JW |
1274 | return gen_rtx (PARALLEL, mode, |
1275 | gen_rtvec | |
1276 | (2, | |
1277 | gen_rtx (EXPR_LIST, VOIDmode, | |
1278 | ((align_words >= GP_ARG_NUM_REG) | |
1279 | ? NULL_RTX | |
1280 | : (align_words | |
1281 | + RS6000_ARG_SIZE (mode, type, named) | |
1282 | > GP_ARG_NUM_REG | |
1283 | /* If this is partially on the stack, then | |
1284 | we only include the portion actually | |
1285 | in registers here. */ | |
1286 | ? gen_rtx (REG, SImode, | |
1287 | GP_ARG_MIN_REG + align_words) | |
1288 | : gen_rtx (REG, mode, | |
1289 | GP_ARG_MIN_REG + align_words))), | |
1290 | const0_rtx), | |
1291 | gen_rtx (EXPR_LIST, VOIDmode, | |
1292 | gen_rtx (REG, mode, cum->fregno), | |
1293 | const0_rtx))); | |
4697a36c MM |
1294 | } |
1295 | ||
4697a36c | 1296 | /* Long longs won't be split between register and stack */ |
c81bebd7 | 1297 | else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && |
b6c9286a | 1298 | align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) |
4697a36c MM |
1299 | { |
1300 | return NULL_RTX; | |
1301 | } | |
4697a36c | 1302 | |
b6c9286a MM |
1303 | else if (align_words < GP_ARG_NUM_REG) |
1304 | return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words); | |
4697a36c MM |
1305 | |
1306 | return NULL_RTX; | |
1307 | } | |
1308 | \f | |
1309 | /* For an arg passed partly in registers and partly in memory, | |
1310 | this is the number of registers used. | |
1311 | For args passed entirely in registers or entirely in memory, zero. */ | |
1312 | ||
1313 | int | |
1314 | function_arg_partial_nregs (cum, mode, type, named) | |
1315 | CUMULATIVE_ARGS *cum; | |
1316 | enum machine_mode mode; | |
1317 | tree type; | |
1318 | int named; | |
1319 | { | |
1320 | if (! named) | |
1321 | return 0; | |
1322 | ||
c81bebd7 | 1323 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1324 | return 0; |
4697a36c MM |
1325 | |
1326 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1327 | { | |
1328 | if (cum->nargs_prototype >= 0) | |
1329 | return 0; | |
1330 | } | |
1331 | ||
1332 | if (cum->words < GP_ARG_NUM_REG | |
1333 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1334 | { | |
1335 | int ret = GP_ARG_NUM_REG - cum->words; | |
1336 | if (ret && TARGET_DEBUG_ARG) | |
1337 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1338 | ||
1339 | return ret; | |
1340 | } | |
1341 | ||
1342 | return 0; | |
1343 | } | |
1344 | \f | |
1345 | /* A C expression that indicates when an argument must be passed by | |
1346 | reference. If nonzero for an argument, a copy of that argument is | |
1347 | made in memory and a pointer to the argument is passed instead of | |
1348 | the argument itself. The pointer is passed in whatever way is | |
1349 | appropriate for passing a pointer to that type. | |
1350 | ||
1351 | Under V.4, structures and unions are passed by reference. */ | |
1352 | ||
1353 | int | |
1354 | function_arg_pass_by_reference (cum, mode, type, named) | |
1355 | CUMULATIVE_ARGS *cum; | |
1356 | enum machine_mode mode; | |
1357 | tree type; | |
1358 | int named; | |
1359 | { | |
c81bebd7 MM |
1360 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1361 | && type && AGGREGATE_TYPE_P (type)) | |
4697a36c MM |
1362 | { |
1363 | if (TARGET_DEBUG_ARG) | |
1364 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1365 | ||
1366 | return 1; | |
1367 | } | |
4697a36c MM |
1368 | |
1369 | return 0; | |
1370 | } | |
1371 | ||
1372 | \f | |
1373 | /* Perform any needed actions needed for a function that is receiving a | |
1374 | variable number of arguments. | |
1375 | ||
1376 | CUM is as above. | |
1377 | ||
1378 | MODE and TYPE are the mode and type of the current parameter. | |
1379 | ||
1380 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1381 | that must be pushed by the prolog to pretend that our caller pushed | |
1382 | it. | |
1383 | ||
1384 | Normally, this macro will push all remaining incoming registers on the | |
1385 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1386 | ||
1387 | void | |
1388 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1389 | CUMULATIVE_ARGS *cum; | |
1390 | enum machine_mode mode; | |
1391 | tree type; | |
1392 | int *pretend_size; | |
1393 | int no_rtl; | |
1394 | ||
1395 | { | |
1396 | rtx save_area = virtual_incoming_args_rtx; | |
1397 | int reg_size = (TARGET_64BIT) ? 8 : 4; | |
1398 | ||
1399 | if (TARGET_DEBUG_ARG) | |
1400 | fprintf (stderr, | |
1401 | "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", | |
1402 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); | |
1403 | ||
c81bebd7 | 1404 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && !no_rtl) |
4697a36c MM |
1405 | { |
1406 | rs6000_sysv_varargs_p = 1; | |
1407 | save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET); | |
1408 | } | |
4697a36c MM |
1409 | |
1410 | if (cum->words < 8) | |
1411 | { | |
1412 | int first_reg_offset = cum->words; | |
1413 | ||
1414 | if (MUST_PASS_IN_STACK (mode, type)) | |
1415 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
1416 | ||
1417 | if (first_reg_offset > GP_ARG_NUM_REG) | |
1418 | first_reg_offset = GP_ARG_NUM_REG; | |
1419 | ||
1420 | if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) | |
1421 | move_block_from_reg | |
1422 | (GP_ARG_MIN_REG + first_reg_offset, | |
1423 | gen_rtx (MEM, BLKmode, | |
1424 | plus_constant (save_area, first_reg_offset * reg_size)), | |
1425 | GP_ARG_NUM_REG - first_reg_offset, | |
1426 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1427 | ||
1428 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; | |
1429 | } | |
1430 | ||
4697a36c | 1431 | /* Save FP registers if needed. */ |
c81bebd7 | 1432 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl) |
4697a36c MM |
1433 | { |
1434 | int fregno = cum->fregno; | |
1435 | int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; | |
1436 | ||
1437 | if (num_fp_reg >= 0) | |
1438 | { | |
1439 | rtx cr1 = gen_rtx (REG, CCmode, 69); | |
1440 | rtx lab = gen_label_rtx (); | |
1441 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
1442 | ||
1443 | emit_jump_insn (gen_rtx (SET, VOIDmode, | |
1444 | pc_rtx, | |
1445 | gen_rtx (IF_THEN_ELSE, VOIDmode, | |
1446 | gen_rtx (NE, VOIDmode, cr1, const0_rtx), | |
1447 | gen_rtx (LABEL_REF, VOIDmode, lab), | |
1448 | pc_rtx))); | |
1449 | ||
1450 | while ( num_fp_reg-- >= 0) | |
1451 | { | |
1452 | emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)), | |
1453 | gen_rtx (REG, DFmode, fregno++)); | |
1454 | off += 8; | |
1455 | } | |
1456 | ||
1457 | emit_label (lab); | |
1458 | } | |
1459 | } | |
4697a36c MM |
1460 | } |
1461 | \f | |
1462 | /* If defined, is a C expression that produces the machine-specific | |
1463 | code for a call to `__builtin_saveregs'. This code will be moved | |
1464 | to the very beginning of the function, before any parameter access | |
1465 | are made. The return value of this function should be an RTX that | |
1466 | contains the value to use as the return of `__builtin_saveregs'. | |
1467 | ||
1468 | The argument ARGS is a `tree_list' containing the arguments that | |
1469 | were passed to `__builtin_saveregs'. | |
1470 | ||
1471 | If this macro is not defined, the compiler will output an ordinary | |
1472 | call to the library function `__builtin_saveregs'. | |
1473 | ||
1474 | On the Power/PowerPC return the address of the area on the stack | |
1475 | used to hold arguments. Under AIX, this includes the 8 word register | |
1476 | save area. Under V.4 this does not. */ | |
1477 | ||
1478 | struct rtx_def * | |
1479 | expand_builtin_saveregs (args) | |
1480 | tree args; | |
1481 | { | |
1482 | return virtual_incoming_args_rtx; | |
1483 | } | |
1484 | ||
5b5040b9 RK |
1485 | \f |
1486 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1487 | and other bits from an original memory reference. */ | |
1488 | ||
1489 | static rtx | |
1490 | expand_block_move_mem (mode, addr, orig_mem) | |
1491 | enum machine_mode mode; | |
1492 | rtx addr; | |
1493 | rtx orig_mem; | |
1494 | { | |
1495 | rtx mem = gen_rtx (MEM, mode, addr); | |
b6c9286a MM |
1496 | |
1497 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
5b5040b9 RK |
1498 | MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); |
1499 | MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem); | |
b6c9286a MM |
1500 | #ifdef MEM_UNALIGNED_P |
1501 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1502 | #endif | |
5b5040b9 RK |
1503 | return mem; |
1504 | } | |
1505 | ||
7e69e155 MM |
1506 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1507 | if we should let the compiler generate normal code. | |
1508 | ||
1509 | operands[0] is the destination | |
1510 | operands[1] is the source | |
1511 | operands[2] is the length | |
1512 | operands[3] is the alignment */ | |
1513 | ||
3933e0e1 MM |
1514 | #define MAX_MOVE_REG 4 |
1515 | ||
7e69e155 MM |
1516 | int |
1517 | expand_block_move (operands) | |
1518 | rtx operands[]; | |
1519 | { | |
b6c9286a MM |
1520 | rtx orig_dest = operands[0]; |
1521 | rtx orig_src = operands[1]; | |
7e69e155 | 1522 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1523 | rtx align_rtx = operands[3]; |
3933e0e1 | 1524 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1525 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1526 | int bytes; |
1527 | int offset; | |
1528 | int num_reg; | |
1529 | int i; | |
7e69e155 MM |
1530 | rtx src_reg; |
1531 | rtx dest_reg; | |
3933e0e1 MM |
1532 | rtx src_addr; |
1533 | rtx dest_addr; | |
7e69e155 | 1534 | rtx tmp_reg; |
3933e0e1 | 1535 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1536 | int move_bytes; |
1537 | ||
3933e0e1 MM |
1538 | /* If this is not a fixed size move, just call memcpy */ |
1539 | if (!constp) | |
1540 | return 0; | |
1541 | ||
7e69e155 | 1542 | /* Anything to move? */ |
3933e0e1 MM |
1543 | bytes = INTVAL (bytes_rtx); |
1544 | if (bytes <= 0) | |
7e69e155 MM |
1545 | return 1; |
1546 | ||
3933e0e1 MM |
1547 | /* Don't support real large moves. If string instructions are not used, |
1548 | then don't generate more than 8 loads. */ | |
1549 | if (TARGET_STRING) | |
1550 | { | |
1cab3be1 | 1551 | if (bytes > 4*8) |
3933e0e1 MM |
1552 | return 0; |
1553 | } | |
1554 | else if (!STRICT_ALIGNMENT) | |
1555 | { | |
1556 | if (bytes > 4*8) | |
1557 | return 0; | |
1558 | } | |
1559 | else if (bytes > 8*align) | |
7e69e155 MM |
1560 | return 0; |
1561 | ||
1562 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1563 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1564 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1565 | |
3933e0e1 | 1566 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1567 | { |
3933e0e1 | 1568 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1569 | { |
3933e0e1 MM |
1570 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1571 | && !fixed_regs[5] | |
1572 | && !fixed_regs[6] | |
1573 | && !fixed_regs[7] | |
1574 | && !fixed_regs[8] | |
1575 | && !fixed_regs[9] | |
1576 | && !fixed_regs[10] | |
1577 | && !fixed_regs[11] | |
1578 | && !fixed_regs[12]) | |
1579 | { | |
1580 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1581 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1582 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1583 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1584 | align_rtx)); |
3933e0e1 MM |
1585 | } |
1586 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1587 | && !fixed_regs[7] | |
1588 | && !fixed_regs[8] | |
1589 | && !fixed_regs[9] | |
1590 | && !fixed_regs[10] | |
1591 | && !fixed_regs[11] | |
1592 | && !fixed_regs[12]) | |
1593 | { | |
1594 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1595 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1596 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1597 | GEN_INT (move_bytes), |
4c64a852 | 1598 | align_rtx)); |
3933e0e1 MM |
1599 | } |
1600 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1601 | && !fixed_regs[9] | |
1602 | && !fixed_regs[10] | |
1603 | && !fixed_regs[11] | |
1604 | && !fixed_regs[12]) | |
1605 | { | |
1606 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1607 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1608 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1609 | GEN_INT (move_bytes), |
4c64a852 | 1610 | align_rtx)); |
3933e0e1 | 1611 | } |
d679bebf | 1612 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1613 | { /* move up to 8 bytes at a time */ |
1614 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1615 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1616 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1617 | GEN_INT (move_bytes), |
4c64a852 | 1618 | align_rtx)); |
3933e0e1 MM |
1619 | } |
1620 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1621 | { /* move 4 bytes */ | |
1622 | move_bytes = 4; | |
1623 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1624 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1625 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1626 | } |
1627 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1628 | { /* move 2 bytes */ | |
1629 | move_bytes = 2; | |
1630 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1631 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
1632 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1633 | } |
1634 | else if (bytes == 1) /* move 1 byte */ | |
1635 | { | |
1636 | move_bytes = 1; | |
1637 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1638 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
1639 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1640 | } |
1641 | else | |
1642 | { /* move up to 4 bytes at a time */ | |
1643 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
1644 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1645 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1646 | GEN_INT (move_bytes), |
4c64a852 | 1647 | align_rtx)); |
3933e0e1 | 1648 | } |
4c64a852 | 1649 | |
015892ee RK |
1650 | if (bytes > move_bytes) |
1651 | { | |
1652 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
1653 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
1654 | } | |
4c64a852 | 1655 | } |
3933e0e1 MM |
1656 | } |
1657 | ||
1658 | else /* string instructions not available */ | |
1659 | { | |
1660 | num_reg = offset = 0; | |
1661 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 1662 | { |
3933e0e1 MM |
1663 | /* Calculate the correct offset for src/dest */ |
1664 | if (offset == 0) | |
7e69e155 | 1665 | { |
3933e0e1 MM |
1666 | src_addr = src_reg; |
1667 | dest_addr = dest_reg; | |
1668 | } | |
1669 | else | |
1670 | { | |
1671 | src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset)); | |
1672 | dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset)); | |
1673 | } | |
1674 | ||
1675 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
1676 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
1677 | { | |
1678 | move_bytes = 8; | |
1679 | tmp_reg = gen_reg_rtx (DImode); | |
1680 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
1681 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
1682 | } | |
1683 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
1684 | { |
1685 | move_bytes = 4; | |
1686 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1687 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
1688 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1689 | } |
1690 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1691 | { | |
1692 | move_bytes = 2; | |
1693 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1694 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
1695 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1696 | } |
1697 | else | |
1698 | { | |
1699 | move_bytes = 1; | |
1700 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1701 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
1702 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1703 | } |
1704 | ||
1705 | if (num_reg >= MAX_MOVE_REG) | |
1706 | { | |
1707 | for (i = 0; i < num_reg; i++) | |
1708 | emit_insn (stores[i]); | |
1709 | num_reg = 0; | |
7e69e155 MM |
1710 | } |
1711 | } | |
3933e0e1 | 1712 | |
b6c9286a MM |
1713 | for (i = 0; i < num_reg; i++) |
1714 | emit_insn (stores[i]); | |
7e69e155 MM |
1715 | } |
1716 | ||
1717 | return 1; | |
1718 | } | |
1719 | ||
9878760c RK |
1720 | \f |
1721 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
1722 | PARALLEL and the first section will be tested. */ | |
1723 | ||
1724 | int | |
1725 | load_multiple_operation (op, mode) | |
1726 | rtx op; | |
1727 | enum machine_mode mode; | |
1728 | { | |
1729 | int count = XVECLEN (op, 0); | |
1730 | int dest_regno; | |
1731 | rtx src_addr; | |
1732 | int i; | |
1733 | ||
1734 | /* Perform a quick check so we don't blow up below. */ | |
1735 | if (count <= 1 | |
1736 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1737 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
1738 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
1739 | return 0; | |
1740 | ||
1741 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
1742 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
1743 | ||
1744 | for (i = 1; i < count; i++) | |
1745 | { | |
1746 | rtx elt = XVECEXP (op, 0, i); | |
1747 | ||
1748 | if (GET_CODE (elt) != SET | |
1749 | || GET_CODE (SET_DEST (elt)) != REG | |
1750 | || GET_MODE (SET_DEST (elt)) != SImode | |
1751 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
1752 | || GET_CODE (SET_SRC (elt)) != MEM | |
1753 | || GET_MODE (SET_SRC (elt)) != SImode | |
1754 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
1755 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
1756 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
1757 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
1758 | return 0; | |
1759 | } | |
1760 | ||
1761 | return 1; | |
1762 | } | |
1763 | ||
1764 | /* Similar, but tests for store multiple. Here, the second vector element | |
1765 | is a CLOBBER. It will be tested later. */ | |
1766 | ||
1767 | int | |
1768 | store_multiple_operation (op, mode) | |
1769 | rtx op; | |
1770 | enum machine_mode mode; | |
1771 | { | |
1772 | int count = XVECLEN (op, 0) - 1; | |
1773 | int src_regno; | |
1774 | rtx dest_addr; | |
1775 | int i; | |
1776 | ||
1777 | /* Perform a quick check so we don't blow up below. */ | |
1778 | if (count <= 1 | |
1779 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1780 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
1781 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
1782 | return 0; | |
1783 | ||
1784 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
1785 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
1786 | ||
1787 | for (i = 1; i < count; i++) | |
1788 | { | |
1789 | rtx elt = XVECEXP (op, 0, i + 1); | |
1790 | ||
1791 | if (GET_CODE (elt) != SET | |
1792 | || GET_CODE (SET_SRC (elt)) != REG | |
1793 | || GET_MODE (SET_SRC (elt)) != SImode | |
1794 | || REGNO (SET_SRC (elt)) != src_regno + i | |
1795 | || GET_CODE (SET_DEST (elt)) != MEM | |
1796 | || GET_MODE (SET_DEST (elt)) != SImode | |
1797 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
1798 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
1799 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
1800 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
1801 | return 0; | |
1802 | } | |
1803 | ||
1804 | return 1; | |
1805 | } | |
1806 | \f | |
1807 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
1808 | We only check the opcode against the mode of the CC value here. */ | |
1809 | ||
1810 | int | |
1811 | branch_comparison_operator (op, mode) | |
1812 | register rtx op; | |
1813 | enum machine_mode mode; | |
1814 | { | |
1815 | enum rtx_code code = GET_CODE (op); | |
1816 | enum machine_mode cc_mode; | |
1817 | ||
1818 | if (GET_RTX_CLASS (code) != '<') | |
1819 | return 0; | |
1820 | ||
1821 | cc_mode = GET_MODE (XEXP (op, 0)); | |
1822 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
1823 | return 0; | |
1824 | ||
1825 | if ((code == GT || code == LT || code == GE || code == LE) | |
1826 | && cc_mode == CCUNSmode) | |
1827 | return 0; | |
1828 | ||
1829 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
1830 | && (cc_mode != CCUNSmode)) | |
1831 | return 0; | |
1832 | ||
1833 | return 1; | |
1834 | } | |
1835 | ||
1836 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
1837 | We check the opcode against the mode of the CC value and disallow EQ or | |
1838 | NE comparisons for integers. */ | |
1839 | ||
1840 | int | |
1841 | scc_comparison_operator (op, mode) | |
1842 | register rtx op; | |
1843 | enum machine_mode mode; | |
1844 | { | |
1845 | enum rtx_code code = GET_CODE (op); | |
1846 | enum machine_mode cc_mode; | |
1847 | ||
1848 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
1849 | return 0; | |
1850 | ||
1851 | if (GET_RTX_CLASS (code) != '<') | |
1852 | return 0; | |
1853 | ||
1854 | cc_mode = GET_MODE (XEXP (op, 0)); | |
1855 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
1856 | return 0; | |
1857 | ||
1858 | if (code == NE && cc_mode != CCFPmode) | |
1859 | return 0; | |
1860 | ||
1861 | if ((code == GT || code == LT || code == GE || code == LE) | |
1862 | && cc_mode == CCUNSmode) | |
1863 | return 0; | |
1864 | ||
1865 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
1866 | && (cc_mode != CCUNSmode)) | |
1867 | return 0; | |
1868 | ||
c5defebb RK |
1869 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
1870 | return 0; | |
1871 | ||
9878760c RK |
1872 | return 1; |
1873 | } | |
1874 | \f | |
1875 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
1876 | mask required to convert the result of a rotate insn into a shift | |
1877 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
1878 | ||
1879 | int | |
1880 | includes_lshift_p (shiftop, andop) | |
1881 | register rtx shiftop; | |
1882 | register rtx andop; | |
1883 | { | |
1884 | int shift_mask = (~0 << INTVAL (shiftop)); | |
1885 | ||
1886 | return (INTVAL (andop) & ~shift_mask) == 0; | |
1887 | } | |
1888 | ||
1889 | /* Similar, but for right shift. */ | |
1890 | ||
1891 | int | |
1892 | includes_rshift_p (shiftop, andop) | |
1893 | register rtx shiftop; | |
1894 | register rtx andop; | |
1895 | { | |
a7653a2c | 1896 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
1897 | |
1898 | shift_mask >>= INTVAL (shiftop); | |
1899 | ||
1900 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
1901 | } | |
35068b43 RK |
1902 | |
1903 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
1904 | for lfq and stfq insns. | |
1905 | ||
1906 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
1907 | abort if we are passed pseudo registers. */ | |
1908 | ||
1909 | int | |
1910 | registers_ok_for_quad_peep (reg1, reg2) | |
1911 | rtx reg1, reg2; | |
1912 | { | |
1913 | /* We might have been passed a SUBREG. */ | |
1914 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
1915 | return 0; | |
1916 | ||
1917 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
1918 | } | |
1919 | ||
1920 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
1921 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
1922 | ||
1923 | int | |
1924 | addrs_ok_for_quad_peep (addr1, addr2) | |
1925 | register rtx addr1; | |
1926 | register rtx addr2; | |
1927 | { | |
1928 | int reg1; | |
1929 | int offset1; | |
1930 | ||
1931 | /* Extract an offset (if used) from the first addr. */ | |
1932 | if (GET_CODE (addr1) == PLUS) | |
1933 | { | |
1934 | /* If not a REG, return zero. */ | |
1935 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
1936 | return 0; | |
1937 | else | |
1938 | { | |
1939 | reg1 = REGNO (XEXP (addr1, 0)); | |
1940 | /* The offset must be constant! */ | |
1941 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
1942 | return 0; | |
1943 | offset1 = INTVAL (XEXP (addr1, 1)); | |
1944 | } | |
1945 | } | |
1946 | else if (GET_CODE (addr1) != REG) | |
1947 | return 0; | |
1948 | else | |
1949 | { | |
1950 | reg1 = REGNO (addr1); | |
1951 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
1952 | offset1 = 0; | |
1953 | } | |
1954 | ||
1955 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
1956 | if (GET_CODE (addr2) != PLUS) | |
1957 | return 0; | |
1958 | ||
1959 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
1960 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
1961 | return 0; | |
1962 | ||
1963 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
1964 | return 0; | |
1965 | ||
1966 | /* The offset for the second addr must be 8 more than the first addr. */ | |
1967 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
1968 | return 0; | |
1969 | ||
1970 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
1971 | instructions. */ | |
1972 | return 1; | |
1973 | } | |
9878760c RK |
1974 | \f |
1975 | /* Return the register class of a scratch register needed to copy IN into | |
1976 | or out of a register in CLASS in MODE. If it can be done directly, | |
1977 | NO_REGS is returned. */ | |
1978 | ||
1979 | enum reg_class | |
1980 | secondary_reload_class (class, mode, in) | |
1981 | enum reg_class class; | |
1982 | enum machine_mode mode; | |
1983 | rtx in; | |
1984 | { | |
1985 | int regno = true_regnum (in); | |
1986 | ||
1987 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1988 | regno = -1; | |
1989 | ||
1990 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS | |
1991 | into anything. */ | |
1992 | if (class == GENERAL_REGS || class == BASE_REGS | |
1993 | || (regno >= 0 && INT_REGNO_P (regno))) | |
1994 | return NO_REGS; | |
1995 | ||
1996 | /* Constants, memory, and FP registers can go into FP registers. */ | |
1997 | if ((regno == -1 || FP_REGNO_P (regno)) | |
1998 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
1999 | return NO_REGS; | |
2000 | ||
2001 | /* We can copy among the CR registers. */ | |
2002 | if ((class == CR_REGS || class == CR0_REGS) | |
2003 | && regno >= 0 && CR_REGNO_P (regno)) | |
2004 | return NO_REGS; | |
2005 | ||
2006 | /* Otherwise, we need GENERAL_REGS. */ | |
2007 | return GENERAL_REGS; | |
2008 | } | |
2009 | \f | |
2010 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2011 | know this is a valid comparison. | |
2012 | ||
2013 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2014 | used instead of %C, so the bits will be in different places. | |
2015 | ||
b4ac57ab | 2016 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2017 | |
2018 | int | |
2019 | ccr_bit (op, scc_p) | |
2020 | register rtx op; | |
2021 | int scc_p; | |
2022 | { | |
2023 | enum rtx_code code = GET_CODE (op); | |
2024 | enum machine_mode cc_mode; | |
2025 | int cc_regnum; | |
2026 | int base_bit; | |
2027 | ||
2028 | if (GET_RTX_CLASS (code) != '<') | |
2029 | return -1; | |
2030 | ||
2031 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2032 | cc_regnum = REGNO (XEXP (op, 0)); | |
2033 | base_bit = 4 * (cc_regnum - 68); | |
2034 | ||
c5defebb RK |
2035 | /* In CCEQmode cases we have made sure that the result is always in the |
2036 | third bit of the CR field. */ | |
2037 | ||
2038 | if (cc_mode == CCEQmode) | |
2039 | return base_bit + 3; | |
2040 | ||
9878760c RK |
2041 | switch (code) |
2042 | { | |
2043 | case NE: | |
2044 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2045 | case EQ: | |
2046 | return base_bit + 2; | |
2047 | case GT: case GTU: | |
2048 | return base_bit + 1; | |
2049 | case LT: case LTU: | |
2050 | return base_bit; | |
2051 | ||
2052 | case GE: case GEU: | |
2053 | /* If floating-point, we will have done a cror to put the bit in the | |
2054 | unordered position. So test that bit. For integer, this is ! LT | |
2055 | unless this is an scc insn. */ | |
2056 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2057 | ||
2058 | case LE: case LEU: | |
2059 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2060 | ||
2061 | default: | |
2062 | abort (); | |
2063 | } | |
2064 | } | |
1ff7789b MM |
2065 | \f |
2066 | /* Return the GOT register, creating it if needed. */ | |
2067 | ||
2068 | struct rtx_def * | |
2069 | rs6000_got_register (value) | |
2070 | rtx value; | |
2071 | { | |
da39823a | 2072 | if (!current_function_uses_pic_offset_table || !pic_offset_table_rtx) |
1ff7789b MM |
2073 | { |
2074 | if (reload_in_progress || reload_completed) | |
2075 | fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); | |
2076 | ||
2077 | current_function_uses_pic_offset_table = 1; | |
2078 | pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); | |
2079 | } | |
2080 | ||
2081 | return pic_offset_table_rtx; | |
2082 | } | |
2083 | ||
2084 | \f | |
2085 | /* Replace all occurances of register FROM with an new pseduo register in an insn X. | |
2086 | Store the pseudo register used in REG. | |
2087 | This is only safe during FINALIZE_PIC, since the registers haven't been setup | |
2088 | yet. */ | |
2089 | ||
2090 | static rtx | |
2091 | rs6000_replace_regno (x, from, reg) | |
2092 | rtx x; | |
2093 | int from; | |
2094 | rtx *reg; | |
2095 | { | |
2096 | register int i, j; | |
2097 | register char *fmt; | |
2098 | ||
2099 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2100 | if (!x) | |
2101 | return x; | |
2102 | ||
2103 | switch (GET_CODE (x)) | |
2104 | { | |
2105 | case SCRATCH: | |
2106 | case PC: | |
2107 | case CC0: | |
2108 | case CONST_INT: | |
2109 | case CONST_DOUBLE: | |
2110 | case CONST: | |
2111 | case SYMBOL_REF: | |
2112 | case LABEL_REF: | |
2113 | return x; | |
2114 | ||
2115 | case REG: | |
2116 | if (REGNO (x) == from) | |
2117 | { | |
2118 | if (! *reg) | |
84f414bc | 2119 | *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode); |
1ff7789b MM |
2120 | |
2121 | return *reg; | |
2122 | } | |
2123 | ||
2124 | return x; | |
2125 | } | |
2126 | ||
2127 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2128 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2129 | { | |
2130 | if (fmt[i] == 'e') | |
2131 | XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg); | |
2132 | else if (fmt[i] == 'E') | |
2133 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2134 | XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg); | |
2135 | } | |
2136 | ||
2137 | return x; | |
2138 | } | |
2139 | ||
d266da75 MM |
2140 | \f |
2141 | /* By generating position-independent code, when two different | |
2142 | programs (A and B) share a common library (libC.a), the text of | |
2143 | the library can be shared whether or not the library is linked at | |
2144 | the same address for both programs. In some of these | |
2145 | environments, position-independent code requires not only the use | |
2146 | of different addressing modes, but also special code to enable the | |
2147 | use of these addressing modes. | |
2148 | ||
2149 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2150 | codes once the function is being compiled into assembly code, but | |
2151 | not before. (It is not done before, because in the case of | |
2152 | compiling an inline function, it would lead to multiple PIC | |
2153 | prologues being included in functions which used inline functions | |
2154 | and were compiled to assembly language.) */ | |
2155 | ||
2156 | void | |
2157 | rs6000_finalize_pic () | |
2158 | { | |
30ea98f1 MM |
2159 | /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM |
2160 | with an appropriate pseduo register. If we find we need GOT/TOC, | |
2161 | add the appropriate init code. */ | |
2162 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
d266da75 | 2163 | { |
30ea98f1 MM |
2164 | rtx insn = get_insns (); |
2165 | rtx reg = NULL_RTX; | |
2166 | rtx first_insn; | |
d266da75 | 2167 | |
30ea98f1 MM |
2168 | if (GET_CODE (insn) == NOTE) |
2169 | insn = next_nonnote_insn (insn); | |
d266da75 | 2170 | |
30ea98f1 MM |
2171 | first_insn = insn; |
2172 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2173 | { | |
2174 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1ff7789b | 2175 | { |
30ea98f1 MM |
2176 | PATTERN (insn) = rs6000_replace_regno (PATTERN (insn), |
2177 | GOT_TOC_REGNUM, | |
2178 | ®); | |
2179 | ||
2180 | if (REG_NOTES (insn)) | |
2181 | REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn), | |
1ff7789b MM |
2182 | GOT_TOC_REGNUM, |
2183 | ®); | |
1ff7789b | 2184 | } |
30ea98f1 | 2185 | } |
1ff7789b | 2186 | |
30ea98f1 MM |
2187 | if (reg) |
2188 | { | |
2189 | rtx init = gen_init_v4_pic (reg); | |
2190 | emit_insn_before (init, first_insn); | |
d266da75 MM |
2191 | } |
2192 | } | |
2193 | } | |
2194 | ||
30ea98f1 MM |
2195 | \f |
2196 | /* Search for any occurrance of the GOT_TOC register marker that should | |
2197 | have been eliminated, but may have crept back in. */ | |
2198 | ||
2199 | void | |
2200 | rs6000_reorg (insn) | |
2201 | rtx insn; | |
2202 | { | |
2203 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2204 | { | |
2205 | rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); | |
2206 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2207 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2208 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2209 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2210 | } | |
2211 | } | |
2212 | ||
a7df97e6 MM |
2213 | \f |
2214 | /* Define the structure for the machine field in struct function. */ | |
2215 | struct machine_function | |
2216 | { | |
2217 | int sysv_varargs_p; | |
2218 | int save_toc_p; | |
2219 | int fpmem_size; | |
2220 | int fpmem_offset; | |
2221 | }; | |
2222 | ||
2223 | /* Functions to save and restore rs6000_fpmem_size. | |
2224 | These will be called, via pointer variables, | |
2225 | from push_function_context and pop_function_context. */ | |
2226 | ||
2227 | void | |
2228 | rs6000_save_machine_status (p) | |
2229 | struct function *p; | |
2230 | { | |
2231 | struct machine_function *machine = | |
2232 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2233 | ||
2234 | p->machine = machine; | |
2235 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2236 | machine->fpmem_size = rs6000_fpmem_size; |
2237 | machine->fpmem_offset = rs6000_fpmem_offset; | |
2238 | } | |
2239 | ||
2240 | void | |
2241 | rs6000_restore_machine_status (p) | |
2242 | struct function *p; | |
2243 | { | |
2244 | struct machine_function *machine = p->machine; | |
2245 | ||
2246 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2247 | rs6000_fpmem_size = machine->fpmem_size; |
2248 | rs6000_fpmem_offset = machine->fpmem_offset; | |
2249 | ||
2250 | free (machine); | |
2251 | p->machine = (struct machine_function *)0; | |
2252 | } | |
2253 | ||
2254 | /* Do anything needed before RTL is emitted for each function. */ | |
2255 | ||
2256 | void | |
2257 | rs6000_init_expanders () | |
2258 | { | |
2259 | /* Reset varargs and save TOC indicator */ | |
2260 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2261 | rs6000_fpmem_size = 0; |
2262 | rs6000_fpmem_offset = 0; | |
2263 | pic_offset_table_rtx = (rtx)0; | |
2264 | ||
2265 | /* Arrange to save and restore machine status around nested functions. */ | |
2266 | save_machine_status = rs6000_save_machine_status; | |
2267 | restore_machine_status = rs6000_restore_machine_status; | |
2268 | } | |
2269 | ||
9878760c RK |
2270 | \f |
2271 | /* Print an operand. Recognize special options, documented below. */ | |
2272 | ||
d9407988 MM |
2273 | #ifdef TARGET_SDATA |
2274 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") | |
ba5e43aa MM |
2275 | #else |
2276 | #define SMALL_DATA_RELOC "sda21" | |
2277 | #endif | |
2278 | ||
9878760c RK |
2279 | void |
2280 | print_operand (file, x, code) | |
2281 | FILE *file; | |
2282 | rtx x; | |
2283 | char code; | |
2284 | { | |
2285 | int i; | |
2286 | int val; | |
2287 | ||
2288 | /* These macros test for integers and extract the low-order bits. */ | |
2289 | #define INT_P(X) \ | |
2290 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2291 | && GET_MODE (X) == VOIDmode) | |
2292 | ||
2293 | #define INT_LOWPART(X) \ | |
2294 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2295 | ||
2296 | switch (code) | |
2297 | { | |
a8b3aeda | 2298 | case '.': |
a85d226b RK |
2299 | /* Write out an instruction after the call which may be replaced |
2300 | with glue code by the loader. This depends on the AIX version. */ | |
2301 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2302 | return; |
2303 | ||
cfaaaf2e RK |
2304 | case '*': |
2305 | /* Write the register number of the TOC register. */ | |
4697a36c | 2306 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); |
cfaaaf2e RK |
2307 | return; |
2308 | ||
c81bebd7 MM |
2309 | case '$': |
2310 | /* Write out either a '.' or '$' for the current location, depending | |
2311 | on whether this is Solaris or not. */ | |
2312 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2313 | return; | |
2314 | ||
9854d9ed RK |
2315 | case 'A': |
2316 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2317 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2318 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2319 | write a trash instruction. */ |
2320 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2321 | putc ('l', file); |
9854d9ed | 2322 | else |
76229ac8 | 2323 | putc ('r', file); |
9854d9ed RK |
2324 | return; |
2325 | ||
2326 | case 'b': | |
2327 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2328 | if (! INT_P (x)) |
9854d9ed | 2329 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2330 | |
9854d9ed | 2331 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2332 | return; |
2333 | ||
9854d9ed RK |
2334 | case 'C': |
2335 | /* This is an optional cror needed for LE or GE floating-point | |
2336 | comparisons. Otherwise write nothing. */ | |
2337 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2338 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2339 | { | |
2340 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2341 | ||
2342 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2343 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2344 | } | |
2345 | return; | |
2346 | ||
2347 | case 'D': | |
2348 | /* Similar, except that this is for an scc, so we must be able to | |
2349 | encode the test in a single bit that is one. We do the above | |
2350 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2351 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2352 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2353 | { | |
2354 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2355 | ||
2356 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2357 | base_bit + 2, | |
2358 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2359 | } | |
2360 | ||
2361 | else if (GET_CODE (x) == NE) | |
2362 | { | |
2363 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2364 | ||
2365 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2366 | base_bit + 2, base_bit + 2); | |
2367 | } | |
2368 | return; | |
2369 | ||
2370 | case 'E': | |
2371 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2372 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2373 | output_operand_lossage ("invalid %%E value"); | |
2374 | ||
2375 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2376 | return; |
9854d9ed RK |
2377 | |
2378 | case 'f': | |
2379 | /* X is a CR register. Print the shift count needed to move it | |
2380 | to the high-order four bits. */ | |
2381 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2382 | output_operand_lossage ("invalid %%f value"); | |
2383 | else | |
2384 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2385 | return; | |
2386 | ||
2387 | case 'F': | |
2388 | /* Similar, but print the count for the rotate in the opposite | |
2389 | direction. */ | |
2390 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2391 | output_operand_lossage ("invalid %%F value"); | |
2392 | else | |
2393 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2394 | return; | |
2395 | ||
2396 | case 'G': | |
2397 | /* X is a constant integer. If it is negative, print "m", | |
2398 | otherwise print "z". This is to make a aze or ame insn. */ | |
2399 | if (GET_CODE (x) != CONST_INT) | |
2400 | output_operand_lossage ("invalid %%G value"); | |
2401 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2402 | putc ('z', file); |
9854d9ed | 2403 | else |
76229ac8 | 2404 | putc ('m', file); |
9854d9ed RK |
2405 | return; |
2406 | ||
9878760c | 2407 | case 'h': |
df3d94ed RK |
2408 | /* If constant, output low-order five bits. Otherwise, |
2409 | write normally. */ | |
9878760c RK |
2410 | if (INT_P (x)) |
2411 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
2412 | else | |
2413 | print_operand (file, x, 0); | |
2414 | return; | |
2415 | ||
64305719 DE |
2416 | case 'H': |
2417 | /* If constant, output low-order six bits. Otherwise, | |
2418 | write normally. */ | |
2419 | if (INT_P (x)) | |
2420 | fprintf (file, "%d", INT_LOWPART (x) & 63); | |
2421 | else | |
2422 | print_operand (file, x, 0); | |
2423 | return; | |
2424 | ||
9854d9ed RK |
2425 | case 'I': |
2426 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2427 | if (INT_P (x)) |
76229ac8 | 2428 | putc ('i', file); |
9878760c RK |
2429 | return; |
2430 | ||
9854d9ed RK |
2431 | case 'j': |
2432 | /* Write the bit number in CCR for jump. */ | |
2433 | i = ccr_bit (x, 0); | |
2434 | if (i == -1) | |
2435 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2436 | else |
9854d9ed | 2437 | fprintf (file, "%d", i); |
9878760c RK |
2438 | return; |
2439 | ||
9854d9ed RK |
2440 | case 'J': |
2441 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2442 | scc flag to `ccr_bit'. */ | |
2443 | i = ccr_bit (x, 1); | |
2444 | if (i == -1) | |
2445 | output_operand_lossage ("invalid %%J code"); | |
2446 | else | |
a0466a68 RK |
2447 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2448 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2449 | return; |
2450 | ||
9854d9ed RK |
2451 | case 'k': |
2452 | /* X must be a constant. Write the 1's complement of the | |
2453 | constant. */ | |
9878760c | 2454 | if (! INT_P (x)) |
9854d9ed | 2455 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2456 | |
9854d9ed | 2457 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2458 | return; |
2459 | ||
9854d9ed RK |
2460 | case 'L': |
2461 | /* Write second word of DImode or DFmode reference. Works on register | |
2462 | or non-indexed memory only. */ | |
2463 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2464 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2465 | else if (GET_CODE (x) == MEM) |
2466 | { | |
2467 | /* Handle possible auto-increment. Since it is pre-increment and | |
2468 | we have already done it, we can just use an offset of four. */ | |
2469 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2470 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2471 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4)); |
9854d9ed | 2472 | else |
a54d04b7 | 2473 | output_address (plus_constant (XEXP (x, 0), 4)); |
ba5e43aa MM |
2474 | if (small_data_operand (x, GET_MODE (x))) |
2475 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
9854d9ed | 2476 | } |
9878760c | 2477 | return; |
9854d9ed | 2478 | |
9878760c RK |
2479 | case 'm': |
2480 | /* MB value for a mask operand. */ | |
2481 | if (! mask_operand (x, VOIDmode)) | |
2482 | output_operand_lossage ("invalid %%m value"); | |
2483 | ||
2484 | val = INT_LOWPART (x); | |
2485 | ||
2486 | /* If the high bit is set and the low bit is not, the value is zero. | |
2487 | If the high bit is zero, the value is the first 1 bit we find from | |
2488 | the left. */ | |
2489 | if (val < 0 && (val & 1) == 0) | |
2490 | { | |
19d2d16f | 2491 | putc ('0', file); |
9878760c RK |
2492 | return; |
2493 | } | |
2494 | else if (val >= 0) | |
2495 | { | |
2496 | for (i = 1; i < 32; i++) | |
2497 | if ((val <<= 1) < 0) | |
2498 | break; | |
2499 | fprintf (file, "%d", i); | |
2500 | return; | |
2501 | } | |
2502 | ||
2503 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2504 | number plus 1. We know the low-order bit is one. */ | |
2505 | for (i = 0; i < 32; i++) | |
2506 | if (((val >>= 1) & 1) == 0) | |
2507 | break; | |
2508 | ||
2509 | /* If we ended in ...01, I would be 0. The correct value is 31, so | |
2510 | we want 31 - i. */ | |
2511 | fprintf (file, "%d", 31 - i); | |
2512 | return; | |
2513 | ||
2514 | case 'M': | |
2515 | /* ME value for a mask operand. */ | |
2516 | if (! mask_operand (x, VOIDmode)) | |
2517 | output_operand_lossage ("invalid %%m value"); | |
2518 | ||
2519 | val = INT_LOWPART (x); | |
2520 | ||
2521 | /* If the low bit is set and the high bit is not, the value is 31. | |
2522 | If the low bit is zero, the value is the first 1 bit we find from | |
2523 | the right. */ | |
2524 | if ((val & 1) && val >= 0) | |
2525 | { | |
76229ac8 | 2526 | fputs ("31", file); |
9878760c RK |
2527 | return; |
2528 | } | |
2529 | else if ((val & 1) == 0) | |
2530 | { | |
2531 | for (i = 0; i < 32; i++) | |
2532 | if ((val >>= 1) & 1) | |
2533 | break; | |
2534 | ||
2535 | /* If we had ....10, I would be 0. The result should be | |
2536 | 30, so we need 30 - i. */ | |
2537 | fprintf (file, "%d", 30 - i); | |
2538 | return; | |
2539 | } | |
2540 | ||
2541 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2542 | number minus 1. We know the high-order bit is one. */ | |
2543 | for (i = 0; i < 32; i++) | |
2544 | if ((val <<= 1) >= 0) | |
2545 | break; | |
2546 | ||
2547 | fprintf (file, "%d", i); | |
2548 | return; | |
2549 | ||
9878760c RK |
2550 | case 'N': |
2551 | /* Write the number of elements in the vector times 4. */ | |
2552 | if (GET_CODE (x) != PARALLEL) | |
2553 | output_operand_lossage ("invalid %%N value"); | |
2554 | ||
2555 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2556 | return; | |
2557 | ||
2558 | case 'O': | |
2559 | /* Similar, but subtract 1 first. */ | |
2560 | if (GET_CODE (x) != PARALLEL) | |
2561 | output_operand_lossage ("invalid %%N value"); | |
2562 | ||
2563 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2564 | return; | |
2565 | ||
9854d9ed RK |
2566 | case 'p': |
2567 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2568 | if (! INT_P (x) | |
2569 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2570 | output_operand_lossage ("invalid %%p value"); | |
2571 | ||
2572 | fprintf (file, "%d", i); | |
2573 | return; | |
2574 | ||
9878760c RK |
2575 | case 'P': |
2576 | /* The operand must be an indirect memory reference. The result | |
2577 | is the register number. */ | |
2578 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2579 | || REGNO (XEXP (x, 0)) >= 32) | |
2580 | output_operand_lossage ("invalid %%P value"); | |
2581 | ||
2582 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2583 | return; | |
2584 | ||
9854d9ed RK |
2585 | case 'R': |
2586 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2587 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2588 | output_operand_lossage ("invalid %%R value"); | |
2589 | else | |
2590 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2591 | return; |
9854d9ed RK |
2592 | |
2593 | case 's': | |
2594 | /* Low 5 bits of 32 - value */ | |
2595 | if (! INT_P (x)) | |
2596 | output_operand_lossage ("invalid %%s value"); | |
2597 | ||
2598 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 2599 | return; |
9854d9ed | 2600 | |
9878760c RK |
2601 | case 't': |
2602 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2603 | All floating-point operations except NE branch true and integer | |
2604 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2605 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2606 | output_operand_lossage ("invalid %%t value"); | |
2607 | ||
2608 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2609 | && GET_CODE (x) != NE) | |
2610 | || GET_CODE (x) == EQ | |
2611 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2612 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2613 | fputs ("12", file); |
9878760c | 2614 | else |
76229ac8 | 2615 | putc ('4', file); |
9878760c RK |
2616 | return; |
2617 | ||
2618 | case 'T': | |
2619 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2620 | 12 otherwise. */ | |
2621 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2622 | output_operand_lossage ("invalid %%t value"); | |
2623 | ||
2624 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2625 | && GET_CODE (x) != NE) | |
2626 | || GET_CODE (x) == EQ | |
2627 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2628 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2629 | putc ('4', file); |
9878760c | 2630 | else |
76229ac8 | 2631 | fputs ("12", file); |
9878760c RK |
2632 | return; |
2633 | ||
9854d9ed | 2634 | case 'u': |
802a0058 | 2635 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
2636 | if (! INT_P (x)) |
2637 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 2638 | |
76229ac8 | 2639 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
2640 | return; |
2641 | ||
802a0058 MM |
2642 | case 'v': |
2643 | /* High-order 16 bits of constant for use in signed operand. */ | |
2644 | if (! INT_P (x)) | |
2645 | output_operand_lossage ("invalid %%v value"); | |
2646 | ||
2647 | { | |
2648 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
2649 | ||
2650 | /* Solaris assembler doesn't like lis 0,0x80000 */ | |
2651 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) | |
2652 | fprintf (file, "%d", value | (~0 << 16)); | |
2653 | else | |
2654 | fprintf (file, "0x%x", value); | |
2655 | return; | |
2656 | } | |
2657 | ||
9854d9ed RK |
2658 | case 'U': |
2659 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
2660 | if (GET_CODE (x) == MEM | |
2661 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2662 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 2663 | putc ('u', file); |
9854d9ed | 2664 | return; |
9878760c | 2665 | |
9854d9ed RK |
2666 | case 'w': |
2667 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
2668 | normally. */ | |
2669 | if (INT_P (x)) | |
2670 | fprintf (file, "%d", | |
2671 | (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); | |
2672 | else | |
2673 | print_operand (file, x, 0); | |
9878760c RK |
2674 | return; |
2675 | ||
9854d9ed RK |
2676 | case 'W': |
2677 | /* If constant, low-order 16 bits of constant, unsigned. | |
2678 | Otherwise, write normally. */ | |
2679 | if (INT_P (x)) | |
2680 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
2681 | else | |
2682 | print_operand (file, x, 0); | |
2683 | return; | |
9878760c | 2684 | |
9854d9ed RK |
2685 | case 'X': |
2686 | if (GET_CODE (x) == MEM | |
2687 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 2688 | putc ('x', file); |
9854d9ed | 2689 | return; |
9878760c | 2690 | |
9854d9ed RK |
2691 | case 'Y': |
2692 | /* Like 'L', for third word of TImode */ | |
2693 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2694 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 2695 | else if (GET_CODE (x) == MEM) |
9878760c | 2696 | { |
9854d9ed RK |
2697 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2698 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2699 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 2700 | else |
a54d04b7 | 2701 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa MM |
2702 | if (small_data_operand (x, GET_MODE (x))) |
2703 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
9878760c RK |
2704 | } |
2705 | return; | |
9854d9ed | 2706 | |
9878760c | 2707 | case 'z': |
b4ac57ab RS |
2708 | /* X is a SYMBOL_REF. Write out the name preceded by a |
2709 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
2710 | names. If we are configured for System V (or the embedded ABI) on |
2711 | the PowerPC, do not emit the period, since those systems do not use | |
2712 | TOCs and the like. */ | |
9878760c RK |
2713 | if (GET_CODE (x) != SYMBOL_REF) |
2714 | abort (); | |
2715 | ||
b6c9286a MM |
2716 | if (XSTR (x, 0)[0] != '.') |
2717 | { | |
2718 | switch (DEFAULT_ABI) | |
2719 | { | |
2720 | default: | |
2721 | abort (); | |
2722 | ||
2723 | case ABI_AIX: | |
2724 | putc ('.', file); | |
2725 | break; | |
2726 | ||
2727 | case ABI_V4: | |
2728 | case ABI_AIX_NODESC: | |
c81bebd7 | 2729 | case ABI_SOLARIS: |
b6c9286a MM |
2730 | break; |
2731 | ||
2732 | case ABI_NT: | |
2733 | fputs ("..", file); | |
2734 | break; | |
2735 | } | |
2736 | } | |
9878760c RK |
2737 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
2738 | return; | |
2739 | ||
9854d9ed RK |
2740 | case 'Z': |
2741 | /* Like 'L', for last word of TImode. */ | |
2742 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2743 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
2744 | else if (GET_CODE (x) == MEM) |
2745 | { | |
2746 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2747 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2748 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 2749 | else |
a54d04b7 | 2750 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa MM |
2751 | if (small_data_operand (x, GET_MODE (x))) |
2752 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
9854d9ed | 2753 | } |
5c23c401 | 2754 | return; |
9854d9ed | 2755 | |
9878760c RK |
2756 | case 0: |
2757 | if (GET_CODE (x) == REG) | |
2758 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
2759 | else if (GET_CODE (x) == MEM) | |
2760 | { | |
2761 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
2762 | know the width from the mode. */ | |
2763 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
2764 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
2765 | REGNO (XEXP (XEXP (x, 0), 0))); | |
2766 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
2767 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
2768 | REGNO (XEXP (XEXP (x, 0), 0))); | |
2769 | else | |
a54d04b7 | 2770 | output_address (XEXP (x, 0)); |
9878760c RK |
2771 | } |
2772 | else | |
a54d04b7 | 2773 | output_addr_const (file, x); |
a85d226b | 2774 | return; |
9878760c RK |
2775 | |
2776 | default: | |
2777 | output_operand_lossage ("invalid %%xn code"); | |
2778 | } | |
2779 | } | |
2780 | \f | |
2781 | /* Print the address of an operand. */ | |
2782 | ||
2783 | void | |
2784 | print_operand_address (file, x) | |
2785 | FILE *file; | |
2786 | register rtx x; | |
2787 | { | |
2788 | if (GET_CODE (x) == REG) | |
4697a36c | 2789 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 2790 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
2791 | { |
2792 | output_addr_const (file, x); | |
ba5e43aa MM |
2793 | if (small_data_operand (x, GET_MODE (x))) |
2794 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
7509c759 | 2795 | |
4697a36c | 2796 | #ifdef TARGET_NO_TOC |
7509c759 | 2797 | else if (TARGET_NO_TOC) |
4697a36c | 2798 | ; |
4697a36c | 2799 | #endif |
7509c759 | 2800 | else |
4697a36c | 2801 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); |
9878760c RK |
2802 | } |
2803 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
2804 | { | |
2805 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
2806 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
2807 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 2808 | else |
4697a36c MM |
2809 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
2810 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
2811 | } |
2812 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
4697a36c MM |
2813 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
2814 | else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM | |
2815 | && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) | |
2816 | { | |
2817 | output_addr_const (file, XEXP (x, 1)); | |
2818 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
2819 | } | |
9878760c RK |
2820 | else |
2821 | abort (); | |
2822 | } | |
2823 | \f | |
2824 | /* This page contains routines that are used to determine what the function | |
2825 | prologue and epilogue code will do and write them out. */ | |
2826 | ||
2827 | /* Return the first fixed-point register that is required to be saved. 32 if | |
2828 | none. */ | |
2829 | ||
2830 | int | |
2831 | first_reg_to_save () | |
2832 | { | |
2833 | int first_reg; | |
2834 | ||
2835 | /* Find lowest numbered live register. */ | |
2836 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
2837 | if (regs_ever_live[first_reg]) | |
2838 | break; | |
2839 | ||
e165f3f0 RK |
2840 | /* If profiling, then we must save/restore every register that contains |
2841 | a parameter before/after the .mcount call. Use registers from 30 down | |
2842 | to 23 to do this. Don't use the frame pointer in reg 31. | |
2843 | ||
2844 | For now, save enough room for all of the parameter registers. */ | |
b6c9286a | 2845 | if (DEFAULT_ABI == ABI_AIX && profile_flag) |
e165f3f0 RK |
2846 | if (first_reg > 23) |
2847 | first_reg = 23; | |
2848 | ||
9878760c RK |
2849 | return first_reg; |
2850 | } | |
2851 | ||
2852 | /* Similar, for FP regs. */ | |
2853 | ||
2854 | int | |
2855 | first_fp_reg_to_save () | |
2856 | { | |
2857 | int first_reg; | |
2858 | ||
2859 | /* Find lowest numbered live register. */ | |
2860 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
2861 | if (regs_ever_live[first_reg]) | |
2862 | break; | |
2863 | ||
2864 | return first_reg; | |
2865 | } | |
2866 | ||
9878760c RK |
2867 | /* Return non-zero if this function makes calls. */ |
2868 | ||
2869 | int | |
2870 | rs6000_makes_calls () | |
2871 | { | |
2872 | rtx insn; | |
2873 | ||
0c61c946 RK |
2874 | /* If we are profiling, we will be making a call to mcount. */ |
2875 | if (profile_flag) | |
2876 | return 1; | |
2877 | ||
9878760c RK |
2878 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
2879 | if (GET_CODE (insn) == CALL_INSN) | |
2880 | return 1; | |
2881 | ||
2882 | return 0; | |
2883 | } | |
2884 | ||
4697a36c MM |
2885 | \f |
2886 | /* Calculate the stack information for the current function. This is | |
2887 | complicated by having two separate calling sequences, the AIX calling | |
2888 | sequence and the V.4 calling sequence. | |
2889 | ||
2890 | AIX stack frames look like: | |
2891 | ||
2892 | SP----> +---------------------------------------+ | |
2893 | | back chain to caller | 0 | |
2894 | +---------------------------------------+ | |
2895 | | saved CR | 4 | |
2896 | +---------------------------------------+ | |
2897 | | saved LR | 8 | |
2898 | +---------------------------------------+ | |
2899 | | reserved for compilers | 12 | |
2900 | +---------------------------------------+ | |
2901 | | reserved for binders | 16 | |
2902 | +---------------------------------------+ | |
2903 | | saved TOC pointer | 20 | |
2904 | +---------------------------------------+ | |
2905 | | Parameter save area (P) | 24 | |
2906 | +---------------------------------------+ | |
a7df97e6 | 2907 | | Alloca space (A) | 24+P |
802a0058 | 2908 | +---------------------------------------+ |
a7df97e6 | 2909 | | Local variable space (L) | 24+P+A |
4697a36c | 2910 | +---------------------------------------+ |
a7df97e6 | 2911 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 2912 | +---------------------------------------+ |
a7df97e6 | 2913 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 2914 | +---------------------------------------+ |
a7df97e6 | 2915 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
2916 | +---------------------------------------+ |
2917 | old SP->| back chain to caller's caller | | |
2918 | +---------------------------------------+ | |
2919 | ||
2920 | V.4 stack frames look like: | |
2921 | ||
2922 | SP----> +---------------------------------------+ | |
2923 | | back chain to caller | 0 | |
2924 | +---------------------------------------+ | |
5eb387b8 | 2925 | | caller's saved LR | 4 |
4697a36c MM |
2926 | +---------------------------------------+ |
2927 | | Parameter save area (P) | 8 | |
2928 | +---------------------------------------+ | |
a7df97e6 MM |
2929 | | Alloca space (A) | 8+P |
2930 | +---------------------------------------+ | |
2931 | | Varargs save area (V) | 8+P+A | |
2932 | +---------------------------------------+ | |
2933 | | Local variable space (L) | 8+P+A+V | |
2934 | +---------------------------------------+ | |
2935 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 2936 | +---------------------------------------+ |
a7df97e6 MM |
2937 | | saved CR (C) | 8+P+A+V+L+X |
2938 | +---------------------------------------+ | |
2939 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
2940 | +---------------------------------------+ | |
2941 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
2942 | +---------------------------------------+ |
2943 | old SP->| back chain to caller's caller | | |
2944 | +---------------------------------------+ | |
b6c9286a MM |
2945 | |
2946 | ||
2947 | A PowerPC Windows/NT frame looks like: | |
2948 | ||
2949 | SP----> +---------------------------------------+ | |
2950 | | back chain to caller | 0 | |
2951 | +---------------------------------------+ | |
2952 | | reserved | 4 | |
2953 | +---------------------------------------+ | |
2954 | | reserved | 8 | |
2955 | +---------------------------------------+ | |
2956 | | reserved | 12 | |
2957 | +---------------------------------------+ | |
2958 | | reserved | 16 | |
2959 | +---------------------------------------+ | |
2960 | | reserved | 20 | |
2961 | +---------------------------------------+ | |
2962 | | Parameter save area (P) | 24 | |
2963 | +---------------------------------------+ | |
a7df97e6 MM |
2964 | | Alloca space (A) | 24+P |
2965 | +---------------------------------------+ | |
2966 | | Local variable space (L) | 24+P+A | |
2967 | +---------------------------------------+ | |
2968 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 2969 | +---------------------------------------+ |
a7df97e6 MM |
2970 | | Save area for FP registers (F) | 24+P+A+L+X |
2971 | +---------------------------------------+ | |
2972 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
2973 | +---------------------------------------+ | |
2974 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
2975 | +---------------------------------------+ | |
2976 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
2977 | +---------------------------------------+ | |
2978 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
2979 | +---------------------------------------+ | |
2980 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
2981 | +---------------------------------------+ |
2982 | old SP->| back chain to caller's caller | | |
2983 | +---------------------------------------+ | |
2984 | ||
2985 | For NT, there is no specific order to save the registers, but in | |
2986 | order to support __builtin_return_address, the save area for the | |
2987 | link register needs to be in a known place, so we use -4 off of the | |
2988 | old SP. To support calls through pointers, we also allocate a | |
2989 | fixed slot to store the TOC, -8 off the old SP. */ | |
4697a36c | 2990 | |
61b2fbe7 MM |
2991 | #ifndef ABI_STACK_BOUNDARY |
2992 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
2993 | #endif | |
2994 | ||
4697a36c MM |
2995 | rs6000_stack_t * |
2996 | rs6000_stack_info () | |
2997 | { | |
2998 | static rs6000_stack_t info, zero_info; | |
2999 | rs6000_stack_t *info_ptr = &info; | |
3000 | int reg_size = TARGET_64BIT ? 8 : 4; | |
24d304eb | 3001 | enum rs6000_abi abi; |
b6c9286a | 3002 | int total_raw_size; |
4697a36c MM |
3003 | |
3004 | /* Zero all fields portably */ | |
3005 | info = zero_info; | |
3006 | ||
3007 | /* Select which calling sequence */ | |
b6c9286a | 3008 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3009 | |
4697a36c MM |
3010 | /* Calculate which registers need to be saved & save area size */ |
3011 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3012 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3013 | ||
3014 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3015 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3016 | ||
3017 | /* Does this function call anything? */ | |
3018 | info_ptr->calls_p = rs6000_makes_calls (); | |
3019 | ||
62c0fb87 | 3020 | /* Allocate space to save the toc. */ |
82280d5e | 3021 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3022 | { |
3023 | info_ptr->toc_save_p = 1; | |
3024 | info_ptr->toc_size = reg_size; | |
3025 | } | |
3026 | ||
802a0058 MM |
3027 | /* Does this machine need the float/int conversion area? */ |
3028 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3029 | ||
b6c9286a MM |
3030 | /* If this is main and we need to call a function to set things up, |
3031 | save main's arguments around the call. */ | |
c81bebd7 MM |
3032 | #ifdef TARGET_EABI |
3033 | if (TARGET_EABI) | |
3034 | #endif | |
b6c9286a | 3035 | { |
c81bebd7 | 3036 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0) |
b6c9286a | 3037 | { |
c81bebd7 | 3038 | info_ptr->main_p = 1; |
b6c9286a | 3039 | |
c81bebd7 MM |
3040 | #ifdef NAME__MAIN |
3041 | info_ptr->calls_p = 1; | |
b6c9286a | 3042 | |
c81bebd7 | 3043 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3044 | { |
c81bebd7 MM |
3045 | int i; |
3046 | tree arg; | |
3047 | ||
3048 | info_ptr->main_save_p = 1; | |
3049 | info_ptr->main_size = 0; | |
3050 | ||
3051 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3052 | arg != NULL_TREE && i < 8; | |
3053 | (arg = TREE_CHAIN (arg)), i++) | |
3054 | { | |
3055 | info_ptr->main_size += reg_size; | |
3056 | } | |
b6c9286a | 3057 | } |
b6c9286a | 3058 | #endif |
c81bebd7 | 3059 | } |
b6c9286a MM |
3060 | } |
3061 | ||
c81bebd7 | 3062 | |
4697a36c MM |
3063 | /* Determine if we need to save the link register */ |
3064 | if (regs_ever_live[65] || profile_flag | |
3065 | #ifdef TARGET_RELOCATABLE | |
3066 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3067 | #endif | |
3068 | || (info_ptr->first_fp_reg_save != 64 | |
3069 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3070 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3071 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3072 | || info_ptr->calls_p) |
3073 | { | |
3074 | info_ptr->lr_save_p = 1; | |
3075 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3076 | if (abi == ABI_NT) |
3077 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3078 | } |
3079 | ||
3080 | /* Determine if we need to save the condition code registers */ | |
3081 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3082 | { | |
3083 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3084 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3085 | info_ptr->cr_size = reg_size; |
3086 | } | |
3087 | ||
3088 | /* Determine various sizes */ | |
3089 | info_ptr->reg_size = reg_size; | |
3090 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3091 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
3092 | info_ptr->vars_size = ALIGN (get_frame_size (), 8); | |
3093 | info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3094 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
b6c9286a MM |
3095 | info_ptr->save_size = ALIGN (info_ptr->fp_size |
3096 | + info_ptr->gp_size | |
3097 | + info_ptr->cr_size | |
3098 | + info_ptr->lr_size | |
3099 | + info_ptr->toc_size | |
3100 | + info_ptr->main_size, 8); | |
3101 | ||
3102 | total_raw_size = (info_ptr->vars_size | |
3103 | + info_ptr->parm_size | |
802a0058 | 3104 | + info_ptr->fpmem_size |
b6c9286a MM |
3105 | + info_ptr->save_size |
3106 | + info_ptr->varargs_size | |
3107 | + info_ptr->fixed_size); | |
3108 | ||
61b2fbe7 | 3109 | info_ptr->total_size = ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); |
4697a36c MM |
3110 | |
3111 | /* Determine if we need to allocate any stack frame. | |
3112 | For AIX We need to push the stack if a frame pointer is needed (because | |
3113 | the stack might be dynamically adjusted), if we are debugging, if the | |
3114 | total stack size is more than 220 bytes, or if we make calls. | |
3115 | ||
3116 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3117 | the debugger can handle stackless frames. */ | |
3118 | ||
3119 | if (info_ptr->calls_p) | |
3120 | info_ptr->push_p = 1; | |
3121 | ||
c81bebd7 | 3122 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
b6c9286a | 3123 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size |
4697a36c MM |
3124 | || info_ptr->lr_save_p); |
3125 | ||
3126 | else | |
3127 | info_ptr->push_p = (frame_pointer_needed | |
3128 | || write_symbols != NO_DEBUG | |
3129 | || info_ptr->total_size > 220); | |
3130 | ||
3131 | /* Calculate the offsets */ | |
24d304eb | 3132 | switch (abi) |
4697a36c | 3133 | { |
b6c9286a | 3134 | case ABI_NONE: |
24d304eb | 3135 | default: |
b6c9286a MM |
3136 | abort (); |
3137 | ||
3138 | case ABI_AIX: | |
3139 | case ABI_AIX_NODESC: | |
3140 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3141 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3142 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
3143 | info_ptr->cr_save_offset = 4; | |
3144 | info_ptr->lr_save_offset = 8; | |
24d304eb RK |
3145 | break; |
3146 | ||
3147 | case ABI_V4: | |
c81bebd7 | 3148 | case ABI_SOLARIS: |
b6c9286a MM |
3149 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3150 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3151 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3152 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3153 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3154 | info_ptr->lr_save_offset = reg_size; |
3155 | break; | |
3156 | ||
3157 | case ABI_NT: | |
3158 | info_ptr->lr_save_offset = -4; | |
3159 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; | |
3160 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3161 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3162 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3163 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
3164 | info_ptr->fp_save_offset -= 4; | |
3165 | ||
3166 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3167 | break; |
4697a36c MM |
3168 | } |
3169 | ||
a7df97e6 MM |
3170 | if (info_ptr->fpmem_p) |
3171 | info_ptr->fpmem_offset = STARTING_FRAME_OFFSET - info_ptr->total_size + info_ptr->vars_size; | |
3172 | ||
4697a36c MM |
3173 | /* Zero offsets if we're not saving those registers */ |
3174 | if (!info_ptr->fp_size) | |
3175 | info_ptr->fp_save_offset = 0; | |
3176 | ||
3177 | if (!info_ptr->gp_size) | |
3178 | info_ptr->gp_save_offset = 0; | |
3179 | ||
3180 | if (!info_ptr->lr_save_p) | |
3181 | info_ptr->lr_save_offset = 0; | |
3182 | ||
3183 | if (!info_ptr->cr_save_p) | |
3184 | info_ptr->cr_save_offset = 0; | |
3185 | ||
b6c9286a MM |
3186 | if (!info_ptr->toc_save_p) |
3187 | info_ptr->toc_save_offset = 0; | |
3188 | ||
3189 | if (!info_ptr->main_save_p) | |
3190 | info_ptr->main_save_offset = 0; | |
3191 | ||
802a0058 MM |
3192 | if (!info_ptr->fpmem_p) |
3193 | info_ptr->fpmem_offset = 0; | |
3194 | else | |
3195 | { | |
3196 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a7df97e6 | 3197 | rs6000_fpmem_offset = info_ptr->total_size + info_ptr->fpmem_offset; |
802a0058 MM |
3198 | } |
3199 | ||
4697a36c MM |
3200 | return info_ptr; |
3201 | } | |
3202 | ||
3203 | void | |
3204 | debug_stack_info (info) | |
3205 | rs6000_stack_t *info; | |
9878760c | 3206 | { |
24d304eb RK |
3207 | char *abi_string; |
3208 | ||
4697a36c MM |
3209 | if (!info) |
3210 | info = rs6000_stack_info (); | |
3211 | ||
3212 | fprintf (stderr, "\nStack information for function %s:\n", | |
3213 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3214 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3215 | : "<unknown>")); | |
3216 | ||
24d304eb RK |
3217 | switch (info->abi) |
3218 | { | |
b6c9286a MM |
3219 | default: abi_string = "Unknown"; break; |
3220 | case ABI_NONE: abi_string = "NONE"; break; | |
3221 | case ABI_AIX: abi_string = "AIX"; break; | |
3222 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3223 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3224 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3225 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3226 | } |
3227 | ||
3228 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3229 | ||
4697a36c MM |
3230 | if (info->first_gp_reg_save != 32) |
3231 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3232 | ||
3233 | if (info->first_fp_reg_save != 64) | |
3234 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3235 | |
4697a36c MM |
3236 | if (info->lr_save_p) |
3237 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3238 | |
4697a36c MM |
3239 | if (info->cr_save_p) |
3240 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3241 | ||
b6c9286a MM |
3242 | if (info->toc_save_p) |
3243 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3244 | ||
4697a36c MM |
3245 | if (info->push_p) |
3246 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3247 | ||
3248 | if (info->calls_p) | |
3249 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3250 | ||
b6c9286a MM |
3251 | if (info->main_p) |
3252 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3253 | ||
3254 | if (info->main_save_p) | |
3255 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3256 | ||
802a0058 MM |
3257 | if (info->fpmem_p) |
3258 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3259 | ||
4697a36c MM |
3260 | if (info->gp_save_offset) |
3261 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3262 | ||
3263 | if (info->fp_save_offset) | |
3264 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3265 | ||
3266 | if (info->lr_save_offset) | |
3267 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3268 | ||
3269 | if (info->cr_save_offset) | |
3270 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3271 | ||
b6c9286a MM |
3272 | if (info->toc_save_offset) |
3273 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3274 | ||
4697a36c MM |
3275 | if (info->varargs_save_offset) |
3276 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3277 | ||
b6c9286a MM |
3278 | if (info->main_save_offset) |
3279 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3280 | ||
802a0058 MM |
3281 | if (info->fpmem_offset) |
3282 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3283 | ||
4697a36c MM |
3284 | if (info->total_size) |
3285 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3286 | ||
3287 | if (info->varargs_size) | |
3288 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3289 | ||
3290 | if (info->vars_size) | |
3291 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3292 | ||
3293 | if (info->parm_size) | |
3294 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3295 | ||
802a0058 MM |
3296 | if (info->fpmem_size) |
3297 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3298 | ||
4697a36c MM |
3299 | if (info->fixed_size) |
3300 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3301 | ||
3302 | if (info->gp_size) | |
3303 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3304 | ||
3305 | if (info->fp_size) | |
3306 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3307 | ||
b6c9286a MM |
3308 | if (info->lr_size) |
3309 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3310 | ||
4697a36c MM |
3311 | if (info->cr_size) |
3312 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3313 | ||
b6c9286a MM |
3314 | if (info->toc_size) |
3315 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3316 | ||
3317 | if (info->main_size) | |
3318 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3319 | ||
4697a36c MM |
3320 | if (info->save_size) |
3321 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3322 | ||
3323 | if (info->reg_size != 4) | |
3324 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3325 | ||
3326 | fprintf (stderr, "\n"); | |
9878760c RK |
3327 | } |
3328 | ||
4697a36c | 3329 | \f |
9878760c | 3330 | /* Write function prologue. */ |
9878760c RK |
3331 | void |
3332 | output_prolog (file, size) | |
3333 | FILE *file; | |
3334 | int size; | |
3335 | { | |
4697a36c | 3336 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a MM |
3337 | int reg_size = info->reg_size; |
3338 | char *store_reg; | |
3339 | char *load_reg; | |
979721f8 MM |
3340 | int sp_reg = 1; |
3341 | int sp_offset = 0; | |
b6c9286a | 3342 | |
8f802bfb | 3343 | if (TARGET_32BIT) |
b6c9286a | 3344 | { |
8f802bfb DE |
3345 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3346 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3347 | } |
3348 | else | |
3349 | { | |
8f802bfb DE |
3350 | store_reg = "\tstd %s,%d(%s)\n"; |
3351 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3352 | } |
9878760c | 3353 | |
4697a36c MM |
3354 | if (TARGET_DEBUG_STACK) |
3355 | debug_stack_info (info); | |
9878760c RK |
3356 | |
3357 | /* Write .extern for any function we will call to save and restore fp | |
3358 | values. */ | |
b6c9286a | 3359 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3360 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3361 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3362 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3363 | |
3364 | /* Write .extern for truncation routines, if needed. */ | |
3365 | if (rs6000_trunc_used && ! trunc_defined) | |
3366 | { | |
e138174b ILT |
3367 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3368 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3369 | trunc_defined = 1; |
3370 | } | |
4697a36c | 3371 | |
c764f757 RK |
3372 | /* Write .extern for AIX common mode routines, if needed. */ |
3373 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3374 | { | |
f6709c70 JW |
3375 | fputs ("\t.extern __mulh\n", file); |
3376 | fputs ("\t.extern __mull\n", file); | |
3377 | fputs ("\t.extern __divss\n", file); | |
3378 | fputs ("\t.extern __divus\n", file); | |
3379 | fputs ("\t.extern __quoss\n", file); | |
3380 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
3381 | common_mode_defined = 1; |
3382 | } | |
9878760c | 3383 | |
979721f8 | 3384 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 3385 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
3386 | { |
3387 | if (info->total_size < 32767) | |
3388 | { | |
3389 | asm_fprintf (file, | |
3390 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3391 | reg_names[1], - info->total_size, reg_names[1]); | |
3392 | sp_offset = info->total_size; | |
3393 | } | |
3394 | else | |
3395 | { | |
3396 | int neg_size = - info->total_size; | |
3397 | sp_reg = 12; | |
3398 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3399 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3400 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3401 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3402 | asm_fprintf (file, | |
3403 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3404 | reg_names[1], reg_names[1], reg_names[0]); | |
3405 | } | |
3406 | } | |
3407 | ||
9878760c | 3408 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
3409 | if (info->lr_save_p) |
3410 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
3411 | |
3412 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 3413 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 3414 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
3415 | |
3416 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
3417 | ourself. Otherwise, call function. Note that since they are statically |
3418 | linked, we do not need a nop following them. */ | |
4697a36c | 3419 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 3420 | { |
4697a36c | 3421 | int regno = info->first_fp_reg_save; |
979721f8 | 3422 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3423 | |
3424 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3425 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 3426 | } |
4697a36c MM |
3427 | else if (info->first_fp_reg_save != 64) |
3428 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
3429 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
3430 | |
3431 | /* Now save gpr's. */ | |
4697a36c | 3432 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3433 | { |
4697a36c | 3434 | int regno = info->first_gp_reg_save; |
979721f8 | 3435 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 3436 | |
4697a36c | 3437 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3438 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3439 | } |
3440 | ||
4697a36c MM |
3441 | else if (info->first_gp_reg_save != 32) |
3442 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
3443 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3444 | info->gp_save_offset + sp_offset, |
3445 | reg_names[sp_reg]); | |
9878760c | 3446 | |
b6c9286a MM |
3447 | /* Save main's arguments if we need to call a function */ |
3448 | #ifdef NAME__MAIN | |
3449 | if (info->main_save_p) | |
3450 | { | |
3451 | int regno; | |
5ebfb2ba | 3452 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
3453 | int size = info->main_size; |
3454 | ||
3455 | for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size) | |
979721f8 | 3456 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
3457 | } |
3458 | #endif | |
3459 | ||
9878760c | 3460 | /* Save lr if we used it. */ |
4697a36c | 3461 | if (info->lr_save_p) |
979721f8 MM |
3462 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
3463 | reg_names[sp_reg]); | |
9878760c RK |
3464 | |
3465 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 3466 | if (info->cr_save_p) |
979721f8 MM |
3467 | { |
3468 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
3469 | { | |
3470 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
3471 | asm_fprintf (file, store_reg, reg_names[0], | |
3472 | info->cr_save_offset + sp_offset, | |
3473 | reg_names[sp_reg]); | |
3474 | } | |
3475 | else | |
3476 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
3477 | reg_names[sp_reg]); | |
3478 | } | |
9878760c | 3479 | |
979721f8 MM |
3480 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
3481 | do it here. */ | |
3482 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
3483 | { | |
3484 | if (info->total_size < 32768) | |
3485 | { | |
3486 | int probe_offset = 4096; | |
3487 | while (probe_offset < info->total_size) | |
3488 | { | |
3489 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
3490 | probe_offset += 4096; | |
3491 | } | |
3492 | } | |
3493 | else | |
3494 | { | |
3495 | int probe_iterations = info->total_size / 4096; | |
3496 | static int probe_labelno = 0; | |
3497 | char buf[256]; | |
3498 | ||
3499 | if (probe_iterations < 32768) | |
3500 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
3501 | else | |
3502 | { | |
3503 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
3504 | if (probe_iterations & 0xffff) | |
3505 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
3506 | probe_iterations & 0xffff); | |
3507 | } | |
3508 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
3509 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3510 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
3511 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 3512 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
3513 | fputs ("\tbdnz ", file); |
3514 | assemble_name (file, buf); | |
3515 | fputs ("\n", file); | |
3516 | } | |
3517 | } | |
3518 | ||
3519 | /* Update stack and set back pointer and we have already done so for V.4. */ | |
c81bebd7 | 3520 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
9878760c | 3521 | { |
4697a36c MM |
3522 | if (info->total_size < 32767) |
3523 | asm_fprintf (file, | |
8f802bfb | 3524 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", |
4697a36c | 3525 | reg_names[1], - info->total_size, reg_names[1]); |
9878760c RK |
3526 | else |
3527 | { | |
ef7a1424 | 3528 | int neg_size = - info->total_size; |
4697a36c | 3529 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", |
ef7a1424 RK |
3530 | reg_names[0], (neg_size >> 16) & 0xffff, |
3531 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
4697a36c | 3532 | asm_fprintf (file, |
8f802bfb | 3533 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", |
4697a36c | 3534 | reg_names[1], reg_names[1], reg_names[0]); |
9878760c RK |
3535 | } |
3536 | } | |
3537 | ||
3538 | /* Set frame pointer, if needed. */ | |
3539 | if (frame_pointer_needed) | |
4697a36c | 3540 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 3541 | |
b6c9286a MM |
3542 | #ifdef NAME__MAIN |
3543 | /* If we need to call a function to set things up for main, do so now | |
3544 | before dealing with the TOC. */ | |
3545 | if (info->main_p) | |
3546 | { | |
3547 | char *prefix = ""; | |
3548 | ||
3549 | switch (DEFAULT_ABI) | |
3550 | { | |
3551 | case ABI_AIX: prefix = "."; break; | |
3552 | case ABI_NT: prefix = ".."; break; | |
3553 | } | |
3554 | ||
3555 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
3556 | #ifdef RS6000_CALL_GLUE2 | |
3557 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
3558 | #else | |
3559 | #ifdef RS6000_CALL_GLUE | |
3560 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
3561 | fprintf (file, "\t%s\n", RS6000_CALL_GLUE); | |
3562 | #endif | |
3563 | #endif | |
3564 | ||
3565 | if (info->main_save_p) | |
3566 | { | |
3567 | int regno; | |
3568 | int loc; | |
3569 | int size = info->main_size; | |
3570 | ||
3571 | if (info->total_size < 32767) | |
3572 | { | |
3573 | loc = info->total_size + info->main_save_offset; | |
3574 | for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size) | |
3575 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); | |
3576 | } | |
3577 | else | |
5ebfb2ba MM |
3578 | { |
3579 | int neg_size = info->main_save_offset - info->total_size; | |
3580 | loc = 0; | |
3581 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3582 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3583 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 3584 | |
b6c9286a MM |
3585 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
3586 | reg_names[1]); | |
3587 | ||
3588 | for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size) | |
3589 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); | |
3590 | } | |
3591 | } | |
3592 | } | |
3593 | #endif | |
3594 | ||
3595 | ||
1875cc88 JW |
3596 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
3597 | TOC_TABLE address into register 30. */ | |
4697a36c | 3598 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
3daf36a4 | 3599 | { |
d14a6d05 MM |
3600 | char buf[256]; |
3601 | ||
b6c9286a | 3602 | #ifdef TARGET_RELOCATABLE |
d14a6d05 MM |
3603 | if (TARGET_RELOCATABLE) |
3604 | { | |
874a0744 | 3605 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
19d2d16f | 3606 | fputs ("\tbl ", file); |
d14a6d05 | 3607 | assemble_name (file, buf); |
19d2d16f | 3608 | putc ('\n', file); |
d14a6d05 | 3609 | |
874a0744 | 3610 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
4697a36c | 3611 | fprintf (file, "\tmflr %s\n", reg_names[30]); |
3daf36a4 | 3612 | |
03a7e1a5 | 3613 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz}" : "\tld"); |
4697a36c | 3614 | fprintf (file, " %s,(", reg_names[0]); |
874a0744 MM |
3615 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
3616 | assemble_name (file, buf); | |
19d2d16f | 3617 | putc ('-', file); |
874a0744 MM |
3618 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
3619 | assemble_name (file, buf); | |
4697a36c MM |
3620 | fprintf (file, ")(%s)\n", reg_names[30]); |
3621 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", | |
3622 | reg_names[30], reg_names[0], reg_names[30]); | |
874a0744 | 3623 | rs6000_pic_labelno++; |
d14a6d05 | 3624 | } |
b6c9286a MM |
3625 | else |
3626 | #endif | |
3627 | ||
3628 | switch (DEFAULT_ABI) | |
3629 | { | |
3630 | case ABI_V4: | |
c81bebd7 | 3631 | case ABI_SOLARIS: |
b6c9286a | 3632 | case ABI_AIX_NODESC: |
8f802bfb | 3633 | if (TARGET_32BIT) |
b6c9286a MM |
3634 | { |
3635 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3636 | asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]); | |
3637 | assemble_name (file, buf); | |
3638 | asm_fprintf (file, "@ha\n"); | |
3639 | if (TARGET_NEW_MNEMONICS) | |
3640 | { | |
3641 | asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]); | |
3642 | assemble_name (file, buf); | |
3643 | asm_fprintf (file, "@l\n"); | |
3644 | } | |
3645 | else | |
3646 | { | |
3647 | asm_fprintf (file, "\tcal %s,", reg_names[30]); | |
3648 | assemble_name (file, buf); | |
3649 | asm_fprintf (file, "@l(%s)\n", reg_names[30]); | |
3650 | } | |
3651 | } | |
3652 | else | |
3653 | abort (); | |
3654 | ||
3655 | break; | |
3656 | ||
3657 | case ABI_NT: | |
3658 | case ABI_AIX: | |
3659 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
3660 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]); | |
3933e0e1 | 3661 | assemble_name (file, buf); |
b6c9286a MM |
3662 | asm_fprintf (file, "(%s)\n", reg_names[2]); |
3663 | break; | |
3933e0e1 | 3664 | } |
b6c9286a | 3665 | } |
4697a36c | 3666 | |
b6c9286a MM |
3667 | if (DEFAULT_ABI == ABI_NT) |
3668 | { | |
3669 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3670 | fputs (".b:\n", file); | |
3daf36a4 | 3671 | } |
9878760c RK |
3672 | } |
3673 | ||
3674 | /* Write function epilogue. */ | |
3675 | ||
3676 | void | |
3677 | output_epilog (file, size) | |
3678 | FILE *file; | |
3679 | int size; | |
3680 | { | |
4697a36c | 3681 | rs6000_stack_t *info = rs6000_stack_info (); |
8f802bfb | 3682 | char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 3683 | rtx insn = get_last_insn (); |
979721f8 MM |
3684 | int sp_reg = 1; |
3685 | int sp_offset = 0; | |
5b5040b9 | 3686 | int i; |
9878760c | 3687 | |
9878760c RK |
3688 | /* If the last insn was a BARRIER, we don't have to write anything except |
3689 | the trace table. */ | |
3690 | if (GET_CODE (insn) == NOTE) | |
3691 | insn = prev_nonnote_insn (insn); | |
3692 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
3693 | { | |
3694 | /* If we have a frame pointer, a call to alloca, or a large stack | |
3695 | frame, restore the old stack pointer using the backchain. Otherwise, | |
3696 | we know what size to update it with. */ | |
3697 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 3698 | || info->total_size > 32767) |
979721f8 MM |
3699 | { |
3700 | /* Under V.4, don't reset the stack pointer until after we're done | |
3701 | loading the saved registers. */ | |
c81bebd7 | 3702 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
3703 | sp_reg = 11; |
3704 | ||
3705 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
3706 | } | |
4697a36c MM |
3707 | else if (info->push_p) |
3708 | { | |
c81bebd7 | 3709 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
3710 | sp_offset = info->total_size; |
3711 | else if (TARGET_NEW_MNEMONICS) | |
4697a36c MM |
3712 | asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size); |
3713 | else | |
3714 | asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]); | |
3715 | } | |
9878760c | 3716 | |
b4ac57ab | 3717 | /* Get the old lr if we saved it. */ |
4697a36c | 3718 | if (info->lr_save_p) |
979721f8 | 3719 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
3720 | |
3721 | /* Get the old cr if we saved it. */ | |
4697a36c | 3722 | if (info->cr_save_p) |
979721f8 | 3723 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 3724 | |
b4ac57ab | 3725 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
3726 | if (info->lr_save_p) |
3727 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 3728 | |
9878760c | 3729 | /* Restore gpr's. */ |
4697a36c | 3730 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3731 | { |
4697a36c | 3732 | int regno = info->first_gp_reg_save; |
979721f8 | 3733 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 3734 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 3735 | |
4697a36c | 3736 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3737 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3738 | } |
3739 | ||
4697a36c MM |
3740 | else if (info->first_gp_reg_save != 32) |
3741 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
3742 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3743 | info->gp_save_offset + sp_offset, |
3744 | reg_names[sp_reg]); | |
9878760c | 3745 | |
b4ac57ab | 3746 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
3747 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
3748 | { | |
3749 | int regno = info->first_fp_reg_save; | |
979721f8 | 3750 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3751 | |
3752 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3753 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 3754 | } |
9878760c | 3755 | |
28edebac RK |
3756 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
3757 | that were used. */ | |
4697a36c MM |
3758 | if (info->cr_save_p) |
3759 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
3760 | (regs_ever_live[70] != 0) * 0x20 |
3761 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 3762 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 3763 | |
979721f8 MM |
3764 | /* If this is V.4, unwind the stack pointer after all of the loads have been done */ |
3765 | if (sp_offset) | |
3766 | { | |
3767 | if (TARGET_NEW_MNEMONICS) | |
3768 | asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset); | |
3769 | else | |
3770 | asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]); | |
3771 | } | |
3772 | else if (sp_reg != 1) | |
3773 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
3774 | ||
b4ac57ab RS |
3775 | /* If we have to restore more than two FP registers, branch to the |
3776 | restore function. It will return to our caller. */ | |
4697a36c MM |
3777 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
3778 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
3779 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 3780 | else |
85638c0d | 3781 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 3782 | } |
b4ac57ab | 3783 | |
9b30bae2 | 3784 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
3785 | on its format. |
3786 | ||
3787 | We don't output a traceback table if -finhibit-size-directive was | |
3788 | used. The documentation for -finhibit-size-directive reads | |
3789 | ``don't output a @code{.size} assembler directive, or anything | |
3790 | else that would cause trouble if the function is split in the | |
3791 | middle, and the two halves are placed at locations far apart in | |
3792 | memory.'' The traceback table has this property, since it | |
3793 | includes the offset from the start of the function to the | |
4d30c363 MM |
3794 | traceback table itself. |
3795 | ||
3796 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
3797 | different traceback table. */ |
3798 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 3799 | { |
314fc5a9 ILT |
3800 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
3801 | int fixed_parms, float_parms, parm_info; | |
3802 | int i; | |
3803 | ||
b6c9286a MM |
3804 | while (*fname == '.') /* V.4 encodes . in the name */ |
3805 | fname++; | |
3806 | ||
314fc5a9 ILT |
3807 | /* Need label immediately before tbtab, so we can compute its offset |
3808 | from the function start. */ | |
3809 | if (*fname == '*') | |
3810 | ++fname; | |
3811 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
3812 | ASM_OUTPUT_LABEL (file, fname); | |
3813 | ||
3814 | /* The .tbtab pseudo-op can only be used for the first eight | |
3815 | expressions, since it can't handle the possibly variable | |
3816 | length fields that follow. However, if you omit the optional | |
3817 | fields, the assembler outputs zeros for all optional fields | |
3818 | anyways, giving each variable length field is minimum length | |
3819 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
3820 | pseudo-op at all. */ | |
3821 | ||
3822 | /* An all-zero word flags the start of the tbtab, for debuggers | |
3823 | that have to find it by searching forward from the entry | |
3824 | point or from the current pc. */ | |
19d2d16f | 3825 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
3826 | |
3827 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 3828 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
3829 | |
3830 | /* Language type. Unfortunately, there doesn't seem to be any | |
3831 | official way to get this info, so we use language_string. C | |
3832 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
3833 | value for C for now. */ | |
3834 | if (! strcmp (language_string, "GNU C") | |
3835 | || ! strcmp (language_string, "GNU Obj-C")) | |
3836 | i = 0; | |
3837 | else if (! strcmp (language_string, "GNU F77")) | |
3838 | i = 1; | |
3839 | else if (! strcmp (language_string, "GNU Ada")) | |
3840 | i = 3; | |
3841 | else if (! strcmp (language_string, "GNU PASCAL")) | |
3842 | i = 2; | |
3843 | else if (! strcmp (language_string, "GNU C++")) | |
3844 | i = 9; | |
3845 | else | |
3846 | abort (); | |
3847 | fprintf (file, "%d,", i); | |
3848 | ||
3849 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
3850 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
3851 | from start of procedure stored in tbtab, internal function, function | |
3852 | has controlled storage, function has no toc, function uses fp, | |
3853 | function logs/aborts fp operations. */ | |
3854 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 3855 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
3856 | |
3857 | /* 6 bitfields: function is interrupt handler, name present in | |
3858 | proc table, function calls alloca, on condition directives | |
3859 | (controls stack walks, 3 bits), saves condition reg, saves | |
3860 | link reg. */ | |
3861 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
3862 | set up as a frame pointer, even when there is no alloca call. */ | |
3863 | fprintf (file, "%d,", | |
3864 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 3865 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
3866 | |
3867 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
3868 | (6 bits). */ | |
3869 | fprintf (file, "%d,", | |
4697a36c | 3870 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
3871 | |
3872 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
3873 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
3874 | ||
3875 | { | |
3876 | /* Compute the parameter info from the function decl argument | |
3877 | list. */ | |
3878 | tree decl; | |
3879 | int next_parm_info_bit; | |
3880 | ||
3881 | next_parm_info_bit = 31; | |
3882 | parm_info = 0; | |
3883 | fixed_parms = 0; | |
3884 | float_parms = 0; | |
3885 | ||
3886 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
3887 | decl; decl = TREE_CHAIN (decl)) | |
3888 | { | |
3889 | rtx parameter = DECL_INCOMING_RTL (decl); | |
3890 | enum machine_mode mode = GET_MODE (parameter); | |
3891 | ||
3892 | if (GET_CODE (parameter) == REG) | |
3893 | { | |
3894 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
3895 | { | |
3896 | int bits; | |
3897 | ||
3898 | float_parms++; | |
3899 | ||
3900 | if (mode == SFmode) | |
3901 | bits = 0x2; | |
3902 | else if (mode == DFmode) | |
3903 | bits = 0x3; | |
3904 | else | |
3905 | abort (); | |
3906 | ||
3907 | /* If only one bit will fit, don't or in this entry. */ | |
3908 | if (next_parm_info_bit > 0) | |
3909 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
3910 | next_parm_info_bit -= 2; | |
3911 | } | |
3912 | else | |
3913 | { | |
3914 | fixed_parms += ((GET_MODE_SIZE (mode) | |
3915 | + (UNITS_PER_WORD - 1)) | |
3916 | / UNITS_PER_WORD); | |
3917 | next_parm_info_bit -= 1; | |
3918 | } | |
3919 | } | |
3920 | } | |
3921 | } | |
3922 | ||
3923 | /* Number of fixed point parameters. */ | |
3924 | /* This is actually the number of words of fixed point parameters; thus | |
3925 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
3926 | fprintf (file, "%d,", fixed_parms); | |
3927 | ||
3928 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
3929 | all on stack. */ | |
3930 | /* This is actually the number of fp registers that hold parameters; | |
3931 | and thus the maximum value is 13. */ | |
3932 | /* Set parameters on stack bit if parameters are not in their original | |
3933 | registers, regardless of whether they are on the stack? Xlc | |
3934 | seems to set the bit when not optimizing. */ | |
3935 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
3936 | ||
3937 | /* Optional fields follow. Some are variable length. */ | |
3938 | ||
3939 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
3940 | 11 double float. */ | |
3941 | /* There is an entry for each parameter in a register, in the order that | |
3942 | they occur in the parameter list. Any intervening arguments on the | |
3943 | stack are ignored. If the list overflows a long (max possible length | |
3944 | 34 bits) then completely leave off all elements that don't fit. */ | |
3945 | /* Only emit this long if there was at least one parameter. */ | |
3946 | if (fixed_parms || float_parms) | |
3947 | fprintf (file, "\t.long %d\n", parm_info); | |
3948 | ||
3949 | /* Offset from start of code to tb table. */ | |
19d2d16f | 3950 | fputs ("\t.long ", file); |
314fc5a9 ILT |
3951 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
3952 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 3953 | fputs ("-.", file); |
314fc5a9 | 3954 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 3955 | putc ('\n', file); |
314fc5a9 ILT |
3956 | |
3957 | /* Interrupt handler mask. */ | |
3958 | /* Omit this long, since we never set the interrupt handler bit | |
3959 | above. */ | |
3960 | ||
3961 | /* Number of CTL (controlled storage) anchors. */ | |
3962 | /* Omit this long, since the has_ctl bit is never set above. */ | |
3963 | ||
3964 | /* Displacement into stack of each CTL anchor. */ | |
3965 | /* Omit this list of longs, because there are no CTL anchors. */ | |
3966 | ||
3967 | /* Length of function name. */ | |
3968 | fprintf (file, "\t.short %d\n", strlen (fname)); | |
3969 | ||
3970 | /* Function name. */ | |
3971 | assemble_string (fname, strlen (fname)); | |
3972 | ||
3973 | /* Register for alloca automatic storage; this is always reg 31. | |
3974 | Only emit this if the alloca bit was set above. */ | |
3975 | if (frame_pointer_needed) | |
19d2d16f | 3976 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 3977 | } |
4697a36c | 3978 | |
b6c9286a MM |
3979 | if (DEFAULT_ABI == ABI_NT) |
3980 | { | |
3981 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3982 | fputs (".e:\nFE_MOT_RESVD..", file); | |
3983 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3984 | fputs (":\n", file); | |
3985 | } | |
9878760c RK |
3986 | } |
3987 | \f | |
3988 | /* Output a TOC entry. We derive the entry name from what is | |
3989 | being written. */ | |
3990 | ||
3991 | void | |
3992 | output_toc (file, x, labelno) | |
3993 | FILE *file; | |
3994 | rtx x; | |
3995 | int labelno; | |
3996 | { | |
3997 | char buf[256]; | |
3998 | char *name = buf; | |
b6c9286a | 3999 | char *real_name; |
9878760c RK |
4000 | rtx base = x; |
4001 | int offset = 0; | |
4002 | ||
4697a36c MM |
4003 | if (TARGET_NO_TOC) |
4004 | abort (); | |
4005 | ||
ff1720ed RK |
4006 | /* if we're going to put a double constant in the TOC, make sure it's |
4007 | aligned properly when strict alignment is on. */ | |
4008 | if (GET_CODE (x) == CONST_DOUBLE | |
4009 | && STRICT_ALIGNMENT | |
4010 | && GET_MODE (x) == DFmode | |
4011 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4012 | ASM_OUTPUT_ALIGN (file, 3); | |
4013 | } | |
4014 | ||
4015 | ||
b6c9286a | 4016 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4017 | { |
4018 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4019 | fprintf (file, "%d = .-", labelno); | |
4020 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4021 | fputs ("1\n", file); |
d14a6d05 MM |
4022 | } |
4023 | else | |
d14a6d05 | 4024 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4025 | |
37c37a57 RK |
4026 | /* Handle FP constants specially. Note that if we have a minimal |
4027 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4028 | FP constants. */ | |
042259f2 | 4029 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4030 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4031 | { |
042259f2 DE |
4032 | REAL_VALUE_TYPE rv; |
4033 | long k[2]; | |
0adc764e | 4034 | |
042259f2 DE |
4035 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4036 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
1875cc88 | 4037 | if (TARGET_MINIMAL_TOC) |
042259f2 | 4038 | fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]); |
1875cc88 | 4039 | else |
0adc764e | 4040 | fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", |
042259f2 | 4041 | k[0], k[1], k[0], k[1]); |
9878760c RK |
4042 | return; |
4043 | } | |
4044 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4045 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4046 | { |
042259f2 DE |
4047 | REAL_VALUE_TYPE rv; |
4048 | long l; | |
9878760c | 4049 | |
042259f2 DE |
4050 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4051 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4052 | ||
4053 | if (TARGET_MINIMAL_TOC) | |
4054 | fprintf (file, "\t.long %d\n", l); | |
4055 | else | |
4056 | fprintf (file, "\t.tc FS_%x[TC],%d\n", l, l); | |
4057 | return; | |
4058 | } | |
4059 | else if (GET_MODE (x) == DImode | |
4060 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4061 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4062 | { | |
4063 | HOST_WIDE_INT low; | |
4064 | HOST_WIDE_INT high; | |
4065 | ||
4066 | if (GET_CODE (x) == CONST_DOUBLE) | |
4067 | { | |
4068 | low = CONST_DOUBLE_LOW (x); | |
4069 | high = CONST_DOUBLE_HIGH (x); | |
4070 | } | |
4071 | else | |
4072 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4073 | { | |
4074 | low = INTVAL (x); | |
4075 | high = (low < 0) ? ~0 : 0; | |
4076 | } | |
4077 | #else | |
4078 | { | |
4079 | low = INTVAL (x) & 0xffffffff; | |
4080 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4081 | } | |
4082 | #endif | |
9878760c | 4083 | |
1875cc88 | 4084 | if (TARGET_MINIMAL_TOC) |
042259f2 | 4085 | fprintf (file, "\t.long %ld\n\t.long %ld\n", high, low); |
1875cc88 | 4086 | else |
042259f2 DE |
4087 | fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", |
4088 | high, low, high, low); | |
9878760c RK |
4089 | return; |
4090 | } | |
4091 | ||
4092 | if (GET_CODE (x) == CONST) | |
4093 | { | |
4094 | base = XEXP (XEXP (x, 0), 0); | |
4095 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4096 | } | |
4097 | ||
4098 | if (GET_CODE (base) == SYMBOL_REF) | |
4099 | name = XSTR (base, 0); | |
4100 | else if (GET_CODE (base) == LABEL_REF) | |
4101 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4102 | else if (GET_CODE (base) == CODE_LABEL) | |
4103 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4104 | else | |
4105 | abort (); | |
4106 | ||
2e4eb9b0 | 4107 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4108 | if (TARGET_MINIMAL_TOC) |
19d2d16f | 4109 | fputs ("\t.long ", file); |
1875cc88 JW |
4110 | else |
4111 | { | |
b6c9286a | 4112 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4113 | |
1875cc88 JW |
4114 | if (offset < 0) |
4115 | fprintf (file, ".N%d", - offset); | |
4116 | else if (offset) | |
4117 | fprintf (file, ".P%d", offset); | |
9878760c | 4118 | |
19d2d16f | 4119 | fputs ("[TC],", file); |
1875cc88 | 4120 | } |
581bc4de MM |
4121 | |
4122 | /* Currently C++ toc references to vtables can be emitted before it | |
4123 | is decided whether the vtable is public or private. If this is | |
4124 | the case, then the linker will eventually complain that there is | |
4125 | a TOC reference to an unknown section. Thus, for vtables only, | |
4126 | we emit the TOC reference to reference the symbol and not the | |
4127 | section. */ | |
3807773b | 4128 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4129 | { |
3807773b | 4130 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4131 | if (offset < 0) |
4132 | fprintf (file, "%d", offset); | |
4133 | else if (offset > 0) | |
4134 | fprintf (file, "+%d", offset); | |
4135 | } | |
4136 | else | |
4137 | output_addr_const (file, x); | |
19d2d16f | 4138 | putc ('\n', file); |
9878760c RK |
4139 | } |
4140 | \f | |
4141 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4142 | starting at P to FILE. | |
4143 | ||
4144 | On the RS/6000, we have to do this using the .byte operation and | |
4145 | write out special characters outside the quoted string. | |
4146 | Also, the assembler is broken; very long strings are truncated, | |
4147 | so we must artificially break them up early. */ | |
4148 | ||
4149 | void | |
4150 | output_ascii (file, p, n) | |
4151 | FILE *file; | |
4152 | char *p; | |
4153 | int n; | |
4154 | { | |
4155 | char c; | |
4156 | int i, count_string; | |
4157 | char *for_string = "\t.byte \""; | |
4158 | char *for_decimal = "\t.byte "; | |
4159 | char *to_close = NULL; | |
4160 | ||
4161 | count_string = 0; | |
4162 | for (i = 0; i < n; i++) | |
4163 | { | |
4164 | c = *p++; | |
4165 | if (c >= ' ' && c < 0177) | |
4166 | { | |
4167 | if (for_string) | |
4168 | fputs (for_string, file); | |
4169 | putc (c, file); | |
4170 | ||
4171 | /* Write two quotes to get one. */ | |
4172 | if (c == '"') | |
4173 | { | |
4174 | putc (c, file); | |
4175 | ++count_string; | |
4176 | } | |
4177 | ||
4178 | for_string = NULL; | |
4179 | for_decimal = "\"\n\t.byte "; | |
4180 | to_close = "\"\n"; | |
4181 | ++count_string; | |
4182 | ||
4183 | if (count_string >= 512) | |
4184 | { | |
4185 | fputs (to_close, file); | |
4186 | ||
4187 | for_string = "\t.byte \""; | |
4188 | for_decimal = "\t.byte "; | |
4189 | to_close = NULL; | |
4190 | count_string = 0; | |
4191 | } | |
4192 | } | |
4193 | else | |
4194 | { | |
4195 | if (for_decimal) | |
4196 | fputs (for_decimal, file); | |
4197 | fprintf (file, "%d", c); | |
4198 | ||
4199 | for_string = "\n\t.byte \""; | |
4200 | for_decimal = ", "; | |
4201 | to_close = "\n"; | |
4202 | count_string = 0; | |
4203 | } | |
4204 | } | |
4205 | ||
4206 | /* Now close the string if we have written one. Then end the line. */ | |
4207 | if (to_close) | |
4208 | fprintf (file, to_close); | |
4209 | } | |
4210 | \f | |
4211 | /* Generate a unique section name for FILENAME for a section type | |
4212 | represented by SECTION_DESC. Output goes into BUF. | |
4213 | ||
4214 | SECTION_DESC can be any string, as long as it is different for each | |
4215 | possible section type. | |
4216 | ||
4217 | We name the section in the same manner as xlc. The name begins with an | |
4218 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
4219 | names) with the last period replaced by the string SECTION_DESC. If |
4220 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
4221 | the name. */ | |
9878760c RK |
4222 | |
4223 | void | |
4224 | rs6000_gen_section_name (buf, filename, section_desc) | |
4225 | char **buf; | |
4226 | char *filename; | |
4227 | char *section_desc; | |
4228 | { | |
11e5fe42 | 4229 | char *q, *after_last_slash, *last_period; |
9878760c RK |
4230 | char *p; |
4231 | int len; | |
9878760c RK |
4232 | |
4233 | after_last_slash = filename; | |
4234 | for (q = filename; *q; q++) | |
11e5fe42 RK |
4235 | { |
4236 | if (*q == '/') | |
4237 | after_last_slash = q + 1; | |
4238 | else if (*q == '.') | |
4239 | last_period = q; | |
4240 | } | |
9878760c | 4241 | |
11e5fe42 | 4242 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
4243 | *buf = (char *) permalloc (len); |
4244 | ||
4245 | p = *buf; | |
4246 | *p++ = '_'; | |
4247 | ||
4248 | for (q = after_last_slash; *q; q++) | |
4249 | { | |
11e5fe42 | 4250 | if (q == last_period) |
9878760c RK |
4251 | { |
4252 | strcpy (p, section_desc); | |
4253 | p += strlen (section_desc); | |
9878760c RK |
4254 | } |
4255 | ||
4256 | else if (isalnum (*q)) | |
4257 | *p++ = *q; | |
4258 | } | |
4259 | ||
11e5fe42 | 4260 | if (last_period == 0) |
9878760c RK |
4261 | strcpy (p, section_desc); |
4262 | else | |
4263 | *p = '\0'; | |
4264 | } | |
e165f3f0 RK |
4265 | \f |
4266 | /* Write function profiler code. */ | |
4267 | ||
4268 | void | |
4269 | output_function_profiler (file, labelno) | |
4270 | FILE *file; | |
4271 | int labelno; | |
4272 | { | |
4273 | /* The last used parameter register. */ | |
4274 | int last_parm_reg; | |
4275 | int i, j; | |
3daf36a4 | 4276 | char buf[100]; |
e165f3f0 | 4277 | |
b6c9286a MM |
4278 | if (DEFAULT_ABI != ABI_AIX) |
4279 | abort (); | |
4280 | ||
e165f3f0 RK |
4281 | /* Set up a TOC entry for the profiler label. */ |
4282 | toc_section (); | |
3daf36a4 ILT |
4283 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); |
4284 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); | |
35fc1624 | 4285 | if (TARGET_MINIMAL_TOC) |
3daf36a4 | 4286 | { |
19d2d16f | 4287 | fputs ("\t.long ", file); |
3daf36a4 | 4288 | assemble_name (file, buf); |
19d2d16f | 4289 | putc ('\n', file); |
3daf36a4 | 4290 | } |
35fc1624 | 4291 | else |
3daf36a4 | 4292 | { |
19d2d16f | 4293 | fputs ("\t.tc\t", file); |
3daf36a4 | 4294 | assemble_name (file, buf); |
19d2d16f | 4295 | fputs ("[TC],", file); |
3daf36a4 | 4296 | assemble_name (file, buf); |
19d2d16f | 4297 | putc ('\n', file); |
3daf36a4 | 4298 | } |
e165f3f0 RK |
4299 | text_section (); |
4300 | ||
4301 | /* Figure out last used parameter register. The proper thing to do is | |
4302 | to walk incoming args of the function. A function might have live | |
4303 | parameter registers even if it has no incoming args. */ | |
4304 | ||
4305 | for (last_parm_reg = 10; | |
4306 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
4307 | last_parm_reg--) | |
4308 | ; | |
4309 | ||
4310 | /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since | |
4311 | it might be set up as the frame pointer. */ | |
4312 | ||
4313 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) | |
19d2d16f | 4314 | asm_fprintf (file, "\tmr %d,%d\n", j, i); |
e165f3f0 RK |
4315 | |
4316 | /* Load location address into r3, and call mcount. */ | |
4317 | ||
3daf36a4 | 4318 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
19d2d16f | 4319 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]); |
3daf36a4 | 4320 | assemble_name (file, buf); |
19d2d16f | 4321 | asm_fprintf (file, "(%s)\n\tbl .mcount\n", reg_names[2]); |
e165f3f0 RK |
4322 | |
4323 | /* Restore parameter registers. */ | |
4324 | ||
4325 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) | |
19d2d16f | 4326 | asm_fprintf (file, "\tmr %d,%d\n", i, j); |
e165f3f0 | 4327 | } |
a251ffd0 TG |
4328 | |
4329 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
4330 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
4331 | ||
4332 | int | |
a06faf84 | 4333 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
4334 | rtx insn; |
4335 | rtx link; | |
4336 | rtx dep_insn; | |
4337 | int cost; | |
4338 | { | |
4339 | if (! recog_memoized (insn)) | |
4340 | return 0; | |
4341 | ||
4342 | if (REG_NOTE_KIND (link) != 0) | |
4343 | return 0; | |
4344 | ||
4345 | if (REG_NOTE_KIND (link) == 0) | |
4346 | { | |
4347 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
4348 | cycles later. */ | |
4349 | ||
4350 | /* Tell the first scheduling pass about the latency between a mtctr | |
4351 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
4352 | know about this latency since the mtctr instruction, which has the | |
4353 | latency associated to it, will be generated by reload. */ | |
4354 | if (get_attr_type (insn) == TYPE_JMPREG) | |
4355 | return TARGET_POWER ? 5 : 4; | |
4356 | ||
4357 | /* Fall out to return default cost. */ | |
4358 | } | |
4359 | ||
4360 | return cost; | |
4361 | } | |
b6c9286a MM |
4362 | |
4363 | /* Return how many instructions the machine can issue per cycle */ | |
4364 | int get_issue_rate() | |
4365 | { | |
4366 | switch (rs6000_cpu_attr) { | |
4367 | case CPU_RIOS1: | |
4368 | return 3; /* ? */ | |
4369 | case CPU_RIOS2: | |
4370 | return 4; | |
4371 | case CPU_PPC601: | |
4372 | return 3; /* ? */ | |
b6c9286a MM |
4373 | case CPU_PPC603: |
4374 | return 2; | |
4375 | case CPU_PPC604: | |
4376 | return 4; | |
4377 | case CPU_PPC620: | |
4378 | return 4; | |
4379 | default: | |
4380 | return 1; | |
4381 | } | |
4382 | } | |
4383 | ||
b6c9286a MM |
4384 | |
4385 | \f | |
4386 | /* Output assembler code for a block containing the constant parts | |
4387 | of a trampoline, leaving space for the variable parts. | |
4388 | ||
4389 | The trampoline should set the static chain pointer to value placed | |
4390 | into the trampoline and should branch to the specified routine. */ | |
4391 | ||
4392 | void | |
4393 | rs6000_trampoline_template (file) | |
4394 | FILE *file; | |
4395 | { | |
4396 | char *sc = reg_names[STATIC_CHAIN_REGNUM]; | |
4397 | char *r0 = reg_names[0]; | |
7c59dc5d | 4398 | char *r2 = reg_names[2]; |
b6c9286a MM |
4399 | |
4400 | switch (DEFAULT_ABI) | |
4401 | { | |
4402 | default: | |
4403 | abort (); | |
4404 | ||
4405 | /* Under AIX, this is not code at all, but merely a data area, | |
4406 | since that is the way all functions are called. The first word is | |
4407 | the address of the function, the second word is the TOC pointer (r2), | |
4408 | and the third word is the static chain value. */ | |
4409 | case ABI_AIX: | |
b6c9286a MM |
4410 | break; |
4411 | ||
4412 | ||
4413 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
4414 | do the full gory code to load up the static chain. */ | |
4415 | case ABI_V4: | |
c81bebd7 | 4416 | case ABI_SOLARIS: |
b6c9286a | 4417 | case ABI_AIX_NODESC: |
b6c9286a MM |
4418 | break; |
4419 | ||
4420 | /* NT function pointers point to a two word area (real address, TOC) | |
4421 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
4422 | use the function field to point to ..LTRAMP1 and the toc field |
4423 | to point to the whole table. */ | |
b6c9286a | 4424 | case ABI_NT: |
7c59dc5d MM |
4425 | if (STATIC_CHAIN_REGNUM == 0 |
4426 | || STATIC_CHAIN_REGNUM == 2 | |
4427 | || TARGET_64BIT | |
4428 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
4429 | abort (); |
4430 | ||
7c59dc5d MM |
4431 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
4432 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
4433 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
4434 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
4435 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 4436 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
4437 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
4438 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
4439 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
4440 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
4441 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
4442 | break; |
4443 | } | |
4444 | ||
4445 | return; | |
4446 | } | |
4447 | ||
4448 | /* Length in units of the trampoline for entering a nested function. */ | |
4449 | ||
4450 | int | |
4451 | rs6000_trampoline_size () | |
4452 | { | |
4453 | int ret = 0; | |
4454 | ||
4455 | switch (DEFAULT_ABI) | |
4456 | { | |
4457 | default: | |
4458 | abort (); | |
4459 | ||
4460 | case ABI_AIX: | |
8f802bfb | 4461 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
4462 | break; |
4463 | ||
4464 | case ABI_V4: | |
c81bebd7 | 4465 | case ABI_SOLARIS: |
b6c9286a | 4466 | case ABI_AIX_NODESC: |
03a7e1a5 | 4467 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
4468 | break; |
4469 | ||
4470 | case ABI_NT: | |
7c59dc5d | 4471 | ret = 20; |
b6c9286a MM |
4472 | break; |
4473 | } | |
4474 | ||
4475 | return ret; | |
4476 | } | |
4477 | ||
4478 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
4479 | FNADDR is an RTX for the address of the function's pure code. | |
4480 | CXT is an RTX for the static chain value for the function. */ | |
4481 | ||
4482 | void | |
4483 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
4484 | rtx addr; | |
4485 | rtx fnaddr; | |
4486 | rtx cxt; | |
4487 | { | |
ac2a93a1 | 4488 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
4489 | int regsize = (TARGET_32BIT) ? 4 : 8; |
4490 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
4491 | |
4492 | switch (DEFAULT_ABI) | |
4493 | { | |
4494 | default: | |
4495 | abort (); | |
4496 | ||
8bd04c56 MM |
4497 | /* Macros to shorten the code expansions below. */ |
4498 | #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr)) | |
7c59dc5d MM |
4499 | #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset))) |
4500 | ||
b6c9286a MM |
4501 | /* Under AIX, just build the 3 word function descriptor */ |
4502 | case ABI_AIX: | |
8bd04c56 MM |
4503 | { |
4504 | rtx fn_reg = gen_reg_rtx (pmode); | |
4505 | rtx toc_reg = gen_reg_rtx (pmode); | |
4506 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4507 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
4508 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
4509 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
4510 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
4511 | } | |
b6c9286a MM |
4512 | break; |
4513 | ||
eaf1bcf1 | 4514 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 4515 | case ABI_V4: |
c81bebd7 | 4516 | case ABI_SOLARIS: |
b6c9286a | 4517 | case ABI_AIX_NODESC: |
eaf1bcf1 MM |
4518 | emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"), |
4519 | FALSE, VOIDmode, 4, | |
4520 | addr, pmode, | |
4521 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
4522 | fnaddr, pmode, | |
4523 | ctx_reg, pmode); | |
b6c9286a MM |
4524 | break; |
4525 | ||
8bd04c56 MM |
4526 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
4527 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 4528 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 4529 | case ABI_NT: |
8bd04c56 MM |
4530 | { |
4531 | rtx tramp_reg = gen_reg_rtx (pmode); | |
4532 | rtx fn_reg = gen_reg_rtx (pmode); | |
4533 | rtx toc_reg = gen_reg_rtx (pmode); | |
4534 | ||
4535 | emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0")); | |
4536 | addr = force_reg (pmode, addr); | |
4537 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4538 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
4539 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
4540 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
4541 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
4542 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
4543 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2)); | |
4544 | } | |
b6c9286a MM |
4545 | break; |
4546 | } | |
4547 | ||
4548 | return; | |
4549 | } | |
7509c759 MM |
4550 | |
4551 | \f | |
4552 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
4553 | with arguments ARGS is a valid machine specific attribute for DECL. | |
4554 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
4555 | ||
4556 | int | |
4557 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
4558 | tree decl; | |
4559 | tree attributes; | |
4560 | tree identifier; | |
4561 | tree args; | |
4562 | { | |
4563 | return 0; | |
4564 | } | |
4565 | ||
4566 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
4567 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
4568 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
4569 | ||
4570 | int | |
4571 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
4572 | tree type; | |
4573 | tree attributes; | |
4574 | tree identifier; | |
4575 | tree args; | |
4576 | { | |
4577 | if (TREE_CODE (type) != FUNCTION_TYPE | |
4578 | && TREE_CODE (type) != FIELD_DECL | |
4579 | && TREE_CODE (type) != TYPE_DECL) | |
4580 | return 0; | |
4581 | ||
6a4cee5f MM |
4582 | /* Longcall attribute says that the function is not within 2**26 bytes |
4583 | of the current function, and to do an indirect call. */ | |
4584 | if (is_attribute_p ("longcall", identifier)) | |
4585 | return (args == NULL_TREE); | |
4586 | ||
7509c759 MM |
4587 | if (DEFAULT_ABI == ABI_NT) |
4588 | { | |
4589 | /* Stdcall attribute says callee is responsible for popping arguments | |
4590 | if they are not variable. */ | |
4591 | if (is_attribute_p ("stdcall", identifier)) | |
4592 | return (args == NULL_TREE); | |
4593 | ||
4594 | /* Cdecl attribute says the callee is a normal C declaration */ | |
4595 | if (is_attribute_p ("cdecl", identifier)) | |
4596 | return (args == NULL_TREE); | |
4597 | ||
4598 | /* Dllimport attribute says says the caller is to call the function | |
4599 | indirectly through a __imp_<name> pointer. */ | |
4600 | if (is_attribute_p ("dllimport", identifier)) | |
4601 | return (args == NULL_TREE); | |
4602 | ||
4603 | /* Dllexport attribute says says the callee is to create a __imp_<name> | |
4604 | pointer. */ | |
4605 | if (is_attribute_p ("dllexport", identifier)) | |
4606 | return (args == NULL_TREE); | |
e56bb9ed MM |
4607 | |
4608 | /* Exception attribute allows the user to specify 1-2 strings or identifiers | |
4609 | that will fill in the 3rd and 4th fields of the structured exception | |
4610 | table. */ | |
4611 | if (is_attribute_p ("exception", identifier)) | |
4612 | { | |
4613 | int i; | |
4614 | ||
4615 | if (args == NULL_TREE) | |
4616 | return 0; | |
4617 | ||
4618 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
4619 | { | |
4620 | tree this_arg = TREE_VALUE (args); | |
4621 | args = TREE_PURPOSE (args); | |
4622 | ||
4623 | if (TREE_CODE (this_arg) != STRING_CST | |
4624 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
4625 | return 0; | |
4626 | } | |
4627 | ||
4628 | return (args == NULL_TREE); | |
4629 | } | |
7509c759 MM |
4630 | } |
4631 | ||
4632 | return 0; | |
4633 | } | |
4634 | ||
4635 | /* If defined, a C expression whose value is zero if the attributes on | |
4636 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
4637 | two if they are nearly compatible (which causes a warning to be | |
4638 | generated). */ | |
4639 | ||
4640 | int | |
4641 | rs6000_comp_type_attributes (type1, type2) | |
4642 | tree type1; | |
4643 | tree type2; | |
4644 | { | |
4645 | return 1; | |
4646 | } | |
4647 | ||
4648 | /* If defined, a C statement that assigns default attributes to newly | |
4649 | defined TYPE. */ | |
4650 | ||
4651 | void | |
4652 | rs6000_set_default_type_attributes (type) | |
4653 | tree type; | |
4654 | { | |
4655 | } | |
4656 | ||
4657 | /* Return a dll import reference corresponding to to a call's SYMBOL_REF */ | |
4658 | struct rtx_def * | |
4659 | rs6000_dll_import_ref (call_ref) | |
4660 | rtx call_ref; | |
4661 | { | |
4662 | char *call_name; | |
4663 | int len; | |
4664 | char *p; | |
4665 | rtx reg1, reg2; | |
4666 | tree node; | |
4667 | ||
4668 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
4669 | abort (); | |
4670 | ||
4671 | call_name = XSTR (call_ref, 0); | |
4672 | len = sizeof ("__imp_") + strlen (call_name); | |
4673 | p = alloca (len); | |
4674 | reg2 = gen_reg_rtx (Pmode); | |
4675 | ||
4676 | strcpy (p, "__imp_"); | |
4677 | strcat (p, call_name); | |
4678 | node = get_identifier (p); | |
4679 | ||
4680 | reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node))); | |
4681 | emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1)); | |
4682 | ||
4683 | return reg2; | |
4684 | } | |
4685 | ||
6a4cee5f MM |
4686 | /* Return a reference suitable for calling a function with the longcall attribute. */ |
4687 | struct rtx_def * | |
4688 | rs6000_longcall_ref (call_ref) | |
4689 | rtx call_ref; | |
4690 | { | |
4691 | char *call_name; | |
4692 | int len; | |
4693 | char *p; | |
4694 | rtx reg1, reg2; | |
4695 | tree node; | |
4696 | ||
4697 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
4698 | return call_ref; | |
4699 | ||
4700 | /* System V adds '.' to the internal name, so skip them. */ | |
4701 | call_name = XSTR (call_ref, 0); | |
4702 | if (*call_name == '.') | |
4703 | { | |
4704 | while (*call_name == '.') | |
4705 | call_name++; | |
4706 | ||
4707 | node = get_identifier (call_name); | |
4708 | call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)); | |
4709 | } | |
4710 | ||
4711 | return force_reg (Pmode, call_ref); | |
4712 | } | |
4713 | ||
7509c759 MM |
4714 | \f |
4715 | /* A C statement or statements to switch to the appropriate section | |
4716 | for output of RTX in mode MODE. You can assume that RTX is some | |
4717 | kind of constant in RTL. The argument MODE is redundant except in | |
4718 | the case of a `const_int' rtx. Select the section by calling | |
4719 | `text_section' or one of the alternatives for other sections. | |
4720 | ||
4721 | Do not define this macro if you put all constants in the read-only | |
4722 | data section. */ | |
4723 | ||
4724 | #ifdef USING_SVR4_H | |
4725 | ||
4726 | void | |
4727 | rs6000_select_rtx_section (mode, x) | |
4728 | enum machine_mode mode; | |
4729 | rtx x; | |
4730 | { | |
4731 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
4732 | toc_section (); | |
7509c759 MM |
4733 | else |
4734 | const_section (); | |
4735 | } | |
4736 | ||
4737 | /* A C statement or statements to switch to the appropriate | |
4738 | section for output of DECL. DECL is either a `VAR_DECL' node | |
4739 | or a constant of some sort. RELOC indicates whether forming | |
4740 | the initial value of DECL requires link-time relocations. */ | |
4741 | ||
4742 | void | |
4743 | rs6000_select_section (decl, reloc) | |
4744 | tree decl; | |
4745 | int reloc; | |
4746 | { | |
4747 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
4748 | ||
4749 | if (TREE_CODE (decl) == STRING_CST) | |
4750 | { | |
88228c4b | 4751 | if (! flag_writable_strings) |
7509c759 | 4752 | const_section (); |
7509c759 MM |
4753 | else |
4754 | data_section (); | |
4755 | } | |
4756 | else if (TREE_CODE (decl) == VAR_DECL) | |
4757 | { | |
4758 | if ((flag_pic && reloc) | |
4759 | || !TREE_READONLY (decl) | |
4760 | || TREE_SIDE_EFFECTS (decl) | |
4761 | || !DECL_INITIAL (decl) | |
4762 | || (DECL_INITIAL (decl) != error_mark_node | |
4763 | && !TREE_CONSTANT (DECL_INITIAL (decl)))) | |
4764 | { | |
d9407988 | 4765 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
7509c759 MM |
4766 | sdata_section (); |
4767 | else | |
4768 | data_section (); | |
4769 | } | |
4770 | else | |
4771 | { | |
d9407988 | 4772 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
c81bebd7 | 4773 | { |
d9407988 | 4774 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
4775 | sdata2_section (); |
4776 | else | |
4777 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ | |
4778 | } | |
7509c759 MM |
4779 | else |
4780 | const_section (); | |
4781 | } | |
4782 | } | |
4783 | else | |
4784 | const_section (); | |
4785 | } | |
d9407988 MM |
4786 | |
4787 | \f | |
4788 | ||
4789 | /* If we are referencing a function that is static or is known to be | |
4790 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
4791 | that we can branch to this function without emitting a no-op after the | |
4792 | call. For real AIX and NT calling sequences, we also replace the | |
4793 | function name with the real name (1 or 2 leading .'s), rather than | |
4794 | the function descriptor name. This saves a lot of overriding code | |
4795 | to readd the prefixes. */ | |
4796 | ||
4797 | void | |
4798 | rs6000_encode_section_info (decl) | |
4799 | tree decl; | |
4800 | { | |
4801 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
4802 | { | |
4803 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
4804 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
4805 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
4806 | ||
4807 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
4808 | { | |
4809 | char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; | |
4810 | char *str = permalloc (strlen (prefix) + 1 | |
4811 | + strlen (XSTR (sym_ref, 0))); | |
4812 | strcpy (str, prefix); | |
4813 | strcat (str, XSTR (sym_ref, 0)); | |
4814 | XSTR (sym_ref, 0) = str; | |
4815 | } | |
4816 | } | |
4817 | else if (rs6000_sdata != SDATA_NONE | |
4818 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
4819 | && TREE_CODE (decl) == VAR_DECL) | |
4820 | { | |
4821 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
4822 | tree section_name = DECL_SECTION_NAME (decl); | |
4823 | char *name = (char *)0; | |
4824 | int len = 0; | |
4825 | ||
4826 | if (section_name) | |
4827 | { | |
4828 | if (TREE_CODE (section_name) == STRING_CST) | |
4829 | { | |
4830 | name = TREE_STRING_POINTER (section_name); | |
4831 | len = TREE_STRING_LENGTH (section_name); | |
4832 | } | |
4833 | else | |
4834 | abort (); | |
4835 | } | |
4836 | ||
4837 | if ((size > 0 && size <= g_switch_value) | |
4838 | || (name | |
4839 | && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) | |
4840 | || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) | |
4841 | || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) | |
4842 | || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) | |
4843 | || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
4844 | || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
4845 | { | |
4846 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
4847 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
4848 | strcpy (str, "@"); | |
4849 | strcat (str, XSTR (sym_ref, 0)); | |
4850 | XSTR (sym_ref, 0) = str; | |
4851 | } | |
4852 | } | |
4853 | } | |
4854 | ||
7509c759 | 4855 | #endif /* USING_SVR4_H */ |