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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
11e5fe42 | 2 | Copyright (C) 1991, 1993 Free Software Foundation, Inc. |
9878760c RK |
3 | Contributed by Richard Kenner (kenner@nyu.edu) |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
20 | ||
21 | #include <stdio.h> | |
22 | #include "config.h" | |
23 | #include "rtl.h" | |
24 | #include "regs.h" | |
25 | #include "hard-reg-set.h" | |
26 | #include "real.h" | |
27 | #include "insn-config.h" | |
28 | #include "conditions.h" | |
29 | #include "insn-flags.h" | |
30 | #include "output.h" | |
31 | #include "insn-attr.h" | |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
34 | #include "expr.h" | |
35 | #include "obstack.h" | |
9b30bae2 JW |
36 | #include "tree.h" |
37 | ||
38 | extern char *language_string; | |
5248c961 | 39 | extern int profile_block_flag; |
9878760c RK |
40 | |
41 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
42 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
43 | ||
5248c961 RK |
44 | /* Target cpu type */ |
45 | ||
46 | enum processor_type rs6000_cpu; | |
47 | char *rs6000_cpu_string; | |
48 | ||
9878760c RK |
49 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
50 | uitrunc must be defined. */ | |
51 | ||
52 | int rs6000_trunc_used; | |
53 | ||
54 | /* Set to non-zero once they have been defined. */ | |
55 | ||
56 | static int trunc_defined; | |
57 | ||
58 | /* Save information from a "cmpxx" operation until the branch or scc is | |
59 | emitted. */ | |
60 | ||
61 | rtx rs6000_compare_op0, rs6000_compare_op1; | |
62 | int rs6000_compare_fp_p; | |
63 | \f | |
5248c961 RK |
64 | /* Override command line options. Mostly we process the processor |
65 | type and sometimes adjust other TARGET_ options. */ | |
66 | ||
67 | void | |
68 | rs6000_override_options () | |
69 | { | |
70 | int i; | |
71 | ||
85638c0d RK |
72 | /* Simplify the entries below by making a mask for any POWER |
73 | variant and any PowerPC variant. */ | |
74 | ||
75 | #define POWER_MASKS (MASK_POWER | MASK_POWER2) | |
76 | #define POWERPC_MASKS (MASK_POWERPC | MASK_POWERPCSQR | MASK_POWERPC64) | |
77 | ||
5248c961 RK |
78 | static struct ptt |
79 | { | |
80 | char *name; /* Canonical processor name. */ | |
81 | enum processor_type processor; /* Processor type enum value. */ | |
82 | int target_enable; /* Target flags to enable. */ | |
83 | int target_disable; /* Target flags to disable. */ | |
84 | } processor_target_table[] | |
85638c0d RK |
85 | = {{"all", PROCESSOR_DEFAULT, 0, POWER_MASKS | POWERPC_MASKS}, |
86 | {"rios", PROCESSOR_RIOS1, MASK_POWER, MASK_POWER2 | POWERPC_MASKS}, | |
87 | {"rios1", PROCESSOR_RIOS1, MASK_POWER, MASK_POWER2 | POWERPC_MASKS}, | |
33898315 RK |
88 | {"rsc", PROCESSOR_PPC601, MASK_POWER, MASK_POWER2 | POWERPC_MASKS}, |
89 | {"rsc1", PROCESSOR_PPC601, MASK_POWER, MASK_POWER2 | POWERPC_MASKS}, | |
85638c0d | 90 | {"rios2", PROCESSOR_RIOS2, MASK_POWER | MASK_POWER2 , POWERPC_MASKS}, |
5248c961 | 91 | {"601", PROCESSOR_PPC601, |
85638c0d RK |
92 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, |
93 | MASK_POWER2 | MASK_POWERPCSQR | MASK_POWERPC64}, | |
49947f18 | 94 | {"mpc601", PROCESSOR_PPC601, |
85638c0d RK |
95 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, |
96 | MASK_POWER2 | MASK_POWERPCSQR | MASK_POWERPC64}, | |
97 | {"ppc601", PROCESSOR_PPC601, | |
98 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
99 | MASK_POWER2 | MASK_POWERPCSQR | MASK_POWERPC64}, | |
5248c961 | 100 | {"603", PROCESSOR_PPC603, |
85638c0d RK |
101 | MASK_POWERPC | MASK_POWERPCSQR | MASK_NEW_MNEMONICS, |
102 | POWER_MASKS | MASK_POWERPC64}, | |
49947f18 | 103 | {"mpc603", PROCESSOR_PPC603, |
85638c0d RK |
104 | MASK_POWERPC | MASK_POWERPCSQR | MASK_NEW_MNEMONICS, |
105 | POWER_MASKS | MASK_POWERPC64}, | |
106 | {"ppc603", PROCESSOR_PPC603, | |
107 | MASK_POWERPC | MASK_POWERPCSQR | MASK_NEW_MNEMONICS, | |
108 | POWER_MASKS | MASK_POWERPC64}, | |
5248c961 | 109 | {"604", PROCESSOR_PPC604, |
85638c0d RK |
110 | MASK_POWERPC | MASK_POWERPCSQR | MASK_NEW_MNEMONICS, |
111 | POWER_MASKS | MASK_POWERPC64}, | |
49947f18 | 112 | {"mpc604", PROCESSOR_PPC604, |
85638c0d RK |
113 | MASK_POWERPC | MASK_POWERPCSQR | MASK_NEW_MNEMONICS, |
114 | POWER_MASKS | MASK_POWERPC64}, | |
115 | {"ppc604", PROCESSOR_PPC604, | |
116 | MASK_POWERPC | MASK_POWERPCSQR | MASK_NEW_MNEMONICS, | |
117 | POWER_MASKS | MASK_POWERPC64}, | |
5248c961 | 118 | {"620", PROCESSOR_PPC620, |
85638c0d RK |
119 | (MASK_POWERPC | MASK_POWERPCSQR | MASK_POWERPC64 |
120 | | MASK_NEW_MNEMONICS), | |
121 | POWER_MASKS}, | |
49947f18 | 122 | {"mpc620", PROCESSOR_PPC620, |
85638c0d RK |
123 | (MASK_POWERPC | MASK_POWERPCSQR | MASK_POWERPC64 |
124 | | MASK_NEW_MNEMONICS), | |
125 | POWER_MASKS}, | |
126 | {"ppc620", PROCESSOR_PPC620, | |
127 | (MASK_POWERPC | MASK_POWERPCSQR | MASK_POWERPC64 | |
128 | | MASK_NEW_MNEMONICS), | |
129 | POWER_MASKS}}; | |
5248c961 RK |
130 | |
131 | int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); | |
132 | ||
133 | profile_block_flag = 0; | |
134 | ||
135 | /* Identify the processor type */ | |
136 | if (rs6000_cpu_string == 0) | |
137 | rs6000_cpu = PROCESSOR_DEFAULT; | |
138 | else | |
139 | { | |
140 | for (i = 0; i < ptt_size; i++) | |
141 | if (! strcmp (rs6000_cpu_string, processor_target_table[i].name)) | |
142 | { | |
143 | rs6000_cpu = processor_target_table[i].processor; | |
144 | target_flags |= processor_target_table[i].target_enable; | |
145 | target_flags &= ~processor_target_table[i].target_disable; | |
146 | break; | |
147 | } | |
148 | ||
149 | if (i == ptt_size) | |
150 | { | |
151 | error ("bad value (%s) for -mcpu= switch", rs6000_cpu_string); | |
152 | rs6000_cpu_string = "default"; | |
153 | rs6000_cpu = PROCESSOR_DEFAULT; | |
154 | } | |
155 | } | |
156 | } | |
157 | \f | |
9878760c RK |
158 | /* Return non-zero if this function is known to have a null epilogue. */ |
159 | ||
160 | int | |
161 | direct_return () | |
162 | { | |
163 | return (reload_completed | |
164 | && first_reg_to_save () == 32 | |
165 | && first_fp_reg_to_save () == 64 | |
166 | && ! regs_ever_live[65] | |
167 | && ! rs6000_pushes_stack ()); | |
168 | } | |
169 | ||
170 | /* Returns 1 always. */ | |
171 | ||
172 | int | |
173 | any_operand (op, mode) | |
174 | register rtx op; | |
175 | enum machine_mode mode; | |
176 | { | |
177 | return 1; | |
178 | } | |
179 | ||
180 | /* Return 1 if OP is a constant that can fit in a D field. */ | |
181 | ||
182 | int | |
183 | short_cint_operand (op, mode) | |
184 | register rtx op; | |
185 | enum machine_mode mode; | |
186 | { | |
187 | return (GET_CODE (op) == CONST_INT | |
188 | && (unsigned) (INTVAL (op) + 0x8000) < 0x10000); | |
189 | } | |
190 | ||
191 | /* Similar for a unsigned D field. */ | |
192 | ||
193 | int | |
194 | u_short_cint_operand (op, mode) | |
195 | register rtx op; | |
196 | enum machine_mode mode; | |
197 | { | |
198 | return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0); | |
199 | } | |
200 | ||
dcfedcd0 RK |
201 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
202 | ||
203 | int | |
204 | non_short_cint_operand (op, mode) | |
205 | register rtx op; | |
206 | enum machine_mode mode; | |
207 | { | |
208 | return (GET_CODE (op) == CONST_INT | |
209 | && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000); | |
210 | } | |
211 | ||
9878760c RK |
212 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
213 | ctr, or lr). */ | |
214 | ||
215 | int | |
cd2b37d9 | 216 | gpc_reg_operand (op, mode) |
9878760c RK |
217 | register rtx op; |
218 | enum machine_mode mode; | |
219 | { | |
220 | return (register_operand (op, mode) | |
221 | && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64)); | |
222 | } | |
223 | ||
224 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
225 | CR field. */ | |
226 | ||
227 | int | |
228 | cc_reg_operand (op, mode) | |
229 | register rtx op; | |
230 | enum machine_mode mode; | |
231 | { | |
232 | return (register_operand (op, mode) | |
233 | && (GET_CODE (op) != REG | |
234 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
235 | || CR_REGNO_P (REGNO (op)))); | |
236 | } | |
237 | ||
238 | /* Returns 1 if OP is either a constant integer valid for a D-field or a | |
239 | non-special register. If a register, it must be in the proper mode unless | |
240 | MODE is VOIDmode. */ | |
241 | ||
242 | int | |
243 | reg_or_short_operand (op, mode) | |
244 | register rtx op; | |
245 | enum machine_mode mode; | |
246 | { | |
f5a28898 | 247 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
248 | } |
249 | ||
250 | /* Similar, except check if the negation of the constant would be valid for | |
251 | a D-field. */ | |
252 | ||
253 | int | |
254 | reg_or_neg_short_operand (op, mode) | |
255 | register rtx op; | |
256 | enum machine_mode mode; | |
257 | { | |
258 | if (GET_CODE (op) == CONST_INT) | |
259 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
260 | ||
cd2b37d9 | 261 | return gpc_reg_operand (op, mode); |
9878760c RK |
262 | } |
263 | ||
264 | /* Return 1 if the operand is either a register or an integer whose high-order | |
265 | 16 bits are zero. */ | |
266 | ||
267 | int | |
268 | reg_or_u_short_operand (op, mode) | |
269 | register rtx op; | |
270 | enum machine_mode mode; | |
271 | { | |
272 | if (GET_CODE (op) == CONST_INT | |
273 | && (INTVAL (op) & 0xffff0000) == 0) | |
274 | return 1; | |
275 | ||
cd2b37d9 | 276 | return gpc_reg_operand (op, mode); |
9878760c RK |
277 | } |
278 | ||
279 | /* Return 1 is the operand is either a non-special register or ANY | |
280 | constant integer. */ | |
281 | ||
282 | int | |
283 | reg_or_cint_operand (op, mode) | |
284 | register rtx op; | |
285 | enum machine_mode mode; | |
286 | { | |
cd2b37d9 | 287 | return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode); |
9878760c RK |
288 | } |
289 | ||
290 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a | |
291 | register with one instruction per word. For SFmode, this means that | |
292 | the low 16-bits are zero. For DFmode, it means the low 16-bits of | |
293 | the first word are zero and the high 16 bits of the second word | |
294 | are zero (usually all bits in the low-order word will be zero). | |
295 | ||
296 | We only do this if we can safely read CONST_DOUBLE_{LOW,HIGH}. */ | |
297 | ||
298 | int | |
299 | easy_fp_constant (op, mode) | |
300 | register rtx op; | |
301 | register enum machine_mode mode; | |
302 | { | |
303 | rtx low, high; | |
304 | ||
305 | if (GET_CODE (op) != CONST_DOUBLE | |
306 | || GET_MODE (op) != mode | |
307 | || GET_MODE_CLASS (mode) != MODE_FLOAT) | |
308 | return 0; | |
309 | ||
310 | high = operand_subword (op, 0, 0, mode); | |
311 | low = operand_subword (op, 1, 0, mode); | |
312 | ||
313 | if (high == 0 || GET_CODE (high) != CONST_INT || (INTVAL (high) & 0xffff)) | |
314 | return 0; | |
315 | ||
316 | return (mode == SFmode | |
317 | || (low != 0 && GET_CODE (low) == CONST_INT | |
318 | && (INTVAL (low) & 0xffff0000) == 0)); | |
319 | } | |
320 | ||
321 | /* Return 1 if the operand is either a floating-point register, a pseudo | |
322 | register, or memory. */ | |
323 | ||
324 | int | |
325 | fp_reg_or_mem_operand (op, mode) | |
326 | register rtx op; | |
327 | enum machine_mode mode; | |
328 | { | |
329 | return (memory_operand (op, mode) | |
330 | || (register_operand (op, mode) | |
331 | && (GET_CODE (op) != REG | |
332 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
333 | || FP_REGNO_P (REGNO (op))))); | |
334 | } | |
335 | ||
336 | /* Return 1 if the operand is either an easy FP constant (see above) or | |
337 | memory. */ | |
338 | ||
339 | int | |
340 | mem_or_easy_const_operand (op, mode) | |
341 | register rtx op; | |
342 | enum machine_mode mode; | |
343 | { | |
344 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
345 | } | |
346 | ||
347 | /* Return 1 if the operand is either a non-special register or an item | |
348 | that can be used as the operand of an SI add insn. */ | |
349 | ||
350 | int | |
351 | add_operand (op, mode) | |
352 | register rtx op; | |
353 | enum machine_mode mode; | |
354 | { | |
355 | return (reg_or_short_operand (op, mode) | |
356 | || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); | |
357 | } | |
358 | ||
dcfedcd0 RK |
359 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
360 | ||
361 | int | |
362 | non_add_cint_operand (op, mode) | |
363 | register rtx op; | |
364 | enum machine_mode mode; | |
365 | { | |
366 | return (GET_CODE (op) == CONST_INT | |
367 | && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000 | |
368 | && (INTVAL (op) & 0xffff) != 0); | |
369 | } | |
370 | ||
9878760c RK |
371 | /* Return 1 if the operand is a non-special register or a constant that |
372 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
373 | ||
374 | int | |
375 | logical_operand (op, mode) | |
376 | register rtx op; | |
377 | enum machine_mode mode; | |
378 | { | |
cd2b37d9 | 379 | return (gpc_reg_operand (op, mode) |
9878760c RK |
380 | || (GET_CODE (op) == CONST_INT |
381 | && ((INTVAL (op) & 0xffff0000) == 0 | |
382 | || (INTVAL (op) & 0xffff) == 0))); | |
383 | } | |
384 | ||
dcfedcd0 RK |
385 | /* Return 1 if C is a constant that is not a logical operand (as |
386 | above). */ | |
387 | ||
388 | int | |
389 | non_logical_cint_operand (op, mode) | |
390 | register rtx op; | |
391 | enum machine_mode mode; | |
392 | { | |
393 | return (GET_CODE (op) == CONST_INT | |
394 | && (INTVAL (op) & 0xffff0000) != 0 | |
395 | && (INTVAL (op) & 0xffff) != 0); | |
396 | } | |
397 | ||
9878760c RK |
398 | /* Return 1 if C is a constant that can be encoded in a mask on the |
399 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. | |
400 | Reject all ones and all zeros, since these should have been optimized | |
401 | away and confuse the making of MB and ME. */ | |
402 | ||
403 | int | |
404 | mask_constant (c) | |
405 | register int c; | |
406 | { | |
407 | int i; | |
408 | int last_bit_value; | |
409 | int transitions = 0; | |
410 | ||
411 | if (c == 0 || c == ~0) | |
412 | return 0; | |
413 | ||
414 | last_bit_value = c & 1; | |
415 | ||
416 | for (i = 1; i < 32; i++) | |
417 | if (((c >>= 1) & 1) != last_bit_value) | |
418 | last_bit_value ^= 1, transitions++; | |
419 | ||
420 | return transitions <= 2; | |
421 | } | |
422 | ||
423 | /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ | |
424 | ||
425 | int | |
426 | mask_operand (op, mode) | |
427 | register rtx op; | |
428 | enum machine_mode mode; | |
429 | { | |
430 | return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); | |
431 | } | |
432 | ||
433 | /* Return 1 if the operand is either a non-special register or a | |
434 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
435 | ||
436 | int | |
437 | and_operand (op, mode) | |
438 | register rtx op; | |
439 | enum machine_mode mode; | |
440 | { | |
441 | return (reg_or_short_operand (op, mode) | |
442 | || logical_operand (op, mode) | |
443 | || mask_operand (op, mode)); | |
444 | } | |
445 | ||
dcfedcd0 RK |
446 | /* Return 1 if the operand is a constant but not a valid operand for an AND |
447 | insn. */ | |
448 | ||
449 | int | |
450 | non_and_cint_operand (op, mode) | |
451 | register rtx op; | |
452 | enum machine_mode mode; | |
453 | { | |
454 | return GET_CODE (op) == CONST_INT && ! and_operand (op, mode); | |
455 | } | |
456 | ||
9878760c RK |
457 | /* Return 1 if the operand is a general register or memory operand. */ |
458 | ||
459 | int | |
460 | reg_or_mem_operand (op, mode) | |
461 | register rtx op; | |
462 | register enum machine_mode mode; | |
463 | { | |
cd2b37d9 | 464 | return gpc_reg_operand (op, mode) || memory_operand (op, mode); |
9878760c RK |
465 | } |
466 | ||
467 | /* Return 1 if the operand, used inside a MEM, is a valid first argument | |
468 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
469 | forced to lr. */ | |
470 | ||
471 | int | |
472 | call_operand (op, mode) | |
473 | register rtx op; | |
474 | enum machine_mode mode; | |
475 | { | |
476 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
477 | return 0; | |
478 | ||
479 | return (GET_CODE (op) == SYMBOL_REF | |
480 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
481 | } | |
482 | ||
2af3d377 RK |
483 | |
484 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
485 | this file. */ | |
486 | ||
487 | int | |
488 | current_file_function_operand (op, mode) | |
489 | register rtx op; | |
490 | enum machine_mode mode; | |
491 | { | |
492 | return (GET_CODE (op) == SYMBOL_REF | |
493 | && (SYMBOL_REF_FLAG (op) | |
494 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
495 | } | |
496 | ||
497 | ||
9878760c RK |
498 | /* Return 1 if this operand is a valid input for a move insn. */ |
499 | ||
500 | int | |
501 | input_operand (op, mode) | |
502 | register rtx op; | |
503 | enum machine_mode mode; | |
504 | { | |
eb4e8003 | 505 | /* Memory is always valid. */ |
9878760c RK |
506 | if (memory_operand (op, mode)) |
507 | return 1; | |
508 | ||
eb4e8003 RK |
509 | /* For floating-point, easy constants are valid. */ |
510 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
511 | && CONSTANT_P (op) | |
512 | && easy_fp_constant (op, mode)) | |
513 | return 1; | |
514 | ||
515 | /* For floating-point or multi-word mode, the only remaining valid type | |
516 | is a register. */ | |
9878760c RK |
517 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
518 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 519 | return register_operand (op, mode); |
9878760c | 520 | |
88fe15a1 RK |
521 | /* The only cases left are integral modes one word or smaller (we |
522 | do not get called for MODE_CC values). These can be in any | |
523 | register. */ | |
524 | if (register_operand (op, mode)) | |
a8b3aeda | 525 | return 1; |
88fe15a1 RK |
526 | |
527 | /* For HImode and QImode, any constant is valid. */ | |
528 | if ((mode == HImode || mode == QImode) | |
529 | && GET_CODE (op) == CONST_INT) | |
9878760c RK |
530 | return 1; |
531 | ||
9878760c RK |
532 | /* Otherwise, we will be doing this SET with an add, so anything valid |
533 | for an add will be valid. */ | |
534 | return add_operand (op, mode); | |
535 | } | |
536 | \f | |
537 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
538 | PARALLEL and the first section will be tested. */ | |
539 | ||
540 | int | |
541 | load_multiple_operation (op, mode) | |
542 | rtx op; | |
543 | enum machine_mode mode; | |
544 | { | |
545 | int count = XVECLEN (op, 0); | |
546 | int dest_regno; | |
547 | rtx src_addr; | |
548 | int i; | |
549 | ||
550 | /* Perform a quick check so we don't blow up below. */ | |
551 | if (count <= 1 | |
552 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
553 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
554 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
555 | return 0; | |
556 | ||
557 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
558 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
559 | ||
560 | for (i = 1; i < count; i++) | |
561 | { | |
562 | rtx elt = XVECEXP (op, 0, i); | |
563 | ||
564 | if (GET_CODE (elt) != SET | |
565 | || GET_CODE (SET_DEST (elt)) != REG | |
566 | || GET_MODE (SET_DEST (elt)) != SImode | |
567 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
568 | || GET_CODE (SET_SRC (elt)) != MEM | |
569 | || GET_MODE (SET_SRC (elt)) != SImode | |
570 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
571 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
572 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
573 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
574 | return 0; | |
575 | } | |
576 | ||
577 | return 1; | |
578 | } | |
579 | ||
580 | /* Similar, but tests for store multiple. Here, the second vector element | |
581 | is a CLOBBER. It will be tested later. */ | |
582 | ||
583 | int | |
584 | store_multiple_operation (op, mode) | |
585 | rtx op; | |
586 | enum machine_mode mode; | |
587 | { | |
588 | int count = XVECLEN (op, 0) - 1; | |
589 | int src_regno; | |
590 | rtx dest_addr; | |
591 | int i; | |
592 | ||
593 | /* Perform a quick check so we don't blow up below. */ | |
594 | if (count <= 1 | |
595 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
596 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
597 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
598 | return 0; | |
599 | ||
600 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
601 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
602 | ||
603 | for (i = 1; i < count; i++) | |
604 | { | |
605 | rtx elt = XVECEXP (op, 0, i + 1); | |
606 | ||
607 | if (GET_CODE (elt) != SET | |
608 | || GET_CODE (SET_SRC (elt)) != REG | |
609 | || GET_MODE (SET_SRC (elt)) != SImode | |
610 | || REGNO (SET_SRC (elt)) != src_regno + i | |
611 | || GET_CODE (SET_DEST (elt)) != MEM | |
612 | || GET_MODE (SET_DEST (elt)) != SImode | |
613 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
614 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
615 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
616 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
617 | return 0; | |
618 | } | |
619 | ||
620 | return 1; | |
621 | } | |
622 | \f | |
623 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
624 | We only check the opcode against the mode of the CC value here. */ | |
625 | ||
626 | int | |
627 | branch_comparison_operator (op, mode) | |
628 | register rtx op; | |
629 | enum machine_mode mode; | |
630 | { | |
631 | enum rtx_code code = GET_CODE (op); | |
632 | enum machine_mode cc_mode; | |
633 | ||
634 | if (GET_RTX_CLASS (code) != '<') | |
635 | return 0; | |
636 | ||
637 | cc_mode = GET_MODE (XEXP (op, 0)); | |
638 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
639 | return 0; | |
640 | ||
641 | if ((code == GT || code == LT || code == GE || code == LE) | |
642 | && cc_mode == CCUNSmode) | |
643 | return 0; | |
644 | ||
645 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
646 | && (cc_mode != CCUNSmode)) | |
647 | return 0; | |
648 | ||
649 | return 1; | |
650 | } | |
651 | ||
652 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
653 | We check the opcode against the mode of the CC value and disallow EQ or | |
654 | NE comparisons for integers. */ | |
655 | ||
656 | int | |
657 | scc_comparison_operator (op, mode) | |
658 | register rtx op; | |
659 | enum machine_mode mode; | |
660 | { | |
661 | enum rtx_code code = GET_CODE (op); | |
662 | enum machine_mode cc_mode; | |
663 | ||
664 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
665 | return 0; | |
666 | ||
667 | if (GET_RTX_CLASS (code) != '<') | |
668 | return 0; | |
669 | ||
670 | cc_mode = GET_MODE (XEXP (op, 0)); | |
671 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
672 | return 0; | |
673 | ||
674 | if (code == NE && cc_mode != CCFPmode) | |
675 | return 0; | |
676 | ||
677 | if ((code == GT || code == LT || code == GE || code == LE) | |
678 | && cc_mode == CCUNSmode) | |
679 | return 0; | |
680 | ||
681 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
682 | && (cc_mode != CCUNSmode)) | |
683 | return 0; | |
684 | ||
c5defebb RK |
685 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
686 | return 0; | |
687 | ||
9878760c RK |
688 | return 1; |
689 | } | |
690 | \f | |
691 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
692 | mask required to convert the result of a rotate insn into a shift | |
693 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
694 | ||
695 | int | |
696 | includes_lshift_p (shiftop, andop) | |
697 | register rtx shiftop; | |
698 | register rtx andop; | |
699 | { | |
700 | int shift_mask = (~0 << INTVAL (shiftop)); | |
701 | ||
702 | return (INTVAL (andop) & ~shift_mask) == 0; | |
703 | } | |
704 | ||
705 | /* Similar, but for right shift. */ | |
706 | ||
707 | int | |
708 | includes_rshift_p (shiftop, andop) | |
709 | register rtx shiftop; | |
710 | register rtx andop; | |
711 | { | |
712 | unsigned shift_mask = ~0; | |
713 | ||
714 | shift_mask >>= INTVAL (shiftop); | |
715 | ||
716 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
717 | } | |
718 | \f | |
719 | /* Return the register class of a scratch register needed to copy IN into | |
720 | or out of a register in CLASS in MODE. If it can be done directly, | |
721 | NO_REGS is returned. */ | |
722 | ||
723 | enum reg_class | |
724 | secondary_reload_class (class, mode, in) | |
725 | enum reg_class class; | |
726 | enum machine_mode mode; | |
727 | rtx in; | |
728 | { | |
729 | int regno = true_regnum (in); | |
730 | ||
731 | if (regno >= FIRST_PSEUDO_REGISTER) | |
732 | regno = -1; | |
733 | ||
734 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS | |
735 | into anything. */ | |
736 | if (class == GENERAL_REGS || class == BASE_REGS | |
737 | || (regno >= 0 && INT_REGNO_P (regno))) | |
738 | return NO_REGS; | |
739 | ||
740 | /* Constants, memory, and FP registers can go into FP registers. */ | |
741 | if ((regno == -1 || FP_REGNO_P (regno)) | |
742 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
743 | return NO_REGS; | |
744 | ||
745 | /* We can copy among the CR registers. */ | |
746 | if ((class == CR_REGS || class == CR0_REGS) | |
747 | && regno >= 0 && CR_REGNO_P (regno)) | |
748 | return NO_REGS; | |
749 | ||
750 | /* Otherwise, we need GENERAL_REGS. */ | |
751 | return GENERAL_REGS; | |
752 | } | |
753 | \f | |
754 | /* Given a comparison operation, return the bit number in CCR to test. We | |
755 | know this is a valid comparison. | |
756 | ||
757 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
758 | used instead of %C, so the bits will be in different places. | |
759 | ||
b4ac57ab | 760 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
761 | |
762 | int | |
763 | ccr_bit (op, scc_p) | |
764 | register rtx op; | |
765 | int scc_p; | |
766 | { | |
767 | enum rtx_code code = GET_CODE (op); | |
768 | enum machine_mode cc_mode; | |
769 | int cc_regnum; | |
770 | int base_bit; | |
771 | ||
772 | if (GET_RTX_CLASS (code) != '<') | |
773 | return -1; | |
774 | ||
775 | cc_mode = GET_MODE (XEXP (op, 0)); | |
776 | cc_regnum = REGNO (XEXP (op, 0)); | |
777 | base_bit = 4 * (cc_regnum - 68); | |
778 | ||
c5defebb RK |
779 | /* In CCEQmode cases we have made sure that the result is always in the |
780 | third bit of the CR field. */ | |
781 | ||
782 | if (cc_mode == CCEQmode) | |
783 | return base_bit + 3; | |
784 | ||
9878760c RK |
785 | switch (code) |
786 | { | |
787 | case NE: | |
788 | return scc_p ? base_bit + 3 : base_bit + 2; | |
789 | case EQ: | |
790 | return base_bit + 2; | |
791 | case GT: case GTU: | |
792 | return base_bit + 1; | |
793 | case LT: case LTU: | |
794 | return base_bit; | |
795 | ||
796 | case GE: case GEU: | |
797 | /* If floating-point, we will have done a cror to put the bit in the | |
798 | unordered position. So test that bit. For integer, this is ! LT | |
799 | unless this is an scc insn. */ | |
800 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
801 | ||
802 | case LE: case LEU: | |
803 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
804 | ||
805 | default: | |
806 | abort (); | |
807 | } | |
808 | } | |
809 | \f | |
810 | /* Print an operand. Recognize special options, documented below. */ | |
811 | ||
812 | void | |
813 | print_operand (file, x, code) | |
814 | FILE *file; | |
815 | rtx x; | |
816 | char code; | |
817 | { | |
818 | int i; | |
819 | int val; | |
820 | ||
821 | /* These macros test for integers and extract the low-order bits. */ | |
822 | #define INT_P(X) \ | |
823 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
824 | && GET_MODE (X) == VOIDmode) | |
825 | ||
826 | #define INT_LOWPART(X) \ | |
827 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
828 | ||
829 | switch (code) | |
830 | { | |
a8b3aeda | 831 | case '.': |
a85d226b RK |
832 | /* Write out an instruction after the call which may be replaced |
833 | with glue code by the loader. This depends on the AIX version. */ | |
834 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
835 | return; |
836 | ||
9854d9ed RK |
837 | case 'A': |
838 | /* If X is a constant integer whose low-order 5 bits are zero, | |
839 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 840 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
841 | write a trash instruction. */ |
842 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 843 | putc ('l', file); |
9854d9ed | 844 | else |
76229ac8 | 845 | putc ('r', file); |
9854d9ed RK |
846 | return; |
847 | ||
848 | case 'b': | |
849 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 850 | if (! INT_P (x)) |
9854d9ed | 851 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 852 | |
9854d9ed | 853 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
854 | return; |
855 | ||
9854d9ed RK |
856 | case 'C': |
857 | /* This is an optional cror needed for LE or GE floating-point | |
858 | comparisons. Otherwise write nothing. */ | |
859 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
860 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
861 | { | |
862 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
863 | ||
864 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
865 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
866 | } | |
867 | return; | |
868 | ||
869 | case 'D': | |
870 | /* Similar, except that this is for an scc, so we must be able to | |
871 | encode the test in a single bit that is one. We do the above | |
872 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
873 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
874 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
875 | { | |
876 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
877 | ||
878 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
879 | base_bit + 2, | |
880 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
881 | } | |
882 | ||
883 | else if (GET_CODE (x) == NE) | |
884 | { | |
885 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
886 | ||
887 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
888 | base_bit + 2, base_bit + 2); | |
889 | } | |
890 | return; | |
891 | ||
892 | case 'E': | |
893 | /* X is a CR register. Print the number of the third bit of the CR */ | |
894 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
895 | output_operand_lossage ("invalid %%E value"); | |
896 | ||
897 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 898 | return; |
9854d9ed RK |
899 | |
900 | case 'f': | |
901 | /* X is a CR register. Print the shift count needed to move it | |
902 | to the high-order four bits. */ | |
903 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
904 | output_operand_lossage ("invalid %%f value"); | |
905 | else | |
906 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
907 | return; | |
908 | ||
909 | case 'F': | |
910 | /* Similar, but print the count for the rotate in the opposite | |
911 | direction. */ | |
912 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
913 | output_operand_lossage ("invalid %%F value"); | |
914 | else | |
915 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
916 | return; | |
917 | ||
918 | case 'G': | |
919 | /* X is a constant integer. If it is negative, print "m", | |
920 | otherwise print "z". This is to make a aze or ame insn. */ | |
921 | if (GET_CODE (x) != CONST_INT) | |
922 | output_operand_lossage ("invalid %%G value"); | |
923 | else if (INTVAL (x) >= 0) | |
76229ac8 | 924 | putc ('z', file); |
9854d9ed | 925 | else |
76229ac8 | 926 | putc ('m', file); |
9854d9ed RK |
927 | return; |
928 | ||
9878760c | 929 | case 'h': |
df3d94ed RK |
930 | /* If constant, output low-order five bits. Otherwise, |
931 | write normally. */ | |
9878760c RK |
932 | if (INT_P (x)) |
933 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
934 | else | |
935 | print_operand (file, x, 0); | |
936 | return; | |
937 | ||
938 | case 'H': | |
df3d94ed | 939 | /* X must be a constant. Output the low order 5 bits plus 24. */ |
9878760c RK |
940 | if (! INT_P (x)) |
941 | output_operand_lossage ("invalid %%H value"); | |
942 | ||
943 | fprintf (file, "%d", (INT_LOWPART (x) + 24) & 31); | |
944 | return; | |
945 | ||
9854d9ed RK |
946 | case 'I': |
947 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 948 | if (INT_P (x)) |
76229ac8 | 949 | putc ('i', file); |
9878760c RK |
950 | return; |
951 | ||
9854d9ed RK |
952 | case 'j': |
953 | /* Write the bit number in CCR for jump. */ | |
954 | i = ccr_bit (x, 0); | |
955 | if (i == -1) | |
956 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 957 | else |
9854d9ed | 958 | fprintf (file, "%d", i); |
9878760c RK |
959 | return; |
960 | ||
9854d9ed RK |
961 | case 'J': |
962 | /* Similar, but add one for shift count in rlinm for scc and pass | |
963 | scc flag to `ccr_bit'. */ | |
964 | i = ccr_bit (x, 1); | |
965 | if (i == -1) | |
966 | output_operand_lossage ("invalid %%J code"); | |
967 | else | |
a0466a68 RK |
968 | /* If we want bit 31, write a shift count of zero, not 32. */ |
969 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
970 | return; |
971 | ||
9854d9ed RK |
972 | case 'k': |
973 | /* X must be a constant. Write the 1's complement of the | |
974 | constant. */ | |
9878760c | 975 | if (! INT_P (x)) |
9854d9ed | 976 | output_operand_lossage ("invalid %%k value"); |
9878760c | 977 | |
9854d9ed | 978 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
979 | return; |
980 | ||
9854d9ed RK |
981 | case 'L': |
982 | /* Write second word of DImode or DFmode reference. Works on register | |
983 | or non-indexed memory only. */ | |
984 | if (GET_CODE (x) == REG) | |
985 | fprintf (file, "%d", REGNO (x) + 1); | |
986 | else if (GET_CODE (x) == MEM) | |
987 | { | |
988 | /* Handle possible auto-increment. Since it is pre-increment and | |
989 | we have already done it, we can just use an offset of four. */ | |
990 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
991 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
992 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4)); | |
993 | else | |
994 | output_address (plus_constant (XEXP (x, 0), 4)); | |
995 | } | |
9878760c | 996 | return; |
9854d9ed | 997 | |
9878760c RK |
998 | case 'm': |
999 | /* MB value for a mask operand. */ | |
1000 | if (! mask_operand (x, VOIDmode)) | |
1001 | output_operand_lossage ("invalid %%m value"); | |
1002 | ||
1003 | val = INT_LOWPART (x); | |
1004 | ||
1005 | /* If the high bit is set and the low bit is not, the value is zero. | |
1006 | If the high bit is zero, the value is the first 1 bit we find from | |
1007 | the left. */ | |
1008 | if (val < 0 && (val & 1) == 0) | |
1009 | { | |
1010 | fprintf (file, "0"); | |
1011 | return; | |
1012 | } | |
1013 | else if (val >= 0) | |
1014 | { | |
1015 | for (i = 1; i < 32; i++) | |
1016 | if ((val <<= 1) < 0) | |
1017 | break; | |
1018 | fprintf (file, "%d", i); | |
1019 | return; | |
1020 | } | |
1021 | ||
1022 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
1023 | number plus 1. We know the low-order bit is one. */ | |
1024 | for (i = 0; i < 32; i++) | |
1025 | if (((val >>= 1) & 1) == 0) | |
1026 | break; | |
1027 | ||
1028 | /* If we ended in ...01, I would be 0. The correct value is 31, so | |
1029 | we want 31 - i. */ | |
1030 | fprintf (file, "%d", 31 - i); | |
1031 | return; | |
1032 | ||
1033 | case 'M': | |
1034 | /* ME value for a mask operand. */ | |
1035 | if (! mask_operand (x, VOIDmode)) | |
1036 | output_operand_lossage ("invalid %%m value"); | |
1037 | ||
1038 | val = INT_LOWPART (x); | |
1039 | ||
1040 | /* If the low bit is set and the high bit is not, the value is 31. | |
1041 | If the low bit is zero, the value is the first 1 bit we find from | |
1042 | the right. */ | |
1043 | if ((val & 1) && val >= 0) | |
1044 | { | |
76229ac8 | 1045 | fputs ("31", file); |
9878760c RK |
1046 | return; |
1047 | } | |
1048 | else if ((val & 1) == 0) | |
1049 | { | |
1050 | for (i = 0; i < 32; i++) | |
1051 | if ((val >>= 1) & 1) | |
1052 | break; | |
1053 | ||
1054 | /* If we had ....10, I would be 0. The result should be | |
1055 | 30, so we need 30 - i. */ | |
1056 | fprintf (file, "%d", 30 - i); | |
1057 | return; | |
1058 | } | |
1059 | ||
1060 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
1061 | number minus 1. We know the high-order bit is one. */ | |
1062 | for (i = 0; i < 32; i++) | |
1063 | if ((val <<= 1) >= 0) | |
1064 | break; | |
1065 | ||
1066 | fprintf (file, "%d", i); | |
1067 | return; | |
1068 | ||
9878760c RK |
1069 | case 'N': |
1070 | /* Write the number of elements in the vector times 4. */ | |
1071 | if (GET_CODE (x) != PARALLEL) | |
1072 | output_operand_lossage ("invalid %%N value"); | |
1073 | ||
1074 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
1075 | return; | |
1076 | ||
1077 | case 'O': | |
1078 | /* Similar, but subtract 1 first. */ | |
1079 | if (GET_CODE (x) != PARALLEL) | |
1080 | output_operand_lossage ("invalid %%N value"); | |
1081 | ||
1082 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
1083 | return; | |
1084 | ||
9854d9ed RK |
1085 | case 'p': |
1086 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
1087 | if (! INT_P (x) | |
1088 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
1089 | output_operand_lossage ("invalid %%p value"); | |
1090 | ||
1091 | fprintf (file, "%d", i); | |
1092 | return; | |
1093 | ||
9878760c RK |
1094 | case 'P': |
1095 | /* The operand must be an indirect memory reference. The result | |
1096 | is the register number. */ | |
1097 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
1098 | || REGNO (XEXP (x, 0)) >= 32) | |
1099 | output_operand_lossage ("invalid %%P value"); | |
1100 | ||
1101 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
1102 | return; | |
1103 | ||
9854d9ed RK |
1104 | case 'R': |
1105 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
1106 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
1107 | output_operand_lossage ("invalid %%R value"); | |
1108 | else | |
1109 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 1110 | return; |
9854d9ed RK |
1111 | |
1112 | case 's': | |
1113 | /* Low 5 bits of 32 - value */ | |
1114 | if (! INT_P (x)) | |
1115 | output_operand_lossage ("invalid %%s value"); | |
1116 | ||
1117 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 1118 | return; |
9854d9ed RK |
1119 | |
1120 | case 'S': | |
1121 | /* Low 5 bits of 31 - value */ | |
1122 | if (! INT_P (x)) | |
1123 | output_operand_lossage ("invalid %%S value"); | |
1124 | ||
1125 | fprintf (file, "%d", (31 - INT_LOWPART (x)) & 31); | |
9878760c | 1126 | return; |
9854d9ed | 1127 | |
9878760c RK |
1128 | case 't': |
1129 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
1130 | All floating-point operations except NE branch true and integer | |
1131 | EQ, LT, GT, LTU and GTU also branch true. */ | |
1132 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1133 | output_operand_lossage ("invalid %%t value"); | |
1134 | ||
1135 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
1136 | && GET_CODE (x) != NE) | |
1137 | || GET_CODE (x) == EQ | |
1138 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
1139 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 1140 | fputs ("12", file); |
9878760c | 1141 | else |
76229ac8 | 1142 | putc ('4', file); |
9878760c RK |
1143 | return; |
1144 | ||
1145 | case 'T': | |
1146 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
1147 | 12 otherwise. */ | |
1148 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1149 | output_operand_lossage ("invalid %%t value"); | |
1150 | ||
1151 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
1152 | && GET_CODE (x) != NE) | |
1153 | || GET_CODE (x) == EQ | |
1154 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
1155 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 1156 | putc ('4', file); |
9878760c | 1157 | else |
76229ac8 | 1158 | fputs ("12", file); |
9878760c RK |
1159 | return; |
1160 | ||
9854d9ed RK |
1161 | case 'u': |
1162 | /* High-order 16 bits of constant. */ | |
1163 | if (! INT_P (x)) | |
1164 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 1165 | |
76229ac8 | 1166 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
1167 | return; |
1168 | ||
9854d9ed RK |
1169 | case 'U': |
1170 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
1171 | if (GET_CODE (x) == MEM | |
1172 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
1173 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 1174 | putc ('u', file); |
9854d9ed | 1175 | return; |
9878760c | 1176 | |
9854d9ed RK |
1177 | case 'w': |
1178 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
1179 | normally. */ | |
1180 | if (INT_P (x)) | |
1181 | fprintf (file, "%d", | |
1182 | (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); | |
1183 | else | |
1184 | print_operand (file, x, 0); | |
9878760c RK |
1185 | return; |
1186 | ||
9854d9ed RK |
1187 | case 'W': |
1188 | /* If constant, low-order 16 bits of constant, unsigned. | |
1189 | Otherwise, write normally. */ | |
1190 | if (INT_P (x)) | |
1191 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
1192 | else | |
1193 | print_operand (file, x, 0); | |
1194 | return; | |
9878760c | 1195 | |
9854d9ed RK |
1196 | case 'X': |
1197 | if (GET_CODE (x) == MEM | |
1198 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 1199 | putc ('x', file); |
9854d9ed | 1200 | return; |
9878760c | 1201 | |
9854d9ed RK |
1202 | case 'Y': |
1203 | /* Like 'L', for third word of TImode */ | |
1204 | if (GET_CODE (x) == REG) | |
1205 | fprintf (file, "%d", REGNO (x) + 2); | |
1206 | else if (GET_CODE (x) == MEM) | |
9878760c | 1207 | { |
9854d9ed RK |
1208 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
1209 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
1210 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); | |
1211 | else | |
1212 | output_address (plus_constant (XEXP (x, 0), 8)); | |
9878760c RK |
1213 | } |
1214 | return; | |
9854d9ed | 1215 | |
9878760c | 1216 | case 'z': |
b4ac57ab RS |
1217 | /* X is a SYMBOL_REF. Write out the name preceded by a |
1218 | period and without any trailing data in brackets. Used for function | |
9878760c RK |
1219 | names. */ |
1220 | if (GET_CODE (x) != SYMBOL_REF) | |
1221 | abort (); | |
1222 | ||
76229ac8 | 1223 | putc ('.', file); |
9878760c RK |
1224 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
1225 | return; | |
1226 | ||
9854d9ed RK |
1227 | case 'Z': |
1228 | /* Like 'L', for last word of TImode. */ | |
1229 | if (GET_CODE (x) == REG) | |
1230 | fprintf (file, "%d", REGNO (x) + 3); | |
1231 | else if (GET_CODE (x) == MEM) | |
1232 | { | |
1233 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
1234 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
1235 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); | |
1236 | else | |
1237 | output_address (plus_constant (XEXP (x, 0), 12)); | |
1238 | } | |
5c23c401 | 1239 | return; |
9854d9ed | 1240 | |
9878760c RK |
1241 | case 0: |
1242 | if (GET_CODE (x) == REG) | |
1243 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
1244 | else if (GET_CODE (x) == MEM) | |
1245 | { | |
1246 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
1247 | know the width from the mode. */ | |
1248 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
1249 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
1250 | REGNO (XEXP (XEXP (x, 0), 0))); | |
1251 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
1252 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
1253 | REGNO (XEXP (XEXP (x, 0), 0))); | |
1254 | else | |
1255 | output_address (XEXP (x, 0)); | |
1256 | } | |
1257 | else | |
1258 | output_addr_const (file, x); | |
a85d226b | 1259 | return; |
9878760c RK |
1260 | |
1261 | default: | |
1262 | output_operand_lossage ("invalid %%xn code"); | |
1263 | } | |
1264 | } | |
1265 | \f | |
1266 | /* Print the address of an operand. */ | |
1267 | ||
1268 | void | |
1269 | print_operand_address (file, x) | |
1270 | FILE *file; | |
1271 | register rtx x; | |
1272 | { | |
1273 | if (GET_CODE (x) == REG) | |
1274 | fprintf (file, "0(%d)", REGNO (x)); | |
1275 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST) | |
1276 | { | |
1277 | output_addr_const (file, x); | |
1875cc88 JW |
1278 | /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead |
1279 | of the toc pointer. */ | |
1280 | if (TARGET_MINIMAL_TOC) | |
1281 | fprintf (file, "(30)"); | |
1282 | else | |
1283 | fprintf (file, "(2)"); | |
9878760c RK |
1284 | } |
1285 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
1286 | { | |
1287 | if (REGNO (XEXP (x, 0)) == 0) | |
1288 | fprintf (file, "%d,%d", REGNO (XEXP (x, 1)), REGNO (XEXP (x, 0))); | |
1289 | else | |
1290 | fprintf (file, "%d,%d", REGNO (XEXP (x, 0)), REGNO (XEXP (x, 1))); | |
1291 | } | |
1292 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1293 | fprintf (file, "%d(%d)", INTVAL (XEXP (x, 1)), REGNO (XEXP (x, 0))); | |
1294 | else | |
1295 | abort (); | |
1296 | } | |
1297 | \f | |
1298 | /* This page contains routines that are used to determine what the function | |
1299 | prologue and epilogue code will do and write them out. */ | |
1300 | ||
1301 | /* Return the first fixed-point register that is required to be saved. 32 if | |
1302 | none. */ | |
1303 | ||
1304 | int | |
1305 | first_reg_to_save () | |
1306 | { | |
1307 | int first_reg; | |
1308 | ||
1309 | /* Find lowest numbered live register. */ | |
1310 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
1311 | if (regs_ever_live[first_reg]) | |
1312 | break; | |
1313 | ||
e165f3f0 RK |
1314 | /* If profiling, then we must save/restore every register that contains |
1315 | a parameter before/after the .mcount call. Use registers from 30 down | |
1316 | to 23 to do this. Don't use the frame pointer in reg 31. | |
1317 | ||
1318 | For now, save enough room for all of the parameter registers. */ | |
1319 | if (profile_flag) | |
1320 | if (first_reg > 23) | |
1321 | first_reg = 23; | |
1322 | ||
9878760c RK |
1323 | return first_reg; |
1324 | } | |
1325 | ||
1326 | /* Similar, for FP regs. */ | |
1327 | ||
1328 | int | |
1329 | first_fp_reg_to_save () | |
1330 | { | |
1331 | int first_reg; | |
1332 | ||
1333 | /* Find lowest numbered live register. */ | |
1334 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
1335 | if (regs_ever_live[first_reg]) | |
1336 | break; | |
1337 | ||
1338 | return first_reg; | |
1339 | } | |
1340 | ||
1341 | /* Return 1 if we need to save CR. */ | |
1342 | ||
1343 | int | |
1344 | must_save_cr () | |
1345 | { | |
1346 | return regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]; | |
1347 | } | |
1348 | ||
1349 | /* Compute the size of the save area in the stack, including the space for | |
1350 | the fixed area. */ | |
1351 | ||
1352 | int | |
1353 | rs6000_sa_size () | |
1354 | { | |
1355 | int size; | |
9878760c RK |
1356 | |
1357 | /* We have the six fixed words, plus the size of the register save | |
1358 | areas, rounded to a double-word. */ | |
1359 | size = 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2; | |
1360 | if (size & 1) | |
1361 | size++; | |
1362 | ||
1363 | return size * 4; | |
1364 | } | |
1365 | ||
1366 | /* Return non-zero if this function makes calls. */ | |
1367 | ||
1368 | int | |
1369 | rs6000_makes_calls () | |
1370 | { | |
1371 | rtx insn; | |
1372 | ||
0c61c946 RK |
1373 | /* If we are profiling, we will be making a call to mcount. */ |
1374 | if (profile_flag) | |
1375 | return 1; | |
1376 | ||
9878760c RK |
1377 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
1378 | if (GET_CODE (insn) == CALL_INSN) | |
1379 | return 1; | |
1380 | ||
1381 | return 0; | |
1382 | } | |
1383 | ||
1384 | /* Return non-zero if this function needs to push space on the stack. */ | |
1385 | ||
1386 | int | |
1387 | rs6000_pushes_stack () | |
1388 | { | |
1389 | int total_size = (rs6000_sa_size () + get_frame_size () | |
1390 | + current_function_outgoing_args_size); | |
1391 | ||
1392 | /* We need to push the stack if a frame pointer is needed (because the | |
1393 | stack might be dynamically adjusted), if we are debugging, if the | |
1394 | total stack size is more than 220 bytes, or if we make calls. */ | |
1395 | ||
1396 | return (frame_pointer_needed || write_symbols != NO_DEBUG | |
1397 | || total_size > 220 | |
1398 | || rs6000_makes_calls ()); | |
1399 | } | |
1400 | ||
1401 | /* Write function prologue. */ | |
1402 | ||
1403 | void | |
1404 | output_prolog (file, size) | |
1405 | FILE *file; | |
1406 | int size; | |
1407 | { | |
1408 | int first_reg = first_reg_to_save (); | |
1409 | int must_push = rs6000_pushes_stack (); | |
1410 | int first_fp_reg = first_fp_reg_to_save (); | |
1411 | int basic_size = rs6000_sa_size (); | |
1412 | int total_size = (basic_size + size + current_function_outgoing_args_size); | |
1413 | ||
1414 | /* Round size to multiple of 8 bytes. */ | |
1415 | total_size = (total_size + 7) & ~7; | |
1416 | ||
1417 | /* Write .extern for any function we will call to save and restore fp | |
1418 | values. */ | |
1419 | if (first_fp_reg < 62) | |
1420 | fprintf (file, "\t.extern ._savef%d\n\t.extern ._restf%d\n", | |
1421 | first_fp_reg - 32, first_fp_reg - 32); | |
1422 | ||
1423 | /* Write .extern for truncation routines, if needed. */ | |
1424 | if (rs6000_trunc_used && ! trunc_defined) | |
1425 | { | |
1426 | fprintf (file, "\t.extern .itrunc\n\t.extern .uitrunc\n"); | |
1427 | trunc_defined = 1; | |
1428 | } | |
1429 | ||
e165f3f0 RK |
1430 | /* If we have to call a function to save fpr's, or if we are doing profiling, |
1431 | then we will be using LR. */ | |
1432 | if (first_fp_reg < 62 || profile_flag) | |
9878760c RK |
1433 | regs_ever_live[65] = 1; |
1434 | ||
1435 | /* If we use the link register, get it into r0. */ | |
1436 | if (regs_ever_live[65]) | |
85638c0d | 1437 | asm_fprintf (file, "\tmflr 0\n"); |
9878760c RK |
1438 | |
1439 | /* If we need to save CR, put it into r12. */ | |
1440 | if (must_save_cr ()) | |
85638c0d | 1441 | asm_fprintf (file, "\tmfcr 12\n"); |
9878760c RK |
1442 | |
1443 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
1444 | ourself. Otherwise, call function. Note that since they are statically |
1445 | linked, we do not need a nop following them. */ | |
9878760c | 1446 | if (first_fp_reg == 62) |
85638c0d | 1447 | asm_fprintf (file, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n"); |
9878760c | 1448 | else if (first_fp_reg == 63) |
85638c0d | 1449 | asm_fprintf (file, "\tstfd 31,-8(1)\n"); |
9878760c | 1450 | else if (first_fp_reg != 64) |
85638c0d | 1451 | asm_fprintf (file, "\tbl ._savef%d\n", first_fp_reg - 32); |
9878760c RK |
1452 | |
1453 | /* Now save gpr's. */ | |
85638c0d RK |
1454 | if (! TARGET_POWER || first_reg == 31) |
1455 | { | |
1456 | int regno, loc; | |
1457 | ||
1458 | for (regno = first_reg, | |
1459 | loc = - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8; | |
1460 | regno < 32; | |
1461 | regno++, loc += 4) | |
1462 | asm_fprintf (file, "\t{st|stw} %d,%d(1)\n", regno, loc); | |
1463 | } | |
1464 | ||
9878760c | 1465 | else if (first_reg != 32) |
85638c0d | 1466 | asm_fprintf (file, "\t{stm|stmw} %d,%d(1)\n", first_reg, |
9878760c RK |
1467 | - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8); |
1468 | ||
1469 | /* Save lr if we used it. */ | |
1470 | if (regs_ever_live[65]) | |
85638c0d | 1471 | asm_fprintf (file, "\t{st|stw} 0,8(1)\n"); |
9878760c RK |
1472 | |
1473 | /* Save CR if we use any that must be preserved. */ | |
1474 | if (must_save_cr ()) | |
85638c0d | 1475 | asm_fprintf (file, "\t{st|stw} 12,4(1)\n"); |
9878760c RK |
1476 | |
1477 | /* Update stack and set back pointer. */ | |
1478 | if (must_push) | |
1479 | { | |
1480 | if (total_size < 32767) | |
85638c0d | 1481 | asm_fprintf (file, "\t{stu|stwu} 1,%d(1)\n", - total_size); |
9878760c RK |
1482 | else |
1483 | { | |
85638c0d | 1484 | asm_fprintf (file, "\t{cau|addis} 0,0,%d\n\t{oril|ori} 0,0,%d\n", |
9878760c | 1485 | (total_size >> 16) & 0xffff, total_size & 0xffff); |
85638c0d RK |
1486 | asm_fprintf (file, "\t{sf|subfc} 12,0,1\n"); |
1487 | asm_fprintf (file, "\t{st|stw} 1,0(12)\n\t{oril|ori} 1,12,0\n"); | |
9878760c RK |
1488 | } |
1489 | } | |
1490 | ||
1491 | /* Set frame pointer, if needed. */ | |
1492 | if (frame_pointer_needed) | |
85638c0d | 1493 | asm_fprintf (file, "\t{oril|ori} 31,1,0\n"); |
1875cc88 JW |
1494 | |
1495 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the | |
1496 | TOC_TABLE address into register 30. */ | |
1497 | if (TARGET_MINIMAL_TOC && get_pool_size () != 0) | |
85638c0d | 1498 | asm_fprintf (file, "\t{l|lwz} 30,LCTOC..0(2)\n"); |
9878760c RK |
1499 | } |
1500 | ||
1501 | /* Write function epilogue. */ | |
1502 | ||
1503 | void | |
1504 | output_epilog (file, size) | |
1505 | FILE *file; | |
1506 | int size; | |
1507 | { | |
1508 | int first_reg = first_reg_to_save (); | |
1509 | int must_push = rs6000_pushes_stack (); | |
1510 | int first_fp_reg = first_fp_reg_to_save (); | |
1511 | int basic_size = rs6000_sa_size (); | |
1512 | int total_size = (basic_size + size + current_function_outgoing_args_size); | |
1513 | rtx insn = get_last_insn (); | |
1514 | ||
1515 | /* Round size to multiple of 8 bytes. */ | |
1516 | total_size = (total_size + 7) & ~7; | |
1517 | ||
1518 | /* If the last insn was a BARRIER, we don't have to write anything except | |
1519 | the trace table. */ | |
1520 | if (GET_CODE (insn) == NOTE) | |
1521 | insn = prev_nonnote_insn (insn); | |
1522 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
1523 | { | |
1524 | /* If we have a frame pointer, a call to alloca, or a large stack | |
1525 | frame, restore the old stack pointer using the backchain. Otherwise, | |
1526 | we know what size to update it with. */ | |
1527 | if (frame_pointer_needed || current_function_calls_alloca | |
1528 | || total_size > 32767) | |
85638c0d | 1529 | asm_fprintf (file, "\t{l|lwz} 1,0(1)\n"); |
9878760c | 1530 | else if (must_push) |
85638c0d | 1531 | asm_fprintf (file, "\t{ai|addic} 1,1,%d\n", total_size); |
9878760c | 1532 | |
b4ac57ab | 1533 | /* Get the old lr if we saved it. */ |
9878760c | 1534 | if (regs_ever_live[65]) |
85638c0d | 1535 | asm_fprintf (file, "\t{l|lwz} 0,8(1)\n"); |
9878760c RK |
1536 | |
1537 | /* Get the old cr if we saved it. */ | |
1538 | if (must_save_cr ()) | |
85638c0d | 1539 | asm_fprintf (file, "\t{l|lwz} 12,4(1)\n"); |
9878760c | 1540 | |
b4ac57ab RS |
1541 | /* Set LR here to try to overlap restores below. */ |
1542 | if (regs_ever_live[65]) | |
85638c0d | 1543 | asm_fprintf (file, "\tmtlr 0\n"); |
b4ac57ab | 1544 | |
9878760c | 1545 | /* Restore gpr's. */ |
85638c0d RK |
1546 | if (! TARGET_POWER || first_reg == 31) |
1547 | { | |
1548 | int regno, loc; | |
1549 | ||
1550 | for (regno = first_reg, | |
1551 | loc = - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8; | |
1552 | regno < 32; | |
1553 | regno++, loc += 4) | |
1554 | asm_fprintf (file, "\t{l|lwz} %d,%d(1)\n", regno, loc); | |
1555 | } | |
1556 | ||
9878760c | 1557 | else if (first_reg != 32) |
85638c0d RK |
1558 | asm_fprintf (file, "\t{lm|lmw} %d,%d(1)\n", first_reg, |
1559 | - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8); | |
9878760c | 1560 | |
b4ac57ab | 1561 | /* Restore fpr's if we can do it without calling a function. */ |
9878760c | 1562 | if (first_fp_reg == 62) |
85638c0d | 1563 | asm_fprintf (file, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n"); |
9878760c | 1564 | else if (first_fp_reg == 63) |
85638c0d | 1565 | asm_fprintf (file, "\tlfd 31,-8(1)\n"); |
9878760c | 1566 | |
28edebac RK |
1567 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
1568 | that were used. */ | |
9878760c | 1569 | if (must_save_cr ()) |
85638c0d RK |
1570 | asm_fprintf (file, "\tmtcrf %d,12\n", |
1571 | (regs_ever_live[70] != 0) * 0x20 | |
1572 | + (regs_ever_live[71] != 0) * 0x10 | |
1573 | + (regs_ever_live[72] != 0) * 0x8); | |
9878760c | 1574 | |
b4ac57ab RS |
1575 | /* If we have to restore more than two FP registers, branch to the |
1576 | restore function. It will return to our caller. */ | |
1577 | if (first_fp_reg < 62) | |
85638c0d | 1578 | asm_fprintf (file, "\tb ._restf%d\n", first_fp_reg - 32); |
b4ac57ab | 1579 | else |
85638c0d | 1580 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 1581 | } |
b4ac57ab | 1582 | |
9b30bae2 JW |
1583 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
1584 | on its format. */ | |
1585 | { | |
1586 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); | |
1587 | int fixed_parms, float_parms, parm_info; | |
1588 | int i; | |
1589 | ||
1590 | /* Need label immediately before tbtab, so we can compute its offset | |
1591 | from the function start. */ | |
1592 | if (*fname == '*') | |
1593 | ++fname; | |
c2a47e48 | 1594 | fprintf (file, "LT.."); |
9b30bae2 JW |
1595 | ASM_OUTPUT_LABEL (file, fname); |
1596 | ||
15872eeb | 1597 | /* The .tbtab pseudo-op can only be used for the first eight |
9b30bae2 JW |
1598 | expressions, since it can't handle the possibly variable length |
1599 | fields that follow. However, if you omit the optional fields, | |
1600 | the assembler outputs zeros for all optional fields anyways, giving each | |
1601 | variable length field is minimum length (as defined in sys/debug.h). | |
15872eeb | 1602 | Thus we can not use the .tbtab pseudo-op at all. */ |
9b30bae2 JW |
1603 | |
1604 | /* An all-zero word flags the start of the tbtab, for debuggers that have | |
1605 | to find it by searching forward from the entry point or from the | |
1606 | current pc. */ | |
1607 | fprintf (file, "\t.long 0\n"); | |
1608 | ||
1609 | /* Tbtab format type. Use format type 0. */ | |
65d1fa2b | 1610 | fprintf (file, "\t.byte 0,"); |
9b30bae2 JW |
1611 | |
1612 | /* Language type. Unfortunately, there doesn't seem to be any official way | |
1613 | to get this info, so we use language_string. C is 0. C++ is 9. | |
9854d9ed RK |
1614 | No number defined for Obj-C, so use the value for C for now. */ |
1615 | if (! strcmp (language_string, "GNU C") | |
1616 | || ! strcmp (language_string, "GNU Obj-C")) | |
9b30bae2 | 1617 | i = 0; |
9353d0a3 RK |
1618 | else if (! strcmp (language_string, "GNU F77")) |
1619 | i = 1; | |
1620 | else if (! strcmp (language_string, "GNU Ada")) | |
1621 | i = 3; | |
1622 | else if (! strcmp (language_string, "GNU PASCAL")) | |
1623 | i = 2; | |
9b30bae2 JW |
1624 | else if (! strcmp (language_string, "GNU C++")) |
1625 | i = 9; | |
1626 | else | |
1627 | abort (); | |
65d1fa2b | 1628 | fprintf (file, "%d,", i); |
9b30bae2 JW |
1629 | |
1630 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
1631 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
1632 | from start of procedure stored in tbtab, internal function, function | |
1633 | has controlled storage, function has no toc, function uses fp, | |
1634 | function logs/aborts fp operations. */ | |
1635 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
65d1fa2b | 1636 | fprintf (file, "%d,", (1 << 5) | ((first_fp_reg != 64) << 1)); |
9b30bae2 JW |
1637 | |
1638 | /* 6 bitfields: function is interrupt handler, name present in proc table, | |
1639 | function calls alloca, on condition directives (controls stack walks, | |
1640 | 3 bits), saves condition reg, saves link reg. */ | |
1641 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
1642 | set up as a frame pointer, even when there is no alloca call. */ | |
65d1fa2b | 1643 | fprintf (file, "%d,", |
9b30bae2 JW |
1644 | ((1 << 6) | (frame_pointer_needed << 5) |
1645 | | (must_save_cr () << 1) | (regs_ever_live[65]))); | |
1646 | ||
1647 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
1648 | (6 bits). */ | |
65d1fa2b | 1649 | fprintf (file, "%d,", |
9b30bae2 JW |
1650 | (must_push << 7) | (64 - first_fp_reg_to_save ())); |
1651 | ||
1652 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
65d1fa2b | 1653 | fprintf (file, "%d,", (32 - first_reg_to_save ())); |
9b30bae2 JW |
1654 | |
1655 | { | |
1656 | /* Compute the parameter info from the function decl argument list. */ | |
1657 | tree decl; | |
1658 | int next_parm_info_bit; | |
1659 | ||
1660 | next_parm_info_bit = 31; | |
1661 | parm_info = 0; | |
1662 | fixed_parms = 0; | |
1663 | float_parms = 0; | |
1664 | ||
1665 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
1666 | decl; decl = TREE_CHAIN (decl)) | |
1667 | { | |
1668 | rtx parameter = DECL_INCOMING_RTL (decl); | |
1669 | enum machine_mode mode = GET_MODE (parameter); | |
1670 | ||
1671 | if (GET_CODE (parameter) == REG) | |
1672 | { | |
1673 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
1674 | { | |
1675 | int bits; | |
1676 | ||
1677 | float_parms++; | |
1678 | ||
1679 | if (mode == SFmode) | |
1680 | bits = 0x2; | |
1681 | else if (mode == DFmode) | |
1682 | bits = 0x3; | |
1683 | else | |
1684 | abort (); | |
1685 | ||
1686 | /* If only one bit will fit, don't or in this entry. */ | |
1687 | if (next_parm_info_bit > 0) | |
1688 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
1689 | next_parm_info_bit -= 2; | |
1690 | } | |
1691 | else | |
1692 | { | |
1693 | fixed_parms += ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) | |
1694 | / UNITS_PER_WORD); | |
1695 | next_parm_info_bit -= 1; | |
1696 | } | |
1697 | } | |
1698 | } | |
1699 | } | |
1700 | ||
1701 | /* Number of fixed point parameters. */ | |
1702 | /* This is actually the number of words of fixed point parameters; thus | |
1703 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
65d1fa2b | 1704 | fprintf (file, "%d,", fixed_parms); |
9b30bae2 JW |
1705 | |
1706 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
1707 | all on stack. */ | |
1708 | /* This is actually the number of fp registers that hold parameters; | |
1709 | and thus the maximum value is 13. */ | |
1710 | /* Set parameters on stack bit if parameters are not in their original | |
15872eeb | 1711 | registers, regardless of whether they are on the stack? Xlc |
9b30bae2 | 1712 | seems to set the bit when not optimizing. */ |
65d1fa2b | 1713 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); |
9b30bae2 JW |
1714 | |
1715 | /* Optional fields follow. Some are variable length. */ | |
1716 | ||
1717 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
1718 | 11 double float. */ | |
1719 | /* There is an entry for each parameter in a register, in the order that | |
1720 | they occur in the parameter list. Any intervening arguments on the | |
1721 | stack are ignored. If the list overflows a long (max possible length | |
1722 | 34 bits) then completely leave off all elements that don't fit. */ | |
1723 | /* Only emit this long if there was at least one parameter. */ | |
1724 | if (fixed_parms || float_parms) | |
1725 | fprintf (file, "\t.long %d\n", parm_info); | |
1726 | ||
1727 | /* Offset from start of code to tb table. */ | |
c2a47e48 | 1728 | fprintf (file, "\t.long LT.."); |
9b30bae2 JW |
1729 | RS6000_OUTPUT_BASENAME (file, fname); |
1730 | fprintf (file, "-."); | |
1731 | RS6000_OUTPUT_BASENAME (file, fname); | |
1732 | fprintf (file, "\n"); | |
1733 | ||
1734 | /* Interrupt handler mask. */ | |
15872eeb | 1735 | /* Omit this long, since we never set the interrupt handler bit above. */ |
9b30bae2 JW |
1736 | |
1737 | /* Number of CTL (controlled storage) anchors. */ | |
1738 | /* Omit this long, since the has_ctl bit is never set above. */ | |
1739 | ||
1740 | /* Displacement into stack of each CTL anchor. */ | |
1741 | /* Omit this list of longs, because there are no CTL anchors. */ | |
1742 | ||
1743 | /* Length of function name. */ | |
1744 | fprintf (file, "\t.short %d\n", strlen (fname)); | |
1745 | ||
1746 | /* Function name. */ | |
1747 | assemble_string (fname, strlen (fname)); | |
1748 | ||
1749 | /* Register for alloca automatic storage; this is always reg 31. | |
1750 | Only emit this if the alloca bit was set above. */ | |
1751 | if (frame_pointer_needed) | |
1752 | fprintf (file, "\t.byte 31\n"); | |
1753 | } | |
9878760c RK |
1754 | } |
1755 | \f | |
1756 | /* Output a TOC entry. We derive the entry name from what is | |
1757 | being written. */ | |
1758 | ||
1759 | void | |
1760 | output_toc (file, x, labelno) | |
1761 | FILE *file; | |
1762 | rtx x; | |
1763 | int labelno; | |
1764 | { | |
1765 | char buf[256]; | |
1766 | char *name = buf; | |
1767 | rtx base = x; | |
1768 | int offset = 0; | |
1769 | ||
1770 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); | |
1771 | ||
37c37a57 RK |
1772 | /* Handle FP constants specially. Note that if we have a minimal |
1773 | TOC, things we put here aren't actually in the TOC, so we can allow | |
1774 | FP constants. */ | |
9878760c RK |
1775 | if (GET_CODE (x) == CONST_DOUBLE |
1776 | && GET_MODE (x) == DFmode | |
1777 | && TARGET_FLOAT_FORMAT == HOST_FLOAT_FORMAT | |
1778 | && BITS_PER_WORD == HOST_BITS_PER_INT | |
37c37a57 | 1779 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 1780 | { |
1875cc88 JW |
1781 | if (TARGET_MINIMAL_TOC) |
1782 | fprintf (file, "\t.long %d\n\t.long %d\n", | |
1783 | CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x)); | |
1784 | else | |
1785 | fprintf (file, "\t.tc FD_%x_%x[TC],%d,%d\n", | |
1786 | CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x), | |
1787 | CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x)); | |
9878760c RK |
1788 | return; |
1789 | } | |
1790 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 1791 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c RK |
1792 | { |
1793 | rtx val = operand_subword (x, 0, 0, SFmode); | |
1794 | ||
1795 | if (val == 0 || GET_CODE (val) != CONST_INT) | |
1796 | abort (); | |
1797 | ||
1875cc88 JW |
1798 | if (TARGET_MINIMAL_TOC) |
1799 | fprintf (file, "\t.long %d\n", INTVAL (val)); | |
1800 | else | |
1801 | fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val)); | |
9878760c RK |
1802 | return; |
1803 | } | |
1804 | ||
1805 | if (GET_CODE (x) == CONST) | |
1806 | { | |
1807 | base = XEXP (XEXP (x, 0), 0); | |
1808 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
1809 | } | |
1810 | ||
1811 | if (GET_CODE (base) == SYMBOL_REF) | |
1812 | name = XSTR (base, 0); | |
1813 | else if (GET_CODE (base) == LABEL_REF) | |
1814 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
1815 | else if (GET_CODE (base) == CODE_LABEL) | |
1816 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
1817 | else | |
1818 | abort (); | |
1819 | ||
1875cc88 JW |
1820 | if (TARGET_MINIMAL_TOC) |
1821 | fprintf (file, "\t.long "); | |
1822 | else | |
1823 | { | |
1824 | fprintf (file, "\t.tc "); | |
1825 | RS6000_OUTPUT_BASENAME (file, name); | |
9878760c | 1826 | |
1875cc88 JW |
1827 | if (offset < 0) |
1828 | fprintf (file, ".N%d", - offset); | |
1829 | else if (offset) | |
1830 | fprintf (file, ".P%d", offset); | |
9878760c | 1831 | |
1875cc88 JW |
1832 | fprintf (file, "[TC],"); |
1833 | } | |
9878760c RK |
1834 | output_addr_const (file, x); |
1835 | fprintf (file, "\n"); | |
1836 | } | |
1837 | \f | |
1838 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
1839 | starting at P to FILE. | |
1840 | ||
1841 | On the RS/6000, we have to do this using the .byte operation and | |
1842 | write out special characters outside the quoted string. | |
1843 | Also, the assembler is broken; very long strings are truncated, | |
1844 | so we must artificially break them up early. */ | |
1845 | ||
1846 | void | |
1847 | output_ascii (file, p, n) | |
1848 | FILE *file; | |
1849 | char *p; | |
1850 | int n; | |
1851 | { | |
1852 | char c; | |
1853 | int i, count_string; | |
1854 | char *for_string = "\t.byte \""; | |
1855 | char *for_decimal = "\t.byte "; | |
1856 | char *to_close = NULL; | |
1857 | ||
1858 | count_string = 0; | |
1859 | for (i = 0; i < n; i++) | |
1860 | { | |
1861 | c = *p++; | |
1862 | if (c >= ' ' && c < 0177) | |
1863 | { | |
1864 | if (for_string) | |
1865 | fputs (for_string, file); | |
1866 | putc (c, file); | |
1867 | ||
1868 | /* Write two quotes to get one. */ | |
1869 | if (c == '"') | |
1870 | { | |
1871 | putc (c, file); | |
1872 | ++count_string; | |
1873 | } | |
1874 | ||
1875 | for_string = NULL; | |
1876 | for_decimal = "\"\n\t.byte "; | |
1877 | to_close = "\"\n"; | |
1878 | ++count_string; | |
1879 | ||
1880 | if (count_string >= 512) | |
1881 | { | |
1882 | fputs (to_close, file); | |
1883 | ||
1884 | for_string = "\t.byte \""; | |
1885 | for_decimal = "\t.byte "; | |
1886 | to_close = NULL; | |
1887 | count_string = 0; | |
1888 | } | |
1889 | } | |
1890 | else | |
1891 | { | |
1892 | if (for_decimal) | |
1893 | fputs (for_decimal, file); | |
1894 | fprintf (file, "%d", c); | |
1895 | ||
1896 | for_string = "\n\t.byte \""; | |
1897 | for_decimal = ", "; | |
1898 | to_close = "\n"; | |
1899 | count_string = 0; | |
1900 | } | |
1901 | } | |
1902 | ||
1903 | /* Now close the string if we have written one. Then end the line. */ | |
1904 | if (to_close) | |
1905 | fprintf (file, to_close); | |
1906 | } | |
1907 | \f | |
1908 | /* Generate a unique section name for FILENAME for a section type | |
1909 | represented by SECTION_DESC. Output goes into BUF. | |
1910 | ||
1911 | SECTION_DESC can be any string, as long as it is different for each | |
1912 | possible section type. | |
1913 | ||
1914 | We name the section in the same manner as xlc. The name begins with an | |
1915 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
1916 | names) with the last period replaced by the string SECTION_DESC. If |
1917 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
1918 | the name. */ | |
9878760c RK |
1919 | |
1920 | void | |
1921 | rs6000_gen_section_name (buf, filename, section_desc) | |
1922 | char **buf; | |
1923 | char *filename; | |
1924 | char *section_desc; | |
1925 | { | |
11e5fe42 | 1926 | char *q, *after_last_slash, *last_period; |
9878760c RK |
1927 | char *p; |
1928 | int len; | |
9878760c RK |
1929 | |
1930 | after_last_slash = filename; | |
1931 | for (q = filename; *q; q++) | |
11e5fe42 RK |
1932 | { |
1933 | if (*q == '/') | |
1934 | after_last_slash = q + 1; | |
1935 | else if (*q == '.') | |
1936 | last_period = q; | |
1937 | } | |
9878760c | 1938 | |
11e5fe42 | 1939 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
1940 | *buf = (char *) permalloc (len); |
1941 | ||
1942 | p = *buf; | |
1943 | *p++ = '_'; | |
1944 | ||
1945 | for (q = after_last_slash; *q; q++) | |
1946 | { | |
11e5fe42 | 1947 | if (q == last_period) |
9878760c RK |
1948 | { |
1949 | strcpy (p, section_desc); | |
1950 | p += strlen (section_desc); | |
9878760c RK |
1951 | } |
1952 | ||
1953 | else if (isalnum (*q)) | |
1954 | *p++ = *q; | |
1955 | } | |
1956 | ||
11e5fe42 | 1957 | if (last_period == 0) |
9878760c RK |
1958 | strcpy (p, section_desc); |
1959 | else | |
1960 | *p = '\0'; | |
1961 | } | |
e165f3f0 RK |
1962 | \f |
1963 | /* Write function profiler code. */ | |
1964 | ||
1965 | void | |
1966 | output_function_profiler (file, labelno) | |
1967 | FILE *file; | |
1968 | int labelno; | |
1969 | { | |
1970 | /* The last used parameter register. */ | |
1971 | int last_parm_reg; | |
1972 | int i, j; | |
1973 | ||
1974 | /* Set up a TOC entry for the profiler label. */ | |
1975 | toc_section (); | |
35fc1624 JW |
1976 | if (TARGET_MINIMAL_TOC) |
1977 | fprintf (file, "LPC..%d:\n\t.long LP..%d\n", labelno, labelno); | |
1978 | else | |
1979 | fprintf (file, "LPC..%d:\n\t.tc\tLP..%d[TC],LP..%d\n", | |
1980 | labelno, labelno, labelno); | |
e165f3f0 RK |
1981 | text_section (); |
1982 | ||
1983 | /* Figure out last used parameter register. The proper thing to do is | |
1984 | to walk incoming args of the function. A function might have live | |
1985 | parameter registers even if it has no incoming args. */ | |
1986 | ||
1987 | for (last_parm_reg = 10; | |
1988 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
1989 | last_parm_reg--) | |
1990 | ; | |
1991 | ||
1992 | /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since | |
1993 | it might be set up as the frame pointer. */ | |
1994 | ||
1995 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) | |
1996 | fprintf (file, "\tai %d,%d,0\n", j, i); | |
1997 | ||
1998 | /* Load location address into r3, and call mcount. */ | |
1999 | ||
c2a47e48 | 2000 | fprintf (file, "\tl 3,LPC..%d(2)\n\tbl .mcount\n", labelno); |
e165f3f0 RK |
2001 | |
2002 | /* Restore parameter registers. */ | |
2003 | ||
2004 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) | |
2005 | fprintf (file, "\tai %d,%d,0\n", i, j); | |
2006 | } |