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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
34f94b1f | 2 | Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
9878760c RK |
31 | #include "insn-attr.h" |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
34 | #include "expr.h" | |
35 | #include "obstack.h" | |
9b30bae2 | 36 | #include "tree.h" |
2a430ec1 | 37 | #include "except.h" |
a7df97e6 | 38 | #include "function.h" |
296b8152 KG |
39 | #include "output.h" |
40 | #include "toplev.h" | |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
815cdc52 MM |
57 | /* switch name, tune arch */ |
58 | { (const char *)0, "--with-cpu=", 1, 1 }, | |
59 | { (const char *)0, "-mcpu=", 1, 1 }, | |
60 | { (const char *)0, "-mtune=", 1, 0 }, | |
8e3f41e7 | 61 | }; |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
815cdc52 | 87 | const char *rs6000_abi_name = RS6000_ABI_NAME; |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
815cdc52 | 93 | const char *rs6000_sdata_name = (char *)0; |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
38c1f2d7 | 107 | /* Debug flags */ |
815cdc52 | 108 | const char *rs6000_debug_name; |
38c1f2d7 MM |
109 | int rs6000_debug_stack; /* debug stack applications */ |
110 | int rs6000_debug_arg; /* debug argument handling */ | |
111 | ||
112 | /* Flag to say the TOC is initialized */ | |
113 | int toc_initialized; | |
114 | ||
c81bebd7 MM |
115 | \f |
116 | /* Default register names. */ | |
117 | char rs6000_reg_names[][8] = | |
118 | { | |
802a0058 MM |
119 | "0", "1", "2", "3", "4", "5", "6", "7", |
120 | "8", "9", "10", "11", "12", "13", "14", "15", | |
121 | "16", "17", "18", "19", "20", "21", "22", "23", | |
122 | "24", "25", "26", "27", "28", "29", "30", "31", | |
123 | "0", "1", "2", "3", "4", "5", "6", "7", | |
124 | "8", "9", "10", "11", "12", "13", "14", "15", | |
125 | "16", "17", "18", "19", "20", "21", "22", "23", | |
126 | "24", "25", "26", "27", "28", "29", "30", "31", | |
127 | "mq", "lr", "ctr","ap", | |
128 | "0", "1", "2", "3", "4", "5", "6", "7", | |
129 | "fpmem" | |
c81bebd7 MM |
130 | }; |
131 | ||
132 | #ifdef TARGET_REGNAMES | |
133 | static char alt_reg_names[][8] = | |
134 | { | |
802a0058 MM |
135 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
136 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
137 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
138 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
139 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
140 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
141 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
142 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
143 | "mq", "lr", "ctr", "ap", | |
144 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
145 | "fpmem" | |
c81bebd7 MM |
146 | }; |
147 | #endif | |
9878760c | 148 | \f |
daf11973 MM |
149 | #ifndef MASK_STRICT_ALIGN |
150 | #define MASK_STRICT_ALIGN 0 | |
151 | #endif | |
152 | ||
5248c961 RK |
153 | /* Override command line options. Mostly we process the processor |
154 | type and sometimes adjust other TARGET_ options. */ | |
155 | ||
156 | void | |
8e3f41e7 | 157 | rs6000_override_options (default_cpu) |
d330fd93 | 158 | const char *default_cpu; |
5248c961 | 159 | { |
c4d38ccb | 160 | size_t i, j; |
8e3f41e7 | 161 | struct rs6000_cpu_select *ptr; |
5248c961 | 162 | |
85638c0d RK |
163 | /* Simplify the entries below by making a mask for any POWER |
164 | variant and any PowerPC variant. */ | |
165 | ||
938937d8 | 166 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
167 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
168 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
169 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 170 | |
5248c961 RK |
171 | static struct ptt |
172 | { | |
d330fd93 | 173 | const char *name; /* Canonical processor name. */ |
5248c961 RK |
174 | enum processor_type processor; /* Processor type enum value. */ |
175 | int target_enable; /* Target flags to enable. */ | |
176 | int target_disable; /* Target flags to disable. */ | |
177 | } processor_target_table[] | |
cf27b467 MM |
178 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
179 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 180 | {"power", PROCESSOR_POWER, |
938937d8 | 181 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 182 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
183 | {"power2", PROCESSOR_POWER, |
184 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
185 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
186 | {"powerpc", PROCESSOR_POWERPC, |
187 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 188 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
db7f1e43 | 189 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 190 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
191 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
192 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 193 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
194 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
195 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 196 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
197 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
198 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 199 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
200 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
201 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 202 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 203 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
a3a1dbf6 MM |
204 | {"401", PROCESSOR_PPC403, |
205 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
206 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
49a0b204 | 207 | {"403", PROCESSOR_PPC403, |
daf11973 | 208 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 209 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
210 | {"505", PROCESSOR_MPCCORE, |
211 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
212 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 213 | {"601", PROCESSOR_PPC601, |
938937d8 | 214 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 215 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 216 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
217 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
218 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 219 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
220 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
221 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
222 | {"603e", PROCESSOR_PPC603, |
223 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
224 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b5370a88 | 225 | {"ec603e", PROCESSOR_PPC603, |
a3a1dbf6 MM |
226 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, |
227 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 228 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
229 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
230 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
cac8ce95 | 231 | {"604e", PROCESSOR_PPC604e, |
07e6159a MM |
232 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
233 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 234 | {"620", PROCESSOR_PPC620, |
68c49ffa | 235 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
a260abc9 | 236 | POWER_MASKS | MASK_PPC_GPOPT}, |
bef84347 VM |
237 | {"740", PROCESSOR_PPC750, |
238 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
239 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
240 | {"750", PROCESSOR_PPC750, | |
241 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
242 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
243 | {"801", PROCESSOR_MPCCORE, |
244 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
245 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
246 | {"821", PROCESSOR_MPCCORE, |
247 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
248 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
249 | {"823", PROCESSOR_MPCCORE, |
250 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
251 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
252 | {"860", PROCESSOR_MPCCORE, |
253 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
254 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 255 | |
c4d38ccb | 256 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 257 | |
8a61d227 | 258 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 259 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 260 | |
5248c961 RK |
261 | profile_block_flag = 0; |
262 | ||
263 | /* Identify the processor type */ | |
8e3f41e7 MM |
264 | rs6000_select[0].string = default_cpu; |
265 | rs6000_cpu = PROCESSOR_DEFAULT; | |
8e3f41e7 MM |
266 | |
267 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 268 | { |
8e3f41e7 MM |
269 | ptr = &rs6000_select[i]; |
270 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 271 | { |
8e3f41e7 MM |
272 | for (j = 0; j < ptt_size; j++) |
273 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
274 | { | |
275 | if (ptr->set_tune_p) | |
276 | rs6000_cpu = processor_target_table[j].processor; | |
277 | ||
278 | if (ptr->set_arch_p) | |
279 | { | |
280 | target_flags |= processor_target_table[j].target_enable; | |
281 | target_flags &= ~processor_target_table[j].target_disable; | |
282 | } | |
283 | break; | |
284 | } | |
285 | ||
286 | if (i == ptt_size) | |
287 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
288 | } |
289 | } | |
8a61d227 | 290 | |
ef792183 MM |
291 | /* If we are optimizing big endian systems for space, use the |
292 | store multiple instructions. */ | |
293 | if (BYTES_BIG_ENDIAN && optimize_size) | |
294 | target_flags |= MASK_MULTIPLE; | |
295 | ||
8a61d227 MM |
296 | /* If -mmultiple or -mno-multiple was explicitly used, don't |
297 | override with the processor default */ | |
298 | if (TARGET_MULTIPLE_SET) | |
299 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 300 | |
938937d8 MM |
301 | /* If -mstring or -mno-string was explicitly used, don't |
302 | override with the processor default */ | |
303 | if (TARGET_STRING_SET) | |
1f5515bf | 304 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 305 | |
bef84347 VM |
306 | /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu |
307 | is a 750, because the hardware doesn't support the instructions used in | |
308 | little endian mode, and causes an alignment trap. The 750 does not cause | |
309 | an alignment trap (except when the target is unaligned). */ | |
310 | ||
bfc79d3b | 311 | if (! BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750) |
7e69e155 MM |
312 | { |
313 | if (TARGET_MULTIPLE) | |
314 | { | |
315 | target_flags &= ~MASK_MULTIPLE; | |
316 | if (TARGET_MULTIPLE_SET) | |
317 | warning ("-mmultiple is not supported on little endian systems"); | |
318 | } | |
319 | ||
320 | if (TARGET_STRING) | |
321 | { | |
322 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
323 | if (TARGET_STRING_SET) |
324 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
325 | } |
326 | } | |
3933e0e1 | 327 | |
a260abc9 DE |
328 | if (flag_pic && (DEFAULT_ABI == ABI_AIX)) |
329 | { | |
330 | warning ("-f%s ignored for AIX (all code is position independent)", | |
331 | (flag_pic > 1) ? "PIC" : "pic"); | |
332 | flag_pic = 0; | |
333 | } | |
334 | ||
38c1f2d7 MM |
335 | /* Set debug flags */ |
336 | if (rs6000_debug_name) | |
337 | { | |
bfc79d3b | 338 | if (! strcmp (rs6000_debug_name, "all")) |
38c1f2d7 | 339 | rs6000_debug_stack = rs6000_debug_arg = 1; |
bfc79d3b | 340 | else if (! strcmp (rs6000_debug_name, "stack")) |
38c1f2d7 | 341 | rs6000_debug_stack = 1; |
bfc79d3b | 342 | else if (! strcmp (rs6000_debug_name, "arg")) |
38c1f2d7 MM |
343 | rs6000_debug_arg = 1; |
344 | else | |
345 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
346 | } | |
347 | ||
c81bebd7 MM |
348 | #ifdef TARGET_REGNAMES |
349 | /* If the user desires alternate register names, copy in the alternate names | |
350 | now. */ | |
351 | if (TARGET_REGNAMES) | |
bfc79d3b DE |
352 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, |
353 | sizeof (rs6000_reg_names)); | |
c81bebd7 MM |
354 | #endif |
355 | ||
3933e0e1 MM |
356 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
357 | SUBTARGET_OVERRIDE_OPTIONS; | |
358 | #endif | |
5248c961 | 359 | } |
5accd822 DE |
360 | |
361 | void | |
362 | optimization_options (level, size) | |
363 | int level; | |
364 | int size ATTRIBUTE_UNUSED; | |
365 | { | |
fca812fa | 366 | #ifdef HAVE_decrement_and_branch_on_count |
5accd822 DE |
367 | /* When optimizing, enable use of BCT instruction. */ |
368 | if (level >= 1) | |
369 | flag_branch_on_count_reg = 1; | |
370 | #endif | |
5accd822 | 371 | } |
3cfa4909 MM |
372 | \f |
373 | /* Do anything needed at the start of the asm file. */ | |
374 | ||
375 | void | |
376 | rs6000_file_start (file, default_cpu) | |
377 | FILE *file; | |
d330fd93 | 378 | const char *default_cpu; |
3cfa4909 | 379 | { |
c4d38ccb | 380 | size_t i; |
3cfa4909 | 381 | char buffer[80]; |
d330fd93 | 382 | const char *start = buffer; |
3cfa4909 MM |
383 | struct rs6000_cpu_select *ptr; |
384 | ||
385 | if (flag_verbose_asm) | |
386 | { | |
387 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
388 | rs6000_select[0].string = default_cpu; | |
389 | ||
390 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
391 | { | |
392 | ptr = &rs6000_select[i]; | |
393 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
394 | { | |
395 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
396 | start = ""; | |
397 | } | |
398 | } | |
399 | ||
400 | #ifdef USING_SVR4_H | |
401 | switch (rs6000_sdata) | |
402 | { | |
403 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
404 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
405 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
406 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
407 | } | |
408 | ||
409 | if (rs6000_sdata && g_switch_value) | |
410 | { | |
411 | fprintf (file, "%s -G %d", start, g_switch_value); | |
412 | start = ""; | |
413 | } | |
414 | #endif | |
415 | ||
416 | if (*start == '\0') | |
417 | fputs ("\n", file); | |
418 | } | |
419 | } | |
420 | ||
24d304eb RK |
421 | \f |
422 | /* Create a CONST_DOUBLE from a string. */ | |
423 | ||
424 | struct rtx_def * | |
425 | rs6000_float_const (string, mode) | |
d330fd93 | 426 | const char *string; |
24d304eb RK |
427 | enum machine_mode mode; |
428 | { | |
429 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
430 | return immed_real_const_1 (value, mode); | |
431 | } | |
5248c961 | 432 | \f |
9878760c RK |
433 | /* Return non-zero if this function is known to have a null epilogue. */ |
434 | ||
435 | int | |
436 | direct_return () | |
437 | { | |
4697a36c MM |
438 | if (reload_completed) |
439 | { | |
440 | rs6000_stack_t *info = rs6000_stack_info (); | |
441 | ||
442 | if (info->first_gp_reg_save == 32 | |
443 | && info->first_fp_reg_save == 64 | |
444 | && !info->lr_save_p | |
1b4a2731 | 445 | && !info->cr_save_p |
4697a36c MM |
446 | && !info->push_p) |
447 | return 1; | |
448 | } | |
449 | ||
450 | return 0; | |
9878760c RK |
451 | } |
452 | ||
453 | /* Returns 1 always. */ | |
454 | ||
455 | int | |
456 | any_operand (op, mode) | |
296b8152 KG |
457 | register rtx op ATTRIBUTE_UNUSED; |
458 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c RK |
459 | { |
460 | return 1; | |
461 | } | |
462 | ||
b6c9286a | 463 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
464 | int |
465 | count_register_operand(op, mode) | |
b6c9286a | 466 | register rtx op; |
296b8152 | 467 | enum machine_mode mode ATTRIBUTE_UNUSED; |
b6c9286a MM |
468 | { |
469 | if (GET_CODE (op) != REG) | |
470 | return 0; | |
471 | ||
472 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
473 | return 1; | |
474 | ||
475 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
476 | return 1; | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
802a0058 MM |
481 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
482 | as a register. */ | |
38c1f2d7 MM |
483 | int |
484 | fpmem_operand(op, mode) | |
802a0058 | 485 | register rtx op; |
296b8152 | 486 | enum machine_mode mode ATTRIBUTE_UNUSED; |
802a0058 MM |
487 | { |
488 | if (GET_CODE (op) != REG) | |
489 | return 0; | |
490 | ||
491 | if (FPMEM_REGNO_P (REGNO (op))) | |
492 | return 1; | |
493 | ||
494 | #if 0 | |
495 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
496 | return 1; | |
497 | #endif | |
498 | ||
499 | return 0; | |
500 | } | |
501 | ||
9878760c RK |
502 | /* Return 1 if OP is a constant that can fit in a D field. */ |
503 | ||
504 | int | |
505 | short_cint_operand (op, mode) | |
506 | register rtx op; | |
296b8152 | 507 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 508 | { |
e675f625 | 509 | return ((GET_CODE (op) == CONST_INT |
34792e82 | 510 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000)); |
9878760c RK |
511 | } |
512 | ||
513 | /* Similar for a unsigned D field. */ | |
514 | ||
515 | int | |
516 | u_short_cint_operand (op, mode) | |
517 | register rtx op; | |
296b8152 | 518 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 519 | { |
19684119 DE |
520 | return (GET_CODE (op) == CONST_INT |
521 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0); | |
9878760c RK |
522 | } |
523 | ||
dcfedcd0 RK |
524 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
525 | ||
526 | int | |
527 | non_short_cint_operand (op, mode) | |
528 | register rtx op; | |
296b8152 | 529 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
530 | { |
531 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 532 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
533 | } |
534 | ||
9878760c RK |
535 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
536 | ctr, or lr). */ | |
537 | ||
538 | int | |
cd2b37d9 | 539 | gpc_reg_operand (op, mode) |
9878760c RK |
540 | register rtx op; |
541 | enum machine_mode mode; | |
542 | { | |
543 | return (register_operand (op, mode) | |
802a0058 MM |
544 | && (GET_CODE (op) != REG |
545 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
546 | || REGNO (op) < 64)); | |
9878760c RK |
547 | } |
548 | ||
549 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
550 | CR field. */ | |
551 | ||
552 | int | |
553 | cc_reg_operand (op, mode) | |
554 | register rtx op; | |
555 | enum machine_mode mode; | |
556 | { | |
557 | return (register_operand (op, mode) | |
558 | && (GET_CODE (op) != REG | |
559 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
560 | || CR_REGNO_P (REGNO (op)))); | |
561 | } | |
562 | ||
815cdc52 MM |
563 | /* Returns 1 if OP is either a pseudo-register or a register denoting a |
564 | CR field that isn't CR0. */ | |
565 | ||
566 | int | |
567 | cc_reg_not_cr0_operand (op, mode) | |
568 | register rtx op; | |
569 | enum machine_mode mode; | |
570 | { | |
571 | return (register_operand (op, mode) | |
572 | && (GET_CODE (op) != REG | |
573 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
574 | || CR_REGNO_NOT_CR0_P (REGNO (op)))); | |
575 | } | |
576 | ||
9878760c RK |
577 | /* Returns 1 if OP is either a constant integer valid for a D-field or a |
578 | non-special register. If a register, it must be in the proper mode unless | |
579 | MODE is VOIDmode. */ | |
580 | ||
581 | int | |
582 | reg_or_short_operand (op, mode) | |
583 | register rtx op; | |
584 | enum machine_mode mode; | |
585 | { | |
f5a28898 | 586 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
587 | } |
588 | ||
589 | /* Similar, except check if the negation of the constant would be valid for | |
590 | a D-field. */ | |
591 | ||
592 | int | |
593 | reg_or_neg_short_operand (op, mode) | |
594 | register rtx op; | |
595 | enum machine_mode mode; | |
596 | { | |
597 | if (GET_CODE (op) == CONST_INT) | |
598 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
599 | ||
cd2b37d9 | 600 | return gpc_reg_operand (op, mode); |
9878760c RK |
601 | } |
602 | ||
603 | /* Return 1 if the operand is either a register or an integer whose high-order | |
604 | 16 bits are zero. */ | |
605 | ||
606 | int | |
607 | reg_or_u_short_operand (op, mode) | |
608 | register rtx op; | |
609 | enum machine_mode mode; | |
610 | { | |
e675f625 | 611 | return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
612 | } |
613 | ||
614 | /* Return 1 is the operand is either a non-special register or ANY | |
615 | constant integer. */ | |
616 | ||
617 | int | |
618 | reg_or_cint_operand (op, mode) | |
619 | register rtx op; | |
620 | enum machine_mode mode; | |
621 | { | |
e675f625 | 622 | return (GET_CODE (op) == CONST_INT |
e675f625 | 623 | || gpc_reg_operand (op, mode)); |
9878760c RK |
624 | } |
625 | ||
766a866c MM |
626 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
627 | ||
628 | int | |
629 | got_operand (op, mode) | |
630 | register rtx op; | |
296b8152 | 631 | enum machine_mode mode ATTRIBUTE_UNUSED; |
766a866c MM |
632 | { |
633 | return (GET_CODE (op) == SYMBOL_REF | |
634 | || GET_CODE (op) == CONST | |
635 | || GET_CODE (op) == LABEL_REF); | |
636 | } | |
637 | ||
38c1f2d7 MM |
638 | /* Return 1 if the operand is a simple references that can be loaded via |
639 | the GOT (labels involving addition aren't allowed). */ | |
640 | ||
641 | int | |
642 | got_no_const_operand (op, mode) | |
643 | register rtx op; | |
296b8152 | 644 | enum machine_mode mode ATTRIBUTE_UNUSED; |
38c1f2d7 MM |
645 | { |
646 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
647 | } | |
648 | ||
4e74d8ec MM |
649 | /* Return the number of instructions it takes to form a constant in an |
650 | integer register. */ | |
651 | ||
652 | static int | |
653 | num_insns_constant_wide (value) | |
654 | HOST_WIDE_INT value; | |
655 | { | |
656 | /* signed constant loadable with {cal|addi} */ | |
657 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
658 | return 1; | |
659 | ||
660 | #if HOST_BITS_PER_WIDE_INT == 32 | |
661 | /* constant loadable with {cau|addis} */ | |
662 | else if ((value & 0xffff) == 0) | |
663 | return 1; | |
664 | ||
665 | #else | |
666 | /* constant loadable with {cau|addis} */ | |
667 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) | |
668 | return 1; | |
669 | ||
670 | else if (TARGET_64BIT) | |
671 | { | |
672 | HOST_WIDE_INT low = value & 0xffffffff; | |
673 | HOST_WIDE_INT high = value >> 32; | |
674 | ||
675 | if (high == 0 && (low & 0x80000000) == 0) | |
676 | return 2; | |
677 | ||
678 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
679 | return 2; | |
680 | ||
681 | else if (!low) | |
682 | return num_insns_constant_wide (high) + 1; | |
683 | ||
684 | else | |
685 | return (num_insns_constant_wide (high) | |
e396202a | 686 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
687 | } |
688 | #endif | |
689 | ||
690 | else | |
691 | return 2; | |
692 | } | |
693 | ||
694 | int | |
695 | num_insns_constant (op, mode) | |
696 | rtx op; | |
697 | enum machine_mode mode; | |
698 | { | |
4e74d8ec MM |
699 | if (GET_CODE (op) == CONST_INT) |
700 | return num_insns_constant_wide (INTVAL (op)); | |
701 | ||
6fc48950 MM |
702 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
703 | { | |
704 | long l; | |
705 | REAL_VALUE_TYPE rv; | |
706 | ||
707 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
708 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
709 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
710 | } | |
711 | ||
47ad8c61 | 712 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 713 | { |
47ad8c61 MM |
714 | HOST_WIDE_INT low; |
715 | HOST_WIDE_INT high; | |
716 | long l[2]; | |
717 | REAL_VALUE_TYPE rv; | |
718 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 719 | |
47ad8c61 MM |
720 | if (mode == VOIDmode || mode == DImode) |
721 | { | |
722 | high = CONST_DOUBLE_HIGH (op); | |
723 | low = CONST_DOUBLE_LOW (op); | |
724 | } | |
725 | else | |
726 | { | |
727 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
728 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
729 | high = l[endian]; | |
730 | low = l[1 - endian]; | |
731 | } | |
4e74d8ec | 732 | |
47ad8c61 MM |
733 | if (TARGET_32BIT) |
734 | return (num_insns_constant_wide (low) | |
735 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
736 | |
737 | else | |
47ad8c61 MM |
738 | { |
739 | if (high == 0 && (low & 0x80000000) == 0) | |
740 | return num_insns_constant_wide (low); | |
741 | ||
742 | else if (((high & 0xffffffff) == 0xffffffff) | |
743 | && ((low & 0x80000000) != 0)) | |
744 | return num_insns_constant_wide (low); | |
745 | ||
a260abc9 DE |
746 | else if (mask64_operand (op, mode)) |
747 | return 2; | |
748 | ||
47ad8c61 MM |
749 | else if (low == 0) |
750 | return num_insns_constant_wide (high) + 1; | |
751 | ||
752 | else | |
753 | return (num_insns_constant_wide (high) | |
754 | + num_insns_constant_wide (low) + 1); | |
755 | } | |
4e74d8ec MM |
756 | } |
757 | ||
758 | else | |
759 | abort (); | |
760 | } | |
761 | ||
6f2f8311 RK |
762 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
763 | with one instruction per word. We only do this if we can safely read | |
764 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
765 | |
766 | int | |
767 | easy_fp_constant (op, mode) | |
768 | register rtx op; | |
769 | register enum machine_mode mode; | |
770 | { | |
9878760c RK |
771 | if (GET_CODE (op) != CONST_DOUBLE |
772 | || GET_MODE (op) != mode | |
4e74d8ec | 773 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
774 | return 0; |
775 | ||
b6c9286a | 776 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 777 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
778 | return 1; |
779 | ||
a7273471 MM |
780 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
781 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
782 | return 0; | |
783 | ||
5ae4759c MM |
784 | #ifdef TARGET_RELOCATABLE |
785 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
786 | if (TARGET_RELOCATABLE) | |
787 | return 0; | |
788 | #endif | |
789 | ||
042259f2 DE |
790 | if (mode == DFmode) |
791 | { | |
792 | long k[2]; | |
793 | REAL_VALUE_TYPE rv; | |
794 | ||
795 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
796 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 797 | |
4e74d8ec MM |
798 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
799 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 800 | } |
4e74d8ec MM |
801 | |
802 | else if (mode == SFmode) | |
042259f2 DE |
803 | { |
804 | long l; | |
805 | REAL_VALUE_TYPE rv; | |
806 | ||
807 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
808 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 809 | |
4e74d8ec | 810 | return num_insns_constant_wide (l) == 1; |
042259f2 | 811 | } |
4e74d8ec | 812 | |
a260abc9 DE |
813 | else if (mode == DImode) |
814 | return ((TARGET_64BIT | |
815 | && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) | |
816 | || (num_insns_constant (op, DImode) <= 2)); | |
4e74d8ec MM |
817 | |
818 | else | |
819 | abort (); | |
9878760c | 820 | } |
8f75773e | 821 | |
b6c9286a MM |
822 | /* Return 1 if the operand is in volatile memory. Note that during the |
823 | RTL generation phase, memory_operand does not return TRUE for | |
824 | volatile memory references. So this function allows us to | |
825 | recognize volatile references where its safe. */ | |
826 | ||
827 | int | |
828 | volatile_mem_operand (op, mode) | |
829 | register rtx op; | |
830 | enum machine_mode mode; | |
831 | { | |
832 | if (GET_CODE (op) != MEM) | |
833 | return 0; | |
834 | ||
835 | if (!MEM_VOLATILE_P (op)) | |
836 | return 0; | |
837 | ||
838 | if (mode != GET_MODE (op)) | |
839 | return 0; | |
840 | ||
841 | if (reload_completed) | |
842 | return memory_operand (op, mode); | |
843 | ||
844 | if (reload_in_progress) | |
845 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
846 | ||
847 | return memory_address_p (mode, XEXP (op, 0)); | |
848 | } | |
849 | ||
97f6e72f | 850 | /* Return 1 if the operand is an offsettable memory operand. */ |
914c2e77 RK |
851 | |
852 | int | |
97f6e72f | 853 | offsettable_mem_operand (op, mode) |
914c2e77 RK |
854 | register rtx op; |
855 | enum machine_mode mode; | |
856 | { | |
97f6e72f | 857 | return ((GET_CODE (op) == MEM) |
677a9668 | 858 | && offsettable_address_p (reload_completed || reload_in_progress, |
97f6e72f | 859 | mode, XEXP (op, 0))); |
914c2e77 RK |
860 | } |
861 | ||
9878760c RK |
862 | /* Return 1 if the operand is either an easy FP constant (see above) or |
863 | memory. */ | |
864 | ||
865 | int | |
866 | mem_or_easy_const_operand (op, mode) | |
867 | register rtx op; | |
868 | enum machine_mode mode; | |
869 | { | |
870 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
871 | } | |
872 | ||
873 | /* Return 1 if the operand is either a non-special register or an item | |
874 | that can be used as the operand of an SI add insn. */ | |
875 | ||
876 | int | |
877 | add_operand (op, mode) | |
878 | register rtx op; | |
879 | enum machine_mode mode; | |
880 | { | |
881 | return (reg_or_short_operand (op, mode) | |
19684119 DE |
882 | || (GET_CODE (op) == CONST_INT |
883 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0)); | |
9878760c RK |
884 | } |
885 | ||
dcfedcd0 RK |
886 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
887 | ||
888 | int | |
889 | non_add_cint_operand (op, mode) | |
890 | register rtx op; | |
296b8152 | 891 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
892 | { |
893 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 894 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
19684119 | 895 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); |
dcfedcd0 RK |
896 | } |
897 | ||
9878760c RK |
898 | /* Return 1 if the operand is a non-special register or a constant that |
899 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
900 | ||
901 | int | |
902 | logical_operand (op, mode) | |
903 | register rtx op; | |
904 | enum machine_mode mode; | |
905 | { | |
cd2b37d9 | 906 | return (gpc_reg_operand (op, mode) |
9878760c | 907 | || (GET_CODE (op) == CONST_INT |
a260abc9 | 908 | && ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0 |
19684119 | 909 | || (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0))); |
9878760c RK |
910 | } |
911 | ||
dcfedcd0 RK |
912 | /* Return 1 if C is a constant that is not a logical operand (as |
913 | above). */ | |
914 | ||
915 | int | |
916 | non_logical_cint_operand (op, mode) | |
917 | register rtx op; | |
296b8152 | 918 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
919 | { |
920 | return (GET_CODE (op) == CONST_INT | |
a260abc9 | 921 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0 |
19684119 | 922 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); |
dcfedcd0 RK |
923 | } |
924 | ||
19ba8161 | 925 | /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the |
9878760c RK |
926 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. |
927 | Reject all ones and all zeros, since these should have been optimized | |
928 | away and confuse the making of MB and ME. */ | |
929 | ||
930 | int | |
19ba8161 DE |
931 | mask_operand (op, mode) |
932 | register rtx op; | |
933 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c | 934 | { |
19ba8161 | 935 | HOST_WIDE_INT c; |
9878760c RK |
936 | int i; |
937 | int last_bit_value; | |
938 | int transitions = 0; | |
939 | ||
19ba8161 DE |
940 | if (GET_CODE (op) != CONST_INT) |
941 | return 0; | |
942 | ||
943 | c = INTVAL (op); | |
944 | ||
9878760c RK |
945 | if (c == 0 || c == ~0) |
946 | return 0; | |
947 | ||
948 | last_bit_value = c & 1; | |
949 | ||
950 | for (i = 1; i < 32; i++) | |
951 | if (((c >>= 1) & 1) != last_bit_value) | |
952 | last_bit_value ^= 1, transitions++; | |
953 | ||
954 | return transitions <= 2; | |
955 | } | |
956 | ||
a260abc9 DE |
957 | /* Return 1 if the operand is a constant that is a PowerPC64 mask. |
958 | It is if there are no more than one 1->0 or 0->1 transitions. | |
959 | Reject all ones and all zeros, since these should have been optimized | |
960 | away and confuse the making of MB and ME. */ | |
9878760c RK |
961 | |
962 | int | |
a260abc9 DE |
963 | mask64_operand (op, mode) |
964 | register rtx op; | |
965 | enum machine_mode mode; | |
966 | { | |
967 | if (GET_CODE (op) == CONST_INT) | |
968 | { | |
969 | HOST_WIDE_INT c = INTVAL (op); | |
970 | int i; | |
971 | int last_bit_value; | |
972 | int transitions = 0; | |
973 | ||
974 | if (c == 0 || c == ~0) | |
975 | return 0; | |
976 | ||
977 | last_bit_value = c & 1; | |
978 | ||
979 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
980 | if (((c >>= 1) & 1) != last_bit_value) | |
981 | last_bit_value ^= 1, transitions++; | |
982 | ||
a238cd8b | 983 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
984 | /* Consider CONST_INT sign-extended. */ |
985 | transitions += (last_bit_value != 1); | |
986 | #endif | |
987 | ||
988 | return transitions <= 1; | |
989 | } | |
990 | else if (GET_CODE (op) == CONST_DOUBLE | |
991 | && (mode == VOIDmode || mode == DImode)) | |
992 | { | |
993 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
a238cd8b | 994 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
995 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); |
996 | #endif | |
997 | int i; | |
998 | int last_bit_value; | |
999 | int transitions = 0; | |
1000 | ||
1001 | if ((low == 0 | |
a238cd8b | 1002 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1003 | && high == 0 |
1004 | #endif | |
1005 | ) | |
1006 | || (low == ~0 | |
a238cd8b | 1007 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1008 | && high == ~0 |
1009 | #endif | |
1010 | )) | |
1011 | return 0; | |
1012 | ||
1013 | last_bit_value = low & 1; | |
1014 | ||
1015 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1016 | if (((low >>= 1) & 1) != last_bit_value) | |
1017 | last_bit_value ^= 1, transitions++; | |
1018 | ||
a238cd8b | 1019 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1020 | if ((high & 1) != last_bit_value) |
1021 | last_bit_value ^= 1, transitions++; | |
1022 | ||
1023 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1024 | if (((high >>= 1) & 1) != last_bit_value) | |
1025 | last_bit_value ^= 1, transitions++; | |
1026 | #endif | |
1027 | ||
1028 | return transitions <= 1; | |
1029 | } | |
1030 | else | |
1031 | return 0; | |
1032 | } | |
1033 | ||
1034 | /* Return 1 if the operand is either a non-special register or a constant | |
1035 | that can be used as the operand of a PowerPC64 logical AND insn. */ | |
1036 | ||
1037 | int | |
1038 | and64_operand (op, mode) | |
9878760c RK |
1039 | register rtx op; |
1040 | enum machine_mode mode; | |
1041 | { | |
52d3af72 DE |
1042 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1043 | return (gpc_reg_operand (op, mode) || mask64_operand (op, mode)); | |
1044 | ||
1045 | return (logical_operand (op, mode) || mask64_operand (op, mode)); | |
9878760c RK |
1046 | } |
1047 | ||
a260abc9 DE |
1048 | /* Return 1 if the operand is either a non-special register or a |
1049 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
dcfedcd0 RK |
1050 | |
1051 | int | |
a260abc9 DE |
1052 | and_operand (op, mode) |
1053 | register rtx op; | |
1054 | enum machine_mode mode; | |
dcfedcd0 | 1055 | { |
52d3af72 DE |
1056 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1057 | return (gpc_reg_operand (op, mode) || mask_operand (op, mode)); | |
1058 | ||
1059 | return (logical_operand (op, mode) || mask_operand (op, mode)); | |
dcfedcd0 RK |
1060 | } |
1061 | ||
9878760c RK |
1062 | /* Return 1 if the operand is a general register or memory operand. */ |
1063 | ||
1064 | int | |
1065 | reg_or_mem_operand (op, mode) | |
1066 | register rtx op; | |
1067 | register enum machine_mode mode; | |
1068 | { | |
b6c9286a MM |
1069 | return (gpc_reg_operand (op, mode) |
1070 | || memory_operand (op, mode) | |
1071 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
1072 | } |
1073 | ||
a7a813f7 RK |
1074 | /* Return 1 if the operand is a general register or memory operand without |
1075 | pre-inc or pre_dec which produces invalid form of PowerPC lwa | |
1076 | instruction. */ | |
1077 | ||
1078 | int | |
1079 | lwa_operand (op, mode) | |
1080 | register rtx op; | |
1081 | register enum machine_mode mode; | |
1082 | { | |
1083 | rtx inner = op; | |
1084 | ||
1085 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
1086 | inner = SUBREG_REG (inner); | |
1087 | ||
1088 | return gpc_reg_operand (inner, mode) | |
1089 | || (memory_operand (inner, mode) | |
1090 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
1091 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
1092 | } | |
1093 | ||
9878760c RK |
1094 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
1095 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
1096 | forced to lr. */ | |
1097 | ||
1098 | int | |
1099 | call_operand (op, mode) | |
1100 | register rtx op; | |
1101 | enum machine_mode mode; | |
1102 | { | |
1103 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
1104 | return 0; | |
1105 | ||
1106 | return (GET_CODE (op) == SYMBOL_REF | |
1107 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
1108 | } | |
1109 | ||
2af3d377 RK |
1110 | |
1111 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
1112 | this file. */ | |
1113 | ||
1114 | int | |
1115 | current_file_function_operand (op, mode) | |
1116 | register rtx op; | |
296b8152 | 1117 | enum machine_mode mode ATTRIBUTE_UNUSED; |
2af3d377 RK |
1118 | { |
1119 | return (GET_CODE (op) == SYMBOL_REF | |
1120 | && (SYMBOL_REF_FLAG (op) | |
1121 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
1122 | } | |
1123 | ||
1124 | ||
9878760c RK |
1125 | /* Return 1 if this operand is a valid input for a move insn. */ |
1126 | ||
1127 | int | |
1128 | input_operand (op, mode) | |
1129 | register rtx op; | |
1130 | enum machine_mode mode; | |
1131 | { | |
eb4e8003 | 1132 | /* Memory is always valid. */ |
9878760c RK |
1133 | if (memory_operand (op, mode)) |
1134 | return 1; | |
1135 | ||
34792e82 | 1136 | /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */ |
01b4cf2b | 1137 | if (GET_CODE (op) == CONSTANT_P_RTX) |
34792e82 JL |
1138 | return 1; |
1139 | ||
eb4e8003 RK |
1140 | /* For floating-point, easy constants are valid. */ |
1141 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1142 | && CONSTANT_P (op) | |
1143 | && easy_fp_constant (op, mode)) | |
1144 | return 1; | |
1145 | ||
4e74d8ec MM |
1146 | /* Allow any integer constant. */ |
1147 | if (GET_MODE_CLASS (mode) == MODE_INT | |
e675f625 | 1148 | && (GET_CODE (op) == CONST_INT |
e675f625 | 1149 | || GET_CODE (op) == CONST_DOUBLE)) |
4e74d8ec MM |
1150 | return 1; |
1151 | ||
eb4e8003 RK |
1152 | /* For floating-point or multi-word mode, the only remaining valid type |
1153 | is a register. */ | |
9878760c RK |
1154 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1155 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1156 | return register_operand (op, mode); |
9878760c | 1157 | |
88fe15a1 RK |
1158 | /* The only cases left are integral modes one word or smaller (we |
1159 | do not get called for MODE_CC values). These can be in any | |
1160 | register. */ | |
1161 | if (register_operand (op, mode)) | |
a8b3aeda | 1162 | return 1; |
88fe15a1 | 1163 | |
84cf9dda | 1164 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1165 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1166 | return 1; |
1167 | ||
b6c9286a MM |
1168 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1169 | directly in the instruction stream */ | |
1170 | if (DEFAULT_ABI == ABI_NT | |
1171 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1172 | return 1; | |
1173 | ||
88228c4b MM |
1174 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1175 | to be valid. */ | |
c81bebd7 | 1176 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1177 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1178 | && small_data_operand (op, Pmode)) | |
1179 | return 1; | |
1180 | ||
042259f2 | 1181 | return 0; |
9878760c | 1182 | } |
7509c759 MM |
1183 | |
1184 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1185 | ||
1186 | int | |
1187 | small_data_operand (op, mode) | |
296b8152 KG |
1188 | rtx op ATTRIBUTE_UNUSED; |
1189 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
7509c759 | 1190 | { |
38c1f2d7 | 1191 | #if TARGET_ELF |
7509c759 MM |
1192 | rtx sym_ref, const_part; |
1193 | ||
d9407988 | 1194 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1195 | return 0; |
a54d04b7 | 1196 | |
5b9d9a0c | 1197 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1198 | return 0; |
1199 | ||
88228c4b MM |
1200 | if (GET_CODE (op) == SYMBOL_REF) |
1201 | sym_ref = op; | |
1202 | ||
1203 | else if (GET_CODE (op) != CONST | |
1204 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1205 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1206 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1207 | return 0; |
1208 | ||
88228c4b | 1209 | else |
dbf55e53 MM |
1210 | { |
1211 | rtx sum = XEXP (op, 0); | |
1212 | HOST_WIDE_INT summand; | |
1213 | ||
1214 | /* We have to be careful here, because it is the referenced address | |
1215 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1216 | summand = INTVAL (XEXP (sum, 1)); | |
1217 | if (summand < 0 || summand > g_switch_value) | |
1218 | return 0; | |
1219 | ||
1220 | sym_ref = XEXP (sum, 0); | |
1221 | } | |
88228c4b MM |
1222 | |
1223 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1224 | return 0; |
1225 | ||
1226 | return 1; | |
d9407988 MM |
1227 | |
1228 | #else | |
1229 | return 0; | |
1230 | #endif | |
7509c759 MM |
1231 | } |
1232 | ||
4697a36c MM |
1233 | \f |
1234 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1235 | for a call to a function whose data type is FNTYPE. | |
1236 | For a library call, FNTYPE is 0. | |
1237 | ||
1238 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1239 | so we never return a PARALLEL. */ |
4697a36c MM |
1240 | |
1241 | void | |
1242 | init_cumulative_args (cum, fntype, libname, incoming) | |
1243 | CUMULATIVE_ARGS *cum; | |
1244 | tree fntype; | |
296b8152 | 1245 | rtx libname ATTRIBUTE_UNUSED; |
4697a36c MM |
1246 | int incoming; |
1247 | { | |
1248 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1249 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1250 | |
1251 | *cum = zero_cumulative; | |
1252 | cum->words = 0; | |
1253 | cum->fregno = FP_ARG_MIN_REG; | |
1254 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1255 | cum->call_cookie = CALL_NORMAL; |
4697a36c MM |
1256 | |
1257 | if (incoming) | |
bd227acc | 1258 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
4697a36c MM |
1259 | |
1260 | else if (cum->prototype) | |
1261 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1262 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1263 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1264 | ||
1265 | else | |
1266 | cum->nargs_prototype = 0; | |
1267 | ||
1268 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1269 | |
1270 | /* Check for DLL import functions */ | |
1271 | if (abi == ABI_NT | |
1272 | && fntype | |
1273 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1274 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1275 | ||
6a4cee5f MM |
1276 | /* Also check for longcall's */ |
1277 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1278 | cum->call_cookie = CALL_LONG; | |
1279 | ||
4697a36c MM |
1280 | if (TARGET_DEBUG_ARG) |
1281 | { | |
1282 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1283 | if (fntype) | |
1284 | { | |
1285 | tree ret_type = TREE_TYPE (fntype); | |
1286 | fprintf (stderr, " ret code = %s,", | |
1287 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1288 | } | |
1289 | ||
6a4cee5f | 1290 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1291 | fprintf (stderr, " dllimport,"); |
4697a36c | 1292 | |
6a4cee5f MM |
1293 | if (cum->call_cookie & CALL_LONG) |
1294 | fprintf (stderr, " longcall,"); | |
1295 | ||
4697a36c MM |
1296 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1297 | cum->prototype, cum->nargs_prototype); | |
1298 | } | |
1299 | } | |
1300 | \f | |
c229cba9 DE |
1301 | /* If defined, a C expression which determines whether, and in which |
1302 | direction, to pad out an argument with extra space. The value | |
1303 | should be of type `enum direction': either `upward' to pad above | |
1304 | the argument, `downward' to pad below, or `none' to inhibit | |
1305 | padding. | |
1306 | ||
1307 | For the AIX ABI structs are always stored left shifted in their | |
1308 | argument slot. */ | |
1309 | ||
c4d38ccb | 1310 | int |
c229cba9 DE |
1311 | function_arg_padding (mode, type) |
1312 | enum machine_mode mode; | |
1313 | tree type; | |
1314 | { | |
c85f7c16 | 1315 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1316 | return (int)upward; |
c229cba9 DE |
1317 | |
1318 | /* This is the default definition. */ | |
1319 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1320 | ? (int)upward |
c229cba9 DE |
1321 | : ((mode == BLKmode |
1322 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1323 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1324 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1325 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1326 | } |
1327 | ||
b6c9286a MM |
1328 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1329 | of an argument with the specified mode and type. If it is not defined, | |
1330 | PARM_BOUNDARY is used for all arguments. | |
1331 | ||
e1f83b4d MM |
1332 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1333 | ||
2310f99a | 1334 | V.4 wants long longs to be double word aligned. */ |
b6c9286a MM |
1335 | |
1336 | int | |
1337 | function_arg_boundary (mode, type) | |
1338 | enum machine_mode mode; | |
1339 | tree type; | |
1340 | { | |
2310f99a | 1341 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode) |
e1f83b4d MM |
1342 | return 64; |
1343 | ||
b6c9286a MM |
1344 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1345 | return PARM_BOUNDARY; | |
1346 | ||
1347 | if (mode != BLKmode) | |
1348 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1349 | ||
1350 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1351 | } | |
1352 | \f | |
4697a36c MM |
1353 | /* Update the data in CUM to advance over an argument |
1354 | of mode MODE and data type TYPE. | |
1355 | (TYPE is null for libcalls where that information may not be available.) */ | |
1356 | ||
1357 | void | |
1358 | function_arg_advance (cum, mode, type, named) | |
1359 | CUMULATIVE_ARGS *cum; | |
1360 | enum machine_mode mode; | |
1361 | tree type; | |
1362 | int named; | |
1363 | { | |
a260abc9 DE |
1364 | int align = (TARGET_32BIT && (cum->words & 1) != 0 |
1365 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
b6c9286a | 1366 | cum->words += align; |
4697a36c MM |
1367 | cum->nargs_prototype--; |
1368 | ||
c81bebd7 | 1369 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1370 | { |
1371 | /* Long longs must not be split between registers and stack */ | |
1372 | if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) | |
1373 | && type && !AGGREGATE_TYPE_P (type) | |
1374 | && cum->words < GP_ARG_NUM_REG | |
1375 | && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) | |
1376 | { | |
1377 | cum->words = GP_ARG_NUM_REG; | |
1378 | } | |
1379 | ||
1380 | /* Aggregates get passed as pointers */ | |
1381 | if (type && AGGREGATE_TYPE_P (type)) | |
1382 | cum->words++; | |
1383 | ||
1384 | /* Floats go in registers, & don't occupy space in the GP registers | |
1385 | like they do for AIX unless software floating point. */ | |
1386 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1387 | && TARGET_HARD_FLOAT | |
1388 | && cum->fregno <= FP_ARG_V4_MAX_REG) | |
1389 | cum->fregno++; | |
1390 | ||
1391 | else | |
1392 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1393 | } | |
1394 | else | |
4697a36c MM |
1395 | if (named) |
1396 | { | |
1397 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1398 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1399 | cum->fregno++; | |
1400 | } | |
1401 | ||
1402 | if (TARGET_DEBUG_ARG) | |
1403 | fprintf (stderr, | |
b6c9286a MM |
1404 | "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1405 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1406 | } |
1407 | \f | |
1408 | /* Determine where to put an argument to a function. | |
1409 | Value is zero to push the argument on the stack, | |
1410 | or a hard register in which to store the argument. | |
1411 | ||
1412 | MODE is the argument's machine mode. | |
1413 | TYPE is the data type of the argument (as a tree). | |
1414 | This is null for libcalls where that information may | |
1415 | not be available. | |
1416 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1417 | the preceding args and about the function being called. | |
1418 | NAMED is nonzero if this argument is a named parameter | |
1419 | (otherwise it is an extra parameter matching an ellipsis). | |
1420 | ||
1421 | On RS/6000 the first eight words of non-FP are normally in registers | |
1422 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1423 | Under V.4, the first 8 FP args are in registers. | |
1424 | ||
1425 | If this is floating-point and no prototype is specified, we use | |
1426 | both an FP and integer register (or possibly FP reg and stack). Library | |
1427 | functions (when TYPE is zero) always have the proper types for args, | |
1428 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1429 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1430 | |
1431 | struct rtx_def * | |
1432 | function_arg (cum, mode, type, named) | |
1433 | CUMULATIVE_ARGS *cum; | |
1434 | enum machine_mode mode; | |
1435 | tree type; | |
1436 | int named; | |
1437 | { | |
a260abc9 DE |
1438 | int align = (TARGET_32BIT && (cum->words & 1) != 0 |
1439 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
b6c9286a MM |
1440 | int align_words = cum->words + align; |
1441 | ||
4697a36c MM |
1442 | if (TARGET_DEBUG_ARG) |
1443 | fprintf (stderr, | |
b6c9286a MM |
1444 | "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1445 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1446 | |
1447 | /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 | |
1448 | uses to say fp args were passed in registers. Assume that we don't need the | |
1449 | marker for software floating point, or compiler generated library calls. */ | |
1450 | if (mode == VOIDmode) | |
1451 | { | |
7509c759 MM |
1452 | enum rs6000_abi abi = DEFAULT_ABI; |
1453 | ||
c81bebd7 | 1454 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1455 | && TARGET_HARD_FLOAT |
1456 | && cum->nargs_prototype < 0 | |
4697a36c | 1457 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1458 | { |
6a4cee5f MM |
1459 | return GEN_INT (cum->call_cookie |
1460 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1461 | ? CALL_V4_SET_FP_ARGS | |
1462 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1463 | } |
4697a36c | 1464 | |
7509c759 | 1465 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1466 | } |
1467 | ||
1468 | if (!named) | |
1469 | { | |
c81bebd7 | 1470 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
4697a36c MM |
1471 | return NULL_RTX; |
1472 | } | |
1473 | ||
1474 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
1475 | return NULL_RTX; | |
1476 | ||
1477 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1478 | { | |
5b9d9a0c | 1479 | if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */ |
c81bebd7 | 1480 | || DEFAULT_ABI == ABI_SOLARIS |
5b9d9a0c MM |
1481 | || ! type |
1482 | || ((cum->nargs_prototype > 0) | |
1483 | /* IBM AIX extended its linkage convention definition always to | |
1484 | require FP args after register save area hole on the stack. */ | |
1485 | && (DEFAULT_ABI != ABI_AIX | |
1486 | || ! TARGET_XL_CALL | |
1487 | || (align_words < GP_ARG_NUM_REG)))) | |
39403d82 | 1488 | return gen_rtx_REG (mode, cum->fregno); |
4697a36c | 1489 | |
39403d82 | 1490 | return gen_rtx_PARALLEL (mode, |
1c20ae99 JW |
1491 | gen_rtvec |
1492 | (2, | |
39403d82 | 1493 | gen_rtx_EXPR_LIST (VOIDmode, |
1c20ae99 JW |
1494 | ((align_words >= GP_ARG_NUM_REG) |
1495 | ? NULL_RTX | |
1496 | : (align_words | |
1497 | + RS6000_ARG_SIZE (mode, type, named) | |
1498 | > GP_ARG_NUM_REG | |
1499 | /* If this is partially on the stack, then | |
1500 | we only include the portion actually | |
1501 | in registers here. */ | |
39403d82 | 1502 | ? gen_rtx_REG (SImode, |
1c20ae99 | 1503 | GP_ARG_MIN_REG + align_words) |
39403d82 | 1504 | : gen_rtx_REG (mode, |
1c20ae99 JW |
1505 | GP_ARG_MIN_REG + align_words))), |
1506 | const0_rtx), | |
39403d82 DE |
1507 | gen_rtx_EXPR_LIST (VOIDmode, |
1508 | gen_rtx_REG (mode, cum->fregno), | |
1c20ae99 | 1509 | const0_rtx))); |
4697a36c MM |
1510 | } |
1511 | ||
92dcf4c8 MM |
1512 | /* Long longs won't be split between register and stack; |
1513 | FP arguments get passed on the stack if they didn't get a register. */ | |
c81bebd7 | 1514 | else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && |
92dcf4c8 MM |
1515 | (align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG |
1516 | || (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT))) | |
4697a36c MM |
1517 | { |
1518 | return NULL_RTX; | |
1519 | } | |
4697a36c | 1520 | |
b6c9286a | 1521 | else if (align_words < GP_ARG_NUM_REG) |
39403d82 | 1522 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); |
4697a36c MM |
1523 | |
1524 | return NULL_RTX; | |
1525 | } | |
1526 | \f | |
1527 | /* For an arg passed partly in registers and partly in memory, | |
1528 | this is the number of registers used. | |
1529 | For args passed entirely in registers or entirely in memory, zero. */ | |
1530 | ||
1531 | int | |
1532 | function_arg_partial_nregs (cum, mode, type, named) | |
1533 | CUMULATIVE_ARGS *cum; | |
1534 | enum machine_mode mode; | |
1535 | tree type; | |
1536 | int named; | |
1537 | { | |
1538 | if (! named) | |
1539 | return 0; | |
1540 | ||
c81bebd7 | 1541 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1542 | return 0; |
4697a36c MM |
1543 | |
1544 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1545 | { | |
1546 | if (cum->nargs_prototype >= 0) | |
1547 | return 0; | |
1548 | } | |
1549 | ||
1550 | if (cum->words < GP_ARG_NUM_REG | |
1551 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1552 | { | |
1553 | int ret = GP_ARG_NUM_REG - cum->words; | |
1554 | if (ret && TARGET_DEBUG_ARG) | |
1555 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1556 | ||
1557 | return ret; | |
1558 | } | |
1559 | ||
1560 | return 0; | |
1561 | } | |
1562 | \f | |
1563 | /* A C expression that indicates when an argument must be passed by | |
1564 | reference. If nonzero for an argument, a copy of that argument is | |
1565 | made in memory and a pointer to the argument is passed instead of | |
1566 | the argument itself. The pointer is passed in whatever way is | |
1567 | appropriate for passing a pointer to that type. | |
1568 | ||
1569 | Under V.4, structures and unions are passed by reference. */ | |
1570 | ||
1571 | int | |
1572 | function_arg_pass_by_reference (cum, mode, type, named) | |
296b8152 KG |
1573 | CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; |
1574 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
4697a36c | 1575 | tree type; |
296b8152 | 1576 | int named ATTRIBUTE_UNUSED; |
4697a36c | 1577 | { |
c81bebd7 MM |
1578 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1579 | && type && AGGREGATE_TYPE_P (type)) | |
4697a36c MM |
1580 | { |
1581 | if (TARGET_DEBUG_ARG) | |
1582 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1583 | ||
1584 | return 1; | |
1585 | } | |
4697a36c MM |
1586 | |
1587 | return 0; | |
1588 | } | |
1589 | ||
1590 | \f | |
1591 | /* Perform any needed actions needed for a function that is receiving a | |
1592 | variable number of arguments. | |
1593 | ||
1594 | CUM is as above. | |
1595 | ||
1596 | MODE and TYPE are the mode and type of the current parameter. | |
1597 | ||
1598 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1599 | that must be pushed by the prolog to pretend that our caller pushed | |
1600 | it. | |
1601 | ||
1602 | Normally, this macro will push all remaining incoming registers on the | |
1603 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1604 | ||
1605 | void | |
1606 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1607 | CUMULATIVE_ARGS *cum; | |
1608 | enum machine_mode mode; | |
1609 | tree type; | |
1610 | int *pretend_size; | |
1611 | int no_rtl; | |
1612 | ||
1613 | { | |
1614 | rtx save_area = virtual_incoming_args_rtx; | |
a260abc9 | 1615 | int reg_size = TARGET_32BIT ? 4 : 8; |
4697a36c MM |
1616 | |
1617 | if (TARGET_DEBUG_ARG) | |
1618 | fprintf (stderr, | |
1619 | "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", | |
1620 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); | |
1621 | ||
60e2d0ca | 1622 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1623 | { |
1624 | rs6000_sysv_varargs_p = 1; | |
60e2d0ca | 1625 | if (! no_rtl) |
2c4974b7 | 1626 | save_area = plus_constant (virtual_stack_vars_rtx, |
bd227acc | 1627 | - RS6000_VARARGS_SIZE); |
4697a36c | 1628 | } |
60e2d0ca RK |
1629 | else |
1630 | rs6000_sysv_varargs_p = 0; | |
4697a36c MM |
1631 | |
1632 | if (cum->words < 8) | |
1633 | { | |
1634 | int first_reg_offset = cum->words; | |
1635 | ||
1636 | if (MUST_PASS_IN_STACK (mode, type)) | |
1637 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
1638 | ||
1639 | if (first_reg_offset > GP_ARG_NUM_REG) | |
1640 | first_reg_offset = GP_ARG_NUM_REG; | |
1641 | ||
1642 | if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) | |
1643 | move_block_from_reg | |
1644 | (GP_ARG_MIN_REG + first_reg_offset, | |
39403d82 | 1645 | gen_rtx_MEM (BLKmode, |
4697a36c MM |
1646 | plus_constant (save_area, first_reg_offset * reg_size)), |
1647 | GP_ARG_NUM_REG - first_reg_offset, | |
1648 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1649 | ||
1650 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; | |
1651 | } | |
1652 | ||
4697a36c | 1653 | /* Save FP registers if needed. */ |
c81bebd7 | 1654 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl) |
4697a36c MM |
1655 | { |
1656 | int fregno = cum->fregno; | |
1657 | int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; | |
1658 | ||
1659 | if (num_fp_reg >= 0) | |
1660 | { | |
39403d82 | 1661 | rtx cr1 = gen_rtx_REG (CCmode, 69); |
4697a36c MM |
1662 | rtx lab = gen_label_rtx (); |
1663 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
1664 | ||
39403d82 | 1665 | emit_jump_insn (gen_rtx_SET (VOIDmode, |
4697a36c | 1666 | pc_rtx, |
39403d82 DE |
1667 | gen_rtx_IF_THEN_ELSE (VOIDmode, |
1668 | gen_rtx_NE (VOIDmode, cr1, const0_rtx), | |
1669 | gen_rtx_LABEL_REF (VOIDmode, lab), | |
4697a36c MM |
1670 | pc_rtx))); |
1671 | ||
1672 | while ( num_fp_reg-- >= 0) | |
1673 | { | |
39403d82 DE |
1674 | emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)), |
1675 | gen_rtx_REG (DFmode, fregno++)); | |
4697a36c MM |
1676 | off += 8; |
1677 | } | |
1678 | ||
1679 | emit_label (lab); | |
1680 | } | |
1681 | } | |
4697a36c MM |
1682 | } |
1683 | \f | |
1684 | /* If defined, is a C expression that produces the machine-specific | |
1685 | code for a call to `__builtin_saveregs'. This code will be moved | |
1686 | to the very beginning of the function, before any parameter access | |
1687 | are made. The return value of this function should be an RTX that | |
1688 | contains the value to use as the return of `__builtin_saveregs'. | |
1689 | ||
1690 | The argument ARGS is a `tree_list' containing the arguments that | |
1691 | were passed to `__builtin_saveregs'. | |
1692 | ||
1693 | If this macro is not defined, the compiler will output an ordinary | |
1694 | call to the library function `__builtin_saveregs'. | |
1695 | ||
1696 | On the Power/PowerPC return the address of the area on the stack | |
1697 | used to hold arguments. Under AIX, this includes the 8 word register | |
2c4974b7 RH |
1698 | save area. |
1699 | ||
1700 | Under V.4, things are more complicated. We do not have access to | |
1701 | all of the virtual registers required for va_start to do its job, | |
1702 | so we construct the va_list in its entirity here, and reduce va_start | |
1703 | to a block copy. This is similar to the way we do things on Alpha. */ | |
4697a36c MM |
1704 | |
1705 | struct rtx_def * | |
1706 | expand_builtin_saveregs (args) | |
296b8152 | 1707 | tree args ATTRIBUTE_UNUSED; |
4697a36c | 1708 | { |
2c4974b7 RH |
1709 | rtx block, mem_gpr_fpr, mem_reg_save_area, mem_overflow, tmp; |
1710 | tree fntype; | |
1711 | int stdarg_p; | |
1712 | HOST_WIDE_INT words, gpr, fpr; | |
1713 | ||
1714 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) | |
1715 | return virtual_incoming_args_rtx; | |
1716 | ||
1717 | fntype = TREE_TYPE (current_function_decl); | |
1718 | stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 | |
1719 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) | |
1720 | != void_type_node)); | |
1721 | ||
1722 | /* Allocate the va_list constructor. */ | |
1723 | block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD); | |
1724 | RTX_UNCHANGING_P (block) = 1; | |
1725 | RTX_UNCHANGING_P (XEXP (block, 0)) = 1; | |
1726 | ||
1727 | mem_gpr_fpr = change_address (block, word_mode, XEXP (block, 0)); | |
1728 | mem_overflow = change_address (block, ptr_mode, | |
1729 | plus_constant (XEXP (block, 0), | |
1730 | UNITS_PER_WORD)); | |
1731 | mem_reg_save_area = change_address (block, ptr_mode, | |
1732 | plus_constant (XEXP (block, 0), | |
1733 | 2 * UNITS_PER_WORD)); | |
1734 | ||
1735 | /* Construct the two characters of `gpr' and `fpr' as a unit. */ | |
1736 | words = current_function_args_info.words - !stdarg_p; | |
1737 | gpr = (words > 8 ? 8 : words); | |
1738 | fpr = current_function_args_info.fregno - 33; | |
1739 | ||
1740 | if (BYTES_BIG_ENDIAN) | |
1741 | { | |
1742 | HOST_WIDE_INT bits = gpr << 8 | fpr; | |
1743 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD) | |
1744 | tmp = GEN_INT (bits << (BITS_PER_WORD - 16)); | |
1745 | else | |
1746 | { | |
1747 | bits <<= BITS_PER_WORD - HOST_BITS_PER_WIDE_INT - 16; | |
1748 | tmp = immed_double_const (0, bits, word_mode); | |
1749 | } | |
1750 | } | |
1751 | else | |
1752 | tmp = GEN_INT (fpr << 8 | gpr); | |
1753 | ||
1754 | emit_move_insn (mem_gpr_fpr, tmp); | |
1755 | ||
1756 | /* Find the overflow area. */ | |
1757 | if (words <= 8) | |
1758 | tmp = virtual_incoming_args_rtx; | |
1759 | else | |
1760 | tmp = expand_binop (Pmode, add_optab, virtual_incoming_args_rtx, | |
1761 | GEN_INT ((words - 8) * UNITS_PER_WORD), | |
1762 | mem_overflow, 0, OPTAB_WIDEN); | |
1763 | if (tmp != mem_overflow) | |
1764 | emit_move_insn (mem_overflow, tmp); | |
1765 | ||
1766 | /* Find the register save area. */ | |
1767 | tmp = expand_binop (Pmode, add_optab, virtual_stack_vars_rtx, | |
1768 | GEN_INT (-RS6000_VARARGS_SIZE), | |
1769 | mem_reg_save_area, 0, OPTAB_WIDEN); | |
1770 | if (tmp != mem_reg_save_area) | |
1771 | emit_move_insn (mem_reg_save_area, tmp); | |
1772 | ||
1773 | /* Return the address of the va_list constructor. */ | |
1774 | return XEXP (block, 0); | |
4697a36c MM |
1775 | } |
1776 | ||
5b5040b9 RK |
1777 | \f |
1778 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1779 | and other bits from an original memory reference. */ | |
1780 | ||
1781 | static rtx | |
1782 | expand_block_move_mem (mode, addr, orig_mem) | |
1783 | enum machine_mode mode; | |
1784 | rtx addr; | |
1785 | rtx orig_mem; | |
1786 | { | |
39403d82 | 1787 | rtx mem = gen_rtx_MEM (mode, addr); |
b6c9286a MM |
1788 | |
1789 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
c6df88cb | 1790 | MEM_COPY_ATTRIBUTES (mem, orig_mem); |
b6c9286a MM |
1791 | #ifdef MEM_UNALIGNED_P |
1792 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1793 | #endif | |
5b5040b9 RK |
1794 | return mem; |
1795 | } | |
1796 | ||
7e69e155 MM |
1797 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1798 | if we should let the compiler generate normal code. | |
1799 | ||
1800 | operands[0] is the destination | |
1801 | operands[1] is the source | |
1802 | operands[2] is the length | |
1803 | operands[3] is the alignment */ | |
1804 | ||
3933e0e1 MM |
1805 | #define MAX_MOVE_REG 4 |
1806 | ||
7e69e155 MM |
1807 | int |
1808 | expand_block_move (operands) | |
1809 | rtx operands[]; | |
1810 | { | |
b6c9286a MM |
1811 | rtx orig_dest = operands[0]; |
1812 | rtx orig_src = operands[1]; | |
7e69e155 | 1813 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1814 | rtx align_rtx = operands[3]; |
3933e0e1 | 1815 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1816 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1817 | int bytes; |
1818 | int offset; | |
1819 | int num_reg; | |
1820 | int i; | |
7e69e155 MM |
1821 | rtx src_reg; |
1822 | rtx dest_reg; | |
3933e0e1 MM |
1823 | rtx src_addr; |
1824 | rtx dest_addr; | |
7e69e155 | 1825 | rtx tmp_reg; |
3933e0e1 | 1826 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1827 | int move_bytes; |
1828 | ||
3933e0e1 MM |
1829 | /* If this is not a fixed size move, just call memcpy */ |
1830 | if (!constp) | |
1831 | return 0; | |
1832 | ||
7e69e155 | 1833 | /* Anything to move? */ |
3933e0e1 MM |
1834 | bytes = INTVAL (bytes_rtx); |
1835 | if (bytes <= 0) | |
7e69e155 MM |
1836 | return 1; |
1837 | ||
3933e0e1 MM |
1838 | /* Don't support real large moves. If string instructions are not used, |
1839 | then don't generate more than 8 loads. */ | |
1840 | if (TARGET_STRING) | |
1841 | { | |
1cab3be1 | 1842 | if (bytes > 4*8) |
3933e0e1 MM |
1843 | return 0; |
1844 | } | |
1845 | else if (!STRICT_ALIGNMENT) | |
1846 | { | |
1847 | if (bytes > 4*8) | |
1848 | return 0; | |
1849 | } | |
1850 | else if (bytes > 8*align) | |
7e69e155 MM |
1851 | return 0; |
1852 | ||
1853 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1854 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1855 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1856 | |
3933e0e1 | 1857 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1858 | { |
3933e0e1 | 1859 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1860 | { |
3933e0e1 MM |
1861 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1862 | && !fixed_regs[5] | |
1863 | && !fixed_regs[6] | |
1864 | && !fixed_regs[7] | |
1865 | && !fixed_regs[8] | |
1866 | && !fixed_regs[9] | |
1867 | && !fixed_regs[10] | |
1868 | && !fixed_regs[11] | |
1869 | && !fixed_regs[12]) | |
1870 | { | |
1871 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1872 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1873 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1874 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1875 | align_rtx)); |
3933e0e1 MM |
1876 | } |
1877 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1878 | && !fixed_regs[7] | |
1879 | && !fixed_regs[8] | |
1880 | && !fixed_regs[9] | |
1881 | && !fixed_regs[10] | |
1882 | && !fixed_regs[11] | |
1883 | && !fixed_regs[12]) | |
1884 | { | |
1885 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1886 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1887 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1888 | GEN_INT (move_bytes), |
4c64a852 | 1889 | align_rtx)); |
3933e0e1 MM |
1890 | } |
1891 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1892 | && !fixed_regs[9] | |
1893 | && !fixed_regs[10] | |
1894 | && !fixed_regs[11] | |
1895 | && !fixed_regs[12]) | |
1896 | { | |
1897 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1898 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1899 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1900 | GEN_INT (move_bytes), |
4c64a852 | 1901 | align_rtx)); |
3933e0e1 | 1902 | } |
d679bebf | 1903 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1904 | { /* move up to 8 bytes at a time */ |
1905 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1906 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1907 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1908 | GEN_INT (move_bytes), |
4c64a852 | 1909 | align_rtx)); |
3933e0e1 MM |
1910 | } |
1911 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1912 | { /* move 4 bytes */ | |
1913 | move_bytes = 4; | |
1914 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1915 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1916 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1917 | } |
1918 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1919 | { /* move 2 bytes */ | |
1920 | move_bytes = 2; | |
1921 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1922 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
1923 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1924 | } |
1925 | else if (bytes == 1) /* move 1 byte */ | |
1926 | { | |
1927 | move_bytes = 1; | |
1928 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1929 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
1930 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1931 | } |
1932 | else | |
1933 | { /* move up to 4 bytes at a time */ | |
1934 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
1935 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1936 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1937 | GEN_INT (move_bytes), |
4c64a852 | 1938 | align_rtx)); |
3933e0e1 | 1939 | } |
4c64a852 | 1940 | |
015892ee RK |
1941 | if (bytes > move_bytes) |
1942 | { | |
1943 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
1944 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
1945 | } | |
4c64a852 | 1946 | } |
3933e0e1 MM |
1947 | } |
1948 | ||
1949 | else /* string instructions not available */ | |
1950 | { | |
1951 | num_reg = offset = 0; | |
1952 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 1953 | { |
3933e0e1 MM |
1954 | /* Calculate the correct offset for src/dest */ |
1955 | if (offset == 0) | |
7e69e155 | 1956 | { |
3933e0e1 MM |
1957 | src_addr = src_reg; |
1958 | dest_addr = dest_reg; | |
1959 | } | |
1960 | else | |
1961 | { | |
39403d82 DE |
1962 | src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); |
1963 | dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); | |
3933e0e1 MM |
1964 | } |
1965 | ||
1966 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
1967 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
1968 | { | |
1969 | move_bytes = 8; | |
1970 | tmp_reg = gen_reg_rtx (DImode); | |
1971 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
1972 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
1973 | } | |
1974 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
1975 | { |
1976 | move_bytes = 4; | |
1977 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1978 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
1979 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1980 | } |
1981 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1982 | { | |
1983 | move_bytes = 2; | |
1984 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1985 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
1986 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1987 | } |
1988 | else | |
1989 | { | |
1990 | move_bytes = 1; | |
1991 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1992 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
1993 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1994 | } |
1995 | ||
1996 | if (num_reg >= MAX_MOVE_REG) | |
1997 | { | |
1998 | for (i = 0; i < num_reg; i++) | |
1999 | emit_insn (stores[i]); | |
2000 | num_reg = 0; | |
7e69e155 MM |
2001 | } |
2002 | } | |
3933e0e1 | 2003 | |
b6c9286a MM |
2004 | for (i = 0; i < num_reg; i++) |
2005 | emit_insn (stores[i]); | |
7e69e155 MM |
2006 | } |
2007 | ||
2008 | return 1; | |
2009 | } | |
2010 | ||
9878760c RK |
2011 | \f |
2012 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
2013 | PARALLEL and the first section will be tested. */ | |
2014 | ||
2015 | int | |
2016 | load_multiple_operation (op, mode) | |
2017 | rtx op; | |
296b8152 | 2018 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2019 | { |
2020 | int count = XVECLEN (op, 0); | |
2021 | int dest_regno; | |
2022 | rtx src_addr; | |
2023 | int i; | |
2024 | ||
2025 | /* Perform a quick check so we don't blow up below. */ | |
2026 | if (count <= 1 | |
2027 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2028 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
2029 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
2030 | return 0; | |
2031 | ||
2032 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
2033 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
2034 | ||
2035 | for (i = 1; i < count; i++) | |
2036 | { | |
2037 | rtx elt = XVECEXP (op, 0, i); | |
2038 | ||
2039 | if (GET_CODE (elt) != SET | |
2040 | || GET_CODE (SET_DEST (elt)) != REG | |
2041 | || GET_MODE (SET_DEST (elt)) != SImode | |
2042 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
2043 | || GET_CODE (SET_SRC (elt)) != MEM | |
2044 | || GET_MODE (SET_SRC (elt)) != SImode | |
2045 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
2046 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
2047 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
2048 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
2049 | return 0; | |
2050 | } | |
2051 | ||
2052 | return 1; | |
2053 | } | |
2054 | ||
2055 | /* Similar, but tests for store multiple. Here, the second vector element | |
2056 | is a CLOBBER. It will be tested later. */ | |
2057 | ||
2058 | int | |
2059 | store_multiple_operation (op, mode) | |
2060 | rtx op; | |
296b8152 | 2061 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2062 | { |
2063 | int count = XVECLEN (op, 0) - 1; | |
2064 | int src_regno; | |
2065 | rtx dest_addr; | |
2066 | int i; | |
2067 | ||
2068 | /* Perform a quick check so we don't blow up below. */ | |
2069 | if (count <= 1 | |
2070 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2071 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
2072 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
2073 | return 0; | |
2074 | ||
2075 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
2076 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
2077 | ||
2078 | for (i = 1; i < count; i++) | |
2079 | { | |
2080 | rtx elt = XVECEXP (op, 0, i + 1); | |
2081 | ||
2082 | if (GET_CODE (elt) != SET | |
2083 | || GET_CODE (SET_SRC (elt)) != REG | |
2084 | || GET_MODE (SET_SRC (elt)) != SImode | |
2085 | || REGNO (SET_SRC (elt)) != src_regno + i | |
2086 | || GET_CODE (SET_DEST (elt)) != MEM | |
2087 | || GET_MODE (SET_DEST (elt)) != SImode | |
2088 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
2089 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
2090 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
2091 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
2092 | return 0; | |
2093 | } | |
2094 | ||
2095 | return 1; | |
2096 | } | |
2097 | \f | |
2098 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
2099 | We only check the opcode against the mode of the CC value here. */ | |
2100 | ||
2101 | int | |
2102 | branch_comparison_operator (op, mode) | |
2103 | register rtx op; | |
296b8152 | 2104 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2105 | { |
2106 | enum rtx_code code = GET_CODE (op); | |
2107 | enum machine_mode cc_mode; | |
2108 | ||
2109 | if (GET_RTX_CLASS (code) != '<') | |
2110 | return 0; | |
2111 | ||
2112 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2113 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2114 | return 0; | |
2115 | ||
2116 | if ((code == GT || code == LT || code == GE || code == LE) | |
2117 | && cc_mode == CCUNSmode) | |
2118 | return 0; | |
2119 | ||
2120 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2121 | && (cc_mode != CCUNSmode)) | |
2122 | return 0; | |
2123 | ||
2124 | return 1; | |
2125 | } | |
2126 | ||
2127 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
2128 | We check the opcode against the mode of the CC value and disallow EQ or | |
2129 | NE comparisons for integers. */ | |
2130 | ||
2131 | int | |
2132 | scc_comparison_operator (op, mode) | |
2133 | register rtx op; | |
2134 | enum machine_mode mode; | |
2135 | { | |
2136 | enum rtx_code code = GET_CODE (op); | |
2137 | enum machine_mode cc_mode; | |
2138 | ||
2139 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
2140 | return 0; | |
2141 | ||
2142 | if (GET_RTX_CLASS (code) != '<') | |
2143 | return 0; | |
2144 | ||
2145 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2146 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2147 | return 0; | |
2148 | ||
2149 | if (code == NE && cc_mode != CCFPmode) | |
2150 | return 0; | |
2151 | ||
2152 | if ((code == GT || code == LT || code == GE || code == LE) | |
2153 | && cc_mode == CCUNSmode) | |
2154 | return 0; | |
2155 | ||
2156 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2157 | && (cc_mode != CCUNSmode)) | |
2158 | return 0; | |
2159 | ||
c5defebb RK |
2160 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
2161 | return 0; | |
2162 | ||
9878760c RK |
2163 | return 1; |
2164 | } | |
e0cd0770 JC |
2165 | |
2166 | int | |
2167 | trap_comparison_operator (op, mode) | |
2168 | rtx op; | |
2169 | enum machine_mode mode; | |
2170 | { | |
2171 | if (mode != VOIDmode && mode != GET_MODE (op)) | |
2172 | return 0; | |
2173 | return (GET_RTX_CLASS (GET_CODE (op)) == '<' | |
2174 | || GET_CODE (op) == EQ || GET_CODE (op) == NE); | |
2175 | } | |
9878760c RK |
2176 | \f |
2177 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
2178 | mask required to convert the result of a rotate insn into a shift | |
2179 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
2180 | ||
2181 | int | |
2182 | includes_lshift_p (shiftop, andop) | |
2183 | register rtx shiftop; | |
2184 | register rtx andop; | |
2185 | { | |
2186 | int shift_mask = (~0 << INTVAL (shiftop)); | |
2187 | ||
2188 | return (INTVAL (andop) & ~shift_mask) == 0; | |
2189 | } | |
2190 | ||
2191 | /* Similar, but for right shift. */ | |
2192 | ||
2193 | int | |
2194 | includes_rshift_p (shiftop, andop) | |
2195 | register rtx shiftop; | |
2196 | register rtx andop; | |
2197 | { | |
a7653a2c | 2198 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
2199 | |
2200 | shift_mask >>= INTVAL (shiftop); | |
2201 | ||
2202 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
2203 | } | |
35068b43 RK |
2204 | |
2205 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2206 | for lfq and stfq insns. | |
2207 | ||
2208 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2209 | abort if we are passed pseudo registers. */ | |
2210 | ||
2211 | int | |
2212 | registers_ok_for_quad_peep (reg1, reg2) | |
2213 | rtx reg1, reg2; | |
2214 | { | |
2215 | /* We might have been passed a SUBREG. */ | |
2216 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2217 | return 0; | |
2218 | ||
2219 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2220 | } | |
2221 | ||
2222 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2223 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2224 | ||
2225 | int | |
2226 | addrs_ok_for_quad_peep (addr1, addr2) | |
2227 | register rtx addr1; | |
2228 | register rtx addr2; | |
2229 | { | |
2230 | int reg1; | |
2231 | int offset1; | |
2232 | ||
2233 | /* Extract an offset (if used) from the first addr. */ | |
2234 | if (GET_CODE (addr1) == PLUS) | |
2235 | { | |
2236 | /* If not a REG, return zero. */ | |
2237 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2238 | return 0; | |
2239 | else | |
2240 | { | |
2241 | reg1 = REGNO (XEXP (addr1, 0)); | |
2242 | /* The offset must be constant! */ | |
2243 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2244 | return 0; | |
2245 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2246 | } | |
2247 | } | |
2248 | else if (GET_CODE (addr1) != REG) | |
2249 | return 0; | |
2250 | else | |
2251 | { | |
2252 | reg1 = REGNO (addr1); | |
2253 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2254 | offset1 = 0; | |
2255 | } | |
2256 | ||
2257 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2258 | if (GET_CODE (addr2) != PLUS) | |
2259 | return 0; | |
2260 | ||
2261 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2262 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2263 | return 0; | |
2264 | ||
2265 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2266 | return 0; | |
2267 | ||
2268 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2269 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2270 | return 0; | |
2271 | ||
2272 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2273 | instructions. */ | |
2274 | return 1; | |
2275 | } | |
9878760c RK |
2276 | \f |
2277 | /* Return the register class of a scratch register needed to copy IN into | |
2278 | or out of a register in CLASS in MODE. If it can be done directly, | |
2279 | NO_REGS is returned. */ | |
2280 | ||
2281 | enum reg_class | |
2282 | secondary_reload_class (class, mode, in) | |
2283 | enum reg_class class; | |
296b8152 | 2284 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2285 | rtx in; |
2286 | { | |
5accd822 | 2287 | int regno; |
9878760c | 2288 | |
1427100a | 2289 | /* We can not copy a symbolic operand directly into anything other than |
e7b7998a JL |
2290 | BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS |
2291 | is needed as an intermediate register. */ | |
2292 | if (TARGET_ELF | |
2293 | && class != BASE_REGS | |
2294 | && (GET_CODE (in) == SYMBOL_REF | |
2295 | || GET_CODE (in) == LABEL_REF | |
2296 | || GET_CODE (in) == CONST)) | |
2297 | return BASE_REGS; | |
2298 | ||
5accd822 DE |
2299 | if (GET_CODE (in) == REG) |
2300 | { | |
2301 | regno = REGNO (in); | |
2302 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2303 | { | |
2304 | regno = true_regnum (in); | |
2305 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2306 | regno = -1; | |
2307 | } | |
2308 | } | |
2309 | else if (GET_CODE (in) == SUBREG) | |
2310 | { | |
2311 | regno = true_regnum (in); | |
2312 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2313 | regno = -1; | |
2314 | } | |
2315 | else | |
2316 | regno = -1; | |
2317 | ||
9878760c RK |
2318 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS |
2319 | into anything. */ | |
2320 | if (class == GENERAL_REGS || class == BASE_REGS | |
2321 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2322 | return NO_REGS; | |
2323 | ||
2324 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2325 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2326 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2327 | return NO_REGS; | |
2328 | ||
2329 | /* We can copy among the CR registers. */ | |
2330 | if ((class == CR_REGS || class == CR0_REGS) | |
2331 | && regno >= 0 && CR_REGNO_P (regno)) | |
2332 | return NO_REGS; | |
2333 | ||
2334 | /* Otherwise, we need GENERAL_REGS. */ | |
2335 | return GENERAL_REGS; | |
2336 | } | |
2337 | \f | |
2338 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2339 | know this is a valid comparison. | |
2340 | ||
2341 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2342 | used instead of %C, so the bits will be in different places. | |
2343 | ||
b4ac57ab | 2344 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2345 | |
2346 | int | |
2347 | ccr_bit (op, scc_p) | |
2348 | register rtx op; | |
2349 | int scc_p; | |
2350 | { | |
2351 | enum rtx_code code = GET_CODE (op); | |
2352 | enum machine_mode cc_mode; | |
2353 | int cc_regnum; | |
2354 | int base_bit; | |
2355 | ||
2356 | if (GET_RTX_CLASS (code) != '<') | |
2357 | return -1; | |
2358 | ||
2359 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2360 | cc_regnum = REGNO (XEXP (op, 0)); | |
2361 | base_bit = 4 * (cc_regnum - 68); | |
2362 | ||
c5defebb RK |
2363 | /* In CCEQmode cases we have made sure that the result is always in the |
2364 | third bit of the CR field. */ | |
2365 | ||
2366 | if (cc_mode == CCEQmode) | |
2367 | return base_bit + 3; | |
2368 | ||
9878760c RK |
2369 | switch (code) |
2370 | { | |
2371 | case NE: | |
2372 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2373 | case EQ: | |
2374 | return base_bit + 2; | |
2375 | case GT: case GTU: | |
2376 | return base_bit + 1; | |
2377 | case LT: case LTU: | |
2378 | return base_bit; | |
2379 | ||
2380 | case GE: case GEU: | |
2381 | /* If floating-point, we will have done a cror to put the bit in the | |
2382 | unordered position. So test that bit. For integer, this is ! LT | |
2383 | unless this is an scc insn. */ | |
2384 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2385 | ||
2386 | case LE: case LEU: | |
2387 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2388 | ||
2389 | default: | |
2390 | abort (); | |
2391 | } | |
2392 | } | |
1ff7789b MM |
2393 | \f |
2394 | /* Return the GOT register, creating it if needed. */ | |
2395 | ||
2396 | struct rtx_def * | |
2397 | rs6000_got_register (value) | |
2398 | rtx value; | |
2399 | { | |
677a9668 | 2400 | if (! current_function_uses_pic_offset_table || ! pic_offset_table_rtx) |
1ff7789b | 2401 | { |
677a9668 DE |
2402 | if (no_new_pseudos) |
2403 | fatal_insn ("internal error -- needed new GOT register during reload phase to load:", | |
2404 | value); | |
1ff7789b MM |
2405 | |
2406 | current_function_uses_pic_offset_table = 1; | |
39403d82 | 2407 | pic_offset_table_rtx = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); |
1ff7789b MM |
2408 | } |
2409 | ||
2410 | return pic_offset_table_rtx; | |
2411 | } | |
2412 | ||
2413 | \f | |
956d6950 | 2414 | /* Replace all occurrences of register FROM with an new pseudo register in an insn X. |
1ff7789b MM |
2415 | Store the pseudo register used in REG. |
2416 | This is only safe during FINALIZE_PIC, since the registers haven't been setup | |
2417 | yet. */ | |
2418 | ||
2419 | static rtx | |
2420 | rs6000_replace_regno (x, from, reg) | |
2421 | rtx x; | |
2422 | int from; | |
2423 | rtx *reg; | |
2424 | { | |
2425 | register int i, j; | |
d330fd93 | 2426 | register const char *fmt; |
1ff7789b MM |
2427 | |
2428 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2429 | if (!x) | |
2430 | return x; | |
2431 | ||
2432 | switch (GET_CODE (x)) | |
2433 | { | |
2434 | case SCRATCH: | |
2435 | case PC: | |
2436 | case CC0: | |
2437 | case CONST_INT: | |
2438 | case CONST_DOUBLE: | |
2439 | case CONST: | |
2440 | case SYMBOL_REF: | |
2441 | case LABEL_REF: | |
2442 | return x; | |
2443 | ||
2444 | case REG: | |
2445 | if (REGNO (x) == from) | |
2446 | { | |
2447 | if (! *reg) | |
84f414bc | 2448 | *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode); |
1ff7789b MM |
2449 | |
2450 | return *reg; | |
2451 | } | |
2452 | ||
2453 | return x; | |
c4d38ccb MM |
2454 | |
2455 | default: | |
2456 | break; | |
1ff7789b MM |
2457 | } |
2458 | ||
2459 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2460 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2461 | { | |
2462 | if (fmt[i] == 'e') | |
2463 | XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg); | |
2464 | else if (fmt[i] == 'E') | |
2465 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2466 | XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg); | |
2467 | } | |
2468 | ||
2469 | return x; | |
2470 | } | |
2471 | ||
d266da75 MM |
2472 | \f |
2473 | /* By generating position-independent code, when two different | |
2474 | programs (A and B) share a common library (libC.a), the text of | |
2475 | the library can be shared whether or not the library is linked at | |
2476 | the same address for both programs. In some of these | |
2477 | environments, position-independent code requires not only the use | |
2478 | of different addressing modes, but also special code to enable the | |
2479 | use of these addressing modes. | |
2480 | ||
2481 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2482 | codes once the function is being compiled into assembly code, but | |
2483 | not before. (It is not done before, because in the case of | |
2484 | compiling an inline function, it would lead to multiple PIC | |
2485 | prologues being included in functions which used inline functions | |
2486 | and were compiled to assembly language.) */ | |
2487 | ||
2488 | void | |
2489 | rs6000_finalize_pic () | |
2490 | { | |
30ea98f1 | 2491 | /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM |
956d6950 | 2492 | with an appropriate pseudo register. If we find we need GOT/TOC, |
30ea98f1 MM |
2493 | add the appropriate init code. */ |
2494 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
d266da75 | 2495 | { |
30ea98f1 MM |
2496 | rtx insn = get_insns (); |
2497 | rtx reg = NULL_RTX; | |
2498 | rtx first_insn; | |
38c1f2d7 | 2499 | rtx last_insn = NULL_RTX; |
d266da75 | 2500 | |
30ea98f1 MM |
2501 | if (GET_CODE (insn) == NOTE) |
2502 | insn = next_nonnote_insn (insn); | |
d266da75 | 2503 | |
30ea98f1 MM |
2504 | first_insn = insn; |
2505 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2506 | { | |
2507 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1ff7789b | 2508 | { |
30ea98f1 MM |
2509 | PATTERN (insn) = rs6000_replace_regno (PATTERN (insn), |
2510 | GOT_TOC_REGNUM, | |
2511 | ®); | |
2512 | ||
2513 | if (REG_NOTES (insn)) | |
2514 | REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn), | |
1ff7789b MM |
2515 | GOT_TOC_REGNUM, |
2516 | ®); | |
1ff7789b | 2517 | } |
38c1f2d7 MM |
2518 | |
2519 | if (GET_CODE (insn) != NOTE) | |
2520 | last_insn = insn; | |
30ea98f1 | 2521 | } |
1ff7789b | 2522 | |
30ea98f1 MM |
2523 | if (reg) |
2524 | { | |
2525 | rtx init = gen_init_v4_pic (reg); | |
2526 | emit_insn_before (init, first_insn); | |
38c1f2d7 | 2527 | if (!optimize && last_insn) |
39403d82 | 2528 | emit_insn_after (gen_rtx_USE (VOIDmode, reg), last_insn); |
d266da75 MM |
2529 | } |
2530 | } | |
2531 | } | |
2532 | ||
30ea98f1 | 2533 | \f |
956d6950 | 2534 | /* Search for any occurrence of the GOT_TOC register marker that should |
30ea98f1 MM |
2535 | have been eliminated, but may have crept back in. */ |
2536 | ||
2537 | void | |
2538 | rs6000_reorg (insn) | |
2539 | rtx insn; | |
2540 | { | |
2541 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2542 | { | |
39403d82 | 2543 | rtx got_reg = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); |
30ea98f1 MM |
2544 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) |
2545 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2546 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2547 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2548 | } | |
2549 | } | |
2550 | ||
a7df97e6 MM |
2551 | \f |
2552 | /* Define the structure for the machine field in struct function. */ | |
2553 | struct machine_function | |
2554 | { | |
2555 | int sysv_varargs_p; | |
2556 | int save_toc_p; | |
2557 | int fpmem_size; | |
2558 | int fpmem_offset; | |
a04232e5 | 2559 | rtx pic_offset_table_rtx; |
a7df97e6 MM |
2560 | }; |
2561 | ||
2562 | /* Functions to save and restore rs6000_fpmem_size. | |
2563 | These will be called, via pointer variables, | |
2564 | from push_function_context and pop_function_context. */ | |
2565 | ||
2566 | void | |
2567 | rs6000_save_machine_status (p) | |
2568 | struct function *p; | |
2569 | { | |
2570 | struct machine_function *machine = | |
2571 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2572 | ||
2573 | p->machine = machine; | |
2574 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2575 | machine->fpmem_size = rs6000_fpmem_size; |
2576 | machine->fpmem_offset = rs6000_fpmem_offset; | |
a04232e5 | 2577 | machine->pic_offset_table_rtx = pic_offset_table_rtx; |
a7df97e6 MM |
2578 | } |
2579 | ||
2580 | void | |
2581 | rs6000_restore_machine_status (p) | |
2582 | struct function *p; | |
2583 | { | |
2584 | struct machine_function *machine = p->machine; | |
2585 | ||
2586 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2587 | rs6000_fpmem_size = machine->fpmem_size; |
2588 | rs6000_fpmem_offset = machine->fpmem_offset; | |
a04232e5 | 2589 | pic_offset_table_rtx = machine->pic_offset_table_rtx; |
a7df97e6 MM |
2590 | |
2591 | free (machine); | |
2592 | p->machine = (struct machine_function *)0; | |
2593 | } | |
2594 | ||
2595 | /* Do anything needed before RTL is emitted for each function. */ | |
2596 | ||
2597 | void | |
2598 | rs6000_init_expanders () | |
2599 | { | |
2600 | /* Reset varargs and save TOC indicator */ | |
2601 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2602 | rs6000_fpmem_size = 0; |
2603 | rs6000_fpmem_offset = 0; | |
2604 | pic_offset_table_rtx = (rtx)0; | |
2605 | ||
2606 | /* Arrange to save and restore machine status around nested functions. */ | |
2607 | save_machine_status = rs6000_save_machine_status; | |
2608 | restore_machine_status = rs6000_restore_machine_status; | |
2609 | } | |
2610 | ||
9878760c RK |
2611 | \f |
2612 | /* Print an operand. Recognize special options, documented below. */ | |
2613 | ||
38c1f2d7 | 2614 | #if TARGET_ELF |
d9407988 | 2615 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2616 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2617 | #else |
2618 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2619 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2620 | #endif |
2621 | ||
9878760c RK |
2622 | void |
2623 | print_operand (file, x, code) | |
2624 | FILE *file; | |
2625 | rtx x; | |
2626 | char code; | |
2627 | { | |
2628 | int i; | |
a260abc9 | 2629 | HOST_WIDE_INT val; |
9878760c RK |
2630 | |
2631 | /* These macros test for integers and extract the low-order bits. */ | |
2632 | #define INT_P(X) \ | |
2633 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2634 | && GET_MODE (X) == VOIDmode) | |
2635 | ||
2636 | #define INT_LOWPART(X) \ | |
2637 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2638 | ||
2639 | switch (code) | |
2640 | { | |
a8b3aeda | 2641 | case '.': |
a85d226b RK |
2642 | /* Write out an instruction after the call which may be replaced |
2643 | with glue code by the loader. This depends on the AIX version. */ | |
2644 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2645 | return; |
2646 | ||
cfaaaf2e RK |
2647 | case '*': |
2648 | /* Write the register number of the TOC register. */ | |
4697a36c | 2649 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); |
cfaaaf2e RK |
2650 | return; |
2651 | ||
c81bebd7 MM |
2652 | case '$': |
2653 | /* Write out either a '.' or '$' for the current location, depending | |
2654 | on whether this is Solaris or not. */ | |
2655 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2656 | return; | |
2657 | ||
9854d9ed RK |
2658 | case 'A': |
2659 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2660 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2661 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2662 | write a trash instruction. */ |
2663 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2664 | putc ('l', file); |
9854d9ed | 2665 | else |
76229ac8 | 2666 | putc ('r', file); |
9854d9ed RK |
2667 | return; |
2668 | ||
2669 | case 'b': | |
2670 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2671 | if (! INT_P (x)) |
9854d9ed | 2672 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2673 | |
9854d9ed | 2674 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2675 | return; |
2676 | ||
a260abc9 DE |
2677 | case 'B': |
2678 | /* If the low-order bit is zero, write 'r'; otherwise, write 'l' | |
2679 | for 64-bit mask direction. */ | |
296b8152 | 2680 | putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); |
a238cd8b | 2681 | return; |
a260abc9 | 2682 | |
9854d9ed RK |
2683 | case 'C': |
2684 | /* This is an optional cror needed for LE or GE floating-point | |
2685 | comparisons. Otherwise write nothing. */ | |
2686 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2687 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2688 | { | |
2689 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2690 | ||
2691 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2692 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2693 | } | |
2694 | return; | |
2695 | ||
2696 | case 'D': | |
2697 | /* Similar, except that this is for an scc, so we must be able to | |
2698 | encode the test in a single bit that is one. We do the above | |
2699 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2700 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2701 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2702 | { | |
2703 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2704 | ||
2705 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2706 | base_bit + 2, | |
2707 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2708 | } | |
2709 | ||
2710 | else if (GET_CODE (x) == NE) | |
2711 | { | |
2712 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2713 | ||
2714 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2715 | base_bit + 2, base_bit + 2); | |
2716 | } | |
2717 | return; | |
2718 | ||
2719 | case 'E': | |
2720 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2721 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2722 | output_operand_lossage ("invalid %%E value"); | |
2723 | ||
2724 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2725 | return; |
9854d9ed RK |
2726 | |
2727 | case 'f': | |
2728 | /* X is a CR register. Print the shift count needed to move it | |
2729 | to the high-order four bits. */ | |
2730 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2731 | output_operand_lossage ("invalid %%f value"); | |
2732 | else | |
2733 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2734 | return; | |
2735 | ||
2736 | case 'F': | |
2737 | /* Similar, but print the count for the rotate in the opposite | |
2738 | direction. */ | |
2739 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2740 | output_operand_lossage ("invalid %%F value"); | |
2741 | else | |
2742 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2743 | return; | |
2744 | ||
2745 | case 'G': | |
2746 | /* X is a constant integer. If it is negative, print "m", | |
2747 | otherwise print "z". This is to make a aze or ame insn. */ | |
2748 | if (GET_CODE (x) != CONST_INT) | |
2749 | output_operand_lossage ("invalid %%G value"); | |
2750 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2751 | putc ('z', file); |
9854d9ed | 2752 | else |
76229ac8 | 2753 | putc ('m', file); |
9854d9ed RK |
2754 | return; |
2755 | ||
9878760c | 2756 | case 'h': |
df3d94ed RK |
2757 | /* If constant, output low-order five bits. Otherwise, |
2758 | write normally. */ | |
9878760c RK |
2759 | if (INT_P (x)) |
2760 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
2761 | else | |
2762 | print_operand (file, x, 0); | |
2763 | return; | |
2764 | ||
64305719 DE |
2765 | case 'H': |
2766 | /* If constant, output low-order six bits. Otherwise, | |
2767 | write normally. */ | |
2768 | if (INT_P (x)) | |
2769 | fprintf (file, "%d", INT_LOWPART (x) & 63); | |
2770 | else | |
2771 | print_operand (file, x, 0); | |
2772 | return; | |
2773 | ||
9854d9ed RK |
2774 | case 'I': |
2775 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2776 | if (INT_P (x)) |
76229ac8 | 2777 | putc ('i', file); |
9878760c RK |
2778 | return; |
2779 | ||
9854d9ed RK |
2780 | case 'j': |
2781 | /* Write the bit number in CCR for jump. */ | |
2782 | i = ccr_bit (x, 0); | |
2783 | if (i == -1) | |
2784 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2785 | else |
9854d9ed | 2786 | fprintf (file, "%d", i); |
9878760c RK |
2787 | return; |
2788 | ||
9854d9ed RK |
2789 | case 'J': |
2790 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2791 | scc flag to `ccr_bit'. */ | |
2792 | i = ccr_bit (x, 1); | |
2793 | if (i == -1) | |
2794 | output_operand_lossage ("invalid %%J code"); | |
2795 | else | |
a0466a68 RK |
2796 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2797 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2798 | return; |
2799 | ||
9854d9ed RK |
2800 | case 'k': |
2801 | /* X must be a constant. Write the 1's complement of the | |
2802 | constant. */ | |
9878760c | 2803 | if (! INT_P (x)) |
9854d9ed | 2804 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2805 | |
9854d9ed | 2806 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2807 | return; |
2808 | ||
9854d9ed RK |
2809 | case 'L': |
2810 | /* Write second word of DImode or DFmode reference. Works on register | |
2811 | or non-indexed memory only. */ | |
2812 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2813 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2814 | else if (GET_CODE (x) == MEM) |
2815 | { | |
2816 | /* Handle possible auto-increment. Since it is pre-increment and | |
1427100a | 2817 | we have already done it, we can just use an offset of word. */ |
9854d9ed RK |
2818 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2819 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
1427100a DE |
2820 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), |
2821 | UNITS_PER_WORD)); | |
9854d9ed | 2822 | else |
1427100a | 2823 | output_address (plus_constant (XEXP (x, 0), UNITS_PER_WORD)); |
ba5e43aa | 2824 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2825 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2826 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2827 | } |
9878760c | 2828 | return; |
9854d9ed | 2829 | |
9878760c RK |
2830 | case 'm': |
2831 | /* MB value for a mask operand. */ | |
2832 | if (! mask_operand (x, VOIDmode)) | |
2833 | output_operand_lossage ("invalid %%m value"); | |
2834 | ||
2835 | val = INT_LOWPART (x); | |
2836 | ||
2837 | /* If the high bit is set and the low bit is not, the value is zero. | |
2838 | If the high bit is zero, the value is the first 1 bit we find from | |
2839 | the left. */ | |
34792e82 | 2840 | if ((val & 0x80000000) && ((val & 1) == 0)) |
9878760c | 2841 | { |
19d2d16f | 2842 | putc ('0', file); |
9878760c RK |
2843 | return; |
2844 | } | |
34792e82 | 2845 | else if ((val & 0x80000000) == 0) |
9878760c RK |
2846 | { |
2847 | for (i = 1; i < 32; i++) | |
34792e82 | 2848 | if ((val <<= 1) & 0x80000000) |
9878760c RK |
2849 | break; |
2850 | fprintf (file, "%d", i); | |
2851 | return; | |
2852 | } | |
2853 | ||
2854 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2855 | number plus 1. We know the low-order bit is one. */ | |
2856 | for (i = 0; i < 32; i++) | |
2857 | if (((val >>= 1) & 1) == 0) | |
2858 | break; | |
2859 | ||
a260abc9 | 2860 | /* If we ended in ...01, i would be 0. The correct value is 31, so |
9878760c RK |
2861 | we want 31 - i. */ |
2862 | fprintf (file, "%d", 31 - i); | |
2863 | return; | |
2864 | ||
2865 | case 'M': | |
2866 | /* ME value for a mask operand. */ | |
2867 | if (! mask_operand (x, VOIDmode)) | |
a260abc9 | 2868 | output_operand_lossage ("invalid %%M value"); |
9878760c RK |
2869 | |
2870 | val = INT_LOWPART (x); | |
2871 | ||
2872 | /* If the low bit is set and the high bit is not, the value is 31. | |
2873 | If the low bit is zero, the value is the first 1 bit we find from | |
2874 | the right. */ | |
34792e82 | 2875 | if ((val & 1) && ((val & 0x80000000) == 0)) |
9878760c | 2876 | { |
76229ac8 | 2877 | fputs ("31", file); |
9878760c RK |
2878 | return; |
2879 | } | |
2880 | else if ((val & 1) == 0) | |
2881 | { | |
2882 | for (i = 0; i < 32; i++) | |
2883 | if ((val >>= 1) & 1) | |
2884 | break; | |
2885 | ||
a260abc9 | 2886 | /* If we had ....10, i would be 0. The result should be |
9878760c RK |
2887 | 30, so we need 30 - i. */ |
2888 | fprintf (file, "%d", 30 - i); | |
2889 | return; | |
2890 | } | |
2891 | ||
2892 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2893 | number minus 1. We know the high-order bit is one. */ | |
2894 | for (i = 0; i < 32; i++) | |
34792e82 | 2895 | if (((val <<= 1) & 0x80000000) == 0) |
9878760c RK |
2896 | break; |
2897 | ||
2898 | fprintf (file, "%d", i); | |
2899 | return; | |
2900 | ||
9878760c RK |
2901 | case 'N': |
2902 | /* Write the number of elements in the vector times 4. */ | |
2903 | if (GET_CODE (x) != PARALLEL) | |
2904 | output_operand_lossage ("invalid %%N value"); | |
2905 | ||
2906 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2907 | return; | |
2908 | ||
2909 | case 'O': | |
2910 | /* Similar, but subtract 1 first. */ | |
2911 | if (GET_CODE (x) != PARALLEL) | |
1427100a | 2912 | output_operand_lossage ("invalid %%O value"); |
9878760c RK |
2913 | |
2914 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2915 | return; | |
2916 | ||
9854d9ed RK |
2917 | case 'p': |
2918 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2919 | if (! INT_P (x) | |
2920 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2921 | output_operand_lossage ("invalid %%p value"); | |
2922 | ||
2923 | fprintf (file, "%d", i); | |
2924 | return; | |
2925 | ||
9878760c RK |
2926 | case 'P': |
2927 | /* The operand must be an indirect memory reference. The result | |
2928 | is the register number. */ | |
2929 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2930 | || REGNO (XEXP (x, 0)) >= 32) | |
2931 | output_operand_lossage ("invalid %%P value"); | |
2932 | ||
2933 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2934 | return; | |
2935 | ||
9854d9ed RK |
2936 | case 'R': |
2937 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2938 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2939 | output_operand_lossage ("invalid %%R value"); | |
2940 | else | |
2941 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2942 | return; |
9854d9ed RK |
2943 | |
2944 | case 's': | |
2945 | /* Low 5 bits of 32 - value */ | |
2946 | if (! INT_P (x)) | |
2947 | output_operand_lossage ("invalid %%s value"); | |
2948 | ||
2949 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 2950 | return; |
9854d9ed | 2951 | |
a260abc9 DE |
2952 | case 'S': |
2953 | /* PowerPC64 mask position. All 0's and all 1's are excluded. | |
2954 | CONST_INT 32-bit mask is considered sign-extended so any | |
2955 | transition must occur within the CONST_INT, not on the boundary. */ | |
2956 | if (! mask64_operand (x, VOIDmode)) | |
2957 | output_operand_lossage ("invalid %%S value"); | |
2958 | ||
2959 | val = INT_LOWPART (x); | |
2960 | ||
2961 | if (val & 1) /* Clear Left */ | |
2962 | { | |
a238cd8b DE |
2963 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2964 | if (!((val >>= 1) & 1)) | |
2965 | break; | |
a260abc9 | 2966 | |
a238cd8b DE |
2967 | #if HOST_BITS_PER_WIDE_INT == 32 |
2968 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) | |
2969 | { | |
2970 | val = CONST_DOUBLE_HIGH (x); | |
2971 | ||
2972 | if (val == 0) | |
2973 | --i; | |
2974 | else | |
2975 | for (i = 32; i < 64; i++) | |
2976 | if (!((val >>= 1) & 1)) | |
2977 | break; | |
2978 | } | |
a260abc9 | 2979 | #endif |
a238cd8b DE |
2980 | /* i = index of last set bit from right |
2981 | mask begins at 63 - i from left */ | |
2982 | if (i > 63) | |
2983 | output_operand_lossage ("%%S computed all 1's mask"); | |
a260abc9 DE |
2984 | fprintf (file, "%d", 63 - i); |
2985 | return; | |
2986 | } | |
2987 | else /* Clear Right */ | |
2988 | { | |
a238cd8b DE |
2989 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2990 | if ((val >>= 1) & 1) | |
2991 | break; | |
a260abc9 | 2992 | |
a238cd8b | 2993 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
2994 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) |
2995 | { | |
a238cd8b | 2996 | val = CONST_DOUBLE_HIGH (x); |
a260abc9 | 2997 | |
a238cd8b | 2998 | if (val == (HOST_WIDE_INT) -1) |
a260abc9 | 2999 | --i; |
a260abc9 | 3000 | else |
a238cd8b DE |
3001 | for (i = 32; i < 64; i++) |
3002 | if ((val >>= 1) & 1) | |
a260abc9 DE |
3003 | break; |
3004 | } | |
3005 | #endif | |
a238cd8b DE |
3006 | /* i = index of last clear bit from right |
3007 | mask ends at 62 - i from left */ | |
3008 | if (i > 62) | |
3009 | output_operand_lossage ("%%S computed all 0's mask"); | |
3010 | fprintf (file, "%d", 62 - i); | |
a260abc9 DE |
3011 | return; |
3012 | } | |
3013 | ||
9878760c RK |
3014 | case 't': |
3015 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
3016 | All floating-point operations except NE branch true and integer | |
3017 | EQ, LT, GT, LTU and GTU also branch true. */ | |
3018 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
3019 | output_operand_lossage ("invalid %%t value"); | |
3020 | ||
3021 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
3022 | && GET_CODE (x) != NE) | |
3023 | || GET_CODE (x) == EQ | |
3024 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
3025 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 3026 | fputs ("12", file); |
9878760c | 3027 | else |
76229ac8 | 3028 | putc ('4', file); |
9878760c RK |
3029 | return; |
3030 | ||
3031 | case 'T': | |
3032 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
3033 | 12 otherwise. */ | |
3034 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1427100a | 3035 | output_operand_lossage ("invalid %%T value"); |
9878760c RK |
3036 | |
3037 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
3038 | && GET_CODE (x) != NE) | |
3039 | || GET_CODE (x) == EQ | |
3040 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
3041 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 3042 | putc ('4', file); |
9878760c | 3043 | else |
76229ac8 | 3044 | fputs ("12", file); |
9878760c RK |
3045 | return; |
3046 | ||
9854d9ed | 3047 | case 'u': |
802a0058 | 3048 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
3049 | if (! INT_P (x)) |
3050 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 3051 | |
76229ac8 | 3052 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
3053 | return; |
3054 | ||
802a0058 MM |
3055 | case 'v': |
3056 | /* High-order 16 bits of constant for use in signed operand. */ | |
3057 | if (! INT_P (x)) | |
3058 | output_operand_lossage ("invalid %%v value"); | |
3059 | ||
3060 | { | |
3061 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
3062 | ||
9615f239 | 3063 | /* Solaris assembler doesn't like lis 0,0x8000 */ |
802a0058 MM |
3064 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) |
3065 | fprintf (file, "%d", value | (~0 << 16)); | |
3066 | else | |
3067 | fprintf (file, "0x%x", value); | |
3068 | return; | |
3069 | } | |
3070 | ||
9854d9ed RK |
3071 | case 'U': |
3072 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
3073 | if (GET_CODE (x) == MEM | |
3074 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3075 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 3076 | putc ('u', file); |
9854d9ed | 3077 | return; |
9878760c | 3078 | |
e0cd0770 JC |
3079 | case 'V': |
3080 | /* Print the trap code for this operand. */ | |
3081 | switch (GET_CODE (x)) | |
3082 | { | |
3083 | case EQ: | |
3084 | fputs ("eq", file); /* 4 */ | |
3085 | break; | |
3086 | case NE: | |
3087 | fputs ("ne", file); /* 24 */ | |
3088 | break; | |
3089 | case LT: | |
3090 | fputs ("lt", file); /* 16 */ | |
3091 | break; | |
3092 | case LE: | |
3093 | fputs ("le", file); /* 20 */ | |
3094 | break; | |
3095 | case GT: | |
3096 | fputs ("gt", file); /* 8 */ | |
3097 | break; | |
3098 | case GE: | |
3099 | fputs ("ge", file); /* 12 */ | |
3100 | break; | |
3101 | case LTU: | |
3102 | fputs ("llt", file); /* 2 */ | |
3103 | break; | |
3104 | case LEU: | |
3105 | fputs ("lle", file); /* 6 */ | |
3106 | break; | |
3107 | case GTU: | |
3108 | fputs ("lgt", file); /* 1 */ | |
3109 | break; | |
3110 | case GEU: | |
3111 | fputs ("lge", file); /* 5 */ | |
3112 | break; | |
3113 | default: | |
3114 | abort (); | |
3115 | } | |
3116 | break; | |
3117 | ||
9854d9ed RK |
3118 | case 'w': |
3119 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
3120 | normally. */ | |
3121 | if (INT_P (x)) | |
9615f239 | 3122 | fprintf (file, "%d", ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000); |
9854d9ed RK |
3123 | else |
3124 | print_operand (file, x, 0); | |
9878760c RK |
3125 | return; |
3126 | ||
9854d9ed RK |
3127 | case 'W': |
3128 | /* If constant, low-order 16 bits of constant, unsigned. | |
3129 | Otherwise, write normally. */ | |
3130 | if (INT_P (x)) | |
3131 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
3132 | else | |
3133 | print_operand (file, x, 0); | |
3134 | return; | |
9878760c | 3135 | |
9854d9ed RK |
3136 | case 'X': |
3137 | if (GET_CODE (x) == MEM | |
3138 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 3139 | putc ('x', file); |
9854d9ed | 3140 | return; |
9878760c | 3141 | |
9854d9ed RK |
3142 | case 'Y': |
3143 | /* Like 'L', for third word of TImode */ | |
3144 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3145 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 3146 | else if (GET_CODE (x) == MEM) |
9878760c | 3147 | { |
9854d9ed RK |
3148 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3149 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3150 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 3151 | else |
a54d04b7 | 3152 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 3153 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3154 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3155 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
3156 | } |
3157 | return; | |
9854d9ed | 3158 | |
9878760c | 3159 | case 'z': |
b4ac57ab RS |
3160 | /* X is a SYMBOL_REF. Write out the name preceded by a |
3161 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
3162 | names. If we are configured for System V (or the embedded ABI) on |
3163 | the PowerPC, do not emit the period, since those systems do not use | |
3164 | TOCs and the like. */ | |
9878760c RK |
3165 | if (GET_CODE (x) != SYMBOL_REF) |
3166 | abort (); | |
3167 | ||
b6c9286a MM |
3168 | if (XSTR (x, 0)[0] != '.') |
3169 | { | |
3170 | switch (DEFAULT_ABI) | |
3171 | { | |
3172 | default: | |
3173 | abort (); | |
3174 | ||
3175 | case ABI_AIX: | |
3176 | putc ('.', file); | |
3177 | break; | |
3178 | ||
3179 | case ABI_V4: | |
3180 | case ABI_AIX_NODESC: | |
c81bebd7 | 3181 | case ABI_SOLARIS: |
b6c9286a MM |
3182 | break; |
3183 | ||
3184 | case ABI_NT: | |
3185 | fputs ("..", file); | |
3186 | break; | |
3187 | } | |
3188 | } | |
9878760c RK |
3189 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
3190 | return; | |
3191 | ||
9854d9ed RK |
3192 | case 'Z': |
3193 | /* Like 'L', for last word of TImode. */ | |
3194 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3195 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
3196 | else if (GET_CODE (x) == MEM) |
3197 | { | |
3198 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3199 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3200 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 3201 | else |
a54d04b7 | 3202 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 3203 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3204 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3205 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3206 | } |
5c23c401 | 3207 | return; |
9854d9ed | 3208 | |
9878760c RK |
3209 | case 0: |
3210 | if (GET_CODE (x) == REG) | |
3211 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
3212 | else if (GET_CODE (x) == MEM) | |
3213 | { | |
3214 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
3215 | know the width from the mode. */ | |
3216 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
3217 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
3218 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3219 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
3220 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
3221 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3222 | else | |
a54d04b7 | 3223 | output_address (XEXP (x, 0)); |
9878760c RK |
3224 | } |
3225 | else | |
a54d04b7 | 3226 | output_addr_const (file, x); |
a85d226b | 3227 | return; |
9878760c RK |
3228 | |
3229 | default: | |
3230 | output_operand_lossage ("invalid %%xn code"); | |
3231 | } | |
3232 | } | |
3233 | \f | |
3234 | /* Print the address of an operand. */ | |
3235 | ||
3236 | void | |
3237 | print_operand_address (file, x) | |
3238 | FILE *file; | |
3239 | register rtx x; | |
3240 | { | |
3241 | if (GET_CODE (x) == REG) | |
4697a36c | 3242 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 3243 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
3244 | { |
3245 | output_addr_const (file, x); | |
ba5e43aa | 3246 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3247 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3248 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 3249 | |
4697a36c | 3250 | #ifdef TARGET_NO_TOC |
7509c759 | 3251 | else if (TARGET_NO_TOC) |
4697a36c | 3252 | ; |
4697a36c | 3253 | #endif |
7509c759 | 3254 | else |
4697a36c | 3255 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); |
9878760c RK |
3256 | } |
3257 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
3258 | { | |
3259 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
3260 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
3261 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 3262 | else |
4697a36c MM |
3263 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
3264 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
3265 | } |
3266 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
4697a36c MM |
3267 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
3268 | else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM | |
3269 | && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) | |
3270 | { | |
3271 | output_addr_const (file, XEXP (x, 1)); | |
3272 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3273 | } | |
9878760c RK |
3274 | else |
3275 | abort (); | |
3276 | } | |
3277 | \f | |
3278 | /* This page contains routines that are used to determine what the function | |
3279 | prologue and epilogue code will do and write them out. */ | |
3280 | ||
3281 | /* Return the first fixed-point register that is required to be saved. 32 if | |
3282 | none. */ | |
3283 | ||
3284 | int | |
3285 | first_reg_to_save () | |
3286 | { | |
3287 | int first_reg; | |
3288 | ||
3289 | /* Find lowest numbered live register. */ | |
3290 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
3291 | if (regs_ever_live[first_reg]) | |
3292 | break; | |
3293 | ||
b5253831 DE |
3294 | if (profile_flag) |
3295 | { | |
3296 | /* AIX must save/restore every register that contains a parameter | |
3297 | before/after the .__mcount call plus an additional register | |
3298 | for the static chain, if needed; use registers from 30 down to 22 | |
3299 | to do this. */ | |
3300 | if (DEFAULT_ABI == ABI_AIX) | |
3301 | { | |
3302 | int last_parm_reg, profile_first_reg; | |
3303 | ||
3304 | /* Figure out last used parameter register. The proper thing | |
3305 | to do is to walk incoming args of the function. A function | |
3306 | might have live parameter registers even if it has no | |
3307 | incoming args. */ | |
3308 | for (last_parm_reg = 10; | |
3309 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
3310 | last_parm_reg--) | |
3311 | ; | |
3312 | ||
3313 | /* Calculate first reg for saving parameter registers | |
3314 | and static chain. | |
3315 | Skip reg 31 which may contain the frame pointer. */ | |
3316 | profile_first_reg = (33 - last_parm_reg | |
3317 | - (current_function_needs_context ? 1 : 0)); | |
3318 | /* Do not save frame pointer if no parameters needs to be saved. */ | |
3319 | if (profile_first_reg == 31) | |
3320 | profile_first_reg = 32; | |
3321 | ||
3322 | if (first_reg > profile_first_reg) | |
3323 | first_reg = profile_first_reg; | |
3324 | } | |
e165f3f0 | 3325 | |
b5253831 DE |
3326 | /* SVR4 may need one register to preserve the static chain. */ |
3327 | else if (current_function_needs_context) | |
3328 | { | |
3329 | /* Skip reg 31 which may contain the frame pointer. */ | |
3330 | if (first_reg > 30) | |
3331 | first_reg = 30; | |
3332 | } | |
3333 | } | |
e165f3f0 | 3334 | |
9878760c RK |
3335 | return first_reg; |
3336 | } | |
3337 | ||
3338 | /* Similar, for FP regs. */ | |
3339 | ||
3340 | int | |
3341 | first_fp_reg_to_save () | |
3342 | { | |
3343 | int first_reg; | |
3344 | ||
3345 | /* Find lowest numbered live register. */ | |
3346 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
3347 | if (regs_ever_live[first_reg]) | |
3348 | break; | |
3349 | ||
3350 | return first_reg; | |
3351 | } | |
3352 | ||
9878760c RK |
3353 | /* Return non-zero if this function makes calls. */ |
3354 | ||
3355 | int | |
3356 | rs6000_makes_calls () | |
3357 | { | |
3358 | rtx insn; | |
3359 | ||
38c1f2d7 MM |
3360 | /* If we are profiling, we will be making a call to __mcount. |
3361 | Under the System V ABI's, we store the LR directly, so | |
3362 | we don't need to do it here. */ | |
3363 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
3364 | return 1; |
3365 | ||
9878760c RK |
3366 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
3367 | if (GET_CODE (insn) == CALL_INSN) | |
3368 | return 1; | |
3369 | ||
3370 | return 0; | |
3371 | } | |
3372 | ||
4697a36c MM |
3373 | \f |
3374 | /* Calculate the stack information for the current function. This is | |
3375 | complicated by having two separate calling sequences, the AIX calling | |
3376 | sequence and the V.4 calling sequence. | |
3377 | ||
3378 | AIX stack frames look like: | |
a260abc9 | 3379 | 32-bit 64-bit |
4697a36c | 3380 | SP----> +---------------------------------------+ |
a260abc9 | 3381 | | back chain to caller | 0 0 |
4697a36c | 3382 | +---------------------------------------+ |
a260abc9 | 3383 | | saved CR | 4 8 (8-11) |
4697a36c | 3384 | +---------------------------------------+ |
a260abc9 | 3385 | | saved LR | 8 16 |
4697a36c | 3386 | +---------------------------------------+ |
a260abc9 | 3387 | | reserved for compilers | 12 24 |
4697a36c | 3388 | +---------------------------------------+ |
a260abc9 | 3389 | | reserved for binders | 16 32 |
4697a36c | 3390 | +---------------------------------------+ |
a260abc9 | 3391 | | saved TOC pointer | 20 40 |
4697a36c | 3392 | +---------------------------------------+ |
a260abc9 | 3393 | | Parameter save area (P) | 24 48 |
4697a36c | 3394 | +---------------------------------------+ |
a260abc9 | 3395 | | Alloca space (A) | 24+P etc. |
802a0058 | 3396 | +---------------------------------------+ |
a7df97e6 | 3397 | | Local variable space (L) | 24+P+A |
4697a36c | 3398 | +---------------------------------------+ |
a7df97e6 | 3399 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3400 | +---------------------------------------+ |
a7df97e6 | 3401 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3402 | +---------------------------------------+ |
a7df97e6 | 3403 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3404 | +---------------------------------------+ |
3405 | old SP->| back chain to caller's caller | | |
3406 | +---------------------------------------+ | |
3407 | ||
5376a30c KR |
3408 | The required alignment for AIX configurations is two words (i.e., 8 |
3409 | or 16 bytes). | |
3410 | ||
3411 | ||
4697a36c MM |
3412 | V.4 stack frames look like: |
3413 | ||
3414 | SP----> +---------------------------------------+ | |
3415 | | back chain to caller | 0 | |
3416 | +---------------------------------------+ | |
5eb387b8 | 3417 | | caller's saved LR | 4 |
4697a36c MM |
3418 | +---------------------------------------+ |
3419 | | Parameter save area (P) | 8 | |
3420 | +---------------------------------------+ | |
a7df97e6 MM |
3421 | | Alloca space (A) | 8+P |
3422 | +---------------------------------------+ | |
3423 | | Varargs save area (V) | 8+P+A | |
3424 | +---------------------------------------+ | |
3425 | | Local variable space (L) | 8+P+A+V | |
3426 | +---------------------------------------+ | |
3427 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3428 | +---------------------------------------+ |
a7df97e6 MM |
3429 | | saved CR (C) | 8+P+A+V+L+X |
3430 | +---------------------------------------+ | |
3431 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3432 | +---------------------------------------+ | |
3433 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3434 | +---------------------------------------+ |
3435 | old SP->| back chain to caller's caller | | |
3436 | +---------------------------------------+ | |
b6c9286a | 3437 | |
5376a30c KR |
3438 | The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is |
3439 | given. (But note below and in sysv4.h that we require only 8 and | |
3440 | may round up the size of our stack frame anyways. The historical | |
3441 | reason is early versions of powerpc-linux which didn't properly | |
3442 | align the stack at program startup. A happy side-effect is that | |
3443 | -mno-eabi libraries can be used with -meabi programs.) | |
3444 | ||
b6c9286a MM |
3445 | |
3446 | A PowerPC Windows/NT frame looks like: | |
3447 | ||
3448 | SP----> +---------------------------------------+ | |
3449 | | back chain to caller | 0 | |
3450 | +---------------------------------------+ | |
3451 | | reserved | 4 | |
3452 | +---------------------------------------+ | |
3453 | | reserved | 8 | |
3454 | +---------------------------------------+ | |
3455 | | reserved | 12 | |
3456 | +---------------------------------------+ | |
3457 | | reserved | 16 | |
3458 | +---------------------------------------+ | |
3459 | | reserved | 20 | |
3460 | +---------------------------------------+ | |
3461 | | Parameter save area (P) | 24 | |
3462 | +---------------------------------------+ | |
a7df97e6 MM |
3463 | | Alloca space (A) | 24+P |
3464 | +---------------------------------------+ | |
3465 | | Local variable space (L) | 24+P+A | |
3466 | +---------------------------------------+ | |
3467 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3468 | +---------------------------------------+ |
a7df97e6 MM |
3469 | | Save area for FP registers (F) | 24+P+A+L+X |
3470 | +---------------------------------------+ | |
3471 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3472 | +---------------------------------------+ | |
3473 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3474 | +---------------------------------------+ | |
3475 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3476 | +---------------------------------------+ | |
3477 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3478 | +---------------------------------------+ | |
3479 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3480 | +---------------------------------------+ |
3481 | old SP->| back chain to caller's caller | | |
3482 | +---------------------------------------+ | |
3483 | ||
3484 | For NT, there is no specific order to save the registers, but in | |
3485 | order to support __builtin_return_address, the save area for the | |
3486 | link register needs to be in a known place, so we use -4 off of the | |
3487 | old SP. To support calls through pointers, we also allocate a | |
5376a30c KR |
3488 | fixed slot to store the TOC, -8 off the old SP. |
3489 | ||
3490 | The required alignment for NT is 16 bytes. | |
3491 | ||
3492 | ||
3493 | The EABI configuration defaults to the V.4 layout, unless | |
3494 | -mcall-aix is used, in which case the AIX layout is used. However, | |
3495 | the stack alignment requirements may differ. If -mno-eabi is not | |
3496 | given, the required stack alignment is 8 bytes; if -mno-eabi is | |
3497 | given, the required alignment is 16 bytes. (But see V.4 comment | |
3498 | above.) */ | |
4697a36c | 3499 | |
61b2fbe7 MM |
3500 | #ifndef ABI_STACK_BOUNDARY |
3501 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3502 | #endif | |
3503 | ||
4697a36c MM |
3504 | rs6000_stack_t * |
3505 | rs6000_stack_info () | |
3506 | { | |
3507 | static rs6000_stack_t info, zero_info; | |
3508 | rs6000_stack_t *info_ptr = &info; | |
a260abc9 | 3509 | int reg_size = TARGET_32BIT ? 4 : 8; |
24d304eb | 3510 | enum rs6000_abi abi; |
b6c9286a | 3511 | int total_raw_size; |
4697a36c MM |
3512 | |
3513 | /* Zero all fields portably */ | |
3514 | info = zero_info; | |
3515 | ||
3516 | /* Select which calling sequence */ | |
b6c9286a | 3517 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3518 | |
4697a36c MM |
3519 | /* Calculate which registers need to be saved & save area size */ |
3520 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3521 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3522 | ||
3523 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3524 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3525 | ||
3526 | /* Does this function call anything? */ | |
3527 | info_ptr->calls_p = rs6000_makes_calls (); | |
3528 | ||
62c0fb87 | 3529 | /* Allocate space to save the toc. */ |
82280d5e | 3530 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3531 | { |
3532 | info_ptr->toc_save_p = 1; | |
3533 | info_ptr->toc_size = reg_size; | |
3534 | } | |
3535 | ||
802a0058 MM |
3536 | /* Does this machine need the float/int conversion area? */ |
3537 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3538 | ||
b6c9286a MM |
3539 | /* If this is main and we need to call a function to set things up, |
3540 | save main's arguments around the call. */ | |
c81bebd7 MM |
3541 | #ifdef TARGET_EABI |
3542 | if (TARGET_EABI) | |
3543 | #endif | |
b6c9286a | 3544 | { |
30ccf55d MS |
3545 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3546 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3547 | { |
c81bebd7 | 3548 | info_ptr->main_p = 1; |
b6c9286a | 3549 | |
c81bebd7 MM |
3550 | #ifdef NAME__MAIN |
3551 | info_ptr->calls_p = 1; | |
b6c9286a | 3552 | |
c81bebd7 | 3553 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3554 | { |
c81bebd7 MM |
3555 | int i; |
3556 | tree arg; | |
3557 | ||
3558 | info_ptr->main_save_p = 1; | |
3559 | info_ptr->main_size = 0; | |
3560 | ||
3561 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3562 | arg != NULL_TREE && i < 8; | |
3563 | (arg = TREE_CHAIN (arg)), i++) | |
3564 | { | |
3565 | info_ptr->main_size += reg_size; | |
3566 | } | |
b6c9286a | 3567 | } |
b6c9286a | 3568 | #endif |
c81bebd7 | 3569 | } |
b6c9286a MM |
3570 | } |
3571 | ||
4697a36c | 3572 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3573 | if (regs_ever_live[65] |
3574 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3575 | #ifdef TARGET_RELOCATABLE |
3576 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3577 | #endif | |
3578 | || (info_ptr->first_fp_reg_save != 64 | |
3579 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3580 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3581 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3582 | || info_ptr->calls_p) |
3583 | { | |
3584 | info_ptr->lr_save_p = 1; | |
3585 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3586 | if (abi == ABI_NT) |
3587 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3588 | } |
3589 | ||
3590 | /* Determine if we need to save the condition code registers */ | |
3591 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3592 | { | |
3593 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3594 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3595 | info_ptr->cr_size = reg_size; |
3596 | } | |
3597 | ||
3598 | /* Determine various sizes */ | |
3599 | info_ptr->reg_size = reg_size; | |
3600 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3601 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3602 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3603 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3604 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3605 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3606 | + info_ptr->gp_size |
3607 | + info_ptr->cr_size | |
3608 | + info_ptr->lr_size | |
3609 | + info_ptr->toc_size | |
3610 | + info_ptr->main_size, 8); | |
3611 | ||
4697a36c | 3612 | /* Calculate the offsets */ |
24d304eb | 3613 | switch (abi) |
4697a36c | 3614 | { |
b6c9286a | 3615 | case ABI_NONE: |
24d304eb | 3616 | default: |
b6c9286a MM |
3617 | abort (); |
3618 | ||
3619 | case ABI_AIX: | |
3620 | case ABI_AIX_NODESC: | |
3621 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3622 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3623 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
a260abc9 DE |
3624 | info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ |
3625 | info_ptr->lr_save_offset = 2*reg_size; | |
24d304eb RK |
3626 | break; |
3627 | ||
3628 | case ABI_V4: | |
c81bebd7 | 3629 | case ABI_SOLARIS: |
b6c9286a MM |
3630 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3631 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3632 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3633 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3634 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3635 | info_ptr->lr_save_offset = reg_size; |
3636 | break; | |
3637 | ||
3638 | case ABI_NT: | |
a260abc9 | 3639 | info_ptr->lr_save_offset = -reg_size; |
b6c9286a MM |
3640 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; |
3641 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3642 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3643 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3644 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
a260abc9 | 3645 | info_ptr->fp_save_offset -= reg_size; |
b6c9286a MM |
3646 | |
3647 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3648 | break; |
4697a36c MM |
3649 | } |
3650 | ||
34792e82 | 3651 | /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */ |
ff381587 MM |
3652 | if (info_ptr->fpmem_p |
3653 | && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8) | |
3654 | info_ptr->fpmem_size += reg_size; | |
3655 | ||
3656 | total_raw_size = (info_ptr->vars_size | |
3657 | + info_ptr->parm_size | |
3658 | + info_ptr->fpmem_size | |
3659 | + info_ptr->save_size | |
3660 | + info_ptr->varargs_size | |
3661 | + info_ptr->fixed_size); | |
3662 | ||
3663 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); | |
3664 | ||
3665 | /* Determine if we need to allocate any stack frame: | |
3666 | ||
3667 | For AIX we need to push the stack if a frame pointer is needed (because | |
3668 | the stack might be dynamically adjusted), if we are debugging, if we | |
3669 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3670 | are more than the space needed to save all non-volatile registers: | |
bfc79d3b | 3671 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved). |
ff381587 MM |
3672 | |
3673 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3674 | the debugger can handle stackless frames. */ | |
3675 | ||
3676 | if (info_ptr->calls_p) | |
3677 | info_ptr->push_p = 1; | |
3678 | ||
3679 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) | |
3680 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size | |
3681 | || (abi == ABI_NT ? info_ptr->lr_save_p | |
3682 | : info_ptr->calls_p)); | |
3683 | ||
3684 | else | |
3685 | info_ptr->push_p = (frame_pointer_needed | |
3686 | || write_symbols != NO_DEBUG | |
3687 | || ((total_raw_size - info_ptr->fixed_size) | |
bfc79d3b | 3688 | > (TARGET_32BIT ? 220 : 288))); |
ff381587 | 3689 | |
a7df97e6 | 3690 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3691 | { |
3692 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3693 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a260abc9 DE |
3694 | rs6000_fpmem_offset = (info_ptr->push_p |
3695 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3696 | : info_ptr->fpmem_offset); | |
db72d7a1 DE |
3697 | } |
3698 | else | |
3699 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3700 | |
4697a36c | 3701 | /* Zero offsets if we're not saving those registers */ |
8dda1a21 | 3702 | if (info_ptr->fp_size == 0) |
4697a36c MM |
3703 | info_ptr->fp_save_offset = 0; |
3704 | ||
8dda1a21 | 3705 | if (info_ptr->gp_size == 0) |
4697a36c MM |
3706 | info_ptr->gp_save_offset = 0; |
3707 | ||
3708 | if (!info_ptr->lr_save_p) | |
3709 | info_ptr->lr_save_offset = 0; | |
3710 | ||
3711 | if (!info_ptr->cr_save_p) | |
3712 | info_ptr->cr_save_offset = 0; | |
3713 | ||
b6c9286a MM |
3714 | if (!info_ptr->toc_save_p) |
3715 | info_ptr->toc_save_offset = 0; | |
3716 | ||
3717 | if (!info_ptr->main_save_p) | |
3718 | info_ptr->main_save_offset = 0; | |
3719 | ||
4697a36c MM |
3720 | return info_ptr; |
3721 | } | |
3722 | ||
3723 | void | |
3724 | debug_stack_info (info) | |
3725 | rs6000_stack_t *info; | |
9878760c | 3726 | { |
d330fd93 | 3727 | const char *abi_string; |
24d304eb | 3728 | |
4697a36c MM |
3729 | if (!info) |
3730 | info = rs6000_stack_info (); | |
3731 | ||
3732 | fprintf (stderr, "\nStack information for function %s:\n", | |
3733 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3734 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3735 | : "<unknown>")); | |
3736 | ||
24d304eb RK |
3737 | switch (info->abi) |
3738 | { | |
b6c9286a MM |
3739 | default: abi_string = "Unknown"; break; |
3740 | case ABI_NONE: abi_string = "NONE"; break; | |
3741 | case ABI_AIX: abi_string = "AIX"; break; | |
3742 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3743 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3744 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3745 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3746 | } |
3747 | ||
3748 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3749 | ||
4697a36c MM |
3750 | if (info->first_gp_reg_save != 32) |
3751 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3752 | ||
3753 | if (info->first_fp_reg_save != 64) | |
3754 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3755 | |
4697a36c MM |
3756 | if (info->lr_save_p) |
3757 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3758 | |
4697a36c MM |
3759 | if (info->cr_save_p) |
3760 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3761 | ||
b6c9286a MM |
3762 | if (info->toc_save_p) |
3763 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3764 | ||
4697a36c MM |
3765 | if (info->push_p) |
3766 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3767 | ||
3768 | if (info->calls_p) | |
3769 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3770 | ||
b6c9286a MM |
3771 | if (info->main_p) |
3772 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3773 | ||
3774 | if (info->main_save_p) | |
3775 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3776 | ||
802a0058 MM |
3777 | if (info->fpmem_p) |
3778 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3779 | ||
4697a36c MM |
3780 | if (info->gp_save_offset) |
3781 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3782 | ||
3783 | if (info->fp_save_offset) | |
3784 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3785 | ||
3786 | if (info->lr_save_offset) | |
3787 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3788 | ||
3789 | if (info->cr_save_offset) | |
3790 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3791 | ||
b6c9286a MM |
3792 | if (info->toc_save_offset) |
3793 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3794 | ||
4697a36c MM |
3795 | if (info->varargs_save_offset) |
3796 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3797 | ||
b6c9286a MM |
3798 | if (info->main_save_offset) |
3799 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3800 | ||
802a0058 MM |
3801 | if (info->fpmem_offset) |
3802 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3803 | ||
4697a36c MM |
3804 | if (info->total_size) |
3805 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3806 | ||
3807 | if (info->varargs_size) | |
3808 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3809 | ||
3810 | if (info->vars_size) | |
3811 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3812 | ||
3813 | if (info->parm_size) | |
3814 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3815 | ||
802a0058 MM |
3816 | if (info->fpmem_size) |
3817 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3818 | ||
4697a36c MM |
3819 | if (info->fixed_size) |
3820 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3821 | ||
3822 | if (info->gp_size) | |
3823 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3824 | ||
3825 | if (info->fp_size) | |
3826 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3827 | ||
b6c9286a MM |
3828 | if (info->lr_size) |
3829 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3830 | ||
4697a36c MM |
3831 | if (info->cr_size) |
3832 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3833 | ||
b6c9286a MM |
3834 | if (info->toc_size) |
3835 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3836 | ||
3837 | if (info->main_size) | |
3838 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3839 | ||
4697a36c MM |
3840 | if (info->save_size) |
3841 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3842 | ||
3843 | if (info->reg_size != 4) | |
3844 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3845 | ||
3846 | fprintf (stderr, "\n"); | |
9878760c | 3847 | } |
4697a36c | 3848 | \f |
c7ca610e RK |
3849 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3850 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3851 | a constant pool. */ | |
3852 | ||
3853 | void | |
38c1f2d7 | 3854 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 3855 | FILE *file; |
38c1f2d7 | 3856 | int reg; |
c7ca610e RK |
3857 | { |
3858 | char buf[256]; | |
3859 | ||
3860 | #ifdef USING_SVR4_H | |
3861 | if (TARGET_RELOCATABLE) | |
3862 | { | |
3863 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3864 | fprintf (file, "\tbl "); | |
3865 | assemble_name (file, buf); | |
3866 | fprintf (file, "\n"); | |
3867 | ||
38c1f2d7 MM |
3868 | /* possibly create the toc section */ |
3869 | if (!toc_initialized) | |
3870 | { | |
3871 | toc_section (); | |
3872 | function_section (current_function_decl); | |
3873 | } | |
3874 | ||
3875 | /* If not first call in this function, we need to put the | |
3876 | different between .LCTOC1 and the address we get to right | |
3877 | after the bl. It will mess up disassembling the instructions | |
3878 | but that can't be helped. We will later need to bias the | |
3879 | address before loading. */ | |
3880 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3881 | { | |
d330fd93 | 3882 | const char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; |
38c1f2d7 MM |
3883 | char *buf_ptr; |
3884 | ||
3885 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
3886 | ||
3887 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3888 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
3889 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
3890 | ||
3891 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3892 | fprintf (file, "%s\n", buf_ptr); | |
3893 | } | |
3894 | ||
c7ca610e | 3895 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
3896 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
3897 | ||
3898 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
a260abc9 DE |
3899 | asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], |
3900 | (TARGET_32BIT ? 4 : 8), reg_names[reg]); | |
c7ca610e | 3901 | |
a260abc9 DE |
3902 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", |
3903 | reg_names[0]); | |
38c1f2d7 | 3904 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e | 3905 | assemble_name (file, buf); |
a260abc9 | 3906 | fputs ("-", file); |
c7ca610e RK |
3907 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
3908 | assemble_name (file, buf); | |
38c1f2d7 | 3909 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 3910 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 3911 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
3912 | rs6000_pic_labelno++; |
3913 | } | |
9615f239 | 3914 | else if (! TARGET_64BIT) |
c7ca610e RK |
3915 | { |
3916 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
a260abc9 | 3917 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); |
c7ca610e | 3918 | assemble_name (file, buf); |
dfdfa60f | 3919 | fputs ("@ha\n", file); |
a260abc9 DE |
3920 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); |
3921 | assemble_name (file, buf); | |
3922 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); | |
c7ca610e RK |
3923 | } |
3924 | else | |
3925 | abort (); | |
3926 | ||
3927 | #else /* !USING_SVR4_H */ | |
3928 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
13ded975 DE |
3929 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
3930 | reg_names[reg]); | |
c7ca610e RK |
3931 | assemble_name (file, buf); |
3932 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3933 | #endif /* USING_SVR4_H */ | |
3934 | } | |
3935 | ||
38c1f2d7 MM |
3936 | \f |
3937 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
3938 | of the old frame is left in r12. */ | |
3939 | ||
3940 | void | |
3941 | rs6000_allocate_stack_space (file, size, copy_r12) | |
3942 | FILE *file; | |
3943 | int size; | |
3944 | int copy_r12; | |
3945 | { | |
3946 | int neg_size = -size; | |
3947 | if (TARGET_UPDATE) | |
3948 | { | |
3949 | if (size < 32767) | |
3950 | asm_fprintf (file, | |
3951 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3952 | reg_names[1], neg_size, reg_names[1]); | |
3953 | else | |
3954 | { | |
3955 | if (copy_r12) | |
3956 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3957 | ||
9615f239 | 3958 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
3959 | reg_names[0], (neg_size >> 16) & 0xffff, |
3960 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3961 | asm_fprintf (file, | |
3962 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3963 | reg_names[1], reg_names[1], reg_names[0]); | |
3964 | } | |
3965 | } | |
3966 | else | |
3967 | { | |
3968 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3969 | if (size < 32767) | |
aa4201ad | 3970 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
a260abc9 | 3971 | reg_names[1], neg_size, reg_names[1]); |
38c1f2d7 MM |
3972 | else |
3973 | { | |
9615f239 | 3974 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
3975 | reg_names[0], (neg_size >> 16) & 0xffff, |
3976 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3977 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
3978 | reg_names[0], reg_names[1]); | |
3979 | } | |
3980 | ||
3981 | asm_fprintf (file, | |
3982 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
3983 | reg_names[12], reg_names[1]); | |
3984 | } | |
3985 | } | |
3986 | ||
3987 | \f | |
9878760c | 3988 | /* Write function prologue. */ |
9878760c RK |
3989 | void |
3990 | output_prolog (file, size) | |
3991 | FILE *file; | |
296b8152 | 3992 | int size ATTRIBUTE_UNUSED; |
9878760c | 3993 | { |
4697a36c | 3994 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a | 3995 | int reg_size = info->reg_size; |
d330fd93 KG |
3996 | const char *store_reg; |
3997 | const char *load_reg; | |
979721f8 MM |
3998 | int sp_reg = 1; |
3999 | int sp_offset = 0; | |
b6c9286a | 4000 | |
8f802bfb | 4001 | if (TARGET_32BIT) |
b6c9286a | 4002 | { |
8f802bfb DE |
4003 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
4004 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
4005 | } |
4006 | else | |
4007 | { | |
8f802bfb DE |
4008 | store_reg = "\tstd %s,%d(%s)\n"; |
4009 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 4010 | } |
9878760c | 4011 | |
4697a36c MM |
4012 | if (TARGET_DEBUG_STACK) |
4013 | debug_stack_info (info); | |
9878760c RK |
4014 | |
4015 | /* Write .extern for any function we will call to save and restore fp | |
4016 | values. */ | |
b6c9286a | 4017 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 4018 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
4019 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
4020 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
4021 | |
4022 | /* Write .extern for truncation routines, if needed. */ | |
4023 | if (rs6000_trunc_used && ! trunc_defined) | |
4024 | { | |
e138174b ILT |
4025 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
4026 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
4027 | trunc_defined = 1; |
4028 | } | |
4697a36c | 4029 | |
c764f757 RK |
4030 | /* Write .extern for AIX common mode routines, if needed. */ |
4031 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
4032 | { | |
f6709c70 JW |
4033 | fputs ("\t.extern __mulh\n", file); |
4034 | fputs ("\t.extern __mull\n", file); | |
4035 | fputs ("\t.extern __divss\n", file); | |
4036 | fputs ("\t.extern __divus\n", file); | |
4037 | fputs ("\t.extern __quoss\n", file); | |
4038 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
4039 | common_mode_defined = 1; |
4040 | } | |
9878760c | 4041 | |
979721f8 | 4042 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 4043 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
4044 | { |
4045 | if (info->total_size < 32767) | |
38c1f2d7 | 4046 | sp_offset = info->total_size; |
979721f8 | 4047 | else |
38c1f2d7 MM |
4048 | sp_reg = 12; |
4049 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
4050 | } |
4051 | ||
9878760c | 4052 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
4053 | if (info->lr_save_p) |
4054 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
4055 | |
4056 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 4057 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 4058 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
4059 | |
4060 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
4061 | ourself. Otherwise, call function. Note that since they are statically |
4062 | linked, we do not need a nop following them. */ | |
4697a36c | 4063 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 4064 | { |
4697a36c | 4065 | int regno = info->first_fp_reg_save; |
979721f8 | 4066 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4067 | |
4068 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4069 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 4070 | } |
4697a36c MM |
4071 | else if (info->first_fp_reg_save != 64) |
4072 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
4073 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
4074 | |
4075 | /* Now save gpr's. */ | |
4697a36c | 4076 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4077 | { |
4697a36c | 4078 | int regno = info->first_gp_reg_save; |
979721f8 | 4079 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 4080 | |
4697a36c | 4081 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4082 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4083 | } |
4084 | ||
4697a36c MM |
4085 | else if (info->first_gp_reg_save != 32) |
4086 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
4087 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4088 | info->gp_save_offset + sp_offset, |
4089 | reg_names[sp_reg]); | |
9878760c | 4090 | |
b6c9286a MM |
4091 | /* Save main's arguments if we need to call a function */ |
4092 | #ifdef NAME__MAIN | |
4093 | if (info->main_save_p) | |
4094 | { | |
4095 | int regno; | |
5ebfb2ba | 4096 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
4097 | int size = info->main_size; |
4098 | ||
2682eae9 | 4099 | for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) |
979721f8 | 4100 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
4101 | } |
4102 | #endif | |
4103 | ||
9878760c | 4104 | /* Save lr if we used it. */ |
4697a36c | 4105 | if (info->lr_save_p) |
979721f8 MM |
4106 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
4107 | reg_names[sp_reg]); | |
9878760c RK |
4108 | |
4109 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 4110 | if (info->cr_save_p) |
979721f8 MM |
4111 | { |
4112 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
4113 | { | |
4114 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
4115 | asm_fprintf (file, store_reg, reg_names[0], | |
4116 | info->cr_save_offset + sp_offset, | |
4117 | reg_names[sp_reg]); | |
4118 | } | |
4119 | else | |
4120 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
4121 | reg_names[sp_reg]); | |
4122 | } | |
9878760c | 4123 | |
979721f8 MM |
4124 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
4125 | do it here. */ | |
4126 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
4127 | { | |
4128 | if (info->total_size < 32768) | |
4129 | { | |
4130 | int probe_offset = 4096; | |
4131 | while (probe_offset < info->total_size) | |
4132 | { | |
4133 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
4134 | probe_offset += 4096; | |
4135 | } | |
4136 | } | |
4137 | else | |
4138 | { | |
4139 | int probe_iterations = info->total_size / 4096; | |
4140 | static int probe_labelno = 0; | |
4141 | char buf[256]; | |
4142 | ||
4143 | if (probe_iterations < 32768) | |
4144 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
4145 | else | |
4146 | { | |
4147 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
4148 | if (probe_iterations & 0xffff) | |
4149 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
4150 | probe_iterations & 0xffff); | |
4151 | } | |
4152 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
4153 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4154 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
4155 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 4156 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
4157 | fputs ("\tbdnz ", file); |
4158 | assemble_name (file, buf); | |
4159 | fputs ("\n", file); | |
4160 | } | |
4161 | } | |
4162 | ||
38c1f2d7 | 4163 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 4164 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 4165 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
4166 | |
4167 | /* Set frame pointer, if needed. */ | |
4168 | if (frame_pointer_needed) | |
4697a36c | 4169 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 4170 | |
b6c9286a MM |
4171 | #ifdef NAME__MAIN |
4172 | /* If we need to call a function to set things up for main, do so now | |
4173 | before dealing with the TOC. */ | |
4174 | if (info->main_p) | |
4175 | { | |
d330fd93 | 4176 | const char *prefix = ""; |
b6c9286a MM |
4177 | |
4178 | switch (DEFAULT_ABI) | |
4179 | { | |
4180 | case ABI_AIX: prefix = "."; break; | |
4181 | case ABI_NT: prefix = ".."; break; | |
4182 | } | |
4183 | ||
4184 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
4185 | #ifdef RS6000_CALL_GLUE2 | |
4186 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
4187 | #else | |
4188 | #ifdef RS6000_CALL_GLUE | |
4189 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
4190 | fprintf (file, "\t%s\n", RS6000_CALL_GLUE); | |
4191 | #endif | |
4192 | #endif | |
4193 | ||
4194 | if (info->main_save_p) | |
4195 | { | |
4196 | int regno; | |
4197 | int loc; | |
4198 | int size = info->main_size; | |
4199 | ||
4200 | if (info->total_size < 32767) | |
4201 | { | |
4202 | loc = info->total_size + info->main_save_offset; | |
2682eae9 | 4203 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4204 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); |
4205 | } | |
4206 | else | |
5ebfb2ba MM |
4207 | { |
4208 | int neg_size = info->main_save_offset - info->total_size; | |
4209 | loc = 0; | |
9615f239 | 4210 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
5ebfb2ba MM |
4211 | reg_names[0], (neg_size >> 16) & 0xffff, |
4212 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 4213 | |
b6c9286a MM |
4214 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
4215 | reg_names[1]); | |
4216 | ||
2682eae9 | 4217 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4218 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); |
4219 | } | |
4220 | } | |
4221 | } | |
4222 | #endif | |
4223 | ||
4224 | ||
1875cc88 JW |
4225 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
4226 | TOC_TABLE address into register 30. */ | |
4697a36c | 4227 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
4228 | { |
4229 | #ifdef USING_SVR4_H | |
38c1f2d7 MM |
4230 | if (!profile_flag) |
4231 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
ab9eef41 | 4232 | #endif |
38c1f2d7 | 4233 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 4234 | } |
4697a36c | 4235 | |
b6c9286a MM |
4236 | if (DEFAULT_ABI == ABI_NT) |
4237 | { | |
4238 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4239 | fputs (".b:\n", file); | |
3daf36a4 | 4240 | } |
9878760c RK |
4241 | } |
4242 | ||
4243 | /* Write function epilogue. */ | |
4244 | ||
4245 | void | |
4246 | output_epilog (file, size) | |
4247 | FILE *file; | |
296b8152 | 4248 | int size ATTRIBUTE_UNUSED; |
9878760c | 4249 | { |
4697a36c | 4250 | rs6000_stack_t *info = rs6000_stack_info (); |
d330fd93 | 4251 | const char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 4252 | rtx insn = get_last_insn (); |
979721f8 MM |
4253 | int sp_reg = 1; |
4254 | int sp_offset = 0; | |
9878760c | 4255 | |
9878760c RK |
4256 | /* If the last insn was a BARRIER, we don't have to write anything except |
4257 | the trace table. */ | |
4258 | if (GET_CODE (insn) == NOTE) | |
4259 | insn = prev_nonnote_insn (insn); | |
4260 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
4261 | { | |
4262 | /* If we have a frame pointer, a call to alloca, or a large stack | |
4263 | frame, restore the old stack pointer using the backchain. Otherwise, | |
4264 | we know what size to update it with. */ | |
4265 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 4266 | || info->total_size > 32767) |
979721f8 MM |
4267 | { |
4268 | /* Under V.4, don't reset the stack pointer until after we're done | |
4269 | loading the saved registers. */ | |
c81bebd7 | 4270 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
4271 | sp_reg = 11; |
4272 | ||
4273 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
4274 | } | |
4697a36c MM |
4275 | else if (info->push_p) |
4276 | { | |
c81bebd7 | 4277 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 | 4278 | sp_offset = info->total_size; |
4697a36c | 4279 | else |
a260abc9 DE |
4280 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4281 | reg_names[1], info->total_size, reg_names[1]); | |
4697a36c | 4282 | } |
9878760c | 4283 | |
b4ac57ab | 4284 | /* Get the old lr if we saved it. */ |
4697a36c | 4285 | if (info->lr_save_p) |
979721f8 | 4286 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
4287 | |
4288 | /* Get the old cr if we saved it. */ | |
4697a36c | 4289 | if (info->cr_save_p) |
979721f8 | 4290 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 4291 | |
b4ac57ab | 4292 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
4293 | if (info->lr_save_p) |
4294 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 4295 | |
9878760c | 4296 | /* Restore gpr's. */ |
4697a36c | 4297 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4298 | { |
4697a36c | 4299 | int regno = info->first_gp_reg_save; |
979721f8 | 4300 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 4301 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 4302 | |
4697a36c | 4303 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4304 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4305 | } |
4306 | ||
4697a36c MM |
4307 | else if (info->first_gp_reg_save != 32) |
4308 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
4309 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4310 | info->gp_save_offset + sp_offset, |
4311 | reg_names[sp_reg]); | |
9878760c | 4312 | |
b4ac57ab | 4313 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
4314 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
4315 | { | |
4316 | int regno = info->first_fp_reg_save; | |
979721f8 | 4317 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4318 | |
4319 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4320 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 4321 | } |
9878760c | 4322 | |
28edebac RK |
4323 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
4324 | that were used. */ | |
4697a36c MM |
4325 | if (info->cr_save_p) |
4326 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
4327 | (regs_ever_live[70] != 0) * 0x20 |
4328 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 4329 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 4330 | |
a6c2a102 DE |
4331 | /* If this is V.4, unwind the stack pointer after all of the loads |
4332 | have been done */ | |
4333 | if (sp_offset != 0) | |
a260abc9 DE |
4334 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4335 | reg_names[1], sp_offset, reg_names[1]); | |
979721f8 MM |
4336 | else if (sp_reg != 1) |
4337 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
4338 | ||
b4ac57ab RS |
4339 | /* If we have to restore more than two FP registers, branch to the |
4340 | restore function. It will return to our caller. */ | |
4697a36c MM |
4341 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4342 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
4343 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 4344 | else |
85638c0d | 4345 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 4346 | } |
b4ac57ab | 4347 | |
9b30bae2 | 4348 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
4349 | on its format. |
4350 | ||
4351 | We don't output a traceback table if -finhibit-size-directive was | |
4352 | used. The documentation for -finhibit-size-directive reads | |
4353 | ``don't output a @code{.size} assembler directive, or anything | |
4354 | else that would cause trouble if the function is split in the | |
4355 | middle, and the two halves are placed at locations far apart in | |
4356 | memory.'' The traceback table has this property, since it | |
4357 | includes the offset from the start of the function to the | |
4d30c363 MM |
4358 | traceback table itself. |
4359 | ||
4360 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4361 | different traceback table. */ |
4362 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4363 | { |
314fc5a9 ILT |
4364 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4365 | int fixed_parms, float_parms, parm_info; | |
4366 | int i; | |
4367 | ||
b6c9286a MM |
4368 | while (*fname == '.') /* V.4 encodes . in the name */ |
4369 | fname++; | |
4370 | ||
314fc5a9 ILT |
4371 | /* Need label immediately before tbtab, so we can compute its offset |
4372 | from the function start. */ | |
4373 | if (*fname == '*') | |
4374 | ++fname; | |
4375 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4376 | ASM_OUTPUT_LABEL (file, fname); | |
4377 | ||
4378 | /* The .tbtab pseudo-op can only be used for the first eight | |
4379 | expressions, since it can't handle the possibly variable | |
4380 | length fields that follow. However, if you omit the optional | |
4381 | fields, the assembler outputs zeros for all optional fields | |
4382 | anyways, giving each variable length field is minimum length | |
4383 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4384 | pseudo-op at all. */ | |
4385 | ||
4386 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4387 | that have to find it by searching forward from the entry | |
4388 | point or from the current pc. */ | |
19d2d16f | 4389 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4390 | |
4391 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4392 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4393 | |
4394 | /* Language type. Unfortunately, there doesn't seem to be any | |
4395 | official way to get this info, so we use language_string. C | |
4396 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
9517ead8 | 4397 | value for C for now. There is no official value for Java, |
6f573ff9 JL |
4398 | although IBM appears to be using 13. There is no official value |
4399 | for Chill, so we've choosen 44 pseudo-randomly. */ | |
314fc5a9 ILT |
4400 | if (! strcmp (language_string, "GNU C") |
4401 | || ! strcmp (language_string, "GNU Obj-C")) | |
4402 | i = 0; | |
4403 | else if (! strcmp (language_string, "GNU F77")) | |
4404 | i = 1; | |
4405 | else if (! strcmp (language_string, "GNU Ada")) | |
4406 | i = 3; | |
8b83775b | 4407 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4408 | i = 2; |
4409 | else if (! strcmp (language_string, "GNU C++")) | |
4410 | i = 9; | |
9517ead8 AG |
4411 | else if (! strcmp (language_string, "GNU Java")) |
4412 | i = 13; | |
6f573ff9 JL |
4413 | else if (! strcmp (language_string, "GNU CHILL")) |
4414 | i = 44; | |
314fc5a9 ILT |
4415 | else |
4416 | abort (); | |
4417 | fprintf (file, "%d,", i); | |
4418 | ||
4419 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4420 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4421 | from start of procedure stored in tbtab, internal function, function | |
4422 | has controlled storage, function has no toc, function uses fp, | |
4423 | function logs/aborts fp operations. */ | |
4424 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4425 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4426 | |
4427 | /* 6 bitfields: function is interrupt handler, name present in | |
4428 | proc table, function calls alloca, on condition directives | |
4429 | (controls stack walks, 3 bits), saves condition reg, saves | |
4430 | link reg. */ | |
4431 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4432 | set up as a frame pointer, even when there is no alloca call. */ | |
4433 | fprintf (file, "%d,", | |
4434 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4435 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4436 | |
4437 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4438 | (6 bits). */ | |
4439 | fprintf (file, "%d,", | |
4697a36c | 4440 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4441 | |
4442 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4443 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4444 | ||
4445 | { | |
4446 | /* Compute the parameter info from the function decl argument | |
4447 | list. */ | |
4448 | tree decl; | |
4449 | int next_parm_info_bit; | |
4450 | ||
4451 | next_parm_info_bit = 31; | |
4452 | parm_info = 0; | |
4453 | fixed_parms = 0; | |
4454 | float_parms = 0; | |
4455 | ||
4456 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4457 | decl; decl = TREE_CHAIN (decl)) | |
4458 | { | |
4459 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4460 | enum machine_mode mode = GET_MODE (parameter); | |
4461 | ||
4462 | if (GET_CODE (parameter) == REG) | |
4463 | { | |
4464 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4465 | { | |
4466 | int bits; | |
4467 | ||
4468 | float_parms++; | |
4469 | ||
4470 | if (mode == SFmode) | |
4471 | bits = 0x2; | |
4472 | else if (mode == DFmode) | |
4473 | bits = 0x3; | |
4474 | else | |
4475 | abort (); | |
4476 | ||
4477 | /* If only one bit will fit, don't or in this entry. */ | |
4478 | if (next_parm_info_bit > 0) | |
4479 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4480 | next_parm_info_bit -= 2; | |
4481 | } | |
4482 | else | |
4483 | { | |
4484 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4485 | + (UNITS_PER_WORD - 1)) | |
4486 | / UNITS_PER_WORD); | |
4487 | next_parm_info_bit -= 1; | |
4488 | } | |
4489 | } | |
4490 | } | |
4491 | } | |
4492 | ||
4493 | /* Number of fixed point parameters. */ | |
4494 | /* This is actually the number of words of fixed point parameters; thus | |
4495 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4496 | fprintf (file, "%d,", fixed_parms); | |
4497 | ||
4498 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4499 | all on stack. */ | |
4500 | /* This is actually the number of fp registers that hold parameters; | |
4501 | and thus the maximum value is 13. */ | |
4502 | /* Set parameters on stack bit if parameters are not in their original | |
4503 | registers, regardless of whether they are on the stack? Xlc | |
4504 | seems to set the bit when not optimizing. */ | |
4505 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4506 | ||
4507 | /* Optional fields follow. Some are variable length. */ | |
4508 | ||
4509 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4510 | 11 double float. */ | |
4511 | /* There is an entry for each parameter in a register, in the order that | |
4512 | they occur in the parameter list. Any intervening arguments on the | |
4513 | stack are ignored. If the list overflows a long (max possible length | |
4514 | 34 bits) then completely leave off all elements that don't fit. */ | |
4515 | /* Only emit this long if there was at least one parameter. */ | |
4516 | if (fixed_parms || float_parms) | |
4517 | fprintf (file, "\t.long %d\n", parm_info); | |
4518 | ||
4519 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4520 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4521 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4522 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4523 | fputs ("-.", file); |
314fc5a9 | 4524 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4525 | putc ('\n', file); |
314fc5a9 ILT |
4526 | |
4527 | /* Interrupt handler mask. */ | |
4528 | /* Omit this long, since we never set the interrupt handler bit | |
4529 | above. */ | |
4530 | ||
4531 | /* Number of CTL (controlled storage) anchors. */ | |
4532 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4533 | ||
4534 | /* Displacement into stack of each CTL anchor. */ | |
4535 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4536 | ||
4537 | /* Length of function name. */ | |
296b8152 | 4538 | fprintf (file, "\t.short %d\n", (int) strlen (fname)); |
314fc5a9 ILT |
4539 | |
4540 | /* Function name. */ | |
4541 | assemble_string (fname, strlen (fname)); | |
4542 | ||
4543 | /* Register for alloca automatic storage; this is always reg 31. | |
4544 | Only emit this if the alloca bit was set above. */ | |
4545 | if (frame_pointer_needed) | |
19d2d16f | 4546 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4547 | } |
4697a36c | 4548 | |
b6c9286a MM |
4549 | if (DEFAULT_ABI == ABI_NT) |
4550 | { | |
4551 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4552 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4553 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4554 | fputs (":\n", file); | |
4555 | } | |
9878760c | 4556 | } |
17167fd8 MM |
4557 | \f |
4558 | /* A C compound statement that outputs the assembler code for a thunk function, | |
4559 | used to implement C++ virtual function calls with multiple inheritance. The | |
4560 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
4561 | object parameter before handing control off to the real function. | |
4562 | ||
4563 | First, emit code to add the integer DELTA to the location that contains the | |
4564 | incoming first argument. Assume that this argument contains a pointer, and | |
4565 | is the one used to pass the `this' pointer in C++. This is the incoming | |
4566 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
4567 | addition must preserve the values of all other incoming arguments. | |
4568 | ||
4569 | After the addition, emit code to jump to FUNCTION, which is a | |
4570 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
4571 | the return address. Hence returning from FUNCTION will return to whoever | |
4572 | called the current `thunk'. | |
4573 | ||
4574 | The effect must be as if FUNCTION had been called directly with the adjusted | |
4575 | first argument. This macro is responsible for emitting all of the code for | |
4576 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
4577 | invoked. | |
4578 | ||
4579 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
4580 | extracted from it.) It might possibly be useful on some targets, but | |
4581 | probably not. | |
4582 | ||
4583 | If you do not define this macro, the target-independent code in the C++ | |
4584 | frontend will generate a less efficient heavyweight thunk that calls | |
4585 | FUNCTION instead of jumping to it. The generic approach does not support | |
4586 | varargs. */ | |
4587 | ||
4588 | void | |
4589 | output_mi_thunk (file, thunk_fndecl, delta, function) | |
4590 | FILE *file; | |
d330fd93 | 4591 | tree thunk_fndecl ATTRIBUTE_UNUSED; |
17167fd8 MM |
4592 | int delta; |
4593 | tree function; | |
4594 | { | |
d330fd93 KG |
4595 | const char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ]; |
4596 | const char *prefix; | |
17167fd8 | 4597 | char *fname; |
d330fd93 KG |
4598 | const char *r0 = reg_names[0]; |
4599 | const char *sp = reg_names[1]; | |
4600 | const char *toc = reg_names[2]; | |
4601 | const char *schain = reg_names[11]; | |
4602 | const char *r12 = reg_names[12]; | |
17167fd8 MM |
4603 | char buf[512]; |
4604 | static int labelno = 0; | |
4605 | ||
4606 | /* Small constants that can be done by one add instruction */ | |
4607 | if (delta >= -32768 && delta <= 32767) | |
4608 | { | |
22b4a3b0 | 4609 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4610 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg); |
4611 | else | |
4612 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta); | |
4613 | } | |
4614 | ||
4615 | /* Large constants that can be done by one addis instruction */ | |
4616 | else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1) | |
4617 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4618 | delta >> 16); | |
4619 | ||
4620 | /* 32-bit constants that can be done by an add and addis instruction. */ | |
4621 | else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1) | |
4622 | { | |
22b4a3b0 | 4623 | /* Break into two pieces, propagating the sign bit from the low word to |
17167fd8 MM |
4624 | the upper word. */ |
4625 | int delta_high = delta >> 16; | |
4626 | int delta_low = delta & 0xffff; | |
4627 | if ((delta_low & 0x8000) != 0) | |
4628 | { | |
4629 | delta_high++; | |
4630 | delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */ | |
4631 | } | |
4632 | ||
4633 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4634 | delta_high); | |
4635 | ||
22b4a3b0 | 4636 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4637 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg); |
4638 | else | |
4639 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low); | |
4640 | } | |
4641 | ||
4642 | /* 64-bit constants, fixme */ | |
4643 | else | |
4644 | abort (); | |
4645 | ||
4646 | /* Get the prefix in front of the names. */ | |
4647 | switch (DEFAULT_ABI) | |
4648 | { | |
4649 | default: | |
4650 | abort (); | |
4651 | ||
4652 | case ABI_AIX: | |
4653 | prefix = "."; | |
4654 | break; | |
4655 | ||
4656 | case ABI_V4: | |
4657 | case ABI_AIX_NODESC: | |
4658 | case ABI_SOLARIS: | |
4659 | prefix = ""; | |
4660 | break; | |
4661 | ||
4662 | case ABI_NT: | |
4663 | prefix = ".."; | |
4664 | break; | |
4665 | } | |
4666 | ||
4667 | /* If the function is compiled in this module, jump to it directly. | |
4668 | Otherwise, load up its address and jump to it. */ | |
4669 | ||
4670 | fname = XSTR (XEXP (DECL_RTL (function), 0), 0); | |
42820a49 | 4671 | |
efc97ef0 | 4672 | if (current_file_function_operand (XEXP (DECL_RTL (function), 0)) |
22b4a3b0 FS |
4673 | && ! lookup_attribute ("longcall", |
4674 | TYPE_ATTRIBUTES (TREE_TYPE (function)))) | |
17167fd8 MM |
4675 | { |
4676 | fprintf (file, "\tb %s", prefix); | |
4677 | assemble_name (file, fname); | |
22b4a3b0 FS |
4678 | if (DEFAULT_ABI == ABI_V4 && flag_pic) fputs ("@local", file); |
4679 | fputs ("\n", file); | |
17167fd8 MM |
4680 | } |
4681 | ||
4682 | else | |
4683 | { | |
4684 | switch (DEFAULT_ABI) | |
4685 | { | |
4686 | default: | |
4687 | case ABI_NT: | |
4688 | abort (); | |
4689 | ||
4690 | case ABI_AIX: | |
4691 | /* Set up a TOC entry for the function. */ | |
4692 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4693 | toc_section (); | |
4694 | ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); | |
4695 | labelno++; | |
4696 | ||
4697 | /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since | |
4698 | there will be only one TOC entry for this function. */ | |
4699 | fputs ("\t.tc\t", file); | |
4700 | assemble_name (file, buf); | |
4701 | fputs ("[TC],", file); | |
4702 | assemble_name (file, buf); | |
4703 | putc ('\n', file); | |
4704 | text_section (); | |
4705 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12); | |
4706 | assemble_name (file, buf); | |
4707 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
4708 | asm_fprintf (file, | |
4709 | (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n", | |
4710 | r0, r12); | |
4711 | ||
4712 | asm_fprintf (file, | |
4713 | (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n", | |
4714 | toc, r12); | |
4715 | ||
4716 | asm_fprintf (file, "\tmtctr %s\n", r0); | |
4717 | asm_fprintf (file, | |
4718 | (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n", | |
4719 | schain, r12); | |
4720 | ||
4721 | asm_fprintf (file, "\tbctr\n"); | |
4722 | break; | |
4723 | ||
17167fd8 | 4724 | case ABI_V4: |
22b4a3b0 FS |
4725 | fprintf (file, "\tb %s", prefix); |
4726 | assemble_name (file, fname); | |
4727 | if (flag_pic) fputs ("@plt", file); | |
4728 | fputs ("\n", file); | |
4729 | break; | |
4730 | ||
4731 | /* Don't use r11, that contains the static chain, just use r0/r12. */ | |
17167fd8 MM |
4732 | case ABI_AIX_NODESC: |
4733 | case ABI_SOLARIS: | |
4734 | if (flag_pic == 1) | |
4735 | { | |
4736 | fprintf (file, "\tmflr %s\n", r0); | |
4737 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4738 | asm_fprintf (file, "\tmflr %s\n", r12); | |
4739 | asm_fprintf (file, "\tmtlr %s\n", r0); | |
4740 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4741 | assemble_name (file, fname); | |
4742 | asm_fprintf (file, "@got(%s)\n", r12); | |
42820a49 MM |
4743 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4744 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4745 | } |
4746 | #if TARGET_ELF | |
4747 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4748 | { | |
4749 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4750 | labelno++; | |
4751 | fprintf (file, "\tmflr %s\n", r0); | |
4752 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", r0, sp); | |
4753 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
4754 | rs6000_output_load_toc_table (file, 12); | |
4755 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4756 | assemble_name (file, buf); | |
4757 | asm_fprintf (file, "(%s)\n", r12); | |
4758 | asm_fprintf (file, "\t{l|lwz} %s,4(%s)\n", r12, sp); | |
4759 | asm_fprintf (file, "\tmtlr %s\n", r12); | |
42820a49 MM |
4760 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4761 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4762 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
4763 | assemble_name (file, buf); | |
4764 | fputs (" = .-.LCTOC1\n", file); | |
4765 | fputs ("\t.long ", file); | |
4766 | assemble_name (file, fname); | |
4767 | fputs ("\n\t.previous\n", file); | |
4768 | } | |
42820a49 MM |
4769 | #endif /* TARGET_ELF */ |
4770 | ||
17167fd8 MM |
4771 | else |
4772 | { | |
42820a49 | 4773 | asm_fprintf (file, "\t{liu|lis} %s,", r12); |
17167fd8 MM |
4774 | assemble_name (file, fname); |
4775 | asm_fprintf (file, "@ha\n"); | |
42820a49 | 4776 | asm_fprintf (file, "\t{cal|la} %s,", r12); |
17167fd8 | 4777 | assemble_name (file, fname); |
42820a49 MM |
4778 | asm_fprintf (file, "@l(%s)\n", r12); |
4779 | asm_fprintf (file, "\tmtctr %s\n", r12); | |
4780 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4781 | } |
4782 | ||
17167fd8 MM |
4783 | break; |
4784 | } | |
4785 | } | |
4786 | } | |
4787 | ||
9878760c RK |
4788 | \f |
4789 | /* Output a TOC entry. We derive the entry name from what is | |
4790 | being written. */ | |
4791 | ||
4792 | void | |
4793 | output_toc (file, x, labelno) | |
4794 | FILE *file; | |
4795 | rtx x; | |
4796 | int labelno; | |
4797 | { | |
4798 | char buf[256]; | |
4799 | char *name = buf; | |
b6c9286a | 4800 | char *real_name; |
9878760c RK |
4801 | rtx base = x; |
4802 | int offset = 0; | |
4803 | ||
4697a36c MM |
4804 | if (TARGET_NO_TOC) |
4805 | abort (); | |
4806 | ||
ff1720ed RK |
4807 | /* if we're going to put a double constant in the TOC, make sure it's |
4808 | aligned properly when strict alignment is on. */ | |
4809 | if (GET_CODE (x) == CONST_DOUBLE | |
4810 | && STRICT_ALIGNMENT | |
4811 | && GET_MODE (x) == DFmode | |
4812 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4813 | ASM_OUTPUT_ALIGN (file, 3); | |
4814 | } | |
4815 | ||
4816 | ||
b6c9286a | 4817 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4818 | { |
4819 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4820 | fprintf (file, "%d = .-", labelno); | |
4821 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4822 | fputs ("1\n", file); |
d14a6d05 MM |
4823 | } |
4824 | else | |
d14a6d05 | 4825 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4826 | |
37c37a57 RK |
4827 | /* Handle FP constants specially. Note that if we have a minimal |
4828 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4829 | FP constants. */ | |
042259f2 | 4830 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4831 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4832 | { |
042259f2 DE |
4833 | REAL_VALUE_TYPE rv; |
4834 | long k[2]; | |
0adc764e | 4835 | |
042259f2 DE |
4836 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4837 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
13ded975 DE |
4838 | if (TARGET_64BIT) |
4839 | { | |
4840 | if (TARGET_MINIMAL_TOC) | |
4841 | fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); | |
4842 | else | |
4843 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", | |
4844 | k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); | |
4845 | return; | |
4846 | } | |
1875cc88 | 4847 | else |
13ded975 DE |
4848 | { |
4849 | if (TARGET_MINIMAL_TOC) | |
4850 | fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]); | |
4851 | else | |
4852 | fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", | |
4853 | k[0], k[1], k[0], k[1]); | |
4854 | return; | |
4855 | } | |
9878760c RK |
4856 | } |
4857 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4858 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4859 | { |
042259f2 DE |
4860 | REAL_VALUE_TYPE rv; |
4861 | long l; | |
9878760c | 4862 | |
042259f2 DE |
4863 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4864 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4865 | ||
4866 | if (TARGET_MINIMAL_TOC) | |
13ded975 | 4867 | fprintf (file, TARGET_32BIT ? "\t.long %ld\n" : "\t.llong %ld\n", l); |
042259f2 | 4868 | else |
1883e716 | 4869 | fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l); |
042259f2 DE |
4870 | return; |
4871 | } | |
4872 | else if (GET_MODE (x) == DImode | |
4873 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4874 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4875 | { | |
4876 | HOST_WIDE_INT low; | |
4877 | HOST_WIDE_INT high; | |
4878 | ||
4879 | if (GET_CODE (x) == CONST_DOUBLE) | |
4880 | { | |
4881 | low = CONST_DOUBLE_LOW (x); | |
4882 | high = CONST_DOUBLE_HIGH (x); | |
4883 | } | |
4884 | else | |
4885 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4886 | { | |
4887 | low = INTVAL (x); | |
4888 | high = (low < 0) ? ~0 : 0; | |
4889 | } | |
4890 | #else | |
4891 | { | |
4892 | low = INTVAL (x) & 0xffffffff; | |
4893 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4894 | } | |
4895 | #endif | |
9878760c | 4896 | |
13ded975 DE |
4897 | if (TARGET_64BIT) |
4898 | { | |
4899 | if (TARGET_MINIMAL_TOC) | |
4900 | fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); | |
4901 | else | |
4902 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", | |
4903 | (long)high, (long)low, (long)high, (long)low); | |
4904 | return; | |
4905 | } | |
1875cc88 | 4906 | else |
13ded975 DE |
4907 | { |
4908 | if (TARGET_MINIMAL_TOC) | |
4909 | fprintf (file, "\t.long %ld\n\t.long %ld\n", | |
4910 | (long)high, (long)low); | |
4911 | else | |
4912 | fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", | |
4913 | (long)high, (long)low, (long)high, (long)low); | |
4914 | return; | |
4915 | } | |
9878760c RK |
4916 | } |
4917 | ||
4918 | if (GET_CODE (x) == CONST) | |
4919 | { | |
4920 | base = XEXP (XEXP (x, 0), 0); | |
4921 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4922 | } | |
4923 | ||
4924 | if (GET_CODE (base) == SYMBOL_REF) | |
4925 | name = XSTR (base, 0); | |
4926 | else if (GET_CODE (base) == LABEL_REF) | |
4927 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4928 | else if (GET_CODE (base) == CODE_LABEL) | |
4929 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4930 | else | |
4931 | abort (); | |
4932 | ||
2e4eb9b0 | 4933 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4934 | if (TARGET_MINIMAL_TOC) |
13ded975 | 4935 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
1875cc88 JW |
4936 | else |
4937 | { | |
b6c9286a | 4938 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4939 | |
1875cc88 JW |
4940 | if (offset < 0) |
4941 | fprintf (file, ".N%d", - offset); | |
4942 | else if (offset) | |
4943 | fprintf (file, ".P%d", offset); | |
9878760c | 4944 | |
19d2d16f | 4945 | fputs ("[TC],", file); |
1875cc88 | 4946 | } |
581bc4de MM |
4947 | |
4948 | /* Currently C++ toc references to vtables can be emitted before it | |
4949 | is decided whether the vtable is public or private. If this is | |
4950 | the case, then the linker will eventually complain that there is | |
4951 | a TOC reference to an unknown section. Thus, for vtables only, | |
4952 | we emit the TOC reference to reference the symbol and not the | |
4953 | section. */ | |
3807773b | 4954 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4955 | { |
3807773b | 4956 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4957 | if (offset < 0) |
4958 | fprintf (file, "%d", offset); | |
4959 | else if (offset > 0) | |
4960 | fprintf (file, "+%d", offset); | |
4961 | } | |
4962 | else | |
4963 | output_addr_const (file, x); | |
19d2d16f | 4964 | putc ('\n', file); |
9878760c RK |
4965 | } |
4966 | \f | |
4967 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4968 | starting at P to FILE. | |
4969 | ||
4970 | On the RS/6000, we have to do this using the .byte operation and | |
4971 | write out special characters outside the quoted string. | |
4972 | Also, the assembler is broken; very long strings are truncated, | |
4973 | so we must artificially break them up early. */ | |
4974 | ||
4975 | void | |
4976 | output_ascii (file, p, n) | |
4977 | FILE *file; | |
d330fd93 | 4978 | const char *p; |
9878760c RK |
4979 | int n; |
4980 | { | |
4981 | char c; | |
4982 | int i, count_string; | |
d330fd93 KG |
4983 | const char *for_string = "\t.byte \""; |
4984 | const char *for_decimal = "\t.byte "; | |
4985 | const char *to_close = NULL; | |
9878760c RK |
4986 | |
4987 | count_string = 0; | |
4988 | for (i = 0; i < n; i++) | |
4989 | { | |
4990 | c = *p++; | |
4991 | if (c >= ' ' && c < 0177) | |
4992 | { | |
4993 | if (for_string) | |
4994 | fputs (for_string, file); | |
4995 | putc (c, file); | |
4996 | ||
4997 | /* Write two quotes to get one. */ | |
4998 | if (c == '"') | |
4999 | { | |
5000 | putc (c, file); | |
5001 | ++count_string; | |
5002 | } | |
5003 | ||
5004 | for_string = NULL; | |
5005 | for_decimal = "\"\n\t.byte "; | |
5006 | to_close = "\"\n"; | |
5007 | ++count_string; | |
5008 | ||
5009 | if (count_string >= 512) | |
5010 | { | |
5011 | fputs (to_close, file); | |
5012 | ||
5013 | for_string = "\t.byte \""; | |
5014 | for_decimal = "\t.byte "; | |
5015 | to_close = NULL; | |
5016 | count_string = 0; | |
5017 | } | |
5018 | } | |
5019 | else | |
5020 | { | |
5021 | if (for_decimal) | |
5022 | fputs (for_decimal, file); | |
5023 | fprintf (file, "%d", c); | |
5024 | ||
5025 | for_string = "\n\t.byte \""; | |
5026 | for_decimal = ", "; | |
5027 | to_close = "\n"; | |
5028 | count_string = 0; | |
5029 | } | |
5030 | } | |
5031 | ||
5032 | /* Now close the string if we have written one. Then end the line. */ | |
5033 | if (to_close) | |
5034 | fprintf (file, to_close); | |
5035 | } | |
5036 | \f | |
5037 | /* Generate a unique section name for FILENAME for a section type | |
5038 | represented by SECTION_DESC. Output goes into BUF. | |
5039 | ||
5040 | SECTION_DESC can be any string, as long as it is different for each | |
5041 | possible section type. | |
5042 | ||
5043 | We name the section in the same manner as xlc. The name begins with an | |
5044 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
5045 | names) with the last period replaced by the string SECTION_DESC. If |
5046 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
5047 | the name. */ | |
9878760c RK |
5048 | |
5049 | void | |
5050 | rs6000_gen_section_name (buf, filename, section_desc) | |
5051 | char **buf; | |
5052 | char *filename; | |
5053 | char *section_desc; | |
5054 | { | |
d330fd93 | 5055 | char *q, *after_last_slash, *last_period = 0; |
9878760c RK |
5056 | char *p; |
5057 | int len; | |
9878760c RK |
5058 | |
5059 | after_last_slash = filename; | |
5060 | for (q = filename; *q; q++) | |
11e5fe42 RK |
5061 | { |
5062 | if (*q == '/') | |
5063 | after_last_slash = q + 1; | |
5064 | else if (*q == '.') | |
5065 | last_period = q; | |
5066 | } | |
9878760c | 5067 | |
11e5fe42 | 5068 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
5069 | *buf = (char *) permalloc (len); |
5070 | ||
5071 | p = *buf; | |
5072 | *p++ = '_'; | |
5073 | ||
5074 | for (q = after_last_slash; *q; q++) | |
5075 | { | |
11e5fe42 | 5076 | if (q == last_period) |
9878760c RK |
5077 | { |
5078 | strcpy (p, section_desc); | |
5079 | p += strlen (section_desc); | |
9878760c RK |
5080 | } |
5081 | ||
e9a780ec | 5082 | else if (ISALNUM (*q)) |
9878760c RK |
5083 | *p++ = *q; |
5084 | } | |
5085 | ||
11e5fe42 | 5086 | if (last_period == 0) |
9878760c RK |
5087 | strcpy (p, section_desc); |
5088 | else | |
5089 | *p = '\0'; | |
5090 | } | |
e165f3f0 RK |
5091 | \f |
5092 | /* Write function profiler code. */ | |
5093 | ||
5094 | void | |
5095 | output_function_profiler (file, labelno) | |
5096 | FILE *file; | |
5097 | int labelno; | |
5098 | { | |
5099 | /* The last used parameter register. */ | |
5100 | int last_parm_reg; | |
5101 | int i, j; | |
3daf36a4 | 5102 | char buf[100]; |
e165f3f0 | 5103 | |
3daf36a4 | 5104 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 5105 | switch (DEFAULT_ABI) |
3daf36a4 | 5106 | { |
38c1f2d7 MM |
5107 | default: |
5108 | abort (); | |
5109 | ||
5110 | case ABI_V4: | |
5111 | case ABI_SOLARIS: | |
5112 | case ABI_AIX_NODESC: | |
5113 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
5114 | if (flag_pic == 1) | |
5115 | { | |
dfdfa60f DE |
5116 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); |
5117 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", | |
5118 | reg_names[0], reg_names[1]); | |
17167fd8 | 5119 | asm_fprintf (file, "\tmflr %s\n", reg_names[12]); |
dfdfa60f | 5120 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); |
38c1f2d7 | 5121 | assemble_name (file, buf); |
17167fd8 | 5122 | asm_fprintf (file, "@got(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5123 | } |
5124 | #if TARGET_ELF | |
5125 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
5126 | { | |
dfdfa60f DE |
5127 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5128 | reg_names[0], reg_names[1]); | |
38c1f2d7 | 5129 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
17167fd8 MM |
5130 | rs6000_output_load_toc_table (file, 12); |
5131 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[12]); | |
38c1f2d7 | 5132 | assemble_name (file, buf); |
17167fd8 | 5133 | asm_fprintf (file, "X(%s)\n", reg_names[12]); |
dfdfa60f | 5134 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
034e84c4 | 5135 | assemble_name (file, buf); |
dfdfa60f DE |
5136 | fputs ("X = .-.LCTOC1\n", file); |
5137 | fputs ("\t.long ", file); | |
034e84c4 MM |
5138 | assemble_name (file, buf); |
5139 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
5140 | } |
5141 | #endif | |
38c1f2d7 MM |
5142 | else |
5143 | { | |
17167fd8 | 5144 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]); |
38c1f2d7 | 5145 | assemble_name (file, buf); |
dfdfa60f | 5146 | fputs ("@ha\n", file); |
b5253831 DE |
5147 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5148 | reg_names[0], reg_names[1]); | |
a260abc9 | 5149 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); |
38c1f2d7 | 5150 | assemble_name (file, buf); |
17167fd8 | 5151 | asm_fprintf (file, "@l(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5152 | } |
5153 | ||
b5253831 DE |
5154 | if (current_function_needs_context) |
5155 | asm_fprintf (file, "\tmr %s,%s\n", | |
5156 | reg_names[30], reg_names[STATIC_CHAIN_REGNUM]); | |
38c1f2d7 | 5157 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); |
b5253831 DE |
5158 | if (current_function_needs_context) |
5159 | asm_fprintf (file, "\tmr %s,%s\n", | |
5160 | reg_names[STATIC_CHAIN_REGNUM], reg_names[30]); | |
38c1f2d7 MM |
5161 | break; |
5162 | ||
5163 | case ABI_AIX: | |
5164 | /* Set up a TOC entry for the profiler label. */ | |
5165 | toc_section (); | |
5166 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
5167 | if (TARGET_MINIMAL_TOC) | |
5168 | { | |
13ded975 | 5169 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
38c1f2d7 MM |
5170 | assemble_name (file, buf); |
5171 | putc ('\n', file); | |
5172 | } | |
5173 | else | |
5174 | { | |
5175 | fputs ("\t.tc\t", file); | |
5176 | assemble_name (file, buf); | |
5177 | fputs ("[TC],", file); | |
5178 | assemble_name (file, buf); | |
5179 | putc ('\n', file); | |
5180 | } | |
5181 | text_section (); | |
e165f3f0 RK |
5182 | |
5183 | /* Figure out last used parameter register. The proper thing to do is | |
5184 | to walk incoming args of the function. A function might have live | |
5185 | parameter registers even if it has no incoming args. */ | |
5186 | ||
38c1f2d7 MM |
5187 | for (last_parm_reg = 10; |
5188 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
5189 | last_parm_reg--) | |
5190 | ; | |
e165f3f0 | 5191 | |
b5253831 DE |
5192 | /* Save parameter registers in regs 23-30 and static chain in r22. |
5193 | Don't overwrite reg 31, since it might be set up as the frame pointer. */ | |
e165f3f0 | 5194 | |
38c1f2d7 MM |
5195 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5196 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
b5253831 DE |
5197 | if (current_function_needs_context) |
5198 | asm_fprintf (file, "\tmr %d,%d\n", j, STATIC_CHAIN_REGNUM); | |
e165f3f0 RK |
5199 | |
5200 | /* Load location address into r3, and call mcount. */ | |
5201 | ||
38c1f2d7 | 5202 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
13ded975 DE |
5203 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
5204 | reg_names[3]); | |
38c1f2d7 | 5205 | assemble_name (file, buf); |
a260abc9 DE |
5206 | asm_fprintf (file, "(%s)\n\tbl %s\n\t%s\n", |
5207 | reg_names[2], RS6000_MCOUNT, RS6000_CALL_GLUE); | |
e165f3f0 | 5208 | |
b5253831 | 5209 | /* Restore parameter registers and static chain. */ |
e165f3f0 | 5210 | |
38c1f2d7 MM |
5211 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5212 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
b5253831 DE |
5213 | if (current_function_needs_context) |
5214 | asm_fprintf (file, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM, j); | |
5215 | ||
38c1f2d7 MM |
5216 | break; |
5217 | } | |
e165f3f0 | 5218 | } |
a251ffd0 TG |
5219 | |
5220 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
5221 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
5222 | ||
5223 | int | |
a06faf84 | 5224 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
5225 | rtx insn; |
5226 | rtx link; | |
296b8152 | 5227 | rtx dep_insn ATTRIBUTE_UNUSED; |
a251ffd0 TG |
5228 | int cost; |
5229 | { | |
5230 | if (! recog_memoized (insn)) | |
5231 | return 0; | |
5232 | ||
5233 | if (REG_NOTE_KIND (link) != 0) | |
5234 | return 0; | |
5235 | ||
5236 | if (REG_NOTE_KIND (link) == 0) | |
5237 | { | |
5238 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
5239 | cycles later. */ | |
5240 | ||
5241 | /* Tell the first scheduling pass about the latency between a mtctr | |
5242 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
5243 | know about this latency since the mtctr instruction, which has the | |
5244 | latency associated to it, will be generated by reload. */ | |
5245 | if (get_attr_type (insn) == TYPE_JMPREG) | |
5246 | return TARGET_POWER ? 5 : 4; | |
5247 | ||
5248 | /* Fall out to return default cost. */ | |
5249 | } | |
5250 | ||
5251 | return cost; | |
5252 | } | |
b6c9286a | 5253 | |
bef84347 VM |
5254 | /* A C statement (sans semicolon) to update the integer scheduling priority |
5255 | INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, | |
5256 | increase the priority to execute INSN later. Do not define this macro if | |
5257 | you do not need to adjust the scheduling priorities of insns. */ | |
5258 | ||
5259 | int | |
5260 | rs6000_adjust_priority (insn, priority) | |
d330fd93 | 5261 | rtx insn ATTRIBUTE_UNUSED; |
bef84347 VM |
5262 | int priority; |
5263 | { | |
5264 | /* On machines (like the 750) which have asymetric integer units, where one | |
5265 | integer unit can do multiply and divides and the other can't, reduce the | |
5266 | priority of multiply/divide so it is scheduled before other integer | |
5267 | operationss. */ | |
5268 | ||
5269 | #if 0 | |
5270 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
5271 | return priority; | |
5272 | ||
5273 | if (GET_CODE (PATTERN (insn)) == USE) | |
5274 | return priority; | |
5275 | ||
5276 | switch (rs6000_cpu_attr) { | |
5277 | case CPU_PPC750: | |
5278 | switch (get_attr_type (insn)) | |
5279 | { | |
5280 | default: | |
5281 | break; | |
5282 | ||
5283 | case TYPE_IMUL: | |
5284 | case TYPE_IDIV: | |
5285 | fprintf (stderr, "priority was %#x (%d) before adjustment\n", priority, priority); | |
5286 | if (priority >= 0 && priority < 0x01000000) | |
5287 | priority >>= 3; | |
5288 | break; | |
5289 | } | |
5290 | } | |
5291 | #endif | |
5292 | ||
5293 | return priority; | |
5294 | } | |
5295 | ||
b6c9286a MM |
5296 | /* Return how many instructions the machine can issue per cycle */ |
5297 | int get_issue_rate() | |
5298 | { | |
5299 | switch (rs6000_cpu_attr) { | |
5300 | case CPU_RIOS1: | |
5301 | return 3; /* ? */ | |
5302 | case CPU_RIOS2: | |
5303 | return 4; | |
5304 | case CPU_PPC601: | |
5305 | return 3; /* ? */ | |
b6c9286a MM |
5306 | case CPU_PPC603: |
5307 | return 2; | |
bef84347 VM |
5308 | case CPU_PPC750: |
5309 | return 2; | |
b6c9286a MM |
5310 | case CPU_PPC604: |
5311 | return 4; | |
19684119 DE |
5312 | case CPU_PPC604E: |
5313 | return 4; | |
b6c9286a MM |
5314 | case CPU_PPC620: |
5315 | return 4; | |
5316 | default: | |
5317 | return 1; | |
5318 | } | |
5319 | } | |
5320 | ||
b6c9286a MM |
5321 | \f |
5322 | /* Output assembler code for a block containing the constant parts | |
5323 | of a trampoline, leaving space for the variable parts. | |
5324 | ||
5325 | The trampoline should set the static chain pointer to value placed | |
5326 | into the trampoline and should branch to the specified routine. */ | |
5327 | ||
5328 | void | |
5329 | rs6000_trampoline_template (file) | |
5330 | FILE *file; | |
5331 | { | |
d330fd93 KG |
5332 | const char *sc = reg_names[STATIC_CHAIN_REGNUM]; |
5333 | const char *r0 = reg_names[0]; | |
5334 | const char *r2 = reg_names[2]; | |
b6c9286a MM |
5335 | |
5336 | switch (DEFAULT_ABI) | |
5337 | { | |
5338 | default: | |
5339 | abort (); | |
5340 | ||
5341 | /* Under AIX, this is not code at all, but merely a data area, | |
5342 | since that is the way all functions are called. The first word is | |
5343 | the address of the function, the second word is the TOC pointer (r2), | |
5344 | and the third word is the static chain value. */ | |
5345 | case ABI_AIX: | |
b6c9286a MM |
5346 | break; |
5347 | ||
5348 | ||
5349 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
5350 | do the full gory code to load up the static chain. */ | |
5351 | case ABI_V4: | |
c81bebd7 | 5352 | case ABI_SOLARIS: |
b6c9286a | 5353 | case ABI_AIX_NODESC: |
b6c9286a MM |
5354 | break; |
5355 | ||
5356 | /* NT function pointers point to a two word area (real address, TOC) | |
5357 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
5358 | use the function field to point to ..LTRAMP1 and the toc field |
5359 | to point to the whole table. */ | |
b6c9286a | 5360 | case ABI_NT: |
7c59dc5d MM |
5361 | if (STATIC_CHAIN_REGNUM == 0 |
5362 | || STATIC_CHAIN_REGNUM == 2 | |
5363 | || TARGET_64BIT | |
5364 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
5365 | abort (); |
5366 | ||
7c59dc5d MM |
5367 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
5368 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
5369 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
5370 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
5371 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 5372 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
5373 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
5374 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
5375 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
5376 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
5377 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
5378 | break; |
5379 | } | |
5380 | ||
5381 | return; | |
5382 | } | |
5383 | ||
5384 | /* Length in units of the trampoline for entering a nested function. */ | |
5385 | ||
5386 | int | |
5387 | rs6000_trampoline_size () | |
5388 | { | |
5389 | int ret = 0; | |
5390 | ||
5391 | switch (DEFAULT_ABI) | |
5392 | { | |
5393 | default: | |
5394 | abort (); | |
5395 | ||
5396 | case ABI_AIX: | |
8f802bfb | 5397 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
5398 | break; |
5399 | ||
5400 | case ABI_V4: | |
c81bebd7 | 5401 | case ABI_SOLARIS: |
b6c9286a | 5402 | case ABI_AIX_NODESC: |
03a7e1a5 | 5403 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
5404 | break; |
5405 | ||
5406 | case ABI_NT: | |
7c59dc5d | 5407 | ret = 20; |
b6c9286a MM |
5408 | break; |
5409 | } | |
5410 | ||
5411 | return ret; | |
5412 | } | |
5413 | ||
5414 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
5415 | FNADDR is an RTX for the address of the function's pure code. | |
5416 | CXT is an RTX for the static chain value for the function. */ | |
5417 | ||
5418 | void | |
5419 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
5420 | rtx addr; | |
5421 | rtx fnaddr; | |
5422 | rtx cxt; | |
5423 | { | |
ac2a93a1 | 5424 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
5425 | int regsize = (TARGET_32BIT) ? 4 : 8; |
5426 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
5427 | |
5428 | switch (DEFAULT_ABI) | |
5429 | { | |
5430 | default: | |
5431 | abort (); | |
5432 | ||
8bd04c56 | 5433 | /* Macros to shorten the code expansions below. */ |
39403d82 DE |
5434 | #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) |
5435 | #define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) | |
7c59dc5d | 5436 | |
b6c9286a MM |
5437 | /* Under AIX, just build the 3 word function descriptor */ |
5438 | case ABI_AIX: | |
8bd04c56 MM |
5439 | { |
5440 | rtx fn_reg = gen_reg_rtx (pmode); | |
5441 | rtx toc_reg = gen_reg_rtx (pmode); | |
5442 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5443 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
5444 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
5445 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
5446 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
5447 | } | |
b6c9286a MM |
5448 | break; |
5449 | ||
eaf1bcf1 | 5450 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 5451 | case ABI_V4: |
c81bebd7 | 5452 | case ABI_SOLARIS: |
b6c9286a | 5453 | case ABI_AIX_NODESC: |
39403d82 | 5454 | emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), |
eaf1bcf1 MM |
5455 | FALSE, VOIDmode, 4, |
5456 | addr, pmode, | |
5457 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
5458 | fnaddr, pmode, | |
5459 | ctx_reg, pmode); | |
b6c9286a MM |
5460 | break; |
5461 | ||
8bd04c56 MM |
5462 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
5463 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 5464 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 5465 | case ABI_NT: |
8bd04c56 MM |
5466 | { |
5467 | rtx tramp_reg = gen_reg_rtx (pmode); | |
5468 | rtx fn_reg = gen_reg_rtx (pmode); | |
5469 | rtx toc_reg = gen_reg_rtx (pmode); | |
5470 | ||
39403d82 | 5471 | emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); |
8bd04c56 MM |
5472 | addr = force_reg (pmode, addr); |
5473 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5474 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
5475 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
5476 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
5477 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
5478 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
39403d82 | 5479 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); |
8bd04c56 | 5480 | } |
b6c9286a MM |
5481 | break; |
5482 | } | |
5483 | ||
5484 | return; | |
5485 | } | |
7509c759 MM |
5486 | |
5487 | \f | |
5488 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5489 | with arguments ARGS is a valid machine specific attribute for DECL. | |
5490 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
5491 | ||
5492 | int | |
5493 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
296b8152 KG |
5494 | tree decl ATTRIBUTE_UNUSED; |
5495 | tree attributes ATTRIBUTE_UNUSED; | |
5496 | tree identifier ATTRIBUTE_UNUSED; | |
5497 | tree args ATTRIBUTE_UNUSED; | |
7509c759 MM |
5498 | { |
5499 | return 0; | |
5500 | } | |
5501 | ||
5502 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5503 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
5504 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
5505 | ||
5506 | int | |
5507 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
5508 | tree type; | |
296b8152 | 5509 | tree attributes ATTRIBUTE_UNUSED; |
7509c759 MM |
5510 | tree identifier; |
5511 | tree args; | |
5512 | { | |
5513 | if (TREE_CODE (type) != FUNCTION_TYPE | |
5514 | && TREE_CODE (type) != FIELD_DECL | |
5515 | && TREE_CODE (type) != TYPE_DECL) | |
5516 | return 0; | |
5517 | ||
6a4cee5f MM |
5518 | /* Longcall attribute says that the function is not within 2**26 bytes |
5519 | of the current function, and to do an indirect call. */ | |
5520 | if (is_attribute_p ("longcall", identifier)) | |
5521 | return (args == NULL_TREE); | |
5522 | ||
7509c759 MM |
5523 | if (DEFAULT_ABI == ABI_NT) |
5524 | { | |
5525 | /* Stdcall attribute says callee is responsible for popping arguments | |
5526 | if they are not variable. */ | |
5527 | if (is_attribute_p ("stdcall", identifier)) | |
5528 | return (args == NULL_TREE); | |
5529 | ||
5530 | /* Cdecl attribute says the callee is a normal C declaration */ | |
5531 | if (is_attribute_p ("cdecl", identifier)) | |
5532 | return (args == NULL_TREE); | |
5533 | ||
38e01259 | 5534 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
5535 | indirectly through a __imp_<name> pointer. */ |
5536 | if (is_attribute_p ("dllimport", identifier)) | |
5537 | return (args == NULL_TREE); | |
5538 | ||
38e01259 | 5539 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
5540 | pointer. */ |
5541 | if (is_attribute_p ("dllexport", identifier)) | |
5542 | return (args == NULL_TREE); | |
e56bb9ed MM |
5543 | |
5544 | /* Exception attribute allows the user to specify 1-2 strings or identifiers | |
5545 | that will fill in the 3rd and 4th fields of the structured exception | |
5546 | table. */ | |
5547 | if (is_attribute_p ("exception", identifier)) | |
5548 | { | |
5549 | int i; | |
5550 | ||
5551 | if (args == NULL_TREE) | |
5552 | return 0; | |
5553 | ||
5554 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
5555 | { | |
5556 | tree this_arg = TREE_VALUE (args); | |
5557 | args = TREE_PURPOSE (args); | |
5558 | ||
5559 | if (TREE_CODE (this_arg) != STRING_CST | |
5560 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
5561 | return 0; | |
5562 | } | |
5563 | ||
5564 | return (args == NULL_TREE); | |
5565 | } | |
7509c759 MM |
5566 | } |
5567 | ||
5568 | return 0; | |
5569 | } | |
5570 | ||
5571 | /* If defined, a C expression whose value is zero if the attributes on | |
5572 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
5573 | two if they are nearly compatible (which causes a warning to be | |
5574 | generated). */ | |
5575 | ||
5576 | int | |
5577 | rs6000_comp_type_attributes (type1, type2) | |
296b8152 KG |
5578 | tree type1 ATTRIBUTE_UNUSED; |
5579 | tree type2 ATTRIBUTE_UNUSED; | |
7509c759 MM |
5580 | { |
5581 | return 1; | |
5582 | } | |
5583 | ||
5584 | /* If defined, a C statement that assigns default attributes to newly | |
5585 | defined TYPE. */ | |
5586 | ||
5587 | void | |
5588 | rs6000_set_default_type_attributes (type) | |
296b8152 | 5589 | tree type ATTRIBUTE_UNUSED; |
7509c759 MM |
5590 | { |
5591 | } | |
5592 | ||
38e01259 | 5593 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
5594 | struct rtx_def * |
5595 | rs6000_dll_import_ref (call_ref) | |
5596 | rtx call_ref; | |
5597 | { | |
d330fd93 | 5598 | const char *call_name; |
7509c759 MM |
5599 | int len; |
5600 | char *p; | |
5601 | rtx reg1, reg2; | |
5602 | tree node; | |
5603 | ||
5604 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5605 | abort (); | |
5606 | ||
5607 | call_name = XSTR (call_ref, 0); | |
5608 | len = sizeof ("__imp_") + strlen (call_name); | |
5609 | p = alloca (len); | |
5610 | reg2 = gen_reg_rtx (Pmode); | |
5611 | ||
5612 | strcpy (p, "__imp_"); | |
5613 | strcat (p, call_name); | |
5614 | node = get_identifier (p); | |
5615 | ||
39403d82 DE |
5616 | reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node))); |
5617 | emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); | |
7509c759 MM |
5618 | |
5619 | return reg2; | |
5620 | } | |
5621 | ||
6a4cee5f MM |
5622 | /* Return a reference suitable for calling a function with the longcall attribute. */ |
5623 | struct rtx_def * | |
5624 | rs6000_longcall_ref (call_ref) | |
5625 | rtx call_ref; | |
5626 | { | |
d330fd93 | 5627 | const char *call_name; |
6a4cee5f MM |
5628 | tree node; |
5629 | ||
5630 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5631 | return call_ref; | |
5632 | ||
5633 | /* System V adds '.' to the internal name, so skip them. */ | |
5634 | call_name = XSTR (call_ref, 0); | |
5635 | if (*call_name == '.') | |
5636 | { | |
5637 | while (*call_name == '.') | |
5638 | call_name++; | |
5639 | ||
5640 | node = get_identifier (call_name); | |
39403d82 | 5641 | call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); |
6a4cee5f MM |
5642 | } |
5643 | ||
5644 | return force_reg (Pmode, call_ref); | |
5645 | } | |
5646 | ||
7509c759 MM |
5647 | \f |
5648 | /* A C statement or statements to switch to the appropriate section | |
5649 | for output of RTX in mode MODE. You can assume that RTX is some | |
5650 | kind of constant in RTL. The argument MODE is redundant except in | |
5651 | the case of a `const_int' rtx. Select the section by calling | |
5652 | `text_section' or one of the alternatives for other sections. | |
5653 | ||
5654 | Do not define this macro if you put all constants in the read-only | |
5655 | data section. */ | |
5656 | ||
5657 | #ifdef USING_SVR4_H | |
5658 | ||
5659 | void | |
5660 | rs6000_select_rtx_section (mode, x) | |
5661 | enum machine_mode mode; | |
5662 | rtx x; | |
5663 | { | |
5664 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
5665 | toc_section (); | |
7509c759 MM |
5666 | else |
5667 | const_section (); | |
5668 | } | |
5669 | ||
5670 | /* A C statement or statements to switch to the appropriate | |
5671 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5672 | or a constant of some sort. RELOC indicates whether forming | |
5673 | the initial value of DECL requires link-time relocations. */ | |
5674 | ||
5675 | void | |
5676 | rs6000_select_section (decl, reloc) | |
5677 | tree decl; | |
5678 | int reloc; | |
5679 | { | |
5680 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5681 | ||
5682 | if (TREE_CODE (decl) == STRING_CST) | |
5683 | { | |
88228c4b | 5684 | if (! flag_writable_strings) |
7509c759 | 5685 | const_section (); |
7509c759 MM |
5686 | else |
5687 | data_section (); | |
5688 | } | |
5689 | else if (TREE_CODE (decl) == VAR_DECL) | |
5690 | { | |
5691 | if ((flag_pic && reloc) | |
5692 | || !TREE_READONLY (decl) | |
5693 | || TREE_SIDE_EFFECTS (decl) | |
5694 | || !DECL_INITIAL (decl) | |
5695 | || (DECL_INITIAL (decl) != error_mark_node | |
5696 | && !TREE_CONSTANT (DECL_INITIAL (decl)))) | |
5697 | { | |
d9407988 | 5698 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
7509c759 MM |
5699 | sdata_section (); |
5700 | else | |
5701 | data_section (); | |
5702 | } | |
5703 | else | |
5704 | { | |
d9407988 | 5705 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
c81bebd7 | 5706 | { |
d9407988 | 5707 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5708 | sdata2_section (); |
5709 | else | |
5710 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ | |
5711 | } | |
7509c759 MM |
5712 | else |
5713 | const_section (); | |
5714 | } | |
5715 | } | |
5716 | else | |
5717 | const_section (); | |
5718 | } | |
d9407988 MM |
5719 | |
5720 | \f | |
5721 | ||
5722 | /* If we are referencing a function that is static or is known to be | |
5723 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5724 | that we can branch to this function without emitting a no-op after the | |
5725 | call. For real AIX and NT calling sequences, we also replace the | |
5726 | function name with the real name (1 or 2 leading .'s), rather than | |
5727 | the function descriptor name. This saves a lot of overriding code | |
a260abc9 | 5728 | to read the prefixes. */ |
d9407988 MM |
5729 | |
5730 | void | |
5731 | rs6000_encode_section_info (decl) | |
5732 | tree decl; | |
5733 | { | |
5734 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
5735 | { | |
5736 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5737 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
5738 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
5739 | ||
5740 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
5741 | { | |
d330fd93 | 5742 | const char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; |
d9407988 MM |
5743 | char *str = permalloc (strlen (prefix) + 1 |
5744 | + strlen (XSTR (sym_ref, 0))); | |
5745 | strcpy (str, prefix); | |
5746 | strcat (str, XSTR (sym_ref, 0)); | |
5747 | XSTR (sym_ref, 0) = str; | |
5748 | } | |
5749 | } | |
5750 | else if (rs6000_sdata != SDATA_NONE | |
5751 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
5752 | && TREE_CODE (decl) == VAR_DECL) | |
5753 | { | |
5754 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5755 | tree section_name = DECL_SECTION_NAME (decl); | |
d330fd93 | 5756 | const char *name = (char *)0; |
d9407988 MM |
5757 | int len = 0; |
5758 | ||
5759 | if (section_name) | |
5760 | { | |
5761 | if (TREE_CODE (section_name) == STRING_CST) | |
5762 | { | |
5763 | name = TREE_STRING_POINTER (section_name); | |
5764 | len = TREE_STRING_LENGTH (section_name); | |
5765 | } | |
5766 | else | |
5767 | abort (); | |
5768 | } | |
5769 | ||
5770 | if ((size > 0 && size <= g_switch_value) | |
5771 | || (name | |
5772 | && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) | |
5773 | || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) | |
5774 | || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) | |
5775 | || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) | |
5776 | || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
5777 | || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
5778 | { | |
5779 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5780 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
5781 | strcpy (str, "@"); | |
5782 | strcat (str, XSTR (sym_ref, 0)); | |
5783 | XSTR (sym_ref, 0) = str; | |
5784 | } | |
5785 | } | |
5786 | } | |
5787 | ||
7509c759 | 5788 | #endif /* USING_SVR4_H */ |
a6c2a102 DE |
5789 | \f |
5790 | void | |
5791 | rs6000_fatal_bad_address (op) | |
5792 | rtx op; | |
5793 | { | |
5794 | fatal_insn ("bad address", op); | |
5795 | } |