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1 | /* Definitions of target machine for GNU compiler. NS32000 version. |
2 | Copyright (C) 1988 Free Software Foundation, Inc. | |
3 | Contributed by Michael Tiemann (tiemann@mcc.com) | |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
20 | ||
21 | ||
22 | /* Note that some other tm.h files include this one and then override | |
23 | many of the definitions that relate to assembler syntax. */ | |
24 | ||
25 | extern enum reg_class secondary_reload_class(); | |
26 | ||
27 | /* Names to predefine in the preprocessor for this target machine. */ | |
28 | ||
29 | #define CPP_PREDEFINES "-Dns32000 -Dunix" | |
30 | ||
31 | /* Print subsidiary information on the compiler version in use. */ | |
32 | #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)"); | |
33 | ||
34 | \f | |
35 | /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined | |
36 | to cover most NS32k addressing syntax variations. This way we don't | |
37 | need to redefine long macros in all the tm.h files for just slight | |
38 | variations in assembler syntax. */ | |
39 | ||
40 | #ifndef ABSOLUTE_PREFIX | |
41 | #define ABSOLUTE_PREFIX '@' | |
42 | #endif | |
43 | ||
44 | #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX | |
45 | #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE) | |
46 | #else | |
47 | #define PUT_IMMEDIATE_PREFIX(FILE) | |
48 | #endif | |
49 | #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX | |
50 | #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE) | |
51 | #else | |
52 | #define PUT_ABSOLUTE_PREFIX(FILE) | |
53 | #endif | |
54 | #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX | |
55 | #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE) | |
56 | #else | |
57 | #define PUT_EXTERNAL_PREFIX(FILE) | |
58 | #endif | |
59 | ||
60 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
61 | ||
62 | extern int target_flags; | |
63 | ||
64 | /* Macros used in the machine description to test the flags. */ | |
65 | ||
66 | /* Compile 32081 insns for floating point (not library calls). */ | |
67 | #define TARGET_32081 (target_flags & 1) | |
68 | ||
69 | /* Compile using rtd insn calling sequence. | |
70 | This will not work unless you use prototypes at least | |
71 | for all functions that can take varying numbers of args. */ | |
72 | #define TARGET_RTD (target_flags & 2) | |
73 | ||
74 | /* Compile passing first two args in regs 0 and 1. */ | |
75 | #define TARGET_REGPARM (target_flags & 4) | |
76 | ||
77 | /* Options to select type of CPU, for better optimization. | |
78 | The output is correct for any kind of 32000 regardless of these options. */ | |
79 | #define TARGET_32532 (target_flags & 8) | |
80 | #define TARGET_32332 (target_flags & 16) | |
81 | ||
82 | /* Ok to use the static base register (and presume it's 0) */ | |
83 | #define TARGET_SB ((target_flags & 32) == 0) | |
84 | ||
85 | /* Macro to define tables used to set the flags. | |
86 | This is a list in braces of pairs in braces, | |
87 | each pair being { "NAME", VALUE } | |
88 | where VALUE is the bits to set or minus the bits to clear. | |
89 | An empty string NAME is used to identify the default VALUE. */ | |
90 | ||
91 | #define TARGET_SWITCHES \ | |
92 | { { "32081", 1}, \ | |
93 | { "soft-float", -1}, \ | |
94 | { "rtd", 2}, \ | |
95 | { "nortd", -2}, \ | |
96 | { "regparm", 4}, \ | |
97 | { "noregparm", -4}, \ | |
98 | { "32532", 24}, \ | |
99 | { "32332", -16}, \ | |
100 | { "32332", 8}, \ | |
101 | { "32032", -24}, \ | |
102 | { "sb", -32}, \ | |
103 | { "nosb", 32}, \ | |
104 | { "", TARGET_DEFAULT}} | |
105 | /* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */ | |
106 | \f | |
107 | /* target machine storage layout */ | |
108 | ||
109 | /* Define this if most significant bit is lowest numbered | |
110 | in instructions that operate on numbered bit-fields. | |
111 | This is not true on the ns32k. */ | |
112 | #define BITS_BIG_ENDIAN 0 | |
113 | ||
114 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
115 | /* That is not true on the ns32k. */ | |
116 | #define BYTES_BIG_ENDIAN 0 | |
117 | ||
118 | /* Define this if most significant word of a multiword number is lowest | |
119 | numbered. This is not true on the ns32k. */ | |
120 | #define WORDS_BIG_ENDIAN 0 | |
121 | ||
b4ac57ab | 122 | /* Number of bits in an addressable storage unit */ |
231ddcb7 RS |
123 | #define BITS_PER_UNIT 8 |
124 | ||
125 | /* Width in bits of a "word", which is the contents of a machine register. | |
126 | Note that this is not necessarily the width of data type `int'; | |
127 | if using 16-bit ints on a 32000, this would still be 32. | |
128 | But on a machine with 16-bit registers, this would be 16. */ | |
129 | #define BITS_PER_WORD 32 | |
130 | ||
131 | /* Width of a word, in units (bytes). */ | |
132 | #define UNITS_PER_WORD 4 | |
133 | ||
134 | /* Width in bits of a pointer. | |
135 | See also the macro `Pmode' defined below. */ | |
136 | #define POINTER_SIZE 32 | |
137 | ||
138 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
139 | #define PARM_BOUNDARY 32 | |
140 | ||
141 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
142 | #define STACK_BOUNDARY 32 | |
143 | ||
144 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
145 | #define FUNCTION_BOUNDARY 16 | |
146 | ||
147 | /* Alignment of field after `int : 0' in a structure. */ | |
148 | #define EMPTY_FIELD_BOUNDARY 32 | |
149 | ||
150 | /* Every structure's size must be a multiple of this. */ | |
151 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
152 | ||
153 | /* No data type wants to be aligned rounder than this. */ | |
154 | #define BIGGEST_ALIGNMENT 32 | |
155 | ||
dfbe1b2f | 156 | /* Set this nonzero if move instructions will actually fail to work |
231ddcb7 RS |
157 | when given unaligned data. National claims that the NS32032 |
158 | works without strict alignment, but rumor has it that operands | |
159 | crossing a page boundary cause unpredictable results. */ | |
dfbe1b2f | 160 | #define STRICT_ALIGNMENT 1 |
231ddcb7 RS |
161 | |
162 | /* If bit field type is int, dont let it cross an int, | |
163 | and give entire struct the alignment of an int. */ | |
164 | /* Required on the 386 since it doesn't have a full set of bitfield insns. | |
165 | (There is no signed extv insn.) */ | |
166 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
167 | \f | |
168 | /* Standard register usage. */ | |
169 | ||
170 | /* Number of actual hardware registers. | |
171 | The hardware registers are assigned numbers for the compiler | |
172 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
173 | All registers that the compiler knows about must be given numbers, | |
174 | even those that are not normally considered general registers. */ | |
175 | #define FIRST_PSEUDO_REGISTER 18 | |
176 | ||
177 | /* 1 for registers that have pervasive standard uses | |
178 | and are not available for the register allocator. | |
179 | On the ns32k, these are the FP, SP, (SB and PC are not included here). */ | |
180 | #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \ | |
181 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
182 | 1, 1} | |
183 | ||
184 | /* 1 for registers not available across function calls. | |
185 | These must include the FIXED_REGISTERS and also any | |
186 | registers that can be used without being saved. | |
187 | The latter must include the registers where values are returned | |
188 | and the register where structure-value addresses are passed. | |
189 | Aside from that, you can include as many other registers as you like. */ | |
190 | #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \ | |
191 | 1, 1, 1, 1, 0, 0, 0, 0, \ | |
192 | 1, 1} | |
193 | ||
194 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
195 | to hold something of mode MODE. | |
196 | This is ordinarily the length in words of a value of mode MODE | |
197 | but can be less for certain modes in special long registers. | |
198 | On the ns32k, all registers are 32 bits long. */ | |
199 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
200 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
201 | ||
202 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ | |
203 | #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE) | |
204 | ||
205 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
206 | when one has mode MODE1 and one has mode MODE2. | |
207 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
208 | for any hard reg, then this must be 0 for correct output. */ | |
209 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
210 | (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode) == \ | |
211 | ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode)) | |
212 | ||
213 | /* Specify the registers used for certain standard purposes. | |
214 | The values of these macros are register numbers. */ | |
215 | ||
216 | /* NS32000 pc is not overloaded on a register. */ | |
217 | /* #define PC_REGNUM */ | |
218 | ||
219 | /* Register to use for pushing function arguments. */ | |
220 | #define STACK_POINTER_REGNUM 17 | |
221 | ||
222 | /* Base register for access to local variables of the function. */ | |
223 | #define FRAME_POINTER_REGNUM 16 | |
224 | ||
225 | /* Value should be nonzero if functions must have frame pointers. | |
226 | Zero means the frame pointer need not be set up (and parms | |
227 | may be accessed via the stack pointer) in functions that seem suitable. | |
228 | This is computed in `reload', in reload1.c. */ | |
229 | #define FRAME_POINTER_REQUIRED 0 | |
230 | ||
231 | /* Base register for access to arguments of the function. */ | |
232 | #define ARG_POINTER_REGNUM 16 | |
233 | ||
234 | /* Register in which static-chain is passed to a function. */ | |
235 | #define STATIC_CHAIN_REGNUM 1 | |
236 | ||
237 | /* Register in which address to store a structure value | |
238 | is passed to a function. */ | |
239 | #define STRUCT_VALUE_REGNUM 2 | |
240 | \f | |
241 | /* Define the classes of registers for register constraints in the | |
242 | machine description. Also define ranges of constants. | |
243 | ||
244 | One of the classes must always be named ALL_REGS and include all hard regs. | |
245 | If there is more than one class, another class must be named NO_REGS | |
246 | and contain no registers. | |
247 | ||
248 | The name GENERAL_REGS must be the name of a class (or an alias for | |
249 | another name such as ALL_REGS). This is the class of registers | |
250 | that is allowed by "g" or "r" in a register constraint. | |
251 | Also, registers outside this class are allocated only when | |
252 | instructions express preferences for them. | |
253 | ||
254 | The classes must be numbered in nondecreasing order; that is, | |
255 | a larger-numbered class must never be contained completely | |
256 | in a smaller-numbered class. | |
257 | ||
258 | For any two classes, it is very desirable that there be another | |
259 | class that represents their union. */ | |
260 | ||
261 | enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, | |
262 | GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
263 | ||
264 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
265 | ||
266 | /* Give names of register classes as strings for dump file. */ | |
267 | ||
268 | #define REG_CLASS_NAMES \ | |
269 | {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "FRAME_POINTER_REG", "STACK_POINTER_REG", "GEN_AND_MEM_REGS", "ALL_REGS" } | |
270 | ||
271 | /* Define which registers fit in which classes. | |
272 | This is an initializer for a vector of HARD_REG_SET | |
273 | of length N_REG_CLASSES. */ | |
274 | ||
275 | #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0x10000, 0x20000, 0x300ff, 0x3ffff } | |
276 | ||
277 | /* The same information, inverted: | |
278 | Return the class number of the smallest class containing | |
279 | reg number REGNO. This could be a conditional expression | |
280 | or could index an array. */ | |
281 | ||
282 | #define REGNO_REG_CLASS(REGNO) \ | |
283 | ((REGNO) < 8 ? GENERAL_REGS \ | |
284 | : (REGNO) < 16 ? FLOAT_REGS \ | |
285 | : (REGNO) == 16 ? FRAME_POINTER_REG \ | |
286 | : (REGNO) == 17 ? STACK_POINTER_REG \ | |
287 | : NO_REGS) | |
288 | ||
289 | /* The class value for index registers, and the one for base regs. */ | |
290 | ||
291 | #define INDEX_REG_CLASS GENERAL_REGS | |
292 | #define BASE_REG_CLASS GEN_AND_MEM_REGS | |
293 | ||
294 | /* Get reg_class from a letter such as appears in the machine description. */ | |
295 | ||
296 | #define REG_CLASS_FROM_LETTER(C) \ | |
297 | ((C) == 'f' ? FLOAT_REGS \ | |
298 | : (C) == 'x' ? FRAME_POINTER_REG \ | |
299 | : (C) == 'y' ? STACK_POINTER_REG \ | |
300 | : NO_REGS) | |
301 | ||
302 | /* The letters I, J, K, L and M in a register constraint string | |
303 | can be used to stand for particular ranges of immediate operands. | |
304 | This macro defines what the ranges are. | |
305 | C is the letter, and VALUE is a constant value. | |
306 | Return 1 if VALUE is in the range specified by C. | |
307 | ||
308 | On the ns32k, these letters are used as follows: | |
309 | ||
310 | I : Matches integers which are valid shift amounts for scaled indexing. | |
311 | These are 0, 1, 2, 3 for byte, word, double, and quadword. | |
312 | Used for matching arithmetic shifts only on 32032 & 32332. | |
313 | J : Matches integers which fit a "quick" operand. | |
314 | K : Matches integers 0 to 7 (for inss and exts instructions). | |
315 | */ | |
316 | ||
317 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
318 | ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \ | |
319 | ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \ | |
320 | (C) == 'J' ? (VALUE) <= 7 : \ | |
321 | (C) == 'K' ? 0 <= (VALUE) : 0) : 0) | |
322 | ||
323 | /* Similar, but for floating constants, and defining letters G and H. | |
324 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
325 | ||
326 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 | |
327 | ||
328 | /* Given an rtx X being reloaded into a reg required to be | |
329 | in class CLASS, return the class of reg to actually use. | |
330 | In general this is just CLASS; but on some machines | |
331 | in some cases it is preferable to use a more restrictive class. */ | |
332 | ||
333 | #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
334 | ||
335 | /* Return the maximum number of consecutive registers | |
336 | needed to represent mode MODE in a register of class CLASS. */ | |
337 | /* On the 32000, this is the size of MODE in words */ | |
338 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
339 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
340 | \f | |
341 | /* Stack layout; function entry, exit and calling. */ | |
342 | ||
343 | /* Define this if pushing a word on the stack | |
344 | makes the stack pointer a smaller address. */ | |
345 | #define STACK_GROWS_DOWNWARD | |
346 | ||
347 | /* Define this if the nominal address of the stack frame | |
348 | is at the high-address end of the local variables; | |
349 | that is, each additional local variable allocated | |
350 | goes at a more negative offset in the frame. */ | |
351 | #define FRAME_GROWS_DOWNWARD | |
352 | ||
353 | /* Offset within stack frame to start allocating local variables at. | |
354 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
355 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
356 | of the first local allocated. */ | |
357 | #define STARTING_FRAME_OFFSET 0 | |
358 | ||
359 | /* If we generate an insn to push BYTES bytes, | |
360 | this says how many the stack pointer really advances by. | |
361 | On the 32000, sp@- in a byte insn really pushes a BYTE. */ | |
362 | #define PUSH_ROUNDING(BYTES) (BYTES) | |
363 | ||
364 | /* Offset of first parameter from the argument pointer register value. */ | |
365 | #define FIRST_PARM_OFFSET(FNDECL) 8 | |
366 | ||
367 | /* Value is the number of byte of arguments automatically | |
368 | popped when returning from a subroutine call. | |
369 | FUNTYPE is the data type of the function (as a tree), | |
370 | or for a library call it is an identifier node for the subroutine name. | |
371 | SIZE is the number of bytes of arguments passed on the stack. | |
372 | ||
373 | On the 32000, the RET insn may be used to pop them if the number | |
374 | of args is fixed, but if the number is variable then the caller | |
375 | must pop them all. RET can't be used for library calls now | |
376 | because the library is compiled with the Unix compiler. | |
377 | Use of RET is a selectable option, since it is incompatible with | |
378 | standard Unix calling sequences. If the option is not selected, | |
379 | the caller must always pop the args. */ | |
380 | ||
381 | #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \ | |
382 | ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \ | |
383 | && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ | |
384 | || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ | |
385 | == void_type_node))) \ | |
386 | ? (SIZE) : 0) | |
387 | ||
388 | /* Define how to find the value returned by a function. | |
389 | VALTYPE is the data type of the value (as a tree). | |
390 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
391 | otherwise, FUNC is 0. */ | |
392 | ||
393 | /* On the 32000 the return value is in R0, | |
394 | or perhaps in F0 is there is fp support. */ | |
395 | ||
396 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
397 | (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_32081 \ | |
398 | ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ | |
399 | : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)) | |
400 | ||
401 | /* Define how to find the value returned by a library function | |
402 | assuming the value has mode MODE. */ | |
403 | ||
404 | /* On the 32000 the return value is in R0, | |
405 | or perhaps F0 is there is fp support. */ | |
406 | ||
407 | #define LIBCALL_VALUE(MODE) \ | |
408 | (((MODE) == DFmode || (MODE) == SFmode) && TARGET_32081 \ | |
409 | ? gen_rtx (REG, MODE, 8) \ | |
410 | : gen_rtx (REG, MODE, 0)) | |
411 | ||
412 | /* Define this if PCC uses the nonreentrant convention for returning | |
413 | structure and union values. */ | |
414 | ||
415 | #define PCC_STATIC_STRUCT_RETURN | |
416 | ||
417 | /* 1 if N is a possible register number for a function value. | |
418 | On the 32000, R0 and F0 are the only registers thus used. */ | |
419 | ||
420 | #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0) | |
421 | ||
422 | /* 1 if N is a possible register number for function argument passing. | |
423 | On the 32000, no registers are used in this way. */ | |
424 | ||
425 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
426 | \f | |
427 | /* Define a data type for recording info about an argument list | |
428 | during the scan of that argument list. This data type should | |
429 | hold all necessary information about the function itself | |
430 | and about the args processed so far, enough to enable macros | |
431 | such as FUNCTION_ARG to determine where the next arg should go. | |
432 | ||
433 | On the ns32k, this is a single integer, which is a number of bytes | |
434 | of arguments scanned so far. */ | |
435 | ||
436 | #define CUMULATIVE_ARGS int | |
437 | ||
438 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
439 | for a call to a function whose data type is FNTYPE. | |
440 | For a library call, FNTYPE is 0. | |
441 | ||
442 | On the ns32k, the offset starts at 0. */ | |
443 | ||
444 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
445 | ((CUM) = 0) | |
446 | ||
447 | /* Update the data in CUM to advance over an argument | |
448 | of mode MODE and data type TYPE. | |
449 | (TYPE is null for libcalls where that information may not be available.) */ | |
450 | ||
451 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
452 | ((CUM) += ((MODE) != BLKmode \ | |
453 | ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ | |
454 | : (int_size_in_bytes (TYPE) + 3) & ~3)) | |
455 | ||
456 | /* Define where to put the arguments to a function. | |
457 | Value is zero to push the argument on the stack, | |
458 | or a hard register in which to store the argument. | |
459 | ||
460 | MODE is the argument's machine mode. | |
461 | TYPE is the data type of the argument (as a tree). | |
462 | This is null for libcalls where that information may | |
463 | not be available. | |
464 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
465 | the preceding args and about the function being called. | |
466 | NAMED is nonzero if this argument is a named parameter | |
467 | (otherwise it is an extra parameter matching an ellipsis). */ | |
468 | ||
469 | /* On the 32000 all args are pushed, except if -mregparm is specified | |
470 | then the first two words of arguments are passed in r0, r1. | |
471 | *NOTE* -mregparm does not work. | |
472 | It exists only to test register calling conventions. */ | |
473 | ||
474 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
475 | ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) | |
476 | ||
477 | /* For an arg passed partly in registers and partly in memory, | |
478 | this is the number of registers used. | |
479 | For args passed entirely in registers or entirely in memory, zero. */ | |
480 | ||
481 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
482 | ((TARGET_REGPARM && (CUM) < 8 \ | |
483 | && 8 < ((CUM) + ((MODE) == BLKmode \ | |
484 | ? int_size_in_bytes (TYPE) \ | |
485 | : GET_MODE_SIZE (MODE)))) \ | |
486 | ? 2 - (CUM) / 4 : 0) | |
487 | ||
488 | #ifndef MAIN_FUNCTION_PROLOGUE | |
489 | #define MAIN_FUNCTION_PROLOGUE | |
490 | #endif | |
491 | ||
492 | /* | |
493 | * The function prologue for the ns32k is fairly simple. | |
494 | * If a frame pointer is needed (decided in reload.c ?) then | |
495 | * we need assembler of the form | |
496 | * | |
497 | * # Save the oldframe pointer, set the new frame pointer, make space | |
498 | * # on the stack and save any general purpose registers necessary | |
499 | * | |
500 | * enter [<general purpose regs to save>], <local stack space> | |
501 | * | |
502 | * movf fn, tos # Save any floating point registers necessary | |
503 | * . | |
504 | * . | |
505 | * | |
506 | * If a frame pointer is not needed we need assembler of the form | |
507 | * # Save any general purpose registers necessary | |
508 | * | |
509 | * save [<general purpose regs to save>] | |
510 | * | |
511 | * movf fn, tos # Save any floating point registers necessary | |
512 | * . | |
513 | * . | |
514 | */ | |
515 | ||
516 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
517 | { register int regno, g_regs_used = 0; \ | |
518 | int used_regs_buf[8], *bufp = used_regs_buf; \ | |
519 | int used_fregs_buf[8], *fbufp = used_fregs_buf; \ | |
520 | extern char call_used_regs[]; \ | |
521 | MAIN_FUNCTION_PROLOGUE; \ | |
522 | for (regno = 0; regno < 8; regno++) \ | |
523 | if (regs_ever_live[regno] \ | |
524 | && ! call_used_regs[regno]) \ | |
525 | { \ | |
526 | *bufp++ = regno; g_regs_used++; \ | |
527 | } \ | |
528 | *bufp = -1; \ | |
529 | for (; regno < 16; regno++) \ | |
530 | if (regs_ever_live[regno] && !call_used_regs[regno]) { \ | |
531 | *fbufp++ = regno; \ | |
532 | } \ | |
533 | *fbufp = -1; \ | |
534 | bufp = used_regs_buf; \ | |
535 | if (frame_pointer_needed) \ | |
536 | fprintf (FILE, "\tenter ["); \ | |
537 | else if (g_regs_used) \ | |
538 | fprintf (FILE, "\tsave ["); \ | |
539 | while (*bufp >= 0) \ | |
540 | { \ | |
541 | fprintf (FILE, "r%d", *bufp++); \ | |
542 | if (*bufp >= 0) \ | |
543 | fputc (',', FILE); \ | |
544 | } \ | |
545 | if (frame_pointer_needed) \ | |
546 | fprintf (FILE, "],%d\n", SIZE); \ | |
547 | else if (g_regs_used) \ | |
548 | fprintf (FILE, "]\n"); \ | |
549 | fbufp = used_fregs_buf; \ | |
550 | while (*fbufp >= 0) \ | |
551 | { \ | |
552 | if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1)) \ | |
553 | fprintf (FILE, "\tmovf f%d,tos\n", *fbufp++ - 8); \ | |
554 | else \ | |
555 | { \ | |
556 | fprintf (FILE, "\tmovl f%d,tos\n", fbufp[0] - 8); \ | |
557 | fbufp += 2; \ | |
558 | } \ | |
559 | } \ | |
560 | } | |
561 | ||
562 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
563 | for profiling a function entry. | |
564 | ||
565 | THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */ | |
566 | ||
567 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
568 | fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO)) | |
569 | ||
570 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
571 | the stack pointer does not matter. The value is tested only in | |
572 | functions that have frame pointers. | |
573 | No definition is equivalent to always zero. | |
574 | ||
575 | We use 0, because using 1 requires hair in FUNCTION_EPILOGUE | |
576 | that is worse than the stack adjust we could save. */ | |
577 | ||
578 | /* #define EXIT_IGNORE_STACK 1 */ | |
579 | ||
580 | /* This macro generates the assembly code for function exit, | |
581 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
582 | then individual return instructions are generated for each | |
583 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
584 | ||
585 | The function epilogue should not depend on the current stack pointer, | |
586 | if EXIT_IGNORE_STACK is nonzero. That doesn't apply here. | |
587 | ||
588 | If a frame pointer is needed (decided in reload.c ?) then | |
589 | we need assembler of the form | |
590 | ||
591 | movf tos, fn # Restore any saved floating point registers | |
592 | . | |
593 | . | |
594 | ||
595 | # Restore any saved general purpose registers, restore the stack | |
596 | # pointer from the frame pointer, restore the old frame pointer. | |
597 | exit [<general purpose regs to save>] | |
598 | ||
599 | If a frame pointer is not needed we need assembler of the form | |
600 | # Restore any general purpose registers saved | |
601 | ||
602 | movf tos, fn # Restore any saved floating point registers | |
603 | . | |
604 | . | |
605 | . | |
606 | restore [<general purpose regs to save>] */ | |
607 | ||
608 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
609 | { register int regno, g_regs_used = 0, f_regs_used = 0; \ | |
610 | int used_regs_buf[8], *bufp = used_regs_buf; \ | |
611 | int used_fregs_buf[8], *fbufp = used_fregs_buf; \ | |
612 | extern char call_used_regs[]; \ | |
613 | *fbufp++ = -2; \ | |
614 | for (regno = 8; regno < 16; regno++) \ | |
615 | if (regs_ever_live[regno] && !call_used_regs[regno]) { \ | |
616 | *fbufp++ = regno; f_regs_used++; \ | |
617 | } \ | |
618 | fbufp--; \ | |
619 | for (regno = 0; regno < 8; regno++) \ | |
620 | if (regs_ever_live[regno] \ | |
621 | && ! call_used_regs[regno]) \ | |
622 | { \ | |
623 | *bufp++ = regno; g_regs_used++; \ | |
624 | } \ | |
625 | while (fbufp > used_fregs_buf) \ | |
626 | { \ | |
627 | if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1) \ | |
628 | { \ | |
629 | fprintf (FILE, "\tmovl tos,f%d\n", fbufp[-1] - 8); \ | |
630 | fbufp -= 2; \ | |
631 | } \ | |
632 | else fprintf (FILE, "\tmovf tos,f%d\n", *fbufp-- - 8); \ | |
633 | } \ | |
634 | if (frame_pointer_needed) \ | |
635 | fprintf (FILE, "\texit ["); \ | |
636 | else if (g_regs_used) \ | |
637 | fprintf (FILE, "\trestore ["); \ | |
638 | while (bufp > used_regs_buf) \ | |
639 | { \ | |
640 | fprintf (FILE, "r%d", *--bufp); \ | |
641 | if (bufp > used_regs_buf) \ | |
642 | fputc (',', FILE); \ | |
643 | } \ | |
644 | if (g_regs_used || frame_pointer_needed) \ | |
645 | fprintf (FILE, "]\n"); \ | |
646 | if (current_function_pops_args) \ | |
647 | fprintf (FILE, "\tret %d\n", current_function_pops_args); \ | |
648 | else fprintf (FILE, "\tret 0\n"); } | |
649 | ||
650 | /* Store in the variable DEPTH the initial difference between the | |
651 | frame pointer reg contents and the stack pointer reg contents, | |
652 | as of the start of the function body. This depends on the layout | |
653 | of the fixed parts of the stack frame and on how registers are saved. */ | |
654 | ||
655 | #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ | |
656 | { \ | |
657 | int regno; \ | |
658 | int offset = -4; \ | |
659 | for (regno = 0; regno < 16; regno++) \ | |
660 | if (regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
661 | offset += 4; \ | |
662 | (DEPTH) = offset - get_frame_size (); \ | |
663 | } | |
664 | \f | |
665 | ||
666 | /* Output assembler code for a block containing the constant parts | |
667 | of a trampoline, leaving space for the variable parts. */ | |
668 | ||
669 | /* On the 32k, the trampoline looks like this: | |
670 | addr .,r2 | |
671 | jump @__trampoline | |
672 | .int STATIC | |
673 | .int FUNCTION | |
674 | Doing trampolines with a library assist function is easier than figuring | |
675 | out how to do stores to memory in reverse byte order (the way immediate | |
676 | operands on the 32k are stored). */ | |
677 | ||
678 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
679 | { \ | |
680 | fprintf (FILE, "\taddr .,r2\n" ); \ | |
e2ca2fab RS |
681 | fprintf (FILE, "\tjump " ); \ |
682 | PUT_ABSOLUTE_PREFIX (FILE); \ | |
683 | fprintf (FILE, "__trampoline\n" ); \ | |
231ddcb7 RS |
684 | ASM_OUTPUT_INT (FILE, const0_rtx); \ |
685 | ASM_OUTPUT_INT (FILE, const0_rtx); \ | |
686 | } | |
687 | ||
688 | /* Length in units of the trampoline for entering a nested function. */ | |
689 | ||
690 | #define TRAMPOLINE_SIZE 20 | |
691 | ||
692 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
693 | FNADDR is an RTX for the address of the function's pure code. | |
694 | CXT is an RTX for the static chain value for the function. */ | |
695 | ||
696 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
697 | { \ | |
698 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \ | |
699 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \ | |
700 | } | |
701 | ||
702 | /* This is the library routine that is used | |
703 | to transfer control from the trampoline | |
704 | to the actual nested function. */ | |
705 | ||
706 | /* The function name __transfer_from_trampoline is not actually used. | |
707 | The function definition just permits use of "asm with operands" | |
708 | (though the operand list is empty). */ | |
709 | #define TRANSFER_FROM_TRAMPOLINE \ | |
710 | void \ | |
711 | __transfer_from_trampoline () \ | |
712 | { \ | |
713 | asm ("___trampoline:"); \ | |
714 | asm ("movd 16(r2),tos"); \ | |
715 | asm ("movd 12(r2),r2"); \ | |
b4ac57ab | 716 | asm ("ret 0"); \ |
231ddcb7 | 717 | } |
231ddcb7 RS |
718 | \f |
719 | /* Addressing modes, and classification of registers for them. */ | |
720 | ||
721 | /* #define HAVE_POST_INCREMENT */ | |
722 | /* #define HAVE_POST_DECREMENT */ | |
723 | ||
724 | /* #define HAVE_PRE_DECREMENT */ | |
725 | /* #define HAVE_PRE_INCREMENT */ | |
726 | ||
727 | /* Macros to check register numbers against specific register classes. */ | |
728 | ||
729 | /* These assume that REGNO is a hard or pseudo reg number. | |
730 | They give nonzero only if REGNO is a hard reg of the suitable class | |
731 | or a pseudo reg currently allocated to a suitable hard reg. | |
732 | Since they use reg_renumber, they are safe only once reg_renumber | |
733 | has been allocated, which happens in local-alloc.c. */ | |
734 | ||
735 | /* note that FP and SP cannot be used as an index. What about PC? */ | |
736 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
737 | ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8) | |
738 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
739 | ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8 \ | |
740 | || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM) | |
741 | ||
742 | #define FP_REG_P(X) (GET_CODE (X) == REG && REGNO (X) > 7 && REGNO (X) < 16) | |
743 | \f | |
744 | /* Maximum number of registers that can appear in a valid memory address. */ | |
745 | ||
746 | #define MAX_REGS_PER_ADDRESS 2 | |
747 | ||
748 | /* Recognize any constant value that is a valid address. | |
749 | This might not work on future ns32k processors as negative | |
750 | displacements are not officially allowed but a mode reserved | |
751 | to National. This works on processors up to 32532, though. */ | |
752 | ||
753 | #define CONSTANT_ADDRESS_P(X) \ | |
754 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
755 | || GET_CODE (X) == CONST \ | |
756 | || (GET_CODE (X) == CONST_INT \ | |
757 | && ((unsigned)INTVAL (X) >= 0xe0000000 \ | |
758 | || (unsigned)INTVAL (X) < 0x20000000))) | |
759 | ||
760 | #define CONSTANT_ADDRESS_NO_LABEL_P(X) \ | |
761 | (GET_CODE (X) == CONST_INT \ | |
762 | && ((unsigned)INTVAL (X) >= 0xe0000000 \ | |
763 | || (unsigned)INTVAL (X) < 0x20000000)) | |
764 | ||
765 | /* Return the register class of a scratch register needed to copy IN into | |
766 | or out of a register in CLASS in MODE. If it can be done directly, | |
767 | NO_REGS is returned. */ | |
768 | ||
769 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
770 | secondary_reload_class (CLASS, MODE, IN) | |
771 | ||
772 | /* Nonzero if the constant value X is a legitimate general operand. | |
773 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
774 | ||
775 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
776 | ||
777 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
778 | and check its validity for a certain class. | |
779 | We have two alternate definitions for each of them. | |
780 | The usual definition accepts all pseudo regs; the other rejects | |
781 | them unless they have been allocated suitable hard regs. | |
782 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
783 | ||
784 | Most source files want to accept pseudo regs in the hope that | |
785 | they will get allocated to the class that the insn wants them to be in. | |
786 | Source files for reload pass need to be strict. | |
787 | After reload, it makes no difference, since pseudo regs have | |
788 | been eliminated by then. */ | |
789 | ||
790 | #ifndef REG_OK_STRICT | |
791 | ||
792 | /* Nonzero if X is a hard reg that can be used as an index | |
793 | or if it is a pseudo reg. */ | |
794 | #define REG_OK_FOR_INDEX_P(X) \ | |
795 | (REGNO (X) < 8 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
796 | /* Nonzero if X is a hard reg that can be used as a base reg | |
797 | of if it is a pseudo reg. */ | |
798 | #define REG_OK_FOR_BASE_P(X) (REGNO (X) < 8 || REGNO (X) >= FRAME_POINTER_REGNUM) | |
799 | /* Nonzero if X is a floating point reg or a pseudo reg. */ | |
800 | ||
801 | #else | |
802 | ||
803 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
804 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
805 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
806 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
807 | ||
808 | #endif | |
809 | \f | |
810 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
811 | that is a valid memory address for an instruction. | |
812 | The MODE argument is the machine mode for the MEM expression | |
813 | that wants to use this address. | |
814 | ||
815 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ | |
816 | ||
817 | /* 1 if X is an address that we could indirect through. */ | |
818 | /***** NOTE ***** There is a bug in the Sequent assembler which fails | |
819 | to fixup addressing information for symbols used as offsets | |
820 | from registers which are not FP or SP (or SB or PC). This | |
821 | makes _x(fp) valid, while _x(r0) is invalid. */ | |
822 | ||
823 | #define INDIRECTABLE_1_ADDRESS_P(X) \ | |
824 | (CONSTANT_ADDRESS_P (X) \ | |
825 | || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ | |
826 | || (GET_CODE (X) == PLUS \ | |
827 | && GET_CODE (XEXP (X, 0)) == REG \ | |
828 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
829 | && CONSTANT_ADDRESS_P (XEXP (X, 1)))) | |
830 | ||
47c95231 | 831 | /* Check for frame pointer or stack pointer. */ |
231ddcb7 | 832 | #define MEM_REG(X) \ |
47c95231 | 833 | (GET_CODE (X) == REG && (REGNO (X) ^ 16) < 2) |
231ddcb7 | 834 | |
47c95231 RS |
835 | /* A memory ref whose address is the FP or SP, with optional integer offset, |
836 | or (on certain machines) a constant address. */ | |
231ddcb7 RS |
837 | #define INDIRECTABLE_2_ADDRESS_P(X) \ |
838 | (GET_CODE (X) == MEM \ | |
839 | && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \ | |
840 | || (GET_CODE (xfoo0) == PLUS \ | |
231ddcb7 RS |
841 | && MEM_REG (XEXP (xfoo0, 0)) \ |
842 | && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \ | |
843 | || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0)))) | |
844 | ||
231ddcb7 RS |
845 | /* Go to ADDR if X is a valid address not using indexing. |
846 | (This much is the easy part.) */ | |
847 | #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \ | |
848 | { register rtx xfoob = (X); \ | |
47c95231 | 849 | if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \ |
231ddcb7 RS |
850 | if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \ |
851 | if (GET_CODE (X) == PLUS) \ | |
852 | if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \ | |
853 | if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \ | |
854 | goto ADDR; \ | |
855 | } | |
856 | ||
47c95231 RS |
857 | /* Go to ADDR if X is a valid address not using indexing. |
858 | (This much is the easy part.) */ | |
fbaef11f | 859 | #define GO_IF_INDEXING(X, MODE, ADDR) \ |
47c95231 | 860 | { register rtx xfoob = (X); \ |
fbaef11f | 861 | if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \ |
47c95231 | 862 | GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \ |
fbaef11f | 863 | if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \ |
47c95231 RS |
864 | GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \ |
865 | ||
866 | #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \ | |
867 | { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \ | |
868 | if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \ | |
869 | } | |
870 | ||
231ddcb7 RS |
871 | /* 1 if PROD is either a reg times size of mode MODE |
872 | or just a reg, if MODE is just one byte. Actually, on the ns32k, | |
873 | since the index mode is independent of the operand size, | |
874 | we can match more stuff... | |
875 | ||
876 | This macro's expansion uses the temporary variables xfoo0, xfoo1 | |
877 | and xfoo2 that must be declared in the surrounding context. */ | |
878 | #define INDEX_TERM_P(PROD, MODE) \ | |
879 | ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \ | |
880 | || (GET_CODE (PROD) == MULT \ | |
881 | && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \ | |
882 | (GET_CODE (xfoo1) == CONST_INT \ | |
883 | && GET_CODE (xfoo0) == REG \ | |
884 | && FITS_INDEX_RANGE (INTVAL (xfoo1)) \ | |
885 | && REG_OK_FOR_INDEX_P (xfoo0))))) | |
886 | ||
887 | #define FITS_INDEX_RANGE(X) \ | |
888 | ((xfoo2 = (unsigned)(X)-1), \ | |
889 | ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7)) | |
890 | ||
47c95231 | 891 | /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */ |
231ddcb7 | 892 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
47c95231 | 893 | { register rtx xfooy, xfoo0, xfoo1; \ |
231ddcb7 RS |
894 | unsigned xfoo2; \ |
895 | xfooy = X; \ | |
896 | GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \ | |
897 | if (GET_CODE (xfooy) == PLUS) \ | |
898 | { \ | |
899 | if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \ | |
900 | && GET_CODE (XEXP (xfooy, 0)) == PLUS) \ | |
901 | xfooy = XEXP (xfooy, 0); \ | |
902 | else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \ | |
903 | && GET_CODE (XEXP (xfooy, 1)) == PLUS) \ | |
904 | xfooy = XEXP (xfooy, 1); \ | |
fbaef11f | 905 | GO_IF_INDEXING (xfooy, MODE, ADDR); \ |
231ddcb7 RS |
906 | } \ |
907 | else if (INDEX_TERM_P (xfooy, MODE)) \ | |
908 | goto ADDR; \ | |
909 | else if (GET_CODE (xfooy) == PRE_DEC) \ | |
910 | if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \ | |
911 | else abort (); \ | |
912 | } | |
913 | ||
914 | /* Try machine-dependent ways of modifying an illegitimate address | |
915 | to be legitimate. If we find one, return the new, valid address. | |
916 | This macro is used in only one place: `memory_address' in explow.c. | |
917 | ||
918 | OLDX is the address as it was before break_out_memory_refs was called. | |
919 | In some cases it is useful to look at this to decide what needs to be done. | |
920 | ||
921 | MODE and WIN are passed so that this macro can use | |
922 | GO_IF_LEGITIMATE_ADDRESS. | |
923 | ||
924 | It is always safe for this macro to do nothing. It exists to recognize | |
925 | opportunities to optimize the output. | |
926 | ||
927 | For the ns32k, we do nothing */ | |
928 | ||
929 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} | |
930 | ||
931 | /* Go to LABEL if ADDR (a legitimate address expression) | |
932 | has an effect that depends on the machine mode it is used for. | |
933 | On the ns32k, only predecrement and postincrement address depend thus | |
934 | (the amount of decrement or increment being the length of the operand). */ | |
935 | ||
936 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
937 | { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \ | |
938 | goto LABEL;} | |
939 | \f | |
940 | /* Specify the machine mode that this machine uses | |
941 | for the index in the tablejump instruction. | |
942 | Can do SImode, but HI mode is more efficient. */ | |
943 | #define CASE_VECTOR_MODE HImode | |
944 | ||
945 | /* Define this if the tablejump instruction expects the table | |
946 | to contain offsets from the address of the table. | |
947 | Do not define this if the table should contain absolute addresses. */ | |
948 | #define CASE_VECTOR_PC_RELATIVE | |
949 | ||
950 | /* Specify the tree operation to be used to convert reals to integers. */ | |
951 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
952 | ||
953 | /* This is the kind of divide that is easiest to do in the general case. */ | |
954 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
955 | ||
956 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
957 | #define DEFAULT_SIGNED_CHAR 1 | |
958 | ||
959 | /* Max number of bytes we can move from memory to memory | |
960 | in one reasonably fast instruction. */ | |
961 | #define MOVE_MAX 4 | |
962 | ||
963 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
964 | /* #define SLOW_ZERO_EXTEND */ | |
965 | ||
966 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
967 | #define SLOW_BYTE_ACCESS 0 | |
968 | ||
969 | /* Define if shifts truncate the shift count | |
970 | which implies one can omit a sign-extension or zero-extension | |
971 | of a shift count. */ | |
972 | /* #define SHIFT_COUNT_TRUNCATED */ | |
973 | ||
974 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
975 | is done just by pretending it is already truncated. */ | |
976 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
977 | ||
978 | /* We assume that the store-condition-codes instructions store 0 for false | |
979 | and some other value for true. This is the value stored for true. */ | |
980 | ||
981 | #define STORE_FLAG_VALUE 1 | |
982 | ||
983 | /* Specify the machine mode that pointers have. | |
984 | After generation of rtl, the compiler makes no further distinction | |
985 | between pointers and any other objects of this machine mode. */ | |
986 | #define Pmode SImode | |
987 | ||
988 | /* A function address in a call instruction | |
989 | is a byte address (for indexing purposes) | |
990 | so give the MEM rtx a byte's mode. */ | |
991 | #define FUNCTION_MODE QImode | |
992 | ||
993 | /* Compute the cost of address ADDRESS. */ | |
994 | ||
995 | #define ADDRESS_COST(RTX) calc_address_cost (RTX) | |
996 | ||
997 | /* Compute the cost of computing a constant rtl expression RTX | |
998 | whose rtx-code is CODE. The body of this macro is a portion | |
999 | of a switch statement. If the code is computed here, | |
1000 | return it with a return statement. Otherwise, break from the switch. */ | |
1001 | ||
1002 | #define CONST_COSTS(RTX,CODE) \ | |
1003 | case CONST_INT: \ | |
1004 | if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \ | |
1005 | if (INTVAL (RTX) < 0x4000 && INTVAL (RTX) >= -0x4000) \ | |
1006 | return 1; \ | |
1007 | case CONST: \ | |
1008 | case LABEL_REF: \ | |
1009 | case SYMBOL_REF: \ | |
1010 | return 3; \ | |
1011 | case CONST_DOUBLE: \ | |
1012 | return 5; | |
1013 | \f | |
1014 | /* Tell final.c how to eliminate redundant test instructions. */ | |
1015 | ||
1016 | /* Here we define machine-dependent flags and fields in cc_status | |
1017 | (see `conditions.h'). */ | |
1018 | ||
1019 | /* This bit means that what ought to be in the Z bit | |
1020 | should be tested in the F bit. */ | |
1021 | #define CC_Z_IN_F 04000 | |
1022 | ||
1023 | /* This bit means that what ought to be in the Z bit | |
1024 | is complemented in the F bit. */ | |
1025 | #define CC_Z_IN_NOT_F 010000 | |
1026 | ||
1027 | /* Store in cc_status the expressions | |
1028 | that the condition codes will describe | |
1029 | after execution of an instruction whose pattern is EXP. | |
1030 | Do not alter them if the instruction would not alter the cc's. */ | |
1031 | ||
1032 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
1033 | { if (GET_CODE (EXP) == SET) \ | |
1034 | { if (GET_CODE (SET_DEST (EXP)) == CC0) \ | |
1035 | { cc_status.flags = 0; \ | |
1036 | cc_status.value1 = SET_DEST (EXP); \ | |
1037 | cc_status.value2 = SET_SRC (EXP); \ | |
1038 | } \ | |
1039 | else if (GET_CODE (SET_SRC (EXP)) == CALL) \ | |
1040 | { CC_STATUS_INIT; } \ | |
1041 | else if (GET_CODE (SET_DEST (EXP)) == REG) \ | |
1042 | { if (cc_status.value1 \ | |
1043 | && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \ | |
1044 | cc_status.value1 = 0; \ | |
1045 | if (cc_status.value2 \ | |
1046 | && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \ | |
1047 | cc_status.value2 = 0; \ | |
1048 | } \ | |
1049 | else if (GET_CODE (SET_DEST (EXP)) == MEM) \ | |
1050 | { CC_STATUS_INIT; } \ | |
1051 | } \ | |
1052 | else if (GET_CODE (EXP) == PARALLEL \ | |
1053 | && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ | |
1054 | { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \ | |
1055 | { cc_status.flags = 0; \ | |
1056 | cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \ | |
1057 | cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \ | |
1058 | } \ | |
1059 | else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \ | |
1060 | { if (cc_status.value1 \ | |
1061 | && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \ | |
1062 | cc_status.value1 = 0; \ | |
1063 | if (cc_status.value2 \ | |
1064 | && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \ | |
1065 | cc_status.value2 = 0; \ | |
1066 | } \ | |
1067 | else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \ | |
1068 | { CC_STATUS_INIT; } \ | |
1069 | } \ | |
1070 | else if (GET_CODE (EXP) == CALL) \ | |
1071 | { /* all bets are off */ CC_STATUS_INIT; } \ | |
1072 | else { /* nothing happens? CC_STATUS_INIT; */} \ | |
1073 | if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ | |
1074 | && cc_status.value2 \ | |
1075 | && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ | |
1076 | abort (); \ | |
1077 | } | |
1078 | ||
1079 | /* Describe the costs of the following register moves which are discouraged: | |
1080 | 1.) Moves between the Floating point registers and the frame pointer and stack pointer | |
1081 | 2.) Moves between the stack pointer and the frame pointer | |
1082 | 3.) Moves between the floating point and general registers */ | |
1083 | ||
1084 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
1085 | ((((CLASS1) == FLOAT_REGS && ((CLASS2) == STACK_POINTER_REG || (CLASS2) == FRAME_POINTER_REG)) \ | |
1086 | || ((CLASS2) == FLOAT_REGS && ((CLASS1) == STACK_POINTER_REG || (CLASS1) == FRAME_POINTER_REG)) \ | |
1087 | || ((CLASS1) == STACK_POINTER_REG && (CLASS2) == FRAME_POINTER_REG) \ | |
1088 | || ((CLASS2) == STACK_POINTER_REG && (CLASS1) == FRAME_POINTER_REG) \ | |
1089 | || ((CLASS1) == FLOAT_REGS && (CLASS2) == GENERAL_REGS) \ | |
1090 | || ((CLASS1) == GENERAL_REGS && (CLASS2) == FLOAT_REGS)) \ | |
1091 | ? 4 : 2) | |
1092 | ||
1093 | #define OUTPUT_JUMP(NORMAL, NO_OV) \ | |
1094 | { if (cc_status.flags & CC_NO_OVERFLOW) \ | |
1095 | return NO_OV; \ | |
1096 | return NORMAL; } | |
1097 | \f | |
1098 | /* Dividing the output into sections */ | |
1099 | ||
1100 | /* Output before read-only data. */ | |
1101 | ||
1102 | #define TEXT_SECTION_ASM_OP ".text" | |
1103 | ||
1104 | /* Output before writable data. */ | |
1105 | ||
1106 | #define DATA_SECTION_ASM_OP ".data" | |
1107 | ||
1108 | /* Define the output Assembly Language */ | |
1109 | ||
1110 | /* Output at beginning of assembler file. */ | |
1111 | ||
1112 | #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n"); | |
1113 | ||
1114 | /* Output to assembler file text saying following lines | |
1115 | may contain character constants, extra white space, comments, etc. */ | |
1116 | ||
1117 | #define ASM_APP_ON "#APP\n" | |
1118 | ||
1119 | /* Output to assembler file text saying following lines | |
1120 | no longer contain unusual constructs. */ | |
1121 | ||
1122 | #define ASM_APP_OFF "#NO_APP\n" | |
1123 | ||
1124 | /* Output of Data */ | |
1125 | ||
1126 | /* This is how to output an assembler line defining a `double' constant. */ | |
1127 | ||
1128 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
1129 | fprintf (FILE, "\t.double 0d%.20e\n", (VALUE)) | |
1130 | ||
1131 | /* This is how to output an assembler line defining a `float' constant. */ | |
1132 | ||
1133 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
1134 | fprintf (FILE, "\t.float 0f%.20e\n", (VALUE)) | |
1135 | ||
1136 | /* This is how to output an assembler line defining an `int' constant. */ | |
1137 | ||
1138 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
1139 | ( fprintf (FILE, "\t.long "), \ | |
1140 | output_addr_const (FILE, (VALUE)), \ | |
1141 | fprintf (FILE, "\n")) | |
1142 | ||
1143 | /* Likewise for `char' and `short' constants. */ | |
1144 | ||
1145 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1146 | ( fprintf (FILE, "\t.word "), \ | |
1147 | output_addr_const (FILE, (VALUE)), \ | |
1148 | fprintf (FILE, "\n")) | |
1149 | ||
1150 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1151 | ( fprintf (FILE, "\t.byte "), \ | |
1152 | output_addr_const (FILE, (VALUE)), \ | |
1153 | fprintf (FILE, "\n")) | |
1154 | ||
1155 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1156 | ||
1157 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1158 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
1159 | ||
1160 | /* This is how to output an assembler line defining an external/static | |
1161 | address which is not in tree format (for collect.c). */ | |
1162 | ||
1163 | #define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME) \ | |
1164 | do { \ | |
1165 | fprintf (STREAM, "\t.long\t"); \ | |
1166 | ASM_OUTPUT_LABELREF (STREAM, NAME); \ | |
1167 | fprintf (STREAM, "\n"); \ | |
1168 | } while (0) | |
1169 | ||
1170 | /* This is how to output an insn to push a register on the stack. | |
1171 | It need not be very fast code. */ | |
1172 | ||
1173 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1174 | fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO]) | |
1175 | ||
1176 | /* This is how to output an insn to pop a register from the stack. | |
1177 | It need not be very fast code. */ | |
1178 | ||
1179 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1180 | fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO]) | |
1181 | ||
1182 | /* How to refer to registers in assembler output. | |
1183 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1184 | ||
1185 | #define REGISTER_NAMES \ | |
1186 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
1187 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
1188 | "fp", "sp"} | |
1189 | ||
1190 | /* How to renumber registers for dbx and gdb. | |
1191 | NS32000 may need more change in the numeration. */ | |
1192 | ||
1193 | #define DBX_REGISTER_NUMBER(REGNO) ((REGNO < 8) ? (REGNO)+4 : (REGNO)) | |
1194 | ||
1195 | /* This is how to output the definition of a user-level label named NAME, | |
1196 | such as the label on a static function or variable NAME. */ | |
1197 | ||
1198 | #ifndef COLLECT | |
1199 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1200 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1201 | #else | |
1202 | #define ASM_OUTPUT_LABEL(STREAM,NAME) \ | |
1203 | do { \ | |
1204 | fprintf (STREAM, "%s:\n", NAME); \ | |
1205 | } while (0) | |
1206 | #endif | |
1207 | ||
1208 | /* This is how to output a command to make the user-level label named NAME | |
1209 | defined for reference from other files. */ | |
1210 | ||
1211 | #ifndef COLLECT | |
1212 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1213 | do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1214 | #else | |
1215 | #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ | |
1216 | do { \ | |
1217 | fprintf (STREAM, "\t.globl\t%s\n", NAME); \ | |
1218 | } while (0) | |
1219 | #endif | |
1220 | ||
1221 | /* This is how to output a reference to a user-level label named NAME. | |
1222 | `assemble_name' uses this. */ | |
1223 | ||
1224 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
1225 | fprintf (FILE, "_%s", NAME) | |
1226 | ||
1227 | /* This is how to output an internal numbered label where | |
1228 | PREFIX is the class of label and NUM is the number within the class. */ | |
1229 | ||
1230 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
1231 | fprintf (FILE, "%s%d:\n", PREFIX, NUM) | |
1232 | ||
1233 | /* This is how to store into the string LABEL | |
1234 | the symbol_ref name of an internal numbered label where | |
1235 | PREFIX is the class of label and NUM is the number within the class. | |
1236 | This is suitable for output with `assemble_name'. */ | |
1237 | ||
1238 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1239 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
1240 | ||
1241 | /* This is how to align the code that follows an unconditional branch. */ | |
1242 | ||
1243 | #define ASM_OUTPUT_ALIGN_CODE(FILE) \ | |
1244 | fprintf (FILE, "\t.align 2\n") | |
1245 | ||
1246 | /* This is how to output an element of a case-vector that is absolute. | |
1247 | (The ns32k does not use such vectors, | |
1248 | but we must define this macro anyway.) */ | |
1249 | ||
1250 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1251 | fprintf (FILE, "\t.long L%d\n", VALUE) | |
1252 | ||
1253 | /* This is how to output an element of a case-vector that is relative. */ | |
1254 | /* ** Notice that the second element is LI format! */ | |
1255 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
1256 | fprintf (FILE, "\t.word L%d-LI%d\n", VALUE, REL) | |
1257 | ||
1258 | /* This is how to output an assembler line | |
1259 | that says to advance the location counter | |
1260 | to a multiple of 2**LOG bytes. */ | |
1261 | ||
1262 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1263 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
1264 | ||
1265 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1266 | fprintf (FILE, "\t.space %u\n", (SIZE)) | |
1267 | ||
1268 | /* This says how to output an assembler line | |
1269 | to define a global common symbol. */ | |
1270 | ||
1271 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1272 | ( fputs (".comm ", (FILE)), \ | |
1273 | assemble_name ((FILE), (NAME)), \ | |
1274 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
1275 | ||
1276 | /* This says how to output an assembler line | |
1277 | to define a local common symbol. */ | |
1278 | ||
1279 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
1280 | ( fputs (".lcomm ", (FILE)), \ | |
1281 | assemble_name ((FILE), (NAME)), \ | |
1282 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
1283 | ||
1284 | /* Store in OUTPUT a string (made with alloca) containing | |
1285 | an assembler-name for a local static variable named NAME. | |
1286 | LABELNO is an integer which is different for each call. */ | |
1287 | ||
1288 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1289 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1290 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1291 | ||
1292 | /* Define the parentheses used to group arithmetic operations | |
1293 | in assembler code. */ | |
1294 | ||
1295 | #define ASM_OPEN_PAREN "(" | |
1296 | #define ASM_CLOSE_PAREN ")" | |
1297 | ||
1298 | /* Define results of standard character escape sequences. */ | |
1299 | #define TARGET_BELL 007 | |
1300 | #define TARGET_BS 010 | |
1301 | #define TARGET_TAB 011 | |
1302 | #define TARGET_NEWLINE 012 | |
1303 | #define TARGET_VT 013 | |
1304 | #define TARGET_FF 014 | |
1305 | #define TARGET_CR 015 | |
1306 | ||
1307 | /* Print an instruction operand X on file FILE. | |
1308 | CODE is the code from the %-spec that requested printing this operand; | |
1309 | if `%z3' was used to print operand 3, then CODE is 'z'. */ | |
1310 | ||
1311 | /* %$ means print the prefix for an immediate operand. */ | |
1312 | ||
1313 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
1314 | ((CODE) == '$' || (CODE) == '?') | |
1315 | ||
1316 | #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE) | |
1317 | ||
1318 | /* Print a memory operand whose address is X, on file FILE. */ | |
1319 | ||
1320 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR) | |
1321 | ||
1322 | /* Define functions in ns32k.c and used in insn-output.c. */ | |
1323 | ||
1324 | extern char *output_move_double (); | |
1325 | extern char *output_shift_insn (); | |
1326 | ||
1327 | /* | |
1328 | Local variables: | |
1329 | version-control: t | |
1330 | End: | |
1331 | */ |