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1 | /* Definitions of target machine for GNU compiler. MIPS version. |
2 | Contributed by A. Lichnewsky, lich@inria.inria.fr | |
3 | Changed by Michael Meissner, meissner@osf.org | |
4 | Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc. | |
5 | ||
6 | This file is part of GNU CC. | |
7 | ||
8 | GNU CC is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GNU CC is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GNU CC; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
21 | ||
22 | ||
23 | /* Make Saber happier on obstack.[ch]. */ | |
24 | #if defined(__mips__) || defined(mips) | |
25 | #define __PTR_TO_INT(P) ((int)(P)) | |
26 | #define __INT_TO_PTR(P) ((char *)(P)) | |
27 | #endif | |
28 | ||
29 | /* Standard GCC variables that we reference. */ | |
30 | ||
31 | extern int target_flags; | |
32 | extern int optimize; | |
33 | extern int may_call_alloca; | |
34 | extern int current_function_calls_alloca; | |
35 | extern int frame_pointer_needed; | |
36 | extern int flag_omit_frame_pointer; | |
37 | ||
38 | /* MIPS external variables defined in mips.c. */ | |
39 | ||
40 | /* comparison type */ | |
41 | enum cmp_type { | |
42 | CMP_SI, /* compare integers */ | |
43 | CMP_SF, /* compare single precision floats */ | |
44 | CMP_DF, /* compare double precision floats */ | |
45 | CMP_MAX /* max comparison type */ | |
46 | }; | |
47 | ||
48 | /* types of delay slot */ | |
49 | enum delay_type { | |
50 | DELAY_NONE, /* no delay slot */ | |
51 | DELAY_LOAD, /* load from memory delay */ | |
52 | DELAY_HILO /* move from/to hi/lo registers */ | |
53 | }; | |
54 | ||
55 | /* Which processor to schedule for. Since there is no difference between | |
56 | a R2000 and R3000 in terms of the scheduler, we collapse them into | |
57 | just an R3000. */ | |
58 | ||
59 | enum processor_type { | |
60 | PROCESSOR_DEFAULT, | |
61 | PROCESSOR_R3000, | |
62 | PROCESSOR_R6000, | |
63 | PROCESSOR_R4000 | |
64 | }; | |
65 | ||
66 | extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */ | |
67 | extern char mips_print_operand_punct[]; /* print_operand punctuation chars */ | |
68 | extern char *current_function_name; /* current function being compiled */ | |
69 | extern char *current_function_file; /* filename current function is in */ | |
70 | extern int num_source_filenames; /* current .file # */ | |
71 | extern int inside_function; /* != 0 if inside of a function */ | |
72 | extern int ignore_line_number; /* != 0 if we are to ignore next .loc */ | |
73 | extern int file_in_function_warning; /* warning given about .file in func */ | |
74 | extern int sdb_label_count; /* block start/end next label # */ | |
75 | extern int mips_section_threshold; /* # bytes of data/sdata cutoff */ | |
76 | extern int g_switch_value; /* value of the -G xx switch */ | |
77 | extern int g_switch_set; /* whether -G xx was passed. */ | |
78 | extern int sym_lineno; /* sgi next label # for each stmt */ | |
79 | extern int set_noreorder; /* # of nested .set noreorder's */ | |
80 | extern int set_nomacro; /* # of nested .set nomacro's */ | |
81 | extern int set_noat; /* # of nested .set noat's */ | |
82 | extern int set_volatile; /* # of nested .set volatile's */ | |
83 | extern int flag_half_pic; /* whether or not we use half-pic */ | |
84 | extern int mips_branch_likely; /* emit 'l' after br (branch likely) */ | |
85 | extern int mips_dbx_regno[]; /* Map register # to debug register # */ | |
86 | extern char mips_rtx_classify[]; /* classify an RTX code */ | |
87 | extern struct rtx_def *branch_cmp[2]; /* operands for compare */ | |
88 | extern enum cmp_type branch_type; /* what type of branch to use */ | |
89 | extern enum processor_type mips_cpu; /* which cpu are we scheduling for */ | |
90 | extern int mips_isa; /* architectural level */ | |
91 | extern char *mips_cpu_string; /* for -mcpu=<xxx> */ | |
92 | extern char *mips_isa_string; /* for -mips{1,2,3} */ | |
93 | extern int dslots_load_total; /* total # load related delay slots */ | |
94 | extern int dslots_load_filled; /* # filled load delay slots */ | |
95 | extern int dslots_jump_total; /* total # jump related delay slots */ | |
96 | extern int dslots_jump_filled; /* # filled jump delay slots */ | |
97 | extern int dslots_number_nops; /* # of nops needed by previous insn */ | |
98 | extern int num_refs[3]; /* # 1/2/3 word references */ | |
99 | extern struct rtx_def *mips_load_reg; /* register to check for load delay */ | |
100 | extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */ | |
101 | extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */ | |
102 | extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */ | |
103 | ||
104 | /* Functions within mips.c that we reference. */ | |
105 | ||
106 | extern void abort_with_insn (); | |
107 | extern int arith32_operand (); | |
108 | extern int arith_operand (); | |
109 | extern int call_memory_operand (); | |
110 | extern int cmp_op (); | |
111 | extern int cmp2_op (); | |
112 | extern unsigned long compute_frame_size (); | |
113 | extern void expand_block_move (); | |
114 | extern int equality_op (); | |
115 | extern int fcmp_op (); | |
116 | extern struct rtx_def * function_arg (); | |
117 | extern void function_arg_advance (); | |
118 | extern int function_arg_partial_nregs (); | |
119 | extern void function_epilogue (); | |
120 | extern void function_prologue (); | |
121 | extern void gen_conditional_branch (); | |
122 | extern void half_pic_encode_section_info (); | |
123 | extern void init_cumulative_args (); | |
124 | extern int large_int (); | |
125 | extern int md_register_operand (); | |
126 | extern int mips_address_cost (); | |
127 | extern void mips_asm_file_end (); | |
128 | extern void mips_asm_file_start (); | |
129 | extern int mips_const_double_ok (); | |
130 | extern int mips_constant_address_p (); | |
131 | extern void mips_count_memory_refs (); | |
132 | extern int mips_debugger_offset (); | |
133 | extern int mips_epilogue_delay_slots (); | |
134 | extern char *mips_fill_delay_slot (); | |
135 | extern char *mips_move_1word (); | |
136 | extern char *mips_move_2words (); | |
137 | extern int mips_output_external (); | |
138 | extern void mips_output_filename (); | |
139 | extern void mips_output_lineno (); | |
140 | extern void override_options (); | |
141 | extern void print_operand_address (); | |
142 | extern void print_operand (); | |
143 | extern void print_options (); | |
144 | extern int reg_or_0_operand (); | |
145 | extern int simple_memory_operand (); | |
146 | extern int small_int (); | |
147 | extern void trace(); | |
148 | extern int uns_arith_operand (); | |
149 | extern int uns_cmp_op (); | |
150 | ||
151 | /* Functions in varasm.c that we reference. */ | |
152 | extern void data_section (); | |
153 | extern void rdata_section (); | |
154 | extern void readonly_data_section (); | |
155 | extern void sdata_section (); | |
156 | extern void text_section (); | |
157 | ||
158 | \f | |
159 | /* Switch Recognition by gcc.c. Add -G xx support */ | |
160 | ||
161 | #ifdef SWITCH_TAKES_ARG | |
162 | #undef SWITCH_TAKES_ARG | |
163 | #endif | |
164 | ||
165 | #define SWITCH_TAKES_ARG(CHAR) \ | |
166 | ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \ | |
167 | || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \ | |
168 | || (CHAR) == 'I' || (CHAR) == 'm' \ | |
169 | || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G') | |
170 | ||
171 | /* Sometimes certain combinations of command options do not make sense | |
172 | on a particular target machine. You can define a macro | |
173 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
174 | defined, is executed once just after all the command options have | |
175 | been parsed. | |
176 | ||
177 | On the MIPS, it is used to handle -G. We also use it to set up all | |
178 | of the tables referenced in the other macros. */ | |
179 | ||
180 | #define OVERRIDE_OPTIONS override_options () | |
181 | ||
182 | /* Zero or more C statements that may conditionally modify two | |
183 | variables `fixed_regs' and `call_used_regs' (both of type `char | |
184 | []') after they have been initialized from the two preceding | |
185 | macros. | |
186 | ||
187 | This is necessary in case the fixed or call-clobbered registers | |
188 | depend on target flags. | |
189 | ||
190 | You need not define this macro if it has no work to do. | |
191 | ||
192 | If the usage of an entire class of registers depends on the target | |
193 | flags, you may indicate this to GCC by using this macro to modify | |
194 | `fixed_regs' and `call_used_regs' to 1 for each of the registers in | |
195 | the classes which should not be used by GCC. Also define the macro | |
196 | `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a | |
197 | letter for a class that shouldn't be used. | |
198 | ||
199 | (However, if this class is not included in `GENERAL_REGS' and all | |
200 | of the insn patterns whose constraints permit this class are | |
201 | controlled by target switches, then GCC will automatically avoid | |
202 | using these registers when the target switches are opposed to | |
203 | them.) */ | |
204 | ||
205 | #define CONDITIONAL_REGISTER_USAGE \ | |
206 | do \ | |
207 | { \ | |
208 | if (!TARGET_HARD_FLOAT) \ | |
209 | { \ | |
210 | int regno; \ | |
211 | \ | |
212 | for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \ | |
213 | fixed_regs[regno] = call_used_regs[regno] = 1; \ | |
214 | } \ | |
215 | } \ | |
216 | while (0) | |
217 | ||
218 | ||
219 | /* Some machines may desire to change what optimizations are | |
220 | performed for various optimization levels. This macro, if | |
221 | defined, is executed once just after the optimization level is | |
222 | determined and before the remainder of the command options have | |
223 | been parsed. Values set in this macro are used as the default | |
224 | values for the other command line options. | |
225 | ||
226 | LEVEL is the optimization level specified; 2 if -O2 is | |
227 | specified, 1 if -O is specified, and 0 if neither is specified. */ | |
228 | ||
229 | #define OPTIMIZATION_OPTIONS(LEVEL) \ | |
230 | { \ | |
231 | if (LEVEL) \ | |
232 | { \ | |
233 | flag_omit_frame_pointer = TRUE; \ | |
234 | flag_delayed_branch = TRUE; \ | |
235 | flag_thread_jumps = TRUE; \ | |
236 | flag_schedule_insns_after_reload = TRUE; \ | |
237 | flag_caller_saves = TRUE; \ | |
238 | } \ | |
239 | \ | |
240 | if (LEVEL >= 2) \ | |
241 | { \ | |
242 | flag_strength_reduce = TRUE; \ | |
243 | flag_cse_follow_jumps = TRUE; \ | |
244 | flag_expensive_optimizations = TRUE; \ | |
245 | flag_rerun_cse_after_loop = TRUE; \ | |
246 | flag_schedule_insns = TRUE; \ | |
247 | } \ | |
248 | \ | |
249 | if (LEVEL >= 3) \ | |
250 | { \ | |
251 | flag_inline_functions = TRUE; \ | |
252 | } \ | |
253 | } | |
254 | ||
255 | \f | |
256 | ||
257 | /* Complain about missing specs and predefines that should be defined in each | |
258 | of the target tm files to override the defaults. This is mostly a place- | |
259 | holder until I can get each of the files updated [mm]. */ | |
260 | ||
261 | #if defined(OSF_OS) \ | |
262 | || defined(DECSTATION) \ | |
263 | || defined(SGI_TARGET) \ | |
264 | || defined(MIPS_NEWS) \ | |
265 | || defined(MIPS_SYSV) \ | |
266 | || defined(MIPS_BSD43) | |
267 | ||
268 | #ifndef CPP_PREDEFINES | |
269 | #error "Define CPP_PREDEFINES in the appropriate tm.h file" | |
270 | #endif | |
271 | ||
272 | #ifndef CPP_SPEC | |
273 | #error "Define CPP_SPEC in the appropriate tm.h file" | |
274 | #endif | |
275 | ||
276 | #ifndef LINK_SPEC | |
277 | #error "Define LINK_SPEC in the appropriate tm.h file" | |
278 | #endif | |
279 | ||
280 | #ifndef LIB_SPEC | |
281 | #error "Define LIB_SPEC in the appropriate tm.h file" | |
282 | #endif | |
283 | ||
284 | #ifndef STARTFILE_SPEC | |
285 | #error "Define STARTFILE_SPEC in the appropriate tm.h file" | |
286 | #endif | |
287 | ||
288 | #ifndef MACHINE_TYPE | |
289 | #error "Define MACHINE_TYPE in the appropriate tm.h file" | |
290 | #endif | |
291 | #endif | |
292 | ||
293 | \f | |
294 | /* Names to predefine in the preprocessor for this target machine. */ | |
295 | ||
296 | #ifndef CPP_PREDEFINES | |
297 | #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000" | |
298 | #endif | |
299 | ||
300 | /* Extra switches sometimes passed to the assembler. */ | |
301 | ||
302 | #ifndef ASM_SPEC | |
303 | #define ASM_SPEC "%{!mgas: \ | |
304 | %{!mrnames: -nocpp} \ | |
305 | %{pipe: %e-pipe is not supported.} \ | |
306 | %{EB} %{!EB:-EB} \ | |
307 | %{EL: %e-EL not supported} \ | |
308 | %{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \ | |
309 | %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \ | |
310 | %{G*}" | |
311 | ||
312 | #endif /* ASM_SPEC */ | |
313 | ||
314 | /* Specify to run a post-processor, mips-tfile after the assembler | |
315 | has run to stuff the mips debug information into the object file. | |
316 | This is needed because the $#!%^ MIPS assembler provides no way | |
317 | of specifing such information in the assembly file. */ | |
318 | ||
319 | #ifndef ASM_FINAL_SPEC | |
320 | #define ASM_FINAL_SPEC "%{!mgas: %{!mno-mips-tfile: \ | |
321 | \n mips-tfile %{v*: -v} \ | |
322 | %{K: -I %b.o~} \ | |
323 | %{!K: %{save-temps: -I %b.o~}} \ | |
324 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %b.o} \ | |
325 | %{.s:%i} %{!.s:%g.s}}}" | |
326 | #endif | |
327 | ||
328 | /* Redefinition of libraries used. Mips doesn't support normal | |
329 | UNIX style profiling via calling _mcount. It does offer | |
330 | profiling that samples the PC, so do what we can... */ | |
331 | ||
332 | #ifndef LIB_SPEC | |
333 | #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc" | |
334 | #endif | |
335 | ||
336 | /* Suppress libg.a from being linked in when debugging, since MIPS doesn't | |
337 | supply one. */ | |
338 | ||
339 | #ifndef LIBG_SPEC | |
340 | #define LIBG_SPEC "" | |
341 | #endif | |
342 | ||
343 | /* Extra switches sometimes passed to the loader. */ | |
344 | ||
345 | ||
346 | #ifndef LINK_SPEC | |
347 | #define LINK_SPEC "%{G*} \ | |
348 | %{!mgas: \ | |
349 | %{pipe: %e-pipe is not supported.} \ | |
350 | %{EB} %{!EB:-EB} \ | |
351 | %{EL: %e-EL not supported} \ | |
352 | %{bestGnum}}" | |
353 | #endif /* LINK_SPEC defined */ | |
354 | ||
355 | /* Specs for the compiler proper */ | |
356 | ||
357 | #ifndef CC1_SPEC | |
358 | #define CC1_SPEC "%{O*: %{!mno-gpOPT:%{!mno-gpopt: -mgpopt}}} \ | |
359 | %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \ | |
360 | %{G*} \ | |
361 | %{pic-none: -mno-half-pic} \ | |
362 | %{pic-lib: -mhalf-pic} \ | |
363 | %{pic-extern: -mhalf-pic} \ | |
364 | %{pic-calls: -mhalf-pic} \ | |
365 | %{save-temps: }" | |
366 | #endif | |
367 | ||
368 | #ifndef CC1PLUS_SPEC | |
369 | #define CC1PLUS_SPEC "%{!fgnu-binutils: -fno-gnu-binutils}" | |
370 | #endif | |
371 | ||
372 | /* Preprocessor specs */ | |
373 | ||
374 | #ifndef CPP_SPEC | |
375 | #define CPP_SPEC "%{!ansi:-DSYSTYPE_BSD} -D__SYSTYPE_BSD__ \ | |
376 | %{.S: -D__LANGUAGE_ASSEMBLY__ \ | |
377 | -D_LANGUAGE_ASSEMBLY \ | |
378 | %{!ansi:-DLANGUAGE_ASSEMBLY}} \ | |
379 | %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ \ | |
380 | -D_LANGUAGE_C_PLUS_PLUS \ | |
381 | %{!ansi:-DLANGUAGE_C_PLUS_PLUS}} \ | |
382 | %{.cxx:-D__LANGUAGE_C_PLUS_PLUS__ \ | |
383 | -D_LANGUAGE_C_PLUS_PLUS \ | |
384 | %{!ansi:-DLANGUAGE_C_PLUS_PLUS}} \ | |
385 | %{.C: -D__LANGUAGE_C_PLUS_PLUS__ \ | |
386 | -D_LANGUAGE_C_PLUS_PLUS \ | |
387 | %{!ansi:-DLANGUAGE_C_PLUS_PLUS}} \ | |
388 | %{.m: -D__LANGUAGE_OBJECTIVE_C__ \ | |
389 | -D_LANGUAGE_OBJECTIVE_C \ | |
390 | %{!ansi:-DLANGUAGE_OBJECTIVE_C}} \ | |
391 | %{!.S: -D__LANGUAGE_C__ \ | |
392 | -D_LANGUAGE_C \ | |
393 | %{!ansi:-DLANGUAGE_C}}" | |
394 | #endif | |
395 | ||
396 | /* If defined, this macro is an additional prefix to try after | |
397 | `STANDARD_EXEC_PREFIX'. */ | |
398 | ||
399 | #ifndef MD_EXEC_PREFIX | |
400 | #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc" | |
401 | #endif | |
402 | ||
403 | \f | |
404 | /* Print subsidiary information on the compiler version in use. */ | |
405 | ||
406 | #define MIPS_VERSION "[AL 1.1, MM 11]" | |
407 | ||
408 | #ifndef MACHINE_TYPE | |
409 | #define MACHINE_TYPE "BSD Mips" | |
410 | #endif | |
411 | ||
412 | #ifndef TARGET_VERSION_INTERNAL | |
413 | #define TARGET_VERSION_INTERNAL(STREAM) \ | |
414 | fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE) | |
415 | #endif | |
416 | ||
417 | #ifndef TARGET_VERSION | |
418 | #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr) | |
419 | #endif | |
420 | ||
421 | \f | |
422 | #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ | |
423 | #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */ | |
424 | #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ | |
425 | ||
426 | #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ | |
427 | #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG | |
428 | #endif | |
429 | ||
430 | /* If we are passing smuggling stabs through the MIPS ECOFF object | |
431 | format, put a comment in front of the .stab<x> operation so | |
432 | that the MIPS assembler does not choke. The mips-tfile program | |
433 | will correctly put the stab into the object file. */ | |
434 | ||
435 | #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs") | |
436 | #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn") | |
437 | #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd") | |
438 | ||
439 | /* Forward references to tags are allowed. */ | |
440 | #define SDB_ALLOW_FORWARD_REFERENCES | |
441 | ||
442 | /* Unknown tags are also allowed. */ | |
443 | #define SDB_ALLOW_UNKNOWN_REFERENCES | |
444 | ||
445 | /* On Sun 4, this limit is 2048. We use 1500 to be safe, | |
446 | since the length can run past this up to a continuation point. */ | |
447 | #define DBX_CONTIN_LENGTH 1500 | |
448 | ||
449 | ||
450 | /* How to renumber registers for dbx and gdb. */ | |
451 | #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ] | |
452 | ||
453 | ||
454 | /* Overrides for the COFF debug format. */ | |
455 | #define PUT_SDB_SCL(a) \ | |
456 | do { \ | |
457 | extern FILE *asm_out_text_file; \ | |
458 | fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \ | |
459 | } while (0) | |
460 | ||
461 | #define PUT_SDB_INT_VAL(a) \ | |
462 | do { \ | |
463 | extern FILE *asm_out_text_file; \ | |
464 | fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \ | |
465 | } while (0) | |
466 | ||
467 | #define PUT_SDB_VAL(a) \ | |
468 | do { \ | |
469 | extern FILE *asm_out_text_file; \ | |
470 | fputs ("\t.val\t", asm_out_text_file); \ | |
471 | output_addr_const (asm_out_text_file, (a)); \ | |
472 | fputc (';', asm_out_text_file); \ | |
473 | } while (0) | |
474 | ||
475 | #define PUT_SDB_DEF(a) \ | |
476 | do { \ | |
477 | extern FILE *asm_out_text_file; \ | |
478 | fprintf (asm_out_text_file, "\t#.def\t"); \ | |
479 | ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ | |
480 | fputc (';', asm_out_text_file); \ | |
481 | } while (0) | |
482 | ||
483 | #define PUT_SDB_PLAIN_DEF(a) \ | |
484 | do { \ | |
485 | extern FILE *asm_out_text_file; \ | |
486 | fprintf (asm_out_text_file, "\t#.def\t.%s;", (a)); \ | |
487 | } while (0) | |
488 | ||
489 | #define PUT_SDB_ENDEF \ | |
490 | do { \ | |
491 | extern FILE *asm_out_text_file; \ | |
492 | fprintf (asm_out_text_file, "\t.endef\n"); \ | |
493 | } while (0) | |
494 | ||
495 | #define PUT_SDB_TYPE(a) \ | |
496 | do { \ | |
497 | extern FILE *asm_out_text_file; \ | |
498 | fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \ | |
499 | } while (0) | |
500 | ||
501 | #define PUT_SDB_SIZE(a) \ | |
502 | do { \ | |
503 | extern FILE *asm_out_text_file; \ | |
504 | fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \ | |
505 | } while (0) | |
506 | ||
507 | #define PUT_SDB_DIM(a) \ | |
508 | do { \ | |
509 | extern FILE *asm_out_text_file; \ | |
510 | fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \ | |
511 | } while (0) | |
512 | ||
513 | #ifndef PUT_SDB_START_DIM | |
514 | #define PUT_SDB_START_DIM \ | |
515 | do { \ | |
516 | extern FILE *asm_out_text_file; \ | |
517 | fprintf (asm_out_text_file, "\t.dim\t"); \ | |
518 | } while (0) | |
519 | #endif | |
520 | ||
521 | #ifndef PUT_SDB_NEXT_DIM | |
522 | #define PUT_SDB_NEXT_DIM(a) \ | |
523 | do { \ | |
524 | extern FILE *asm_out_text_file; \ | |
525 | fprintf (asm_out_text_file, "%d,", a); \ | |
526 | } while (0) | |
527 | #endif | |
528 | ||
529 | #ifndef PUT_SDB_LAST_DIM | |
530 | #define PUT_SDB_LAST_DIM(a) \ | |
531 | do { \ | |
532 | extern FILE *asm_out_text_file; \ | |
533 | fprintf (asm_out_text_file, "%d;", a); \ | |
534 | } while (0) | |
535 | #endif | |
536 | ||
537 | #define PUT_SDB_TAG(a) \ | |
538 | do { \ | |
539 | extern FILE *asm_out_text_file; \ | |
540 | fprintf (asm_out_text_file, "\t.tag\t"); \ | |
541 | ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ | |
542 | fputc (';', asm_out_text_file); \ | |
543 | } while (0) | |
544 | ||
545 | /* For block start and end, we create labels, so that | |
546 | later we can figure out where the correct offset is. | |
547 | The normal .ent/.end serve well enough for functions, | |
548 | so those are just commented out. */ | |
549 | ||
550 | #define PUT_SDB_BLOCK_START(LINE) \ | |
551 | do { \ | |
552 | extern FILE *asm_out_text_file; \ | |
553 | fprintf (asm_out_text_file, \ | |
554 | "$Lb%d:\n\t#.begin\t$Lb%d\t%d\n", \ | |
555 | sdb_label_count, \ | |
556 | sdb_label_count, \ | |
557 | (LINE)); \ | |
558 | sdb_label_count++; \ | |
559 | } while (0) | |
560 | ||
561 | #define PUT_SDB_BLOCK_END(LINE) \ | |
562 | do { \ | |
563 | extern FILE *asm_out_text_file; \ | |
564 | fprintf (asm_out_text_file, \ | |
565 | "$Le%d:\n\t#.bend\t$Le%d\t%d\n", \ | |
566 | sdb_label_count, \ | |
567 | sdb_label_count, \ | |
568 | (LINE)); \ | |
569 | sdb_label_count++; \ | |
570 | } while (0) | |
571 | ||
572 | #define PUT_SDB_FUNCTION_START(LINE) | |
573 | ||
574 | #define PUT_SDB_FUNCTION_END(LINE) | |
575 | ||
576 | #define PUT_SDB_EPILOGUE_END(NAME) | |
577 | ||
578 | #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \ | |
579 | sprintf ((BUFFER), ".%dfake", (NUMBER)); | |
580 | ||
581 | /* Correct the offset of automatic variables and arguments | |
582 | if the frame pointer has been eliminated. */ | |
583 | ||
584 | #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0) | |
585 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET) | |
586 | ||
587 | \f | |
588 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
589 | ||
590 | /* Macros used in the machine description to test the flags. */ | |
591 | ||
592 | /* Bits for real switches */ | |
593 | #define MASK_INT64 0x00000001 /* ints are 64 bits */ | |
594 | #define MASK_LONG64 0x00000002 /* longs are 64 bits */ | |
595 | #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */ | |
596 | #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */ | |
597 | #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */ | |
598 | #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */ | |
599 | #define MASK_STATS 0x00000040 /* print statistics to stderr */ | |
600 | #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/ | |
601 | #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */ | |
602 | #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */ | |
603 | #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */ | |
604 | #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/ | |
605 | #define MASK_UNUSED1 0x00001000 | |
606 | #define MASK_UNUSED2 0x00002000 | |
607 | #define MASK_UNUSED3 0x00004000 | |
608 | #define MASK_UNUSED4 0x00008000 | |
609 | #define MASK_UNUSED5 0x00010000 | |
610 | #define MASK_UNUSED6 0x00020000 | |
611 | #define MASK_UNUSED7 0x00040000 | |
612 | #define MASK_UNUSED8 0x00080000 | |
613 | ||
614 | /* Dummy switches used only in spec's*/ | |
615 | #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */ | |
616 | ||
617 | /* switches not used yet */ | |
618 | #define MASK_WC8 0x00000000 /* wchar's are 8 bits, not 32 */ | |
619 | #define MASK_WC16 0x00000000 /* wchar's are 16 bits, not 32 */ | |
620 | #define MASK_WC32 0x00000000 /* dummy for consistancy */ | |
621 | ||
622 | /* Debug switches, not documented */ | |
623 | #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */ | |
624 | #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */ | |
625 | #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */ | |
626 | #define MASK_DEBUG_C 0x08000000 /* suppress normal divmod patterns */ | |
627 | #define MASK_DEBUG_D 0x04000000 /* make multiply cost 2 */ | |
628 | #define MASK_DEBUG_E 0x02000000 /* function_arg debug */ | |
629 | #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */ | |
630 | #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */ | |
631 | #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */ | |
632 | #define MASK_DEBUG_I 0x00200000 /* unused */ | |
633 | #define MASK_DEBUG_J 0x00100000 /* unused */ | |
634 | ||
635 | /* r4000 64 bit sizes */ | |
636 | #define TARGET_INT64 (target_flags & MASK_INT64) | |
637 | #define TARGET_LONG64 (target_flags & MASK_LONG64) | |
638 | #define TARGET_LLONG128 (target_flags & MASK_LLONG128) | |
639 | #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64) | |
640 | ||
641 | /* Mips vs. GNU assembler */ | |
642 | #define TARGET_GAS (target_flags & MASK_GAS) | |
643 | #define TARGET_UNIX_ASM (!TARGET_GAS) | |
644 | #define TARGET_MIPS_AS TARGET_UNIX_ASM | |
645 | ||
646 | /* Debug Mode */ | |
647 | #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG) | |
648 | #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A) | |
649 | #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B) | |
650 | #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C) | |
651 | #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D) | |
652 | #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E) | |
653 | #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F) | |
654 | #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G) | |
655 | #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H) | |
656 | #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I) | |
657 | #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J) | |
658 | ||
659 | /* Reg. Naming in .s ($21 vs. $a0) */ | |
660 | #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS) | |
661 | ||
662 | /* Optimize for Sdata/Sbss */ | |
663 | #define TARGET_GP_OPT (target_flags & MASK_GPOPT) | |
664 | ||
665 | /* print program statistics */ | |
666 | #define TARGET_STATS (target_flags & MASK_STATS) | |
667 | ||
668 | /* call memcpy instead of inline code */ | |
669 | #define TARGET_MEMCPY (target_flags & MASK_MEMCPY) | |
670 | ||
671 | /* .abicalls, etc from Pyramid V.4 */ | |
672 | #define TARGET_ABICALLS (target_flags & MASK_ABICALLS) | |
673 | ||
674 | /* OSF pic references to externs */ | |
675 | #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC) | |
676 | ||
677 | /* wchar size */ | |
678 | #define TARGET_WC8 (target_flags & MASK_WC8) | |
679 | #define TARGET_WC16 (target_flags & MASK_WC16) | |
680 | #define TARGET_WC32 ((target_flags & (MASK_WC8 | MASK_WC16)) == 0) | |
681 | ||
682 | /* software floating point */ | |
683 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) | |
684 | #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) | |
685 | ||
686 | /* Macro to define tables used to set the flags. | |
687 | This is a list in braces of pairs in braces, | |
688 | each pair being { "NAME", VALUE } | |
689 | where VALUE is the bits to set or minus the bits to clear. | |
690 | An empty string NAME is used to identify the default VALUE. */ | |
691 | ||
692 | #define TARGET_SWITCHES \ | |
693 | { \ | |
694 | {"int64", MASK_INT64 | MASK_LONG64}, \ | |
695 | {"long64", MASK_LONG64}, \ | |
696 | {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \ | |
697 | {"mips-as", -MASK_GAS}, \ | |
698 | {"gas", MASK_GAS}, \ | |
699 | {"rnames", MASK_NAME_REGS}, \ | |
700 | {"no-rnames", -MASK_NAME_REGS}, \ | |
701 | {"gpOPT", MASK_GPOPT}, \ | |
702 | {"gpopt", MASK_GPOPT}, \ | |
703 | {"no-gpOPT", -MASK_GPOPT}, \ | |
704 | {"no-gpopt", -MASK_GPOPT}, \ | |
705 | {"stats", MASK_STATS}, \ | |
706 | {"no-stats", -MASK_STATS}, \ | |
707 | {"memcpy", MASK_MEMCPY}, \ | |
708 | {"no-memcpy", -MASK_MEMCPY}, \ | |
709 | {"wc8", MASK_WC8}, \ | |
710 | {"wc16", MASK_WC16}, \ | |
711 | {"wc32", MASK_WC32}, \ | |
712 | {"mips-tfile", MASK_MIPS_TFILE}, \ | |
713 | {"no-mips-tfile", -MASK_MIPS_TFILE}, \ | |
714 | {"soft-float", MASK_SOFT_FLOAT}, \ | |
715 | {"hard-float", -MASK_SOFT_FLOAT}, \ | |
716 | {"fp64", MASK_FLOAT64}, \ | |
717 | {"fp32", -MASK_FLOAT64}, \ | |
718 | {"abicalls", MASK_ABICALLS}, \ | |
719 | {"no-abicalls", -MASK_ABICALLS}, \ | |
720 | {"half-pic", MASK_HALF_PIC}, \ | |
721 | {"no-half-pic", -MASK_HALF_PIC}, \ | |
722 | {"debug", MASK_DEBUG}, \ | |
723 | {"debuga", MASK_DEBUG_A}, \ | |
724 | {"debugb", MASK_DEBUG_B}, \ | |
725 | {"debugc", MASK_DEBUG_C}, \ | |
726 | {"debugd", MASK_DEBUG_D}, \ | |
727 | {"debuge", MASK_DEBUG_E}, \ | |
728 | {"debugf", MASK_DEBUG_F}, \ | |
729 | {"debugg", MASK_DEBUG_G}, \ | |
730 | {"debugh", MASK_DEBUG_H}, \ | |
731 | {"debugi", MASK_DEBUG_I}, \ | |
732 | {"debugj", MASK_DEBUG_J}, \ | |
733 | {"", TARGET_DEFAULT} \ | |
734 | } | |
735 | ||
736 | /* Default target_flags if no switches are specified */ | |
737 | ||
738 | #ifndef TARGET_DEFAULT | |
739 | #define TARGET_DEFAULT 0 | |
740 | #endif | |
741 | ||
742 | /* This macro is similar to `TARGET_SWITCHES' but defines names of | |
743 | command options that have values. Its definition is an | |
744 | initializer with a subgrouping for each command option. | |
745 | ||
746 | Each subgrouping contains a string constant, that defines the | |
747 | fixed part of the option name, and the address of a variable. | |
748 | The variable, type `char *', is set to the variable part of the | |
749 | given option if the fixed part matches. The actual option name | |
750 | is made by appending `-m' to the specified name. | |
751 | ||
752 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
753 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
754 | will be set to the string `"512"'. | |
755 | ||
756 | extern char *m88k_short_data; | |
757 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
758 | ||
759 | #define TARGET_OPTIONS \ | |
760 | { \ | |
761 | { "cpu=", &mips_cpu_string }, \ | |
762 | { "ips", &mips_isa_string } \ | |
763 | } | |
764 | ||
765 | /* Macros to decide whether certain features are available or not, | |
766 | depending on the instruction set architecture level. */ | |
767 | ||
768 | #define BRANCH_LIKELY_P() (mips_isa >= 2) | |
769 | #define HAVE_64BIT_P() (mips_isa >= 3) | |
770 | #define HAVE_SQRT_P() (mips_isa >= 2) | |
771 | ||
772 | \f | |
773 | /* Target machine storage layout */ | |
774 | ||
775 | /* Define this if most significant bit is lowest numbered | |
776 | in instructions that operate on numbered bit-fields. | |
777 | */ | |
778 | /* #define BITS_BIG_ENDIAN */ | |
779 | ||
780 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
781 | #ifndef BYTES_BIG_ENDIAN | |
782 | #ifndef DECSTATION | |
783 | #define BYTES_BIG_ENDIAN 1 | |
784 | #else | |
785 | #define BYTES_BIG_ENDIAN 0 | |
786 | #endif | |
787 | #endif | |
788 | ||
789 | /* Define this if most significant word of a multiword number is the lowest. */ | |
790 | #ifndef WORDS_BIG_ENDIAN | |
791 | #ifndef DECSTATION | |
792 | #define WORDS_BIG_ENDIAN 1 | |
793 | #else | |
794 | #define WORDS_BIG_ENDIAN 0 | |
795 | #endif | |
796 | #endif | |
797 | ||
798 | /* Define macros to easily access the most and least significant words | |
799 | without a lot of #ifdef's. */ | |
800 | ||
801 | #if WORDS_BIG_ENDIAN | |
802 | #define MOST_SIGNIFICANT_WORD 0 | |
803 | #define LEAST_SIGNIFICANT_WORD 1 | |
804 | ||
805 | #else | |
806 | #define MOST_SIGNIFICANT_WORD 1 | |
807 | #define LEAST_SIGNIFICANT_WORD 0 | |
808 | #endif | |
809 | ||
810 | /* Number of bits in an addressible storage unit */ | |
811 | #define BITS_PER_UNIT 8 | |
812 | ||
813 | /* Width in bits of a "word", which is the contents of a machine register. | |
814 | Note that this is not necessarily the width of data type `int'; | |
815 | if using 16-bit ints on a 68000, this would still be 32. | |
816 | But on a machine with 16-bit registers, this would be 16. */ | |
817 | #define BITS_PER_WORD 32 | |
818 | ||
819 | /* Width of a word, in units (bytes). */ | |
820 | #define UNITS_PER_WORD 4 | |
821 | ||
822 | /* A C expression for the size in bits of the type `int' on the | |
823 | target machine. If you don't define this, the default is one | |
824 | word. */ | |
825 | #define INT_TYPE_SIZE 32 | |
826 | ||
827 | /* A C expression for the size in bits of the type `short' on the | |
828 | target machine. If you don't define this, the default is half a | |
829 | word. (If this would be less than one storage unit, it is | |
830 | rounded up to one unit.) */ | |
831 | #define SHORT_TYPE_SIZE 16 | |
832 | ||
833 | /* A C expression for the size in bits of the type `long' on the | |
834 | target machine. If you don't define this, the default is one | |
835 | word. */ | |
836 | #define LONG_TYPE_SIZE 32 | |
837 | ||
838 | /* A C expression for the size in bits of the type `long long' on the | |
839 | target machine. If you don't define this, the default is two | |
840 | words. */ | |
841 | #define LONG_LONG_TYPE_SIZE 64 | |
842 | ||
843 | /* A C expression for the size in bits of the type `char' on the | |
844 | target machine. If you don't define this, the default is one | |
845 | quarter of a word. (If this would be less than one storage unit, | |
846 | it is rounded up to one unit.) */ | |
847 | #define CHAR_TYPE_SIZE BITS_PER_UNIT | |
848 | ||
849 | /* A C expression for the size in bits of the type `float' on the | |
850 | target machine. If you don't define this, the default is one | |
851 | word. */ | |
852 | #define FLOAT_TYPE_SIZE 32 | |
853 | ||
854 | /* A C expression for the size in bits of the type `double' on the | |
855 | target machine. If you don't define this, the default is two | |
856 | words. */ | |
857 | #define DOUBLE_TYPE_SIZE 64 | |
858 | ||
859 | /* A C expression for the size in bits of the type `long double' on | |
860 | the target machine. If you don't define this, the default is two | |
861 | words. */ | |
862 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
863 | ||
864 | /* Width in bits of a pointer. | |
865 | See also the macro `Pmode' defined below. */ | |
866 | #define POINTER_SIZE 32 | |
867 | ||
868 | /* Allocation boundary (in *bits*) for storing pointers in memory. */ | |
869 | #define POINTER_BOUNDARY 32 | |
870 | ||
871 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
872 | #define PARM_BOUNDARY 32 | |
873 | ||
874 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
875 | #define FUNCTION_BOUNDARY 32 | |
876 | ||
877 | /* Alignment of field after `int : 0' in a structure. */ | |
878 | #define EMPTY_FIELD_BOUNDARY 32 | |
879 | ||
880 | /* Every structure's size must be a multiple of this. */ | |
881 | /* 8 is observed right on a DECstation and on riscos 4.02. */ | |
882 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
883 | ||
884 | /* There is no point aligning anything to a rounder boundary than this. */ | |
885 | #define BIGGEST_ALIGNMENT 64 | |
886 | ||
887 | /* Biggest alignment any structure field can require in bits. */ | |
888 | #define BIGGEST_FIELD_ALIGNMENT 64 | |
889 | ||
890 | /* Define this if move instructions will actually fail to work | |
891 | when given unaligned data. */ | |
892 | #define STRICT_ALIGNMENT | |
893 | ||
894 | /* Define this if you wish to imitate the way many other C compilers | |
895 | handle alignment of bitfields and the structures that contain | |
896 | them. | |
897 | ||
898 | The behavior is that the type written for a bitfield (`int', | |
899 | `short', or other integer type) imposes an alignment for the | |
900 | entire structure, as if the structure really did contain an | |
901 | ordinary field of that type. In addition, the bitfield is placed | |
902 | within the structure so that it would fit within such a field, | |
903 | not crossing a boundary for it. | |
904 | ||
905 | Thus, on most machines, a bitfield whose type is written as `int' | |
906 | would not cross a four-byte boundary, and would force four-byte | |
907 | alignment for the whole structure. (The alignment used may not | |
908 | be four bytes; it is controlled by the other alignment | |
909 | parameters.) | |
910 | ||
911 | If the macro is defined, its definition should be a C expression; | |
912 | a nonzero value for the expression enables this behavior. */ | |
913 | ||
914 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
915 | ||
916 | /* If defined, a C expression to compute the alignment given to a | |
917 | constant that is being placed in memory. CONSTANT is the constant | |
918 | and ALIGN is the alignment that the object would ordinarily have. | |
919 | The value of this macro is used instead of that alignment to align | |
920 | the object. | |
921 | ||
922 | If this macro is not defined, then ALIGN is used. | |
923 | ||
924 | The typical use of this macro is to increase alignment for string | |
925 | constants to be word aligned so that `strcpy' calls that copy | |
926 | constants can be done inline. */ | |
927 | ||
928 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
929 | ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ | |
930 | && (ALIGN) < BITS_PER_WORD \ | |
931 | ? BITS_PER_WORD \ | |
932 | : (ALIGN)) | |
933 | ||
934 | /* If defined, a C expression to compute the alignment for a static | |
935 | variable. TYPE is the data type, and ALIGN is the alignment that | |
936 | the object would ordinarily have. The value of this macro is used | |
937 | instead of that alignment to align the object. | |
938 | ||
939 | If this macro is not defined, then ALIGN is used. | |
940 | ||
941 | One use of this macro is to increase alignment of medium-size | |
942 | data to make it all fit in fewer cache lines. Another is to | |
943 | cause character arrays to be word-aligned so that `strcpy' calls | |
944 | that copy constants to character arrays can be done inline. */ | |
945 | ||
946 | #undef DATA_ALIGNMENT | |
947 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
948 | ((((ALIGN) < BITS_PER_WORD) \ | |
949 | && (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
950 | || TREE_CODE (TYPE) == UNION_TYPE \ | |
951 | || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN)) | |
952 | ||
953 | /* Define this macro if an argument declared as `char' or `short' in a | |
954 | prototype should actually be passed as an `int'. In addition to | |
955 | avoiding errors in certain cases of mismatch, it also makes for | |
956 | better code on certain machines. */ | |
957 | ||
958 | #define PROMOTE_PROTOTYPES | |
959 | ||
960 | /* Define this macro if an instruction to load a value narrower | |
961 | than a word from memory into a register also zero-extends the | |
962 | value to the whole register. */ | |
963 | ||
964 | #define BYTE_LOADS_ZERO_EXTEND | |
965 | ||
966 | \f | |
967 | /* Standard register usage. */ | |
968 | ||
969 | /* Number of actual hardware registers. | |
970 | The hardware registers are assigned numbers for the compiler | |
971 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
972 | All registers that the compiler knows about must be given numbers, | |
973 | even those that are not normally considered general registers. | |
974 | ||
975 | On the Mips, we have 32 integer registers, 32 floating point registers | |
976 | and the special registers hi, lo, and fp status. */ | |
977 | ||
978 | #define FIRST_PSEUDO_REGISTER 67 | |
979 | ||
980 | /* 1 for registers that have pervasive standard uses | |
981 | and are not available for the register allocator. | |
982 | ||
983 | On the MIPS, see conventions, page D-2 */ | |
984 | ||
985 | #define FIXED_REGISTERS \ | |
986 | { \ | |
987 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
988 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \ | |
989 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
990 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
991 | 1, 1, 1 \ | |
992 | } | |
993 | ||
994 | ||
995 | /* 1 for registers not available across function calls. | |
996 | These must include the FIXED_REGISTERS and also any | |
997 | registers that can be used without being saved. | |
998 | The latter must include the registers where values are returned | |
999 | and the register where structure-value addresses are passed. | |
1000 | Aside from that, you can include as many other registers as you like. */ | |
1001 | ||
1002 | #define CALL_USED_REGISTERS \ | |
1003 | { \ | |
1004 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
1005 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \ | |
1006 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
1007 | 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
1008 | 1, 1, 1 \ | |
1009 | } | |
1010 | ||
1011 | ||
1012 | /* Internal macros to classify a register number as to whether it's a | |
1013 | general purpose register, a floating point register, a | |
1014 | multiply/divide register, or a status register. | |
1015 | ||
1016 | The macro FP_CALL_REG_P also allows registers $4 and $6 as floating | |
1017 | point registers to pass floating point as per MIPS spec. */ | |
1018 | ||
1019 | #define GP_REG_FIRST 0 | |
1020 | #define GP_REG_LAST 31 | |
1021 | #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1) | |
1022 | #define GP_DBX_FIRST 0 | |
1023 | ||
1024 | #define FP_REG_FIRST 32 | |
1025 | #define FP_REG_LAST 63 | |
1026 | #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1) | |
1027 | #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32) | |
1028 | ||
1029 | #define MD_REG_FIRST 64 | |
1030 | #define MD_REG_LAST 65 | |
1031 | #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1) | |
1032 | ||
1033 | #define ST_REG_FIRST 66 | |
1034 | #define ST_REG_LAST 66 | |
1035 | #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1) | |
1036 | ||
1037 | #define AT_REGNUM (GP_REG_FIRST + 1) | |
1038 | #define HI_REGNUM (MD_REG_FIRST + 0) | |
1039 | #define LO_REGNUM (MD_REG_FIRST + 1) | |
1040 | #define FPSW_REGNUM ST_REG_FIRST | |
1041 | ||
1042 | #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM) | |
1043 | #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM) | |
1044 | #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM) | |
1045 | #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST) | |
1046 | ||
1047 | #define FP_CALL_REG_P(REGNO) \ | |
1048 | (FP_REG_P (REGNO) \ | |
1049 | || (REGNO) == (4 + GP_REG_FIRST) \ | |
1050 | || (REGNO) == (6 + GP_REG_FIRST)) | |
1051 | ||
1052 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
1053 | to hold something of mode MODE. | |
1054 | This is ordinarily the length in words of a value of mode MODE | |
1055 | but can be less for certain modes in special long registers. | |
1056 | ||
1057 | On the MIPS, all general registers are one word long. Except on | |
1058 | the R4000 with the FR bit set, the floating point uses register | |
1059 | pairs, with the second register not being allocatable. */ | |
1060 | ||
1061 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
1062 | (! FP_REG_P (REGNO) \ | |
1063 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \ | |
1064 | : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \ | |
1065 | << (TARGET_FLOAT64 == 0))) | |
1066 | ||
1067 | /* Value is 1 if hard register REGNO can hold a value of machine-mode | |
1068 | MODE. Require that DImode and DFmode be in even registers. For | |
1069 | DImode, this makes some of the insns easier to write, since you | |
1070 | don't have to worry about a DImode value in registers 3 & 4, | |
1071 | producing a result in 4 & 5. | |
1072 | ||
1073 | To make the code simpler HARD_REGNO_MODE_OK now just references an | |
1074 | array built in override_options. Because machmodes.h is not yet | |
1075 | included before this file is processed, the MODE bound can't be | |
1076 | expressed here. */ | |
1077 | ||
1078 | extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER]; | |
1079 | ||
1080 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
1081 | mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ] | |
1082 | ||
1083 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
1084 | when one has mode MODE1 and one has mode MODE2. | |
1085 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
1086 | for any hard reg, then this must be 0 for correct output. */ | |
1087 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
1088 | ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \ | |
1089 | GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ | |
1090 | == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \ | |
1091 | GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) | |
1092 | ||
1093 | /* MIPS pc is not overloaded on a register. */ | |
1094 | /* #define PC_REGNUM xx */ | |
1095 | ||
1096 | /* Register to use for pushing function arguments. */ | |
1097 | #define STACK_POINTER_REGNUM 29 | |
1098 | ||
1099 | /* Offset from the stack pointer to the first available location. */ | |
1100 | #define STACK_POINTER_OFFSET 0 | |
1101 | ||
1102 | /* Base register for access to local variables of the function. */ | |
1103 | #define FRAME_POINTER_REGNUM 30 | |
1104 | ||
1105 | /* Value should be nonzero if functions must have frame pointers. | |
1106 | Zero means the frame pointer need not be set up (and parms | |
1107 | may be accessed via the stack pointer) in functions that seem suitable. | |
1108 | This is computed in `reload', in reload1.c. */ | |
1109 | #define FRAME_POINTER_REQUIRED (current_function_calls_alloca) | |
1110 | ||
1111 | /* Base register for access to arguments of the function. */ | |
1112 | #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM | |
1113 | ||
1114 | /* Register in which static-chain is passed to a function. */ | |
1115 | #define STATIC_CHAIN_REGNUM 2 | |
1116 | ||
1117 | /* Register in which address to store a structure value | |
1118 | is passed to a function. */ | |
1119 | #define STRUCT_VALUE_REGNUM 4 | |
1120 | ||
1121 | /* Mips registers used in prologue/epilogue code when the stack frame | |
1122 | is larger than 32K bytes. These registers must come from the | |
1123 | scratch register set, and not used for passing and returning | |
1124 | arguments and any other information used in the calling sequence | |
1125 | (such as pic). */ | |
1126 | #define MIPS_TEMP1_REGNUM 8 | |
1127 | #define MIPS_TEMP2_REGNUM 9 | |
1128 | ||
1129 | /* Define this macro if it is as good or better to call a constant | |
1130 | function address than to call an address kept in a register. */ | |
1131 | #define NO_FUNCTION_CSE 1 | |
1132 | ||
1133 | /* Define this macro if it is as good or better for a function to | |
1134 | call itself with an explicit address than to call an address | |
1135 | kept in a register. */ | |
1136 | #define NO_RECURSIVE_FUNCTION_CSE 1 | |
1137 | ||
1138 | /* The register number of the register used to address a table of | |
1139 | static data addresses in memory. In some cases this register is | |
1140 | defined by a processor's "application binary interface" (ABI). | |
1141 | When this macro is defined, RTL is generated for this register | |
1142 | once, as with the stack pointer and frame pointer registers. If | |
1143 | this macro is not defined, it is up to the machine-dependent | |
1144 | files to allocate such a register (if necessary). */ | |
1145 | #define PIC_OFFSET_TABLE_REGNUM 28 | |
1146 | ||
1147 | \f | |
1148 | /* Define the classes of registers for register constraints in the | |
1149 | machine description. Also define ranges of constants. | |
1150 | ||
1151 | One of the classes must always be named ALL_REGS and include all hard regs. | |
1152 | If there is more than one class, another class must be named NO_REGS | |
1153 | and contain no registers. | |
1154 | ||
1155 | The name GENERAL_REGS must be the name of a class (or an alias for | |
1156 | another name such as ALL_REGS). This is the class of registers | |
1157 | that is allowed by "g" or "r" in a register constraint. | |
1158 | Also, registers outside this class are allocated only when | |
1159 | instructions express preferences for them. | |
1160 | ||
1161 | The classes must be numbered in nondecreasing order; that is, | |
1162 | a larger-numbered class must never be contained completely | |
1163 | in a smaller-numbered class. | |
1164 | ||
1165 | For any two classes, it is very desirable that there be another | |
1166 | class that represents their union. */ | |
1167 | ||
1168 | enum reg_class | |
1169 | { | |
1170 | NO_REGS, /* no registers in set */ | |
1171 | GR_REGS, /* integer registers */ | |
1172 | FP_REGS, /* floating point registers */ | |
1173 | HI_REG, /* hi register */ | |
1174 | LO_REG, /* lo register */ | |
1175 | MD_REGS, /* multiply/divide registers (hi/lo) */ | |
1176 | ST_REGS, /* status registers (fp status) */ | |
1177 | ALL_REGS, /* all registers */ | |
1178 | LIM_REG_CLASSES /* max value + 1 */ | |
1179 | }; | |
1180 | ||
1181 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
1182 | ||
1183 | #define GENERAL_REGS GR_REGS | |
1184 | ||
1185 | /* An initializer containing the names of the register classes as C | |
1186 | string constants. These names are used in writing some of the | |
1187 | debugging dumps. */ | |
1188 | ||
1189 | #define REG_CLASS_NAMES \ | |
1190 | { \ | |
1191 | "NO_REGS", \ | |
1192 | "GR_REGS", \ | |
1193 | "FP_REGS", \ | |
1194 | "HI_REG", \ | |
1195 | "LO_REG", \ | |
1196 | "MD_REGS", \ | |
1197 | "ST_REGS", \ | |
1198 | "ALL_REGS" \ | |
1199 | } | |
1200 | ||
1201 | /* An initializer containing the contents of the register classes, | |
1202 | as integers which are bit masks. The Nth integer specifies the | |
1203 | contents of class N. The way the integer MASK is interpreted is | |
1204 | that register R is in the class if `MASK & (1 << R)' is 1. | |
1205 | ||
1206 | When the machine has more than 32 registers, an integer does not | |
1207 | suffice. Then the integers are replaced by sub-initializers, | |
1208 | braced groupings containing several integers. Each | |
1209 | sub-initializer must be suitable as an initializer for the type | |
1210 | `HARD_REG_SET' which is defined in `hard-reg-set.h'. */ | |
1211 | ||
1212 | #define REG_CLASS_CONTENTS \ | |
1213 | { \ | |
1214 | { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \ | |
1215 | { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \ | |
1216 | { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \ | |
1217 | { 0x00000000, 0x00000000, 0x00000001 }, /* lo register */ \ | |
1218 | { 0x00000000, 0x00000000, 0x00000002 }, /* hi register */ \ | |
1219 | { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \ | |
1220 | { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \ | |
1221 | { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \ | |
1222 | } | |
1223 | ||
1224 | ||
1225 | /* A C expression whose value is a register class containing hard | |
1226 | register REGNO. In general there is more that one such class; | |
1227 | choose a class which is "minimal", meaning that no smaller class | |
1228 | also contains the register. */ | |
1229 | ||
1230 | extern enum reg_class mips_regno_to_class[]; | |
1231 | ||
1232 | #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ] | |
1233 | ||
1234 | /* A macro whose definition is the name of the class to which a | |
1235 | valid base register must belong. A base register is one used in | |
1236 | an address which is the register value plus a displacement. */ | |
1237 | ||
1238 | #define BASE_REG_CLASS GR_REGS | |
1239 | ||
1240 | /* A macro whose definition is the name of the class to which a | |
1241 | valid index register must belong. An index register is one used | |
1242 | in an address where its value is either multiplied by a scale | |
1243 | factor or added to another register (as well as added to a | |
1244 | displacement). */ | |
1245 | ||
1246 | #define INDEX_REG_CLASS GR_REGS | |
1247 | ||
1248 | ||
1249 | /* REGISTER AND CONSTANT CLASSES */ | |
1250 | ||
1251 | /* Get reg_class from a letter such as appears in the machine | |
1252 | description. | |
1253 | ||
1254 | DEFINED REGISTER CLASSES: | |
1255 | ||
1256 | 'd' General (aka integer) registers | |
1257 | 'f' Floating point registers | |
1258 | 'h' Hi register | |
1259 | 'l' Lo register | |
1260 | 's' Status registers | |
1261 | 'x' Multiply/divide registers */ | |
1262 | ||
1263 | extern enum reg_class mips_char_to_class[]; | |
1264 | ||
1265 | #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ] | |
1266 | ||
1267 | /* The letters I, J, K, L, M, N, O, and P in a register constraint | |
1268 | string can be used to stand for particular ranges of immediate | |
1269 | operands. This macro defines what the ranges are. C is the | |
1270 | letter, and VALUE is a constant value. Return 1 if VALUE is | |
1271 | in the range specified by C. */ | |
1272 | ||
1273 | /* For MIPS: | |
1274 | ||
1275 | `I' is used for the range of constants an arithmetic insn can | |
1276 | actually contain (16 bits signed integers). | |
1277 | ||
1278 | `J' is used for the range which is just zero (ie, $r0). | |
1279 | ||
1280 | `K' is used for the range of constants a logical insn can actually | |
1281 | contain (16 bit zero-extended integers). | |
1282 | ||
1283 | `L' is used for the range of constants that be loaded with lui | |
1284 | (ie, the bottom 16 bits are zero). | |
1285 | ||
1286 | `M' is used for the range of constants that take two words to load | |
1287 | (ie, not matched by `I', `K', and `L'). | |
1288 | ||
1289 | `N' is used for negative 16 bit constants. | |
1290 | ||
1291 | `O' is an exact power of 2 (not yet used in the md file). | |
1292 | ||
1293 | `P' is used for positive 16 bit constants. */ | |
1294 | ||
1295 | #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000) | |
1296 | #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000) | |
1297 | ||
1298 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
1299 | ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \ | |
1300 | : (C) == 'J' ? ((VALUE) == 0) \ | |
1301 | : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \ | |
1302 | : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \ | |
1303 | : (C) == 'M' ? ((((VALUE) & 0xffff0000) != 0) \ | |
1304 | && (((VALUE) & 0xffff0000) != 0xffff0000) \ | |
1305 | && ((VALUE) & 0x0000ffff) != 0) \ | |
1306 | : (C) == 'N' ? (((VALUE) & 0xffff0000) == 0xffff0000) \ | |
1307 | : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \ | |
1308 | : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & 0xffff0000) == 0)) \ | |
1309 | : 0) | |
1310 | ||
1311 | /* Similar, but for floating constants, and defining letters G and H. | |
1312 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
1313 | ||
1314 | /* For Mips | |
1315 | ||
1316 | 'G' : Floating point 0 */ | |
1317 | ||
1318 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
1319 | ((C) == 'G' \ | |
1320 | && CONST_DOUBLE_HIGH (VALUE) == 0 \ | |
1321 | && CONST_DOUBLE_LOW (VALUE) == 0) | |
1322 | ||
1323 | /* Letters in the range `Q' through `U' may be defined in a | |
1324 | machine-dependent fashion to stand for arbitrary operand types. | |
1325 | The machine description macro `EXTRA_CONSTRAINT' is passed the | |
1326 | operand as its first argument and the constraint letter as its | |
1327 | second operand. | |
1328 | ||
1329 | `Q' is for memory refereces using take more than 1 instruction. | |
1330 | `R' is for memory refereces which take 1 word for the instruction. | |
1331 | `S' is for references to extern items which are PIC for OSF/rose. */ | |
1332 | ||
1333 | #define EXTRA_CONSTRAINT(OP,CODE) \ | |
1334 | ((GET_CODE (OP) != MEM) ? FALSE \ | |
1335 | : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \ | |
1336 | : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \ | |
1337 | : ((CODE) == 'S') ? (flag_half_pic && CONSTANT_P (OP) \ | |
1338 | && !mips_constant_address_p (OP)) \ | |
1339 | : FALSE) | |
1340 | ||
1341 | /* Given an rtx X being reloaded into a reg required to be | |
1342 | in class CLASS, return the class of reg to actually use. | |
1343 | In general this is just CLASS; but on some machines | |
1344 | in some cases it is preferable to use a more restrictive class. */ | |
1345 | ||
1346 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
1347 | ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ | |
1348 | || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \ | |
1349 | ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \ | |
1350 | : ((GET_MODE (X) == VOIDmode) \ | |
1351 | ? GR_REGS \ | |
1352 | : CLASS)) | |
1353 | ||
1354 | /* Return the maximum number of consecutive registers | |
1355 | needed to represent mode MODE in a register of class CLASS. */ | |
1356 | ||
1357 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
1358 | ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \ | |
1359 | : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 : 1) \ | |
1360 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
1361 | ||
1362 | /* If defined, this is a C expression whose value should be | |
1363 | nonzero if the insn INSN has the effect of mysteriously | |
1364 | clobbering the contents of hard register number REGNO. By | |
1365 | "mysterious" we mean that the insn's RTL expression doesn't | |
1366 | describe such an effect. | |
1367 | ||
1368 | If this macro is not defined, it means that no insn clobbers | |
1369 | registers mysteriously. This is the usual situation; all else | |
1370 | being equal, it is best for the RTL expression to show all the | |
1371 | activity. */ | |
1372 | ||
1373 | /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */ | |
1374 | ||
1375 | \f | |
1376 | /* Stack layout; function entry, exit and calling. */ | |
1377 | ||
1378 | /* Define this if pushing a word on the stack | |
1379 | makes the stack pointer a smaller address. */ | |
1380 | #define STACK_GROWS_DOWNWARD | |
1381 | ||
1382 | /* Define this if the nominal address of the stack frame | |
1383 | is at the high-address end of the local variables; | |
1384 | that is, each additional local variable allocated | |
1385 | goes at a more negative offset in the frame. */ | |
1386 | #define FRAME_GROWS_DOWNWARD | |
1387 | ||
1388 | /* Offset within stack frame to start allocating local variables at. | |
1389 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
1390 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
1391 | of the first local allocated. */ | |
1392 | #define STARTING_FRAME_OFFSET (-8) | |
1393 | ||
1394 | /* Structure to be filled in by compute_frame_size with register | |
1395 | save masks, and offsets for the current function. */ | |
1396 | ||
1397 | struct mips_frame_info | |
1398 | { | |
1399 | unsigned long total_size; /* # bytes that the entire frame takes up */ | |
1400 | unsigned long var_size; /* # bytes that variables take up */ | |
1401 | unsigned long args_size; /* # bytes that outgoing arguments take up */ | |
1402 | unsigned long extra_size; /* # bytes of extra gunk */ | |
1403 | unsigned int gp_reg_size; /* # bytes needed to store gp regs */ | |
1404 | unsigned int fp_reg_size; /* # bytes needed to store fp regs */ | |
1405 | unsigned long mask; /* mask of saved gp registers */ | |
1406 | unsigned long fmask; /* mask of saved fp registers */ | |
1407 | long gp_save_offset; /* offset from vfp to store gp registers */ | |
1408 | long fp_save_offset; /* offset from vfp to store fp registers */ | |
1409 | unsigned long gp_sp_offset; /* offset from new sp to store gp registers */ | |
1410 | unsigned long fp_sp_offset; /* offset from new sp to store fp registers */ | |
1411 | int initialized; /* != 0 if frame size already calculated */ | |
1412 | }; | |
1413 | ||
1414 | extern struct mips_frame_info current_frame_info; | |
1415 | ||
1416 | /* Store in the variable DEPTH the initial difference between the | |
1417 | frame pointer reg contents and the stack pointer reg contents, | |
1418 | as of the start of the function body. This depends on the layout | |
1419 | of the fixed parts of the stack frame and on how registers are saved. */ | |
1420 | ||
1421 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
1422 | ((VAR) = (current_frame_info.initialized) \ | |
1423 | ? current_frame_info.total_size \ | |
1424 | : compute_frame_size (get_frame_size ())) | |
1425 | ||
1426 | /* If we generate an insn to push BYTES bytes, | |
1427 | this says how many the stack pointer really advances by. | |
1428 | On the vax, sp@- in a byte insn really pushes a word. */ | |
1429 | ||
1430 | /* #define PUSH_ROUNDING(BYTES) 0 */ | |
1431 | ||
1432 | /* If defined, the maximum amount of space required for outgoing | |
1433 | arguments will be computed and placed into the variable | |
1434 | `current_function_outgoing_args_size'. No space will be pushed | |
1435 | onto the stack for each call; instead, the function prologue | |
1436 | should increase the stack frame size by this amount. | |
1437 | ||
1438 | It is not proper to define both `PUSH_ROUNDING' and | |
1439 | `ACCUMULATE_OUTGOING_ARGS'. */ | |
1440 | #define ACCUMULATE_OUTGOING_ARGS | |
1441 | ||
1442 | /* Offset of first parameter from the argument pointer register value. */ | |
1443 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
1444 | ||
1445 | /* Offset from top-of-stack address to location to store the | |
1446 | function parameter if it can't go in a register. | |
1447 | Addresses for following parameters are computed relative to this one. | |
1448 | ||
1449 | It also has the effect of counting register arguments in the total | |
1450 | argument size. */ | |
1451 | #define FIRST_PARM_CALLER_OFFSET(FNDECL) 0 | |
1452 | ||
1453 | /* When a parameter is passed in a register, stack space is still | |
1454 | allocated for it. For the MIPS, stack space must be allocated, cf | |
1455 | Asm Lang Prog Guide page 7-8. | |
1456 | ||
1457 | BEWARE that some space is also allocated for non existing arguments | |
1458 | in register. In case an argument list is of form GF used registers | |
1459 | are a0 (a2,a3), but we should push over a1... */ | |
1460 | ||
1461 | #define REG_PARM_STACK_SPACE(FNDECL) (4*4) | |
1462 | ||
1463 | /* Define this if it is the responsibility of the caller to | |
1464 | allocate the area reserved for arguments passed in registers. | |
1465 | If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect | |
1466 | of this macro is to determine whether the space is included in | |
1467 | `current_function_outgoing_args_size'. */ | |
1468 | #define OUTGOING_REG_PARM_STACK_SPACE | |
1469 | ||
1470 | /* Align stack frames on 64 bits (Double Word ). */ | |
1471 | #define STACK_BOUNDARY 64 | |
1472 | ||
1473 | /* Make sure 16 bytes are always allocated on the stack. */ | |
1474 | ||
1475 | #ifndef STACK_ARGS_ADJUST | |
1476 | #define STACK_ARGS_ADJUST(SIZE) \ | |
1477 | { \ | |
1478 | if (SIZE.constant < 16) \ | |
1479 | SIZE.constant = 16; \ | |
1480 | } | |
1481 | #endif | |
1482 | ||
1483 | \f | |
1484 | /* A C expression that should indicate the number of bytes of its | |
1485 | own arguments that a function function pops on returning, or 0 | |
1486 | if the function pops no arguments and the caller must therefore | |
1487 | pop them all after the function returns. | |
1488 | ||
1489 | FUNTYPE is a C variable whose value is a tree node that | |
1490 | describes the function in question. Normally it is a node of | |
1491 | type `FUNCTION_TYPE' that describes the data type of the function. | |
1492 | From this it is possible to obtain the data types of the value | |
1493 | and arguments (if known). | |
1494 | ||
1495 | When a call to a library function is being considered, FUNTYPE | |
1496 | will contain an identifier node for the library function. Thus, | |
1497 | if you need to distinguish among various library functions, you | |
1498 | can do so by their names. Note that "library function" in this | |
1499 | context means a function used to perform arithmetic, whose name | |
1500 | is known specially in the compiler and was not mentioned in the | |
1501 | C code being compiled. | |
1502 | ||
1503 | STACK-SIZE is the number of bytes of arguments passed on the | |
1504 | stack. If a variable number of bytes is passed, it is zero, and | |
1505 | argument popping will always be the responsibility of the | |
1506 | calling function. */ | |
1507 | ||
1508 | #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0 | |
1509 | ||
1510 | ||
1511 | /* Symbolic macros for the registers used to return integer and floating | |
1512 | point values. */ | |
1513 | ||
1514 | #define GP_RETURN (GP_REG_FIRST + 2) | |
1515 | #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0)) | |
1516 | ||
1517 | /* Symbolic macros for the first/last argument registers. */ | |
1518 | ||
1519 | #define GP_ARG_FIRST (GP_REG_FIRST + 4) | |
1520 | #define GP_ARG_LAST (GP_REG_FIRST + 7) | |
1521 | #define FP_ARG_FIRST (FP_REG_FIRST + 12) | |
1522 | #define FP_ARG_LAST (FP_REG_FIRST + 15) | |
1523 | ||
1524 | #define MAX_ARGS_IN_REGISTERS 4 | |
1525 | ||
1526 | /* Define how to find the value returned by a library function | |
1527 | assuming the value has mode MODE. */ | |
1528 | ||
1529 | #define LIBCALL_VALUE(MODE) \ | |
1530 | gen_rtx (REG, MODE, \ | |
1531 | (GET_MODE_CLASS (MODE) == MODE_FLOAT) \ | |
1532 | ? FP_RETURN \ | |
1533 | : GP_RETURN) | |
1534 | ||
1535 | /* Define how to find the value returned by a function. | |
1536 | VALTYPE is the data type of the value (as a tree). | |
1537 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
1538 | otherwise, FUNC is 0. */ | |
1539 | ||
1540 | #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) | |
1541 | ||
1542 | ||
1543 | /* 1 if N is a possible register number for a function value. | |
1544 | On the MIPS, R2 R3 and F0 F2 are the only register thus used. | |
1545 | Currently, R2 and F0 are only implemented here (C has no complex type) */ | |
1546 | ||
1547 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) | |
1548 | ||
1549 | /* 1 if N is a possible register number for function argument passing. */ | |
1550 | ||
1551 | #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \ | |
1552 | || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \ | |
1553 | && (0 == (N) % 2))) | |
1554 | ||
1555 | /* A C expression which can inhibit the returning of certain function | |
1556 | values in registers, based on the type of value. A nonzero value says | |
1557 | to return the function value in memory, just as large structures are | |
1558 | always returned. Here TYPE will be a C expression of type | |
1559 | `tree', representing the data type of the value. | |
1560 | ||
1561 | Note that values of mode `BLKmode' are returned in memory | |
1562 | regardless of this macro. Also, the option `-fpcc-struct-return' | |
1563 | takes effect regardless of this macro. On most systems, it is | |
1564 | possible to leave the macro undefined; this causes a default | |
1565 | definition to be used, whose value is the constant 0. | |
1566 | ||
1567 | GCC normally converts 1 byte structures into chars, 2 byte | |
1568 | structs into shorts, and 4 byte structs into ints, and returns | |
1569 | them this way. Defining the following macro overrides this, | |
1570 | to give us MIPS cc compatibility. */ | |
1571 | ||
1572 | #define RETURN_IN_MEMORY(TYPE) \ | |
1573 | ((TREE_CODE (TYPE) == RECORD_TYPE) || (TREE_CODE (TYPE) == UNION_TYPE)) | |
1574 | ||
1575 | \f | |
1576 | /* A code distinguishing the floating point format of the target | |
1577 | machine. There are three defined values: IEEE_FLOAT_FORMAT, | |
1578 | VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */ | |
1579 | ||
1580 | #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT | |
1581 | ||
1582 | \f | |
1583 | /* Define a data type for recording info about an argument list | |
1584 | during the scan of that argument list. This data type should | |
1585 | hold all necessary information about the function itself | |
1586 | and about the args processed so far, enough to enable macros | |
1587 | such as FUNCTION_ARG to determine where the next arg should go. | |
1588 | */ | |
1589 | ||
1590 | typedef struct mips_args { | |
1591 | int gp_reg_found; | |
1592 | int arg_number; | |
1593 | int arg_words; | |
1594 | } CUMULATIVE_ARGS; | |
1595 | ||
1596 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1597 | for a call to a function whose data type is FNTYPE. | |
1598 | For a library call, FNTYPE is 0. | |
1599 | ||
1600 | */ | |
1601 | ||
1602 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
1603 | init_cumulative_args (&CUM, FNTYPE, LIBNAME) \ | |
1604 | ||
1605 | /* Update the data in CUM to advance over an argument | |
1606 | of mode MODE and data type TYPE. | |
1607 | (TYPE is null for libcalls where that information may not be available.) */ | |
1608 | ||
1609 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
1610 | function_arg_advance (&CUM, MODE, TYPE, NAMED) | |
1611 | ||
1612 | /* Determine where to put an argument to a function. | |
1613 | Value is zero to push the argument on the stack, | |
1614 | or a hard register in which to store the argument. | |
1615 | ||
1616 | MODE is the argument's machine mode. | |
1617 | TYPE is the data type of the argument (as a tree). | |
1618 | This is null for libcalls where that information may | |
1619 | not be available. | |
1620 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1621 | the preceding args and about the function being called. | |
1622 | NAMED is nonzero if this argument is a named parameter | |
1623 | (otherwise it is an extra parameter matching an ellipsis). */ | |
1624 | ||
1625 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
1626 | function_arg( &CUM, MODE, TYPE, NAMED) | |
1627 | ||
1628 | /* For an arg passed partly in registers and partly in memory, | |
1629 | this is the number of registers used. | |
1630 | For args passed entirely in registers or entirely in memory, zero. */ | |
1631 | ||
1632 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
1633 | function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
1634 | ||
1635 | /* If defined, a C expression that gives the alignment boundary, in | |
1636 | bits, of an argument with the specified mode and type. If it is | |
1637 | not defined, `PARM_BOUNDARY' is used for all arguments. */ | |
1638 | ||
1639 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1640 | (((TYPE) != 0) \ | |
1641 | ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \ | |
1642 | ? PARM_BOUNDARY \ | |
1643 | : TYPE_ALIGN(TYPE)) \ | |
1644 | : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ | |
1645 | ? PARM_BOUNDARY \ | |
1646 | : GET_MODE_ALIGNMENT(MODE))) | |
1647 | ||
1648 | \f | |
1649 | /* This macro generates the assembly code for function entry. | |
1650 | FILE is a stdio stream to output the code to. | |
1651 | SIZE is an int: how many units of temporary storage to allocate. | |
1652 | Refer to the array `regs_ever_live' to determine which registers | |
1653 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1654 | is ever used in the function. This macro is responsible for | |
1655 | knowing which registers should not be saved even if used. */ | |
1656 | ||
1657 | #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE) | |
1658 | ||
1659 | /* This macro generates the assembly code for function exit, | |
1660 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1661 | then individual return instructions are generated for each | |
1662 | return statement. Args are same as for FUNCTION_PROLOGUE. */ | |
1663 | ||
1664 | #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE) | |
1665 | ||
1666 | /* Define the number of delay slots needed for the function epilogue. | |
1667 | ||
1668 | On the mips, we need a slot if either no stack has been allocated, | |
1669 | or the only register saved is the return register. */ | |
1670 | ||
1671 | #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots () | |
1672 | ||
1673 | /* Define whether INSN can be placed in delay slot N for the epilogue. | |
1674 | No references to the stack must be made, since on the MIPS, the | |
1675 | delay slot is done after the stack has been cleaned up. */ | |
1676 | ||
1677 | #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ | |
1678 | (get_attr_dslot (INSN) == DSLOT_NO \ | |
1679 | && get_attr_length (INSN) == 1 \ | |
1680 | && ! reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN)) \ | |
1681 | && ! reg_mentioned_p (frame_pointer_rtx, PATTERN (INSN))) | |
1682 | ||
1683 | /* Tell prologue and epilogue if register REGNO should be saved / restored. */ | |
1684 | ||
1685 | #define MUST_SAVE_REGISTER(regno) \ | |
1686 | ((regs_ever_live[regno] && !call_used_regs[regno]) \ | |
1687 | || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \ | |
1688 | || (regno == 31 && regs_ever_live[31])) | |
1689 | ||
1690 | /* ALIGN FRAMES on double word boundaries */ | |
1691 | ||
1692 | #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & 0xfffffff8) | |
1693 | ||
1694 | \f | |
1695 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
1696 | for profiling a function entry. */ | |
1697 | ||
1698 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
1699 | { \ | |
1700 | fprintf (FILE, "\t.set\tnoreorder\n"); \ | |
1701 | fprintf (FILE, "\t.set\tnoat\n"); \ | |
1702 | fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \ | |
1703 | reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \ | |
1704 | fprintf (FILE, "\tjal\t_mcount\n"); \ | |
1705 | fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \ | |
1706 | reg_names[STACK_POINTER_REGNUM], \ | |
1707 | reg_names[STACK_POINTER_REGNUM]); \ | |
1708 | fprintf (FILE, "\t.set\treorder\n"); \ | |
1709 | fprintf (FILE, "\t.set\tat\n"); \ | |
1710 | } | |
1711 | ||
1712 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1713 | the stack pointer does not matter. The value is tested only in | |
1714 | functions that have frame pointers. | |
1715 | No definition is equivalent to always zero. */ | |
1716 | ||
1717 | #define EXIT_IGNORE_STACK 1 | |
1718 | ||
1719 | \f | |
1720 | /* A C statement to output, on the stream FILE, assembler code for a | |
1721 | block of data that contains the constant parts of a trampoline. | |
1722 | This code should not include a label--the label is taken care of | |
1723 | automatically. */ | |
1724 | ||
1725 | #define TRAMPOLINE_TEMPLATE(STREAM) \ | |
1726 | { \ | |
1727 | fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \ | |
1728 | fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \ | |
1729 | fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \ | |
1730 | fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \ | |
1731 | fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \ | |
1732 | fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \ | |
1733 | fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \ | |
1734 | fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \ | |
1735 | fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \ | |
1736 | } | |
1737 | ||
1738 | /* A C expression for the size in bytes of the trampoline, as an | |
1739 | integer. */ | |
1740 | ||
1741 | #define TRAMPOLINE_SIZE (9*4) | |
1742 | ||
1743 | /* Alignment required for trampolines, in bits. | |
1744 | ||
1745 | If you don't define this macro, the value of `BIGGEST_ALIGNMENT' | |
1746 | is used for aligning trampolines. */ | |
1747 | ||
1748 | /* #define TRAMPOLINE_ALIGNMENT 32 */ | |
1749 | ||
1750 | /* A C statement to initialize the variable parts of a trampoline. | |
1751 | ADDR is an RTX for the address of the trampoline; FNADDR is an | |
1752 | RTX for the address of the nested function; STATIC_CHAIN is an | |
1753 | RTX for the static chain value that should be passed to the | |
1754 | function when it is called. */ | |
1755 | ||
1756 | #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \ | |
1757 | { \ | |
1758 | rtx addr = ADDR; \ | |
1759 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \ | |
1760 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \ | |
1761 | \ | |
1762 | /* Attempt to make stack executable */ \ | |
1763 | emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \ | |
1764 | 0, VOIDmode, 1, addr, Pmode); \ | |
1765 | } | |
1766 | ||
1767 | ||
1768 | /* Attempt to turn on access permissions for the stack. */ | |
1769 | ||
1770 | #define TRANSFER_FROM_TRAMPOLINE \ | |
1771 | \ | |
1772 | void \ | |
1773 | __enable_execute_stack (addr) \ | |
1774 | char *addr; \ | |
1775 | { \ | |
1776 | int size = getpagesize (); \ | |
1777 | int mask = ~(size-1); \ | |
1778 | char *page = (char *) (((int) addr) & mask); \ | |
1779 | char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \ | |
1780 | \ | |
1781 | /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \ | |
1782 | if (mprotect (page, end - page, 7) < 0) \ | |
1783 | perror ("mprotect of trampoline code"); \ | |
1784 | \ | |
1785 | /* \ | |
1786 | if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \ | |
1787 | perror ("cacheflush of trampoline code"); \ | |
1788 | */ \ | |
1789 | } | |
1790 | ||
1791 | \f | |
1792 | /* Addressing modes, and classification of registers for them. */ | |
1793 | ||
1794 | /* #define HAVE_POST_INCREMENT */ | |
1795 | /* #define HAVE_POST_DECREMENT */ | |
1796 | ||
1797 | /* #define HAVE_PRE_DECREMENT */ | |
1798 | /* #define HAVE_PRE_INCREMENT */ | |
1799 | ||
1800 | /* These assume that REGNO is a hard or pseudo reg number. | |
1801 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1802 | or a pseudo reg currently allocated to a suitable hard reg. | |
1803 | These definitions are NOT overridden anywhere. */ | |
1804 | ||
1805 | #define GP_REG_OR_PSEUDO_STRICT_P(regno) \ | |
1806 | GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno]) | |
1807 | ||
1808 | #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \ | |
1809 | (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno))) | |
1810 | ||
1811 | #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno) | |
1812 | #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno) | |
1813 | ||
1814 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1815 | and check its validity for a certain class. | |
1816 | We have two alternate definitions for each of them. | |
1817 | The usual definition accepts all pseudo regs; the other rejects them all. | |
1818 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1819 | ||
1820 | Most source files want to accept pseudo regs in the hope that | |
1821 | they will get allocated to the class that the insn wants them to be in. | |
1822 | Some source files that are used after register allocation | |
1823 | need to be strict. */ | |
1824 | ||
1825 | #ifndef REG_OK_STRICT | |
1826 | ||
1827 | #define REG_OK_STRICT_P 0 | |
1828 | #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X)) | |
1829 | #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X)) | |
1830 | ||
1831 | #else | |
1832 | ||
1833 | #define REG_OK_STRICT_P 1 | |
1834 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1835 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1836 | ||
1837 | #endif | |
1838 | ||
1839 | \f | |
1840 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1841 | ||
1842 | #define MAX_REGS_PER_ADDRESS 1 | |
1843 | ||
1844 | /* A C compound statement with a conditional `goto LABEL;' executed | |
1845 | if X (an RTX) is a legitimate memory address on the target | |
1846 | machine for a memory operand of mode MODE. | |
1847 | ||
1848 | It usually pays to define several simpler macros to serve as | |
1849 | subroutines for this one. Otherwise it may be too complicated | |
1850 | to understand. | |
1851 | ||
1852 | This macro must exist in two variants: a strict variant and a | |
1853 | non-strict one. The strict variant is used in the reload pass. | |
1854 | It must be defined so that any pseudo-register that has not been | |
1855 | allocated a hard register is considered a memory reference. In | |
1856 | contexts where some kind of register is required, a | |
1857 | pseudo-register with no hard register must be rejected. | |
1858 | ||
1859 | The non-strict variant is used in other passes. It must be | |
1860 | defined to accept all pseudo-registers in every context where | |
1861 | some kind of register is required. | |
1862 | ||
1863 | Compiler source files that want to use the strict variant of | |
1864 | this macro define the macro `REG_OK_STRICT'. You should use an | |
1865 | `#ifdef REG_OK_STRICT' conditional to define the strict variant | |
1866 | in that case and the non-strict variant otherwise. | |
1867 | ||
1868 | Typically among the subroutines used to define | |
1869 | `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for | |
1870 | acceptable registers for various purposes (one for base | |
1871 | registers, one for index registers, and so on). Then only these | |
1872 | subroutine macros need have two variants; the higher levels of | |
1873 | macros may be the same whether strict or not. | |
1874 | ||
1875 | Normally, constant addresses which are the sum of a `symbol_ref' | |
1876 | and an integer are stored inside a `const' RTX to mark them as | |
1877 | constant. Therefore, there is no need to recognize such sums | |
1878 | specifically as legitimate addresses. Normally you would simply | |
1879 | recognize any `const' as legitimate. | |
1880 | ||
1881 | Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle | |
1882 | constant sums that are not marked with `const'. It assumes | |
1883 | that a naked `plus' indicates indexing. If so, then you *must* | |
1884 | reject such naked constant sums as illegitimate addresses, so | |
1885 | that none of them will be given to `PRINT_OPERAND_ADDRESS'. | |
1886 | ||
1887 | On some machines, whether a symbolic address is legitimate | |
1888 | depends on the section that the address refers to. On these | |
1889 | machines, define the macro `ENCODE_SECTION_INFO' to store the | |
1890 | information into the `symbol_ref', and then check for it here. | |
1891 | When you see a `const', you will have to look inside it to find | |
1892 | the `symbol_ref' in order to determine the section. */ | |
1893 | ||
1894 | #if 1 | |
1895 | #define GO_PRINTF(x) trace(x) | |
1896 | #define GO_PRINTF2(x,y) trace(x,y) | |
1897 | #define GO_DEBUG_RTX(x) debug_rtx(x) | |
1898 | ||
1899 | #else | |
1900 | #define GO_PRINTF(x) | |
1901 | #define GO_PRINTF2(x,y) | |
1902 | #define GO_DEBUG_RTX(x) | |
1903 | #endif | |
1904 | ||
1905 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1906 | { \ | |
1907 | register rtx xinsn = (X); \ | |
1908 | \ | |
1909 | if (TARGET_DEBUG_B_MODE) \ | |
1910 | { \ | |
1911 | GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \ | |
1912 | (REG_OK_STRICT_P) ? "" : "not "); \ | |
1913 | GO_DEBUG_RTX (xinsn); \ | |
1914 | } \ | |
1915 | \ | |
1916 | if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \ | |
1917 | goto ADDR; \ | |
1918 | \ | |
1919 | if (CONSTANT_ADDRESS_P (xinsn)) \ | |
1920 | goto ADDR; \ | |
1921 | \ | |
1922 | if (GET_CODE (xinsn) == PLUS) \ | |
1923 | { \ | |
1924 | register rtx xplus0 = XEXP (xinsn, 0); \ | |
1925 | register rtx xplus1 = XEXP (xinsn, 1); \ | |
1926 | register enum rtx_code code0 = GET_CODE (xplus0); \ | |
1927 | register enum rtx_code code1 = GET_CODE (xplus1); \ | |
1928 | \ | |
1929 | if (code0 != REG && code1 == REG) \ | |
1930 | { \ | |
1931 | xplus0 = XEXP (xinsn, 1); \ | |
1932 | xplus1 = XEXP (xinsn, 0); \ | |
1933 | code0 = GET_CODE (xplus0); \ | |
1934 | code1 = GET_CODE (xplus1); \ | |
1935 | } \ | |
1936 | \ | |
1937 | if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \ | |
1938 | { \ | |
1939 | if (code1 == CONST_INT) \ | |
1940 | { \ | |
1941 | register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \ | |
1942 | \ | |
1943 | if ((adj_offset <= 0xffff) \ | |
1944 | && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \ | |
1945 | goto ADDR; \ | |
1946 | } \ | |
1947 | \ | |
1948 | /* For some code sequences, you actually get better code by \ | |
1949 | pretending that the MIPS supports an address mode of a \ | |
1950 | constant address + a register, even though the real \ | |
1951 | machine doesn't support it. This is because the \ | |
1952 | assembler can use $r1 to load just the high 16 bits, add \ | |
1953 | in the register, and fold the low 16 bits into the memory \ | |
1954 | reference, wheras the compiler generates a 4 instruction \ | |
1955 | sequence. On the other hand, CSE is not as effective. \ | |
1956 | It would be a win to generate the lui directly, but the \ | |
1957 | MIPS assembler does not have syntax to generate the \ | |
1958 | appropriate relocation. */ \ | |
1959 | \ | |
1960 | else if (!TARGET_DEBUG_A_MODE \ | |
1961 | && code0 == REG \ | |
1962 | && CONSTANT_ADDRESS_P (xplus1)) \ | |
1963 | goto ADDR; \ | |
1964 | } \ | |
1965 | } \ | |
1966 | \ | |
1967 | if (TARGET_DEBUG_B_MODE) \ | |
1968 | GO_PRINTF ("Not a legitimate address\n"); \ | |
1969 | } | |
1970 | ||
1971 | ||
1972 | /* A C expression that is 1 if the RTX X is a constant which is a | |
1973 | valid address. On most machines, this can be defined as | |
1974 | `CONSTANT_P (X)', but a few machines are more restrictive in | |
1975 | which constant addresses are supported. | |
1976 | ||
1977 | `CONSTANT_P' accepts integer-values expressions whose values are | |
1978 | not explicitly known, such as `symbol_ref', `label_ref', and | |
1979 | `high' expressions and `const' arithmetic expressions, in | |
1980 | addition to `const_int' and `const_double' expressions. */ | |
1981 | ||
1982 | #define CONSTANT_ADDRESS_P(X) mips_constant_address_p (X) | |
1983 | ||
1984 | ||
1985 | /* Nonzero if the constant value X is a legitimate general operand. | |
1986 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
1987 | ||
1988 | At present, GAS doesn't understand li.[sd], so don't allow it | |
1989 | to be generated at present. Also, the MIPS assembler does not | |
1990 | grok li.d Infinity. */ | |
1991 | ||
1992 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1993 | (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X))) | |
1994 | ||
1995 | ||
1996 | /* A C compound statement that attempts to replace X with a valid | |
1997 | memory address for an operand of mode MODE. WIN will be a C | |
1998 | statement label elsewhere in the code; the macro definition may | |
1999 | use | |
2000 | ||
2001 | GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); | |
2002 | ||
2003 | to avoid further processing if the address has become legitimate. | |
2004 | ||
2005 | X will always be the result of a call to `break_out_memory_refs', | |
2006 | and OLDX will be the operand that was given to that function to | |
2007 | produce X. | |
2008 | ||
2009 | The code generated by this macro should not alter the | |
2010 | substructure of X. If it transforms X into a more legitimate | |
2011 | form, it should assign X (which will always be a C variable) a | |
2012 | new value. | |
2013 | ||
2014 | It is not necessary for this macro to come up with a legitimate | |
2015 | address. The compiler has standard ways of doing so in all | |
2016 | cases. In fact, it is safe for this macro to do nothing. But | |
2017 | often a machine-dependent strategy can generate better code. */ | |
2018 | ||
2019 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} | |
2020 | ||
2021 | ||
2022 | /* A C statement or compound statement with a conditional `goto | |
2023 | LABEL;' executed if memory address X (an RTX) can have different | |
2024 | meanings depending on the machine mode of the memory reference it | |
2025 | is used for. | |
2026 | ||
2027 | Autoincrement and autodecrement addresses typically have | |
2028 | mode-dependent effects because the amount of the increment or | |
2029 | decrement is the size of the operand being addressed. Some | |
2030 | machines have other mode-dependent addresses. Many RISC machines | |
2031 | have no mode-dependent addresses. | |
2032 | ||
2033 | You may assume that ADDR is a valid address for the machine. */ | |
2034 | ||
2035 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} | |
2036 | ||
2037 | ||
2038 | /* Define this macro if references to a symbol must be treated | |
2039 | differently depending on something about the variable or | |
2040 | function named by the symbol (such as what section it is in). | |
2041 | ||
2042 | The macro definition, if any, is executed immediately after the | |
2043 | rtl for DECL has been created and stored in `DECL_RTL (DECL)'. | |
2044 | The value of the rtl will be a `mem' whose address is a | |
2045 | `symbol_ref'. | |
2046 | ||
2047 | The usual thing for this macro to do is to a flag in the | |
2048 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
2049 | name string in the `symbol_ref' (if one bit is not enough | |
2050 | information). | |
2051 | ||
2052 | The best way to modify the name string is by adding text to the | |
2053 | beginning, with suitable punctuation to prevent any ambiguity. | |
2054 | Allocate the new name in `saveable_obstack'. You will have to | |
2055 | modify `ASM_OUTPUT_LABELREF' to remove and decode the added text | |
2056 | and output the name accordingly. | |
2057 | ||
2058 | You can also check the information stored in the `symbol_ref' in | |
2059 | the definition of `GO_IF_LEGITIMATE_ADDRESS' or | |
2060 | `PRINT_OPERAND_ADDRESS'. */ | |
2061 | ||
2062 | #define ENCODE_SECTION_INFO(DECL) \ | |
2063 | do \ | |
2064 | { \ | |
2065 | if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \ | |
2066 | && TREE_CODE (DECL) == VAR_DECL) \ | |
2067 | { \ | |
2068 | int size = int_size_in_bytes (TREE_TYPE (DECL)); \ | |
2069 | \ | |
2070 | if (size > 0 && size <= mips_section_threshold) \ | |
2071 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ | |
2072 | } \ | |
2073 | \ | |
2074 | else if (flag_half_pic) \ | |
2075 | half_pic_encode_section_info (DECL); \ | |
2076 | } \ | |
2077 | while (0) | |
2078 | ||
2079 | \f | |
2080 | /* Specify the machine mode that this machine uses | |
2081 | for the index in the tablejump instruction. */ | |
2082 | #define CASE_VECTOR_MODE SImode | |
2083 | ||
2084 | /* Define this if the tablejump instruction expects the table | |
2085 | to contain offsets from the address of the table. | |
2086 | Do not define this if the table should contain absolute addresses. */ | |
2087 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
2088 | ||
2089 | /* Specify the tree operation to be used to convert reals to integers. */ | |
2090 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
2091 | ||
2092 | /* This is the kind of divide that is easiest to do in the general case. */ | |
2093 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
2094 | ||
2095 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
2096 | #define DEFAULT_SIGNED_CHAR 1 | |
2097 | ||
2098 | /* Max number of bytes we can move from memory to memory | |
2099 | in one reasonably fast instruction. */ | |
2100 | #define MOVE_MAX 4 | |
2101 | ||
2102 | /* Define this macro as a C expression which is nonzero if | |
2103 | accessing less than a word of memory (i.e. a `char' or a | |
2104 | `short') is no faster than accessing a word of memory, i.e., if | |
2105 | such access require more than one instruction or if there is no | |
2106 | difference in cost between byte and (aligned) word loads. | |
2107 | ||
2108 | On RISC machines, it tends to generate better code to define | |
2109 | this as 1, since it avoids making a QI or HI mode register. */ | |
2110 | #define SLOW_BYTE_ACCESS 1 | |
2111 | ||
2112 | /* We assume that the store-condition-codes instructions store 0 for false | |
2113 | and some other value for true. This is the value stored for true. */ | |
2114 | ||
2115 | #define STORE_FLAG_VALUE 1 | |
2116 | ||
2117 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
2118 | #define SLOW_ZERO_EXTEND | |
2119 | ||
2120 | /* Define if shifts truncate the shift count | |
2121 | which implies one can omit a sign-extension or zero-extension | |
2122 | of a shift count. | |
2123 | ||
2124 | Only 5 bits are used in SLLV and SRLV */ | |
2125 | ||
2126 | #define SHIFT_COUNT_TRUNCATED | |
2127 | ||
2128 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
2129 | is done just by pretending it is already truncated. */ | |
2130 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
2131 | ||
2132 | /* By default, allow $ to be part of an identifier. */ | |
2133 | #define DOLLARS_IN_IDENTIFIERS 1 | |
2134 | ||
2135 | /* Specify the machine mode that pointers have. | |
2136 | After generation of rtl, the compiler makes no further distinction | |
2137 | between pointers and any other objects of this machine mode. */ | |
2138 | #define Pmode SImode | |
2139 | ||
2140 | /* A function address in a call instruction | |
2141 | is a word address (for indexing purposes) | |
2142 | so give the MEM rtx a words's mode. */ | |
2143 | ||
2144 | #define FUNCTION_MODE SImode | |
2145 | ||
2146 | /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and | |
2147 | memset, instead of the BSD functions bcopy and bzero. */ | |
2148 | ||
2149 | #if defined(MIPS_SYSV) || defined(OSF_OS) | |
2150 | #define TARGET_MEM_FUNCTIONS | |
2151 | #endif | |
2152 | ||
2153 | \f | |
2154 | /* A part of a C `switch' statement that describes the relative | |
2155 | costs of constant RTL expressions. It must contain `case' | |
2156 | labels for expression codes `const_int', `const', `symbol_ref', | |
2157 | `label_ref' and `const_double'. Each case must ultimately reach | |
2158 | a `return' statement to return the relative cost of the use of | |
2159 | that kind of constant value in an expression. The cost may | |
2160 | depend on the precise value of the constant, which is available | |
2161 | for examination in X. | |
2162 | ||
2163 | CODE is the expression code--redundant, since it can be obtained | |
2164 | with `GET_CODE (X)'. */ | |
2165 | ||
2166 | #define CONST_COSTS(X,CODE) \ | |
2167 | case CONST_INT: \ | |
2168 | /* Always return 0, since we don't have different sized \ | |
2169 | instructions, hence different costs according to Richard \ | |
2170 | Kenner */ \ | |
2171 | return COSTS_N_INSNS (0); \ | |
2172 | \ | |
2173 | case LABEL_REF: \ | |
2174 | return COSTS_N_INSNS (2); \ | |
2175 | \ | |
2176 | case CONST: \ | |
2177 | { \ | |
2178 | extern rtx eliminate_constant_term (); \ | |
2179 | int offset = 0; \ | |
2180 | rtx symref = eliminate_constant_term (X, &offset); \ | |
2181 | \ | |
2182 | if (GET_CODE (symref) == LABEL_REF) \ | |
2183 | return COSTS_N_INSNS (2); \ | |
2184 | \ | |
2185 | if (GET_CODE (symref) != SYMBOL_REF) \ | |
2186 | return COSTS_N_INSNS (4); \ | |
2187 | \ | |
2188 | /* let's be paranoid.... */ \ | |
2189 | if (offset < -32768 || offset > 32767) \ | |
2190 | return COSTS_N_INSNS (2); \ | |
2191 | \ | |
2192 | return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \ | |
2193 | } \ | |
2194 | \ | |
2195 | case SYMBOL_REF: \ | |
2196 | return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \ | |
2197 | \ | |
2198 | case CONST_DOUBLE: \ | |
2199 | return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \ | |
2200 | && CONST_DOUBLE_LOW (X)) ? 2 : 4); | |
2201 | ||
2202 | ||
2203 | /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. | |
2204 | This can be used, for example, to indicate how costly a multiply | |
2205 | instruction is. In writing this macro, you can use the construct | |
2206 | `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions. | |
2207 | ||
2208 | This macro is optional; do not define it if the default cost | |
2209 | assumptions are adequate for the target machine. | |
2210 | ||
2211 | If -mdebugd is used, change the multiply cost to 2, so multiply by | |
2212 | a constant isn't converted to a series of shifts. This helps | |
2213 | strength reduction, and also makes it easier to identify what the | |
2214 | compiler is doing. */ | |
2215 | ||
2216 | #define RTX_COSTS(X,CODE) \ | |
2217 | case MEM: \ | |
2218 | { \ | |
2219 | int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \ | |
2220 | if (simple_memory_operand (X, GET_MODE (X))) \ | |
2221 | return COSTS_N_INSNS (num_words); \ | |
2222 | \ | |
2223 | return COSTS_N_INSNS (2*num_words); \ | |
2224 | } \ | |
2225 | \ | |
2226 | case FFS: \ | |
2227 | return COSTS_N_INSNS (6); \ | |
2228 | \ | |
2229 | case NOT: \ | |
2230 | return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \ | |
2231 | \ | |
2232 | case AND: \ | |
2233 | case IOR: \ | |
2234 | case XOR: \ | |
2235 | if (GET_MODE (X) == DImode) \ | |
2236 | return COSTS_N_INSNS (2); \ | |
2237 | \ | |
2238 | if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
2239 | { \ | |
2240 | rtx number = XEXP (X, 1); \ | |
2241 | if (SMALL_INT_UNSIGNED (number)) \ | |
2242 | return COSTS_N_INSNS (1); \ | |
2243 | \ | |
2244 | else if (SMALL_INT (number)) \ | |
2245 | return COSTS_N_INSNS (2); \ | |
2246 | \ | |
2247 | return COSTS_N_INSNS (3); \ | |
2248 | } \ | |
2249 | \ | |
2250 | return COSTS_N_INSNS (1); \ | |
2251 | \ | |
2252 | case ASHIFT: \ | |
2253 | case ASHIFTRT: \ | |
2254 | case LSHIFT: \ | |
2255 | case LSHIFTRT: \ | |
2256 | if (GET_MODE (X) == DImode) \ | |
2257 | return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \ | |
2258 | \ | |
2259 | return COSTS_N_INSNS (1); \ | |
2260 | \ | |
2261 | case ABS: \ | |
2262 | { \ | |
2263 | enum machine_mode xmode = GET_MODE (X); \ | |
2264 | if (xmode == SFmode || xmode == DFmode) \ | |
2265 | return COSTS_N_INSNS (1); \ | |
2266 | \ | |
2267 | return COSTS_N_INSNS (4); \ | |
2268 | } \ | |
2269 | \ | |
2270 | case PLUS: \ | |
2271 | case MINUS: \ | |
2272 | { \ | |
2273 | enum machine_mode xmode = GET_MODE (X); \ | |
2274 | if (xmode == SFmode || xmode == DFmode) \ | |
2275 | return COSTS_N_INSNS (2); \ | |
2276 | \ | |
2277 | if (xmode == DImode) \ | |
2278 | return COSTS_N_INSNS (4); \ | |
2279 | \ | |
2280 | return COSTS_N_INSNS (1); \ | |
2281 | } \ | |
2282 | \ | |
2283 | case NEG: \ | |
2284 | return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \ | |
2285 | \ | |
2286 | case MULT: \ | |
2287 | { \ | |
2288 | enum machine_mode xmode = GET_MODE (X); \ | |
2289 | if (xmode == SFmode) \ | |
2290 | return COSTS_N_INSNS (4); \ | |
2291 | \ | |
2292 | if (xmode == DFmode) \ | |
2293 | return COSTS_N_INSNS (5); \ | |
2294 | \ | |
2295 | return COSTS_N_INSNS ((TARGET_DEBUG_D_MODE) ? 2 : 12); \ | |
2296 | } \ | |
2297 | \ | |
2298 | case DIV: \ | |
2299 | case MOD: \ | |
2300 | { \ | |
2301 | enum machine_mode xmode = GET_MODE (X); \ | |
2302 | if (xmode == SFmode) \ | |
2303 | return COSTS_N_INSNS (12); \ | |
2304 | \ | |
2305 | if (xmode == DFmode) \ | |
2306 | return COSTS_N_INSNS (19); \ | |
2307 | } \ | |
2308 | /* fall through */ \ | |
2309 | \ | |
2310 | case UDIV: \ | |
2311 | case UMOD: \ | |
2312 | return COSTS_N_INSNS (35); | |
2313 | ||
2314 | /* An expression giving the cost of an addressing mode that | |
2315 | contains ADDRESS. If not defined, the cost is computed from the | |
2316 | form of the ADDRESS expression and the `CONST_COSTS' values. | |
2317 | ||
2318 | For most CISC machines, the default cost is a good approximation | |
2319 | of the true cost of the addressing mode. However, on RISC | |
2320 | machines, all instructions normally have the same length and | |
2321 | execution time. Hence all addresses will have equal costs. | |
2322 | ||
2323 | In cases where more than one form of an address is known, the | |
2324 | form with the lowest cost will be used. If multiple forms have | |
2325 | the same, lowest, cost, the one that is the most complex will be | |
2326 | used. | |
2327 | ||
2328 | For example, suppose an address that is equal to the sum of a | |
2329 | register and a constant is used twice in the same basic block. | |
2330 | When this macro is not defined, the address will be computed in | |
2331 | a register and memory references will be indirect through that | |
2332 | register. On machines where the cost of the addressing mode | |
2333 | containing the sum is no higher than that of a simple indirect | |
2334 | reference, this will produce an additional instruction and | |
2335 | possibly require an additional register. Proper specification | |
2336 | of this macro eliminates this overhead for such machines. | |
2337 | ||
2338 | Similar use of this macro is made in strength reduction of loops. | |
2339 | ||
2340 | ADDRESS need not be valid as an address. In such a case, the | |
2341 | cost is not relevant and can be any value; invalid addresses | |
2342 | need not be assigned a different cost. | |
2343 | ||
2344 | On machines where an address involving more than one register is | |
2345 | as cheap as an address computation involving only one register, | |
2346 | defining `ADDRESS_COST' to reflect this can cause two registers | |
2347 | to be live over a region of code where only one would have been | |
2348 | if `ADDRESS_COST' were not defined in that manner. This effect | |
2349 | should be considered in the definition of this macro. | |
2350 | Equivalent costs should probably only be given to addresses with | |
2351 | different numbers of registers on machines with lots of registers. | |
2352 | ||
2353 | This macro will normally either not be defined or be defined as | |
2354 | a constant. */ | |
2355 | ||
2356 | #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR)) | |
2357 | ||
2358 | /* A C expression for the cost of moving data from a register in | |
2359 | class FROM to one in class TO. The classes are expressed using | |
2360 | the enumeration values such as `GENERAL_REGS'. A value of 2 is | |
2361 | the default; other values are interpreted relative to that. | |
2362 | ||
2363 | It is not required that the cost always equal 2 when FROM is the | |
2364 | same as TO; on some machines it is expensive to move between | |
2365 | registers if they are not general registers. | |
2366 | ||
2367 | If reload sees an insn consisting of a single `set' between two | |
2368 | hard registers, and if `REGISTER_MOVE_COST' applied to their | |
2369 | classes returns a value of 2, reload does not check to ensure | |
2370 | that the constraints of the insn are met. Setting a cost of | |
2371 | other than 2 will allow reload to verify that the constraints are | |
2372 | met. You should do this if the `movM' pattern's constraints do | |
2373 | not allow such copying. */ | |
2374 | ||
2375 | #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */ | |
2376 | ||
2377 | /* A C expression for the cost of a branch instruction. A value of | |
2378 | 1 is the default; other values are interpreted relative to that. */ | |
2379 | ||
2380 | #define BRANCH_COST \ | |
2381 | ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1) | |
2382 | ||
2383 | \f | |
2384 | /* Used in by the peephole code. */ | |
2385 | #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ]) | |
2386 | #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0) | |
2387 | #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0) | |
2388 | #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0) | |
2389 | ||
2390 | #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */ | |
2391 | #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */ | |
2392 | #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */ | |
2393 | #define CLASS_CMP_OP 0x08 /* operator is comparison */ | |
2394 | #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */ | |
2395 | #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */ | |
2396 | ||
2397 | #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP) | |
2398 | ||
2399 | \f | |
2400 | /* Optionally define this if you have added predicates to | |
2401 | `MACHINE.c'. This macro is called within an initializer of an | |
2402 | array of structures. The first field in the structure is the | |
2403 | name of a predicate and the second field is an arrary of rtl | |
2404 | codes. For each predicate, list all rtl codes that can be in | |
2405 | expressions matched by the predicate. The list should have a | |
2406 | trailing comma. Here is an example of two entries in the list | |
2407 | for a typical RISC machine: | |
2408 | ||
2409 | #define PREDICATE_CODES \ | |
2410 | {"gen_reg_rtx_operand", {SUBREG, REG}}, \ | |
2411 | {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}}, | |
2412 | ||
2413 | Defining this macro does not affect the generated code (however, | |
2414 | incorrect definitions that omit an rtl code that may be matched | |
2415 | by the predicate can cause the compiler to malfunction). | |
2416 | Instead, it allows the table built by `genrecog' to be more | |
2417 | compact and efficient, thus speeding up the compiler. The most | |
2418 | important predicates to include in the list specified by this | |
2419 | macro are thoses used in the most insn patterns. */ | |
2420 | ||
2421 | #define PREDICATE_CODES \ | |
2422 | {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \ | |
2423 | {"arith_operand", { REG, CONST_INT, SUBREG }}, \ | |
2424 | {"arith32_operand", { REG, CONST_INT, SUBREG }}, \ | |
2425 | {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \ | |
2426 | {"small_int", { CONST_INT }}, \ | |
2427 | {"large_int", { CONST_INT }}, \ | |
2428 | {"md_register_operand", { REG }}, \ | |
2429 | {"mips_const_double_ok", { CONST_DOUBLE }}, \ | |
2430 | {"simple_memory_operand", { MEM, SUBREG }}, \ | |
2431 | {"call_memory_operand", { MEM, SUBREG }}, \ | |
2432 | {"equality_op", { EQ, NE }}, \ | |
2433 | {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ | |
2434 | LTU, LEU }}, \ | |
2435 | {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ | |
2436 | LTU, LEU }}, \ | |
2437 | {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \ | |
2438 | {"uns_cmp_op", { GTU, GEU, LTU, LEU }}, | |
2439 | ||
2440 | \f | |
2441 | /* If defined, a C statement to be executed just prior to the | |
2442 | output of assembler code for INSN, to modify the extracted | |
2443 | operands so they will be output differently. | |
2444 | ||
2445 | Here the argument OPVEC is the vector containing the operands | |
2446 | extracted from INSN, and NOPERANDS is the number of elements of | |
2447 | the vector which contain meaningful data for this insn. The | |
2448 | contents of this vector are what will be used to convert the | |
2449 | insn template into assembler code, so you can change the | |
2450 | assembler output by changing the contents of the vector. | |
2451 | ||
2452 | We use it to check if the current insn needs a nop in front of it | |
2453 | because of load delays, and also to update the delay slot | |
2454 | statistics. */ | |
2455 | ||
2456 | #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ | |
2457 | do \ | |
2458 | { \ | |
2459 | if (dslots_number_nops > 0 && mips_load_reg != (rtx)0) \ | |
2460 | { \ | |
2461 | enum machine_mode mode = GET_MODE (mips_load_reg); \ | |
2462 | rtx pattern = PATTERN (INSN); \ | |
2463 | \ | |
2464 | if (reg_mentioned_p (mips_load_reg, pattern) \ | |
2465 | || (mips_load_reg2 != (rtx)0 \ | |
2466 | && reg_mentioned_p (mips_load_reg2, pattern)) \ | |
2467 | || (mips_load_reg3 != (rtx)0 \ | |
2468 | && reg_mentioned_p (mips_load_reg3, pattern)) \ | |
2469 | || (mips_load_reg4 != (rtx)0 \ | |
2470 | && reg_mentioned_p (mips_load_reg4, pattern)) \ | |
2471 | || get_attr_length (INSN) == 0) \ | |
2472 | { \ | |
2473 | fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \ | |
2474 | } \ | |
2475 | else \ | |
2476 | dslots_load_filled++; \ | |
2477 | \ | |
2478 | while (--dslots_number_nops > 0) \ | |
2479 | fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \ | |
2480 | \ | |
2481 | mips_load_reg = (rtx)0; \ | |
2482 | mips_load_reg2 = (rtx)0; \ | |
2483 | mips_load_reg3 = (rtx)0; \ | |
2484 | mips_load_reg4 = (rtx)0; \ | |
2485 | \ | |
2486 | if (set_noreorder && --set_noreorder == 0) \ | |
2487 | fputs ("\t.set\treorder\n", asm_out_file); \ | |
2488 | } \ | |
2489 | \ | |
2490 | if (TARGET_STATS) \ | |
2491 | { \ | |
2492 | enum rtx_code code = GET_CODE (INSN); \ | |
2493 | if (code == JUMP_INSN || code == CALL_INSN) \ | |
2494 | dslots_jump_total++; \ | |
2495 | } \ | |
2496 | } \ | |
2497 | while (0) | |
2498 | ||
2499 | \f | |
2500 | /* Tell final.c how to eliminate redundant test instructions. | |
2501 | Here we define machine-dependent flags and fields in cc_status | |
2502 | (see `conditions.h'). */ | |
2503 | ||
2504 | /* A C compound statement to set the components of `cc_status' | |
2505 | appropriately for an insn INSN whose body is EXP. It is this | |
2506 | macro's responsibility to recognize insns that set the condition | |
2507 | code as a byproduct of other activity as well as those that | |
2508 | explicitly set `(cc0)'. | |
2509 | ||
2510 | This macro is not used on machines that do not use `cc0'. */ | |
2511 | ||
2512 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
2513 | do \ | |
2514 | { \ | |
2515 | enum attr_type type = get_attr_type (INSN); \ | |
2516 | if (type == TYPE_ICMP || type == TYPE_FCMP) \ | |
2517 | CC_STATUS_INIT; \ | |
2518 | } \ | |
2519 | while (0) | |
2520 | ||
2521 | /* A list of names to be used for additional modes for condition | |
2522 | code values in registers (*note Jump Patterns::.). These names | |
2523 | are added to `enum machine_mode' and all have class `MODE_CC'. | |
2524 | By convention, they should start with `CC' and end with `mode'. | |
2525 | ||
2526 | You should only define this macro if your machine does not use | |
2527 | `cc0' and only if additional modes are required. | |
2528 | ||
2529 | On the MIPS, we use CC_FPmode for all floating point, CC_EQmode for | |
2530 | integer equality/inequality comparisons, CC_0mode for comparisons | |
2531 | against 0, and CCmode for other integer comparisons. */ | |
2532 | ||
2533 | #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode | |
2534 | ||
2535 | /* A list of C strings giving the names for the modes listed in | |
2536 | `EXTRA_CC_MODES'. For example, the Sparc defines this macro and | |
2537 | `EXTRA_CC_MODES' as | |
2538 | ||
2539 | #define EXTRA_CC_MODES CC_NOOVmode, CCFPmode | |
2540 | #define EXTRA_CC_NAMES "CC_NOOV", "CCFP" | |
2541 | ||
2542 | This macro is not required if `EXTRA_CC_MODES' is not defined. */ | |
2543 | ||
2544 | #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0" | |
2545 | ||
2546 | /* Returns a mode from class `MODE_CC' to be used when comparison | |
2547 | operation code OP is applied to rtx X. For example, on the | |
2548 | Sparc, `SELECT_CC_MODE' is defined as (see *note Jump | |
2549 | Patterns::. for a description of the reason for this definition) | |
2550 | ||
2551 | #define SELECT_CC_MODE(OP,X) \ | |
2552 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ | |
2553 | : (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \ | |
2554 | || GET_CODE (X) == NEG) \ | |
2555 | ? CC_NOOVmode : CCmode) | |
2556 | ||
2557 | This macro is not required if `EXTRA_CC_MODES' is not defined. */ | |
2558 | ||
2559 | #define SELECT_CC_MODE (OP, X) \ | |
2560 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_FPmode : \ | |
2561 | (OP == EQ || OP == NE) ? CC_EQmode : CCmode) | |
2562 | ||
2563 | \f | |
2564 | /* Control the assembler format that we output. */ | |
2565 | ||
2566 | /* Output at beginning of assembler file. | |
2567 | If we are optimizing to use the global pointer, create a temporary | |
2568 | file to hold all of the text stuff, and write it out to the end. | |
2569 | This is needed because the MIPS assembler is evidently one pass, | |
2570 | and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata | |
2571 | declaration when the code is processed, it generates a two | |
2572 | instruction sequence. */ | |
2573 | ||
2574 | #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM) | |
2575 | ||
2576 | /* Output to assembler file text saying following lines | |
2577 | may contain character constants, extra white space, comments, etc. */ | |
2578 | ||
2579 | #define ASM_APP_ON " #APP\n" | |
2580 | ||
2581 | /* Output to assembler file text saying following lines | |
2582 | no longer contain unusual constructs. */ | |
2583 | ||
2584 | #define ASM_APP_OFF " #NO_APP\n" | |
2585 | ||
2586 | /* How to refer to registers in assembler output. | |
2587 | This sequence is indexed by compiler's hard-register-number (see above). | |
2588 | ||
2589 | In order to support the two different conventions for register names, | |
2590 | we use the name of a table set up in mips.c, which is overwritten | |
2591 | if -mrnames is used. */ | |
2592 | ||
2593 | #define REGISTER_NAMES \ | |
2594 | { \ | |
2595 | &mips_reg_names[ 0][0], \ | |
2596 | &mips_reg_names[ 1][0], \ | |
2597 | &mips_reg_names[ 2][0], \ | |
2598 | &mips_reg_names[ 3][0], \ | |
2599 | &mips_reg_names[ 4][0], \ | |
2600 | &mips_reg_names[ 5][0], \ | |
2601 | &mips_reg_names[ 6][0], \ | |
2602 | &mips_reg_names[ 7][0], \ | |
2603 | &mips_reg_names[ 8][0], \ | |
2604 | &mips_reg_names[ 9][0], \ | |
2605 | &mips_reg_names[10][0], \ | |
2606 | &mips_reg_names[11][0], \ | |
2607 | &mips_reg_names[12][0], \ | |
2608 | &mips_reg_names[13][0], \ | |
2609 | &mips_reg_names[14][0], \ | |
2610 | &mips_reg_names[15][0], \ | |
2611 | &mips_reg_names[16][0], \ | |
2612 | &mips_reg_names[17][0], \ | |
2613 | &mips_reg_names[18][0], \ | |
2614 | &mips_reg_names[19][0], \ | |
2615 | &mips_reg_names[20][0], \ | |
2616 | &mips_reg_names[21][0], \ | |
2617 | &mips_reg_names[22][0], \ | |
2618 | &mips_reg_names[23][0], \ | |
2619 | &mips_reg_names[24][0], \ | |
2620 | &mips_reg_names[25][0], \ | |
2621 | &mips_reg_names[26][0], \ | |
2622 | &mips_reg_names[27][0], \ | |
2623 | &mips_reg_names[28][0], \ | |
2624 | &mips_reg_names[29][0], \ | |
2625 | &mips_reg_names[30][0], \ | |
2626 | &mips_reg_names[31][0], \ | |
2627 | &mips_reg_names[32][0], \ | |
2628 | &mips_reg_names[33][0], \ | |
2629 | &mips_reg_names[34][0], \ | |
2630 | &mips_reg_names[35][0], \ | |
2631 | &mips_reg_names[36][0], \ | |
2632 | &mips_reg_names[37][0], \ | |
2633 | &mips_reg_names[38][0], \ | |
2634 | &mips_reg_names[39][0], \ | |
2635 | &mips_reg_names[40][0], \ | |
2636 | &mips_reg_names[41][0], \ | |
2637 | &mips_reg_names[42][0], \ | |
2638 | &mips_reg_names[43][0], \ | |
2639 | &mips_reg_names[44][0], \ | |
2640 | &mips_reg_names[45][0], \ | |
2641 | &mips_reg_names[46][0], \ | |
2642 | &mips_reg_names[47][0], \ | |
2643 | &mips_reg_names[48][0], \ | |
2644 | &mips_reg_names[49][0], \ | |
2645 | &mips_reg_names[50][0], \ | |
2646 | &mips_reg_names[51][0], \ | |
2647 | &mips_reg_names[52][0], \ | |
2648 | &mips_reg_names[53][0], \ | |
2649 | &mips_reg_names[54][0], \ | |
2650 | &mips_reg_names[55][0], \ | |
2651 | &mips_reg_names[56][0], \ | |
2652 | &mips_reg_names[57][0], \ | |
2653 | &mips_reg_names[58][0], \ | |
2654 | &mips_reg_names[59][0], \ | |
2655 | &mips_reg_names[60][0], \ | |
2656 | &mips_reg_names[61][0], \ | |
2657 | &mips_reg_names[62][0], \ | |
2658 | &mips_reg_names[63][0], \ | |
2659 | &mips_reg_names[64][0], \ | |
2660 | &mips_reg_names[65][0], \ | |
2661 | &mips_reg_names[66][0], \ | |
2662 | } | |
2663 | ||
2664 | /* If defined, a C initializer for an array of structures | |
2665 | containing a name and a register number. This macro defines | |
2666 | additional names for hard registers, thus allowing the `asm' | |
2667 | option in declarations to refer to registers using alternate | |
2668 | names. | |
2669 | ||
2670 | We define both names for the integer registers here. */ | |
2671 | ||
2672 | #define ADDITIONAL_REGISTER_NAMES \ | |
2673 | { \ | |
2674 | { "$0", 0 + GP_REG_FIRST }, \ | |
2675 | { "$1", 1 + GP_REG_FIRST }, \ | |
2676 | { "$2", 2 + GP_REG_FIRST }, \ | |
2677 | { "$3", 3 + GP_REG_FIRST }, \ | |
2678 | { "$4", 4 + GP_REG_FIRST }, \ | |
2679 | { "$5", 5 + GP_REG_FIRST }, \ | |
2680 | { "$6", 6 + GP_REG_FIRST }, \ | |
2681 | { "$7", 7 + GP_REG_FIRST }, \ | |
2682 | { "$8", 8 + GP_REG_FIRST }, \ | |
2683 | { "$9", 9 + GP_REG_FIRST }, \ | |
2684 | { "$10", 10 + GP_REG_FIRST }, \ | |
2685 | { "$11", 11 + GP_REG_FIRST }, \ | |
2686 | { "$12", 12 + GP_REG_FIRST }, \ | |
2687 | { "$13", 13 + GP_REG_FIRST }, \ | |
2688 | { "$14", 14 + GP_REG_FIRST }, \ | |
2689 | { "$15", 15 + GP_REG_FIRST }, \ | |
2690 | { "$16", 16 + GP_REG_FIRST }, \ | |
2691 | { "$17", 17 + GP_REG_FIRST }, \ | |
2692 | { "$18", 18 + GP_REG_FIRST }, \ | |
2693 | { "$19", 19 + GP_REG_FIRST }, \ | |
2694 | { "$20", 20 + GP_REG_FIRST }, \ | |
2695 | { "$21", 21 + GP_REG_FIRST }, \ | |
2696 | { "$22", 22 + GP_REG_FIRST }, \ | |
2697 | { "$23", 23 + GP_REG_FIRST }, \ | |
2698 | { "$24", 24 + GP_REG_FIRST }, \ | |
2699 | { "$25", 25 + GP_REG_FIRST }, \ | |
2700 | { "$26", 26 + GP_REG_FIRST }, \ | |
2701 | { "$27", 27 + GP_REG_FIRST }, \ | |
2702 | { "$28", 28 + GP_REG_FIRST }, \ | |
2703 | { "$29", 29 + GP_REG_FIRST }, \ | |
2704 | { "$30", 30 + GP_REG_FIRST }, \ | |
2705 | { "$31", 31 + GP_REG_FIRST }, \ | |
2706 | { "$sp", 29 + GP_REG_FIRST }, \ | |
2707 | { "$fp", 30 + GP_REG_FIRST }, \ | |
2708 | { "at", 1 + GP_REG_FIRST }, \ | |
2709 | { "v0", 2 + GP_REG_FIRST }, \ | |
2710 | { "v1", 3 + GP_REG_FIRST }, \ | |
2711 | { "a0", 4 + GP_REG_FIRST }, \ | |
2712 | { "a1", 5 + GP_REG_FIRST }, \ | |
2713 | { "a2", 6 + GP_REG_FIRST }, \ | |
2714 | { "a3", 7 + GP_REG_FIRST }, \ | |
2715 | { "t0", 8 + GP_REG_FIRST }, \ | |
2716 | { "t1", 9 + GP_REG_FIRST }, \ | |
2717 | { "t2", 10 + GP_REG_FIRST }, \ | |
2718 | { "t3", 11 + GP_REG_FIRST }, \ | |
2719 | { "t4", 12 + GP_REG_FIRST }, \ | |
2720 | { "t5", 13 + GP_REG_FIRST }, \ | |
2721 | { "t6", 14 + GP_REG_FIRST }, \ | |
2722 | { "t7", 15 + GP_REG_FIRST }, \ | |
2723 | { "s0", 16 + GP_REG_FIRST }, \ | |
2724 | { "s1", 17 + GP_REG_FIRST }, \ | |
2725 | { "s2", 18 + GP_REG_FIRST }, \ | |
2726 | { "s3", 19 + GP_REG_FIRST }, \ | |
2727 | { "s4", 20 + GP_REG_FIRST }, \ | |
2728 | { "s5", 21 + GP_REG_FIRST }, \ | |
2729 | { "s6", 22 + GP_REG_FIRST }, \ | |
2730 | { "s7", 23 + GP_REG_FIRST }, \ | |
2731 | { "t8", 24 + GP_REG_FIRST }, \ | |
2732 | { "t9", 25 + GP_REG_FIRST }, \ | |
2733 | { "k0", 26 + GP_REG_FIRST }, \ | |
2734 | { "k1", 27 + GP_REG_FIRST }, \ | |
2735 | { "gp", 28 + GP_REG_FIRST }, \ | |
2736 | { "sp", 29 + GP_REG_FIRST }, \ | |
2737 | { "fp", 30 + GP_REG_FIRST }, \ | |
2738 | { "ra", 31 + GP_REG_FIRST }, \ | |
2739 | } | |
2740 | ||
2741 | /* Define results of standard character escape sequences. */ | |
2742 | #define TARGET_BELL 007 | |
2743 | #define TARGET_BS 010 | |
2744 | #define TARGET_TAB 011 | |
2745 | #define TARGET_NEWLINE 012 | |
2746 | #define TARGET_VT 013 | |
2747 | #define TARGET_FF 014 | |
2748 | #define TARGET_CR 015 | |
2749 | ||
2750 | /* A C compound statement to output to stdio stream STREAM the | |
2751 | assembler syntax for an instruction operand X. X is an RTL | |
2752 | expression. | |
2753 | ||
2754 | CODE is a value that can be used to specify one of several ways | |
2755 | of printing the operand. It is used when identical operands | |
2756 | must be printed differently depending on the context. CODE | |
2757 | comes from the `%' specification that was used to request | |
2758 | printing of the operand. If the specification was just `%DIGIT' | |
2759 | then CODE is 0; if the specification was `%LTR DIGIT' then CODE | |
2760 | is the ASCII code for LTR. | |
2761 | ||
2762 | If X is a register, this macro should print the register's name. | |
2763 | The names can be found in an array `reg_names' whose type is | |
2764 | `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'. | |
2765 | ||
2766 | When the machine description has a specification `%PUNCT' (a `%' | |
2767 | followed by a punctuation character), this macro is called with | |
2768 | a null pointer for X and the punctuation character for CODE. | |
2769 | ||
2770 | See mips.c for the MIPS specific codes. */ | |
2771 | ||
2772 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
2773 | ||
2774 | /* A C expression which evaluates to true if CODE is a valid | |
2775 | punctuation character for use in the `PRINT_OPERAND' macro. If | |
2776 | `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no | |
2777 | punctuation characters (except for the standard one, `%') are | |
2778 | used in this way. */ | |
2779 | ||
2780 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE] | |
2781 | ||
2782 | /* A C compound statement to output to stdio stream STREAM the | |
2783 | assembler syntax for an instruction operand that is a memory | |
2784 | reference whose address is ADDR. ADDR is an RTL expression. | |
2785 | ||
2786 | On some machines, the syntax for a symbolic address depends on | |
2787 | the section that the address refers to. On these machines, | |
2788 | define the macro `ENCODE_SECTION_INFO' to store the information | |
2789 | into the `symbol_ref', and then check for it here. */ | |
2790 | ||
2791 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
2792 | ||
2793 | ||
2794 | /* A C statement, to be executed after all slot-filler instructions | |
2795 | have been output. If necessary, call `dbr_sequence_length' to | |
2796 | determine the number of slots filled in a sequence (zero if not | |
2797 | currently outputting a sequence), to decide how many no-ops to | |
2798 | output, or whatever. | |
2799 | ||
2800 | Don't define this macro if it has nothing to do, but it is | |
2801 | helpful in reading assembly output if the extent of the delay | |
2802 | sequence is made explicit (e.g. with white space). | |
2803 | ||
2804 | Note that output routines for instructions with delay slots must | |
2805 | be prepared to deal with not being output as part of a sequence | |
2806 | (i.e. when the scheduling pass is not run, or when no slot | |
2807 | fillers could be found.) The variable `final_sequence' is null | |
2808 | when not processing a sequence, otherwise it contains the | |
2809 | `sequence' rtx being output. */ | |
2810 | ||
2811 | #define DBR_OUTPUT_SEQEND(STREAM) \ | |
2812 | do \ | |
2813 | { \ | |
2814 | if (set_nomacro > 0 && --set_nomacro == 0) \ | |
2815 | fputs ("\t.set\tmacro\n", STREAM); \ | |
2816 | \ | |
2817 | if (set_noreorder > 0 && --set_noreorder == 0) \ | |
2818 | fputs ("\t.set\treorder\n", STREAM); \ | |
2819 | \ | |
2820 | dslots_jump_filled++; \ | |
2821 | fputs ("\n", STREAM); \ | |
2822 | } \ | |
2823 | while (0) | |
2824 | ||
2825 | ||
2826 | /* How to tell the debugger about changes of source files. Note, the | |
2827 | mips ECOFF format cannot deal with changes of files inside of | |
2828 | functions, which means the output of parser generators like bison | |
2829 | is generally not debuggable without using the -l switch. Lose, | |
2830 | lose, lose. Silicon graphics seems to want all .file's hardwired | |
2831 | to 1. */ | |
2832 | ||
2833 | #ifndef SET_FILE_NUMBER | |
2834 | #define SET_FILE_NUMBER() ++num_source_filenames | |
2835 | #endif | |
2836 | ||
2837 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
2838 | mips_output_filename (STREAM, NAME) | |
2839 | ||
2840 | /* This is how to output a note the debugger telling it the line number | |
2841 | to which the following sequence of instructions corresponds. | |
2842 | Silicon graphics puts a label after each .loc. */ | |
2843 | ||
2844 | #ifndef LABEL_AFTER_LOC | |
2845 | #define LABEL_AFTER_LOC(STREAM) | |
2846 | #endif | |
2847 | ||
2848 | #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ | |
2849 | mips_output_lineno (STREAM, LINE) | |
2850 | ||
2851 | /* The MIPS implementation uses some labels for it's own purposed. The | |
2852 | following lists what labels are created, and are all formed by the | |
2853 | pattern $L[a-z].*. The machine independent portion of GCC creates | |
2854 | labels matching: $L[A-Z][0-9]+ and $L[0-9]+. | |
2855 | ||
2856 | LM[0-9]+ Sillicon graphics/ECOFF stabs label before each stmt. | |
2857 | $Lb[0-9]+ Begin blocks for MIPS debug support | |
2858 | $Lc[0-9]+ Label for use in s<xx> operation. | |
2859 | $Le[0-9]+ End blocks for MIPS debug support | |
2860 | $Lp\..+ Half-pic labels. | |
2861 | $Ls[0-9]+ FP-SP difference if -fomit-frame-pointer */ | |
2862 | ||
2863 | /* This is how to output the definition of a user-level label named NAME, | |
2864 | such as the label on a static function or variable NAME. | |
2865 | ||
2866 | If we are optimizing the gp, remember that this label has been put | |
2867 | out, so we know not to emit an .extern for it in mips_asm_file_end. | |
2868 | We use one of the common bits in the IDENTIFIER tree node for this, | |
2869 | since those bits seem to be unused, and we don't have any method | |
2870 | of getting the decl nodes from the name. */ | |
2871 | ||
2872 | #ifndef COLLECT | |
2873 | #define ASM_OUTPUT_LABEL(STREAM,NAME) \ | |
2874 | do { \ | |
2875 | assemble_name (STREAM, NAME); \ | |
2876 | fputs (":\n", STREAM); \ | |
2877 | \ | |
2878 | if (TARGET_GP_OPT && mips_section_threshold != 0) \ | |
2879 | { \ | |
2880 | tree name_tree = get_identifier (NAME); \ | |
2881 | TREE_ADDRESSABLE (name_tree) = 1; \ | |
2882 | } \ | |
2883 | } while (0) | |
2884 | ||
2885 | #else | |
2886 | #define ASM_OUTPUT_LABEL(STREAM,NAME) \ | |
2887 | do { \ | |
2888 | fprintf (STREAM, "%s:\n", NAME); \ | |
2889 | } while (0) | |
2890 | #endif | |
2891 | ||
2892 | /* This is how to output a command to make the user-level label named NAME | |
2893 | defined for reference from other files. */ | |
2894 | ||
2895 | #ifndef COLLECT | |
2896 | #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ | |
2897 | do { \ | |
2898 | fputs ("\t.globl\t", STREAM); \ | |
2899 | assemble_name (STREAM, NAME); \ | |
2900 | fputs ("\n", STREAM); \ | |
2901 | } while (0) | |
2902 | ||
2903 | #else | |
2904 | #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ | |
2905 | do { \ | |
2906 | fprintf (STREAM, "\t.globl\t%s\n", NAME); \ | |
2907 | } while (0) | |
2908 | #endif | |
2909 | ||
2910 | /* This says how to output an assembler line | |
2911 | to define a global common symbol. */ | |
2912 | ||
2913 | #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ | |
2914 | do { \ | |
2915 | fputs ("\n\t.comm\t", (STREAM)); \ | |
2916 | assemble_name ((STREAM), (NAME)); \ | |
2917 | fprintf ((STREAM), ",%u\n", (ROUNDED)); \ | |
2918 | \ | |
2919 | if (TARGET_GP_OPT && mips_section_threshold != 0) \ | |
2920 | { \ | |
2921 | tree name_tree = get_identifier (NAME); \ | |
2922 | TREE_ADDRESSABLE (name_tree) = 1; \ | |
2923 | } \ | |
2924 | } while (0) | |
2925 | ||
2926 | /* This says how to output an assembler line | |
2927 | to define a local common symbol. */ | |
2928 | ||
2929 | #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ | |
2930 | do { \ | |
2931 | fputs ("\n\t.lcomm\t", (STREAM)); \ | |
2932 | assemble_name ((STREAM), (NAME)); \ | |
2933 | fprintf ((STREAM), ",%u\n", (ROUNDED)); \ | |
2934 | \ | |
2935 | if (TARGET_GP_OPT && mips_section_threshold != 0) \ | |
2936 | { \ | |
2937 | tree name_tree = get_identifier (NAME); \ | |
2938 | TREE_ADDRESSABLE (name_tree) = 1; \ | |
2939 | } \ | |
2940 | } while (0) | |
2941 | ||
2942 | ||
2943 | /* This says how to output an external. It would be possible not to | |
2944 | output anything and let undefined symbol become external. However | |
2945 | the assembler uses length information on externals to allocate in | |
2946 | data/sdata bss/sbss, thereby saving exec time. */ | |
2947 | ||
2948 | #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \ | |
2949 | mips_output_external(STREAM,DECL,NAME) | |
2950 | ||
2951 | /* This says what to print at the end of the assembly file */ | |
2952 | #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM) | |
2953 | ||
2954 | ||
2955 | /* This is how to declare a function name. The actual work of | |
2956 | emitting the label is moved to function_prologue, so that we can | |
2957 | get the line number correctly emitted before the .ent directive, | |
2958 | and after any .file directives. | |
2959 | ||
2960 | Also, switch files if we are optimizing the global pointer. */ | |
2961 | ||
2962 | #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \ | |
2963 | { \ | |
2964 | extern FILE *asm_out_text_file; \ | |
2965 | if (TARGET_GP_OPT) \ | |
2966 | STREAM = asm_out_text_file; \ | |
2967 | \ | |
2968 | current_function_name = NAME; \ | |
2969 | } | |
2970 | ||
2971 | /* This is how to output a reference to a user-level label named NAME. | |
2972 | `assemble_name' uses this. */ | |
2973 | ||
2974 | #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME) | |
2975 | ||
2976 | /* This is how to output an internal numbered label where | |
2977 | PREFIX is the class of label and NUM is the number within the class. */ | |
2978 | ||
2979 | #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \ | |
2980 | fprintf (STREAM, "$%s%d:\n", PREFIX, NUM) | |
2981 | ||
2982 | /* This is how to store into the string LABEL | |
2983 | the symbol_ref name of an internal numbered label where | |
2984 | PREFIX is the class of label and NUM is the number within the class. | |
2985 | This is suitable for output with `assemble_name'. */ | |
2986 | ||
2987 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
2988 | sprintf (LABEL, "*$%s%d", PREFIX, NUM) | |
2989 | ||
2990 | /* This is how to output an assembler line defining a `double' constant. */ | |
2991 | ||
2992 | #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \ | |
2993 | { \ | |
2994 | union { double d; long l[2]; } u2; \ | |
2995 | u2.d = VALUE; \ | |
2996 | fprintf (STREAM, "\t.word\t0x%08lx\t\t# %.20g\n\t.word\t0x%08lx\n", \ | |
2997 | u2.l[0], u2.d, u2.l[1]); \ | |
2998 | } | |
2999 | ||
3000 | /* This is how to output an assembler line defining a `float' constant. */ | |
3001 | ||
3002 | #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \ | |
3003 | { \ | |
3004 | union { float f; long l; } u2; \ | |
3005 | u2.f = VALUE; \ | |
3006 | fprintf (STREAM, "\t.word\t0x%08lx\t\t# %.12g\n", u2.l, u2.f); \ | |
3007 | } | |
3008 | ||
3009 | /* This is how to output an assembler line defining an `int' constant. */ | |
3010 | ||
3011 | #ifndef COLLECT | |
3012 | #define ASM_OUTPUT_INT(STREAM,VALUE) \ | |
3013 | do { \ | |
3014 | fprintf (STREAM, "\t.word\t"); \ | |
3015 | output_addr_const (STREAM, (VALUE)); \ | |
3016 | fprintf (STREAM, "\n"); \ | |
3017 | } while (0) | |
3018 | ||
3019 | #else | |
3020 | #define ASM_OUTPUT_INT(STREAM,VALUE) \ | |
3021 | fprintf (STREAM, "\t.word\t%d\n", VALUE) | |
3022 | #endif | |
3023 | ||
3024 | /* Likewise for `char' and `short' constants. */ | |
3025 | ||
3026 | #define ASM_OUTPUT_SHORT(STREAM,VALUE) \ | |
3027 | { \ | |
3028 | fprintf (STREAM, "\t.half\t"); \ | |
3029 | output_addr_const (STREAM, (VALUE)); \ | |
3030 | fprintf (STREAM, "\n"); \ | |
3031 | } | |
3032 | ||
3033 | #define ASM_OUTPUT_CHAR(STREAM,VALUE) \ | |
3034 | { \ | |
3035 | fprintf (STREAM, "\t.byte\t"); \ | |
3036 | output_addr_const (STREAM, (VALUE)); \ | |
3037 | fprintf (STREAM, "\n"); \ | |
3038 | } | |
3039 | ||
3040 | /* This is how to output an assembler line defining an `int' constant, | |
3041 | which is not in tree format (for collect.c). */ | |
3042 | ||
3043 | #define ASM_OUTPUT_INT_CONST(STREAM,VALUE) \ | |
3044 | fprintf(STREAM, "\t.word\t%d\n", VALUE) | |
3045 | ||
3046 | /* This is how to output an assembler line defining an external/static | |
3047 | address which is not in tree format (for collect.c). */ | |
3048 | ||
3049 | #define ASM_OUTPUT_PTR_INT_SUM(STREAM, NAME, VALUE) \ | |
3050 | do { \ | |
3051 | fprintf (STREAM, "\t.word\t"); \ | |
3052 | ASM_OUTPUT_LABELREF (STREAM, NAME); \ | |
3053 | fprintf (STREAM, "+%d\n", VALUE); \ | |
3054 | } while (0) | |
3055 | ||
3056 | #define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME) \ | |
3057 | do { \ | |
3058 | fprintf (STREAM, "\t.word\t"); \ | |
3059 | ASM_OUTPUT_LABELREF (STREAM, NAME); \ | |
3060 | fprintf (STREAM, "\n"); \ | |
3061 | } while (0) | |
3062 | ||
3063 | /* This is how to output an assembler line for a numeric constant byte. */ | |
3064 | ||
3065 | #define ASM_OUTPUT_BYTE(STREAM,VALUE) \ | |
3066 | fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE)) | |
3067 | ||
3068 | /* This is how to output an element of a case-vector that is absolute. */ | |
3069 | ||
3070 | #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ | |
3071 | fprintf (STREAM, "\t.word\t$L%d\n", VALUE) | |
3072 | ||
3073 | /* This is how to output an element of a case-vector that is relative. | |
3074 | (We do not use such vectors, | |
3075 | but we must define this macro anyway.) */ | |
3076 | ||
3077 | #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \ | |
3078 | fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL) | |
3079 | ||
3080 | /* This is how to emit the initial label for switch statements. We | |
3081 | need to put the switch labels somewhere else from the text section, | |
3082 | because the MIPS assembler gets real confused about line numbers if | |
3083 | .word's appear in the text section. */ | |
3084 | ||
3085 | #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \ | |
3086 | { \ | |
3087 | rdata_section (); \ | |
3088 | ASM_OUTPUT_ALIGN (STREAM, 2); \ | |
3089 | ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \ | |
3090 | } | |
3091 | ||
3092 | /* This is how to output an assembler line | |
3093 | that says to advance the location counter | |
3094 | to a multiple of 2**LOG bytes. */ | |
3095 | ||
3096 | #define ASM_OUTPUT_ALIGN(STREAM,LOG) \ | |
3097 | { \ | |
3098 | int mask = (1 << (LOG)) - 1; \ | |
3099 | fprintf (STREAM, "\t.align\t%d\n", (LOG)); \ | |
3100 | } | |
3101 | ||
3102 | /* This is how to output an assembler line to to advance the location | |
3103 | counter by SIZE bytes. */ | |
3104 | ||
3105 | #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ | |
3106 | fprintf (STREAM, "\t.space\t%u\n", (SIZE)) | |
3107 | ||
3108 | ||
3109 | /* This is how to output a string. */ | |
3110 | #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \ | |
3111 | do { \ | |
3112 | register int i, c, len = (LEN), cur_pos = 17; \ | |
3113 | register unsigned char *string = (unsigned char *)(STRING); \ | |
3114 | fprintf ((STREAM), "\t.ascii\t\""); \ | |
3115 | for (i = 0; i < len; i++) \ | |
3116 | { \ | |
3117 | register int c = string[i]; \ | |
3118 | \ | |
3119 | switch (c) \ | |
3120 | { \ | |
3121 | case '\"': \ | |
3122 | case '\\': \ | |
3123 | putc ('\\', (STREAM)); \ | |
3124 | putc (c, (STREAM)); \ | |
3125 | cur_pos += 2; \ | |
3126 | break; \ | |
3127 | \ | |
3128 | case TARGET_NEWLINE: \ | |
3129 | fputs ("\\n", (STREAM)); \ | |
3130 | if (i+1 < len \ | |
3131 | && (((c = string[i+1]) >= '\040' && c <= '~') \ | |
3132 | || c == TARGET_TAB)) \ | |
3133 | cur_pos = 32767; /* break right here */ \ | |
3134 | else \ | |
3135 | cur_pos += 2; \ | |
3136 | break; \ | |
3137 | \ | |
3138 | case TARGET_TAB: \ | |
3139 | fputs ("\\t", (STREAM)); \ | |
3140 | cur_pos += 2; \ | |
3141 | break; \ | |
3142 | \ | |
3143 | case TARGET_FF: \ | |
3144 | fputs ("\\f", (STREAM)); \ | |
3145 | cur_pos += 2; \ | |
3146 | break; \ | |
3147 | \ | |
3148 | case TARGET_BS: \ | |
3149 | fputs ("\\b", (STREAM)); \ | |
3150 | cur_pos += 2; \ | |
3151 | break; \ | |
3152 | \ | |
3153 | case TARGET_CR: \ | |
3154 | fputs ("\\r", (STREAM)); \ | |
3155 | cur_pos += 2; \ | |
3156 | break; \ | |
3157 | \ | |
3158 | default: \ | |
3159 | if (c >= ' ' && c < 0177) \ | |
3160 | { \ | |
3161 | putc (c, (STREAM)); \ | |
3162 | cur_pos++; \ | |
3163 | } \ | |
3164 | else \ | |
3165 | { \ | |
3166 | fprintf ((STREAM), "\\%03o", c); \ | |
3167 | cur_pos += 4; \ | |
3168 | } \ | |
3169 | } \ | |
3170 | \ | |
3171 | if (cur_pos > 72 && i+1 < len) \ | |
3172 | { \ | |
3173 | cur_pos = 17; \ | |
3174 | fprintf ((STREAM), "\"\n\t.ascii\t\""); \ | |
3175 | } \ | |
3176 | } \ | |
3177 | fprintf ((STREAM), "\"\n"); \ | |
3178 | } while (0) | |
3179 | ||
3180 | /* Handle certain cpp directives used in header files on sysV. */ | |
3181 | #define SCCS_DIRECTIVE | |
3182 | ||
3183 | /* Output #ident as a in the read-only data section. */ | |
3184 | #define ASM_OUTPUT_IDENT(FILE, STRING) \ | |
3185 | { \ | |
3186 | char *p = STRING; \ | |
3187 | int size = strlen (p) + 1; \ | |
3188 | rdata_section (); \ | |
3189 | assemble_string (p, size); \ | |
3190 | } | |
3191 | \f | |
3192 | ||
3193 | /* Output before read-only data. */ | |
3194 | ||
3195 | #define TEXT_SECTION_ASM_OP "\t.text" | |
3196 | ||
3197 | /* Output before writable data. */ | |
3198 | ||
3199 | #define DATA_SECTION_ASM_OP "\t.data" | |
3200 | ||
3201 | /* Output before writable short data. */ | |
3202 | ||
3203 | #define SDATA_SECTION_ASM_OP "\t.sdata" | |
3204 | ||
3205 | /* Output before read-only data. */ | |
3206 | ||
3207 | #define RDATA_SECTION_ASM_OP "\t.rdata" | |
3208 | #define READONLY_DATA_SECTION rdata_section | |
3209 | ||
3210 | /* What other sections we support other than the normal .data/.text. */ | |
3211 | ||
3212 | #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1 | |
3213 | ||
3214 | /* Define the additional functions to select our additional sections. */ | |
3215 | ||
3216 | /* on the MIPS it is not a good idea to put constants in the text | |
3217 | section, since this defeats the sdata/data mechanism. This is | |
3218 | especially true when -O is used. In this case an effort is made to | |
3219 | address with faster (gp) register relative addressing, which can | |
3220 | only get at sdata and sbss items (there is no stext !!) However, | |
3221 | if the constant is too large for sdata, and it's readonly, it | |
3222 | will go into the .rdata section. */ | |
3223 | ||
3224 | #define EXTRA_SECTION_FUNCTIONS \ | |
3225 | void \ | |
3226 | sdata_section () \ | |
3227 | { \ | |
3228 | if (in_section != in_sdata) \ | |
3229 | { \ | |
3230 | fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ | |
3231 | in_section = in_sdata; \ | |
3232 | } \ | |
3233 | } \ | |
3234 | \ | |
3235 | void \ | |
3236 | rdata_section () \ | |
3237 | { \ | |
3238 | if (in_section != in_rdata) \ | |
3239 | { \ | |
3240 | fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \ | |
3241 | in_section = in_rdata; \ | |
3242 | } \ | |
3243 | } | |
3244 | ||
3245 | /* Given a decl node or constant node, choose the section to output it in | |
3246 | and select that section. */ | |
3247 | ||
3248 | #define SELECT_SECTION_MODE(MODE,RTX) \ | |
3249 | { \ | |
3250 | extern int mips_section_threshold; \ | |
3251 | if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \ | |
3252 | && mips_section_threshold > 0) \ | |
3253 | sdata_section (); \ | |
3254 | else \ | |
3255 | rdata_section (); \ | |
3256 | } \ | |
3257 | ||
3258 | #define SELECT_SECTION(DECL,RELOC) \ | |
3259 | { \ | |
3260 | extern int mips_section_threshold; \ | |
3261 | if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \ | |
3262 | && mips_section_threshold > 0) \ | |
3263 | sdata_section (); \ | |
3264 | else if (TREE_CODE (DECL) == STRING_CST) \ | |
3265 | { \ | |
3266 | if (flag_writable_strings) \ | |
3267 | data_section (); \ | |
3268 | else \ | |
3269 | rdata_section (); \ | |
3270 | } \ | |
3271 | else if (TREE_CODE (DECL) != VAR_DECL) \ | |
3272 | rdata_section (); \ | |
3273 | else if (!TREE_READONLY (DECL)) \ | |
3274 | data_section (); \ | |
3275 | else \ | |
3276 | rdata_section (); \ | |
3277 | } | |
3278 | ||
3279 | \f | |
3280 | /* Store in OUTPUT a string (made with alloca) containing | |
3281 | an assembler-name for a local static variable named NAME. | |
3282 | LABELNO is an integer which is different for each call. */ | |
3283 | ||
3284 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
3285 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
3286 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
3287 | ||
3288 | #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \ | |
3289 | do \ | |
3290 | { \ | |
3291 | fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \ | |
3292 | reg_names[STACK_POINTER_REGNUM], \ | |
3293 | reg_names[STACK_POINTER_REGNUM], \ | |
3294 | reg_names[REGNO], \ | |
3295 | reg_names[STACK_POINTER_REGNUM]); \ | |
3296 | } \ | |
3297 | while (0) | |
3298 | ||
3299 | #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \ | |
3300 | do \ | |
3301 | { \ | |
3302 | if (! set_noreorder) \ | |
3303 | fprintf (STREAM, "\t.set\tnoreorder\n"); \ | |
3304 | \ | |
3305 | dslots_load_total++; \ | |
3306 | dslots_load_filled++; \ | |
3307 | fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \ | |
3308 | reg_names[REGNO], \ | |
3309 | reg_names[STACK_POINTER_REGNUM], \ | |
3310 | reg_names[STACK_POINTER_REGNUM], \ | |
3311 | reg_names[STACK_POINTER_REGNUM]); \ | |
3312 | \ | |
3313 | if (! set_noreorder) \ | |
3314 | fprintf (STREAM, "\t.set\treorder\n"); \ | |
3315 | } \ | |
3316 | while (0) | |
3317 | ||
3318 | /* Define the parentheses used to group arithmetic operations | |
3319 | in assembler code. */ | |
3320 | ||
3321 | #define ASM_OPEN_PAREN "(" | |
3322 | #define ASM_CLOSE_PAREN ")" | |
3323 | ||
3324 | /* How to start an assembler comment. */ | |
3325 | #ifndef ASM_COMMENT_START | |
3326 | #define ASM_COMMENT_START "\t\t# " | |
3327 | #endif | |
3328 | ||
3329 | \f | |
3330 | ||
3331 | /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for | |
3332 | and mips-tdump.c to print them out. | |
3333 | ||
3334 | These must match the corresponding definitions in gdb/mipsread.c. | |
3335 | Unfortunately, gcc and gdb do not currently share any directories. */ | |
3336 | ||
3337 | #define CODE_MASK 0x8F300 | |
3338 | #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) | |
3339 | #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) | |
3340 | #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) |