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e75b25e7 MM |
1 | /* Definitions of target machine for GNU compiler. MIPS version. |
2 | Contributed by A. Lichnewsky, lich@inria.inria.fr | |
3 | Changed by Michael Meissner, meissner@osf.org | |
876c09d3 JW |
4 | 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and |
5 | Brendan Eich, brendan@microunity.com. | |
46299de9 | 6 | Copyright (C) 1989, 90, 91, 92, 93, 94, 1995 Free Software Foundation, Inc. |
e75b25e7 MM |
7 | |
8 | This file is part of GNU CC. | |
9 | ||
10 | GNU CC is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2, or (at your option) | |
13 | any later version. | |
14 | ||
15 | GNU CC is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with GNU CC; see the file COPYING. If not, write to | |
22 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
23 | ||
24 | ||
e75b25e7 MM |
25 | /* Standard GCC variables that we reference. */ |
26 | ||
0fb5ac6f MM |
27 | extern char *asm_file_name; |
28 | extern char call_used_regs[]; | |
29 | extern int current_function_calls_alloca; | |
30 | extern int flag_omit_frame_pointer; | |
31 | extern int frame_pointer_needed; | |
32 | extern char *language_string; | |
33 | extern int may_call_alloca; | |
34 | extern int optimize; | |
35 | extern char **save_argv; | |
36 | extern int target_flags; | |
37 | extern char *version_string; | |
e75b25e7 MM |
38 | |
39 | /* MIPS external variables defined in mips.c. */ | |
40 | ||
41 | /* comparison type */ | |
42 | enum cmp_type { | |
876c09d3 JW |
43 | CMP_SI, /* compare four byte integers */ |
44 | CMP_DI, /* compare eight byte integers */ | |
e75b25e7 MM |
45 | CMP_SF, /* compare single precision floats */ |
46 | CMP_DF, /* compare double precision floats */ | |
47 | CMP_MAX /* max comparison type */ | |
48 | }; | |
49 | ||
50 | /* types of delay slot */ | |
51 | enum delay_type { | |
52 | DELAY_NONE, /* no delay slot */ | |
53 | DELAY_LOAD, /* load from memory delay */ | |
34b650b3 MM |
54 | DELAY_HILO, /* move from/to hi/lo registers */ |
55 | DELAY_FCMP /* delay after doing c.<xx>.{d,s} */ | |
e75b25e7 MM |
56 | }; |
57 | ||
58 | /* Which processor to schedule for. Since there is no difference between | |
59 | a R2000 and R3000 in terms of the scheduler, we collapse them into | |
4a392643 RS |
60 | just an R3000. The elements of the enumeration must match exactly |
61 | the cpu attribute in the mips.md machine description. */ | |
e75b25e7 MM |
62 | |
63 | enum processor_type { | |
64 | PROCESSOR_DEFAULT, | |
65 | PROCESSOR_R3000, | |
66 | PROCESSOR_R6000, | |
876c09d3 | 67 | PROCESSOR_R4000, |
516a2dfd | 68 | PROCESSOR_R4600, |
053665d7 | 69 | PROCESSOR_R4650, |
516a2dfd | 70 | PROCESSOR_R8000 |
e75b25e7 MM |
71 | }; |
72 | ||
4a392643 RS |
73 | /* Recast the cpu class to be the cpu attribute. */ |
74 | #define mips_cpu_attr ((enum attr_cpu)mips_cpu) | |
75 | ||
45ceb85d RS |
76 | /* Whether to emit abicalls code sequences or not. */ |
77 | ||
78 | enum mips_abicalls_type { | |
79 | MIPS_ABICALLS_NO, | |
80 | MIPS_ABICALLS_YES | |
81 | }; | |
82 | ||
83 | /* Recast the abicalls class to be the abicalls attribute. */ | |
84 | #define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls) | |
85 | ||
b7d3fabe RS |
86 | /* Which type of block move to do (whether or not the last store is |
87 | split out so it can fill a branch delay slot). */ | |
88 | ||
89 | enum block_move_type { | |
90 | BLOCK_MOVE_NORMAL, /* generate complete block move */ | |
91 | BLOCK_MOVE_NOT_LAST, /* generate all but last store */ | |
92 | BLOCK_MOVE_LAST /* generate just the last store */ | |
93 | }; | |
94 | ||
e75b25e7 MM |
95 | extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */ |
96 | extern char mips_print_operand_punct[]; /* print_operand punctuation chars */ | |
97 | extern char *current_function_name; /* current function being compiled */ | |
98 | extern char *current_function_file; /* filename current function is in */ | |
99 | extern int num_source_filenames; /* current .file # */ | |
100 | extern int inside_function; /* != 0 if inside of a function */ | |
101 | extern int ignore_line_number; /* != 0 if we are to ignore next .loc */ | |
102 | extern int file_in_function_warning; /* warning given about .file in func */ | |
103 | extern int sdb_label_count; /* block start/end next label # */ | |
104 | extern int mips_section_threshold; /* # bytes of data/sdata cutoff */ | |
105 | extern int g_switch_value; /* value of the -G xx switch */ | |
106 | extern int g_switch_set; /* whether -G xx was passed. */ | |
107 | extern int sym_lineno; /* sgi next label # for each stmt */ | |
108 | extern int set_noreorder; /* # of nested .set noreorder's */ | |
109 | extern int set_nomacro; /* # of nested .set nomacro's */ | |
110 | extern int set_noat; /* # of nested .set noat's */ | |
111 | extern int set_volatile; /* # of nested .set volatile's */ | |
e75b25e7 MM |
112 | extern int mips_branch_likely; /* emit 'l' after br (branch likely) */ |
113 | extern int mips_dbx_regno[]; /* Map register # to debug register # */ | |
e75b25e7 MM |
114 | extern struct rtx_def *branch_cmp[2]; /* operands for compare */ |
115 | extern enum cmp_type branch_type; /* what type of branch to use */ | |
116 | extern enum processor_type mips_cpu; /* which cpu are we scheduling for */ | |
45ceb85d | 117 | extern enum mips_abicalls_type mips_abicalls;/* for svr4 abi pic calls */ |
e75b25e7 MM |
118 | extern int mips_isa; /* architectural level */ |
119 | extern char *mips_cpu_string; /* for -mcpu=<xxx> */ | |
516a2dfd | 120 | extern char *mips_isa_string; /* for -mips{1,2,3,4} */ |
e75b25e7 MM |
121 | extern int dslots_load_total; /* total # load related delay slots */ |
122 | extern int dslots_load_filled; /* # filled load delay slots */ | |
123 | extern int dslots_jump_total; /* total # jump related delay slots */ | |
124 | extern int dslots_jump_filled; /* # filled jump delay slots */ | |
125 | extern int dslots_number_nops; /* # of nops needed by previous insn */ | |
126 | extern int num_refs[3]; /* # 1/2/3 word references */ | |
127 | extern struct rtx_def *mips_load_reg; /* register to check for load delay */ | |
128 | extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */ | |
129 | extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */ | |
130 | extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */ | |
92544bdf | 131 | extern struct rtx_def *embedded_pic_fnaddr_rtx; /* function address */ |
e75b25e7 MM |
132 | |
133 | /* Functions within mips.c that we reference. */ | |
134 | ||
135 | extern void abort_with_insn (); | |
136 | extern int arith32_operand (); | |
137 | extern int arith_operand (); | |
e75b25e7 | 138 | extern int cmp_op (); |
7bea35e7 MM |
139 | extern long compute_frame_size (); |
140 | extern int epilogue_reg_mentioned_p (); | |
e75b25e7 MM |
141 | extern void expand_block_move (); |
142 | extern int equality_op (); | |
65437fe8 | 143 | extern void final_prescan_insn (); |
e75b25e7 MM |
144 | extern struct rtx_def * function_arg (); |
145 | extern void function_arg_advance (); | |
146 | extern int function_arg_partial_nregs (); | |
147 | extern void function_epilogue (); | |
148 | extern void function_prologue (); | |
149 | extern void gen_conditional_branch (); | |
34b650b3 | 150 | extern struct rtx_def * gen_int_relational (); |
e75b25e7 MM |
151 | extern void init_cumulative_args (); |
152 | extern int large_int (); | |
e75b25e7 MM |
153 | extern int mips_address_cost (); |
154 | extern void mips_asm_file_end (); | |
155 | extern void mips_asm_file_start (); | |
156 | extern int mips_const_double_ok (); | |
e75b25e7 MM |
157 | extern void mips_count_memory_refs (); |
158 | extern int mips_debugger_offset (); | |
0fb5ac6f | 159 | extern void mips_declare_object (); |
e75b25e7 | 160 | extern int mips_epilogue_delay_slots (); |
0fb5ac6f MM |
161 | extern void mips_expand_epilogue (); |
162 | extern void mips_expand_prologue (); | |
e75b25e7 MM |
163 | extern char *mips_fill_delay_slot (); |
164 | extern char *mips_move_1word (); | |
165 | extern char *mips_move_2words (); | |
dbe9742d | 166 | extern void mips_output_double (); |
e75b25e7 | 167 | extern int mips_output_external (); |
dbe9742d | 168 | extern void mips_output_float (); |
e75b25e7 MM |
169 | extern void mips_output_filename (); |
170 | extern void mips_output_lineno (); | |
d26e29e1 | 171 | extern char *output_block_move (); |
e75b25e7 | 172 | extern void override_options (); |
34b650b3 | 173 | extern int pc_or_label_operand (); |
e75b25e7 MM |
174 | extern void print_operand_address (); |
175 | extern void print_operand (); | |
176 | extern void print_options (); | |
177 | extern int reg_or_0_operand (); | |
0fb5ac6f | 178 | extern int simple_epilogue_p (); |
e75b25e7 MM |
179 | extern int simple_memory_operand (); |
180 | extern int small_int (); | |
181 | extern void trace(); | |
182 | extern int uns_arith_operand (); | |
92544bdf ILT |
183 | extern struct rtx_def * embedded_pic_offset (); |
184 | extern void mips_finalize_pic (); | |
e75b25e7 | 185 | |
0fb5ac6f MM |
186 | /* Recognition functions that return if a condition is true. */ |
187 | extern int address_operand (); | |
188 | extern int const_double_operand (); | |
189 | extern int const_int_operand (); | |
190 | extern int general_operand (); | |
191 | extern int immediate_operand (); | |
192 | extern int memory_address_p (); | |
193 | extern int memory_operand (); | |
194 | extern int nonimmediate_operand (); | |
195 | extern int nonmemory_operand (); | |
196 | extern int register_operand (); | |
197 | extern int scratch_operand (); | |
198 | ||
199 | /* Functions to change what output section we are using. */ | |
e75b25e7 MM |
200 | extern void data_section (); |
201 | extern void rdata_section (); | |
202 | extern void readonly_data_section (); | |
203 | extern void sdata_section (); | |
204 | extern void text_section (); | |
205 | ||
0fb5ac6f MM |
206 | /* Functions in the rest of the compiler that we reference. */ |
207 | extern void abort_with_insn (); | |
208 | extern void debug_rtx (); | |
209 | extern void fatal_io_error (); | |
210 | extern int get_frame_size (); | |
211 | extern int offsettable_address_p (); | |
212 | extern void output_address (); | |
213 | extern char *permalloc (); | |
214 | extern int reg_mentioned_p (); | |
215 | ||
216 | /* Functions in the standard library that we reference. */ | |
0fb5ac6f MM |
217 | extern int atoi (); |
218 | extern char *getenv (); | |
219 | extern char *mktemp (); | |
220 | ||
221 | ||
31c714e3 MM |
222 | /* Stubs for half-pic support if not OSF/1 reference platform. */ |
223 | ||
224 | #ifndef HALF_PIC_P | |
225 | #define HALF_PIC_P() 0 | |
4a392643 RS |
226 | #define HALF_PIC_NUMBER_PTRS 0 |
227 | #define HALF_PIC_NUMBER_REFS 0 | |
31c714e3 | 228 | #define HALF_PIC_ENCODE(DECL) |
f3b39eba | 229 | #define HALF_PIC_DECLARE(NAME) |
31c714e3 MM |
230 | #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.") |
231 | #define HALF_PIC_ADDRESS_P(X) 0 | |
d26e29e1 MM |
232 | #define HALF_PIC_PTR(X) X |
233 | #define HALF_PIC_FINISH(STREAM) | |
31c714e3 MM |
234 | #endif |
235 | ||
149e4e00 MM |
236 | \f |
237 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
238 | ||
239 | /* Macros used in the machine description to test the flags. */ | |
240 | ||
241 | /* Bits for real switches */ | |
242 | #define MASK_INT64 0x00000001 /* ints are 64 bits */ | |
876c09d3 | 243 | #define MASK_LONG64 0x00000002 /* longs and pointers are 64 bits */ |
923d630e | 244 | #define MASK_UNUSED 0x00000004 |
149e4e00 MM |
245 | #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */ |
246 | #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */ | |
247 | #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */ | |
248 | #define MASK_STATS 0x00000040 /* print statistics to stderr */ | |
249 | #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/ | |
250 | #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */ | |
251 | #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */ | |
252 | #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */ | |
253 | #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/ | |
254 | #define MASK_LONG_CALLS 0x00001000 /* Always call through a register */ | |
2370b831 | 255 | #define MASK_64BIT 0x00002000 /* Use 64 bit GP registers and insns */ |
e0bfcea5 | 256 | #define MASK_EMBEDDED_PIC 0x00004000 /* Generate embedded PIC code */ |
365c6a0b | 257 | #define MASK_EMBEDDED_DATA 0x00008000 /* Reduce RAM usage, not fast code */ |
96abdcb1 | 258 | #define MASK_BIG_ENDIAN 0x00010000 /* Generate big endian code */ |
46299de9 ILT |
259 | #define MASK_SINGLE_FLOAT 0x00020000 /* Only single precision FPU. */ |
260 | #define MASK_MAD 0x00040000 /* Generate mad/madu as on 4650. */ | |
365c6a0b | 261 | #define MASK_UNUSED1 0x00080000 |
149e4e00 MM |
262 | |
263 | /* Dummy switches used only in spec's*/ | |
264 | #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */ | |
265 | ||
266 | /* Debug switches, not documented */ | |
267 | #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */ | |
268 | #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */ | |
269 | #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */ | |
270 | #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */ | |
271 | #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */ | |
272 | #define MASK_DEBUG_E 0x02000000 /* function_arg debug */ | |
273 | #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */ | |
274 | #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */ | |
275 | #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */ | |
276 | #define MASK_DEBUG_I 0x00200000 /* unused */ | |
277 | #define MASK_DEBUG_J 0x00100000 /* unused */ | |
278 | ||
279 | /* r4000 64 bit sizes */ | |
280 | #define TARGET_INT64 (target_flags & MASK_INT64) | |
281 | #define TARGET_LONG64 (target_flags & MASK_LONG64) | |
149e4e00 | 282 | #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64) |
876c09d3 | 283 | #define TARGET_64BIT (target_flags & MASK_64BIT) |
149e4e00 MM |
284 | |
285 | /* Mips vs. GNU assembler */ | |
286 | #define TARGET_GAS (target_flags & MASK_GAS) | |
287 | #define TARGET_UNIX_ASM (!TARGET_GAS) | |
288 | #define TARGET_MIPS_AS TARGET_UNIX_ASM | |
289 | ||
290 | /* Debug Mode */ | |
291 | #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG) | |
292 | #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A) | |
293 | #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B) | |
294 | #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C) | |
295 | #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D) | |
296 | #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E) | |
297 | #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F) | |
298 | #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G) | |
299 | #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H) | |
300 | #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I) | |
301 | #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J) | |
302 | ||
303 | /* Reg. Naming in .s ($21 vs. $a0) */ | |
304 | #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS) | |
305 | ||
306 | /* Optimize for Sdata/Sbss */ | |
307 | #define TARGET_GP_OPT (target_flags & MASK_GPOPT) | |
308 | ||
309 | /* print program statistics */ | |
310 | #define TARGET_STATS (target_flags & MASK_STATS) | |
311 | ||
312 | /* call memcpy instead of inline code */ | |
313 | #define TARGET_MEMCPY (target_flags & MASK_MEMCPY) | |
314 | ||
315 | /* .abicalls, etc from Pyramid V.4 */ | |
316 | #define TARGET_ABICALLS (target_flags & MASK_ABICALLS) | |
317 | ||
318 | /* OSF pic references to externs */ | |
319 | #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC) | |
320 | ||
321 | /* software floating point */ | |
322 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) | |
323 | #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) | |
324 | ||
325 | /* always call through a register */ | |
326 | #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS) | |
327 | ||
e0bfcea5 ILT |
328 | /* generate embedded PIC code; |
329 | requires gas. */ | |
330 | #define TARGET_EMBEDDED_PIC (target_flags & MASK_EMBEDDED_PIC) | |
331 | ||
365c6a0b JW |
332 | /* for embedded systems, optimize for |
333 | reduced RAM space instead of for | |
334 | fastest code. */ | |
335 | #define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA) | |
336 | ||
96abdcb1 ILT |
337 | /* generate big endian code. */ |
338 | #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN) | |
339 | ||
46299de9 ILT |
340 | #define TARGET_SINGLE_FLOAT (target_flags & MASK_SINGLE_FLOAT) |
341 | #define TARGET_DOUBLE_FLOAT (! TARGET_SINGLE_FLOAT) | |
342 | ||
343 | #define TARGET_MAD (target_flags & MASK_MAD) | |
344 | ||
149e4e00 MM |
345 | /* Macro to define tables used to set the flags. |
346 | This is a list in braces of pairs in braces, | |
347 | each pair being { "NAME", VALUE } | |
348 | where VALUE is the bits to set or minus the bits to clear. | |
349 | An empty string NAME is used to identify the default VALUE. */ | |
350 | ||
351 | #define TARGET_SWITCHES \ | |
352 | { \ | |
353 | {"int64", MASK_INT64 | MASK_LONG64}, \ | |
354 | {"long64", MASK_LONG64}, \ | |
149e4e00 MM |
355 | {"mips-as", -MASK_GAS}, \ |
356 | {"gas", MASK_GAS}, \ | |
357 | {"rnames", MASK_NAME_REGS}, \ | |
358 | {"no-rnames", -MASK_NAME_REGS}, \ | |
359 | {"gpOPT", MASK_GPOPT}, \ | |
360 | {"gpopt", MASK_GPOPT}, \ | |
361 | {"no-gpOPT", -MASK_GPOPT}, \ | |
362 | {"no-gpopt", -MASK_GPOPT}, \ | |
363 | {"stats", MASK_STATS}, \ | |
364 | {"no-stats", -MASK_STATS}, \ | |
365 | {"memcpy", MASK_MEMCPY}, \ | |
366 | {"no-memcpy", -MASK_MEMCPY}, \ | |
367 | {"mips-tfile", MASK_MIPS_TFILE}, \ | |
368 | {"no-mips-tfile", -MASK_MIPS_TFILE}, \ | |
369 | {"soft-float", MASK_SOFT_FLOAT}, \ | |
370 | {"hard-float", -MASK_SOFT_FLOAT}, \ | |
371 | {"fp64", MASK_FLOAT64}, \ | |
372 | {"fp32", -MASK_FLOAT64}, \ | |
2370b831 JW |
373 | {"gp64", MASK_64BIT}, \ |
374 | {"gp32", -MASK_64BIT}, \ | |
149e4e00 MM |
375 | {"abicalls", MASK_ABICALLS}, \ |
376 | {"no-abicalls", -MASK_ABICALLS}, \ | |
377 | {"half-pic", MASK_HALF_PIC}, \ | |
378 | {"no-half-pic", -MASK_HALF_PIC}, \ | |
379 | {"long-calls", MASK_LONG_CALLS}, \ | |
380 | {"no-long-calls", -MASK_LONG_CALLS}, \ | |
e0bfcea5 ILT |
381 | {"embedded-pic", MASK_EMBEDDED_PIC}, \ |
382 | {"no-embedded-pic", -MASK_EMBEDDED_PIC}, \ | |
365c6a0b JW |
383 | {"embedded-data", MASK_EMBEDDED_DATA}, \ |
384 | {"no-embedded-data", -MASK_EMBEDDED_DATA}, \ | |
96abdcb1 ILT |
385 | {"eb", MASK_BIG_ENDIAN}, \ |
386 | {"el", -MASK_BIG_ENDIAN}, \ | |
46299de9 ILT |
387 | {"single-float", MASK_SINGLE_FLOAT}, \ |
388 | {"double-float", -MASK_SINGLE_FLOAT}, \ | |
389 | {"mad", MASK_MAD}, \ | |
390 | {"no-mad", -MASK_MAD}, \ | |
391 | {"4650", MASK_MAD | MASK_SINGLE_FLOAT}, \ | |
149e4e00 MM |
392 | {"debug", MASK_DEBUG}, \ |
393 | {"debuga", MASK_DEBUG_A}, \ | |
394 | {"debugb", MASK_DEBUG_B}, \ | |
395 | {"debugc", MASK_DEBUG_C}, \ | |
396 | {"debugd", MASK_DEBUG_D}, \ | |
397 | {"debuge", MASK_DEBUG_E}, \ | |
398 | {"debugf", MASK_DEBUG_F}, \ | |
399 | {"debugg", MASK_DEBUG_G}, \ | |
400 | {"debugh", MASK_DEBUG_H}, \ | |
401 | {"debugi", MASK_DEBUG_I}, \ | |
402 | {"debugj", MASK_DEBUG_J}, \ | |
96abdcb1 ILT |
403 | {"", (TARGET_DEFAULT \ |
404 | | TARGET_CPU_DEFAULT \ | |
405 | | TARGET_ENDIAN_DEFAULT)} \ | |
149e4e00 MM |
406 | } |
407 | ||
408 | /* Default target_flags if no switches are specified */ | |
409 | ||
410 | #ifndef TARGET_DEFAULT | |
411 | #define TARGET_DEFAULT 0 | |
412 | #endif | |
413 | ||
404f986e MM |
414 | #ifndef TARGET_CPU_DEFAULT |
415 | #define TARGET_CPU_DEFAULT 0 | |
416 | #endif | |
417 | ||
96abdcb1 ILT |
418 | #ifndef TARGET_ENDIAN_DEFAULT |
419 | #ifndef DECSTATION | |
420 | #define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN | |
421 | #else | |
422 | #define TARGET_ENDIAN_DEFAULT 0 | |
423 | #endif | |
424 | #endif | |
425 | ||
149e4e00 MM |
426 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
427 | command options that have values. Its definition is an | |
428 | initializer with a subgrouping for each command option. | |
429 | ||
430 | Each subgrouping contains a string constant, that defines the | |
431 | fixed part of the option name, and the address of a variable. | |
432 | The variable, type `char *', is set to the variable part of the | |
433 | given option if the fixed part matches. The actual option name | |
434 | is made by appending `-m' to the specified name. | |
435 | ||
436 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
437 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
438 | will be set to the string `"512"'. | |
439 | ||
440 | extern char *m88k_short_data; | |
441 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
442 | ||
443 | #define TARGET_OPTIONS \ | |
444 | { \ | |
445 | { "cpu=", &mips_cpu_string }, \ | |
446 | { "ips", &mips_isa_string } \ | |
447 | } | |
448 | ||
449 | /* Macros to decide whether certain features are available or not, | |
450 | depending on the instruction set architecture level. */ | |
451 | ||
452 | #define BRANCH_LIKELY_P() (mips_isa >= 2) | |
149e4e00 MM |
453 | #define HAVE_SQRT_P() (mips_isa >= 2) |
454 | ||
516a2dfd JW |
455 | /* CC1_SPEC causes -mips3 and -mips4 to set -mfp64 and -mgp64; -mips1 or |
456 | -mips2 sets -mfp32 and -mgp32. This can be overridden by an explicit | |
2370b831 JW |
457 | -mfp32, -mfp64, -mgp32 or -mgp64. -mfp64 sets MASK_FLOAT64 in |
458 | target_flags, and -mgp64 sets MASK_64BIT. | |
876c09d3 | 459 | |
2370b831 JW |
460 | Setting MASK_64BIT in target_flags will cause gcc to assume that |
461 | registers are 64 bits wide. int, long and void * will be 32 bit; | |
462 | this may be changed with -mint64 or -mlong64. | |
876c09d3 | 463 | |
2370b831 JW |
464 | The gen* programs link code that refers to MASK_64BIT. They don't |
465 | actually use the information in target_flags; they just refer to | |
466 | it. */ | |
e75b25e7 MM |
467 | \f |
468 | /* Switch Recognition by gcc.c. Add -G xx support */ | |
469 | ||
470 | #ifdef SWITCH_TAKES_ARG | |
471 | #undef SWITCH_TAKES_ARG | |
472 | #endif | |
473 | ||
474 | #define SWITCH_TAKES_ARG(CHAR) \ | |
475 | ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \ | |
476 | || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \ | |
477 | || (CHAR) == 'I' || (CHAR) == 'm' \ | |
478 | || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G') | |
479 | ||
480 | /* Sometimes certain combinations of command options do not make sense | |
481 | on a particular target machine. You can define a macro | |
482 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
483 | defined, is executed once just after all the command options have | |
484 | been parsed. | |
485 | ||
486 | On the MIPS, it is used to handle -G. We also use it to set up all | |
487 | of the tables referenced in the other macros. */ | |
488 | ||
489 | #define OVERRIDE_OPTIONS override_options () | |
490 | ||
491 | /* Zero or more C statements that may conditionally modify two | |
492 | variables `fixed_regs' and `call_used_regs' (both of type `char | |
493 | []') after they have been initialized from the two preceding | |
494 | macros. | |
495 | ||
496 | This is necessary in case the fixed or call-clobbered registers | |
497 | depend on target flags. | |
498 | ||
499 | You need not define this macro if it has no work to do. | |
500 | ||
501 | If the usage of an entire class of registers depends on the target | |
502 | flags, you may indicate this to GCC by using this macro to modify | |
503 | `fixed_regs' and `call_used_regs' to 1 for each of the registers in | |
504 | the classes which should not be used by GCC. Also define the macro | |
505 | `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a | |
506 | letter for a class that shouldn't be used. | |
507 | ||
508 | (However, if this class is not included in `GENERAL_REGS' and all | |
509 | of the insn patterns whose constraints permit this class are | |
510 | controlled by target switches, then GCC will automatically avoid | |
511 | using these registers when the target switches are opposed to | |
512 | them.) */ | |
513 | ||
514 | #define CONDITIONAL_REGISTER_USAGE \ | |
515 | do \ | |
516 | { \ | |
517 | if (!TARGET_HARD_FLOAT) \ | |
518 | { \ | |
519 | int regno; \ | |
520 | \ | |
521 | for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \ | |
522 | fixed_regs[regno] = call_used_regs[regno] = 1; \ | |
523 | } \ | |
516a2dfd | 524 | SUBTARGET_CONDITIONAL_REGISTER_USAGE \ |
e75b25e7 MM |
525 | } \ |
526 | while (0) | |
527 | ||
516a2dfd JW |
528 | /* This is meant to be redefined in the host dependent files */ |
529 | #define SUBTARGET_CONDITIONAL_REGISTER_USAGE | |
530 | ||
7be1e523 RK |
531 | /* Show we can debug even without a frame pointer. */ |
532 | #define CAN_DEBUG_WITHOUT_FP | |
533 | \f | |
e75b25e7 MM |
534 | /* Complain about missing specs and predefines that should be defined in each |
535 | of the target tm files to override the defaults. This is mostly a place- | |
536 | holder until I can get each of the files updated [mm]. */ | |
537 | ||
538 | #if defined(OSF_OS) \ | |
539 | || defined(DECSTATION) \ | |
540 | || defined(SGI_TARGET) \ | |
541 | || defined(MIPS_NEWS) \ | |
542 | || defined(MIPS_SYSV) \ | |
59c94430 | 543 | || defined(MIPS_SVR4) \ |
e75b25e7 MM |
544 | || defined(MIPS_BSD43) |
545 | ||
546 | #ifndef CPP_PREDEFINES | |
547 | #error "Define CPP_PREDEFINES in the appropriate tm.h file" | |
548 | #endif | |
549 | ||
e75b25e7 MM |
550 | #ifndef LIB_SPEC |
551 | #error "Define LIB_SPEC in the appropriate tm.h file" | |
552 | #endif | |
553 | ||
554 | #ifndef STARTFILE_SPEC | |
555 | #error "Define STARTFILE_SPEC in the appropriate tm.h file" | |
556 | #endif | |
557 | ||
558 | #ifndef MACHINE_TYPE | |
559 | #error "Define MACHINE_TYPE in the appropriate tm.h file" | |
560 | #endif | |
561 | #endif | |
562 | ||
59c94430 MM |
563 | /* Tell collect what flags to pass to nm. */ |
564 | #ifndef NM_FLAGS | |
565 | #define NM_FLAGS "-Bp" | |
566 | #endif | |
567 | ||
e75b25e7 MM |
568 | \f |
569 | /* Names to predefine in the preprocessor for this target machine. */ | |
570 | ||
571 | #ifndef CPP_PREDEFINES | |
d4099651 | 572 | #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \ |
65c42379 DE |
573 | -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \ |
574 | -Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)" | |
e75b25e7 MM |
575 | #endif |
576 | ||
577 | /* Extra switches sometimes passed to the assembler. */ | |
578 | ||
579 | #ifndef ASM_SPEC | |
bb98bc58 JW |
580 | #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0 |
581 | /* GAS */ | |
582 | #define ASM_SPEC "\ | |
583 | %{mmips-as: \ | |
584 | %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \ | |
585 | %{pipe: %e-pipe is not supported.} \ | |
586 | %{K}} \ | |
2507a276 | 587 | %{!mmips-as: \ |
46299de9 | 588 | %{mcpu=*} %{m4650} %{mmad:-m4650}} \ |
516a2dfd | 589 | %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} %{v} \ |
bb98bc58 JW |
590 | %{noasmopt:-O0} \ |
591 | %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \ | |
592 | %{g} %{g0} %{g1} %{g2} %{g3} \ | |
593 | %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \ | |
594 | %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \ | |
595 | %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \ | |
e0bfcea5 ILT |
596 | %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \ |
597 | %{membedded-pic}" | |
bb98bc58 JW |
598 | |
599 | #else | |
600 | /* not GAS */ | |
31c714e3 MM |
601 | #define ASM_SPEC "\ |
602 | %{!mgas: \ | |
bb98bc58 | 603 | %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \ |
31c714e3 | 604 | %{pipe: %e-pipe is not supported.} \ |
bb98bc58 | 605 | %{K}} \ |
2507a276 | 606 | %{mgas: \ |
46299de9 | 607 | %{mcpu=*} %{m4650} %{mmad:-m4650}} \ |
516a2dfd | 608 | %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} %{v} \ |
bb98bc58 JW |
609 | %{noasmopt:-O0} \ |
610 | %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \ | |
611 | %{g} %{g0} %{g1} %{g2} %{g3} \ | |
612 | %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \ | |
613 | %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \ | |
614 | %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \ | |
e0bfcea5 ILT |
615 | %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \ |
616 | %{membedded-pic}" | |
bb98bc58 JW |
617 | |
618 | #endif | |
619 | #endif /* ASM_SPEC */ | |
e75b25e7 MM |
620 | |
621 | /* Specify to run a post-processor, mips-tfile after the assembler | |
622 | has run to stuff the mips debug information into the object file. | |
623 | This is needed because the $#!%^ MIPS assembler provides no way | |
a813fadf MM |
624 | of specifying such information in the assembly file. If we are |
625 | cross compiling, disable mips-tfile unless the user specifies | |
626 | -mmips-tfile. */ | |
e75b25e7 MM |
627 | |
628 | #ifndef ASM_FINAL_SPEC | |
bb98bc58 JW |
629 | #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0 |
630 | /* GAS */ | |
31c714e3 | 631 | #define ASM_FINAL_SPEC "\ |
149e4e00 | 632 | %{mmips-as: %{!mno-mips-tfile: \ |
31c714e3 MM |
633 | \n mips-tfile %{v*: -v} \ |
634 | %{K: -I %b.o~} \ | |
635 | %{!K: %{save-temps: -I %b.o~}} \ | |
ab78d4a8 | 636 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ |
31c714e3 | 637 | %{.s:%i} %{!.s:%g.s}}}" |
a813fadf | 638 | |
bb98bc58 JW |
639 | #else |
640 | /* not GAS */ | |
a813fadf | 641 | #define ASM_FINAL_SPEC "\ |
149e4e00 | 642 | %{!mgas: %{!mno-mips-tfile: \ |
a813fadf MM |
643 | \n mips-tfile %{v*: -v} \ |
644 | %{K: -I %b.o~} \ | |
645 | %{!K: %{save-temps: -I %b.o~}} \ | |
646 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ | |
647 | %{.s:%i} %{!.s:%g.s}}}" | |
648 | ||
bb98bc58 | 649 | #endif |
a813fadf | 650 | #endif /* ASM_FINAL_SPEC */ |
e75b25e7 MM |
651 | |
652 | /* Redefinition of libraries used. Mips doesn't support normal | |
653 | UNIX style profiling via calling _mcount. It does offer | |
654 | profiling that samples the PC, so do what we can... */ | |
655 | ||
656 | #ifndef LIB_SPEC | |
657 | #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc" | |
658 | #endif | |
659 | ||
31c714e3 | 660 | /* Extra switches sometimes passed to the linker. */ |
bb98bc58 JW |
661 | /* ??? The bestGnum will never be passed to the linker, because the gcc driver |
662 | will interpret it as a -b option. */ | |
e75b25e7 MM |
663 | |
664 | #ifndef LINK_SPEC | |
31c714e3 | 665 | #define LINK_SPEC "\ |
516a2dfd | 666 | %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \ |
bb98bc58 JW |
667 | %{bestGnum} %{shared} %{non_shared}" |
668 | #endif /* LINK_SPEC defined */ | |
e75b25e7 MM |
669 | |
670 | /* Specs for the compiler proper */ | |
671 | ||
672 | #ifndef CC1_SPEC | |
31c714e3 | 673 | #define CC1_SPEC "\ |
31c714e3 | 674 | %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \ |
46299de9 ILT |
675 | %{mips1:-mfp32 -mgp32}%{mips2:-mfp32 -mgp32}\ |
676 | %{mips3:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \ | |
516a2dfd | 677 | %{mips4:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \ |
46299de9 ILT |
678 | %{mfp64:%{msingle-float:%emay not use both -mfp64 and -msingle-float}} \ |
679 | %{mfp64:%{m4650:%emay not use both -mfp64 and -m4650}} \ | |
680 | %{m4650:-mcpu=r4650} \ | |
96abdcb1 | 681 | %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} \ |
31c714e3 MM |
682 | %{pic-none: -mno-half-pic} \ |
683 | %{pic-lib: -mhalf-pic} \ | |
684 | %{pic-extern: -mhalf-pic} \ | |
685 | %{pic-calls: -mhalf-pic} \ | |
686 | %{save-temps: }" | |
e75b25e7 MM |
687 | #endif |
688 | ||
e75b25e7 MM |
689 | /* Preprocessor specs */ |
690 | ||
691 | #ifndef CPP_SPEC | |
31c714e3 | 692 | #define CPP_SPEC "\ |
31c714e3 MM |
693 | %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ |
694 | %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ | |
695 | %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ | |
696 | %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \ | |
697 | %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ | |
6630a026 | 698 | %{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ |
876c09d3 JW |
699 | %{!.S:%{!.s: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}} \ |
700 | %{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \ | |
2569f425 | 701 | %{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \ |
96abdcb1 | 702 | %{mips3:-U__mips -D__mips=3} \ |
516a2dfd | 703 | %{mips4:-U__mips -D__mips=4} \ |
96abdcb1 ILT |
704 | %{EB:-UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -D_MIPSEB -D__MIPSEB -D__MIPSEB__ %{!ansi:-DMIPSEB}} \ |
705 | %{EL:-UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -D_MIPSEL -D__MIPSEL -D__MIPSEL__ %{!ansi:-DMIPSEL}}" | |
e75b25e7 MM |
706 | #endif |
707 | ||
708 | /* If defined, this macro is an additional prefix to try after | |
709 | `STANDARD_EXEC_PREFIX'. */ | |
710 | ||
711 | #ifndef MD_EXEC_PREFIX | |
31c714e3 | 712 | #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/" |
e75b25e7 MM |
713 | #endif |
714 | ||
59c94430 MM |
715 | #ifndef MD_STARTFILE_PREFIX |
716 | #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" | |
717 | #endif | |
718 | ||
e75b25e7 MM |
719 | \f |
720 | /* Print subsidiary information on the compiler version in use. */ | |
721 | ||
42dee4c7 | 722 | #define MIPS_VERSION "[AL 1.1, MM 40]" |
e75b25e7 MM |
723 | |
724 | #ifndef MACHINE_TYPE | |
725 | #define MACHINE_TYPE "BSD Mips" | |
726 | #endif | |
727 | ||
728 | #ifndef TARGET_VERSION_INTERNAL | |
729 | #define TARGET_VERSION_INTERNAL(STREAM) \ | |
730 | fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE) | |
731 | #endif | |
732 | ||
733 | #ifndef TARGET_VERSION | |
734 | #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr) | |
735 | #endif | |
736 | ||
737 | \f | |
738 | #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ | |
739 | #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */ | |
740 | #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ | |
741 | ||
742 | #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ | |
59c94430 | 743 | #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG) |
e75b25e7 MM |
744 | #endif |
745 | ||
59c94430 MM |
746 | /* By default, turn on GDB extensions. */ |
747 | #define DEFAULT_GDB_EXTENSIONS 1 | |
748 | ||
e75b25e7 MM |
749 | /* If we are passing smuggling stabs through the MIPS ECOFF object |
750 | format, put a comment in front of the .stab<x> operation so | |
751 | that the MIPS assembler does not choke. The mips-tfile program | |
752 | will correctly put the stab into the object file. */ | |
753 | ||
754 | #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs") | |
755 | #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn") | |
756 | #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd") | |
757 | ||
758 | /* Forward references to tags are allowed. */ | |
759 | #define SDB_ALLOW_FORWARD_REFERENCES | |
760 | ||
761 | /* Unknown tags are also allowed. */ | |
762 | #define SDB_ALLOW_UNKNOWN_REFERENCES | |
763 | ||
764 | /* On Sun 4, this limit is 2048. We use 1500 to be safe, | |
765 | since the length can run past this up to a continuation point. */ | |
766 | #define DBX_CONTIN_LENGTH 1500 | |
767 | ||
768 | ||
769 | /* How to renumber registers for dbx and gdb. */ | |
770 | #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ] | |
771 | ||
772 | ||
773 | /* Overrides for the COFF debug format. */ | |
774 | #define PUT_SDB_SCL(a) \ | |
775 | do { \ | |
776 | extern FILE *asm_out_text_file; \ | |
777 | fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \ | |
778 | } while (0) | |
779 | ||
780 | #define PUT_SDB_INT_VAL(a) \ | |
781 | do { \ | |
782 | extern FILE *asm_out_text_file; \ | |
783 | fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \ | |
784 | } while (0) | |
785 | ||
786 | #define PUT_SDB_VAL(a) \ | |
787 | do { \ | |
788 | extern FILE *asm_out_text_file; \ | |
789 | fputs ("\t.val\t", asm_out_text_file); \ | |
790 | output_addr_const (asm_out_text_file, (a)); \ | |
791 | fputc (';', asm_out_text_file); \ | |
792 | } while (0) | |
793 | ||
794 | #define PUT_SDB_DEF(a) \ | |
795 | do { \ | |
796 | extern FILE *asm_out_text_file; \ | |
b82b0773 MM |
797 | fprintf (asm_out_text_file, "\t%s.def\t", \ |
798 | (TARGET_GAS) ? "" : "#"); \ | |
e75b25e7 MM |
799 | ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ |
800 | fputc (';', asm_out_text_file); \ | |
801 | } while (0) | |
802 | ||
803 | #define PUT_SDB_PLAIN_DEF(a) \ | |
804 | do { \ | |
805 | extern FILE *asm_out_text_file; \ | |
b82b0773 MM |
806 | fprintf (asm_out_text_file, "\t%s.def\t.%s;", \ |
807 | (TARGET_GAS) ? "" : "#", (a)); \ | |
e75b25e7 MM |
808 | } while (0) |
809 | ||
810 | #define PUT_SDB_ENDEF \ | |
811 | do { \ | |
812 | extern FILE *asm_out_text_file; \ | |
813 | fprintf (asm_out_text_file, "\t.endef\n"); \ | |
814 | } while (0) | |
815 | ||
816 | #define PUT_SDB_TYPE(a) \ | |
817 | do { \ | |
818 | extern FILE *asm_out_text_file; \ | |
819 | fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \ | |
820 | } while (0) | |
821 | ||
822 | #define PUT_SDB_SIZE(a) \ | |
823 | do { \ | |
824 | extern FILE *asm_out_text_file; \ | |
825 | fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \ | |
826 | } while (0) | |
827 | ||
828 | #define PUT_SDB_DIM(a) \ | |
829 | do { \ | |
830 | extern FILE *asm_out_text_file; \ | |
831 | fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \ | |
832 | } while (0) | |
833 | ||
834 | #ifndef PUT_SDB_START_DIM | |
835 | #define PUT_SDB_START_DIM \ | |
836 | do { \ | |
837 | extern FILE *asm_out_text_file; \ | |
838 | fprintf (asm_out_text_file, "\t.dim\t"); \ | |
839 | } while (0) | |
840 | #endif | |
841 | ||
842 | #ifndef PUT_SDB_NEXT_DIM | |
843 | #define PUT_SDB_NEXT_DIM(a) \ | |
844 | do { \ | |
845 | extern FILE *asm_out_text_file; \ | |
846 | fprintf (asm_out_text_file, "%d,", a); \ | |
847 | } while (0) | |
848 | #endif | |
849 | ||
850 | #ifndef PUT_SDB_LAST_DIM | |
851 | #define PUT_SDB_LAST_DIM(a) \ | |
852 | do { \ | |
853 | extern FILE *asm_out_text_file; \ | |
854 | fprintf (asm_out_text_file, "%d;", a); \ | |
855 | } while (0) | |
856 | #endif | |
857 | ||
858 | #define PUT_SDB_TAG(a) \ | |
859 | do { \ | |
860 | extern FILE *asm_out_text_file; \ | |
861 | fprintf (asm_out_text_file, "\t.tag\t"); \ | |
862 | ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ | |
863 | fputc (';', asm_out_text_file); \ | |
864 | } while (0) | |
865 | ||
866 | /* For block start and end, we create labels, so that | |
867 | later we can figure out where the correct offset is. | |
868 | The normal .ent/.end serve well enough for functions, | |
869 | so those are just commented out. */ | |
870 | ||
871 | #define PUT_SDB_BLOCK_START(LINE) \ | |
872 | do { \ | |
873 | extern FILE *asm_out_text_file; \ | |
874 | fprintf (asm_out_text_file, \ | |
b82b0773 | 875 | "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ |
e75b25e7 | 876 | sdb_label_count, \ |
b82b0773 | 877 | (TARGET_GAS) ? "" : "#", \ |
e75b25e7 MM |
878 | sdb_label_count, \ |
879 | (LINE)); \ | |
880 | sdb_label_count++; \ | |
881 | } while (0) | |
882 | ||
883 | #define PUT_SDB_BLOCK_END(LINE) \ | |
884 | do { \ | |
885 | extern FILE *asm_out_text_file; \ | |
886 | fprintf (asm_out_text_file, \ | |
b82b0773 | 887 | "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ |
e75b25e7 | 888 | sdb_label_count, \ |
b82b0773 | 889 | (TARGET_GAS) ? "" : "#", \ |
e75b25e7 MM |
890 | sdb_label_count, \ |
891 | (LINE)); \ | |
892 | sdb_label_count++; \ | |
893 | } while (0) | |
894 | ||
895 | #define PUT_SDB_FUNCTION_START(LINE) | |
896 | ||
897 | #define PUT_SDB_FUNCTION_END(LINE) | |
898 | ||
899 | #define PUT_SDB_EPILOGUE_END(NAME) | |
900 | ||
901 | #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \ | |
902 | sprintf ((BUFFER), ".%dfake", (NUMBER)); | |
903 | ||
ab78d4a8 MM |
904 | /* Correct the offset of automatic variables and arguments. Note that |
905 | the MIPS debug format wants all automatic variables and arguments | |
906 | to be in terms of the virtual frame pointer (stack pointer before | |
907 | any adjustment in the function), while the MIPS 3.0 linker wants | |
908 | the frame pointer to be the stack pointer after the initial | |
909 | adjustment. */ | |
e75b25e7 MM |
910 | |
911 | #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0) | |
912 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET) | |
913 | ||
31c714e3 MM |
914 | |
915 | /* Tell collect that the object format is ECOFF */ | |
916 | #ifndef OBJECT_FORMAT_ROSE | |
917 | #define OBJECT_FORMAT_COFF /* Object file looks like COFF */ | |
918 | #define EXTENDED_COFF /* ECOFF, not normal coff */ | |
919 | #endif | |
920 | ||
b61cccc2 RS |
921 | #if 0 /* These definitions normally have no effect because |
922 | MIPS systems define USE_COLLECT2, so | |
923 | assemble_constructor does nothing anyway. */ | |
924 | ||
b913db7d MM |
925 | /* Don't use the default definitions, because we don't have gld. |
926 | Also, we don't want stabs when generating ECOFF output. | |
927 | Instead we depend on collect to handle these. */ | |
928 | ||
929 | #define ASM_OUTPUT_CONSTRUCTOR(file, name) | |
930 | #define ASM_OUTPUT_DESTRUCTOR(file, name) | |
931 | ||
b61cccc2 | 932 | #endif /* 0 */ |
e75b25e7 MM |
933 | \f |
934 | /* Target machine storage layout */ | |
935 | ||
96abdcb1 ILT |
936 | /* Define in order to support both big and little endian float formats |
937 | in the same gcc binary. */ | |
938 | #define REAL_ARITHMETIC | |
939 | ||
e75b25e7 MM |
940 | /* Define this if most significant bit is lowest numbered |
941 | in instructions that operate on numbered bit-fields. | |
942 | */ | |
4851a75c | 943 | #define BITS_BIG_ENDIAN 0 |
e75b25e7 MM |
944 | |
945 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
96abdcb1 | 946 | #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0) |
e75b25e7 MM |
947 | |
948 | /* Define this if most significant word of a multiword number is the lowest. */ | |
96abdcb1 | 949 | #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0) |
e75b25e7 | 950 | |
96abdcb1 ILT |
951 | /* Define this to set the endianness to use in libgcc2.c, which can |
952 | not depend on target_flags. */ | |
953 | #if !defined(MIPSEL) && !defined(__MIPSEL__) | |
954 | #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
e75b25e7 | 955 | #else |
96abdcb1 | 956 | #define LIBGCC2_WORDS_BIG_ENDIAN 0 |
e75b25e7 MM |
957 | #endif |
958 | ||
31c714e3 | 959 | /* Number of bits in an addressable storage unit */ |
e75b25e7 MM |
960 | #define BITS_PER_UNIT 8 |
961 | ||
962 | /* Width in bits of a "word", which is the contents of a machine register. | |
963 | Note that this is not necessarily the width of data type `int'; | |
964 | if using 16-bit ints on a 68000, this would still be 32. | |
965 | But on a machine with 16-bit registers, this would be 16. */ | |
876c09d3 JW |
966 | #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32) |
967 | #define MAX_BITS_PER_WORD 64 | |
e75b25e7 MM |
968 | |
969 | /* Width of a word, in units (bytes). */ | |
876c09d3 | 970 | #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) |
ef0e53ce | 971 | #define MIN_UNITS_PER_WORD 4 |
876c09d3 JW |
972 | |
973 | /* For MIPS, width of a floating point register. */ | |
974 | #define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4) | |
e75b25e7 MM |
975 | |
976 | /* A C expression for the size in bits of the type `int' on the | |
977 | target machine. If you don't define this, the default is one | |
978 | word. */ | |
876c09d3 JW |
979 | #define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32) |
980 | #define MAX_INT_TYPE_SIZE 64 | |
981 | ||
982 | /* Tell the preprocessor the maximum size of wchar_t. */ | |
983 | #ifndef MAX_WCHAR_TYPE_SIZE | |
984 | #ifndef WCHAR_TYPE_SIZE | |
985 | #define MAX_WCHAR_TYPE_SIZE MAX_INT_TYPE_SIZE | |
986 | #endif | |
987 | #endif | |
e75b25e7 MM |
988 | |
989 | /* A C expression for the size in bits of the type `short' on the | |
990 | target machine. If you don't define this, the default is half a | |
991 | word. (If this would be less than one storage unit, it is | |
992 | rounded up to one unit.) */ | |
993 | #define SHORT_TYPE_SIZE 16 | |
994 | ||
995 | /* A C expression for the size in bits of the type `long' on the | |
996 | target machine. If you don't define this, the default is one | |
997 | word. */ | |
876c09d3 JW |
998 | #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32) |
999 | #define MAX_LONG_TYPE_SIZE 64 | |
e75b25e7 MM |
1000 | |
1001 | /* A C expression for the size in bits of the type `long long' on the | |
1002 | target machine. If you don't define this, the default is two | |
1003 | words. */ | |
923d630e | 1004 | #define LONG_LONG_TYPE_SIZE 64 |
e75b25e7 MM |
1005 | |
1006 | /* A C expression for the size in bits of the type `char' on the | |
1007 | target machine. If you don't define this, the default is one | |
1008 | quarter of a word. (If this would be less than one storage unit, | |
1009 | it is rounded up to one unit.) */ | |
1010 | #define CHAR_TYPE_SIZE BITS_PER_UNIT | |
1011 | ||
1012 | /* A C expression for the size in bits of the type `float' on the | |
1013 | target machine. If you don't define this, the default is one | |
1014 | word. */ | |
1015 | #define FLOAT_TYPE_SIZE 32 | |
1016 | ||
1017 | /* A C expression for the size in bits of the type `double' on the | |
1018 | target machine. If you don't define this, the default is two | |
1019 | words. */ | |
1020 | #define DOUBLE_TYPE_SIZE 64 | |
1021 | ||
1022 | /* A C expression for the size in bits of the type `long double' on | |
1023 | the target machine. If you don't define this, the default is two | |
1024 | words. */ | |
1025 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
1026 | ||
1027 | /* Width in bits of a pointer. | |
1028 | See also the macro `Pmode' defined below. */ | |
876c09d3 | 1029 | #define POINTER_SIZE (TARGET_LONG64 ? 64 : 32) |
e75b25e7 MM |
1030 | |
1031 | /* Allocation boundary (in *bits*) for storing pointers in memory. */ | |
876c09d3 | 1032 | #define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32) |
e75b25e7 MM |
1033 | |
1034 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
876c09d3 | 1035 | #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32) |
e75b25e7 MM |
1036 | |
1037 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
1038 | #define FUNCTION_BOUNDARY 32 | |
1039 | ||
1040 | /* Alignment of field after `int : 0' in a structure. */ | |
876c09d3 | 1041 | #define EMPTY_FIELD_BOUNDARY (TARGET_LONG64 ? 64 : 32) |
e75b25e7 MM |
1042 | |
1043 | /* Every structure's size must be a multiple of this. */ | |
1044 | /* 8 is observed right on a DECstation and on riscos 4.02. */ | |
1045 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
1046 | ||
1047 | /* There is no point aligning anything to a rounder boundary than this. */ | |
1048 | #define BIGGEST_ALIGNMENT 64 | |
1049 | ||
1050 | /* Biggest alignment any structure field can require in bits. */ | |
1051 | #define BIGGEST_FIELD_ALIGNMENT 64 | |
1052 | ||
31c714e3 | 1053 | /* Set this nonzero if move instructions will actually fail to work |
e75b25e7 | 1054 | when given unaligned data. */ |
31c714e3 | 1055 | #define STRICT_ALIGNMENT 1 |
e75b25e7 MM |
1056 | |
1057 | /* Define this if you wish to imitate the way many other C compilers | |
1058 | handle alignment of bitfields and the structures that contain | |
1059 | them. | |
1060 | ||
1061 | The behavior is that the type written for a bitfield (`int', | |
1062 | `short', or other integer type) imposes an alignment for the | |
1063 | entire structure, as if the structure really did contain an | |
1064 | ordinary field of that type. In addition, the bitfield is placed | |
1065 | within the structure so that it would fit within such a field, | |
1066 | not crossing a boundary for it. | |
1067 | ||
1068 | Thus, on most machines, a bitfield whose type is written as `int' | |
1069 | would not cross a four-byte boundary, and would force four-byte | |
1070 | alignment for the whole structure. (The alignment used may not | |
1071 | be four bytes; it is controlled by the other alignment | |
1072 | parameters.) | |
1073 | ||
1074 | If the macro is defined, its definition should be a C expression; | |
1075 | a nonzero value for the expression enables this behavior. */ | |
1076 | ||
1077 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
1078 | ||
1079 | /* If defined, a C expression to compute the alignment given to a | |
1080 | constant that is being placed in memory. CONSTANT is the constant | |
1081 | and ALIGN is the alignment that the object would ordinarily have. | |
1082 | The value of this macro is used instead of that alignment to align | |
1083 | the object. | |
1084 | ||
1085 | If this macro is not defined, then ALIGN is used. | |
1086 | ||
1087 | The typical use of this macro is to increase alignment for string | |
1088 | constants to be word aligned so that `strcpy' calls that copy | |
1089 | constants can be done inline. */ | |
1090 | ||
1091 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
1092 | ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ | |
1093 | && (ALIGN) < BITS_PER_WORD \ | |
1094 | ? BITS_PER_WORD \ | |
1095 | : (ALIGN)) | |
1096 | ||
1097 | /* If defined, a C expression to compute the alignment for a static | |
1098 | variable. TYPE is the data type, and ALIGN is the alignment that | |
1099 | the object would ordinarily have. The value of this macro is used | |
1100 | instead of that alignment to align the object. | |
1101 | ||
1102 | If this macro is not defined, then ALIGN is used. | |
1103 | ||
1104 | One use of this macro is to increase alignment of medium-size | |
1105 | data to make it all fit in fewer cache lines. Another is to | |
1106 | cause character arrays to be word-aligned so that `strcpy' calls | |
1107 | that copy constants to character arrays can be done inline. */ | |
1108 | ||
1109 | #undef DATA_ALIGNMENT | |
1110 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
1111 | ((((ALIGN) < BITS_PER_WORD) \ | |
1112 | && (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
1113 | || TREE_CODE (TYPE) == UNION_TYPE \ | |
1114 | || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN)) | |
1115 | ||
1116 | /* Define this macro if an argument declared as `char' or `short' in a | |
1117 | prototype should actually be passed as an `int'. In addition to | |
1118 | avoiding errors in certain cases of mismatch, it also makes for | |
1119 | better code on certain machines. */ | |
1120 | ||
1121 | #define PROMOTE_PROTOTYPES | |
1122 | ||
9a63901f RK |
1123 | /* Define if operations between registers always perform the operation |
1124 | on the full register even if a narrower mode is specified. */ | |
1125 | #define WORD_REGISTER_OPERATIONS | |
1126 | ||
1127 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1128 | will either zero-extend or sign-extend. The value of this macro should | |
1129 | be the code that says which one of the two operations is implicitly | |
1130 | done, NIL if none. */ | |
1131 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
e75b25e7 MM |
1132 | \f |
1133 | /* Standard register usage. */ | |
1134 | ||
1135 | /* Number of actual hardware registers. | |
1136 | The hardware registers are assigned numbers for the compiler | |
1137 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
1138 | All registers that the compiler knows about must be given numbers, | |
1139 | even those that are not normally considered general registers. | |
1140 | ||
1141 | On the Mips, we have 32 integer registers, 32 floating point registers | |
1142 | and the special registers hi, lo, and fp status. */ | |
1143 | ||
1144 | #define FIRST_PSEUDO_REGISTER 67 | |
1145 | ||
1146 | /* 1 for registers that have pervasive standard uses | |
1147 | and are not available for the register allocator. | |
1148 | ||
1149 | On the MIPS, see conventions, page D-2 */ | |
1150 | ||
1151 | #define FIXED_REGISTERS \ | |
1152 | { \ | |
1153 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
1154 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \ | |
1155 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
1156 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
46299de9 | 1157 | 0, 0, 1 \ |
e75b25e7 MM |
1158 | } |
1159 | ||
1160 | ||
1161 | /* 1 for registers not available across function calls. | |
1162 | These must include the FIXED_REGISTERS and also any | |
1163 | registers that can be used without being saved. | |
1164 | The latter must include the registers where values are returned | |
1165 | and the register where structure-value addresses are passed. | |
1166 | Aside from that, you can include as many other registers as you like. */ | |
1167 | ||
1168 | #define CALL_USED_REGISTERS \ | |
1169 | { \ | |
1170 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
1171 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \ | |
1172 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
1173 | 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
1174 | 1, 1, 1 \ | |
1175 | } | |
1176 | ||
1177 | ||
1178 | /* Internal macros to classify a register number as to whether it's a | |
1179 | general purpose register, a floating point register, a | |
516a2dfd | 1180 | multiply/divide register, or a status register. */ |
e75b25e7 MM |
1181 | |
1182 | #define GP_REG_FIRST 0 | |
1183 | #define GP_REG_LAST 31 | |
1184 | #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1) | |
1185 | #define GP_DBX_FIRST 0 | |
1186 | ||
1187 | #define FP_REG_FIRST 32 | |
1188 | #define FP_REG_LAST 63 | |
1189 | #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1) | |
1190 | #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32) | |
1191 | ||
1192 | #define MD_REG_FIRST 64 | |
1193 | #define MD_REG_LAST 65 | |
1194 | #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1) | |
1195 | ||
1196 | #define ST_REG_FIRST 66 | |
1197 | #define ST_REG_LAST 66 | |
1198 | #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1) | |
1199 | ||
1200 | #define AT_REGNUM (GP_REG_FIRST + 1) | |
1201 | #define HI_REGNUM (MD_REG_FIRST + 0) | |
1202 | #define LO_REGNUM (MD_REG_FIRST + 1) | |
1203 | #define FPSW_REGNUM ST_REG_FIRST | |
1204 | ||
1205 | #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM) | |
1206 | #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM) | |
1207 | #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM) | |
1208 | #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST) | |
1209 | ||
e75b25e7 MM |
1210 | /* Return number of consecutive hard regs needed starting at reg REGNO |
1211 | to hold something of mode MODE. | |
1212 | This is ordinarily the length in words of a value of mode MODE | |
1213 | but can be less for certain modes in special long registers. | |
1214 | ||
1215 | On the MIPS, all general registers are one word long. Except on | |
1216 | the R4000 with the FR bit set, the floating point uses register | |
1217 | pairs, with the second register not being allocatable. */ | |
1218 | ||
1219 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
1220 | (! FP_REG_P (REGNO) \ | |
1221 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \ | |
46299de9 ILT |
1222 | : (TARGET_SINGLE_FLOAT \ |
1223 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FPREG - 1) / UNITS_PER_FPREG) \ | |
1224 | : (((GET_MODE_SIZE (MODE) + 7) / 8) << (TARGET_FLOAT64 == 0)))) | |
e75b25e7 MM |
1225 | |
1226 | /* Value is 1 if hard register REGNO can hold a value of machine-mode | |
876c09d3 JW |
1227 | MODE. In 32 bit mode, require that DImode and DFmode be in even |
1228 | registers. For DImode, this makes some of the insns easier to | |
1229 | write, since you don't have to worry about a DImode value in | |
1230 | registers 3 & 4, producing a result in 4 & 5. | |
e75b25e7 MM |
1231 | |
1232 | To make the code simpler HARD_REGNO_MODE_OK now just references an | |
1233 | array built in override_options. Because machmodes.h is not yet | |
1234 | included before this file is processed, the MODE bound can't be | |
1235 | expressed here. */ | |
1236 | ||
1237 | extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER]; | |
1238 | ||
1239 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
1240 | mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ] | |
1241 | ||
1242 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
1243 | when one has mode MODE1 and one has mode MODE2. | |
1244 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
1245 | for any hard reg, then this must be 0 for correct output. */ | |
1246 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
1247 | ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \ | |
1248 | GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ | |
1249 | == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \ | |
1250 | GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) | |
1251 | ||
1252 | /* MIPS pc is not overloaded on a register. */ | |
1253 | /* #define PC_REGNUM xx */ | |
1254 | ||
1255 | /* Register to use for pushing function arguments. */ | |
0fb5ac6f | 1256 | #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29) |
e75b25e7 MM |
1257 | |
1258 | /* Offset from the stack pointer to the first available location. */ | |
1259 | #define STACK_POINTER_OFFSET 0 | |
1260 | ||
1261 | /* Base register for access to local variables of the function. */ | |
0fb5ac6f | 1262 | #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30) |
e75b25e7 MM |
1263 | |
1264 | /* Value should be nonzero if functions must have frame pointers. | |
1265 | Zero means the frame pointer need not be set up (and parms | |
1266 | may be accessed via the stack pointer) in functions that seem suitable. | |
1267 | This is computed in `reload', in reload1.c. */ | |
1268 | #define FRAME_POINTER_REQUIRED (current_function_calls_alloca) | |
1269 | ||
1270 | /* Base register for access to arguments of the function. */ | |
ab78d4a8 | 1271 | #define ARG_POINTER_REGNUM GP_REG_FIRST |
e75b25e7 MM |
1272 | |
1273 | /* Register in which static-chain is passed to a function. */ | |
0fb5ac6f | 1274 | #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2) |
e75b25e7 | 1275 | |
1154b096 MM |
1276 | /* If the structure value address is passed in a register, then |
1277 | `STRUCT_VALUE_REGNUM' should be the number of that register. */ | |
1278 | /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */ | |
1279 | ||
1280 | /* If the structure value address is not passed in a register, define | |
1281 | `STRUCT_VALUE' as an expression returning an RTX for the place | |
1282 | where the address is passed. If it returns 0, the address is | |
1283 | passed as an "invisible" first argument. */ | |
f58cfbfb | 1284 | #define STRUCT_VALUE 0 |
e75b25e7 MM |
1285 | |
1286 | /* Mips registers used in prologue/epilogue code when the stack frame | |
1287 | is larger than 32K bytes. These registers must come from the | |
1288 | scratch register set, and not used for passing and returning | |
1289 | arguments and any other information used in the calling sequence | |
516a2dfd JW |
1290 | (such as pic). Must start at 12, since t0/t3 are parameter passing |
1291 | registers in the 64 bit ABI. */ | |
7bea35e7 | 1292 | |
516a2dfd JW |
1293 | #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 12) |
1294 | #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 13) | |
e75b25e7 MM |
1295 | |
1296 | /* Define this macro if it is as good or better to call a constant | |
1297 | function address than to call an address kept in a register. */ | |
1298 | #define NO_FUNCTION_CSE 1 | |
1299 | ||
1300 | /* Define this macro if it is as good or better for a function to | |
1301 | call itself with an explicit address than to call an address | |
1302 | kept in a register. */ | |
1303 | #define NO_RECURSIVE_FUNCTION_CSE 1 | |
1304 | ||
1305 | /* The register number of the register used to address a table of | |
1306 | static data addresses in memory. In some cases this register is | |
1307 | defined by a processor's "application binary interface" (ABI). | |
1308 | When this macro is defined, RTL is generated for this register | |
1309 | once, as with the stack pointer and frame pointer registers. If | |
1310 | this macro is not defined, it is up to the machine-dependent | |
1311 | files to allocate such a register (if necessary). */ | |
0fb5ac6f | 1312 | #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28) |
e75b25e7 | 1313 | |
24e214e3 JW |
1314 | #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25) |
1315 | ||
92544bdf | 1316 | #define FINALIZE_PIC mips_finalize_pic () |
e75b25e7 MM |
1317 | \f |
1318 | /* Define the classes of registers for register constraints in the | |
1319 | machine description. Also define ranges of constants. | |
1320 | ||
1321 | One of the classes must always be named ALL_REGS and include all hard regs. | |
1322 | If there is more than one class, another class must be named NO_REGS | |
1323 | and contain no registers. | |
1324 | ||
1325 | The name GENERAL_REGS must be the name of a class (or an alias for | |
1326 | another name such as ALL_REGS). This is the class of registers | |
1327 | that is allowed by "g" or "r" in a register constraint. | |
1328 | Also, registers outside this class are allocated only when | |
1329 | instructions express preferences for them. | |
1330 | ||
1331 | The classes must be numbered in nondecreasing order; that is, | |
1332 | a larger-numbered class must never be contained completely | |
1333 | in a smaller-numbered class. | |
1334 | ||
1335 | For any two classes, it is very desirable that there be another | |
1336 | class that represents their union. */ | |
1337 | ||
1338 | enum reg_class | |
1339 | { | |
1340 | NO_REGS, /* no registers in set */ | |
1341 | GR_REGS, /* integer registers */ | |
1342 | FP_REGS, /* floating point registers */ | |
1343 | HI_REG, /* hi register */ | |
1344 | LO_REG, /* lo register */ | |
1345 | MD_REGS, /* multiply/divide registers (hi/lo) */ | |
1346 | ST_REGS, /* status registers (fp status) */ | |
1347 | ALL_REGS, /* all registers */ | |
1348 | LIM_REG_CLASSES /* max value + 1 */ | |
1349 | }; | |
1350 | ||
1351 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
1352 | ||
1353 | #define GENERAL_REGS GR_REGS | |
1354 | ||
1355 | /* An initializer containing the names of the register classes as C | |
1356 | string constants. These names are used in writing some of the | |
1357 | debugging dumps. */ | |
1358 | ||
1359 | #define REG_CLASS_NAMES \ | |
1360 | { \ | |
1361 | "NO_REGS", \ | |
1362 | "GR_REGS", \ | |
1363 | "FP_REGS", \ | |
1364 | "HI_REG", \ | |
1365 | "LO_REG", \ | |
1366 | "MD_REGS", \ | |
1367 | "ST_REGS", \ | |
1368 | "ALL_REGS" \ | |
1369 | } | |
1370 | ||
1371 | /* An initializer containing the contents of the register classes, | |
1372 | as integers which are bit masks. The Nth integer specifies the | |
1373 | contents of class N. The way the integer MASK is interpreted is | |
1374 | that register R is in the class if `MASK & (1 << R)' is 1. | |
1375 | ||
1376 | When the machine has more than 32 registers, an integer does not | |
1377 | suffice. Then the integers are replaced by sub-initializers, | |
1378 | braced groupings containing several integers. Each | |
1379 | sub-initializer must be suitable as an initializer for the type | |
1380 | `HARD_REG_SET' which is defined in `hard-reg-set.h'. */ | |
1381 | ||
1382 | #define REG_CLASS_CONTENTS \ | |
1383 | { \ | |
1384 | { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \ | |
1385 | { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \ | |
1386 | { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \ | |
2e7bfcec MM |
1387 | { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \ |
1388 | { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \ | |
e75b25e7 MM |
1389 | { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \ |
1390 | { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \ | |
1391 | { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \ | |
1392 | } | |
1393 | ||
1394 | ||
1395 | /* A C expression whose value is a register class containing hard | |
1396 | register REGNO. In general there is more that one such class; | |
1397 | choose a class which is "minimal", meaning that no smaller class | |
1398 | also contains the register. */ | |
1399 | ||
1400 | extern enum reg_class mips_regno_to_class[]; | |
1401 | ||
1402 | #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ] | |
1403 | ||
1404 | /* A macro whose definition is the name of the class to which a | |
1405 | valid base register must belong. A base register is one used in | |
1406 | an address which is the register value plus a displacement. */ | |
1407 | ||
1408 | #define BASE_REG_CLASS GR_REGS | |
1409 | ||
1410 | /* A macro whose definition is the name of the class to which a | |
1411 | valid index register must belong. An index register is one used | |
1412 | in an address where its value is either multiplied by a scale | |
1413 | factor or added to another register (as well as added to a | |
1414 | displacement). */ | |
1415 | ||
876c09d3 | 1416 | #define INDEX_REG_CLASS NO_REGS |
e75b25e7 MM |
1417 | |
1418 | ||
1419 | /* REGISTER AND CONSTANT CLASSES */ | |
1420 | ||
1421 | /* Get reg_class from a letter such as appears in the machine | |
1422 | description. | |
1423 | ||
1424 | DEFINED REGISTER CLASSES: | |
1425 | ||
1426 | 'd' General (aka integer) registers | |
1427 | 'f' Floating point registers | |
1428 | 'h' Hi register | |
1429 | 'l' Lo register | |
34b650b3 MM |
1430 | 'x' Multiply/divide registers |
1431 | 'z' FP Status register */ | |
e75b25e7 MM |
1432 | |
1433 | extern enum reg_class mips_char_to_class[]; | |
1434 | ||
1435 | #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ] | |
1436 | ||
1437 | /* The letters I, J, K, L, M, N, O, and P in a register constraint | |
1438 | string can be used to stand for particular ranges of immediate | |
1439 | operands. This macro defines what the ranges are. C is the | |
1440 | letter, and VALUE is a constant value. Return 1 if VALUE is | |
1441 | in the range specified by C. */ | |
1442 | ||
1443 | /* For MIPS: | |
1444 | ||
1445 | `I' is used for the range of constants an arithmetic insn can | |
1446 | actually contain (16 bits signed integers). | |
1447 | ||
1448 | `J' is used for the range which is just zero (ie, $r0). | |
1449 | ||
1450 | `K' is used for the range of constants a logical insn can actually | |
1451 | contain (16 bit zero-extended integers). | |
1452 | ||
1453 | `L' is used for the range of constants that be loaded with lui | |
1454 | (ie, the bottom 16 bits are zero). | |
1455 | ||
1456 | `M' is used for the range of constants that take two words to load | |
1457 | (ie, not matched by `I', `K', and `L'). | |
1458 | ||
1459 | `N' is used for negative 16 bit constants. | |
1460 | ||
1461 | `O' is an exact power of 2 (not yet used in the md file). | |
1462 | ||
1463 | `P' is used for positive 16 bit constants. */ | |
1464 | ||
516a2dfd JW |
1465 | #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) |
1466 | #define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000) | |
e75b25e7 MM |
1467 | |
1468 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
516a2dfd | 1469 | ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \ |
e75b25e7 | 1470 | : (C) == 'J' ? ((VALUE) == 0) \ |
516a2dfd | 1471 | : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000) \ |
876c09d3 JW |
1472 | : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \ |
1473 | && (((VALUE) & ~2147483647) == 0 \ | |
1474 | || ((VALUE) & ~2147483647) == ~2147483647)) \ | |
99cbc4b0 MM |
1475 | : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \ |
1476 | && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \ | |
876c09d3 JW |
1477 | && (((VALUE) & 0x0000ffff) != 0 \ |
1478 | || (((VALUE) & ~2147483647) != 0 \ | |
1479 | && ((VALUE) & ~2147483647) != ~2147483647))) \ | |
99cbc4b0 | 1480 | : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \ |
e75b25e7 | 1481 | : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \ |
99cbc4b0 | 1482 | : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \ |
e75b25e7 MM |
1483 | : 0) |
1484 | ||
1485 | /* Similar, but for floating constants, and defining letters G and H. | |
1486 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
1487 | ||
1488 | /* For Mips | |
1489 | ||
1490 | 'G' : Floating point 0 */ | |
1491 | ||
1492 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
1493 | ((C) == 'G' \ | |
876c09d3 | 1494 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) |
e75b25e7 MM |
1495 | |
1496 | /* Letters in the range `Q' through `U' may be defined in a | |
1497 | machine-dependent fashion to stand for arbitrary operand types. | |
1498 | The machine description macro `EXTRA_CONSTRAINT' is passed the | |
1499 | operand as its first argument and the constraint letter as its | |
1500 | second operand. | |
1501 | ||
31c714e3 MM |
1502 | `Q' is for memory references which take more than 1 instruction. |
1503 | `R' is for memory references which take 1 word for the instruction. | |
e75b25e7 MM |
1504 | `S' is for references to extern items which are PIC for OSF/rose. */ |
1505 | ||
1506 | #define EXTRA_CONSTRAINT(OP,CODE) \ | |
1507 | ((GET_CODE (OP) != MEM) ? FALSE \ | |
1508 | : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \ | |
1509 | : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \ | |
31c714e3 MM |
1510 | : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \ |
1511 | && HALF_PIC_ADDRESS_P (OP)) \ | |
e75b25e7 MM |
1512 | : FALSE) |
1513 | ||
1514 | /* Given an rtx X being reloaded into a reg required to be | |
1515 | in class CLASS, return the class of reg to actually use. | |
1516 | In general this is just CLASS; but on some machines | |
1517 | in some cases it is preferable to use a more restrictive class. */ | |
1518 | ||
1519 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
876c09d3 JW |
1520 | ((CLASS) != ALL_REGS \ |
1521 | ? (CLASS) \ | |
1522 | : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ | |
1523 | || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \ | |
1524 | ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \ | |
1525 | : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ | |
1526 | || GET_MODE (X) == VOIDmode) \ | |
1527 | ? GR_REGS \ | |
1528 | : (CLASS)))) | |
e75b25e7 | 1529 | |
0fb5ac6f MM |
1530 | /* Certain machines have the property that some registers cannot be |
1531 | copied to some other registers without using memory. Define this | |
1532 | macro on those machines to be a C expression that is non-zero if | |
1533 | objects of mode MODE in registers of CLASS1 can only be copied to | |
1534 | registers of class CLASS2 by storing a register of CLASS1 into | |
1535 | memory and loading that memory location into a register of CLASS2. | |
1536 | ||
1537 | Do not define this macro if its value would always be zero. */ | |
1538 | ||
1539 | #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ | |
2370b831 JW |
1540 | ((!TARGET_DEBUG_H_MODE \ |
1541 | && GET_MODE_CLASS (MODE) == MODE_INT \ | |
1542 | && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \ | |
1543 | || (CLASS1 == GR_REGS && CLASS2 == FP_REGS))) \ | |
1544 | || (TARGET_FLOAT64 && !TARGET_64BIT && (MODE) == DFmode \ | |
1545 | && ((CLASS1 == GR_REGS && CLASS2 == FP_REGS) \ | |
1546 | || (CLASS2 == GR_REGS && CLASS1 == FP_REGS)))) | |
0fb5ac6f | 1547 | |
46299de9 ILT |
1548 | /* The HI and LO registers can only be reloaded via the general |
1549 | registers. */ | |
1550 | ||
1551 | #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ | |
1552 | mips_secondary_reload_class (CLASS, MODE, X) | |
1553 | ||
1554 | /* Not declared above, with the other functions, because enum | |
1555 | reg_class is not declared yet. */ | |
1556 | extern enum reg_class mips_secondary_reload_class (); | |
1557 | ||
e75b25e7 MM |
1558 | /* Return the maximum number of consecutive registers |
1559 | needed to represent mode MODE in a register of class CLASS. */ | |
1560 | ||
b206a757 JW |
1561 | #define CLASS_UNITS(mode, size) \ |
1562 | ((GET_MODE_SIZE (mode) + (size) - 1) / (size)) | |
574c75a3 | 1563 | |
e75b25e7 | 1564 | #define CLASS_MAX_NREGS(CLASS, MODE) \ |
b206a757 JW |
1565 | ((CLASS) == FP_REGS \ |
1566 | ? (TARGET_FLOAT64 \ | |
1567 | ? CLASS_UNITS (MODE, 8) \ | |
1568 | : 2 * CLASS_UNITS (MODE, 8)) \ | |
1569 | : CLASS_UNITS (MODE, UNITS_PER_WORD)) | |
e75b25e7 MM |
1570 | |
1571 | /* If defined, this is a C expression whose value should be | |
1572 | nonzero if the insn INSN has the effect of mysteriously | |
1573 | clobbering the contents of hard register number REGNO. By | |
1574 | "mysterious" we mean that the insn's RTL expression doesn't | |
1575 | describe such an effect. | |
1576 | ||
1577 | If this macro is not defined, it means that no insn clobbers | |
1578 | registers mysteriously. This is the usual situation; all else | |
1579 | being equal, it is best for the RTL expression to show all the | |
1580 | activity. */ | |
1581 | ||
1582 | /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */ | |
1583 | ||
1584 | \f | |
1585 | /* Stack layout; function entry, exit and calling. */ | |
1586 | ||
516a2dfd JW |
1587 | /* Don't enable support for the 64 bit ABI calling convention. |
1588 | Some embedded code depends on the old 64 bit calling convention. */ | |
1589 | #define ABI_64BIT 0 | |
1590 | ||
e75b25e7 MM |
1591 | /* Define this if pushing a word on the stack |
1592 | makes the stack pointer a smaller address. */ | |
1593 | #define STACK_GROWS_DOWNWARD | |
1594 | ||
1595 | /* Define this if the nominal address of the stack frame | |
1596 | is at the high-address end of the local variables; | |
1597 | that is, each additional local variable allocated | |
1598 | goes at a more negative offset in the frame. */ | |
ab78d4a8 | 1599 | /* #define FRAME_GROWS_DOWNWARD */ |
e75b25e7 MM |
1600 | |
1601 | /* Offset within stack frame to start allocating local variables at. | |
1602 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
1603 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
1604 | of the first local allocated. */ | |
24e214e3 JW |
1605 | #define STARTING_FRAME_OFFSET \ |
1606 | (current_function_outgoing_args_size \ | |
1607 | + (TARGET_ABICALLS ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0)) | |
ab78d4a8 MM |
1608 | |
1609 | /* Offset from the stack pointer register to an item dynamically | |
1610 | allocated on the stack, e.g., by `alloca'. | |
1611 | ||
1612 | The default value for this macro is `STACK_POINTER_OFFSET' plus the | |
1613 | length of the outgoing arguments. The default is correct for most | |
1614 | machines. See `function.c' for details. | |
1615 | ||
51bdc4d3 MM |
1616 | The MIPS ABI states that functions which dynamically allocate the |
1617 | stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like | |
1618 | we are trying to create a second frame pointer to the function, so | |
1619 | allocate some stack space to make it happy. | |
ab78d4a8 | 1620 | |
51bdc4d3 MM |
1621 | However, the linker currently complains about linking any code that |
1622 | dynamically allocates stack space, and there seems to be a bug in | |
1623 | STACK_DYNAMIC_OFFSET, so don't define this right now. */ | |
1624 | ||
1625 | #if 0 | |
ab78d4a8 MM |
1626 | #define STACK_DYNAMIC_OFFSET(FUNDECL) \ |
1627 | ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \ | |
1628 | ? 4*UNITS_PER_WORD \ | |
1629 | : current_function_outgoing_args_size) | |
51bdc4d3 | 1630 | #endif |
e75b25e7 MM |
1631 | |
1632 | /* Structure to be filled in by compute_frame_size with register | |
1633 | save masks, and offsets for the current function. */ | |
1634 | ||
1635 | struct mips_frame_info | |
1636 | { | |
7bea35e7 MM |
1637 | long total_size; /* # bytes that the entire frame takes up */ |
1638 | long var_size; /* # bytes that variables take up */ | |
1639 | long args_size; /* # bytes that outgoing arguments take up */ | |
1640 | long extra_size; /* # bytes of extra gunk */ | |
1641 | int gp_reg_size; /* # bytes needed to store gp regs */ | |
1642 | int fp_reg_size; /* # bytes needed to store fp regs */ | |
1643 | long mask; /* mask of saved gp registers */ | |
1644 | long fmask; /* mask of saved fp registers */ | |
1645 | long gp_save_offset; /* offset from vfp to store gp registers */ | |
1646 | long fp_save_offset; /* offset from vfp to store fp registers */ | |
1647 | long gp_sp_offset; /* offset from new sp to store gp registers */ | |
1648 | long fp_sp_offset; /* offset from new sp to store fp registers */ | |
1649 | int initialized; /* != 0 if frame size already calculated */ | |
1650 | int num_gp; /* number of gp registers saved */ | |
1651 | int num_fp; /* number of fp registers saved */ | |
e75b25e7 MM |
1652 | }; |
1653 | ||
1654 | extern struct mips_frame_info current_frame_info; | |
1655 | ||
1656 | /* Store in the variable DEPTH the initial difference between the | |
1657 | frame pointer reg contents and the stack pointer reg contents, | |
1658 | as of the start of the function body. This depends on the layout | |
1659 | of the fixed parts of the stack frame and on how registers are saved. */ | |
1660 | ||
ab78d4a8 MM |
1661 | /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ |
1662 | ((VAR) = compute_frame_size (get_frame_size ())) */ | |
1663 | ||
1664 | /* If defined, this macro specifies a table of register pairs used to | |
1665 | eliminate unneeded registers that point into the stack frame. If | |
1666 | it is not defined, the only elimination attempted by the compiler | |
1667 | is to replace references to the frame pointer with references to | |
1668 | the stack pointer. | |
1669 | ||
1670 | The definition of this macro is a list of structure | |
1671 | initializations, each of which specifies an original and | |
1672 | replacement register. | |
1673 | ||
1674 | On some machines, the position of the argument pointer is not | |
1675 | known until the compilation is completed. In such a case, a | |
1676 | separate hard register must be used for the argument pointer. | |
1677 | This register can be eliminated by replacing it with either the | |
1678 | frame pointer or the argument pointer, depending on whether or not | |
1679 | the frame pointer has been eliminated. | |
1680 | ||
1681 | In this case, you might specify: | |
1682 | #define ELIMINABLE_REGS \ | |
1683 | {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1684 | {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
1685 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
1686 | ||
1687 | Note that the elimination of the argument pointer with the stack | |
1688 | pointer is specified first since that is the preferred elimination. */ | |
1689 | ||
1690 | #define ELIMINABLE_REGS \ | |
1691 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1692 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
1693 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
1694 | ||
1695 | ||
1696 | /* A C expression that returns non-zero if the compiler is allowed to | |
1697 | try to replace register number FROM-REG with register number | |
1698 | TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is | |
1699 | defined, and will usually be the constant 1, since most of the | |
1700 | cases preventing register elimination are things that the compiler | |
1701 | already knows about. */ | |
1702 | ||
1703 | #define CAN_ELIMINATE(FROM, TO) \ | |
1704 | (!frame_pointer_needed \ | |
1705 | || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM)) | |
1706 | ||
1707 | /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It | |
1708 | specifies the initial difference between the specified pair of | |
1709 | registers. This macro must be defined if `ELIMINABLE_REGS' is | |
1710 | defined. */ | |
1711 | ||
1712 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1713 | { compute_frame_size (get_frame_size ()); \ | |
1714 | if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1715 | (OFFSET) = 0; \ | |
1716 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1717 | (OFFSET) = current_frame_info.total_size; \ | |
1718 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1719 | (OFFSET) = current_frame_info.total_size; \ | |
1720 | else \ | |
1721 | abort (); \ | |
1722 | } | |
1723 | ||
e75b25e7 MM |
1724 | |
1725 | /* If we generate an insn to push BYTES bytes, | |
1726 | this says how many the stack pointer really advances by. | |
1727 | On the vax, sp@- in a byte insn really pushes a word. */ | |
1728 | ||
1729 | /* #define PUSH_ROUNDING(BYTES) 0 */ | |
1730 | ||
1731 | /* If defined, the maximum amount of space required for outgoing | |
1732 | arguments will be computed and placed into the variable | |
1733 | `current_function_outgoing_args_size'. No space will be pushed | |
1734 | onto the stack for each call; instead, the function prologue | |
1735 | should increase the stack frame size by this amount. | |
1736 | ||
1737 | It is not proper to define both `PUSH_ROUNDING' and | |
1738 | `ACCUMULATE_OUTGOING_ARGS'. */ | |
1739 | #define ACCUMULATE_OUTGOING_ARGS | |
1740 | ||
6cb6c3b3 MM |
1741 | /* Offset from the argument pointer register to the first argument's |
1742 | address. On some machines it may depend on the data type of the | |
1743 | function. | |
e75b25e7 | 1744 | |
6cb6c3b3 | 1745 | If `ARGS_GROW_DOWNWARD', this is the offset to the location above |
39282292 MM |
1746 | the first argument's address. |
1747 | ||
1748 | On the MIPS, we must skip the first argument position if we are | |
876c09d3 | 1749 | returning a structure or a union, to account for its address being |
305aa9e2 MM |
1750 | passed in $4. However, at the current time, this produces a compiler |
1751 | that can't bootstrap, so comment it out for now. */ | |
e75b25e7 | 1752 | |
305aa9e2 | 1753 | #if 0 |
6cb6c3b3 MM |
1754 | #define FIRST_PARM_OFFSET(FNDECL) \ |
1755 | (FNDECL != 0 \ | |
1756 | && TREE_TYPE (FNDECL) != 0 \ | |
1757 | && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \ | |
1758 | && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \ | |
39282292 MM |
1759 | || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \ |
1760 | ? UNITS_PER_WORD \ | |
1761 | : 0) | |
305aa9e2 MM |
1762 | #else |
1763 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
1764 | #endif | |
e75b25e7 MM |
1765 | |
1766 | /* When a parameter is passed in a register, stack space is still | |
1767 | allocated for it. For the MIPS, stack space must be allocated, cf | |
1768 | Asm Lang Prog Guide page 7-8. | |
1769 | ||
1770 | BEWARE that some space is also allocated for non existing arguments | |
1771 | in register. In case an argument list is of form GF used registers | |
1772 | are a0 (a2,a3), but we should push over a1... */ | |
1773 | ||
516a2dfd JW |
1774 | #define REG_PARM_STACK_SPACE(FNDECL) \ |
1775 | ((MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL)) | |
e75b25e7 MM |
1776 | |
1777 | /* Define this if it is the responsibility of the caller to | |
1778 | allocate the area reserved for arguments passed in registers. | |
1779 | If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect | |
1780 | of this macro is to determine whether the space is included in | |
1781 | `current_function_outgoing_args_size'. */ | |
1782 | #define OUTGOING_REG_PARM_STACK_SPACE | |
1783 | ||
1784 | /* Align stack frames on 64 bits (Double Word ). */ | |
1785 | #define STACK_BOUNDARY 64 | |
1786 | ||
876c09d3 | 1787 | /* Make sure 4 words are always allocated on the stack. */ |
e75b25e7 MM |
1788 | |
1789 | #ifndef STACK_ARGS_ADJUST | |
1790 | #define STACK_ARGS_ADJUST(SIZE) \ | |
1791 | { \ | |
876c09d3 JW |
1792 | if (SIZE.constant < 4 * UNITS_PER_WORD) \ |
1793 | SIZE.constant = 4 * UNITS_PER_WORD; \ | |
e75b25e7 MM |
1794 | } |
1795 | #endif | |
1796 | ||
1797 | \f | |
1798 | /* A C expression that should indicate the number of bytes of its | |
1799 | own arguments that a function function pops on returning, or 0 | |
1800 | if the function pops no arguments and the caller must therefore | |
1801 | pop them all after the function returns. | |
1802 | ||
8b109b37 RK |
1803 | FUNDECL is the declaration node of the function (as a tree). |
1804 | ||
e75b25e7 MM |
1805 | FUNTYPE is a C variable whose value is a tree node that |
1806 | describes the function in question. Normally it is a node of | |
1807 | type `FUNCTION_TYPE' that describes the data type of the function. | |
1808 | From this it is possible to obtain the data types of the value | |
1809 | and arguments (if known). | |
1810 | ||
1811 | When a call to a library function is being considered, FUNTYPE | |
1812 | will contain an identifier node for the library function. Thus, | |
1813 | if you need to distinguish among various library functions, you | |
1814 | can do so by their names. Note that "library function" in this | |
1815 | context means a function used to perform arithmetic, whose name | |
1816 | is known specially in the compiler and was not mentioned in the | |
1817 | C code being compiled. | |
1818 | ||
1819 | STACK-SIZE is the number of bytes of arguments passed on the | |
1820 | stack. If a variable number of bytes is passed, it is zero, and | |
1821 | argument popping will always be the responsibility of the | |
1822 | calling function. */ | |
1823 | ||
8b109b37 | 1824 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
e75b25e7 MM |
1825 | |
1826 | ||
1827 | /* Symbolic macros for the registers used to return integer and floating | |
1828 | point values. */ | |
1829 | ||
1830 | #define GP_RETURN (GP_REG_FIRST + 2) | |
1831 | #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0)) | |
1832 | ||
1833 | /* Symbolic macros for the first/last argument registers. */ | |
1834 | ||
1835 | #define GP_ARG_FIRST (GP_REG_FIRST + 4) | |
1836 | #define GP_ARG_LAST (GP_REG_FIRST + 7) | |
1837 | #define FP_ARG_FIRST (FP_REG_FIRST + 12) | |
1838 | #define FP_ARG_LAST (FP_REG_FIRST + 15) | |
1839 | ||
1840 | #define MAX_ARGS_IN_REGISTERS 4 | |
1841 | ||
1842 | /* Define how to find the value returned by a library function | |
1843 | assuming the value has mode MODE. */ | |
1844 | ||
1845 | #define LIBCALL_VALUE(MODE) \ | |
1846 | gen_rtx (REG, MODE, \ | |
46299de9 ILT |
1847 | ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ |
1848 | && (! TARGET_SINGLE_FLOAT \ | |
1849 | || GET_MODE_SIZE (MODE) <= 4)) \ | |
1850 | ? FP_RETURN \ | |
1851 | : GP_RETURN)) | |
e75b25e7 MM |
1852 | |
1853 | /* Define how to find the value returned by a function. | |
1854 | VALTYPE is the data type of the value (as a tree). | |
1855 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
1856 | otherwise, FUNC is 0. */ | |
1857 | ||
1858 | #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) | |
1859 | ||
1860 | ||
1861 | /* 1 if N is a possible register number for a function value. | |
1862 | On the MIPS, R2 R3 and F0 F2 are the only register thus used. | |
1863 | Currently, R2 and F0 are only implemented here (C has no complex type) */ | |
1864 | ||
1865 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) | |
1866 | ||
1867 | /* 1 if N is a possible register number for function argument passing. */ | |
1868 | ||
1869 | #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \ | |
1870 | || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \ | |
1871 | && (0 == (N) % 2))) | |
1872 | ||
1873 | /* A C expression which can inhibit the returning of certain function | |
1874 | values in registers, based on the type of value. A nonzero value says | |
1875 | to return the function value in memory, just as large structures are | |
1876 | always returned. Here TYPE will be a C expression of type | |
1877 | `tree', representing the data type of the value. | |
1878 | ||
e14fa9c4 DE |
1879 | Note that values of mode `BLKmode' must be explicitly |
1880 | handled by this macro. Also, the option `-fpcc-struct-return' | |
e75b25e7 MM |
1881 | takes effect regardless of this macro. On most systems, it is |
1882 | possible to leave the macro undefined; this causes a default | |
e14fa9c4 DE |
1883 | definition to be used, whose value is the constant 1 for BLKmode |
1884 | values, and 0 otherwise. | |
e75b25e7 MM |
1885 | |
1886 | GCC normally converts 1 byte structures into chars, 2 byte | |
1887 | structs into shorts, and 4 byte structs into ints, and returns | |
1888 | them this way. Defining the following macro overrides this, | |
1889 | to give us MIPS cc compatibility. */ | |
1890 | ||
1891 | #define RETURN_IN_MEMORY(TYPE) \ | |
e419152d | 1892 | (TYPE_MODE (TYPE) == BLKmode) |
e75b25e7 MM |
1893 | \f |
1894 | /* A code distinguishing the floating point format of the target | |
1895 | machine. There are three defined values: IEEE_FLOAT_FORMAT, | |
1896 | VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */ | |
1897 | ||
1898 | #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT | |
1899 | ||
1900 | \f | |
1901 | /* Define a data type for recording info about an argument list | |
1902 | during the scan of that argument list. This data type should | |
1903 | hold all necessary information about the function itself | |
1904 | and about the args processed so far, enough to enable macros | |
1905 | such as FUNCTION_ARG to determine where the next arg should go. | |
1906 | */ | |
1907 | ||
1908 | typedef struct mips_args { | |
3f1f8d8c MM |
1909 | int gp_reg_found; /* whether a gp register was found yet */ |
1910 | int arg_number; /* argument number */ | |
1911 | int arg_words; /* # total words the arguments take */ | |
1912 | int num_adjusts; /* number of adjustments made */ | |
1913 | /* Adjustments made to args pass in regs. */ | |
b796c573 RS |
1914 | /* ??? The size is doubled to work around a |
1915 | bug in the code that sets the adjustments | |
1916 | in function_arg. */ | |
1917 | struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2]; | |
e75b25e7 MM |
1918 | } CUMULATIVE_ARGS; |
1919 | ||
1920 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1921 | for a call to a function whose data type is FNTYPE. | |
1922 | For a library call, FNTYPE is 0. | |
1923 | ||
1924 | */ | |
1925 | ||
1926 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
1927 | init_cumulative_args (&CUM, FNTYPE, LIBNAME) \ | |
1928 | ||
1929 | /* Update the data in CUM to advance over an argument | |
1930 | of mode MODE and data type TYPE. | |
1931 | (TYPE is null for libcalls where that information may not be available.) */ | |
1932 | ||
1933 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
1934 | function_arg_advance (&CUM, MODE, TYPE, NAMED) | |
1935 | ||
1936 | /* Determine where to put an argument to a function. | |
1937 | Value is zero to push the argument on the stack, | |
1938 | or a hard register in which to store the argument. | |
1939 | ||
1940 | MODE is the argument's machine mode. | |
1941 | TYPE is the data type of the argument (as a tree). | |
1942 | This is null for libcalls where that information may | |
1943 | not be available. | |
1944 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1945 | the preceding args and about the function being called. | |
1946 | NAMED is nonzero if this argument is a named parameter | |
1947 | (otherwise it is an extra parameter matching an ellipsis). */ | |
1948 | ||
1949 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
1950 | function_arg( &CUM, MODE, TYPE, NAMED) | |
1951 | ||
1952 | /* For an arg passed partly in registers and partly in memory, | |
1953 | this is the number of registers used. | |
1954 | For args passed entirely in registers or entirely in memory, zero. */ | |
1955 | ||
1956 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
1957 | function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
1958 | ||
1959 | /* If defined, a C expression that gives the alignment boundary, in | |
1960 | bits, of an argument with the specified mode and type. If it is | |
1961 | not defined, `PARM_BOUNDARY' is used for all arguments. */ | |
1962 | ||
1963 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1964 | (((TYPE) != 0) \ | |
1965 | ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \ | |
1966 | ? PARM_BOUNDARY \ | |
1967 | : TYPE_ALIGN(TYPE)) \ | |
1968 | : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ | |
1969 | ? PARM_BOUNDARY \ | |
1970 | : GET_MODE_ALIGNMENT(MODE))) | |
1971 | ||
1972 | \f | |
1973 | /* This macro generates the assembly code for function entry. | |
1974 | FILE is a stdio stream to output the code to. | |
1975 | SIZE is an int: how many units of temporary storage to allocate. | |
1976 | Refer to the array `regs_ever_live' to determine which registers | |
1977 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1978 | is ever used in the function. This macro is responsible for | |
1979 | knowing which registers should not be saved even if used. */ | |
1980 | ||
1981 | #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE) | |
1982 | ||
1983 | /* This macro generates the assembly code for function exit, | |
1984 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1985 | then individual return instructions are generated for each | |
1986 | return statement. Args are same as for FUNCTION_PROLOGUE. */ | |
1987 | ||
1988 | #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE) | |
1989 | ||
1990 | /* Define the number of delay slots needed for the function epilogue. | |
1991 | ||
1992 | On the mips, we need a slot if either no stack has been allocated, | |
1993 | or the only register saved is the return register. */ | |
1994 | ||
1995 | #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots () | |
1996 | ||
1997 | /* Define whether INSN can be placed in delay slot N for the epilogue. | |
1998 | No references to the stack must be made, since on the MIPS, the | |
1999 | delay slot is done after the stack has been cleaned up. */ | |
2000 | ||
2001 | #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ | |
2002 | (get_attr_dslot (INSN) == DSLOT_NO \ | |
2003 | && get_attr_length (INSN) == 1 \ | |
7bea35e7 | 2004 | && ! epilogue_reg_mentioned_p (PATTERN (INSN))) |
e75b25e7 MM |
2005 | |
2006 | /* Tell prologue and epilogue if register REGNO should be saved / restored. */ | |
2007 | ||
2008 | #define MUST_SAVE_REGISTER(regno) \ | |
2009 | ((regs_ever_live[regno] && !call_used_regs[regno]) \ | |
2010 | || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \ | |
ab78d4a8 | 2011 | || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31])) |
e75b25e7 MM |
2012 | |
2013 | /* ALIGN FRAMES on double word boundaries */ | |
2014 | ||
ab78d4a8 | 2015 | #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7) |
e75b25e7 MM |
2016 | |
2017 | \f | |
2018 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
2019 | for profiling a function entry. */ | |
2020 | ||
2021 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
2022 | { \ | |
2023 | fprintf (FILE, "\t.set\tnoreorder\n"); \ | |
2024 | fprintf (FILE, "\t.set\tnoat\n"); \ | |
2025 | fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \ | |
2026 | reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \ | |
2027 | fprintf (FILE, "\tjal\t_mcount\n"); \ | |
876c09d3 JW |
2028 | fprintf (FILE, \ |
2029 | "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \ | |
2030 | TARGET_64BIT ? "dsubu" : "subu", \ | |
e75b25e7 | 2031 | reg_names[STACK_POINTER_REGNUM], \ |
876c09d3 JW |
2032 | reg_names[STACK_POINTER_REGNUM], \ |
2033 | TARGET_LONG64 ? 16 : 8); \ | |
e75b25e7 MM |
2034 | fprintf (FILE, "\t.set\treorder\n"); \ |
2035 | fprintf (FILE, "\t.set\tat\n"); \ | |
2036 | } | |
2037 | ||
d8d5b1e1 MM |
2038 | /* Define this macro if the code for function profiling should come |
2039 | before the function prologue. Normally, the profiling code comes | |
2040 | after. */ | |
2041 | ||
2042 | /* #define PROFILE_BEFORE_PROLOGUE */ | |
2043 | ||
e75b25e7 MM |
2044 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
2045 | the stack pointer does not matter. The value is tested only in | |
2046 | functions that have frame pointers. | |
2047 | No definition is equivalent to always zero. */ | |
2048 | ||
2049 | #define EXIT_IGNORE_STACK 1 | |
2050 | ||
2051 | \f | |
2052 | /* A C statement to output, on the stream FILE, assembler code for a | |
2053 | block of data that contains the constant parts of a trampoline. | |
2054 | This code should not include a label--the label is taken care of | |
2055 | automatically. */ | |
2056 | ||
2057 | #define TRAMPOLINE_TEMPLATE(STREAM) \ | |
2058 | { \ | |
2059 | fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \ | |
2060 | fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \ | |
2061 | fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \ | |
876c09d3 JW |
2062 | if (TARGET_LONG64) \ |
2063 | { \ | |
2064 | fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \ | |
2065 | fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \ | |
2066 | } \ | |
2067 | else \ | |
2068 | { \ | |
0acefe54 JW |
2069 | fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \ |
2070 | fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \ | |
876c09d3 | 2071 | } \ |
0acefe54 | 2072 | fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \ |
e75b25e7 MM |
2073 | fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \ |
2074 | fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \ | |
876c09d3 JW |
2075 | if (TARGET_LONG64) \ |
2076 | { \ | |
876c09d3 JW |
2077 | fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \ |
2078 | fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \ | |
2079 | } \ | |
2080 | else \ | |
2081 | { \ | |
2082 | fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \ | |
2083 | fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \ | |
2084 | } \ | |
e75b25e7 MM |
2085 | } |
2086 | ||
2087 | /* A C expression for the size in bytes of the trampoline, as an | |
2088 | integer. */ | |
2089 | ||
0acefe54 | 2090 | #define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8)) |
e75b25e7 | 2091 | |
876c09d3 | 2092 | /* Alignment required for trampolines, in bits. */ |
e75b25e7 | 2093 | |
876c09d3 | 2094 | #define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32) |
e75b25e7 MM |
2095 | |
2096 | /* A C statement to initialize the variable parts of a trampoline. | |
2097 | ADDR is an RTX for the address of the trampoline; FNADDR is an | |
2098 | RTX for the address of the nested function; STATIC_CHAIN is an | |
2099 | RTX for the static chain value that should be passed to the | |
2100 | function when it is called. */ | |
2101 | ||
2102 | #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \ | |
2103 | { \ | |
2104 | rtx addr = ADDR; \ | |
876c09d3 JW |
2105 | if (TARGET_LONG64) \ |
2106 | { \ | |
2107 | emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \ | |
2108 | emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\ | |
2109 | } \ | |
2110 | else \ | |
2111 | { \ | |
0acefe54 JW |
2112 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \ |
2113 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\ | |
876c09d3 | 2114 | } \ |
e75b25e7 | 2115 | \ |
d1db4961 | 2116 | /* Flush the instruction cache. */ \ |
876c09d3 JW |
2117 | /* ??? Are the modes right? Maybe they should depend on -mint64/-mlong64? */\ |
2118 | /* ??? Should check the return value for errors. */ \ | |
2119 | emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \ | |
2120 | 0, VOIDmode, 3, addr, Pmode, \ | |
2121 | GEN_INT (TRAMPOLINE_SIZE), SImode, \ | |
2122 | GEN_INT (1), SImode); \ | |
e75b25e7 | 2123 | } |
e75b25e7 MM |
2124 | \f |
2125 | /* Addressing modes, and classification of registers for them. */ | |
2126 | ||
2127 | /* #define HAVE_POST_INCREMENT */ | |
2128 | /* #define HAVE_POST_DECREMENT */ | |
2129 | ||
2130 | /* #define HAVE_PRE_DECREMENT */ | |
2131 | /* #define HAVE_PRE_INCREMENT */ | |
2132 | ||
2133 | /* These assume that REGNO is a hard or pseudo reg number. | |
2134 | They give nonzero only if REGNO is a hard reg of the suitable class | |
2135 | or a pseudo reg currently allocated to a suitable hard reg. | |
2136 | These definitions are NOT overridden anywhere. */ | |
2137 | ||
2138 | #define GP_REG_OR_PSEUDO_STRICT_P(regno) \ | |
2139 | GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno]) | |
2140 | ||
2141 | #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \ | |
2142 | (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno))) | |
2143 | ||
876c09d3 | 2144 | #define REGNO_OK_FOR_INDEX_P(regno) 0 |
e75b25e7 MM |
2145 | #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno) |
2146 | ||
2147 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
2148 | and check its validity for a certain class. | |
2149 | We have two alternate definitions for each of them. | |
2150 | The usual definition accepts all pseudo regs; the other rejects them all. | |
2151 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
2152 | ||
2153 | Most source files want to accept pseudo regs in the hope that | |
2154 | they will get allocated to the class that the insn wants them to be in. | |
2155 | Some source files that are used after register allocation | |
2156 | need to be strict. */ | |
2157 | ||
2158 | #ifndef REG_OK_STRICT | |
2159 | ||
2160 | #define REG_OK_STRICT_P 0 | |
876c09d3 | 2161 | #define REG_OK_FOR_INDEX_P(X) 0 |
e75b25e7 MM |
2162 | #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X)) |
2163 | ||
2164 | #else | |
2165 | ||
2166 | #define REG_OK_STRICT_P 1 | |
876c09d3 | 2167 | #define REG_OK_FOR_INDEX_P(X) 0 |
e75b25e7 MM |
2168 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) |
2169 | ||
2170 | #endif | |
2171 | ||
2172 | \f | |
2173 | /* Maximum number of registers that can appear in a valid memory address. */ | |
2174 | ||
2175 | #define MAX_REGS_PER_ADDRESS 1 | |
2176 | ||
2177 | /* A C compound statement with a conditional `goto LABEL;' executed | |
2178 | if X (an RTX) is a legitimate memory address on the target | |
2179 | machine for a memory operand of mode MODE. | |
2180 | ||
2181 | It usually pays to define several simpler macros to serve as | |
2182 | subroutines for this one. Otherwise it may be too complicated | |
2183 | to understand. | |
2184 | ||
2185 | This macro must exist in two variants: a strict variant and a | |
2186 | non-strict one. The strict variant is used in the reload pass. | |
2187 | It must be defined so that any pseudo-register that has not been | |
2188 | allocated a hard register is considered a memory reference. In | |
2189 | contexts where some kind of register is required, a | |
2190 | pseudo-register with no hard register must be rejected. | |
2191 | ||
2192 | The non-strict variant is used in other passes. It must be | |
2193 | defined to accept all pseudo-registers in every context where | |
2194 | some kind of register is required. | |
2195 | ||
2196 | Compiler source files that want to use the strict variant of | |
2197 | this macro define the macro `REG_OK_STRICT'. You should use an | |
2198 | `#ifdef REG_OK_STRICT' conditional to define the strict variant | |
2199 | in that case and the non-strict variant otherwise. | |
2200 | ||
2201 | Typically among the subroutines used to define | |
2202 | `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for | |
2203 | acceptable registers for various purposes (one for base | |
2204 | registers, one for index registers, and so on). Then only these | |
2205 | subroutine macros need have two variants; the higher levels of | |
2206 | macros may be the same whether strict or not. | |
2207 | ||
2208 | Normally, constant addresses which are the sum of a `symbol_ref' | |
2209 | and an integer are stored inside a `const' RTX to mark them as | |
2210 | constant. Therefore, there is no need to recognize such sums | |
2211 | specifically as legitimate addresses. Normally you would simply | |
2212 | recognize any `const' as legitimate. | |
2213 | ||
2214 | Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle | |
2215 | constant sums that are not marked with `const'. It assumes | |
2216 | that a naked `plus' indicates indexing. If so, then you *must* | |
2217 | reject such naked constant sums as illegitimate addresses, so | |
2218 | that none of them will be given to `PRINT_OPERAND_ADDRESS'. | |
2219 | ||
2220 | On some machines, whether a symbolic address is legitimate | |
2221 | depends on the section that the address refers to. On these | |
2222 | machines, define the macro `ENCODE_SECTION_INFO' to store the | |
2223 | information into the `symbol_ref', and then check for it here. | |
2224 | When you see a `const', you will have to look inside it to find | |
2225 | the `symbol_ref' in order to determine the section. */ | |
2226 | ||
2227 | #if 1 | |
2228 | #define GO_PRINTF(x) trace(x) | |
2229 | #define GO_PRINTF2(x,y) trace(x,y) | |
2230 | #define GO_DEBUG_RTX(x) debug_rtx(x) | |
2231 | ||
2232 | #else | |
2233 | #define GO_PRINTF(x) | |
2234 | #define GO_PRINTF2(x,y) | |
2235 | #define GO_DEBUG_RTX(x) | |
2236 | #endif | |
2237 | ||
2238 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
2239 | { \ | |
2240 | register rtx xinsn = (X); \ | |
2241 | \ | |
2242 | if (TARGET_DEBUG_B_MODE) \ | |
2243 | { \ | |
2244 | GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \ | |
2245 | (REG_OK_STRICT_P) ? "" : "not "); \ | |
2246 | GO_DEBUG_RTX (xinsn); \ | |
2247 | } \ | |
2248 | \ | |
2249 | if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \ | |
2250 | goto ADDR; \ | |
2251 | \ | |
2252 | if (CONSTANT_ADDRESS_P (xinsn)) \ | |
2253 | goto ADDR; \ | |
2254 | \ | |
2255 | if (GET_CODE (xinsn) == PLUS) \ | |
2256 | { \ | |
2257 | register rtx xplus0 = XEXP (xinsn, 0); \ | |
2258 | register rtx xplus1 = XEXP (xinsn, 1); \ | |
2259 | register enum rtx_code code0 = GET_CODE (xplus0); \ | |
2260 | register enum rtx_code code1 = GET_CODE (xplus1); \ | |
2261 | \ | |
2262 | if (code0 != REG && code1 == REG) \ | |
2263 | { \ | |
2264 | xplus0 = XEXP (xinsn, 1); \ | |
2265 | xplus1 = XEXP (xinsn, 0); \ | |
2266 | code0 = GET_CODE (xplus0); \ | |
2267 | code1 = GET_CODE (xplus1); \ | |
2268 | } \ | |
2269 | \ | |
2270 | if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \ | |
2271 | { \ | |
876c09d3 JW |
2272 | if (code1 == CONST_INT \ |
2273 | && INTVAL (xplus1) >= -32768 \ | |
2274 | && INTVAL (xplus1) + GET_MODE_SIZE (MODE) - 1 <= 32767) \ | |
2275 | goto ADDR; \ | |
e75b25e7 MM |
2276 | \ |
2277 | /* For some code sequences, you actually get better code by \ | |
2278 | pretending that the MIPS supports an address mode of a \ | |
2279 | constant address + a register, even though the real \ | |
2280 | machine doesn't support it. This is because the \ | |
2281 | assembler can use $r1 to load just the high 16 bits, add \ | |
2282 | in the register, and fold the low 16 bits into the memory \ | |
31c714e3 | 2283 | reference, whereas the compiler generates a 4 instruction \ |
e75b25e7 MM |
2284 | sequence. On the other hand, CSE is not as effective. \ |
2285 | It would be a win to generate the lui directly, but the \ | |
2286 | MIPS assembler does not have syntax to generate the \ | |
2287 | appropriate relocation. */ \ | |
2288 | \ | |
5de1e2ce | 2289 | /* Also accept CONST_INT addresses here, so no else. */ \ |
92544bdf ILT |
2290 | /* Reject combining an embedded PIC text segment reference \ |
2291 | with a register. That requires an additional \ | |
2292 | instruction. */ \ | |
516a2dfd JW |
2293 | /* ??? Reject combining an address with a register for the MIPS \ |
2294 | 64 bit ABI, because the SGI assembler can not handle this. */ \ | |
5de1e2ce | 2295 | if (!TARGET_DEBUG_A_MODE \ |
516a2dfd | 2296 | && ! ABI_64BIT \ |
92544bdf ILT |
2297 | && CONSTANT_ADDRESS_P (xplus1) \ |
2298 | && (!TARGET_EMBEDDED_PIC \ | |
2299 | || code1 != CONST \ | |
2300 | || GET_CODE (XEXP (xplus1, 0)) != MINUS)) \ | |
e75b25e7 MM |
2301 | goto ADDR; \ |
2302 | } \ | |
2303 | } \ | |
2304 | \ | |
2305 | if (TARGET_DEBUG_B_MODE) \ | |
2306 | GO_PRINTF ("Not a legitimate address\n"); \ | |
2307 | } | |
2308 | ||
2309 | ||
2310 | /* A C expression that is 1 if the RTX X is a constant which is a | |
6eff269e BK |
2311 | valid address. This is defined to be the same as `CONSTANT_P (X)', |
2312 | but rejecting CONST_DOUBLE. */ | |
5de1e2ce JW |
2313 | /* When pic, we must reject addresses of the form symbol+large int. |
2314 | This is because an instruction `sw $4,s+70000' needs to be converted | |
2315 | by the assembler to `lw $at,s($gp);sw $4,70000($at)'. Normally the | |
2316 | assembler would use $at as a temp to load in the large offset. In this | |
2317 | case $at is already in use. We convert such problem addresses to | |
2318 | `la $5,s;sw $4,70000($5)' via LEGITIMIZE_ADDRESS. */ | |
516a2dfd | 2319 | /* ??? SGI Irix 6 assembler fails for CONST address, so reject them. */ |
31c714e3 | 2320 | #define CONSTANT_ADDRESS_P(X) \ |
6eff269e | 2321 | ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ |
5de1e2ce JW |
2322 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \ |
2323 | || (GET_CODE (X) == CONST \ | |
516a2dfd JW |
2324 | && ! (flag_pic && pic_address_needs_scratch (X)) \ |
2325 | && ! ABI_64BIT)) \ | |
5de1e2ce | 2326 | && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X))) |
e75b25e7 | 2327 | |
5de1e2ce JW |
2328 | /* Define this, so that when PIC, reload won't try to reload invalid |
2329 | addresses which require two reload registers. */ | |
2330 | ||
2331 | #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X)) | |
e75b25e7 MM |
2332 | |
2333 | /* Nonzero if the constant value X is a legitimate general operand. | |
2334 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
2335 | ||
2336 | At present, GAS doesn't understand li.[sd], so don't allow it | |
2337 | to be generated at present. Also, the MIPS assembler does not | |
2338 | grok li.d Infinity. */ | |
2339 | ||
516a2dfd | 2340 | /* ??? SGI Irix 6 assembler fails for CONST address, so reject them. */ |
e75b25e7 | 2341 | #define LEGITIMATE_CONSTANT_P(X) \ |
516a2dfd JW |
2342 | ((GET_CODE (X) != CONST_DOUBLE \ |
2343 | || mips_const_double_ok (X, GET_MODE (X))) \ | |
2344 | && ! (GET_CODE (X) == CONST && ABI_64BIT)) | |
e75b25e7 MM |
2345 | |
2346 | /* A C compound statement that attempts to replace X with a valid | |
2347 | memory address for an operand of mode MODE. WIN will be a C | |
2348 | statement label elsewhere in the code; the macro definition may | |
2349 | use | |
2350 | ||
2351 | GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); | |
2352 | ||
2353 | to avoid further processing if the address has become legitimate. | |
2354 | ||
2355 | X will always be the result of a call to `break_out_memory_refs', | |
2356 | and OLDX will be the operand that was given to that function to | |
2357 | produce X. | |
2358 | ||
2359 | The code generated by this macro should not alter the | |
2360 | substructure of X. If it transforms X into a more legitimate | |
2361 | form, it should assign X (which will always be a C variable) a | |
2362 | new value. | |
2363 | ||
2364 | It is not necessary for this macro to come up with a legitimate | |
2365 | address. The compiler has standard ways of doing so in all | |
2366 | cases. In fact, it is safe for this macro to do nothing. But | |
2649b2ee | 2367 | often a machine-dependent strategy can generate better code. |
e75b25e7 | 2368 | |
2649b2ee MM |
2369 | For the MIPS, transform: |
2370 | ||
2371 | memory(X + <large int>) | |
2372 | ||
2373 | into: | |
2374 | ||
2375 | Y = <large int> & ~0x7fff; | |
2376 | Z = X + Y | |
2377 | memory (Z + (<large int> & 0x7fff)); | |
2378 | ||
5de1e2ce JW |
2379 | This is for CSE to find several similar references, and only use one Z. |
2380 | ||
2381 | When PIC, convert addresses of the form memory (symbol+large int) to | |
2382 | memory (reg+large int). */ | |
2383 | ||
2649b2ee MM |
2384 | |
2385 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
2386 | { \ | |
2387 | register rtx xinsn = (X); \ | |
2388 | \ | |
2389 | if (TARGET_DEBUG_B_MODE) \ | |
2390 | { \ | |
2391 | GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \ | |
2392 | GO_DEBUG_RTX (xinsn); \ | |
2393 | } \ | |
2394 | \ | |
516a2dfd JW |
2395 | if (GET_CODE (xinsn) == CONST \ |
2396 | && ((flag_pic && pic_address_needs_scratch (xinsn)) \ | |
2397 | /* ??? SGI's Irix 6 assembler can't handle CONST. */ \ | |
2398 | || ABI_64BIT)) \ | |
2399 | { \ | |
2400 | rtx ptr_reg = gen_reg_rtx (Pmode); \ | |
2401 | rtx constant = XEXP (XEXP (xinsn, 0), 1); \ | |
2402 | \ | |
2403 | emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \ | |
2404 | \ | |
2405 | X = gen_rtx (PLUS, Pmode, ptr_reg, constant); \ | |
2406 | if (SMALL_INT (constant)) \ | |
2407 | goto WIN; \ | |
2408 | /* Otherwise we fall through so the code below will fix the \ | |
2409 | constant. */ \ | |
2410 | xinsn = X; \ | |
2411 | } \ | |
2412 | \ | |
b3de0f1f | 2413 | if (GET_CODE (xinsn) == PLUS) \ |
2649b2ee MM |
2414 | { \ |
2415 | register rtx xplus0 = XEXP (xinsn, 0); \ | |
2416 | register rtx xplus1 = XEXP (xinsn, 1); \ | |
2417 | register enum rtx_code code0 = GET_CODE (xplus0); \ | |
2418 | register enum rtx_code code1 = GET_CODE (xplus1); \ | |
2419 | \ | |
2420 | if (code0 != REG && code1 == REG) \ | |
2421 | { \ | |
2422 | xplus0 = XEXP (xinsn, 1); \ | |
2423 | xplus1 = XEXP (xinsn, 0); \ | |
2424 | code0 = GET_CODE (xplus0); \ | |
2425 | code1 = GET_CODE (xplus1); \ | |
2426 | } \ | |
2427 | \ | |
2428 | if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \ | |
2429 | && code1 == CONST_INT && !SMALL_INT (xplus1)) \ | |
2430 | { \ | |
2431 | rtx int_reg = gen_reg_rtx (Pmode); \ | |
2432 | rtx ptr_reg = gen_reg_rtx (Pmode); \ | |
2433 | \ | |
2434 | emit_move_insn (int_reg, \ | |
2435 | GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \ | |
2436 | \ | |
2437 | emit_insn (gen_rtx (SET, VOIDmode, \ | |
2438 | ptr_reg, \ | |
2439 | gen_rtx (PLUS, Pmode, xplus0, int_reg))); \ | |
2440 | \ | |
2441 | X = gen_rtx (PLUS, Pmode, ptr_reg, \ | |
2442 | GEN_INT (INTVAL (xplus1) & 0x7fff)); \ | |
2443 | goto WIN; \ | |
2444 | } \ | |
2445 | } \ | |
2446 | \ | |
2447 | if (TARGET_DEBUG_B_MODE) \ | |
2448 | GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \ | |
2449 | } | |
e75b25e7 MM |
2450 | |
2451 | ||
2452 | /* A C statement or compound statement with a conditional `goto | |
2453 | LABEL;' executed if memory address X (an RTX) can have different | |
2454 | meanings depending on the machine mode of the memory reference it | |
2455 | is used for. | |
2456 | ||
2457 | Autoincrement and autodecrement addresses typically have | |
2458 | mode-dependent effects because the amount of the increment or | |
2459 | decrement is the size of the operand being addressed. Some | |
2460 | machines have other mode-dependent addresses. Many RISC machines | |
2461 | have no mode-dependent addresses. | |
2462 | ||
2463 | You may assume that ADDR is a valid address for the machine. */ | |
2464 | ||
2465 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} | |
2466 | ||
2467 | ||
2468 | /* Define this macro if references to a symbol must be treated | |
2469 | differently depending on something about the variable or | |
2470 | function named by the symbol (such as what section it is in). | |
2471 | ||
2472 | The macro definition, if any, is executed immediately after the | |
2473 | rtl for DECL has been created and stored in `DECL_RTL (DECL)'. | |
2474 | The value of the rtl will be a `mem' whose address is a | |
2475 | `symbol_ref'. | |
2476 | ||
2477 | The usual thing for this macro to do is to a flag in the | |
2478 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
2479 | name string in the `symbol_ref' (if one bit is not enough | |
2480 | information). | |
2481 | ||
2482 | The best way to modify the name string is by adding text to the | |
2483 | beginning, with suitable punctuation to prevent any ambiguity. | |
2484 | Allocate the new name in `saveable_obstack'. You will have to | |
2485 | modify `ASM_OUTPUT_LABELREF' to remove and decode the added text | |
2486 | and output the name accordingly. | |
2487 | ||
2488 | You can also check the information stored in the `symbol_ref' in | |
2489 | the definition of `GO_IF_LEGITIMATE_ADDRESS' or | |
2490 | `PRINT_OPERAND_ADDRESS'. */ | |
2491 | ||
2492 | #define ENCODE_SECTION_INFO(DECL) \ | |
2493 | do \ | |
2494 | { \ | |
92544bdf ILT |
2495 | if (TARGET_EMBEDDED_PIC) \ |
2496 | { \ | |
2497 | if (TREE_CODE (DECL) == VAR_DECL) \ | |
2498 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ | |
2499 | else if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
2500 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 0; \ | |
2501 | else if (TREE_CODE (DECL) == STRING_CST \ | |
2502 | && ! flag_writable_strings) \ | |
2503 | SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 0; \ | |
2504 | else \ | |
2505 | SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \ | |
2506 | } \ | |
2507 | \ | |
2508 | else if (TARGET_GP_OPT && TREE_CODE (DECL) == VAR_DECL) \ | |
e75b25e7 MM |
2509 | { \ |
2510 | int size = int_size_in_bytes (TREE_TYPE (DECL)); \ | |
2511 | \ | |
2512 | if (size > 0 && size <= mips_section_threshold) \ | |
2513 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ | |
2514 | } \ | |
2515 | \ | |
31c714e3 MM |
2516 | else if (HALF_PIC_P ()) \ |
2517 | HALF_PIC_ENCODE (DECL); \ | |
e75b25e7 MM |
2518 | } \ |
2519 | while (0) | |
2520 | ||
2521 | \f | |
2522 | /* Specify the machine mode that this machine uses | |
2523 | for the index in the tablejump instruction. */ | |
876c09d3 | 2524 | #define CASE_VECTOR_MODE (TARGET_LONG64 ? DImode : SImode) |
e75b25e7 MM |
2525 | |
2526 | /* Define this if the tablejump instruction expects the table | |
2527 | to contain offsets from the address of the table. | |
2528 | Do not define this if the table should contain absolute addresses. */ | |
2529 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
2530 | ||
2531 | /* Specify the tree operation to be used to convert reals to integers. */ | |
2532 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
2533 | ||
2534 | /* This is the kind of divide that is easiest to do in the general case. */ | |
2535 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
2536 | ||
2537 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
6639753e | 2538 | #ifndef DEFAULT_SIGNED_CHAR |
e75b25e7 | 2539 | #define DEFAULT_SIGNED_CHAR 1 |
6639753e | 2540 | #endif |
e75b25e7 MM |
2541 | |
2542 | /* Max number of bytes we can move from memory to memory | |
2543 | in one reasonably fast instruction. */ | |
876c09d3 JW |
2544 | #define MOVE_MAX (TARGET_64BIT ? 8 : 4) |
2545 | #define MAX_MOVE_MAX 8 | |
e75b25e7 MM |
2546 | |
2547 | /* Define this macro as a C expression which is nonzero if | |
2548 | accessing less than a word of memory (i.e. a `char' or a | |
2549 | `short') is no faster than accessing a word of memory, i.e., if | |
2550 | such access require more than one instruction or if there is no | |
2551 | difference in cost between byte and (aligned) word loads. | |
2552 | ||
2553 | On RISC machines, it tends to generate better code to define | |
2554 | this as 1, since it avoids making a QI or HI mode register. */ | |
2555 | #define SLOW_BYTE_ACCESS 1 | |
2556 | ||
2557 | /* We assume that the store-condition-codes instructions store 0 for false | |
2558 | and some other value for true. This is the value stored for true. */ | |
2559 | ||
2560 | #define STORE_FLAG_VALUE 1 | |
2561 | ||
2562 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
2563 | #define SLOW_ZERO_EXTEND | |
2564 | ||
d969caf8 RK |
2565 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
2566 | few bits. */ | |
2567 | #define SHIFT_COUNT_TRUNCATED 1 | |
e75b25e7 MM |
2568 | |
2569 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
2570 | is done just by pretending it is already truncated. */ | |
876c09d3 JW |
2571 | /* In 64 bit mode, 32 bit instructions require that register values be properly |
2572 | sign-extended to 64 bits. As a result, a truncate is not a no-op if it | |
2573 | converts a value >32 bits to a value <32 bits. */ | |
2574 | /* ??? This results in inefficient code for 64 bit to 32 conversions. | |
2575 | Something needs to be done about this. Perhaps not use any 32 bit | |
2576 | instructions? Perhaps use PROMOTE_MODE? */ | |
2577 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) \ | |
2578 | (TARGET_64BIT ? ((INPREC) <= 32 || (OUTPREC) > 32) : 1) | |
e75b25e7 | 2579 | |
59c94430 MM |
2580 | /* Define this macro to control use of the character `$' in |
2581 | identifier names. The value should be 0, 1, or 2. 0 means `$' | |
2582 | is not allowed by default; 1 means it is allowed by default if | |
2583 | `-traditional' is used; 2 means it is allowed by default provided | |
2584 | `-ansi' is not used. 1 is the default; there is no need to | |
2585 | define this macro in that case. */ | |
2586 | ||
2587 | #ifndef DOLLARS_IN_IDENTIFIERS | |
e75b25e7 | 2588 | #define DOLLARS_IN_IDENTIFIERS 1 |
59c94430 | 2589 | #endif |
e75b25e7 MM |
2590 | |
2591 | /* Specify the machine mode that pointers have. | |
2592 | After generation of rtl, the compiler makes no further distinction | |
2593 | between pointers and any other objects of this machine mode. */ | |
876c09d3 JW |
2594 | |
2595 | #define Pmode (TARGET_LONG64 ? DImode : SImode) | |
e75b25e7 MM |
2596 | |
2597 | /* A function address in a call instruction | |
2598 | is a word address (for indexing purposes) | |
2599 | so give the MEM rtx a words's mode. */ | |
2600 | ||
876c09d3 | 2601 | #define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode) |
e75b25e7 MM |
2602 | |
2603 | /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and | |
2604 | memset, instead of the BSD functions bcopy and bzero. */ | |
2605 | ||
2606 | #if defined(MIPS_SYSV) || defined(OSF_OS) | |
2607 | #define TARGET_MEM_FUNCTIONS | |
2608 | #endif | |
2609 | ||
2610 | \f | |
2611 | /* A part of a C `switch' statement that describes the relative | |
2612 | costs of constant RTL expressions. It must contain `case' | |
2613 | labels for expression codes `const_int', `const', `symbol_ref', | |
2614 | `label_ref' and `const_double'. Each case must ultimately reach | |
2615 | a `return' statement to return the relative cost of the use of | |
2616 | that kind of constant value in an expression. The cost may | |
2617 | depend on the precise value of the constant, which is available | |
2618 | for examination in X. | |
2619 | ||
2620 | CODE is the expression code--redundant, since it can be obtained | |
2621 | with `GET_CODE (X)'. */ | |
2622 | ||
def9623c | 2623 | #define CONST_COSTS(X,CODE,OUTER_CODE) \ |
e75b25e7 MM |
2624 | case CONST_INT: \ |
2625 | /* Always return 0, since we don't have different sized \ | |
2626 | instructions, hence different costs according to Richard \ | |
2627 | Kenner */ \ | |
876c09d3 | 2628 | return 0; \ |
e75b25e7 MM |
2629 | \ |
2630 | case LABEL_REF: \ | |
2631 | return COSTS_N_INSNS (2); \ | |
2632 | \ | |
2633 | case CONST: \ | |
2634 | { \ | |
31c714e3 | 2635 | rtx offset = const0_rtx; \ |
876c09d3 | 2636 | rtx symref = eliminate_constant_term (XEXP (X, 0), &offset); \ |
e75b25e7 MM |
2637 | \ |
2638 | if (GET_CODE (symref) == LABEL_REF) \ | |
2639 | return COSTS_N_INSNS (2); \ | |
2640 | \ | |
2641 | if (GET_CODE (symref) != SYMBOL_REF) \ | |
2642 | return COSTS_N_INSNS (4); \ | |
2643 | \ | |
2644 | /* let's be paranoid.... */ \ | |
31c714e3 | 2645 | if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \ |
e75b25e7 MM |
2646 | return COSTS_N_INSNS (2); \ |
2647 | \ | |
2648 | return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \ | |
2649 | } \ | |
2650 | \ | |
2651 | case SYMBOL_REF: \ | |
2652 | return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \ | |
2653 | \ | |
2654 | case CONST_DOUBLE: \ | |
96abdcb1 ILT |
2655 | { \ |
2656 | rtx high, low; \ | |
2657 | split_double (X, &high, &low); \ | |
2658 | return COSTS_N_INSNS ((high == CONST0_RTX (GET_MODE (high)) \ | |
2659 | || low == CONST0_RTX (GET_MODE (low))) \ | |
2660 | ? 2 : 4); \ | |
2661 | } | |
e75b25e7 MM |
2662 | |
2663 | /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. | |
2664 | This can be used, for example, to indicate how costly a multiply | |
2665 | instruction is. In writing this macro, you can use the construct | |
2666 | `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions. | |
2667 | ||
2668 | This macro is optional; do not define it if the default cost | |
2669 | assumptions are adequate for the target machine. | |
2670 | ||
2671 | If -mdebugd is used, change the multiply cost to 2, so multiply by | |
2672 | a constant isn't converted to a series of shifts. This helps | |
2673 | strength reduction, and also makes it easier to identify what the | |
2674 | compiler is doing. */ | |
2675 | ||
516a2dfd | 2676 | /* ??? Fix this to be right for the R8000. */ |
def9623c | 2677 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
e75b25e7 MM |
2678 | case MEM: \ |
2679 | { \ | |
2680 | int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \ | |
2681 | if (simple_memory_operand (X, GET_MODE (X))) \ | |
2682 | return COSTS_N_INSNS (num_words); \ | |
2683 | \ | |
2684 | return COSTS_N_INSNS (2*num_words); \ | |
2685 | } \ | |
2686 | \ | |
2687 | case FFS: \ | |
2688 | return COSTS_N_INSNS (6); \ | |
2689 | \ | |
2690 | case NOT: \ | |
876c09d3 | 2691 | return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 2 : 1); \ |
e75b25e7 MM |
2692 | \ |
2693 | case AND: \ | |
2694 | case IOR: \ | |
2695 | case XOR: \ | |
876c09d3 | 2696 | if (GET_MODE (X) == DImode && !TARGET_64BIT) \ |
e75b25e7 MM |
2697 | return COSTS_N_INSNS (2); \ |
2698 | \ | |
e75b25e7 MM |
2699 | return COSTS_N_INSNS (1); \ |
2700 | \ | |
2701 | case ASHIFT: \ | |
2702 | case ASHIFTRT: \ | |
e75b25e7 | 2703 | case LSHIFTRT: \ |
876c09d3 JW |
2704 | if (GET_MODE (X) == DImode && !TARGET_64BIT) \ |
2705 | return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 4 : 12); \ | |
e75b25e7 MM |
2706 | \ |
2707 | return COSTS_N_INSNS (1); \ | |
2708 | \ | |
2709 | case ABS: \ | |
2710 | { \ | |
2711 | enum machine_mode xmode = GET_MODE (X); \ | |
2712 | if (xmode == SFmode || xmode == DFmode) \ | |
2713 | return COSTS_N_INSNS (1); \ | |
2714 | \ | |
2715 | return COSTS_N_INSNS (4); \ | |
2716 | } \ | |
2717 | \ | |
2718 | case PLUS: \ | |
2719 | case MINUS: \ | |
2720 | { \ | |
2721 | enum machine_mode xmode = GET_MODE (X); \ | |
2722 | if (xmode == SFmode || xmode == DFmode) \ | |
9a863c83 JW |
2723 | { \ |
2724 | if (mips_cpu == PROCESSOR_R3000) \ | |
2725 | return COSTS_N_INSNS (2); \ | |
2726 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2727 | return COSTS_N_INSNS (3); \ | |
2728 | else \ | |
2729 | return COSTS_N_INSNS (6); \ | |
2730 | } \ | |
e75b25e7 | 2731 | \ |
876c09d3 | 2732 | if (xmode == DImode && !TARGET_64BIT) \ |
e75b25e7 MM |
2733 | return COSTS_N_INSNS (4); \ |
2734 | \ | |
2735 | return COSTS_N_INSNS (1); \ | |
2736 | } \ | |
2737 | \ | |
2738 | case NEG: \ | |
876c09d3 | 2739 | return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 4 : 1); \ |
e75b25e7 MM |
2740 | \ |
2741 | case MULT: \ | |
2742 | { \ | |
2743 | enum machine_mode xmode = GET_MODE (X); \ | |
2744 | if (xmode == SFmode) \ | |
9a863c83 JW |
2745 | { \ |
2746 | if (mips_cpu == PROCESSOR_R3000) \ | |
2747 | return COSTS_N_INSNS (4); \ | |
2748 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2749 | return COSTS_N_INSNS (5); \ | |
2750 | else \ | |
2751 | return COSTS_N_INSNS (7); \ | |
2752 | } \ | |
e75b25e7 MM |
2753 | \ |
2754 | if (xmode == DFmode) \ | |
9a863c83 JW |
2755 | { \ |
2756 | if (mips_cpu == PROCESSOR_R3000) \ | |
2757 | return COSTS_N_INSNS (5); \ | |
2758 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2759 | return COSTS_N_INSNS (6); \ | |
2760 | else \ | |
2761 | return COSTS_N_INSNS (8); \ | |
2762 | } \ | |
e75b25e7 | 2763 | \ |
9a863c83 JW |
2764 | if (mips_cpu == PROCESSOR_R3000) \ |
2765 | return COSTS_N_INSNS (12); \ | |
2766 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2767 | return COSTS_N_INSNS (17); \ | |
2768 | else \ | |
2769 | return COSTS_N_INSNS (10); \ | |
e75b25e7 MM |
2770 | } \ |
2771 | \ | |
2772 | case DIV: \ | |
2773 | case MOD: \ | |
2774 | { \ | |
2775 | enum machine_mode xmode = GET_MODE (X); \ | |
2776 | if (xmode == SFmode) \ | |
9a863c83 JW |
2777 | { \ |
2778 | if (mips_cpu == PROCESSOR_R3000) \ | |
2779 | return COSTS_N_INSNS (12); \ | |
2780 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2781 | return COSTS_N_INSNS (15); \ | |
2782 | else \ | |
2783 | return COSTS_N_INSNS (23); \ | |
2784 | } \ | |
e75b25e7 MM |
2785 | \ |
2786 | if (xmode == DFmode) \ | |
9a863c83 JW |
2787 | { \ |
2788 | if (mips_cpu == PROCESSOR_R3000) \ | |
2789 | return COSTS_N_INSNS (19); \ | |
2790 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2791 | return COSTS_N_INSNS (16); \ | |
2792 | else \ | |
2793 | return COSTS_N_INSNS (36); \ | |
2794 | } \ | |
e75b25e7 MM |
2795 | } \ |
2796 | /* fall through */ \ | |
2797 | \ | |
2798 | case UDIV: \ | |
2799 | case UMOD: \ | |
9a863c83 JW |
2800 | if (mips_cpu == PROCESSOR_R3000) \ |
2801 | return COSTS_N_INSNS (35); \ | |
2802 | else if (mips_cpu == PROCESSOR_R6000) \ | |
2803 | return COSTS_N_INSNS (38); \ | |
2804 | else \ | |
2805 | return COSTS_N_INSNS (69); | |
e75b25e7 MM |
2806 | |
2807 | /* An expression giving the cost of an addressing mode that | |
2808 | contains ADDRESS. If not defined, the cost is computed from the | |
2809 | form of the ADDRESS expression and the `CONST_COSTS' values. | |
2810 | ||
2811 | For most CISC machines, the default cost is a good approximation | |
2812 | of the true cost of the addressing mode. However, on RISC | |
2813 | machines, all instructions normally have the same length and | |
2814 | execution time. Hence all addresses will have equal costs. | |
2815 | ||
2816 | In cases where more than one form of an address is known, the | |
2817 | form with the lowest cost will be used. If multiple forms have | |
2818 | the same, lowest, cost, the one that is the most complex will be | |
2819 | used. | |
2820 | ||
2821 | For example, suppose an address that is equal to the sum of a | |
2822 | register and a constant is used twice in the same basic block. | |
2823 | When this macro is not defined, the address will be computed in | |
2824 | a register and memory references will be indirect through that | |
2825 | register. On machines where the cost of the addressing mode | |
2826 | containing the sum is no higher than that of a simple indirect | |
2827 | reference, this will produce an additional instruction and | |
2828 | possibly require an additional register. Proper specification | |
2829 | of this macro eliminates this overhead for such machines. | |
2830 | ||
2831 | Similar use of this macro is made in strength reduction of loops. | |
2832 | ||
2833 | ADDRESS need not be valid as an address. In such a case, the | |
2834 | cost is not relevant and can be any value; invalid addresses | |
2835 | need not be assigned a different cost. | |
2836 | ||
2837 | On machines where an address involving more than one register is | |
2838 | as cheap as an address computation involving only one register, | |
2839 | defining `ADDRESS_COST' to reflect this can cause two registers | |
2840 | to be live over a region of code where only one would have been | |
2841 | if `ADDRESS_COST' were not defined in that manner. This effect | |
2842 | should be considered in the definition of this macro. | |
2843 | Equivalent costs should probably only be given to addresses with | |
2844 | different numbers of registers on machines with lots of registers. | |
2845 | ||
2846 | This macro will normally either not be defined or be defined as | |
2847 | a constant. */ | |
2848 | ||
2849 | #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR)) | |
2850 | ||
2851 | /* A C expression for the cost of moving data from a register in | |
2852 | class FROM to one in class TO. The classes are expressed using | |
2853 | the enumeration values such as `GENERAL_REGS'. A value of 2 is | |
2854 | the default; other values are interpreted relative to that. | |
2855 | ||
2856 | It is not required that the cost always equal 2 when FROM is the | |
2857 | same as TO; on some machines it is expensive to move between | |
2858 | registers if they are not general registers. | |
2859 | ||
2860 | If reload sees an insn consisting of a single `set' between two | |
2861 | hard registers, and if `REGISTER_MOVE_COST' applied to their | |
2862 | classes returns a value of 2, reload does not check to ensure | |
2863 | that the constraints of the insn are met. Setting a cost of | |
2864 | other than 2 will allow reload to verify that the constraints are | |
2865 | met. You should do this if the `movM' pattern's constraints do | |
2866 | not allow such copying. */ | |
2867 | ||
9a863c83 JW |
2868 | #define REGISTER_MOVE_COST(FROM, TO) \ |
2869 | ((FROM) == GR_REGS && (TO) == GR_REGS ? 2 \ | |
2870 | : (FROM) == FP_REGS && (TO) == FP_REGS ? 2 \ | |
2871 | : (FROM) == GR_REGS && (TO) == FP_REGS ? 4 \ | |
2872 | : (FROM) == FP_REGS && (TO) == GR_REGS ? 4 \ | |
46299de9 ILT |
2873 | : (((FROM) == HI_REG || (FROM) == LO_REG || (FROM) == MD_REGS) \ |
2874 | && (TO) == GR_REGS) ? 6 \ | |
2875 | : (((TO) == HI_REG || (TO) == LO_REG || (TO) == MD_REGS) \ | |
2876 | && (FROM) == GR_REGS) ? 6 \ | |
2877 | : 12) | |
e75b25e7 | 2878 | |
516a2dfd | 2879 | /* ??? Fix this to be right for the R8000. */ |
876c09d3 JW |
2880 | #define MEMORY_MOVE_COST(MODE) \ |
2881 | ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 6 : 4) | |
2882 | ||
e75b25e7 MM |
2883 | /* A C expression for the cost of a branch instruction. A value of |
2884 | 1 is the default; other values are interpreted relative to that. */ | |
2885 | ||
516a2dfd | 2886 | /* ??? Fix this to be right for the R8000. */ |
e75b25e7 MM |
2887 | #define BRANCH_COST \ |
2888 | ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1) | |
2889 | ||
9a863c83 JW |
2890 | /* A C statement (sans semicolon) to update the integer variable COST |
2891 | based on the relationship between INSN that is dependent on | |
2892 | DEP_INSN through the dependence LINK. The default is to make no | |
2893 | adjustment to COST. On the MIPS, ignore the cost of anti- and | |
2894 | output-dependencies. */ | |
e75b25e7 | 2895 | |
9a863c83 JW |
2896 | #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ |
2897 | if (REG_NOTE_KIND (LINK) != 0) \ | |
2898 | (COST) = 0; /* Anti or output dependence. */ | |
e75b25e7 MM |
2899 | \f |
2900 | /* Optionally define this if you have added predicates to | |
2901 | `MACHINE.c'. This macro is called within an initializer of an | |
2902 | array of structures. The first field in the structure is the | |
31c714e3 | 2903 | name of a predicate and the second field is an array of rtl |
e75b25e7 MM |
2904 | codes. For each predicate, list all rtl codes that can be in |
2905 | expressions matched by the predicate. The list should have a | |
2906 | trailing comma. Here is an example of two entries in the list | |
2907 | for a typical RISC machine: | |
2908 | ||
2909 | #define PREDICATE_CODES \ | |
2910 | {"gen_reg_rtx_operand", {SUBREG, REG}}, \ | |
2911 | {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}}, | |
2912 | ||
2913 | Defining this macro does not affect the generated code (however, | |
2914 | incorrect definitions that omit an rtl code that may be matched | |
2915 | by the predicate can cause the compiler to malfunction). | |
2916 | Instead, it allows the table built by `genrecog' to be more | |
2917 | compact and efficient, thus speeding up the compiler. The most | |
2918 | important predicates to include in the list specified by this | |
2919 | macro are thoses used in the most insn patterns. */ | |
2920 | ||
2921 | #define PREDICATE_CODES \ | |
2922 | {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \ | |
2923 | {"arith_operand", { REG, CONST_INT, SUBREG }}, \ | |
2924 | {"arith32_operand", { REG, CONST_INT, SUBREG }}, \ | |
2925 | {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \ | |
2926 | {"small_int", { CONST_INT }}, \ | |
2927 | {"large_int", { CONST_INT }}, \ | |
e75b25e7 MM |
2928 | {"mips_const_double_ok", { CONST_DOUBLE }}, \ |
2929 | {"simple_memory_operand", { MEM, SUBREG }}, \ | |
e75b25e7 MM |
2930 | {"equality_op", { EQ, NE }}, \ |
2931 | {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ | |
2932 | LTU, LEU }}, \ | |
f8634644 RK |
2933 | {"pc_or_label_operand", { PC, LABEL_REF }}, \ |
2934 | {"call_insn_operand", { MEM }}, \ | |
e75b25e7 MM |
2935 | |
2936 | \f | |
2937 | /* If defined, a C statement to be executed just prior to the | |
2938 | output of assembler code for INSN, to modify the extracted | |
2939 | operands so they will be output differently. | |
2940 | ||
2941 | Here the argument OPVEC is the vector containing the operands | |
2942 | extracted from INSN, and NOPERANDS is the number of elements of | |
2943 | the vector which contain meaningful data for this insn. The | |
2944 | contents of this vector are what will be used to convert the | |
2945 | insn template into assembler code, so you can change the | |
2946 | assembler output by changing the contents of the vector. | |
2947 | ||
2948 | We use it to check if the current insn needs a nop in front of it | |
2949 | because of load delays, and also to update the delay slot | |
2950 | statistics. */ | |
2951 | ||
2952 | #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ | |
65437fe8 | 2953 | final_prescan_insn (INSN, OPVEC, NOPERANDS) |
e75b25e7 MM |
2954 | |
2955 | \f | |
2956 | /* Tell final.c how to eliminate redundant test instructions. | |
2957 | Here we define machine-dependent flags and fields in cc_status | |
2958 | (see `conditions.h'). */ | |
2959 | ||
34b650b3 MM |
2960 | /* A list of names to be used for additional modes for condition code |
2961 | values in registers. These names are added to `enum machine_mode' | |
2962 | and all have class `MODE_CC'. By convention, they should start | |
2963 | with `CC' and end with `mode'. | |
e75b25e7 MM |
2964 | |
2965 | You should only define this macro if your machine does not use | |
2966 | `cc0' and only if additional modes are required. | |
2967 | ||
34b650b3 MM |
2968 | On the MIPS, we use CC_FPmode for all floating point except for not |
2969 | equal, CC_REV_FPmode for not equal (to reverse the sense of the | |
2970 | jump), CC_EQmode for integer equality/inequality comparisons, | |
2971 | CC_0mode for comparisons against 0, and CCmode for other integer | |
2972 | comparisons. */ | |
e75b25e7 | 2973 | |
34b650b3 | 2974 | #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode |
e75b25e7 MM |
2975 | |
2976 | /* A list of C strings giving the names for the modes listed in | |
34b650b3 | 2977 | `EXTRA_CC_MODES'. */ |
e75b25e7 | 2978 | |
34b650b3 | 2979 | #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP" |
e75b25e7 MM |
2980 | |
2981 | /* Returns a mode from class `MODE_CC' to be used when comparison | |
34b650b3 | 2982 | operation code OP is applied to rtx X. */ |
e75b25e7 | 2983 | |
460286d7 | 2984 | #define SELECT_CC_MODE(OP, X, Y) \ |
34b650b3 MM |
2985 | (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ |
2986 | ? SImode \ | |
2987 | : ((OP == NE) ? CC_REV_FPmode : CC_FPmode)) | |
e75b25e7 MM |
2988 | |
2989 | \f | |
2990 | /* Control the assembler format that we output. */ | |
2991 | ||
2992 | /* Output at beginning of assembler file. | |
2993 | If we are optimizing to use the global pointer, create a temporary | |
2994 | file to hold all of the text stuff, and write it out to the end. | |
2995 | This is needed because the MIPS assembler is evidently one pass, | |
2996 | and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata | |
2997 | declaration when the code is processed, it generates a two | |
2998 | instruction sequence. */ | |
2999 | ||
3000 | #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM) | |
3001 | ||
3002 | /* Output to assembler file text saying following lines | |
3003 | may contain character constants, extra white space, comments, etc. */ | |
3004 | ||
3005 | #define ASM_APP_ON " #APP\n" | |
3006 | ||
3007 | /* Output to assembler file text saying following lines | |
3008 | no longer contain unusual constructs. */ | |
3009 | ||
3010 | #define ASM_APP_OFF " #NO_APP\n" | |
3011 | ||
3012 | /* How to refer to registers in assembler output. | |
3013 | This sequence is indexed by compiler's hard-register-number (see above). | |
3014 | ||
3015 | In order to support the two different conventions for register names, | |
3016 | we use the name of a table set up in mips.c, which is overwritten | |
3017 | if -mrnames is used. */ | |
3018 | ||
3019 | #define REGISTER_NAMES \ | |
3020 | { \ | |
3021 | &mips_reg_names[ 0][0], \ | |
3022 | &mips_reg_names[ 1][0], \ | |
3023 | &mips_reg_names[ 2][0], \ | |
3024 | &mips_reg_names[ 3][0], \ | |
3025 | &mips_reg_names[ 4][0], \ | |
3026 | &mips_reg_names[ 5][0], \ | |
3027 | &mips_reg_names[ 6][0], \ | |
3028 | &mips_reg_names[ 7][0], \ | |
3029 | &mips_reg_names[ 8][0], \ | |
3030 | &mips_reg_names[ 9][0], \ | |
3031 | &mips_reg_names[10][0], \ | |
3032 | &mips_reg_names[11][0], \ | |
3033 | &mips_reg_names[12][0], \ | |
3034 | &mips_reg_names[13][0], \ | |
3035 | &mips_reg_names[14][0], \ | |
3036 | &mips_reg_names[15][0], \ | |
3037 | &mips_reg_names[16][0], \ | |
3038 | &mips_reg_names[17][0], \ | |
3039 | &mips_reg_names[18][0], \ | |
3040 | &mips_reg_names[19][0], \ | |
3041 | &mips_reg_names[20][0], \ | |
3042 | &mips_reg_names[21][0], \ | |
3043 | &mips_reg_names[22][0], \ | |
3044 | &mips_reg_names[23][0], \ | |
3045 | &mips_reg_names[24][0], \ | |
3046 | &mips_reg_names[25][0], \ | |
3047 | &mips_reg_names[26][0], \ | |
3048 | &mips_reg_names[27][0], \ | |
3049 | &mips_reg_names[28][0], \ | |
3050 | &mips_reg_names[29][0], \ | |
3051 | &mips_reg_names[30][0], \ | |
3052 | &mips_reg_names[31][0], \ | |
3053 | &mips_reg_names[32][0], \ | |
3054 | &mips_reg_names[33][0], \ | |
3055 | &mips_reg_names[34][0], \ | |
3056 | &mips_reg_names[35][0], \ | |
3057 | &mips_reg_names[36][0], \ | |
3058 | &mips_reg_names[37][0], \ | |
3059 | &mips_reg_names[38][0], \ | |
3060 | &mips_reg_names[39][0], \ | |
3061 | &mips_reg_names[40][0], \ | |
3062 | &mips_reg_names[41][0], \ | |
3063 | &mips_reg_names[42][0], \ | |
3064 | &mips_reg_names[43][0], \ | |
3065 | &mips_reg_names[44][0], \ | |
3066 | &mips_reg_names[45][0], \ | |
3067 | &mips_reg_names[46][0], \ | |
3068 | &mips_reg_names[47][0], \ | |
3069 | &mips_reg_names[48][0], \ | |
3070 | &mips_reg_names[49][0], \ | |
3071 | &mips_reg_names[50][0], \ | |
3072 | &mips_reg_names[51][0], \ | |
3073 | &mips_reg_names[52][0], \ | |
3074 | &mips_reg_names[53][0], \ | |
3075 | &mips_reg_names[54][0], \ | |
3076 | &mips_reg_names[55][0], \ | |
3077 | &mips_reg_names[56][0], \ | |
3078 | &mips_reg_names[57][0], \ | |
3079 | &mips_reg_names[58][0], \ | |
3080 | &mips_reg_names[59][0], \ | |
3081 | &mips_reg_names[60][0], \ | |
3082 | &mips_reg_names[61][0], \ | |
3083 | &mips_reg_names[62][0], \ | |
3084 | &mips_reg_names[63][0], \ | |
3085 | &mips_reg_names[64][0], \ | |
3086 | &mips_reg_names[65][0], \ | |
3087 | &mips_reg_names[66][0], \ | |
3088 | } | |
3089 | ||
46cca58c RS |
3090 | /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c. |
3091 | So define this for it. */ | |
3092 | #define DEBUG_REGISTER_NAMES \ | |
3093 | { \ | |
3094 | "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ | |
3095 | "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ | |
3096 | "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ | |
3097 | "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \ | |
3098 | "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \ | |
3099 | "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
3100 | "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \ | |
3101 | "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \ | |
3102 | "hi", "lo", "$fcr31" \ | |
3103 | } | |
3104 | ||
e75b25e7 MM |
3105 | /* If defined, a C initializer for an array of structures |
3106 | containing a name and a register number. This macro defines | |
3107 | additional names for hard registers, thus allowing the `asm' | |
3108 | option in declarations to refer to registers using alternate | |
3109 | names. | |
3110 | ||
3111 | We define both names for the integer registers here. */ | |
3112 | ||
3113 | #define ADDITIONAL_REGISTER_NAMES \ | |
3114 | { \ | |
3115 | { "$0", 0 + GP_REG_FIRST }, \ | |
3116 | { "$1", 1 + GP_REG_FIRST }, \ | |
3117 | { "$2", 2 + GP_REG_FIRST }, \ | |
3118 | { "$3", 3 + GP_REG_FIRST }, \ | |
3119 | { "$4", 4 + GP_REG_FIRST }, \ | |
3120 | { "$5", 5 + GP_REG_FIRST }, \ | |
3121 | { "$6", 6 + GP_REG_FIRST }, \ | |
3122 | { "$7", 7 + GP_REG_FIRST }, \ | |
3123 | { "$8", 8 + GP_REG_FIRST }, \ | |
3124 | { "$9", 9 + GP_REG_FIRST }, \ | |
3125 | { "$10", 10 + GP_REG_FIRST }, \ | |
3126 | { "$11", 11 + GP_REG_FIRST }, \ | |
3127 | { "$12", 12 + GP_REG_FIRST }, \ | |
3128 | { "$13", 13 + GP_REG_FIRST }, \ | |
3129 | { "$14", 14 + GP_REG_FIRST }, \ | |
3130 | { "$15", 15 + GP_REG_FIRST }, \ | |
3131 | { "$16", 16 + GP_REG_FIRST }, \ | |
3132 | { "$17", 17 + GP_REG_FIRST }, \ | |
3133 | { "$18", 18 + GP_REG_FIRST }, \ | |
3134 | { "$19", 19 + GP_REG_FIRST }, \ | |
3135 | { "$20", 20 + GP_REG_FIRST }, \ | |
3136 | { "$21", 21 + GP_REG_FIRST }, \ | |
3137 | { "$22", 22 + GP_REG_FIRST }, \ | |
3138 | { "$23", 23 + GP_REG_FIRST }, \ | |
3139 | { "$24", 24 + GP_REG_FIRST }, \ | |
3140 | { "$25", 25 + GP_REG_FIRST }, \ | |
3141 | { "$26", 26 + GP_REG_FIRST }, \ | |
3142 | { "$27", 27 + GP_REG_FIRST }, \ | |
3143 | { "$28", 28 + GP_REG_FIRST }, \ | |
3144 | { "$29", 29 + GP_REG_FIRST }, \ | |
3145 | { "$30", 30 + GP_REG_FIRST }, \ | |
3146 | { "$31", 31 + GP_REG_FIRST }, \ | |
3147 | { "$sp", 29 + GP_REG_FIRST }, \ | |
3148 | { "$fp", 30 + GP_REG_FIRST }, \ | |
3149 | { "at", 1 + GP_REG_FIRST }, \ | |
3150 | { "v0", 2 + GP_REG_FIRST }, \ | |
3151 | { "v1", 3 + GP_REG_FIRST }, \ | |
3152 | { "a0", 4 + GP_REG_FIRST }, \ | |
3153 | { "a1", 5 + GP_REG_FIRST }, \ | |
3154 | { "a2", 6 + GP_REG_FIRST }, \ | |
3155 | { "a3", 7 + GP_REG_FIRST }, \ | |
3156 | { "t0", 8 + GP_REG_FIRST }, \ | |
3157 | { "t1", 9 + GP_REG_FIRST }, \ | |
3158 | { "t2", 10 + GP_REG_FIRST }, \ | |
3159 | { "t3", 11 + GP_REG_FIRST }, \ | |
3160 | { "t4", 12 + GP_REG_FIRST }, \ | |
3161 | { "t5", 13 + GP_REG_FIRST }, \ | |
3162 | { "t6", 14 + GP_REG_FIRST }, \ | |
3163 | { "t7", 15 + GP_REG_FIRST }, \ | |
3164 | { "s0", 16 + GP_REG_FIRST }, \ | |
3165 | { "s1", 17 + GP_REG_FIRST }, \ | |
3166 | { "s2", 18 + GP_REG_FIRST }, \ | |
3167 | { "s3", 19 + GP_REG_FIRST }, \ | |
3168 | { "s4", 20 + GP_REG_FIRST }, \ | |
3169 | { "s5", 21 + GP_REG_FIRST }, \ | |
3170 | { "s6", 22 + GP_REG_FIRST }, \ | |
3171 | { "s7", 23 + GP_REG_FIRST }, \ | |
3172 | { "t8", 24 + GP_REG_FIRST }, \ | |
3173 | { "t9", 25 + GP_REG_FIRST }, \ | |
3174 | { "k0", 26 + GP_REG_FIRST }, \ | |
3175 | { "k1", 27 + GP_REG_FIRST }, \ | |
3176 | { "gp", 28 + GP_REG_FIRST }, \ | |
3177 | { "sp", 29 + GP_REG_FIRST }, \ | |
3178 | { "fp", 30 + GP_REG_FIRST }, \ | |
3179 | { "ra", 31 + GP_REG_FIRST }, \ | |
924706a0 MM |
3180 | { "$sp", 29 + GP_REG_FIRST }, \ |
3181 | { "$fp", 30 + GP_REG_FIRST }, \ | |
3182 | { "cc", FPSW_REGNUM }, \ | |
e75b25e7 MM |
3183 | } |
3184 | ||
3185 | /* Define results of standard character escape sequences. */ | |
3186 | #define TARGET_BELL 007 | |
3187 | #define TARGET_BS 010 | |
3188 | #define TARGET_TAB 011 | |
3189 | #define TARGET_NEWLINE 012 | |
3190 | #define TARGET_VT 013 | |
3191 | #define TARGET_FF 014 | |
3192 | #define TARGET_CR 015 | |
3193 | ||
3194 | /* A C compound statement to output to stdio stream STREAM the | |
3195 | assembler syntax for an instruction operand X. X is an RTL | |
3196 | expression. | |
3197 | ||
3198 | CODE is a value that can be used to specify one of several ways | |
3199 | of printing the operand. It is used when identical operands | |
3200 | must be printed differently depending on the context. CODE | |
3201 | comes from the `%' specification that was used to request | |
3202 | printing of the operand. If the specification was just `%DIGIT' | |
3203 | then CODE is 0; if the specification was `%LTR DIGIT' then CODE | |
3204 | is the ASCII code for LTR. | |
3205 | ||
3206 | If X is a register, this macro should print the register's name. | |
3207 | The names can be found in an array `reg_names' whose type is | |
3208 | `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'. | |
3209 | ||
3210 | When the machine description has a specification `%PUNCT' (a `%' | |
3211 | followed by a punctuation character), this macro is called with | |
3212 | a null pointer for X and the punctuation character for CODE. | |
3213 | ||
3214 | See mips.c for the MIPS specific codes. */ | |
3215 | ||
3216 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
3217 | ||
3218 | /* A C expression which evaluates to true if CODE is a valid | |
3219 | punctuation character for use in the `PRINT_OPERAND' macro. If | |
3220 | `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no | |
3221 | punctuation characters (except for the standard one, `%') are | |
3222 | used in this way. */ | |
3223 | ||
3224 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE] | |
3225 | ||
3226 | /* A C compound statement to output to stdio stream STREAM the | |
3227 | assembler syntax for an instruction operand that is a memory | |
3228 | reference whose address is ADDR. ADDR is an RTL expression. | |
3229 | ||
3230 | On some machines, the syntax for a symbolic address depends on | |
3231 | the section that the address refers to. On these machines, | |
3232 | define the macro `ENCODE_SECTION_INFO' to store the information | |
3233 | into the `symbol_ref', and then check for it here. */ | |
3234 | ||
3235 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
3236 | ||
3237 | ||
3238 | /* A C statement, to be executed after all slot-filler instructions | |
3239 | have been output. If necessary, call `dbr_sequence_length' to | |
3240 | determine the number of slots filled in a sequence (zero if not | |
3241 | currently outputting a sequence), to decide how many no-ops to | |
3242 | output, or whatever. | |
3243 | ||
3244 | Don't define this macro if it has nothing to do, but it is | |
3245 | helpful in reading assembly output if the extent of the delay | |
3246 | sequence is made explicit (e.g. with white space). | |
3247 | ||
3248 | Note that output routines for instructions with delay slots must | |
3249 | be prepared to deal with not being output as part of a sequence | |
3250 | (i.e. when the scheduling pass is not run, or when no slot | |
3251 | fillers could be found.) The variable `final_sequence' is null | |
3252 | when not processing a sequence, otherwise it contains the | |
3253 | `sequence' rtx being output. */ | |
3254 | ||
3255 | #define DBR_OUTPUT_SEQEND(STREAM) \ | |
3256 | do \ | |
3257 | { \ | |
3258 | if (set_nomacro > 0 && --set_nomacro == 0) \ | |
3259 | fputs ("\t.set\tmacro\n", STREAM); \ | |
3260 | \ | |
3261 | if (set_noreorder > 0 && --set_noreorder == 0) \ | |
3262 | fputs ("\t.set\treorder\n", STREAM); \ | |
3263 | \ | |
3264 | dslots_jump_filled++; \ | |
3265 | fputs ("\n", STREAM); \ | |
3266 | } \ | |
3267 | while (0) | |
3268 | ||
3269 | ||
3270 | /* How to tell the debugger about changes of source files. Note, the | |
3271 | mips ECOFF format cannot deal with changes of files inside of | |
3272 | functions, which means the output of parser generators like bison | |
3273 | is generally not debuggable without using the -l switch. Lose, | |
3274 | lose, lose. Silicon graphics seems to want all .file's hardwired | |
3275 | to 1. */ | |
3276 | ||
3277 | #ifndef SET_FILE_NUMBER | |
3278 | #define SET_FILE_NUMBER() ++num_source_filenames | |
3279 | #endif | |
3280 | ||
3281 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
3282 | mips_output_filename (STREAM, NAME) | |
3283 | ||
516a2dfd JW |
3284 | /* This is defined so that it can be overriden in iris6.h. */ |
3285 | #define ASM_OUTPUT_FILENAME(STREAM, NUM_SOURCE_FILENAMES, NAME) \ | |
3286 | do \ | |
3287 | { \ | |
3288 | fprintf (STREAM, "\t.file\t%d ", NUM_SOURCE_FILENAMES); \ | |
3289 | output_quoted_string (STREAM, NAME); \ | |
3290 | fputs ("\n", STREAM); \ | |
3291 | } \ | |
3292 | while (0) | |
3293 | ||
e75b25e7 MM |
3294 | /* This is how to output a note the debugger telling it the line number |
3295 | to which the following sequence of instructions corresponds. | |
3296 | Silicon graphics puts a label after each .loc. */ | |
3297 | ||
3298 | #ifndef LABEL_AFTER_LOC | |
3299 | #define LABEL_AFTER_LOC(STREAM) | |
3300 | #endif | |
3301 | ||
3302 | #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ | |
3303 | mips_output_lineno (STREAM, LINE) | |
3304 | ||
876c09d3 | 3305 | /* The MIPS implementation uses some labels for it's own purpose. The |
e75b25e7 MM |
3306 | following lists what labels are created, and are all formed by the |
3307 | pattern $L[a-z].*. The machine independent portion of GCC creates | |
3308 | labels matching: $L[A-Z][0-9]+ and $L[0-9]+. | |
3309 | ||
c5b7917e | 3310 | LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt. |
e75b25e7 MM |
3311 | $Lb[0-9]+ Begin blocks for MIPS debug support |
3312 | $Lc[0-9]+ Label for use in s<xx> operation. | |
3313 | $Le[0-9]+ End blocks for MIPS debug support | |
ab78d4a8 | 3314 | $Lp\..+ Half-pic labels. */ |
e75b25e7 MM |
3315 | |
3316 | /* This is how to output the definition of a user-level label named NAME, | |
3317 | such as the label on a static function or variable NAME. | |
3318 | ||
3319 | If we are optimizing the gp, remember that this label has been put | |
3320 | out, so we know not to emit an .extern for it in mips_asm_file_end. | |
3321 | We use one of the common bits in the IDENTIFIER tree node for this, | |
3322 | since those bits seem to be unused, and we don't have any method | |
3323 | of getting the decl nodes from the name. */ | |
3324 | ||
e75b25e7 MM |
3325 | #define ASM_OUTPUT_LABEL(STREAM,NAME) \ |
3326 | do { \ | |
3327 | assemble_name (STREAM, NAME); \ | |
3328 | fputs (":\n", STREAM); \ | |
e75b25e7 MM |
3329 | } while (0) |
3330 | ||
31c714e3 MM |
3331 | |
3332 | /* A C statement (sans semicolon) to output to the stdio stream | |
3333 | STREAM any text necessary for declaring the name NAME of an | |
3334 | initialized variable which is being defined. This macro must | |
3335 | output the label definition (perhaps using `ASM_OUTPUT_LABEL'). | |
3336 | The argument DECL is the `VAR_DECL' tree node representing the | |
3337 | variable. | |
3338 | ||
3339 | If this macro is not defined, then the variable name is defined | |
3340 | in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */ | |
3341 | ||
3342 | #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \ | |
f3b39eba MM |
3343 | do \ |
3344 | { \ | |
3345 | mips_declare_object (STREAM, NAME, "", ":\n", 0); \ | |
3346 | HALF_PIC_DECLARE (NAME); \ | |
3347 | } \ | |
3348 | while (0) | |
31c714e3 | 3349 | |
e75b25e7 MM |
3350 | |
3351 | /* This is how to output a command to make the user-level label named NAME | |
3352 | defined for reference from other files. */ | |
3353 | ||
e75b25e7 MM |
3354 | #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ |
3355 | do { \ | |
3356 | fputs ("\t.globl\t", STREAM); \ | |
3357 | assemble_name (STREAM, NAME); \ | |
3358 | fputs ("\n", STREAM); \ | |
3359 | } while (0) | |
3360 | ||
31c714e3 | 3361 | /* This says how to define a global common symbol. */ |
e75b25e7 MM |
3362 | |
3363 | #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ | |
69520b54 | 3364 | mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (SIZE)) |
e75b25e7 | 3365 | |
c5b7917e | 3366 | /* This says how to define a local common symbol (ie, not visible to |
31c714e3 | 3367 | linker). */ |
e75b25e7 MM |
3368 | |
3369 | #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ | |
69520b54 | 3370 | mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (SIZE)) |
e75b25e7 MM |
3371 | |
3372 | ||
3373 | /* This says how to output an external. It would be possible not to | |
3374 | output anything and let undefined symbol become external. However | |
3375 | the assembler uses length information on externals to allocate in | |
3376 | data/sdata bss/sbss, thereby saving exec time. */ | |
3377 | ||
3378 | #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \ | |
3379 | mips_output_external(STREAM,DECL,NAME) | |
3380 | ||
3381 | /* This says what to print at the end of the assembly file */ | |
3382 | #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM) | |
3383 | ||
3384 | ||
3385 | /* This is how to declare a function name. The actual work of | |
3386 | emitting the label is moved to function_prologue, so that we can | |
3387 | get the line number correctly emitted before the .ent directive, | |
3388 | and after any .file directives. | |
3389 | ||
3390 | Also, switch files if we are optimizing the global pointer. */ | |
3391 | ||
3392 | #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \ | |
3393 | { \ | |
3394 | extern FILE *asm_out_text_file; \ | |
3395 | if (TARGET_GP_OPT) \ | |
92d89408 DE |
3396 | { \ |
3397 | STREAM = asm_out_text_file; \ | |
3398 | /* ??? text_section gets called too soon. If the previous \ | |
3399 | function is in a special section and we're not, we have \ | |
3400 | to switch back to the text section. We can't call \ | |
3401 | text_section again as gcc thinks we're already there. */ \ | |
3402 | /* ??? See varasm.c. There are other things that get output \ | |
3403 | too early, like alignment (before we've switched STREAM). */ \ | |
3404 | if (DECL_SECTION_NAME (DECL) == NULL_TREE) \ | |
3405 | fprintf (STREAM, "%s\n", TEXT_SECTION_ASM_OP); \ | |
3406 | } \ | |
e75b25e7 MM |
3407 | \ |
3408 | current_function_name = NAME; \ | |
f3b39eba | 3409 | HALF_PIC_DECLARE (NAME); \ |
e75b25e7 MM |
3410 | } |
3411 | ||
3412 | /* This is how to output a reference to a user-level label named NAME. | |
3413 | `assemble_name' uses this. */ | |
3414 | ||
3415 | #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME) | |
3416 | ||
3417 | /* This is how to output an internal numbered label where | |
3418 | PREFIX is the class of label and NUM is the number within the class. */ | |
3419 | ||
3420 | #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \ | |
3421 | fprintf (STREAM, "$%s%d:\n", PREFIX, NUM) | |
3422 | ||
3423 | /* This is how to store into the string LABEL | |
3424 | the symbol_ref name of an internal numbered label where | |
3425 | PREFIX is the class of label and NUM is the number within the class. | |
3426 | This is suitable for output with `assemble_name'. */ | |
3427 | ||
3428 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
3429 | sprintf (LABEL, "*$%s%d", PREFIX, NUM) | |
3430 | ||
3431 | /* This is how to output an assembler line defining a `double' constant. */ | |
3432 | ||
3433 | #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \ | |
dbe9742d MM |
3434 | mips_output_double (STREAM, VALUE) |
3435 | ||
e75b25e7 MM |
3436 | |
3437 | /* This is how to output an assembler line defining a `float' constant. */ | |
3438 | ||
3439 | #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \ | |
dbe9742d MM |
3440 | mips_output_float (STREAM, VALUE) |
3441 | ||
e75b25e7 MM |
3442 | |
3443 | /* This is how to output an assembler line defining an `int' constant. */ | |
3444 | ||
e75b25e7 MM |
3445 | #define ASM_OUTPUT_INT(STREAM,VALUE) \ |
3446 | do { \ | |
3447 | fprintf (STREAM, "\t.word\t"); \ | |
3448 | output_addr_const (STREAM, (VALUE)); \ | |
3449 | fprintf (STREAM, "\n"); \ | |
3450 | } while (0) | |
3451 | ||
876c09d3 JW |
3452 | /* Likewise for 64 bit, `char' and `short' constants. */ |
3453 | ||
3454 | #define ASM_OUTPUT_DOUBLE_INT(STREAM,VALUE) \ | |
3455 | do { \ | |
3456 | if (TARGET_64BIT) \ | |
3457 | { \ | |
3458 | fprintf (STREAM, "\t.dword\t"); \ | |
3459 | output_addr_const (STREAM, (VALUE)); \ | |
3460 | fprintf (STREAM, "\n"); \ | |
3461 | } \ | |
3462 | else \ | |
3463 | { \ | |
3464 | assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \ | |
3465 | UNITS_PER_WORD, 1); \ | |
3466 | assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \ | |
3467 | UNITS_PER_WORD, 1); \ | |
3468 | } \ | |
3469 | } while (0) | |
e75b25e7 MM |
3470 | |
3471 | #define ASM_OUTPUT_SHORT(STREAM,VALUE) \ | |
3472 | { \ | |
3473 | fprintf (STREAM, "\t.half\t"); \ | |
3474 | output_addr_const (STREAM, (VALUE)); \ | |
3475 | fprintf (STREAM, "\n"); \ | |
3476 | } | |
3477 | ||
3478 | #define ASM_OUTPUT_CHAR(STREAM,VALUE) \ | |
3479 | { \ | |
3480 | fprintf (STREAM, "\t.byte\t"); \ | |
3481 | output_addr_const (STREAM, (VALUE)); \ | |
3482 | fprintf (STREAM, "\n"); \ | |
3483 | } | |
3484 | ||
e75b25e7 MM |
3485 | /* This is how to output an assembler line for a numeric constant byte. */ |
3486 | ||
3487 | #define ASM_OUTPUT_BYTE(STREAM,VALUE) \ | |
3488 | fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE)) | |
3489 | ||
3490 | /* This is how to output an element of a case-vector that is absolute. */ | |
3491 | ||
3492 | #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ | |
876c09d3 JW |
3493 | fprintf (STREAM, "\t%s\t$L%d\n", \ |
3494 | TARGET_LONG64 ? ".dword" : ".word", \ | |
3495 | VALUE) | |
e75b25e7 MM |
3496 | |
3497 | /* This is how to output an element of a case-vector that is relative. | |
e0bfcea5 ILT |
3498 | This is used for pc-relative code (e.g. when TARGET_ABICALLS or |
3499 | TARGET_EMBEDDED_PIC). */ | |
e75b25e7 MM |
3500 | |
3501 | #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \ | |
e0bfcea5 ILT |
3502 | do { \ |
3503 | if (TARGET_EMBEDDED_PIC) \ | |
3504 | fprintf (STREAM, "\t%s\t$L%d-$LS%d\n", \ | |
3505 | TARGET_LONG64 ? ".dword" : ".word", \ | |
3506 | VALUE, REL); \ | |
516a2dfd | 3507 | else if (! ABI_64BIT) \ |
e0bfcea5 ILT |
3508 | fprintf (STREAM, "\t%s\t$L%d\n", \ |
3509 | TARGET_LONG64 ? ".gpdword" : ".gpword", \ | |
3510 | VALUE); \ | |
516a2dfd JW |
3511 | else \ |
3512 | fprintf (STREAM, "\t%s\t.L%d\n", \ | |
3513 | TARGET_LONG64 ? ".dword" : ".word", \ | |
3514 | VALUE); \ | |
e0bfcea5 ILT |
3515 | } while (0) |
3516 | ||
3517 | /* When generating embedded PIC code we want to put the jump table in | |
3518 | the .text section. In all other cases, we want to put the jump | |
3519 | table in the .rdata section. Unfortunately, we can't use | |
3520 | JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional. | |
3521 | Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text | |
3522 | section if appropriate. */ | |
3523 | #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, INSN) \ | |
3524 | do { \ | |
3525 | if (TARGET_EMBEDDED_PIC) \ | |
3526 | text_section (); \ | |
3527 | ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ | |
3528 | } while (0) | |
e75b25e7 MM |
3529 | |
3530 | /* This is how to output an assembler line | |
3531 | that says to advance the location counter | |
3532 | to a multiple of 2**LOG bytes. */ | |
3533 | ||
3534 | #define ASM_OUTPUT_ALIGN(STREAM,LOG) \ | |
3535 | { \ | |
3536 | int mask = (1 << (LOG)) - 1; \ | |
3537 | fprintf (STREAM, "\t.align\t%d\n", (LOG)); \ | |
3538 | } | |
3539 | ||
3540 | /* This is how to output an assembler line to to advance the location | |
3541 | counter by SIZE bytes. */ | |
3542 | ||
3543 | #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ | |
3544 | fprintf (STREAM, "\t.space\t%u\n", (SIZE)) | |
3545 | ||
e75b25e7 MM |
3546 | /* This is how to output a string. */ |
3547 | #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \ | |
3548 | do { \ | |
3549 | register int i, c, len = (LEN), cur_pos = 17; \ | |
3550 | register unsigned char *string = (unsigned char *)(STRING); \ | |
3551 | fprintf ((STREAM), "\t.ascii\t\""); \ | |
3552 | for (i = 0; i < len; i++) \ | |
3553 | { \ | |
3554 | register int c = string[i]; \ | |
3555 | \ | |
3556 | switch (c) \ | |
3557 | { \ | |
3558 | case '\"': \ | |
3559 | case '\\': \ | |
3560 | putc ('\\', (STREAM)); \ | |
3561 | putc (c, (STREAM)); \ | |
3562 | cur_pos += 2; \ | |
3563 | break; \ | |
3564 | \ | |
3565 | case TARGET_NEWLINE: \ | |
87fc3db7 | 3566 | fputs ("\\n", (STREAM)); \ |
e75b25e7 MM |
3567 | if (i+1 < len \ |
3568 | && (((c = string[i+1]) >= '\040' && c <= '~') \ | |
3569 | || c == TARGET_TAB)) \ | |
3570 | cur_pos = 32767; /* break right here */ \ | |
3571 | else \ | |
3572 | cur_pos += 2; \ | |
3573 | break; \ | |
3574 | \ | |
3575 | case TARGET_TAB: \ | |
3576 | fputs ("\\t", (STREAM)); \ | |
3577 | cur_pos += 2; \ | |
3578 | break; \ | |
3579 | \ | |
3580 | case TARGET_FF: \ | |
3581 | fputs ("\\f", (STREAM)); \ | |
3582 | cur_pos += 2; \ | |
3583 | break; \ | |
3584 | \ | |
3585 | case TARGET_BS: \ | |
3586 | fputs ("\\b", (STREAM)); \ | |
3587 | cur_pos += 2; \ | |
3588 | break; \ | |
3589 | \ | |
3590 | case TARGET_CR: \ | |
3591 | fputs ("\\r", (STREAM)); \ | |
3592 | cur_pos += 2; \ | |
3593 | break; \ | |
3594 | \ | |
3595 | default: \ | |
3596 | if (c >= ' ' && c < 0177) \ | |
3597 | { \ | |
3598 | putc (c, (STREAM)); \ | |
3599 | cur_pos++; \ | |
3600 | } \ | |
3601 | else \ | |
3602 | { \ | |
3603 | fprintf ((STREAM), "\\%03o", c); \ | |
3604 | cur_pos += 4; \ | |
3605 | } \ | |
3606 | } \ | |
3607 | \ | |
3608 | if (cur_pos > 72 && i+1 < len) \ | |
3609 | { \ | |
3610 | cur_pos = 17; \ | |
3611 | fprintf ((STREAM), "\"\n\t.ascii\t\""); \ | |
3612 | } \ | |
3613 | } \ | |
3614 | fprintf ((STREAM), "\"\n"); \ | |
3615 | } while (0) | |
3616 | ||
3617 | /* Handle certain cpp directives used in header files on sysV. */ | |
3618 | #define SCCS_DIRECTIVE | |
3619 | ||
3620 | /* Output #ident as a in the read-only data section. */ | |
3621 | #define ASM_OUTPUT_IDENT(FILE, STRING) \ | |
3622 | { \ | |
3623 | char *p = STRING; \ | |
3624 | int size = strlen (p) + 1; \ | |
3625 | rdata_section (); \ | |
3626 | assemble_string (p, size); \ | |
3627 | } | |
3628 | \f | |
b82b0773 MM |
3629 | /* Default to -G 8 */ |
3630 | #ifndef MIPS_DEFAULT_GVALUE | |
3631 | #define MIPS_DEFAULT_GVALUE 8 | |
3632 | #endif | |
e75b25e7 | 3633 | |
f3b39eba MM |
3634 | /* Define the strings to put out for each section in the object file. */ |
3635 | #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */ | |
3636 | #define DATA_SECTION_ASM_OP "\t.data" /* large data */ | |
3637 | #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */ | |
3638 | #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */ | |
3639 | #define READONLY_DATA_SECTION rdata_section | |
e75b25e7 MM |
3640 | |
3641 | /* What other sections we support other than the normal .data/.text. */ | |
3642 | ||
876c09d3 | 3643 | #define EXTRA_SECTIONS in_sdata, in_rdata |
e75b25e7 MM |
3644 | |
3645 | /* Define the additional functions to select our additional sections. */ | |
3646 | ||
3647 | /* on the MIPS it is not a good idea to put constants in the text | |
3648 | section, since this defeats the sdata/data mechanism. This is | |
3649 | especially true when -O is used. In this case an effort is made to | |
3650 | address with faster (gp) register relative addressing, which can | |
3651 | only get at sdata and sbss items (there is no stext !!) However, | |
3652 | if the constant is too large for sdata, and it's readonly, it | |
3653 | will go into the .rdata section. */ | |
3654 | ||
3655 | #define EXTRA_SECTION_FUNCTIONS \ | |
3656 | void \ | |
3657 | sdata_section () \ | |
3658 | { \ | |
3659 | if (in_section != in_sdata) \ | |
3660 | { \ | |
3661 | fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ | |
3662 | in_section = in_sdata; \ | |
3663 | } \ | |
3664 | } \ | |
3665 | \ | |
3666 | void \ | |
3667 | rdata_section () \ | |
3668 | { \ | |
3669 | if (in_section != in_rdata) \ | |
3670 | { \ | |
3671 | fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \ | |
3672 | in_section = in_rdata; \ | |
3673 | } \ | |
3674 | } | |
3675 | ||
3676 | /* Given a decl node or constant node, choose the section to output it in | |
3677 | and select that section. */ | |
3678 | ||
365c6a0b | 3679 | #define SELECT_RTX_SECTION(MODE,RTX) mips_select_rtx_section (MODE, RTX) |
e75b25e7 | 3680 | |
365c6a0b | 3681 | #define SELECT_SECTION(DECL, RELOC) mips_select_section (DECL, RELOC) |
e75b25e7 MM |
3682 | |
3683 | \f | |
3684 | /* Store in OUTPUT a string (made with alloca) containing | |
3685 | an assembler-name for a local static variable named NAME. | |
3686 | LABELNO is an integer which is different for each call. */ | |
3687 | ||
3688 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
3689 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
3690 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
3691 | ||
3692 | #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \ | |
3693 | do \ | |
3694 | { \ | |
876c09d3 JW |
3695 | fprintf (STREAM, "\t%s\t%s,%s,8\n\t%s\t%s,0(%s)\n", \ |
3696 | TARGET_64BIT ? "dsubu" : "subu", \ | |
e75b25e7 MM |
3697 | reg_names[STACK_POINTER_REGNUM], \ |
3698 | reg_names[STACK_POINTER_REGNUM], \ | |
876c09d3 | 3699 | TARGET_64BIT ? "sd" : "sw", \ |
e75b25e7 MM |
3700 | reg_names[REGNO], \ |
3701 | reg_names[STACK_POINTER_REGNUM]); \ | |
3702 | } \ | |
3703 | while (0) | |
3704 | ||
3705 | #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \ | |
3706 | do \ | |
3707 | { \ | |
3708 | if (! set_noreorder) \ | |
3709 | fprintf (STREAM, "\t.set\tnoreorder\n"); \ | |
3710 | \ | |
3711 | dslots_load_total++; \ | |
3712 | dslots_load_filled++; \ | |
876c09d3 JW |
3713 | fprintf (STREAM, "\t%s\t%s,0(%s)\n\t%s\t%s,%s,8\n", \ |
3714 | TARGET_64BIT ? "ld" : "lw", \ | |
e75b25e7 MM |
3715 | reg_names[REGNO], \ |
3716 | reg_names[STACK_POINTER_REGNUM], \ | |
876c09d3 | 3717 | TARGET_64BIT ? "daddu" : "addu", \ |
e75b25e7 MM |
3718 | reg_names[STACK_POINTER_REGNUM], \ |
3719 | reg_names[STACK_POINTER_REGNUM]); \ | |
3720 | \ | |
3721 | if (! set_noreorder) \ | |
3722 | fprintf (STREAM, "\t.set\treorder\n"); \ | |
3723 | } \ | |
3724 | while (0) | |
3725 | ||
3726 | /* Define the parentheses used to group arithmetic operations | |
3727 | in assembler code. */ | |
3728 | ||
3729 | #define ASM_OPEN_PAREN "(" | |
3730 | #define ASM_CLOSE_PAREN ")" | |
3731 | ||
3732 | /* How to start an assembler comment. */ | |
3733 | #ifndef ASM_COMMENT_START | |
3734 | #define ASM_COMMENT_START "\t\t# " | |
3735 | #endif | |
3736 | ||
3737 | \f | |
3738 | ||
3739 | /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for | |
3740 | and mips-tdump.c to print them out. | |
3741 | ||
3742 | These must match the corresponding definitions in gdb/mipsread.c. | |
3743 | Unfortunately, gcc and gdb do not currently share any directories. */ | |
3744 | ||
3745 | #define CODE_MASK 0x8F300 | |
3746 | #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) | |
3747 | #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) | |
3748 | #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) | |
3f1f8d8c MM |
3749 | |
3750 | \f | |
3751 | /* Default definitions for size_t and ptrdiff_t. */ | |
3752 | ||
3753 | #ifndef SIZE_TYPE | |
876c09d3 JW |
3754 | #define NO_BUILTIN_SIZE_TYPE |
3755 | #define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int") | |
3f1f8d8c MM |
3756 | #endif |
3757 | ||
3758 | #ifndef PTRDIFF_TYPE | |
876c09d3 JW |
3759 | #define NO_BUILTIN_PTRDIFF_TYPE |
3760 | #define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int") | |
3f1f8d8c | 3761 | #endif |