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1/* Definitions of target machine for GNU compiler.
2 Motorola m88100 in an 88open OCS/BCS environment.
f8634644 3 Copyright (C) 1988, 1989, 1990, 1991, 1993 Free Software Foundation, Inc.
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4 Contributed by Michael Tiemann (tiemann@mcc.com)
5 Enhanced by Michael Meissner (meissner@osf.org)
2ff44f10 6 Version 2 port by Tom Wood (Tom_Wood@NeXT.com)
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7
8This file is part of GNU CC.
9
10GNU CC is free software; you can redistribute it and/or modify
11it under the terms of the GNU General Public License as published by
12the Free Software Foundation; either version 2, or (at your option)
13any later version.
14
15GNU CC is distributed in the hope that it will be useful,
16but WITHOUT ANY WARRANTY; without even the implied warranty of
17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18GNU General Public License for more details.
19
20You should have received a copy of the GNU General Public License
21along with GNU CC; see the file COPYING. If not, write to
22the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23
24/* The m88100 port of GNU CC adheres to the various standards from 88open.
25 These documents are available by writing:
26
27 88open Consortium Ltd.
28 100 Homeland Court, Suite 800
29 San Jose, CA 95112
30 (408) 436-6600
31
32 In brief, the current standards are:
33
34 Binary Compatibility Standard, Release 1.1A, May 1991
35 This provides for portability of application-level software at the
36 executable level for AT&T System V Release 3.2.
37
38 Object Compatibility Standard, Release 1.1A, May 1991
39 This provides for portability of application-level software at the
40 object file and library level for C, Fortran, and Cobol, and again,
41 largely for SVR3.
42
43 Under development are standards for AT&T System V Release 4, based on the
44 [generic] System V Application Binary Interface from AT&T. These include:
45
46 System V Application Binary Interface, Motorola 88000 Processor Supplement
47 Another document from AT&T for SVR4 specific to the m88100.
48 Available from Prentice Hall.
49
50 System V Application Binary Interface, Motorola 88000 Processor Supplement,
51 Release 1.1, Draft H, May 6, 1991
52 A proposed update to the AT&T document from 88open.
53
54 System V ABI Implementation Guide for the M88000 Processor,
55 Release 1.0, January 1991
56 A companion ABI document from 88open. */
57
58/* Other m88k*.h files include this one and override certain items.
59 At present, these are m88kv3.h, m88kv4.h, m88kdgux.h, and m88kluna.h.
60 Additionally, m88kv4.h and m88kdgux.h include svr4.h first. All other
61 m88k targets except m88kluna.h are based on svr3.h. */
62
63/* Choose SVR3 as the default. */
64#if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
65#include "svr3.h"
66#endif
67\f
68/* External types used. */
69
70/* What instructions are needed to manufacture an integer constant. */
71enum m88k_instruction {
72 m88k_zero,
73 m88k_or,
74 m88k_subu,
75 m88k_or_lo16,
76 m88k_or_lo8,
77 m88k_set,
78 m88k_oru_hi16,
79 m88k_oru_or
80};
81
82/* External variables/functions defined in m88k.c. */
83
84extern char *m88k_pound_sign;
85extern char *m88k_short_data;
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86extern char *m88k_version;
87extern char m88k_volatile_code;
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88
89extern int m88k_gp_threshold;
90extern int m88k_prologue_done;
91extern int m88k_function_number;
92extern int m88k_fp_offset;
93extern int m88k_stack_size;
94extern int m88k_case_index;
1039fa46 95extern int m88k_version_0300;
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96
97extern struct rtx_def *m88k_compare_reg;
98extern struct rtx_def *m88k_compare_op0;
99extern struct rtx_def *m88k_compare_op1;
100
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101extern enum attr_cpu m88k_cpu;
102
b6ecac21 103extern int null_prologue ();
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104extern int integer_ok_for_set ();
105extern int m88k_debugger_offset ();
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106
107extern void emit_bcnd ();
108extern void expand_block_move ();
79e68feb 109extern void m88k_layout_frame ();
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110extern void m88k_expand_prologue ();
111extern void m88k_begin_prologue ();
112extern void m88k_end_prologue ();
113extern void m88k_expand_epilogue ();
114extern void m88k_begin_epilogue ();
115extern void m88k_end_epilogue ();
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116extern void output_function_profiler ();
117extern void output_function_block_profiler ();
118extern void output_block_profiler ();
119extern void output_file_start ();
120extern void output_ascii ();
121extern void output_label ();
122extern void print_operand ();
123extern void print_operand_address ();
124
125extern char *output_load_const_int ();
126extern char *output_load_const_float ();
127extern char *output_load_const_double ();
128extern char *output_load_const_dimode ();
129extern char *output_and ();
130extern char *output_ior ();
131extern char *output_xor ();
132extern char *output_call ();
133
134extern struct rtx_def *emit_test ();
135extern struct rtx_def *legitimize_address ();
136extern struct rtx_def *legitimize_operand ();
137extern struct rtx_def *m88k_function_arg ();
138extern struct rtx_def *m88k_builtin_saveregs ();
139
140extern enum m88k_instruction classify_integer ();
141
142/* external variables defined elsewhere in the compiler */
143
144extern int target_flags; /* -m compiler switches */
145extern int frame_pointer_needed; /* current function has a FP */
146extern int current_function_pretend_args_size; /* args size without ... */
147extern int flag_delayed_branch; /* -fdelayed-branch */
148extern int flag_pic; /* -fpic */
149extern char * reg_names[];
150
151/* Specify the default monitors. The meaning of these values can
152 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
153 values downward from 0x8000 are tests that will soon go away.
154 values upward from 0x1 are generally useful tests that will remain. */
155
156#ifndef MONITOR_GCC
157#define MONITOR_GCC 0
158#endif
159\f
160/*** Controlling the Compilation Driver, `gcc' ***/
161
162/* Some machines may desire to change what optimizations are performed for
163 various optimization levels. This macro, if defined, is executed once
164 just after the optimization level is determined and before the remainder
165 of the command options have been parsed. Values set in this macro are
166 used as the default values for the other command line options.
167
168 LEVEL is the optimization level specified; 2 if -O2 is specified,
169 1 if -O is specified, and 0 if neither is specified. */
170
171/* This macro used to store 0 in flag_signed_bitfields.
172 Not only is that misuse of this macro; the whole idea is wrong.
173
174 The GNU C dialect makes bitfields signed by default,
175 regardless of machine type. Making any machine inconsistent in this
176 regard is bad for portability.
177
178 I chose to make bitfields signed by default because this is consistent
179 with the way ordinary variables are handled: `int' equals `signed int'.
180 If there is a good reason to prefer making bitfields unsigned by default,
181 it cannot have anything to do with the choice of machine.
182 If the reason is good enough, we should change the convention for all machines.
183
184 -- rms, 20 July 1991. */
185
186#define OPTIMIZATION_OPTIONS(LEVEL) \
187 do { \
188 if (LEVEL) \
189 { \
190 flag_omit_frame_pointer = 1; \
191 } \
192 } while (0)
193
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194/* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
195 Here, the CPU_DEFAULT is assumed to be -m88100. */
196#undef CPP_SPEC
197#define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
198 %{!m88000:%{!m88110:-D__m88100__}}"
199
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200/* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
201 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
202 in svr4.h.
203 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
204 STARTFILE_SPEC redefined in m88kdgux.h. */
205\f
206/*** Run-time Target Specification ***/
207
208/* Names to predefine in the preprocessor for this target machine.
209 Redefined in m88kv3.h, m88kv4.h, m88kdgux.h, and m88kluna.h. */
65c42379 210#define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2 -Asystem(unix) -Acpu(m88k) -Amachine(m88k)"
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211
212#define TARGET_VERSION fprintf (stderr, " (%s%s)", \
213 VERSION_INFO1, VERSION_INFO2)
214
215/* Print subsidiary information on the compiler version in use.
216 Redefined in m88kv4.h, and m88kluna.h. */
217#define VERSION_INFO1 "88open OCS/BCS, "
2ff44f10 218#define VERSION_INFO2 "12/16/92"
79e68feb 219#define VERSION_STRING version_string
2ff44f10 220#define TM_SCCS_ID "@(#)m88k.h 2.3.3.2 12/16/92 08:26:09"
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221
222/* Run-time compilation parameters selecting different hardware subsets. */
223
224/* Macro to define tables used to set the flags.
225 This is a list in braces of pairs in braces,
226 each pair being { "NAME", VALUE }
227 where VALUE is the bits to set or minus the bits to clear.
228 An empty string NAME is used to identify the default VALUE. */
229
230#define MASK_88100 0x00000001 /* Target m88100 */
231#define MASK_88110 0x00000002 /* Target m88110 */
232#define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
233#define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
234#define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
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235#define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
236#define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
237#define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
238#define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
239#define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
240#define MASK_USE_DIV 0x00000800 /* No signed div. checks */
241#define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
242#define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
243#define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
57bc9c68 244#define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
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245
246#define MASK_88000 (MASK_88100 | MASK_88110)
247#define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
248 MASK_HANDLE_LARGE_SHIFT)
249
250#define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
251#define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
252#define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
253
254#define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
255#define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
256#define TARGET_SVR4 (target_flags & MASK_SVR4)
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257#define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
258#define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
259#define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
260#define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
261#define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
262#define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
263#define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
264#define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
265#define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
57bc9c68 266#define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
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267
268#define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
269
270/* Redefined in m88kv3.h,m88kv4.h, and m88kdgux.h. */
271#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
272#define CPU_DEFAULT MASK_88100
273
274#define TARGET_SWITCHES \
275 { \
276 { "88110", MASK_88110 }, \
277 { "88100", MASK_88100 }, \
278 { "88000", MASK_88000 }, \
279 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
280 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
281 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
282 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
283 { "svr4", MASK_SVR4 }, \
284 { "svr3", -MASK_SVR4 }, \
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285 { "no-underscores", MASK_NO_UNDERSCORES }, \
286 { "big-pic", MASK_BIG_PIC }, \
287 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
288 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
289 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
290 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
291 { "use-div-instruction", MASK_USE_DIV }, \
292 { "identify-revision", MASK_IDENTIFY_REVISION }, \
293 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
294 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
295 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
1039fa46 296 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
57bc9c68 297 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
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298 SUBTARGET_SWITCHES \
299 /* Default switches */ \
300 { "", TARGET_DEFAULT }, \
301 }
302
303/* Redefined in m88kdgux.h. */
304#define SUBTARGET_SWITCHES
305
306/* Macro to define table for command options with values. */
307
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308#define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
309 { "version-", &m88k_version } }
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310
311/* Do any checking or such that is needed after processing the -m switches. */
312
313#define OVERRIDE_OPTIONS \
314 do { \
315 register int i; \
316 \
317 if ((target_flags & MASK_88000) == 0) \
318 target_flags |= CPU_DEFAULT; \
319 \
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320 m88k_cpu = (TARGET_88000 ? CPU_M88000 \
321 : (TARGET_88100 ? CPU_M88100 : CPU_M88110)); \
322 \
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323 if (TARGET_BIG_PIC) \
324 flag_pic = 2; \
325 \
326 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
327 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
328 \
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329 m88k_version_0300 = (m88k_version != 0 \
330 && strcmp (m88k_version, "03.00") >= 0); \
331 \
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332 if (VERSION_0300_SYNTAX) \
333 { \
334 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
335 reg_names[i]--; \
336 m88k_pound_sign = "#"; \
1039fa46 337 if (m88k_version == 0) \
2ff44f10 338 m88k_version = VERSION_0400_SYNTAX ? "04.00" : "03.00"; \
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339 else if (strcmp (m88k_version, "03.00") < 0) \
340 error ("Specified assembler version (%s) is less that 03.00", \
341 m88k_version); \
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342 } \
343 \
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344 m88k_version_0300 = (m88k_version != 0 \
345 && strcmp (m88k_version, "03.00") >= 0); \
346 \
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347 if (m88k_short_data) \
348 { \
349 char *p = m88k_short_data; \
350 while (*p) \
351 if (*p >= '0' && *p <= '9') \
352 p++; \
353 else \
354 { \
355 error ("Invalid option `-mshort-data-%s'", m88k_short_data); \
356 break; \
357 } \
358 m88k_gp_threshold = atoi (m88k_short_data); \
359 if (flag_pic) \
360 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
361 } \
362 } while (0)
363\f
364/*** Storage Layout ***/
365
366/* Sizes in bits of the various types. */
367#define CHAR_TYPE_SIZE 8
368#define SHORT_TYPE_SIZE 16
369#define INT_TYPE_SIZE 32
370#define LONG_TYPE_SIZE 32
371#define LONG_LONG_TYPE_SIZE 64
372#define FLOAT_TYPE_SIZE 32
373#define DOUBLE_TYPE_SIZE 64
374#define LONG_DOUBLE_TYPE_SIZE 64
375
376/* Define this if most significant bit is lowest numbered
377 in instructions that operate on numbered bit-fields.
378 Somewhat arbitrary. It matches the bit field patterns. */
379#define BITS_BIG_ENDIAN 1
380
381/* Define this if most significant byte of a word is the lowest numbered.
382 That is true on the m88000. */
383#define BYTES_BIG_ENDIAN 1
384
385/* Define this if most significant word of a multiword number is the lowest
386 numbered.
387 For the m88000 we can decide arbitrarily since there are no machine
388 instructions for them. */
389#define WORDS_BIG_ENDIAN 1
390
de857550 391/* Number of bits in an addressable storage unit */
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392#define BITS_PER_UNIT 8
393
394/* Width in bits of a "word", which is the contents of a machine register.
395 Note that this is not necessarily the width of data type `int';
396 if using 16-bit ints on a 68000, this would still be 32.
397 But on a machine with 16-bit registers, this would be 16. */
398#define BITS_PER_WORD 32
399
400/* Width of a word, in units (bytes). */
401#define UNITS_PER_WORD 4
402
403/* Width in bits of a pointer.
404 See also the macro `Pmode' defined below. */
405#define POINTER_SIZE 32
406
407/* Allocation boundary (in *bits*) for storing arguments in argument list. */
408#define PARM_BOUNDARY 32
409
410/* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
411#define MAX_PARM_BOUNDARY 64
412
413/* Boundary (in *bits*) on which stack pointer should be aligned. */
414#define STACK_BOUNDARY 128
415
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416/* Allocation boundary (in *bits*) for the code of a function. On the
417 m88100, it is desirable to align to a cache line. However, SVR3 targets
418 only provided 8 byte alignment. The m88110 cache is small, so align
419 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
420#define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
421 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
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422
423/* No data type wants to be aligned rounder than this. */
424#define BIGGEST_ALIGNMENT 64
425
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426/* The best alignment to use in cases where we have a choice. */
427#define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
428
429/* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
79e68feb 430#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
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431 ((TREE_CODE (EXP) == STRING_CST \
432 && (ALIGN) < FASTEST_ALIGNMENT) \
433 ? FASTEST_ALIGNMENT : (ALIGN))
79e68feb 434
2c39ec40 435/* Make arrays of chars 4/8 byte aligned for the same reasons. */
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436#define DATA_ALIGNMENT(TYPE, ALIGN) \
437 (TREE_CODE (TYPE) == ARRAY_TYPE \
438 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
2c39ec40 439 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
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440
441/* Alignment of field after `int : 0' in a structure.
442 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
443/* #define EMPTY_FIELD_BOUNDARY 8 */
444
445/* Every structure's size must be a multiple of this. */
446#define STRUCTURE_SIZE_BOUNDARY 8
447
de857550 448/* Set this nonzero if move instructions will actually fail to work
79e68feb 449 when given unaligned data. */
de857550 450#define STRICT_ALIGNMENT 1
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451
452/* A bitfield declared as `int' forces `int' alignment for the struct. */
453#define PCC_BITFIELD_TYPE_MATTERS 1
454
455/* Maximum size (in bits) to use for the largest integral type that
456 replaces a BLKmode type. */
457/* #define MAX_FIXED_MODE_SIZE 0 */
458
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459/* Check a `double' value for validity for a particular machine mode.
460 This is defined to avoid crashes outputting certain constants.
461 Since we output the number in hex, the assembler won't choke on it. */
462/* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
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463
464/* A code distinguishing the floating point format of the target machine. */
465/* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
466\f
467/*** Register Usage ***/
468
469/* Number of actual hardware registers.
470 The hardware registers are assigned numbers for the compiler
471 from 0 to just below FIRST_PSEUDO_REGISTER.
472 All registers that the compiler knows about must be given numbers,
473 even those that are not normally considered general registers.
474
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475 The m88100 has a General Register File (GRF) of 32 32-bit registers.
476 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
477#define FIRST_PSEUDO_REGISTER 64
478#define FIRST_EXTENDED_REGISTER 32
479
480/* General notes on extended registers, their use and misuse.
481
482 Possible good uses:
483
484 spill area instead of memory.
485 -waste if only used once
486
2296cba3 487 floating point calculations
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488 -probably a waste unless we have run out of general purpose registers
489
490 freeing up general purpose registers
491 -e.g. may be able to have more loop invariants if floating
492 point is moved into extended registers.
493
494
495 I've noticed wasteful moves into and out of extended registers; e.g. a load
496 into x21, then inside a loop a move into r24, then r24 used as input to
497 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
498 will address this. This wastes a move, but the load,store and move could
499 have been saved had extended registers been used throughout.
500 E.g. in the code following code, if z and xz are placed in extended
501 registers, there is no need to save preserve registers.
502
503 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
504
505 double z=0,xz=4.5;
506
507 foo(a,b)
508 long a,b;
509 {
510 while (a < b)
511 {
512 k = b + c + d + e + f + g + h + a + i + j++;
513 z += xz;
514 a++;
515 }
516 printf("k= %d; z=%f;\n", k, z);
517 }
518
519 I've found that it is possible to change the constraints (putting * before
520 the 'r' constraints int the fadd.ddd instruction) and get the entire
521 addition and store to go into extended registers. However, this also
522 forces simple addition and return of floating point arguments to a
523 function into extended registers. Not the correct solution.
524
525 Found the following note in local-alloc.c which may explain why I can't
526 get both registers to be in extended registers since two are allocated in
527 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
528 why an extended register is used instead of just using the preserve
529 register.
530
531 from local-alloc.c:
532 We have provision to exempt registers, even when they are contained
533 within the block, that can be tied to others that are not contained in it.
534 This is so that global_alloc could process them both and tie them then.
535 But this is currently disabled since tying in global_alloc is not
536 yet implemented.
537
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538 The explanation of why the preserved register is not used is as follows,
539 I believe. The registers are being allocated in order. Tying is not
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540 done so efficiently, so when it comes time to do the first allocation,
541 there are no registers left to use without spilling except extended
542 registers. Then when the next pseudo register needs a hard reg, there
543 are still no registers to be had for free, but this one must be a GRF
544 reg instead of an extended reg, so a preserve register is spilled. Thus
545 the move from extended to GRF is necessitated. I do not believe this can
546 be 'fixed' through the config/*m88k* files.
547
548 gcc seems to sometimes make worse use of register allocation -- not counting
549 moves -- whenever extended registers are present. For example in the
550 whetstone, the simple for loop (slightly modified)
551 for(i = 1; i <= n1; i++)
552 {
553 x1 = (x1 + x2 + x3 - x4) * t;
554 x2 = (x1 + x2 - x3 + x4) * t;
555 x3 = (x1 - x2 + x3 + x4) * t;
556 x4 = (x1 + x2 + x3 + x4) * t;
557 }
558 in general loads the high bits of the addresses of x2-x4 and i into registers
559 outside the loop. Whenever extended registers are used, it loads all of
560 these inside the loop. My conjecture is that since the 88110 has so many
561 registers, and gcc makes no distinction at this point -- just that they are
562 not fixed, that in loop.c it believes it can expect a number of registers
563 to be available. Then it allocates 'too many' in local-alloc which causes
564 problems later. 'Too many' are allocated because a large portion of the
565 registers are extended registers and cannot be used for certain purposes
566 ( e.g. hold the address of a variable). When this loop is compiled on its
567 own, the problem does not occur. I don't know the solution yet, though it
568 is probably in the base sources. Possibly a different way to calculate
569 "threshold". */
570
571/* 1 for registers that have pervasive standard uses and are not available
572 for the register allocator. Registers r14-r25 and x22-x29 are expected
573 to be preserved across function calls.
574
575 On the 88000, the standard uses of the General Register File (GRF) are:
79e68feb
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576 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
577 Reg 1 = Subroutine return pointer (hardware).
578 Reg 2-9 = Parameter registers (OCS).
579 Reg 10 = OCS reserved temporary.
580 Reg 11 = Static link if needed [OCS reserved temporary].
581 Reg 12 = Address of structure return (OCS).
582 Reg 13 = OCS reserved temporary.
583 Reg 14-25 = Preserved register set.
584 Reg 26-29 = Reserved by OCS and ABI.
585 Reg 30 = Frame pointer (Common use).
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586 Reg 31 = Stack pointer.
587
588 The following follows the current 88open UCS specification for the
589 Extended Register File (XRF):
590 Reg 32 = x0 Always equal to zero
2296cba3 591 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
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592 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
593 Reg 62-63 = x30-x31 Reserved for future ABI use.
594
595 Note: The current 88110 extended register mapping is subject to change.
596 The bias towards caller-save registers is based on the
597 presumption that memory traffic can potentially be reduced by
598 allowing the "caller" to save only that part of the register
599 which is actually being used. (i.e. don't do a st.x if a st.d
600 is sufficient). Also, in scientific code (a.k.a. Fortran), the
601 large number of variables defined in common blocks may require
602 that almost all registers be saved across calls anyway. */
79e68feb
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603
604#define FIXED_REGISTERS \
dfa69feb 605 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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606 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
607 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
608 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
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609
610/* 1 for registers not available across function calls.
611 These must include the FIXED_REGISTERS and also any
612 registers that can be used without being saved.
613 The latter must include the registers where values are returned
614 and the register where structure-value addresses are passed.
615 Aside from that, you can include as many other registers as you like. */
616
617#define CALL_USED_REGISTERS \
618 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
a9c3f03a
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619 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
620 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
621 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
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622
623/* Macro to conditionally modify fixed_regs/call_used_regs. */
624#define CONDITIONAL_REGISTER_USAGE \
625 { \
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626 if (! TARGET_88110) \
627 { \
628 register int i; \
629 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
630 { \
631 fixed_regs[i] = 1; \
632 call_used_regs[i] = 1; \
633 } \
634 } \
79e68feb 635 if (flag_pic) \
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636 { \
637 /* Current hack to deal with -fpic -O2 problems. */ \
638 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
639 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
640 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
641 } \
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642 }
643
644/* These interfaces that don't apply to the m88000. */
645/* OVERLAPPING_REGNO_P(REGNO) 0 */
646/* INSN_CLOBBERS_REGNO_P(INSN, REGNO) 0 */
647/* PRESERVE_DEATH_INFO_REGNO_P(REGNO) 0 */
648
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649/* True if register is an extended register. */
650#define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
651
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652/* Return number of consecutive hard regs needed starting at reg REGNO
653 to hold something of mode MODE.
654 This is ordinarily the length in words of a value of mode MODE
655 but can be less for certain modes in special long registers.
656
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657 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
658 An XRF register can hold any mode, but two GRF registers are required
659 for larger modes. */
660#define HARD_REGNO_NREGS(REGNO, MODE) \
edebe164 661 (XRF_REGNO_P (REGNO) \
a9c3f03a 662 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
79e68feb
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663
664/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
665
666 For double integers, we never put the value into an odd register so that
667 the operators don't run into the situation where the high part of one of
a9c3f03a
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668 the inputs is the low part of the result register. (It's ok if the output
669 registers are the same as the input registers.) The XRF registers can
670 hold all modes, but only DF and SF modes can be manipulated in these
671 registers. The compiler should be allowed to use these as a fast spill
672 area. */
673#define HARD_REGNO_MODE_OK(REGNO, MODE) \
edebe164
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674 (XRF_REGNO_P(REGNO) \
675 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
a9c3f03a
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676 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
677 || ((REGNO) & 1) == 0))
79e68feb
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678
679/* Value is 1 if it is a good idea to tie two pseudo registers
680 when one has mode MODE1 and one has mode MODE2.
681 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
682 for any hard reg, then this must be 0 for correct output. */
683#define MODES_TIEABLE_P(MODE1, MODE2) \
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684 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
685 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
686 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
687 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
79e68feb
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688
689/* Specify the registers used for certain standard purposes.
690 The values of these macros are register numbers. */
691
692/* the m88000 pc isn't overloaded on a register that the compiler knows about. */
693/* #define PC_REGNUM */
694
695/* Register to use for pushing function arguments. */
696#define STACK_POINTER_REGNUM 31
697
698/* Base register for access to local variables of the function. */
699#define FRAME_POINTER_REGNUM 30
700
701/* Base register for access to arguments of the function. */
702#define ARG_POINTER_REGNUM 0
703
704/* Register used in cases where a temporary is known to be safe to use. */
705#define TEMP_REGNUM 10
706
707/* Register in which static-chain is passed to a function. */
708#define STATIC_CHAIN_REGNUM 11
709
710/* Register in which address to store a structure value
711 is passed to a function. */
712#define STRUCT_VALUE_REGNUM 12
713
714/* Register to hold the addressing base for position independent
715 code access to data items. */
716#define PIC_OFFSET_TABLE_REGNUM 25
717
718/* Order in which registers are preferred (most to least). Use temp
719 registers, then param registers top down. Preserve registers are
720 top down to maximize use of double memory ops for register save.
a9c3f03a
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721 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
722 in most environments with the -fcall-used- or -fcall-saved- options. */
723#define REG_ALLOC_ORDER \
724 { \
725 13, 12, 11, 10, 29, 28, 27, 26, \
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726 62, 63, 9, 8, 7, 6, 5, 4, \
727 3, 2, 1, 53, 52, 51, 50, 49, \
a9c3f03a
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728 48, 47, 46, 45, 44, 43, 42, 41, \
729 40, 39, 38, 37, 36, 35, 34, 33, \
730 25, 24, 23, 22, 21, 20, 19, 18, \
731 17, 16, 15, 14, 61, 60, 59, 58, \
732 57, 56, 55, 54, 30, 31, 0, 32}
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733
734/* Order for leaf functions. */
735#define REG_LEAF_ALLOC_ORDER \
736 { \
737 9, 8, 7, 6, 13, 12, 11, 10, \
738 29, 28, 27, 26, 62, 63, 5, 4, \
739 3, 2, 0, 53, 52, 51, 50, 49, \
740 48, 47, 46, 45, 44, 43, 42, 41, \
741 40, 39, 38, 37, 36, 35, 34, 33, \
742 25, 24, 23, 22, 21, 20, 19, 18, \
743 17, 16, 15, 14, 61, 60, 59, 58, \
744 57, 56, 55, 54, 30, 31, 1, 32}
745
746/* Switch between the leaf and non-leaf orderings. The purpose is to avoid
747 write-over scoreboard delays between caller and callee. */
748#define ORDER_REGS_FOR_LOCAL_ALLOC \
749{ \
750 static int leaf[] = REG_LEAF_ALLOC_ORDER; \
751 static int nonleaf[] = REG_ALLOC_ORDER; \
752 \
753 bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \
754 FIRST_PSEUDO_REGISTER * sizeof (int)); \
755}
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756\f
757/*** Register Classes ***/
758
759/* Define the classes of registers for register constraints in the
760 machine description. Also define ranges of constants.
761
762 One of the classes must always be named ALL_REGS and include all hard regs.
763 If there is more than one class, another class must be named NO_REGS
764 and contain no registers.
765
766 The name GENERAL_REGS must be the name of a class (or an alias for
767 another name such as ALL_REGS). This is the class of registers
768 that is allowed by "g" or "r" in a register constraint.
769 Also, registers outside this class are allocated only when
770 instructions express preferences for them.
771
772 The classes must be numbered in nondecreasing order; that is,
773 a larger-numbered class must never be contained completely
774 in a smaller-numbered class.
775
776 For any two classes, it is very desirable that there be another
777 class that represents their union. */
778
a9c3f03a 779/* The m88000 hardware has two kinds of registers. In addition, we denote
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780 the arg pointer as a separate class. */
781
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782enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
783 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
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784
785#define N_REG_CLASSES (int) LIM_REG_CLASSES
786
787/* Give names of register classes as strings for dump file. */
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788#define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
789 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
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790
791/* Define which registers fit in which classes.
792 This is an initializer for a vector of HARD_REG_SET
793 of length N_REG_CLASSES. */
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794#define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
795 {0x00000001, 0x00000000}, \
796 {0x00000000, 0xffffffff}, \
797 {0xfffffffe, 0x00000000}, \
798 {0xffffffff, 0x00000000}, \
799 {0xfffffffe, 0xffffffff}, \
800 {0xffffffff, 0xffffffff}}
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801
802/* The same information, inverted:
803 Return the class number of the smallest class containing
804 reg number REGNO. This could be a conditional expression
805 or could index an array. */
a9c3f03a
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806#define REGNO_REG_CLASS(REGNO) \
807 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
79e68feb
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808
809/* The class value for index registers, and the one for base regs. */
a9c3f03a 810#define BASE_REG_CLASS AGRF_REGS
79e68feb
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811#define INDEX_REG_CLASS GENERAL_REGS
812
a9c3f03a
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813/* Get reg_class from a letter such as appears in the machine description.
814 For the 88000, the following class/letter is defined for the XRF:
815 x - Extended register file */
816#define REG_CLASS_FROM_LETTER(C) \
817 (((C) == 'x') ? XRF_REGS : NO_REGS)
79e68feb
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818
819/* Macros to check register numbers against specific register classes.
820 These assume that REGNO is a hard or pseudo reg number.
821 They give nonzero only if REGNO is a hard reg of the suitable class
822 or a pseudo reg currently allocated to a suitable hard reg.
823 Since they use reg_renumber, they are safe only once reg_renumber
824 has been allocated, which happens in local-alloc.c. */
a9c3f03a
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825#define REGNO_OK_FOR_BASE_P(REGNO) \
826 ((REGNO) < FIRST_EXTENDED_REGISTER \
827 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
828#define REGNO_OK_FOR_INDEX_P(REGNO) \
829 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
830 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
79e68feb
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831
832/* Given an rtx X being reloaded into a reg required to be
833 in class CLASS, return the class of reg to actually use.
834 In general this is just CLASS; but on some machines
835 in some cases it is preferable to use a more restrictive class.
836 Double constants should be in a register iff they can be made cheaply. */
a9c3f03a
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837#define PREFERRED_RELOAD_CLASS(X,CLASS) \
838 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
79e68feb 839
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840/* Return the register class of a scratch register needed to load IN
841 into a register of class CLASS in MODE. On the m88k, when PIC, we
842 need a temporary when loading some addresses into a register. */
843#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
844 ((flag_pic \
845 && GET_CODE (IN) == CONST \
846 && GET_CODE (XEXP (IN, 0)) == PLUS \
847 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
848 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
849
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850/* Return the maximum number of consecutive registers
851 needed to represent mode MODE in a register of class CLASS. */
a9c3f03a
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852#define CLASS_MAX_NREGS(CLASS, MODE) \
853 ((((CLASS) == XRF_REGS) ? 1 \
854 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
79e68feb
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855
856/* Letters in the range `I' through `P' in a register constraint string can
857 be used to stand for particular ranges of immediate operands. The C
858 expression is true iff C is a known letter and VALUE is appropriate for
859 that letter.
860
de857550 861 For the m88000, the following constants are used:
79e68feb
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862 `I' requires a non-negative 16-bit value.
863 `J' requires a non-positive 16-bit value.
c15d8db6 864 `K' requires a non-negative value < 32.
79e68feb
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865 `L' requires a constant with only the upper 16-bits set.
866 `M' requires constant values that can be formed with `set'.
867 `N' requires a negative value.
868 `O' requires zero.
869 `P' requires a non-negative value. */
870
871/* Quick tests for certain values. */
872#define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
873#define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
874#define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
875#define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
876#define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
877#define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
878
879#define CONST_OK_FOR_LETTER_P(VALUE, C) \
880 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
881 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
c15d8db6 882 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
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883 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
884 : (C) == 'M' ? integer_ok_for_set (VALUE) \
885 : (C) == 'N' ? (VALUE) < 0 \
886 : (C) == 'O' ? (VALUE) == 0 \
887 : (C) == 'P' ? (VALUE) >= 0 \
888 : 0)
889
890/* Similar, but for floating constants, and defining letters G and H.
891 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
892 constraints are: `G' requires zero, and `H' requires one or two. */
893#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
894 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
895 && CONST_DOUBLE_LOW (VALUE) == 0) \
896 : 0)
897
898/* Letters in the range `Q' through `U' in a register constraint string
899 may be defined in a machine-dependent fashion to stand for arbitrary
900 operand types.
901
902 For the m88k, `Q' handles addresses in a call context. */
903
904#define EXTRA_CONSTRAINT(OP, C) \
905 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
906\f
907/*** Describing Stack Layout ***/
908
909/* Define this if pushing a word on the stack moves the stack pointer
910 to a smaller address. */
911#define STACK_GROWS_DOWNWARD
912
913/* Define this if the addresses of local variable slots are at negative
914 offsets from the frame pointer. */
915/* #define FRAME_GROWS_DOWNWARD */
916
917/* Offset from the frame pointer to the first local variable slot to be
918 allocated. For the m88k, the debugger wants the return address (r1)
919 stored at location r30+4, and the previous frame pointer stored at
920 location r30. */
921#define STARTING_FRAME_OFFSET 8
922
923/* If we generate an insn to push BYTES bytes, this says how many the
924 stack pointer really advances by. The m88k has no push instruction. */
925/* #define PUSH_ROUNDING(BYTES) */
926
927/* If defined, the maximum amount of space required for outgoing arguments
928 will be computed and placed into the variable
929 `current_function_outgoing_args_size'. No space will be pushed
930 onto the stack for each call; instead, the function prologue should
931 increase the stack frame size by this amount. */
932#define ACCUMULATE_OUTGOING_ARGS
933
934/* Offset from the stack pointer register to the first location at which
935 outgoing arguments are placed. Use the default value zero. */
936/* #define STACK_POINTER_OFFSET 0 */
937
938/* Offset of first parameter from the argument pointer register value.
939 Using an argument pointer, this is 0 for the m88k. GCC knows
940 how to eliminate the argument pointer references if necessary. */
941#define FIRST_PARM_OFFSET(FNDECL) 0
942
943/* Define this if functions should assume that stack space has been
944 allocated for arguments even when their values are passed in
945 registers.
946
947 The value of this macro is the size, in bytes, of the area reserved for
948 arguments passed in registers.
949
950 This space can either be allocated by the caller or be a part of the
951 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
952 says which. */
953#define REG_PARM_STACK_SPACE(FNDECL) 32
954
955/* Define this macro if REG_PARM_STACK_SPACE is defined but stack
956 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
957 Normally, when a parameter is not passed in registers, it is placed on
958 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
959 suppresses this behavior and causes the parameter to be passed on the
960 stack in its natural location. */
961#define STACK_PARMS_IN_REG_PARM_AREA
962
963/* Define this if it is the responsibility of the caller to allocate the
964 area reserved for arguments passed in registers. If
965 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
966 macro is to determine whether the space is included in
967 `current_function_outgoing_args_size'. */
968/* #define OUTGOING_REG_PARM_STACK_SPACE */
969
970/* Offset from the stack pointer register to an item dynamically allocated
971 on the stack, e.g., by `alloca'.
972
973 The default value for this macro is `STACK_POINTER_OFFSET' plus the
974 length of the outgoing arguments. The default is correct for most
975 machines. See `function.c' for details. */
976/* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
977
978/* Value is the number of bytes of arguments automatically
979 popped when returning from a subroutine call.
980 FUNTYPE is the data type of the function (as a tree),
981 or for a library call it is an identifier node for the subroutine name.
982 SIZE is the number of bytes of arguments passed on the stack. */
983#define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
984
985/* Define how to find the value returned by a function.
986 VALTYPE is the data type of the value (as a tree).
987 If the precise function being called is known, FUNC is its FUNCTION_DECL;
988 otherwise, FUNC is 0. */
989#define FUNCTION_VALUE(VALTYPE, FUNC) \
990 gen_rtx (REG, \
991 TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
992 2)
993
994/* Define this if it differs from FUNCTION_VALUE. */
995/* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
996
997/* Disable the promotion of some structures and unions to registers. */
998#define RETURN_IN_MEMORY(TYPE) \
e14fa9c4
DE
999 (TYPE_MODE (TYPE) == BLKmode \
1000 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
1001 && !(TYPE_MODE (TYPE) == SImode \
1002 || (TYPE_MODE (TYPE) == BLKmode \
1003 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
1004 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
79e68feb 1005
b292ed86
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1006/* Don't default to pcc-struct-return, because we have already specified
1007 exactly how to return structures in the RETURN_IN_MEMORY macro. */
1008#define DEFAULT_PCC_STRUCT_RETURN 0
1009
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1010/* Define how to find the value returned by a library function
1011 assuming the value has mode MODE. */
1012#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
1013
1014/* True if N is a possible register number for a function value
1015 as seen by the caller. */
1016#define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
1017
1018/* Determine whether a function argument is passed in a register, and
1019 which register. See m88k.c. */
1020#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1021 m88k_function_arg (CUM, MODE, TYPE, NAMED)
1022
1023/* Define this if it differs from FUNCTION_ARG. */
1024/* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
1025
1026/* A C expression for the number of words, at the beginning of an
1027 argument, must be put in registers. The value must be zero for
1028 arguments that are passed entirely in registers or that are entirely
1029 pushed on the stack. */
1030#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1031
1032/* A C expression that indicates when an argument must be passed by
1033 reference. If nonzero for an argument, a copy of that argument is
1034 made in memory and a pointer to the argument is passed instead of the
1035 argument itself. The pointer is passed in whatever way is appropriate
1036 for passing a pointer to that type. */
1037#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
1038
1039/* A C type for declaring a variable that is used as the first argument
1040 of `FUNCTION_ARG' and other related values. It suffices to count
1041 the number of words of argument so far. */
1042#define CUMULATIVE_ARGS int
1043
1044/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
1045 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
1046#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
1047
1048/* A C statement (sans semicolon) to update the summarizer variable
1049 CUM to advance past an argument in the argument list. The values
1050 MODE, TYPE and NAMED describe that argument. Once this is done,
1051 the variable CUM is suitable for analyzing the *following* argument
1052 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
1053 information may not be available.) */
1054#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1055 do { \
1056 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
1057 if ((CUM & 1) \
1058 && (__mode == DImode || __mode == DFmode \
1059 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
1060 CUM++; \
1061 CUM += (((__mode != BLKmode) \
1062 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
1063 + 3) / 4; \
1064 } while (0)
1065
1066/* True if N is a possible register number for function argument passing.
1067 On the m88000, these are registers 2 through 9. */
1068#define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
1069
1070/* A C expression which determines whether, and in which direction,
1071 to pad out an argument with extra space. The value should be of
1072 type `enum direction': either `upward' to pad above the argument,
1073 `downward' to pad below, or `none' to inhibit padding.
1074
1075 This macro does not control the *amount* of padding; that is always
1076 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1077#define FUNCTION_ARG_PADDING(MODE, TYPE) \
1078 ((MODE) == BLKmode \
1079 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1080 || TREE_CODE (TYPE) == UNION_TYPE)) \
1081 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1082
1083/* If defined, a C expression that gives the alignment boundary, in bits,
1084 of an argument with the specified mode and type. If it is not defined,
1085 `PARM_BOUNDARY' is used for all arguments. */
1086#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1087 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_SIZE (MODE)) <= PARM_BOUNDARY \
1088 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1089
1090/* Generate necessary RTL for __builtin_saveregs().
1091 ARGLIST is the argument list; see expr.c. */
1092#define EXPAND_BUILTIN_SAVEREGS(ARGLIST) m88k_builtin_saveregs (ARGLIST)
1093
1094/* Generate the assembly code for function entry. */
cffed10a
TW
1095#define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE)
1096
1097/* Perform special actions at the point where the prologue ends. */
1098#define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE)
79e68feb
RS
1099
1100/* Output assembler code to FILE to increment profiler label # LABELNO
1101 for profiling a function entry. Redefined in m88kv3.h, m88kv4.h and
1102 m88kdgux.h. */
1103#define FUNCTION_PROFILER(FILE, LABELNO) \
1104 output_function_profiler (FILE, LABELNO, "mcount", 1)
1105
c9b26f89
TW
1106/* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1107#define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1108
79e68feb
RS
1109/* Output assembler code to FILE to initialize basic-block profiling for
1110 the current module. LABELNO is unique to each instance. */
1111#define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1112 output_function_block_profiler (FILE, LABELNO)
1113
c9b26f89
TW
1114/* Maximum length in instructions of the code output by
1115 FUNCTION_BLOCK_PROFILER. */
1116#define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1117
79e68feb
RS
1118/* Output assembler code to FILE to increment the count associated with
1119 the basic block number BLOCKNO. */
1120#define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1121
c9b26f89
TW
1122/* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1123#define BLOCK_PROFILER_LENGTH 4
1124
79e68feb
RS
1125/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1126 the stack pointer does not matter. The value is tested only in
1127 functions that have frame pointers.
1128 No definition is equivalent to always zero. */
1129#define EXIT_IGNORE_STACK (1)
1130
1131/* Generate the assembly code for function exit. */
cffed10a 1132#define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE)
79e68feb 1133
cffed10a
TW
1134/* Perform special actions at the point where the epilogue begins. */
1135#define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE)
79e68feb
RS
1136
1137/* Value should be nonzero if functions must have frame pointers.
1138 Zero means the frame pointer need not be set up (and parms
1139 may be accessed via the stack pointer) in functions that seem suitable.
1140 This is computed in `reload', in reload1.c. */
1141#define FRAME_POINTER_REQUIRED \
1142 (frame_pointer_needed \
1143 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1144
1145/* Definitions for register eliminations.
1146
1147 We have two registers that can be eliminated on the m88k. First, the
1148 frame pointer register can often be eliminated in favor of the stack
1149 pointer register. Secondly, the argument pointer register can always be
1150 eliminated; it is replaced with either the stack or frame pointer. */
1151
1152/* This is an array of structures. Each structure initializes one pair
1153 of eliminable registers. The "from" register number is given first,
1154 followed by "to". Eliminations of the same "from" register are listed
1155 in order of preference. */
1156#define ELIMINABLE_REGS \
1157{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1158 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1159 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1160
1161/* Given FROM and TO register numbers, say whether this elimination
1162 is allowed. */
1163#define CAN_ELIMINATE(FROM, TO) \
1164 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1165
1166/* Define the offset between two registers, one to be eliminated, and the other
1167 its replacement, at the start of a routine. */
1168#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1169{ m88k_layout_frame (); \
1170 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1171 (OFFSET) = m88k_fp_offset; \
1172 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1173 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1174 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1175 (OFFSET) = m88k_stack_size; \
1176 else \
1177 abort (); \
1178}
1179\f
1180/*** Trampolines for Nested Functions ***/
1181
1182/* Output assembler code for a block containing the constant parts
1183 of a trampoline, leaving space for the variable parts.
1184
1185 This block is placed on the stack and filled in. It is aligned
1186 0 mod 128 and those portions that are executed are constant.
1187 This should work for instruction caches that have cache lines up
1188 to the aligned amount (128 is arbitrary), provided no other code
1189 producer is attempting to play the same game. This of course is
1190 in violation of any number of 88open standards. */
1191
1192#define TRAMPOLINE_TEMPLATE(FILE) \
1193{ \
5c828fb7
JH
1194 char buf[256]; \
1195 static int labelno = 0; \
1196 labelno++; \
1197 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
79e68feb
RS
1198 /* Save the return address (r1) in the static chain reg (r11). */ \
1199 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1200 /* Locate this block; transfer to the next instruction. */ \
e6e1cf4c
JH
1201 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1202 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
79e68feb
RS
1203 /* Save r10; use it as the relative pointer; restore r1. */ \
1204 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1205 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1206 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1207 /* Load the function's address and go there. */ \
1208 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1209 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1210 /* Restore r10 and load the static chain register. */ \
1211 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1212 /* Storage: r10 save area, static chain, function address. */ \
1213 ASM_OUTPUT_INT (FILE, const0_rtx); \
1214 ASM_OUTPUT_INT (FILE, const0_rtx); \
1215 ASM_OUTPUT_INT (FILE, const0_rtx); \
1216}
1217
1218/* Length in units of the trampoline for entering a nested function.
1219 This is really two components. The first 32 bytes are fixed and
1220 must be copied; the last 12 bytes are just storage that's filled
1221 in later. So for allocation purposes, it's 32+12 bytes, but for
de857550 1222 initialization purposes, it's 32 bytes. */
79e68feb
RS
1223
1224#define TRAMPOLINE_SIZE (32+12)
1225
1226/* Alignment required for a trampoline. 128 is used to find the
1227 beginning of a line in the instruction cache and to allow for
1228 instruction cache lines of up to 128 bytes. */
1229
1230#define TRAMPOLINE_ALIGNMENT 128
1231
1232/* Emit RTL insns to initialize the variable parts of a trampoline.
1233 FNADDR is an RTX for the address of the function's pure code.
1234 CXT is an RTX for the static chain value for the function. */
1235
1236#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1237{ \
1238 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
1239 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
1240}
1241
1242/*** Library Subroutine Names ***/
1243
1244/* Define this macro if GNU CC should generate calls to the System V
1245 (and ANSI C) library functions `memcpy' and `memset' rather than
1246 the BSD functions `bcopy' and `bzero'. */
1247#define TARGET_MEM_FUNCTIONS
1248\f
1249/*** Addressing Modes ***/
1250
1251/* #define HAVE_POST_INCREMENT */
1252/* #define HAVE_POST_DECREMENT */
1253
1254/* #define HAVE_PRE_DECREMENT */
1255/* #define HAVE_PRE_INCREMENT */
1256
1257/* Recognize any constant value that is a valid address. */
6eff269e
BK
1258#define CONSTANT_ADDRESS_P(X) \
1259 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1260 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1261 || GET_CODE (X) == HIGH)
79e68feb
RS
1262
1263/* Maximum number of registers that can appear in a valid memory address. */
1264#define MAX_REGS_PER_ADDRESS 2
1265
1266/* The condition for memory shift insns. */
1267#define SCALED_ADDRESS_P(ADDR) \
1268 (GET_CODE (ADDR) == PLUS \
1269 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1270 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1271
1272/* Can the reference to X be made short? */
1273#define SHORT_ADDRESS_P(X,TEMP) \
1274 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1275 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1276
1277/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1278 that is a valid memory address for an instruction.
1279 The MODE argument is the machine mode for the MEM expression
1280 that wants to use this address.
1281
1282 On the m88000, a legitimate address has the form REG, REG+REG,
1283 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1284
1285 The register elimination process should deal with the argument
1286 pointer and frame pointer changing to REG+SMALLINT. */
1287
1288#define LEGITIMATE_INDEX_P(X, MODE) \
1289 ((GET_CODE (X) == CONST_INT \
1290 && SMALL_INT (X)) \
1291 || (REG_P (X) \
1292 && REG_OK_FOR_INDEX_P (X)) \
1293 || (GET_CODE (X) == MULT \
1294 && REG_P (XEXP (X, 0)) \
1295 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1296 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1297 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1298
1299#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1300{ \
1301 register rtx _x; \
1302 if (REG_P (X)) \
1303 { \
1304 if (REG_OK_FOR_BASE_P (X)) \
1305 goto ADDR; \
1306 } \
1307 else if (GET_CODE (X) == PLUS) \
1308 { \
1309 register rtx _x0 = XEXP (X, 0); \
1310 register rtx _x1 = XEXP (X, 1); \
1311 if ((flag_pic \
1312 && _x0 == pic_offset_table_rtx \
1313 && (flag_pic == 2 \
1314 ? REG_P (_x1) \
1315 : (GET_CODE (_x1) == SYMBOL_REF \
1316 || GET_CODE (_x1) == LABEL_REF))) \
1317 || (REG_P (_x0) \
1318 && (REG_OK_FOR_BASE_P (_x0) \
1319 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1320 || (REG_P (_x1) \
1321 && (REG_OK_FOR_BASE_P (_x1) \
1322 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1323 goto ADDR; \
1324 } \
1325 else if (GET_CODE (X) == LO_SUM) \
1326 { \
1327 register rtx _x0 = XEXP (X, 0); \
1328 register rtx _x1 = XEXP (X, 1); \
1329 if (((REG_P (_x0) \
1330 && REG_OK_FOR_BASE_P (_x0)) \
1331 || (GET_CODE (_x0) == SUBREG \
1332 && REG_P (SUBREG_REG (_x0)) \
1333 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1334 && CONSTANT_P (_x1)) \
1335 goto ADDR; \
1336 } \
1337 else if (GET_CODE (X) == CONST_INT \
1338 && SMALL_INT (X)) \
1339 goto ADDR; \
1340 else if (SHORT_ADDRESS_P (X, _x)) \
1341 goto ADDR; \
1342}
1343
1344/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1345 and check its validity for a certain class.
1346 We have two alternate definitions for each of them.
1347 The usual definition accepts all pseudo regs; the other rejects
1348 them unless they have been allocated suitable hard regs.
1349 The symbol REG_OK_STRICT causes the latter definition to be used.
1350
1351 Most source files want to accept pseudo regs in the hope that
1352 they will get allocated to the class that the insn wants them to be in.
1353 Source files for reload pass need to be strict.
1354 After reload, it makes no difference, since pseudo regs have
1355 been eliminated by then. */
1356
1357#ifndef REG_OK_STRICT
1358
1359/* Nonzero if X is a hard reg that can be used as an index
1360 or if it is a pseudo reg. Not the argument pointer. */
903a8914
JH
1361#define REG_OK_FOR_INDEX_P(X) \
1362 (!XRF_REGNO_P(REGNO (X)))
79e68feb
RS
1363/* Nonzero if X is a hard reg that can be used as a base reg
1364 or if it is a pseudo reg. */
903a8914 1365#define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
79e68feb
RS
1366
1367#else
1368
1369/* Nonzero if X is a hard reg that can be used as an index. */
1370#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1371/* Nonzero if X is a hard reg that can be used as a base reg. */
1372#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1373
1374#endif
1375
1376/* Try machine-dependent ways of modifying an illegitimate address
1377 to be legitimate. If we find one, return the new, valid address.
1378 This macro is used in only one place: `memory_address' in explow.c.
1379
1380 OLDX is the address as it was before break_out_memory_refs was called.
1381 In some cases it is useful to look at this to decide what needs to be done.
1382
1383 MODE and WIN are passed so that this macro can use
1384 GO_IF_LEGITIMATE_ADDRESS.
1385
1386 It is always safe for this macro to do nothing. It exists to recognize
1387 opportunities to optimize the output. */
1388
1389/* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1390
1391#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1392{ \
1393 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1394 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1395 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1396 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1397 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1398 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1399 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1400 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1401 force_operand (XEXP (X, 0), 0)); \
1402 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1403 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1404 force_operand (XEXP (X, 1), 0)); \
1405 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1406 || GET_CODE (X) == LABEL_REF) \
c9b26f89 1407 (X) = legitimize_address (flag_pic, X, 0, 0); \
79e68feb
RS
1408 if (memory_address_p (MODE, X)) \
1409 goto WIN; }
1410
1411/* Go to LABEL if ADDR (a legitimate address expression)
1412 has an effect that depends on the machine mode it is used for.
1413 On the the m88000 this is never true. */
1414
1415#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1416
1417/* Nonzero if the constant value X is a legitimate general operand.
1418 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1419#define LEGITIMATE_CONSTANT_P(X) (1)
1420\f
1421/*** Condition Code Information ***/
1422
1423/* C code for a data type which is used for declaring the `mdep'
1424 component of `cc_status'. It defaults to `int'. */
1425/* #define CC_STATUS_MDEP int */
1426
1427/* A C expression to initialize the `mdep' field to "empty". */
1428/* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1429
1430/* Macro to zap the normal portions of CC_STATUS, but leave the
1431 machine dependent parts (ie, literal synthesis) alone. */
1432/* #define CC_STATUS_INIT_NO_MDEP \
1433 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1434
1435/* When using a register to hold the condition codes, the cc_status
1436 mechanism cannot be used. */
1437#define NOTICE_UPDATE_CC(EXP, INSN) (0)
1438\f
1439/*** Miscellaneous Parameters ***/
1440
1441/* Define the codes that are matched by predicates in m88k.c. */
1442#define PREDICATE_CODES \
1443 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1444 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1445 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1446 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1447 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1448 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1449 {"int5_operand", {CONST_INT}}, \
1450 {"int32_operand", {CONST_INT}}, \
1451 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1452 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1453 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
f8634644 1454 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
79e68feb
RS
1455 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
1456 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1457 {"equality_op", {EQ, NE}}, \
1458 {"pc_or_label_ref", {PC, LABEL_REF}},
1459
dfa69feb
TW
1460/* The case table contains either words or branch instructions. This says
1461 which. We always claim that the vector is PC-relative. It is position
1462 independent when -fpic is used. */
1463#define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1464
79e68feb
RS
1465/* An alias for a machine mode name. This is the machine mode that
1466 elements of a jump-table should have. */
1467#define CASE_VECTOR_MODE SImode
1468
1469/* Define this macro if jump-tables should contain relative addresses. */
1470#define CASE_VECTOR_PC_RELATIVE
1471
1472/* Define this if control falls through a `case' insn when the index
1473 value is out of range. This means the specified default-label is
1474 actually ignored by the `case' insn proper. */
1475/* #define CASE_DROPS_THROUGH */
1476
cc61d0de
TW
1477/* Define this to be the smallest number of different values for which it
1478 is best to use a jump-table instead of a tree of conditional branches.
1479 The default is 4 for machines with a casesi instruction and 5 otherwise.
1480 The best 88110 number is around 7, though the exact number isn't yet
1481 known. A third alternative for the 88110 is to use a binary tree of
1482 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1483 win very much though. */
1484#define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1485
79e68feb
RS
1486/* Specify the tree operation to be used to convert reals to integers. */
1487#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1488
1489/* This is the kind of divide that is easiest to do in the general case. */
1490#define EASY_DIV_EXPR TRUNC_DIV_EXPR
1491
1492/* Define this as 1 if `char' should by default be signed; else as 0. */
1493#define DEFAULT_SIGNED_CHAR 1
1494
1495/* The 88open ABI says size_t is unsigned int. */
1496#define SIZE_TYPE "unsigned int"
1497
1498/* Allow and ignore #sccs directives */
1499#define SCCS_DIRECTIVE
1500
f88a7491
TW
1501/* Handle #pragma pack and sometimes #pragma weak. */
1502#define HANDLE_SYSV_PRAGMA
79e68feb
RS
1503
1504/* Tell when to handle #pragma weak. This is only done for V.4. */
1505#define HANDLE_PRAGMA_WEAK TARGET_SVR4
1506
1507/* Max number of bytes we can move from memory to memory
1508 in one reasonably fast instruction. */
883a42e5 1509#define MOVE_MAX 8
79e68feb 1510
9a63901f
RK
1511/* Define if operations between registers always perform the operation
1512 on the full register even if a narrower mode is specified. */
1513#define WORD_REGISTER_OPERATIONS
1514
1515/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1516 will either zero-extend or sign-extend. The value of this macro should
1517 be the code that says which one of the two operations is implicitly
1518 done, NIL if none. */
1519#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
79e68feb
RS
1520
1521/* Zero if access to memory by bytes is faster. */
1522#define SLOW_BYTE_ACCESS 1
1523
1524/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1525 is done just by pretending it is already truncated. */
1526#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1527
1528/* Define this if addresses of constant functions
1529 shouldn't be put through pseudo regs where they can be cse'd.
1530 Desirable on machines where ordinary constants are expensive
1531 but a CALL with constant address is cheap. */
1532#define NO_FUNCTION_CSE
1533
1534/* Define this macro if an argument declared as `char' or
1535 `short' in a prototype should actually be passed as an
1536 `int'. In addition to avoiding errors in certain cases of
1537 mismatch, it also makes for better code on certain machines. */
1538#define PROMOTE_PROTOTYPES
1539
1540/* Define this macro if a float function always returns float
1541 (even in traditional mode). Redefined in m88kluna.h. */
1542#define TRADITIONAL_RETURN_FLOAT
1543
1544/* We assume that the store-condition-codes instructions store 0 for false
1545 and some other value for true. This is the value stored for true. */
1546#define STORE_FLAG_VALUE -1
1547
1548/* Specify the machine mode that pointers have.
1549 After generation of rtl, the compiler makes no further distinction
1550 between pointers and any other objects of this machine mode. */
1551#define Pmode SImode
1552
1553/* A function address in a call instruction
1554 is a word address (for indexing purposes)
1555 so give the MEM rtx word mode. */
1556#define FUNCTION_MODE SImode
1557
c9b26f89 1558/* A barrier will be aligned so account for the possible expansion.
13d39dbc 1559 A volatile load may be preceded by a serializing instruction.
c9b26f89
TW
1560 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1561 Account for block profiling code at basic block boundaries. */
1039fa46
TW
1562#define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1563 if (GET_CODE (RTX) == BARRIER \
1564 || (TARGET_SERIALIZE_VOLATILE \
1565 && GET_CODE (RTX) == INSN \
1566 && GET_CODE (PATTERN (RTX)) == SET \
1567 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
c9b26f89
TW
1568 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1569 LENGTH += 1; \
1570 else if (GET_CODE (RTX) == NOTE \
1571 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1572 { \
1573 if (profile_block_flag) \
1574 LENGTH += FUNCTION_BLOCK_PROFILER_LENGTH; \
1575 if (profile_flag) \
1576 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1577 + REG_POP_LENGTH); \
1578 } \
1579 else if (profile_block_flag \
1580 && (GET_CODE (RTX) == CODE_LABEL \
1581 || GET_CODE (RTX) == JUMP_INSN \
1582 || (GET_CODE (RTX) == INSN \
1583 && GET_CODE (PATTERN (RTX)) == SEQUENCE \
1584 && GET_CODE (XVECEXP (PATTERN (RTX), 0, 0)) == JUMP_INSN)))\
1585 LENGTH += BLOCK_PROFILER_LENGTH;
17c672d7 1586
1039fa46
TW
1587/* Track the state of the last volatile memory reference. Clear the
1588 state with CC_STATUS_INIT for now. */
1589#define CC_STATUS_INIT m88k_volatile_code = '\0'
1590
79e68feb
RS
1591/* Compute the cost of computing a constant rtl expression RTX
1592 whose rtx-code is CODE. The body of this macro is a portion
1593 of a switch statement. If the code is computed here,
1594 return it with a return statement. Otherwise, break from the switch.
1595
1596 We assume that any 16 bit integer can easily be recreated, so we
1597 indicate 0 cost, in an attempt to get GCC not to optimize things
1598 like comparison against a constant.
1599
1600 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1601 is as good as a register; since it can't be placed in any insn, it
1602 won't do anything in cse, but it will cause expand_binop to pass the
1603 constant to the define_expands). */
3bb22aee 1604#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
79e68feb
RS
1605 case CONST_INT: \
1606 if (SMALL_INT (RTX)) \
1607 return 0; \
1608 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1609 return 2; \
1610 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1611 return 4; \
1612 return 7; \
1613 case HIGH: \
1614 return 2; \
1615 case CONST: \
1616 case LABEL_REF: \
1617 case SYMBOL_REF: \
1618 if (flag_pic) \
1619 return (flag_pic == 2) ? 11 : 8; \
1620 return 5; \
1621 case CONST_DOUBLE: \
1622 return 0;
1623
1624/* Provide the costs of an addressing mode that contains ADDR.
de857550 1625 If ADDR is not a valid address, its cost is irrelevant.
79e68feb
RS
1626 REG+REG is made slightly more expensive because it might keep
1627 a register live for longer than we might like. */
1628#define ADDRESS_COST(ADDR) \
1629 (GET_CODE (ADDR) == REG ? 1 : \
1630 GET_CODE (ADDR) == LO_SUM ? 1 : \
1631 GET_CODE (ADDR) == HIGH ? 2 : \
1632 GET_CODE (ADDR) == MULT ? 1 : \
1633 GET_CODE (ADDR) != PLUS ? 4 : \
1634 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1635
1636/* Provide the costs of a rtl expression. This is in the body of a
1637 switch on CODE. */
3bb22aee 1638#define RTX_COSTS(X,CODE,OUTER_CODE) \
79e68feb
RS
1639 case MEM: \
1640 return COSTS_N_INSNS (2); \
1641 case MULT: \
1642 return COSTS_N_INSNS (3); \
1643 case DIV: \
1644 case UDIV: \
1645 case MOD: \
1646 case UMOD: \
1647 return COSTS_N_INSNS (38);
1648
1649/* A C expressions returning the cost of moving data of MODE from a register
1650 to or from memory. This is more costly than between registers. */
1651#define MEMORY_MOVE_COST(MODE) 4
1652
1653/* Provide the cost of a branch. Exact meaning under development. */
1654#define BRANCH_COST (TARGET_88100 ? 1 : 2)
1655
5b177046
TW
1656/* A C statement (sans semicolon) to update the integer variable COST
1657 based on the relationship between INSN that is dependent on
1658 DEP_INSN through the dependence LINK. The default is to make no
1659 adjustment to COST. On the m88k, ignore the cost of anti- and
1660 output-dependencies. On the m88100, a store can issue two cycles
1661 before the value (not the address) has finished computing. */
1662#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1663 do { \
1664 if (REG_NOTE_KIND (LINK) != 0) \
1665 (COST) = 0; /* Anti or output dependence. */ \
1666 else if (! TARGET_88100 \
1667 && recog_memoized (INSN) >= 0 \
1668 && get_attr_type (INSN) == TYPE_STORE \
1669 && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \
1670 (COST) -= 4; /* 88110 store reservation station. */ \
1671 } while (0)
1672
79e68feb
RS
1673/* Define this to be nonzero if the character `$' should be allowed
1674 by default in identifier names. */
1675#define DOLLARS_IN_IDENTIFIERS 1
1676
1677/* Do not break .stabs pseudos into continuations. */
1678#define DBX_CONTIN_LENGTH 0
1679\f
1680/*** Output of Assembler Code ***/
1681
1682/* Control the assembler format that we output. */
1683
1684/* Which assembler syntax. Redefined in m88kdgux.h. */
1685#define VERSION_0300_SYNTAX TARGET_SVR4
1686
2ff44f10
TW
1687/* At some point, m88kv4.h will redefine this. */
1688#define VERSION_0400_SYNTAX 0
1689
79e68feb
RS
1690/* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1691#undef INT_ASM_OP
1692#undef ASCII_DATA_ASM_OP
79e68feb
RS
1693#undef CONST_SECTION_ASM_OP
1694#undef CTORS_SECTION_ASM_OP
1695#undef DTORS_SECTION_ASM_OP
1696#undef INIT_SECTION_ASM_OP
1697#undef FINI_SECTION_ASM_OP
1698#undef TYPE_ASM_OP
1699#undef SIZE_ASM_OP
e6a821bc 1700#undef WEAK_ASM_OP
ea9c2c2a 1701#undef SET_ASM_OP
31c0c8ea
TW
1702#undef SKIP_ASM_OP
1703#undef COMMON_ASM_OP
a0209f48
TW
1704#undef ALIGN_ASM_OP
1705#undef IDENT_ASM_OP
79e68feb
RS
1706
1707/* These are used in varasm.c as well. */
de857550
RS
1708#define TEXT_SECTION_ASM_OP "text"
1709#define DATA_SECTION_ASM_OP "data"
79e68feb
RS
1710
1711/* Other sections. */
1712#define CONST_SECTION_ASM_OP (VERSION_0300_SYNTAX \
de857550
RS
1713 ? "section\t .rodata,\"a\"" \
1714 : "section\t .rodata,\"x\"")
79e68feb 1715#define TDESC_SECTION_ASM_OP (VERSION_0300_SYNTAX \
de857550
RS
1716 ? "section\t .tdesc,\"a\"" \
1717 : "section\t .tdesc,\"x\"")
79e68feb
RS
1718
1719/* These must be constant strings for crtstuff.c. */
88a08f12
TW
1720#define CTORS_SECTION_ASM_OP "section\t .ctors,\"d\""
1721#define DTORS_SECTION_ASM_OP "section\t .dtors,\"d\""
de857550
RS
1722#define INIT_SECTION_ASM_OP "section\t .init,\"x\""
1723#define FINI_SECTION_ASM_OP "section\t .fini,\"x\""
79e68feb
RS
1724
1725/* These are pretty much common to all assemblers. */
de857550
RS
1726#define IDENT_ASM_OP "ident"
1727#define FILE_ASM_OP "file"
1728#define SECTION_ASM_OP "section"
648ebe7b 1729#define SET_ASM_OP "def"
de857550
RS
1730#define GLOBAL_ASM_OP "global"
1731#define ALIGN_ASM_OP "align"
1732#define SKIP_ASM_OP "zero"
1733#define COMMON_ASM_OP "comm"
31c0c8ea 1734#define BSS_ASM_OP "bss"
de857550
RS
1735#define FLOAT_ASM_OP "float"
1736#define DOUBLE_ASM_OP "double"
1737#define INT_ASM_OP "word"
79e68feb 1738#define ASM_LONG INT_ASM_OP
de857550
RS
1739#define SHORT_ASM_OP "half"
1740#define CHAR_ASM_OP "byte"
1741#define ASCII_DATA_ASM_OP "string"
79e68feb
RS
1742
1743/* These are particular to the global pool optimization. */
de857550
RS
1744#define SBSS_ASM_OP "sbss"
1745#define SCOMM_ASM_OP "scomm"
1746#define SDATA_SECTION_ASM_OP "sdata"
79e68feb
RS
1747
1748/* These are specific to PIC. */
de857550
RS
1749#define TYPE_ASM_OP "type"
1750#define SIZE_ASM_OP "size"
1751#define WEAK_ASM_OP "weak"
79e68feb
RS
1752#ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1753#undef TYPE_OPERAND_FMT
1754#define TYPE_OPERAND_FMT "#%s"
1755#endif
1756
1757/* These are specific to version 03.00 assembler syntax. */
de857550
RS
1758#define INTERNAL_ASM_OP "local"
1759#define VERSION_ASM_OP "version"
de857550
RS
1760#define UNALIGNED_SHORT_ASM_OP "uahalf"
1761#define UNALIGNED_INT_ASM_OP "uaword"
a9c3f03a
TW
1762#define PUSHSECTION_ASM_OP "section"
1763#define POPSECTION_ASM_OP "previous"
79e68feb 1764
2ff44f10
TW
1765/* These are specific to the version 04.00 assembler syntax. */
1766#define REQUIRES_88110_ASM_OP "requires_88110"
1767
79e68feb
RS
1768/* Output any initial stuff to the assembly file. Always put out
1769 a file directive, even if not debugging.
1770
1771 Immediately after putting out the file, put out a "sem.<value>"
1772 declaration. This should be harmless on other systems, and
de857550 1773 is used in DG/UX by the debuggers to supplement COFF. The
79e68feb
RS
1774 fields in the integer value are as follows:
1775
1776 Bits Value Meaning
1777 ---- ----- -------
1778 0-1 0 No information about stack locations
1779 1 Auto/param locations are based on r30
1780 2 Auto/param locations are based on CFA
1781
1782 3-2 0 No information on dimension order
1783 1 Array dims in sym table matches source language
1784 2 Array dims in sym table is in reverse order
1785
1786 5-4 0 No information about the case of global names
1787 1 Global names appear in the symbol table as in the source
1788 2 Global names have been converted to lower case
1789 3 Global names have been converted to upper case. */
1790
1791#ifdef SDB_DEBUGGING_INFO
1792#define ASM_COFFSEM(FILE) \
1793 if (write_symbols == SDB_DEBUG) \
1794 { \
1795 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1796 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1797 (TARGET_OCS_FRAME_POSITION) \
1798 ? "frame is CFA, normal array dims, case unchanged" \
1799 : "frame is r30, normal array dims, case unchanged"); \
1800 }
1801#else
1802#define ASM_COFFSEM(FILE)
1803#endif
1804
1805/* Output the first line of the assembly file. Redefined in m88kdgux.h. */
1806
1807#define ASM_FIRST_LINE(FILE) \
1808 do { \
1039fa46
TW
1809 if (m88k_version) \
1810 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, m88k_version); \
79e68feb
RS
1811 } while (0)
1812
1813/* Override svr[34].h. */
1814#undef ASM_FILE_START
1815#define ASM_FILE_START(FILE) \
1816 output_file_start (FILE, f_options, sizeof f_options / sizeof f_options[0], \
1817 W_options, sizeof W_options / sizeof W_options[0])
1818
1819#undef ASM_FILE_END
1820
1821#define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
f40176b1
PE
1822 do { fprintf (FILE, "\t%s\t ", FILE_ASM_OP); \
1823 output_quoted_string (FILE, NAME); \
1824 fprintf (FILE, "\n"); \
1825 } while (0)
79e68feb
RS
1826
1827#ifdef SDB_DEBUGGING_INFO
1828#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1829 if (m88k_prologue_done) \
1830 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1831 LINE - sdb_begin_function_line, LINE)
1832#endif
1833
1834/* Code to handle #ident directives. Override svr[34].h definition. */
1835#undef ASM_OUTPUT_IDENT
1836#ifdef DBX_DEBUGGING_INFO
1837#define ASM_OUTPUT_IDENT(FILE, NAME)
1838#else
1839#define ASM_OUTPUT_IDENT(FILE, NAME) \
a9c3f03a 1840 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
79e68feb
RS
1841#endif
1842
1843/* Output to assembler file text saying following lines
1844 may contain character constants, extra white space, comments, etc. */
1845#define ASM_APP_ON ""
1846
1847/* Output to assembler file text saying following lines
1848 no longer contain unusual constructs. */
1849#define ASM_APP_OFF ""
1850
1851/* Format the assembly opcode so that the arguments are all aligned.
1852 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1853 space will do to align the output. Abandon the output if a `%' is
1854 encountered. */
1855#define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1856 { \
1857 int ch; \
1858 char *orig_ptr; \
1859 \
1860 for (orig_ptr = (PTR); \
1861 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1862 (PTR)++) \
1863 putc (ch, STREAM); \
1864 \
1865 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1866 putc ('\t', STREAM); \
1867 }
1868
1869/* How to refer to registers in assembler output.
1870 This sequence is indexed by compiler's hard-register-number.
1871 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1872
1873#define REGISTER_NAMES \
1874 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1875 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1876 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
a9c3f03a
TW
1877 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1878 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1879 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1880 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1881 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
79e68feb 1882
b6ecac21
TW
1883/* Define additional names for use in asm clobbers and asm declarations.
1884
1885 We define the fake Condition Code register as an alias for reg 0 (which
1886 is our `condition code' register), so that condition codes can easily
1887 be clobbered by an asm. The carry bit in the PSR is now used. */
1888
1889#define ADDITIONAL_REGISTER_NAMES {"psr", 0, "cc", 0}
1890
79e68feb
RS
1891/* How to renumber registers for dbx and gdb. */
1892#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1893
1894/* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1895#undef DECLARE_ASM_NAME
1896#define DECLARE_ASM_NAME TARGET_SVR4
1897
1898/* Write the extra assembler code needed to declare a function properly. */
1899#undef ASM_DECLARE_FUNCTION_NAME
1900#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1901 do { \
1902 if (DECLARE_ASM_NAME) \
1903 { \
de857550 1904 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
79e68feb
RS
1905 assemble_name (FILE, NAME); \
1906 putc (',', FILE); \
1907 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1908 putc ('\n', FILE); \
1909 } \
1910 ASM_OUTPUT_LABEL(FILE, NAME); \
1911 } while (0)
1912
1913/* Write the extra assembler code needed to declare an object properly. */
1914#undef ASM_DECLARE_OBJECT_NAME
92dee628
RS
1915#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1916 do { \
1917 if (DECLARE_ASM_NAME) \
1918 { \
1919 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1920 assemble_name (FILE, NAME); \
1921 putc (',', FILE); \
1922 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1923 putc ('\n', FILE); \
1924 size_directive_output = 0; \
1925 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1926 { \
1927 size_directive_output = 1; \
1928 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1929 assemble_name (FILE, NAME); \
86615a62 1930 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
92dee628
RS
1931 } \
1932 } \
1933 ASM_OUTPUT_LABEL(FILE, NAME); \
79e68feb
RS
1934 } while (0)
1935
92dee628
RS
1936/* Output the size directive for a decl in rest_of_decl_compilation
1937 in the case where we did not do so before the initializer.
1938 Once we find the error_mark_node, we know that the value of
1939 size_directive_output was set
1940 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1941
1942#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1943do { \
1944 char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1945 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
13832d15 1946 && DECLARE_ASM_NAME \
92dee628
RS
1947 && ! AT_END && TOP_LEVEL \
1948 && DECL_INITIAL (DECL) == error_mark_node \
1949 && !size_directive_output) \
1950 { \
1951 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1952 assemble_name (FILE, name); \
1953 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1954 } \
1955 } while (0)
1956
79e68feb
RS
1957/* This is how to declare the size of a function. */
1958#undef ASM_DECLARE_FUNCTION_SIZE
1959#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
1960 do { \
1961 if (DECLARE_ASM_NAME) \
1962 { \
1963 if (!flag_inhibit_size_directive) \
1964 { \
1965 char label[256]; \
e6e1cf4c 1966 static int labelno = 0; \
79e68feb
RS
1967 labelno++; \
1968 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
1969 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
de857550 1970 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
79e68feb
RS
1971 assemble_name (FILE, (FNAME)); \
1972 fprintf (FILE, ",%s-", &label[1]); \
1973 assemble_name (FILE, (FNAME)); \
1974 putc ('\n', FILE); \
1975 } \
1976 } \
1977 } while (0)
1978
1979/* This is how to output the definition of a user-level label named NAME,
1980 such as the label on a static function or variable NAME. */
1981#define ASM_OUTPUT_LABEL(FILE,NAME) \
1982 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1983
1984/* This is how to output a command to make the user-level label named NAME
1985 defined for reference from other files. */
1986#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1987 do { \
de857550 1988 fprintf (FILE, "\t%s\t ", GLOBAL_ASM_OP); \
79e68feb
RS
1989 assemble_name (FILE, NAME); \
1990 putc ('\n', FILE); \
1991 } while (0)
1992
1993/* This is how to output a reference to a user-level label named NAME.
1994 Override svr[34].h. */
1995#undef ASM_OUTPUT_LABELREF
1996#define ASM_OUTPUT_LABELREF(FILE,NAME) \
1997 { \
1998 if (! TARGET_NO_UNDERSCORES && ! VERSION_0300_SYNTAX) \
1999 fputc ('_', FILE); \
2000 fputs (NAME, FILE); \
2001 }
2002
2003/* This is how to output an internal numbered label where
2004 PREFIX is the class of label and NUM is the number within the class.
2005 For V.4, labels use `.' rather than `@'. */
2006
31c0c8ea 2007#undef ASM_OUTPUT_INTERNAL_LABEL
79e68feb
RS
2008#ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
2009#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
de857550 2010 fprintf (FILE, VERSION_0300_SYNTAX ? ".%s%d:\n\t%s\t .%s%d\n" : "@%s%d:\n", \
79e68feb
RS
2011 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
2012#else
2013#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2014 fprintf (FILE, VERSION_0300_SYNTAX ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
2015#endif /* AS_BUG_DOT_LABELS */
2016
2017/* This is how to store into the string LABEL
2018 the symbol_ref name of an internal numbered label where
2019 PREFIX is the class of label and NUM is the number within the class.
2020 This is suitable for output with `assemble_name'. This must agree
2021 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
2022 with an `*'. */
2023
31c0c8ea 2024#undef ASM_GENERATE_INTERNAL_LABEL
79e68feb
RS
2025#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2026 sprintf (LABEL, VERSION_0300_SYNTAX ? "*.%s%d" : "*@%s%d", PREFIX, NUM)
2027
2028/* Internal macro to get a single precision floating point value into
2029 an int, so we can print it's value in hex. */
2030#define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \
2031 { union { \
2032 REAL_VALUE_TYPE d; \
2033 struct { \
2034 unsigned sign : 1; \
2035 unsigned exponent1 : 1; \
2036 unsigned exponent2 : 3; \
2037 unsigned exponent3 : 7; \
2038 unsigned mantissa1 : 20; \
2039 unsigned mantissa2 : 3; \
2040 unsigned mantissa3 : 29; \
2041 } s; \
2042 } _u; \
2043 \
2044 union { \
2045 int i; \
2046 struct { \
2047 unsigned sign : 1; \
2048 unsigned exponent1 : 1; \
2049 unsigned exponent3 : 7; \
2050 unsigned mantissa1 : 20; \
2051 unsigned mantissa2 : 3; \
2052 } s; \
2053 } _u2; \
2054 \
2055 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \
2056 _u2.s.sign = _u.s.sign; \
2057 _u2.s.exponent1 = _u.s.exponent1; \
2058 _u2.s.exponent3 = _u.s.exponent3; \
2059 _u2.s.mantissa1 = _u.s.mantissa1; \
2060 _u2.s.mantissa2 = _u.s.mantissa2; \
2061 IVALUE = _u2.i; \
2062 }
2063
2064/* This is how to output an assembler line defining a `double' constant.
2065 Use "word" pseudos to avoid printing NaNs, infinity, etc. */
2066#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2067 do { \
2068 union { REAL_VALUE_TYPE d; long l[2]; } x; \
2069 x.d = (VALUE); \
de857550 2070 fprintf (FILE, "\t%s\t 0x%.8x, 0x%.8x\n", INT_ASM_OP, \
79e68feb
RS
2071 x.l[0], x.l[1]); \
2072 } while (0)
2073
2074/* This is how to output an assembler line defining a `float' constant. */
2075#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2076 do { \
2077 int i; \
2078 FLOAT_TO_INT_INTERNAL (VALUE, i); \
de857550 2079 fprintf (FILE, "\t%s\t 0x%.8x\n", INT_ASM_OP, i); \
79e68feb
RS
2080 } while (0)
2081
2082/* Likewise for `int', `short', and `char' constants. */
2083#define ASM_OUTPUT_INT(FILE,VALUE) \
de857550 2084( fprintf (FILE, "\t%s\t ", INT_ASM_OP), \
79e68feb
RS
2085 output_addr_const (FILE, (VALUE)), \
2086 fprintf (FILE, "\n"))
2087
2088#define ASM_OUTPUT_SHORT(FILE,VALUE) \
de857550 2089( fprintf (FILE, "\t%s\t ", SHORT_ASM_OP), \
79e68feb
RS
2090 output_addr_const (FILE, (VALUE)), \
2091 fprintf (FILE, "\n"))
2092
2093#define ASM_OUTPUT_CHAR(FILE,VALUE) \
de857550 2094( fprintf (FILE, "\t%s\t ", CHAR_ASM_OP), \
79e68feb
RS
2095 output_addr_const (FILE, (VALUE)), \
2096 fprintf (FILE, "\n"))
2097
2098/* This is how to output an assembler line for a numeric constant byte. */
2099#define ASM_OUTPUT_BYTE(FILE,VALUE) \
de857550 2100 fprintf (FILE, "\t%s\t 0x%x\n", CHAR_ASM_OP, (VALUE))
79e68feb 2101
668681ef 2102/* The single-byte pseudo-op is the default. Override svr[34].h. */
79e68feb 2103#undef ASM_BYTE_OP
668681ef 2104#define ASM_BYTE_OP "byte"
79e68feb
RS
2105#undef ASM_OUTPUT_ASCII
2106#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
a9c3f03a 2107 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
79e68feb 2108
0d53ee39
TW
2109/* Override svr4.h. Change to the readonly data section for a table of
2110 addresses. final_scan_insn changes back to the text section. */
a0209f48 2111#undef ASM_OUTPUT_CASE_LABEL
0d53ee39
TW
2112#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
2113 do { \
2114 if (! CASE_VECTOR_INSNS) \
2c39ec40
TW
2115 { \
2116 readonly_data_section (); \
2117 ASM_OUTPUT_ALIGN (FILE, 2); \
2118 } \
0d53ee39
TW
2119 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
2120 } while (0)
a0209f48 2121
79e68feb
RS
2122/* Epilogue for case labels. This jump instruction is called by casesi
2123 to transfer to the appropriate branch instruction within the table.
2124 The label `@L<n>e' is coined to mark the end of the table. */
2125#define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
2126 do { \
668681ef
TW
2127 if (CASE_VECTOR_INSNS) \
2128 { \
2129 char label[256]; \
2130 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
2131 fprintf (FILE, "%se:\n", &label[1]); \
2132 if (! flag_delayed_branch) \
2133 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
2134 reg_names[1], reg_names[m88k_case_index]); \
2135 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
2136 } \
79e68feb
RS
2137 } while (0)
2138
2139/* This is how to output an element of a case-vector that is absolute. */
2140#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2141 do { \
2142 char buffer[256]; \
2143 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
668681ef
TW
2144 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2145 &buffer[1]); \
79e68feb
RS
2146 } while (0)
2147
2148/* This is how to output an element of a case-vector that is relative. */
2149#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2150 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2151
2152/* This is how to output an assembler line
2153 that says to advance the location counter
2154 to a multiple of 2**LOG bytes. */
2155#define ASM_OUTPUT_ALIGN(FILE,LOG) \
2156 if ((LOG) != 0) \
de857550 2157 fprintf (FILE, "\t%s\t %d\n", ALIGN_ASM_OP, 1<<(LOG))
79e68feb 2158
7ddb6885
TW
2159/* On the m88100, align the text address to half a cache boundary when it
2160 can only be reached by jumping. Pack code tightly when compiling
2161 crtstuff.c. */
ad4c6463 2162#define ASM_OUTPUT_ALIGN_CODE(FILE) \
7ddb6885
TW
2163 ASM_OUTPUT_ALIGN (FILE, \
2164 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2))
79e68feb
RS
2165
2166/* Override svr[34].h. */
2167#undef ASM_OUTPUT_SKIP
2168#define ASM_OUTPUT_SKIP(FILE,SIZE) \
de857550 2169 fprintf (FILE, "\t%s\t %u\n", SKIP_ASM_OP, (SIZE))
79e68feb
RS
2170
2171/* Override svr4.h. */
2172#undef ASM_OUTPUT_EXTERNAL_LIBCALL
2173
2174/* This says how to output an assembler line to define a global common
2175 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2176 Override svr[34].h. */
2177#undef ASM_OUTPUT_COMMON
2178#undef ASM_OUTPUT_ALIGNED_COMMON
2179#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
de857550
RS
2180( fprintf ((FILE), "\t%s\t ", \
2181 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
79e68feb
RS
2182 assemble_name ((FILE), (NAME)), \
2183 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2184
de857550 2185/* This says how to output an assembler line to define a local common
79e68feb
RS
2186 symbol. Override svr[34].h. */
2187#undef ASM_OUTPUT_LOCAL
2188#undef ASM_OUTPUT_ALIGNED_LOCAL
2189#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
de857550 2190( fprintf ((FILE), "\t%s\t ", \
31c0c8ea 2191 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
79e68feb
RS
2192 assemble_name ((FILE), (NAME)), \
2193 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2194
2195/* Store in OUTPUT a string (made with alloca) containing
2196 an assembler-name for a local static variable named NAME.
2197 LABELNO is an integer which is different for each call. */
2198#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2199( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2200 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2201
2202/* This is how to output an insn to push a register on the stack.
2203 It need not be very fast code. */
2204#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2205 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2206 reg_names[STACK_POINTER_REGNUM], \
2207 reg_names[STACK_POINTER_REGNUM], \
2208 (STACK_BOUNDARY / BITS_PER_UNIT), \
2209 reg_names[REGNO], \
2210 reg_names[STACK_POINTER_REGNUM])
2211
c9b26f89
TW
2212/* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2213#define REG_PUSH_LENGTH 2
2214
79e68feb
RS
2215/* This is how to output an insn to pop a register from the stack. */
2216#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2217 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2218 reg_names[REGNO], \
2219 reg_names[STACK_POINTER_REGNUM], \
2220 reg_names[STACK_POINTER_REGNUM], \
2221 reg_names[STACK_POINTER_REGNUM], \
2222 (STACK_BOUNDARY / BITS_PER_UNIT))
2223
c9b26f89
TW
2224/* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2225#define REG_POP_LENGTH 2
2226
79e68feb
RS
2227/* Define the parentheses used to group arithmetic operations
2228 in assembler code. */
2229#define ASM_OPEN_PAREN "("
2230#define ASM_CLOSE_PAREN ")"
2231
2232/* Define results of standard character escape sequences. */
2233#define TARGET_BELL 007
2234#define TARGET_BS 010
2235#define TARGET_TAB 011
2236#define TARGET_NEWLINE 012
2237#define TARGET_VT 013
2238#define TARGET_FF 014
2239#define TARGET_CR 015
2240\f
2241/* Macros to deal with OCS debug information */
2242
2243#define OCS_START_PREFIX "Ltb"
2244#define OCS_END_PREFIX "Lte"
2245
2246#define PUT_OCS_FUNCTION_START(FILE) \
2247 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2248
2249#define PUT_OCS_FUNCTION_END(FILE) \
2250 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2251
2252/* Macros for debug information */
2253#define DEBUGGER_AUTO_OFFSET(X) \
2254 (m88k_debugger_offset (X, 0) \
2255 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2256
2257#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2258 (m88k_debugger_offset (X, OFFSET) \
2259 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2260
2261/* Macros to deal with SDB debug information */
2262#ifdef SDB_DEBUGGING_INFO
2263
2264/* Output structure tag names even when it causes a forward reference. */
2265#define SDB_ALLOW_FORWARD_REFERENCES
2266
2267/* Print out extra debug information in the assembler file */
2268#define PUT_SDB_SCL(a) \
2269 do { \
2270 register int s = (a); \
2271 register char *scl; \
2272 switch (s) \
2273 { \
2274 case C_EFCN: scl = "end of function"; break; \
2275 case C_NULL: scl = "NULL storage class"; break; \
2276 case C_AUTO: scl = "automatic"; break; \
2277 case C_EXT: scl = "external"; break; \
2278 case C_STAT: scl = "static"; break; \
2279 case C_REG: scl = "register"; break; \
2280 case C_EXTDEF: scl = "external definition"; break; \
2281 case C_LABEL: scl = "label"; break; \
2282 case C_ULABEL: scl = "undefined label"; break; \
2283 case C_MOS: scl = "structure member"; break; \
2284 case C_ARG: scl = "argument"; break; \
2285 case C_STRTAG: scl = "structure tag"; break; \
2286 case C_MOU: scl = "union member"; break; \
2287 case C_UNTAG: scl = "union tag"; break; \
2288 case C_TPDEF: scl = "typedef"; break; \
2289 case C_USTATIC: scl = "uninitialized static"; break; \
2290 case C_ENTAG: scl = "enumeration tag"; break; \
2291 case C_MOE: scl = "member of enumeration"; break; \
2292 case C_REGPARM: scl = "register parameter"; break; \
2293 case C_FIELD: scl = "bit field"; break; \
2294 case C_BLOCK: scl = "block start/end"; break; \
2295 case C_FCN: scl = "function start/end"; break; \
2296 case C_EOS: scl = "end of structure"; break; \
2297 case C_FILE: scl = "filename"; break; \
2298 case C_LINE: scl = "line"; break; \
2299 case C_ALIAS: scl = "duplicated tag"; break; \
2300 case C_HIDDEN: scl = "hidden"; break; \
2301 default: scl = "unknown"; break; \
2302 } \
2303 \
2304 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2305 } while (0)
2306
2307#define PUT_SDB_TYPE(a) \
2308 do { \
2309 register int t = (a); \
2310 static char buffer[100]; \
2311 register char *p = buffer, *q; \
2312 register int typ = t; \
2313 register int i,d; \
2314 \
2315 for (i = 0; i <= 5; i++) \
2316 { \
2317 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2318 { \
2319 case DT_PTR: \
2320 strcpy (p, "ptr to "); \
2321 p += sizeof("ptr to"); \
2322 break; \
2323 \
2324 case DT_ARY: \
2325 strcpy (p, "array of "); \
2326 p += sizeof("array of"); \
2327 break; \
2328 \
2329 case DT_FCN: \
2330 strcpy (p, "func ret "); \
2331 p += sizeof("func ret"); \
2332 break; \
2333 } \
2334 } \
2335 \
2336 switch (typ & N_BTMASK) \
2337 { \
2338 case T_NULL: q = "<no type>"; break; \
2339 case T_CHAR: q = "char"; break; \
2340 case T_SHORT: q = "short"; break; \
2341 case T_INT: q = "int"; break; \
2342 case T_LONG: q = "long"; break; \
2343 case T_FLOAT: q = "float"; break; \
2344 case T_DOUBLE: q = "double"; break; \
2345 case T_STRUCT: q = "struct"; break; \
2346 case T_UNION: q = "union"; break; \
2347 case T_ENUM: q = "enum"; break; \
2348 case T_MOE: q = "enum member"; break; \
2349 case T_UCHAR: q = "unsigned char"; break; \
2350 case T_USHORT: q = "unsigned short"; break; \
2351 case T_UINT: q = "unsigned int"; break; \
2352 case T_ULONG: q = "unsigned long"; break; \
2353 default: q = "void"; break; \
2354 } \
2355 \
2356 strcpy (p, q); \
2357 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2358 t, buffer); \
2359 } while (0)
2360
2361#define PUT_SDB_INT_VAL(a) \
2362 fprintf (asm_out_file, "\tval\t %d\n", (a))
2363
2364#define PUT_SDB_VAL(a) \
2365( fprintf (asm_out_file, "\tval\t "), \
2366 output_addr_const (asm_out_file, (a)), \
2367 fputc ('\n', asm_out_file))
2368
2369#define PUT_SDB_DEF(a) \
2370 do { fprintf (asm_out_file, "\tsdef\t "); \
2371 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2372 fputc ('\n', asm_out_file); \
2373 } while (0)
2374
2375#define PUT_SDB_PLAIN_DEF(a) \
2376 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2377
2378/* Simply and endef now. */
2379#define PUT_SDB_ENDEF \
2380 fputs("\tendef\n\n", asm_out_file)
2381
2382#define PUT_SDB_SIZE(a) \
2383 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2384
2385/* Max dimensions to store for debug information (limited by COFF). */
2386#define SDB_MAX_DIM 6
2387
2388/* New method for dim operations. */
2389#define PUT_SDB_START_DIM \
2390 fputs("\tdim\t ", asm_out_file)
2391
2392/* How to end the DIM sequence. */
2393#define PUT_SDB_LAST_DIM(a) \
2394 fprintf(asm_out_file, "%d\n", a)
2395
2396#define PUT_SDB_TAG(a) \
2397 do { \
2398 fprintf (asm_out_file, "\ttag\t "); \
2399 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2400 fputc ('\n', asm_out_file); \
2401 } while( 0 )
2402
2403#define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2404 do { \
2405 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2406 NAME); \
2407 PUT_SDB_SCL( SCL ); \
2408 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2409 (LINE)); \
2410 } while (0)
2411
2412#define PUT_SDB_BLOCK_START(LINE) \
2413 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2414
2415#define PUT_SDB_BLOCK_END(LINE) \
2416 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2417
2418#define PUT_SDB_FUNCTION_START(LINE) \
2419 do { \
2420 fprintf (asm_out_file, "\tln\t 1\n"); \
2421 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2422 } while (0)
2423
2424#define PUT_SDB_FUNCTION_END(LINE) \
2425 do { \
2426 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2427 } while (0)
2428
2429#define PUT_SDB_EPILOGUE_END(NAME) \
2430 do { \
2431 text_section (); \
2432 fprintf (asm_out_file, "\n\tsdef\t "); \
2433 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2434 fputc('\n', asm_out_file); \
2435 PUT_SDB_SCL( C_EFCN ); \
2436 fprintf (asm_out_file, "\tendef\n\n"); \
2437 } while (0)
2438
2439#define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2440 sprintf ((BUFFER), ".%dfake", (NUMBER));
2441
2442#endif /* SDB_DEBUGGING_INFO */
2443\f
2444/* Support const and tdesc sections. Generally, a const section will
2445 be distinct from the text section whenever we do V.4-like things
2446 and so follows DECLARE_ASM_NAME. Note that strings go in text
2447 rather than const. Override svr[34].h. */
2448
2449#undef USE_CONST_SECTION
2450#undef EXTRA_SECTIONS
2451
2452#define USE_CONST_SECTION DECLARE_ASM_NAME
2453
3623e712 2454#if defined(USING_SVR4_H)
79e68feb
RS
2455
2456#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors
2457#define INIT_SECTION_FUNCTION
2458#define FINI_SECTION_FUNCTION
2459
1039fa46
TW
2460#else
2461#if defined(USING_SVR3_H)
79e68feb 2462
f63ce4f8
TW
2463#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \
2464 in_init, in_fini
79e68feb
RS
2465
2466#else /* m88kluna or other not based on svr[34].h. */
2467
17c672d7 2468#undef INIT_SECTION_ASM_OP
79e68feb
RS
2469#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2470#define CONST_SECTION_FUNCTION \
2471void \
2472const_section () \
2473{ \
2474 text_section(); \
2475}
2476#define CTORS_SECTION_FUNCTION
2477#define DTORS_SECTION_FUNCTION
2478#define INIT_SECTION_FUNCTION
2479#define FINI_SECTION_FUNCTION
2480
1039fa46 2481#endif /* USING_SVR3_H */
d034f929 2482#endif /* USING_SVR4_H */
79e68feb
RS
2483
2484#undef EXTRA_SECTION_FUNCTIONS
2485#define EXTRA_SECTION_FUNCTIONS \
2486 CONST_SECTION_FUNCTION \
2487 \
2488void \
2489tdesc_section () \
2490{ \
2491 if (in_section != in_tdesc) \
2492 { \
2493 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2494 in_section = in_tdesc; \
2495 } \
2496} \
2497 \
2498void \
2499sdata_section () \
2500{ \
2501 if (in_section != in_sdata) \
2502 { \
2503 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2504 in_section = in_sdata; \
2505 } \
2506} \
2507 \
2508 CTORS_SECTION_FUNCTION \
2509 DTORS_SECTION_FUNCTION \
2510 INIT_SECTION_FUNCTION \
2511 FINI_SECTION_FUNCTION
2512
79e68feb
RS
2513/* A C statement or statements to switch to the appropriate
2514 section for output of DECL. DECL is either a `VAR_DECL' node
2515 or a constant of some sort. RELOC indicates whether forming
2516 the initial value of DECL requires link-time relocations.
2517
2518 For strings, the section is selected before the segment info is encoded. */
2519#undef SELECT_SECTION
2520#define SELECT_SECTION(DECL,RELOC) \
2521{ \
2522 if (TREE_CODE (DECL) == STRING_CST) \
2523 { \
2524 if (! flag_writable_strings) \
2525 const_section (); \
2526 else if (m88k_gp_threshold > 0 \
2527 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2528 sdata_section (); \
2529 else \
2530 data_section (); \
2531 } \
2532 else if (TREE_CODE (DECL) == VAR_DECL) \
2533 { \
2534 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \
2535 sdata_section (); \
2536 else if ((flag_pic && RELOC) \
2537 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2538 data_section (); \
2539 else \
2540 const_section (); \
2541 } \
2542 else \
2543 const_section (); \
2544}
2545
0d53ee39
TW
2546/* Jump tables consist of branch instructions and should be output in
2547 the text section. When we use a table of addresses, we explicitly
2548 change to the readonly data section. */
2549#define JUMP_TABLES_IN_TEXT_SECTION 1
2550
79e68feb
RS
2551/* Define this macro if references to a symbol must be treated differently
2552 depending on something about the variable or function named by the
2553 symbol (such as what section it is in).
2554
2555 The macro definition, if any, is executed immediately after the rtl for
2556 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2557 rtl will be a `mem' whose address is a `symbol_ref'.
2558
2559 For the m88k, determine if the item should go in the global pool. */
2560#define ENCODE_SECTION_INFO(DECL) \
2561 do { \
2562 if (m88k_gp_threshold > 0) \
2563 if (TREE_CODE (DECL) == VAR_DECL) \
2564 { \
2565 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2566 { \
2567 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2568 \
2569 if (size > 0 && size <= m88k_gp_threshold) \
2570 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2571 } \
2572 } \
2573 else if (TREE_CODE (DECL) == STRING_CST \
2574 && flag_writable_strings \
2575 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2576 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2577 } while (0)
2578\f
2579/* Print operand X (an rtx) in assembler syntax to file FILE.
2580 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2581 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2582#define PRINT_OPERAND_PUNCT_VALID_P(c) \
2583 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2584
2585#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2586
2587/* Print a memory address as an operand to reference that memory location. */
2588#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
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