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8b2e2b2f 1/* Definitions of target machine for GNU compiler for
79e68feb 2 Motorola m88100 in an 88open OCS/BCS environment.
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3 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
4 Free Software Foundation, Inc.
3cc7f838 5 Contributed by Michael Tiemann (tiemann@cygnus.com).
44ae13fb 6 Currently maintained by (gcc@dg-rtp.dg.com)
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7
8This file is part of GNU CC.
9
10GNU CC is free software; you can redistribute it and/or modify
11it under the terms of the GNU General Public License as published by
12the Free Software Foundation; either version 2, or (at your option)
13any later version.
14
15GNU CC is distributed in the hope that it will be useful,
16but WITHOUT ANY WARRANTY; without even the implied warranty of
17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18GNU General Public License for more details.
19
20You should have received a copy of the GNU General Public License
21along with GNU CC; see the file COPYING. If not, write to
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22the Free Software Foundation, 59 Temple Place - Suite 330,
23Boston, MA 02111-1307, USA. */
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24
25/* The m88100 port of GNU CC adheres to the various standards from 88open.
26 These documents are available by writing:
27
28 88open Consortium Ltd.
29 100 Homeland Court, Suite 800
30 San Jose, CA 95112
31 (408) 436-6600
32
33 In brief, the current standards are:
34
35 Binary Compatibility Standard, Release 1.1A, May 1991
36 This provides for portability of application-level software at the
37 executable level for AT&T System V Release 3.2.
38
39 Object Compatibility Standard, Release 1.1A, May 1991
40 This provides for portability of application-level software at the
41 object file and library level for C, Fortran, and Cobol, and again,
42 largely for SVR3.
43
44 Under development are standards for AT&T System V Release 4, based on the
45 [generic] System V Application Binary Interface from AT&T. These include:
46
47 System V Application Binary Interface, Motorola 88000 Processor Supplement
48 Another document from AT&T for SVR4 specific to the m88100.
49 Available from Prentice Hall.
50
51 System V Application Binary Interface, Motorola 88000 Processor Supplement,
52 Release 1.1, Draft H, May 6, 1991
53 A proposed update to the AT&T document from 88open.
54
55 System V ABI Implementation Guide for the M88000 Processor,
56 Release 1.0, January 1991
57 A companion ABI document from 88open. */
58
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59/* Other *.h files in config/m88k include this one and override certain items.
60 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
61 Additionally, sysv4.h and dgux.h include svr4.h first. All other
62 m88k targets except luna.h are based on svr3.h. */
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63
64/* Choose SVR3 as the default. */
65#if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
66#include "svr3.h"
67#endif
68\f
69/* External types used. */
70
71/* What instructions are needed to manufacture an integer constant. */
72enum m88k_instruction {
73 m88k_zero,
74 m88k_or,
75 m88k_subu,
76 m88k_or_lo16,
77 m88k_or_lo8,
78 m88k_set,
79 m88k_oru_hi16,
80 m88k_oru_or
81};
82
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83/* Which processor to schedule for. The elements of the enumeration
84 must match exactly the cpu attribute in the m88k.md machine description. */
85
86enum processor_type {
87 PROCESSOR_M88100,
88 PROCESSOR_M88110,
89 PROCESSOR_M88000,
90};
91
92/* Recast the cpu class to be the cpu attribute. */
93#define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
94
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95/* External variables/functions defined in m88k.c. */
96
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97extern const char *m88k_pound_sign;
98extern const char *m88k_short_data;
99extern const char *m88k_version;
1039fa46 100extern char m88k_volatile_code;
79e68feb 101
50eb31b2 102extern unsigned m88k_gp_threshold;
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103extern int m88k_prologue_done;
104extern int m88k_function_number;
105extern int m88k_fp_offset;
106extern int m88k_stack_size;
107extern int m88k_case_index;
108
109extern struct rtx_def *m88k_compare_reg;
110extern struct rtx_def *m88k_compare_op0;
111extern struct rtx_def *m88k_compare_op1;
112
50eb31b2 113extern enum processor_type m88k_cpu;
2d6cb879 114
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115/* external variables defined elsewhere in the compiler */
116
117extern int target_flags; /* -m compiler switches */
118extern int frame_pointer_needed; /* current function has a FP */
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119extern int flag_delayed_branch; /* -fdelayed-branch */
120extern int flag_pic; /* -fpic */
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121
122/* Specify the default monitors. The meaning of these values can
123 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
124 values downward from 0x8000 are tests that will soon go away.
125 values upward from 0x1 are generally useful tests that will remain. */
126
127#ifndef MONITOR_GCC
128#define MONITOR_GCC 0
129#endif
130\f
50eb31b2 131/*** Controlling the Compilation Driver, `gcc' ***/
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132/* Show we can debug even without a frame pointer. */
133#define CAN_DEBUG_WITHOUT_FP
79e68feb 134
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135/* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
136 Here, the CPU_DEFAULT is assumed to be -m88100. */
137#undef CPP_SPEC
138#define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
139 %{!m88000:%{!m88110:-D__m88100__}}"
140
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141/* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
142 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
143 in svr4.h.
144 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
9230dc46 145 STARTFILE_SPEC redefined in dgux.h. */
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146\f
147/*** Run-time Target Specification ***/
148
149/* Names to predefine in the preprocessor for this target machine.
9230dc46 150 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
50eb31b2 151#define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2"
79e68feb 152
2cb3d06c 153#define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
9230dc46 154
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155#ifndef VERSION_INFO1
156#define VERSION_INFO1 "m88k"
157#endif
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158
159/* Run-time compilation parameters selecting different hardware subsets. */
160
161/* Macro to define tables used to set the flags.
162 This is a list in braces of pairs in braces,
163 each pair being { "NAME", VALUE }
164 where VALUE is the bits to set or minus the bits to clear.
165 An empty string NAME is used to identify the default VALUE. */
166
167#define MASK_88100 0x00000001 /* Target m88100 */
168#define MASK_88110 0x00000002 /* Target m88110 */
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169#define MASK_88000 (MASK_88100 | MASK_88110)
170
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171#define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
172#define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
173#define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
89ad2599 174#define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */
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175#define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
176#define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
177#define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
178#define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
179#define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
180#define MASK_USE_DIV 0x00000800 /* No signed div. checks */
181#define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
182#define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
183#define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
57bc9c68 184#define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
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185#define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
186 MASK_HANDLE_LARGE_SHIFT)
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187#define MASK_OMIT_LEAF_FRAME_POINTER 0x00020000 /* omit leaf frame pointers */
188
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189
190#define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
191#define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
192#define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
193
194#define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
195#define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
196#define TARGET_SVR4 (target_flags & MASK_SVR4)
89ad2599 197#define TARGET_SVR3 (target_flags & MASK_SVR3)
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198#define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
199#define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
200#define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
201#define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
202#define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
203#define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
204#define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
205#define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
206#define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
57bc9c68 207#define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
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208
209#define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
1dd4b7a8 210#define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
79e68feb 211
9230dc46 212/* Redefined in sysv3.h, sysv4.h, and dgux.h. */
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213#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
214#define CPU_DEFAULT MASK_88100
215
216#define TARGET_SWITCHES \
217 { \
218 { "88110", MASK_88110 }, \
219 { "88100", MASK_88100 }, \
220 { "88000", MASK_88000 }, \
221 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
222 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
223 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
224 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
225 { "svr4", MASK_SVR4 }, \
226 { "svr3", -MASK_SVR4 }, \
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227 { "no-underscores", MASK_NO_UNDERSCORES }, \
228 { "big-pic", MASK_BIG_PIC }, \
229 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
230 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
231 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
232 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
233 { "use-div-instruction", MASK_USE_DIV }, \
234 { "identify-revision", MASK_IDENTIFY_REVISION }, \
235 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
236 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
237 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
1039fa46 238 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
57bc9c68 239 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
1dd4b7a8 240 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
44ae13fb 241 { "no-omit-leaf-frame-pointer", -MASK_OMIT_LEAF_FRAME_POINTER }, \
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242 SUBTARGET_SWITCHES \
243 /* Default switches */ \
244 { "", TARGET_DEFAULT }, \
245 }
246
9230dc46 247/* Redefined in dgux.h. */
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248#define SUBTARGET_SWITCHES
249
250/* Macro to define table for command options with values. */
251
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252#define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
253 { "version-", &m88k_version } }
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254
255/* Do any checking or such that is needed after processing the -m switches. */
256
257#define OVERRIDE_OPTIONS \
258 do { \
259 register int i; \
260 \
261 if ((target_flags & MASK_88000) == 0) \
262 target_flags |= CPU_DEFAULT; \
263 \
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264 if (TARGET_88110) \
265 { \
266 target_flags |= MASK_USE_DIV; \
267 target_flags &= ~MASK_CHECK_ZERO_DIV; \
268 } \
269 \
270 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
271 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
2d6cb879 272 \
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273 if (TARGET_BIG_PIC) \
274 flag_pic = 2; \
275 \
276 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
277 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
278 \
50eb31b2 279 if (TARGET_SVR4) \
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280 { \
281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
282 reg_names[i]--; \
283 m88k_pound_sign = "#"; \
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284 } \
285 else \
286 { \
287 target_flags |= MASK_SVR3; \
288 target_flags &= ~MASK_SVR4; \
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289 } \
290 \
291 if (m88k_short_data) \
292 { \
e5778b1e 293 const char *p = m88k_short_data; \
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294 while (*p) \
295 if (*p >= '0' && *p <= '9') \
296 p++; \
297 else \
298 { \
299 error ("Invalid option `-mshort-data-%s'", m88k_short_data); \
300 break; \
301 } \
302 m88k_gp_threshold = atoi (m88k_short_data); \
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303 if (m88k_gp_threshold > 0x7fffffff) \
304 error ("-mshort-data-%s is too large ", m88k_short_data); \
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305 if (flag_pic) \
306 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
307 } \
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308 if (TARGET_OMIT_LEAF_FRAME_POINTER) /* keep nonleaf frame pointers */ \
309 flag_omit_frame_pointer = 1; \
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310 } while (0)
311\f
312/*** Storage Layout ***/
313
314/* Sizes in bits of the various types. */
315#define CHAR_TYPE_SIZE 8
316#define SHORT_TYPE_SIZE 16
317#define INT_TYPE_SIZE 32
318#define LONG_TYPE_SIZE 32
319#define LONG_LONG_TYPE_SIZE 64
320#define FLOAT_TYPE_SIZE 32
321#define DOUBLE_TYPE_SIZE 64
322#define LONG_DOUBLE_TYPE_SIZE 64
323
324/* Define this if most significant bit is lowest numbered
325 in instructions that operate on numbered bit-fields.
326 Somewhat arbitrary. It matches the bit field patterns. */
327#define BITS_BIG_ENDIAN 1
328
329/* Define this if most significant byte of a word is the lowest numbered.
330 That is true on the m88000. */
331#define BYTES_BIG_ENDIAN 1
332
333/* Define this if most significant word of a multiword number is the lowest
334 numbered.
335 For the m88000 we can decide arbitrarily since there are no machine
336 instructions for them. */
337#define WORDS_BIG_ENDIAN 1
338
de857550 339/* Number of bits in an addressable storage unit */
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340#define BITS_PER_UNIT 8
341
342/* Width in bits of a "word", which is the contents of a machine register.
343 Note that this is not necessarily the width of data type `int';
344 if using 16-bit ints on a 68000, this would still be 32.
345 But on a machine with 16-bit registers, this would be 16. */
346#define BITS_PER_WORD 32
347
348/* Width of a word, in units (bytes). */
349#define UNITS_PER_WORD 4
350
351/* Width in bits of a pointer.
352 See also the macro `Pmode' defined below. */
353#define POINTER_SIZE 32
354
355/* Allocation boundary (in *bits*) for storing arguments in argument list. */
356#define PARM_BOUNDARY 32
357
358/* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
359#define MAX_PARM_BOUNDARY 64
360
361/* Boundary (in *bits*) on which stack pointer should be aligned. */
362#define STACK_BOUNDARY 128
363
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364/* Allocation boundary (in *bits*) for the code of a function. On the
365 m88100, it is desirable to align to a cache line. However, SVR3 targets
366 only provided 8 byte alignment. The m88110 cache is small, so align
367 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
368#define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
369 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
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370
371/* No data type wants to be aligned rounder than this. */
372#define BIGGEST_ALIGNMENT 64
373
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374/* The best alignment to use in cases where we have a choice. */
375#define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
376
377/* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
79e68feb 378#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
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379 ((TREE_CODE (EXP) == STRING_CST \
380 && (ALIGN) < FASTEST_ALIGNMENT) \
381 ? FASTEST_ALIGNMENT : (ALIGN))
79e68feb 382
2c39ec40 383/* Make arrays of chars 4/8 byte aligned for the same reasons. */
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384#define DATA_ALIGNMENT(TYPE, ALIGN) \
385 (TREE_CODE (TYPE) == ARRAY_TYPE \
386 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
2c39ec40 387 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
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388
389/* Alignment of field after `int : 0' in a structure.
390 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
391/* #define EMPTY_FIELD_BOUNDARY 8 */
392
393/* Every structure's size must be a multiple of this. */
394#define STRUCTURE_SIZE_BOUNDARY 8
395
de857550 396/* Set this nonzero if move instructions will actually fail to work
79e68feb 397 when given unaligned data. */
de857550 398#define STRICT_ALIGNMENT 1
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399
400/* A bitfield declared as `int' forces `int' alignment for the struct. */
401#define PCC_BITFIELD_TYPE_MATTERS 1
402
403/* Maximum size (in bits) to use for the largest integral type that
404 replaces a BLKmode type. */
405/* #define MAX_FIXED_MODE_SIZE 0 */
406
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407/* Check a `double' value for validity for a particular machine mode.
408 This is defined to avoid crashes outputting certain constants.
409 Since we output the number in hex, the assembler won't choke on it. */
410/* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
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411
412/* A code distinguishing the floating point format of the target machine. */
413/* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
414\f
415/*** Register Usage ***/
416
417/* Number of actual hardware registers.
418 The hardware registers are assigned numbers for the compiler
419 from 0 to just below FIRST_PSEUDO_REGISTER.
420 All registers that the compiler knows about must be given numbers,
421 even those that are not normally considered general registers.
422
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423 The m88100 has a General Register File (GRF) of 32 32-bit registers.
424 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
425#define FIRST_PSEUDO_REGISTER 64
426#define FIRST_EXTENDED_REGISTER 32
427
428/* General notes on extended registers, their use and misuse.
429
430 Possible good uses:
431
432 spill area instead of memory.
433 -waste if only used once
434
2296cba3 435 floating point calculations
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436 -probably a waste unless we have run out of general purpose registers
437
438 freeing up general purpose registers
439 -e.g. may be able to have more loop invariants if floating
440 point is moved into extended registers.
441
442
443 I've noticed wasteful moves into and out of extended registers; e.g. a load
444 into x21, then inside a loop a move into r24, then r24 used as input to
445 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
446 will address this. This wastes a move, but the load,store and move could
447 have been saved had extended registers been used throughout.
448 E.g. in the code following code, if z and xz are placed in extended
449 registers, there is no need to save preserve registers.
450
451 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
452
453 double z=0,xz=4.5;
454
455 foo(a,b)
456 long a,b;
457 {
458 while (a < b)
459 {
460 k = b + c + d + e + f + g + h + a + i + j++;
461 z += xz;
462 a++;
463 }
464 printf("k= %d; z=%f;\n", k, z);
465 }
466
467 I've found that it is possible to change the constraints (putting * before
468 the 'r' constraints int the fadd.ddd instruction) and get the entire
469 addition and store to go into extended registers. However, this also
470 forces simple addition and return of floating point arguments to a
471 function into extended registers. Not the correct solution.
472
473 Found the following note in local-alloc.c which may explain why I can't
474 get both registers to be in extended registers since two are allocated in
475 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
476 why an extended register is used instead of just using the preserve
477 register.
478
479 from local-alloc.c:
480 We have provision to exempt registers, even when they are contained
481 within the block, that can be tied to others that are not contained in it.
482 This is so that global_alloc could process them both and tie them then.
483 But this is currently disabled since tying in global_alloc is not
484 yet implemented.
485
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486 The explanation of why the preserved register is not used is as follows,
487 I believe. The registers are being allocated in order. Tying is not
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488 done so efficiently, so when it comes time to do the first allocation,
489 there are no registers left to use without spilling except extended
490 registers. Then when the next pseudo register needs a hard reg, there
491 are still no registers to be had for free, but this one must be a GRF
492 reg instead of an extended reg, so a preserve register is spilled. Thus
493 the move from extended to GRF is necessitated. I do not believe this can
8edcf09f 494 be 'fixed' through the files in config/m88k.
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495
496 gcc seems to sometimes make worse use of register allocation -- not counting
497 moves -- whenever extended registers are present. For example in the
498 whetstone, the simple for loop (slightly modified)
499 for(i = 1; i <= n1; i++)
500 {
501 x1 = (x1 + x2 + x3 - x4) * t;
502 x2 = (x1 + x2 - x3 + x4) * t;
503 x3 = (x1 - x2 + x3 + x4) * t;
504 x4 = (x1 + x2 + x3 + x4) * t;
505 }
506 in general loads the high bits of the addresses of x2-x4 and i into registers
507 outside the loop. Whenever extended registers are used, it loads all of
508 these inside the loop. My conjecture is that since the 88110 has so many
509 registers, and gcc makes no distinction at this point -- just that they are
510 not fixed, that in loop.c it believes it can expect a number of registers
511 to be available. Then it allocates 'too many' in local-alloc which causes
512 problems later. 'Too many' are allocated because a large portion of the
513 registers are extended registers and cannot be used for certain purposes
514 ( e.g. hold the address of a variable). When this loop is compiled on its
515 own, the problem does not occur. I don't know the solution yet, though it
516 is probably in the base sources. Possibly a different way to calculate
517 "threshold". */
518
519/* 1 for registers that have pervasive standard uses and are not available
520 for the register allocator. Registers r14-r25 and x22-x29 are expected
521 to be preserved across function calls.
522
523 On the 88000, the standard uses of the General Register File (GRF) are:
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524 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
525 Reg 1 = Subroutine return pointer (hardware).
526 Reg 2-9 = Parameter registers (OCS).
527 Reg 10 = OCS reserved temporary.
528 Reg 11 = Static link if needed [OCS reserved temporary].
529 Reg 12 = Address of structure return (OCS).
530 Reg 13 = OCS reserved temporary.
531 Reg 14-25 = Preserved register set.
532 Reg 26-29 = Reserved by OCS and ABI.
533 Reg 30 = Frame pointer (Common use).
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534 Reg 31 = Stack pointer.
535
536 The following follows the current 88open UCS specification for the
537 Extended Register File (XRF):
538 Reg 32 = x0 Always equal to zero
2296cba3 539 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
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540 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
541 Reg 62-63 = x30-x31 Reserved for future ABI use.
542
543 Note: The current 88110 extended register mapping is subject to change.
544 The bias towards caller-save registers is based on the
545 presumption that memory traffic can potentially be reduced by
546 allowing the "caller" to save only that part of the register
547 which is actually being used. (i.e. don't do a st.x if a st.d
548 is sufficient). Also, in scientific code (a.k.a. Fortran), the
549 large number of variables defined in common blocks may require
550 that almost all registers be saved across calls anyway. */
79e68feb
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551
552#define FIXED_REGISTERS \
dfa69feb 553 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
a9c3f03a
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554 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
555 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
556 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
79e68feb
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557
558/* 1 for registers not available across function calls.
559 These must include the FIXED_REGISTERS and also any
560 registers that can be used without being saved.
561 The latter must include the registers where values are returned
562 and the register where structure-value addresses are passed.
563 Aside from that, you can include as many other registers as you like. */
564
565#define CALL_USED_REGISTERS \
566 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
a9c3f03a
TW
567 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
568 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
569 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
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570
571/* Macro to conditionally modify fixed_regs/call_used_regs. */
572#define CONDITIONAL_REGISTER_USAGE \
573 { \
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574 if (! TARGET_88110) \
575 { \
576 register int i; \
577 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
578 { \
579 fixed_regs[i] = 1; \
580 call_used_regs[i] = 1; \
581 } \
582 } \
79e68feb 583 if (flag_pic) \
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584 { \
585 /* Current hack to deal with -fpic -O2 problems. */ \
586 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
587 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
588 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
589 } \
79e68feb
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590 }
591
903a8914
JH
592/* True if register is an extended register. */
593#define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
594
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595/* Return number of consecutive hard regs needed starting at reg REGNO
596 to hold something of mode MODE.
597 This is ordinarily the length in words of a value of mode MODE
598 but can be less for certain modes in special long registers.
599
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600 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
601 An XRF register can hold any mode, but two GRF registers are required
602 for larger modes. */
603#define HARD_REGNO_NREGS(REGNO, MODE) \
edebe164 604 (XRF_REGNO_P (REGNO) \
a9c3f03a 605 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
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606
607/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
608
609 For double integers, we never put the value into an odd register so that
610 the operators don't run into the situation where the high part of one of
a9c3f03a
TW
611 the inputs is the low part of the result register. (It's ok if the output
612 registers are the same as the input registers.) The XRF registers can
613 hold all modes, but only DF and SF modes can be manipulated in these
614 registers. The compiler should be allowed to use these as a fast spill
615 area. */
616#define HARD_REGNO_MODE_OK(REGNO, MODE) \
edebe164
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617 (XRF_REGNO_P(REGNO) \
618 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
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619 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
620 || ((REGNO) & 1) == 0))
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621
622/* Value is 1 if it is a good idea to tie two pseudo registers
623 when one has mode MODE1 and one has mode MODE2.
624 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
625 for any hard reg, then this must be 0 for correct output. */
626#define MODES_TIEABLE_P(MODE1, MODE2) \
edebe164
JH
627 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
628 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
629 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
630 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
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631
632/* Specify the registers used for certain standard purposes.
633 The values of these macros are register numbers. */
634
635/* the m88000 pc isn't overloaded on a register that the compiler knows about. */
636/* #define PC_REGNUM */
637
638/* Register to use for pushing function arguments. */
639#define STACK_POINTER_REGNUM 31
640
641/* Base register for access to local variables of the function. */
642#define FRAME_POINTER_REGNUM 30
643
644/* Base register for access to arguments of the function. */
645#define ARG_POINTER_REGNUM 0
646
647/* Register used in cases where a temporary is known to be safe to use. */
648#define TEMP_REGNUM 10
649
650/* Register in which static-chain is passed to a function. */
651#define STATIC_CHAIN_REGNUM 11
652
653/* Register in which address to store a structure value
654 is passed to a function. */
655#define STRUCT_VALUE_REGNUM 12
656
657/* Register to hold the addressing base for position independent
658 code access to data items. */
659#define PIC_OFFSET_TABLE_REGNUM 25
660
661/* Order in which registers are preferred (most to least). Use temp
662 registers, then param registers top down. Preserve registers are
663 top down to maximize use of double memory ops for register save.
a9c3f03a
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664 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
665 in most environments with the -fcall-used- or -fcall-saved- options. */
666#define REG_ALLOC_ORDER \
667 { \
668 13, 12, 11, 10, 29, 28, 27, 26, \
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669 62, 63, 9, 8, 7, 6, 5, 4, \
670 3, 2, 1, 53, 52, 51, 50, 49, \
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671 48, 47, 46, 45, 44, 43, 42, 41, \
672 40, 39, 38, 37, 36, 35, 34, 33, \
673 25, 24, 23, 22, 21, 20, 19, 18, \
674 17, 16, 15, 14, 61, 60, 59, 58, \
675 57, 56, 55, 54, 30, 31, 0, 32}
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676
677/* Order for leaf functions. */
678#define REG_LEAF_ALLOC_ORDER \
679 { \
680 9, 8, 7, 6, 13, 12, 11, 10, \
681 29, 28, 27, 26, 62, 63, 5, 4, \
682 3, 2, 0, 53, 52, 51, 50, 49, \
683 48, 47, 46, 45, 44, 43, 42, 41, \
684 40, 39, 38, 37, 36, 35, 34, 33, \
685 25, 24, 23, 22, 21, 20, 19, 18, \
686 17, 16, 15, 14, 61, 60, 59, 58, \
687 57, 56, 55, 54, 30, 31, 1, 32}
688
689/* Switch between the leaf and non-leaf orderings. The purpose is to avoid
690 write-over scoreboard delays between caller and callee. */
691#define ORDER_REGS_FOR_LOCAL_ALLOC \
692{ \
693 static int leaf[] = REG_LEAF_ALLOC_ORDER; \
694 static int nonleaf[] = REG_ALLOC_ORDER; \
695 \
696 bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \
697 FIRST_PSEUDO_REGISTER * sizeof (int)); \
698}
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699\f
700/*** Register Classes ***/
701
702/* Define the classes of registers for register constraints in the
703 machine description. Also define ranges of constants.
704
705 One of the classes must always be named ALL_REGS and include all hard regs.
706 If there is more than one class, another class must be named NO_REGS
707 and contain no registers.
708
709 The name GENERAL_REGS must be the name of a class (or an alias for
710 another name such as ALL_REGS). This is the class of registers
711 that is allowed by "g" or "r" in a register constraint.
712 Also, registers outside this class are allocated only when
713 instructions express preferences for them.
714
715 The classes must be numbered in nondecreasing order; that is,
716 a larger-numbered class must never be contained completely
717 in a smaller-numbered class.
718
719 For any two classes, it is very desirable that there be another
720 class that represents their union. */
721
a9c3f03a 722/* The m88000 hardware has two kinds of registers. In addition, we denote
79e68feb
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723 the arg pointer as a separate class. */
724
a9c3f03a
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725enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
726 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
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727
728#define N_REG_CLASSES (int) LIM_REG_CLASSES
729
730/* Give names of register classes as strings for dump file. */
a9c3f03a
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731#define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
732 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
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733
734/* Define which registers fit in which classes.
735 This is an initializer for a vector of HARD_REG_SET
736 of length N_REG_CLASSES. */
a9c3f03a
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737#define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
738 {0x00000001, 0x00000000}, \
739 {0x00000000, 0xffffffff}, \
740 {0xfffffffe, 0x00000000}, \
741 {0xffffffff, 0x00000000}, \
742 {0xfffffffe, 0xffffffff}, \
743 {0xffffffff, 0xffffffff}}
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744
745/* The same information, inverted:
746 Return the class number of the smallest class containing
747 reg number REGNO. This could be a conditional expression
748 or could index an array. */
a9c3f03a
TW
749#define REGNO_REG_CLASS(REGNO) \
750 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
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751
752/* The class value for index registers, and the one for base regs. */
a9c3f03a 753#define BASE_REG_CLASS AGRF_REGS
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754#define INDEX_REG_CLASS GENERAL_REGS
755
a9c3f03a
TW
756/* Get reg_class from a letter such as appears in the machine description.
757 For the 88000, the following class/letter is defined for the XRF:
758 x - Extended register file */
759#define REG_CLASS_FROM_LETTER(C) \
760 (((C) == 'x') ? XRF_REGS : NO_REGS)
79e68feb
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761
762/* Macros to check register numbers against specific register classes.
763 These assume that REGNO is a hard or pseudo reg number.
764 They give nonzero only if REGNO is a hard reg of the suitable class
765 or a pseudo reg currently allocated to a suitable hard reg.
766 Since they use reg_renumber, they are safe only once reg_renumber
767 has been allocated, which happens in local-alloc.c. */
a9c3f03a
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768#define REGNO_OK_FOR_BASE_P(REGNO) \
769 ((REGNO) < FIRST_EXTENDED_REGISTER \
770 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
771#define REGNO_OK_FOR_INDEX_P(REGNO) \
772 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
773 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
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774
775/* Given an rtx X being reloaded into a reg required to be
776 in class CLASS, return the class of reg to actually use.
777 In general this is just CLASS; but on some machines
778 in some cases it is preferable to use a more restrictive class.
779 Double constants should be in a register iff they can be made cheaply. */
a9c3f03a
TW
780#define PREFERRED_RELOAD_CLASS(X,CLASS) \
781 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
79e68feb 782
c9b26f89
TW
783/* Return the register class of a scratch register needed to load IN
784 into a register of class CLASS in MODE. On the m88k, when PIC, we
785 need a temporary when loading some addresses into a register. */
786#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
787 ((flag_pic \
788 && GET_CODE (IN) == CONST \
789 && GET_CODE (XEXP (IN, 0)) == PLUS \
790 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
791 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
792
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793/* Return the maximum number of consecutive registers
794 needed to represent mode MODE in a register of class CLASS. */
a9c3f03a
TW
795#define CLASS_MAX_NREGS(CLASS, MODE) \
796 ((((CLASS) == XRF_REGS) ? 1 \
797 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
79e68feb
RS
798
799/* Letters in the range `I' through `P' in a register constraint string can
800 be used to stand for particular ranges of immediate operands. The C
801 expression is true iff C is a known letter and VALUE is appropriate for
802 that letter.
803
de857550 804 For the m88000, the following constants are used:
79e68feb
RS
805 `I' requires a non-negative 16-bit value.
806 `J' requires a non-positive 16-bit value.
c15d8db6 807 `K' requires a non-negative value < 32.
79e68feb
RS
808 `L' requires a constant with only the upper 16-bits set.
809 `M' requires constant values that can be formed with `set'.
810 `N' requires a negative value.
811 `O' requires zero.
812 `P' requires a non-negative value. */
813
814/* Quick tests for certain values. */
815#define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
816#define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
817#define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
818#define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
819#define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
820#define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
821
822#define CONST_OK_FOR_LETTER_P(VALUE, C) \
823 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
824 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
c15d8db6 825 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
79e68feb
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826 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
827 : (C) == 'M' ? integer_ok_for_set (VALUE) \
828 : (C) == 'N' ? (VALUE) < 0 \
829 : (C) == 'O' ? (VALUE) == 0 \
830 : (C) == 'P' ? (VALUE) >= 0 \
831 : 0)
832
833/* Similar, but for floating constants, and defining letters G and H.
834 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
835 constraints are: `G' requires zero, and `H' requires one or two. */
836#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
837 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
838 && CONST_DOUBLE_LOW (VALUE) == 0) \
839 : 0)
840
841/* Letters in the range `Q' through `U' in a register constraint string
842 may be defined in a machine-dependent fashion to stand for arbitrary
843 operand types.
844
845 For the m88k, `Q' handles addresses in a call context. */
846
847#define EXTRA_CONSTRAINT(OP, C) \
848 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
849\f
850/*** Describing Stack Layout ***/
851
852/* Define this if pushing a word on the stack moves the stack pointer
853 to a smaller address. */
854#define STACK_GROWS_DOWNWARD
855
856/* Define this if the addresses of local variable slots are at negative
857 offsets from the frame pointer. */
858/* #define FRAME_GROWS_DOWNWARD */
859
860/* Offset from the frame pointer to the first local variable slot to be
861 allocated. For the m88k, the debugger wants the return address (r1)
862 stored at location r30+4, and the previous frame pointer stored at
863 location r30. */
864#define STARTING_FRAME_OFFSET 8
865
866/* If we generate an insn to push BYTES bytes, this says how many the
867 stack pointer really advances by. The m88k has no push instruction. */
868/* #define PUSH_ROUNDING(BYTES) */
869
870/* If defined, the maximum amount of space required for outgoing arguments
871 will be computed and placed into the variable
872 `current_function_outgoing_args_size'. No space will be pushed
873 onto the stack for each call; instead, the function prologue should
874 increase the stack frame size by this amount. */
f73ad30e 875#define ACCUMULATE_OUTGOING_ARGS 1
79e68feb
RS
876
877/* Offset from the stack pointer register to the first location at which
878 outgoing arguments are placed. Use the default value zero. */
879/* #define STACK_POINTER_OFFSET 0 */
880
881/* Offset of first parameter from the argument pointer register value.
882 Using an argument pointer, this is 0 for the m88k. GCC knows
883 how to eliminate the argument pointer references if necessary. */
884#define FIRST_PARM_OFFSET(FNDECL) 0
885
886/* Define this if functions should assume that stack space has been
887 allocated for arguments even when their values are passed in
888 registers.
889
890 The value of this macro is the size, in bytes, of the area reserved for
891 arguments passed in registers.
892
893 This space can either be allocated by the caller or be a part of the
894 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
895 says which. */
896#define REG_PARM_STACK_SPACE(FNDECL) 32
897
898/* Define this macro if REG_PARM_STACK_SPACE is defined but stack
899 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
900 Normally, when a parameter is not passed in registers, it is placed on
901 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
902 suppresses this behavior and causes the parameter to be passed on the
903 stack in its natural location. */
904#define STACK_PARMS_IN_REG_PARM_AREA
905
906/* Define this if it is the responsibility of the caller to allocate the
907 area reserved for arguments passed in registers. If
908 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
909 macro is to determine whether the space is included in
910 `current_function_outgoing_args_size'. */
911/* #define OUTGOING_REG_PARM_STACK_SPACE */
912
913/* Offset from the stack pointer register to an item dynamically allocated
914 on the stack, e.g., by `alloca'.
915
916 The default value for this macro is `STACK_POINTER_OFFSET' plus the
917 length of the outgoing arguments. The default is correct for most
918 machines. See `function.c' for details. */
919/* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
920
921/* Value is the number of bytes of arguments automatically
922 popped when returning from a subroutine call.
26b66701 923 FUNDECL is the declaration node of the function (as a tree),
79e68feb
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924 FUNTYPE is the data type of the function (as a tree),
925 or for a library call it is an identifier node for the subroutine name.
926 SIZE is the number of bytes of arguments passed on the stack. */
26b66701 927#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
79e68feb
RS
928
929/* Define how to find the value returned by a function.
930 VALTYPE is the data type of the value (as a tree).
931 If the precise function being called is known, FUNC is its FUNCTION_DECL;
932 otherwise, FUNC is 0. */
933#define FUNCTION_VALUE(VALTYPE, FUNC) \
c5c76735
JL
934 gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
935 2)
79e68feb
RS
936
937/* Define this if it differs from FUNCTION_VALUE. */
938/* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
939
940/* Disable the promotion of some structures and unions to registers. */
941#define RETURN_IN_MEMORY(TYPE) \
e14fa9c4
DE
942 (TYPE_MODE (TYPE) == BLKmode \
943 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
944 && !(TYPE_MODE (TYPE) == SImode \
945 || (TYPE_MODE (TYPE) == BLKmode \
946 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
947 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
79e68feb 948
b292ed86
JW
949/* Don't default to pcc-struct-return, because we have already specified
950 exactly how to return structures in the RETURN_IN_MEMORY macro. */
951#define DEFAULT_PCC_STRUCT_RETURN 0
952
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953/* Define how to find the value returned by a library function
954 assuming the value has mode MODE. */
c5c76735 955#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
79e68feb
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956
957/* True if N is a possible register number for a function value
958 as seen by the caller. */
959#define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
960
961/* Determine whether a function argument is passed in a register, and
962 which register. See m88k.c. */
963#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
964 m88k_function_arg (CUM, MODE, TYPE, NAMED)
965
966/* Define this if it differs from FUNCTION_ARG. */
967/* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
968
969/* A C expression for the number of words, at the beginning of an
970 argument, must be put in registers. The value must be zero for
971 arguments that are passed entirely in registers or that are entirely
972 pushed on the stack. */
973#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
974
975/* A C expression that indicates when an argument must be passed by
976 reference. If nonzero for an argument, a copy of that argument is
977 made in memory and a pointer to the argument is passed instead of the
978 argument itself. The pointer is passed in whatever way is appropriate
979 for passing a pointer to that type. */
980#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
981
982/* A C type for declaring a variable that is used as the first argument
983 of `FUNCTION_ARG' and other related values. It suffices to count
984 the number of words of argument so far. */
985#define CUMULATIVE_ARGS int
986
987/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
988 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
2c7ee1a6 989#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
79e68feb
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990
991/* A C statement (sans semicolon) to update the summarizer variable
992 CUM to advance past an argument in the argument list. The values
993 MODE, TYPE and NAMED describe that argument. Once this is done,
994 the variable CUM is suitable for analyzing the *following* argument
995 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
996 information may not be available.) */
997#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
998 do { \
999 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
1000 if ((CUM & 1) \
1001 && (__mode == DImode || __mode == DFmode \
1002 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
1003 CUM++; \
1004 CUM += (((__mode != BLKmode) \
1005 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
1006 + 3) / 4; \
1007 } while (0)
1008
1009/* True if N is a possible register number for function argument passing.
1010 On the m88000, these are registers 2 through 9. */
1011#define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
1012
1013/* A C expression which determines whether, and in which direction,
1014 to pad out an argument with extra space. The value should be of
1015 type `enum direction': either `upward' to pad above the argument,
1016 `downward' to pad below, or `none' to inhibit padding.
1017
1018 This macro does not control the *amount* of padding; that is always
1019 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1020#define FUNCTION_ARG_PADDING(MODE, TYPE) \
1021 ((MODE) == BLKmode \
1022 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1023 || TREE_CODE (TYPE) == UNION_TYPE)) \
1024 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1025
1026/* If defined, a C expression that gives the alignment boundary, in bits,
1027 of an argument with the specified mode and type. If it is not defined,
1028 `PARM_BOUNDARY' is used for all arguments. */
1029#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
856aa687 1030 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
79e68feb
RS
1031 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1032
1033/* Generate necessary RTL for __builtin_saveregs().
1034 ARGLIST is the argument list; see expr.c. */
648d2ffc 1035#define EXPAND_BUILTIN_SAVEREGS() m88k_builtin_saveregs ()
79e68feb 1036
a9b8384d
RH
1037/* Define the `__builtin_va_list' type for the ABI. */
1038#define BUILD_VA_LIST_TYPE(VALIST) \
1039 (VALIST) = m88k_build_va_list ()
a9b8384d
RH
1040
1041/* Implement `va_start' for varargs and stdarg. */
1042#define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1043 m88k_va_start (stdarg, valist, nextarg)
a9b8384d
RH
1044
1045/* Implement `va_arg'. */
1046#define EXPAND_BUILTIN_VA_ARG(valist, type) \
1047 m88k_va_arg (valist, type)
a9b8384d 1048
79e68feb 1049/* Generate the assembly code for function entry. */
cffed10a
TW
1050#define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE)
1051
1052/* Perform special actions at the point where the prologue ends. */
1053#define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE)
79e68feb
RS
1054
1055/* Output assembler code to FILE to increment profiler label # LABELNO
9230dc46
SC
1056 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1057 dgux.h. */
79e68feb
RS
1058#define FUNCTION_PROFILER(FILE, LABELNO) \
1059 output_function_profiler (FILE, LABELNO, "mcount", 1)
1060
c9b26f89
TW
1061/* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1062#define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1063
79e68feb
RS
1064/* Output assembler code to FILE to initialize basic-block profiling for
1065 the current module. LABELNO is unique to each instance. */
1066#define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1067 output_function_block_profiler (FILE, LABELNO)
1068
c9b26f89
TW
1069/* Maximum length in instructions of the code output by
1070 FUNCTION_BLOCK_PROFILER. */
1071#define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1072
79e68feb
RS
1073/* Output assembler code to FILE to increment the count associated with
1074 the basic block number BLOCKNO. */
1075#define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1076
c9b26f89
TW
1077/* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1078#define BLOCK_PROFILER_LENGTH 4
1079
79e68feb
RS
1080/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1081 the stack pointer does not matter. The value is tested only in
1082 functions that have frame pointers.
1083 No definition is equivalent to always zero. */
1084#define EXIT_IGNORE_STACK (1)
1085
1086/* Generate the assembly code for function exit. */
cffed10a 1087#define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE)
79e68feb 1088
cffed10a
TW
1089/* Perform special actions at the point where the epilogue begins. */
1090#define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE)
79e68feb
RS
1091
1092/* Value should be nonzero if functions must have frame pointers.
1093 Zero means the frame pointer need not be set up (and parms
1094 may be accessed via the stack pointer) in functions that seem suitable.
1095 This is computed in `reload', in reload1.c. */
1096#define FRAME_POINTER_REQUIRED \
1dd4b7a8
SC
1097(current_function_varargs \
1098 || (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \
1099 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
79e68feb
RS
1100
1101/* Definitions for register eliminations.
1102
1103 We have two registers that can be eliminated on the m88k. First, the
1104 frame pointer register can often be eliminated in favor of the stack
1105 pointer register. Secondly, the argument pointer register can always be
1106 eliminated; it is replaced with either the stack or frame pointer. */
1107
1108/* This is an array of structures. Each structure initializes one pair
1109 of eliminable registers. The "from" register number is given first,
1110 followed by "to". Eliminations of the same "from" register are listed
1111 in order of preference. */
1112#define ELIMINABLE_REGS \
1113{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1114 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1115 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1116
1117/* Given FROM and TO register numbers, say whether this elimination
1118 is allowed. */
1119#define CAN_ELIMINATE(FROM, TO) \
1120 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1121
1122/* Define the offset between two registers, one to be eliminated, and the other
1123 its replacement, at the start of a routine. */
1124#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1125{ m88k_layout_frame (); \
1126 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1127 (OFFSET) = m88k_fp_offset; \
1128 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1129 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1130 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1131 (OFFSET) = m88k_stack_size; \
1132 else \
1133 abort (); \
1134}
1135\f
1136/*** Trampolines for Nested Functions ***/
1137
1138/* Output assembler code for a block containing the constant parts
1139 of a trampoline, leaving space for the variable parts.
1140
1141 This block is placed on the stack and filled in. It is aligned
1142 0 mod 128 and those portions that are executed are constant.
1143 This should work for instruction caches that have cache lines up
1144 to the aligned amount (128 is arbitrary), provided no other code
1145 producer is attempting to play the same game. This of course is
1146 in violation of any number of 88open standards. */
1147
1148#define TRAMPOLINE_TEMPLATE(FILE) \
1149{ \
5c828fb7
JH
1150 char buf[256]; \
1151 static int labelno = 0; \
1152 labelno++; \
1153 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
79e68feb
RS
1154 /* Save the return address (r1) in the static chain reg (r11). */ \
1155 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1156 /* Locate this block; transfer to the next instruction. */ \
e6e1cf4c
JH
1157 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1158 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
79e68feb
RS
1159 /* Save r10; use it as the relative pointer; restore r1. */ \
1160 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1161 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1162 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1163 /* Load the function's address and go there. */ \
1164 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1165 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1166 /* Restore r10 and load the static chain register. */ \
1167 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1168 /* Storage: r10 save area, static chain, function address. */ \
1169 ASM_OUTPUT_INT (FILE, const0_rtx); \
1170 ASM_OUTPUT_INT (FILE, const0_rtx); \
1171 ASM_OUTPUT_INT (FILE, const0_rtx); \
1172}
1173
1174/* Length in units of the trampoline for entering a nested function.
1175 This is really two components. The first 32 bytes are fixed and
1176 must be copied; the last 12 bytes are just storage that's filled
1177 in later. So for allocation purposes, it's 32+12 bytes, but for
de857550 1178 initialization purposes, it's 32 bytes. */
79e68feb
RS
1179
1180#define TRAMPOLINE_SIZE (32+12)
1181
1182/* Alignment required for a trampoline. 128 is used to find the
1183 beginning of a line in the instruction cache and to allow for
1184 instruction cache lines of up to 128 bytes. */
1185
1186#define TRAMPOLINE_ALIGNMENT 128
1187
1188/* Emit RTL insns to initialize the variable parts of a trampoline.
1189 FNADDR is an RTX for the address of the function's pure code.
1190 CXT is an RTX for the static chain value for the function. */
1191
1192#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1193{ \
c5c76735
JL
1194 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \
1195 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \
79e68feb
RS
1196}
1197
1198/*** Library Subroutine Names ***/
1199
1200/* Define this macro if GNU CC should generate calls to the System V
1201 (and ANSI C) library functions `memcpy' and `memset' rather than
1202 the BSD functions `bcopy' and `bzero'. */
1203#define TARGET_MEM_FUNCTIONS
1204\f
1205/*** Addressing Modes ***/
1206
aa0b4465 1207#define EXTRA_CC_MODES CC(CCEVENmode, "CCEVEN")
347da86b
RS
1208
1209#define SELECT_CC_MODE(OP,X,Y) CCmode
1210
940da324
JL
1211/* #define HAVE_POST_INCREMENT 0 */
1212/* #define HAVE_POST_DECREMENT 0 */
79e68feb 1213
940da324
JL
1214/* #define HAVE_PRE_DECREMENT 0 */
1215/* #define HAVE_PRE_INCREMENT 0 */
79e68feb 1216
50eb31b2
SC
1217/* Recognize any constant value that is a valid address.
1218 When PIC, we do not accept an address that would require a scratch reg
1219 to load into a register. */
1220
6eff269e
BK
1221#define CONSTANT_ADDRESS_P(X) \
1222 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
50eb31b2
SC
1223 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1224 || (GET_CODE (X) == CONST \
1225 && ! (flag_pic && pic_address_needs_scratch (X))))
1226
79e68feb
RS
1227
1228/* Maximum number of registers that can appear in a valid memory address. */
1229#define MAX_REGS_PER_ADDRESS 2
1230
1231/* The condition for memory shift insns. */
1232#define SCALED_ADDRESS_P(ADDR) \
1233 (GET_CODE (ADDR) == PLUS \
1234 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1235 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1236
1237/* Can the reference to X be made short? */
1238#define SHORT_ADDRESS_P(X,TEMP) \
1239 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1240 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1241
1242/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1243 that is a valid memory address for an instruction.
1244 The MODE argument is the machine mode for the MEM expression
1245 that wants to use this address.
1246
1247 On the m88000, a legitimate address has the form REG, REG+REG,
1248 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1249
1250 The register elimination process should deal with the argument
1251 pointer and frame pointer changing to REG+SMALLINT. */
1252
1253#define LEGITIMATE_INDEX_P(X, MODE) \
1254 ((GET_CODE (X) == CONST_INT \
1255 && SMALL_INT (X)) \
1256 || (REG_P (X) \
1257 && REG_OK_FOR_INDEX_P (X)) \
1258 || (GET_CODE (X) == MULT \
1259 && REG_P (XEXP (X, 0)) \
1260 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1261 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1262 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1263
2d57146b
SC
1264#define RTX_OK_FOR_BASE_P(X) \
1265 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1266 || (GET_CODE (X) == SUBREG \
1267 && GET_CODE (SUBREG_REG (X)) == REG \
1268 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1269
1270#define RTX_OK_FOR_INDEX_P(X) \
1271 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1272 || (GET_CODE (X) == SUBREG \
1273 && GET_CODE (SUBREG_REG (X)) == REG \
1274 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1275
79e68feb
RS
1276#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1277{ \
1278 register rtx _x; \
1279 if (REG_P (X)) \
1280 { \
1281 if (REG_OK_FOR_BASE_P (X)) \
1282 goto ADDR; \
1283 } \
1284 else if (GET_CODE (X) == PLUS) \
1285 { \
1286 register rtx _x0 = XEXP (X, 0); \
1287 register rtx _x1 = XEXP (X, 1); \
1288 if ((flag_pic \
1289 && _x0 == pic_offset_table_rtx \
1290 && (flag_pic == 2 \
2d57146b 1291 ? RTX_OK_FOR_BASE_P (_x1) \
79e68feb
RS
1292 : (GET_CODE (_x1) == SYMBOL_REF \
1293 || GET_CODE (_x1) == LABEL_REF))) \
1294 || (REG_P (_x0) \
1295 && (REG_OK_FOR_BASE_P (_x0) \
1296 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1297 || (REG_P (_x1) \
1298 && (REG_OK_FOR_BASE_P (_x1) \
1299 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1300 goto ADDR; \
1301 } \
1302 else if (GET_CODE (X) == LO_SUM) \
1303 { \
1304 register rtx _x0 = XEXP (X, 0); \
1305 register rtx _x1 = XEXP (X, 1); \
1306 if (((REG_P (_x0) \
1307 && REG_OK_FOR_BASE_P (_x0)) \
1308 || (GET_CODE (_x0) == SUBREG \
1309 && REG_P (SUBREG_REG (_x0)) \
1310 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1311 && CONSTANT_P (_x1)) \
1312 goto ADDR; \
1313 } \
1314 else if (GET_CODE (X) == CONST_INT \
1315 && SMALL_INT (X)) \
1316 goto ADDR; \
1317 else if (SHORT_ADDRESS_P (X, _x)) \
1318 goto ADDR; \
1319}
1320
1321/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1322 and check its validity for a certain class.
1323 We have two alternate definitions for each of them.
1324 The usual definition accepts all pseudo regs; the other rejects
1325 them unless they have been allocated suitable hard regs.
1326 The symbol REG_OK_STRICT causes the latter definition to be used.
1327
1328 Most source files want to accept pseudo regs in the hope that
1329 they will get allocated to the class that the insn wants them to be in.
1330 Source files for reload pass need to be strict.
1331 After reload, it makes no difference, since pseudo regs have
1332 been eliminated by then. */
1333
1334#ifndef REG_OK_STRICT
1335
1336/* Nonzero if X is a hard reg that can be used as an index
1337 or if it is a pseudo reg. Not the argument pointer. */
903a8914
JH
1338#define REG_OK_FOR_INDEX_P(X) \
1339 (!XRF_REGNO_P(REGNO (X)))
79e68feb
RS
1340/* Nonzero if X is a hard reg that can be used as a base reg
1341 or if it is a pseudo reg. */
903a8914 1342#define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
79e68feb
RS
1343
1344#else
1345
1346/* Nonzero if X is a hard reg that can be used as an index. */
1347#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1348/* Nonzero if X is a hard reg that can be used as a base reg. */
1349#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1350
1351#endif
1352
1353/* Try machine-dependent ways of modifying an illegitimate address
1354 to be legitimate. If we find one, return the new, valid address.
1355 This macro is used in only one place: `memory_address' in explow.c.
1356
1357 OLDX is the address as it was before break_out_memory_refs was called.
1358 In some cases it is useful to look at this to decide what needs to be done.
1359
1360 MODE and WIN are passed so that this macro can use
1361 GO_IF_LEGITIMATE_ADDRESS.
1362
1363 It is always safe for this macro to do nothing. It exists to recognize
1364 opportunities to optimize the output. */
1365
1366/* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1367
1368#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1369{ \
1370 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
c5c76735
JL
1371 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1372 copy_to_mode_reg (SImode, XEXP (X, 1))); \
79e68feb 1373 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
c5c76735
JL
1374 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1375 copy_to_mode_reg (SImode, XEXP (X, 0))); \
79e68feb 1376 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
c5c76735
JL
1377 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1378 force_operand (XEXP (X, 0), 0)); \
79e68feb 1379 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
c5c76735
JL
1380 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1381 force_operand (XEXP (X, 1), 0)); \
2d57146b 1382 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
c5c76735
JL
1383 (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1384 XEXP (X, 1)); \
2d57146b 1385 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
c5c76735
JL
1386 (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
1387 force_operand (XEXP (X, 1), NULL_RTX)); \
79e68feb
RS
1388 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1389 || GET_CODE (X) == LABEL_REF) \
c9b26f89 1390 (X) = legitimize_address (flag_pic, X, 0, 0); \
79e68feb
RS
1391 if (memory_address_p (MODE, X)) \
1392 goto WIN; }
1393
1394/* Go to LABEL if ADDR (a legitimate address expression)
1395 has an effect that depends on the machine mode it is used for.
38e01259 1396 On the m88000 this is never true. */
79e68feb
RS
1397
1398#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1399
1400/* Nonzero if the constant value X is a legitimate general operand.
1401 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1402#define LEGITIMATE_CONSTANT_P(X) (1)
50eb31b2
SC
1403
1404/* Define this, so that when PIC, reload won't try to reload invalid
1405 addresses which require two reload registers. */
1406
1407#define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1408
79e68feb
RS
1409\f
1410/*** Condition Code Information ***/
1411
1412/* C code for a data type which is used for declaring the `mdep'
1413 component of `cc_status'. It defaults to `int'. */
1414/* #define CC_STATUS_MDEP int */
1415
1416/* A C expression to initialize the `mdep' field to "empty". */
1417/* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1418
1419/* Macro to zap the normal portions of CC_STATUS, but leave the
1420 machine dependent parts (ie, literal synthesis) alone. */
1421/* #define CC_STATUS_INIT_NO_MDEP \
1422 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1423
1424/* When using a register to hold the condition codes, the cc_status
1425 mechanism cannot be used. */
1426#define NOTICE_UPDATE_CC(EXP, INSN) (0)
1427\f
1428/*** Miscellaneous Parameters ***/
1429
1430/* Define the codes that are matched by predicates in m88k.c. */
1431#define PREDICATE_CODES \
1432 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1433 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1434 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1435 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1436 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1437 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1438 {"int5_operand", {CONST_INT}}, \
1439 {"int32_operand", {CONST_INT}}, \
1440 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1441 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1442 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
50eb31b2 1443 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
79e68feb 1444 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
347da86b
RS
1445 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \
1446 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \
1447 {"partial_ccmode_register_operand", { SUBREG, REG}}, \
79e68feb
RS
1448 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1449 {"equality_op", {EQ, NE}}, \
1450 {"pc_or_label_ref", {PC, LABEL_REF}},
1451
997718c7
RH
1452/* A list of predicates that do special things with modes, and so
1453 should not elicit warnings for VOIDmode match_operand. */
1454
1455#define SPECIAL_MODE_PREDICATES \
1456 "partial_ccmode_register_operand", \
1457 "pc_or_label_ref",
1458
dfa69feb
TW
1459/* The case table contains either words or branch instructions. This says
1460 which. We always claim that the vector is PC-relative. It is position
1461 independent when -fpic is used. */
1462#define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1463
79e68feb
RS
1464/* An alias for a machine mode name. This is the machine mode that
1465 elements of a jump-table should have. */
1466#define CASE_VECTOR_MODE SImode
1467
18543a22
ILT
1468/* Define as C expression which evaluates to nonzero if the tablejump
1469 instruction expects the table to contain offsets from the address of the
1470 table.
1471 Do not define this if the table should contain absolute addresses. */
1472#define CASE_VECTOR_PC_RELATIVE 1
79e68feb
RS
1473
1474/* Define this if control falls through a `case' insn when the index
1475 value is out of range. This means the specified default-label is
1476 actually ignored by the `case' insn proper. */
1477/* #define CASE_DROPS_THROUGH */
1478
cc61d0de
TW
1479/* Define this to be the smallest number of different values for which it
1480 is best to use a jump-table instead of a tree of conditional branches.
1481 The default is 4 for machines with a casesi instruction and 5 otherwise.
1482 The best 88110 number is around 7, though the exact number isn't yet
1483 known. A third alternative for the 88110 is to use a binary tree of
1484 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1485 win very much though. */
1486#define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1487
79e68feb
RS
1488/* Specify the tree operation to be used to convert reals to integers. */
1489#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1490
1491/* This is the kind of divide that is easiest to do in the general case. */
1492#define EASY_DIV_EXPR TRUNC_DIV_EXPR
1493
1494/* Define this as 1 if `char' should by default be signed; else as 0. */
1495#define DEFAULT_SIGNED_CHAR 1
1496
1497/* The 88open ABI says size_t is unsigned int. */
1498#define SIZE_TYPE "unsigned int"
1499
1500/* Allow and ignore #sccs directives */
1501#define SCCS_DIRECTIVE
1502
f88a7491
TW
1503/* Handle #pragma pack and sometimes #pragma weak. */
1504#define HANDLE_SYSV_PRAGMA
79e68feb
RS
1505
1506/* Tell when to handle #pragma weak. This is only done for V.4. */
daefd78b 1507#define SUPPORTS_WEAK TARGET_SVR4
18543a22 1508#define SUPPORTS_ONE_ONLY TARGET_SVR4
79e68feb
RS
1509
1510/* Max number of bytes we can move from memory to memory
1511 in one reasonably fast instruction. */
883a42e5 1512#define MOVE_MAX 8
79e68feb 1513
50eb31b2
SC
1514/* Define if normal loads of shorter-than-word items from memory clears
1515 the rest of the bigs in the register. */
1516#define BYTE_LOADS_ZERO_EXTEND
79e68feb
RS
1517
1518/* Zero if access to memory by bytes is faster. */
1519#define SLOW_BYTE_ACCESS 1
1520
1521/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1522 is done just by pretending it is already truncated. */
1523#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1524
1525/* Define this if addresses of constant functions
1526 shouldn't be put through pseudo regs where they can be cse'd.
1527 Desirable on machines where ordinary constants are expensive
1528 but a CALL with constant address is cheap. */
1529#define NO_FUNCTION_CSE
1530
1531/* Define this macro if an argument declared as `char' or
1532 `short' in a prototype should actually be passed as an
1533 `int'. In addition to avoiding errors in certain cases of
1534 mismatch, it also makes for better code on certain machines. */
cb560352 1535#define PROMOTE_PROTOTYPES 1
79e68feb
RS
1536
1537/* Define this macro if a float function always returns float
9230dc46 1538 (even in traditional mode). Redefined in luna.h. */
79e68feb
RS
1539#define TRADITIONAL_RETURN_FLOAT
1540
1541/* We assume that the store-condition-codes instructions store 0 for false
1542 and some other value for true. This is the value stored for true. */
37941398 1543#define STORE_FLAG_VALUE (-1)
79e68feb
RS
1544
1545/* Specify the machine mode that pointers have.
1546 After generation of rtl, the compiler makes no further distinction
1547 between pointers and any other objects of this machine mode. */
1548#define Pmode SImode
1549
1550/* A function address in a call instruction
1551 is a word address (for indexing purposes)
1552 so give the MEM rtx word mode. */
1553#define FUNCTION_MODE SImode
1554
c9b26f89 1555/* A barrier will be aligned so account for the possible expansion.
13d39dbc 1556 A volatile load may be preceded by a serializing instruction.
c9b26f89
TW
1557 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1558 Account for block profiling code at basic block boundaries. */
1039fa46
TW
1559#define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1560 if (GET_CODE (RTX) == BARRIER \
1561 || (TARGET_SERIALIZE_VOLATILE \
1562 && GET_CODE (RTX) == INSN \
1563 && GET_CODE (PATTERN (RTX)) == SET \
1564 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
c9b26f89
TW
1565 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1566 LENGTH += 1; \
1567 else if (GET_CODE (RTX) == NOTE \
1568 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1569 { \
1570 if (profile_block_flag) \
1571 LENGTH += FUNCTION_BLOCK_PROFILER_LENGTH; \
1572 if (profile_flag) \
1573 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1574 + REG_POP_LENGTH); \
1575 } \
1576 else if (profile_block_flag \
1577 && (GET_CODE (RTX) == CODE_LABEL \
1578 || GET_CODE (RTX) == JUMP_INSN \
1579 || (GET_CODE (RTX) == INSN \
1580 && GET_CODE (PATTERN (RTX)) == SEQUENCE \
1581 && GET_CODE (XVECEXP (PATTERN (RTX), 0, 0)) == JUMP_INSN)))\
1582 LENGTH += BLOCK_PROFILER_LENGTH;
17c672d7 1583
1039fa46
TW
1584/* Track the state of the last volatile memory reference. Clear the
1585 state with CC_STATUS_INIT for now. */
1586#define CC_STATUS_INIT m88k_volatile_code = '\0'
1587
79e68feb
RS
1588/* Compute the cost of computing a constant rtl expression RTX
1589 whose rtx-code is CODE. The body of this macro is a portion
1590 of a switch statement. If the code is computed here,
1591 return it with a return statement. Otherwise, break from the switch.
1592
1593 We assume that any 16 bit integer can easily be recreated, so we
1594 indicate 0 cost, in an attempt to get GCC not to optimize things
1595 like comparison against a constant.
1596
1597 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1598 is as good as a register; since it can't be placed in any insn, it
1599 won't do anything in cse, but it will cause expand_binop to pass the
1600 constant to the define_expands). */
3bb22aee 1601#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
79e68feb
RS
1602 case CONST_INT: \
1603 if (SMALL_INT (RTX)) \
1604 return 0; \
1605 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1606 return 2; \
1607 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1608 return 4; \
1609 return 7; \
1610 case HIGH: \
1611 return 2; \
1612 case CONST: \
1613 case LABEL_REF: \
1614 case SYMBOL_REF: \
1615 if (flag_pic) \
1616 return (flag_pic == 2) ? 11 : 8; \
1617 return 5; \
1618 case CONST_DOUBLE: \
1619 return 0;
1620
1621/* Provide the costs of an addressing mode that contains ADDR.
de857550 1622 If ADDR is not a valid address, its cost is irrelevant.
79e68feb
RS
1623 REG+REG is made slightly more expensive because it might keep
1624 a register live for longer than we might like. */
1625#define ADDRESS_COST(ADDR) \
1626 (GET_CODE (ADDR) == REG ? 1 : \
1627 GET_CODE (ADDR) == LO_SUM ? 1 : \
1628 GET_CODE (ADDR) == HIGH ? 2 : \
1629 GET_CODE (ADDR) == MULT ? 1 : \
1630 GET_CODE (ADDR) != PLUS ? 4 : \
1631 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1632
1633/* Provide the costs of a rtl expression. This is in the body of a
1634 switch on CODE. */
3bb22aee 1635#define RTX_COSTS(X,CODE,OUTER_CODE) \
79e68feb
RS
1636 case MEM: \
1637 return COSTS_N_INSNS (2); \
1638 case MULT: \
1639 return COSTS_N_INSNS (3); \
1640 case DIV: \
1641 case UDIV: \
1642 case MOD: \
1643 case UMOD: \
1644 return COSTS_N_INSNS (38);
1645
1646/* A C expressions returning the cost of moving data of MODE from a register
1647 to or from memory. This is more costly than between registers. */
cbd5b9a2 1648#define MEMORY_MOVE_COST(MODE,CLASS,IN) 4
79e68feb
RS
1649
1650/* Provide the cost of a branch. Exact meaning under development. */
1651#define BRANCH_COST (TARGET_88100 ? 1 : 2)
1652
5b177046
TW
1653/* A C statement (sans semicolon) to update the integer variable COST
1654 based on the relationship between INSN that is dependent on
1655 DEP_INSN through the dependence LINK. The default is to make no
1656 adjustment to COST. On the m88k, ignore the cost of anti- and
1657 output-dependencies. On the m88100, a store can issue two cycles
1658 before the value (not the address) has finished computing. */
1659#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1660 do { \
1661 if (REG_NOTE_KIND (LINK) != 0) \
1662 (COST) = 0; /* Anti or output dependence. */ \
1663 else if (! TARGET_88100 \
1664 && recog_memoized (INSN) >= 0 \
1665 && get_attr_type (INSN) == TYPE_STORE \
1666 && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \
1667 (COST) -= 4; /* 88110 store reservation station. */ \
1668 } while (0)
1669
79e68feb
RS
1670/* Do not break .stabs pseudos into continuations. */
1671#define DBX_CONTIN_LENGTH 0
1672\f
1673/*** Output of Assembler Code ***/
1674
1675/* Control the assembler format that we output. */
1676
0f1da36e
DE
1677/* A C string constant describing how to begin a comment in the target
1678 assembler language. The compiler assumes that the comment will end at
1679 the end of the line. */
1680#define ASM_COMMENT_START ";"
1681
79e68feb
RS
1682/* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1683#undef INT_ASM_OP
1684#undef ASCII_DATA_ASM_OP
79e68feb
RS
1685#undef CONST_SECTION_ASM_OP
1686#undef CTORS_SECTION_ASM_OP
1687#undef DTORS_SECTION_ASM_OP
74265b1e 1688#undef ASM_OUTPUT_SECTION_NAME
79e68feb
RS
1689#undef INIT_SECTION_ASM_OP
1690#undef FINI_SECTION_ASM_OP
1691#undef TYPE_ASM_OP
1692#undef SIZE_ASM_OP
ea9c2c2a 1693#undef SET_ASM_OP
31c0c8ea
TW
1694#undef SKIP_ASM_OP
1695#undef COMMON_ASM_OP
a0209f48
TW
1696#undef ALIGN_ASM_OP
1697#undef IDENT_ASM_OP
79e68feb
RS
1698
1699/* These are used in varasm.c as well. */
6e7b07a7
HPN
1700#define TEXT_SECTION_ASM_OP "\ttext"
1701#define DATA_SECTION_ASM_OP "\tdata"
79e68feb
RS
1702
1703/* Other sections. */
50eb31b2 1704#define CONST_SECTION_ASM_OP (TARGET_SVR4 \
6e7b07a7
HPN
1705 ? "\tsection\t .rodata,\"a\"" \
1706 : "\tsection\t .rodata,\"x\"")
50eb31b2 1707#define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
6e7b07a7
HPN
1708 ? "\tsection\t .tdesc,\"a\"" \
1709 : "\tsection\t .tdesc,\"x\"")
79e68feb
RS
1710
1711/* These must be constant strings for crtstuff.c. */
6e7b07a7
HPN
1712#define CTORS_SECTION_ASM_OP "\tsection\t .ctors,\"d\""
1713#define DTORS_SECTION_ASM_OP "\tsection\t .dtors,\"d\""
1714#define INIT_SECTION_ASM_OP "\tsection\t .init,\"x\""
1715#define FINI_SECTION_ASM_OP "\tsection\t .fini,\"x\""
79e68feb
RS
1716
1717/* These are pretty much common to all assemblers. */
6e7b07a7
HPN
1718#define IDENT_ASM_OP "\tident\t"
1719#define FILE_ASM_OP "\tfile\t"
1720#define SECTION_ASM_OP "\tsection\t"
1721#define SET_ASM_OP "\tdef\t"
d7cac874 1722#define GLOBAL_ASM_OP "\tglobal\t"
6e7b07a7
HPN
1723#define ALIGN_ASM_OP "\talign\t"
1724#define SKIP_ASM_OP "\tzero\t"
1725#define COMMON_ASM_OP "\tcomm\t"
1726#define BSS_ASM_OP "\tbss\t"
1727#define FLOAT_ASM_OP "\tfloat\t"
1728#define DOUBLE_ASM_OP "\tdouble\t"
1729#define INT_ASM_OP "\tword\t"
79e68feb 1730#define ASM_LONG INT_ASM_OP
6e7b07a7
HPN
1731#define SHORT_ASM_OP "\thalf\t"
1732#define CHAR_ASM_OP "\tbyte\t"
1733#define ASCII_DATA_ASM_OP "\tstring\t"
79e68feb
RS
1734
1735/* These are particular to the global pool optimization. */
6e7b07a7
HPN
1736#define SBSS_ASM_OP "\tsbss\t"
1737#define SCOMM_ASM_OP "\tscomm\t"
1738#define SDATA_SECTION_ASM_OP "\tsdata"
79e68feb
RS
1739
1740/* These are specific to PIC. */
6e7b07a7
HPN
1741#define TYPE_ASM_OP "\ttype\t"
1742#define SIZE_ASM_OP "\tsize\t"
79e68feb
RS
1743#ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1744#undef TYPE_OPERAND_FMT
1745#define TYPE_OPERAND_FMT "#%s"
1746#endif
1747
daefd78b
JM
1748/* This is how we tell the assembler that a symbol is weak. */
1749
1750#undef ASM_WEAKEN_LABEL
1751#define ASM_WEAKEN_LABEL(FILE,NAME) \
1752 do { fputs ("\tweak\t", FILE); assemble_name (FILE, NAME); \
1753 fputc ('\n', FILE); } while (0)
1754
79e68feb 1755/* These are specific to version 03.00 assembler syntax. */
d7cac874 1756#define INTERNAL_ASM_OP "\tlocal\t"
6e7b07a7
HPN
1757#define VERSION_ASM_OP "\tversion\t"
1758#define UNALIGNED_SHORT_ASM_OP "\tuahalf\t"
1759#define UNALIGNED_INT_ASM_OP "\tuaword\t"
1760#define PUSHSECTION_ASM_OP "\tsection\t"
1761#define POPSECTION_ASM_OP "\tprevious"
79e68feb 1762
2ff44f10 1763/* These are specific to the version 04.00 assembler syntax. */
6e7b07a7 1764#define REQUIRES_88110_ASM_OP "\trequires_88110"
2ff44f10 1765
79e68feb
RS
1766/* Output any initial stuff to the assembly file. Always put out
1767 a file directive, even if not debugging.
1768
1769 Immediately after putting out the file, put out a "sem.<value>"
1770 declaration. This should be harmless on other systems, and
de857550 1771 is used in DG/UX by the debuggers to supplement COFF. The
79e68feb
RS
1772 fields in the integer value are as follows:
1773
1774 Bits Value Meaning
1775 ---- ----- -------
1776 0-1 0 No information about stack locations
1777 1 Auto/param locations are based on r30
1778 2 Auto/param locations are based on CFA
1779
1780 3-2 0 No information on dimension order
1781 1 Array dims in sym table matches source language
1782 2 Array dims in sym table is in reverse order
1783
1784 5-4 0 No information about the case of global names
1785 1 Global names appear in the symbol table as in the source
1786 2 Global names have been converted to lower case
1787 3 Global names have been converted to upper case. */
1788
1789#ifdef SDB_DEBUGGING_INFO
1790#define ASM_COFFSEM(FILE) \
1791 if (write_symbols == SDB_DEBUG) \
1792 { \
1793 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1794 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1795 (TARGET_OCS_FRAME_POSITION) \
1796 ? "frame is CFA, normal array dims, case unchanged" \
1797 : "frame is r30, normal array dims, case unchanged"); \
1798 }
1799#else
1800#define ASM_COFFSEM(FILE)
1801#endif
1802
9230dc46 1803/* Output the first line of the assembly file. Redefined in dgux.h. */
79e68feb
RS
1804
1805#define ASM_FIRST_LINE(FILE) \
1806 do { \
50eb31b2
SC
1807 if (TARGET_SVR4) \
1808 { \
1809 if (TARGET_88110) \
016c8440 1810 fprintf (FILE, "%s\"%s\"\n", VERSION_ASM_OP, "04.00"); \
50eb31b2 1811 else \
016c8440 1812 fprintf (FILE, "%s\"%s\"\n", VERSION_ASM_OP, "03.00"); \
50eb31b2 1813 } \
79e68feb
RS
1814 } while (0)
1815
1816/* Override svr[34].h. */
1817#undef ASM_FILE_START
1818#define ASM_FILE_START(FILE) \
e5778b1e
KG
1819 output_file_start (FILE, \
1820 (struct m88k_lang_independent_options *) f_options, \
b6a1cbae 1821 ARRAY_SIZE (f_options), \
e5778b1e 1822 (struct m88k_lang_independent_options *) W_options, \
b6a1cbae 1823 ARRAY_SIZE (W_options))
79e68feb
RS
1824
1825#undef ASM_FILE_END
1826
1827#define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
016c8440 1828 fprintf (FILE, "%s\"%s\"\n", FILE_ASM_OP, NAME)
79e68feb
RS
1829
1830#ifdef SDB_DEBUGGING_INFO
1abe4c83 1831#undef ASM_OUTPUT_SOURCE_LINE
79e68feb
RS
1832#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1833 if (m88k_prologue_done) \
1834 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1835 LINE - sdb_begin_function_line, LINE)
1836#endif
1837
1838/* Code to handle #ident directives. Override svr[34].h definition. */
1839#undef ASM_OUTPUT_IDENT
1840#ifdef DBX_DEBUGGING_INFO
1841#define ASM_OUTPUT_IDENT(FILE, NAME)
1842#else
1843#define ASM_OUTPUT_IDENT(FILE, NAME) \
a9c3f03a 1844 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
79e68feb
RS
1845#endif
1846
1847/* Output to assembler file text saying following lines
1848 may contain character constants, extra white space, comments, etc. */
1849#define ASM_APP_ON ""
1850
1851/* Output to assembler file text saying following lines
1852 no longer contain unusual constructs. */
1853#define ASM_APP_OFF ""
1854
1855/* Format the assembly opcode so that the arguments are all aligned.
1856 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1857 space will do to align the output. Abandon the output if a `%' is
1858 encountered. */
1859#define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1860 { \
1861 int ch; \
e5778b1e 1862 const char *orig_ptr; \
79e68feb
RS
1863 \
1864 for (orig_ptr = (PTR); \
1865 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1866 (PTR)++) \
1867 putc (ch, STREAM); \
1868 \
1869 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1870 putc ('\t', STREAM); \
1871 }
1872
1873/* How to refer to registers in assembler output.
1874 This sequence is indexed by compiler's hard-register-number.
1875 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1876
1877#define REGISTER_NAMES \
1878 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1879 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1880 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
a9c3f03a
TW
1881 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1882 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1883 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1884 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1885 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
79e68feb 1886
b6ecac21
TW
1887/* Define additional names for use in asm clobbers and asm declarations.
1888
1889 We define the fake Condition Code register as an alias for reg 0 (which
1890 is our `condition code' register), so that condition codes can easily
1891 be clobbered by an asm. The carry bit in the PSR is now used. */
1892
e5778b1e 1893#define ADDITIONAL_REGISTER_NAMES {{"psr", 0}, {"cc", 0}}
b6ecac21 1894
79e68feb
RS
1895/* How to renumber registers for dbx and gdb. */
1896#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1897
1898/* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1899#undef DECLARE_ASM_NAME
1900#define DECLARE_ASM_NAME TARGET_SVR4
1901
1902/* Write the extra assembler code needed to declare a function properly. */
1903#undef ASM_DECLARE_FUNCTION_NAME
1904#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1905 do { \
1906 if (DECLARE_ASM_NAME) \
1907 { \
016c8440 1908 fprintf (FILE, "%s", TYPE_ASM_OP); \
79e68feb
RS
1909 assemble_name (FILE, NAME); \
1910 putc (',', FILE); \
1911 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1912 putc ('\n', FILE); \
1913 } \
1914 ASM_OUTPUT_LABEL(FILE, NAME); \
1915 } while (0)
1916
1917/* Write the extra assembler code needed to declare an object properly. */
1918#undef ASM_DECLARE_OBJECT_NAME
92dee628
RS
1919#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1920 do { \
1921 if (DECLARE_ASM_NAME) \
1922 { \
016c8440 1923 fprintf (FILE, "%s", TYPE_ASM_OP); \
92dee628
RS
1924 assemble_name (FILE, NAME); \
1925 putc (',', FILE); \
1926 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1927 putc ('\n', FILE); \
1928 size_directive_output = 0; \
1929 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1930 { \
1931 size_directive_output = 1; \
016c8440 1932 fprintf (FILE, "%s", SIZE_ASM_OP); \
92dee628 1933 assemble_name (FILE, NAME); \
86615a62 1934 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
92dee628
RS
1935 } \
1936 } \
1937 ASM_OUTPUT_LABEL(FILE, NAME); \
79e68feb
RS
1938 } while (0)
1939
92dee628
RS
1940/* Output the size directive for a decl in rest_of_decl_compilation
1941 in the case where we did not do so before the initializer.
1942 Once we find the error_mark_node, we know that the value of
1943 size_directive_output was set
1944 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1945
70b7f9b0 1946#undef ASM_FINISH_DECLARE_OBJECT
92dee628
RS
1947#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1948do { \
e5778b1e 1949 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
92dee628 1950 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
13832d15 1951 && DECLARE_ASM_NAME \
92dee628
RS
1952 && ! AT_END && TOP_LEVEL \
1953 && DECL_INITIAL (DECL) == error_mark_node \
1954 && !size_directive_output) \
1955 { \
8b2e2b2f 1956 size_directive_output = 1; \
016c8440 1957 fprintf (FILE, "%s", SIZE_ASM_OP); \
92dee628
RS
1958 assemble_name (FILE, name); \
1959 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1960 } \
1961 } while (0)
1962
79e68feb
RS
1963/* This is how to declare the size of a function. */
1964#undef ASM_DECLARE_FUNCTION_SIZE
1965#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
1966 do { \
1967 if (DECLARE_ASM_NAME) \
1968 { \
1969 if (!flag_inhibit_size_directive) \
1970 { \
1971 char label[256]; \
e6e1cf4c 1972 static int labelno = 0; \
79e68feb
RS
1973 labelno++; \
1974 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
1975 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
016c8440 1976 fprintf (FILE, "%s", SIZE_ASM_OP); \
79e68feb
RS
1977 assemble_name (FILE, (FNAME)); \
1978 fprintf (FILE, ",%s-", &label[1]); \
1979 assemble_name (FILE, (FNAME)); \
1980 putc ('\n', FILE); \
1981 } \
1982 } \
1983 } while (0)
1984
1985/* This is how to output the definition of a user-level label named NAME,
1986 such as the label on a static function or variable NAME. */
1987#define ASM_OUTPUT_LABEL(FILE,NAME) \
1988 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1989
1990/* This is how to output a command to make the user-level label named NAME
1991 defined for reference from other files. */
1992#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1993 do { \
016c8440 1994 fprintf (FILE, "%s", GLOBAL_ASM_OP); \
79e68feb
RS
1995 assemble_name (FILE, NAME); \
1996 putc ('\n', FILE); \
1997 } while (0)
1998
3cc7f838
RK
1999/* The prefix to add to user-visible assembler symbols.
2000 Override svr[34].h. */
2001#undef USER_LABEL_PREFIX
2002#define USER_LABEL_PREFIX "_"
2003
79e68feb
RS
2004/* This is how to output a reference to a user-level label named NAME.
2005 Override svr[34].h. */
2006#undef ASM_OUTPUT_LABELREF
2007#define ASM_OUTPUT_LABELREF(FILE,NAME) \
2008 { \
50eb31b2 2009 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
79e68feb
RS
2010 fputc ('_', FILE); \
2011 fputs (NAME, FILE); \
2012 }
2013
2014/* This is how to output an internal numbered label where
2015 PREFIX is the class of label and NUM is the number within the class.
2016 For V.4, labels use `.' rather than `@'. */
2017
31c0c8ea 2018#undef ASM_OUTPUT_INTERNAL_LABEL
79e68feb
RS
2019#ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
2020#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
016c8440 2021 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n%s.%s%d\n" : "@%s%d:\n", \
79e68feb
RS
2022 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
2023#else
2024#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
50eb31b2 2025 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
79e68feb
RS
2026#endif /* AS_BUG_DOT_LABELS */
2027
2028/* This is how to store into the string LABEL
2029 the symbol_ref name of an internal numbered label where
2030 PREFIX is the class of label and NUM is the number within the class.
2031 This is suitable for output with `assemble_name'. This must agree
2032 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
2033 with an `*'. */
2034
31c0c8ea 2035#undef ASM_GENERATE_INTERNAL_LABEL
79e68feb 2036#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
50eb31b2 2037 sprintf (LABEL, TARGET_SVR4 ? "*.%s%d" : "*@%s%d", PREFIX, NUM)
79e68feb
RS
2038
2039/* Internal macro to get a single precision floating point value into
9ec36da5 2040 an int, so we can print its value in hex. */
79e68feb
RS
2041#define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \
2042 { union { \
2043 REAL_VALUE_TYPE d; \
2044 struct { \
2045 unsigned sign : 1; \
2046 unsigned exponent1 : 1; \
2047 unsigned exponent2 : 3; \
2048 unsigned exponent3 : 7; \
2049 unsigned mantissa1 : 20; \
2050 unsigned mantissa2 : 3; \
2051 unsigned mantissa3 : 29; \
2052 } s; \
2053 } _u; \
2054 \
2055 union { \
2056 int i; \
2057 struct { \
2058 unsigned sign : 1; \
2059 unsigned exponent1 : 1; \
2060 unsigned exponent3 : 7; \
2061 unsigned mantissa1 : 20; \
2062 unsigned mantissa2 : 3; \
2063 } s; \
2064 } _u2; \
2065 \
2066 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \
2067 _u2.s.sign = _u.s.sign; \
2068 _u2.s.exponent1 = _u.s.exponent1; \
2069 _u2.s.exponent3 = _u.s.exponent3; \
2070 _u2.s.mantissa1 = _u.s.mantissa1; \
2071 _u2.s.mantissa2 = _u.s.mantissa2; \
2072 IVALUE = _u2.i; \
2073 }
2074
2075/* This is how to output an assembler line defining a `double' constant.
2076 Use "word" pseudos to avoid printing NaNs, infinity, etc. */
2077#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2078 do { \
2079 union { REAL_VALUE_TYPE d; long l[2]; } x; \
2080 x.d = (VALUE); \
016c8440 2081 fprintf (FILE, "%s0x%.8lx, 0x%.8lx\n", INT_ASM_OP, \
e5778b1e 2082 (long) x.l[0], (long) x.l[1]); \
79e68feb
RS
2083 } while (0)
2084
2085/* This is how to output an assembler line defining a `float' constant. */
2086#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2087 do { \
2088 int i; \
2089 FLOAT_TO_INT_INTERNAL (VALUE, i); \
016c8440 2090 fprintf (FILE, "%s0x%.8x\n", INT_ASM_OP, i); \
79e68feb
RS
2091 } while (0)
2092
2093/* Likewise for `int', `short', and `char' constants. */
2094#define ASM_OUTPUT_INT(FILE,VALUE) \
016c8440 2095( fprintf (FILE, "%s", INT_ASM_OP), \
79e68feb
RS
2096 output_addr_const (FILE, (VALUE)), \
2097 fprintf (FILE, "\n"))
2098
2099#define ASM_OUTPUT_SHORT(FILE,VALUE) \
016c8440 2100( fprintf (FILE, "%s", SHORT_ASM_OP), \
79e68feb
RS
2101 output_addr_const (FILE, (VALUE)), \
2102 fprintf (FILE, "\n"))
2103
2104#define ASM_OUTPUT_CHAR(FILE,VALUE) \
016c8440 2105( fprintf (FILE, "%s", CHAR_ASM_OP), \
79e68feb
RS
2106 output_addr_const (FILE, (VALUE)), \
2107 fprintf (FILE, "\n"))
2108
2109/* This is how to output an assembler line for a numeric constant byte. */
2110#define ASM_OUTPUT_BYTE(FILE,VALUE) \
016c8440 2111 fprintf (FILE, "%s0x%x\n", CHAR_ASM_OP, (VALUE))
79e68feb 2112
668681ef 2113/* The single-byte pseudo-op is the default. Override svr[34].h. */
79e68feb 2114#undef ASM_BYTE_OP
6e7b07a7 2115#define ASM_BYTE_OP "\tbyte\t"
79e68feb
RS
2116#undef ASM_OUTPUT_ASCII
2117#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
a9c3f03a 2118 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
79e68feb 2119
0d53ee39
TW
2120/* Override svr4.h. Change to the readonly data section for a table of
2121 addresses. final_scan_insn changes back to the text section. */
a0209f48 2122#undef ASM_OUTPUT_CASE_LABEL
0d53ee39
TW
2123#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
2124 do { \
2125 if (! CASE_VECTOR_INSNS) \
2c39ec40
TW
2126 { \
2127 readonly_data_section (); \
2128 ASM_OUTPUT_ALIGN (FILE, 2); \
2129 } \
0d53ee39
TW
2130 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
2131 } while (0)
a0209f48 2132
79e68feb
RS
2133/* Epilogue for case labels. This jump instruction is called by casesi
2134 to transfer to the appropriate branch instruction within the table.
2135 The label `@L<n>e' is coined to mark the end of the table. */
2136#define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
2137 do { \
668681ef
TW
2138 if (CASE_VECTOR_INSNS) \
2139 { \
2140 char label[256]; \
2141 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
2142 fprintf (FILE, "%se:\n", &label[1]); \
2143 if (! flag_delayed_branch) \
2144 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
2145 reg_names[1], reg_names[m88k_case_index]); \
2146 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
2147 } \
79e68feb
RS
2148 } while (0)
2149
2150/* This is how to output an element of a case-vector that is absolute. */
2151#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2152 do { \
2153 char buffer[256]; \
2154 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
668681ef
TW
2155 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2156 &buffer[1]); \
79e68feb
RS
2157 } while (0)
2158
2159/* This is how to output an element of a case-vector that is relative. */
33f7f353 2160#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
79e68feb
RS
2161 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2162
2163/* This is how to output an assembler line
2164 that says to advance the location counter
2165 to a multiple of 2**LOG bytes. */
2166#define ASM_OUTPUT_ALIGN(FILE,LOG) \
2167 if ((LOG) != 0) \
016c8440 2168 fprintf (FILE, "%s%d\n", ALIGN_ASM_OP, 1<<(LOG))
79e68feb 2169
7ddb6885
TW
2170/* On the m88100, align the text address to half a cache boundary when it
2171 can only be reached by jumping. Pack code tightly when compiling
2172 crtstuff.c. */
fc470718
R
2173#define LABEL_ALIGN_AFTER_BARRIER(LABEL) \
2174 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2)
79e68feb
RS
2175
2176/* Override svr[34].h. */
2177#undef ASM_OUTPUT_SKIP
2178#define ASM_OUTPUT_SKIP(FILE,SIZE) \
016c8440 2179 fprintf (FILE, "%s%u\n", SKIP_ASM_OP, (SIZE))
79e68feb
RS
2180
2181/* Override svr4.h. */
2182#undef ASM_OUTPUT_EXTERNAL_LIBCALL
2183
2184/* This says how to output an assembler line to define a global common
2185 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2186 Override svr[34].h. */
2187#undef ASM_OUTPUT_COMMON
2188#undef ASM_OUTPUT_ALIGNED_COMMON
2189#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
016c8440 2190( fprintf ((FILE), "%s", \
de857550 2191 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
79e68feb
RS
2192 assemble_name ((FILE), (NAME)), \
2193 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2194
de857550 2195/* This says how to output an assembler line to define a local common
79e68feb
RS
2196 symbol. Override svr[34].h. */
2197#undef ASM_OUTPUT_LOCAL
2198#undef ASM_OUTPUT_ALIGNED_LOCAL
2199#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
016c8440 2200( fprintf ((FILE), "%s", \
31c0c8ea 2201 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
79e68feb
RS
2202 assemble_name ((FILE), (NAME)), \
2203 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2204
2205/* Store in OUTPUT a string (made with alloca) containing
2206 an assembler-name for a local static variable named NAME.
2207 LABELNO is an integer which is different for each call. */
2208#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2209( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2210 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2211
2212/* This is how to output an insn to push a register on the stack.
2213 It need not be very fast code. */
2214#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2215 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2216 reg_names[STACK_POINTER_REGNUM], \
2217 reg_names[STACK_POINTER_REGNUM], \
2218 (STACK_BOUNDARY / BITS_PER_UNIT), \
2219 reg_names[REGNO], \
2220 reg_names[STACK_POINTER_REGNUM])
2221
c9b26f89
TW
2222/* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2223#define REG_PUSH_LENGTH 2
2224
79e68feb
RS
2225/* This is how to output an insn to pop a register from the stack. */
2226#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2227 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2228 reg_names[REGNO], \
2229 reg_names[STACK_POINTER_REGNUM], \
2230 reg_names[STACK_POINTER_REGNUM], \
2231 reg_names[STACK_POINTER_REGNUM], \
2232 (STACK_BOUNDARY / BITS_PER_UNIT))
2233
c9b26f89
TW
2234/* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2235#define REG_POP_LENGTH 2
2236
79e68feb
RS
2237/* Define the parentheses used to group arithmetic operations
2238 in assembler code. */
2239#define ASM_OPEN_PAREN "("
2240#define ASM_CLOSE_PAREN ")"
2241
2242/* Define results of standard character escape sequences. */
2243#define TARGET_BELL 007
2244#define TARGET_BS 010
2245#define TARGET_TAB 011
2246#define TARGET_NEWLINE 012
2247#define TARGET_VT 013
2248#define TARGET_FF 014
2249#define TARGET_CR 015
2250\f
2251/* Macros to deal with OCS debug information */
2252
2253#define OCS_START_PREFIX "Ltb"
2254#define OCS_END_PREFIX "Lte"
2255
2256#define PUT_OCS_FUNCTION_START(FILE) \
2257 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2258
2259#define PUT_OCS_FUNCTION_END(FILE) \
2260 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2261
2262/* Macros for debug information */
2263#define DEBUGGER_AUTO_OFFSET(X) \
2264 (m88k_debugger_offset (X, 0) \
2265 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2266
2267#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2268 (m88k_debugger_offset (X, OFFSET) \
2269 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2270
2271/* Macros to deal with SDB debug information */
2272#ifdef SDB_DEBUGGING_INFO
2273
2274/* Output structure tag names even when it causes a forward reference. */
2275#define SDB_ALLOW_FORWARD_REFERENCES
2276
2277/* Print out extra debug information in the assembler file */
2278#define PUT_SDB_SCL(a) \
2279 do { \
2280 register int s = (a); \
e5778b1e 2281 register const char *scl; \
79e68feb
RS
2282 switch (s) \
2283 { \
2284 case C_EFCN: scl = "end of function"; break; \
2285 case C_NULL: scl = "NULL storage class"; break; \
2286 case C_AUTO: scl = "automatic"; break; \
2287 case C_EXT: scl = "external"; break; \
2288 case C_STAT: scl = "static"; break; \
2289 case C_REG: scl = "register"; break; \
2290 case C_EXTDEF: scl = "external definition"; break; \
2291 case C_LABEL: scl = "label"; break; \
2292 case C_ULABEL: scl = "undefined label"; break; \
2293 case C_MOS: scl = "structure member"; break; \
2294 case C_ARG: scl = "argument"; break; \
2295 case C_STRTAG: scl = "structure tag"; break; \
2296 case C_MOU: scl = "union member"; break; \
2297 case C_UNTAG: scl = "union tag"; break; \
2298 case C_TPDEF: scl = "typedef"; break; \
2299 case C_USTATIC: scl = "uninitialized static"; break; \
2300 case C_ENTAG: scl = "enumeration tag"; break; \
2301 case C_MOE: scl = "member of enumeration"; break; \
2302 case C_REGPARM: scl = "register parameter"; break; \
2303 case C_FIELD: scl = "bit field"; break; \
2304 case C_BLOCK: scl = "block start/end"; break; \
2305 case C_FCN: scl = "function start/end"; break; \
2306 case C_EOS: scl = "end of structure"; break; \
2307 case C_FILE: scl = "filename"; break; \
2308 case C_LINE: scl = "line"; break; \
2309 case C_ALIAS: scl = "duplicated tag"; break; \
2310 case C_HIDDEN: scl = "hidden"; break; \
2311 default: scl = "unknown"; break; \
2312 } \
2313 \
2314 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2315 } while (0)
2316
2317#define PUT_SDB_TYPE(a) \
2318 do { \
2319 register int t = (a); \
2320 static char buffer[100]; \
e5778b1e
KG
2321 register char *p = buffer; \
2322 register const char *q; \
79e68feb 2323 register int typ = t; \
e5778b1e 2324 register int i; \
79e68feb
RS
2325 \
2326 for (i = 0; i <= 5; i++) \
2327 { \
2328 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2329 { \
2330 case DT_PTR: \
2331 strcpy (p, "ptr to "); \
2332 p += sizeof("ptr to"); \
2333 break; \
2334 \
2335 case DT_ARY: \
2336 strcpy (p, "array of "); \
2337 p += sizeof("array of"); \
2338 break; \
2339 \
2340 case DT_FCN: \
2341 strcpy (p, "func ret "); \
2342 p += sizeof("func ret"); \
2343 break; \
2344 } \
2345 } \
2346 \
2347 switch (typ & N_BTMASK) \
2348 { \
2349 case T_NULL: q = "<no type>"; break; \
2350 case T_CHAR: q = "char"; break; \
2351 case T_SHORT: q = "short"; break; \
2352 case T_INT: q = "int"; break; \
2353 case T_LONG: q = "long"; break; \
2354 case T_FLOAT: q = "float"; break; \
2355 case T_DOUBLE: q = "double"; break; \
2356 case T_STRUCT: q = "struct"; break; \
2357 case T_UNION: q = "union"; break; \
2358 case T_ENUM: q = "enum"; break; \
2359 case T_MOE: q = "enum member"; break; \
2360 case T_UCHAR: q = "unsigned char"; break; \
2361 case T_USHORT: q = "unsigned short"; break; \
2362 case T_UINT: q = "unsigned int"; break; \
2363 case T_ULONG: q = "unsigned long"; break; \
2364 default: q = "void"; break; \
2365 } \
2366 \
2367 strcpy (p, q); \
2368 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2369 t, buffer); \
2370 } while (0)
2371
2372#define PUT_SDB_INT_VAL(a) \
2373 fprintf (asm_out_file, "\tval\t %d\n", (a))
2374
2375#define PUT_SDB_VAL(a) \
2376( fprintf (asm_out_file, "\tval\t "), \
2377 output_addr_const (asm_out_file, (a)), \
2378 fputc ('\n', asm_out_file))
2379
2380#define PUT_SDB_DEF(a) \
2381 do { fprintf (asm_out_file, "\tsdef\t "); \
2382 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2383 fputc ('\n', asm_out_file); \
2384 } while (0)
2385
2386#define PUT_SDB_PLAIN_DEF(a) \
2387 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2388
2389/* Simply and endef now. */
2390#define PUT_SDB_ENDEF \
2391 fputs("\tendef\n\n", asm_out_file)
2392
2393#define PUT_SDB_SIZE(a) \
2394 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2395
2396/* Max dimensions to store for debug information (limited by COFF). */
2397#define SDB_MAX_DIM 6
2398
2399/* New method for dim operations. */
2400#define PUT_SDB_START_DIM \
2401 fputs("\tdim\t ", asm_out_file)
2402
2403/* How to end the DIM sequence. */
2404#define PUT_SDB_LAST_DIM(a) \
2405 fprintf(asm_out_file, "%d\n", a)
2406
2407#define PUT_SDB_TAG(a) \
2408 do { \
2409 fprintf (asm_out_file, "\ttag\t "); \
2410 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2411 fputc ('\n', asm_out_file); \
2412 } while( 0 )
2413
2414#define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2415 do { \
2416 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2417 NAME); \
2418 PUT_SDB_SCL( SCL ); \
2419 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2420 (LINE)); \
2421 } while (0)
2422
2423#define PUT_SDB_BLOCK_START(LINE) \
2424 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2425
2426#define PUT_SDB_BLOCK_END(LINE) \
2427 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2428
2429#define PUT_SDB_FUNCTION_START(LINE) \
2430 do { \
2431 fprintf (asm_out_file, "\tln\t 1\n"); \
2432 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2433 } while (0)
2434
2435#define PUT_SDB_FUNCTION_END(LINE) \
2436 do { \
2437 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2438 } while (0)
2439
2440#define PUT_SDB_EPILOGUE_END(NAME) \
2441 do { \
2442 text_section (); \
2443 fprintf (asm_out_file, "\n\tsdef\t "); \
2444 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2445 fputc('\n', asm_out_file); \
2446 PUT_SDB_SCL( C_EFCN ); \
2447 fprintf (asm_out_file, "\tendef\n\n"); \
2448 } while (0)
2449
2450#define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2451 sprintf ((BUFFER), ".%dfake", (NUMBER));
2452
2453#endif /* SDB_DEBUGGING_INFO */
2454\f
2455/* Support const and tdesc sections. Generally, a const section will
2456 be distinct from the text section whenever we do V.4-like things
2457 and so follows DECLARE_ASM_NAME. Note that strings go in text
2458 rather than const. Override svr[34].h. */
2459
2460#undef USE_CONST_SECTION
2461#undef EXTRA_SECTIONS
2462
2463#define USE_CONST_SECTION DECLARE_ASM_NAME
2464
3623e712 2465#if defined(USING_SVR4_H)
79e68feb
RS
2466
2467#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors
2468#define INIT_SECTION_FUNCTION
2469#define FINI_SECTION_FUNCTION
2470
1039fa46
TW
2471#else
2472#if defined(USING_SVR3_H)
79e68feb 2473
f63ce4f8
TW
2474#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \
2475 in_init, in_fini
79e68feb 2476
9230dc46 2477#else /* luna or other not based on svr[34].h. */
79e68feb 2478
17c672d7 2479#undef INIT_SECTION_ASM_OP
79e68feb
RS
2480#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2481#define CONST_SECTION_FUNCTION \
2482void \
2483const_section () \
2484{ \
2485 text_section(); \
2486}
2487#define CTORS_SECTION_FUNCTION
2488#define DTORS_SECTION_FUNCTION
2489#define INIT_SECTION_FUNCTION
2490#define FINI_SECTION_FUNCTION
2491
1039fa46 2492#endif /* USING_SVR3_H */
d034f929 2493#endif /* USING_SVR4_H */
79e68feb
RS
2494
2495#undef EXTRA_SECTION_FUNCTIONS
2496#define EXTRA_SECTION_FUNCTIONS \
2497 CONST_SECTION_FUNCTION \
2498 \
2499void \
2500tdesc_section () \
2501{ \
2502 if (in_section != in_tdesc) \
2503 { \
2504 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2505 in_section = in_tdesc; \
2506 } \
2507} \
2508 \
2509void \
2510sdata_section () \
2511{ \
2512 if (in_section != in_sdata) \
2513 { \
2514 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2515 in_section = in_sdata; \
2516 } \
2517} \
2518 \
2519 CTORS_SECTION_FUNCTION \
2520 DTORS_SECTION_FUNCTION \
2521 INIT_SECTION_FUNCTION \
2522 FINI_SECTION_FUNCTION
2523
79e68feb
RS
2524/* A C statement or statements to switch to the appropriate
2525 section for output of DECL. DECL is either a `VAR_DECL' node
2526 or a constant of some sort. RELOC indicates whether forming
2527 the initial value of DECL requires link-time relocations.
2528
2529 For strings, the section is selected before the segment info is encoded. */
2530#undef SELECT_SECTION
2531#define SELECT_SECTION(DECL,RELOC) \
2532{ \
2533 if (TREE_CODE (DECL) == STRING_CST) \
2534 { \
2535 if (! flag_writable_strings) \
2536 const_section (); \
50eb31b2 2537 else if ( TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
79e68feb
RS
2538 sdata_section (); \
2539 else \
2540 data_section (); \
2541 } \
2542 else if (TREE_CODE (DECL) == VAR_DECL) \
2543 { \
2544 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \
2545 sdata_section (); \
2546 else if ((flag_pic && RELOC) \
ed8969fa
JW
2547 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \
2548 || !DECL_INITIAL (DECL) \
2549 || (DECL_INITIAL (DECL) != error_mark_node \
2550 && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \
79e68feb
RS
2551 data_section (); \
2552 else \
2553 const_section (); \
2554 } \
2555 else \
2556 const_section (); \
2557}
2558
0d53ee39
TW
2559/* Jump tables consist of branch instructions and should be output in
2560 the text section. When we use a table of addresses, we explicitly
2561 change to the readonly data section. */
2562#define JUMP_TABLES_IN_TEXT_SECTION 1
2563
79e68feb
RS
2564/* Define this macro if references to a symbol must be treated differently
2565 depending on something about the variable or function named by the
2566 symbol (such as what section it is in).
2567
2568 The macro definition, if any, is executed immediately after the rtl for
2569 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2570 rtl will be a `mem' whose address is a `symbol_ref'.
2571
2572 For the m88k, determine if the item should go in the global pool. */
2573#define ENCODE_SECTION_INFO(DECL) \
2574 do { \
2575 if (m88k_gp_threshold > 0) \
e5778b1e 2576 { \
79e68feb
RS
2577 if (TREE_CODE (DECL) == VAR_DECL) \
2578 { \
2579 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2580 { \
2581 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2582 \
2583 if (size > 0 && size <= m88k_gp_threshold) \
2584 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2585 } \
2586 } \
2587 else if (TREE_CODE (DECL) == STRING_CST \
2588 && flag_writable_strings \
2589 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2590 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
e5778b1e 2591 } \
79e68feb
RS
2592 } while (0)
2593\f
2594/* Print operand X (an rtx) in assembler syntax to file FILE.
2595 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2596 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2597#define PRINT_OPERAND_PUNCT_VALID_P(c) \
2598 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2599
2600#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2601
2602/* Print a memory address as an operand to reference that memory location. */
2603#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
50eb31b2
SC
2604
2605/* This says not to strength reduce the addr calculations within loops
2606 (otherwise it does not take advantage of m88k scaled loads and stores */
2607
2608#define DONT_REDUCE_ADDR
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