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3d339ad2 | 1 | /* Definitions of target machine for GNU compiler. Sun 68000/68020 version. |
8dbda09a | 2 | Copyright (C) 1987, 1988, 1993, 1994, 1995 Free Software Foundation, Inc. |
25a1b918 | 3 | |
3d339ad2 RS |
4 | This file is part of GNU CC. |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Note that some other tm.h files include this one and then override | |
22 | many of the definitions that relate to assembler syntax. */ | |
23 | ||
24 | ||
25 | /* Names to predefine in the preprocessor for this target machine. */ | |
26 | ||
27 | /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */ | |
28 | ||
29 | /* Print subsidiary information on the compiler version in use. */ | |
30 | #ifdef MOTOROLA | |
31 | #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)"); | |
32 | #else | |
33 | #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)"); | |
34 | #endif | |
35 | ||
36 | /* Define SUPPORT_SUN_FPA to include support for generating code for | |
37 | the Sun Floating Point Accelerator, an optional product for Sun 3 | |
38 | machines. By default, it is not defined. Avoid defining it unless | |
39 | you need to output code for the Sun3+FPA architecture, as it has the | |
40 | effect of slowing down the register set operations in hard-reg-set.h | |
41 | (total number of registers will exceed number of bits in a long, | |
42 | if defined, causing the set operations to expand to loops). | |
43 | SUPPORT_SUN_FPA is typically defined in sun3.h. */ | |
44 | ||
45 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
46 | ||
47 | extern int target_flags; | |
48 | ||
49 | /* Macros used in the machine description to test the flags. */ | |
50 | ||
51 | /* Compile for a 68020 (not a 68000 or 68010). */ | |
52 | #define TARGET_68020 (target_flags & 1) | |
53 | ||
54 | /* Compile 68881 insns for floating point (not library calls). */ | |
55 | #define TARGET_68881 (target_flags & 2) | |
56 | ||
57 | /* Compile using 68020 bitfield insns. */ | |
58 | #define TARGET_BITFIELD (target_flags & 4) | |
59 | ||
60 | /* Compile using rtd insn calling sequence. | |
61 | This will not work unless you use prototypes at least | |
62 | for all functions that can take varying numbers of args. */ | |
63 | #define TARGET_RTD (target_flags & 8) | |
64 | ||
65 | /* Compile passing first two args in regs 0 and 1. | |
66 | This exists only to test compiler features that will | |
67 | be needed for RISC chips. It is not usable | |
68 | and is not intended to be usable on this cpu. */ | |
69 | #define TARGET_REGPARM (target_flags & 020) | |
70 | ||
71 | /* Compile with 16-bit `int'. */ | |
72 | #define TARGET_SHORT (target_flags & 040) | |
73 | ||
74 | /* Compile with special insns for Sun FPA. */ | |
75 | #ifdef SUPPORT_SUN_FPA | |
76 | #define TARGET_FPA (target_flags & 0100) | |
77 | #else | |
78 | #define TARGET_FPA 0 | |
79 | #endif | |
80 | ||
81 | /* Compile (actually, link) for Sun SKY board. */ | |
82 | #define TARGET_SKY (target_flags & 0200) | |
83 | ||
b4281273 RS |
84 | /* Optimize for 68040, but still allow execution on 68020 |
85 | (-m68020-40 or -m68040). | |
b4ac57ab | 86 | The 68040 will execute all 68030 and 68881/2 instructions, but some |
3d339ad2 RS |
87 | of them must be emulated in software by the OS. When TARGET_68040 is |
88 | turned on, these instructions won't be used. This code will still | |
89 | run on a 68030 and 68881/2. */ | |
b4281273 | 90 | #define TARGET_68040 (target_flags & 01400) |
3d339ad2 | 91 | |
b4281273 | 92 | /* Use the 68040-only fp instructions (-m68040). */ |
3d339ad2 RS |
93 | #define TARGET_68040_ONLY (target_flags & 01000) |
94 | ||
95 | /* Macro to define tables used to set the flags. | |
96 | This is a list in braces of pairs in braces, | |
97 | each pair being { "NAME", VALUE } | |
98 | where VALUE is the bits to set or minus the bits to clear. | |
99 | An empty string NAME is used to identify the default VALUE. */ | |
100 | ||
101 | #define TARGET_SWITCHES \ | |
50661623 RS |
102 | { { "68020", -01400}, \ |
103 | { "c68020", -01400}, \ | |
104 | { "68020", 5}, \ | |
3d339ad2 RS |
105 | { "c68020", 5}, \ |
106 | { "68881", 2}, \ | |
107 | { "bitfield", 4}, \ | |
50661623 RS |
108 | { "68000", -01405}, \ |
109 | { "c68000", -01405}, \ | |
110 | { "soft-float", -01102}, \ | |
3d339ad2 RS |
111 | { "nobitfield", -4}, \ |
112 | { "rtd", 8}, \ | |
113 | { "nortd", -8}, \ | |
114 | { "short", 040}, \ | |
115 | { "noshort", -040}, \ | |
116 | { "fpa", 0100}, \ | |
117 | { "nofpa", -0100}, \ | |
118 | { "sky", 0200}, \ | |
119 | { "nosky", -0200}, \ | |
50661623 | 120 | { "68020-40", 0407}, \ |
3d339ad2 | 121 | { "68030", -01400}, \ |
669b6587 | 122 | { "68030", 5}, \ |
50661623 | 123 | { "68040", 01007}, \ |
0e91606a JW |
124 | { "68851", 0}, /* Affects *_SPEC and/or GAS. */ \ |
125 | { "no-68851", 0}, /* Affects *_SPEC and/or GAS. */ \ | |
126 | { "68302", 0}, /* Affects *_SPEC and/or GAS. */ \ | |
127 | { "no-68302", 0}, /* Affects *_SPEC and/or GAS. */ \ | |
128 | { "68332", 0}, /* Affects *_SPEC and/or GAS. */ \ | |
129 | { "no-68332", 0}, /* Affects *_SPEC and/or GAS. */ \ | |
84ab3bfb | 130 | SUBTARGET_SWITCHES \ |
3d339ad2 RS |
131 | { "", TARGET_DEFAULT}} |
132 | /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */ | |
882ed710 | 133 | |
84ab3bfb JW |
134 | /* This is meant to be redefined in the host dependent files */ |
135 | #define SUBTARGET_SWITCHES | |
136 | ||
3d339ad2 RS |
137 | #ifdef SUPPORT_SUN_FPA |
138 | /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear | |
139 | any bits in TARGET_SWITCHES above) */ | |
140 | #define OVERRIDE_OPTIONS \ | |
141 | { \ | |
142 | if (TARGET_FPA) target_flags &= ~2; \ | |
143 | if (! TARGET_68020 && flag_pic == 2) \ | |
144 | error("-fPIC is not currently supported on the 68000 or 68010\n"); \ | |
cf9be6f0 | 145 | SUBTARGET_OVERRIDE_OPTIONS; \ |
3d339ad2 RS |
146 | } |
147 | #else | |
148 | #define OVERRIDE_OPTIONS \ | |
149 | { \ | |
150 | if (! TARGET_68020 && flag_pic == 2) \ | |
151 | error("-fPIC is not currently supported on the 68000 or 68010\n"); \ | |
cf9be6f0 | 152 | SUBTARGET_OVERRIDE_OPTIONS; \ |
3d339ad2 RS |
153 | } |
154 | #endif /* defined SUPPORT_SUN_FPA */ | |
84ab3bfb JW |
155 | |
156 | /* This is meant to be redefined in the host dependent files */ | |
157 | #define SUBTARGET_OVERRIDE_OPTIONS | |
3d339ad2 RS |
158 | \f |
159 | /* target machine storage layout */ | |
160 | ||
f6ba6a91 RS |
161 | /* Define for XFmode extended real floating point support. |
162 | This will automatically cause REAL_ARITHMETIC to be defined. */ | |
163 | #define LONG_DOUBLE_TYPE_SIZE 96 | |
164 | ||
165 | /* Define if you don't want extended real, but do want to use the | |
166 | software floating point emulator for REAL_ARITHMETIC and | |
167 | decimal <-> binary conversion. */ | |
168 | /* #define REAL_ARITHMETIC */ | |
169 | ||
3d339ad2 RS |
170 | /* Define this if most significant bit is lowest numbered |
171 | in instructions that operate on numbered bit-fields. | |
172 | This is true for 68020 insns such as bfins and bfexts. | |
173 | We make it true always by avoiding using the single-bit insns | |
174 | except in special cases with constant bit numbers. */ | |
175 | #define BITS_BIG_ENDIAN 1 | |
176 | ||
177 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
178 | /* That is true on the 68000. */ | |
179 | #define BYTES_BIG_ENDIAN 1 | |
180 | ||
181 | /* Define this if most significant word of a multiword number is the lowest | |
182 | numbered. */ | |
183 | /* For 68000 we can decide arbitrarily | |
184 | since there are no machine instructions for them. | |
185 | So let's be consistent. */ | |
186 | #define WORDS_BIG_ENDIAN 1 | |
187 | ||
b4ac57ab | 188 | /* number of bits in an addressable storage unit */ |
3d339ad2 RS |
189 | #define BITS_PER_UNIT 8 |
190 | ||
191 | /* Width in bits of a "word", which is the contents of a machine register. | |
192 | Note that this is not necessarily the width of data type `int'; | |
193 | if using 16-bit ints on a 68000, this would still be 32. | |
194 | But on a machine with 16-bit registers, this would be 16. */ | |
195 | #define BITS_PER_WORD 32 | |
196 | ||
197 | /* Width of a word, in units (bytes). */ | |
198 | #define UNITS_PER_WORD 4 | |
199 | ||
200 | /* Width in bits of a pointer. | |
201 | See also the macro `Pmode' defined below. */ | |
202 | #define POINTER_SIZE 32 | |
203 | ||
204 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
205 | #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32) | |
206 | ||
207 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
208 | #define STACK_BOUNDARY 16 | |
209 | ||
210 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
211 | #define FUNCTION_BOUNDARY 16 | |
212 | ||
213 | /* Alignment of field after `int : 0' in a structure. */ | |
214 | #define EMPTY_FIELD_BOUNDARY 16 | |
215 | ||
216 | /* No data type wants to be aligned rounder than this. */ | |
217 | #define BIGGEST_ALIGNMENT 16 | |
218 | ||
b4ac57ab | 219 | /* Set this nonzero if move instructions will actually fail to work |
3d339ad2 | 220 | when given unaligned data. */ |
b4ac57ab | 221 | #define STRICT_ALIGNMENT 1 |
3d339ad2 RS |
222 | |
223 | #define SELECT_RTX_SECTION(MODE, X) \ | |
224 | { \ | |
225 | if (!flag_pic) \ | |
226 | readonly_data_section(); \ | |
227 | else if (LEGITIMATE_PIC_OPERAND_P (X)) \ | |
228 | readonly_data_section(); \ | |
229 | else \ | |
230 | data_section(); \ | |
231 | } | |
232 | ||
233 | /* Define number of bits in most basic integer type. | |
234 | (If undefined, default is BITS_PER_WORD). */ | |
235 | ||
236 | #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32) | |
237 | ||
238 | /* Define these to avoid dependence on meaning of `int'. | |
239 | Note that WCHAR_TYPE_SIZE is used in cexp.y, | |
240 | where TARGET_SHORT is not available. */ | |
241 | ||
242 | #define WCHAR_TYPE "long int" | |
243 | #define WCHAR_TYPE_SIZE 32 | |
244 | \f | |
245 | /* Standard register usage. */ | |
246 | ||
247 | /* Number of actual hardware registers. | |
248 | The hardware registers are assigned numbers for the compiler | |
249 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
250 | All registers that the compiler knows about must be given numbers, | |
251 | even those that are not normally considered general registers. | |
252 | For the 68000, we give the data registers numbers 0-7, | |
253 | the address registers numbers 010-017, | |
254 | and the 68881 floating point registers numbers 020-027. */ | |
255 | #ifndef SUPPORT_SUN_FPA | |
256 | #define FIRST_PSEUDO_REGISTER 24 | |
257 | #else | |
258 | #define FIRST_PSEUDO_REGISTER 56 | |
259 | #endif | |
260 | ||
261 | /* This defines the register which is used to hold the offset table for PIC. */ | |
262 | #define PIC_OFFSET_TABLE_REGNUM 13 | |
263 | ||
264 | /* Used to output a (use pic_offset_table_rtx) so that we | |
265 | always save/restore a5 in functions that use PIC relocation | |
266 | at *any* time during the compilation process. */ | |
267 | #define FINALIZE_PIC finalize_pic() | |
268 | ||
269 | #ifndef SUPPORT_SUN_FPA | |
270 | ||
271 | /* 1 for registers that have pervasive standard uses | |
272 | and are not available for the register allocator. | |
273 | On the 68000, only the stack pointer is such. */ | |
274 | ||
275 | #define FIXED_REGISTERS \ | |
276 | {/* Data registers. */ \ | |
277 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
278 | \ | |
279 | /* Address registers. */ \ | |
280 | 0, 0, 0, 0, 0, 0, 0, 1, \ | |
281 | \ | |
282 | /* Floating point registers \ | |
283 | (if available). */ \ | |
284 | 0, 0, 0, 0, 0, 0, 0, 0 } | |
285 | ||
286 | /* 1 for registers not available across function calls. | |
287 | These must include the FIXED_REGISTERS and also any | |
288 | registers that can be used without being saved. | |
289 | The latter must include the registers where values are returned | |
290 | and the register where structure-value addresses are passed. | |
291 | Aside from that, you can include as many other registers as you like. */ | |
292 | #define CALL_USED_REGISTERS \ | |
293 | {1, 1, 0, 0, 0, 0, 0, 0, \ | |
294 | 1, 1, 0, 0, 0, 0, 0, 1, \ | |
295 | 1, 1, 0, 0, 0, 0, 0, 0 } | |
296 | ||
297 | #else /* SUPPORT_SUN_FPA */ | |
298 | ||
299 | /* 1 for registers that have pervasive standard uses | |
300 | and are not available for the register allocator. | |
301 | On the 68000, only the stack pointer is such. */ | |
302 | ||
303 | /* fpa0 is also reserved so that it can be used to move shit back and | |
304 | forth between high fpa regs and everything else. */ | |
305 | ||
306 | #define FIXED_REGISTERS \ | |
307 | {/* Data registers. */ \ | |
308 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
309 | \ | |
310 | /* Address registers. */ \ | |
311 | 0, 0, 0, 0, 0, 0, 0, 1, \ | |
312 | \ | |
313 | /* Floating point registers \ | |
314 | (if available). */ \ | |
315 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
316 | \ | |
317 | /* Sun3 FPA registers. */ \ | |
318 | 1, 0, 0, 0, 0, 0, 0, 0, \ | |
319 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
320 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
321 | 0, 0, 0, 0, 0, 0, 0, 0 } | |
322 | ||
323 | /* 1 for registers not available across function calls. | |
324 | These must include the FIXED_REGISTERS and also any | |
325 | registers that can be used without being saved. | |
326 | The latter must include the registers where values are returned | |
327 | and the register where structure-value addresses are passed. | |
328 | Aside from that, you can include as many other registers as you like. */ | |
329 | #define CALL_USED_REGISTERS \ | |
330 | {1, 1, 0, 0, 0, 0, 0, 0, \ | |
331 | 1, 1, 0, 0, 0, 0, 0, 1, \ | |
332 | 1, 1, 0, 0, 0, 0, 0, 0, \ | |
333 | /* FPA registers. */ \ | |
334 | 1, 1, 1, 1, 0, 0, 0, 0, \ | |
335 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
336 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
337 | 0, 0, 0, 0, 0, 0, 0, 0 } | |
338 | ||
339 | #endif /* defined SUPPORT_SUN_FPA */ | |
340 | ||
341 | ||
342 | /* Make sure everything's fine if we *don't* have a given processor. | |
343 | This assumes that putting a register in fixed_regs will keep the | |
344 | compiler's mitts completely off it. We don't bother to zero it out | |
345 | of register classes. If neither TARGET_FPA or TARGET_68881 is set, | |
346 | the compiler won't touch since no instructions that use these | |
347 | registers will be valid. | |
348 | ||
349 | Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if | |
350 | position independent code is being generated by making it a | |
351 | fixed register */ | |
352 | ||
353 | #ifndef SUPPORT_SUN_FPA | |
354 | ||
355 | #define CONDITIONAL_REGISTER_USAGE \ | |
356 | { \ | |
357 | if (flag_pic) \ | |
358 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
359 | } | |
360 | ||
361 | #else /* defined SUPPORT_SUN_FPA */ | |
362 | ||
363 | #define CONDITIONAL_REGISTER_USAGE \ | |
364 | { \ | |
365 | int i; \ | |
366 | HARD_REG_SET x; \ | |
367 | if (!TARGET_FPA) \ | |
368 | { \ | |
369 | COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \ | |
370 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ | |
371 | if (TEST_HARD_REG_BIT (x, i)) \ | |
372 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
373 | } \ | |
374 | if (TARGET_FPA) \ | |
375 | { \ | |
376 | COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \ | |
377 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ | |
378 | if (TEST_HARD_REG_BIT (x, i)) \ | |
379 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
380 | } \ | |
381 | if (flag_pic) \ | |
382 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
383 | } | |
384 | ||
385 | #endif /* defined SUPPORT_SUN_FPA */ | |
386 | ||
387 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
388 | to hold something of mode MODE. | |
389 | This is ordinarily the length in words of a value of mode MODE | |
390 | but can be less for certain modes in special long registers. | |
391 | ||
392 | On the 68000, ordinary registers hold 32 bits worth; | |
393 | for the 68881 registers, a single register is always enough for | |
394 | anything that can be stored in them at all. */ | |
395 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
396 | ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \ | |
397 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
398 | ||
399 | #ifndef SUPPORT_SUN_FPA | |
400 | ||
401 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
402 | On the 68000, the cpu registers can hold any mode but the 68881 registers | |
403 | can hold only SFmode or DFmode. The 68881 registers can't hold anything | |
404 | if 68881 use is disabled. */ | |
405 | ||
406 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
407 | (((REGNO) < 16) \ | |
408 | || ((REGNO) < 24 \ | |
409 | && TARGET_68881 \ | |
410 | && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
411 | || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT))) | |
412 | ||
413 | #else /* defined SUPPORT_SUN_FPA */ | |
414 | ||
415 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
416 | On the 68000, the cpu registers can hold any mode but the 68881 registers | |
417 | can hold only SFmode or DFmode. And the 68881 registers can't hold anything | |
418 | if 68881 use is disabled. However, the Sun FPA register can | |
419 | (apparently) hold whatever you feel like putting in them. | |
420 | If using the fpa, don't put a double in d7/a0. */ | |
421 | ||
422 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
423 | (((REGNO) < 16 \ | |
424 | && !(TARGET_FPA \ | |
425 | && GET_MODE_CLASS ((MODE)) != MODE_INT \ | |
426 | && GET_MODE_UNIT_SIZE ((MODE)) > 4 \ | |
427 | && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \ | |
428 | && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \ | |
429 | || ((REGNO) < 24 \ | |
430 | ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
431 | || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ | |
432 | : ((REGNO) < 56 ? TARGET_FPA : 0))) | |
433 | ||
434 | #endif /* defined SUPPORT_SUN_FPA */ | |
435 | ||
436 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
437 | when one has mode MODE1 and one has mode MODE2. | |
438 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
439 | for any hard reg, then this must be 0 for correct output. */ | |
440 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
441 | (! TARGET_68881 \ | |
442 | || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
443 | || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ | |
444 | == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
445 | || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))) | |
446 | ||
447 | /* Specify the registers used for certain standard purposes. | |
448 | The values of these macros are register numbers. */ | |
449 | ||
450 | /* m68000 pc isn't overloaded on a register. */ | |
451 | /* #define PC_REGNUM */ | |
452 | ||
453 | /* Register to use for pushing function arguments. */ | |
454 | #define STACK_POINTER_REGNUM 15 | |
455 | ||
456 | /* Base register for access to local variables of the function. */ | |
457 | #define FRAME_POINTER_REGNUM 14 | |
458 | ||
459 | /* Value should be nonzero if functions must have frame pointers. | |
460 | Zero means the frame pointer need not be set up (and parms | |
461 | may be accessed via the stack pointer) in functions that seem suitable. | |
462 | This is computed in `reload', in reload1.c. */ | |
463 | #define FRAME_POINTER_REQUIRED 0 | |
464 | ||
465 | /* Base register for access to arguments of the function. */ | |
466 | #define ARG_POINTER_REGNUM 14 | |
467 | ||
468 | /* Register in which static-chain is passed to a function. */ | |
469 | #define STATIC_CHAIN_REGNUM 8 | |
470 | ||
471 | /* Register in which address to store a structure value | |
472 | is passed to a function. */ | |
473 | #define STRUCT_VALUE_REGNUM 9 | |
474 | \f | |
475 | /* Define the classes of registers for register constraints in the | |
476 | machine description. Also define ranges of constants. | |
477 | ||
478 | One of the classes must always be named ALL_REGS and include all hard regs. | |
479 | If there is more than one class, another class must be named NO_REGS | |
480 | and contain no registers. | |
481 | ||
482 | The name GENERAL_REGS must be the name of a class (or an alias for | |
483 | another name such as ALL_REGS). This is the class of registers | |
484 | that is allowed by "g" or "r" in a register constraint. | |
485 | Also, registers outside this class are allocated only when | |
486 | instructions express preferences for them. | |
487 | ||
488 | The classes must be numbered in nondecreasing order; that is, | |
489 | a larger-numbered class must never be contained completely | |
490 | in a smaller-numbered class. | |
491 | ||
492 | For any two classes, it is very desirable that there be another | |
493 | class that represents their union. */ | |
494 | ||
495 | /* The 68000 has three kinds of registers, so eight classes would be | |
496 | a complete set. One of them is not needed. */ | |
497 | ||
498 | #ifndef SUPPORT_SUN_FPA | |
499 | ||
500 | enum reg_class { | |
501 | NO_REGS, DATA_REGS, | |
502 | ADDR_REGS, FP_REGS, | |
503 | GENERAL_REGS, DATA_OR_FP_REGS, | |
504 | ADDR_OR_FP_REGS, ALL_REGS, | |
505 | LIM_REG_CLASSES }; | |
506 | ||
507 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
508 | ||
509 | /* Give names of register classes as strings for dump file. */ | |
510 | ||
511 | #define REG_CLASS_NAMES \ | |
512 | { "NO_REGS", "DATA_REGS", \ | |
513 | "ADDR_REGS", "FP_REGS", \ | |
514 | "GENERAL_REGS", "DATA_OR_FP_REGS", \ | |
515 | "ADDR_OR_FP_REGS", "ALL_REGS" } | |
516 | ||
517 | /* Define which registers fit in which classes. | |
518 | This is an initializer for a vector of HARD_REG_SET | |
519 | of length N_REG_CLASSES. */ | |
520 | ||
521 | #define REG_CLASS_CONTENTS \ | |
522 | { \ | |
523 | 0x00000000, /* NO_REGS */ \ | |
524 | 0x000000ff, /* DATA_REGS */ \ | |
525 | 0x0000ff00, /* ADDR_REGS */ \ | |
526 | 0x00ff0000, /* FP_REGS */ \ | |
527 | 0x0000ffff, /* GENERAL_REGS */ \ | |
528 | 0x00ff00ff, /* DATA_OR_FP_REGS */ \ | |
529 | 0x00ffff00, /* ADDR_OR_FP_REGS */ \ | |
530 | 0x00ffffff, /* ALL_REGS */ \ | |
531 | } | |
532 | ||
533 | /* The same information, inverted: | |
534 | Return the class number of the smallest class containing | |
535 | reg number REGNO. This could be a conditional expression | |
536 | or could index an array. */ | |
537 | ||
538 | #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1) | |
539 | ||
540 | #else /* defined SUPPORT_SUN_FPA */ | |
541 | ||
542 | /* | |
543 | * Notes on final choices: | |
544 | * | |
545 | * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything | |
546 | * else. | |
547 | * 2) Removed all unions that involve address registers with | |
548 | * floating point registers (left in unions of address and data with | |
549 | * floating point). | |
550 | * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS. | |
551 | * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS. | |
552 | * 4) Left in everything else. | |
553 | */ | |
554 | enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS, | |
555 | FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS, | |
556 | DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS, | |
557 | GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS, | |
558 | LIM_REG_CLASSES }; | |
559 | ||
560 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
561 | ||
562 | /* Give names of register classes as strings for dump file. */ | |
563 | ||
564 | #define REG_CLASS_NAMES \ | |
565 | { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \ | |
566 | "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \ | |
567 | "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \ | |
568 | "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" } | |
569 | ||
570 | /* Define which registers fit in which classes. | |
571 | This is an initializer for a vector of HARD_REG_SET | |
572 | of length N_REG_CLASSES. */ | |
573 | ||
574 | #define REG_CLASS_CONTENTS \ | |
575 | { \ | |
576 | {0, 0}, /* NO_REGS */ \ | |
577 | {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \ | |
578 | {0xff000000, 0x00ffffff}, /* FPA_REGS */ \ | |
579 | {0x00ff0000, 0x00000000}, /* FP_REGS */ \ | |
580 | {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \ | |
581 | {0x000000ff, 0x00000000}, /* DATA_REGS */ \ | |
582 | {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \ | |
583 | {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \ | |
584 | {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\ | |
585 | {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \ | |
586 | {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \ | |
587 | {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\ | |
588 | {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\ | |
589 | {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \ | |
590 | } | |
591 | ||
592 | /* The same information, inverted: | |
593 | Return the class number of the smallest class containing | |
594 | reg number REGNO. This could be a conditional expression | |
595 | or could index an array. */ | |
596 | ||
597 | extern enum reg_class regno_reg_class[]; | |
598 | #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3]) | |
599 | ||
600 | #endif /* SUPPORT_SUN_FPA */ | |
601 | ||
602 | /* The class value for index registers, and the one for base regs. */ | |
603 | ||
604 | #define INDEX_REG_CLASS GENERAL_REGS | |
605 | #define BASE_REG_CLASS ADDR_REGS | |
606 | ||
607 | /* Get reg_class from a letter such as appears in the machine description. | |
608 | We do a trick here to modify the effective constraints on the | |
609 | machine description; we zorch the constraint letters that aren't | |
610 | appropriate for a specific target. This allows us to guarantee | |
611 | that a specific kind of register will not be used for a given target | |
612 | without fiddling with the register classes above. */ | |
613 | ||
614 | #ifndef SUPPORT_SUN_FPA | |
615 | ||
616 | #define REG_CLASS_FROM_LETTER(C) \ | |
617 | ((C) == 'a' ? ADDR_REGS : \ | |
618 | ((C) == 'd' ? DATA_REGS : \ | |
619 | ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ | |
620 | NO_REGS) : \ | |
621 | NO_REGS))) | |
622 | ||
623 | #else /* defined SUPPORT_SUN_FPA */ | |
624 | ||
625 | #define REG_CLASS_FROM_LETTER(C) \ | |
626 | ((C) == 'a' ? ADDR_REGS : \ | |
627 | ((C) == 'd' ? DATA_REGS : \ | |
628 | ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ | |
629 | NO_REGS) : \ | |
630 | ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \ | |
631 | NO_REGS) : \ | |
632 | ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \ | |
633 | NO_REGS) : \ | |
634 | NO_REGS))))) | |
635 | ||
636 | #endif /* defined SUPPORT_SUN_FPA */ | |
637 | ||
638 | /* The letters I, J, K, L and M in a register constraint string | |
639 | can be used to stand for particular ranges of immediate operands. | |
640 | This macro defines what the ranges are. | |
641 | C is the letter, and VALUE is a constant value. | |
642 | Return 1 if VALUE is in the range specified by C. | |
643 | ||
644 | For the 68000, `I' is used for the range 1 to 8 | |
645 | allowed as immediate shift counts and in addq. | |
646 | `J' is used for the range of signed numbers that fit in 16 bits. | |
647 | `K' is for numbers that moveq can't handle. | |
648 | `L' is for range -8 to -1, range of values that can be added with subq. */ | |
649 | ||
650 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
651 | ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \ | |
652 | (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \ | |
653 | (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \ | |
654 | (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0) | |
655 | ||
656 | /* | |
657 | * A small bit of explanation: | |
658 | * "G" defines all of the floating constants that are *NOT* 68881 | |
659 | * constants. this is so 68881 constants get reloaded and the | |
660 | * fpmovecr is used. "H" defines *only* the class of constants that | |
661 | * the fpa can use, because these can be gotten at in any fpa | |
662 | * instruction and there is no need to force reloads. | |
663 | */ | |
664 | #ifndef SUPPORT_SUN_FPA | |
665 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
666 | ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 ) | |
667 | #else /* defined SUPPORT_SUN_FPA */ | |
668 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
669 | ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \ | |
670 | (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0) | |
671 | #endif /* defined SUPPORT_SUN_FPA */ | |
672 | ||
673 | /* Given an rtx X being reloaded into a reg required to be | |
674 | in class CLASS, return the class of reg to actually use. | |
675 | In general this is just CLASS; but on some machines | |
676 | in some cases it is preferable to use a more restrictive class. | |
677 | On the 68000 series, use a data reg if possible when the | |
678 | value is a constant in the range where moveq could be used | |
679 | and we ensure that QImodes are reloaded into data regs. | |
9c05a5ad RK |
680 | Also, if a floating constant needs reloading, put it in memory. |
681 | Don't do this for !G constants, since all patterns in the md file | |
682 | expect them to be loaded into a register via fpmovecr. See above. */ | |
3d339ad2 RS |
683 | |
684 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
685 | ((GET_CODE (X) == CONST_INT \ | |
686 | && (unsigned) (INTVAL (X) + 0x80) < 0x100 \ | |
687 | && (CLASS) != ADDR_REGS) \ | |
688 | ? DATA_REGS \ | |
689 | : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \ | |
690 | ? DATA_REGS \ | |
691 | : (GET_CODE (X) == CONST_DOUBLE \ | |
692 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
9c05a5ad RK |
693 | ? (! CONST_DOUBLE_OK_FOR_LETTER_P (X, 'G') \ |
694 | && CLASS == FP_REGS \ | |
695 | ? FP_REGS : NO_REGS) \ | |
3d339ad2 RS |
696 | : (CLASS)) |
697 | ||
698 | /* Return the maximum number of consecutive registers | |
699 | needed to represent mode MODE in a register of class CLASS. */ | |
700 | /* On the 68000, this is the size of MODE in words, | |
701 | except in the FP regs, where a single reg is always enough. */ | |
702 | #ifndef SUPPORT_SUN_FPA | |
703 | ||
704 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
705 | ((CLASS) == FP_REGS ? 1 \ | |
706 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
707 | ||
708 | /* Moves between fp regs and other regs are two insns. */ | |
709 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
710 | (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ | |
711 | || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ | |
712 | ? 4 : 2) | |
713 | ||
714 | #else /* defined SUPPORT_SUN_FPA */ | |
715 | ||
716 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
717 | ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \ | |
718 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
719 | ||
720 | /* Moves between fp regs and other regs are two insns. */ | |
721 | /* Likewise for high fpa regs and other regs. */ | |
722 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
723 | ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ | |
724 | || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ | |
725 | || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \ | |
726 | || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \ | |
727 | ? 4 : 2) | |
728 | ||
729 | #endif /* define SUPPORT_SUN_FPA */ | |
730 | \f | |
731 | /* Stack layout; function entry, exit and calling. */ | |
732 | ||
733 | /* Define this if pushing a word on the stack | |
734 | makes the stack pointer a smaller address. */ | |
735 | #define STACK_GROWS_DOWNWARD | |
736 | ||
737 | /* Nonzero if we need to generate stack-probe insns. | |
738 | On most systems they are not needed. | |
739 | When they are needed, define this as the stack offset to probe at. */ | |
740 | #define NEED_PROBE 0 | |
741 | ||
742 | /* Define this if the nominal address of the stack frame | |
743 | is at the high-address end of the local variables; | |
744 | that is, each additional local variable allocated | |
745 | goes at a more negative offset in the frame. */ | |
746 | #define FRAME_GROWS_DOWNWARD | |
747 | ||
748 | /* Offset within stack frame to start allocating local variables at. | |
749 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
750 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
751 | of the first local allocated. */ | |
752 | #define STARTING_FRAME_OFFSET 0 | |
753 | ||
754 | /* If we generate an insn to push BYTES bytes, | |
755 | this says how many the stack pointer really advances by. | |
756 | On the 68000, sp@- in a byte insn really pushes a word. */ | |
757 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) | |
758 | ||
759 | /* Offset of first parameter from the argument pointer register value. */ | |
760 | #define FIRST_PARM_OFFSET(FNDECL) 8 | |
761 | ||
762 | /* Value is the number of byte of arguments automatically | |
763 | popped when returning from a subroutine call. | |
8b109b37 | 764 | FUNDECL is the declaration node of the function (as a tree), |
3d339ad2 RS |
765 | FUNTYPE is the data type of the function (as a tree), |
766 | or for a library call it is an identifier node for the subroutine name. | |
767 | SIZE is the number of bytes of arguments passed on the stack. | |
768 | ||
769 | On the 68000, the RTS insn cannot pop anything. | |
770 | On the 68010, the RTD insn may be used to pop them if the number | |
771 | of args is fixed, but if the number is variable then the caller | |
772 | must pop them all. RTD can't be used for library calls now | |
773 | because the library is compiled with the Unix compiler. | |
774 | Use of RTD is a selectable option, since it is incompatible with | |
775 | standard Unix calling sequences. If the option is not selected, | |
776 | the caller must always pop the args. */ | |
777 | ||
8b109b37 | 778 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \ |
3d339ad2 RS |
779 | ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \ |
780 | && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ | |
781 | || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ | |
782 | == void_type_node))) \ | |
783 | ? (SIZE) : 0) | |
784 | ||
785 | /* Define how to find the value returned by a function. | |
786 | VALTYPE is the data type of the value (as a tree). | |
787 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
788 | otherwise, FUNC is 0. */ | |
789 | ||
790 | /* On the 68000 the return value is in D0 regardless. */ | |
791 | ||
792 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
793 | gen_rtx (REG, TYPE_MODE (VALTYPE), 0) | |
794 | ||
795 | /* Define how to find the value returned by a library function | |
796 | assuming the value has mode MODE. */ | |
797 | ||
798 | /* On the 68000 the return value is in D0 regardless. */ | |
799 | ||
800 | #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) | |
801 | ||
802 | /* 1 if N is a possible register number for a function value. | |
803 | On the 68000, d0 is the only register thus used. */ | |
804 | ||
805 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) | |
806 | ||
7972af82 TW |
807 | /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for |
808 | more than one register. */ | |
809 | ||
810 | #define NEEDS_UNTYPED_CALL 0 | |
811 | ||
3d339ad2 RS |
812 | /* Define this if PCC uses the nonreentrant convention for returning |
813 | structure and union values. */ | |
814 | ||
815 | #define PCC_STATIC_STRUCT_RETURN | |
816 | ||
817 | /* 1 if N is a possible register number for function argument passing. | |
818 | On the 68000, no registers are used in this way. */ | |
819 | ||
820 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
821 | \f | |
822 | /* Define a data type for recording info about an argument list | |
823 | during the scan of that argument list. This data type should | |
824 | hold all necessary information about the function itself | |
825 | and about the args processed so far, enough to enable macros | |
826 | such as FUNCTION_ARG to determine where the next arg should go. | |
827 | ||
828 | On the m68k, this is a single integer, which is a number of bytes | |
829 | of arguments scanned so far. */ | |
830 | ||
831 | #define CUMULATIVE_ARGS int | |
832 | ||
833 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
834 | for a call to a function whose data type is FNTYPE. | |
835 | For a library call, FNTYPE is 0. | |
836 | ||
837 | On the m68k, the offset starts at 0. */ | |
838 | ||
839 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
840 | ((CUM) = 0) | |
841 | ||
842 | /* Update the data in CUM to advance over an argument | |
843 | of mode MODE and data type TYPE. | |
844 | (TYPE is null for libcalls where that information may not be available.) */ | |
845 | ||
846 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
847 | ((CUM) += ((MODE) != BLKmode \ | |
848 | ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ | |
849 | : (int_size_in_bytes (TYPE) + 3) & ~3)) | |
850 | ||
851 | /* Define where to put the arguments to a function. | |
852 | Value is zero to push the argument on the stack, | |
853 | or a hard register in which to store the argument. | |
854 | ||
855 | MODE is the argument's machine mode. | |
856 | TYPE is the data type of the argument (as a tree). | |
857 | This is null for libcalls where that information may | |
858 | not be available. | |
859 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
860 | the preceding args and about the function being called. | |
861 | NAMED is nonzero if this argument is a named parameter | |
862 | (otherwise it is an extra parameter matching an ellipsis). */ | |
863 | ||
864 | /* On the 68000 all args are pushed, except if -mregparm is specified | |
865 | then the first two words of arguments are passed in d0, d1. | |
866 | *NOTE* -mregparm does not work. | |
867 | It exists only to test register calling conventions. */ | |
868 | ||
869 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
870 | ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) | |
871 | ||
872 | /* For an arg passed partly in registers and partly in memory, | |
873 | this is the number of registers used. | |
874 | For args passed entirely in registers or entirely in memory, zero. */ | |
875 | ||
876 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
877 | ((TARGET_REGPARM && (CUM) < 8 \ | |
878 | && 8 < ((CUM) + ((MODE) == BLKmode \ | |
879 | ? int_size_in_bytes (TYPE) \ | |
880 | : GET_MODE_SIZE (MODE)))) \ | |
881 | ? 2 - (CUM) / 4 : 0) | |
882 | ||
883 | /* Generate the assembly code for function entry. */ | |
884 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE) | |
885 | ||
886 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
887 | for profiling a function entry. */ | |
888 | ||
889 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
890 | asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO)) | |
891 | ||
892 | /* Output assembler code to FILE to initialize this source file's | |
893 | basic block profiling info, if that has not already been done. */ | |
894 | ||
895 | #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ | |
896 | asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \ | |
897 | LABELNO, LABELNO); | |
898 | ||
899 | /* Output assembler code to FILE to increment the entry-count for | |
900 | the BLOCKNO'th basic block in this source file. */ | |
901 | ||
902 | #define BLOCK_PROFILER(FILE, BLOCKNO) \ | |
903 | asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO) | |
904 | ||
905 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
906 | the stack pointer does not matter. The value is tested only in | |
907 | functions that have frame pointers. | |
908 | No definition is equivalent to always zero. */ | |
909 | ||
910 | #define EXIT_IGNORE_STACK 1 | |
911 | ||
912 | /* Generate the assembly code for function exit. */ | |
913 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE) | |
914 | ||
915 | /* This is a hook for other tm files to change. */ | |
916 | /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */ | |
917 | ||
918 | /* Determine if the epilogue should be output as RTL. | |
919 | You should override this if you define FUNCTION_EXTRA_EPILOGUE. */ | |
920 | #define USE_RETURN_INSN use_return_insn () | |
921 | ||
922 | /* Store in the variable DEPTH the initial difference between the | |
923 | frame pointer reg contents and the stack pointer reg contents, | |
924 | as of the start of the function body. This depends on the layout | |
925 | of the fixed parts of the stack frame and on how registers are saved. | |
926 | ||
927 | On the 68k, if we have a frame, we must add one word to its length | |
928 | to allow for the place that a6 is stored when we do have a frame pointer. | |
929 | Otherwise, we would need to compute the offset from the frame pointer | |
930 | of a local variable as a function of frame_pointer_needed, which | |
931 | is hard. */ | |
932 | ||
933 | #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ | |
934 | { int regno; \ | |
935 | int offset = -4; \ | |
936 | for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \ | |
937 | if (regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
938 | offset += 12; \ | |
939 | for (regno = 0; regno < 16; regno++) \ | |
940 | if (regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
941 | offset += 4; \ | |
942 | (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \ | |
943 | + (get_frame_size () == 0 ? 0 : 4)); \ | |
944 | } | |
945 | ||
946 | /* Output assembler code for a block containing the constant parts | |
947 | of a trampoline, leaving space for the variable parts. */ | |
948 | ||
949 | /* On the 68k, the trampoline looks like this: | |
950 | mov @#.,a0 | |
9fd3fbd0 RS |
951 | jsr @#___trampoline |
952 | jsr @#___trampoline | |
3d339ad2 RS |
953 | .long STATIC |
954 | .long FUNCTION | |
955 | The reason for having three jsr insns is so that an entire line | |
956 | of the instruction cache is filled in a predictable way | |
9fd3fbd0 RS |
957 | that will always be the same. |
958 | ||
959 | We always use the assembler label ___trampoline | |
960 | regardless of whether the system adds underscores. */ | |
3d339ad2 RS |
961 | |
962 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
963 | { \ | |
964 | ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \ | |
965 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
966 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
9fd3fbd0 RS |
967 | ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \ |
968 | ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\ | |
969 | ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \ | |
970 | ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\ | |
3d339ad2 RS |
971 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ |
972 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
973 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
974 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
975 | } | |
976 | ||
977 | /* Length in units of the trampoline for entering a nested function. */ | |
978 | ||
979 | #define TRAMPOLINE_SIZE 26 | |
980 | ||
981 | /* Alignment required for a trampoline. 16 is used to find the | |
982 | beginning of a line in the instruction cache. */ | |
983 | ||
984 | #define TRAMPOLINE_ALIGN 16 | |
985 | ||
986 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
987 | FNADDR is an RTX for the address of the function's pure code. | |
988 | CXT is an RTX for the static chain value for the function. */ | |
989 | ||
990 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
991 | { \ | |
992 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \ | |
993 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \ | |
994 | emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \ | |
995 | } | |
996 | ||
997 | /* This is the library routine that is used | |
998 | to transfer control from the trampoline | |
999 | to the actual nested function. */ | |
1000 | ||
1001 | /* A colon is used with no explicit operands | |
1002 | to cause the template string to be scanned for %-constructs. */ | |
1003 | /* The function name __transfer_from_trampoline is not actually used. | |
1004 | The function definition just permits use of "asm with operands" | |
1005 | (though the operand list is empty). */ | |
1006 | #define TRANSFER_FROM_TRAMPOLINE \ | |
1007 | void \ | |
1008 | __transfer_from_trampoline () \ | |
1009 | { \ | |
1010 | register char *a0 asm ("%a0"); \ | |
2e3c09cd | 1011 | asm (GLOBAL_ASM_OP " ___trampoline"); \ |
3d339ad2 | 1012 | asm ("___trampoline:"); \ |
338818c7 RK |
1013 | asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \ |
1014 | asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \ | |
3d339ad2 RS |
1015 | asm ("rts":); \ |
1016 | } | |
1017 | \f | |
1018 | /* Addressing modes, and classification of registers for them. */ | |
1019 | ||
1020 | #define HAVE_POST_INCREMENT | |
1021 | /* #define HAVE_POST_DECREMENT */ | |
1022 | ||
1023 | #define HAVE_PRE_DECREMENT | |
1024 | /* #define HAVE_PRE_INCREMENT */ | |
1025 | ||
1026 | /* Macros to check register numbers against specific register classes. */ | |
1027 | ||
1028 | /* These assume that REGNO is a hard or pseudo reg number. | |
1029 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1030 | or a pseudo reg currently allocated to a suitable hard reg. | |
1031 | Since they use reg_renumber, they are safe only once reg_renumber | |
1032 | has been allocated, which happens in local-alloc.c. */ | |
1033 | ||
1034 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1035 | ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16) | |
1036 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1037 | (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8) | |
1038 | #define REGNO_OK_FOR_DATA_P(REGNO) \ | |
1039 | ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8) | |
1040 | #define REGNO_OK_FOR_FP_P(REGNO) \ | |
1041 | (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8) | |
1042 | #ifdef SUPPORT_SUN_FPA | |
1043 | #define REGNO_OK_FOR_FPA_P(REGNO) \ | |
1044 | (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56)) | |
1045 | #endif | |
1046 | ||
1047 | /* Now macros that check whether X is a register and also, | |
1048 | strictly, whether it is in a specified class. | |
1049 | ||
1050 | These macros are specific to the 68000, and may be used only | |
1051 | in code for printing assembler insns and in conditions for | |
1052 | define_optimization. */ | |
1053 | ||
1054 | /* 1 if X is a data register. */ | |
1055 | ||
1056 | #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X))) | |
1057 | ||
1058 | /* 1 if X is an fp register. */ | |
1059 | ||
1060 | #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
1061 | ||
1062 | /* 1 if X is an address register */ | |
1063 | ||
1064 | #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) | |
1065 | ||
1066 | #ifdef SUPPORT_SUN_FPA | |
1067 | /* 1 if X is a register in the Sun FPA. */ | |
1068 | #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X))) | |
1069 | #else | |
1070 | /* Answer must be no if we don't have an FPA. */ | |
1071 | #define FPA_REG_P(X) 0 | |
1072 | #endif | |
1073 | \f | |
1074 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1075 | ||
1076 | #define MAX_REGS_PER_ADDRESS 2 | |
1077 | ||
1078 | /* Recognize any constant value that is a valid address. */ | |
1079 | ||
6eff269e BK |
1080 | #define CONSTANT_ADDRESS_P(X) \ |
1081 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1082 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1083 | || GET_CODE (X) == HIGH) | |
3d339ad2 RS |
1084 | |
1085 | /* Nonzero if the constant value X is a legitimate general operand. | |
1086 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
1087 | ||
1088 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
1089 | ||
1090 | /* Nonzero if the constant value X is a legitimate general operand | |
1091 | when generating PIC code. It is given that flag_pic is on and | |
1092 | that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
1093 | ||
1094 | #define LEGITIMATE_PIC_OPERAND_P(X) \ | |
1095 | (! symbolic_operand (X, VOIDmode)) | |
1096 | ||
1097 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1098 | and check its validity for a certain class. | |
1099 | We have two alternate definitions for each of them. | |
1100 | The usual definition accepts all pseudo regs; the other rejects | |
1101 | them unless they have been allocated suitable hard regs. | |
1102 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1103 | ||
1104 | Most source files want to accept pseudo regs in the hope that | |
1105 | they will get allocated to the class that the insn wants them to be in. | |
1106 | Source files for reload pass need to be strict. | |
1107 | After reload, it makes no difference, since pseudo regs have | |
1108 | been eliminated by then. */ | |
1109 | ||
1110 | #ifndef REG_OK_STRICT | |
1111 | ||
1112 | /* Nonzero if X is a hard reg that can be used as an index | |
1113 | or if it is a pseudo reg. */ | |
1114 | #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8) | |
1115 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1116 | or if it is a pseudo reg. */ | |
1117 | #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0) | |
1118 | ||
1119 | #else | |
1120 | ||
1121 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1122 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1123 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1124 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1125 | ||
1126 | #endif | |
1127 | \f | |
1128 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1129 | that is a valid memory address for an instruction. | |
1130 | The MODE argument is the machine mode for the MEM expression | |
1131 | that wants to use this address. | |
1132 | ||
1133 | When generating PIC, an address involving a SYMBOL_REF is legitimate | |
1134 | if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF. | |
1135 | We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses, | |
1136 | and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF. | |
1137 | ||
1138 | Likewise for a LABEL_REF when generating PIC. | |
1139 | ||
1140 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ | |
1141 | ||
22291e2f JW |
1142 | /* Allow SUBREG everywhere we allow REG. This results in better code. It |
1143 | also makes function inlining work when inline functions are called with | |
1144 | arguments that are SUBREGs. */ | |
1145 | ||
1146 | #define LEGITIMATE_BASE_REG_P(X) \ | |
1147 | ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ | |
1148 | || (GET_CODE (X) == SUBREG \ | |
1149 | && GET_CODE (SUBREG_REG (X)) == REG \ | |
1150 | && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) | |
1151 | ||
3d339ad2 RS |
1152 | #define INDIRECTABLE_1_ADDRESS_P(X) \ |
1153 | ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \ | |
22291e2f | 1154 | || LEGITIMATE_BASE_REG_P (X) \ |
3d339ad2 | 1155 | || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \ |
22291e2f | 1156 | && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \ |
3d339ad2 | 1157 | || (GET_CODE (X) == PLUS \ |
22291e2f | 1158 | && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \ |
3d339ad2 RS |
1159 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ |
1160 | && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \ | |
1161 | || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ | |
1162 | && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \ | |
1163 | || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ | |
1164 | && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \ | |
1165 | ||
1166 | #if 0 | |
1167 | /* This should replace the last two (non-pic) lines | |
1168 | except that Sun's assembler does not seem to handle such operands. */ | |
1169 | && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \ | |
1170 | : (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1171 | && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000)))) | |
1172 | #endif | |
1173 | ||
1174 | ||
1175 | #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \ | |
1176 | { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; } | |
1177 | ||
875c5a31 RS |
1178 | /* Only labels on dispatch tables are valid for indexing from. */ |
1179 | #define GO_IF_INDEXABLE_BASE(X, ADDR) \ | |
1180 | { rtx temp; \ | |
1181 | if (GET_CODE (X) == LABEL_REF \ | |
1182 | && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \ | |
1183 | && GET_CODE (temp) == JUMP_INSN \ | |
1184 | && (GET_CODE (PATTERN (temp)) == ADDR_VEC \ | |
1185 | || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \ | |
1186 | goto ADDR; \ | |
22291e2f | 1187 | if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; } |
3d339ad2 RS |
1188 | |
1189 | #define GO_IF_INDEXING(X, ADDR) \ | |
1190 | { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ | |
1191 | { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ | |
1192 | if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ | |
1193 | { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } } | |
1194 | ||
1195 | #define GO_IF_INDEXED_ADDRESS(X, ADDR) \ | |
1196 | { GO_IF_INDEXING (X, ADDR); \ | |
1197 | if (GET_CODE (X) == PLUS) \ | |
1198 | { if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1199 | && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \ | |
1200 | { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \ | |
1201 | if (GET_CODE (XEXP (X, 0)) == CONST_INT \ | |
1202 | && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \ | |
1203 | { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } } | |
1204 | ||
1205 | #define LEGITIMATE_INDEX_REG_P(X) \ | |
1206 | ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ | |
1207 | || (GET_CODE (X) == SIGN_EXTEND \ | |
1208 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1209 | && GET_MODE (XEXP (X, 0)) == HImode \ | |
22291e2f JW |
1210 | && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \ |
1211 | || (GET_CODE (X) == SUBREG \ | |
1212 | && GET_CODE (SUBREG_REG (X)) == REG \ | |
1213 | && REG_OK_FOR_INDEX_P (SUBREG_REG (X)))) | |
3d339ad2 RS |
1214 | |
1215 | #define LEGITIMATE_INDEX_P(X) \ | |
1216 | (LEGITIMATE_INDEX_REG_P (X) \ | |
1217 | || (TARGET_68020 && GET_CODE (X) == MULT \ | |
1218 | && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ | |
1219 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1220 | && (INTVAL (XEXP (X, 1)) == 2 \ | |
1221 | || INTVAL (XEXP (X, 1)) == 4 \ | |
1222 | || INTVAL (XEXP (X, 1)) == 8))) | |
1223 | ||
04e61bd4 RS |
1224 | /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */ |
1225 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1226 | { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \ | |
1227 | GO_IF_INDEXED_ADDRESS (X, ADDR); \ | |
1228 | if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \ | |
1229 | && LEGITIMATE_INDEX_P (XEXP (X, 0)) \ | |
1230 | && GET_CODE (XEXP (X, 1)) == LABEL_REF) \ | |
1231 | goto ADDR; } | |
1232 | ||
1233 | /* Don't call memory_address_noforce for the address to fetch | |
1234 | the switch offset. This address is ok as it stands (see above), | |
1235 | but memory_address_noforce would alter it. */ | |
1236 | #define PIC_CASE_VECTOR_ADDRESS(index) index | |
3d339ad2 RS |
1237 | \f |
1238 | /* Try machine-dependent ways of modifying an illegitimate address | |
1239 | to be legitimate. If we find one, return the new, valid address. | |
1240 | This macro is used in only one place: `memory_address' in explow.c. | |
1241 | ||
1242 | OLDX is the address as it was before break_out_memory_refs was called. | |
1243 | In some cases it is useful to look at this to decide what needs to be done. | |
1244 | ||
1245 | MODE and WIN are passed so that this macro can use | |
1246 | GO_IF_LEGITIMATE_ADDRESS. | |
1247 | ||
1248 | It is always safe for this macro to do nothing. It exists to recognize | |
1249 | opportunities to optimize the output. | |
1250 | ||
1251 | For the 68000, we handle X+REG by loading X into a register R and | |
1252 | using R+REG. R will go in an address reg and indexing will be used. | |
1253 | However, if REG is a broken-out memory address or multiplication, | |
1254 | nothing needs to be done because REG can certainly go in an address reg. */ | |
1255 | ||
1256 | #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; } | |
1257 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
1258 | { register int ch = (X) != (OLDX); \ | |
1259 | if (GET_CODE (X) == PLUS) \ | |
1260 | { int copied = 0; \ | |
1261 | if (GET_CODE (XEXP (X, 0)) == MULT) \ | |
1262 | { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \ | |
1263 | if (GET_CODE (XEXP (X, 1)) == MULT) \ | |
1264 | { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \ | |
1265 | if (ch && GET_CODE (XEXP (X, 1)) == REG \ | |
1266 | && GET_CODE (XEXP (X, 0)) == REG) \ | |
1267 | goto WIN; \ | |
1268 | if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ | |
1269 | if (GET_CODE (XEXP (X, 0)) == REG \ | |
1270 | || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \ | |
1271 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \ | |
1272 | && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \ | |
1273 | { register rtx temp = gen_reg_rtx (Pmode); \ | |
1274 | register rtx val = force_operand (XEXP (X, 1), 0); \ | |
1275 | emit_move_insn (temp, val); \ | |
1276 | COPY_ONCE (X); \ | |
1277 | XEXP (X, 1) = temp; \ | |
1278 | goto WIN; } \ | |
1279 | else if (GET_CODE (XEXP (X, 1)) == REG \ | |
1280 | || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \ | |
1281 | && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ | |
1282 | && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \ | |
1283 | { register rtx temp = gen_reg_rtx (Pmode); \ | |
1284 | register rtx val = force_operand (XEXP (X, 0), 0); \ | |
1285 | emit_move_insn (temp, val); \ | |
1286 | COPY_ONCE (X); \ | |
1287 | XEXP (X, 0) = temp; \ | |
1288 | goto WIN; }}} | |
1289 | ||
1290 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1291 | has an effect that depends on the machine mode it is used for. | |
1292 | On the 68000, only predecrement and postincrement address depend thus | |
1293 | (the amount of decrement or increment being the length of the operand). */ | |
1294 | ||
1295 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1296 | if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL | |
1297 | \f | |
1298 | /* Specify the machine mode that this machine uses | |
1299 | for the index in the tablejump instruction. */ | |
1300 | #define CASE_VECTOR_MODE HImode | |
1301 | ||
1302 | /* Define this if the tablejump instruction expects the table | |
1303 | to contain offsets from the address of the table. | |
1304 | Do not define this if the table should contain absolute addresses. */ | |
1305 | #define CASE_VECTOR_PC_RELATIVE | |
1306 | ||
1307 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1308 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1309 | ||
1310 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1311 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1312 | ||
1313 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1314 | #define DEFAULT_SIGNED_CHAR 1 | |
1315 | ||
1316 | /* Don't cse the address of the function being compiled. */ | |
1317 | #define NO_RECURSIVE_FUNCTION_CSE | |
1318 | ||
1319 | /* Max number of bytes we can move from memory to memory | |
1320 | in one reasonably fast instruction. */ | |
1321 | #define MOVE_MAX 4 | |
1322 | ||
1323 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
1324 | #define SLOW_ZERO_EXTEND | |
1325 | ||
1326 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1327 | #define SLOW_BYTE_ACCESS 0 | |
1328 | ||
3d339ad2 RS |
1329 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1330 | is done just by pretending it is already truncated. */ | |
1331 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1332 | ||
1333 | /* We assume that the store-condition-codes instructions store 0 for false | |
1334 | and some other value for true. This is the value stored for true. */ | |
1335 | ||
1336 | #define STORE_FLAG_VALUE -1 | |
1337 | ||
1338 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
1339 | #define PROMOTE_PROTOTYPES | |
1340 | ||
1341 | /* Specify the machine mode that pointers have. | |
1342 | After generation of rtl, the compiler makes no further distinction | |
1343 | between pointers and any other objects of this machine mode. */ | |
1344 | #define Pmode SImode | |
1345 | ||
1346 | /* A function address in a call instruction | |
1347 | is a byte address (for indexing purposes) | |
1348 | so give the MEM rtx a byte's mode. */ | |
1349 | #define FUNCTION_MODE QImode | |
1350 | ||
1351 | /* Compute the cost of computing a constant rtl expression RTX | |
1352 | whose rtx-code is CODE. The body of this macro is a portion | |
1353 | of a switch statement. If the code is computed here, | |
1354 | return it with a return statement. Otherwise, break from the switch. */ | |
1355 | ||
3bb22aee | 1356 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
3d339ad2 RS |
1357 | case CONST_INT: \ |
1358 | /* Constant zero is super cheap due to clr instruction. */ \ | |
1359 | if (RTX == const0_rtx) return 0; \ | |
8dbda09a RK |
1360 | /* if ((OUTER_CODE) == SET) */ \ |
1361 | return const_int_cost(RTX); \ | |
3d339ad2 RS |
1362 | case CONST: \ |
1363 | case LABEL_REF: \ | |
1364 | case SYMBOL_REF: \ | |
1365 | return 3; \ | |
1366 | case CONST_DOUBLE: \ | |
1367 | return 5; | |
1368 | ||
1369 | /* Compute the cost of various arithmetic operations. | |
1370 | These are vaguely right for a 68020. */ | |
1371 | /* The costs for long multiply have been adjusted to | |
1372 | work properly in synth_mult on the 68020, | |
1373 | relative to an average of the time for add and the time for shift, | |
1374 | taking away a little more because sometimes move insns are needed. */ | |
3296aff4 | 1375 | /* div?.w is relatively cheaper on 68000 counted in COSTS_N_INSNS terms. */ |
9fd3fbd0 | 1376 | #define MULL_COST (TARGET_68040 ? 5 : 13) |
3296aff4 TG |
1377 | #define MULW_COST (TARGET_68040 ? 3 : TARGET_68020 ? 8 : 5) |
1378 | #define DIVW_COST (TARGET_68020 ? 27 : 12) | |
3d339ad2 | 1379 | |
3bb22aee | 1380 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
3d339ad2 RS |
1381 | case PLUS: \ |
1382 | /* An lea costs about three times as much as a simple add. */ \ | |
1383 | if (GET_MODE (X) == SImode \ | |
1384 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1385 | && GET_CODE (XEXP (X, 1)) == MULT \ | |
1386 | && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ | |
1387 | && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \ | |
1388 | && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \ | |
1389 | || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \ | |
1390 | || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \ | |
1391 | return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \ | |
1392 | break; \ | |
1393 | case ASHIFT: \ | |
1394 | case ASHIFTRT: \ | |
3296aff4 TG |
1395 | case LSHIFTRT: \ |
1396 | if (! TARGET_68020) \ | |
1397 | { \ | |
1398 | if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
1399 | { \ | |
1400 | if (INTVAL (XEXP (X, 1)) < 16) \ | |
1401 | return COSTS_N_INSNS (2) + INTVAL (XEXP (X, 1)) / 2; \ | |
1402 | else \ | |
1403 | /* We're using clrw + swap for these cases. */ \ | |
bd2e6d53 | 1404 | return COSTS_N_INSNS (4) + (INTVAL (XEXP (X, 1)) - 16) / 2; \ |
3296aff4 TG |
1405 | } \ |
1406 | return COSTS_N_INSNS (10); /* worst case */ \ | |
1407 | } \ | |
3d339ad2 | 1408 | /* A shift by a big integer takes an extra instruction. */ \ |
b4ac57ab RS |
1409 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ |
1410 | && (INTVAL (XEXP (X, 1)) == 16)) \ | |
1411 | return COSTS_N_INSNS (2); /* clrw;swap */ \ | |
3d339ad2 RS |
1412 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ |
1413 | && !(INTVAL (XEXP (X, 1)) > 0 \ | |
1414 | && INTVAL (XEXP (X, 1)) <= 8)) \ | |
1415 | return COSTS_N_INSNS (3); /* lsr #i,dn */ \ | |
1416 | break; \ | |
1417 | case MULT: \ | |
3296aff4 TG |
1418 | if ((GET_CODE (XEXP (X, 0)) == ZERO_EXTEND \ |
1419 | || GET_CODE (XEXP (X, 0)) == SIGN_EXTEND) \ | |
1420 | && GET_MODE (X) == SImode) \ | |
1421 | return COSTS_N_INSNS (MULW_COST); \ | |
5d195441 | 1422 | if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \ |
9fd3fbd0 | 1423 | return COSTS_N_INSNS (MULW_COST); \ |
3d339ad2 | 1424 | else \ |
9fd3fbd0 | 1425 | return COSTS_N_INSNS (MULL_COST); \ |
3d339ad2 RS |
1426 | case DIV: \ |
1427 | case UDIV: \ | |
1428 | case MOD: \ | |
1429 | case UMOD: \ | |
1430 | if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \ | |
3296aff4 | 1431 | return COSTS_N_INSNS (DIVW_COST); /* div.w */ \ |
3d339ad2 RS |
1432 | return COSTS_N_INSNS (43); /* div.l */ |
1433 | \f | |
1434 | /* Tell final.c how to eliminate redundant test instructions. */ | |
1435 | ||
1436 | /* Here we define machine-dependent flags and fields in cc_status | |
1437 | (see `conditions.h'). */ | |
1438 | ||
1439 | /* Set if the cc value is actually in the 68881, so a floating point | |
1440 | conditional branch must be output. */ | |
1441 | #define CC_IN_68881 04000 | |
1442 | ||
1443 | /* Store in cc_status the expressions that the condition codes will | |
1444 | describe after execution of an instruction whose pattern is EXP. | |
1445 | Do not alter them if the instruction would not alter the cc's. */ | |
1446 | ||
1447 | /* On the 68000, all the insns to store in an address register fail to | |
1448 | set the cc's. However, in some cases these instructions can make it | |
1449 | possibly invalid to use the saved cc's. In those cases we clear out | |
1450 | some or all of the saved cc's so they won't be used. */ | |
1451 | ||
1452 | #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN) | |
1453 | ||
1454 | #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ | |
1455 | { if (cc_prev_status.flags & CC_IN_68881) \ | |
1456 | return FLOAT; \ | |
1457 | if (cc_prev_status.flags & CC_NO_OVERFLOW) \ | |
1458 | return NO_OV; \ | |
1459 | return NORMAL; } | |
1460 | \f | |
1461 | /* Control the assembler format that we output. */ | |
1462 | ||
1463 | /* Output at beginning of assembler file. */ | |
1464 | ||
1465 | #define ASM_FILE_START(FILE) \ | |
1466 | fprintf (FILE, "#NO_APP\n"); | |
1467 | ||
1468 | /* Output to assembler file text saying following lines | |
1469 | may contain character constants, extra white space, comments, etc. */ | |
1470 | ||
1471 | #define ASM_APP_ON "#APP\n" | |
1472 | ||
1473 | /* Output to assembler file text saying following lines | |
1474 | no longer contain unusual constructs. */ | |
1475 | ||
1476 | #define ASM_APP_OFF "#NO_APP\n" | |
1477 | ||
1478 | /* Output before read-only data. */ | |
1479 | ||
1480 | #define TEXT_SECTION_ASM_OP ".text" | |
1481 | ||
1482 | /* Output before writable data. */ | |
1483 | ||
1484 | #define DATA_SECTION_ASM_OP ".data" | |
1485 | ||
1486 | /* Here are four prefixes that are used by asm_fprintf to | |
1487 | facilitate customization for alternate assembler syntaxes. | |
1488 | Machines with no likelihood of an alternate syntax need not | |
1489 | define these and need not use asm_fprintf. */ | |
1490 | ||
1491 | /* The prefix for register names. Note that REGISTER_NAMES | |
1492 | is supposed to include this prefix. */ | |
1493 | ||
1494 | #define REGISTER_PREFIX "" | |
1495 | ||
1496 | /* The prefix for local labels. You should be able to define this as | |
1497 | an empty string, or any arbitrary string (such as ".", ".L%", etc) | |
1498 | without having to make any other changes to account for the specific | |
1499 | definition. Note it is a string literal, not interpreted by printf | |
1500 | and friends. */ | |
1501 | ||
1502 | #define LOCAL_LABEL_PREFIX "" | |
1503 | ||
1504 | /* The prefix to add to user-visible assembler symbols. */ | |
1505 | ||
1506 | #define USER_LABEL_PREFIX "_" | |
1507 | ||
1508 | /* The prefix for immediate operands. */ | |
1509 | ||
1510 | #define IMMEDIATE_PREFIX "#" | |
1511 | ||
1512 | /* How to refer to registers in assembler output. | |
1513 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1514 | ||
1515 | #ifndef SUPPORT_SUN_FPA | |
1516 | ||
1517 | #define REGISTER_NAMES \ | |
1518 | {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ | |
1519 | "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ | |
1520 | "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" } | |
1521 | ||
1522 | #else /* SUPPORTED_SUN_FPA */ | |
1523 | ||
1524 | #define REGISTER_NAMES \ | |
1525 | {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ | |
1526 | "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ | |
1527 | "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \ | |
1528 | "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \ | |
1529 | "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \ | |
1530 | "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \ | |
1531 | "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" } | |
1532 | ||
1533 | #endif /* defined SUPPORT_SUN_FPA */ | |
1534 | ||
1535 | /* How to renumber registers for dbx and gdb. | |
1536 | On the Sun-3, the floating point registers have numbers | |
1537 | 18 to 25, not 16 to 23 as they do in the compiler. */ | |
1538 | ||
1539 | #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2) | |
1540 | ||
1541 | /* This is how to output the definition of a user-level label named NAME, | |
1542 | such as the label on a static function or variable NAME. */ | |
1543 | ||
1544 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1545 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1546 | ||
1547 | /* This is how to output a command to make the user-level label named NAME | |
1548 | defined for reference from other files. */ | |
1549 | ||
9fd3fbd0 | 1550 | #define GLOBAL_ASM_OP ".globl" |
3d339ad2 | 1551 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ |
9fd3fbd0 RS |
1552 | do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \ |
1553 | assemble_name (FILE, NAME); \ | |
1554 | fputs ("\n", FILE);} while (0) | |
3d339ad2 RS |
1555 | |
1556 | /* This is how to output a reference to a user-level label named NAME. | |
1557 | `assemble_name' uses this. */ | |
1558 | ||
1559 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
338818c7 | 1560 | asm_fprintf (FILE, "%0U%s", NAME) |
3d339ad2 RS |
1561 | |
1562 | /* This is how to output an internal numbered label where | |
1563 | PREFIX is the class of label and NUM is the number within the class. */ | |
1564 | ||
1565 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
338818c7 | 1566 | asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM) |
3d339ad2 RS |
1567 | |
1568 | /* This is how to store into the string LABEL | |
1569 | the symbol_ref name of an internal numbered label where | |
1570 | PREFIX is the class of label and NUM is the number within the class. | |
1571 | This is suitable for output with `assemble_name'. */ | |
1572 | ||
1573 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1574 | sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM) | |
1575 | ||
f6ba6a91 RS |
1576 | /* This is how to output a `long double' extended real constant. */ |
1577 | ||
1578 | #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \ | |
1579 | do { long l[3]; \ | |
1580 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \ | |
1581 | if (sizeof (int) == sizeof (long)) \ | |
1582 | fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \ | |
1583 | else \ | |
1584 | fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \ | |
1585 | } while (0) | |
1586 | ||
3d339ad2 RS |
1587 | /* This is how to output an assembler line defining a `double' constant. */ |
1588 | ||
f6ba6a91 RS |
1589 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ |
1590 | do { char dstr[30]; \ | |
1591 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \ | |
1592 | fprintf (FILE, "\t.double 0r%s\n", dstr); \ | |
1593 | } while (0) | |
3d339ad2 RS |
1594 | |
1595 | /* This is how to output an assembler line defining a `float' constant. */ | |
1596 | ||
f6ba6a91 RS |
1597 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ |
1598 | do { long l; \ | |
1599 | REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ | |
1600 | if (sizeof (int) == sizeof (long)) \ | |
1601 | fprintf (FILE, "\t.long 0x%x\n", l); \ | |
1602 | else \ | |
1603 | fprintf (FILE, "\t.long 0x%lx\n", l); \ | |
3d339ad2 RS |
1604 | } while (0) |
1605 | ||
3d339ad2 RS |
1606 | /* This is how to output an assembler line defining an `int' constant. */ |
1607 | ||
1608 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
1609 | ( fprintf (FILE, "\t.long "), \ | |
1610 | output_addr_const (FILE, (VALUE)), \ | |
1611 | fprintf (FILE, "\n")) | |
1612 | ||
1613 | /* Likewise for `char' and `short' constants. */ | |
1614 | ||
1615 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1616 | ( fprintf (FILE, "\t.word "), \ | |
1617 | output_addr_const (FILE, (VALUE)), \ | |
1618 | fprintf (FILE, "\n")) | |
1619 | ||
1620 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1621 | ( fprintf (FILE, "\t.byte "), \ | |
1622 | output_addr_const (FILE, (VALUE)), \ | |
1623 | fprintf (FILE, "\n")) | |
1624 | ||
1625 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1626 | ||
1627 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1628 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
1629 | ||
1630 | /* This is how to output an insn to push a register on the stack. | |
1631 | It need not be very fast code. */ | |
1632 | ||
1633 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1634 | asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO]) | |
1635 | ||
1636 | /* This is how to output an insn to pop a register from the stack. | |
1637 | It need not be very fast code. */ | |
1638 | ||
1639 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1640 | asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO]) | |
1641 | ||
1642 | /* This is how to output an element of a case-vector that is absolute. | |
1643 | (The 68000 does not use such vectors, | |
1644 | but we must define this macro anyway.) */ | |
1645 | ||
1646 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1647 | asm_fprintf (FILE, "\t.long %LL%d\n", VALUE) | |
1648 | ||
1649 | /* This is how to output an element of a case-vector that is relative. */ | |
1650 | ||
1651 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
1652 | asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL) | |
1653 | ||
1654 | /* This is how to output an assembler line | |
1655 | that says to advance the location counter | |
1656 | to a multiple of 2**LOG bytes. */ | |
1657 | ||
b4ac57ab RS |
1658 | /* We don't have a way to align to more than a two-byte boundary, so do the |
1659 | best we can and don't complain. */ | |
3d339ad2 | 1660 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ |
b4ac57ab RS |
1661 | if ((LOG) >= 1) \ |
1662 | fprintf (FILE, "\t.even\n"); | |
3d339ad2 RS |
1663 | |
1664 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1665 | fprintf (FILE, "\t.skip %u\n", (SIZE)) | |
1666 | ||
1667 | /* This says how to output an assembler line | |
1668 | to define a global common symbol. */ | |
1669 | ||
1670 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1671 | ( fputs (".comm ", (FILE)), \ | |
1672 | assemble_name ((FILE), (NAME)), \ | |
1673 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
1674 | ||
1675 | /* This says how to output an assembler line | |
1676 | to define a local common symbol. */ | |
1677 | ||
1678 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
1679 | ( fputs (".lcomm ", (FILE)), \ | |
1680 | assemble_name ((FILE), (NAME)), \ | |
1681 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
1682 | ||
1683 | /* Store in OUTPUT a string (made with alloca) containing | |
1684 | an assembler-name for a local static variable named NAME. | |
1685 | LABELNO is an integer which is different for each call. */ | |
1686 | ||
1687 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1688 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1689 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1690 | ||
1691 | /* Define the parentheses used to group arithmetic operations | |
1692 | in assembler code. */ | |
1693 | ||
1694 | #define ASM_OPEN_PAREN "(" | |
1695 | #define ASM_CLOSE_PAREN ")" | |
1696 | ||
1697 | /* Define results of standard character escape sequences. */ | |
1698 | #define TARGET_BELL 007 | |
1699 | #define TARGET_BS 010 | |
1700 | #define TARGET_TAB 011 | |
1701 | #define TARGET_NEWLINE 012 | |
1702 | #define TARGET_VT 013 | |
1703 | #define TARGET_FF 014 | |
1704 | #define TARGET_CR 015 | |
1705 | ||
1706 | /* Output a float value (represented as a C double) as an immediate operand. | |
1707 | This macro is a 68k-specific macro. */ | |
f6ba6a91 RS |
1708 | |
1709 | #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \ | |
1710 | do { \ | |
1711 | if (CODE == 'f') \ | |
1712 | { \ | |
1713 | char dstr[30]; \ | |
1714 | REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \ | |
1715 | asm_fprintf ((FILE), "%I0r%s", dstr); \ | |
1716 | } \ | |
1717 | else \ | |
1718 | { \ | |
1719 | long l; \ | |
1720 | REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ | |
1721 | if (sizeof (int) == sizeof (long)) \ | |
1722 | asm_fprintf ((FILE), "%I0x%x", l); \ | |
1723 | else \ | |
1724 | asm_fprintf ((FILE), "%I0x%lx", l); \ | |
1725 | } \ | |
1726 | } while (0) | |
3d339ad2 RS |
1727 | |
1728 | /* Output a double value (represented as a C double) as an immediate operand. | |
1729 | This macro is a 68k-specific macro. */ | |
1730 | #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \ | |
f6ba6a91 RS |
1731 | do { char dstr[30]; \ |
1732 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \ | |
1733 | asm_fprintf (FILE, "%I0r%s", dstr); \ | |
1734 | } while (0) | |
1735 | ||
1736 | /* Note, long double immediate operands are not actually | |
1737 | generated by m68k.md. */ | |
1738 | #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \ | |
1739 | do { char dstr[30]; \ | |
1740 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \ | |
1741 | asm_fprintf (FILE, "%I0r%s", dstr); \ | |
1742 | } while (0) | |
3d339ad2 RS |
1743 | |
1744 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1745 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1746 | For `%' followed by punctuation, CODE is the punctuation and X is null. | |
1747 | ||
1748 | On the 68000, we use several CODE characters: | |
1749 | '.' for dot needed in Motorola-style opcode names. | |
1750 | '-' for an operand pushing on the stack: | |
1751 | sp@-, -(sp) or -(%sp) depending on the style of syntax. | |
1752 | '+' for an operand pushing on the stack: | |
1753 | sp@+, (sp)+ or (%sp)+ depending on the style of syntax. | |
1754 | '@' for a reference to the top word on the stack: | |
1755 | sp@, (sp) or (%sp) depending on the style of syntax. | |
1756 | '#' for an immediate operand prefix (# in MIT and Motorola syntax | |
1757 | but & in SGS syntax). | |
7c129456 | 1758 | '!' for the fpcr register (used in some float-to-fixed conversions). |
3d339ad2 RS |
1759 | '$' for the letter `s' in an op code, but only on the 68040. |
1760 | '&' for the letter `d' in an op code, but only on the 68040. | |
2ac5f14a | 1761 | '/' for register prefix needed by longlong.h. |
3d339ad2 RS |
1762 | |
1763 | 'b' for byte insn (no effect, on the Sun; this is for the ISI). | |
1764 | 'd' to force memory addressing to be absolute, not relative. | |
1765 | 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) | |
1766 | 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather | |
1767 | than directly). Second part of 'y' below. | |
1768 | 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex), | |
1769 | or print pair of registers as rx:ry. | |
1770 | 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs | |
1771 | CONST_DOUBLE's as SunFPA constant RAM registers if | |
1772 | possible, so it should not be used except for the SunFPA. */ | |
1773 | ||
1774 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
1775 | ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ | |
1776 | || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \ | |
2ac5f14a | 1777 | || (CODE) == '$' || (CODE) == '&' || (CODE) == '/') |
3d339ad2 | 1778 | |
3d339ad2 RS |
1779 | /* A C compound statement to output to stdio stream STREAM the |
1780 | assembler syntax for an instruction operand X. X is an RTL | |
1781 | expression. | |
1782 | ||
1783 | CODE is a value that can be used to specify one of several ways | |
1784 | of printing the operand. It is used when identical operands | |
1785 | must be printed differently depending on the context. CODE | |
1786 | comes from the `%' specification that was used to request | |
1787 | printing of the operand. If the specification was just `%DIGIT' | |
1788 | then CODE is 0; if the specification was `%LTR DIGIT' then CODE | |
1789 | is the ASCII code for LTR. | |
1790 | ||
1791 | If X is a register, this macro should print the register's name. | |
1792 | The names can be found in an array `reg_names' whose type is | |
1793 | `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'. | |
1794 | ||
1795 | When the machine description has a specification `%PUNCT' (a `%' | |
1796 | followed by a punctuation character), this macro is called with | |
1797 | a null pointer for X and the punctuation character for CODE. | |
1798 | ||
1799 | See m68k.c for the m68k specific codes. */ | |
1800 | ||
1801 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1802 | ||
1803 | /* A C compound statement to output to stdio stream STREAM the | |
1804 | assembler syntax for an instruction operand that is a memory | |
1805 | reference whose address is ADDR. ADDR is an RTL expression. | |
1806 | ||
1807 | On some machines, the syntax for a symbolic address depends on | |
1808 | the section that the address refers to. On these machines, | |
1809 | define the macro `ENCODE_SECTION_INFO' to store the information | |
1810 | into the `symbol_ref', and then check for it here. */ | |
1811 | ||
1812 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
1813 | ||
1814 | ||
e72498e1 JB |
1815 | /* Definitions for generating bytecode */ |
1816 | ||
1817 | /* Just so it's known this target is supported by the bytecode generator. | |
1818 | If this define isn't found anywhere in the target config files, then | |
1819 | dummy stubs are supplied by bytecode.h, and any attempt to use | |
1820 | -fbytecode will result in an error message. */ | |
1821 | ||
1822 | #define TARGET_SUPPORTS_BYTECODE | |
1823 | ||
1824 | /* Minimal segment alignment within sections is 8 units. */ | |
1825 | #define MACHINE_SEG_ALIGN 3 | |
1826 | ||
1827 | /* Integer alignment is two units. */ | |
1828 | #define INT_ALIGN 2 | |
1829 | ||
1830 | /* Pointer alignment is eight units. */ | |
1831 | #define PTR_ALIGN 3 | |
1832 | ||
1833 | /* Global symbols begin with `_' */ | |
1834 | #define NAMES_HAVE_UNDERSCORES | |
1835 | ||
1836 | /* BC_xxx below are similar to their ASM_xxx counterparts above. */ | |
1837 | #define BC_GLOBALIZE_LABEL(FP, NAME) bc_globalize_label(NAME) | |
1838 | ||
1839 | #define BC_OUTPUT_COMMON(FP, NAME, SIZE, ROUNDED) \ | |
1840 | do { bc_emit_common(NAME, ROUNDED); bc_globalize_label(NAME); } while (0) | |
1841 | ||
1842 | #define BC_OUTPUT_LOCAL(FP, NAME, SIZE, ROUNDED) \ | |
1843 | bc_emit_common(NAME, ROUNDED) | |
1844 | ||
1845 | #define BC_OUTPUT_ALIGN(FP, ALIGN) bc_align(ALIGN) | |
1846 | ||
1847 | #define BC_OUTPUT_LABEL(FP, NAME) bc_emit_labeldef(NAME) | |
1848 | ||
1849 | #define BC_OUTPUT_SKIP(FP, SIZE) bc_emit_skip(SIZE) | |
1850 | ||
1851 | #define BC_OUTPUT_LABELREF(FP, NAME) \ | |
1852 | do { \ | |
1853 | char *foo = (char *) xmalloc(strlen(NAME) + 2); \ | |
1854 | strcpy(foo, "_"); \ | |
1855 | strcat(foo, NAME); \ | |
1856 | bc_emit_labelref (foo); \ | |
1857 | free (foo); \ | |
1858 | } while (0) | |
1859 | ||
1860 | #define BC_OUTPUT_FLOAT(FP, VAL) \ | |
1861 | do { \ | |
1862 | float F = VAL; \ | |
1863 | bc_emit ((char *) &F, sizeof F); \ | |
1864 | } while (0) | |
1865 | ||
1866 | #define BC_OUTPUT_DOUBLE(FP, VAL) \ | |
1867 | do { \ | |
1868 | double D = VAL; \ | |
1869 | bc_emit ((char *) &D, sizeof D); \ | |
1870 | } while (0) | |
1871 | ||
1872 | #define BC_OUTPUT_BYTE(FP, VAL) \ | |
1873 | do { \ | |
1874 | char C = VAL; \ | |
1875 | bc_emit (&C, 1); \ | |
1876 | } while (0) | |
1877 | ||
1878 | ||
1879 | #define BC_OUTPUT_FILE ASM_OUTPUT_FILE | |
1880 | #define BC_OUTPUT_ASCII ASM_OUTPUT_ASCII | |
1881 | #define BC_OUTPUT_IDENT ASM_OUTPUT_IDENT | |
1882 | ||
1883 | /* Same as XSTR, but for bytecode */ | |
1884 | #define BCXSTR(RTX) ((RTX)->bc_label) | |
1885 | ||
1886 | ||
1887 | /* Flush bytecode buffer onto file */ | |
1888 | #define BC_WRITE_FILE(FP) \ | |
1889 | { \ | |
1890 | fprintf (FP, ".text\n"); \ | |
1891 | bc_seg_write (bc_text_seg, FP); \ | |
1892 | fprintf(FP, "\n.data\n"); \ | |
1893 | bc_seg_write (bc_data_seg, FP); \ | |
1894 | bc_sym_write (FP); /* do .globl, .bss, etc. */ \ | |
1895 | } | |
1896 | ||
1897 | /* Write one symbol */ | |
1898 | #define BC_WRITE_SEGSYM(SEGSYM, FP) \ | |
1899 | { \ | |
1900 | prsym (FP, (SEGSYM)->sym->name); \ | |
1901 | fprintf (FP, ":\n"); \ | |
1902 | } | |
1903 | ||
1904 | ||
1905 | /* Write one reloc entry */ | |
1906 | #define BC_WRITE_RELOC_ENTRY(SEGRELOC, FP, OFFSET) \ | |
1907 | { \ | |
1908 | fprintf (FP, "\t.long "); \ | |
1909 | prsym (FP, (SEGRELOC)->sym->name); \ | |
1910 | fprintf (FP, " + %d\n", OFFSET); \ | |
1911 | } | |
1912 | ||
1913 | /* Start new line of bytecodes */ | |
1914 | #define BC_START_BYTECODE_LINE(FP) \ | |
1915 | { \ | |
1916 | fprintf (FP, "\t.byte"); \ | |
1917 | } | |
1918 | ||
1919 | /* Write one bytecode */ | |
1920 | #define BC_WRITE_BYTECODE(SEP, VAL, FP) \ | |
1921 | { \ | |
1922 | fprintf (FP, "%c0x%02X", (SEP), (VAL) & 0xff); \ | |
1923 | } | |
1924 | ||
1925 | /* Write one bytecode RTL entry */ | |
1926 | #define BC_WRITE_RTL(R, FP) \ | |
1927 | { \ | |
1928 | fprintf (FP, "%s+%d/0x%08X\n", (R)->label, (R)->offset, (R)->bc_label); \ | |
1929 | } | |
1930 | ||
1931 | ||
1932 | /* Emit function entry trampoline */ | |
1933 | #define BC_EMIT_TRAMPOLINE(TRAMPSEG, CALLINFO) \ | |
1934 | { \ | |
1935 | short insn; \ | |
1936 | \ | |
1937 | /* Push a reference to the callinfo structure. */ \ | |
1938 | insn = 0x4879; /* pea xxx.L */ \ | |
1939 | seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ | |
1940 | seg_refsym (TRAMPSEG, CALLINFO, 0); \ | |
1941 | \ | |
1942 | /* Call __interp, pop arguments, and return. */ \ | |
1943 | insn = 0x4eb9; /* jsr xxx.L */ \ | |
1944 | seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ | |
1945 | seg_refsym (TRAMPSEG, "__callint", 0); \ | |
1946 | insn = 0x588f; /* addql #4, sp */ \ | |
1947 | seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ | |
1948 | insn = 0x4e75; /* rts */ \ | |
1949 | seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ | |
1950 | } | |
1951 | ||
1952 | ||
1953 | ||
1954 | #if 0 | |
1955 | #define VALIDATE_STACK() if (stack_depth < 0) abort (); | |
1956 | #else | |
1957 | #if 0 | |
1958 | #define VALIDATE_STACK() \ | |
1959 | fprintf (stderr, " %%%d%%", stack_depth); | |
1960 | #endif | |
1961 | #endif | |
1962 | ||
3d339ad2 RS |
1963 | /* Define functions defined in aux-output.c and used in templates. */ |
1964 | ||
8dbda09a | 1965 | extern char *output_move_const_into_data_reg (); |
3d339ad2 RS |
1966 | extern char *output_move_double (); |
1967 | extern char *output_move_const_single (); | |
1968 | extern char *output_move_const_double (); | |
1969 | extern char *output_btst (); | |
1970 | \f | |
1971 | /* | |
1972 | Local variables: | |
1973 | version-control: t | |
1974 | End: | |
1975 | */ |