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e65271be | 1 | /* Definitions of target machine GNU compiler. IA-64 version. |
cf011243 | 2 | Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc. |
c65ebc55 JW |
3 | Contributed by James E. Wilson <wilson@cygnus.com> and |
4 | David Mosberger <davidm@hpl.hp.com>. | |
5 | ||
6 | This file is part of GNU CC. | |
7 | ||
8 | GNU CC is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GNU CC is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GNU CC; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
c65ebc55 JW |
23 | /* ??? Look at ABI group documents for list of preprocessor macros and |
24 | other features required for ABI compliance. */ | |
25 | ||
26 | /* ??? Functions containing a non-local goto target save many registers. Why? | |
27 | See for instance execute/920428-2.c. */ | |
28 | ||
c65ebc55 JW |
29 | /* ??? Add support for short data/bss sections. */ |
30 | ||
31 | \f | |
32 | /* Run-time target specifications */ | |
33 | ||
34 | /* Define this to be a string constant containing `-D' options to define the | |
35 | predefined macros that identify this machine and system. These macros will | |
36 | be predefined unless the `-ansi' option is specified. */ | |
37 | /* ??? This is undefed in svr4.h. */ | |
2b57e919 | 38 | #define CPP_PREDEFINES "-Dia64 -Amachine=ia64" |
c65ebc55 JW |
39 | |
40 | /* This declaration should be present. */ | |
41 | extern int target_flags; | |
42 | ||
43 | /* This series of macros is to allow compiler command arguments to enable or | |
44 | disable the use of optional features of the target machine. */ | |
45 | ||
46 | #define MASK_BIG_ENDIAN 0x00000001 /* Generate big endian code. */ | |
47 | ||
48 | #define MASK_GNU_AS 0x00000002 /* Generate code for GNU as. */ | |
49 | ||
50 | #define MASK_GNU_LD 0x00000004 /* Generate code for GNU ld. */ | |
51 | ||
52 | #define MASK_NO_PIC 0x00000008 /* Generate code without GP reg. */ | |
53 | ||
54 | #define MASK_VOL_ASM_STOP 0x00000010 /* Emit stop bits for vol ext asm. */ | |
55 | ||
aebf2462 | 56 | /* 0x00000020 is available. */ |
c65ebc55 | 57 | |
099dde21 | 58 | #define MASK_B_STEP 0x00000040 /* Emit code for Itanium B step. */ |
c65ebc55 | 59 | |
099dde21 | 60 | #define MASK_REG_NAMES 0x00000080 /* Use in/loc/out register names. */ |
c65ebc55 | 61 | |
099dde21 | 62 | #define MASK_NO_SDATA 0x00000100 /* Disable sdata/scommon/sbss. */ |
59da9a7d | 63 | |
099dde21 BS |
64 | #define MASK_CONST_GP 0x00000200 /* treat gp as program-wide constant */ |
65 | ||
66 | #define MASK_AUTO_PIC 0x00000400 /* generate automatically PIC */ | |
59da9a7d | 67 | |
35d9f39d | 68 | #define MASK_INLINE_DIV_LAT 0x00000800 /* inline div, min latency. */ |
655f2eb9 | 69 | |
35d9f39d | 70 | #define MASK_INLINE_DIV_THR 0x00001000 /* inline div, max throughput. */ |
655f2eb9 | 71 | |
c65ebc55 JW |
72 | #define MASK_DWARF2_ASM 0x40000000 /* test dwarf2 line info via gas. */ |
73 | ||
74 | #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN) | |
75 | ||
76 | #define TARGET_GNU_AS (target_flags & MASK_GNU_AS) | |
77 | ||
78 | #define TARGET_GNU_LD (target_flags & MASK_GNU_LD) | |
79 | ||
80 | #define TARGET_NO_PIC (target_flags & MASK_NO_PIC) | |
81 | ||
82 | #define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP) | |
83 | ||
099dde21 BS |
84 | #define TARGET_B_STEP (target_flags & MASK_B_STEP) |
85 | ||
c65ebc55 JW |
86 | #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES) |
87 | ||
88 | #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA) | |
89 | ||
59da9a7d JW |
90 | #define TARGET_CONST_GP (target_flags & MASK_CONST_GP) |
91 | ||
92 | #define TARGET_AUTO_PIC (target_flags & MASK_AUTO_PIC) | |
93 | ||
655f2eb9 RH |
94 | #define TARGET_INLINE_DIV_LAT (target_flags & MASK_INLINE_DIV_LAT) |
95 | ||
96 | #define TARGET_INLINE_DIV_THR (target_flags & MASK_INLINE_DIV_THR) | |
97 | ||
98 | #define TARGET_INLINE_DIV \ | |
99 | (target_flags & (MASK_INLINE_DIV_LAT | MASK_INLINE_DIV_THR)) | |
100 | ||
c65ebc55 JW |
101 | #define TARGET_DWARF2_ASM (target_flags & MASK_DWARF2_ASM) |
102 | ||
103 | /* This macro defines names of command options to set and clear bits in | |
104 | `target_flags'. Its definition is an initializer with a subgrouping for | |
105 | each command option. */ | |
106 | ||
59da9a7d | 107 | #define TARGET_SWITCHES \ |
c65ebc55 JW |
108 | { \ |
109 | { "big-endian", MASK_BIG_ENDIAN, \ | |
047142d3 | 110 | N_("Generate big endian code") }, \ |
c65ebc55 | 111 | { "little-endian", -MASK_BIG_ENDIAN, \ |
047142d3 | 112 | N_("Generate little endian code") }, \ |
c65ebc55 | 113 | { "gnu-as", MASK_GNU_AS, \ |
047142d3 | 114 | N_("Generate code for GNU as") }, \ |
c65ebc55 | 115 | { "no-gnu-as", -MASK_GNU_AS, \ |
047142d3 | 116 | N_("Generate code for Intel as") }, \ |
c65ebc55 | 117 | { "gnu-ld", MASK_GNU_LD, \ |
047142d3 | 118 | N_("Generate code for GNU ld") }, \ |
c65ebc55 | 119 | { "no-gnu-ld", -MASK_GNU_LD, \ |
047142d3 | 120 | N_("Generate code for Intel ld") }, \ |
c65ebc55 | 121 | { "no-pic", MASK_NO_PIC, \ |
047142d3 | 122 | N_("Generate code without GP reg") }, \ |
c65ebc55 | 123 | { "volatile-asm-stop", MASK_VOL_ASM_STOP, \ |
047142d3 | 124 | N_("Emit stop bits before and after volatile extended asms") }, \ |
c65ebc55 | 125 | { "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \ |
047142d3 | 126 | N_("Don't emit stop bits before and after volatile extended asms") }, \ |
099dde21 BS |
127 | { "b-step", MASK_B_STEP, \ |
128 | N_("Emit code for Itanium (TM) processor B step")}, \ | |
c65ebc55 | 129 | { "register-names", MASK_REG_NAMES, \ |
047142d3 | 130 | N_("Use in/loc/out register names")}, \ |
c65ebc55 | 131 | { "no-sdata", MASK_NO_SDATA, \ |
047142d3 | 132 | N_("Disable use of sdata/scommon/sbss")}, \ |
c65ebc55 | 133 | { "sdata", -MASK_NO_SDATA, \ |
047142d3 | 134 | N_("Enable use of sdata/scommon/sbss")}, \ |
59da9a7d | 135 | { "constant-gp", MASK_CONST_GP, \ |
047142d3 | 136 | N_("gp is constant (but save/restore gp on indirect calls)") }, \ |
59da9a7d | 137 | { "auto-pic", MASK_AUTO_PIC, \ |
047142d3 | 138 | N_("Generate self-relocatable code") }, \ |
655f2eb9 RH |
139 | { "inline-divide-min-latency", MASK_INLINE_DIV_LAT, \ |
140 | N_("Generate inline division, optimize for latency") }, \ | |
141 | { "inline-divide-max-throughput", MASK_INLINE_DIV_THR, \ | |
142 | N_("Generate inline division, optimize for throughput") }, \ | |
c65ebc55 | 143 | { "dwarf2-asm", MASK_DWARF2_ASM, \ |
047142d3 | 144 | N_("Enable Dwarf 2 line debug info via GNU as")}, \ |
c65ebc55 | 145 | { "no-dwarf2-asm", -MASK_DWARF2_ASM, \ |
047142d3 | 146 | N_("Disable Dwarf 2 line debug info via GNU as")}, \ |
c65ebc55 JW |
147 | { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \ |
148 | NULL } \ | |
149 | } | |
150 | ||
151 | /* Default target_flags if no switches are specified */ | |
152 | ||
153 | #ifndef TARGET_DEFAULT | |
154 | #define TARGET_DEFAULT MASK_DWARF2_ASM | |
155 | #endif | |
156 | ||
157 | #ifndef TARGET_CPU_DEFAULT | |
158 | #define TARGET_CPU_DEFAULT 0 | |
159 | #endif | |
160 | ||
161 | /* This macro is similar to `TARGET_SWITCHES' but defines names of command | |
162 | options that have values. Its definition is an initializer with a | |
163 | subgrouping for each command option. */ | |
164 | ||
165 | extern const char *ia64_fixed_range_string; | |
166 | #define TARGET_OPTIONS \ | |
167 | { \ | |
168 | { "fixed-range=", &ia64_fixed_range_string, \ | |
047142d3 | 169 | N_("Specify range of registers to make fixed.")}, \ |
c65ebc55 JW |
170 | } |
171 | ||
172 | /* This macro is a C statement to print on `stderr' a string describing the | |
173 | particular machine description choice. */ | |
174 | ||
175 | #define TARGET_VERSION fprintf (stderr, " (IA-64)"); | |
176 | ||
177 | /* Sometimes certain combinations of command options do not make sense on a | |
178 | particular target machine. You can define a macro `OVERRIDE_OPTIONS' to | |
179 | take account of this. This macro, if defined, is executed once just after | |
180 | all the command options have been parsed. */ | |
181 | ||
182 | #define OVERRIDE_OPTIONS ia64_override_options () | |
183 | ||
184 | /* Some machines may desire to change what optimizations are performed for | |
185 | various optimization levels. This macro, if defined, is executed once just | |
186 | after the optimization level is determined and before the remainder of the | |
187 | command options have been parsed. Values set in this macro are used as the | |
188 | default values for the other command line options. */ | |
189 | ||
190 | /* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */ | |
c65ebc55 JW |
191 | \f |
192 | /* Driver configuration */ | |
193 | ||
194 | /* A C string constant that tells the GNU CC driver program options to pass to | |
195 | CPP. It can also specify how to translate options you give to GNU CC into | |
196 | options for GNU CC to pass to the CPP. */ | |
197 | ||
198 | /* ??? __LONG_MAX__ depends on LP64/ILP32 switch. */ | |
199 | /* ??? An alternative is to modify glimits.h to check for __LP64__ instead | |
200 | of checked for CPU specific defines. We could also get rid of all LONG_MAX | |
201 | defines in other tm.h files. */ | |
202 | #define CPP_SPEC \ | |
203 | "%{mcpu=itanium:-D__itanium__} %{mbig-endian:-D__BIG_ENDIAN__} \ | |
204 | -D__LONG_MAX__=9223372036854775807L" | |
205 | ||
206 | /* If this macro is defined, the preprocessor will not define the builtin macro | |
207 | `__SIZE_TYPE__'. The macro `__SIZE_TYPE__' must then be defined by | |
208 | `CPP_SPEC' instead. | |
209 | ||
210 | This should be defined if `SIZE_TYPE' depends on target dependent flags | |
211 | which are not accessible to the preprocessor. Otherwise, it should not be | |
212 | defined. */ | |
213 | /* ??? Needs to be defined for P64 code. */ | |
214 | /* #define NO_BUILTIN_SIZE_TYPE */ | |
215 | ||
216 | /* If this macro is defined, the preprocessor will not define the builtin macro | |
217 | `__PTRDIFF_TYPE__'. The macro `__PTRDIFF_TYPE__' must then be defined by | |
218 | `CPP_SPEC' instead. | |
219 | ||
220 | This should be defined if `PTRDIFF_TYPE' depends on target dependent flags | |
221 | which are not accessible to the preprocessor. Otherwise, it should not be | |
222 | defined. */ | |
223 | /* ??? Needs to be defined for P64 code. */ | |
224 | /* #define NO_BUILTIN_PTRDIFF_TYPE */ | |
225 | ||
226 | /* A C string constant that tells the GNU CC driver program options to pass to | |
227 | `cc1'. It can also specify how to translate options you give to GNU CC into | |
228 | options for GNU CC to pass to the `cc1'. */ | |
229 | ||
ad5042df JJ |
230 | #undef CC1_SPEC |
231 | #define CC1_SPEC "%{G*}" | |
c65ebc55 JW |
232 | |
233 | /* A C string constant that tells the GNU CC driver program options to pass to | |
234 | `cc1plus'. It can also specify how to translate options you give to GNU CC | |
235 | into options for GNU CC to pass to the `cc1plus'. */ | |
236 | ||
237 | /* #define CC1PLUS_SPEC "" */ | |
238 | ||
239 | /* A C string constant that tells the GNU CC driver program options to pass to | |
240 | the assembler. It can also specify how to translate options you give to GNU | |
241 | CC into options for GNU CC to pass to the assembler. */ | |
242 | ||
243 | #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_AS) != 0 | |
244 | /* GNU AS. */ | |
00e149c7 JW |
245 | #define ASM_SPEC \ |
246 | "%{mno-gnu-as:-N so} %{!mno-gnu-as:-x} %{mconstant-gp} %{mauto-pic}" | |
c65ebc55 JW |
247 | #else |
248 | /* Intel ias. */ | |
00e149c7 JW |
249 | #define ASM_SPEC \ |
250 | "%{!mgnu-as:-N so} %{mgnu-as:-x} %{mconstant-gp:-M const_gp}\ | |
251 | %{mauto-pic:-M no_plabel}" | |
c65ebc55 JW |
252 | #endif |
253 | ||
254 | /* A C string constant that tells the GNU CC driver program options to pass to | |
255 | the linker. It can also specify how to translate options you give to GNU CC | |
256 | into options for GNU CC to pass to the linker. */ | |
257 | ||
258 | /* The Intel linker does not support dynamic linking, so we need -dn. | |
259 | The Intel linker gives annoying messages unless -N so is used. */ | |
260 | #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_LD) != 0 | |
261 | /* GNU LD. */ | |
262 | #define LINK_SPEC "%{mno-gnu-ld:-dn -N so}" | |
263 | #else | |
264 | /* Intel ild. */ | |
265 | #define LINK_SPEC "%{!mgnu-ld:-dn -N so}" | |
266 | #endif | |
267 | ||
268 | \f | |
269 | /* Storage Layout */ | |
270 | ||
271 | /* Define this macro to have the value 1 if the most significant bit in a byte | |
272 | has the lowest number; otherwise define it to have the value zero. */ | |
273 | ||
274 | #define BITS_BIG_ENDIAN 0 | |
275 | ||
276 | /* Define this macro to have the value 1 if the most significant byte in a word | |
277 | has the lowest number. This macro need not be a constant. */ | |
278 | ||
279 | #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0) | |
280 | ||
281 | /* Define this macro to have the value 1 if, in a multiword object, the most | |
282 | significant word has the lowest number. */ | |
283 | ||
284 | #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0) | |
285 | ||
286 | /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must be a | |
287 | constant value with the same meaning as WORDS_BIG_ENDIAN, which will be used | |
288 | only when compiling libgcc2.c. Typically the value will be set based on | |
289 | preprocessor defines. */ | |
290 | #if defined(__BIG_ENDIAN__) | |
291 | #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
292 | #else | |
293 | #define LIBGCC2_WORDS_BIG_ENDIAN 0 | |
294 | #endif | |
295 | ||
296 | /* Define this macro to be the number of bits in an addressable storage unit | |
297 | (byte); normally 8. */ | |
298 | #define BITS_PER_UNIT 8 | |
299 | ||
300 | /* Number of bits in a word; normally 32. */ | |
301 | #define BITS_PER_WORD 64 | |
302 | ||
303 | /* Number of storage units in a word; normally 4. */ | |
304 | #define UNITS_PER_WORD 8 | |
305 | ||
306 | /* Width of a pointer, in bits. You must specify a value no wider than the | |
307 | width of `Pmode'. If it is not equal to the width of `Pmode', you must | |
308 | define `POINTERS_EXTEND_UNSIGNED'. */ | |
309 | /* ??? Implement optional 32 bit pointer size later? */ | |
310 | #define POINTER_SIZE 64 | |
311 | ||
312 | /* A C expression whose value is nonzero if pointers that need to be extended | |
313 | from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and zero if | |
314 | they are zero-extended. | |
315 | ||
316 | You need not define this macro if the `POINTER_SIZE' is equal to the width | |
317 | of `Pmode'. */ | |
318 | /* ??? May need this for 32 bit pointers. */ | |
319 | /* #define POINTERS_EXTEND_UNSIGNED */ | |
320 | ||
321 | /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and | |
322 | which has the specified mode and signedness is to be stored in a register. | |
323 | This macro is only called when TYPE is a scalar type. */ | |
c65ebc55 JW |
324 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ |
325 | do \ | |
326 | { \ | |
327 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
dcf6e674 RH |
328 | && GET_MODE_SIZE (MODE) < 4) \ |
329 | (MODE) = SImode; \ | |
c65ebc55 JW |
330 | } \ |
331 | while (0) | |
332 | ||
333 | /* Define this macro if the promotion described by `PROMOTE_MODE' should also | |
334 | be done for outgoing function arguments. */ | |
335 | /* ??? ABI doesn't allow us to define this. */ | |
336 | /* #define PROMOTE_FUNCTION_ARGS */ | |
337 | ||
338 | /* Define this macro if the promotion described by `PROMOTE_MODE' should also | |
339 | be done for the return value of functions. | |
340 | ||
341 | If this macro is defined, `FUNCTION_VALUE' must perform the same promotions | |
342 | done by `PROMOTE_MODE'. */ | |
343 | /* ??? ABI doesn't allow us to define this. */ | |
344 | /* #define PROMOTE_FUNCTION_RETURN */ | |
345 | ||
346 | /* Normal alignment required for function parameters on the stack, in bits. | |
347 | All stack parameters receive at least this much alignment regardless of data | |
348 | type. On most machines, this is the same as the size of an integer. */ | |
349 | #define PARM_BOUNDARY 64 | |
350 | ||
351 | /* Define this macro if you wish to preserve a certain alignment for the stack | |
352 | pointer. The definition is a C expression for the desired alignment | |
353 | (measured in bits). */ | |
354 | ||
355 | #define STACK_BOUNDARY 128 | |
356 | ||
357 | /* Align frames on double word boundaries */ | |
358 | #ifndef IA64_STACK_ALIGN | |
359 | #define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15) | |
360 | #endif | |
361 | ||
362 | /* Alignment required for a function entry point, in bits. */ | |
363 | #define FUNCTION_BOUNDARY 128 | |
364 | ||
365 | /* Biggest alignment that any data type can require on this machine, | |
366 | in bits. */ | |
367 | /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word | |
368 | 128 bit integers all require 128 bit alignment. */ | |
369 | #define BIGGEST_ALIGNMENT 128 | |
370 | ||
371 | /* If defined, a C expression to compute the alignment for a static variable. | |
372 | TYPE is the data type, and ALIGN is the alignment that the object | |
373 | would ordinarily have. The value of this macro is used instead of that | |
374 | alignment to align the object. */ | |
375 | ||
376 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
377 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
378 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
379 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
380 | ||
381 | /* If defined, a C expression to compute the alignment given to a constant that | |
382 | is being placed in memory. CONSTANT is the constant and ALIGN is the | |
383 | alignment that the object would ordinarily have. The value of this macro is | |
384 | used instead of that alignment to align the object. */ | |
385 | ||
386 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
387 | (TREE_CODE (EXP) == STRING_CST \ | |
388 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
389 | ||
390 | /* Define this macro to be the value 1 if instructions will fail to work if | |
391 | given data not on the nominal alignment. If instructions will merely go | |
392 | slower in that case, define this macro as 0. */ | |
393 | #define STRICT_ALIGNMENT 1 | |
394 | ||
395 | /* Define this if you wish to imitate the way many other C compilers handle | |
396 | alignment of bitfields and the structures that contain them. | |
397 | The behavior is that the type written for a bitfield (`int', `short', or | |
398 | other integer type) imposes an alignment for the entire structure, as if the | |
399 | structure really did contain an ordinary field of that type. In addition, | |
400 | the bitfield is placed within the structure so that it would fit within such | |
401 | a field, not crossing a boundary for it. */ | |
402 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
403 | ||
c65ebc55 JW |
404 | /* An integer expression for the size in bits of the largest integer machine |
405 | mode that should actually be used. */ | |
406 | ||
407 | /* Allow pairs of registers to be used, which is the intent of the default. */ | |
408 | #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
409 | ||
410 | /* A code distinguishing the floating point format of the target machine. */ | |
411 | #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT | |
412 | ||
413 | /* GNU CC supports two ways of implementing C++ vtables: traditional or with | |
414 | so-called "thunks". The flag `-fvtable-thunk' chooses between them. Define | |
415 | this macro to be a C expression for the default value of that flag. If | |
416 | `DEFAULT_VTABLE_THUNKS' is 0, GNU CC uses the traditional implementation by | |
417 | default. The "thunk" implementation is more efficient (especially if you | |
418 | have provided an implementation of `ASM_OUTPUT_MI_THUNK', but is not binary | |
419 | compatible with code compiled using the traditional implementation. If you | |
420 | are writing a new ports, define `DEFAULT_VTABLE_THUNKS' to 1. | |
421 | ||
422 | If you do not define this macro, the default for `-fvtable-thunk' is 0. */ | |
423 | #define DEFAULT_VTABLE_THUNKS 1 | |
424 | ||
425 | \f | |
426 | /* Layout of Source Language Data Types */ | |
427 | ||
428 | /* A C expression for the size in bits of the type `int' on the target machine. | |
429 | If you don't define this, the default is one word. */ | |
430 | #define INT_TYPE_SIZE 32 | |
431 | ||
432 | /* A C expression for the size in bits of the type `short' on the target | |
433 | machine. If you don't define this, the default is half a word. (If this | |
434 | would be less than one storage unit, it is rounded up to one unit.) */ | |
435 | #define SHORT_TYPE_SIZE 16 | |
436 | ||
437 | /* A C expression for the size in bits of the type `long' on the target | |
438 | machine. If you don't define this, the default is one word. */ | |
439 | /* ??? Should be 32 for ILP32 code. */ | |
440 | #define LONG_TYPE_SIZE 64 | |
441 | ||
442 | /* Maximum number for the size in bits of the type `long' on the target | |
443 | machine. If this is undefined, the default is `LONG_TYPE_SIZE'. Otherwise, | |
444 | it is the constant value that is the largest value that `LONG_TYPE_SIZE' can | |
445 | have at run-time. This is used in `cpp'. */ | |
446 | /* ??? Should be 64 for ILP32 code. */ | |
447 | /* #define MAX_LONG_TYPE_SIZE */ | |
448 | ||
449 | /* A C expression for the size in bits of the type `long long' on the target | |
450 | machine. If you don't define this, the default is two words. If you want | |
451 | to support GNU Ada on your machine, the value of macro must be at least 64. */ | |
452 | #define LONG_LONG_TYPE_SIZE 64 | |
453 | ||
454 | /* A C expression for the size in bits of the type `char' on the target | |
455 | machine. If you don't define this, the default is one quarter of a word. | |
456 | (If this would be less than one storage unit, it is rounded up to one unit.) */ | |
457 | #define CHAR_TYPE_SIZE 8 | |
458 | ||
459 | /* A C expression for the size in bits of the type `float' on the target | |
460 | machine. If you don't define this, the default is one word. */ | |
461 | #define FLOAT_TYPE_SIZE 32 | |
462 | ||
463 | /* A C expression for the size in bits of the type `double' on the target | |
464 | machine. If you don't define this, the default is two words. */ | |
465 | #define DOUBLE_TYPE_SIZE 64 | |
466 | ||
467 | /* A C expression for the size in bits of the type `long double' on the target | |
468 | machine. If you don't define this, the default is two words. */ | |
3f622353 RH |
469 | #define LONG_DOUBLE_TYPE_SIZE 128 |
470 | ||
471 | /* Tell real.c that this is the 80-bit Intel extended float format | |
472 | packaged in a 128-bit entity. */ | |
473 | #define INTEL_EXTENDED_IEEE_FORMAT | |
c65ebc55 JW |
474 | |
475 | /* An expression whose value is 1 or 0, according to whether the type `char' | |
476 | should be signed or unsigned by default. The user can always override this | |
477 | default with the options `-fsigned-char' and `-funsigned-char'. */ | |
478 | #define DEFAULT_SIGNED_CHAR 1 | |
479 | ||
480 | /* A C expression for a string describing the name of the data type to use for | |
481 | size values. The typedef name `size_t' is defined using the contents of the | |
482 | string. */ | |
483 | /* ??? Needs to be defined for P64 code. */ | |
484 | /* #define SIZE_TYPE */ | |
485 | ||
486 | /* A C expression for a string describing the name of the data type to use for | |
487 | the result of subtracting two pointers. The typedef name `ptrdiff_t' is | |
488 | defined using the contents of the string. See `SIZE_TYPE' above for more | |
489 | information. */ | |
490 | /* ??? Needs to be defined for P64 code. */ | |
491 | /* #define PTRDIFF_TYPE */ | |
492 | ||
493 | /* A C expression for a string describing the name of the data type to use for | |
494 | wide characters. The typedef name `wchar_t' is defined using the contents | |
495 | of the string. See `SIZE_TYPE' above for more information. */ | |
496 | /* #define WCHAR_TYPE */ | |
497 | ||
498 | /* A C expression for the size in bits of the data type for wide characters. | |
499 | This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */ | |
500 | /* #define WCHAR_TYPE_SIZE */ | |
501 | ||
502 | /* Maximum number for the size in bits of the data type for wide characters. | |
503 | If this is undefined, the default is `WCHAR_TYPE_SIZE'. Otherwise, it is | |
504 | the constant value that is the largest value that `WCHAR_TYPE_SIZE' can have | |
505 | at run-time. This is used in `cpp'. */ | |
506 | /* #define MAX_WCHAR_TYPE_SIZE */ | |
507 | ||
508 | /* A C constant expression for the integer value for escape sequence | |
509 | `\a'. */ | |
510 | #define TARGET_BELL 0x7 | |
511 | ||
512 | /* C constant expressions for the integer values for escape sequences | |
513 | `\b', `\t' and `\n'. */ | |
514 | #define TARGET_BS 0x8 | |
515 | #define TARGET_TAB 0x9 | |
516 | #define TARGET_NEWLINE 0xa | |
517 | ||
518 | /* C constant expressions for the integer values for escape sequences | |
519 | `\v', `\f' and `\r'. */ | |
520 | #define TARGET_VT 0xb | |
521 | #define TARGET_FF 0xc | |
522 | #define TARGET_CR 0xd | |
523 | ||
524 | \f | |
525 | /* Register Basics */ | |
526 | ||
527 | /* Number of hardware registers known to the compiler. | |
5527bf14 RH |
528 | We have 128 general registers, 128 floating point registers, |
529 | 64 predicate registers, 8 branch registers, one frame pointer, | |
530 | and several "application" registers. */ | |
c65ebc55 | 531 | |
97e242b0 | 532 | #define FIRST_PSEUDO_REGISTER 335 |
c65ebc55 JW |
533 | |
534 | /* Ranges for the various kinds of registers. */ | |
3b572406 RH |
535 | #define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3) |
536 | #define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127) | |
c65ebc55 JW |
537 | #define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255) |
538 | #define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319) | |
539 | #define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327) | |
540 | #define GENERAL_REGNO_P(REGNO) \ | |
541 | (GR_REGNO_P (REGNO) \ | |
542 | || (REGNO) == FRAME_POINTER_REGNUM \ | |
46327bc5 | 543 | || (REGNO) == RETURN_ADDRESS_POINTER_REGNUM) |
c65ebc55 JW |
544 | |
545 | #define GR_REG(REGNO) ((REGNO) + 0) | |
546 | #define FR_REG(REGNO) ((REGNO) + 128) | |
547 | #define PR_REG(REGNO) ((REGNO) + 256) | |
548 | #define BR_REG(REGNO) ((REGNO) + 320) | |
549 | #define OUT_REG(REGNO) ((REGNO) + 120) | |
550 | #define IN_REG(REGNO) ((REGNO) + 112) | |
551 | #define LOC_REG(REGNO) ((REGNO) + 32) | |
552 | ||
5527bf14 | 553 | #define AR_CCV_REGNUM 330 |
97e242b0 RH |
554 | #define AR_UNAT_REGNUM 331 |
555 | #define AR_PFS_REGNUM 332 | |
556 | #define AR_LC_REGNUM 333 | |
557 | #define AR_EC_REGNUM 334 | |
5527bf14 | 558 | |
c65ebc55 JW |
559 | #define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7)) |
560 | #define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79)) | |
561 | #define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7)) | |
562 | ||
97e242b0 RH |
563 | #define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \ |
564 | || (REGNO) == AR_UNAT_REGNUM) | |
565 | #define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \ | |
5527bf14 RH |
566 | && (REGNO) < FIRST_PSEUDO_REGISTER) |
567 | #define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \ | |
568 | && (REGNO) < FIRST_PSEUDO_REGISTER) | |
569 | ||
570 | ||
c65ebc55 JW |
571 | /* ??? Don't really need two sets of macros. I like this one better because |
572 | it is less typing. */ | |
573 | #define R_GR(REGNO) GR_REG (REGNO) | |
574 | #define R_FR(REGNO) FR_REG (REGNO) | |
575 | #define R_PR(REGNO) PR_REG (REGNO) | |
576 | #define R_BR(REGNO) BR_REG (REGNO) | |
577 | ||
578 | /* An initializer that says which registers are used for fixed purposes all | |
579 | throughout the compiled code and are therefore not available for general | |
580 | allocation. | |
581 | ||
582 | r0: constant 0 | |
583 | r1: global pointer (gp) | |
584 | r12: stack pointer (sp) | |
585 | r13: thread pointer (tp) | |
586 | f0: constant 0.0 | |
587 | f1: constant 1.0 | |
588 | p0: constant true | |
589 | fp: eliminable frame pointer */ | |
590 | ||
1ff5b671 JW |
591 | /* The last 16 stacked regs are reserved for the 8 input and 8 output |
592 | registers. */ | |
c65ebc55 | 593 | |
c65ebc55 JW |
594 | #define FIXED_REGISTERS \ |
595 | { /* General registers. */ \ | |
596 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \ | |
597 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
598 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
599 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
600 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
601 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
97e242b0 | 602 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
1ff5b671 | 603 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
c65ebc55 JW |
604 | /* Floating-point registers. */ \ |
605 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
606 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
607 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
608 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
609 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
610 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
611 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
612 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
613 | /* Predicate registers. */ \ | |
614 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
615 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
616 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
617 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
618 | /* Branch registers. */ \ | |
619 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
97e242b0 RH |
620 | /*FP RA CCV UNAT PFS LC EC */ \ |
621 | 1, 1, 1, 1, 1, 0, 1 \ | |
c65ebc55 JW |
622 | } |
623 | ||
5527bf14 RH |
624 | /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered |
625 | (in general) by function calls as well as for fixed registers. This | |
626 | macro therefore identifies the registers that are not available for | |
627 | general allocation of values that must live across function calls. */ | |
c65ebc55 | 628 | |
c65ebc55 JW |
629 | #define CALL_USED_REGISTERS \ |
630 | { /* General registers. */ \ | |
631 | 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
632 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
633 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
634 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
635 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
636 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
97e242b0 | 637 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
1ff5b671 | 638 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \ |
c65ebc55 JW |
639 | /* Floating-point registers. */ \ |
640 | 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
641 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
642 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
643 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
644 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
645 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
646 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
647 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
648 | /* Predicate registers. */ \ | |
649 | 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
650 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
651 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
652 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
653 | /* Branch registers. */ \ | |
654 | 1, 0, 0, 0, 0, 0, 1, 1, \ | |
97e242b0 RH |
655 | /*FP RA CCV UNAT PFS LC EC */ \ |
656 | 1, 1, 1, 1, 1, 0, 1 \ | |
c65ebc55 JW |
657 | } |
658 | ||
659 | /* Define this macro if the target machine has register windows. This C | |
660 | expression returns the register number as seen by the called function | |
661 | corresponding to the register number OUT as seen by the calling function. | |
662 | Return OUT if register number OUT is not an outbound register. */ | |
663 | ||
664 | #define INCOMING_REGNO(OUT) \ | |
665 | ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT)) | |
666 | ||
667 | /* Define this macro if the target machine has register windows. This C | |
668 | expression returns the register number as seen by the calling function | |
669 | corresponding to the register number IN as seen by the called function. | |
670 | Return IN if register number IN is not an inbound register. */ | |
671 | ||
672 | #define OUTGOING_REGNO(IN) \ | |
673 | ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN)) | |
674 | ||
2a3e384f RH |
675 | /* Define this macro if the target machine has register windows. This |
676 | C expression returns true if the register is call-saved but is in the | |
677 | register window. */ | |
678 | ||
679 | #define LOCAL_REGNO(REGNO) \ | |
680 | (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO)) | |
97e242b0 RH |
681 | |
682 | /* Add any extra modes needed to represent the condition code. | |
683 | ||
684 | CCImode is used to mark a single predicate register instead | |
685 | of a register pair. This is currently only used in reg_raw_mode | |
686 | so that flow doesn't do something stupid. */ | |
687 | ||
688 | #define EXTRA_CC_MODES CC(CCImode, "CCI") | |
689 | ||
690 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
691 | return the mode to be used for the comparison. Must be defined if | |
692 | EXTRA_CC_MODES is defined. */ | |
693 | ||
694 | #define SELECT_CC_MODE(OP,X,Y) CCmode | |
c65ebc55 JW |
695 | \f |
696 | /* Order of allocation of registers */ | |
697 | ||
698 | /* If defined, an initializer for a vector of integers, containing the numbers | |
699 | of hard registers in the order in which GNU CC should prefer to use them | |
700 | (from most preferred to least). | |
701 | ||
702 | If this macro is not defined, registers are used lowest numbered first (all | |
703 | else being equal). | |
704 | ||
705 | One use of this macro is on machines where the highest numbered registers | |
706 | must always be saved and the save-multiple-registers instruction supports | |
707 | only sequences of consecutive registers. On such machines, define | |
708 | `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered | |
709 | allocatable register first. */ | |
710 | ||
711 | /* ??? Should the GR return value registers come before or after the rest | |
712 | of the caller-save GRs? */ | |
713 | ||
97e242b0 | 714 | #define REG_ALLOC_ORDER \ |
c65ebc55 JW |
715 | { \ |
716 | /* Caller-saved general registers. */ \ | |
97e242b0 RH |
717 | R_GR (14), R_GR (15), R_GR (16), R_GR (17), \ |
718 | R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \ | |
719 | R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \ | |
c65ebc55 | 720 | R_GR (30), R_GR (31), \ |
1ff5b671 JW |
721 | /* Output registers. */ \ |
722 | R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \ | |
97e242b0 | 723 | R_GR (126), R_GR (127), \ |
c65ebc55 | 724 | /* Caller-saved general registers, also used for return values. */ \ |
97e242b0 | 725 | R_GR (8), R_GR (9), R_GR (10), R_GR (11), \ |
c65ebc55 JW |
726 | /* addl caller-saved general registers. */ \ |
727 | R_GR (2), R_GR (3), \ | |
728 | /* Caller-saved FP registers. */ \ | |
729 | R_FR (6), R_FR (7), \ | |
730 | /* Caller-saved FP registers, used for parameters and return values. */ \ | |
97e242b0 RH |
731 | R_FR (8), R_FR (9), R_FR (10), R_FR (11), \ |
732 | R_FR (12), R_FR (13), R_FR (14), R_FR (15), \ | |
c65ebc55 | 733 | /* Rotating caller-saved FP registers. */ \ |
97e242b0 RH |
734 | R_FR (32), R_FR (33), R_FR (34), R_FR (35), \ |
735 | R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \ | |
736 | R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \ | |
737 | R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \ | |
738 | R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \ | |
739 | R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \ | |
740 | R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \ | |
741 | R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \ | |
742 | R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \ | |
743 | R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \ | |
744 | R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \ | |
745 | R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \ | |
c65ebc55 JW |
746 | R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \ |
747 | R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \ | |
748 | R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \ | |
749 | R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \ | |
97e242b0 | 750 | R_FR (126), R_FR (127), \ |
c65ebc55 | 751 | /* Caller-saved predicate registers. */ \ |
97e242b0 | 752 | R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \ |
c65ebc55 JW |
753 | R_PR (12), R_PR (13), R_PR (14), R_PR (15), \ |
754 | /* Rotating caller-saved predicate registers. */ \ | |
97e242b0 RH |
755 | R_PR (16), R_PR (17), \ |
756 | R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \ | |
757 | R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \ | |
758 | R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \ | |
759 | R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \ | |
760 | R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \ | |
761 | R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \ | |
762 | R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \ | |
763 | R_PR (60), R_PR (61), R_PR (62), R_PR (63), \ | |
c65ebc55 JW |
764 | /* Caller-saved branch registers. */ \ |
765 | R_BR (6), R_BR (7), \ | |
766 | \ | |
767 | /* Stacked callee-saved general registers. */ \ | |
97e242b0 RH |
768 | R_GR (32), R_GR (33), R_GR (34), R_GR (35), \ |
769 | R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \ | |
770 | R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \ | |
771 | R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \ | |
772 | R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \ | |
773 | R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \ | |
774 | R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \ | |
775 | R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \ | |
776 | R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \ | |
777 | R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \ | |
778 | R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \ | |
779 | R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \ | |
c65ebc55 JW |
780 | R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \ |
781 | R_GR (108), \ | |
1ff5b671 JW |
782 | /* Input registers. */ \ |
783 | R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \ | |
784 | R_GR (118), R_GR (119), \ | |
c65ebc55 JW |
785 | /* Callee-saved general registers. */ \ |
786 | R_GR (4), R_GR (5), R_GR (6), R_GR (7), \ | |
787 | /* Callee-saved FP registers. */ \ | |
97e242b0 RH |
788 | R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \ |
789 | R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \ | |
790 | R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \ | |
c65ebc55 JW |
791 | R_FR (30), R_FR (31), \ |
792 | /* Callee-saved predicate registers. */ \ | |
97e242b0 | 793 | R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \ |
c65ebc55 JW |
794 | /* Callee-saved branch registers. */ \ |
795 | R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \ | |
796 | \ | |
797 | /* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \ | |
798 | R_GR (109), R_GR (110), R_GR (111), \ | |
c65ebc55 JW |
799 | \ |
800 | /* Special general registers. */ \ | |
97e242b0 | 801 | R_GR (0), R_GR (1), R_GR (12), R_GR (13), \ |
c65ebc55 JW |
802 | /* Special FP registers. */ \ |
803 | R_FR (0), R_FR (1), \ | |
804 | /* Special predicate registers. */ \ | |
805 | R_PR (0), \ | |
806 | /* Special branch registers. */ \ | |
807 | R_BR (0), \ | |
5527bf14 | 808 | /* Other fixed registers. */ \ |
46327bc5 | 809 | FRAME_POINTER_REGNUM, RETURN_ADDRESS_POINTER_REGNUM, \ |
97e242b0 RH |
810 | AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \ |
811 | AR_EC_REGNUM \ | |
c65ebc55 | 812 | } |
c65ebc55 JW |
813 | \f |
814 | /* How Values Fit in Registers */ | |
815 | ||
816 | /* A C expression for the number of consecutive hard registers, starting at | |
817 | register number REGNO, required to hold a value of mode MODE. */ | |
818 | ||
f2f90c63 | 819 | /* ??? We say that BImode PR values require two registers. This allows us to |
97e242b0 RH |
820 | easily store the normal and inverted values. We use CCImode to indicate |
821 | a single predicate register. */ | |
c65ebc55 | 822 | |
97e242b0 RH |
823 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
824 | ((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \ | |
f2f90c63 | 825 | : PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \ |
97e242b0 | 826 | : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \ |
3f622353 | 827 | : FR_REGNO_P (REGNO) && (MODE) == TFmode ? 1 \ |
c65ebc55 JW |
828 | : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
829 | ||
830 | /* A C expression that is nonzero if it is permissible to store a value of mode | |
831 | MODE in hard register number REGNO (or in several registers starting with | |
832 | that one). */ | |
0ea1e106 | 833 | |
f2f90c63 RH |
834 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
835 | (FR_REGNO_P (REGNO) ? \ | |
836 | GET_MODE_CLASS (MODE) != MODE_CC && (MODE) != TImode && (MODE) != BImode \ | |
837 | : PR_REGNO_P (REGNO) ? \ | |
838 | (MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \ | |
839 | : GR_REGNO_P (REGNO) ? (MODE) != CCImode && (MODE) != TFmode \ | |
840 | : AR_REGNO_P (REGNO) ? (MODE) == DImode \ | |
841 | : BR_REGNO_P (REGNO) ? (MODE) == DImode \ | |
3f622353 | 842 | : 0) |
c65ebc55 JW |
843 | |
844 | /* A C expression that is nonzero if it is desirable to choose register | |
845 | allocation so as to avoid move instructions between a value of mode MODE1 | |
846 | and a value of mode MODE2. | |
847 | ||
848 | If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are | |
849 | ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be | |
850 | zero. */ | |
ad06f2e3 | 851 | /* Don't tie integer and FP modes, as that causes us to get integer registers |
3f622353 RH |
852 | allocated for FP instructions. TFmode only supported in FP registers so |
853 | we can't tie it with any other modes. */ | |
f2f90c63 RH |
854 | #define MODES_TIEABLE_P(MODE1, MODE2) \ |
855 | (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \ | |
856 | && (((MODE1) == TFmode) == ((MODE2) == TFmode)) \ | |
857 | && (((MODE1) == BImode) == ((MODE2) == BImode))) | |
c65ebc55 JW |
858 | \f |
859 | /* Handling Leaf Functions */ | |
860 | ||
861 | /* A C initializer for a vector, indexed by hard register number, which | |
862 | contains 1 for a register that is allowable in a candidate for leaf function | |
863 | treatment. */ | |
864 | /* ??? This might be useful. */ | |
865 | /* #define LEAF_REGISTERS */ | |
866 | ||
867 | /* A C expression whose value is the register number to which REGNO should be | |
868 | renumbered, when a function is treated as a leaf function. */ | |
869 | /* ??? This might be useful. */ | |
870 | /* #define LEAF_REG_REMAP(REGNO) */ | |
871 | ||
872 | \f | |
873 | /* Register Classes */ | |
874 | ||
875 | /* An enumeral type that must be defined with all the register class names as | |
876 | enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last | |
877 | register class, followed by one more enumeral value, `LIM_REG_CLASSES', | |
878 | which is not a register class but rather tells how many classes there | |
879 | are. */ | |
c65ebc55 JW |
880 | /* ??? When compiling without optimization, it is possible for the only use of |
881 | a pseudo to be a parameter load from the stack with a REG_EQUIV note. | |
882 | Regclass handles this case specially and does not assign any costs to the | |
883 | pseudo. The pseudo then ends up using the last class before ALL_REGS. | |
884 | Thus we must not let either PR_REGS or BR_REGS be the last class. The | |
885 | testcase for this is gcc.c-torture/execute/va-arg-7.c. */ | |
886 | enum reg_class | |
887 | { | |
888 | NO_REGS, | |
889 | PR_REGS, | |
890 | BR_REGS, | |
891 | ADDL_REGS, | |
892 | GR_REGS, | |
c65ebc55 | 893 | FR_REGS, |
c65ebc55 | 894 | GR_AND_FR_REGS, |
5527bf14 RH |
895 | AR_M_REGS, |
896 | AR_I_REGS, | |
c65ebc55 JW |
897 | ALL_REGS, |
898 | LIM_REG_CLASSES | |
899 | }; | |
900 | ||
901 | #define GENERAL_REGS GR_REGS | |
902 | ||
903 | /* The number of distinct register classes. */ | |
904 | #define N_REG_CLASSES ((int) LIM_REG_CLASSES) | |
905 | ||
906 | /* An initializer containing the names of the register classes as C string | |
907 | constants. These names are used in writing some of the debugging dumps. */ | |
908 | #define REG_CLASS_NAMES \ | |
f2f90c63 RH |
909 | { "NO_REGS", "PR_REGS", "BR_REGS", "ADDL_REGS", "GR_REGS", "FR_REGS", \ |
910 | "GR_AND_FR_REGS", "AR_M_REGS", "AR_I_REGS", "ALL_REGS" } | |
c65ebc55 JW |
911 | |
912 | /* An initializer containing the contents of the register classes, as integers | |
913 | which are bit masks. The Nth integer specifies the contents of class N. | |
914 | The way the integer MASK is interpreted is that register R is in the class | |
915 | if `MASK & (1 << R)' is 1. */ | |
916 | #define REG_CLASS_CONTENTS \ | |
917 | { \ | |
918 | /* NO_REGS. */ \ | |
919 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
920 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
5527bf14 | 921 | 0x00000000, 0x00000000, 0x0000 }, \ |
c65ebc55 JW |
922 | /* PR_REGS. */ \ |
923 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
924 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
5527bf14 | 925 | 0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \ |
c65ebc55 JW |
926 | /* BR_REGS. */ \ |
927 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
928 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
5527bf14 | 929 | 0x00000000, 0x00000000, 0x00FF }, \ |
c65ebc55 JW |
930 | /* ADDL_REGS. */ \ |
931 | { 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \ | |
932 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
5527bf14 | 933 | 0x00000000, 0x00000000, 0x0000 }, \ |
c65ebc55 JW |
934 | /* GR_REGS. */ \ |
935 | { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ | |
936 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
5527bf14 | 937 | 0x00000000, 0x00000000, 0x0300 }, \ |
c65ebc55 JW |
938 | /* FR_REGS. */ \ |
939 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
940 | 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ | |
5527bf14 | 941 | 0x00000000, 0x00000000, 0x0000 }, \ |
c65ebc55 JW |
942 | /* GR_AND_FR_REGS. */ \ |
943 | { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ | |
944 | 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ | |
5527bf14 RH |
945 | 0x00000000, 0x00000000, 0x0300 }, \ |
946 | /* AR_M_REGS. */ \ | |
947 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
948 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
97e242b0 | 949 | 0x00000000, 0x00000000, 0x0C00 }, \ |
5527bf14 RH |
950 | /* AR_I_REGS. */ \ |
951 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
952 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, \ | |
97e242b0 | 953 | 0x00000000, 0x00000000, 0x7000 }, \ |
c65ebc55 JW |
954 | /* ALL_REGS. */ \ |
955 | { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ | |
956 | 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ | |
97e242b0 | 957 | 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFF }, \ |
c65ebc55 JW |
958 | } |
959 | ||
960 | /* A C expression whose value is a register class containing hard register | |
961 | REGNO. In general there is more than one such class; choose a class which | |
962 | is "minimal", meaning that no smaller class also contains the register. */ | |
963 | /* The NO_REGS case is primarily for the benefit of rws_access_reg, which | |
964 | may call here with private (invalid) register numbers, such as | |
965 | REG_VOLATILE. */ | |
966 | #define REGNO_REG_CLASS(REGNO) \ | |
967 | (ADDL_REGNO_P (REGNO) ? ADDL_REGS \ | |
968 | : GENERAL_REGNO_P (REGNO) ? GR_REGS \ | |
13da91fd | 969 | : FR_REGNO_P (REGNO) ? FR_REGS \ |
c65ebc55 JW |
970 | : PR_REGNO_P (REGNO) ? PR_REGS \ |
971 | : BR_REGNO_P (REGNO) ? BR_REGS \ | |
97e242b0 RH |
972 | : AR_M_REGNO_P (REGNO) ? AR_M_REGS \ |
973 | : AR_I_REGNO_P (REGNO) ? AR_I_REGS \ | |
c65ebc55 JW |
974 | : NO_REGS) |
975 | ||
976 | /* A macro whose definition is the name of the class to which a valid base | |
977 | register must belong. A base register is one used in an address which is | |
978 | the register value plus a displacement. */ | |
979 | #define BASE_REG_CLASS GENERAL_REGS | |
980 | ||
981 | /* A macro whose definition is the name of the class to which a valid index | |
982 | register must belong. An index register is one used in an address where its | |
983 | value is either multiplied by a scale factor or added to another register | |
cf606f45 JW |
984 | (as well as added to a displacement). This is needed for POST_MODIFY. */ |
985 | #define INDEX_REG_CLASS GENERAL_REGS | |
c65ebc55 JW |
986 | |
987 | /* A C expression which defines the machine-dependent operand constraint | |
988 | letters for register classes. If CHAR is such a letter, the value should be | |
989 | the register class corresponding to it. Otherwise, the value should be | |
990 | `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS', | |
991 | will not be passed to this macro; you do not need to handle it. */ | |
992 | ||
993 | #define REG_CLASS_FROM_LETTER(CHAR) \ | |
13da91fd | 994 | ((CHAR) == 'f' ? FR_REGS \ |
c65ebc55 JW |
995 | : (CHAR) == 'a' ? ADDL_REGS \ |
996 | : (CHAR) == 'b' ? BR_REGS \ | |
997 | : (CHAR) == 'c' ? PR_REGS \ | |
5527bf14 RH |
998 | : (CHAR) == 'd' ? AR_M_REGS \ |
999 | : (CHAR) == 'e' ? AR_I_REGS \ | |
c65ebc55 JW |
1000 | : NO_REGS) |
1001 | ||
1002 | /* A C expression which is nonzero if register number NUM is suitable for use | |
1003 | as a base register in operand addresses. It may be either a suitable hard | |
1004 | register or a pseudo register that has been allocated such a hard reg. */ | |
1005 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1006 | (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO])) | |
1007 | ||
1008 | /* A C expression which is nonzero if register number NUM is suitable for use | |
1009 | as an index register in operand addresses. It may be either a suitable hard | |
cf606f45 JW |
1010 | register or a pseudo register that has been allocated such a hard reg. |
1011 | This is needed for POST_MODIFY. */ | |
1012 | #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM) | |
c65ebc55 JW |
1013 | |
1014 | /* A C expression that places additional restrictions on the register class to | |
1015 | use when it is necessary to copy value X into a register in class CLASS. | |
1016 | The value is a register class; perhaps CLASS, or perhaps another, smaller | |
1017 | class. */ | |
1018 | ||
ffaff414 JW |
1019 | /* Don't allow volatile mem reloads into floating point registers. This |
1020 | is defined to force reload to choose the r/m case instead of the f/f case | |
f2f90c63 RH |
1021 | when reloading (set (reg fX) (mem/v)). |
1022 | ||
1023 | Do not reload expressions into AR regs. */ | |
ffaff414 JW |
1024 | |
1025 | #define PREFERRED_RELOAD_CLASS(X, CLASS) \ | |
f2f90c63 | 1026 | (CLASS == FR_REGS && GET_CODE (X) == MEM && MEM_VOLATILE_P (X) ? NO_REGS \ |
036099eb | 1027 | : CLASS == FR_REGS && GET_CODE (X) == CONST_DOUBLE ? NO_REGS \ |
f2f90c63 | 1028 | : GET_RTX_CLASS (GET_CODE (X)) != 'o' && CLASS > GR_AND_FR_REGS ? NO_REGS \ |
ffaff414 | 1029 | : CLASS) |
c65ebc55 JW |
1030 | |
1031 | /* You should define this macro to indicate to the reload phase that it may | |
1032 | need to allocate at least one register for a reload in addition to the | |
1033 | register to contain the data. Specifically, if copying X to a register | |
1034 | CLASS in MODE requires an intermediate register, you should define this | |
1035 | to return the largest register class all of whose registers can be used | |
1036 | as intermediate registers or scratch registers. */ | |
1037 | ||
1038 | #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ | |
1039 | ia64_secondary_reload_class (CLASS, MODE, X) | |
1040 | ||
1041 | /* Certain machines have the property that some registers cannot be copied to | |
1042 | some other registers without using memory. Define this macro on those | |
1043 | machines to be a C expression that is non-zero if objects of mode M in | |
1044 | registers of CLASS1 can only be copied to registers of class CLASS2 by | |
1045 | storing a register of CLASS1 into memory and loading that memory location | |
1046 | into a register of CLASS2. */ | |
3f622353 RH |
1047 | |
1048 | #if 0 | |
1049 | /* ??? May need this, but since we've disallowed TFmode in GR_REGS, | |
1050 | I'm not quite sure how it could be invoked. The normal problems | |
1051 | with unions should be solved with the addressof fiddling done by | |
1052 | movtf and friends. */ | |
1053 | #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ | |
1054 | ((MODE) == TFmode && (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \ | |
1055 | || ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS))) | |
1056 | #endif | |
c65ebc55 JW |
1057 | |
1058 | /* A C expression for the maximum number of consecutive registers of | |
1059 | class CLASS needed to hold a value of mode MODE. | |
1060 | This is closely related to the macro `HARD_REGNO_NREGS'. */ | |
1061 | ||
1062 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
f2f90c63 | 1063 | ((MODE) == BImode && (CLASS) == PR_REGS ? 2 \ |
3f622353 | 1064 | : ((CLASS) == FR_REGS && (MODE) == TFmode) ? 1 \ |
c65ebc55 JW |
1065 | : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
1066 | ||
02188693 RH |
1067 | /* If defined, gives a class of registers that cannot be used as the |
1068 | operand of a SUBREG that changes the mode of the object illegally. */ | |
1069 | ||
1070 | #define CLASS_CANNOT_CHANGE_MODE FR_REGS | |
1071 | ||
46146529 JW |
1072 | /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. |
1073 | In FP regs, we can't change FP values to integer values and vice | |
1074 | versa, but we can change e.g. DImode to SImode. */ | |
02188693 | 1075 | |
46146529 JW |
1076 | #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \ |
1077 | (GET_MODE_CLASS (FROM) != GET_MODE_CLASS (TO)) | |
02188693 | 1078 | |
97e242b0 RH |
1079 | /* A C expression that defines the machine-dependent operand constraint |
1080 | letters (`I', `J', `K', .. 'P') that specify particular ranges of | |
1081 | integer values. */ | |
c65ebc55 JW |
1082 | |
1083 | /* 14 bit signed immediate for arithmetic instructions. */ | |
1084 | #define CONST_OK_FOR_I(VALUE) \ | |
1085 | ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000) | |
1086 | /* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */ | |
1087 | #define CONST_OK_FOR_J(VALUE) \ | |
1088 | ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000) | |
1089 | /* 8 bit signed immediate for logical instructions. */ | |
1090 | #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100) | |
1091 | /* 8 bit adjusted signed immediate for compare pseudo-ops. */ | |
1092 | #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100) | |
1093 | /* 6 bit unsigned immediate for shift counts. */ | |
1094 | #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40) | |
1095 | /* 9 bit signed immediate for load/store post-increments. */ | |
c65ebc55 JW |
1096 | #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200) |
1097 | /* 0 for r0. Used by Linux kernel, do not change. */ | |
1098 | #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) | |
1099 | /* 0 or -1 for dep instruction. */ | |
1100 | #define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1) | |
1101 | ||
1102 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
1103 | ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \ | |
1104 | : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ | |
1105 | : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ | |
1106 | : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ | |
1107 | : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ | |
1108 | : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ | |
1109 | : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ | |
1110 | : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ | |
1111 | : 0) | |
1112 | ||
1113 | /* A C expression that defines the machine-dependent operand constraint letters | |
1114 | (`G', `H') that specify particular ranges of `const_double' values. */ | |
1115 | ||
1116 | /* 0.0 and 1.0 for fr0 and fr1. */ | |
1117 | #define CONST_DOUBLE_OK_FOR_G(VALUE) \ | |
1118 | ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \ | |
1119 | || (VALUE) == CONST1_RTX (GET_MODE (VALUE))) | |
1120 | ||
1121 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
1122 | ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0) | |
1123 | ||
1124 | /* A C expression that defines the optional machine-dependent constraint | |
1125 | letters (`Q', `R', `S', `T', `U') that can be used to segregate specific | |
1126 | types of operands, usually memory references, for the target machine. */ | |
3b572406 | 1127 | |
041f25e6 | 1128 | /* Non-volatile memory for FP_REG loads/stores. */ |
3b572406 RH |
1129 | #define CONSTRAINT_OK_FOR_Q(VALUE) \ |
1130 | (memory_operand((VALUE), VOIDmode) && ! MEM_VOLATILE_P (VALUE)) | |
041f25e6 RH |
1131 | /* 1..4 for shladd arguments. */ |
1132 | #define CONSTRAINT_OK_FOR_R(VALUE) \ | |
1133 | (GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4) | |
0551c32d RH |
1134 | /* Non-post-inc memory for asms and other unsavory creatures. */ |
1135 | #define CONSTRAINT_OK_FOR_S(VALUE) \ | |
1136 | (GET_CODE (VALUE) == MEM \ | |
1137 | && GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \ | |
1138 | && (reload_in_progress || memory_operand ((VALUE), VOIDmode))) | |
3b572406 RH |
1139 | |
1140 | #define EXTRA_CONSTRAINT(VALUE, C) \ | |
041f25e6 RH |
1141 | ((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) \ |
1142 | : (C) == 'R' ? CONSTRAINT_OK_FOR_R (VALUE) \ | |
0551c32d | 1143 | : (C) == 'S' ? CONSTRAINT_OK_FOR_S (VALUE) \ |
041f25e6 | 1144 | : 0) |
c65ebc55 JW |
1145 | \f |
1146 | /* Basic Stack Layout */ | |
1147 | ||
1148 | /* Define this macro if pushing a word onto the stack moves the stack pointer | |
1149 | to a smaller address. */ | |
1150 | #define STACK_GROWS_DOWNWARD 1 | |
1151 | ||
1152 | /* Define this macro if the addresses of local variable slots are at negative | |
1153 | offsets from the frame pointer. */ | |
97e242b0 RH |
1154 | /* #define FRAME_GROWS_DOWNWARD */ |
1155 | ||
1156 | /* Offset from the frame pointer to the first local variable slot to | |
1157 | be allocated. */ | |
1158 | #define STARTING_FRAME_OFFSET 0 | |
c65ebc55 JW |
1159 | |
1160 | /* Offset from the stack pointer register to the first location at which | |
1161 | outgoing arguments are placed. If not specified, the default value of zero | |
1162 | is used. This is the proper value for most machines. */ | |
1163 | /* IA64 has a 16 byte scratch area that is at the bottom of the stack. */ | |
1164 | #define STACK_POINTER_OFFSET 16 | |
1165 | ||
1166 | /* Offset from the argument pointer register to the first argument's address. | |
1167 | On some machines it may depend on the data type of the function. */ | |
1168 | #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
1169 | ||
1170 | /* A C expression whose value is RTL representing the value of the return | |
1171 | address for the frame COUNT steps up from the current frame, after the | |
1172 | prologue. */ | |
1173 | ||
1174 | /* ??? Frames other than zero would likely require interpreting the frame | |
1175 | unwind info, so we don't try to support them. We would also need to define | |
1176 | DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */ | |
1177 | ||
46327bc5 RH |
1178 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ |
1179 | ((COUNT) == 0 ? return_address_pointer_rtx : const0_rtx) | |
c65ebc55 JW |
1180 | |
1181 | /* A C expression whose value is RTL representing the location of the incoming | |
1182 | return address at the beginning of any function, before the prologue. This | |
1183 | RTL is either a `REG', indicating that the return value is saved in `REG', | |
1184 | or a `MEM' representing a location in the stack. This enables DWARF2 | |
1185 | unwind info for C++ EH. */ | |
1186 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0)) | |
13da91fd | 1187 | |
c65ebc55 JW |
1188 | /* ??? This is not defined because of three problems. |
1189 | 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte. | |
1190 | The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be | |
1191 | worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise | |
1192 | unused register number. | |
1193 | 2) dwarf2out_frame_debug core dumps while processing prologue insns. We | |
1194 | need to refine which insns have RTX_FRAME_RELATED_P set and which don't. | |
1195 | 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO | |
1196 | to zero, despite what the documentation implies, because it is tested in | |
1197 | a few places with #ifdef instead of #if. */ | |
1198 | #undef INCOMING_RETURN_ADDR_RTX | |
1199 | ||
1200 | /* A C expression whose value is an integer giving the offset, in bytes, from | |
1201 | the value of the stack pointer register to the top of the stack frame at the | |
1202 | beginning of any function, before the prologue. The top of the frame is | |
1203 | defined to be the value of the stack pointer in the previous frame, just | |
1204 | before the call instruction. */ | |
1205 | #define INCOMING_FRAME_SP_OFFSET 0 | |
1206 | ||
1207 | \f | |
1208 | /* Register That Address the Stack Frame. */ | |
1209 | ||
1210 | /* The register number of the stack pointer register, which must also be a | |
1211 | fixed register according to `FIXED_REGISTERS'. On most machines, the | |
1212 | hardware determines which register this is. */ | |
1213 | ||
1214 | #define STACK_POINTER_REGNUM 12 | |
1215 | ||
1216 | /* The register number of the frame pointer register, which is used to access | |
1217 | automatic variables in the stack frame. On some machines, the hardware | |
1218 | determines which register this is. On other machines, you can choose any | |
1219 | register you wish for this purpose. */ | |
1220 | ||
1221 | #define FRAME_POINTER_REGNUM 328 | |
1222 | ||
97e242b0 RH |
1223 | /* Base register for access to local variables of the function. */ |
1224 | #define HARD_FRAME_POINTER_REGNUM LOC_REG (79) | |
c65ebc55 JW |
1225 | |
1226 | /* The register number of the arg pointer register, which is used to access the | |
1227 | function's argument list. */ | |
1228 | /* r0 won't otherwise be used, so put the always eliminated argument pointer | |
1229 | in it. */ | |
1230 | #define ARG_POINTER_REGNUM R_GR(0) | |
1231 | ||
97e242b0 RH |
1232 | /* The register number for the return address register. For IA-64, this |
1233 | is not actually a pointer as the name suggests, but that's a name that | |
1234 | gen_rtx_REG already takes care to keep unique. We modify | |
1235 | return_address_pointer_rtx in ia64_expand_prologue to reference the | |
1236 | final output regnum. */ | |
46327bc5 | 1237 | #define RETURN_ADDRESS_POINTER_REGNUM 329 |
c65ebc55 JW |
1238 | |
1239 | /* Register numbers used for passing a function's static chain pointer. */ | |
97e242b0 | 1240 | /* ??? The ABI sez the static chain should be passed as a normal parameter. */ |
c65ebc55 | 1241 | #define STATIC_CHAIN_REGNUM 15 |
c65ebc55 JW |
1242 | \f |
1243 | /* Eliminating the Frame Pointer and the Arg Pointer */ | |
1244 | ||
1245 | /* A C expression which is nonzero if a function must have and use a frame | |
1246 | pointer. This expression is evaluated in the reload pass. If its value is | |
1247 | nonzero the function will have a frame pointer. */ | |
c65ebc55 JW |
1248 | #define FRAME_POINTER_REQUIRED 0 |
1249 | ||
97e242b0 RH |
1250 | /* Show we can debug even without a frame pointer. */ |
1251 | #define CAN_DEBUG_WITHOUT_FP | |
1252 | ||
c65ebc55 JW |
1253 | /* If defined, this macro specifies a table of register pairs used to eliminate |
1254 | unneeded registers that point into the stack frame. */ | |
1255 | ||
1256 | #define ELIMINABLE_REGS \ | |
1257 | { \ | |
1258 | {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
97e242b0 | 1259 | {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ |
46327bc5 | 1260 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ |
97e242b0 RH |
1261 | {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ |
1262 | {RETURN_ADDRESS_POINTER_REGNUM, BR_REG (0)}, \ | |
c65ebc55 JW |
1263 | } |
1264 | ||
1265 | /* A C expression that returns non-zero if the compiler is allowed to try to | |
97e242b0 RH |
1266 | replace register number FROM with register number TO. The frame pointer |
1267 | is automatically handled. */ | |
c65ebc55 | 1268 | |
46327bc5 RH |
1269 | #define CAN_ELIMINATE(FROM, TO) \ |
1270 | (TO == BR_REG (0) ? current_function_is_leaf : 1) | |
c65ebc55 | 1271 | |
97e242b0 RH |
1272 | /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It |
1273 | specifies the initial difference between the specified pair of | |
1274 | registers. This macro must be defined if `ELIMINABLE_REGS' is | |
1275 | defined. */ | |
1276 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1277 | ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO))) | |
c65ebc55 JW |
1278 | \f |
1279 | /* Passing Function Arguments on the Stack */ | |
1280 | ||
1281 | /* Define this macro if an argument declared in a prototype as an integral type | |
1282 | smaller than `int' should actually be passed as an `int'. In addition to | |
1283 | avoiding errors in certain cases of mismatch, it also makes for better code | |
1284 | on certain machines. */ | |
1285 | /* ??? Investigate. */ | |
1286 | /* #define PROMOTE_PROTOTYPES */ | |
1287 | ||
1288 | /* If defined, the maximum amount of space required for outgoing arguments will | |
1289 | be computed and placed into the variable | |
1290 | `current_function_outgoing_args_size'. */ | |
1291 | ||
f73ad30e | 1292 | #define ACCUMULATE_OUTGOING_ARGS 1 |
c65ebc55 JW |
1293 | |
1294 | /* A C expression that should indicate the number of bytes of its own arguments | |
1295 | that a function pops on returning, or 0 if the function pops no arguments | |
1296 | and the caller must therefore pop them all after the function returns. */ | |
1297 | ||
1298 | #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0 | |
1299 | ||
1300 | \f | |
1301 | /* Function Arguments in Registers */ | |
1302 | ||
1303 | #define MAX_ARGUMENT_SLOTS 8 | |
1304 | #define MAX_INT_RETURN_SLOTS 4 | |
1305 | #define GR_ARG_FIRST IN_REG (0) | |
1306 | #define GR_RET_FIRST GR_REG (8) | |
1307 | #define GR_RET_LAST GR_REG (11) | |
1308 | #define FR_ARG_FIRST FR_REG (8) | |
1309 | #define FR_RET_FIRST FR_REG (8) | |
1310 | #define FR_RET_LAST FR_REG (15) | |
1311 | #define AR_ARG_FIRST OUT_REG (0) | |
1312 | ||
1313 | /* A C expression that controls whether a function argument is passed in a | |
1314 | register, and which register. */ | |
1315 | ||
1316 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
1317 | ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0) | |
1318 | ||
1319 | /* Define this macro if the target machine has "register windows", so that the | |
1320 | register in which a function sees an arguments is not necessarily the same | |
1321 | as the one in which the caller passed the argument. */ | |
1322 | ||
1323 | #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ | |
1324 | ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1) | |
1325 | ||
1326 | /* A C expression for the number of words, at the beginning of an argument, | |
1327 | must be put in registers. The value must be zero for arguments that are | |
1328 | passed entirely in registers or that are entirely pushed on the stack. */ | |
1329 | ||
1330 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
1331 | ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
1332 | ||
1333 | /* A C expression that indicates when an argument must be passed by reference. | |
1334 | If nonzero for an argument, a copy of that argument is made in memory and a | |
1335 | pointer to the argument is passed instead of the argument itself. The | |
1336 | pointer is passed in whatever way is appropriate for passing a pointer to | |
1337 | that type. */ | |
1338 | ||
1339 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0 | |
1340 | ||
1341 | /* A C type for declaring a variable that is used as the first argument of | |
1342 | `FUNCTION_ARG' and other related values. For some target machines, the type | |
1343 | `int' suffices and can hold the number of bytes of argument so far. */ | |
1344 | ||
1345 | typedef struct ia64_args | |
1346 | { | |
1347 | int words; /* # words of arguments so far */ | |
1348 | int fp_regs; /* # FR registers used so far */ | |
1349 | int prototype; /* whether function prototyped */ | |
1350 | } CUMULATIVE_ARGS; | |
1351 | ||
1352 | /* A C statement (sans semicolon) for initializing the variable CUM for the | |
1353 | state at the beginning of the argument list. */ | |
1354 | ||
1355 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \ | |
1356 | do { \ | |
1357 | (CUM).words = 0; \ | |
1358 | (CUM).fp_regs = 0; \ | |
1359 | (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \ | |
1360 | } while (0) | |
1361 | ||
1362 | /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the | |
1363 | arguments for the function being compiled. If this macro is undefined, | |
1364 | `INIT_CUMULATIVE_ARGS' is used instead. */ | |
1365 | ||
1366 | /* We set prototype to true so that we never try to return a PARALLEL from | |
1367 | function_arg. */ | |
1368 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ | |
1369 | do { \ | |
1370 | (CUM).words = 0; \ | |
1371 | (CUM).fp_regs = 0; \ | |
1372 | (CUM).prototype = 1; \ | |
1373 | } while (0) | |
1374 | ||
1375 | /* A C statement (sans semicolon) to update the summarizer variable CUM to | |
1376 | advance past an argument in the argument list. The values MODE, TYPE and | |
1377 | NAMED describe that argument. Once this is done, the variable CUM is | |
1378 | suitable for analyzing the *following* argument with `FUNCTION_ARG'. */ | |
1379 | ||
1380 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
1381 | ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED) | |
1382 | ||
1383 | /* If defined, a C expression that gives the alignment boundary, in bits, of an | |
1384 | argument with the specified mode and type. */ | |
1385 | ||
93dd6255 JW |
1386 | /* Arguments with alignment larger than 8 bytes start at the next even |
1387 | boundary. See ia64_function_arg. */ | |
c65ebc55 JW |
1388 | |
1389 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
93dd6255 JW |
1390 | (((TYPE) ? (TYPE_ALIGN (TYPE) > 8 * BITS_PER_UNIT) \ |
1391 | : (((((MODE) == BLKmode \ | |
1392 | ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \ | |
1393 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) > 1)) \ | |
1394 | ? 128 : PARM_BOUNDARY) | |
c65ebc55 JW |
1395 | |
1396 | /* A C expression that is nonzero if REGNO is the number of a hard register in | |
1397 | which function arguments are sometimes passed. This does *not* include | |
1398 | implicit arguments such as the static chain and the structure-value address. | |
1399 | On many machines, no registers can be used for this purpose since all | |
1400 | function arguments are pushed on the stack. */ | |
1401 | #define FUNCTION_ARG_REGNO_P(REGNO) \ | |
1402 | (((REGNO) >= GR_ARG_FIRST && (REGNO) < (GR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \ | |
1403 | || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS))) | |
1404 | \f | |
1405 | /* Implement `va_start' for varargs and stdarg. */ | |
1406 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ | |
1407 | ia64_va_start (stdarg, valist, nextarg) | |
1408 | ||
1409 | /* Implement `va_arg'. */ | |
1410 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
1411 | ia64_va_arg (valist, type) | |
1412 | \f | |
1413 | /* How Scalar Function Values are Returned */ | |
1414 | ||
1415 | /* A C expression to create an RTX representing the place where a function | |
1416 | returns a value of data type VALTYPE. */ | |
1417 | ||
1418 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
1419 | ia64_function_value (VALTYPE, FUNC) | |
1420 | ||
1421 | /* A C expression to create an RTX representing the place where a library | |
1422 | function returns a value of mode MODE. */ | |
1423 | ||
1424 | #define LIBCALL_VALUE(MODE) \ | |
1425 | gen_rtx_REG (MODE, \ | |
1426 | ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1427 | || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ | |
1428 | ? FR_RET_FIRST : GR_RET_FIRST)) | |
1429 | ||
1430 | /* A C expression that is nonzero if REGNO is the number of a hard register in | |
1431 | which the values of called function may come back. */ | |
1432 | ||
1433 | #define FUNCTION_VALUE_REGNO_P(REGNO) \ | |
1434 | (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \ | |
1435 | || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST)) | |
1436 | ||
1437 | \f | |
1438 | /* How Large Values are Returned */ | |
1439 | ||
1440 | /* A nonzero value says to return the function value in memory, just as large | |
1441 | structures are always returned. */ | |
1442 | ||
1443 | #define RETURN_IN_MEMORY(TYPE) \ | |
1444 | ia64_return_in_memory (TYPE) | |
1445 | ||
1446 | /* If you define this macro to be 0, then the conventions used for structure | |
1447 | and union return values are decided by the `RETURN_IN_MEMORY' macro. */ | |
1448 | ||
1449 | #define DEFAULT_PCC_STRUCT_RETURN 0 | |
1450 | ||
1451 | /* If the structure value address is passed in a register, then | |
1452 | `STRUCT_VALUE_REGNUM' should be the number of that register. */ | |
1453 | ||
1454 | #define STRUCT_VALUE_REGNUM GR_REG (8) | |
1455 | ||
1456 | \f | |
1457 | /* Caller-Saves Register Allocation */ | |
1458 | ||
1459 | /* A C expression to determine whether it is worthwhile to consider placing a | |
1460 | pseudo-register in a call-clobbered hard register and saving and restoring | |
1461 | it around each function call. The expression should be 1 when this is worth | |
1462 | doing, and 0 otherwise. | |
1463 | ||
1464 | If you don't define this macro, a default is used which is good on most | |
1465 | machines: `4 * CALLS < REFS'. */ | |
1466 | /* ??? Investigate. */ | |
1467 | /* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */ | |
1468 | ||
1469 | \f | |
1470 | /* Function Entry and Exit */ | |
1471 | ||
1472 | /* A C compound statement that outputs the assembler code for entry to a | |
1473 | function. */ | |
1474 | ||
1475 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
1476 | ia64_function_prologue (FILE, SIZE) | |
1477 | ||
0186257f JW |
1478 | /* This macro notes the end of the prologue. */ |
1479 | ||
1480 | #define FUNCTION_END_PROLOGUE(FILE) ia64_output_end_prologue (FILE) | |
1481 | ||
c65ebc55 JW |
1482 | /* Define this macro as a C expression that is nonzero if the return |
1483 | instruction or the function epilogue ignores the value of the stack pointer; | |
1484 | in other words, if it is safe to delete an instruction to adjust the stack | |
1485 | pointer before a return from the function. */ | |
1486 | ||
1487 | #define EXIT_IGNORE_STACK 1 | |
1488 | ||
1489 | /* Define this macro as a C expression that is nonzero for registers | |
1490 | used by the epilogue or the `return' pattern. */ | |
1491 | ||
1492 | #define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO) | |
1493 | ||
1494 | /* A C compound statement that outputs the assembler code for exit from a | |
1495 | function. */ | |
1496 | ||
1497 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
1498 | ia64_function_epilogue (FILE, SIZE) | |
1499 | ||
3b572406 RH |
1500 | /* Output at beginning of assembler file. */ |
1501 | ||
1502 | #define ASM_FILE_START(FILE) \ | |
ca3920ad | 1503 | emit_safe_across_calls (FILE) |
3b572406 | 1504 | |
c65ebc55 JW |
1505 | /* A C compound statement that outputs the assembler code for a thunk function, |
1506 | used to implement C++ virtual function calls with multiple inheritance. */ | |
1507 | ||
c65ebc55 JW |
1508 | #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ |
1509 | do { \ | |
591eb4ba JW |
1510 | if (CONST_OK_FOR_I (DELTA)) \ |
1511 | fprintf (FILE, "\tadds r32 = %d, r32\n", (DELTA)); \ | |
1512 | else \ | |
1513 | { \ | |
1514 | if (CONST_OK_FOR_J (DELTA)) \ | |
1515 | fprintf (FILE, "\taddl r2 = %d, r0\n", (DELTA)); \ | |
1516 | else \ | |
1517 | fprintf (FILE, "\tmovl r2 = %d\n", (DELTA)); \ | |
1518 | fprintf (FILE, "\t;;\n"); \ | |
1519 | fprintf (FILE, "\tadd r32 = r2, r32\n"); \ | |
1520 | } \ | |
c65ebc55 JW |
1521 | fprintf (FILE, "\tbr "); \ |
1522 | assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \ | |
1523 | fprintf (FILE, "\n"); \ | |
1524 | } while (0) | |
1525 | ||
1526 | \f | |
1527 | /* Generating Code for Profiling. */ | |
1528 | ||
1529 | /* A C statement or compound statement to output to FILE some assembler code to | |
1530 | call the profiling subroutine `mcount'. */ | |
1531 | ||
1532 | /* ??? Unclear if this will actually work. No way to test this currently. */ | |
1533 | ||
1534 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
1535 | do { \ | |
1536 | char buf[20]; \ | |
1537 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", LABELNO); \ | |
1538 | fputs ("\taddl r16 = @ltoff(", FILE); \ | |
1539 | assemble_name (FILE, buf); \ | |
1540 | fputs ("), gp\n", FILE); \ | |
1541 | fputs ("\tmov r17 = r1;;\n", FILE); \ | |
1542 | fputs ("\tld8 out0 = [r16]\n", FILE); \ | |
1543 | fputs ("\tmov r18 = b0\n", FILE); \ | |
1544 | fputs ("\tbr.call.sptk.many rp = mcount;;\n", FILE); \ | |
1545 | fputs ("\tmov b0 = r18\n", FILE); \ | |
1546 | fputs ("\tmov r1 = r17;;\n", FILE); \ | |
1547 | } while (0) | |
1548 | ||
1549 | /* A C statement or compound statement to output to FILE some assembler code to | |
1550 | initialize basic-block profiling for the current object module. */ | |
1551 | ||
1552 | /* ??? Unclear if this will actually work. No way to test this currently. */ | |
1553 | ||
1554 | #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ | |
1555 | do { \ | |
1556 | int labelno = LABELNO; \ | |
1557 | switch (profile_block_flag) \ | |
1558 | { \ | |
1559 | case 2: \ | |
1560 | fputs ("\taddl r16 = @ltoff(LPBX0), gp\n", FILE); \ | |
1561 | fprintf (FILE, "\tmov out1 = %d;;\n", labelno); \ | |
1562 | fputs ("\tld8 out0 = [r16]\n", FILE); \ | |
1563 | fputs ("\tmov r17 = r1\n", FILE); \ | |
1564 | fputs ("\tmov r18 = b0\n", FILE); \ | |
1565 | fputs ("\tbr.call.sptk.many rp = __bb_init_trace_func;;\n", FILE);\ | |
1566 | fputs ("\tmov r1 = r17\n", FILE); \ | |
1567 | fputs ("\tmov b0 = r18;;\n", FILE); \ | |
1568 | break; \ | |
1569 | default: \ | |
1570 | fputs ("\taddl r16 = @ltoff(LPBX0), gp;;\n", FILE); \ | |
1571 | fputs ("\tld8 out0 = [r16];;\n", FILE); \ | |
1572 | fputs ("\tld8 r17 = [out0];;\n", FILE); \ | |
1573 | fputs ("\tcmp.eq p6, p0 = r0, r17;;\n", FILE); \ | |
1574 | fputs ("(p6)\tmov r16 = r1\n", FILE); \ | |
1575 | fputs ("(p6)\tmov r17 = b0\n", FILE); \ | |
1576 | fputs ("(p6)\tbr.call.sptk.many rp = __bb_init_func;;\n", FILE); \ | |
1577 | fputs ("(p6)\tmov r1 = r16\n", FILE); \ | |
1578 | fputs ("(p6)\tmov b0 = r17;;\n", FILE); \ | |
1579 | break; \ | |
1580 | } \ | |
1581 | } while (0) | |
1582 | ||
1583 | /* A C statement or compound statement to output to FILE some assembler code to | |
1584 | increment the count associated with the basic block number BLOCKNO. */ | |
1585 | ||
1586 | /* ??? This can't work unless we mark some registers as fixed, so that we | |
1587 | can use them as temporaries in this macro. We need two registers for -a | |
1588 | profiling and 4 registers for -ax profiling. */ | |
1589 | ||
1590 | #define BLOCK_PROFILER(FILE, BLOCKNO) \ | |
1591 | do { \ | |
1592 | int blockn = BLOCKNO; \ | |
1593 | switch (profile_block_flag) \ | |
1594 | { \ | |
1595 | case 2: \ | |
1596 | fputs ("\taddl r2 = @ltoff(__bb), gp\n", FILE); \ | |
1597 | fputs ("\taddl r3 = @ltoff(LPBX0), gp;;\n", FILE); \ | |
1598 | fprintf (FILE, "\tmov r9 = %d\n", blockn); \ | |
1599 | fputs ("\tld8 r2 = [r2]\n", FILE); \ | |
1600 | fputs ("\tld8 r3 = [r3];;\n", FILE); \ | |
1601 | fputs ("\tadd r8 = 8, r2\n", FILE); \ | |
1602 | fputs ("\tst8 [r2] = r9;;\n", FILE); \ | |
1603 | fputs ("\tst8 [r8] = r3\n", FILE); \ | |
1604 | fputs ("\tbr.call.sptk.many rp = __bb_trace_func\n", FILE); \ | |
1605 | break; \ | |
1606 | \ | |
1607 | default: \ | |
1608 | fputs ("\taddl r2 = @ltoff(LPBX2), gp;;\n", FILE); \ | |
1609 | fputs ("\tld8 r2 = [r2];;\n", FILE); \ | |
1610 | fprintf (FILE, "\taddl r2 = %d, r2;;\n", 8 * blockn); \ | |
1611 | fputs ("\tld8 r3 = [r2];;\n", FILE); \ | |
1612 | fputs ("\tadd r3 = 1, r3;;\n", FILE); \ | |
1613 | fputs ("\tst8 [r2] = r3;;\n", FILE); \ | |
1614 | break; \ | |
1615 | } \ | |
1616 | } while(0) | |
1617 | ||
1618 | /* A C statement or compound statement to output to FILE assembler | |
1619 | code to call function `__bb_trace_ret'. */ | |
1620 | ||
1621 | /* ??? Unclear if this will actually work. No way to test this currently. */ | |
1622 | ||
1623 | /* ??? This needs to be emitted into the epilogue. Perhaps rewrite to emit | |
1624 | rtl and call from ia64_expand_epilogue? */ | |
1625 | ||
1626 | #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \ | |
1627 | fputs ("\tbr.call.sptk.many rp = __bb_trace_ret\n", FILE); | |
1628 | #undef FUNCTION_BLOCK_PROFILER_EXIT | |
1629 | ||
1630 | /* A C statement or compound statement to save all registers, which may be | |
1631 | clobbered by a function call, including condition codes. */ | |
1632 | ||
1633 | /* ??? We would have to save 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly | |
1634 | other things. This is not practical. Perhaps leave this feature (-ax) | |
1635 | unsupported by undefining above macros? */ | |
1636 | ||
1637 | /* #define MACHINE_STATE_SAVE(ID) */ | |
1638 | ||
1639 | /* A C statement or compound statement to restore all registers, including | |
1640 | condition codes, saved by `MACHINE_STATE_SAVE'. */ | |
1641 | ||
1642 | /* ??? We would have to restore 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly | |
1643 | other things. This is not practical. Perhaps leave this feature (-ax) | |
1644 | unsupported by undefining above macros? */ | |
1645 | ||
1646 | /* #define MACHINE_STATE_RESTORE(ID) */ | |
1647 | ||
1648 | \f | |
1649 | /* Implementing the Varargs Macros. */ | |
1650 | ||
1651 | /* Define this macro to store the anonymous register arguments into the stack | |
1652 | so that all the arguments appear to have been passed consecutively on the | |
1653 | stack. */ | |
1654 | ||
1655 | #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_ARGS_SIZE, SECOND_TIME) \ | |
1656 | ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME) | |
1657 | ||
1658 | /* Define this macro if the location where a function argument is passed | |
1659 | depends on whether or not it is a named argument. */ | |
1660 | ||
1661 | #define STRICT_ARGUMENT_NAMING 1 | |
1662 | ||
1663 | \f | |
1664 | /* Trampolines for Nested Functions. */ | |
1665 | ||
1666 | /* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of | |
1667 | the function containing a non-local goto target. */ | |
1668 | ||
1669 | #define STACK_SAVEAREA_MODE(LEVEL) \ | |
1670 | ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode) | |
1671 | ||
1672 | /* Output assembler code for a block containing the constant parts of | |
1673 | a trampoline, leaving space for the variable parts. | |
1674 | ||
1675 | The trampoline should set the static chain pointer to value placed | |
97e242b0 RH |
1676 | into the trampoline and should branch to the specified routine. |
1677 | To make the normal indirect-subroutine calling convention work, | |
1678 | the trampoline must look like a function descriptor; the first | |
1679 | word being the target address and the second being the target's | |
1680 | global pointer. | |
1681 | ||
1682 | We abuse the concept of a global pointer by arranging for it | |
1683 | to point to the data we need to load. The complete trampoline | |
c65ebc55 JW |
1684 | has the following form: |
1685 | ||
97e242b0 RH |
1686 | +-------------------+ \ |
1687 | TRAMP: | __ia64_trampoline | | | |
1688 | +-------------------+ > fake function descriptor | |
1689 | | TRAMP+16 | | | |
1690 | +-------------------+ / | |
1691 | | target descriptor | | |
1692 | +-------------------+ | |
1693 | | static link | | |
1694 | +-------------------+ | |
c65ebc55 JW |
1695 | */ |
1696 | ||
c65ebc55 JW |
1697 | /* A C expression for the size in bytes of the trampoline, as an integer. */ |
1698 | ||
97e242b0 | 1699 | #define TRAMPOLINE_SIZE 32 |
c65ebc55 JW |
1700 | |
1701 | /* Alignment required for trampolines, in bits. */ | |
1702 | ||
97e242b0 | 1703 | #define TRAMPOLINE_ALIGNMENT 64 |
c65ebc55 JW |
1704 | |
1705 | /* A C statement to initialize the variable parts of a trampoline. */ | |
1706 | ||
1707 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \ | |
97e242b0 | 1708 | ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN)) |
c65ebc55 JW |
1709 | \f |
1710 | /* Implicit Calls to Library Routines */ | |
1711 | ||
1712 | /* ??? The ia64 linux kernel requires that we use the standard names for | |
1713 | divide and modulo routines. However, if we aren't careful, lib1funcs.asm | |
1714 | will be overridden by libgcc2.c. We avoid this by using different names | |
1715 | for lib1funcs.asm modules, e.g. __divdi3 vs _divdi3. Since lib1funcs.asm | |
1716 | goes into libgcc.a first, the linker will find it first. */ | |
1717 | ||
c65ebc55 JW |
1718 | /* Define this macro if GNU CC should generate calls to the System V (and ANSI |
1719 | C) library functions `memcpy' and `memset' rather than the BSD functions | |
1720 | `bcopy' and `bzero'. */ | |
1721 | ||
1722 | #define TARGET_MEM_FUNCTIONS | |
1723 | ||
1724 | \f | |
1725 | /* Addressing Modes */ | |
1726 | ||
1727 | /* Define this macro if the machine supports post-increment addressing. */ | |
1728 | ||
1729 | #define HAVE_POST_INCREMENT 1 | |
1730 | #define HAVE_POST_DECREMENT 1 | |
4b983fdc RH |
1731 | #define HAVE_POST_MODIFY_DISP 1 |
1732 | #define HAVE_POST_MODIFY_REG 1 | |
c65ebc55 JW |
1733 | |
1734 | /* A C expression that is 1 if the RTX X is a constant which is a valid | |
1735 | address. */ | |
1736 | ||
1737 | #define CONSTANT_ADDRESS_P(X) 0 | |
1738 | ||
1739 | /* The max number of registers that can appear in a valid memory address. */ | |
1740 | ||
4b983fdc | 1741 | #define MAX_REGS_PER_ADDRESS 2 |
c65ebc55 JW |
1742 | |
1743 | /* A C compound statement with a conditional `goto LABEL;' executed if X (an | |
1744 | RTX) is a legitimate memory address on the target machine for a memory | |
1745 | operand of mode MODE. */ | |
1746 | ||
4b983fdc RH |
1747 | #define LEGITIMATE_ADDRESS_REG(X) \ |
1748 | ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ | |
1749 | || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \ | |
1750 | && REG_OK_FOR_BASE_P (XEXP (X, 0)))) | |
1751 | ||
1752 | #define LEGITIMATE_ADDRESS_DISP(R, X) \ | |
1753 | (GET_CODE (X) == PLUS \ | |
1754 | && rtx_equal_p (R, XEXP (X, 0)) \ | |
cf606f45 | 1755 | && (LEGITIMATE_ADDRESS_REG (XEXP (X, 1)) \ |
4b983fdc | 1756 | || (GET_CODE (XEXP (X, 1)) == CONST_INT \ |
5527bf14 RH |
1757 | && INTVAL (XEXP (X, 1)) >= -256 \ |
1758 | && INTVAL (XEXP (X, 1)) < 256))) | |
c65ebc55 JW |
1759 | |
1760 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ | |
1761 | do { \ | |
4b983fdc | 1762 | if (LEGITIMATE_ADDRESS_REG (X)) \ |
c65ebc55 | 1763 | goto LABEL; \ |
4b983fdc RH |
1764 | else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \ |
1765 | && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \ | |
1766 | && XEXP (X, 0) != arg_pointer_rtx) \ | |
1767 | goto LABEL; \ | |
1768 | else if (GET_CODE (X) == POST_MODIFY \ | |
1769 | && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \ | |
1770 | && XEXP (X, 0) != arg_pointer_rtx \ | |
1771 | && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \ | |
c65ebc55 | 1772 | goto LABEL; \ |
c65ebc55 JW |
1773 | } while (0) |
1774 | ||
1775 | /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for | |
1776 | use as a base register. */ | |
1777 | ||
1778 | #ifdef REG_OK_STRICT | |
1779 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1780 | #else | |
1781 | #define REG_OK_FOR_BASE_P(X) \ | |
1782 | (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER)) | |
1783 | #endif | |
1784 | ||
1785 | /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for | |
cf606f45 | 1786 | use as an index register. This is needed for POST_MODIFY. */ |
c65ebc55 | 1787 | |
cf606f45 | 1788 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) |
c65ebc55 JW |
1789 | |
1790 | /* A C compound statement that attempts to replace X with a valid memory | |
1791 | address for an operand of mode MODE. | |
1792 | ||
1793 | This must be present, but there is nothing useful to be done here. */ | |
1794 | ||
1795 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) | |
1796 | ||
1797 | /* A C statement or compound statement with a conditional `goto LABEL;' | |
1798 | executed if memory address X (an RTX) can have different meanings depending | |
1799 | on the machine mode of the memory reference it is used for or if the address | |
1800 | is valid for some modes but not others. */ | |
1801 | ||
3f622353 | 1802 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ |
c65ebc55 JW |
1803 | if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \ |
1804 | goto LABEL; | |
1805 | ||
1806 | /* A C expression that is nonzero if X is a legitimate constant for an | |
1807 | immediate operand on the target machine. */ | |
1808 | ||
1809 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1810 | (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ | |
1811 | || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X)) \ | |
1812 | ||
1813 | \f | |
1814 | /* Condition Code Status */ | |
1815 | ||
1816 | /* One some machines not all possible comparisons are defined, but you can | |
1817 | convert an invalid comparison into a valid one. */ | |
1818 | /* ??? Investigate. See the alpha definition. */ | |
1819 | /* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */ | |
1820 | ||
1821 | \f | |
1822 | /* Describing Relative Costs of Operations */ | |
1823 | ||
1824 | /* A part of a C `switch' statement that describes the relative costs of | |
1825 | constant RTL expressions. */ | |
1826 | ||
1827 | /* ??? This is incomplete. */ | |
1828 | ||
f2f90c63 | 1829 | #define CONST_COSTS(X, CODE, OUTER_CODE) \ |
c65ebc55 JW |
1830 | case CONST_INT: \ |
1831 | if ((X) == const0_rtx) \ | |
1832 | return 0; \ | |
f2f90c63 RH |
1833 | switch (OUTER_CODE) \ |
1834 | { \ | |
1835 | case SET: \ | |
1836 | return CONST_OK_FOR_J (INTVAL (X)) ? 0 : COSTS_N_INSNS (1); \ | |
1837 | case PLUS: \ | |
1838 | if (CONST_OK_FOR_I (INTVAL (X))) \ | |
1839 | return 0; \ | |
1840 | if (CONST_OK_FOR_J (INTVAL (X))) \ | |
1841 | return 1; \ | |
1842 | return COSTS_N_INSNS (1); \ | |
1843 | default: \ | |
1844 | if (CONST_OK_FOR_K (INTVAL (X)) || CONST_OK_FOR_L (INTVAL (X))) \ | |
1845 | return 0; \ | |
1846 | return COSTS_N_INSNS (1); \ | |
1847 | } \ | |
c65ebc55 | 1848 | case CONST_DOUBLE: \ |
f2f90c63 | 1849 | return COSTS_N_INSNS (1); \ |
c65ebc55 JW |
1850 | case CONST: \ |
1851 | case SYMBOL_REF: \ | |
1852 | case LABEL_REF: \ | |
2130b7fb | 1853 | return COSTS_N_INSNS (3); |
c65ebc55 JW |
1854 | |
1855 | /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. */ | |
1856 | ||
f2f90c63 RH |
1857 | #define RTX_COSTS(X, CODE, OUTER_CODE) \ |
1858 | case MULT: \ | |
1859 | /* For multiplies wider than HImode, we have to go to the FPU, \ | |
1860 | which normally involves copies. Plus there's the latency \ | |
005f39ce BS |
1861 | of the multiply itself, and the latency of the instructions to \ |
1862 | transfer integer regs to FP regs. */ \ | |
f2f90c63 | 1863 | if (GET_MODE_SIZE (GET_MODE (X)) > 2) \ |
005f39ce BS |
1864 | return COSTS_N_INSNS (10); \ |
1865 | return COSTS_N_INSNS (2); \ | |
1866 | case PLUS: \ | |
1867 | case MINUS: \ | |
1868 | case ASHIFT: \ | |
1869 | case ASHIFTRT: \ | |
1870 | case LSHIFTRT: \ | |
f2f90c63 | 1871 | return COSTS_N_INSNS (1); \ |
c65ebc55 JW |
1872 | case DIV: \ |
1873 | case UDIV: \ | |
1874 | case MOD: \ | |
1875 | case UMOD: \ | |
f2f90c63 RH |
1876 | /* We make divide expensive, so that divide-by-constant will be \ |
1877 | optimized to a multiply. */ \ | |
1878 | return COSTS_N_INSNS (60); | |
c65ebc55 JW |
1879 | |
1880 | /* An expression giving the cost of an addressing mode that contains ADDRESS. | |
1881 | If not defined, the cost is computed from the ADDRESS expression and the | |
1882 | `CONST_COSTS' values. */ | |
1883 | ||
1884 | #define ADDRESS_COST(ADDRESS) 0 | |
1885 | ||
1886 | /* A C expression for the cost of moving data from a register in class FROM to | |
1887 | one in class TO. */ | |
1888 | ||
cf011243 | 1889 | #define REGISTER_MOVE_COST(MODE, FROM, TO) \ |
5527bf14 | 1890 | ia64_register_move_cost((FROM), (TO)) |
c65ebc55 | 1891 | |
f2f90c63 RH |
1892 | /* A C expression for the cost of moving data of mode M between a |
1893 | register and memory. */ | |
1894 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) \ | |
1895 | ((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS ? 4 : 10) | |
c65ebc55 JW |
1896 | |
1897 | /* A C expression for the cost of a branch instruction. A value of 1 is the | |
e5bde68a RH |
1898 | default; other values are interpreted relative to that. Used by the |
1899 | if-conversion code as max instruction count. */ | |
1900 | /* ??? This requires investigation. The primary effect might be how | |
1901 | many additional insn groups we run into, vs how good the dynamic | |
1902 | branch predictor is. */ | |
1903 | ||
1904 | #define BRANCH_COST 6 | |
c65ebc55 JW |
1905 | |
1906 | /* Define this macro as a C expression which is nonzero if accessing less than | |
1907 | a word of memory (i.e. a `char' or a `short') is no faster than accessing a | |
1908 | word of memory. */ | |
1909 | ||
1910 | #define SLOW_BYTE_ACCESS 1 | |
1911 | ||
1912 | /* Define this macro if it is as good or better to call a constant function | |
1913 | address than to call an address kept in a register. | |
1914 | ||
1915 | Indirect function calls are more expensive that direct function calls, so | |
1916 | don't cse function addresses. */ | |
1917 | ||
1918 | #define NO_FUNCTION_CSE | |
1919 | ||
c65ebc55 JW |
1920 | \f |
1921 | /* Dividing the output into sections. */ | |
1922 | ||
1923 | /* A C expression whose value is a string containing the assembler operation | |
1924 | that should precede instructions and read-only data. */ | |
1925 | ||
de323aa1 | 1926 | #define TEXT_SECTION_ASM_OP "\t.text" |
c65ebc55 JW |
1927 | |
1928 | /* A C expression whose value is a string containing the assembler operation to | |
1929 | identify the following data as writable initialized data. */ | |
1930 | ||
de323aa1 | 1931 | #define DATA_SECTION_ASM_OP "\t.data" |
c65ebc55 JW |
1932 | |
1933 | /* If defined, a C expression whose value is a string containing the assembler | |
1934 | operation to identify the following data as uninitialized global data. */ | |
1935 | ||
de323aa1 | 1936 | #define BSS_SECTION_ASM_OP "\t.bss" |
c65ebc55 JW |
1937 | |
1938 | /* Define this macro if jump tables (for `tablejump' insns) should be output in | |
1939 | the text section, along with the assembler instructions. */ | |
1940 | ||
1941 | /* ??? It is probably better for the jump tables to be in the rodata section, | |
1942 | which is where they go by default. Unfortunately, that currently does not | |
1943 | work, because of some problem with pcrelative relocations not getting | |
1944 | resolved correctly. */ | |
1945 | /* ??? FIXME ??? rth says that we should use @gprel to solve this problem. */ | |
1946 | /* ??? If jump tables are in the text section, then we can use 4 byte | |
1947 | entries instead of 8 byte entries. */ | |
1948 | ||
1949 | #define JUMP_TABLES_IN_TEXT_SECTION 1 | |
1950 | ||
1951 | /* Define this macro if references to a symbol must be treated differently | |
1952 | depending on something about the variable or function named by the symbol | |
1953 | (such as what section it is in). */ | |
1954 | ||
1955 | #define ENCODE_SECTION_INFO(DECL) ia64_encode_section_info (DECL) | |
1956 | ||
32adf8e6 AH |
1957 | /* If a variable is weakened, made one only or moved into a different |
1958 | section, it may be necessary to redo the section info to move the | |
1959 | variable out of sdata. */ | |
1960 | ||
1961 | #define REDO_SECTION_INFO_P(DECL) \ | |
1962 | ((TREE_CODE (DECL) == VAR_DECL) \ | |
94c21c17 GS |
1963 | && (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL) \ |
1964 | || DECL_SECTION_NAME (DECL) != 0)) | |
32adf8e6 | 1965 | |
c65ebc55 JW |
1966 | #define SDATA_NAME_FLAG_CHAR '@' |
1967 | ||
1968 | #define IA64_DEFAULT_GVALUE 8 | |
1969 | ||
1970 | /* Decode SYM_NAME and store the real name part in VAR, sans the characters | |
1971 | that encode section info. */ | |
1972 | ||
1973 | #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \ | |
1974 | (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == SDATA_NAME_FLAG_CHAR) | |
1975 | ||
1976 | \f | |
1977 | /* Position Independent Code. */ | |
1978 | ||
1979 | /* The register number of the register used to address a table of static data | |
1980 | addresses in memory. */ | |
1981 | ||
1982 | /* ??? Should modify ia64.md to use pic_offset_table_rtx instead of | |
1983 | gen_rtx_REG (DImode, 1). */ | |
1984 | ||
1985 | /* ??? Should we set flag_pic? Probably need to define | |
1986 | LEGITIMIZE_PIC_OPERAND_P to make that work. */ | |
1987 | ||
1988 | #define PIC_OFFSET_TABLE_REGNUM GR_REG (1) | |
1989 | ||
1990 | /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is | |
1991 | clobbered by calls. */ | |
1992 | ||
1993 | #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED | |
1994 | ||
1995 | \f | |
1996 | /* The Overall Framework of an Assembler File. */ | |
1997 | ||
1998 | /* A C string constant describing how to begin a comment in the target | |
1999 | assembler language. The compiler assumes that the comment will end at the | |
2000 | end of the line. */ | |
2001 | ||
2002 | #define ASM_COMMENT_START "//" | |
2003 | ||
2004 | /* A C string constant for text to be output before each `asm' statement or | |
2005 | group of consecutive ones. */ | |
2006 | ||
2007 | /* ??? This won't work with the Intel assembler, because it does not accept | |
2008 | # as a comment start character. However, //APP does not work in gas, so we | |
2009 | can't use that either. Same problem for ASM_APP_OFF below. */ | |
2010 | ||
2011 | #define ASM_APP_ON "#APP\n" | |
2012 | ||
2013 | /* A C string constant for text to be output after each `asm' statement or | |
2014 | group of consecutive ones. */ | |
2015 | ||
2016 | #define ASM_APP_OFF "#NO_APP\n" | |
2017 | ||
2018 | \f | |
2019 | /* Output of Data. */ | |
2020 | ||
2021 | /* A C statement to output to the stdio stream STREAM an assembler instruction | |
3f622353 | 2022 | to assemble a floating-point constant of `TFmode', `DFmode', `SFmode', |
c65ebc55 JW |
2023 | respectively, whose value is VALUE. */ |
2024 | ||
c65ebc55 JW |
2025 | /* ??? Must reverse the word order for big-endian code? */ |
2026 | ||
2027 | #define ASM_OUTPUT_LONG_DOUBLE(FILE, VALUE) \ | |
2028 | do { \ | |
2029 | long t[3]; \ | |
2030 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, t); \ | |
3f622353 | 2031 | fprintf (FILE, "\tdata4 0x%08lx, 0x%08lx, 0x%08lx, 0x%08lx\n", \ |
0024a804 | 2032 | t[0] & 0xffffffff, t[1] & 0xffffffff, t[2] & 0xffffffff, 0L);\ |
c65ebc55 JW |
2033 | } while (0) |
2034 | ||
2035 | /* ??? Must reverse the word order for big-endian code? */ | |
2036 | ||
2037 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
2038 | do { \ | |
2039 | long t[2]; \ | |
2040 | REAL_VALUE_TO_TARGET_DOUBLE (VALUE, t); \ | |
2041 | fprintf (FILE, "\tdata8 0x%08lx%08lx\n", \ | |
2042 | t[1] & 0xffffffff, t[0] & 0xffffffff); \ | |
2043 | } while (0) | |
2044 | ||
2045 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
2046 | do { \ | |
2047 | long t; \ | |
2048 | REAL_VALUE_TO_TARGET_SINGLE (VALUE, t); \ | |
2049 | fprintf (FILE, "\tdata4 0x%lx\n", t & 0xffffffff); \ | |
2050 | } while (0) | |
2051 | ||
2052 | /* A C statement to output to the stdio stream STREAM an assembler instruction | |
2053 | to assemble an integer of 1, 2, 4, or 8 bytes, respectively, whose value | |
2054 | is VALUE. */ | |
2055 | ||
2056 | /* This is how to output an assembler line defining a `char' constant. */ | |
2057 | ||
2058 | #define ASM_OUTPUT_CHAR(FILE, VALUE) \ | |
2059 | do { \ | |
f0ca81d2 | 2060 | fprintf (FILE, "%s", ASM_BYTE_OP); \ |
c65ebc55 JW |
2061 | output_addr_const (FILE, (VALUE)); \ |
2062 | fprintf (FILE, "\n"); \ | |
2063 | } while (0) | |
2064 | ||
2065 | /* This is how to output an assembler line defining a `short' constant. */ | |
2066 | ||
2067 | #define ASM_OUTPUT_SHORT(FILE, VALUE) \ | |
2068 | do { \ | |
2069 | fprintf (FILE, "\tdata2\t"); \ | |
2070 | output_addr_const (FILE, (VALUE)); \ | |
2071 | fprintf (FILE, "\n"); \ | |
2072 | } while (0) | |
2073 | ||
2074 | /* This is how to output an assembler line defining an `int' constant. | |
2075 | We also handle symbol output here. */ | |
2076 | ||
2077 | /* ??? For ILP32, also need to handle function addresses here. */ | |
2078 | ||
2079 | #define ASM_OUTPUT_INT(FILE, VALUE) \ | |
2080 | do { \ | |
2081 | fprintf (FILE, "\tdata4\t"); \ | |
2082 | output_addr_const (FILE, (VALUE)); \ | |
2083 | fprintf (FILE, "\n"); \ | |
2084 | } while (0) | |
2085 | ||
2086 | /* This is how to output an assembler line defining a `long' constant. | |
2087 | We also handle symbol output here. */ | |
2088 | ||
2089 | #define ASM_OUTPUT_DOUBLE_INT(FILE, VALUE) \ | |
2090 | do { \ | |
2091 | fprintf (FILE, "\tdata8\t"); \ | |
59da9a7d | 2092 | if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \ |
c65ebc55 JW |
2093 | fprintf (FILE, "@fptr("); \ |
2094 | output_addr_const (FILE, (VALUE)); \ | |
59da9a7d | 2095 | if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \ |
c65ebc55 JW |
2096 | fprintf (FILE, ")"); \ |
2097 | fprintf (FILE, "\n"); \ | |
2098 | } while (0) | |
2099 | ||
0c96007e AM |
2100 | /* This is how to output an assembler line defining a `char' constant |
2101 | to an xdata segment. */ | |
2102 | ||
2103 | #define ASM_OUTPUT_XDATA_CHAR(FILE, SECTION, VALUE) \ | |
2104 | do { \ | |
2105 | fprintf (FILE, "\t.xdata1\t\"%s\", ", SECTION); \ | |
2106 | output_addr_const (FILE, (VALUE)); \ | |
2107 | fprintf (FILE, "\n"); \ | |
2108 | } while (0) | |
2109 | ||
2110 | /* This is how to output an assembler line defining a `short' constant | |
2111 | to an xdata segment. */ | |
2112 | ||
2113 | #define ASM_OUTPUT_XDATA_SHORT(FILE, SECTION, VALUE) \ | |
2114 | do { \ | |
2115 | fprintf (FILE, "\t.xdata2\t\"%s\", ", SECTION); \ | |
2116 | output_addr_const (FILE, (VALUE)); \ | |
2117 | fprintf (FILE, "\n"); \ | |
2118 | } while (0) | |
2119 | ||
2120 | /* This is how to output an assembler line defining an `int' constant | |
2121 | to an xdata segment. We also handle symbol output here. */ | |
2122 | ||
2123 | /* ??? For ILP32, also need to handle function addresses here. */ | |
2124 | ||
2125 | #define ASM_OUTPUT_XDATA_INT(FILE, SECTION, VALUE) \ | |
2126 | do { \ | |
2127 | fprintf (FILE, "\t.xdata4\t\"%s\", ", SECTION); \ | |
2128 | output_addr_const (FILE, (VALUE)); \ | |
2129 | fprintf (FILE, "\n"); \ | |
2130 | } while (0) | |
2131 | ||
2132 | /* This is how to output an assembler line defining a `long' constant | |
2133 | to an xdata segment. We also handle symbol output here. */ | |
2134 | ||
2135 | #define ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, SECTION, VALUE) \ | |
2136 | do { \ | |
59da9a7d | 2137 | int need_closing_paren = 0; \ |
0c96007e | 2138 | fprintf (FILE, "\t.xdata8\t\"%s\", ", SECTION); \ |
59da9a7d JW |
2139 | if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) \ |
2140 | && GET_CODE (VALUE) == SYMBOL_REF) \ | |
0c96007e | 2141 | { \ |
59da9a7d JW |
2142 | fprintf (FILE, SYMBOL_REF_FLAG (VALUE) ? "@fptr(" : "@segrel("); \ |
2143 | need_closing_paren = 1; \ | |
0c96007e | 2144 | } \ |
59da9a7d JW |
2145 | output_addr_const (FILE, VALUE); \ |
2146 | if (need_closing_paren) \ | |
0c96007e AM |
2147 | fprintf (FILE, ")"); \ |
2148 | fprintf (FILE, "\n"); \ | |
2149 | } while (0) | |
2150 | ||
2151 | ||
c65ebc55 JW |
2152 | /* A C statement to output to the stdio stream STREAM an assembler instruction |
2153 | to assemble a single byte containing the number VALUE. */ | |
2154 | ||
2155 | #define ASM_OUTPUT_BYTE(STREAM, VALUE) \ | |
f0ca81d2 | 2156 | fprintf (STREAM, "%s0x%x\n", ASM_BYTE_OP, (int)(VALUE) & 0xff) |
c65ebc55 JW |
2157 | |
2158 | /* These macros are defined as C string constant, describing the syntax in the | |
2159 | assembler for grouping arithmetic expressions. */ | |
2160 | ||
2161 | #define ASM_OPEN_PAREN "(" | |
2162 | #define ASM_CLOSE_PAREN ")" | |
2163 | ||
2164 | \f | |
2165 | /* Output of Uninitialized Variables. */ | |
2166 | ||
2167 | /* This is all handled by svr4.h. */ | |
2168 | ||
2169 | \f | |
2170 | /* Output and Generation of Labels. */ | |
2171 | ||
2172 | /* A C statement (sans semicolon) to output to the stdio stream STREAM the | |
2173 | assembler definition of a label named NAME. */ | |
2174 | ||
2175 | /* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of | |
2176 | why ia64_asm_output_label exists. */ | |
2177 | ||
2178 | extern int ia64_asm_output_label; | |
2179 | #define ASM_OUTPUT_LABEL(STREAM, NAME) \ | |
2180 | do { \ | |
2181 | ia64_asm_output_label = 1; \ | |
2182 | assemble_name (STREAM, NAME); \ | |
2183 | fputs (":\n", STREAM); \ | |
2184 | ia64_asm_output_label = 0; \ | |
2185 | } while (0) | |
2186 | ||
2187 | /* A C statement (sans semicolon) to output to the stdio stream STREAM some | |
2188 | commands that will make the label NAME global; that is, available for | |
2189 | reference from other files. */ | |
2190 | ||
2191 | #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ | |
2192 | do { \ | |
2193 | fputs ("\t.global ", STREAM); \ | |
2194 | assemble_name (STREAM, NAME); \ | |
2195 | fputs ("\n", STREAM); \ | |
2196 | } while (0) | |
2197 | ||
2198 | /* A C statement (sans semicolon) to output to the stdio stream STREAM any text | |
2199 | necessary for declaring the name of an external symbol named NAME which is | |
2200 | referenced in this compilation but not defined. */ | |
2201 | ||
2202 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
2203 | ia64_asm_output_external (FILE, DECL, NAME) | |
2204 | ||
2205 | /* A C statement to store into the string STRING a label whose name is made | |
2206 | from the string PREFIX and the number NUM. */ | |
2207 | ||
2208 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ | |
2209 | do { \ | |
2210 | sprintf (LABEL, "*.%s%d", PREFIX, NUM); \ | |
2211 | } while (0) | |
2212 | ||
2213 | /* A C expression to assign to OUTVAR (which is a variable of type `char *') a | |
2214 | newly allocated string made from the string NAME and the number NUMBER, with | |
2215 | some suitable punctuation added. */ | |
2216 | ||
2217 | /* ??? Not sure if using a ? in the name for Intel as is safe. */ | |
2218 | ||
2219 | #define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ | |
2220 | do { \ | |
2221 | (OUTVAR) = (char *) alloca (strlen (NAME) + 12); \ | |
2222 | sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'), \ | |
2223 | (long)(NUMBER)); \ | |
2224 | } while (0) | |
2225 | ||
2226 | /* A C statement to output to the stdio stream STREAM assembler code which | |
2227 | defines (equates) the symbol NAME to have the value VALUE. */ | |
2228 | ||
2229 | #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \ | |
2230 | do { \ | |
2231 | assemble_name (STREAM, NAME); \ | |
2232 | fputs (" = ", STREAM); \ | |
2233 | assemble_name (STREAM, VALUE); \ | |
2234 | fputc ('\n', STREAM); \ | |
2235 | } while (0) | |
2236 | ||
2237 | \f | |
2238 | /* Macros Controlling Initialization Routines. */ | |
2239 | ||
2240 | /* This is handled by svr4.h and sysv4.h. */ | |
2241 | ||
2242 | \f | |
2243 | /* Output of Assembler Instructions. */ | |
2244 | ||
2245 | /* A C initializer containing the assembler's names for the machine registers, | |
2246 | each one as a C string constant. */ | |
2247 | ||
2248 | #define REGISTER_NAMES \ | |
2249 | { \ | |
2250 | /* General registers. */ \ | |
2251 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \ | |
2252 | "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \ | |
2253 | "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \ | |
2254 | "r30", "r31", \ | |
2255 | /* Local registers. */ \ | |
2256 | "loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \ | |
2257 | "loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \ | |
2258 | "loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \ | |
2259 | "loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \ | |
2260 | "loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \ | |
2261 | "loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \ | |
2262 | "loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \ | |
2263 | "loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \ | |
2264 | "loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \ | |
2265 | "loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \ | |
2266 | /* Input registers. */ \ | |
2267 | "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \ | |
2268 | /* Output registers. */ \ | |
2269 | "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \ | |
2270 | /* Floating-point registers. */ \ | |
2271 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \ | |
2272 | "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \ | |
2273 | "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \ | |
2274 | "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \ | |
2275 | "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \ | |
2276 | "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \ | |
2277 | "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \ | |
2278 | "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \ | |
2279 | "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \ | |
2280 | "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \ | |
2281 | "f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\ | |
2282 | "f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\ | |
2283 | "f120","f121","f122","f123","f124","f125","f126","f127", \ | |
2284 | /* Predicate registers. */ \ | |
2285 | "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \ | |
2286 | "p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \ | |
2287 | "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \ | |
2288 | "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \ | |
2289 | "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \ | |
2290 | "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \ | |
2291 | "p60", "p61", "p62", "p63", \ | |
2292 | /* Branch registers. */ \ | |
2293 | "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \ | |
2294 | /* Frame pointer. Return address. */ \ | |
97e242b0 | 2295 | "sfp", "retaddr", "ar.ccv", "ar.unat", "ar.pfs", "ar.lc", "ar.ec", \ |
c65ebc55 JW |
2296 | } |
2297 | ||
2298 | /* If defined, a C initializer for an array of structures containing a name and | |
2299 | a register number. This macro defines additional names for hard registers, | |
2300 | thus allowing the `asm' option in declarations to refer to registers using | |
2301 | alternate names. */ | |
2302 | ||
2303 | #define ADDITIONAL_REGISTER_NAMES \ | |
2304 | { \ | |
2305 | { "gp", R_GR (1) }, \ | |
2306 | { "sp", R_GR (12) }, \ | |
2307 | { "in0", IN_REG (0) }, \ | |
2308 | { "in1", IN_REG (1) }, \ | |
2309 | { "in2", IN_REG (2) }, \ | |
2310 | { "in3", IN_REG (3) }, \ | |
2311 | { "in4", IN_REG (4) }, \ | |
2312 | { "in5", IN_REG (5) }, \ | |
2313 | { "in6", IN_REG (6) }, \ | |
2314 | { "in7", IN_REG (7) }, \ | |
2315 | { "out0", OUT_REG (0) }, \ | |
2316 | { "out1", OUT_REG (1) }, \ | |
2317 | { "out2", OUT_REG (2) }, \ | |
2318 | { "out3", OUT_REG (3) }, \ | |
2319 | { "out4", OUT_REG (4) }, \ | |
2320 | { "out5", OUT_REG (5) }, \ | |
2321 | { "out6", OUT_REG (6) }, \ | |
2322 | { "out7", OUT_REG (7) }, \ | |
2323 | { "loc0", LOC_REG (0) }, \ | |
2324 | { "loc1", LOC_REG (1) }, \ | |
2325 | { "loc2", LOC_REG (2) }, \ | |
2326 | { "loc3", LOC_REG (3) }, \ | |
2327 | { "loc4", LOC_REG (4) }, \ | |
2328 | { "loc5", LOC_REG (5) }, \ | |
2329 | { "loc6", LOC_REG (6) }, \ | |
2330 | { "loc7", LOC_REG (7) }, \ | |
2331 | { "loc8", LOC_REG (8) }, \ | |
2332 | { "loc9", LOC_REG (9) }, \ | |
2333 | { "loc10", LOC_REG (10) }, \ | |
2334 | { "loc11", LOC_REG (11) }, \ | |
2335 | { "loc12", LOC_REG (12) }, \ | |
2336 | { "loc13", LOC_REG (13) }, \ | |
2337 | { "loc14", LOC_REG (14) }, \ | |
2338 | { "loc15", LOC_REG (15) }, \ | |
2339 | { "loc16", LOC_REG (16) }, \ | |
2340 | { "loc17", LOC_REG (17) }, \ | |
2341 | { "loc18", LOC_REG (18) }, \ | |
2342 | { "loc19", LOC_REG (19) }, \ | |
2343 | { "loc20", LOC_REG (20) }, \ | |
2344 | { "loc21", LOC_REG (21) }, \ | |
2345 | { "loc22", LOC_REG (22) }, \ | |
2346 | { "loc23", LOC_REG (23) }, \ | |
2347 | { "loc24", LOC_REG (24) }, \ | |
2348 | { "loc25", LOC_REG (25) }, \ | |
2349 | { "loc26", LOC_REG (26) }, \ | |
2350 | { "loc27", LOC_REG (27) }, \ | |
2351 | { "loc28", LOC_REG (28) }, \ | |
2352 | { "loc29", LOC_REG (29) }, \ | |
2353 | { "loc30", LOC_REG (30) }, \ | |
2354 | { "loc31", LOC_REG (31) }, \ | |
2355 | { "loc32", LOC_REG (32) }, \ | |
2356 | { "loc33", LOC_REG (33) }, \ | |
2357 | { "loc34", LOC_REG (34) }, \ | |
2358 | { "loc35", LOC_REG (35) }, \ | |
2359 | { "loc36", LOC_REG (36) }, \ | |
2360 | { "loc37", LOC_REG (37) }, \ | |
2361 | { "loc38", LOC_REG (38) }, \ | |
2362 | { "loc39", LOC_REG (39) }, \ | |
2363 | { "loc40", LOC_REG (40) }, \ | |
2364 | { "loc41", LOC_REG (41) }, \ | |
2365 | { "loc42", LOC_REG (42) }, \ | |
2366 | { "loc43", LOC_REG (43) }, \ | |
2367 | { "loc44", LOC_REG (44) }, \ | |
2368 | { "loc45", LOC_REG (45) }, \ | |
2369 | { "loc46", LOC_REG (46) }, \ | |
2370 | { "loc47", LOC_REG (47) }, \ | |
2371 | { "loc48", LOC_REG (48) }, \ | |
2372 | { "loc49", LOC_REG (49) }, \ | |
2373 | { "loc50", LOC_REG (50) }, \ | |
2374 | { "loc51", LOC_REG (51) }, \ | |
2375 | { "loc52", LOC_REG (52) }, \ | |
2376 | { "loc53", LOC_REG (53) }, \ | |
2377 | { "loc54", LOC_REG (54) }, \ | |
2378 | { "loc55", LOC_REG (55) }, \ | |
2379 | { "loc56", LOC_REG (56) }, \ | |
2380 | { "loc57", LOC_REG (57) }, \ | |
2381 | { "loc58", LOC_REG (58) }, \ | |
2382 | { "loc59", LOC_REG (59) }, \ | |
2383 | { "loc60", LOC_REG (60) }, \ | |
2384 | { "loc61", LOC_REG (61) }, \ | |
2385 | { "loc62", LOC_REG (62) }, \ | |
2386 | { "loc63", LOC_REG (63) }, \ | |
2387 | { "loc64", LOC_REG (64) }, \ | |
2388 | { "loc65", LOC_REG (65) }, \ | |
2389 | { "loc66", LOC_REG (66) }, \ | |
2390 | { "loc67", LOC_REG (67) }, \ | |
2391 | { "loc68", LOC_REG (68) }, \ | |
2392 | { "loc69", LOC_REG (69) }, \ | |
2393 | { "loc70", LOC_REG (70) }, \ | |
2394 | { "loc71", LOC_REG (71) }, \ | |
2395 | { "loc72", LOC_REG (72) }, \ | |
2396 | { "loc73", LOC_REG (73) }, \ | |
2397 | { "loc74", LOC_REG (74) }, \ | |
2398 | { "loc75", LOC_REG (75) }, \ | |
2399 | { "loc76", LOC_REG (76) }, \ | |
2400 | { "loc77", LOC_REG (77) }, \ | |
2401 | { "loc78", LOC_REG (78) }, \ | |
794eefd9 | 2402 | { "loc79", LOC_REG (79) }, \ |
c65ebc55 JW |
2403 | } |
2404 | ||
2405 | /* A C compound statement to output to stdio stream STREAM the assembler syntax | |
2406 | for an instruction operand X. X is an RTL expression. */ | |
2407 | ||
2408 | #define PRINT_OPERAND(STREAM, X, CODE) \ | |
2409 | ia64_print_operand (STREAM, X, CODE) | |
2410 | ||
2411 | /* A C expression which evaluates to true if CODE is a valid punctuation | |
2412 | character for use in the `PRINT_OPERAND' macro. */ | |
2413 | ||
2414 | /* ??? Keep this around for now, as we might need it later. */ | |
2415 | ||
6f8aa100 RH |
2416 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ |
2417 | ((CODE) == '+' || (CODE) == ',') | |
c65ebc55 JW |
2418 | |
2419 | /* A C compound statement to output to stdio stream STREAM the assembler syntax | |
2420 | for an instruction operand that is a memory reference whose address is X. X | |
2421 | is an RTL expression. */ | |
2422 | ||
2423 | #define PRINT_OPERAND_ADDRESS(STREAM, X) \ | |
2424 | ia64_print_operand_address (STREAM, X) | |
2425 | ||
2426 | /* If defined, C string expressions to be used for the `%R', `%L', `%U', and | |
2427 | `%I' options of `asm_fprintf' (see `final.c'). */ | |
2428 | ||
2429 | #define REGISTER_PREFIX "" | |
2430 | #define LOCAL_LABEL_PREFIX "." | |
2431 | #define USER_LABEL_PREFIX "" | |
2432 | #define IMMEDIATE_PREFIX "" | |
2433 | ||
2434 | \f | |
2435 | /* Output of dispatch tables. */ | |
2436 | ||
2437 | /* This macro should be provided on machines where the addresses in a dispatch | |
2438 | table are relative to the table's own address. */ | |
2439 | ||
2440 | /* ??? Depends on the pointer size. */ | |
2441 | ||
2442 | #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ | |
2443 | fprintf (STREAM, "\tdata8 .L%d-.L%d\n", VALUE, REL) | |
2444 | ||
2445 | /* This is how to output an element of a case-vector that is absolute. | |
2446 | (Ia64 does not use such vectors, but we must define this macro anyway.) */ | |
2447 | ||
2448 | #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) abort () | |
2449 | ||
2450 | /* Define this if something special must be output at the end of a jump-table. | |
2451 | We need to align back to a 16 byte boundary because offsets are smaller than | |
2452 | instructions. */ | |
2453 | ||
2454 | #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) ASM_OUTPUT_ALIGN (STREAM, 4) | |
2455 | ||
2456 | /* Jump tables only need 8 byte alignment. */ | |
2457 | ||
2458 | #define ADDR_VEC_ALIGN(ADDR_VEC) 3 | |
2459 | ||
2460 | \f | |
2461 | /* Assembler Commands for Exception Regions. */ | |
2462 | ||
c65ebc55 JW |
2463 | /* If defined, a C string constant for the assembler operation to switch to the |
2464 | section for exception handling frame unwind information. If not defined, | |
2465 | GNU CC will provide a default definition if the target supports named | |
2466 | sections. `crtstuff.c' uses this macro to switch to the appropriate | |
2467 | section. | |
2468 | ||
2469 | You should define this symbol if your target supports DWARF 2 frame unwind | |
2470 | information and the default definition does not work. */ | |
de323aa1 | 2471 | #define EH_FRAME_SECTION_ASM_OP "\t.section\t.IA_64.unwind,\"aw\"" |
c65ebc55 | 2472 | |
2a1ee410 RH |
2473 | /* Select a format to encode pointers in exception handling data. CODE |
2474 | is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is | |
2475 | true if the symbol may be affected by dynamic relocations. */ | |
2476 | #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ | |
2477 | (((CODE) == 1 ? DW_EH_PE_textrel : DW_EH_PE_datarel) \ | |
2478 | | ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_udata8) | |
2479 | ||
2480 | /* Handle special EH pointer encodings. Absolute, pc-relative, and | |
2481 | indirect are handled automatically. */ | |
2482 | #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \ | |
2483 | do { \ | |
2484 | const char *reltag = NULL; \ | |
2485 | if (((ENCODING) & 0xF0) == DW_EH_PE_textrel) \ | |
2486 | reltag = "@segrel("; \ | |
2487 | else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel) \ | |
2488 | reltag = "@gprel("; \ | |
2489 | if (reltag) \ | |
2490 | { \ | |
2491 | fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \ | |
2492 | : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \ | |
2493 | : (abort (), "")), FILE); \ | |
2494 | fputs (reltag, FILE); \ | |
2495 | assemble_name (FILE, XSTR (ADDR, 0)); \ | |
2496 | fputc (')', FILE); \ | |
2497 | goto DONE; \ | |
2498 | } \ | |
2499 | } while (0) | |
c65ebc55 | 2500 | |
c65ebc55 JW |
2501 | \f |
2502 | /* Assembler Commands for Alignment. */ | |
2503 | ||
2504 | /* The alignment (log base 2) to put in front of LABEL, which follows | |
2505 | a BARRIER. */ | |
2506 | ||
2507 | /* ??? Investigate. */ | |
2508 | ||
2509 | /* ??? Emitting align directives increases the size of the line number debug | |
2510 | info, because each .align forces use of an extended opcode. Perhaps try | |
2511 | to fix this in the assembler? */ | |
2512 | ||
2513 | /* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */ | |
2514 | ||
2515 | /* The desired alignment for the location counter at the beginning | |
2516 | of a loop. */ | |
2517 | ||
2518 | /* ??? Investigate. */ | |
2519 | /* #define LOOP_ALIGN(LABEL) */ | |
2520 | ||
2521 | /* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text | |
2522 | section because it fails put zeros in the bytes that are skipped. */ | |
2523 | ||
2524 | #define ASM_NO_SKIP_IN_TEXT 1 | |
2525 | ||
2526 | /* A C statement to output to the stdio stream STREAM an assembler command to | |
2527 | advance the location counter to a multiple of 2 to the POWER bytes. */ | |
2528 | ||
2529 | #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ | |
2530 | fprintf (STREAM, "\t.align %d\n", 1<<(POWER)) | |
2531 | ||
2532 | \f | |
2533 | /* Macros Affecting all Debug Formats. */ | |
2534 | ||
2535 | /* This is handled in svr4.h and sysv4.h. */ | |
2536 | ||
2537 | \f | |
2538 | /* Specific Options for DBX Output. */ | |
2539 | ||
2540 | /* This is handled by dbxelf.h which is included by svr4.h. */ | |
2541 | ||
2542 | \f | |
2543 | /* Open ended Hooks for DBX Output. */ | |
2544 | ||
2545 | /* Likewise. */ | |
2546 | ||
2547 | \f | |
2548 | /* File names in DBX format. */ | |
2549 | ||
2550 | /* Likewise. */ | |
2551 | ||
2552 | \f | |
2553 | /* Macros for SDB and Dwarf Output. */ | |
2554 | ||
2555 | /* Define this macro if GNU CC should produce dwarf version 2 format debugging | |
2556 | output in response to the `-g' option. */ | |
2557 | ||
2558 | #define DWARF2_DEBUGGING_INFO | |
2559 | ||
2560 | /* Section names for DWARF2 debug info. */ | |
2561 | ||
2562 | #define DEBUG_INFO_SECTION ".debug_info, \"\", \"progbits\"" | |
9d2f2c45 RH |
2563 | #define DEBUG_ABBREV_SECTION ".debug_abbrev, \"\", \"progbits\"" |
2564 | #define DEBUG_ARANGES_SECTION ".debug_aranges, \"\", \"progbits\"" | |
2565 | #define DEBUG_MACINFO_SECTION ".debug_macinfo, \"\", \"progbits\"" | |
c65ebc55 | 2566 | #define DEBUG_LINE_SECTION ".debug_line, \"\", \"progbits\"" |
9d2f2c45 RH |
2567 | #define DEBUG_LOC_SECTION ".debug_loc, \"\", \"progbits\"" |
2568 | #define DEBUG_PUBNAMES_SECTION ".debug_pubnames, \"\", \"progbits\"" | |
2569 | #define DEBUG_STR_SECTION ".debug_str, \"\", \"progbits\"" | |
c65ebc55 JW |
2570 | |
2571 | /* C string constants giving the pseudo-op to use for a sequence of | |
2572 | 2, 4, and 8 byte unaligned constants. dwarf2out.c needs these. */ | |
2573 | ||
de323aa1 HPN |
2574 | #define UNALIGNED_SHORT_ASM_OP "\tdata2.ua\t" |
2575 | #define UNALIGNED_INT_ASM_OP "\tdata4.ua\t" | |
2576 | #define UNALIGNED_DOUBLE_INT_ASM_OP "\tdata8.ua\t" | |
c65ebc55 JW |
2577 | |
2578 | /* We need to override the default definition for this in dwarf2out.c so that | |
2579 | we can emit the necessary # postfix. */ | |
2580 | #define ASM_NAME_TO_STRING(STR, NAME) \ | |
2581 | do { \ | |
2582 | if ((NAME)[0] == '*') \ | |
2583 | dyn_string_append (STR, NAME + 1); \ | |
2584 | else \ | |
2585 | { \ | |
2586 | char *newstr; \ | |
2587 | STRIP_NAME_ENCODING (newstr, NAME); \ | |
2588 | dyn_string_append (STR, user_label_prefix); \ | |
2589 | dyn_string_append (STR, newstr); \ | |
2590 | dyn_string_append (STR, "#"); \ | |
2591 | } \ | |
2592 | } \ | |
2593 | while (0) | |
2594 | ||
2595 | #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM) | |
2596 | ||
8215347e JW |
2597 | /* Use tags for debug info labels, so that they don't break instruction |
2598 | bundles. This also avoids getting spurious DV warnings from the | |
2599 | assembler. This is similar to ASM_OUTPUT_INTERNAL_LABEL, except that we | |
2600 | add brackets around the label. */ | |
2601 | ||
2602 | #define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \ | |
7426e9a2 | 2603 | fprintf (FILE, "[.%s%d:]\n", PREFIX, NUM) |
8215347e | 2604 | |
7426e9a2 RH |
2605 | /* Use section-relative relocations for debugging offsets. Unlike other |
2606 | targets that fake this by putting the section VMA at 0, IA-64 has | |
2607 | proper relocations for them. */ | |
2608 | #define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL) \ | |
2609 | do { \ | |
2610 | fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \ | |
2611 | : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \ | |
2612 | : (abort (), "")), FILE); \ | |
2613 | fputs ("@secrel(", FILE); \ | |
2614 | assemble_name (FILE, LABEL); \ | |
2615 | fputc (')', FILE); \ | |
2616 | } while (0) | |
2617 | ||
2618 | /* Emit a PC-relative relocation. */ | |
2619 | #define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \ | |
2620 | do { \ | |
2621 | fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \ | |
2622 | : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \ | |
2623 | : (abort (), "")), FILE); \ | |
2624 | fputs ("@pcrel(", FILE); \ | |
2625 | assemble_name (FILE, LABEL); \ | |
2626 | fputc (')', FILE); \ | |
2627 | } while (0) | |
c65ebc55 JW |
2628 | \f |
2629 | /* Cross Compilation and Floating Point. */ | |
2630 | ||
2631 | /* Define to enable software floating point emulation. */ | |
2632 | #define REAL_ARITHMETIC | |
2633 | ||
7b82b5da SC |
2634 | \f |
2635 | /* Register Renaming Parameters. */ | |
2636 | ||
2637 | /* A C expression that is nonzero if hard register number REGNO2 can be | |
2638 | considered for use as a rename register for REGNO1 */ | |
2639 | ||
2640 | #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \ | |
10c9f189 | 2641 | ia64_hard_regno_rename_ok((REGNO1), (REGNO2)) |
7b82b5da SC |
2642 | |
2643 | /* Define this macro if the compiler should use extended basic blocks | |
2644 | when renaming registers. Define this macro if the target has predicate | |
2645 | registers. */ | |
2646 | ||
2647 | #define RENAME_EXTENDED_BLOCKS | |
2648 | ||
c65ebc55 JW |
2649 | \f |
2650 | /* Miscellaneous Parameters. */ | |
2651 | ||
2652 | /* Define this if you have defined special-purpose predicates in the file | |
2653 | `MACHINE.c'. For each predicate, list all rtl codes that can be in | |
2654 | expressions matched by the predicate. */ | |
2655 | ||
2656 | #define PREDICATE_CODES \ | |
2657 | { "call_operand", {SUBREG, REG, SYMBOL_REF}}, \ | |
ec039e3c | 2658 | { "got_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ |
c65ebc55 JW |
2659 | { "sdata_symbolic_operand", {SYMBOL_REF, CONST}}, \ |
2660 | { "symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ | |
2661 | { "function_operand", {SYMBOL_REF}}, \ | |
2662 | { "setjmp_operand", {SYMBOL_REF}}, \ | |
4b983fdc | 2663 | { "destination_operand", {SUBREG, REG, MEM}}, \ |
0551c32d | 2664 | { "not_postinc_memory_operand", {MEM}}, \ |
c65ebc55 JW |
2665 | { "move_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ |
2666 | CONSTANT_P_RTX, SYMBOL_REF, CONST, LABEL_REF}}, \ | |
0551c32d RH |
2667 | { "gr_register_operand", {SUBREG, REG}}, \ |
2668 | { "fr_register_operand", {SUBREG, REG}}, \ | |
2669 | { "grfr_register_operand", {SUBREG, REG}}, \ | |
2670 | { "gr_nonimmediate_operand", {SUBREG, REG, MEM}}, \ | |
655f2eb9 | 2671 | { "fr_nonimmediate_operand", {SUBREG, REG, MEM}}, \ |
0551c32d RH |
2672 | { "grfr_nonimmediate_operand", {SUBREG, REG, MEM}}, \ |
2673 | { "gr_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ | |
2674 | { "gr_reg_or_5bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
2675 | { "gr_reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
2676 | { "gr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
2677 | { "grfr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
2678 | { "gr_reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \ | |
c65ebc55 | 2679 | CONSTANT_P_RTX}}, \ |
0551c32d | 2680 | { "gr_reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \ |
c65ebc55 | 2681 | CONSTANT_P_RTX}}, \ |
0551c32d RH |
2682 | { "gr_reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ |
2683 | { "gr_reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
c65ebc55 JW |
2684 | { "shift_count_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ |
2685 | { "shift_32bit_count_operand", {SUBREG, REG, CONST_INT, \ | |
2686 | CONSTANT_P_RTX}}, \ | |
2687 | { "shladd_operand", {CONST_INT}}, \ | |
2688 | { "fetchadd_operand", {CONST_INT}}, \ | |
0551c32d | 2689 | { "fr_reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE}}, \ |
c65ebc55 JW |
2690 | { "normal_comparison_operator", {EQ, NE, GT, LE, GTU, LEU}}, \ |
2691 | { "adjusted_comparison_operator", {LT, GE, LTU, GEU}}, \ | |
f2f90c63 | 2692 | { "signed_inequality_operator", {GE, GT, LE, LT}}, \ |
5527bf14 | 2693 | { "predicate_operator", {NE, EQ}}, \ |
97e242b0 | 2694 | { "ar_lc_reg_operand", {REG}}, \ |
3f622353 RH |
2695 | { "ar_ccv_reg_operand", {REG}}, \ |
2696 | { "general_tfmode_operand", {SUBREG, REG, CONST_DOUBLE, MEM}}, \ | |
2697 | { "destination_tfmode_operand", {SUBREG, REG, MEM}}, \ | |
2698 | { "tfreg_or_fp01_operand", {REG, CONST_DOUBLE}}, | |
c65ebc55 JW |
2699 | |
2700 | /* An alias for a machine mode name. This is the machine mode that elements of | |
2701 | a jump-table should have. */ | |
2702 | ||
2703 | #define CASE_VECTOR_MODE Pmode | |
2704 | ||
2705 | /* Define as C expression which evaluates to nonzero if the tablejump | |
2706 | instruction expects the table to contain offsets from the address of the | |
2707 | table. */ | |
2708 | ||
2709 | #define CASE_VECTOR_PC_RELATIVE 1 | |
2710 | ||
2711 | /* Define this macro if operations between registers with integral mode smaller | |
2712 | than a word are always performed on the entire register. */ | |
2713 | ||
2714 | #define WORD_REGISTER_OPERATIONS | |
2715 | ||
2716 | /* Define this macro to be a C expression indicating when insns that read | |
2717 | memory in MODE, an integral mode narrower than a word, set the bits outside | |
2718 | of MODE to be either the sign-extension or the zero-extension of the data | |
2719 | read. */ | |
2720 | ||
2721 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
2722 | ||
2723 | /* An alias for a tree code that should be used by default for conversion of | |
2724 | floating point values to fixed point. */ | |
2725 | ||
2726 | /* ??? Looks like this macro is obsolete and should be deleted everywhere. */ | |
2727 | ||
2728 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
2729 | ||
2730 | /* An alias for a tree code that is the easiest kind of division to compile | |
2731 | code for in the general case. */ | |
2732 | ||
2733 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
2734 | ||
2735 | /* The maximum number of bytes that a single instruction can move quickly from | |
2736 | memory to memory. */ | |
2737 | #define MOVE_MAX 8 | |
2738 | ||
2739 | /* A C expression which is nonzero if on this machine it is safe to "convert" | |
2740 | an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller | |
2741 | than INPREC) by merely operating on it as if it had only OUTPREC bits. */ | |
2742 | ||
2743 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
2744 | ||
2745 | /* A C expression describing the value returned by a comparison operator with | |
2746 | an integral mode and stored by a store-flag instruction (`sCOND') when the | |
2747 | condition is true. */ | |
2748 | ||
2749 | /* ??? Investigate using -1 instead of 1. */ | |
2750 | ||
2751 | #define STORE_FLAG_VALUE 1 | |
2752 | ||
2753 | /* An alias for the machine mode for pointers. */ | |
2754 | ||
2755 | /* ??? This would change if we had ILP32 support. */ | |
2756 | ||
2757 | #define Pmode DImode | |
2758 | ||
2759 | /* An alias for the machine mode used for memory references to functions being | |
2760 | called, in `call' RTL expressions. */ | |
2761 | ||
2762 | #define FUNCTION_MODE Pmode | |
2763 | ||
2764 | /* Define this macro to handle System V style pragmas: #pragma pack and | |
2765 | #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is | |
2766 | defined. */ | |
2767 | ||
2768 | #define HANDLE_SYSV_PRAGMA | |
2769 | ||
2770 | /* If defined, a C expression whose value is nonzero if IDENTIFIER with | |
2771 | arguments ARGS is a valid machine specific attribute for TYPE. The | |
2772 | attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
2773 | ||
2774 | #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, IDENTIFIER, ARGS) \ | |
2775 | ia64_valid_type_attribute (TYPE, ATTRIBUTES, IDENTIFIER, ARGS) | |
2776 | ||
2777 | /* In rare cases, correct code generation requires extra machine dependent | |
2778 | processing between the second jump optimization pass and delayed branch | |
2779 | scheduling. On those machines, define this macro as a C statement to act on | |
2780 | the code starting at INSN. */ | |
2781 | ||
2782 | #define MACHINE_DEPENDENT_REORG(INSN) ia64_reorg (INSN) | |
2783 | ||
2784 | /* A C expression for the maximum number of instructions to execute via | |
2785 | conditional execution instructions instead of a branch. A value of | |
2786 | BRANCH_COST+1 is the default if the machine does not use | |
2787 | cc0, and 1 if it does use cc0. */ | |
2788 | /* ??? Investigate. */ | |
2130b7fb BS |
2789 | #define MAX_CONDITIONAL_EXECUTE 12 |
2790 | ||
2791 | /* A C statement (sans semicolon) to update the integer scheduling | |
2792 | priority `INSN_PRIORITY(INSN)'. */ | |
2793 | ||
2794 | /* ??? Investigate. */ | |
2795 | /* #define ADJUST_PRIORITY (INSN) */ | |
2796 | ||
2797 | /* A C statement (sans semicolon) to update the integer variable COST | |
2798 | based on the relationship between INSN that is dependent on | |
2799 | DEP_INSN through the dependence LINK. The default is to make no | |
2800 | adjustment to COST. This can be used for example to specify to | |
2801 | the scheduler that an output- or anti-dependence does not incur | |
2802 | the same cost as a data-dependence. */ | |
2803 | ||
2804 | #define ADJUST_COST(insn,link,dep_insn,cost) \ | |
2805 | (cost) = ia64_adjust_cost(insn, link, dep_insn, cost) | |
2806 | ||
2807 | #define ISSUE_RATE ia64_issue_rate () | |
2808 | ||
2809 | #define MD_SCHED_INIT(DUMP, SCHED_VERBOSE, MAX_READY) \ | |
2810 | ia64_sched_init (DUMP, SCHED_VERBOSE, MAX_READY) | |
2811 | ||
2812 | #define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \ | |
a0a7b566 | 2813 | (CIM) = ia64_sched_reorder (DUMP, SCHED_VERBOSE, READY, &N_READY, 0, CLOCK) |
2130b7fb BS |
2814 | |
2815 | #define MD_SCHED_REORDER2(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \ | |
a0a7b566 | 2816 | (CIM) = ia64_sched_reorder2 (DUMP, SCHED_VERBOSE, READY, &N_READY, CLOCK) |
c65ebc55 | 2817 | |
2130b7fb BS |
2818 | #define MD_SCHED_FINISH(DUMP, SCHED_VERBOSE) \ |
2819 | ia64_sched_finish (DUMP, SCHED_VERBOSE) | |
c65ebc55 | 2820 | |
2130b7fb BS |
2821 | #define MD_SCHED_VARIABLE_ISSUE(DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE) \ |
2822 | ((CAN_ISSUE_MORE) \ | |
2823 | = ia64_variable_issue (DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE)) | |
c65ebc55 | 2824 | |
2130b7fb | 2825 | extern int ia64_final_schedule; |
c65ebc55 | 2826 | |
0c96007e | 2827 | #define IA64_UNWIND_INFO 1 |
0c96007e AM |
2828 | #define IA64_UNWIND_EMIT(f,i) process_for_unwind_directive (f,i) |
2829 | ||
2a1ee410 RH |
2830 | #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 15 : INVALID_REGNUM) |
2831 | ||
0c96007e AM |
2832 | /* This function contains machine specific function data. */ |
2833 | struct machine_function | |
2834 | { | |
2835 | /* The new stack pointer when unwinding from EH. */ | |
2836 | struct rtx_def* ia64_eh_epilogue_sp; | |
2837 | ||
2838 | /* The new bsp value when unwinding from EH. */ | |
2839 | struct rtx_def* ia64_eh_epilogue_bsp; | |
97e242b0 RH |
2840 | |
2841 | /* The GP value save register. */ | |
2842 | struct rtx_def* ia64_gp_save; | |
26a110f5 RH |
2843 | |
2844 | /* The number of varargs registers to save. */ | |
2845 | int n_varargs; | |
0c96007e AM |
2846 | }; |
2847 | ||
2848 | ||
c65ebc55 JW |
2849 | enum ia64_builtins |
2850 | { | |
2851 | IA64_BUILTIN_SYNCHRONIZE, | |
2852 | ||
2853 | IA64_BUILTIN_FETCH_AND_ADD_SI, | |
2854 | IA64_BUILTIN_FETCH_AND_SUB_SI, | |
2855 | IA64_BUILTIN_FETCH_AND_OR_SI, | |
2856 | IA64_BUILTIN_FETCH_AND_AND_SI, | |
2857 | IA64_BUILTIN_FETCH_AND_XOR_SI, | |
2858 | IA64_BUILTIN_FETCH_AND_NAND_SI, | |
2859 | ||
2860 | IA64_BUILTIN_ADD_AND_FETCH_SI, | |
2861 | IA64_BUILTIN_SUB_AND_FETCH_SI, | |
2862 | IA64_BUILTIN_OR_AND_FETCH_SI, | |
2863 | IA64_BUILTIN_AND_AND_FETCH_SI, | |
2864 | IA64_BUILTIN_XOR_AND_FETCH_SI, | |
2865 | IA64_BUILTIN_NAND_AND_FETCH_SI, | |
2866 | ||
2867 | IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI, | |
2868 | IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI, | |
2869 | ||
2870 | IA64_BUILTIN_SYNCHRONIZE_SI, | |
2871 | ||
2872 | IA64_BUILTIN_LOCK_TEST_AND_SET_SI, | |
2873 | ||
2874 | IA64_BUILTIN_LOCK_RELEASE_SI, | |
2875 | ||
2876 | IA64_BUILTIN_FETCH_AND_ADD_DI, | |
2877 | IA64_BUILTIN_FETCH_AND_SUB_DI, | |
2878 | IA64_BUILTIN_FETCH_AND_OR_DI, | |
2879 | IA64_BUILTIN_FETCH_AND_AND_DI, | |
2880 | IA64_BUILTIN_FETCH_AND_XOR_DI, | |
2881 | IA64_BUILTIN_FETCH_AND_NAND_DI, | |
2882 | ||
2883 | IA64_BUILTIN_ADD_AND_FETCH_DI, | |
2884 | IA64_BUILTIN_SUB_AND_FETCH_DI, | |
2885 | IA64_BUILTIN_OR_AND_FETCH_DI, | |
2886 | IA64_BUILTIN_AND_AND_FETCH_DI, | |
2887 | IA64_BUILTIN_XOR_AND_FETCH_DI, | |
2888 | IA64_BUILTIN_NAND_AND_FETCH_DI, | |
2889 | ||
2890 | IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI, | |
2891 | IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI, | |
2892 | ||
2893 | IA64_BUILTIN_SYNCHRONIZE_DI, | |
2894 | ||
2895 | IA64_BUILTIN_LOCK_TEST_AND_SET_DI, | |
2896 | ||
ce152ef8 AM |
2897 | IA64_BUILTIN_LOCK_RELEASE_DI, |
2898 | ||
2899 | IA64_BUILTIN_BSP, | |
2900 | IA64_BUILTIN_FLUSHRS | |
c65ebc55 JW |
2901 | }; |
2902 | ||
2903 | /* Codes for expand_compare_and_swap and expand_swap_and_compare. */ | |
2904 | enum fetchop_code { | |
2905 | IA64_ADD_OP, IA64_SUB_OP, IA64_OR_OP, IA64_AND_OP, IA64_XOR_OP, IA64_NAND_OP | |
2906 | }; | |
2907 | ||
2908 | #define MD_INIT_BUILTINS do { \ | |
2909 | ia64_init_builtins (); \ | |
2910 | } while (0) | |
2911 | ||
2912 | #define MD_EXPAND_BUILTIN(EXP, TARGET, SUBTARGET, MODE, IGNORE) \ | |
2913 | ia64_expand_builtin ((EXP), (TARGET), (SUBTARGET), (MODE), (IGNORE)) | |
2914 | ||
2915 | /* End of ia64.h */ |