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8b109b37 RK |
1 | /* Definitions of target machine for GNU compiler for Intel X86 |
2 | (386, 486, Pentium). | |
e5e809f4 | 3 | Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. |
c98f8742 JVA |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
97aadbb9 | 19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
d4ba09c0 | 20 | Boston, MA 02111-1307, USA. */ |
c98f8742 JVA |
21 | |
22 | /* The purpose of this file is to define the characteristics of the i386, | |
b4ac57ab | 23 | independent of assembler syntax or operating system. |
c98f8742 JVA |
24 | |
25 | Three other files build on this one to describe a specific assembler syntax: | |
26 | bsd386.h, att386.h, and sun386.h. | |
27 | ||
28 | The actual tm.h file for a particular system should include | |
29 | this file, and then the file for the appropriate assembler syntax. | |
30 | ||
31 | Many macros that specify assembler syntax are omitted entirely from | |
32 | this file because they really belong in the files for particular | |
33 | assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE, | |
34 | PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, | |
35 | PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */ | |
36 | ||
37 | /* Names to predefine in the preprocessor for this target machine. */ | |
38 | ||
39 | #define I386 1 | |
40 | ||
95393dfd CH |
41 | /* Stubs for half-pic support if not OSF/1 reference platform. */ |
42 | ||
43 | #ifndef HALF_PIC_P | |
44 | #define HALF_PIC_P() 0 | |
45 | #define HALF_PIC_NUMBER_PTRS 0 | |
46 | #define HALF_PIC_NUMBER_REFS 0 | |
47 | #define HALF_PIC_ENCODE(DECL) | |
48 | #define HALF_PIC_DECLARE(NAME) | |
49 | #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.") | |
50 | #define HALF_PIC_ADDRESS_P(X) 0 | |
51 | #define HALF_PIC_PTR(X) X | |
52 | #define HALF_PIC_FINISH(STREAM) | |
53 | #endif | |
54 | ||
d4ba09c0 SC |
55 | /* Define the specific costs for a given cpu */ |
56 | ||
57 | struct processor_costs { | |
58 | int add; /* cost of an add instruction */ | |
59 | int lea; /* cost of a lea instruction */ | |
60 | int shift_var; /* variable shift costs */ | |
61 | int shift_const; /* constant shift costs */ | |
62 | int mult_init; /* cost of starting a multiply */ | |
63 | int mult_bit; /* cost of multiply per each bit set */ | |
64 | int divide; /* cost of a divide/mod */ | |
65 | }; | |
66 | ||
67 | extern struct processor_costs *ix86_cost; | |
68 | ||
c98f8742 JVA |
69 | /* Run-time compilation parameters selecting different hardware subsets. */ |
70 | ||
71 | extern int target_flags; | |
72 | ||
73 | /* Macros used in the machine description to test the flags. */ | |
74 | ||
ddd5a7c1 | 75 | /* configure can arrange to make this 2, to force a 486. */ |
35b528be RS |
76 | #ifndef TARGET_CPU_DEFAULT |
77 | #define TARGET_CPU_DEFAULT 0 | |
78 | #endif | |
79 | ||
3b3c6a3f MM |
80 | /* Masks for the -m switches */ |
81 | #define MASK_80387 000000000001 /* Hardware floating point */ | |
33c1d53a SC |
82 | #define MASK_NOTUSED1 000000000002 /* bit not currently used */ |
83 | #define MASK_NOTUSED2 000000000004 /* bit not currently used */ | |
3b3c6a3f | 84 | #define MASK_RTD 000000000010 /* Use ret that pops args */ |
b08de47e | 85 | #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */ |
3b3c6a3f MM |
86 | #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */ |
87 | #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */ | |
88 | #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */ | |
89 | #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */ | |
2f2fa5b1 | 90 | #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */ |
3b3c6a3f MM |
91 | /* Temporary codegen switches */ |
92 | #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */ | |
93 | #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */ | |
94 | #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */ | |
d4ba09c0 SC |
95 | #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */ |
96 | #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */ | |
f6f58ba3 | 97 | #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */ |
8c9be447 | 98 | #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */ |
3b3c6a3f MM |
99 | |
100 | /* Use the floating point instructions */ | |
101 | #define TARGET_80387 (target_flags & MASK_80387) | |
102 | ||
c98f8742 JVA |
103 | /* Compile using ret insn that pops args. |
104 | This will not work unless you use prototypes at least | |
105 | for all functions that can take varying numbers of args. */ | |
3b3c6a3f MM |
106 | #define TARGET_RTD (target_flags & MASK_RTD) |
107 | ||
b08de47e MM |
108 | /* Align doubles to a two word boundary. This breaks compatibility with |
109 | the published ABI's for structures containing doubles, but produces | |
110 | faster code on the pentium. */ | |
111 | #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE) | |
c98f8742 | 112 | |
d7cd15e9 RS |
113 | /* Put uninitialized locals into bss, not data. |
114 | Meaningful only on svr3. */ | |
3b3c6a3f | 115 | #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB) |
d7cd15e9 | 116 | |
c572e5ba JVA |
117 | /* Use IEEE floating point comparisons. These handle correctly the cases |
118 | where the result of a comparison is unordered. Normally SIGFPE is | |
119 | generated in such cases, in which case this isn't needed. */ | |
3b3c6a3f | 120 | #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP) |
c572e5ba | 121 | |
8c2bf92a JVA |
122 | /* Functions that return a floating point value may return that value |
123 | in the 387 FPU or in 386 integer registers. If set, this flag causes | |
124 | the 387 to be used, which is compatible with most calling conventions. */ | |
3b3c6a3f | 125 | #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS) |
8c2bf92a | 126 | |
099800e3 RK |
127 | /* Disable generation of FP sin, cos and sqrt operations for 387. |
128 | This is because FreeBSD lacks these in the math-emulator-code */ | |
3b3c6a3f MM |
129 | #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387) |
130 | ||
2f2fa5b1 SC |
131 | /* Don't create frame pointers for leaf functions */ |
132 | #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER) | |
133 | ||
3b3c6a3f MM |
134 | /* Temporary switches for tuning code generation */ |
135 | ||
136 | /* Disable 32x32->64 bit multiplies that are used for long long multiplies | |
137 | and division by constants, but sometimes cause reload problems. */ | |
138 | #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY) | |
139 | #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY) | |
140 | ||
f6f58ba3 SC |
141 | /* Emit/Don't emit prologue as rtl */ |
142 | #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE) | |
143 | ||
3b3c6a3f MM |
144 | /* Debug GO_IF_LEGITIMATE_ADDRESS */ |
145 | #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR) | |
146 | ||
b08de47e MM |
147 | /* Debug FUNCTION_ARG macros */ |
148 | #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG) | |
149 | ||
3b3c6a3f MM |
150 | /* Hack macros for tuning code generation */ |
151 | #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */ | |
d4ba09c0 SC |
152 | #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */ |
153 | ||
f7746310 SC |
154 | #define TARGET_386 (ix86_cpu == PROCESSOR_I386) |
155 | #define TARGET_486 (ix86_cpu == PROCESSOR_I486) | |
156 | #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM) | |
3a0433fd | 157 | #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO) |
f7746310 | 158 | #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386) |
241e1a89 | 159 | #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386) |
5bc7cd8e SC |
160 | #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \ |
161 | && ix86_cpu != PROCESSOR_PENTIUMPRO) | |
241e1a89 | 162 | #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386) |
f7746310 SC |
163 | #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386) |
164 | #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386) | |
3c67a76b SC |
165 | #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \ |
166 | || ix86_cpu == PROCESSOR_PENTIUMPRO) | |
f7746310 | 167 | #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486) |
bcd86433 | 168 | #define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO) |
2f2fa5b1 | 169 | #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO) |
8c9be447 | 170 | #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) |
3b3c6a3f MM |
171 | |
172 | #define TARGET_SWITCHES \ | |
173 | { { "80387", MASK_80387 }, \ | |
174 | { "no-80387", -MASK_80387 }, \ | |
175 | { "hard-float", MASK_80387 }, \ | |
176 | { "soft-float", -MASK_80387 }, \ | |
177 | { "no-soft-float", MASK_80387 }, \ | |
241e1a89 SC |
178 | { "386", 0 }, \ |
179 | { "no-386", 0 }, \ | |
180 | { "486", 0 }, \ | |
181 | { "no-486", 0 }, \ | |
182 | { "pentium", 0 }, \ | |
183 | { "pentiumpro", 0 }, \ | |
3b3c6a3f MM |
184 | { "rtd", MASK_RTD }, \ |
185 | { "no-rtd", -MASK_RTD }, \ | |
b08de47e MM |
186 | { "align-double", MASK_ALIGN_DOUBLE }, \ |
187 | { "no-align-double", -MASK_ALIGN_DOUBLE }, \ | |
3b3c6a3f MM |
188 | { "svr3-shlib", MASK_SVR3_SHLIB }, \ |
189 | { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \ | |
190 | { "ieee-fp", MASK_IEEE_FP }, \ | |
191 | { "no-ieee-fp", -MASK_IEEE_FP }, \ | |
192 | { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \ | |
193 | { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \ | |
194 | { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \ | |
195 | { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \ | |
2f2fa5b1 SC |
196 | { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \ |
197 | { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \ | |
3b3c6a3f MM |
198 | { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \ |
199 | { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \ | |
f6f58ba3 SC |
200 | { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \ |
201 | { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \ | |
3b3c6a3f MM |
202 | { "debug-addr", MASK_DEBUG_ADDR }, \ |
203 | { "no-debug-addr", -MASK_DEBUG_ADDR }, \ | |
204 | { "move", -MASK_NO_MOVE }, \ | |
205 | { "no-move", MASK_NO_MOVE }, \ | |
b08de47e MM |
206 | { "debug-arg", MASK_DEBUG_ARG }, \ |
207 | { "no-debug-arg", -MASK_DEBUG_ARG }, \ | |
8c9be447 RK |
208 | { "stack-arg-probe", MASK_STACK_PROBE }, \ |
209 | { "no-stack-arg-probe", -MASK_STACK_PROBE }, \ | |
956d6950 JL |
210 | { "windows", 0 }, \ |
211 | { "dll", 0 }, \ | |
3b3c6a3f | 212 | SUBTARGET_SWITCHES \ |
f6f58ba3 | 213 | { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}} |
241e1a89 | 214 | |
d4ba09c0 SC |
215 | /* Which processor to schedule for. The cpu attribute defines a list that |
216 | mirrors this list, so changes to i386.md must be made at the same time. */ | |
217 | ||
241e1a89 SC |
218 | enum processor_type |
219 | {PROCESSOR_I386, /* 80386 */ | |
220 | PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ | |
221 | PROCESSOR_PENTIUM, | |
222 | PROCESSOR_PENTIUMPRO}; | |
223 | ||
224 | #define PROCESSOR_I386_STRING "i386" | |
225 | #define PROCESSOR_I486_STRING "i486" | |
226 | #define PROCESSOR_I586_STRING "i586" | |
227 | #define PROCESSOR_PENTIUM_STRING "pentium" | |
228 | #define PROCESSOR_I686_STRING "i686" | |
229 | #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro" | |
230 | ||
231 | extern enum processor_type ix86_cpu; | |
232 | ||
bcd86433 | 233 | extern int ix86_arch; |
241e1a89 SC |
234 | |
235 | /* Define the default processor. This is overridden by other tm.h files. */ | |
236 | #define PROCESSOR_DEFAULT \ | |
237 | ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \ | |
238 | ? PROCESSOR_I486 \ | |
239 | : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \ | |
240 | ? PROCESSOR_PENTIUM \ | |
241 | : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \ | |
242 | ? PROCESSOR_PENTIUMPRO \ | |
243 | : PROCESSOR_I386 | |
244 | #define PROCESSOR_DEFAULT_STRING \ | |
245 | ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \ | |
246 | ? PROCESSOR_I486_STRING \ | |
247 | : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \ | |
248 | ? PROCESSOR_PENTIUM_STRING \ | |
249 | : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \ | |
250 | ? PROCESSOR_PENTIUMPRO_STRING \ | |
251 | : PROCESSOR_I386_STRING | |
95393dfd | 252 | |
f5316dfe MM |
253 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
254 | command options that have values. Its definition is an | |
255 | initializer with a subgrouping for each command option. | |
256 | ||
257 | Each subgrouping contains a string constant, that defines the | |
258 | fixed part of the option name, and the address of a variable. The | |
259 | variable, type `char *', is set to the variable part of the given | |
260 | option if the fixed part matches. The actual option name is made | |
261 | by appending `-m' to the specified name. */ | |
262 | #define TARGET_OPTIONS \ | |
241e1a89 | 263 | { { "cpu=", &ix86_cpu_string}, \ |
bcd86433 | 264 | { "arch=", &ix86_arch_string}, \ |
241e1a89 | 265 | { "reg-alloc=", &i386_reg_alloc_order }, \ |
b08de47e MM |
266 | { "regparm=", &i386_regparm_string }, \ |
267 | { "align-loops=", &i386_align_loops_string }, \ | |
268 | { "align-jumps=", &i386_align_jumps_string }, \ | |
269 | { "align-functions=", &i386_align_funcs_string }, \ | |
e2a606cb | 270 | { "branch-cost=", &i386_branch_cost_string }, \ |
b08de47e MM |
271 | SUBTARGET_OPTIONS \ |
272 | } | |
f5316dfe MM |
273 | |
274 | /* Sometimes certain combinations of command options do not make | |
275 | sense on a particular target machine. You can define a macro | |
276 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
277 | defined, is executed once just after all the command options have | |
278 | been parsed. | |
279 | ||
280 | Don't use this macro to turn on various extra optimizations for | |
281 | `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ | |
282 | ||
283 | #define OVERRIDE_OPTIONS override_options () | |
284 | ||
285 | /* These are meant to be redefined in the host dependent files */ | |
95393dfd | 286 | #define SUBTARGET_SWITCHES |
f5316dfe | 287 | #define SUBTARGET_OPTIONS |
95393dfd | 288 | |
d4ba09c0 | 289 | /* Define this to change the optimizations performed by default. */ |
c6aded7c | 290 | #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE) |
d4ba09c0 | 291 | |
241e1a89 SC |
292 | /* Specs for the compiler proper */ |
293 | ||
628714d8 RK |
294 | #ifndef CC1_CPU_SPEC |
295 | #define CC1_CPU_SPEC "\ | |
241e1a89 | 296 | %{!mcpu*: \ |
2f2fa5b1 SC |
297 | %{m386:-mcpu=i386 -march=i386} \ |
298 | %{mno-486:-mcpu=i386 -march=i386} \ | |
299 | %{m486:-mcpu=i486 -march=i486} \ | |
300 | %{mno-386:-mcpu=i486 -march=i486} \ | |
301 | %{mno-pentium:-mcpu=i486 -march=i486} \ | |
241e1a89 | 302 | %{mpentium:-mcpu=pentium} \ |
2f2fa5b1 | 303 | %{mno-pentiumpro:-mcpu=pentium} \ |
241e1a89 SC |
304 | %{mpentiumpro:-mcpu=pentiumpro}}" |
305 | #endif | |
c98f8742 | 306 | \f |
84b77fba | 307 | #ifndef CPP_CPU_DEFAULT_SPEC |
d5c65c96 | 308 | #if TARGET_CPU_DEFAULT == 1 |
84b77fba | 309 | #define CPP_CPU_DEFAULT_SPEC "-Di486" |
da594c94 JL |
310 | #else |
311 | #if TARGET_CPU_DEFAULT == 2 | |
84b77fba | 312 | #define CPP_CPU_DEFAULT_SPEC "-Dpentium -Di586" |
da594c94 JL |
313 | #else |
314 | #if TARGET_CPU_DEFAULT == 3 | |
84b77fba | 315 | #define CPP_CPU_DEFAULT_SPEC "-Dpentiumpro -Di686" |
d5c65c96 | 316 | #else |
84b77fba | 317 | #define CPP_CPU_DEFAULT_SPEC "" |
da594c94 JL |
318 | #endif |
319 | #endif | |
84b77fba JW |
320 | #endif |
321 | #endif /* CPP_CPU_DEFAULT_SPEC */ | |
33c1d53a | 322 | |
84b77fba | 323 | #ifndef CPP_CPU_SPEC |
bcd86433 SC |
324 | #define CPP_CPU_SPEC "\ |
325 | -Di386 -Asystem(unix) -Acpu(i386) -Amachine(i386) \ | |
326 | %{mcpu=i486:-Di486} %{m486:-Di486} \ | |
327 | %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \ | |
84b77fba JW |
328 | %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686} \ |
329 | %{!mcpu*:%{!m486:%{!mpentium*: %[cpp_cpu_default]}}}" | |
330 | #endif | |
bcd86433 | 331 | |
628714d8 RK |
332 | #ifndef CC1_SPEC |
333 | #define CC1_SPEC "%(cc1_spec) " | |
334 | #endif | |
335 | ||
336 | /* This macro defines names of additional specifications to put in the | |
337 | specs that can be used in various specifications like CC1_SPEC. Its | |
338 | definition is an initializer with a subgrouping for each command option. | |
bcd86433 SC |
339 | |
340 | Each subgrouping contains a string constant, that defines the | |
341 | specification name, and a string constant that used by the GNU CC driver | |
342 | program. | |
343 | ||
344 | Do not define this macro if it does not need to do anything. */ | |
345 | ||
346 | #ifndef SUBTARGET_EXTRA_SPECS | |
347 | #define SUBTARGET_EXTRA_SPECS | |
348 | #endif | |
349 | ||
350 | #define EXTRA_SPECS \ | |
84b77fba | 351 | { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ |
bcd86433 | 352 | { "cpp_cpu", CPP_CPU_SPEC }, \ |
628714d8 | 353 | { "cc1_cpu", CC1_CPU_SPEC }, \ |
bcd86433 SC |
354 | SUBTARGET_EXTRA_SPECS |
355 | \f | |
c98f8742 JVA |
356 | /* target machine storage layout */ |
357 | ||
0038aea6 JVA |
358 | /* Define for XFmode extended real floating point support. |
359 | This will automatically cause REAL_ARITHMETIC to be defined. */ | |
360 | #define LONG_DOUBLE_TYPE_SIZE 96 | |
361 | ||
362 | /* Define if you don't want extended real, but do want to use the | |
363 | software floating point emulator for REAL_ARITHMETIC and | |
364 | decimal <-> binary conversion. */ | |
365 | /* #define REAL_ARITHMETIC */ | |
366 | ||
c98f8742 JVA |
367 | /* Define this if most significant byte of a word is the lowest numbered. */ |
368 | /* That is true on the 80386. */ | |
369 | ||
370 | #define BITS_BIG_ENDIAN 0 | |
371 | ||
372 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
373 | /* That is not true on the 80386. */ | |
374 | #define BYTES_BIG_ENDIAN 0 | |
375 | ||
376 | /* Define this if most significant word of a multiword number is the lowest | |
377 | numbered. */ | |
378 | /* Not true for 80386 */ | |
379 | #define WORDS_BIG_ENDIAN 0 | |
380 | ||
b4ac57ab | 381 | /* number of bits in an addressable storage unit */ |
c98f8742 JVA |
382 | #define BITS_PER_UNIT 8 |
383 | ||
384 | /* Width in bits of a "word", which is the contents of a machine register. | |
385 | Note that this is not necessarily the width of data type `int'; | |
386 | if using 16-bit ints on a 80386, this would still be 32. | |
387 | But on a machine with 16-bit registers, this would be 16. */ | |
388 | #define BITS_PER_WORD 32 | |
389 | ||
390 | /* Width of a word, in units (bytes). */ | |
391 | #define UNITS_PER_WORD 4 | |
392 | ||
393 | /* Width in bits of a pointer. | |
394 | See also the macro `Pmode' defined below. */ | |
395 | #define POINTER_SIZE 32 | |
396 | ||
397 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
398 | #define PARM_BOUNDARY 32 | |
399 | ||
400 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
d5c65c96 | 401 | #define STACK_BOUNDARY 32 |
c98f8742 JVA |
402 | |
403 | /* Allocation boundary (in *bits*) for the code of a function. | |
404 | For i486, we get better performance by aligning to a cache | |
405 | line (i.e. 16 byte) boundary. */ | |
b08de47e | 406 | #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3)) |
c98f8742 JVA |
407 | |
408 | /* Alignment of field after `int : 0' in a structure. */ | |
409 | ||
410 | #define EMPTY_FIELD_BOUNDARY 32 | |
411 | ||
412 | /* Minimum size in bits of the largest boundary to which any | |
413 | and all fundamental data types supported by the hardware | |
414 | might need to be aligned. No data type wants to be aligned | |
415 | rounder than this. The i386 supports 64-bit floating point | |
b08de47e MM |
416 | quantities, but these can be aligned on any 32-bit boundary. |
417 | The published ABIs say that doubles should be aligned on word | |
418 | boundaries, but the Pentium gets better performance with them | |
419 | aligned on 64 bit boundaries. */ | |
420 | #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32) | |
c98f8742 | 421 | |
e5e8a8bf JW |
422 | /* If defined, a C expression to compute the alignment given to a |
423 | constant that is being placed in memory. CONSTANT is the constant | |
424 | and ALIGN is the alignment that the object would ordinarily have. | |
425 | The value of this macro is used instead of that alignment to align | |
426 | the object. | |
427 | ||
428 | If this macro is not defined, then ALIGN is used. | |
429 | ||
430 | The typical use of this macro is to increase alignment for string | |
431 | constants to be word aligned so that `strcpy' calls that copy | |
432 | constants can be done inline. */ | |
433 | ||
434 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
435 | (TREE_CODE (EXP) == REAL_CST \ | |
436 | ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \ | |
437 | ? 64 \ | |
438 | : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \ | |
439 | ? 128 \ | |
440 | : (ALIGN)) \ | |
441 | : TREE_CODE (EXP) == STRING_CST \ | |
442 | ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \ | |
443 | ? 256 \ | |
444 | : (ALIGN)) \ | |
445 | : (ALIGN)) | |
d4ba09c0 | 446 | |
8a022443 JW |
447 | /* If defined, a C expression to compute the alignment for a static |
448 | variable. TYPE is the data type, and ALIGN is the alignment that | |
449 | the object would ordinarily have. The value of this macro is used | |
450 | instead of that alignment to align the object. | |
451 | ||
452 | If this macro is not defined, then ALIGN is used. | |
453 | ||
454 | One use of this macro is to increase alignment of medium-size | |
455 | data to make it all fit in fewer cache lines. Another is to | |
456 | cause character arrays to be word-aligned so that `strcpy' calls | |
457 | that copy constants to character arrays can be done inline. */ | |
458 | ||
459 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
460 | ((AGGREGATE_TYPE_P (TYPE) \ | |
461 | && TYPE_SIZE (TYPE) \ | |
462 | && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \ | |
463 | && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \ | |
464 | || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \ | |
465 | ? 256 \ | |
466 | : TREE_CODE (TYPE) == ARRAY_TYPE \ | |
467 | ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \ | |
468 | ? 64 \ | |
469 | : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \ | |
470 | ? 128 \ | |
471 | : (ALIGN)) \ | |
472 | : TREE_CODE (TYPE) == COMPLEX_TYPE \ | |
473 | ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \ | |
474 | ? 64 \ | |
475 | : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \ | |
476 | ? 128 \ | |
477 | : (ALIGN)) \ | |
478 | : ((TREE_CODE (TYPE) == RECORD_TYPE \ | |
479 | || TREE_CODE (TYPE) == UNION_TYPE \ | |
480 | || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \ | |
481 | && TYPE_FIELDS (TYPE)) \ | |
482 | ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \ | |
483 | ? 64 \ | |
484 | : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \ | |
485 | ? 128 \ | |
486 | : (ALIGN)) \ | |
487 | : TREE_CODE (TYPE) == REAL_TYPE \ | |
488 | ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \ | |
489 | ? 64 \ | |
490 | : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \ | |
491 | ? 128 \ | |
492 | : (ALIGN)) \ | |
493 | : (ALIGN)) | |
494 | ||
b4ac57ab | 495 | /* Set this non-zero if move instructions will actually fail to work |
c98f8742 | 496 | when given unaligned data. */ |
b4ac57ab | 497 | #define STRICT_ALIGNMENT 0 |
c98f8742 JVA |
498 | |
499 | /* If bit field type is int, don't let it cross an int, | |
500 | and give entire struct the alignment of an int. */ | |
501 | /* Required on the 386 since it doesn't have bitfield insns. */ | |
502 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
503 | ||
b08de47e MM |
504 | /* Maximum power of 2 that code can be aligned to. */ |
505 | #define MAX_CODE_ALIGN 6 /* 64 byte alignment */ | |
506 | ||
c98f8742 | 507 | /* Align loop starts for optimal branching. */ |
fc470718 | 508 | #define LOOP_ALIGN(LABEL) (i386_align_loops) |
9e423e6d | 509 | #define LOOP_ALIGN_MAX_SKIP (i386_align_loops_string ? 0 : 7) |
c98f8742 JVA |
510 | |
511 | /* This is how to align an instruction for optimal branching. | |
512 | On i486 we'll get better performance by aligning on a | |
513 | cache line (i.e. 16 byte) boundary. */ | |
fc470718 | 514 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps) |
9e423e6d | 515 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (i386_align_jumps_string ? 0 : 7) |
b08de47e | 516 | |
c98f8742 JVA |
517 | \f |
518 | /* Standard register usage. */ | |
519 | ||
520 | /* This processor has special stack-like registers. See reg-stack.c | |
521 | for details. */ | |
522 | ||
523 | #define STACK_REGS | |
d4ba09c0 | 524 | #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode) |
c98f8742 JVA |
525 | |
526 | /* Number of actual hardware registers. | |
527 | The hardware registers are assigned numbers for the compiler | |
528 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
529 | All registers that the compiler knows about must be given numbers, | |
530 | even those that are not normally considered general registers. | |
531 | ||
532 | In the 80386 we give the 8 general purpose registers the numbers 0-7. | |
533 | We number the floating point registers 8-15. | |
534 | Note that registers 0-7 can be accessed as a short or int, | |
535 | while only 0-3 may be used with byte `mov' instructions. | |
536 | ||
537 | Reg 16 does not correspond to any hardware register, but instead | |
538 | appears in the RTL as an argument pointer prior to reload, and is | |
539 | eliminated during reloading in favor of either the stack or frame | |
540 | pointer. */ | |
541 | ||
542 | #define FIRST_PSEUDO_REGISTER 17 | |
543 | ||
544 | /* 1 for registers that have pervasive standard uses | |
545 | and are not available for the register allocator. | |
546 | On the 80386, the stack pointer is such, as is the arg pointer. */ | |
547 | #define FIXED_REGISTERS \ | |
548 | /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ | |
549 | { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
550 | ||
551 | /* 1 for registers not available across function calls. | |
552 | These must include the FIXED_REGISTERS and also any | |
553 | registers that can be used without being saved. | |
554 | The latter must include the registers where values are returned | |
555 | and the register where structure-value addresses are passed. | |
556 | Aside from that, you can include as many other registers as you like. */ | |
557 | ||
558 | #define CALL_USED_REGISTERS \ | |
559 | /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ | |
560 | { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
561 | ||
3b3c6a3f MM |
562 | /* Order in which to allocate registers. Each register must be |
563 | listed once, even those in FIXED_REGISTERS. List frame pointer | |
564 | late and fixed registers last. Note that, in general, we prefer | |
565 | registers listed in CALL_USED_REGISTERS, keeping the others | |
566 | available for storage of persistent values. | |
567 | ||
568 | Three different versions of REG_ALLOC_ORDER have been tried: | |
569 | ||
570 | If the order is edx, ecx, eax, ... it produces a slightly faster compiler, | |
571 | but slower code on simple functions returning values in eax. | |
572 | ||
573 | If the order is eax, ecx, edx, ... it causes reload to abort when compiling | |
574 | perl 4.036 due to not being able to create a DImode register (to hold a 2 | |
575 | word union). | |
576 | ||
577 | If the order is eax, edx, ecx, ... it produces better code for simple | |
578 | functions, and a slightly slower compiler. Users complained about the code | |
579 | generated by allocating edx first, so restore the 'natural' order of things. */ | |
580 | ||
184ff798 | 581 | #define REG_ALLOC_ORDER \ |
f5316dfe MM |
582 | /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ |
583 | { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 } | |
584 | ||
585 | /* A C statement (sans semicolon) to choose the order in which to | |
586 | allocate hard registers for pseudo-registers local to a basic | |
587 | block. | |
588 | ||
589 | Store the desired register order in the array `reg_alloc_order'. | |
590 | Element 0 should be the register to allocate first; element 1, the | |
591 | next register; and so on. | |
592 | ||
593 | The macro body should not assume anything about the contents of | |
594 | `reg_alloc_order' before execution of the macro. | |
595 | ||
596 | On most machines, it is not necessary to define this macro. */ | |
597 | ||
598 | #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () | |
184ff798 | 599 | |
c98f8742 JVA |
600 | /* Macro to conditionally modify fixed_regs/call_used_regs. */ |
601 | #define CONDITIONAL_REGISTER_USAGE \ | |
602 | { \ | |
603 | if (flag_pic) \ | |
604 | { \ | |
605 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
606 | call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
607 | } \ | |
8c2bf92a JVA |
608 | if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ |
609 | { \ | |
610 | int i; \ | |
611 | HARD_REG_SET x; \ | |
612 | COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ | |
613 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ | |
614 | if (TEST_HARD_REG_BIT (x, i)) \ | |
615 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
616 | } \ | |
c98f8742 JVA |
617 | } |
618 | ||
619 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
620 | to hold something of mode MODE. | |
621 | This is ordinarily the length in words of a value of mode MODE | |
622 | but can be less for certain modes in special long registers. | |
623 | ||
624 | Actually there are no two word move instructions for consecutive | |
625 | registers. And only registers 0-3 may have mov byte instructions | |
626 | applied to them. | |
627 | */ | |
628 | ||
629 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
630 | (FP_REGNO_P (REGNO) ? 1 \ | |
631 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
632 | ||
633 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
634 | On the 80386, the first 4 cpu registers can hold any mode | |
635 | while the floating point registers may hold only floating point. | |
636 | Make it clear that the fp regs could not hold a 16-byte float. */ | |
637 | ||
48227a2c RS |
638 | /* The casts to int placate a compiler on a microvax, |
639 | for cross-compiler testing. */ | |
640 | ||
c98f8742 | 641 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
1bbe49a6 JVA |
642 | ((REGNO) < 2 ? 1 \ |
643 | : (REGNO) < 4 ? 1 \ | |
0038aea6 | 644 | : FP_REGNO_P (REGNO) \ |
48227a2c RS |
645 | ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \ |
646 | || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \ | |
62acf5fd | 647 | && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\ |
b73c3f2a SC |
648 | : (int) (MODE) != (int) QImode ? 1 \ |
649 | : (reload_in_progress | reload_completed) == 1) | |
c98f8742 JVA |
650 | |
651 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
652 | when one has mode MODE1 and one has mode MODE2. | |
653 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
654 | for any hard reg, then this must be 0 for correct output. */ | |
655 | ||
656 | #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2)) | |
657 | ||
c98f8742 JVA |
658 | /* Specify the registers used for certain standard purposes. |
659 | The values of these macros are register numbers. */ | |
660 | ||
661 | /* on the 386 the pc register is %eip, and is not usable as a general | |
662 | register. The ordinary mov instructions won't work */ | |
663 | /* #define PC_REGNUM */ | |
664 | ||
665 | /* Register to use for pushing function arguments. */ | |
666 | #define STACK_POINTER_REGNUM 7 | |
667 | ||
668 | /* Base register for access to local variables of the function. */ | |
669 | #define FRAME_POINTER_REGNUM 6 | |
670 | ||
671 | /* First floating point reg */ | |
672 | #define FIRST_FLOAT_REG 8 | |
673 | ||
674 | /* First & last stack-like regs */ | |
675 | #define FIRST_STACK_REG FIRST_FLOAT_REG | |
676 | #define LAST_STACK_REG (FIRST_FLOAT_REG + 7) | |
677 | ||
678 | /* Value should be nonzero if functions must have frame pointers. | |
679 | Zero means the frame pointer need not be set up (and parms | |
680 | may be accessed via the stack pointer) in functions that seem suitable. | |
681 | This is computed in `reload', in reload1.c. */ | |
2f2fa5b1 | 682 | #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) |
c98f8742 JVA |
683 | |
684 | /* Base register for access to arguments of the function. */ | |
685 | #define ARG_POINTER_REGNUM 16 | |
686 | ||
687 | /* Register in which static-chain is passed to a function. */ | |
688 | #define STATIC_CHAIN_REGNUM 2 | |
689 | ||
690 | /* Register to hold the addressing base for position independent | |
691 | code access to data items. */ | |
692 | #define PIC_OFFSET_TABLE_REGNUM 3 | |
693 | ||
694 | /* Register in which address to store a structure value | |
695 | arrives in the function. On the 386, the prologue | |
696 | copies this from the stack to register %eax. */ | |
697 | #define STRUCT_VALUE_INCOMING 0 | |
698 | ||
699 | /* Place in which caller passes the structure value address. | |
700 | 0 means push the value on the stack like an argument. */ | |
701 | #define STRUCT_VALUE 0 | |
713225d4 MM |
702 | |
703 | /* A C expression which can inhibit the returning of certain function | |
704 | values in registers, based on the type of value. A nonzero value | |
705 | says to return the function value in memory, just as large | |
706 | structures are always returned. Here TYPE will be a C expression | |
707 | of type `tree', representing the data type of the value. | |
708 | ||
709 | Note that values of mode `BLKmode' must be explicitly handled by | |
710 | this macro. Also, the option `-fpcc-struct-return' takes effect | |
711 | regardless of this macro. On most systems, it is possible to | |
712 | leave the macro undefined; this causes a default definition to be | |
713 | used, whose value is the constant 1 for `BLKmode' values, and 0 | |
714 | otherwise. | |
715 | ||
716 | Do not use this macro to indicate that structures and unions | |
717 | should always be returned in memory. You should instead use | |
718 | `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */ | |
719 | ||
720 | #define RETURN_IN_MEMORY(TYPE) \ | |
721 | ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12) | |
722 | ||
c98f8742 JVA |
723 | \f |
724 | /* Define the classes of registers for register constraints in the | |
725 | machine description. Also define ranges of constants. | |
726 | ||
727 | One of the classes must always be named ALL_REGS and include all hard regs. | |
728 | If there is more than one class, another class must be named NO_REGS | |
729 | and contain no registers. | |
730 | ||
731 | The name GENERAL_REGS must be the name of a class (or an alias for | |
732 | another name such as ALL_REGS). This is the class of registers | |
733 | that is allowed by "g" or "r" in a register constraint. | |
734 | Also, registers outside this class are allocated only when | |
735 | instructions express preferences for them. | |
736 | ||
737 | The classes must be numbered in nondecreasing order; that is, | |
738 | a larger-numbered class must never be contained completely | |
739 | in a smaller-numbered class. | |
740 | ||
741 | For any two classes, it is very desirable that there be another | |
ab408a86 JVA |
742 | class that represents their union. |
743 | ||
744 | It might seem that class BREG is unnecessary, since no useful 386 | |
745 | opcode needs reg %ebx. But some systems pass args to the OS in ebx, | |
746 | and the "b" register constraint is useful in asms for syscalls. */ | |
c98f8742 JVA |
747 | |
748 | enum reg_class | |
749 | { | |
750 | NO_REGS, | |
ab408a86 | 751 | AREG, DREG, CREG, BREG, |
4b71cd6e | 752 | AD_REGS, /* %eax/%edx for DImode */ |
c98f8742 JVA |
753 | Q_REGS, /* %eax %ebx %ecx %edx */ |
754 | SIREG, DIREG, | |
755 | INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ | |
756 | GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ | |
757 | FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ | |
758 | FLOAT_REGS, | |
759 | ALL_REGS, LIM_REG_CLASSES | |
760 | }; | |
761 | ||
762 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
763 | ||
4cbb525c JVA |
764 | #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS)) |
765 | ||
c98f8742 JVA |
766 | /* Give names of register classes as strings for dump file. */ |
767 | ||
768 | #define REG_CLASS_NAMES \ | |
769 | { "NO_REGS", \ | |
ab408a86 | 770 | "AREG", "DREG", "CREG", "BREG", \ |
4b71cd6e | 771 | "AD_REGS", \ |
c98f8742 JVA |
772 | "Q_REGS", \ |
773 | "SIREG", "DIREG", \ | |
774 | "INDEX_REGS", \ | |
775 | "GENERAL_REGS", \ | |
776 | "FP_TOP_REG", "FP_SECOND_REG", \ | |
777 | "FLOAT_REGS", \ | |
778 | "ALL_REGS" } | |
779 | ||
780 | /* Define which registers fit in which classes. | |
781 | This is an initializer for a vector of HARD_REG_SET | |
782 | of length N_REG_CLASSES. */ | |
783 | ||
784 | #define REG_CLASS_CONTENTS \ | |
47f3558c JL |
785 | { {0}, \ |
786 | {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \ | |
787 | {0x3}, /* AD_REGS */ \ | |
788 | {0xf}, /* Q_REGS */ \ | |
789 | {0x10}, {0x20}, /* SIREG, DIREG */ \ | |
790 | {0x7f}, /* INDEX_REGS */ \ | |
791 | {0x100ff}, /* GENERAL_REGS */ \ | |
792 | {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \ | |
793 | {0xff00}, /* FLOAT_REGS */ \ | |
794 | {0x1ffff}} | |
c98f8742 JVA |
795 | |
796 | /* The same information, inverted: | |
797 | Return the class number of the smallest class containing | |
798 | reg number REGNO. This could be a conditional expression | |
799 | or could index an array. */ | |
800 | ||
c98f8742 JVA |
801 | #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) |
802 | ||
803 | /* When defined, the compiler allows registers explicitly used in the | |
804 | rtl to be used as spill registers but prevents the compiler from | |
805 | extending the lifetime of these registers. */ | |
806 | ||
2922fe9e | 807 | #define SMALL_REGISTER_CLASSES 1 |
c98f8742 JVA |
808 | |
809 | #define QI_REG_P(X) \ | |
810 | (REG_P (X) && REGNO (X) < 4) | |
811 | #define NON_QI_REG_P(X) \ | |
812 | (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) | |
813 | ||
814 | #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) | |
815 | #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) | |
816 | ||
817 | #define STACK_REG_P(xop) (REG_P (xop) && \ | |
818 | REGNO (xop) >= FIRST_STACK_REG && \ | |
819 | REGNO (xop) <= LAST_STACK_REG) | |
820 | ||
821 | #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop)) | |
822 | ||
823 | #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG) | |
824 | ||
825 | /* Try to maintain the accuracy of the death notes for regs satisfying the | |
826 | following. Important for stack like regs, to know when to pop. */ | |
827 | ||
828 | /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */ | |
829 | ||
830 | /* 1 if register REGNO can magically overlap other regs. | |
831 | Note that nonzero values work only in very special circumstances. */ | |
832 | ||
833 | /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */ | |
834 | ||
835 | /* The class value for index registers, and the one for base regs. */ | |
836 | ||
837 | #define INDEX_REG_CLASS INDEX_REGS | |
838 | #define BASE_REG_CLASS GENERAL_REGS | |
839 | ||
840 | /* Get reg_class from a letter such as appears in the machine description. */ | |
841 | ||
842 | #define REG_CLASS_FROM_LETTER(C) \ | |
8c2bf92a JVA |
843 | ((C) == 'r' ? GENERAL_REGS : \ |
844 | (C) == 'q' ? Q_REGS : \ | |
845 | (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ | |
846 | ? FLOAT_REGS \ | |
847 | : NO_REGS) : \ | |
848 | (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ | |
849 | ? FP_TOP_REG \ | |
850 | : NO_REGS) : \ | |
851 | (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ | |
852 | ? FP_SECOND_REG \ | |
853 | : NO_REGS) : \ | |
854 | (C) == 'a' ? AREG : \ | |
855 | (C) == 'b' ? BREG : \ | |
856 | (C) == 'c' ? CREG : \ | |
857 | (C) == 'd' ? DREG : \ | |
4b71cd6e | 858 | (C) == 'A' ? AD_REGS : \ |
8c2bf92a | 859 | (C) == 'D' ? DIREG : \ |
c98f8742 JVA |
860 | (C) == 'S' ? SIREG : NO_REGS) |
861 | ||
862 | /* The letters I, J, K, L and M in a register constraint string | |
863 | can be used to stand for particular ranges of immediate operands. | |
864 | This macro defines what the ranges are. | |
865 | C is the letter, and VALUE is a constant value. | |
866 | Return 1 if VALUE is in the range specified by C. | |
867 | ||
868 | I is for non-DImode shifts. | |
869 | J is for DImode shifts. | |
870 | K and L are for an `andsi' optimization. | |
871 | M is for shifts that can be executed by the "lea" opcode. | |
872 | */ | |
873 | ||
874 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
875 | ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \ | |
876 | (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \ | |
877 | (C) == 'K' ? (VALUE) == 0xff : \ | |
878 | (C) == 'L' ? (VALUE) == 0xffff : \ | |
879 | (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \ | |
b4232589 | 880 | (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\ |
d4ba09c0 | 881 | (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \ |
c98f8742 JVA |
882 | 0) |
883 | ||
884 | /* Similar, but for floating constants, and defining letters G and H. | |
b4ac57ab RS |
885 | Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if |
886 | TARGET_387 isn't set, because the stack register converter may need to | |
887 | load 0.0 into the function value register. */ | |
c98f8742 JVA |
888 | |
889 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
b4ac57ab | 890 | ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0) |
c98f8742 JVA |
891 | |
892 | /* Place additional restrictions on the register class to use when it | |
4cbb525c JVA |
893 | is necessary to be able to hold a value of mode MODE in a reload |
894 | register for which class CLASS would ordinarily be used. */ | |
c98f8742 JVA |
895 | |
896 | #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ | |
897 | ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \ | |
898 | ? Q_REGS : (CLASS)) | |
899 | ||
900 | /* Given an rtx X being reloaded into a reg required to be | |
901 | in class CLASS, return the class of reg to actually use. | |
902 | In general this is just CLASS; but on some machines | |
903 | in some cases it is preferable to use a more restrictive class. | |
904 | On the 80386 series, we prevent floating constants from being | |
905 | reloaded into floating registers (since no move-insn can do that) | |
906 | and we ensure that QImodes aren't reloaded into the esi or edi reg. */ | |
907 | ||
d398b3b1 | 908 | /* Put float CONST_DOUBLE in the constant pool instead of fp regs. |
c98f8742 | 909 | QImode must go into class Q_REGS. |
d398b3b1 JVA |
910 | Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and |
911 | movdf to do mem-to-mem moves through integer regs. */ | |
c98f8742 | 912 | |
7488be4e | 913 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ |
85ff473e JVA |
914 | (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \ |
915 | : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \ | |
d398b3b1 JVA |
916 | : ((CLASS) == ALL_REGS \ |
917 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \ | |
85ff473e JVA |
918 | : (CLASS)) |
919 | ||
920 | /* If we are copying between general and FP registers, we need a memory | |
921 | location. */ | |
922 | ||
923 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ | |
4cbb525c JVA |
924 | ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \ |
925 | || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) | |
c98f8742 JVA |
926 | |
927 | /* Return the maximum number of consecutive registers | |
928 | needed to represent mode MODE in a register of class CLASS. */ | |
929 | /* On the 80386, this is the size of MODE in words, | |
930 | except in the FP regs, where a single reg is always enough. */ | |
931 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
4cbb525c JVA |
932 | (FLOAT_CLASS_P (CLASS) ? 1 : \ |
933 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
f5316dfe MM |
934 | |
935 | /* A C expression whose value is nonzero if pseudos that have been | |
936 | assigned to registers of class CLASS would likely be spilled | |
937 | because registers of CLASS are needed for spill registers. | |
938 | ||
939 | The default value of this macro returns 1 if CLASS has exactly one | |
940 | register and zero otherwise. On most machines, this default | |
941 | should be used. Only define this macro to some other expression | |
942 | if pseudo allocated by `local-alloc.c' end up in memory because | |
ddd5a7c1 | 943 | their hard registers were needed for spill registers. If this |
f5316dfe MM |
944 | macro returns nonzero for those classes, those pseudos will only |
945 | be allocated by `global.c', which knows how to reallocate the | |
946 | pseudo to another register. If there would not be another | |
947 | register available for reallocation, you should not change the | |
948 | definition of this macro since the only effect of such a | |
949 | definition would be to slow down register allocation. */ | |
950 | ||
951 | #define CLASS_LIKELY_SPILLED_P(CLASS) \ | |
952 | (((CLASS) == AREG) \ | |
953 | || ((CLASS) == DREG) \ | |
954 | || ((CLASS) == CREG) \ | |
955 | || ((CLASS) == BREG) \ | |
956 | || ((CLASS) == AD_REGS) \ | |
957 | || ((CLASS) == SIREG) \ | |
958 | || ((CLASS) == DIREG)) | |
959 | ||
c98f8742 JVA |
960 | \f |
961 | /* Stack layout; function entry, exit and calling. */ | |
962 | ||
963 | /* Define this if pushing a word on the stack | |
964 | makes the stack pointer a smaller address. */ | |
965 | #define STACK_GROWS_DOWNWARD | |
966 | ||
967 | /* Define this if the nominal address of the stack frame | |
968 | is at the high-address end of the local variables; | |
969 | that is, each additional local variable allocated | |
970 | goes at a more negative offset in the frame. */ | |
971 | #define FRAME_GROWS_DOWNWARD | |
972 | ||
973 | /* Offset within stack frame to start allocating local variables at. | |
974 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
975 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
976 | of the first local allocated. */ | |
977 | #define STARTING_FRAME_OFFSET 0 | |
978 | ||
979 | /* If we generate an insn to push BYTES bytes, | |
980 | this says how many the stack pointer really advances by. | |
981 | On 386 pushw decrements by exactly 2 no matter what the position was. | |
982 | On the 386 there is no pushb; we use pushw instead, and this | |
983 | has the effect of rounding up to 2. */ | |
984 | ||
985 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2)) | |
986 | ||
987 | /* Offset of first parameter from the argument pointer register value. */ | |
988 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
989 | ||
990 | /* Value is the number of bytes of arguments automatically | |
991 | popped when returning from a subroutine call. | |
8b109b37 | 992 | FUNDECL is the declaration node of the function (as a tree), |
c98f8742 JVA |
993 | FUNTYPE is the data type of the function (as a tree), |
994 | or for a library call it is an identifier node for the subroutine name. | |
995 | SIZE is the number of bytes of arguments passed on the stack. | |
996 | ||
997 | On the 80386, the RTD insn may be used to pop them if the number | |
998 | of args is fixed, but if the number is variable then the caller | |
999 | must pop them all. RTD can't be used for library calls now | |
1000 | because the library is compiled with the Unix compiler. | |
1001 | Use of RTD is a selectable option, since it is incompatible with | |
1002 | standard Unix calling sequences. If the option is not selected, | |
b08de47e MM |
1003 | the caller must always pop the args. |
1004 | ||
1005 | The attribute stdcall is equivalent to RTD on a per module basis. */ | |
c98f8742 | 1006 | |
b08de47e MM |
1007 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \ |
1008 | (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE)) | |
c98f8742 | 1009 | |
8c2bf92a JVA |
1010 | /* Define how to find the value returned by a function. |
1011 | VALTYPE is the data type of the value (as a tree). | |
1012 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
1013 | otherwise, FUNC is 0. */ | |
c98f8742 | 1014 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
f64cecad | 1015 | gen_rtx_REG (TYPE_MODE (VALTYPE), \ |
c98f8742 JVA |
1016 | VALUE_REGNO (TYPE_MODE (VALTYPE))) |
1017 | ||
1018 | /* Define how to find the value returned by a library function | |
1019 | assuming the value has mode MODE. */ | |
1020 | ||
1021 | #define LIBCALL_VALUE(MODE) \ | |
f64cecad | 1022 | gen_rtx_REG (MODE, VALUE_REGNO (MODE)) |
c98f8742 | 1023 | |
e9125c09 TW |
1024 | /* Define the size of the result block used for communication between |
1025 | untyped_call and untyped_return. The block contains a DImode value | |
1026 | followed by the block used by fnsave and frstor. */ | |
1027 | ||
1028 | #define APPLY_RESULT_SIZE (8+108) | |
1029 | ||
b08de47e MM |
1030 | /* 1 if N is a possible register number for function argument passing. */ |
1031 | #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX) | |
c98f8742 JVA |
1032 | |
1033 | /* Define a data type for recording info about an argument list | |
1034 | during the scan of that argument list. This data type should | |
1035 | hold all necessary information about the function itself | |
1036 | and about the args processed so far, enough to enable macros | |
b08de47e | 1037 | such as FUNCTION_ARG to determine where the next arg should go. */ |
c98f8742 | 1038 | |
b08de47e MM |
1039 | typedef struct i386_args { |
1040 | int words; /* # words passed so far */ | |
1041 | int nregs; /* # registers available for passing */ | |
1042 | int regno; /* next available register number */ | |
1043 | } CUMULATIVE_ARGS; | |
c98f8742 JVA |
1044 | |
1045 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1046 | for a call to a function whose data type is FNTYPE. | |
b08de47e | 1047 | For a library call, FNTYPE is 0. */ |
c98f8742 | 1048 | |
2c7ee1a6 | 1049 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
b08de47e | 1050 | (init_cumulative_args (&CUM, FNTYPE, LIBNAME)) |
c98f8742 JVA |
1051 | |
1052 | /* Update the data in CUM to advance over an argument | |
1053 | of mode MODE and data type TYPE. | |
1054 | (TYPE is null for libcalls where that information may not be available.) */ | |
1055 | ||
1056 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
b08de47e | 1057 | (function_arg_advance (&CUM, MODE, TYPE, NAMED)) |
c98f8742 JVA |
1058 | |
1059 | /* Define where to put the arguments to a function. | |
1060 | Value is zero to push the argument on the stack, | |
1061 | or a hard register in which to store the argument. | |
1062 | ||
1063 | MODE is the argument's machine mode. | |
1064 | TYPE is the data type of the argument (as a tree). | |
1065 | This is null for libcalls where that information may | |
1066 | not be available. | |
1067 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1068 | the preceding args and about the function being called. | |
1069 | NAMED is nonzero if this argument is a named parameter | |
1070 | (otherwise it is an extra parameter matching an ellipsis). */ | |
1071 | ||
c98f8742 | 1072 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
b08de47e | 1073 | (function_arg (&CUM, MODE, TYPE, NAMED)) |
c98f8742 JVA |
1074 | |
1075 | /* For an arg passed partly in registers and partly in memory, | |
1076 | this is the number of registers used. | |
1077 | For args passed entirely in registers or entirely in memory, zero. */ | |
1078 | ||
c98f8742 | 1079 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ |
b08de47e | 1080 | (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)) |
c98f8742 | 1081 | |
3a0433fd SC |
1082 | /* This macro is invoked just before the start of a function. |
1083 | It is used here to output code for -fpic that will load the | |
1084 | return address into %ebx. */ | |
1085 | ||
1086 | #undef ASM_OUTPUT_FUNCTION_PREFIX | |
1087 | #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \ | |
1088 | asm_output_function_prefix (FILE, FNNAME) | |
1089 | ||
c98f8742 JVA |
1090 | /* This macro generates the assembly code for function entry. |
1091 | FILE is a stdio stream to output the code to. | |
1092 | SIZE is an int: how many units of temporary storage to allocate. | |
1093 | Refer to the array `regs_ever_live' to determine which registers | |
1094 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1095 | is ever used in the function. This macro is responsible for | |
1096 | knowing which registers should not be saved even if used. */ | |
1097 | ||
1098 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
1099 | function_prologue (FILE, SIZE) | |
1100 | ||
1101 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
1102 | for profiling a function entry. */ | |
1103 | ||
1104 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
1105 | { \ | |
1106 | if (flag_pic) \ | |
1107 | { \ | |
1108 | fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \ | |
1109 | LPREFIX, (LABELNO)); \ | |
1110 | fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \ | |
1111 | } \ | |
1112 | else \ | |
1113 | { \ | |
1114 | fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \ | |
1115 | fprintf (FILE, "\tcall _mcount\n"); \ | |
1116 | } \ | |
1117 | } | |
1118 | ||
1cf5eda8 | 1119 | |
6e753900 RK |
1120 | /* There are three profiling modes for basic blocks available. |
1121 | The modes are selected at compile time by using the options | |
1122 | -a or -ax of the gnu compiler. | |
1123 | The variable `profile_block_flag' will be set according to the | |
1124 | selected option. | |
1cf5eda8 | 1125 | |
6e753900 | 1126 | profile_block_flag == 0, no option used: |
1cf5eda8 | 1127 | |
6e753900 | 1128 | No profiling done. |
1cf5eda8 | 1129 | |
6e753900 RK |
1130 | profile_block_flag == 1, -a option used. |
1131 | ||
1132 | Count frequency of execution of every basic block. | |
1133 | ||
1134 | profile_block_flag == 2, -ax option used. | |
1135 | ||
1136 | Generate code to allow several different profiling modes at run time. | |
1137 | Available modes are: | |
1138 | Produce a trace of all basic blocks. | |
1139 | Count frequency of jump instructions executed. | |
1140 | In every mode it is possible to start profiling upon entering | |
1141 | certain functions and to disable profiling of some other functions. | |
1142 | ||
1143 | The result of basic-block profiling will be written to a file `bb.out'. | |
1144 | If the -ax option is used parameters for the profiling will be read | |
1145 | from file `bb.in'. | |
1146 | ||
1147 | */ | |
1148 | ||
1149 | /* The following macro shall output assembler code to FILE | |
1150 | to initialize basic-block profiling. | |
1151 | ||
1152 | If profile_block_flag == 2 | |
1153 | ||
1154 | Output code to call the subroutine `__bb_init_trace_func' | |
1155 | and pass two parameters to it. The first parameter is | |
1156 | the address of a block allocated in the object module. | |
1157 | The second parameter is the number of the first basic block | |
1158 | of the function. | |
1159 | ||
1160 | The name of the block is a local symbol made with this statement: | |
1161 | ||
1162 | ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0); | |
1163 | ||
1164 | Of course, since you are writing the definition of | |
1165 | `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you | |
1166 | can take a short cut in the definition of this macro and use the | |
1167 | name that you know will result. | |
1168 | ||
1169 | The number of the first basic block of the function is | |
1170 | passed to the macro in BLOCK_OR_LABEL. | |
1171 | ||
1172 | If described in a virtual assembler language the code to be | |
1173 | output looks like: | |
1174 | ||
1175 | parameter1 <- LPBX0 | |
1176 | parameter2 <- BLOCK_OR_LABEL | |
1177 | call __bb_init_trace_func | |
1178 | ||
1179 | else if profile_block_flag != 0 | |
1180 | ||
1181 | Output code to call the subroutine `__bb_init_func' | |
1182 | and pass one single parameter to it, which is the same | |
1183 | as the first parameter to `__bb_init_trace_func'. | |
1184 | ||
1185 | The first word of this parameter is a flag which will be nonzero if | |
1186 | the object module has already been initialized. So test this word | |
1187 | first, and do not call `__bb_init_func' if the flag is nonzero. | |
1188 | Note: When profile_block_flag == 2 the test need not be done | |
1189 | but `__bb_init_trace_func' *must* be called. | |
1190 | ||
1191 | BLOCK_OR_LABEL may be used to generate a label number as a | |
1192 | branch destination in case `__bb_init_func' will not be called. | |
1193 | ||
1194 | If described in a virtual assembler language the code to be | |
1195 | output looks like: | |
1196 | ||
1197 | cmp (LPBX0),0 | |
1198 | jne local_label | |
1199 | parameter1 <- LPBX0 | |
1200 | call __bb_init_func | |
1201 | local_label: | |
1202 | ||
1203 | */ | |
1cf5eda8 MM |
1204 | |
1205 | #undef FUNCTION_BLOCK_PROFILER | |
6e753900 | 1206 | #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \ |
1cf5eda8 MM |
1207 | do \ |
1208 | { \ | |
1209 | static int num_func = 0; \ | |
8ecf187a | 1210 | rtx xops[8]; \ |
1cf5eda8 MM |
1211 | char block_table[80], false_label[80]; \ |
1212 | \ | |
1213 | ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \ | |
1cf5eda8 | 1214 | \ |
f64cecad | 1215 | xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \ |
1cf5eda8 | 1216 | xops[5] = stack_pointer_rtx; \ |
f64cecad | 1217 | xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \ |
1cf5eda8 MM |
1218 | \ |
1219 | CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \ | |
1cf5eda8 | 1220 | \ |
6e753900 | 1221 | switch (profile_block_flag) \ |
1cf5eda8 | 1222 | { \ |
1cf5eda8 | 1223 | \ |
6e753900 RK |
1224 | case 2: \ |
1225 | \ | |
1226 | xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \ | |
f64cecad | 1227 | xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \ |
6e753900 RK |
1228 | xops[6] = GEN_INT (8); \ |
1229 | \ | |
1230 | output_asm_insn (AS1(push%L2,%2), xops); \ | |
1231 | if (!flag_pic) \ | |
1232 | output_asm_insn (AS1(push%L1,%1), xops); \ | |
1233 | else \ | |
1234 | { \ | |
1235 | output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \ | |
1236 | output_asm_insn (AS1 (push%L7,%7), xops); \ | |
1237 | } \ | |
1238 | \ | |
1239 | output_asm_insn (AS1(call,%P3), xops); \ | |
1240 | output_asm_insn (AS2(add%L0,%6,%5), xops); \ | |
1241 | \ | |
1242 | break; \ | |
1243 | \ | |
1244 | default: \ | |
1245 | \ | |
1246 | ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \ | |
1247 | \ | |
1248 | xops[0] = const0_rtx; \ | |
f64cecad JC |
1249 | xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \ |
1250 | xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \ | |
1251 | xops[4] = gen_rtx_MEM (Pmode, xops[1]); \ | |
6e753900 RK |
1252 | xops[6] = GEN_INT (4); \ |
1253 | \ | |
1254 | CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \ | |
1255 | \ | |
1256 | output_asm_insn (AS2(cmp%L4,%0,%4), xops); \ | |
1257 | output_asm_insn (AS1(jne,%2), xops); \ | |
1258 | \ | |
1259 | if (!flag_pic) \ | |
1260 | output_asm_insn (AS1(push%L1,%1), xops); \ | |
1261 | else \ | |
1262 | { \ | |
1263 | output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \ | |
1264 | output_asm_insn (AS1 (push%L7,%7), xops); \ | |
1265 | } \ | |
1266 | \ | |
1267 | output_asm_insn (AS1(call,%P3), xops); \ | |
1268 | output_asm_insn (AS2(add%L0,%6,%5), xops); \ | |
1269 | ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \ | |
1270 | num_func++; \ | |
1271 | \ | |
1272 | break; \ | |
1273 | \ | |
1274 | } \ | |
1cf5eda8 MM |
1275 | } \ |
1276 | while (0) | |
1277 | ||
6e753900 RK |
1278 | /* The following macro shall output assembler code to FILE |
1279 | to increment a counter associated with basic block number BLOCKNO. | |
1280 | ||
1281 | If profile_block_flag == 2 | |
1282 | ||
1283 | Output code to initialize the global structure `__bb' and | |
1284 | call the function `__bb_trace_func' which will increment the | |
1285 | counter. | |
1286 | ||
1287 | `__bb' consists of two words. In the first word the number | |
1288 | of the basic block has to be stored. In the second word | |
1289 | the address of a block allocated in the object module | |
1290 | has to be stored. | |
1291 | ||
1292 | The basic block number is given by BLOCKNO. | |
1293 | ||
1294 | The address of the block is given by the label created with | |
1295 | ||
1296 | ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0); | |
1297 | ||
1298 | by FUNCTION_BLOCK_PROFILER. | |
1cf5eda8 | 1299 | |
6e753900 RK |
1300 | Of course, since you are writing the definition of |
1301 | `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you | |
1302 | can take a short cut in the definition of this macro and use the | |
1303 | name that you know will result. | |
1cf5eda8 | 1304 | |
6e753900 RK |
1305 | If described in a virtual assembler language the code to be |
1306 | output looks like: | |
1cf5eda8 | 1307 | |
6e753900 RK |
1308 | move BLOCKNO -> (__bb) |
1309 | move LPBX0 -> (__bb+4) | |
1310 | call __bb_trace_func | |
1cf5eda8 | 1311 | |
6e753900 RK |
1312 | Note that function `__bb_trace_func' must not change the |
1313 | machine state, especially the flag register. To grant | |
1314 | this, you must output code to save and restore registers | |
1315 | either in this macro or in the macros MACHINE_STATE_SAVE | |
1316 | and MACHINE_STATE_RESTORE. The last two macros will be | |
1317 | used in the function `__bb_trace_func', so you must make | |
1318 | sure that the function prologue does not change any | |
1319 | register prior to saving it with MACHINE_STATE_SAVE. | |
1320 | ||
1321 | else if profile_block_flag != 0 | |
1322 | ||
1323 | Output code to increment the counter directly. | |
1324 | Basic blocks are numbered separately from zero within each | |
1325 | compiled object module. The count associated with block number | |
1326 | BLOCKNO is at index BLOCKNO in an array of words; the name of | |
1327 | this array is a local symbol made with this statement: | |
1328 | ||
1329 | ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2); | |
1330 | ||
1331 | Of course, since you are writing the definition of | |
1332 | `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you | |
1333 | can take a short cut in the definition of this macro and use the | |
1334 | name that you know will result. | |
1335 | ||
1336 | If described in a virtual assembler language the code to be | |
1337 | output looks like: | |
1338 | ||
1339 | inc (LPBX2+4*BLOCKNO) | |
1340 | ||
1341 | */ | |
1342 | ||
1343 | #define BLOCK_PROFILER(FILE, BLOCKNO) \ | |
1cf5eda8 MM |
1344 | do \ |
1345 | { \ | |
6e753900 | 1346 | rtx xops[8], cnt_rtx; \ |
1cf5eda8 | 1347 | char counts[80]; \ |
6e753900 RK |
1348 | char *block_table = counts; \ |
1349 | \ | |
1350 | switch (profile_block_flag) \ | |
1351 | { \ | |
1352 | \ | |
1353 | case 2: \ | |
1354 | \ | |
1355 | ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \ | |
1356 | \ | |
f64cecad | 1357 | xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \ |
6e753900 | 1358 | xops[2] = GEN_INT ((BLOCKNO)); \ |
f64cecad JC |
1359 | xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \ |
1360 | xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \ | |
6e753900 | 1361 | xops[5] = plus_constant (xops[4], 4); \ |
f64cecad JC |
1362 | xops[0] = gen_rtx_MEM (SImode, xops[4]); \ |
1363 | xops[6] = gen_rtx_MEM (SImode, xops[5]); \ | |
6e753900 RK |
1364 | \ |
1365 | CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \ | |
1366 | \ | |
1367 | fprintf(FILE, "\tpushf\n"); \ | |
1368 | output_asm_insn (AS2(mov%L0,%2,%0), xops); \ | |
1369 | if (flag_pic) \ | |
1370 | { \ | |
f64cecad | 1371 | xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \ |
6e753900 RK |
1372 | output_asm_insn (AS1(push%L7,%7), xops); \ |
1373 | output_asm_insn (AS2(lea%L7,%a1,%7), xops); \ | |
1374 | output_asm_insn (AS2(mov%L6,%7,%6), xops); \ | |
1375 | output_asm_insn (AS1(pop%L7,%7), xops); \ | |
1376 | } \ | |
1377 | else \ | |
1378 | output_asm_insn (AS2(mov%L6,%1,%6), xops); \ | |
1379 | output_asm_insn (AS1(call,%P3), xops); \ | |
1380 | fprintf(FILE, "\tpopf\n"); \ | |
1381 | \ | |
1382 | break; \ | |
1383 | \ | |
1384 | default: \ | |
1385 | \ | |
1386 | ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \ | |
f64cecad | 1387 | cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \ |
6e753900 | 1388 | SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \ |
1cf5eda8 | 1389 | \ |
6e753900 RK |
1390 | if (BLOCKNO) \ |
1391 | cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \ | |
1cf5eda8 | 1392 | \ |
6e753900 | 1393 | if (flag_pic) \ |
f64cecad | 1394 | cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \ |
05ca35c7 | 1395 | \ |
f64cecad | 1396 | xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \ |
6e753900 | 1397 | output_asm_insn (AS1(inc%L0,%0), xops); \ |
05ca35c7 | 1398 | \ |
6e753900 RK |
1399 | break; \ |
1400 | \ | |
1401 | } \ | |
1cf5eda8 MM |
1402 | } \ |
1403 | while (0) | |
1404 | ||
6e753900 RK |
1405 | /* The following macro shall output assembler code to FILE |
1406 | to indicate a return from function during basic-block profiling. | |
1407 | ||
1408 | If profiling_block_flag == 2: | |
1409 | ||
1410 | Output assembler code to call function `__bb_trace_ret'. | |
1411 | ||
1412 | Note that function `__bb_trace_ret' must not change the | |
1413 | machine state, especially the flag register. To grant | |
1414 | this, you must output code to save and restore registers | |
1415 | either in this macro or in the macros MACHINE_STATE_SAVE_RET | |
1416 | and MACHINE_STATE_RESTORE_RET. The last two macros will be | |
1417 | used in the function `__bb_trace_ret', so you must make | |
1418 | sure that the function prologue does not change any | |
1419 | register prior to saving it with MACHINE_STATE_SAVE_RET. | |
1420 | ||
1421 | else if profiling_block_flag != 0: | |
1422 | ||
1423 | The macro will not be used, so it need not distinguish | |
1424 | these cases. | |
1425 | */ | |
1426 | ||
1427 | #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \ | |
1428 | do \ | |
1429 | { \ | |
1430 | rtx xops[1]; \ | |
1431 | \ | |
f64cecad | 1432 | xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \ |
6e753900 RK |
1433 | \ |
1434 | output_asm_insn (AS1(call,%P0), xops); \ | |
1435 | \ | |
1436 | } \ | |
1437 | while (0) | |
1438 | ||
1439 | /* The function `__bb_trace_func' is called in every basic block | |
1440 | and is not allowed to change the machine state. Saving (restoring) | |
1441 | the state can either be done in the BLOCK_PROFILER macro, | |
1442 | before calling function (rsp. after returning from function) | |
1443 | `__bb_trace_func', or it can be done inside the function by | |
1444 | defining the macros: | |
1445 | ||
1446 | MACHINE_STATE_SAVE(ID) | |
1447 | MACHINE_STATE_RESTORE(ID) | |
1448 | ||
1449 | In the latter case care must be taken, that the prologue code | |
1450 | of function `__bb_trace_func' does not already change the | |
1451 | state prior to saving it with MACHINE_STATE_SAVE. | |
1452 | ||
1453 | The parameter `ID' is a string identifying a unique macro use. | |
1454 | ||
1455 | On the i386 the initialization code at the begin of | |
1456 | function `__bb_trace_func' contains a `sub' instruction | |
1457 | therefore we handle save and restore of the flag register | |
1458 | in the BLOCK_PROFILER macro. */ | |
1459 | ||
1460 | #define MACHINE_STATE_SAVE(ID) \ | |
1461 | asm (" pushl %eax"); \ | |
1462 | asm (" pushl %ecx"); \ | |
1463 | asm (" pushl %edx"); \ | |
1464 | asm (" pushl %esi"); | |
1465 | ||
1466 | #define MACHINE_STATE_RESTORE(ID) \ | |
1467 | asm (" popl %esi"); \ | |
1468 | asm (" popl %edx"); \ | |
1469 | asm (" popl %ecx"); \ | |
1470 | asm (" popl %eax"); | |
1471 | ||
c98f8742 JVA |
1472 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
1473 | the stack pointer does not matter. The value is tested only in | |
1474 | functions that have frame pointers. | |
1475 | No definition is equivalent to always zero. */ | |
1476 | /* Note on the 386 it might be more efficient not to define this since | |
1477 | we have to restore it ourselves from the frame pointer, in order to | |
1478 | use pop */ | |
1479 | ||
1480 | #define EXIT_IGNORE_STACK 1 | |
1481 | ||
1482 | /* This macro generates the assembly code for function exit, | |
1483 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1484 | then individual return instructions are generated for each | |
1485 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1486 | ||
1487 | The function epilogue should not depend on the current stack pointer! | |
1488 | It should use the frame pointer only. This is mandatory because | |
1489 | of alloca; we also take advantage of it to omit stack adjustments | |
1490 | before returning. | |
1491 | ||
1492 | If the last non-note insn in the function is a BARRIER, then there | |
1493 | is no need to emit a function prologue, because control does not fall | |
1494 | off the end. This happens if the function ends in an "exit" call, or | |
1495 | if a `return' insn is emitted directly into the function. */ | |
1496 | ||
2f2fa5b1 SC |
1497 | #if 0 |
1498 | #define FUNCTION_BEGIN_EPILOGUE(FILE) \ | |
c98f8742 JVA |
1499 | do { \ |
1500 | rtx last = get_last_insn (); \ | |
1501 | if (last && GET_CODE (last) == NOTE) \ | |
1502 | last = prev_nonnote_insn (last); \ | |
2f2fa5b1 SC |
1503 | /* if (! last || GET_CODE (last) != BARRIER) \ |
1504 | function_epilogue (FILE, SIZE);*/ \ | |
c98f8742 | 1505 | } while (0) |
2f2fa5b1 SC |
1506 | #endif |
1507 | ||
1508 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
1509 | function_epilogue (FILE, SIZE) | |
c98f8742 JVA |
1510 | |
1511 | /* Output assembler code for a block containing the constant parts | |
1512 | of a trampoline, leaving space for the variable parts. */ | |
1513 | ||
1514 | /* On the 386, the trampoline contains three instructions: | |
1515 | mov #STATIC,ecx | |
1516 | mov #FUNCTION,eax | |
1517 | jmp @eax */ | |
8c2bf92a JVA |
1518 | #define TRAMPOLINE_TEMPLATE(FILE) \ |
1519 | { \ | |
1520 | ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \ | |
1521 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
1522 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
1523 | ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \ | |
1524 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
1525 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
1526 | ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \ | |
1527 | ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \ | |
c98f8742 JVA |
1528 | } |
1529 | ||
1530 | /* Length in units of the trampoline for entering a nested function. */ | |
1531 | ||
1532 | #define TRAMPOLINE_SIZE 12 | |
1533 | ||
1534 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1535 | FNADDR is an RTX for the address of the function's pure code. | |
1536 | CXT is an RTX for the static chain value for the function. */ | |
1537 | ||
1538 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
1539 | { \ | |
f64cecad JC |
1540 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \ |
1541 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \ | |
c98f8742 JVA |
1542 | } |
1543 | \f | |
1544 | /* Definitions for register eliminations. | |
1545 | ||
1546 | This is an array of structures. Each structure initializes one pair | |
1547 | of eliminable registers. The "from" register number is given first, | |
1548 | followed by "to". Eliminations of the same "from" register are listed | |
1549 | in order of preference. | |
1550 | ||
1551 | We have two registers that can be eliminated on the i386. First, the | |
1552 | frame pointer register can often be eliminated in favor of the stack | |
1553 | pointer register. Secondly, the argument pointer register can always be | |
1554 | eliminated; it is replaced with either the stack or frame pointer. */ | |
1555 | ||
1556 | #define ELIMINABLE_REGS \ | |
1557 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1558 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
1559 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
1560 | ||
1561 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
1562 | Frame pointer elimination is automatically handled. | |
1563 | ||
1564 | For the i386, if frame pointer elimination is being done, we would like to | |
1565 | convert ap into sp, not fp. | |
1566 | ||
1567 | All other eliminations are valid. */ | |
1568 | ||
1569 | #define CAN_ELIMINATE(FROM, TO) \ | |
1570 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
1571 | ? ! frame_pointer_needed \ | |
1572 | : 1) | |
1573 | ||
1574 | /* Define the offset between two registers, one to be eliminated, and the other | |
1575 | its replacement, at the start of a routine. */ | |
1576 | ||
1577 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1578 | { \ | |
1579 | if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1580 | (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \ | |
1581 | else \ | |
1582 | { \ | |
1583 | int regno; \ | |
1584 | int offset = 0; \ | |
1585 | \ | |
1586 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ | |
1587 | if ((regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
6d8ccdbb JL |
1588 | || ((current_function_uses_pic_offset_table \ |
1589 | || current_function_uses_const_pool) \ | |
1590 | && flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)) \ | |
c98f8742 JVA |
1591 | offset += 4; \ |
1592 | \ | |
1593 | (OFFSET) = offset + get_frame_size (); \ | |
1594 | \ | |
1595 | if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1596 | (OFFSET) += 4; /* Skip saved PC */ \ | |
1597 | } \ | |
1598 | } | |
1599 | \f | |
1600 | /* Addressing modes, and classification of registers for them. */ | |
1601 | ||
1602 | /* #define HAVE_POST_INCREMENT */ | |
1603 | /* #define HAVE_POST_DECREMENT */ | |
1604 | ||
1605 | /* #define HAVE_PRE_DECREMENT */ | |
1606 | /* #define HAVE_PRE_INCREMENT */ | |
1607 | ||
1608 | /* Macros to check register numbers against specific register classes. */ | |
1609 | ||
1610 | /* These assume that REGNO is a hard or pseudo reg number. | |
1611 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1612 | or a pseudo reg currently allocated to a suitable hard reg. | |
1613 | Since they use reg_renumber, they are safe only once reg_renumber | |
1614 | has been allocated, which happens in local-alloc.c. */ | |
1615 | ||
1616 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1617 | ((REGNO) < STACK_POINTER_REGNUM \ | |
1618 | || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM) | |
1619 | ||
1620 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1621 | ((REGNO) <= STACK_POINTER_REGNUM \ | |
1622 | || (REGNO) == ARG_POINTER_REGNUM \ | |
1623 | || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM) | |
1624 | ||
1625 | #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4) | |
1626 | #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5) | |
1627 | ||
1628 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1629 | and check its validity for a certain class. | |
1630 | We have two alternate definitions for each of them. | |
1631 | The usual definition accepts all pseudo regs; the other rejects | |
1632 | them unless they have been allocated suitable hard regs. | |
1633 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1634 | ||
1635 | Most source files want to accept pseudo regs in the hope that | |
1636 | they will get allocated to the class that the insn wants them to be in. | |
1637 | Source files for reload pass need to be strict. | |
1638 | After reload, it makes no difference, since pseudo regs have | |
1639 | been eliminated by then. */ | |
1640 | ||
c98f8742 | 1641 | |
3b3c6a3f MM |
1642 | /* Non strict versions, pseudos are ok */ |
1643 | #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ | |
1644 | (REGNO (X) < STACK_POINTER_REGNUM \ | |
c98f8742 JVA |
1645 | || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
1646 | ||
3b3c6a3f MM |
1647 | #define REG_OK_FOR_BASE_NONSTRICT_P(X) \ |
1648 | (REGNO (X) <= STACK_POINTER_REGNUM \ | |
1649 | || REGNO (X) == ARG_POINTER_REGNUM \ | |
1650 | || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
c98f8742 | 1651 | |
3b3c6a3f | 1652 | #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \ |
c98f8742 JVA |
1653 | (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
1654 | ||
3b3c6a3f MM |
1655 | /* Strict versions, hard registers only */ |
1656 | #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1657 | #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1658 | #define REG_OK_FOR_STRREG_STRICT_P(X) \ | |
c98f8742 JVA |
1659 | (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X))) |
1660 | ||
3b3c6a3f MM |
1661 | #ifndef REG_OK_STRICT |
1662 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X) | |
1663 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X) | |
1664 | #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X) | |
1665 | ||
1666 | #else | |
1667 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X) | |
1668 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X) | |
1669 | #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X) | |
c98f8742 JVA |
1670 | #endif |
1671 | ||
1672 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1673 | that is a valid memory address for an instruction. | |
1674 | The MODE argument is the machine mode for the MEM expression | |
1675 | that wants to use this address. | |
1676 | ||
1677 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, | |
1678 | except for CONSTANT_ADDRESS_P which is usually machine-independent. | |
1679 | ||
1680 | See legitimize_pic_address in i386.c for details as to what | |
1681 | constitutes a legitimate address when -fpic is used. */ | |
1682 | ||
1683 | #define MAX_REGS_PER_ADDRESS 2 | |
1684 | ||
6eff269e BK |
1685 | #define CONSTANT_ADDRESS_P(X) \ |
1686 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1687 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1688 | || GET_CODE (X) == HIGH) | |
c98f8742 JVA |
1689 | |
1690 | /* Nonzero if the constant value X is a legitimate general operand. | |
1691 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
1692 | ||
1693 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
1694 | ||
3b3c6a3f MM |
1695 | #ifdef REG_OK_STRICT |
1696 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1697 | { \ | |
1698 | if (legitimate_address_p (MODE, X, 1)) \ | |
1699 | goto ADDR; \ | |
1700 | } | |
c98f8742 | 1701 | |
3b3c6a3f MM |
1702 | #else |
1703 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
c98f8742 | 1704 | { \ |
3b3c6a3f | 1705 | if (legitimate_address_p (MODE, X, 0)) \ |
c98f8742 | 1706 | goto ADDR; \ |
c98f8742 JVA |
1707 | } |
1708 | ||
3b3c6a3f MM |
1709 | #endif |
1710 | ||
c98f8742 JVA |
1711 | /* Try machine-dependent ways of modifying an illegitimate address |
1712 | to be legitimate. If we find one, return the new, valid address. | |
1713 | This macro is used in only one place: `memory_address' in explow.c. | |
1714 | ||
1715 | OLDX is the address as it was before break_out_memory_refs was called. | |
1716 | In some cases it is useful to look at this to decide what needs to be done. | |
1717 | ||
1718 | MODE and WIN are passed so that this macro can use | |
1719 | GO_IF_LEGITIMATE_ADDRESS. | |
1720 | ||
1721 | It is always safe for this macro to do nothing. It exists to recognize | |
1722 | opportunities to optimize the output. | |
1723 | ||
1724 | For the 80386, we handle X+REG by loading X into a register R and | |
1725 | using R+REG. R will go in a general reg and indexing will be used. | |
1726 | However, if REG is a broken-out memory address or multiplication, | |
1727 | nothing needs to be done because REG can certainly go in a general reg. | |
1728 | ||
1729 | When -fpic is used, special handling is needed for symbolic references. | |
1730 | See comments by legitimize_pic_address in i386.c for details. */ | |
1731 | ||
3b3c6a3f MM |
1732 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ |
1733 | { \ | |
3b3c6a3f MM |
1734 | (X) = legitimize_address (X, OLDX, MODE); \ |
1735 | if (memory_address_p (MODE, X)) \ | |
1736 | goto WIN; \ | |
1737 | } | |
c98f8742 | 1738 | |
d4ba09c0 SC |
1739 | #define REWRITE_ADDRESS(x) rewrite_address(x) |
1740 | ||
c98f8742 JVA |
1741 | /* Nonzero if the constant value X is a legitimate general operand |
1742 | when generating PIC code. It is given that flag_pic is on and | |
1743 | that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
1744 | ||
1745 | #define LEGITIMATE_PIC_OPERAND_P(X) \ | |
1746 | (! SYMBOLIC_CONST (X) \ | |
1747 | || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))) | |
1748 | ||
1749 | #define SYMBOLIC_CONST(X) \ | |
1750 | (GET_CODE (X) == SYMBOL_REF \ | |
1751 | || GET_CODE (X) == LABEL_REF \ | |
1752 | || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) | |
1753 | ||
1754 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1755 | has an effect that depends on the machine mode it is used for. | |
1756 | On the 80386, only postdecrement and postincrement address depend thus | |
1757 | (the amount of decrement or increment being the length of the operand). */ | |
1758 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1759 | if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL | |
1760 | \f | |
1761 | /* Define this macro if references to a symbol must be treated | |
1762 | differently depending on something about the variable or | |
1763 | function named by the symbol (such as what section it is in). | |
1764 | ||
b4ac57ab | 1765 | On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol |
c98f8742 JVA |
1766 | so that we may access it directly in the GOT. */ |
1767 | ||
1768 | #define ENCODE_SECTION_INFO(DECL) \ | |
1769 | do \ | |
1770 | { \ | |
1771 | if (flag_pic) \ | |
1772 | { \ | |
b4ac57ab RS |
1773 | rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ |
1774 | ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ | |
d4ba09c0 SC |
1775 | \ |
1776 | if (TARGET_DEBUG_ADDR \ | |
1777 | && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \ | |
1778 | { \ | |
69d4ca36 | 1779 | fprintf (stderr, "Encode %s, public = %d\n", \ |
d4ba09c0 SC |
1780 | IDENTIFIER_POINTER (DECL_NAME (DECL)), \ |
1781 | TREE_PUBLIC (DECL)); \ | |
1782 | } \ | |
1783 | \ | |
b4ac57ab RS |
1784 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ |
1785 | = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ | |
1786 | || ! TREE_PUBLIC (DECL)); \ | |
c98f8742 JVA |
1787 | } \ |
1788 | } \ | |
1789 | while (0) | |
d398b3b1 JVA |
1790 | |
1791 | /* Initialize data used by insn expanders. This is called from | |
1792 | init_emit, once for each function, before code is generated. | |
1793 | For 386, clear stack slot assignments remembered from previous | |
1794 | functions. */ | |
1795 | ||
1796 | #define INIT_EXPANDERS clear_386_stack_locals () | |
638b724c MM |
1797 | |
1798 | /* The `FINALIZE_PIC' macro serves as a hook to emit these special | |
1799 | codes once the function is being compiled into assembly code, but | |
1800 | not before. (It is not done before, because in the case of | |
1801 | compiling an inline function, it would lead to multiple PIC | |
1802 | prologues being included in functions which used inline functions | |
1803 | and were compiled to assembly language.) */ | |
1804 | ||
1805 | #define FINALIZE_PIC \ | |
1806 | do \ | |
1807 | { \ | |
1808 | extern int current_function_uses_pic_offset_table; \ | |
1809 | \ | |
1810 | current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \ | |
1811 | } \ | |
1812 | while (0) | |
1813 | ||
b08de47e MM |
1814 | \f |
1815 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
1816 | with arguments ARGS is a valid machine specific attribute for DECL. | |
1817 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
1818 | ||
7db4b149 RK |
1819 | #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \ |
1820 | (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS)) | |
b08de47e MM |
1821 | |
1822 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
1823 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
1824 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
1825 | ||
7db4b149 RK |
1826 | #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \ |
1827 | (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS)) | |
b08de47e MM |
1828 | |
1829 | /* If defined, a C expression whose value is zero if the attributes on | |
1830 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
1831 | two if they are nearly compatible (which causes a warning to be | |
1832 | generated). */ | |
1833 | ||
1834 | #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \ | |
1835 | (i386_comp_type_attributes (TYPE1, TYPE2)) | |
1836 | ||
1837 | /* If defined, a C statement that assigns default attributes to newly | |
1838 | defined TYPE. */ | |
1839 | ||
1840 | /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */ | |
1841 | ||
1842 | /* Max number of args passed in registers. If this is more than 3, we will | |
1843 | have problems with ebx (register #4), since it is a caller save register and | |
1844 | is also used as the pic register in ELF. So for now, don't allow more than | |
1845 | 3 registers to be passed in registers. */ | |
1846 | ||
1847 | #define REGPARM_MAX 3 | |
1848 | ||
c98f8742 JVA |
1849 | \f |
1850 | /* Specify the machine mode that this machine uses | |
1851 | for the index in the tablejump instruction. */ | |
1852 | #define CASE_VECTOR_MODE Pmode | |
1853 | ||
18543a22 ILT |
1854 | /* Define as C expression which evaluates to nonzero if the tablejump |
1855 | instruction expects the table to contain offsets from the address of the | |
1856 | table. | |
1857 | Do not define this if the table should contain absolute addresses. */ | |
1858 | /* #define CASE_VECTOR_PC_RELATIVE 1 */ | |
c98f8742 JVA |
1859 | |
1860 | /* Specify the tree operation to be used to convert reals to integers. | |
1861 | This should be changed to take advantage of fist --wfs ?? | |
1862 | */ | |
1863 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1864 | ||
1865 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1866 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1867 | ||
1868 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1869 | #define DEFAULT_SIGNED_CHAR 1 | |
1870 | ||
1871 | /* Max number of bytes we can move from memory to memory | |
1872 | in one reasonably fast instruction. */ | |
1873 | #define MOVE_MAX 4 | |
1874 | ||
d4ba09c0 SC |
1875 | /* The number of scalar move insns which should be generated instead |
1876 | of a string move insn or a library call. Increasing the value | |
1877 | will always make code faster, but eventually incurs high cost in | |
1878 | increased code size. | |
c98f8742 | 1879 | |
d4ba09c0 | 1880 | If you don't define this, a reasonable default is used. |
c98f8742 | 1881 | |
d4ba09c0 SC |
1882 | Make this large on i386, since the block move is very inefficient with small |
1883 | blocks, and the hard register needs of the block move require much reload | |
1884 | work. */ | |
1885 | ||
1886 | #define MOVE_RATIO 5 | |
c98f8742 JVA |
1887 | |
1888 | /* Define if shifts truncate the shift count | |
1889 | which implies one can omit a sign-extension or zero-extension | |
1890 | of a shift count. */ | |
241e1a89 | 1891 | /* On i386, shifts do truncate the count. But bit opcodes don't. */ |
c98f8742 JVA |
1892 | |
1893 | /* #define SHIFT_COUNT_TRUNCATED */ | |
1894 | ||
1895 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1896 | is done just by pretending it is already truncated. */ | |
1897 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1898 | ||
1899 | /* We assume that the store-condition-codes instructions store 0 for false | |
1900 | and some other value for true. This is the value stored for true. */ | |
1901 | ||
1902 | #define STORE_FLAG_VALUE 1 | |
1903 | ||
1904 | /* When a prototype says `char' or `short', really pass an `int'. | |
1905 | (The 386 can't easily push less than an int.) */ | |
1906 | ||
1907 | #define PROMOTE_PROTOTYPES | |
1908 | ||
1909 | /* Specify the machine mode that pointers have. | |
1910 | After generation of rtl, the compiler makes no further distinction | |
1911 | between pointers and any other objects of this machine mode. */ | |
1912 | #define Pmode SImode | |
1913 | ||
1914 | /* A function address in a call instruction | |
1915 | is a byte address (for indexing purposes) | |
1916 | so give the MEM rtx a byte's mode. */ | |
1917 | #define FUNCTION_MODE QImode | |
d4ba09c0 SC |
1918 | \f |
1919 | /* A part of a C `switch' statement that describes the relative costs | |
1920 | of constant RTL expressions. It must contain `case' labels for | |
1921 | expression codes `const_int', `const', `symbol_ref', `label_ref' | |
1922 | and `const_double'. Each case must ultimately reach a `return' | |
1923 | statement to return the relative cost of the use of that kind of | |
1924 | constant value in an expression. The cost may depend on the | |
1925 | precise value of the constant, which is available for examination | |
1926 | in X, and the rtx code of the expression in which it is contained, | |
1927 | found in OUTER_CODE. | |
1928 | ||
1929 | CODE is the expression code--redundant, since it can be obtained | |
1930 | with `GET_CODE (X)'. */ | |
c98f8742 | 1931 | |
3bb22aee | 1932 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
c98f8742 | 1933 | case CONST_INT: \ |
e5e809f4 | 1934 | return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \ |
c98f8742 JVA |
1935 | case CONST: \ |
1936 | case LABEL_REF: \ | |
1937 | case SYMBOL_REF: \ | |
76565a24 | 1938 | return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \ |
d4ba09c0 | 1939 | \ |
c98f8742 JVA |
1940 | case CONST_DOUBLE: \ |
1941 | { \ | |
7488be4e JVA |
1942 | int code; \ |
1943 | if (GET_MODE (RTX) == VOIDmode) \ | |
1944 | return 2; \ | |
d4ba09c0 | 1945 | \ |
7488be4e | 1946 | code = standard_80387_constant_p (RTX); \ |
c98f8742 JVA |
1947 | return code == 1 ? 0 : \ |
1948 | code == 2 ? 1 : \ | |
1949 | 2; \ | |
3bb22aee | 1950 | } |
c98f8742 | 1951 | |
76565a24 SC |
1952 | /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */ |
1953 | #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;} | |
1954 | ||
d4ba09c0 SC |
1955 | /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. |
1956 | This can be used, for example, to indicate how costly a multiply | |
1957 | instruction is. In writing this macro, you can use the construct | |
1958 | `COSTS_N_INSNS (N)' to specify a cost equal to N fast | |
1959 | instructions. OUTER_CODE is the code of the expression in which X | |
1960 | is contained. | |
1961 | ||
1962 | This macro is optional; do not define it if the default cost | |
1963 | assumptions are adequate for the target machine. */ | |
1964 | ||
1965 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ | |
1966 | case ASHIFT: \ | |
1967 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1968 | && GET_MODE (XEXP (X, 0)) == SImode) \ | |
1969 | { \ | |
1970 | HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ | |
1971 | \ | |
1972 | if (value == 1) \ | |
66050251 SC |
1973 | return COSTS_N_INSNS (ix86_cost->add) \ |
1974 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ | |
d4ba09c0 SC |
1975 | \ |
1976 | if (value == 2 || value == 3) \ | |
66050251 SC |
1977 | return COSTS_N_INSNS (ix86_cost->lea) \ |
1978 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ | |
d4ba09c0 SC |
1979 | } \ |
1980 | /* fall through */ \ | |
1981 | \ | |
1982 | case ROTATE: \ | |
1983 | case ASHIFTRT: \ | |
1984 | case LSHIFTRT: \ | |
1985 | case ROTATERT: \ | |
76565a24 SC |
1986 | if (GET_MODE (XEXP (X, 0)) == DImode) \ |
1987 | { \ | |
1988 | if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
54d26233 MH |
1989 | { \ |
1990 | if (INTVAL (XEXP (X, 1)) > 32) \ | |
1991 | return COSTS_N_INSNS(ix86_cost->shift_const + 2); \ | |
76565a24 | 1992 | return COSTS_N_INSNS(ix86_cost->shift_const * 2); \ |
54d26233 | 1993 | } \ |
76565a24 SC |
1994 | return ((GET_CODE (XEXP (X, 1)) == AND \ |
1995 | ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \ | |
1996 | : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \ | |
66050251 | 1997 | + rtx_cost(XEXP (X, 0), OUTER_CODE)); \ |
76565a24 SC |
1998 | } \ |
1999 | return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
2000 | ? ix86_cost->shift_const \ | |
2001 | : ix86_cost->shift_var) \ | |
66050251 | 2002 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ |
d4ba09c0 SC |
2003 | \ |
2004 | case MULT: \ | |
2005 | if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
2006 | { \ | |
2007 | unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ | |
2008 | int nbits = 0; \ | |
2009 | \ | |
76565a24 | 2010 | if (value == 2) \ |
66050251 SC |
2011 | return COSTS_N_INSNS (ix86_cost->add) \ |
2012 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ | |
76565a24 | 2013 | if (value == 4 || value == 8) \ |
66050251 SC |
2014 | return COSTS_N_INSNS (ix86_cost->lea) \ |
2015 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ | |
76565a24 | 2016 | \ |
d4ba09c0 SC |
2017 | while (value != 0) \ |
2018 | { \ | |
2019 | nbits++; \ | |
2020 | value >>= 1; \ | |
2021 | } \ | |
2022 | \ | |
76565a24 SC |
2023 | if (nbits == 1) \ |
2024 | return COSTS_N_INSNS (ix86_cost->shift_const) \ | |
66050251 | 2025 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ |
76565a24 | 2026 | \ |
d4ba09c0 | 2027 | return COSTS_N_INSNS (ix86_cost->mult_init \ |
76565a24 | 2028 | + nbits * ix86_cost->mult_bit) \ |
66050251 | 2029 | + rtx_cost(XEXP (X, 0), OUTER_CODE); \ |
d4ba09c0 SC |
2030 | } \ |
2031 | \ | |
2032 | else /* This is arbitrary */ \ | |
76565a24 SC |
2033 | TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ |
2034 | + 7 * ix86_cost->mult_bit); \ | |
d4ba09c0 SC |
2035 | \ |
2036 | case DIV: \ | |
2037 | case UDIV: \ | |
2038 | case MOD: \ | |
2039 | case UMOD: \ | |
76565a24 | 2040 | TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \ |
d4ba09c0 SC |
2041 | \ |
2042 | case PLUS: \ | |
2043 | if (GET_CODE (XEXP (X, 0)) == REG \ | |
2044 | && GET_MODE (XEXP (X, 0)) == SImode \ | |
2045 | && GET_CODE (XEXP (X, 1)) == PLUS) \ | |
2046 | return COSTS_N_INSNS (ix86_cost->lea); \ | |
2047 | \ | |
2048 | /* fall through */ \ | |
2049 | case AND: \ | |
2050 | case IOR: \ | |
2051 | case XOR: \ | |
2052 | case MINUS: \ | |
76565a24 SC |
2053 | if (GET_MODE (X) == DImode) \ |
2054 | return COSTS_N_INSNS (ix86_cost->add) * 2 \ | |
66050251 SC |
2055 | + (rtx_cost (XEXP (X, 0), OUTER_CODE) \ |
2056 | << (GET_MODE (XEXP (X, 0)) != DImode)) \ | |
2057 | + (rtx_cost (XEXP (X, 1), OUTER_CODE) \ | |
2058 | << (GET_MODE (XEXP (X, 1)) != DImode)); \ | |
d4ba09c0 SC |
2059 | case NEG: \ |
2060 | case NOT: \ | |
76565a24 SC |
2061 | if (GET_MODE (X) == DImode) \ |
2062 | TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \ | |
2063 | TOPLEVEL_COSTS_N_INSNS (ix86_cost->add) | |
d4ba09c0 SC |
2064 | |
2065 | ||
2066 | /* An expression giving the cost of an addressing mode that contains | |
2067 | ADDRESS. If not defined, the cost is computed from the ADDRESS | |
2068 | expression and the `CONST_COSTS' values. | |
2069 | ||
2070 | For most CISC machines, the default cost is a good approximation | |
2071 | of the true cost of the addressing mode. However, on RISC | |
2072 | machines, all instructions normally have the same length and | |
2073 | execution time. Hence all addresses will have equal costs. | |
2074 | ||
2075 | In cases where more than one form of an address is known, the form | |
2076 | with the lowest cost will be used. If multiple forms have the | |
2077 | same, lowest, cost, the one that is the most complex will be used. | |
2078 | ||
2079 | For example, suppose an address that is equal to the sum of a | |
2080 | register and a constant is used twice in the same basic block. | |
2081 | When this macro is not defined, the address will be computed in a | |
2082 | register and memory references will be indirect through that | |
2083 | register. On machines where the cost of the addressing mode | |
2084 | containing the sum is no higher than that of a simple indirect | |
2085 | reference, this will produce an additional instruction and | |
2086 | possibly require an additional register. Proper specification of | |
2087 | this macro eliminates this overhead for such machines. | |
2088 | ||
2089 | Similar use of this macro is made in strength reduction of loops. | |
2090 | ||
2091 | ADDRESS need not be valid as an address. In such a case, the cost | |
2092 | is not relevant and can be any value; invalid addresses need not be | |
2093 | assigned a different cost. | |
2094 | ||
2095 | On machines where an address involving more than one register is as | |
2096 | cheap as an address computation involving only one register, | |
2097 | defining `ADDRESS_COST' to reflect this can cause two registers to | |
2098 | be live over a region of code where only one would have been if | |
2099 | `ADDRESS_COST' were not defined in that manner. This effect should | |
2100 | be considered in the definition of this macro. Equivalent costs | |
2101 | should probably only be given to addresses with different numbers | |
2102 | of registers on machines with lots of registers. | |
2103 | ||
2104 | This macro will normally either not be defined or be defined as a | |
2105 | constant. | |
c98f8742 JVA |
2106 | |
2107 | For i386, it is better to use a complex address than let gcc copy | |
2108 | the address into a reg and make a new pseudo. But not if the address | |
2109 | requires to two regs - that would mean more pseudos with longer | |
2110 | lifetimes. */ | |
2111 | ||
2112 | #define ADDRESS_COST(RTX) \ | |
2113 | ((CONSTANT_P (RTX) \ | |
2114 | || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \ | |
2115 | && REG_P (XEXP (RTX, 0)))) ? 0 \ | |
2116 | : REG_P (RTX) ? 1 \ | |
2117 | : 2) | |
d4ba09c0 SC |
2118 | |
2119 | /* A C expression for the cost of moving data of mode M between a | |
2120 | register and memory. A value of 2 is the default; this cost is | |
2121 | relative to those in `REGISTER_MOVE_COST'. | |
2122 | ||
2123 | If moving between registers and memory is more expensive than | |
2124 | between two registers, you should define this macro to express the | |
2125 | relative cost. | |
2126 | ||
2127 | On the i386, copying between floating-point and fixed-point | |
2128 | registers is expensive. */ | |
2129 | ||
2130 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
2131 | (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \ | |
2132 | || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \ | |
2133 | : 2) | |
2134 | ||
2135 | ||
2136 | /* A C expression for the cost of moving data of mode M between a | |
2137 | register and memory. A value of 2 is the default; this cost is | |
2138 | relative to those in `REGISTER_MOVE_COST'. | |
2139 | ||
2140 | If moving between registers and memory is more expensive than | |
2141 | between two registers, you should define this macro to express the | |
2142 | relative cost. */ | |
2143 | ||
cbd5b9a2 | 2144 | /* #define MEMORY_MOVE_COST(M,C,I) 2 */ |
d4ba09c0 SC |
2145 | |
2146 | /* A C expression for the cost of a branch instruction. A value of 1 | |
2147 | is the default; other values are interpreted relative to that. */ | |
2148 | ||
e2a606cb | 2149 | #define BRANCH_COST i386_branch_cost |
d4ba09c0 SC |
2150 | |
2151 | /* Define this macro as a C expression which is nonzero if accessing | |
2152 | less than a word of memory (i.e. a `char' or a `short') is no | |
2153 | faster than accessing a word of memory, i.e., if such access | |
2154 | require more than one instruction or if there is no difference in | |
2155 | cost between byte and (aligned) word loads. | |
2156 | ||
2157 | When this macro is not defined, the compiler will access a field by | |
2158 | finding the smallest containing object; when it is defined, a | |
2159 | fullword load will be used if alignment permits. Unless bytes | |
2160 | accesses are faster than word accesses, using word accesses is | |
2161 | preferable since it may eliminate subsequent memory access if | |
2162 | subsequent accesses occur to other fields in the same word of the | |
2163 | structure, but to different bytes. */ | |
2164 | ||
2165 | #define SLOW_BYTE_ACCESS 0 | |
2166 | ||
2167 | /* Nonzero if access to memory by shorts is slow and undesirable. */ | |
2168 | #define SLOW_SHORT_ACCESS 0 | |
2169 | ||
2170 | /* Define this macro if zero-extension (of a `char' or `short' to an | |
2171 | `int') can be done faster if the destination is a register that is | |
2172 | known to be zero. | |
2173 | ||
2174 | If you define this macro, you must have instruction patterns that | |
2175 | recognize RTL structures like this: | |
2176 | ||
2177 | (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...) | |
2178 | ||
2179 | and likewise for `HImode'. */ | |
2180 | ||
2181 | /* #define SLOW_ZERO_EXTEND */ | |
2182 | ||
2183 | /* Define this macro to be the value 1 if unaligned accesses have a | |
2184 | cost many times greater than aligned accesses, for example if they | |
2185 | are emulated in a trap handler. | |
2186 | ||
2187 | When this macro is non-zero, the compiler will act as if | |
2188 | `STRICT_ALIGNMENT' were non-zero when generating code for block | |
2189 | moves. This can cause significantly more instructions to be | |
2190 | produced. Therefore, do not set this macro non-zero if unaligned | |
2191 | accesses only add a cycle or two to the time for a memory access. | |
2192 | ||
2193 | If the value of this macro is always zero, it need not be defined. */ | |
2194 | ||
2195 | /* #define SLOW_UNALIGNED_ACCESS 0 */ | |
2196 | ||
2197 | /* Define this macro to inhibit strength reduction of memory | |
2198 | addresses. (On some machines, such strength reduction seems to do | |
2199 | harm rather than good.) */ | |
2200 | ||
2201 | /* #define DONT_REDUCE_ADDR */ | |
2202 | ||
2203 | /* Define this macro if it is as good or better to call a constant | |
2204 | function address than to call an address kept in a register. | |
2205 | ||
2206 | Desirable on the 386 because a CALL with a constant address is | |
2207 | faster than one with a register address. */ | |
2208 | ||
2209 | #define NO_FUNCTION_CSE | |
2210 | ||
2211 | /* Define this macro if it is as good or better for a function to call | |
2212 | itself with an explicit address than to call an address kept in a | |
2213 | register. */ | |
2214 | ||
2215 | #define NO_RECURSIVE_FUNCTION_CSE | |
2216 | ||
2217 | /* A C statement (sans semicolon) to update the integer variable COST | |
2218 | based on the relationship between INSN that is dependent on | |
2219 | DEP_INSN through the dependence LINK. The default is to make no | |
2220 | adjustment to COST. This can be used for example to specify to | |
2221 | the scheduler that an output- or anti-dependence does not incur | |
2222 | the same cost as a data-dependence. */ | |
2223 | ||
2224 | #define ADJUST_COST(insn,link,dep_insn,cost) \ | |
2225 | { \ | |
2226 | rtx next_inst; \ | |
2227 | if (GET_CODE (dep_insn) == CALL_INSN) \ | |
2228 | (cost) = 0; \ | |
2229 | \ | |
2230 | else if (GET_CODE (dep_insn) == INSN \ | |
2231 | && GET_CODE (PATTERN (dep_insn)) == SET \ | |
2232 | && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \ | |
2233 | && GET_CODE (insn) == INSN \ | |
2234 | && GET_CODE (PATTERN (insn)) == SET \ | |
2235 | && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \ | |
2236 | SET_SRC (PATTERN (insn)))) \ | |
2237 | { \ | |
2238 | (cost) = 0; \ | |
2239 | } \ | |
2240 | \ | |
2241 | else if (GET_CODE (insn) == JUMP_INSN) \ | |
2242 | { \ | |
2243 | (cost) = 0; \ | |
2244 | } \ | |
2245 | \ | |
2246 | if (TARGET_PENTIUM) \ | |
2247 | { \ | |
2248 | if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \ | |
2249 | && !is_fp_dest (dep_insn)) \ | |
2250 | { \ | |
2251 | (cost) = 0; \ | |
2252 | } \ | |
2253 | \ | |
2254 | if (agi_dependent (insn, dep_insn)) \ | |
2255 | { \ | |
2256 | (cost) = 3; \ | |
2257 | } \ | |
2258 | else if (GET_CODE (insn) == INSN \ | |
2259 | && GET_CODE (PATTERN (insn)) == SET \ | |
2260 | && SET_DEST (PATTERN (insn)) == cc0_rtx \ | |
2261 | && (next_inst = next_nonnote_insn (insn)) \ | |
2262 | && GET_CODE (next_inst) == JUMP_INSN) \ | |
2263 | { /* compare probably paired with jump */ \ | |
2264 | (cost) = 0; \ | |
2265 | } \ | |
2266 | } \ | |
2267 | else \ | |
2268 | if (!is_fp_dest (dep_insn)) \ | |
2269 | { \ | |
2270 | if(!agi_dependent (insn, dep_insn)) \ | |
2271 | (cost) = 0; \ | |
2272 | else if (TARGET_486) \ | |
2273 | (cost) = 2; \ | |
2274 | } \ | |
2275 | else \ | |
2276 | if (is_fp_store (insn) && is_fp_insn (dep_insn) \ | |
2277 | && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \ | |
2278 | && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \ | |
2279 | && (GET_CODE (NEXT_INSN (insn)) == INSN) \ | |
2280 | && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \ | |
2281 | && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \ | |
2282 | && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \ | |
2283 | == NOTE_INSN_LOOP_END)) \ | |
2284 | { \ | |
2285 | (cost) = 3; \ | |
2286 | } \ | |
2287 | } | |
2288 | ||
2289 | ||
2290 | #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \ | |
2291 | { \ | |
2292 | if (is_fp_store (last_insn) && is_fp_insn (insn) \ | |
2293 | && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \ | |
2294 | && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \ | |
2295 | && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \ | |
2296 | && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \ | |
2297 | && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \ | |
2298 | && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \ | |
2299 | == NOTE_INSN_LOOP_END)) \ | |
2300 | { \ | |
2301 | (blockage) = 3; \ | |
2302 | } \ | |
2303 | } | |
2304 | ||
c98f8742 | 2305 | \f |
c572e5ba JVA |
2306 | /* Add any extra modes needed to represent the condition code. |
2307 | ||
2308 | For the i386, we need separate modes when floating-point equality | |
2309 | comparisons are being done. */ | |
2310 | ||
2311 | #define EXTRA_CC_MODES CCFPEQmode | |
2312 | ||
2313 | /* Define the names for the modes specified above. */ | |
2314 | #define EXTRA_CC_NAMES "CCFPEQ" | |
2315 | ||
2316 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
2317 | return the mode to be used for the comparison. | |
2318 | ||
2319 | For floating-point equality comparisons, CCFPEQmode should be used. | |
2320 | VOIDmode should be used in all other cases. */ | |
2321 | ||
b565a316 | 2322 | #define SELECT_CC_MODE(OP,X,Y) \ |
c572e5ba | 2323 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ |
4cbb525c | 2324 | && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode) |
c572e5ba JVA |
2325 | |
2326 | /* Define the information needed to generate branch and scc insns. This is | |
2327 | stored from the compare operation. Note that we can't use "rtx" here | |
2328 | since it hasn't been defined! */ | |
2329 | ||
c572e5ba JVA |
2330 | extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)(); |
2331 | ||
c98f8742 JVA |
2332 | /* Tell final.c how to eliminate redundant test instructions. */ |
2333 | ||
2334 | /* Here we define machine-dependent flags and fields in cc_status | |
2335 | (see `conditions.h'). */ | |
2336 | ||
62acf5fd | 2337 | /* Set if the cc value was actually from the 80387 and |
d4ba09c0 SC |
2338 | we are testing eax directly (i.e. no sahf) */ |
2339 | #define CC_TEST_AX 020000 | |
2340 | ||
c98f8742 JVA |
2341 | /* Set if the cc value is actually in the 80387, so a floating point |
2342 | conditional branch must be output. */ | |
2343 | #define CC_IN_80387 04000 | |
2344 | ||
2345 | /* Set if the CC value was stored in a nonstandard way, so that | |
2346 | the state of equality is indicated by zero in the carry bit. */ | |
2347 | #define CC_Z_IN_NOT_C 010000 | |
2348 | ||
62acf5fd SC |
2349 | /* Set if the CC value was actually from the 80387 and loaded directly |
2350 | into the eflags instead of via eax/sahf. */ | |
2351 | #define CC_FCOMI 040000 | |
2352 | ||
c98f8742 JVA |
2353 | /* Store in cc_status the expressions |
2354 | that the condition codes will describe | |
2355 | after execution of an instruction whose pattern is EXP. | |
2356 | Do not alter them if the instruction would not alter the cc's. */ | |
2357 | ||
2358 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
2359 | notice_update_cc((EXP)) | |
2360 | ||
2361 | /* Output a signed jump insn. Use template NORMAL ordinarily, or | |
2362 | FLOAT following a floating point comparison. | |
2363 | Use NO_OV following an arithmetic insn that set the cc's | |
2364 | before a test insn that was deleted. | |
2365 | NO_OV may be zero, meaning final should reinsert the test insn | |
2366 | because the jump cannot be handled properly without it. */ | |
2367 | ||
2368 | #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ | |
2369 | { \ | |
2370 | if (cc_prev_status.flags & CC_IN_80387) \ | |
2371 | return FLOAT; \ | |
2372 | if (cc_prev_status.flags & CC_NO_OVERFLOW) \ | |
2373 | return NO_OV; \ | |
2374 | return NORMAL; \ | |
2375 | } | |
2376 | \f | |
2377 | /* Control the assembler format that we output, to the extent | |
2378 | this does not vary between assemblers. */ | |
2379 | ||
2380 | /* How to refer to registers in assembler output. | |
2381 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
2382 | ||
2383 | /* In order to refer to the first 8 regs as 32 bit regs prefix an "e" | |
2384 | For non floating point regs, the following are the HImode names. | |
2385 | ||
2386 | For float regs, the stack top is sometimes referred to as "%st(0)" | |
9e06e321 | 2387 | instead of just "%st". PRINT_REG handles this with the "y" code. */ |
c98f8742 JVA |
2388 | |
2389 | #define HI_REGISTER_NAMES \ | |
2390 | {"ax","dx","cx","bx","si","di","bp","sp", \ | |
2391 | "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" } | |
2392 | ||
2393 | #define REGISTER_NAMES HI_REGISTER_NAMES | |
2394 | ||
2395 | /* Table of additional register names to use in user input. */ | |
2396 | ||
2397 | #define ADDITIONAL_REGISTER_NAMES \ | |
54d26233 MH |
2398 | { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ |
2399 | { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ | |
2400 | { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ | |
2401 | { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } } | |
c98f8742 JVA |
2402 | |
2403 | /* Note we are omitting these since currently I don't know how | |
2404 | to get gcc to use these, since they want the same but different | |
2405 | number as al, and ax. | |
2406 | */ | |
2407 | ||
b4ac57ab | 2408 | /* note the last four are not really qi_registers, but |
c98f8742 JVA |
2409 | the md will have to never output movb into one of them |
2410 | only a movw . There is no movb into the last four regs */ | |
2411 | ||
2412 | #define QI_REGISTER_NAMES \ | |
2413 | {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",} | |
2414 | ||
2415 | /* These parallel the array above, and can be used to access bits 8:15 | |
2416 | of regs 0 through 3. */ | |
2417 | ||
2418 | #define QI_HIGH_REGISTER_NAMES \ | |
2419 | {"ah", "dh", "ch", "bh", } | |
2420 | ||
2421 | /* How to renumber registers for dbx and gdb. */ | |
2422 | ||
2423 | /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */ | |
2424 | #define DBX_REGISTER_NUMBER(n) \ | |
2425 | ((n) == 0 ? 0 : \ | |
2426 | (n) == 1 ? 2 : \ | |
2427 | (n) == 2 ? 1 : \ | |
2428 | (n) == 3 ? 3 : \ | |
2429 | (n) == 4 ? 6 : \ | |
2430 | (n) == 5 ? 7 : \ | |
2431 | (n) == 6 ? 4 : \ | |
2432 | (n) == 7 ? 5 : \ | |
2433 | (n) + 4) | |
2434 | ||
469ac993 JM |
2435 | /* Before the prologue, RA is at 0(%esp). */ |
2436 | #define INCOMING_RETURN_ADDR_RTX \ | |
f64cecad | 2437 | gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) |
469ac993 | 2438 | |
e414ab29 RH |
2439 | /* After the prologue, RA is at -4(AP) in the current frame. */ |
2440 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
2441 | ((COUNT) == 0 \ | |
f64cecad JC |
2442 | ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\ |
2443 | : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4)))) | |
e414ab29 | 2444 | |
469ac993 JM |
2445 | /* PC is dbx register 8; let's use that column for RA. */ |
2446 | #define DWARF_FRAME_RETURN_COLUMN 8 | |
2447 | ||
a6ab3aad JM |
2448 | /* Before the prologue, the top of the frame is at 4(%esp). */ |
2449 | #define INCOMING_FRAME_SP_OFFSET 4 | |
2450 | ||
c98f8742 JVA |
2451 | /* This is how to output the definition of a user-level label named NAME, |
2452 | such as the label on a static function or variable NAME. */ | |
2453 | ||
2454 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
2455 | (assemble_name (FILE, NAME), fputs (":\n", FILE)) | |
2456 | ||
2457 | /* This is how to output an assembler line defining a `double' constant. */ | |
2458 | ||
0038aea6 JVA |
2459 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ |
2460 | do { long l[2]; \ | |
2461 | REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \ | |
f64cecad | 2462 | fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \ |
0038aea6 | 2463 | } while (0) |
c98f8742 | 2464 | |
0038aea6 JVA |
2465 | /* This is how to output a `long double' extended real constant. */ |
2466 | ||
2467 | #undef ASM_OUTPUT_LONG_DOUBLE | |
2468 | #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \ | |
2469 | do { long l[3]; \ | |
2470 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \ | |
f64cecad | 2471 | fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \ |
0038aea6 | 2472 | } while (0) |
c98f8742 JVA |
2473 | |
2474 | /* This is how to output an assembler line defining a `float' constant. */ | |
2475 | ||
0038aea6 JVA |
2476 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ |
2477 | do { long l; \ | |
2478 | REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ | |
f64cecad | 2479 | fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \ |
c98f8742 JVA |
2480 | } while (0) |
2481 | ||
c98f8742 JVA |
2482 | /* Store in OUTPUT a string (made with alloca) containing |
2483 | an assembler-name for a local static variable named NAME. | |
2484 | LABELNO is an integer which is different for each call. */ | |
2485 | ||
2486 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
2487 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
2488 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
2489 | ||
2490 | ||
2491 | ||
2492 | /* This is how to output an assembler line defining an `int' constant. */ | |
2493 | ||
2494 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
2495 | ( fprintf (FILE, "%s ", ASM_LONG), \ | |
2496 | output_addr_const (FILE,(VALUE)), \ | |
2497 | putc('\n',FILE)) | |
2498 | ||
2499 | /* Likewise for `char' and `short' constants. */ | |
2500 | /* is this supposed to do align too?? */ | |
2501 | ||
2502 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
2503 | ( fprintf (FILE, "%s ", ASM_SHORT), \ | |
2504 | output_addr_const (FILE,(VALUE)), \ | |
2505 | putc('\n',FILE)) | |
2506 | ||
2507 | /* | |
2508 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
2509 | ( fprintf (FILE, "%s ", ASM_BYTE_OP), \ | |
2510 | output_addr_const (FILE,(VALUE)), \ | |
2511 | fputs (",", FILE), \ | |
2512 | output_addr_const (FILE,(VALUE)), \ | |
2513 | fputs (" >> 8\n",FILE)) | |
2514 | */ | |
2515 | ||
2516 | ||
2517 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
2518 | ( fprintf (FILE, "%s ", ASM_BYTE_OP), \ | |
2519 | output_addr_const (FILE, (VALUE)), \ | |
2520 | putc ('\n', FILE)) | |
2521 | ||
2522 | /* This is how to output an assembler line for a numeric constant byte. */ | |
2523 | ||
2524 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
2525 | fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE)) | |
2526 | ||
2527 | /* This is how to output an insn to push a register on the stack. | |
2528 | It need not be very fast code. */ | |
2529 | ||
2530 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
b078c5c6 | 2531 | fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO]) |
c98f8742 JVA |
2532 | |
2533 | /* This is how to output an insn to pop a register from the stack. | |
2534 | It need not be very fast code. */ | |
2535 | ||
2536 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
b078c5c6 | 2537 | fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO]) |
c98f8742 JVA |
2538 | |
2539 | /* This is how to output an element of a case-vector that is absolute. | |
2540 | */ | |
2541 | ||
2542 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
2543 | fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE) | |
2544 | ||
2545 | /* This is how to output an element of a case-vector that is relative. | |
2546 | We don't use these on the 386 yet, because the ATT assembler can't do | |
2547 | forward reference the differences. | |
2548 | */ | |
2549 | ||
33f7f353 | 2550 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
c98f8742 JVA |
2551 | fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL) |
2552 | ||
2553 | /* Define the parentheses used to group arithmetic operations | |
2554 | in assembler code. */ | |
2555 | ||
2556 | #define ASM_OPEN_PAREN "" | |
2557 | #define ASM_CLOSE_PAREN "" | |
2558 | ||
2559 | /* Define results of standard character escape sequences. */ | |
2560 | #define TARGET_BELL 007 | |
2561 | #define TARGET_BS 010 | |
2562 | #define TARGET_TAB 011 | |
2563 | #define TARGET_NEWLINE 012 | |
2564 | #define TARGET_VT 013 | |
2565 | #define TARGET_FF 014 | |
2566 | #define TARGET_CR 015 | |
74b42c8b | 2567 | \f |
c98f8742 JVA |
2568 | /* Print operand X (an rtx) in assembler syntax to file FILE. |
2569 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
2570 | The CODE z takes the size of operand from the following digit, and | |
2571 | outputs b,w,or l respectively. | |
2572 | ||
2573 | On the 80386, we use several such letters: | |
2574 | f -- float insn (print a CONST_DOUBLE as a float rather than in hex). | |
0038aea6 | 2575 | L,W,B,Q,S,T -- print the opcode suffix for specified size of operand. |
c98f8742 JVA |
2576 | R -- print the prefix for register names. |
2577 | z -- print the opcode suffix for the size of the current operand. | |
2578 | * -- print a star (in certain assembler syntax) | |
5cb6195d RH |
2579 | P -- if PIC, print an @PLT suffix. |
2580 | X -- don't print any sort of PIC '@' suffix for a symbol. | |
2581 | J -- print jump insn for arithmetic_comparison_operator. | |
2582 | s -- ??? something to do with double shifts. not actually used, afaik. | |
2583 | C -- print a conditional move suffix corresponding to the op code. | |
2584 | c -- likewise, but reverse the condition. | |
2585 | F,f -- likewise, but for floating-point. */ | |
c98f8742 JVA |
2586 | |
2587 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
2588 | ((CODE) == '*') | |
2589 | ||
74b42c8b RS |
2590 | /* Print the name of a register based on its machine mode and number. |
2591 | If CODE is 'w', pretend the mode is HImode. | |
2592 | If CODE is 'b', pretend the mode is QImode. | |
2593 | If CODE is 'k', pretend the mode is SImode. | |
2594 | If CODE is 'h', pretend the reg is the `high' byte register. | |
2595 | If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */ | |
2596 | ||
aa3e8d2a JVA |
2597 | extern char *hi_reg_name[]; |
2598 | extern char *qi_reg_name[]; | |
2599 | extern char *qi_high_reg_name[]; | |
2600 | ||
74b42c8b | 2601 | #define PRINT_REG(X, CODE, FILE) \ |
aa3e8d2a JVA |
2602 | do { if (REGNO (X) == ARG_POINTER_REGNUM) \ |
2603 | abort (); \ | |
74b42c8b RS |
2604 | fprintf (FILE, "%s", RP); \ |
2605 | switch ((CODE == 'w' ? 2 \ | |
2606 | : CODE == 'b' ? 1 \ | |
2607 | : CODE == 'k' ? 4 \ | |
2608 | : CODE == 'y' ? 3 \ | |
2609 | : CODE == 'h' ? 0 \ | |
2610 | : GET_MODE_SIZE (GET_MODE (X)))) \ | |
2611 | { \ | |
2612 | case 3: \ | |
2613 | if (STACK_TOP_P (X)) \ | |
aa3e8d2a JVA |
2614 | { \ |
2615 | fputs ("st(0)", FILE); \ | |
2616 | break; \ | |
2617 | } \ | |
2618 | case 4: \ | |
2619 | case 8: \ | |
0038aea6 | 2620 | case 12: \ |
9e06e321 | 2621 | if (! FP_REG_P (X)) fputs ("e", FILE); \ |
74b42c8b RS |
2622 | case 2: \ |
2623 | fputs (hi_reg_name[REGNO (X)], FILE); \ | |
2624 | break; \ | |
2625 | case 1: \ | |
2626 | fputs (qi_reg_name[REGNO (X)], FILE); \ | |
2627 | break; \ | |
2628 | case 0: \ | |
2629 | fputs (qi_high_reg_name[REGNO (X)], FILE); \ | |
2630 | break; \ | |
2631 | } \ | |
2632 | } while (0) | |
2633 | ||
c98f8742 JVA |
2634 | #define PRINT_OPERAND(FILE, X, CODE) \ |
2635 | print_operand (FILE, X, CODE) | |
c98f8742 JVA |
2636 | |
2637 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
2638 | print_operand_address (FILE, ADDR) | |
2639 | ||
aa3e8d2a JVA |
2640 | /* Print the name of a register for based on its machine mode and number. |
2641 | This macro is used to print debugging output. | |
2642 | This macro is different from PRINT_REG in that it may be used in | |
2643 | programs that are not linked with aux-output.o. */ | |
2644 | ||
2645 | #define DEBUG_PRINT_REG(X, CODE, FILE) \ | |
2646 | do { static char *hi_name[] = HI_REGISTER_NAMES; \ | |
2647 | static char *qi_name[] = QI_REGISTER_NAMES; \ | |
7488be4e | 2648 | fprintf (FILE, "%d %s", REGNO (X), RP); \ |
aa3e8d2a JVA |
2649 | if (REGNO (X) == ARG_POINTER_REGNUM) \ |
2650 | { fputs ("argp", FILE); break; } \ | |
2651 | if (STACK_TOP_P (X)) \ | |
2652 | { fputs ("st(0)", FILE); break; } \ | |
b0ceea8c RK |
2653 | if (FP_REG_P (X)) \ |
2654 | { fputs (hi_name[REGNO(X)], FILE); break; } \ | |
aa3e8d2a JVA |
2655 | switch (GET_MODE_SIZE (GET_MODE (X))) \ |
2656 | { \ | |
b0ceea8c RK |
2657 | default: \ |
2658 | fputs ("e", FILE); \ | |
aa3e8d2a JVA |
2659 | case 2: \ |
2660 | fputs (hi_name[REGNO (X)], FILE); \ | |
2661 | break; \ | |
2662 | case 1: \ | |
2663 | fputs (qi_name[REGNO (X)], FILE); \ | |
2664 | break; \ | |
2665 | } \ | |
2666 | } while (0) | |
2667 | ||
c98f8742 JVA |
2668 | /* Output the prefix for an immediate operand, or for an offset operand. */ |
2669 | #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE)) | |
2670 | #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE)) | |
2671 | ||
2672 | /* Routines in libgcc that return floats must return them in an fp reg, | |
2673 | just as other functions do which return such values. | |
2674 | These macros make that happen. */ | |
2675 | ||
2676 | #define FLOAT_VALUE_TYPE float | |
2677 | #define INTIFY(FLOATVAL) FLOATVAL | |
2678 | ||
2679 | /* Nonzero if INSN magically clobbers register REGNO. */ | |
2680 | ||
2681 | /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \ | |
2682 | (FP_REGNO_P (REGNO) \ | |
2683 | && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER)) | |
2684 | */ | |
2685 | ||
2686 | /* a letter which is not needed by the normal asm syntax, which | |
2687 | we can use for operand syntax in the extended asm */ | |
2688 | ||
2689 | #define ASM_OPERAND_LETTER '#' | |
c98f8742 | 2690 | #define RET return "" |
f64cecad | 2691 | #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx)) |
d4ba09c0 SC |
2692 | \f |
2693 | /* Helper macros to expand a binary/unary operator if needed */ | |
2694 | #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \ | |
2695 | do { \ | |
2696 | if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \ | |
2697 | FAIL; \ | |
2698 | } while (0) | |
2699 | ||
2700 | #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \ | |
2701 | do { \ | |
2702 | if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \ | |
2703 | FAIL; \ | |
2704 | } while (0) | |
2705 | ||
c98f8742 | 2706 | \f |
3b3c6a3f | 2707 | /* Functions in i386.c */ |
f5316dfe MM |
2708 | extern void override_options (); |
2709 | extern void order_regs_for_local_alloc (); | |
d4ba09c0 | 2710 | extern char *output_strlen_unroll (); |
5bc7cd8e SC |
2711 | extern struct rtx_def *i386_sext16_if_const (); |
2712 | extern int i386_aligned_p (); | |
2713 | extern int i386_cc_probably_useless_p (); | |
b08de47e MM |
2714 | extern int i386_valid_decl_attribute_p (); |
2715 | extern int i386_valid_type_attribute_p (); | |
2716 | extern int i386_return_pops_args (); | |
2717 | extern int i386_comp_type_attributes (); | |
2718 | extern void init_cumulative_args (); | |
2719 | extern void function_arg_advance (); | |
2720 | extern struct rtx_def *function_arg (); | |
2721 | extern int function_arg_partial_nregs (); | |
f7746310 | 2722 | extern char *output_strlen_unroll (); |
3b3c6a3f MM |
2723 | extern void output_op_from_reg (); |
2724 | extern void output_to_reg (); | |
2725 | extern char *singlemove_string (); | |
2726 | extern char *output_move_double (); | |
b840bfb0 MM |
2727 | extern char *output_move_memory (); |
2728 | extern char *output_move_pushmem (); | |
3b3c6a3f MM |
2729 | extern int standard_80387_constant_p (); |
2730 | extern char *output_move_const_single (); | |
2731 | extern int symbolic_operand (); | |
2732 | extern int call_insn_operand (); | |
2733 | extern int expander_call_insn_operand (); | |
2734 | extern int symbolic_reference_mentioned_p (); | |
d4ba09c0 SC |
2735 | extern int ix86_expand_binary_operator (); |
2736 | extern int ix86_binary_operator_ok (); | |
2737 | extern int ix86_expand_unary_operator (); | |
2738 | extern int ix86_unary_operator_ok (); | |
3b3c6a3f MM |
2739 | extern void emit_pic_move (); |
2740 | extern void function_prologue (); | |
2741 | extern int simple_386_epilogue (); | |
2742 | extern void function_epilogue (); | |
2743 | extern int legitimate_address_p (); | |
2744 | extern struct rtx_def *legitimize_pic_address (); | |
2745 | extern struct rtx_def *legitimize_address (); | |
2746 | extern void print_operand (); | |
2747 | extern void print_operand_address (); | |
2748 | extern void notice_update_cc (); | |
2749 | extern void split_di (); | |
2750 | extern int binary_387_op (); | |
2751 | extern int shift_op (); | |
2752 | extern int VOIDmode_compare_op (); | |
2753 | extern char *output_387_binary_op (); | |
2754 | extern char *output_fix_trunc (); | |
2755 | extern char *output_float_compare (); | |
2756 | extern char *output_fp_cc0_set (); | |
2757 | extern void save_386_machine_status (); | |
2758 | extern void restore_386_machine_status (); | |
2759 | extern void clear_386_stack_locals (); | |
2760 | extern struct rtx_def *assign_386_stack_local (); | |
d4ba09c0 SC |
2761 | extern int is_mul (); |
2762 | extern int is_div (); | |
2763 | extern int last_to_set_cc (); | |
2764 | extern int doesnt_set_condition_code (); | |
2765 | extern int sets_condition_code (); | |
2766 | extern int str_immediate_operand (); | |
2767 | extern int is_fp_insn (); | |
2768 | extern int is_fp_dest (); | |
2769 | extern int is_fp_store (); | |
2770 | extern int agi_dependent (); | |
2771 | extern int reg_mentioned_in_mem (); | |
2772 | ||
2773 | #ifdef NOTYET | |
2774 | extern struct rtx_def *copy_all_rtx (); | |
2775 | extern void rewrite_address (); | |
2776 | #endif | |
3b3c6a3f | 2777 | |
f5316dfe | 2778 | /* Variables in i386.c */ |
241e1a89 | 2779 | extern char *ix86_cpu_string; /* for -mcpu=<xxx> */ |
bcd86433 | 2780 | extern char *ix86_arch_string; /* for -march=<xxx> */ |
f5316dfe | 2781 | extern char *i386_reg_alloc_order; /* register allocation order */ |
b08de47e MM |
2782 | extern char *i386_regparm_string; /* # registers to use to pass args */ |
2783 | extern char *i386_align_loops_string; /* power of two alignment for loops */ | |
2784 | extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */ | |
2785 | extern char *i386_align_funcs_string; /* power of two alignment for functions */ | |
e2a606cb | 2786 | extern char *i386_branch_cost_string; /* values 1-5: see jump.c */ |
b08de47e MM |
2787 | extern int i386_regparm; /* i386_regparm_string as a number */ |
2788 | extern int i386_align_loops; /* power of two alignment for loops */ | |
2789 | extern int i386_align_jumps; /* power of two alignment for non-loop jumps */ | |
2790 | extern int i386_align_funcs; /* power of two alignment for functions */ | |
e2a606cb | 2791 | extern int i386_branch_cost; /* values 1-5: see jump.c */ |
f5316dfe MM |
2792 | extern char *hi_reg_name[]; /* names for 16 bit regs */ |
2793 | extern char *qi_reg_name[]; /* names for 8 bit regs (low) */ | |
2794 | extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */ | |
2795 | extern enum reg_class regclass_map[]; /* smalled class containing REGNO */ | |
2796 | extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */ | |
2797 | extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */ | |
2798 | ||
3b3c6a3f | 2799 | /* External variables used */ |
d4ba09c0 SC |
2800 | extern int optimize; /* optimization level */ |
2801 | extern int obey_regdecls; /* TRUE if stupid register allocation */ | |
3b3c6a3f MM |
2802 | |
2803 | /* External functions used */ | |
2804 | extern struct rtx_def *force_operand (); | |
d4ba09c0 | 2805 | |
3b3c6a3f | 2806 | \f |
c98f8742 JVA |
2807 | /* |
2808 | Local variables: | |
2809 | version-control: t | |
2810 | End: | |
2811 | */ |