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Added arg to RETURN_POPS_ARGS.
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1/* Definitions of target machine for GNU compiler.
2 Hitachi H8/300 version generating coff
ef0e53ce 3 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
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4 Contributed by Steve Chamberlain (sac@cygnus.com),
5 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
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6
7This file is part of GNU CC.
8
9GNU CC is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14GNU CC is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
20along with GNU CC; see the file COPYING. If not, write to
21the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22
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23/* Which cpu to compile for.
24 We use int for CPU_TYPE to avoid lots of casts. */
25#if 0 /* defined in insn-attr.h, here for documentation */
26enum attr_cpu { CPU_H8300, CPU_H8300H };
27#endif
28extern int cpu_type;
29
30/* Various globals defined in h8300.c. */
31
32extern char *h8_push_op,*h8_pop_op,*h8_mov_op;
33extern char **h8_reg_names;
34
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35/* Names to predefine in the preprocessor for this target machine. */
36
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37#define CPP_PREDEFINES \
38"-D__LONG_MAX__=2147483647L -D__LONG_LONG_MAX__=2147483647L -D_DOUBLE_IS_32BITS"
07aae5c2 39
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40#define CPP_SPEC \
41 "%{!mh:-D__H8300__} %{mh:-D__H8300H__} \
42 %{!mh:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
43 %{mh:-D__SIZE_TYPE__=unsigned\\ long -D__PTRDIFF_TYPE__=long} \
44 %{!mh:-Acpu(h8300) -Amachine(h8300)} %{mh:-Acpu(h8300h) -Amachine(h8300h)} \
45 %{!mint32:-D__INT_MAX__=32767} %{mint32:-D__INT_MAX__=2147483647}"
46
47#define LINK_SPEC "%{mh:-m h8300h}"
48
49#define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
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50
51/* Print subsidiary information on the compiler version in use. */
7bc8cb2b 52
07aae5c2 53#define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");
7bc8cb2b 54
07aae5c2 55/* Run-time compilation parameters selecting different hardware subsets. */
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56
57extern int target_flags;
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58
59/* Macros used in the machine description to test the flags. */
60
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61/* Make int's 32 bits. */
62#define TARGET_INT32 (target_flags & 8)
63
64/* Dump recorded insn lengths into the output file. This helps debug the
65 md file. */
66#define TARGET_ADDRESSES (target_flags & 64)
67
68/* Pass the first few arguments in registers. */
69#define TARGET_QUICKCALL (target_flags & 128)
70
71/* Pretend byte accesses are slow. */
72#define TARGET_SLOWBYTE (target_flags & 256)
73
74/* Dump each assembler insn's rtl into the output file.
75 This is for debugging the compiler only. */
76#define TARGET_RTL_DUMP (target_flags & 2048)
77
78/* Select between the h8/300 and h8/300h cpus. */
79#define TARGET_H8300 (! TARGET_H8300H)
80#define TARGET_H8300H (target_flags & 4096)
81
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82/* Macro to define tables used to set the flags.
83 This is a list in braces of pairs in braces,
84 each pair being { "NAME", VALUE }
85 where VALUE is the bits to set or minus the bits to clear.
86 An empty string NAME is used to identify the default VALUE. */
87
88#define TARGET_SWITCHES \
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89 { {"int32",8}, \
90 {"addresses",64 }, \
91 {"quickcall",128}, \
92 {"no-quickcall",-128}, \
93 {"slowbyte",256}, \
94 {"relax",1024}, \
95 {"rtl-dump",2048}, \
96 {"h",4096}, \
97 {"no-h",-4096}, \
98 {"exp",8192}, \
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99 { "", TARGET_DEFAULT}}
100
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101#define OVERRIDE_OPTIONS \
102{ \
103 h8300_init_once (); \
104}
105
106/* Default target_flags if no switches specified. */
107
108#ifndef TARGET_DEFAULT
109#define TARGET_DEFAULT (128) /* quickcall */
110#endif
111
faa2075e 112/* Show we can debug even without a frame pointer. */
7bc8cb2b 113/* #define CAN_DEBUG_WITHOUT_FP */
07aae5c2 114
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115/* Define this if addresses of constant functions
116 shouldn't be put through pseudo regs where they can be cse'd.
117 Desirable on machines where ordinary constants are expensive
118 but a CALL with constant address is cheap. */
119#define NO_FUNCTION_CSE
07aae5c2 120\f
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121/* Target machine storage layout */
122
123/* Define to use software floating point emulator for REAL_ARITHMETIC and
124 decimal <-> binary conversion. */
125#define REAL_ARITHMETIC
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126
127/* Define this if most significant bit is lowest numbered
128 in instructions that operate on numbered bit-fields.
129 This is not true on the H8/300. */
130#define BITS_BIG_ENDIAN 0
131
132/* Define this if most significant byte of a word is the lowest numbered. */
133/* That is true on the H8/300. */
134#define BYTES_BIG_ENDIAN 1
135
136/* Define this if most significant word of a multiword number is lowest
137 numbered.
07aae5c2 138 This is true on an H8/300 (actually we can make it up, but we choose to
7bc8cb2b 139 be consistent. */
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140#define WORDS_BIG_ENDIAN 1
141
142/* Number of bits in an addressable storage unit */
143#define BITS_PER_UNIT 8
144
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145/* Width in bits of a "word", which is the contents of a machine register.
146 Note that this is not necessarily the width of data type `int';
147 if using 16-bit ints on a 68000, this would still be 32.
148 But on a machine with 16-bit registers, this would be 16. */
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149#define BITS_PER_WORD (TARGET_H8300H ? 32 : 16)
150#define MAX_BITS_PER_WORD 32
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151
152/* Width of a word, in units (bytes). */
7bc8cb2b 153#define UNITS_PER_WORD (TARGET_H8300H ? 4 : 2)
ef0e53ce 154#define MIN_UNITS_PER_WORD 2
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155
156/* Width in bits of a pointer.
157 See also the macro `Pmode' defined below. */
7bc8cb2b 158#define POINTER_SIZE (TARGET_H8300H ? 32 : 16)
07aae5c2 159
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160#define SHORT_TYPE_SIZE 16
161#define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
162#define LONG_TYPE_SIZE 32
163#define LONG_LONG_TYPE_SIZE 32
164#define FLOAT_TYPE_SIZE 32
165#define DOUBLE_TYPE_SIZE 32
166#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
07aae5c2 167
7bc8cb2b 168#define MAX_FIXED_MODE_SIZE 32
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169
170/* Allocation boundary (in *bits*) for storing arguments in argument list. */
7bc8cb2b 171#define PARM_BOUNDARY (TARGET_H8300H ? 32 : 16)
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172
173/* Allocation boundary (in *bits*) for the code of a function. */
174#define FUNCTION_BOUNDARY 16
175
176/* Alignment of field after `int : 0' in a structure. */
7bc8cb2b 177#define EMPTY_FIELD_BOUNDARY 16
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178
179/* A bitfield declared as `int' forces `int' alignment for the struct. */
180#define PCC_BITFIELD_TYPE_MATTERS 0
181
182/* No data type wants to be aligned rounder than this. */
7bc8cb2b 183#define BIGGEST_ALIGNMENT (TARGET_H8300H ? 32 : 16)
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184
185/* No structure field wants to be aligned rounder than this. */
7bc8cb2b 186#define BIGGEST_FIELD_ALIGNMENT (TARGET_H8300H ? 32 : 16)
07aae5c2 187
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188/* The stack goes in 16/32 bit lumps. */
189#define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)
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190
191/* Define this if move instructions will actually fail to work
192 when given unaligned data. */
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193/* On the H8/300, longs can be aligned on halfword boundaries, but not
194 byte boundaries. */
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195#define STRICT_ALIGNMENT 1
196\f
197/* Standard register usage. */
198
199/* Number of actual hardware registers.
200 The hardware registers are assigned numbers for the compiler
201 from 0 to just below FIRST_PSEUDO_REGISTER.
202
203 All registers that the compiler knows about must be given numbers,
204 even those that are not normally considered general registers.
205
206 Reg 8 does not correspond to any hardware register, but instead
207 appears in the RTL as an argument pointer prior to reload, and is
208 eliminated during reloading in favor of either the stack or frame
209 pointer. */
7bc8cb2b 210
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211#define FIRST_PSEUDO_REGISTER 9
212
213/* 1 for registers that have pervasive standard uses
7bc8cb2b 214 and are not available for the register allocator. */
07aae5c2 215
07aae5c2 216#define FIXED_REGISTERS \
7bc8cb2b 217 { 0, 0, 0, 0, 0, 0, 0, 1, 1}
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218
219/* 1 for registers not available across function calls.
220 These must include the FIXED_REGISTERS and also any
221 registers that can be used without being saved.
222 The latter must include the registers where values are returned
223 and the register where structure-value addresses are passed.
224 Aside from that, you can include as many other registers as you
225 like.
226
7bc8cb2b 227 h8 destroys r0,r1,r2,r3. */
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228
229#define CALL_USED_REGISTERS \
7bc8cb2b 230 { 1, 1, 1, 1, 0, 0, 0, 1, 1 }
07aae5c2 231
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232#define REG_ALLOC_ORDER \
233 { 2, 3, 0, 1, 4, 5, 6, 7, 8}
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234
235/* Return number of consecutive hard regs needed starting at reg REGNO
236 to hold something of mode MODE.
237
238 This is ordinarily the length in words of a value of mode MODE
239 but can be less for certain modes in special long registers. */
7bc8cb2b 240
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241#define HARD_REGNO_NREGS(REGNO, MODE) \
242 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
243
244/* Value is 1 if hard register REGNO can hold a value of machine-mode
245 MODE.
246
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247 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI
248 or HI.
249 H8/300H: Anything goes. */
250
07aae5c2 251#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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252 (TARGET_H8300 ? (((REGNO)&1)==0) || (MODE==HImode) || (MODE==QImode) \
253 : 1)
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254
255/* Value is 1 if it is a good idea to tie two pseudo registers
256 when one has mode MODE1 and one has mode MODE2.
257 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
258 for any hard reg, then this must be 0 for correct output. */
259#define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
260
261/* Specify the registers used for certain standard purposes.
262 The values of these macros are register numbers. */
263
264/* H8/300 pc is not overloaded on a register. */
7bc8cb2b 265
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266/*#define PC_REGNUM 15*/
267
268/* Register to use for pushing function arguments. */
269#define STACK_POINTER_REGNUM 7
270
271/* Base register for access to local variables of the function. */
272#define FRAME_POINTER_REGNUM 6
273
274/* Value should be nonzero if functions must have frame pointers.
275 Zero means the frame pointer need not be set up (and parms
276 may be accessed via the stack pointer) in functions that seem suitable.
277 This is computed in `reload', in reload1.c. */
278#define FRAME_POINTER_REQUIRED 0
279
280/* Base register for access to arguments of the function. */
281#define ARG_POINTER_REGNUM 8
282
283/* Register in which static-chain is passed to a function. */
7bc8cb2b 284#define STATIC_CHAIN_REGNUM 4
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285\f
286/* Define the classes of registers for register constraints in the
287 machine description. Also define ranges of constants.
288
289 One of the classes must always be named ALL_REGS and include all hard regs.
290 If there is more than one class, another class must be named NO_REGS
291 and contain no registers.
292
293 The name GENERAL_REGS must be the name of a class (or an alias for
294 another name such as ALL_REGS). This is the class of registers
295 that is allowed by "g" or "r" in a register constraint.
296 Also, registers outside this class are allocated only when
297 instructions express preferences for them.
298
299 The classes must be numbered in nondecreasing order; that is,
300 a larger-numbered class must never be contained completely
301 in a smaller-numbered class.
302
303 For any two classes, it is very desirable that there be another
304 class that represents their union. */
305
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306/* The h8 has only one kind of register, but we mustn't do byte by
307 byte operations on the sp, so we keep it as a different class */
07aae5c2 308
7bc8cb2b 309enum reg_class { NO_REGS, LONG_REGS, GENERAL_REGS, SP_REG, SP_AND_G_REG, ALL_REGS, LIM_REG_CLASSES };
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310
311#define N_REG_CLASSES (int) LIM_REG_CLASSES
312
7bc8cb2b 313/* Give names of register classes as strings for dump file. */
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314
315#define REG_CLASS_NAMES \
7bc8cb2b 316 {"NO_REGS", "LONG_REGS", "GENERAL_REGS", "SP_REG", "SP_AND_G_REG", "ALL_REGS", "LIM_REGS" }
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317
318/* Define which registers fit in which classes.
319 This is an initializer for a vector of HARD_REG_SET
320 of length N_REG_CLASSES. */
321
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322#define REG_CLASS_CONTENTS \
323{ 0, /* No regs */ \
324 0x07f, /* LONG_REGS */ \
325 0x07f, /* GENERAL_REGS */ \
326 0x080, /* SP_REG */ \
327 0x0ff, /* SP_AND_G_REG */ \
328 0x1ff, /* ALL_REGS */ \
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329}
330
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331/* The same information, inverted:
332 Return the class number of the smallest class containing
333 reg number REGNO. This could be a conditional expression
334 or could index an array. */
07aae5c2 335
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336#define REGNO_REG_CLASS(REGNO) \
337 ((REGNO) < 7 ? LONG_REGS : \
338 (REGNO) == 7 ? SP_REG : \
339 GENERAL_REGS)
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340
341/* The class value for index registers, and the one for base regs. */
342
343#define INDEX_REG_CLASS NO_REGS
344#define BASE_REG_CLASS GENERAL_REGS
345
346/* Get reg_class from a letter such as appears in the machine description. */
347
348#define REG_CLASS_FROM_LETTER(C) \
7bc8cb2b 349 ((C) == 'a' ? (SP_REG) : (C) == 'l' ? (LONG_REGS) : (NO_REGS))
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350
351/* The letters I, J, K, L, M, N, O, P in a register constraint string
352 can be used to stand for particular ranges of immediate operands.
353 This macro defines what the ranges are.
354 C is the letter, and VALUE is a constant value.
355 Return 1 if VALUE is in the range specified by C. */
356
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357#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
358#define CONST_OK_FOR_J(VALUE) ((unsigned) (VALUE) < 256)
359#define CONST_OK_FOR_K(VALUE) (((VALUE) == 1) || (VALUE) == 2)
360#define CONST_OK_FOR_L(VALUE) (((VALUE) == -1) || (VALUE) == -2)
361#define CONST_OK_FOR_M(VALUE) (((VALUE) == 3) || (VALUE) == 4)
362#define CONST_OK_FOR_N(VALUE) (((VALUE) == -3) || (VALUE) == -4)
363#define CONST_OK_FOR_O(VALUE) (ok_for_bclr (VALUE))
364#define CONST_OK_FOR_P(VALUE) (small_power_of_two (VALUE))
365
366#define CONST_OK_FOR_LETTER_P(VALUE, C) \
367 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
368 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
369 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
370 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
371 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
372 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
373 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
374 (C) == 'P' ? CONST_OK_FOR_P(VALUE) : \
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375 0)
376
377/* Similar, but for floating constants, and defining letters G and H.
378 Here VALUE is the CONST_DOUBLE rtx itself.
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379
380 `G' is a floating-point zero. */
07aae5c2 381
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382#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
383 ((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \
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384 : 0)
385
386/* Given an rtx X being reloaded into a reg required to be
387 in class CLASS, return the class of reg to actually use.
388 In general this is just CLASS; but on some machines
389 in some cases it is preferable to use a more restrictive class. */
7bc8cb2b 390
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391#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
392
393/* Return the maximum number of consecutive registers
394 needed to represent mode MODE in a register of class CLASS. */
395
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396/* On the H8, this is the size of MODE in words. */
397
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398#define CLASS_MAX_NREGS(CLASS, MODE) \
399 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
400
401/* Any SI register to register move may need to be reloaded,
402 so define REGISTER_MOVE_COST to be > 2 so that reload never
403 shortcuts. */
7bc8cb2b 404
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405#define REGISTER_MOVE_COST(CLASS1, CLASS2) 3
406\f
407/* Stack layout; function entry, exit and calling. */
408
409/* Define this if pushing a word on the stack
410 makes the stack pointer a smaller address. */
7bc8cb2b 411
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412#define STACK_GROWS_DOWNWARD
413
414/* Define this if the nominal address of the stack frame
415 is at the high-address end of the local variables;
416 that is, each additional local variable allocated
417 goes at a more negative offset in the frame. */
7bc8cb2b 418
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419#define FRAME_GROWS_DOWNWARD
420
421/* Offset within stack frame to start allocating local variables at.
422 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
423 first local allocated. Otherwise, it is the offset to the BEGINNING
424 of the first local allocated. */
7bc8cb2b 425
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426#define STARTING_FRAME_OFFSET 0
427
428/* If we generate an insn to push BYTES bytes,
429 this says how many the stack pointer really advances by.
430
431 On the H8/300, @-sp really pushes a byte if you ask it to - but that's
432 dangerous, so we claim that it always pushes a word, then we catch
7bc8cb2b 433 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output.
07aae5c2 434
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435 On the H8/300h, we simplify TARGET_QUICKCALL by setting this to 4 and doing
436 a similar thing. */
07aae5c2 437
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438#define PUSH_ROUNDING(BYTES) \
439 (((BYTES) + PARM_BOUNDARY/8 - 1) & -PARM_BOUNDARY/8)
440
441/* Offset of first parameter from the argument pointer register value. */
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442/* Is equal to the size of the saved fp + pc, even if an fp isn't
443 saved since the value is used before we know. */
7bc8cb2b 444
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445#define FIRST_PARM_OFFSET(FNDECL) 0
446
447/* Value is the number of bytes of arguments automatically
448 popped when returning from a subroutine call.
8b109b37 449 FUNDECL is the declaration node of the function (as a tree),
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450 FUNTYPE is the data type of the function (as a tree),
451 or for a library call it is an identifier node for the subroutine name.
452 SIZE is the number of bytes of arguments passed on the stack.
453
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454 On the H8 the return does not pop anything. */
455
8b109b37 456#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
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457
458/* Definitions for register eliminations.
459
460 This is an array of structures. Each structure initializes one pair
461 of eliminable registers. The "from" register number is given first,
462 followed by "to". Eliminations of the same "from" register are listed
463 in order of preference.
464
7bc8cb2b 465 We have two registers that can be eliminated on the h8300. First, the
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466 frame pointer register can often be eliminated in favor of the stack
467 pointer register. Secondly, the argument pointer register can always be
468 eliminated; it is replaced with either the stack or frame pointer. */
7bc8cb2b 469
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470#define ELIMINABLE_REGS \
471{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
472 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
473 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
474
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475/* Given FROM and TO register numbers, say whether this elimination is allowed.
476 Frame pointer elimination is automatically handled.
477
478 For the h8300, if frame pointer elimination is being done, we would like to
479 convert ap into sp, not fp.
480
481 All other eliminations are valid. */
482
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483#define CAN_ELIMINATE(FROM, TO) \
484 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
485 ? ! frame_pointer_needed \
486 : 1)
487
488/* Define the offset between two registers, one to be eliminated, and the other
489 its replacement, at the start of a routine. */
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490
491#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
492 OFFSET = initial_offset (FROM, TO)
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493
494/* Define how to find the value returned by a function.
495 VALTYPE is the data type of the value (as a tree).
496 If the precise function being called is known, FUNC is its FUNCTION_DECL;
497 otherwise, FUNC is 0.
498
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499 On the H8 the return value is in R0/R1. */
500
07aae5c2 501#define FUNCTION_VALUE(VALTYPE, FUNC) \
7bc8cb2b 502 gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
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503
504/* Define how to find the value returned by a library function
505 assuming the value has mode MODE. */
506
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507/* On the h8 the return value is in R0/R1 */
508
07aae5c2 509#define LIBCALL_VALUE(MODE) \
7bc8cb2b 510 gen_rtx (REG, MODE, 0)
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511
512/* 1 if N is a possible register number for a function value.
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513 On the H8, R0 is the only register thus used. */
514
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515#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
516
517/* Define this if PCC uses the nonreentrant convention for returning
518 structure and union values. */
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519
520/*#define PCC_STATIC_STRUCT_RETURN*/
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521
522/* 1 if N is a possible register number for function argument passing.
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523 On the H8, no registers are used in this way. */
524/* ??? What about TARGET_QUICKCALL? */
525
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526#define FUNCTION_ARG_REGNO_P(N) 0
527
528/* Register in which address to store a structure value
529 is passed to a function. */
7bc8cb2b 530
07aae5c2 531#define STRUCT_VALUE 0
07aae5c2
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532
533/* Return true if X should be returned in memory. */
7bc8cb2b
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534/* ??? This will return small structs in regs. */
535#define RETURN_IN_MEMORY(X) (GET_MODE_SIZE (TYPE_MODE (X)) > 4)
40f32220 536
07aae5c2
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537/* When defined, the compiler allows registers explicitly used in the
538 rtl to be used as spill registers but prevents the compiler from
7bc8cb2b
DE
539 extending the lifetime of these registers. */
540
07aae5c2
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541#define SMALL_REGISTER_CLASSES
542\f
543/* Define a data type for recording info about an argument list
544 during the scan of that argument list. This data type should
7bc8cb2b 545 hold all necessary information about the function itself
07aae5c2
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546 and about the args processed so far, enough to enable macros
547 such as FUNCTION_ARG to determine where the next arg should go.
548
549 On the H8/300, this is a two item struct, the first is the number of bytes
7bc8cb2b
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550 scanned so far and the second is the rtx of the called library
551 function if any. */
07aae5c2
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552
553#define CUMULATIVE_ARGS struct cum_arg
7bc8cb2b 554struct cum_arg { int nbytes; struct rtx_def * libcall; };
07aae5c2
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555
556/* Initialize a variable CUM of type CUMULATIVE_ARGS
557 for a call to a function whose data type is FNTYPE.
558 For a library call, FNTYPE is 0.
559
560 On the H8/300, the offset starts at 0. */
7bc8cb2b 561
07aae5c2 562#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
7bc8cb2b 563 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
07aae5c2
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564
565/* Update the data in CUM to advance over an argument
566 of mode MODE and data type TYPE.
7bc8cb2b 567 (TYPE is null for libcalls where that information may not be available.) */
07aae5c2 568
7bc8cb2b
DE
569#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
570 ((CUM).nbytes += ((MODE) != BLKmode \
571 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
572 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
07aae5c2
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573
574/* Define where to put the arguments to a function.
575 Value is zero to push the argument on the stack,
576 or a hard register in which to store the argument.
577
578 MODE is the argument's machine mode.
579 TYPE is the data type of the argument (as a tree).
580 This is null for libcalls where that information may
581 not be available.
582 CUM is a variable of type CUMULATIVE_ARGS which gives info about
583 the preceding args and about the function being called.
584 NAMED is nonzero if this argument is a named parameter
585 (otherwise it is an extra parameter matching an ellipsis). */
586
7bc8cb2b
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587/* On the H8/300 all normal args are pushed, unless -mquickcall in which
588 case the first 3 arguments are passed in registers.
589 See function `function_arg'. */
07aae5c2 590
7bc8cb2b 591struct rtx_def *function_arg();
07aae5c2
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592#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
593 function_arg (&CUM, MODE, TYPE, NAMED)
594
7bc8cb2b
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595/* Perform any needed actions needed for a function that is receiving a
596 variable number of arguments. */
597
598extern int current_function_anonymous_args;
599#define SETUP_INCOMING_VARARGS(ASF, MODE, TYPE, PAS, ST) \
600 current_function_anonymous_args = 1;
601
602/* Generate assembly output for the start of a function. */
07aae5c2
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603
604#define FUNCTION_PROLOGUE(FILE, SIZE) \
7bc8cb2b 605 function_prologue (FILE, SIZE)
07aae5c2
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606
607/* Output assembler code to FILE to increment profiler label # LABELNO
608 for profiling a function entry. */
609
7bc8cb2b
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610#define FUNCTION_PROFILER(FILE, LABELNO) \
611 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
612 h8_mov_op, (LABELNO), h8_reg_names[0]);
07aae5c2
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613
614/* Output assembler code to FILE to initialize this source file's
615 basic block profiling info, if that has not already been done. */
7bc8cb2b 616/* ??? @LPBX0 is moved into r0 twice. */
07aae5c2
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617
618#define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
7bc8cb2b
DE
619 fprintf (FILE, "\t%s\t%s\n\t%s\t@LPBX0,%s\n\tbne LPI%d\n\t%s\t@LPBX0,%s\n\t%s\t%s\n\tjsr\t@__bb_init_func\nLPI%d:\t%s\t%s\n", \
620 h8_push_op, h8_reg_names[0], \
621 h8_mov_op, h8_reg_names[0], \
622 (LABELNO), \
623 h8_mov_op, h8_reg_names[0], \
624 h8_push_op, h8_reg_names[0], \
625 (LABELNO), \
626 h8_pop_op, h8_reg_names[0]);
07aae5c2
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627
628/* Output assembler code to FILE to increment the entry-count for
7bc8cb2b
DE
629 the BLOCKNO'th basic block in this source file. This is a real pain in the
630 sphincter on a VAX, since we do not want to change any of the bits in the
631 processor status word. The way it is done here, it is pushed onto the stack
632 before any flags have changed, and then the stack is fixed up to account for
633 the fact that the instruction to restore the flags only reads a word.
634 It may seem a bit clumsy, but at least it works. */
635/* ??? This one needs work. */
636
637#define BLOCK_PROFILER(FILE, BLOCKNO) \
638 fprintf (FILE, "\tmovpsl -(sp)\n\tmovw (sp),2(sp)\n\taddl2 $2,sp\n\taddl2 $1,LPBX2+%d\n\tbicpsw $255\n\tbispsw (sp)+\n", \
639 4 * BLOCKNO)
07aae5c2
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640
641/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
642 the stack pointer does not matter. The value is tested only in
643 functions that have frame pointers.
644 No definition is equivalent to always zero. */
645
646#define EXIT_IGNORE_STACK 0
647
648/* This macro generates the assembly code for function exit,
649 on machines that need it. If FUNCTION_EPILOGUE is not defined
650 then individual return instructions are generated for each
651 return statement. Args are same as for FUNCTION_PROLOGUE. */
652
7bc8cb2b
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653#define FUNCTION_EPILOGUE(FILE, SIZE) \
654 function_epilogue (FILE, SIZE)
07aae5c2
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655
656/* Output assembler code for a block containing the constant parts
7bc8cb2b
DE
657 of a trampoline, leaving space for the variable parts.
658
659 H8/300
660 vvvv context
661 1 0000 79001234 mov.w #0x1234,r4
662 2 0004 5A000000 jmp @0x1234
663 ^^^^ function
664
665 H8/300H
666 vvvvvvvv context
667 2 0000 7A0012345678 mov.l #0x12345678,er4
668 3 0006 5A000000 jmp @0x12345678
669 ^^^^^^ function
670*/
671
672#define TRAMPOLINE_TEMPLATE(FILE) \
673 do { \
674 if (TARGET_H8300) \
675 { \
676 fprintf (FILE, "\tmov.w #0x1234,r4\n"); \
677 fprintf (FILE, "\tjmp @0x1234\n"); \
678 } \
679 else \
680 { \
681 fprintf (FILE, "\tmov.l #0x12345678,er4\n"); \
682 fprintf (FILE, "\tjmp @0x123456\n"); \
683 } \
684 } while (0)
07aae5c2
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685
686/* Length in units of the trampoline for entering a nested function. */
687
7bc8cb2b 688#define TRAMPOLINE_SIZE (TARGET_H8300 ? 8 : 12)
07aae5c2
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689
690/* Emit RTL insns to initialize the variable parts of a trampoline.
691 FNADDR is an RTX for the address of the function's pure code.
692 CXT is an RTX for the static chain value for the function. */
693
7bc8cb2b
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694#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
695{ \
696 enum machine_mode mode = TARGET_H8300H ? SImode : HImode; \
697 emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 2)), CXT); \
698 emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 6)), FNADDR); \
699 if (TARGET_H8300H) \
700 emit_move_insn (gen_rtx (MEM, QImode, plus_constant ((TRAMP), 6)), GEN_INT (0x5A)); \
07aae5c2
SC
701}
702\f
7bc8cb2b 703/* Addressing modes, and classification of registers for them. */
07aae5c2 704
7bc8cb2b 705#define HAVE_POST_INCREMENT
07aae5c2
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706/*#define HAVE_POST_DECREMENT */
707
7bc8cb2b 708#define HAVE_PRE_DECREMENT
07aae5c2
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709/*#define HAVE_PRE_INCREMENT */
710
711/* Macros to check register numbers against specific register classes. */
712
713/* These assume that REGNO is a hard or pseudo reg number.
714 They give nonzero only if REGNO is a hard reg of the suitable class
715 or a pseudo reg currently allocated to a suitable hard reg.
716 Since they use reg_renumber, they are safe only once reg_renumber
717 has been allocated, which happens in local-alloc.c. */
718
7bc8cb2b 719#define REGNO_OK_FOR_INDEX_P(regno) 0
07aae5c2
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720
721#define REGNO_OK_FOR_BASE_P(regno) \
722 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
723\f
724/* Maximum number of registers that can appear in a valid memory address. */
725
726#define MAX_REGS_PER_ADDRESS 1
727
728/* 1 if X is an rtx for a constant that is a valid address. */
729
9d4dd4e9 730#define CONSTANT_ADDRESS_P(X) \
7bc8cb2b
DE
731 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
732 || (GET_CODE (X) == CONST_INT \
733 /* We handle signed and unsigned offsets here. */ \
734 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \
735 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \
736 || GET_CODE (X) == CONST \
9d4dd4e9 737 || GET_CODE (X) == HIGH)
07aae5c2
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738
739/* Nonzero if the constant value X is a legitimate general operand.
740 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
741
742#define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE)
743
744/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
745 and check its validity for a certain class.
746 We have two alternate definitions for each of them.
747 The usual definition accepts all pseudo regs; the other rejects
748 them unless they have been allocated suitable hard regs.
749 The symbol REG_OK_STRICT causes the latter definition to be used.
750
751 Most source files want to accept pseudo regs in the hope that
752 they will get allocated to the class that the insn wants them to be in.
753 Source files for reload pass need to be strict.
754 After reload, it makes no difference, since pseudo regs have
755 been eliminated by then. */
756
757#ifndef REG_OK_STRICT
758
759/* Nonzero if X is a hard reg that can be used as an index
760 or if it is a pseudo reg. */
761#define REG_OK_FOR_INDEX_P(X) 0
762/* Nonzero if X is a hard reg that can be used as a base reg
763 or if it is a pseudo reg. */
764#define REG_OK_FOR_BASE_P(X) 1
07aae5c2 765#define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
7bc8cb2b
DE
766#define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
767#define STRICT 0
07aae5c2
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768
769#else
770
771/* Nonzero if X is a hard reg that can be used as an index. */
772#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
773/* Nonzero if X is a hard reg that can be used as a base reg. */
774#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
7bc8cb2b 775#define STRICT 1
07aae5c2
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776
777#endif
7bc8cb2b
DE
778
779/* Extra constraints - 'U' if for an operand valid for a bset
780 destination; i.e. a register or register indirect target. */
781#define OK_FOR_U(OP) \
782 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
783 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
784 && REG_OK_FOR_BASE_P (XEXP (OP, 0))))
785
786#define EXTRA_CONSTRAINT(OP, C) \
787 ((C) == 'U' ? OK_FOR_U (OP) : 0)
07aae5c2
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788\f
789/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
790 that is a valid memory address for an instruction.
791 The MODE argument is the machine mode for the MEM expression
792 that wants to use this address.
793
794 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
795 except for CONSTANT_ADDRESS_P which is actually
796 machine-independent.
797
07aae5c2
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798 On the H8/300, a legitimate address has the form
799 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */
800
801/* Accept either REG or SUBREG where a register is valid. */
802
7bc8cb2b
DE
803#define RTX_OK_FOR_BASE_P(X) \
804 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
805 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
07aae5c2
SC
806 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
807
7bc8cb2b
DE
808#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
809 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
810 if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
811 if (GET_CODE (X) == PLUS \
812 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
07aae5c2
SC
813 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
814\f
815/* Try machine-dependent ways of modifying an illegitimate address
816 to be legitimate. If we find one, return the new, valid address.
817 This macro is used in only one place: `memory_address' in explow.c.
818
819 OLDX is the address as it was before break_out_memory_refs was called.
820 In some cases it is useful to look at this to decide what needs to be done.
821
822 MODE and WIN are passed so that this macro can use
823 GO_IF_LEGITIMATE_ADDRESS.
824
825 It is always safe for this macro to do nothing. It exists to recognize
7bc8cb2b 826 opportunities to optimize the output.
07aae5c2
SC
827
828 For the H8/300, don't do anything. */
829
830#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
831
832/* Go to LABEL if ADDR (a legitimate address expression)
833 has an effect that depends on the machine mode it is used for.
834
835 On the H8/300, the predecrement and postincrement address depend thus
836 (the amount of decrement or increment being the length of the operand)
837 and all indexed address depend thus (because the index scale factor
838 is the length of the operand). */
839
7bc8cb2b
DE
840#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
841 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
07aae5c2
SC
842\f
843/* Specify the machine mode that this machine uses
844 for the index in the tablejump instruction. */
7bc8cb2b 845#define CASE_VECTOR_MODE Pmode
07aae5c2
SC
846
847/* Define this if the case instruction expects the table
848 to contain offsets from the address of the table.
849 Do not define this if the table should contain absolute addresses. */
850/*#define CASE_VECTOR_PC_RELATIVE*/
851
852/* Define this if the case instruction drops through after the table
853 when the index is out of range. Don't define it if the case insn
854 jumps to the default label instead. */
855#define CASE_DROPS_THROUGH
856
857/* Specify the tree operation to be used to convert reals to integers. */
858#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
859
860/* This is the kind of divide that is easiest to do in the general case. */
861#define EASY_DIV_EXPR TRUNC_DIV_EXPR
862
863/* Define this as 1 if `char' should by default be signed; else as 0.
864
865 On the H8/300, sign extension is expensive, so we'll say that chars
866 are unsigned. */
867#define DEFAULT_SIGNED_CHAR 0
868
869/* This flag, if defined, says the same insns that convert to a signed fixnum
870 also convert validly to an unsigned one. */
871#define FIXUNS_TRUNC_LIKE_FIX_TRUNC
872
873/* Max number of bytes we can move from memory to memory
874 in one reasonably fast instruction. */
7bc8cb2b
DE
875#define MOVE_MAX (TARGET_H8300H ? 4 : 2)
876#define MAX_MOVE_MAX 4
07aae5c2
SC
877
878/* Define this if zero-extension is slow (more than one real instruction). */
879/* #define SLOW_ZERO_EXTEND */
880
881/* Nonzero if access to memory by bytes is slow and undesirable. */
882#define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
883
884/* Define if shifts truncate the shift count
885 which implies one can omit a sign-extension or zero-extension
886 of a shift count. */
887/* #define SHIFT_COUNT_TRUNCATED */
888
889/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
890 is done just by pretending it is already truncated. */
891#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
892
893/* Specify the machine mode that pointers have.
894 After generation of rtl, the compiler makes no further distinction
895 between pointers and any other objects of this machine mode. */
7bc8cb2b
DE
896#define Pmode (TARGET_H8300H ? SImode : HImode)
897
898/* ANSI C types.
899 We use longs for the 300h because ints can be 16 or 32.
900 GCC requires SIZE_TYPE to be the same size as pointers. */
901#define NO_BUILTIN_SIZE_TYPE
902#define NO_BUILTIN_PTRDIFF_TYPE
903#define SIZE_TYPE (TARGET_H8300 ? "unsigned int" : "long unsigned int")
904#define PTRDIFF_TYPE (TARGET_H8300 ? "int" : "long int")
07aae5c2 905
7bc8cb2b
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906#define WCHAR_TYPE "short unsigned int"
907#define WCHAR_TYPE_SIZE 16
908#define MAX_WCHAR_TYPE_SIZE 16
07aae5c2
SC
909
910/* A function address in a call instruction
911 is a byte address (for indexing purposes)
912 so give the MEM rtx a byte's mode. */
913#define FUNCTION_MODE QImode
914
915/* Compute the cost of computing a constant rtl expression RTX
916 whose rtx-code is CODE. The body of this macro is a portion
917 of a switch statement. If the code is computed here,
918 return it with a return statement. Otherwise, break from the switch. */
919
7bc8cb2b
DE
920#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
921 default: { int _zxy= const_costs(RTX, CODE); \
922 if(_zxy) return _zxy; break;}
923
924#define BRANCH_COST 0
925
926/* We say that MOD and DIV are so cheap because otherwise we'll
927 generate some really horrible code for division of a power of two. */
07aae5c2
SC
928
929/* Provide the costs of a rtl expression. This is in the body of a
930 switch on CODE. */
7bc8cb2b
DE
931/* ??? Shifts need to have a *much* higher cost than this. */
932
933#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
934 case MOD: \
935 case DIV: \
936 return 60; \
937 case MULT: \
938 return 20; \
939 case ASHIFT: \
940 case ASHIFTRT: \
941 case LSHIFTRT: \
942 case ROTATE: \
943 case ROTATERT: \
944 if (GET_MODE (RTX) == HImode) return 2; \
945 return 8;
07aae5c2 946
07aae5c2 947/* Tell final.c how to eliminate redundant test instructions. */
7bc8cb2b
DE
948
949/* Here we define machine-dependent flags and fields in cc_status
950 (see `conditions.h'). No extra ones are needed for the vax. */
951
952/* Store in cc_status the expressions
953 that the condition codes will describe
954 after execution of an instruction whose pattern is EXP.
955 Do not alter them if the instruction would not alter the cc's. */
956
957#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
958#define CC_DONE_CBIT 0400
959
960#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
961{ \
962 if (cc_status.flags & CC_NO_OVERFLOW) \
963 return NO_OV; \
964 return NORMAL; \
07aae5c2
SC
965}
966\f
967/* Control the assembler format that we output. */
968
969#define ASM_IDENTIFY_GCC /* nothing */
970
7bc8cb2b
DE
971/* Output at beginning/end of assembler file. */
972
973#define ASM_FILE_START(FILE) asm_file_start(FILE)
07aae5c2 974
7bc8cb2b 975#define ASM_FILE_END(FILE) asm_file_end(FILE)
07aae5c2
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976
977/* Output to assembler file text saying following lines
978 may contain character constants, extra white space, comments, etc. */
979
7bc8cb2b 980#define ASM_APP_ON "; #APP\n"
07aae5c2
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981
982/* Output to assembler file text saying following lines
983 no longer contain unusual constructs. */
984
7bc8cb2b 985#define ASM_APP_OFF "; #NO_APP\n"
07aae5c2 986
7bc8cb2b
DE
987#define FILE_ASM_OP "\t.file\n"
988#define IDENT_ASM_OP "\t.ident\n"
989
990/* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
991#define ASM_WORD_OP (TARGET_H8300 ? ".word" : ".long")
07aae5c2
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992
993/* Output before read-only data. */
994
995#define TEXT_SECTION_ASM_OP "\t.section .text"
996#define DATA_SECTION_ASM_OP "\t.section .data"
7bc8cb2b
DE
997#define BSS_SECTION_ASM_OP "\t.section .bss"
998#define INIT_SECTION_ASM_OP "\t.section .init"
999#define CTORS_SECTION_ASM_OP "\t.section .ctors"
1000#define DTORS_SECTION_ASM_OP "\t.section .dtors"
1001
1002#define EXTRA_SECTIONS in_ctors, in_dtors
1003
1004#define EXTRA_SECTION_FUNCTIONS \
1005 \
1006void \
1007ctors_section() \
1008{ \
1009 if (in_section != in_ctors) \
1010 { \
1011 fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
1012 in_section = in_ctors; \
1013 } \
1014} \
1015 \
1016void \
1017dtors_section() \
1018{ \
1019 if (in_section != in_dtors) \
1020 { \
1021 fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
1022 in_section = in_dtors; \
1023 } \
1024} \
1025
7bc8cb2b
DE
1026#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \
1027 do { ctors_section(); \
1028 fprintf(FILE, "\t%s\t_%s\n", ASM_WORD_OP, NAME); } while (0)
07aae5c2 1029
7bc8cb2b
DE
1030#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \
1031 do { dtors_section(); \
1032 fprintf(FILE, "\t%s\t_%s\n", ASM_WORD_OP, NAME); } while (0)
1033
1034#undef DO_GLOBAL_CTORS_BODY
1035#define DO_GLOBAL_CTORS_BODY \
1036{ \
1037 typedef (*pfunc)(); \
1038 extern pfunc __ctors[]; \
1039 extern pfunc __ctors_end[]; \
1040 pfunc *p; \
c1fe41cb 1041 for (p = __ctors_end; p > __ctors; ) \
7bc8cb2b 1042 { \
c1fe41cb 1043 (*--p)(); \
7bc8cb2b
DE
1044 } \
1045}
1046
1047#undef DO_GLOBAL_DTORS_BODY
1048#define DO_GLOBAL_DTORS_BODY \
1049{ \
1050 typedef (*pfunc)(); \
1051 extern pfunc __dtors[]; \
1052 extern pfunc __dtors_end[]; \
1053 pfunc *p; \
1054 for (p = __dtors; p < __dtors_end; p++) \
1055 { \
1056 (*p)(); \
1057 } \
1058}
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1059
1060/* How to refer to registers in assembler output.
1061 This sequence is indexed by compiler's hard-register-number (see above). */
1062
1063#define REGISTER_NAMES \
1064{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ap"}
1065
1066/* How to renumber registers for dbx and gdb.
1067 H8/300 needs no change in the numeration. */
1068
1069#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1070
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1071/* Vax specific: which type character is used for type double? */
1072
1073#define ASM_DOUBLE_CHAR ('g')
1074
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1075#define SDB_DEBUGGING_INFO
1076#define SDB_DELIM "\n"
1077
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1078/* Output DBX (stabs) debugging information if doing -gstabs. */
1079
1080#define DBX_DEBUGGING_INFO
1081
1082/* Generate SDB debugging information by default. */
1083
1084#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1085
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1086/* A C statement to output something to the assembler file to switch to section
1087 NAME for object DECL which is either a FUNCTION_DECL, a VAR_DECL or
1088 NULL_TREE. Some target formats do not support arbitrary sections. Do not
1089 define this macro in such cases. */
fa8cc22d 1090
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1091#define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \
1092 fprintf (FILE, "\t.section %s\n", NAME)
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1093
1094/* This is how to output the definition of a user-level label named NAME,
1095 such as the label on a static function or variable NAME. */
1096
7bc8cb2b 1097#define ASM_OUTPUT_LABEL(FILE, NAME) \
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1098 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1099
7bc8cb2b 1100#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
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1101
1102/* This is how to output a command to make the user-level label named NAME
1103 defined for reference from other files. */
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1104
1105#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
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1106 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1107
7bc8cb2b
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1108#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1109 ASM_OUTPUT_LABEL(FILE, NAME)
07aae5c2 1110
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1111/* This is how to output a reference to a user-level label named NAME.
1112 `assemble_name' uses this. */
1113
7bc8cb2b 1114#define ASM_OUTPUT_LABELREF(FILE, NAME) \
fa8cc22d 1115 fprintf (FILE, "_%s", NAME)
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1116
1117/* This is how to output an internal numbered label where
1118 PREFIX is the class of label and NUM is the number within the class. */
1119
1120#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1121 fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
1122
1123/* This is how to store into the string LABEL
1124 the symbol_ref name of an internal numbered label where
1125 PREFIX is the class of label and NUM is the number within the class.
1126 This is suitable for output with `assemble_name'. */
1127
1128#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1129 sprintf (LABEL, "*.%s%d", PREFIX, NUM)
1130
1131/* This is how to output an assembler line defining a `double' constant.
1132 It is .dfloat or .gfloat, depending. */
1133
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1134#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1135do { char dstr[30]; \
1136 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
1137 fprintf (FILE, "\t.double %s\n", dstr); \
1138 } while (0)
1139
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1140
1141/* This is how to output an assembler line defining a `float' constant. */
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1142#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1143do { char dstr[30]; \
1144 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
1145 fprintf (FILE, "\t.float %s\n", dstr); \
1146 } while (0)
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1147
1148/* This is how to output an assembler line defining an `int' constant. */
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1149
1150#define ASM_OUTPUT_INT(FILE, VALUE) \
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1151( fprintf (FILE, "\t.long "), \
1152 output_addr_const (FILE, (VALUE)), \
1153 fprintf (FILE, "\n"))
1154
1155/* Likewise for `char' and `short' constants. */
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1156
1157#define ASM_OUTPUT_SHORT(FILE, VALUE) \
1158( fprintf (FILE, "\t.word "), \
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1159 output_addr_const (FILE, (VALUE)), \
1160 fprintf (FILE, "\n"))
1161
7bc8cb2b
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1162#define ASM_OUTPUT_CHAR(FILE, VALUE) \
1163( fprintf (FILE, "\t.byte "), \
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1164 output_addr_const (FILE, (VALUE)), \
1165 fprintf (FILE, "\n"))
1166
1167/* This is how to output an assembler line for a numeric constant byte. */
7bc8cb2b 1168#define ASM_OUTPUT_BYTE(FILE, VALUE) \
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1169 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1170
1171/* This is how to output an insn to push a register on the stack.
1172 It need not be very fast code. */
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1173
1174#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1175 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO])
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1176
1177/* This is how to output an insn to pop a register from the stack.
1178 It need not be very fast code. */
07aae5c2 1179
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1180#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1181 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])
1182
1183/* This is how to output an element of a case-vector that is absolute. */
1184
1185#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1186 asm_fprintf (FILE, "\t%s .L%d\n", ASM_WORD_OP, VALUE)
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1187
1188/* This is how to output an element of a case-vector that is relative. */
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1189
1190#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1191 fprintf (FILE, "\t%s .L%d-.L%d\n", ASM_WORD_OP, VALUE, REL)
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1192
1193/* This is how to output an assembler line
1194 that says to advance the location counter
1195 to a multiple of 2**LOG bytes. */
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1196
1197#define ASM_OUTPUT_ALIGN(FILE,LOG) \
1198 if ((LOG) != 0) \
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1199 fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1200
1201/* This is how to output an assembler line
1202 that says to advance the location counter by SIZE bytes. */
7bc8cb2b 1203
07aae5c2 1204#define ASM_OUTPUT_IDENT(FILE, NAME) \
7bc8cb2b 1205 fprintf(FILE, "%s\t \"%s\"\n", IDENT_ASM_OP, NAME)
07aae5c2 1206
7bc8cb2b 1207#define ASM_OUTPUT_SKIP(FILE, SIZE) \
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1208 fprintf (FILE, "\t.space %d\n", (SIZE))
1209
1210/* This says how to output an assembler line
1211 to define a global common symbol. */
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1212
1213#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1214( fputs ("\t.comm ", (FILE)), \
1215 assemble_name ((FILE), (NAME)), \
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1216 fprintf ((FILE), ",%d\n", (SIZE)))
1217
1218/* This says how to output an assembler line
1219 to define a local common symbol. */
7bc8cb2b 1220
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1221#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1222( fputs ("\t.lcomm ", (FILE)), \
1223 assemble_name ((FILE), (NAME)), \
1224 fprintf ((FILE), ",%d\n", (SIZE)))
1225
1226/* Store in OUTPUT a string (made with alloca) containing
1227 an assembler-name for a local static variable named NAME.
1228 LABELNO is an integer which is different for each call. */
1229
1230#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1231( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1232 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1233
1234/* Define the parentheses used to group arithmetic operations
1235 in assembler code. */
1236
1237#define ASM_OPEN_PAREN "("
1238#define ASM_CLOSE_PAREN ")"
1239
1240/* Define results of standard character escape sequences. */
1241#define TARGET_BELL 007
1242#define TARGET_BS 010
1243#define TARGET_TAB 011
1244#define TARGET_NEWLINE 012
1245#define TARGET_VT 013
1246#define TARGET_FF 014
1247#define TARGET_CR 015
1248
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1249/* Print an instruction operand X on file FILE.
1250 look in h8300.c for details */
1251
1252#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
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1253 ((CODE) == '#')
1254
7bc8cb2b 1255#define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
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1256
1257/* Print a memory operand whose address is X, on file FILE.
7bc8cb2b 1258 This uses a function in output-vax.c. */
07aae5c2 1259
7bc8cb2b 1260#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
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1261
1262#define HANDLE_PRAGMA(FILE) handle_pragma (FILE)
1263
7bc8cb2b 1264#define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
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1265
1266/* Define this macro if GNU CC should generate calls to the System V
1267 (and ANSI C) library functions `memcpy' and `memset' rather than
1268 the BSD functions `bcopy' and `bzero'. */
07aae5c2 1269
7bc8cb2b 1270#define TARGET_MEM_FUNCTIONS 1
07aae5c2 1271
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1272#define MULHI3_LIBCALL "__mulhi3"
1273#define DIVHI3_LIBCALL "__divhi3"
1274#define UDIVHI3_LIBCALL "__udivhi3"
1275#define MODHI3_LIBCALL "__modhi3"
1276#define UMODHI3_LIBCALL "__umodhi3"
1277
1278/* Perform target dependent optabs initialization. */
1279
1280#define INIT_TARGET_OPTABS \
1281 do { \
1282 smul_optab->handlers[(int) HImode].libfunc \
1283 = gen_rtx (SYMBOL_REF, Pmode, MULHI3_LIBCALL); \
1284 sdiv_optab->handlers[(int) HImode].libfunc \
1285 = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \
1286 udiv_optab->handlers[(int) HImode].libfunc \
1287 = gen_rtx (SYMBOL_REF, Pmode, UDIVHI3_LIBCALL); \
1288 smod_optab->handlers[(int) HImode].libfunc \
1289 = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \
1290 umod_optab->handlers[(int) HImode].libfunc \
1291 = gen_rtx (SYMBOL_REF, Pmode, UMODHI3_LIBCALL); \
1292 } while (0)
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1293
1294#define MOVE_RATIO 3
7bc8cb2b
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1295
1296/* Declarations for functions used in insn-output.c. */
1297char *emit_a_shift ();
1298
1299
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