]>
Commit | Line | Data |
---|---|---|
36a05131 | 1 | /* Target macros for the FRV port of GCC. |
c28350ab AS |
2 | Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, |
3 | 2010 | |
8ac411c7 | 4 | Free Software Foundation, Inc. |
36a05131 BS |
5 | Contributed by Red Hat Inc. |
6 | ||
7 | This file is part of GCC. | |
8 | ||
9 | GCC is free software; you can redistribute it and/or modify it | |
10 | under the terms of the GNU General Public License as published | |
2f83c7d6 | 11 | by the Free Software Foundation; either version 3, or (at your |
36a05131 BS |
12 | option) any later version. |
13 | ||
14 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 | License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
20 | along with GCC; see the file COPYING3. If not see |
21 | <http://www.gnu.org/licenses/>. */ | |
36a05131 BS |
22 | |
23 | #ifndef __FRV_H__ | |
24 | #define __FRV_H__ | |
25 | ||
36a05131 BS |
26 | /* Frv general purpose macros. */ |
27 | /* Align an address. */ | |
28 | #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1)) | |
29 | ||
30 | /* Return true if a value is inside a range. */ | |
31 | #define IN_RANGE_P(VALUE, LOW, HIGH) \ | |
32 | ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \ | |
33 | && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH)))) | |
34 | ||
35 | \f | |
36 | /* Driver configuration. */ | |
37 | ||
38 | /* A C expression which determines whether the option `-CHAR' takes arguments. | |
39 | The value should be the number of arguments that option takes-zero, for many | |
40 | options. | |
41 | ||
42 | By default, this macro is defined to handle the standard options properly. | |
43 | You need not define it unless you wish to add additional options which take | |
44 | arguments. | |
45 | ||
46 | Defined in svr4.h. */ | |
47 | #undef SWITCH_TAKES_ARG | |
48 | #define SWITCH_TAKES_ARG(CHAR) \ | |
49 | (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') | |
50 | ||
51 | /* A C expression which determines whether the option `-NAME' takes arguments. | |
52 | The value should be the number of arguments that option takes-zero, for many | |
53 | options. This macro rather than `SWITCH_TAKES_ARG' is used for | |
54 | multi-character option names. | |
55 | ||
56 | By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which | |
57 | handles the standard options properly. You need not define | |
58 | `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take | |
59 | arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and | |
60 | then check for additional options. | |
61 | ||
62 | Defined in svr4.h. */ | |
63 | #undef WORD_SWITCH_TAKES_ARG | |
64 | ||
34208acf AO |
65 | /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with |
66 | FDPIC which multilib to use depends on whether FDPIC is in use or | |
67 | not. The trick we use is to introduce -multilib-library-pic as a | |
68 | pseudo-flag that selects the library-pic multilib, and map fpic | |
69 | and fPIC to it only if fdpic is not selected. Also, if fdpic is | |
70 | selected and no PIC/PIE options are present, we imply -fPIE. | |
71 | Otherwise, if -fpic or -fPIC are enabled and we're optimizing for | |
72 | speed, or if we have -On with n>=3, enable inlining of PLTs. As | |
73 | for -mgprel-ro, we want to enable it by default, but not for -fpic or | |
74 | -fpie. */ | |
75 | ||
76 | #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \ | |
77 | "%{mno-pack:\ | |
78 | %{!mhard-float:-msoft-float}\ | |
79 | %{!mmedia:-mno-media}}\ | |
80 | %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\ | |
81 | %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\ | |
82 | %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \ | |
83 | %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \ | |
84 | %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \ | |
85 | %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \ | |
86 | " | |
87 | #ifndef SUBTARGET_DRIVER_SELF_SPECS | |
88 | # define SUBTARGET_DRIVER_SELF_SPECS | |
89 | #endif | |
90 | ||
7ec022b2 | 91 | /* A C string constant that tells the GCC driver program options to pass to |
36a05131 | 92 | the assembler. It can also specify how to translate options you give to GNU |
7ec022b2 | 93 | CC into options for GCC to pass to the assembler. See the file `sun3.h' |
36a05131 BS |
94 | for an example of this. |
95 | ||
96 | Do not define this macro if it does not need to do anything. | |
97 | ||
98 | Defined in svr4.h. */ | |
99 | #undef ASM_SPEC | |
100 | #define ASM_SPEC "\ | |
101 | %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ | |
102 | %{mtomcat-stats} \ | |
103 | %{!mno-eflags: \ | |
104 | %{mcpu=*} \ | |
105 | %{mgpr-*} %{mfpr-*} \ | |
106 | %{msoft-float} %{mhard-float} \ | |
107 | %{mdword} %{mno-dword} \ | |
108 | %{mdouble} %{mno-double} \ | |
109 | %{mmedia} %{mno-media} \ | |
110 | %{mmuladd} %{mno-muladd} \ | |
111 | %{mpack} %{mno-pack} \ | |
afbe7e61 | 112 | %{mno-fdpic:-mnopic} %{mfdpic} \ |
24a4dd31 | 113 | %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}" |
36a05131 BS |
114 | |
115 | /* Another C string constant used much like `LINK_SPEC'. The difference | |
116 | between the two is that `STARTFILE_SPEC' is used at the very beginning of | |
117 | the command given to the linker. | |
118 | ||
119 | If this macro is not defined, a default is provided that loads the standard | |
120 | C startup file from the usual place. See `gcc.c'. | |
121 | ||
122 | Defined in svr4.h. */ | |
123 | #undef STARTFILE_SPEC | |
124 | #define STARTFILE_SPEC "crt0%O%s frvbegin%O%s" | |
125 | ||
126 | /* Another C string constant used much like `LINK_SPEC'. The difference | |
127 | between the two is that `ENDFILE_SPEC' is used at the very end of the | |
128 | command given to the linker. | |
129 | ||
130 | Do not define this macro if it does not need to do anything. | |
131 | ||
132 | Defined in svr4.h. */ | |
133 | #undef ENDFILE_SPEC | |
134 | #define ENDFILE_SPEC "frvend%O%s" | |
135 | ||
36a05131 BS |
136 | |
137 | #define MASK_DEFAULT_FRV \ | |
138 | (MASK_MEDIA \ | |
139 | | MASK_DOUBLE \ | |
140 | | MASK_MULADD \ | |
141 | | MASK_DWORD \ | |
142 | | MASK_PACK) | |
143 | ||
144 | #define MASK_DEFAULT_FR500 \ | |
145 | (MASK_MEDIA | MASK_DWORD | MASK_PACK) | |
146 | ||
c557edf4 RS |
147 | #define MASK_DEFAULT_FR550 \ |
148 | (MASK_MEDIA | MASK_DWORD | MASK_PACK) | |
149 | ||
150 | #define MASK_DEFAULT_FR450 \ | |
151 | (MASK_GPR_32 \ | |
152 | | MASK_FPR_32 \ | |
153 | | MASK_MEDIA \ | |
154 | | MASK_SOFT_FLOAT \ | |
155 | | MASK_DWORD \ | |
156 | | MASK_PACK) | |
157 | ||
36a05131 BS |
158 | #define MASK_DEFAULT_FR400 \ |
159 | (MASK_GPR_32 \ | |
160 | | MASK_FPR_32 \ | |
161 | | MASK_MEDIA \ | |
162 | | MASK_ACC_4 \ | |
163 | | MASK_SOFT_FLOAT \ | |
164 | | MASK_DWORD \ | |
165 | | MASK_PACK) | |
166 | ||
167 | #define MASK_DEFAULT_SIMPLE \ | |
168 | (MASK_GPR_32 | MASK_SOFT_FLOAT) | |
169 | ||
7ec022b2 KC |
170 | /* A C string constant that tells the GCC driver program options to pass to |
171 | `cc1'. It can also specify how to translate options you give to GCC into | |
172 | options for GCC to pass to the `cc1'. | |
36a05131 BS |
173 | |
174 | Do not define this macro if it does not need to do anything. */ | |
175 | /* For ABI compliance, we need to put bss data into the normal data section. */ | |
176 | #define CC1_SPEC "%{G*}" | |
177 | ||
7ec022b2 KC |
178 | /* A C string constant that tells the GCC driver program options to pass to |
179 | the linker. It can also specify how to translate options you give to GCC | |
180 | into options for GCC to pass to the linker. | |
36a05131 BS |
181 | |
182 | Do not define this macro if it does not need to do anything. | |
183 | ||
184 | Defined in svr4.h. */ | |
185 | /* Override the svr4.h version with one that dispenses without the svr4 | |
186 | shared library options, notably -G. */ | |
187 | #undef LINK_SPEC | |
188 | #define LINK_SPEC "\ | |
189 | %{h*} %{v:-V} \ | |
3f94bdec | 190 | %{b} \ |
34208acf | 191 | %{mfdpic:-melf32frvfd -z text} \ |
36a05131 BS |
192 | %{static:-dn -Bstatic} \ |
193 | %{shared:-Bdynamic} \ | |
194 | %{symbolic:-Bsymbolic} \ | |
195 | %{G*} \ | |
196 | %{YP,*} \ | |
197 | %{Qy:} %{!Qn:-Qy}" | |
198 | ||
199 | /* Another C string constant used much like `LINK_SPEC'. The difference | |
200 | between the two is that `LIB_SPEC' is used at the end of the command given | |
201 | to the linker. | |
202 | ||
203 | If this macro is not defined, a default is provided that loads the standard | |
204 | C library from the usual place. See `gcc.c'. | |
205 | ||
206 | Defined in svr4.h. */ | |
207 | ||
208 | #undef LIB_SPEC | |
209 | #define LIB_SPEC "--start-group -lc -lsim --end-group" | |
210 | ||
c557edf4 | 211 | #ifndef CPU_TYPE |
36a05131 BS |
212 | #define CPU_TYPE FRV_CPU_FR500 |
213 | #endif | |
214 | ||
36a05131 BS |
215 | /* Run-time target specifications */ |
216 | ||
c557edf4 RS |
217 | #define TARGET_CPU_CPP_BUILTINS() \ |
218 | do \ | |
219 | { \ | |
220 | int issue_rate; \ | |
221 | \ | |
222 | builtin_define ("__frv__"); \ | |
223 | builtin_assert ("machine=frv"); \ | |
224 | \ | |
225 | issue_rate = frv_issue_rate (); \ | |
226 | if (issue_rate > 1) \ | |
227 | builtin_define_with_int_value ("__FRV_VLIW__", issue_rate); \ | |
228 | builtin_define_with_int_value ("__FRV_GPR__", NUM_GPRS); \ | |
229 | builtin_define_with_int_value ("__FRV_FPR__", NUM_FPRS); \ | |
230 | builtin_define_with_int_value ("__FRV_ACC__", NUM_ACCS); \ | |
231 | \ | |
232 | switch (frv_cpu_type) \ | |
233 | { \ | |
234 | case FRV_CPU_GENERIC: \ | |
235 | builtin_define ("__CPU_GENERIC__"); \ | |
236 | break; \ | |
237 | case FRV_CPU_FR550: \ | |
238 | builtin_define ("__CPU_FR550__"); \ | |
239 | break; \ | |
240 | case FRV_CPU_FR500: \ | |
241 | case FRV_CPU_TOMCAT: \ | |
242 | builtin_define ("__CPU_FR500__"); \ | |
243 | break; \ | |
244 | case FRV_CPU_FR450: \ | |
245 | builtin_define ("__CPU_FR450__"); \ | |
246 | break; \ | |
247 | case FRV_CPU_FR405: \ | |
248 | builtin_define ("__CPU_FR405__"); \ | |
249 | break; \ | |
250 | case FRV_CPU_FR400: \ | |
251 | builtin_define ("__CPU_FR400__"); \ | |
252 | break; \ | |
253 | case FRV_CPU_FR300: \ | |
254 | case FRV_CPU_SIMPLE: \ | |
255 | builtin_define ("__CPU_FR300__"); \ | |
256 | break; \ | |
257 | } \ | |
258 | \ | |
259 | if (TARGET_HARD_FLOAT) \ | |
260 | builtin_define ("__FRV_HARD_FLOAT__"); \ | |
261 | if (TARGET_DWORD) \ | |
262 | builtin_define ("__FRV_DWORD__"); \ | |
263 | if (TARGET_FDPIC) \ | |
264 | builtin_define ("__FRV_FDPIC__"); \ | |
265 | if (flag_leading_underscore > 0) \ | |
266 | builtin_define ("__FRV_UNDERSCORE__"); \ | |
267 | } \ | |
cc956ba2 | 268 | while (0) |
36a05131 BS |
269 | |
270 | \f | |
36a05131 BS |
271 | #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA) |
272 | ||
273 | #define NUM_GPRS (TARGET_GPR_32? 32 : 64) | |
274 | #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64) | |
275 | #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8) | |
276 | ||
c557edf4 RS |
277 | /* X is a valid accumulator number if (X & ACC_MASK) == X. */ |
278 | #define ACC_MASK \ | |
279 | (!TARGET_MEDIA ? 0 \ | |
280 | : TARGET_ACC_4 ? 3 \ | |
281 | : frv_cpu_type == FRV_CPU_FR450 ? 11 \ | |
282 | : 7) | |
283 | ||
36a05131 BS |
284 | /* Macros to identify the blend of media instructions available. Revision 1 |
285 | is the one found on the FR500. Revision 2 includes the changes made for | |
286 | the FR400. | |
287 | ||
288 | Treat the generic processor as a revision 1 machine for now, for | |
289 | compatibility with earlier releases. */ | |
290 | ||
291 | #define TARGET_MEDIA_REV1 \ | |
292 | (TARGET_MEDIA \ | |
293 | && (frv_cpu_type == FRV_CPU_GENERIC \ | |
294 | || frv_cpu_type == FRV_CPU_FR500)) | |
295 | ||
296 | #define TARGET_MEDIA_REV2 \ | |
c557edf4 RS |
297 | (TARGET_MEDIA \ |
298 | && (frv_cpu_type == FRV_CPU_FR400 \ | |
299 | || frv_cpu_type == FRV_CPU_FR405 \ | |
300 | || frv_cpu_type == FRV_CPU_FR450 \ | |
301 | || frv_cpu_type == FRV_CPU_FR550)) | |
302 | ||
303 | #define TARGET_MEDIA_FR450 \ | |
304 | (frv_cpu_type == FRV_CPU_FR450) | |
305 | ||
306 | #define TARGET_FR500_FR550_BUILTINS \ | |
307 | (frv_cpu_type == FRV_CPU_FR500 \ | |
308 | || frv_cpu_type == FRV_CPU_FR550) | |
309 | ||
310 | #define TARGET_FR405_BUILTINS \ | |
311 | (frv_cpu_type == FRV_CPU_FR405 \ | |
312 | || frv_cpu_type == FRV_CPU_FR450) | |
36a05131 | 313 | |
bef8809e AH |
314 | #ifndef HAVE_AS_TLS |
315 | #define HAVE_AS_TLS 0 | |
316 | #endif | |
317 | ||
36a05131 BS |
318 | /* This macro is a C statement to print on `stderr' a string describing the |
319 | particular machine description choice. Every machine description should | |
320 | define `TARGET_VERSION'. For example: | |
321 | ||
322 | #ifdef MOTOROLA | |
323 | #define TARGET_VERSION \ | |
324 | fprintf (stderr, " (68k, Motorola syntax)"); | |
325 | #else | |
326 | #define TARGET_VERSION \ | |
327 | fprintf (stderr, " (68k, MIT syntax)"); | |
328 | #endif */ | |
329 | #define TARGET_VERSION fprintf (stderr, _(" (frv)")) | |
330 | ||
36a05131 BS |
331 | /* Some machines may desire to change what optimizations are performed for |
332 | various optimization levels. This macro, if defined, is executed once just | |
333 | after the optimization level is determined and before the remainder of the | |
334 | command options have been parsed. Values set in this macro are used as the | |
335 | default values for the other command line options. | |
336 | ||
337 | LEVEL is the optimization level specified; 2 if `-O2' is specified, 1 if | |
338 | `-O' is specified, and 0 if neither is specified. | |
339 | ||
9cd10576 | 340 | SIZE is nonzero if `-Os' is specified, 0 otherwise. |
36a05131 BS |
341 | |
342 | You should not use this macro to change options that are not | |
343 | machine-specific. These should uniformly selected by the same optimization | |
aabcd309 | 344 | level on all supported machines. Use this macro to enable machine-specific |
36a05131 BS |
345 | optimizations. |
346 | ||
347 | *Do not examine `write_symbols' in this macro!* The debugging options are | |
348 | *not supposed to alter the generated code. */ | |
349 | #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) frv_optimization_options (LEVEL, SIZE) | |
350 | ||
351 | ||
352 | /* Define this macro if debugging can be performed even without a frame | |
7ec022b2 | 353 | pointer. If this macro is defined, GCC will turn on the |
36a05131 | 354 | `-fomit-frame-pointer' option whenever `-O' is specified. */ |
87b483a1 | 355 | /* Frv needs a specific frame layout that includes the frame pointer. */ |
36a05131 BS |
356 | |
357 | #define CAN_DEBUG_WITHOUT_FP | |
358 | ||
c557edf4 | 359 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0) |
36a05131 BS |
360 | \f |
361 | /* Small Data Area Support. */ | |
362 | /* Maximum size of variables that go in .sdata/.sbss. | |
363 | The -msdata=foo switch also controls how small variables are handled. */ | |
364 | #ifndef SDATA_DEFAULT_SIZE | |
365 | #define SDATA_DEFAULT_SIZE 8 | |
366 | #endif | |
367 | ||
36a05131 BS |
368 | |
369 | /* Storage Layout */ | |
370 | ||
371 | /* Define this macro to have the value 1 if the most significant bit in a byte | |
372 | has the lowest number; otherwise define it to have the value zero. This | |
373 | means that bit-field instructions count from the most significant bit. If | |
374 | the machine has no bit-field instructions, then this must still be defined, | |
375 | but it doesn't matter which value it is defined to. This macro need not be | |
376 | a constant. | |
377 | ||
378 | This macro does not affect the way structure fields are packed into bytes or | |
379 | words; that is controlled by `BYTES_BIG_ENDIAN'. */ | |
380 | #define BITS_BIG_ENDIAN 1 | |
381 | ||
382 | /* Define this macro to have the value 1 if the most significant byte in a word | |
383 | has the lowest number. This macro need not be a constant. */ | |
384 | #define BYTES_BIG_ENDIAN 1 | |
385 | ||
386 | /* Define this macro to have the value 1 if, in a multiword object, the most | |
387 | significant word has the lowest number. This applies to both memory | |
7ec022b2 | 388 | locations and registers; GCC fundamentally assumes that the order of |
36a05131 BS |
389 | words in memory is the same as the order in registers. This macro need not |
390 | be a constant. */ | |
391 | #define WORDS_BIG_ENDIAN 1 | |
392 | ||
393 | /* Number of storage units in a word; normally 4. */ | |
394 | #define UNITS_PER_WORD 4 | |
395 | ||
396 | /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and | |
397 | which has the specified mode and signedness is to be stored in a register. | |
398 | This macro is only called when TYPE is a scalar type. | |
399 | ||
400 | On most RISC machines, which only have operations that operate on a full | |
401 | register, define this macro to set M to `word_mode' if M is an integer mode | |
402 | narrower than `BITS_PER_WORD'. In most cases, only integer modes should be | |
403 | widened because wider-precision floating-point operations are usually more | |
404 | expensive than their narrower counterparts. | |
405 | ||
406 | For most machines, the macro definition does not change UNSIGNEDP. However, | |
407 | some machines, have instructions that preferentially handle either signed or | |
408 | unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit | |
409 | loads from memory and 32-bit add instructions sign-extend the result to 64 | |
410 | bits. On such machines, set UNSIGNEDP according to which kind of extension | |
411 | is more efficient. | |
412 | ||
413 | Do not define this macro if it would never modify MODE. */ | |
414 | #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ | |
415 | do \ | |
416 | { \ | |
417 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
418 | && GET_MODE_SIZE (MODE) < 4) \ | |
419 | (MODE) = SImode; \ | |
420 | } \ | |
421 | while (0) | |
422 | ||
423 | /* Normal alignment required for function parameters on the stack, in bits. | |
424 | All stack parameters receive at least this much alignment regardless of data | |
425 | type. On most machines, this is the same as the size of an integer. */ | |
426 | #define PARM_BOUNDARY 32 | |
427 | ||
428 | /* Define this macro if you wish to preserve a certain alignment for the stack | |
429 | pointer. The definition is a C expression for the desired alignment | |
430 | (measured in bits). | |
431 | ||
432 | If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the | |
433 | specified boundary. If `PUSH_ROUNDING' is defined and specifies a less | |
434 | strict alignment than `STACK_BOUNDARY', the stack may be momentarily | |
435 | unaligned while pushing arguments. */ | |
436 | #define STACK_BOUNDARY 64 | |
437 | ||
438 | /* Alignment required for a function entry point, in bits. */ | |
439 | #define FUNCTION_BOUNDARY 128 | |
440 | ||
441 | /* Biggest alignment that any data type can require on this machine, | |
442 | in bits. */ | |
443 | #define BIGGEST_ALIGNMENT 64 | |
444 | ||
445 | /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for | |
446 | some reason. */ | |
447 | #ifdef IN_TARGET_LIBS | |
448 | #define BIGGEST_FIELD_ALIGNMENT 64 | |
449 | #else | |
450 | /* An expression for the alignment of a structure field FIELD if the | |
7ec022b2 | 451 | alignment computed in the usual way is COMPUTED. GCC uses this |
36a05131 BS |
452 | value instead of the value in `BIGGEST_ALIGNMENT' or |
453 | `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */ | |
454 | #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ | |
455 | frv_adjust_field_align (FIELD, COMPUTED) | |
456 | #endif | |
457 | ||
458 | /* If defined, a C expression to compute the alignment for a static variable. | |
459 | TYPE is the data type, and ALIGN is the alignment that the object | |
460 | would ordinarily have. The value of this macro is used instead of that | |
461 | alignment to align the object. | |
462 | ||
463 | If this macro is not defined, then ALIGN is used. | |
464 | ||
465 | One use of this macro is to increase alignment of medium-size data to make | |
466 | it all fit in fewer cache lines. Another is to cause character arrays to be | |
467 | word-aligned so that `strcpy' calls that copy constants to character arrays | |
468 | can be done inline. */ | |
469 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
470 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
471 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
472 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
473 | ||
474 | /* If defined, a C expression to compute the alignment given to a constant that | |
475 | is being placed in memory. CONSTANT is the constant and ALIGN is the | |
476 | alignment that the object would ordinarily have. The value of this macro is | |
477 | used instead of that alignment to align the object. | |
478 | ||
479 | If this macro is not defined, then ALIGN is used. | |
480 | ||
481 | The typical use of this macro is to increase alignment for string constants | |
482 | to be word aligned so that `strcpy' calls that copy constants can be done | |
483 | inline. */ | |
484 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
485 | (TREE_CODE (EXP) == STRING_CST \ | |
486 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
487 | ||
488 | /* Define this macro to be the value 1 if instructions will fail to work if | |
489 | given data not on the nominal alignment. If instructions will merely go | |
490 | slower in that case, define this macro as 0. */ | |
491 | #define STRICT_ALIGNMENT 1 | |
492 | ||
493 | /* Define this if you wish to imitate the way many other C compilers handle | |
494 | alignment of bitfields and the structures that contain them. | |
495 | ||
43a88a8c | 496 | The behavior is that the type written for a bit-field (`int', `short', or |
36a05131 BS |
497 | other integer type) imposes an alignment for the entire structure, as if the |
498 | structure really did contain an ordinary field of that type. In addition, | |
43a88a8c | 499 | the bit-field is placed within the structure so that it would fit within such |
36a05131 BS |
500 | a field, not crossing a boundary for it. |
501 | ||
43a88a8c | 502 | Thus, on most machines, a bit-field whose type is written as `int' would not |
36a05131 BS |
503 | cross a four-byte boundary, and would force four-byte alignment for the |
504 | whole structure. (The alignment used may not be four bytes; it is | |
505 | controlled by the other alignment parameters.) | |
506 | ||
507 | If the macro is defined, its definition should be a C expression; a nonzero | |
508 | value for the expression enables this behavior. | |
509 | ||
510 | Note that if this macro is not defined, or its value is zero, some bitfields | |
511 | may cross more than one alignment boundary. The compiler can support such | |
512 | references if there are `insv', `extv', and `extzv' insns that can directly | |
513 | reference memory. | |
514 | ||
515 | The other known way of making bitfields work is to define | |
516 | `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every | |
517 | structure can be accessed with fullwords. | |
518 | ||
43a88a8c | 519 | Unless the machine has bit-field instructions or you define |
36a05131 BS |
520 | `STRUCTURE_SIZE_BOUNDARY' that way, you must define |
521 | `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value. | |
522 | ||
7ec022b2 | 523 | If your aim is to make GCC use the same conventions for laying out |
36a05131 BS |
524 | bitfields as are used by another compiler, here is how to investigate what |
525 | the other compiler does. Compile and run this program: | |
526 | ||
527 | struct foo1 | |
528 | { | |
529 | char x; | |
530 | char :0; | |
531 | char y; | |
532 | }; | |
533 | ||
534 | struct foo2 | |
535 | { | |
536 | char x; | |
537 | int :0; | |
538 | char y; | |
539 | }; | |
540 | ||
541 | main () | |
542 | { | |
543 | printf ("Size of foo1 is %d\n", | |
544 | sizeof (struct foo1)); | |
545 | printf ("Size of foo2 is %d\n", | |
546 | sizeof (struct foo2)); | |
547 | exit (0); | |
548 | } | |
549 | ||
550 | If this prints 2 and 5, then the compiler's behavior is what you would get | |
551 | from `PCC_BITFIELD_TYPE_MATTERS'. | |
552 | ||
553 | Defined in svr4.h. */ | |
554 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
555 | ||
36a05131 BS |
556 | \f |
557 | /* Layout of Source Language Data Types. */ | |
558 | ||
559 | #define CHAR_TYPE_SIZE 8 | |
560 | #define SHORT_TYPE_SIZE 16 | |
561 | #define INT_TYPE_SIZE 32 | |
562 | #define LONG_TYPE_SIZE 32 | |
563 | #define LONG_LONG_TYPE_SIZE 64 | |
564 | #define FLOAT_TYPE_SIZE 32 | |
565 | #define DOUBLE_TYPE_SIZE 64 | |
566 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
567 | ||
568 | /* An expression whose value is 1 or 0, according to whether the type `char' | |
569 | should be signed or unsigned by default. The user can always override this | |
570 | default with the options `-fsigned-char' and `-funsigned-char'. */ | |
571 | #define DEFAULT_SIGNED_CHAR 1 | |
572 | ||
573 | \f | |
574 | /* General purpose registers. */ | |
575 | #define GPR_FIRST 0 /* First gpr */ | |
576 | #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */ | |
577 | #define GPR_R0 GPR_FIRST /* R0, constant 0 */ | |
578 | #define GPR_FP (GPR_FIRST + 2) /* Frame pointer */ | |
579 | #define GPR_SP (GPR_FIRST + 1) /* Stack pointer */ | |
580 | /* small data register */ | |
34208acf AO |
581 | #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) |
582 | #define PIC_REGNO (GPR_FIRST + (TARGET_FDPIC?15:17)) /* PIC register. */ | |
583 | #define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */ | |
584 | #define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */ | |
585 | ||
b8a19ec4 NC |
586 | #define HARD_REGNO_RENAME_OK(from,to) (TARGET_FDPIC ? ((to) != FDPIC_REG) : 1) |
587 | ||
34208acf | 588 | #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO) |
36a05131 BS |
589 | |
590 | #define FPR_FIRST 64 /* First FP reg */ | |
591 | #define FPR_LAST 127 /* Last FP reg */ | |
592 | ||
36a05131 BS |
593 | #define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */ |
594 | ||
595 | /* We reserve the last CR and CCR in each category to be used as a reload | |
596 | register to reload the CR/CCR registers. This is a kludge. */ | |
597 | #define CC_FIRST 128 /* First ICC/FCC reg */ | |
598 | #define CC_LAST 135 /* Last ICC/FCC reg */ | |
599 | #define ICC_FIRST (CC_FIRST + 4) /* First ICC reg */ | |
600 | #define ICC_LAST (CC_FIRST + 7) /* Last ICC reg */ | |
601 | #define ICC_TEMP (CC_FIRST + 7) /* Temporary ICC reg */ | |
602 | #define FCC_FIRST (CC_FIRST) /* First FCC reg */ | |
603 | #define FCC_LAST (CC_FIRST + 3) /* Last FCC reg */ | |
604 | ||
605 | /* Amount to shift a value to locate a ICC or FCC register in the CCR | |
606 | register and shift it to the bottom 4 bits. */ | |
607 | #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2) | |
608 | ||
609 | /* Mask to isolate a single ICC/FCC value. */ | |
610 | #define CC_MASK 0xf | |
611 | ||
612 | /* Masks to isolate the various bits in an ICC field. */ | |
613 | #define ICC_MASK_N 0x8 /* negative */ | |
614 | #define ICC_MASK_Z 0x4 /* zero */ | |
615 | #define ICC_MASK_V 0x2 /* overflow */ | |
616 | #define ICC_MASK_C 0x1 /* carry */ | |
617 | ||
618 | /* Mask to isolate the N/Z flags in an ICC. */ | |
619 | #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z) | |
620 | ||
621 | /* Mask to isolate the Z/C flags in an ICC. */ | |
622 | #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C) | |
623 | ||
624 | /* Masks to isolate the various bits in a FCC field. */ | |
625 | #define FCC_MASK_E 0x8 /* equal */ | |
626 | #define FCC_MASK_L 0x4 /* less than */ | |
627 | #define FCC_MASK_G 0x2 /* greater than */ | |
628 | #define FCC_MASK_U 0x1 /* unordered */ | |
629 | ||
630 | /* For CCR registers, the machine wants CR4..CR7 to be used for integer | |
631 | code and CR0..CR3 to be used for floating point. */ | |
632 | #define CR_FIRST 136 /* First CCR */ | |
633 | #define CR_LAST 143 /* Last CCR */ | |
634 | #define CR_NUM (CR_LAST-CR_FIRST+1) /* # of CCRs (8) */ | |
635 | #define ICR_FIRST (CR_FIRST + 4) /* First integer CCR */ | |
636 | #define ICR_LAST (CR_FIRST + 7) /* Last integer CCR */ | |
637 | #define ICR_TEMP ICR_LAST /* Temp integer CCR */ | |
638 | #define FCR_FIRST (CR_FIRST + 0) /* First float CCR */ | |
639 | #define FCR_LAST (CR_FIRST + 3) /* Last float CCR */ | |
640 | ||
641 | /* Amount to shift a value to locate a CR register in the CCCR special purpose | |
642 | register and shift it to the bottom 2 bits. */ | |
643 | #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1) | |
644 | ||
645 | /* Mask to isolate a single CR value. */ | |
646 | #define CR_MASK 0x3 | |
647 | ||
648 | #define ACC_FIRST 144 /* First acc register */ | |
c557edf4 | 649 | #define ACC_LAST 155 /* Last acc register */ |
36a05131 | 650 | |
c557edf4 RS |
651 | #define ACCG_FIRST 156 /* First accg register */ |
652 | #define ACCG_LAST 167 /* Last accg register */ | |
36a05131 | 653 | |
c557edf4 | 654 | #define AP_FIRST 168 /* fake argument pointer */ |
36a05131 | 655 | |
c557edf4 RS |
656 | #define SPR_FIRST 169 |
657 | #define SPR_LAST 172 | |
36a05131 BS |
658 | #define LR_REGNO (SPR_FIRST) |
659 | #define LCR_REGNO (SPR_FIRST + 1) | |
c557edf4 RS |
660 | #define IACC_FIRST (SPR_FIRST + 2) |
661 | #define IACC_LAST (SPR_FIRST + 3) | |
36a05131 BS |
662 | |
663 | #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST) | |
664 | #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM) | |
665 | #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST) | |
666 | #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST) | |
667 | #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST) | |
668 | #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST) | |
669 | #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST) | |
670 | #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST) | |
671 | #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST) | |
672 | #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST) | |
673 | #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST) | |
674 | #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST) | |
675 | ||
676 | #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
677 | #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
678 | #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
679 | #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
680 | #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
681 | #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
682 | #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
683 | #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
684 | #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
685 | #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
686 | #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER) | |
687 | ||
688 | #define MAX_STACK_IMMEDIATE_OFFSET 2047 | |
689 | ||
690 | \f | |
691 | /* Register Basics. */ | |
692 | ||
693 | /* Number of hardware registers known to the compiler. They receive numbers 0 | |
694 | through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number | |
695 | really is assigned the number `FIRST_PSEUDO_REGISTER'. */ | |
696 | #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1) | |
697 | ||
698 | /* The first/last register that can contain the arguments to a function. */ | |
699 | #define FIRST_ARG_REGNUM (GPR_FIRST + 8) | |
700 | #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1) | |
701 | ||
702 | /* Registers used by the exception handling functions. These should be | |
1ae58c30 | 703 | registers that are not otherwise used by the calling sequence. */ |
36a05131 BS |
704 | #define FIRST_EH_REGNUM 14 |
705 | #define LAST_EH_REGNUM 15 | |
706 | ||
707 | /* Scratch registers used in the prologue, epilogue and thunks. | |
708 | OFFSET_REGNO is for loading constant addends that are too big for a | |
709 | single instruction. TEMP_REGNO is used for transferring SPRs to and from | |
710 | the stack, and various other activities. */ | |
711 | #define OFFSET_REGNO 4 | |
712 | #define TEMP_REGNO 5 | |
713 | ||
714 | /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer, | |
715 | which is sometimes used to set up the frame pointer. */ | |
716 | #define OLD_SP_REGNO 6 | |
717 | ||
718 | /* Registers used in the epilogue. STACKADJ_REGNO stores the exception | |
719 | handler's stack adjustment. */ | |
720 | #define STACKADJ_REGNO 6 | |
721 | ||
722 | /* Registers used in thunks. JMP_REGNO is used for loading the target | |
723 | address. */ | |
724 | #define JUMP_REGNO 6 | |
725 | ||
726 | #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \ | |
727 | (N) + FIRST_EH_REGNUM : INVALID_REGNUM) | |
728 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO) | |
729 | #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx) | |
730 | ||
e1175f68 RS |
731 | #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO) |
732 | ||
36a05131 BS |
733 | /* An initializer that says which registers are used for fixed purposes all |
734 | throughout the compiled code and are therefore not available for general | |
735 | allocation. These would include the stack pointer, the frame pointer | |
736 | (except on machines where that can be used as a general register when no | |
737 | frame pointer is needed), the program counter on machines where that is | |
738 | considered one of the addressable registers, and any other numbered register | |
739 | with a standard use. | |
740 | ||
741 | This information is expressed as a sequence of numbers, separated by commas | |
742 | and surrounded by braces. The Nth number is 1 if register N is fixed, 0 | |
743 | otherwise. | |
744 | ||
745 | The table initialized from this macro, and the table initialized by the | |
746 | following one, may be overridden at run time either automatically, by the | |
747 | actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the | |
748 | command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */ | |
749 | ||
750 | /* gr0 -- Hard Zero | |
751 | gr1 -- Stack Pointer | |
752 | gr2 -- Frame Pointer | |
753 | gr3 -- Hidden Parameter | |
754 | gr16 -- Small Data reserved | |
755 | gr17 -- Pic reserved | |
756 | gr28 -- OS reserved | |
757 | gr29 -- OS reserved | |
758 | gr30 -- OS reserved | |
759 | gr31 -- OS reserved | |
760 | cr3 -- reserved to reload FCC registers. | |
761 | cr7 -- reserved to reload ICC registers. */ | |
762 | #define FIXED_REGISTERS \ | |
763 | { /* Integer Registers */ \ | |
764 | 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \ | |
765 | 0, 0, 0, 0, 0, 0, 0, 0, /* 008-015, gr8 - gr15 */ \ | |
766 | 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ | |
767 | 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ | |
768 | 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \ | |
769 | 0, 0, 0, 0, 0, 0, 0, 0, /* 040-040, gr48 - gr47 */ \ | |
770 | 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ | |
771 | 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ | |
772 | /* Float Registers */ \ | |
773 | 0, 0, 0, 0, 0, 0, 0, 0, /* 064-071, fr0 - fr7 */ \ | |
774 | 0, 0, 0, 0, 0, 0, 0, 0, /* 072-079, fr8 - fr15 */ \ | |
775 | 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ | |
776 | 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ | |
777 | 0, 0, 0, 0, 0, 0, 0, 0, /* 096-103, fr32 - fr39 */ \ | |
778 | 0, 0, 0, 0, 0, 0, 0, 0, /* 104-111, fr48 - fr47 */ \ | |
779 | 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ | |
780 | 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ | |
781 | /* Condition Code Registers */ \ | |
782 | 0, 0, 0, 0, /* 128-131, fcc0 - fcc3 */ \ | |
783 | 0, 0, 0, 1, /* 132-135, icc0 - icc3 */ \ | |
784 | /* Conditional execution Registers (CCR) */ \ | |
785 | 0, 0, 0, 0, 0, 0, 0, 1, /* 136-143, cr0 - cr7 */ \ | |
786 | /* Accumulators */ \ | |
787 | 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ | |
c557edf4 RS |
788 | 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ |
789 | 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ | |
790 | 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ | |
36a05131 | 791 | /* Other registers */ \ |
c557edf4 | 792 | 1, /* 168, AP - fake arg ptr */ \ |
8d8256c1 | 793 | 1, /* 169, LR - Link register*/ \ |
c557edf4 RS |
794 | 0, /* 170, LCR - Loop count reg*/ \ |
795 | 1, 1 /* 171-172, iacc0 */ \ | |
36a05131 BS |
796 | } |
797 | ||
798 | /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in | |
799 | general) by function calls as well as for fixed registers. This macro | |
800 | therefore identifies the registers that are not available for general | |
801 | allocation of values that must live across function calls. | |
802 | ||
803 | If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically | |
804 | saves it on function entry and restores it on function exit, if the register | |
805 | is used within the function. */ | |
806 | #define CALL_USED_REGISTERS \ | |
807 | { /* Integer Registers */ \ | |
808 | 1, 1, 1, 1, 1, 1, 1, 1, /* 000-007, gr0 - gr7 */ \ | |
809 | 1, 1, 1, 1, 1, 1, 1, 1, /* 008-015, gr8 - gr15 */ \ | |
810 | 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ | |
811 | 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ | |
812 | 1, 1, 1, 1, 1, 1, 1, 1, /* 032-039, gr32 - gr39 */ \ | |
813 | 1, 1, 1, 1, 1, 1, 1, 1, /* 040-040, gr48 - gr47 */ \ | |
814 | 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ | |
815 | 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ | |
816 | /* Float Registers */ \ | |
817 | 1, 1, 1, 1, 1, 1, 1, 1, /* 064-071, fr0 - fr7 */ \ | |
818 | 1, 1, 1, 1, 1, 1, 1, 1, /* 072-079, fr8 - fr15 */ \ | |
819 | 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ | |
820 | 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ | |
821 | 1, 1, 1, 1, 1, 1, 1, 1, /* 096-103, fr32 - fr39 */ \ | |
822 | 1, 1, 1, 1, 1, 1, 1, 1, /* 104-111, fr48 - fr47 */ \ | |
823 | 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ | |
824 | 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ | |
825 | /* Condition Code Registers */ \ | |
826 | 1, 1, 1, 1, /* 128-131, fcc0 - fcc3 */ \ | |
827 | 1, 1, 1, 1, /* 132-135, icc0 - icc3 */ \ | |
828 | /* Conditional execution Registers (CCR) */ \ | |
829 | 1, 1, 1, 1, 1, 1, 1, 1, /* 136-143, cr0 - cr7 */ \ | |
830 | /* Accumulators */ \ | |
831 | 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ | |
c557edf4 RS |
832 | 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ |
833 | 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ | |
834 | 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ | |
36a05131 | 835 | /* Other registers */ \ |
c557edf4 RS |
836 | 1, /* 168, AP - fake arg ptr */ \ |
837 | 1, /* 169, LR - Link register*/ \ | |
838 | 1, /* 170, LCR - Loop count reg */ \ | |
839 | 1, 1 /* 171-172, iacc0 */ \ | |
36a05131 BS |
840 | } |
841 | ||
842 | /* Zero or more C statements that may conditionally modify two variables | |
843 | `fixed_regs' and `call_used_regs' (both of type `char []') after they have | |
844 | been initialized from the two preceding macros. | |
845 | ||
846 | This is necessary in case the fixed or call-clobbered registers depend on | |
847 | target flags. | |
848 | ||
849 | You need not define this macro if it has no work to do. | |
850 | ||
851 | If the usage of an entire class of registers depends on the target flags, | |
852 | you may indicate this to GCC by using this macro to modify `fixed_regs' and | |
853 | `call_used_regs' to 1 for each of the registers in the classes which should | |
854 | not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return | |
855 | `NO_REGS' if it is called with a letter for a class that shouldn't be used. | |
856 | ||
857 | (However, if this class is not included in `GENERAL_REGS' and all of the | |
858 | insn patterns whose constraints permit this class are controlled by target | |
859 | switches, then GCC will automatically avoid using these registers when the | |
860 | target switches are opposed to them.) */ | |
861 | ||
862 | #define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage () | |
863 | ||
864 | \f | |
865 | /* Order of allocation of registers. */ | |
866 | ||
867 | /* If defined, an initializer for a vector of integers, containing the numbers | |
7ec022b2 | 868 | of hard registers in the order in which GCC should prefer to use them |
36a05131 BS |
869 | (from most preferred to least). |
870 | ||
871 | If this macro is not defined, registers are used lowest numbered first (all | |
872 | else being equal). | |
873 | ||
874 | One use of this macro is on machines where the highest numbered registers | |
875 | must always be saved and the save-multiple-registers instruction supports | |
876 | only sequences of consecutive registers. On such machines, define | |
877 | `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered | |
878 | allocatable register first. */ | |
879 | ||
880 | /* On the FRV, allocate GR16 and GR17 after other saved registers so that we | |
881 | have a better chance of allocating 2 registers at a time and can use the | |
882 | double word load/store instructions in the prologue. */ | |
883 | #define REG_ALLOC_ORDER \ | |
884 | { \ | |
885 | /* volatile registers */ \ | |
886 | GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \ | |
887 | GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \ | |
888 | GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \ | |
889 | GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \ | |
890 | GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \ | |
891 | GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \ | |
892 | GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \ | |
893 | \ | |
894 | FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \ | |
895 | FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \ | |
896 | FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \ | |
897 | FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \ | |
898 | FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \ | |
899 | FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \ | |
900 | FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \ | |
901 | FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \ | |
902 | \ | |
903 | ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \ | |
904 | FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \ | |
905 | CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \ | |
906 | CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \ | |
907 | \ | |
908 | /* saved registers */ \ | |
909 | GPR_FIRST + 18, GPR_FIRST + 19, \ | |
910 | GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \ | |
911 | GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \ | |
912 | GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \ | |
913 | GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \ | |
914 | GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \ | |
915 | GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \ | |
916 | GPR_FIRST + 16, GPR_FIRST + 17, \ | |
917 | \ | |
918 | FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \ | |
919 | FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \ | |
920 | FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \ | |
921 | FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \ | |
922 | FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \ | |
923 | FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \ | |
924 | FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \ | |
925 | FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \ | |
926 | \ | |
927 | /* special or fixed registers */ \ | |
928 | GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \ | |
929 | GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \ | |
930 | ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \ | |
931 | ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \ | |
c557edf4 | 932 | ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \ |
36a05131 BS |
933 | ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \ |
934 | ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \ | |
c557edf4 RS |
935 | ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \ |
936 | AP_FIRST, LR_REGNO, LCR_REGNO, \ | |
937 | IACC_FIRST + 0, IACC_FIRST + 1 \ | |
36a05131 BS |
938 | } |
939 | ||
940 | \f | |
941 | /* How Values Fit in Registers. */ | |
942 | ||
943 | /* A C expression for the number of consecutive hard registers, starting at | |
944 | register number REGNO, required to hold a value of mode MODE. | |
945 | ||
946 | On a machine where all registers are exactly one word, a suitable definition | |
947 | of this macro is | |
948 | ||
949 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
950 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \ | |
951 | / UNITS_PER_WORD)) */ | |
952 | ||
953 | /* On the FRV, make the CC modes take 3 words in the integer registers, so that | |
954 | we can build the appropriate instructions to properly reload the values. */ | |
955 | #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE) | |
956 | ||
957 | /* A C expression that is nonzero if it is permissible to store a value of mode | |
958 | MODE in hard register number REGNO (or in several registers starting with | |
959 | that one). For a machine where all registers are equivalent, a suitable | |
960 | definition is | |
961 | ||
962 | #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 | |
963 | ||
964 | It is not necessary for this macro to check for the numbers of fixed | |
965 | registers, because the allocation mechanism considers them to be always | |
966 | occupied. | |
967 | ||
968 | On some machines, double-precision values must be kept in even/odd register | |
969 | pairs. The way to implement that is to define this macro to reject odd | |
970 | register numbers for such modes. | |
971 | ||
972 | The minimum requirement for a mode to be OK in a register is that the | |
973 | `movMODE' instruction pattern support moves between the register and any | |
974 | other hard register for which the mode is OK; and that moving a value into | |
975 | the register and back out not alter it. | |
976 | ||
977 | Since the same instruction used to move `SImode' will work for all narrower | |
978 | integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK' | |
979 | to distinguish between these modes, provided you define patterns `movhi', | |
980 | etc., to take advantage of this. This is useful because of the interaction | |
981 | between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for | |
982 | all integer modes to be tieable. | |
983 | ||
984 | Many machines have special registers for floating point arithmetic. Often | |
985 | people assume that floating point machine modes are allowed only in floating | |
986 | point registers. This is not true. Any registers that can hold integers | |
987 | can safely *hold* a floating point machine mode, whether or not floating | |
988 | arithmetic can be done on it in those registers. Integer move instructions | |
989 | can be used to move the values. | |
990 | ||
991 | On some machines, though, the converse is true: fixed-point machine modes | |
992 | may not go in floating registers. This is true if the floating registers | |
993 | normalize any value stored in them, because storing a non-floating value | |
994 | there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject | |
995 | fixed-point machine modes in floating registers. But if the floating | |
996 | registers do not automatically normalize, if you can store any bit pattern | |
997 | in one and retrieve it unchanged without a trap, then any machine mode may | |
998 | go in a floating register, so you can define this macro to say so. | |
999 | ||
1000 | The primary significance of special floating registers is rather that they | |
1001 | are the registers acceptable in floating point arithmetic instructions. | |
1002 | However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by | |
1003 | writing the proper constraints for those instructions. | |
1004 | ||
1005 | On some machines, the floating registers are especially slow to access, so | |
1006 | that it is better to store a value in a stack frame than in such a register | |
1007 | if floating point arithmetic is not being done. As long as the floating | |
1008 | registers are not in class `GENERAL_REGS', they will not be used unless some | |
1009 | pattern's constraint asks for one. */ | |
1010 | #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE) | |
1011 | ||
1012 | /* A C expression that is nonzero if it is desirable to choose register | |
1013 | allocation so as to avoid move instructions between a value of mode MODE1 | |
1014 | and a value of mode MODE2. | |
1015 | ||
1016 | If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are | |
1017 | ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be | |
1018 | zero. */ | |
1019 | #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2) | |
1020 | ||
1021 | /* Define this macro if the compiler should avoid copies to/from CCmode | |
1022 | registers. You should only define this macro if support fo copying to/from | |
1023 | CCmode is incomplete. */ | |
1024 | #define AVOID_CCMODE_COPIES | |
1025 | ||
1026 | \f | |
1027 | /* Register Classes. */ | |
1028 | ||
1029 | /* An enumeral type that must be defined with all the register class names as | |
1030 | enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last | |
1031 | register class, followed by one more enumeral value, `LIM_REG_CLASSES', | |
1032 | which is not a register class but rather tells how many classes there are. | |
1033 | ||
1034 | Each register class has a number, which is the value of casting the class | |
1035 | name to type `int'. The number serves as an index in many of the tables | |
1036 | described below. */ | |
1037 | enum reg_class | |
1038 | { | |
1039 | NO_REGS, | |
1040 | ICC_REGS, | |
1041 | FCC_REGS, | |
1042 | CC_REGS, | |
1043 | ICR_REGS, | |
1044 | FCR_REGS, | |
1045 | CR_REGS, | |
1046 | LCR_REG, | |
1047 | LR_REG, | |
bef8809e AH |
1048 | GR8_REGS, |
1049 | GR9_REGS, | |
1050 | GR89_REGS, | |
34208acf AO |
1051 | FDPIC_REGS, |
1052 | FDPIC_FPTR_REGS, | |
1053 | FDPIC_CALL_REGS, | |
36a05131 BS |
1054 | SPR_REGS, |
1055 | QUAD_ACC_REGS, | |
1056 | EVEN_ACC_REGS, | |
1057 | ACC_REGS, | |
1058 | ACCG_REGS, | |
1059 | QUAD_FPR_REGS, | |
1060 | FEVEN_REGS, | |
1061 | FPR_REGS, | |
1062 | QUAD_REGS, | |
1063 | EVEN_REGS, | |
1064 | GPR_REGS, | |
1065 | ALL_REGS, | |
1066 | LIM_REG_CLASSES | |
1067 | }; | |
1068 | ||
1069 | #define GENERAL_REGS GPR_REGS | |
1070 | ||
1071 | /* The number of distinct register classes, defined as follows: | |
1072 | ||
1073 | #define N_REG_CLASSES (int) LIM_REG_CLASSES */ | |
1074 | #define N_REG_CLASSES ((int) LIM_REG_CLASSES) | |
1075 | ||
1076 | /* An initializer containing the names of the register classes as C string | |
1077 | constants. These names are used in writing some of the debugging dumps. */ | |
1078 | #define REG_CLASS_NAMES { \ | |
1079 | "NO_REGS", \ | |
1080 | "ICC_REGS", \ | |
1081 | "FCC_REGS", \ | |
1082 | "CC_REGS", \ | |
1083 | "ICR_REGS", \ | |
1084 | "FCR_REGS", \ | |
1085 | "CR_REGS", \ | |
1086 | "LCR_REG", \ | |
1087 | "LR_REG", \ | |
bef8809e AH |
1088 | "GR8_REGS", \ |
1089 | "GR9_REGS", \ | |
1090 | "GR89_REGS", \ | |
34208acf AO |
1091 | "FDPIC_REGS", \ |
1092 | "FDPIC_FPTR_REGS", \ | |
1093 | "FDPIC_CALL_REGS", \ | |
36a05131 BS |
1094 | "SPR_REGS", \ |
1095 | "QUAD_ACC_REGS", \ | |
1096 | "EVEN_ACC_REGS", \ | |
1097 | "ACC_REGS", \ | |
1098 | "ACCG_REGS", \ | |
1099 | "QUAD_FPR_REGS", \ | |
1100 | "FEVEN_REGS", \ | |
1101 | "FPR_REGS", \ | |
1102 | "QUAD_REGS", \ | |
1103 | "EVEN_REGS", \ | |
1104 | "GPR_REGS", \ | |
1105 | "ALL_REGS" \ | |
1106 | } | |
1107 | ||
1108 | /* An initializer containing the contents of the register classes, as integers | |
1109 | which are bit masks. The Nth integer specifies the contents of class N. | |
1110 | The way the integer MASK is interpreted is that register R is in the class | |
1111 | if `MASK & (1 << R)' is 1. | |
1112 | ||
1113 | When the machine has more than 32 registers, an integer does not suffice. | |
1114 | Then the integers are replaced by sub-initializers, braced groupings | |
1115 | containing several integers. Each sub-initializer must be suitable as an | |
1116 | initializer for the type `HARD_REG_SET' which is defined in | |
1117 | `hard-reg-set.h'. */ | |
1118 | #define REG_CLASS_CONTENTS \ | |
1119 | { /* gr0-gr31 gr32-gr63 fr0-fr31 fr32-fr-63 cc/ccr/acc ap/spr */ \ | |
1120 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* NO_REGS */\ | |
1121 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000f0,0x0}, /* ICC_REGS */\ | |
1122 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000000f,0x0}, /* FCC_REGS */\ | |
1123 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000ff,0x0}, /* CC_REGS */\ | |
1124 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000f000,0x0}, /* ICR_REGS */\ | |
1125 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000f00,0x0}, /* FCR_REGS */\ | |
1126 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\ | |
c557edf4 RS |
1127 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\ |
1128 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\ | |
bef8809e AH |
1129 | { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\ |
1130 | { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\ | |
1131 | { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\ | |
34208acf AO |
1132 | { 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\ |
1133 | { 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\ | |
1134 | { 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\ | |
c557edf4 RS |
1135 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x1e00}, /* SPR_REGS */\ |
1136 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* QUAD_ACC */\ | |
1137 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* EVEN_ACC */\ | |
1138 | { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* ACC_REGS */\ | |
1139 | { 0x00000000,0x00000000,0x00000000,0x00000000,0xf0000000,0xff}, /* ACCG_REGS*/\ | |
36a05131 BS |
1140 | { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* QUAD_FPR */\ |
1141 | { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FEVEN_REG*/\ | |
1142 | { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FPR_REGS */\ | |
1143 | { 0x0ffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* QUAD_REGS*/\ | |
1144 | { 0xfffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* EVEN_REGS*/\ | |
c557edf4 RS |
1145 | { 0xffffffff,0xffffffff,0x00000000,0x00000000,0x00000000,0x100}, /* GPR_REGS */\ |
1146 | { 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\ | |
36a05131 BS |
1147 | } |
1148 | ||
35f2d8ef NC |
1149 | /* The following macro defines cover classes for Integrated Register |
1150 | Allocator. Cover classes is a set of non-intersected register | |
1151 | classes covering all hard registers used for register allocation | |
1152 | purpose. Any move between two registers of a cover class should be | |
1153 | cheaper than load or store of the registers. The macro value is | |
1154 | array of register classes with LIM_REG_CLASSES used as the end | |
1155 | marker. */ | |
1156 | ||
1157 | #define IRA_COVER_CLASSES \ | |
1158 | { \ | |
1159 | GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \ | |
1160 | ACCG_REGS, SPR_REGS, \ | |
1161 | LIM_REG_CLASSES \ | |
1162 | } | |
1163 | ||
36a05131 BS |
1164 | /* A C expression whose value is a register class containing hard register |
1165 | REGNO. In general there is more than one such class; choose a class which | |
1166 | is "minimal", meaning that no smaller class also contains the register. */ | |
1167 | ||
1168 | extern enum reg_class regno_reg_class[]; | |
1169 | #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO] | |
1170 | ||
1171 | /* A macro whose definition is the name of the class to which a valid base | |
1172 | register must belong. A base register is one used in an address which is | |
1173 | the register value plus a displacement. */ | |
1174 | #define BASE_REG_CLASS GPR_REGS | |
1175 | ||
1176 | /* A macro whose definition is the name of the class to which a valid index | |
1177 | register must belong. An index register is one used in an address where its | |
1178 | value is either multiplied by a scale factor or added to another register | |
1179 | (as well as added to a displacement). */ | |
1180 | #define INDEX_REG_CLASS GPR_REGS | |
1181 | ||
1182 | /* A C expression which defines the machine-dependent operand constraint | |
1183 | letters for register classes. If CHAR is such a letter, the value should be | |
1184 | the register class corresponding to it. Otherwise, the value should be | |
1185 | `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS', | |
1186 | will not be passed to this macro; you do not need to handle it. | |
1187 | ||
1188 | The following letters are unavailable, due to being used as | |
1189 | constraints: | |
1190 | '0'..'9' | |
1191 | '<', '>' | |
1192 | 'E', 'F', 'G', 'H' | |
1193 | 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' | |
1194 | 'Q', 'R', 'S', 'T', 'U' | |
1195 | 'V', 'X' | |
1196 | 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ | |
1197 | ||
1198 | extern enum reg_class reg_class_from_letter[]; | |
e0c32c62 | 1199 | #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)] |
36a05131 BS |
1200 | |
1201 | /* A C expression which is nonzero if register number NUM is suitable for use | |
1202 | as a base register in operand addresses. It may be either a suitable hard | |
1203 | register or a pseudo register that has been allocated such a hard register. */ | |
1204 | #define REGNO_OK_FOR_BASE_P(NUM) \ | |
1205 | ((NUM) < FIRST_PSEUDO_REGISTER \ | |
1206 | ? GPR_P (NUM) \ | |
1207 | : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) | |
1208 | ||
1209 | /* A C expression which is nonzero if register number NUM is suitable for use | |
1210 | as an index register in operand addresses. It may be either a suitable hard | |
1211 | register or a pseudo register that has been allocated such a hard register. | |
1212 | ||
1213 | The difference between an index register and a base register is that the | |
1214 | index register may be scaled. If an address involves the sum of two | |
1215 | registers, neither one of them scaled, then either one may be labeled the | |
1216 | "base" and the other the "index"; but whichever labeling is used must fit | |
1217 | the machine's constraints of which registers may serve in each capacity. | |
1218 | The compiler will try both labelings, looking for one that is valid, and | |
1219 | will reload one or both registers only if neither labeling works. */ | |
1220 | #define REGNO_OK_FOR_INDEX_P(NUM) \ | |
1221 | ((NUM) < FIRST_PSEUDO_REGISTER \ | |
1222 | ? GPR_P (NUM) \ | |
1223 | : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) | |
1224 | ||
1225 | /* A C expression that places additional restrictions on the register class to | |
1226 | use when it is necessary to copy value X into a register in class CLASS. | |
1227 | The value is a register class; perhaps CLASS, or perhaps another, smaller | |
1228 | class. On many machines, the following definition is safe: | |
1229 | ||
1230 | #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS | |
1231 | ||
1232 | Sometimes returning a more restrictive class makes better code. For | |
1233 | example, on the 68000, when X is an integer constant that is in range for a | |
1234 | `moveq' instruction, the value of this macro is always `DATA_REGS' as long | |
1235 | as CLASS includes the data registers. Requiring a data register guarantees | |
1236 | that a `moveq' will be used. | |
1237 | ||
1238 | If X is a `const_double', by returning `NO_REGS' you can force X into a | |
1239 | memory constant. This is useful on certain machines where immediate | |
1240 | floating values cannot be loaded into certain kinds of registers. | |
1241 | ||
1242 | This declaration must be present. */ | |
1243 | #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS | |
1244 | ||
1245 | #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ | |
35f2d8ef | 1246 | frv_secondary_reload_class (CLASS, MODE, X) |
36a05131 BS |
1247 | |
1248 | #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ | |
35f2d8ef | 1249 | frv_secondary_reload_class (CLASS, MODE, X) |
36a05131 | 1250 | |
36a05131 BS |
1251 | /* A C expression for the maximum number of consecutive registers of |
1252 | class CLASS needed to hold a value of mode MODE. | |
1253 | ||
1254 | This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value | |
1255 | of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of | |
1256 | `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS. | |
1257 | ||
1258 | This macro helps control the handling of multiple-word values in | |
1259 | the reload pass. | |
1260 | ||
1261 | This declaration is required. */ | |
1262 | #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE) | |
1263 | ||
1264 | #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x))) | |
1265 | ||
2300b9dd | 1266 | /* 6-bit signed immediate. */ |
36a05131 | 1267 | #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31) |
2300b9dd | 1268 | /* 10-bit signed immediate. */ |
36a05131 BS |
1269 | #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511) |
1270 | /* Unused */ | |
1271 | #define CONST_OK_FOR_K(VALUE) 0 | |
2300b9dd | 1272 | /* 16-bit signed immediate. */ |
36a05131 | 1273 | #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767) |
2300b9dd | 1274 | /* 16-bit unsigned immediate. */ |
36a05131 | 1275 | #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535) |
2300b9dd | 1276 | /* 12-bit signed immediate that is negative. */ |
36a05131 BS |
1277 | #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1) |
1278 | /* Zero */ | |
1279 | #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) | |
2300b9dd | 1280 | /* 12-bit signed immediate that is negative. */ |
36a05131 BS |
1281 | #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047) |
1282 | ||
1283 | /* A C expression that defines the machine-dependent operand constraint letters | |
1284 | (`I', `J', `K', .. 'P') that specify particular ranges of integer values. | |
1285 | If C is one of those letters, the expression should check that VALUE, an | |
1286 | integer, is in the appropriate range and return 1 if so, 0 otherwise. If C | |
1287 | is not one of those letters, the value should be 0 regardless of VALUE. */ | |
1288 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
1289 | ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \ | |
1290 | : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ | |
1291 | : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ | |
1292 | : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ | |
1293 | : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ | |
1294 | : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ | |
1295 | : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ | |
1296 | : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ | |
1297 | : 0) | |
1298 | ||
1299 | ||
1300 | /* A C expression that defines the machine-dependent operand constraint letters | |
1301 | (`G', `H') that specify particular ranges of `const_double' values. | |
1302 | ||
1303 | If C is one of those letters, the expression should check that VALUE, an RTX | |
1304 | of code `const_double', is in the appropriate range and return 1 if so, 0 | |
1305 | otherwise. If C is not one of those letters, the value should be 0 | |
1306 | regardless of VALUE. | |
1307 | ||
1308 | `const_double' is used for all floating-point constants and for `DImode' | |
1309 | fixed-point constants. A given letter can accept either or both kinds of | |
1310 | values. It can use `GET_MODE' to distinguish between these kinds. */ | |
1311 | ||
1312 | #define CONST_DOUBLE_OK_FOR_G(VALUE) \ | |
1313 | ((GET_MODE (VALUE) == VOIDmode \ | |
1314 | && CONST_DOUBLE_LOW (VALUE) == 0 \ | |
1315 | && CONST_DOUBLE_HIGH (VALUE) == 0) \ | |
1316 | || ((GET_MODE (VALUE) == SFmode \ | |
1317 | || GET_MODE (VALUE) == DFmode) \ | |
1318 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))) | |
1319 | ||
1320 | #define CONST_DOUBLE_OK_FOR_H(VALUE) 0 | |
1321 | ||
1322 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
1323 | ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \ | |
1324 | : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \ | |
1325 | : 0) | |
1326 | ||
1327 | /* A C expression that defines the optional machine-dependent constraint | |
1328 | letters (`Q', `R', `S', `T', `U') that can be used to segregate specific | |
1329 | types of operands, usually memory references, for the target machine. | |
1330 | Normally this macro will not be defined. If it is required for a particular | |
1331 | target machine, it should return 1 if VALUE corresponds to the operand type | |
1332 | represented by the constraint letter C. If C is not defined as an extra | |
1333 | constraint, the value returned should be 0 regardless of VALUE. | |
1334 | ||
1335 | For example, on the ROMP, load instructions cannot have their output in r0 | |
1336 | if the memory reference contains a symbolic address. Constraint letter `Q' | |
1337 | is defined as representing a memory address that does *not* contain a | |
1338 | symbolic address. An alternative is specified with a `Q' constraint on the | |
1339 | input and `r' on the output. The next alternative specifies `m' on the | |
1340 | input and a register class that does not include r0 on the output. */ | |
1341 | ||
34208acf | 1342 | /* 12-bit relocations. */ |
36a05131 | 1343 | #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \ |
34208acf | 1344 | (got12_operand (VALUE, GET_MODE (VALUE))) |
36a05131 BS |
1345 | |
1346 | /* Double word memory ops that take one instruction. */ | |
1347 | #define EXTRA_CONSTRAINT_FOR_R(VALUE) \ | |
1348 | (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE))) | |
1349 | ||
1350 | /* SYMBOL_REF */ | |
c557edf4 RS |
1351 | #define EXTRA_CONSTRAINT_FOR_S(VALUE) \ |
1352 | (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode)) | |
36a05131 BS |
1353 | |
1354 | /* Double word memory ops that take two instructions. */ | |
1355 | #define EXTRA_CONSTRAINT_FOR_T(VALUE) \ | |
1356 | (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE))) | |
1357 | ||
1358 | /* Memory operand for conditional execution. */ | |
1359 | #define EXTRA_CONSTRAINT_FOR_U(VALUE) \ | |
1360 | (condexec_memory_operand (VALUE, GET_MODE (VALUE))) | |
1361 | ||
1362 | #define EXTRA_CONSTRAINT(VALUE, C) \ | |
1363 | ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \ | |
1364 | : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \ | |
1365 | : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \ | |
1366 | : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \ | |
1367 | : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \ | |
1368 | : 0) | |
1369 | ||
7034d31b NC |
1370 | #define EXTRA_MEMORY_CONSTRAINT(C,STR) \ |
1371 | ((C) == 'U' || (C) == 'R' || (C) == 'T') | |
1372 | ||
bef8809e AH |
1373 | #define CONSTRAINT_LEN(C, STR) \ |
1374 | ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR))) | |
1375 | ||
1376 | #define REG_CLASS_FROM_CONSTRAINT(C, STR) \ | |
1377 | (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \ | |
1378 | ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \ | |
1379 | ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \ | |
1380 | ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \ | |
1381 | ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \ | |
1382 | REG_CLASS_FROM_LETTER ((C))) | |
1383 | ||
36a05131 BS |
1384 | \f |
1385 | /* Basic Stack Layout. */ | |
1386 | ||
1387 | /* Structure to describe information about a saved range of registers */ | |
1388 | ||
1389 | typedef struct frv_stack_regs { | |
1390 | const char * name; /* name of the register ranges */ | |
1391 | int first; /* first register in the range */ | |
1392 | int last; /* last register in the range */ | |
1393 | int size_1word; /* # of bytes to be stored via 1 word stores */ | |
1394 | int size_2words; /* # of bytes to be stored via 2 word stores */ | |
1395 | unsigned char field_p; /* true if the registers are a single SPR */ | |
1396 | unsigned char dword_p; /* true if we can do dword stores */ | |
1397 | unsigned char special_p; /* true if the regs have a fixed save loc. */ | |
1398 | } frv_stack_regs_t; | |
1399 | ||
1400 | /* Register ranges to look into saving. */ | |
1401 | #define STACK_REGS_GPR 0 /* Gprs (normally gr16..gr31, gr48..gr63) */ | |
1402 | #define STACK_REGS_FPR 1 /* Fprs (normally fr16..fr31, fr48..fr63) */ | |
1403 | #define STACK_REGS_LR 2 /* LR register */ | |
1404 | #define STACK_REGS_CC 3 /* CCrs (normally not saved) */ | |
1405 | #define STACK_REGS_LCR 5 /* lcr register */ | |
1406 | #define STACK_REGS_STDARG 6 /* stdarg registers */ | |
1407 | #define STACK_REGS_STRUCT 7 /* structure return (gr3) */ | |
1408 | #define STACK_REGS_FP 8 /* FP register */ | |
1409 | #define STACK_REGS_MAX 9 /* # of register ranges */ | |
1410 | ||
1411 | /* Values for save_p field. */ | |
1412 | #define REG_SAVE_NO_SAVE 0 /* register not saved */ | |
1413 | #define REG_SAVE_1WORD 1 /* save the register */ | |
1414 | #define REG_SAVE_2WORDS 2 /* save register and register+1 */ | |
1415 | ||
1416 | /* Structure used to define the frv stack. */ | |
1417 | ||
1418 | typedef struct frv_stack { | |
1419 | int total_size; /* total bytes allocated for stack */ | |
1420 | int vars_size; /* variable save area size */ | |
1421 | int parameter_size; /* outgoing parameter size */ | |
1422 | int stdarg_size; /* size of regs needed to be saved for stdarg */ | |
1423 | int regs_size; /* size of the saved registers */ | |
1424 | int regs_size_1word; /* # of bytes to be stored via 1 word stores */ | |
1425 | int regs_size_2words; /* # of bytes to be stored via 2 word stores */ | |
1426 | int header_size; /* size of the old FP, struct ret., LR save */ | |
1427 | int pretend_size; /* size of pretend args */ | |
1428 | int vars_offset; /* offset to save local variables from new SP*/ | |
1429 | int regs_offset; /* offset to save registers from new SP */ | |
1430 | /* register range information */ | |
1431 | frv_stack_regs_t regs[STACK_REGS_MAX]; | |
1432 | /* offset to store each register */ | |
1433 | int reg_offset[FIRST_PSEUDO_REGISTER]; | |
1434 | /* whether to save register (& reg+1) */ | |
1435 | unsigned char save_p[FIRST_PSEUDO_REGISTER]; | |
1436 | } frv_stack_t; | |
1437 | ||
1438 | /* Define this macro if pushing a word onto the stack moves the stack pointer | |
1439 | to a smaller address. */ | |
1440 | #define STACK_GROWS_DOWNWARD 1 | |
1441 | ||
a4d05547 | 1442 | /* Define this macro to nonzero if the addresses of local variable slots |
f62c8a5c JJ |
1443 | are at negative offsets from the frame pointer. */ |
1444 | #define FRAME_GROWS_DOWNWARD 1 | |
36a05131 BS |
1445 | |
1446 | /* Offset from the frame pointer to the first local variable slot to be | |
1447 | allocated. | |
1448 | ||
1449 | If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the | |
1450 | first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by | |
1451 | adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */ | |
1452 | #define STARTING_FRAME_OFFSET 0 | |
1453 | ||
1454 | /* Offset from the stack pointer register to the first location at which | |
1455 | outgoing arguments are placed. If not specified, the default value of zero | |
1456 | is used. This is the proper value for most machines. | |
1457 | ||
1458 | If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first | |
1459 | location at which outgoing arguments are placed. */ | |
1460 | #define STACK_POINTER_OFFSET 0 | |
1461 | ||
1462 | /* Offset from the argument pointer register to the first argument's address. | |
1463 | On some machines it may depend on the data type of the function. | |
1464 | ||
1465 | If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first | |
1466 | argument's address. */ | |
1467 | #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
1468 | ||
1469 | /* A C expression whose value is RTL representing the address in a stack frame | |
1470 | where the pointer to the caller's frame is stored. Assume that FRAMEADDR is | |
1471 | an RTL expression for the address of the stack frame itself. | |
1472 | ||
1473 | If you don't define this macro, the default is to return the value of | |
1474 | FRAMEADDR--that is, the stack frame address is also the address of the stack | |
1475 | word that points to the previous frame. */ | |
1476 | #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR) | |
1477 | ||
1478 | /* A C expression whose value is RTL representing the value of the return | |
1479 | address for the frame COUNT steps up from the current frame, after the | |
1480 | prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame | |
1481 | pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is | |
1482 | defined. | |
1483 | ||
1484 | The value of the expression must always be the correct address when COUNT is | |
1485 | zero, but may be `NULL_RTX' if there is not way to determine the return | |
1486 | address of other frames. */ | |
1487 | #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR) | |
1488 | ||
36a05131 BS |
1489 | #define RETURN_POINTER_REGNUM LR_REGNO |
1490 | ||
1491 | /* A C expression whose value is RTL representing the location of the incoming | |
1492 | return address at the beginning of any function, before the prologue. This | |
1493 | RTL is either a `REG', indicating that the return value is saved in `REG', | |
1494 | or a `MEM' representing a location in the stack. | |
1495 | ||
1496 | You only need to define this macro if you want to support call frame | |
1497 | debugging information like that provided by DWARF 2. */ | |
1498 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM) | |
1499 | ||
1500 | \f | |
1501 | /* Register That Address the Stack Frame. */ | |
1502 | ||
1503 | /* The register number of the stack pointer register, which must also be a | |
1504 | fixed register according to `FIXED_REGISTERS'. On most machines, the | |
1505 | hardware determines which register this is. */ | |
1506 | #define STACK_POINTER_REGNUM (GPR_FIRST + 1) | |
1507 | ||
1508 | /* The register number of the frame pointer register, which is used to access | |
1509 | automatic variables in the stack frame. On some machines, the hardware | |
1510 | determines which register this is. On other machines, you can choose any | |
1511 | register you wish for this purpose. */ | |
1512 | #define FRAME_POINTER_REGNUM (GPR_FIRST + 2) | |
1513 | ||
1514 | /* The register number of the arg pointer register, which is used to access the | |
1515 | function's argument list. On some machines, this is the same as the frame | |
1516 | pointer register. On some machines, the hardware determines which register | |
1517 | this is. On other machines, you can choose any register you wish for this | |
1518 | purpose. If this is not the same register as the frame pointer register, | |
1519 | then you must mark it as a fixed register according to `FIXED_REGISTERS', or | |
1520 | arrange to be able to eliminate it. */ | |
1521 | ||
1522 | /* On frv this is a fake register that is eliminated in | |
1523 | terms of either the frame pointer or stack pointer. */ | |
1524 | #define ARG_POINTER_REGNUM AP_FIRST | |
1525 | ||
1526 | /* Register numbers used for passing a function's static chain pointer. If | |
1527 | register windows are used, the register number as seen by the called | |
1528 | function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as | |
1529 | seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers | |
1530 | are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined. | |
1531 | ||
1532 | The static chain register need not be a fixed register. | |
1533 | ||
1534 | If the static chain is passed in memory, these macros should not be defined; | |
1535 | instead, the next two macros should be defined. */ | |
1536 | #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7) | |
1537 | #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7) | |
1538 | ||
1539 | \f | |
1540 | /* Eliminating the Frame Pointer and the Arg Pointer. */ | |
1541 | ||
36a05131 BS |
1542 | /* If defined, this macro specifies a table of register pairs used to eliminate |
1543 | unneeded registers that point into the stack frame. If it is not defined, | |
1544 | the only elimination attempted by the compiler is to replace references to | |
1545 | the frame pointer with references to the stack pointer. | |
1546 | ||
1547 | The definition of this macro is a list of structure initializations, each of | |
1548 | which specifies an original and replacement register. | |
1549 | ||
1550 | On some machines, the position of the argument pointer is not known until | |
1551 | the compilation is completed. In such a case, a separate hard register must | |
1552 | be used for the argument pointer. This register can be eliminated by | |
1553 | replacing it with either the frame pointer or the argument pointer, | |
1554 | depending on whether or not the frame pointer has been eliminated. | |
1555 | ||
1556 | In this case, you might specify: | |
1557 | #define ELIMINABLE_REGS \ | |
1558 | {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1559 | {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
1560 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
1561 | ||
1562 | Note that the elimination of the argument pointer with the stack pointer is | |
1563 | specified first since that is the preferred elimination. */ | |
1564 | ||
1565 | #define ELIMINABLE_REGS \ | |
1566 | { \ | |
1567 | {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1568 | {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
1569 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ | |
1570 | } | |
1571 | ||
36a05131 BS |
1572 | /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the |
1573 | initial difference between the specified pair of registers. This macro must | |
1574 | be defined if `ELIMINABLE_REGS' is defined. */ | |
1575 | ||
1576 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1577 | (OFFSET) = frv_initial_elimination_offset (FROM, TO) | |
1578 | ||
1579 | \f | |
1580 | /* Passing Function Arguments on the Stack. */ | |
1581 | ||
1582 | /* If defined, the maximum amount of space required for outgoing arguments will | |
1583 | be computed and placed into the variable | |
38173d38 | 1584 | `crtl->outgoing_args_size'. No space will be pushed onto the |
36a05131 BS |
1585 | stack for each call; instead, the function prologue should increase the |
1586 | stack frame size by this amount. | |
1587 | ||
1588 | Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not | |
1589 | proper. */ | |
1590 | #define ACCUMULATE_OUTGOING_ARGS 1 | |
1591 | ||
36a05131 | 1592 | \f |
36a05131 BS |
1593 | /* The number of register assigned to holding function arguments. */ |
1594 | ||
1595 | #define FRV_NUM_ARG_REGS 6 | |
1596 | ||
36a05131 BS |
1597 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
1598 | frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE) | |
1599 | ||
1600 | /* Define this macro if the target machine has "register windows", so that the | |
1601 | register in which a function sees an arguments is not necessarily the same | |
1602 | as the one in which the caller passed the argument. | |
1603 | ||
1604 | For such machines, `FUNCTION_ARG' computes the register in which the caller | |
1605 | passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar | |
1606 | fashion to tell the function being called where the arguments will arrive. | |
1607 | ||
1608 | If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both | |
1609 | purposes. */ | |
1610 | ||
1611 | #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ | |
1612 | frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE) | |
1613 | ||
36a05131 BS |
1614 | /* A C type for declaring a variable that is used as the first argument of |
1615 | `FUNCTION_ARG' and other related values. For some target machines, the type | |
1616 | `int' suffices and can hold the number of bytes of argument so far. | |
1617 | ||
1618 | There is no need to record in `CUMULATIVE_ARGS' anything about the arguments | |
1619 | that have been passed on the stack. The compiler has other variables to | |
1620 | keep track of that. For target machines on which all arguments are passed | |
1621 | on the stack, there is no need to store anything in `CUMULATIVE_ARGS'; | |
1622 | however, the data structure must exist and should not be empty, so use | |
1623 | `int'. */ | |
1624 | #define CUMULATIVE_ARGS int | |
1625 | ||
1626 | /* A C statement (sans semicolon) for initializing the variable CUM for the | |
1627 | state at the beginning of the argument list. The variable has type | |
1628 | `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type | |
1629 | of the function which will receive the args, or 0 if the args are to a | |
1630 | compiler support library function. The value of INDIRECT is nonzero when | |
1631 | processing an indirect call, for example a call through a function pointer. | |
1632 | The value of INDIRECT is zero for a call to an explicitly named function, a | |
1633 | library function call, or when `INIT_CUMULATIVE_ARGS' is used to find | |
1634 | arguments for the function being compiled. | |
1635 | ||
1636 | When processing a call to a compiler support library function, LIBNAME | |
1637 | identifies which one. It is a `symbol_ref' rtx which contains the name of | |
1638 | the function, as a string. LIBNAME is 0 when an ordinary C function call is | |
1639 | being processed. Thus, each time this macro is called, either LIBNAME or | |
1640 | FNTYPE is nonzero, but never both of them at once. */ | |
1641 | ||
0f6937fe | 1642 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ |
563a317a | 1643 | frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE) |
36a05131 BS |
1644 | |
1645 | /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the | |
1646 | arguments for the function being compiled. If this macro is undefined, | |
1647 | `INIT_CUMULATIVE_ARGS' is used instead. | |
1648 | ||
1649 | The value passed for LIBNAME is always 0, since library routines with | |
7ec022b2 | 1650 | special calling conventions are never compiled with GCC. The argument |
36a05131 BS |
1651 | LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */ |
1652 | ||
1653 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ | |
563a317a | 1654 | frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE) |
36a05131 BS |
1655 | |
1656 | /* A C statement (sans semicolon) to update the summarizer variable CUM to | |
1657 | advance past an argument in the argument list. The values MODE, TYPE and | |
1658 | NAMED describe that argument. Once this is done, the variable CUM is | |
1659 | suitable for analyzing the *following* argument with `FUNCTION_ARG', etc. | |
1660 | ||
1661 | This macro need not do anything if the argument in question was passed on | |
1662 | the stack. The compiler knows how to track the amount of stack space used | |
1663 | for arguments without any special help. */ | |
1664 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
1665 | frv_function_arg_advance (&CUM, MODE, TYPE, NAMED) | |
1666 | ||
1667 | /* If defined, a C expression that gives the alignment boundary, in bits, of an | |
1668 | argument with the specified mode and type. If it is not defined, | |
1669 | `PARM_BOUNDARY' is used for all arguments. */ | |
1670 | ||
1671 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1672 | frv_function_arg_boundary (MODE, TYPE) | |
1673 | ||
1674 | /* A C expression that is nonzero if REGNO is the number of a hard register in | |
1675 | which function arguments are sometimes passed. This does *not* include | |
1676 | implicit arguments such as the static chain and the structure-value address. | |
1677 | On many machines, no registers can be used for this purpose since all | |
1678 | function arguments are pushed on the stack. */ | |
1679 | #define FUNCTION_ARG_REGNO_P(REGNO) \ | |
1680 | ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM)) | |
1681 | ||
1682 | \f | |
1683 | /* How Scalar Function Values are Returned. */ | |
1684 | ||
1685 | /* The number of the hard register that is used to return a scalar value from a | |
1686 | function call. */ | |
1687 | #define RETURN_VALUE_REGNUM (GPR_FIRST + 8) | |
1688 | ||
219d92a4 | 1689 | #define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO) |
36a05131 BS |
1690 | |
1691 | \f | |
1692 | /* How Large Values are Returned. */ | |
1693 | ||
56f42830 | 1694 | /* The number of the register that is used to pass the structure |
8ac411c7 KH |
1695 | value address. */ |
1696 | #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3) | |
36a05131 BS |
1697 | |
1698 | \f | |
1699 | /* Function Entry and Exit. */ | |
1700 | ||
1701 | /* Define this macro as a C expression that is nonzero if the return | |
1702 | instruction or the function epilogue ignores the value of the stack pointer; | |
1703 | in other words, if it is safe to delete an instruction to adjust the stack | |
1704 | pointer before a return from the function. | |
1705 | ||
1706 | Note that this macro's value is relevant only for functions for which frame | |
1707 | pointers are maintained. It is never safe to delete a final stack | |
1708 | adjustment in a function that has no frame pointer, and the compiler knows | |
1709 | this regardless of `EXIT_IGNORE_STACK'. */ | |
1710 | #define EXIT_IGNORE_STACK 1 | |
36a05131 BS |
1711 | \f |
1712 | /* Generating Code for Profiling. */ | |
1713 | ||
1714 | /* A C statement or compound statement to output to FILE some assembler code to | |
1715 | call the profiling subroutine `mcount'. Before calling, the assembler code | |
1716 | must load the address of a counter variable into a register where `mcount' | |
1717 | expects to find the address. The name of this variable is `LP' followed by | |
1718 | the number LABELNO, so you would generate the name using `LP%d' in a | |
1719 | `fprintf'. | |
1720 | ||
1721 | The details of how the address should be passed to `mcount' are determined | |
7ec022b2 | 1722 | by your operating system environment, not by GCC. To figure them out, |
36a05131 BS |
1723 | compile a small program for profiling using the system's installed C |
1724 | compiler and look at the assembler code that results. | |
1725 | ||
1726 | This declaration must be present, but it can be an abort if profiling is | |
1727 | not implemented. */ | |
1728 | ||
b16c1435 | 1729 | #define FUNCTION_PROFILER(FILE, LABELNO) |
36a05131 | 1730 | |
36a05131 BS |
1731 | /* Trampolines for Nested Functions. */ |
1732 | ||
1733 | /* A C expression for the size in bytes of the trampoline, as an integer. */ | |
1734 | #define TRAMPOLINE_SIZE frv_trampoline_size () | |
1735 | ||
1736 | /* Alignment required for trampolines, in bits. | |
1737 | ||
1738 | If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for | |
1739 | aligning trampolines. */ | |
34208acf | 1740 | #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32) |
36a05131 | 1741 | |
36a05131 BS |
1742 | /* Define this macro if trampolines need a special subroutine to do their work. |
1743 | The macro should expand to a series of `asm' statements which will be | |
7ec022b2 | 1744 | compiled with GCC. They go in a library function named |
36a05131 BS |
1745 | `__transfer_from_trampoline'. |
1746 | ||
1747 | If you need to avoid executing the ordinary prologue code of a compiled C | |
1748 | function when you jump to the subroutine, you can do so by placing a special | |
1749 | label of your own in the assembler code. Use one `asm' statement to | |
1750 | generate an assembler label, and another to make the label global. Then | |
1751 | trampolines can use that label to jump directly to your special assembler | |
1752 | code. */ | |
1753 | ||
1754 | #ifdef __FRV_UNDERSCORE__ | |
1755 | #define TRAMPOLINE_TEMPLATE_NAME "___trampoline_template" | |
1756 | #else | |
1757 | #define TRAMPOLINE_TEMPLATE_NAME "__trampoline_template" | |
1758 | #endif | |
1759 | ||
34208acf AO |
1760 | #define Twrite _write |
1761 | ||
1762 | #if ! __FRV_FDPIC__ | |
36a05131 | 1763 | #define TRANSFER_FROM_TRAMPOLINE \ |
34208acf | 1764 | extern int Twrite (int, const void *, unsigned); \ |
36a05131 BS |
1765 | \ |
1766 | void \ | |
f2206911 | 1767 | __trampoline_setup (short * addr, int size, int fnaddr, int sc) \ |
36a05131 BS |
1768 | { \ |
1769 | extern short __trampoline_template[]; \ | |
1770 | short * to = addr; \ | |
1771 | short * from = &__trampoline_template[0]; \ | |
1772 | int i; \ | |
1773 | \ | |
1774 | if (size < 20) \ | |
1775 | { \ | |
34208acf | 1776 | Twrite (2, "__trampoline_setup bad size\n", \ |
36a05131 BS |
1777 | sizeof ("__trampoline_setup bad size\n") - 1); \ |
1778 | exit (-1); \ | |
1779 | } \ | |
1780 | \ | |
1781 | to[0] = from[0]; \ | |
1782 | to[1] = (short)(fnaddr); \ | |
1783 | to[2] = from[2]; \ | |
1784 | to[3] = (short)(sc); \ | |
1785 | to[4] = from[4]; \ | |
1786 | to[5] = (short)(fnaddr >> 16); \ | |
1787 | to[6] = from[6]; \ | |
1788 | to[7] = (short)(sc >> 16); \ | |
1789 | to[8] = from[8]; \ | |
1790 | to[9] = from[9]; \ | |
1791 | \ | |
1792 | for (i = 0; i < 20; i++) \ | |
1793 | __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ | |
1794 | } \ | |
1795 | \ | |
1796 | __asm__("\n" \ | |
1797 | "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ | |
1798 | "\t.text\n" \ | |
1799 | TRAMPOLINE_TEMPLATE_NAME ":\n" \ | |
1800 | "\tsetlos #0, gr6\n" /* jump register */ \ | |
1801 | "\tsetlos #0, gr7\n" /* static chain */ \ | |
1802 | "\tsethi #0, gr6\n" \ | |
1803 | "\tsethi #0, gr7\n" \ | |
1804 | "\tjmpl @(gr0,gr6)\n"); | |
34208acf AO |
1805 | #else |
1806 | #define TRANSFER_FROM_TRAMPOLINE \ | |
1807 | extern int Twrite (int, const void *, unsigned); \ | |
1808 | \ | |
1809 | void \ | |
1810 | __trampoline_setup (addr, size, fnaddr, sc) \ | |
1811 | short * addr; \ | |
1812 | int size; \ | |
1813 | int fnaddr; \ | |
1814 | int sc; \ | |
1815 | { \ | |
1816 | extern short __trampoline_template[]; \ | |
1817 | short * from = &__trampoline_template[0]; \ | |
1818 | int i; \ | |
1819 | short **desc = (short **)addr; \ | |
1820 | short * to = addr + 4; \ | |
1821 | \ | |
1822 | if (size != 32) \ | |
1823 | { \ | |
1824 | Twrite (2, "__trampoline_setup bad size\n", \ | |
1825 | sizeof ("__trampoline_setup bad size\n") - 1); \ | |
1826 | exit (-1); \ | |
1827 | } \ | |
1828 | \ | |
1829 | /* Create a function descriptor with the address of the code below | |
1830 | and NULL as the FDPIC value. We don't need the real GOT value | |
1831 | here, since we don't use it, so we use NULL, that is just as | |
1832 | good. */ \ | |
1833 | desc[0] = to; \ | |
1834 | desc[1] = NULL; \ | |
1835 | size -= 8; \ | |
1836 | \ | |
1837 | to[0] = from[0]; \ | |
1838 | to[1] = (short)(fnaddr); \ | |
1839 | to[2] = from[2]; \ | |
1840 | to[3] = (short)(sc); \ | |
1841 | to[4] = from[4]; \ | |
1842 | to[5] = (short)(fnaddr >> 16); \ | |
1843 | to[6] = from[6]; \ | |
1844 | to[7] = (short)(sc >> 16); \ | |
1845 | to[8] = from[8]; \ | |
1846 | to[9] = from[9]; \ | |
1847 | to[10] = from[10]; \ | |
1848 | to[11] = from[11]; \ | |
1849 | \ | |
1850 | for (i = 0; i < size; i++) \ | |
1851 | __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ | |
1852 | } \ | |
1853 | \ | |
1854 | __asm__("\n" \ | |
1855 | "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ | |
1856 | "\t.text\n" \ | |
1857 | TRAMPOLINE_TEMPLATE_NAME ":\n" \ | |
1858 | "\tsetlos #0, gr6\n" /* Jump register. */ \ | |
1859 | "\tsetlos #0, gr7\n" /* Static chain. */ \ | |
1860 | "\tsethi #0, gr6\n" \ | |
1861 | "\tsethi #0, gr7\n" \ | |
1862 | "\tldd @(gr6,gr0),gr14\n" \ | |
1863 | "\tjmpl @(gr14,gr0)\n" \ | |
1864 | ); | |
1865 | #endif | |
36a05131 | 1866 | |
36a05131 BS |
1867 | \f |
1868 | /* Addressing Modes. */ | |
1869 | ||
36a05131 BS |
1870 | /* A number, the maximum number of registers that can appear in a valid memory |
1871 | address. Note that it is up to you to specify a value equal to the maximum | |
331d9186 | 1872 | number that `TARGET_LEGITIMATE_ADDRESS_P' would ever accept. */ |
36a05131 BS |
1873 | #define MAX_REGS_PER_ADDRESS 2 |
1874 | ||
36a05131 BS |
1875 | /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for |
1876 | use as a base register. For hard registers, it should always accept those | |
1877 | which the hardware permits and reject the others. Whether the macro accepts | |
1878 | or rejects pseudo registers must be controlled by `REG_OK_STRICT' as | |
1879 | described above. This usually requires two variant definitions, of which | |
1880 | `REG_OK_STRICT' controls the one actually used. */ | |
1881 | #ifdef REG_OK_STRICT | |
1882 | #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X)) | |
1883 | #else | |
1884 | #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X)) | |
1885 | #endif | |
1886 | ||
1887 | /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for | |
1888 | use as an index register. | |
1889 | ||
1890 | The difference between an index register and a base register is that the | |
1891 | index register may be scaled. If an address involves the sum of two | |
1892 | registers, neither one of them scaled, then either one may be labeled the | |
1893 | "base" and the other the "index"; but whichever labeling is used must fit | |
1894 | the machine's constraints of which registers may serve in each capacity. | |
1895 | The compiler will try both labelings, looking for one that is valid, and | |
1896 | will reload one or both registers only if neither labeling works. */ | |
1897 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) | |
1898 | ||
34208acf | 1899 | #define FIND_BASE_TERM frv_find_base_term |
36a05131 | 1900 | |
36a05131 BS |
1901 | /* A C expression that is nonzero if X is a legitimate constant for an |
1902 | immediate operand on the target machine. You can assume that X satisfies | |
1903 | `CONSTANT_P', so you need not check this. In fact, `1' is a suitable | |
1904 | definition for this macro on machines where anything `CONSTANT_P' is valid. */ | |
1905 | #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X) | |
1906 | ||
1907 | /* The load-and-update commands allow pre-modification in addresses. | |
1908 | The index has to be in a register. */ | |
1909 | #define HAVE_PRE_MODIFY_REG 1 | |
1910 | ||
1911 | \f | |
f1c9d07d EC |
1912 | /* We define extra CC modes in frv-modes.def so we need a selector. */ |
1913 | ||
036ff63f | 1914 | #define SELECT_CC_MODE frv_select_cc_mode |
36a05131 BS |
1915 | |
1916 | /* A C expression whose value is one if it is always safe to reverse a | |
1917 | comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for | |
1918 | a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)' | |
1919 | must be zero. | |
1920 | ||
1921 | You need not define this macro if it would always returns zero or if the | |
1922 | floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For | |
981f6289 | 1923 | example, here is the definition used on the SPARC, where floating-point |
36a05131 BS |
1924 | inequality comparisons are always given `CCFPEmode': |
1925 | ||
1926 | #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */ | |
1927 | ||
1928 | /* On frv, don't consider floating point comparisons to be reversible. In | |
87b483a1 | 1929 | theory, fp equality comparisons can be reversible. */ |
036ff63f RS |
1930 | #define REVERSIBLE_CC_MODE(MODE) \ |
1931 | ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode) | |
36a05131 BS |
1932 | |
1933 | /* Frv CCR_MODE's are not reversible. */ | |
1934 | #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0 | |
1935 | ||
1936 | \f | |
1937 | /* Describing Relative Costs of Operations. */ | |
1938 | ||
36a05131 BS |
1939 | /* A C expression for the cost of a branch instruction. A value of 1 is the |
1940 | default; other values are interpreted relative to that. */ | |
3a4fd356 | 1941 | #define BRANCH_COST(speed_p, predictable_p) frv_branch_cost_int |
36a05131 BS |
1942 | |
1943 | /* Define this macro as a C expression which is nonzero if accessing less than | |
1944 | a word of memory (i.e. a `char' or a `short') is no faster than accessing a | |
1945 | word of memory, i.e., if such access require more than one instruction or if | |
1946 | there is no difference in cost between byte and (aligned) word loads. | |
1947 | ||
1948 | When this macro is not defined, the compiler will access a field by finding | |
1949 | the smallest containing object; when it is defined, a fullword load will be | |
1950 | used if alignment permits. Unless bytes accesses are faster than word | |
1951 | accesses, using word accesses is preferable since it may eliminate | |
1952 | subsequent memory access if subsequent accesses occur to other fields in the | |
1953 | same word of the structure, but to different bytes. */ | |
1954 | #define SLOW_BYTE_ACCESS 1 | |
1955 | ||
36a05131 BS |
1956 | /* Define this macro if it is as good or better to call a constant function |
1957 | address than to call an address kept in a register. */ | |
1958 | #define NO_FUNCTION_CSE | |
1959 | ||
36a05131 BS |
1960 | \f |
1961 | /* Dividing the output into sections. */ | |
1962 | ||
1963 | /* A C expression whose value is a string containing the assembler operation | |
1964 | that should precede instructions and read-only data. Normally `".text"' is | |
1965 | right. */ | |
1966 | #define TEXT_SECTION_ASM_OP "\t.text" | |
1967 | ||
1968 | /* A C expression whose value is a string containing the assembler operation to | |
1969 | identify the following data as writable initialized data. Normally | |
1970 | `".data"' is right. */ | |
1971 | #define DATA_SECTION_ASM_OP "\t.data" | |
1972 | ||
1973 | /* If defined, a C expression whose value is a string containing the | |
1974 | assembler operation to identify the following data as | |
1975 | uninitialized global data. If not defined, and neither | |
1976 | `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined, | |
1977 | uninitialized global data will be output in the data section if | |
1978 | `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be | |
1979 | used. */ | |
1980 | #define BSS_SECTION_ASM_OP "\t.section .bss,\"aw\"" | |
1981 | ||
1982 | /* Short Data Support */ | |
1983 | #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" | |
36a05131 BS |
1984 | |
1985 | /* On svr4, we *do* have support for the .init and .fini sections, and we | |
1986 | can put stuff in there to be executed before and after `main'. We let | |
1987 | crtstuff.c and other files know this by defining the following symbols. | |
1988 | The definitions say how to change sections to the .init and .fini | |
1989 | sections. This is the same for all known svr4 assemblers. | |
1990 | ||
1991 | The standard System V.4 macros will work, but they look ugly in the | |
1992 | assembly output, so redefine them. */ | |
1993 | ||
1994 | #undef INIT_SECTION_ASM_OP | |
1995 | #undef FINI_SECTION_ASM_OP | |
1996 | #define INIT_SECTION_ASM_OP "\t.section .init,\"ax\"" | |
1997 | #define FINI_SECTION_ASM_OP "\t.section .fini,\"ax\"" | |
1998 | ||
90a63880 RH |
1999 | #undef CTORS_SECTION_ASM_OP |
2000 | #undef DTORS_SECTION_ASM_OP | |
2001 | #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\"" | |
2002 | #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\"" | |
2003 | ||
36a05131 BS |
2004 | /* A C expression whose value is a string containing the assembler operation to |
2005 | switch to the fixup section that records all initialized pointers in a -fpic | |
2006 | program so they can be changed program startup time if the program is loaded | |
2007 | at a different address than linked for. */ | |
2008 | #define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\"" | |
36a05131 BS |
2009 | \f |
2010 | /* Position Independent Code. */ | |
2011 | ||
2012 | /* A C expression that is nonzero if X is a legitimate immediate operand on the | |
2013 | target machine when generating position independent code. You can assume | |
2014 | that X satisfies `CONSTANT_P', so you need not check this. You can also | |
2015 | assume FLAG_PIC is true, so you need not check it either. You need not | |
2016 | define this macro if all constants (including `SYMBOL_REF') can be immediate | |
2017 | operands when generating position independent code. */ | |
2018 | #define LEGITIMATE_PIC_OPERAND_P(X) \ | |
2019 | ( GET_CODE (X) == CONST_INT \ | |
2020 | || GET_CODE (X) == CONST_DOUBLE \ | |
2021 | || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \ | |
6de9cd9a | 2022 | || got12_operand (X, VOIDmode)) \ |
36a05131 BS |
2023 | |
2024 | \f | |
2025 | /* The Overall Framework of an Assembler File. */ | |
2026 | ||
2027 | /* A C string constant describing how to begin a comment in the target | |
2028 | assembler language. The compiler assumes that the comment will end at the | |
2029 | end of the line. */ | |
2030 | #define ASM_COMMENT_START ";" | |
2031 | ||
2032 | /* A C string constant for text to be output before each `asm' statement or | |
2033 | group of consecutive ones. Normally this is `"#APP"', which is a comment | |
2034 | that has no effect on most assemblers but tells the GNU assembler that it | |
2035 | must check the lines that follow for all valid assembler constructs. */ | |
2036 | #define ASM_APP_ON "#APP\n" | |
2037 | ||
2038 | /* A C string constant for text to be output after each `asm' statement or | |
2039 | group of consecutive ones. Normally this is `"#NO_APP"', which tells the | |
2040 | GNU assembler to resume making the time-saving assumptions that are valid | |
2041 | for ordinary compiler output. */ | |
2042 | #define ASM_APP_OFF "#NO_APP\n" | |
2043 | ||
2044 | \f | |
2045 | /* Output of Data. */ | |
2046 | ||
2047 | /* This is how to output a label to dwarf/dwarf2. */ | |
2048 | #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \ | |
2049 | do { \ | |
2050 | fprintf (STREAM, "\t.picptr\t"); \ | |
2051 | assemble_name (STREAM, LABEL); \ | |
2052 | } while (0) | |
2053 | ||
2054 | /* Whether to emit the gas specific dwarf2 line number support. */ | |
2055 | #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC) | |
2056 | \f | |
2057 | /* Output of Uninitialized Variables. */ | |
2058 | ||
2059 | /* A C statement (sans semicolon) to output to the stdio stream STREAM the | |
2060 | assembler definition of a local-common-label named NAME whose size is SIZE | |
2061 | bytes. The variable ROUNDED is the size rounded up to whatever alignment | |
2062 | the caller wants. | |
2063 | ||
2064 | Use the expression `assemble_name (STREAM, NAME)' to output the name itself; | |
2065 | before and after that, output the additional assembler syntax for defining | |
2066 | the name, and a newline. | |
2067 | ||
2068 | This macro controls how the assembler definitions of uninitialized static | |
2069 | variables are output. */ | |
2070 | #undef ASM_OUTPUT_LOCAL | |
2071 | ||
2072 | /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate, | |
2073 | explicit argument. If you define this macro, it is used in place of | |
2074 | `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required | |
2075 | alignment of the variable. The alignment is specified as the number of | |
2076 | bits. | |
2077 | ||
2078 | Defined in svr4.h. */ | |
2079 | #undef ASM_OUTPUT_ALIGNED_LOCAL | |
2080 | ||
2081 | /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */ | |
2082 | extern int size_directive_output; | |
2083 | ||
2084 | /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional | |
2085 | parameter - the DECL of variable to be output, if there is one. | |
2086 | This macro can be called with DECL == NULL_TREE. If you define | |
2087 | this macro, it is used in place of `ASM_OUTPUT_LOCAL' and | |
2088 | `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in | |
2089 | handling the destination of the variable. */ | |
2090 | #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL | |
2091 | #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ | |
2092 | do { \ | |
0f6e5d45 | 2093 | if ((SIZE) > 0 && (SIZE) <= g_switch_value) \ |
d6b5193b | 2094 | switch_to_section (get_named_section (NULL, ".sbss", 0)); \ |
36a05131 | 2095 | else \ |
d6b5193b | 2096 | switch_to_section (bss_section); \ |
36a05131 BS |
2097 | ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \ |
2098 | ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \ | |
2099 | ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \ | |
2100 | } while (0) | |
2101 | ||
2102 | \f | |
2103 | /* Output and Generation of Labels. */ | |
2104 | ||
2105 | /* A C statement (sans semicolon) to output to the stdio stream STREAM the | |
2106 | assembler definition of a label named NAME. Use the expression | |
2107 | `assemble_name (STREAM, NAME)' to output the name itself; before and after | |
2108 | that, output the additional assembler syntax for defining the name, and a | |
2109 | newline. */ | |
2110 | #define ASM_OUTPUT_LABEL(STREAM, NAME) \ | |
2111 | do { \ | |
2112 | assemble_name (STREAM, NAME); \ | |
2113 | fputs (":\n", STREAM); \ | |
2114 | } while (0) | |
2115 | ||
5eb99654 KG |
2116 | /* Globalizing directive for a label. */ |
2117 | #define GLOBAL_ASM_OP "\t.globl " | |
36a05131 | 2118 | |
36a05131 BS |
2119 | /* A C statement to store into the string STRING a label whose name is made |
2120 | from the string PREFIX and the number NUM. | |
2121 | ||
2122 | This string, when output subsequently by `assemble_name', should produce the | |
4977bab6 | 2123 | output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX |
36a05131 BS |
2124 | and NUM. |
2125 | ||
2126 | If the string begins with `*', then `assemble_name' will output the rest of | |
2127 | the string unchanged. It is often convenient for | |
2128 | `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't | |
2129 | start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and | |
2130 | may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your | |
2131 | machine description, so you should know what it does on your machine.) | |
2132 | ||
2133 | Defined in svr4.h. */ | |
2134 | #undef ASM_GENERATE_INTERNAL_LABEL | |
2135 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ | |
2136 | do { \ | |
2137 | sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \ | |
2138 | } while (0) | |
2139 | ||
36a05131 BS |
2140 | \f |
2141 | /* Macros Controlling Initialization Routines. */ | |
2142 | ||
2143 | /* If defined, a C string constant for the assembler operation to identify the | |
7ec022b2 | 2144 | following data as initialization code. If not defined, GCC will assume |
36a05131 BS |
2145 | such a section does not exist. When you are using special sections for |
2146 | initialization and termination functions, this macro also controls how | |
2147 | `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions. | |
2148 | ||
2149 | Defined in svr4.h. */ | |
2150 | #undef INIT_SECTION_ASM_OP | |
2151 | ||
2152 | /* If defined, `main' will call `__main' despite the presence of | |
2153 | `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the | |
2154 | init section is not actually run automatically, but is still useful for | |
2155 | collecting the lists of constructors and destructors. */ | |
2156 | #define INVOKE__main | |
36a05131 BS |
2157 | \f |
2158 | /* Output of Assembler Instructions. */ | |
2159 | ||
2160 | /* A C initializer containing the assembler's names for the machine registers, | |
2161 | each one as a C string constant. This is what translates register numbers | |
2162 | in the compiler into assembler language. */ | |
2163 | #define REGISTER_NAMES \ | |
2164 | { \ | |
2165 | "gr0", "sp", "fp", "gr3", "gr4", "gr5", "gr6", "gr7", \ | |
2166 | "gr8", "gr9", "gr10", "gr11", "gr12", "gr13", "gr14", "gr15", \ | |
2167 | "gr16", "gr17", "gr18", "gr19", "gr20", "gr21", "gr22", "gr23", \ | |
2168 | "gr24", "gr25", "gr26", "gr27", "gr28", "gr29", "gr30", "gr31", \ | |
2169 | "gr32", "gr33", "gr34", "gr35", "gr36", "gr37", "gr38", "gr39", \ | |
2170 | "gr40", "gr41", "gr42", "gr43", "gr44", "gr45", "gr46", "gr47", \ | |
2171 | "gr48", "gr49", "gr50", "gr51", "gr52", "gr53", "gr54", "gr55", \ | |
2172 | "gr56", "gr57", "gr58", "gr59", "gr60", "gr61", "gr62", "gr63", \ | |
2173 | \ | |
2174 | "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ | |
2175 | "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \ | |
2176 | "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \ | |
2177 | "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31", \ | |
2178 | "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39", \ | |
2179 | "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47", \ | |
2180 | "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55", \ | |
2181 | "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63", \ | |
2182 | \ | |
2183 | "fcc0", "fcc1", "fcc2", "fcc3", "icc0", "icc1", "icc2", "icc3", \ | |
2184 | "cc0", "cc1", "cc2", "cc3", "cc4", "cc5", "cc6", "cc7", \ | |
2185 | "acc0", "acc1", "acc2", "acc3", "acc4", "acc5", "acc6", "acc7", \ | |
c557edf4 | 2186 | "acc8", "acc9", "acc10", "acc11", \ |
36a05131 | 2187 | "accg0","accg1","accg2","accg3","accg4","accg5","accg6","accg7", \ |
c557edf4 RS |
2188 | "accg8", "accg9", "accg10", "accg11", \ |
2189 | "ap", "lr", "lcr", "iacc0h", "iacc0l" \ | |
36a05131 BS |
2190 | } |
2191 | ||
2192 | /* Define this macro if you are using an unusual assembler that | |
2193 | requires different names for the machine instructions. | |
2194 | ||
2195 | The definition is a C statement or statements which output an | |
2196 | assembler instruction opcode to the stdio stream STREAM. The | |
2197 | macro-operand PTR is a variable of type `char *' which points to | |
2198 | the opcode name in its "internal" form--the form that is written | |
2199 | in the machine description. The definition should output the | |
2200 | opcode name to STREAM, performing any translation you desire, and | |
2201 | increment the variable PTR to point at the end of the opcode so | |
2202 | that it will not be output twice. | |
2203 | ||
2204 | In fact, your macro definition may process less than the entire | |
2205 | opcode name, or more than the opcode name; but if you want to | |
2206 | process text that includes `%'-sequences to substitute operands, | |
2207 | you must take care of the substitution yourself. Just be sure to | |
2208 | increment PTR over whatever text should not be output normally. | |
2209 | ||
2210 | If you need to look at the operand values, they can be found as the | |
2211 | elements of `recog_operand'. | |
2212 | ||
2213 | If the macro definition does nothing, the instruction is output in | |
2214 | the usual way. */ | |
2215 | ||
2216 | #define ASM_OUTPUT_OPCODE(STREAM, PTR)\ | |
2217 | (PTR) = frv_asm_output_opcode (STREAM, PTR) | |
2218 | ||
2219 | /* If defined, a C statement to be executed just prior to the output | |
2220 | of assembler code for INSN, to modify the extracted operands so | |
2221 | they will be output differently. | |
2222 | ||
2223 | Here the argument OPVEC is the vector containing the operands | |
2224 | extracted from INSN, and NOPERANDS is the number of elements of | |
2225 | the vector which contain meaningful data for this insn. The | |
2226 | contents of this vector are what will be used to convert the insn | |
2227 | template into assembler code, so you can change the assembler | |
2228 | output by changing the contents of the vector. | |
2229 | ||
2230 | This macro is useful when various assembler syntaxes share a single | |
2231 | file of instruction patterns; by defining this macro differently, | |
2232 | you can cause a large class of instructions to be output | |
2233 | differently (such as with rearranged operands). Naturally, | |
2234 | variations in assembler syntax affecting individual insn patterns | |
2235 | ought to be handled by writing conditional output routines in | |
2236 | those patterns. | |
2237 | ||
2238 | If this macro is not defined, it is equivalent to a null statement. */ | |
2239 | ||
2240 | #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\ | |
2241 | frv_final_prescan_insn (INSN, OPVEC, NOPERANDS) | |
2242 | ||
36a05131 BS |
2243 | /* If defined, C string expressions to be used for the `%R', `%L', `%U', and |
2244 | `%I' options of `asm_fprintf' (see `final.c'). These are useful when a | |
2245 | single `md' file must support multiple assembler formats. In that case, the | |
2246 | various `tm.h' files can define these macros differently. | |
2247 | ||
2248 | USER_LABEL_PREFIX is defined in svr4.h. */ | |
2249 | #undef USER_LABEL_PREFIX | |
2250 | #define USER_LABEL_PREFIX "" | |
2251 | #define REGISTER_PREFIX "" | |
2252 | #define LOCAL_LABEL_PREFIX "." | |
2253 | #define IMMEDIATE_PREFIX "#" | |
2254 | ||
2255 | \f | |
2256 | /* Output of dispatch tables. */ | |
2257 | ||
2258 | /* This macro should be provided on machines where the addresses in a dispatch | |
2259 | table are relative to the table's own address. | |
2260 | ||
2261 | The definition should be a C statement to output to the stdio stream STREAM | |
2262 | an assembler pseudo-instruction to generate a difference between two labels. | |
2263 | VALUE and REL are the numbers of two internal labels. The definitions of | |
4977bab6 | 2264 | these labels are output using `(*targetm.asm_out.internal_label)', and they must be |
36a05131 BS |
2265 | printed in the same way here. For example, |
2266 | ||
2267 | fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ | |
2268 | #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ | |
2269 | fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) | |
2270 | ||
2271 | /* This macro should be provided on machines where the addresses in a dispatch | |
2272 | table are absolute. | |
2273 | ||
2274 | The definition should be a C statement to output to the stdio stream STREAM | |
2275 | an assembler pseudo-instruction to generate a reference to a label. VALUE | |
2276 | is the number of an internal label whose definition is output using | |
4977bab6 | 2277 | `(*targetm.asm_out.internal_label)'. For example, |
36a05131 BS |
2278 | |
2279 | fprintf (STREAM, "\t.word L%d\n", VALUE) */ | |
2280 | #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ | |
2281 | fprintf (STREAM, "\t.word .L%d\n", VALUE) | |
2282 | ||
e133c867 | 2283 | #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) |
36a05131 BS |
2284 | \f |
2285 | /* Assembler Commands for Exception Regions. */ | |
2286 | ||
2287 | /* Define this macro to 0 if your target supports DWARF 2 frame unwind | |
2288 | information, but it does not yet work with exception handling. Otherwise, | |
2289 | if your target supports this information (if it defines | |
2290 | `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or | |
2291 | `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1. | |
2292 | ||
2293 | If this macro is defined to 1, the DWARF 2 unwinder will be the default | |
2294 | exception handling mechanism; otherwise, setjmp/longjmp will be used by | |
2295 | default. | |
2296 | ||
2297 | If this macro is defined to anything, the DWARF 2 unwinder will be used | |
2298 | instead of inline unwinders and __unwind_function in the non-setjmp case. */ | |
2299 | #define DWARF2_UNWIND_INFO 1 | |
2300 | ||
2301 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO) | |
2302 | \f | |
2303 | /* Assembler Commands for Alignment. */ | |
2304 | ||
2305 | /* A C statement to output to the stdio stream STREAM an assembler instruction | |
2306 | to advance the location counter by NBYTES bytes. Those bytes should be zero | |
2307 | when loaded. NBYTES will be a C expression of type `int'. | |
2308 | ||
2309 | Defined in svr4.h. */ | |
2310 | #undef ASM_OUTPUT_SKIP | |
2311 | #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \ | |
58e15542 | 2312 | fprintf (STREAM, "\t.zero\t%u\n", (int)(NBYTES)) |
36a05131 BS |
2313 | |
2314 | /* A C statement to output to the stdio stream STREAM an assembler command to | |
2315 | advance the location counter to a multiple of 2 to the POWER bytes. POWER | |
2316 | will be a C expression of type `int'. */ | |
2317 | #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ | |
2318 | fprintf ((STREAM), "\t.p2align %d\n", (POWER)) | |
2319 | ||
def49dc4 RS |
2320 | /* Inside the text section, align with unpacked nops rather than zeros. */ |
2321 | #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \ | |
2322 | fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER)) | |
36a05131 BS |
2323 | \f |
2324 | /* Macros Affecting all Debug Formats. */ | |
2325 | ||
2326 | /* A C expression that returns the DBX register number for the compiler | |
2327 | register number REGNO. In simple cases, the value of this expression may be | |
2328 | REGNO itself. But sometimes there are some registers that the compiler | |
2329 | knows about and DBX does not, or vice versa. In such cases, some register | |
2330 | may need to have one number in the compiler and another for DBX. | |
2331 | ||
7ec022b2 | 2332 | If two registers have consecutive numbers inside GCC, and they can be |
36a05131 BS |
2333 | used as a pair to hold a multiword value, then they *must* have consecutive |
2334 | numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers | |
2335 | will be unable to access such a pair, because they expect register pairs to | |
2336 | be consecutive in their own numbering scheme. | |
2337 | ||
2338 | If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not | |
2339 | preserve register pairs, then what you must do instead is redefine the | |
2340 | actual register numbering scheme. | |
2341 | ||
2342 | This declaration is required. */ | |
2343 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
2344 | ||
7ec022b2 | 2345 | /* A C expression that returns the type of debugging output GCC produces |
36a05131 | 2346 | when the user specifies `-g' or `-ggdb'. Define this if you have arranged |
7ec022b2 | 2347 | for GCC to support more than one format of debugging output. Currently, |
36a05131 BS |
2348 | the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG', |
2349 | `DWARF2_DEBUG', and `XCOFF_DEBUG'. | |
2350 | ||
2351 | The value of this macro only affects the default debugging output; the user | |
2352 | can always get a specific type of output by using `-gstabs', `-gcoff', | |
2353 | `-gdwarf-1', `-gdwarf-2', or `-gxcoff'. | |
2354 | ||
2355 | Defined in svr4.h. */ | |
2356 | #undef PREFERRED_DEBUGGING_TYPE | |
2357 | #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG | |
36a05131 BS |
2358 | \f |
2359 | /* Miscellaneous Parameters. */ | |
2360 | ||
36a05131 BS |
2361 | /* An alias for a machine mode name. This is the machine mode that elements of |
2362 | a jump-table should have. */ | |
2363 | #define CASE_VECTOR_MODE SImode | |
2364 | ||
2365 | /* Define this macro if operations between registers with integral mode smaller | |
2366 | than a word are always performed on the entire register. Most RISC machines | |
2367 | have this property and most CISC machines do not. */ | |
2368 | #define WORD_REGISTER_OPERATIONS | |
2369 | ||
2370 | /* Define this macro to be a C expression indicating when insns that read | |
2371 | memory in MODE, an integral mode narrower than a word, set the bits outside | |
2372 | of MODE to be either the sign-extension or the zero-extension of the data | |
2373 | read. Return `SIGN_EXTEND' for values of MODE for which the insn | |
f822d252 | 2374 | sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other |
36a05131 BS |
2375 | modes. |
2376 | ||
2377 | This macro is not called with MODE non-integral or with a width greater than | |
2378 | or equal to `BITS_PER_WORD', so you may return any value in this case. Do | |
f822d252 | 2379 | not define this macro if it would always return `UNKNOWN'. On machines where |
36a05131 BS |
2380 | this macro is defined, you will normally define it as the constant |
2381 | `SIGN_EXTEND' or `ZERO_EXTEND'. */ | |
2382 | #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND | |
2383 | ||
2384 | /* Define if loading short immediate values into registers sign extends. */ | |
2385 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
2386 | ||
36a05131 BS |
2387 | /* The maximum number of bytes that a single instruction can move quickly from |
2388 | memory to memory. */ | |
2389 | #define MOVE_MAX 8 | |
2390 | ||
2391 | /* A C expression which is nonzero if on this machine it is safe to "convert" | |
2392 | an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller | |
2393 | than INPREC) by merely operating on it as if it had only OUTPREC bits. | |
2394 | ||
2395 | On many machines, this expression can be 1. | |
2396 | ||
2397 | When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for | |
2398 | which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the | |
2399 | case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve | |
2400 | things. */ | |
2401 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
2402 | ||
2403 | /* An alias for the machine mode for pointers. On most machines, define this | |
2404 | to be the integer mode corresponding to the width of a hardware pointer; | |
2405 | `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines | |
2406 | you must define this to be one of the partial integer modes, such as | |
2407 | `PSImode'. | |
2408 | ||
2409 | The width of `Pmode' must be at least as large as the value of | |
2410 | `POINTER_SIZE'. If it is not equal, you must define the macro | |
2411 | `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */ | |
2412 | #define Pmode SImode | |
2413 | ||
2414 | /* An alias for the machine mode used for memory references to functions being | |
2415 | called, in `call' RTL expressions. On most machines this should be | |
2416 | `QImode'. */ | |
2417 | #define FUNCTION_MODE QImode | |
2418 | ||
2419 | /* Define this macro to handle System V style pragmas: #pragma pack and | |
2420 | #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is | |
2421 | defined. | |
2422 | ||
2423 | Defined in svr4.h. */ | |
32f0ffb3 | 2424 | #define HANDLE_SYSV_PRAGMA 1 |
36a05131 BS |
2425 | |
2426 | /* A C expression for the maximum number of instructions to execute via | |
2427 | conditional execution instructions instead of a branch. A value of | |
2428 | BRANCH_COST+1 is the default if the machine does not use | |
2429 | cc0, and 1 if it does use cc0. */ | |
2430 | #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns | |
2431 | ||
36a05131 BS |
2432 | /* A C expression to modify the code described by the conditional if |
2433 | information CE_INFO, possibly updating the tests in TRUE_EXPR, and | |
2434 | FALSE_EXPR for converting if-then and if-then-else code to conditional | |
2435 | instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the | |
2436 | tests cannot be converted. */ | |
2437 | #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \ | |
2438 | frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR) | |
2439 | ||
2440 | /* A C expression to modify the code described by the conditional if | |
2441 | information CE_INFO, for the basic block BB, possibly updating the tests in | |
2442 | TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or | |
2443 | if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are | |
2444 | the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if | |
2445 | the tests cannot be converted. */ | |
2446 | #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \ | |
2447 | frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR) | |
2448 | ||
2449 | /* A C expression to modify the code described by the conditional if | |
2450 | information CE_INFO with the new PATTERN in INSN. If PATTERN is a null | |
2451 | pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that | |
2452 | insn cannot be converted to be executed conditionally. */ | |
2453 | #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \ | |
2454 | (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN) | |
2455 | ||
2456 | /* A C expression to perform any final machine dependent modifications in | |
2457 | converting code to conditional execution in the code described by the | |
2458 | conditional if information CE_INFO. */ | |
2459 | #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO) | |
2460 | ||
2461 | /* A C expression to cancel any machine dependent modifications in converting | |
2462 | code to conditional execution in the code described by the conditional if | |
2463 | information CE_INFO. */ | |
2464 | #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO) | |
2465 | ||
2466 | /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */ | |
2467 | #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO) | |
2468 | ||
36a05131 BS |
2469 | /* The definition of the following macro results in that the 2nd jump |
2470 | optimization (after the 2nd insn scheduling) is minimal. It is | |
2471 | necessary to define when start cycle marks of insns (TImode is used | |
2472 | for this) is used for VLIW insn packing. Some jump optimizations | |
2473 | make such marks invalid. These marks are corrected for some | |
2474 | (minimal) optimizations. ??? Probably the macro is temporary. | |
2475 | Final solution could making the 2nd jump optimizations before the | |
2476 | 2nd instruction scheduling or corrections of the marks for all jump | |
2477 | optimizations. Although some jump optimizations are actually | |
2478 | deoptimizations for VLIW (super-scalar) processors. */ | |
2479 | ||
2480 | #define MINIMAL_SECOND_JUMP_OPTIMIZATION | |
2481 | ||
36a05131 | 2482 | |
88cad84b | 2483 | /* If the following macro is defined and nonzero and deterministic |
36a05131 BS |
2484 | finite state automata are used for pipeline hazard recognition, the |
2485 | code making resource-constrained software pipelining is on. */ | |
2486 | #define RCSP_SOFTWARE_PIPELINING 1 | |
2487 | ||
88cad84b | 2488 | /* If the following macro is defined and nonzero and deterministic |
36a05131 BS |
2489 | finite state automata are used for pipeline hazard recognition, we |
2490 | will try to exchange insns in queue ready to improve the schedule. | |
2491 | The more macro value, the more tries will be made. */ | |
2492 | #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1 | |
2493 | ||
2494 | /* The following macro is used only when value of | |
2495 | FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value, | |
2496 | the more tries will be made to choose better schedule. If the | |
2497 | macro value is zero or negative there will be no multi-pass | |
2498 | scheduling. */ | |
2499 | #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead | |
2500 | ||
36a05131 BS |
2501 | enum frv_builtins |
2502 | { | |
2503 | FRV_BUILTIN_MAND, | |
2504 | FRV_BUILTIN_MOR, | |
2505 | FRV_BUILTIN_MXOR, | |
2506 | FRV_BUILTIN_MNOT, | |
2507 | FRV_BUILTIN_MAVEH, | |
2508 | FRV_BUILTIN_MSATHS, | |
2509 | FRV_BUILTIN_MSATHU, | |
2510 | FRV_BUILTIN_MADDHSS, | |
2511 | FRV_BUILTIN_MADDHUS, | |
2512 | FRV_BUILTIN_MSUBHSS, | |
2513 | FRV_BUILTIN_MSUBHUS, | |
2514 | FRV_BUILTIN_MPACKH, | |
2515 | FRV_BUILTIN_MQADDHSS, | |
2516 | FRV_BUILTIN_MQADDHUS, | |
2517 | FRV_BUILTIN_MQSUBHSS, | |
2518 | FRV_BUILTIN_MQSUBHUS, | |
2519 | FRV_BUILTIN_MUNPACKH, | |
2520 | FRV_BUILTIN_MDPACKH, | |
2521 | FRV_BUILTIN_MBTOH, | |
2522 | FRV_BUILTIN_MHTOB, | |
2523 | FRV_BUILTIN_MCOP1, | |
2524 | FRV_BUILTIN_MCOP2, | |
2525 | FRV_BUILTIN_MROTLI, | |
2526 | FRV_BUILTIN_MROTRI, | |
2527 | FRV_BUILTIN_MWCUT, | |
2528 | FRV_BUILTIN_MSLLHI, | |
2529 | FRV_BUILTIN_MSRLHI, | |
2530 | FRV_BUILTIN_MSRAHI, | |
2531 | FRV_BUILTIN_MEXPDHW, | |
2532 | FRV_BUILTIN_MEXPDHD, | |
2533 | FRV_BUILTIN_MMULHS, | |
2534 | FRV_BUILTIN_MMULHU, | |
2535 | FRV_BUILTIN_MMULXHS, | |
2536 | FRV_BUILTIN_MMULXHU, | |
2537 | FRV_BUILTIN_MMACHS, | |
2538 | FRV_BUILTIN_MMACHU, | |
2539 | FRV_BUILTIN_MMRDHS, | |
2540 | FRV_BUILTIN_MMRDHU, | |
2541 | FRV_BUILTIN_MQMULHS, | |
2542 | FRV_BUILTIN_MQMULHU, | |
2543 | FRV_BUILTIN_MQMULXHU, | |
2544 | FRV_BUILTIN_MQMULXHS, | |
2545 | FRV_BUILTIN_MQMACHS, | |
2546 | FRV_BUILTIN_MQMACHU, | |
2547 | FRV_BUILTIN_MCPXRS, | |
2548 | FRV_BUILTIN_MCPXRU, | |
2549 | FRV_BUILTIN_MCPXIS, | |
2550 | FRV_BUILTIN_MCPXIU, | |
2551 | FRV_BUILTIN_MQCPXRS, | |
2552 | FRV_BUILTIN_MQCPXRU, | |
2553 | FRV_BUILTIN_MQCPXIS, | |
2554 | FRV_BUILTIN_MQCPXIU, | |
2555 | FRV_BUILTIN_MCUT, | |
2556 | FRV_BUILTIN_MCUTSS, | |
2557 | FRV_BUILTIN_MWTACC, | |
2558 | FRV_BUILTIN_MWTACCG, | |
2559 | FRV_BUILTIN_MRDACC, | |
2560 | FRV_BUILTIN_MRDACCG, | |
2561 | FRV_BUILTIN_MTRAP, | |
2562 | FRV_BUILTIN_MCLRACC, | |
2563 | FRV_BUILTIN_MCLRACCA, | |
2564 | FRV_BUILTIN_MDUNPACKH, | |
2565 | FRV_BUILTIN_MBTOHE, | |
2566 | FRV_BUILTIN_MQXMACHS, | |
2567 | FRV_BUILTIN_MQXMACXHS, | |
2568 | FRV_BUILTIN_MQMACXHS, | |
2569 | FRV_BUILTIN_MADDACCS, | |
2570 | FRV_BUILTIN_MSUBACCS, | |
2571 | FRV_BUILTIN_MASACCS, | |
2572 | FRV_BUILTIN_MDADDACCS, | |
2573 | FRV_BUILTIN_MDSUBACCS, | |
2574 | FRV_BUILTIN_MDASACCS, | |
2575 | FRV_BUILTIN_MABSHS, | |
2576 | FRV_BUILTIN_MDROTLI, | |
2577 | FRV_BUILTIN_MCPLHI, | |
2578 | FRV_BUILTIN_MCPLI, | |
2579 | FRV_BUILTIN_MDCUTSSI, | |
2580 | FRV_BUILTIN_MQSATHS, | |
c557edf4 RS |
2581 | FRV_BUILTIN_MQLCLRHS, |
2582 | FRV_BUILTIN_MQLMTHS, | |
2583 | FRV_BUILTIN_MQSLLHI, | |
2584 | FRV_BUILTIN_MQSRAHI, | |
36a05131 BS |
2585 | FRV_BUILTIN_MHSETLOS, |
2586 | FRV_BUILTIN_MHSETLOH, | |
2587 | FRV_BUILTIN_MHSETHIS, | |
2588 | FRV_BUILTIN_MHSETHIH, | |
2589 | FRV_BUILTIN_MHDSETS, | |
c557edf4 RS |
2590 | FRV_BUILTIN_MHDSETH, |
2591 | FRV_BUILTIN_SMUL, | |
2592 | FRV_BUILTIN_UMUL, | |
2593 | FRV_BUILTIN_PREFETCH0, | |
2594 | FRV_BUILTIN_PREFETCH, | |
2595 | FRV_BUILTIN_SMASS, | |
2596 | FRV_BUILTIN_SMSSS, | |
2597 | FRV_BUILTIN_SMU, | |
2598 | FRV_BUILTIN_SCUTSS, | |
2599 | FRV_BUILTIN_ADDSS, | |
2600 | FRV_BUILTIN_SUBSS, | |
2601 | FRV_BUILTIN_SLASS, | |
2602 | FRV_BUILTIN_IACCreadll, | |
2603 | FRV_BUILTIN_IACCreadl, | |
2604 | FRV_BUILTIN_IACCsetll, | |
2605 | FRV_BUILTIN_IACCsetl, | |
c14ff86e AH |
2606 | FRV_BUILTIN_SCAN, |
2607 | FRV_BUILTIN_READ8, | |
2608 | FRV_BUILTIN_READ16, | |
2609 | FRV_BUILTIN_READ32, | |
2610 | FRV_BUILTIN_READ64, | |
2611 | FRV_BUILTIN_WRITE8, | |
2612 | FRV_BUILTIN_WRITE16, | |
2613 | FRV_BUILTIN_WRITE32, | |
2614 | FRV_BUILTIN_WRITE64 | |
36a05131 | 2615 | }; |
c557edf4 | 2616 | #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL |
36a05131 | 2617 | |
36a05131 BS |
2618 | /* Enable prototypes on the call rtl functions. */ |
2619 | #define MD_CALL_PROTOTYPES 1 | |
2620 | ||
c557edf4 RS |
2621 | #define CPU_UNITS_QUERY 1 |
2622 | ||
34208acf AO |
2623 | #ifdef __FRV_FDPIC__ |
2624 | #define CRT_GET_RFIB_DATA(dbase) \ | |
2625 | ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; }) | |
2626 | #endif | |
2627 | ||
36a05131 | 2628 | #endif /* __FRV_H__ */ |