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2042e9d2 | 1 | /* Definitions of target machine for GNU compiler. Convex version. |
8b109b37 | 2 | Copyright (C) 1988, 1994, 1995 Free Software Foundation, Inc. |
2042e9d2 CS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Standard GCC variables that we reference. */ | |
22 | ||
23 | extern int target_flags; | |
24 | ||
6cecf4ce CS |
25 | /* Convex machine-specific flags |
26 | -mc1 target instruction set, libraries, scheduling | |
27 | -mc2 | |
28 | -mc32 | |
29 | -mc34 | |
30 | -mc38 | |
31 | -margcount use standard calling sequence, with arg count word | |
32 | -mno-argcount don't push arg count, depend on symbol table | |
33 | -margcount-nop place arg count in a nop instruction (faster than push) | |
34 | -mvolatile-cache use data cache for volatile mem refs (default) | |
35 | -mvolatile-nocache bypass data cache for volatile mem refs | |
36 | -mlong32 cc- and libc-compatible 32-bit longs | |
37 | -mlong64 64-bit longs | |
38 | */ | |
2042e9d2 | 39 | |
6cecf4ce CS |
40 | /* Macro to define tables used to set -mXXX flags. |
41 | This is a list in braces of pairs in braces, | |
42 | each pair being { "NAME", VALUE } | |
43 | where VALUE is the bits to set or minus the bits to clear. | |
44 | An empty string NAME is used to identify the default VALUE. */ | |
2042e9d2 | 45 | |
6cecf4ce CS |
46 | #ifndef TARGET_DEFAULT |
47 | #error Use one of convex1.h, convex2.h, etc. | |
48 | #endif | |
2042e9d2 | 49 | |
6cecf4ce CS |
50 | #define TARGET_SWITCHES \ |
51 | { { "c1", 001 }, \ | |
52 | { "c2", 002 }, \ | |
53 | { "c32", 004 }, \ | |
54 | { "c34", 010 }, \ | |
55 | { "c38", 020 }, \ | |
56 | { "argcount", 0100 }, \ | |
57 | { "argcount-nop", 0200 }, \ | |
58 | { "no-argcount", -0300 }, \ | |
59 | { "volatile-cache", -0400 }, \ | |
60 | { "no-volatile-cache", 0400 }, \ | |
61 | { "volatile-nocache", 0400 }, \ | |
62 | { "long64", 01000 }, \ | |
63 | { "long32", -01000 }, \ | |
64 | { "", TARGET_DEFAULT }} | |
2042e9d2 | 65 | |
6cecf4ce | 66 | /* Macros used in the machine description to test the flags. */ |
2042e9d2 | 67 | |
6cecf4ce CS |
68 | #define TARGET_C1 (target_cpu == 0) |
69 | #define TARGET_C2 (target_cpu == 1) | |
70 | #define TARGET_C34 (target_cpu == 2) | |
71 | #define TARGET_C38 (target_cpu == 3) | |
72 | #define TARGET_ARGCOUNT (target_flags & 0100) | |
73 | #define TARGET_ARGCOUNT_NOP (target_flags & 0200) | |
74 | #define TARGET_LONG64 (target_flags & 01000) | |
75 | #define TARGET_VOLATILE_NOCACHE (target_flags & 0400) | |
76 | ||
77 | #define OVERRIDE_OPTIONS \ | |
78 | { \ | |
79 | extern int dollars_in_ident; \ | |
80 | init_convex (); \ | |
81 | /* To compile system header files, allow $ in identifiers even if -ansi */ \ | |
82 | dollars_in_ident = 1; \ | |
83 | if ((target_flags & 077) != (TARGET_DEFAULT & 077)) \ | |
84 | target_flags &= ~TARGET_DEFAULT; \ | |
85 | if (target_flags & 001) \ | |
86 | target_cpu = 0; \ | |
87 | else if (target_flags & 006) \ | |
88 | target_cpu = 1; \ | |
89 | else if (target_flags & 010) \ | |
90 | target_cpu = 2; \ | |
91 | else if (target_flags & 020) \ | |
92 | target_cpu = 3; \ | |
93 | } | |
2042e9d2 CS |
94 | |
95 | /* Names to predefine in the preprocessor for this target machine. */ | |
96 | ||
65c42379 | 97 | #define CPP_PREDEFINES "-Dconvex -Dunix -Asystem(unix) -Acpu(convex) -Amachine(convex)" |
2042e9d2 CS |
98 | |
99 | /* Print subsidiary information on the compiler version in use. */ | |
100 | ||
101 | #define TARGET_VERSION fprintf (stderr, " (convex)"); | |
102 | ||
6cecf4ce CS |
103 | /* Target-dependent specs. |
104 | Some libraries come in c1 and c2+ versions; use the appropriate ones. | |
105 | Make a target-dependent __convex_cxx__ define to relay the target cpu | |
106 | to the program being compiled. */ | |
107 | ||
108 | #if TARGET_DEFAULT & 1 | |
109 | ||
110 | /* C1 default */ | |
111 | ||
112 | #if _IEEE_FLOAT_ | |
113 | ||
114 | #define CPP_SPEC \ | |
115 | "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-D__convex_c1__}}}} \ | |
116 | %{mc2:-D__convex_c2__} \ | |
117 | %{mc32:-D__convex_c32__} \ | |
118 | %{mc34:-D__convex_c34__} \ | |
119 | %{mc38:-D__convex_c38__} \ | |
120 | %{fno-builtin:-D__NO_INLINE} \ | |
121 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
122 | -D_IEEE_FLOAT_ \ | |
123 | %{.S:-P} \ | |
124 | %{!traditional:-D__stdc__} \ | |
125 | %{!traditional:-D_LONGLONG} \ | |
126 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
127 | %{!ansi:-D_POSIX_SOURCE} \ | |
128 | %{!ansi:-D_CONVEX_SOURCE}" | |
2042e9d2 | 129 | |
6cecf4ce | 130 | #else |
2042e9d2 | 131 | |
6cecf4ce CS |
132 | #define CPP_SPEC \ |
133 | "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-D__convex_c1__}}}} \ | |
134 | %{mc2:-D__convex_c2__} \ | |
135 | %{mc32:-D__convex_c32__} \ | |
136 | %{mc34:-D__convex_c34__} \ | |
137 | %{mc38:-D__convex_c38__} \ | |
138 | %{fno-builtin:-D__NO_INLINE} \ | |
139 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
140 | -D_CONVEX_FLOAT_ \ | |
141 | %{.S:-P} \ | |
142 | %{!traditional:-D__stdc__} \ | |
143 | %{!traditional:-D_LONGLONG} \ | |
144 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
145 | %{!ansi:-D_POSIX_SOURCE} \ | |
146 | %{!ansi:-D_CONVEX_SOURCE}" | |
2042e9d2 | 147 | |
6cecf4ce | 148 | #endif |
2042e9d2 | 149 | |
6cecf4ce CS |
150 | #define LIB_SPEC \ |
151 | "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-lC1%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ | |
152 | %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
153 | %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
154 | %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
155 | %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
156 | -lc%{traditional:_old}%{p:_p}%{pg:_p}" | |
2042e9d2 | 157 | |
6cecf4ce CS |
158 | #endif |
159 | ||
160 | #if TARGET_DEFAULT & 2 | |
161 | ||
162 | /* C2 default */ | |
163 | ||
164 | #if _IEEE_FLOAT_ | |
165 | ||
166 | #define CPP_SPEC \ | |
167 | "%{mc1:-D__convex_c1__} \ | |
168 | %{!mc1:%{!mc32:%{!mc34:%{!mc38:-D__convex_c2__}}}} \ | |
169 | %{mc32:-D__convex_c32__} \ | |
170 | %{mc34:-D__convex_c34__} \ | |
171 | %{mc38:-D__convex_c38__} \ | |
172 | %{fno-builtin:-D__NO_INLINE} \ | |
173 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
174 | -D_IEEE_FLOAT_ \ | |
175 | %{.S:-P} \ | |
176 | %{!traditional:-D__stdc__} \ | |
177 | %{!traditional:-D_LONGLONG} \ | |
178 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
179 | %{!ansi:-D_POSIX_SOURCE} \ | |
180 | %{!ansi:-D_CONVEX_SOURCE}" | |
181 | ||
182 | #else | |
183 | ||
184 | #define CPP_SPEC \ | |
185 | "%{mc1:-D__convex_c1__} \ | |
186 | %{!mc1:%{!mc32:%{!mc34:%{!mc38:-D__convex_c2__}}}} \ | |
187 | %{mc32:-D__convex_c32__} \ | |
188 | %{mc34:-D__convex_c34__} \ | |
189 | %{mc38:-D__convex_c38__} \ | |
190 | %{fno-builtin:-D__NO_INLINE} \ | |
191 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
192 | -D_CONVEX_FLOAT_ \ | |
193 | %{.S:-P} \ | |
194 | %{!traditional:-D__stdc__} \ | |
195 | %{!traditional:-D_LONGLONG} \ | |
196 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
197 | %{!ansi:-D_POSIX_SOURCE} \ | |
198 | %{!ansi:-D_CONVEX_SOURCE}" | |
199 | ||
200 | #endif | |
201 | ||
202 | #define LIB_SPEC \ | |
203 | "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
204 | %{!mc1:%{!mc32:%{!mc34:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ | |
205 | %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
206 | %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
207 | %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
208 | -lc%{traditional:_old}%{p:_p}%{pg:_p}" | |
209 | ||
210 | #endif | |
211 | ||
212 | #if TARGET_DEFAULT & 4 | |
213 | ||
214 | /* C32 default */ | |
215 | ||
216 | #if _IEEE_FLOAT_ | |
217 | ||
218 | #define CPP_SPEC \ | |
219 | "%{mc1:-D__convex_c1__} \ | |
220 | %{mc2:-D__convex_c2__} \ | |
221 | %{!mc1:%{!mc2:%{!mc34:%{!mc38:-D__convex_c32__}}}} \ | |
222 | %{mc34:-D__convex_c34__} \ | |
223 | %{mc38:-D__convex_c38__} \ | |
224 | %{fno-builtin:-D__NO_INLINE} \ | |
225 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
226 | -D_IEEE_FLOAT_ \ | |
227 | %{.S:-P} \ | |
228 | %{!traditional:-D__stdc__} \ | |
229 | %{!traditional:-D_LONGLONG} \ | |
230 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
231 | %{!ansi:-D_POSIX_SOURCE} \ | |
232 | %{!ansi:-D_CONVEX_SOURCE}" | |
233 | ||
234 | #else | |
235 | ||
236 | #define CPP_SPEC \ | |
237 | "%{mc1:-D__convex_c1__} \ | |
238 | %{mc2:-D__convex_c2__} \ | |
239 | %{!mc1:%{!mc2:%{!mc34:%{!mc38:-D__convex_c32__}}}} \ | |
240 | %{mc34:-D__convex_c34__} \ | |
241 | %{mc38:-D__convex_c38__} \ | |
242 | %{fno-builtin:-D__NO_INLINE} \ | |
243 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
244 | -D_CONVEX_FLOAT_ \ | |
245 | %{.S:-P} \ | |
246 | %{!traditional:-D__stdc__} \ | |
247 | %{!traditional:-D_LONGLONG} \ | |
248 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
249 | %{!ansi:-D_POSIX_SOURCE} \ | |
250 | %{!ansi:-D_CONVEX_SOURCE}" | |
251 | ||
252 | #endif | |
253 | ||
254 | #define LIB_SPEC \ | |
255 | "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
256 | %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
257 | %{!mc1:%{!mc2:%{!mc34:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ | |
258 | %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
259 | %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
260 | -lc%{traditional:_old}%{p:_p}%{pg:_p}" | |
261 | ||
262 | #endif | |
263 | ||
264 | #if TARGET_DEFAULT & 010 | |
265 | ||
266 | /* C34 default */ | |
267 | ||
268 | #if _IEEE_FLOAT_ | |
269 | ||
270 | #define CPP_SPEC \ | |
271 | "%{mc1:-D__convex_c1__} \ | |
272 | %{mc2:-D__convex_c2__} \ | |
273 | %{mc32:-D__convex_c32__} \ | |
274 | %{!mc1:%{!mc2:%{!mc32:%{!mc38:-D__convex_c34__}}}} \ | |
275 | %{mc38:-D__convex_c38__} \ | |
276 | %{fno-builtin:-D__NO_INLINE} \ | |
277 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
278 | -D_IEEE_FLOAT_ \ | |
279 | %{.S:-P} \ | |
280 | %{!traditional:-D__stdc__} \ | |
281 | %{!traditional:-D_LONGLONG} \ | |
282 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
283 | %{!ansi:-D_POSIX_SOURCE} \ | |
284 | %{!ansi:-D_CONVEX_SOURCE}" | |
285 | ||
286 | #else | |
287 | ||
288 | #define CPP_SPEC \ | |
289 | "%{mc1:-D__convex_c1__} \ | |
290 | %{mc2:-D__convex_c2__} \ | |
291 | %{mc32:-D__convex_c32__} \ | |
292 | %{!mc1:%{!mc2:%{!mc32:%{!mc38:-D__convex_c34__}}}} \ | |
293 | %{mc38:-D__convex_c38__} \ | |
294 | %{fno-builtin:-D__NO_INLINE} \ | |
295 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
296 | -D_CONVEX_FLOAT_ \ | |
297 | %{.S:-P} \ | |
298 | %{!traditional:-D__stdc__} \ | |
299 | %{!traditional:-D_LONGLONG} \ | |
300 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
301 | %{!ansi:-D_POSIX_SOURCE} \ | |
302 | %{!ansi:-D_CONVEX_SOURCE}" | |
303 | ||
304 | #endif | |
305 | ||
306 | #define LIB_SPEC \ | |
307 | "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
308 | %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
309 | %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
310 | %{!mc1:%{!mc2:%{!mc32:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ | |
311 | %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
312 | -lc%{traditional:_old}%{p:_p}%{pg:_p}" | |
313 | ||
314 | #endif | |
315 | ||
316 | #if TARGET_DEFAULT & 020 | |
317 | ||
318 | /* C38 default */ | |
319 | ||
320 | #if _IEEE_FLOAT_ | |
321 | ||
322 | #define CPP_SPEC \ | |
323 | "%{mc1:-D__convex_c1__} \ | |
324 | %{mc2:-D__convex_c2__} \ | |
325 | %{mc32:-D__convex_c32__} \ | |
326 | %{mc34:-D__convex_c34__} \ | |
327 | %{fno-builtin:-D__NO_INLINE} \ | |
328 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
329 | -D_IEEE_FLOAT_ \ | |
330 | %{!mc1:%{!mc2:%{!mc32:%{!mc34:-D__convex_c38__}}}} \ | |
331 | %{.S:-P} \ | |
332 | %{!traditional:-D__stdc__} \ | |
333 | %{!traditional:-D_LONGLONG} \ | |
334 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
335 | %{!ansi:-D_POSIX_SOURCE} \ | |
336 | %{!ansi:-D_CONVEX_SOURCE}" | |
337 | ||
338 | #else | |
339 | ||
340 | #define CPP_SPEC \ | |
341 | "%{mc1:-D__convex_c1__} \ | |
342 | %{mc2:-D__convex_c2__} \ | |
343 | %{mc32:-D__convex_c32__} \ | |
344 | %{mc34:-D__convex_c34__} \ | |
345 | %{fno-builtin:-D__NO_INLINE} \ | |
346 | -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ | |
347 | -D_CONVEX_FLOAT_ \ | |
348 | %{!mc1:%{!mc2:%{!mc32:%{!mc34:-D__convex_c38__}}}} \ | |
349 | %{.S:-P} \ | |
350 | %{!traditional:-D__stdc__} \ | |
351 | %{!traditional:-D_LONGLONG} \ | |
352 | %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ | |
353 | %{!ansi:-D_POSIX_SOURCE} \ | |
354 | %{!ansi:-D_CONVEX_SOURCE}" | |
355 | ||
356 | #endif | |
357 | ||
358 | #define LIB_SPEC \ | |
359 | "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
360 | %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
361 | %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
362 | %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ | |
363 | %{!mc1:%{!mc2:%{!mc32:%{!mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ | |
364 | -lc%{traditional:_old}%{p:_p}%{pg:_p}" | |
365 | ||
366 | #endif | |
367 | ||
368 | #if _IEEE_FLOAT_ | |
369 | ||
370 | /* ieee default */ | |
371 | ||
372 | #define ASM_SPEC "-fi" | |
373 | ||
374 | #define LINK_SPEC \ | |
375 | "-E%{traditional:no}posix \ | |
376 | -X \ | |
377 | %{F} %{M*} %{y*} \ | |
378 | -fi \ | |
379 | -A__iob=___ap$iob \ | |
380 | -A_use_libc_sema=___ap$use_libc_sema \ | |
826ec5dd RS |
381 | %{traditional:-A___gcc_cleanup=__cleanup} \ |
382 | %{!traditional:-A___gcc_cleanup=___ap$do_registered_functions} \ | |
6cecf4ce CS |
383 | -L/usr/lib" |
384 | ||
385 | #define STARTFILE_SPEC \ | |
386 | "%{!pg:%{!p:/usr/lib/crt/crt0.o}} \ | |
387 | %{!pg:%{p:/usr/lib/crt/mcrt0.o}} \ | |
388 | %{pg:/usr/lib/crt/gcrt0.o} \ | |
389 | /usr/lib/crt/fpmode_i.o" | |
390 | ||
391 | #else | |
392 | ||
393 | /* native default */ | |
394 | ||
395 | #define ASM_SPEC "-fn" | |
396 | ||
397 | #define LINK_SPEC \ | |
398 | "-E%{traditional:no}posix \ | |
399 | -X \ | |
400 | %{F} %{M*} %{y*} \ | |
401 | -fn \ | |
402 | -A__iob=___ap$iob \ | |
403 | -A_use_libc_sema=___ap$use_libc_sema \ | |
404 | %{traditional:-A___gcc_cleanup=__cleanup} \ | |
405 | %{!traditional:-A___gcc_cleanup=___ap$do_registered_functions} \ | |
406 | -L/usr/lib" | |
407 | ||
408 | #define STARTFILE_SPEC \ | |
409 | "%{!pg:%{!p:/usr/lib/crt/crt0.o}} \ | |
410 | %{!pg:%{p:/usr/lib/crt/mcrt0.o}} \ | |
411 | %{pg:/usr/lib/crt/gcrt0.o}" | |
2042e9d2 | 412 | |
2042e9d2 CS |
413 | #endif |
414 | ||
6cecf4ce CS |
415 | /* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */ |
416 | ||
d6924c84 | 417 | #define LINK_LIBGCC_SPECIAL_1 |
6cecf4ce | 418 | |
2042e9d2 CS |
419 | /* Allow $ in identifiers. */ |
420 | ||
421 | #define DOLLARS_IN_IDENTIFIERS 2 | |
6cecf4ce CS |
422 | |
423 | /* Since IEEE support was added to gcc, most things seem to like it | |
424 | better if we disable exceptions and check afterward for infinity. */ | |
425 | ||
426 | #if __convex__ | |
427 | #if _IEEE_FLOAT_ | |
428 | #define REAL_VALUE_ISNAN(x) 0 | |
429 | #define REAL_VALUE_ISINF(x) ((*(short *) &(x) & 0x7ff0) == 0x7ff0) | |
430 | #else | |
431 | #define REAL_VALUE_ISNAN(x) 0 | |
432 | #define REAL_VALUE_ISINF(x) ((*(short *) &(x) & 0xfff0) == 0x8000) | |
433 | #endif | |
434 | #endif | |
2042e9d2 CS |
435 | \f |
436 | /* Target machine storage layout */ | |
437 | ||
438 | /* Define this if most significant bit is lowest numbered | |
439 | in instructions that operate on numbered bit-fields. */ | |
440 | #define BITS_BIG_ENDIAN 1 | |
441 | ||
442 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
443 | #define BYTES_BIG_ENDIAN 1 | |
444 | ||
445 | /* Define this if most significant word of a multiword number is numbered. */ | |
446 | #define WORDS_BIG_ENDIAN 1 | |
447 | ||
b4ac57ab | 448 | /* Number of bits in an addressable storage unit */ |
2042e9d2 CS |
449 | #define BITS_PER_UNIT 8 |
450 | ||
451 | /* Width in bits of a "word", which is the contents of a machine register. | |
452 | Note that this is not necessarily the width of data type `int'; | |
453 | if using 16-bit ints on a 68000, this would still be 32. | |
454 | But on a machine with 16-bit registers, this would be 16. */ | |
455 | #define BITS_PER_WORD 64 | |
456 | ||
457 | /* Width of a word, in units (bytes). */ | |
458 | #define UNITS_PER_WORD 8 | |
459 | ||
460 | /* Width in bits of a pointer. | |
461 | See also the macro `Pmode' defined below. */ | |
462 | #define POINTER_SIZE 32 | |
463 | ||
464 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
465 | #define PARM_BOUNDARY 32 | |
466 | ||
467 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
6cecf4ce | 468 | #define STACK_BOUNDARY 64 |
2042e9d2 CS |
469 | |
470 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
471 | #define FUNCTION_BOUNDARY 16 | |
472 | ||
473 | /* Alignment of field after `int : 0' in a structure. */ | |
474 | #define EMPTY_FIELD_BOUNDARY 32 | |
475 | ||
476 | /* Every structure's size must be a multiple of this. */ | |
477 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
478 | ||
479 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
480 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
481 | ||
482 | /* No data type wants to be aligned rounder than this. */ | |
6cecf4ce | 483 | /* beware of doubles in structs -- 64 is incompatible with cc */ |
2042e9d2 CS |
484 | #define BIGGEST_ALIGNMENT 32 |
485 | ||
b4ac57ab | 486 | /* Set this nonzero if move instructions will actually fail to work |
2042e9d2 | 487 | when given unaligned data. */ |
b4ac57ab | 488 | #define STRICT_ALIGNMENT 0 |
2042e9d2 CS |
489 | |
490 | /* Define sizes of basic C types to conform to ordinary usage -- these | |
491 | types depend on BITS_PER_WORD otherwise. */ | |
492 | #define CHAR_TYPE_SIZE 8 | |
493 | #define SHORT_TYPE_SIZE 16 | |
494 | #define INT_TYPE_SIZE 32 | |
6cecf4ce | 495 | #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32) |
2042e9d2 CS |
496 | #define LONG_LONG_TYPE_SIZE 64 |
497 | #define FLOAT_TYPE_SIZE 32 | |
498 | #define DOUBLE_TYPE_SIZE 64 | |
499 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
3fda2ab1 RS |
500 | /* This prevents cexp.c from depending on LONG_TYPE_SIZE. */ |
501 | #define MAX_LONG_TYPE_SIZE 64 | |
2042e9d2 | 502 | |
2042e9d2 CS |
503 | /* Declare the standard types used by builtins to match convex stddef.h -- |
504 | with int rather than long. */ | |
505 | ||
506 | #define SIZE_TYPE "unsigned int" | |
507 | #define PTRDIFF_TYPE "int" | |
508 | \f | |
509 | /* Standard register usage. */ | |
510 | ||
511 | /* Number of actual hardware registers. | |
512 | The hardware registers are assigned numbers for the compiler | |
513 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
514 | All registers that the compiler knows about must be given numbers, | |
515 | even those that are not normally considered general registers. */ | |
516 | #define FIRST_PSEUDO_REGISTER 16 | |
517 | ||
518 | /* 1 for registers that have pervasive standard uses | |
519 | and are not available for the register allocator. | |
520 | For Convex, these are AP, FP, and SP. */ | |
6cecf4ce CS |
521 | #define FIXED_REGISTERS \ |
522 | { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1 } | |
2042e9d2 CS |
523 | |
524 | /* 1 for registers not available across function calls. | |
525 | These must include the FIXED_REGISTERS and also any | |
526 | registers that can be used without being saved. | |
527 | The latter must include the registers where values are returned | |
528 | and the register where structure-value addresses are passed. | |
529 | Aside from that, you can include as many other registers as you like. */ | |
6cecf4ce CS |
530 | #define CALL_USED_REGISTERS \ |
531 | { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
532 | ||
533 | /* List the order in which to allocate registers. Each register must be | |
534 | listed once, even those in FIXED_REGISTERS. | |
535 | For Convex, put S0 (the return register) last. */ | |
536 | #define REG_ALLOC_ORDER \ | |
537 | { 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 0, 8, 14, 15 } | |
2042e9d2 CS |
538 | |
539 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
540 | to hold something of mode MODE. | |
541 | This is ordinarily the length in words of a value of mode MODE | |
e622cd25 CS |
542 | but can be less for certain modes in special long registers. */ |
543 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
544 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
2042e9d2 CS |
545 | |
546 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
547 | On Convex, S registers can hold any type, A registers any nonfloat. */ | |
548 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
6cecf4ce CS |
549 | (S_REGNO_P (REGNO) \ |
550 | || (GET_MODE_SIZE (MODE) <= 4 && (MODE) != SFmode)) | |
2042e9d2 CS |
551 | |
552 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
553 | when one has mode MODE1 and one has mode MODE2. | |
554 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
555 | for any hard reg, then this must be 0 for correct output. */ | |
556 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
6cecf4ce CS |
557 | ((GET_MODE_SIZE (MODE1) <= 4 && (MODE1) != SFmode) \ |
558 | == (GET_MODE_SIZE (MODE2) <= 4 && (MODE2) != SFmode)) | |
2042e9d2 CS |
559 | |
560 | /* Specify the registers used for certain standard purposes. | |
561 | The values of these macros are register numbers. */ | |
562 | ||
6cecf4ce CS |
563 | #define S0_REGNUM 0 |
564 | #define A0_REGNUM 8 | |
565 | ||
2042e9d2 | 566 | /* Register to use for pushing function arguments. */ |
6cecf4ce | 567 | #define STACK_POINTER_REGNUM A0_REGNUM |
2042e9d2 CS |
568 | |
569 | /* Base register for access to local variables of the function. */ | |
6cecf4ce | 570 | #define FRAME_POINTER_REGNUM (A0_REGNUM + 7) |
2042e9d2 CS |
571 | |
572 | /* Value should be nonzero if functions must have frame pointers. | |
573 | Zero means the frame pointer need not be set up (and parms | |
574 | may be accessed via the stack pointer) in functions that seem suitable. | |
575 | This is computed in `reload', in reload1.c. */ | |
576 | #define FRAME_POINTER_REQUIRED 1 | |
577 | ||
578 | /* Base register for access to arguments of the function. */ | |
6cecf4ce | 579 | #define ARG_POINTER_REGNUM (A0_REGNUM + 6) |
2042e9d2 CS |
580 | |
581 | /* Register in which static-chain is passed to a function. | |
582 | Use S0, not an A reg, because this rare use would otherwise prevent | |
583 | an A reg from being available to global-alloc across calls. */ | |
6cecf4ce | 584 | #define STATIC_CHAIN_REGNUM S0_REGNUM |
2042e9d2 CS |
585 | |
586 | /* Register in which address to store a structure value | |
587 | is passed to a function. */ | |
6cecf4ce | 588 | #define STRUCT_VALUE_REGNUM (A0_REGNUM + 1) |
2042e9d2 CS |
589 | \f |
590 | /* Define the classes of registers for register constraints in the | |
591 | machine description. Also define ranges of constants. | |
592 | ||
593 | One of the classes must always be named ALL_REGS and include all hard regs. | |
594 | If there is more than one class, another class must be named NO_REGS | |
595 | and contain no registers. | |
596 | ||
597 | The name GENERAL_REGS must be the name of a class (or an alias for | |
598 | another name such as ALL_REGS). This is the class of registers | |
599 | that is allowed by "g" or "r" in a register constraint. | |
600 | Also, registers outside this class are allocated only when | |
601 | instructions express preferences for them. | |
602 | ||
603 | The classes must be numbered in nondecreasing order; that is, | |
604 | a larger-numbered class must never be contained completely | |
605 | in a smaller-numbered class. | |
606 | ||
607 | For any two classes, it is very desirable that there be another | |
608 | class that represents their union. */ | |
609 | ||
610 | /* Convex has classes A (address) and S (scalar). | |
611 | A is further divided into SP_REGS (stack pointer) and INDEX_REGS. | |
6cecf4ce | 612 | SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */ |
2042e9d2 CS |
613 | |
614 | enum reg_class { | |
6cecf4ce CS |
615 | NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, SI_REGS, |
616 | ALL_REGS, LIM_REG_CLASSES | |
2042e9d2 CS |
617 | }; |
618 | ||
619 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
620 | ||
621 | /* Since GENERAL_REGS is the same class as ALL_REGS, | |
622 | don't give it a different class number; just make it an alias. */ | |
623 | ||
624 | #define GENERAL_REGS ALL_REGS | |
625 | ||
626 | /* Give names of register classes as strings for dump file. */ | |
627 | ||
628 | #define REG_CLASS_NAMES \ | |
6cecf4ce CS |
629 | {"NO_REGS", "S_REGS", "INDEX_REGS", "SP_REGS", "A_REGS", "SI_REGS", \ |
630 | "ALL_REGS" } | |
2042e9d2 CS |
631 | |
632 | /* Define which registers fit in which classes. | |
633 | This is an initializer for a vector of HARD_REG_SET | |
634 | of length N_REG_CLASSES. */ | |
635 | ||
6cecf4ce CS |
636 | #define REG_CLASS_CONTENTS \ |
637 | { 0, 0x00ff, 0xfe00, 0x0100, 0xff00, 0xfeff, 0xffff } | |
2042e9d2 CS |
638 | |
639 | /* The same information, inverted: | |
640 | Return the class number of the smallest class containing | |
641 | reg number REGNO. This could be a conditional expression | |
642 | or could index an array. */ | |
643 | ||
d6cca343 | 644 | #define REGNO_REG_CLASS(REGNO) (regno_reg_class[REGNO]) |
2042e9d2 | 645 | |
6cecf4ce CS |
646 | #define S_REGNO_P(REGNO) (((REGNO) - S0_REGNUM) < (unsigned) 8) |
647 | #define A_REGNO_P(REGNO) (((REGNO) - A0_REGNUM) < (unsigned) 8) | |
2042e9d2 CS |
648 | |
649 | #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X))) | |
650 | #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X))) | |
651 | ||
652 | /* The class value for index registers, and the one for base regs. */ | |
653 | ||
654 | #define INDEX_REG_CLASS INDEX_REGS | |
655 | #define BASE_REG_CLASS INDEX_REGS | |
656 | ||
657 | /* Get reg_class from a letter such as appears in the machine description. */ | |
6cecf4ce CS |
658 | /* a => A_REGS |
659 | d => S_REGS ('s' is taken) | |
660 | A => INDEX_REGS (i.e., A_REGS except sp) */ | |
2042e9d2 CS |
661 | |
662 | #define REG_CLASS_FROM_LETTER(C) \ | |
6cecf4ce | 663 | reg_class_from_letter[(unsigned char) (C)] |
2042e9d2 CS |
664 | |
665 | /* The letters I, J, K, L and M in a register constraint string | |
666 | can be used to stand for particular ranges of immediate operands. | |
667 | This macro defines what the ranges are. | |
668 | C is the letter, and VALUE is a constant value. | |
669 | Return 1 if VALUE is in the range specified by C. */ | |
6cecf4ce CS |
670 | /* 'I' is used to pass any CONST_INT and reject any CONST_DOUBLE. |
671 | CONST_DOUBLE integers are handled by G and H constraint chars. */ | |
2042e9d2 | 672 | |
6cecf4ce | 673 | #define CONST_OK_FOR_LETTER_P(VALUE, C) 1 |
2042e9d2 CS |
674 | |
675 | /* Similar, but for floating constants, and defining letters G and H. | |
676 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
6cecf4ce | 677 | /* Convex uses G, H: |
2042e9d2 CS |
678 | value usable in ld.d (low word 0) or ld.l (high word all sign) */ |
679 | ||
6cecf4ce CS |
680 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ |
681 | (((C) == 'G' && LD_D_P (VALUE)) || \ | |
682 | ((C) == 'H' && LD_L_P (VALUE)) || \ | |
683 | 0) | |
2042e9d2 CS |
684 | |
685 | #define LD_D_P(X) (const_double_low_int (X) == 0) | |
686 | ||
687 | #define LD_L_P(X) (const_double_low_int (X) >= 0 \ | |
688 | ? const_double_high_int (X) == 0 \ | |
689 | : const_double_high_int (X) == -1) | |
690 | ||
6cecf4ce CS |
691 | /* Optional extra constraints for this machine. |
692 | For Convex, 'Q' means that OP is a volatile MEM. | |
693 | For volatile scalars, we use instructions that bypass the data cache. */ | |
694 | ||
695 | #define EXTRA_CONSTRAINT(OP, C) \ | |
696 | ((C) == 'Q' ? (GET_CODE (OP) == MEM && MEM_VOLATILE_P (OP) \ | |
697 | && ! TARGET_C1 && TARGET_VOLATILE_NOCACHE) \ | |
698 | : 0) | |
699 | ||
2042e9d2 CS |
700 | /* Given an rtx X being reloaded into a reg required to be |
701 | in class CLASS, return the class of reg to actually use. | |
702 | In general this is just CLASS; but on some machines | |
703 | in some cases it is preferable to use a more restrictive class. */ | |
704 | ||
6cecf4ce | 705 | /* Put 2-word constants that can't be immediate operands into memory. */ |
2042e9d2 CS |
706 | |
707 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
6cecf4ce CS |
708 | ((GET_CODE (X) != CONST_DOUBLE \ |
709 | || GET_MODE (X) == SFmode \ | |
710 | || LD_L_P (X) || LD_D_P (X)) ? (CLASS) : NO_REGS) | |
711 | ||
2042e9d2 CS |
712 | /* Return the maximum number of consecutive registers |
713 | needed to represent mode MODE in a register of class CLASS. */ | |
714 | #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + 7) / 8) | |
715 | \f | |
716 | /* Stack layout; function entry, exit and calling. */ | |
717 | ||
718 | /* Define this if pushing a word on the stack | |
719 | makes the stack pointer a smaller address. */ | |
720 | #define STACK_GROWS_DOWNWARD | |
721 | ||
722 | /* Define this if the nominal address of the stack frame | |
723 | is at the high-address end of the local variables; | |
724 | that is, each additional local variable allocated | |
725 | goes at a more negative offset in the frame. */ | |
726 | #define FRAME_GROWS_DOWNWARD | |
727 | ||
728 | /* Define this if should default to -fcaller-saves. */ | |
729 | #define DEFAULT_CALLER_SAVES | |
730 | ||
731 | /* Offset within stack frame to start allocating local variables at. | |
732 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
733 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
734 | of the first local allocated. */ | |
735 | #define STARTING_FRAME_OFFSET 0 | |
736 | ||
737 | /* If we generate an insn to push BYTES bytes, | |
738 | this says how many the stack pointer really advances by. */ | |
739 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) | |
740 | ||
741 | /* Offset of first parameter from the argument pointer register value. */ | |
742 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
743 | ||
744 | /* Value is the number of bytes of arguments automatically | |
745 | popped when returning from a subroutine call. | |
8b109b37 | 746 | FUNDECL is the declaration node of the function (as a tree), |
2042e9d2 CS |
747 | FUNTYPE is the data type of the function (as a tree), |
748 | or for a library call it is an identifier node for the subroutine name. | |
749 | SIZE is the number of bytes of arguments passed on the stack. */ | |
6cecf4ce | 750 | |
8b109b37 | 751 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (SIZE) |
2042e9d2 CS |
752 | |
753 | /* Define how to find the value returned by a function. | |
754 | VALTYPE is the data type of the value (as a tree). | |
755 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
756 | otherwise, FUNC is 0. */ | |
757 | ||
6cecf4ce CS |
758 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
759 | gen_rtx (REG, TYPE_MODE (VALTYPE), S0_REGNUM) | |
2042e9d2 CS |
760 | |
761 | /* Define how to find the value returned by a library function | |
762 | assuming the value has mode MODE. */ | |
763 | ||
6cecf4ce | 764 | #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, S0_REGNUM) |
2042e9d2 CS |
765 | |
766 | /* Define this if PCC uses the nonreentrant convention for returning | |
767 | structure and union values. */ | |
768 | ||
769 | #define PCC_STATIC_STRUCT_RETURN | |
770 | ||
771 | /* 1 if N is a possible register number for a function value. | |
772 | On the Convex, S0 is the only register thus used. */ | |
773 | ||
6cecf4ce | 774 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == S0_REGNUM) |
2042e9d2 CS |
775 | |
776 | /* 1 if N is a possible register number for function argument passing. */ | |
777 | ||
778 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
779 | \f | |
780 | /* Define a data type for recording info about an argument list | |
781 | during the scan of that argument list. This data type should | |
782 | hold all necessary information about the function itself | |
783 | and about the args processed so far, enough to enable macros | |
6cecf4ce CS |
784 | such as FUNCTION_ARG to determine where the next arg should go. */ |
785 | /* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */ | |
2042e9d2 CS |
786 | |
787 | #define CUMULATIVE_ARGS int | |
788 | ||
789 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
790 | for a call to a function whose data type is FNTYPE. | |
6cecf4ce | 791 | For a library call, FNTYPE is 0. */ |
2042e9d2 | 792 | |
6cecf4ce CS |
793 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ |
794 | ((CUM) = 0) | |
2042e9d2 CS |
795 | |
796 | /* Update the data in CUM to advance over an argument | |
797 | of mode MODE and data type TYPE. | |
798 | (TYPE is null for libcalls where that information may not be available.) */ | |
799 | ||
6cecf4ce CS |
800 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ |
801 | ((CUM) += 1) | |
2042e9d2 CS |
802 | |
803 | /* Define where to put the arguments to a function. | |
804 | Value is zero to push the argument on the stack, | |
805 | or a hard register in which to store the argument. | |
806 | ||
807 | MODE is the argument's machine mode. | |
808 | TYPE is the data type of the argument (as a tree). | |
809 | This is null for libcalls where that information may | |
810 | not be available. | |
811 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
812 | the preceding args and about the function being called. | |
813 | NAMED is nonzero if this argument is a named parameter | |
6cecf4ce | 814 | (otherwise it is an extra parameter matching an ellipsis). |
2042e9d2 | 815 | |
6cecf4ce CS |
816 | Convex: all args go on the stack. But return the arg count |
817 | as the "next arg register" to be passed to gen_call. */ | |
2042e9d2 | 818 | |
6cecf4ce CS |
819 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
820 | ((MODE) == VOIDmode ? gen_rtx (CONST_INT, VOIDmode, (CUM)) : 0) | |
2042e9d2 CS |
821 | |
822 | /* This macro generates the assembly code for function entry. | |
823 | FILE is a stdio stream to output the code to. | |
824 | SIZE is an int: how many units of temporary storage to allocate. | |
825 | Refer to the array `regs_ever_live' to determine which registers | |
826 | to save; `regs_ever_live[I]' is nonzero if register number I | |
827 | is ever used in the function. This macro is responsible for | |
828 | knowing which registers should not be saved even if used. */ | |
829 | ||
6cecf4ce CS |
830 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ |
831 | { \ | |
832 | int size = ((SIZE) + 7) & -8; \ | |
833 | if (size != 0) \ | |
834 | fprintf (FILE, "\tsub.w #%d,sp\n", size); \ | |
835 | } | |
836 | ||
837 | /* This macro generates the assembly code for function exit, | |
838 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
839 | then individual return instructions are generated for each | |
840 | return statement. Args are same as for FUNCTION_PROLOGUE. */ | |
841 | ||
842 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
843 | { \ | |
844 | /* Follow function with a zero to stop c34 icache prefetching. */ \ | |
845 | fprintf (FILE, "\tds.h 0\n"); \ | |
846 | } | |
2042e9d2 CS |
847 | |
848 | /* Output assembler code for a block containing the constant parts | |
849 | of a trampoline, leaving space for the variable parts. */ | |
850 | ||
851 | /* On convex, the code for a trampoline is | |
852 | ld.w #<link>,s0 | |
853 | jmp <func> */ | |
854 | ||
855 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
856 | { \ | |
6cecf4ce CS |
857 | fprintf (FILE, "\tld.w #69696969,s0\n"); \ |
858 | fprintf (FILE, "\tjmp 52525252\n"); \ | |
2042e9d2 CS |
859 | } |
860 | ||
861 | /* Length in units of the trampoline for entering a nested function. */ | |
862 | ||
863 | #define TRAMPOLINE_SIZE 12 | |
864 | ||
865 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
866 | FNADDR is an RTX for the address of the function's pure code. | |
867 | CXT is an RTX for the static chain value for the function. */ | |
868 | ||
869 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
870 | { \ | |
871 | emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 2)), CXT); \ | |
872 | emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 8)), FNADDR); \ | |
6cecf4ce CS |
873 | emit_call_insn (gen_call_pop (gen_rtx (MEM, QImode, \ |
874 | gen_rtx (SYMBOL_REF, Pmode, \ | |
875 | "__enable_execute_stack")), \ | |
876 | const0_rtx, const0_rtx, const0_rtx)); \ | |
2042e9d2 CS |
877 | } |
878 | ||
879 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
880 | for profiling a function entry. */ | |
881 | ||
882 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
883 | fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO)); | |
884 | ||
885 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
886 | the stack pointer does not matter. The value is tested only in | |
887 | functions that have frame pointers. | |
888 | No definition is equivalent to always zero. */ | |
889 | ||
890 | #define EXIT_IGNORE_STACK 1 | |
891 | ||
2042e9d2 CS |
892 | /* Store in the variable DEPTH the initial difference between the |
893 | frame pointer reg contents and the stack pointer reg contents, | |
894 | as of the start of the function body. This depends on the layout | |
895 | of the fixed parts of the stack frame and on how registers are saved. */ | |
896 | #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ | |
6cecf4ce | 897 | { (DEPTH) = (get_frame_size () + 7) & -8; } |
2042e9d2 CS |
898 | \f |
899 | /* Addressing modes, and classification of registers for them. */ | |
900 | ||
901 | /* #define HAVE_POST_INCREMENT */ | |
902 | /* #define HAVE_POST_DECREMENT */ | |
903 | ||
904 | /* #define HAVE_PRE_DECREMENT */ | |
905 | /* #define HAVE_PRE_INCREMENT */ | |
906 | ||
907 | /* Macros to check register numbers against specific register classes. */ | |
908 | ||
909 | /* These assume that REGNO is a hard or pseudo reg number. | |
910 | They give nonzero only if REGNO is a hard reg of the suitable class | |
911 | or a pseudo reg currently allocated to a suitable hard reg. | |
912 | Since they use reg_renumber, they are safe only once reg_renumber | |
913 | has been allocated, which happens in local-alloc.c. */ | |
914 | ||
915 | #define REGNO_OK_FOR_INDEX_P(regno) \ | |
6cecf4ce CS |
916 | ((regno) <= LAST_VIRTUAL_REGISTER \ |
917 | ? regno_ok_for_index_p[regno] \ | |
918 | : regno_ok_for_index_p[reg_renumber[regno]]) | |
2042e9d2 CS |
919 | |
920 | #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno) | |
921 | \f | |
922 | /* Maximum number of registers that can appear in a valid memory address. */ | |
923 | ||
924 | #define MAX_REGS_PER_ADDRESS 1 | |
925 | ||
926 | /* 1 if X is an rtx for a constant that is a valid address. */ | |
927 | ||
6eff269e BK |
928 | #define CONSTANT_ADDRESS_P(X) \ |
929 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
930 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
931 | || GET_CODE (X) == HIGH) | |
2042e9d2 CS |
932 | |
933 | /* Nonzero if the constant value X is a legitimate general operand. | |
934 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
935 | ||
6cecf4ce | 936 | /* For convex, bounce 2-word constants that can't be immediate operands. */ |
2042e9d2 CS |
937 | |
938 | #define LEGITIMATE_CONSTANT_P(X) \ | |
6cecf4ce CS |
939 | (GET_CODE (X) != CONST_DOUBLE \ |
940 | || GET_MODE (X) == SFmode \ | |
941 | || LD_L_P (X) || LD_D_P (X)) | |
2042e9d2 CS |
942 | |
943 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
944 | and check its validity for a certain class. | |
945 | We have two alternate definitions for each of them. | |
946 | The usual definition accepts all pseudo regs; the other rejects | |
947 | them unless they have been allocated suitable hard regs. | |
948 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
949 | ||
950 | Most source files want to accept pseudo regs in the hope that | |
951 | they will get allocated to the class that the insn wants them to be in. | |
952 | Source files for reload pass need to be strict. | |
953 | After reload, it makes no difference, since pseudo regs have | |
954 | been eliminated by then. */ | |
955 | ||
956 | #ifndef REG_OK_STRICT | |
957 | ||
958 | /* Nonzero if X is a hard reg that can be used as an index | |
959 | or if it is a pseudo reg. */ | |
d31d3db4 | 960 | #define REG_OK_FOR_INDEX_P(X) \ |
6cecf4ce CS |
961 | (REGNO (X) > LAST_VIRTUAL_REGISTER || regno_ok_for_index_p[REGNO (X)]) |
962 | ||
2042e9d2 CS |
963 | /* Nonzero if X is a hard reg that can be used as a base reg |
964 | or if it is a pseudo reg. */ | |
d31d3db4 | 965 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) |
2042e9d2 CS |
966 | |
967 | #else | |
968 | ||
969 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
970 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
6cecf4ce | 971 | |
2042e9d2 CS |
972 | /* Nonzero if X is a hard reg that can be used as a base reg. */ |
973 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
974 | ||
975 | #endif | |
976 | \f | |
977 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
978 | that is a valid memory address for an instruction. | |
979 | The MODE argument is the machine mode for the MEM expression | |
980 | that wants to use this address. | |
981 | ||
982 | For Convex, valid addresses are | |
983 | indirectable or (MEM indirectable) | |
984 | where indirectable is | |
985 | const, reg, (PLUS reg const) | |
986 | ||
6cecf4ce CS |
987 | We don't use indirection since with insn scheduling, load + indexing |
988 | is better. */ | |
2042e9d2 CS |
989 | |
990 | /* 1 if X is an address that we could indirect through. */ | |
991 | #define INDIRECTABLE_ADDRESS_P(X) \ | |
992 | (CONSTANT_ADDRESS_P (X) \ | |
993 | || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ | |
994 | || (GET_CODE (X) == PLUS \ | |
995 | && GET_CODE (XEXP (X, 0)) == REG \ | |
996 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
997 | && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
998 | || (GET_CODE (X) == PLUS \ | |
999 | && GET_CODE (XEXP (X, 1)) == REG \ | |
1000 | && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
1001 | && CONSTANT_ADDRESS_P (XEXP (X, 0)))) | |
1002 | ||
1003 | /* Go to ADDR if X is a valid address. */ | |
1004 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1005 | { register rtx xfoob = (X); \ | |
1006 | if (INDIRECTABLE_ADDRESS_P (xfoob)) \ | |
1007 | goto ADDR; \ | |
6cecf4ce | 1008 | if (GET_CODE (xfoob) == PRE_DEC && XEXP (xfoob, 0) == stack_pointer_rtx) \ |
2042e9d2 | 1009 | goto ADDR; \ |
6cecf4ce | 1010 | } |
2042e9d2 CS |
1011 | \f |
1012 | /* Try machine-dependent ways of modifying an illegitimate address | |
1013 | to be legitimate. If we find one, return the new, valid address. | |
1014 | This macro is used in only one place: `memory_address' in explow.c. | |
1015 | ||
1016 | OLDX is the address as it was before break_out_memory_refs was called. | |
1017 | In some cases it is useful to look at this to decide what needs to be done. | |
1018 | ||
1019 | MODE and WIN are passed so that this macro can use | |
1020 | GO_IF_LEGITIMATE_ADDRESS. | |
1021 | ||
1022 | It is always safe for this macro to do nothing. It exists to recognize | |
1023 | opportunities to optimize the output. | |
1024 | ||
1025 | For Convex, nothing needs to be done. */ | |
1026 | ||
1027 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} | |
1028 | ||
1029 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1030 | has an effect that depends on the machine mode it is used for. */ | |
1031 | ||
1032 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} | |
1033 | \f | |
1034 | /* Specify the machine mode that this machine uses | |
1035 | for the index in the tablejump instruction. */ | |
1036 | #define CASE_VECTOR_MODE SImode | |
1037 | ||
1038 | /* Define this if the case instruction expects the table | |
1039 | to contain offsets from the address of the table. | |
1040 | Do not define this if the table should contain absolute addresses. */ | |
1041 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
1042 | ||
1043 | /* Define this if the case instruction drops through after the table | |
1044 | when the index is out of range. Don't define it if the case insn | |
1045 | jumps to the default label instead. */ | |
1046 | /* #define CASE_DROPS_THROUGH */ | |
1047 | ||
1048 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1049 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1050 | ||
1051 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1052 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1053 | ||
1054 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1055 | #define DEFAULT_SIGNED_CHAR 1 | |
1056 | ||
1057 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1058 | also convert validly to an unsigned one. */ | |
1059 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
1060 | ||
1061 | /* Max number of bytes we can move from memory to memory | |
1062 | in one reasonably fast instruction. */ | |
1063 | #define MOVE_MAX 8 | |
1064 | ||
1065 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
1066 | /* #define SLOW_ZERO_EXTEND */ | |
1067 | ||
1068 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
6cecf4ce | 1069 | #define SLOW_BYTE_ACCESS (! TARGET_C2) |
2042e9d2 CS |
1070 | |
1071 | /* Define if shifts truncate the shift count | |
1072 | which implies one can omit a sign-extension or zero-extension | |
1073 | of a shift count. */ | |
d089a279 | 1074 | /* #define SHIFT_COUNT_TRUNCATED */ |
2042e9d2 CS |
1075 | |
1076 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1077 | is done just by pretending it is already truncated. */ | |
1078 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1079 | ||
1080 | /* On Convex, it is as good to call a constant function address as to | |
1081 | call an address kept in a register. */ | |
1082 | #define NO_FUNCTION_CSE | |
1083 | ||
1084 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
1085 | #define PROMOTE_PROTOTYPES | |
1086 | ||
1087 | /* Specify the machine mode that pointers have. | |
1088 | After generation of rtl, the compiler makes no further distinction | |
1089 | between pointers and any other objects of this machine mode. */ | |
1090 | #define Pmode SImode | |
1091 | ||
1092 | /* A function address in a call instruction | |
1093 | is a byte address (for indexing purposes) | |
1094 | so give the MEM rtx a byte's mode. */ | |
1095 | #define FUNCTION_MODE QImode | |
1096 | ||
1097 | /* Compute the cost of computing a constant rtl expression RTX | |
1098 | whose rtx-code is CODE. The body of this macro is a portion | |
1099 | of a switch statement. If the code is computed here, | |
1100 | return it with a return statement. Otherwise, break from the switch. */ | |
1101 | ||
3bb22aee | 1102 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
2042e9d2 CS |
1103 | case CONST: \ |
1104 | case LABEL_REF: \ | |
1105 | case SYMBOL_REF: \ | |
1106 | case CONST_INT: \ | |
2042e9d2 | 1107 | case CONST_DOUBLE: \ |
6cecf4ce | 1108 | return 0; |
2042e9d2 CS |
1109 | |
1110 | /* Provide the costs of a rtl expression. This is in the body of a | |
6cecf4ce | 1111 | switch on CODE. */ |
2042e9d2 | 1112 | |
3bb22aee | 1113 | #define RTX_COSTS(RTX,CODE,OUTER_CODE) \ |
6cecf4ce CS |
1114 | case PLUS: \ |
1115 | if (regno_pointer_flag != 0 \ | |
1116 | && GET_CODE (XEXP (RTX, 0)) == REG \ | |
1117 | && REGNO_POINTER_FLAG (REGNO (XEXP (RTX, 0))) \ | |
1118 | && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \ | |
1119 | return 0; \ | |
1120 | else break; \ | |
2042e9d2 | 1121 | case MULT: \ |
6cecf4ce | 1122 | return 4 * (char) (0x03060403 >> target_cpu * 8); \ |
2042e9d2 CS |
1123 | case ASHIFT: \ |
1124 | case LSHIFTRT: \ | |
1125 | case ASHIFTRT: \ | |
6cecf4ce CS |
1126 | return 4 * (char) (0x03010403 >> target_cpu * 8); \ |
1127 | case MEM: \ | |
1128 | return 5; | |
2042e9d2 CS |
1129 | |
1130 | /* Compute the cost of an address. This is meant to approximate the size | |
1131 | and/or execution delay of an insn using that address. If the cost is | |
1132 | approximated by the RTL complexity, including CONST_COSTS above, as | |
1133 | is usually the case for CISC machines, this macro should not be defined. | |
1134 | For aggressively RISCy machines, only one insn format is allowed, so | |
1135 | this macro should be a constant. The value of this macro only matters | |
1136 | for valid addresses. */ | |
1137 | ||
6cecf4ce | 1138 | #define ADDRESS_COST(RTX) 0 |
2042e9d2 | 1139 | |
e622cd25 CS |
1140 | /* Specify the cost of a branch insn; roughly the number of extra insns that |
1141 | should be added to avoid a branch. */ | |
1142 | ||
1143 | #define BRANCH_COST 0 | |
1144 | ||
6cecf4ce CS |
1145 | /* Adjust the cost of dependences. */ |
1146 | ||
1147 | #define ADJUST_COST(INSN,LINK,DEP,COST) \ | |
1148 | { \ | |
1149 | /* Antidependencies don't block issue. */ \ | |
1150 | if (REG_NOTE_KIND (LINK) != 0) \ | |
1151 | (COST) = 0; \ | |
1152 | /* C38 situations where delay depends on context */ \ | |
1153 | else if (TARGET_C38 \ | |
1154 | && GET_CODE (PATTERN (INSN)) == SET \ | |
1155 | && GET_CODE (PATTERN (DEP)) == SET) \ | |
1156 | { \ | |
1157 | enum attr_type insn_type = get_attr_type (INSN); \ | |
1158 | enum attr_type dep_type = get_attr_type (DEP); \ | |
1159 | /* index register must be ready one cycle early */ \ | |
1160 | if (insn_type == TYPE_MLDW || insn_type == TYPE_MLDL \ | |
1161 | || (insn_type == TYPE_MST \ | |
1162 | && reg_mentioned_p (SET_DEST (PATTERN (DEP)), \ | |
1163 | SET_SRC (PATTERN (INSN))))) \ | |
1164 | (COST) += 1; \ | |
1165 | /* alu forwarding off alu takes two */ \ | |
1166 | if (dep_type == TYPE_ALU \ | |
1167 | && insn_type != TYPE_ALU \ | |
1168 | && ! (insn_type == TYPE_MST \ | |
1169 | && SET_DEST (PATTERN (DEP)) == SET_SRC (PATTERN (INSN)))) \ | |
1170 | (COST) += 1; \ | |
1171 | } \ | |
1172 | } | |
2042e9d2 | 1173 | |
6cecf4ce CS |
1174 | /* Convex uses Vax or IEEE floats. |
1175 | Follow the host format. */ | |
1176 | #define TARGET_FLOAT_FORMAT HOST_FLOAT_FORMAT | |
1177 | ||
1178 | /* But must prevent real.c from constructing Vax dfloats */ | |
1179 | #define REAL_VALUE_ATOF(X,S) atof (X) | |
1180 | extern double atof(); | |
1181 | ||
1182 | /* Check a `double' value for validity for a particular machine mode. */ | |
2e15b172 RK |
1183 | #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \ |
1184 | overflow = check_float_value (MODE, &D, OVERFLOW) | |
2042e9d2 CS |
1185 | \f |
1186 | /* Tell final.c how to eliminate redundant test instructions. */ | |
1187 | ||
1188 | /* Here we define machine-dependent flags and fields in cc_status | |
1189 | (see `conditions.h'). No extra ones are needed for convex. */ | |
1190 | ||
1191 | /* Store in cc_status the expressions | |
1192 | that the condition codes will describe | |
1193 | after execution of an instruction whose pattern is EXP. | |
1194 | Do not alter them if the instruction would not alter the cc's. */ | |
1195 | ||
1196 | #define NOTICE_UPDATE_CC(EXP,INSN) {} | |
1197 | \f | |
1198 | /* Control the assembler format that we output. */ | |
1199 | ||
1200 | /* Output at beginning of assembler file. */ | |
1201 | ||
6cecf4ce CS |
1202 | #if _IEEE_FLOAT_ |
1203 | #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n.fpmode ieee\n") | |
1204 | #else | |
1205 | #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n.fpmode native\n") | |
1206 | #endif | |
2042e9d2 CS |
1207 | |
1208 | /* Output to assembler file text saying following lines | |
1209 | may contain character constants, extra white space, comments, etc. */ | |
1210 | ||
1211 | #define ASM_APP_ON ";APP\n" | |
1212 | ||
1213 | /* Output to assembler file text saying following lines | |
1214 | no longer contain unusual constructs. */ | |
1215 | ||
1216 | #define ASM_APP_OFF ";NO_APP\n" | |
1217 | ||
1218 | /* Alignment with Convex's assembler goes like this: | |
1219 | .text can be .aligned up to a halfword. | |
1220 | .data and .bss can be .aligned up to a longword. | |
1221 | .lcomm is not supported, explicit declarations in .bss must be used instead. | |
1222 | We get alignment for word and longword .text data by conventionally | |
1223 | using .text 2 for word-aligned data and .text 3 for longword-aligned | |
1224 | data. This requires that the data's size be a multiple of its alignment, | |
1225 | which seems to be always true. */ | |
1226 | ||
1227 | /* Output before read-only data. */ | |
1228 | ||
1229 | #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text") | |
1230 | ||
1231 | /* Output before writable data. */ | |
1232 | ||
1233 | #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data") | |
1234 | ||
1235 | /* Output before uninitialized data. */ | |
1236 | ||
1237 | #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss") | |
1238 | ||
1239 | /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */ | |
1240 | ||
1241 | #define EXTRA_SECTIONS in_bss | |
1242 | ||
1243 | #define EXTRA_SECTION_FUNCTIONS \ | |
1244 | void \ | |
1245 | bss_section () \ | |
1246 | { \ | |
1247 | if (in_section != in_bss) \ | |
1248 | { \ | |
1249 | fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ | |
1250 | in_section = in_bss; \ | |
1251 | } \ | |
1252 | } | |
1253 | ||
1254 | /* This is how to output an assembler line | |
1255 | that says to advance the location counter | |
1256 | to a multiple of 2**LOG bytes. */ | |
1257 | ||
1258 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1259 | if (current_section_is_text && (LOG) > 1) \ | |
1260 | fprintf (FILE, ".text %d\n", LOG); \ | |
1261 | else if (current_section_is_text) \ | |
1262 | fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \ | |
1263 | else \ | |
1264 | fprintf (FILE, ".align %d\n", 1 << (LOG)) | |
1265 | ||
1266 | /* How to refer to registers in assembler output. | |
1267 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1268 | ||
6cecf4ce CS |
1269 | #define REGISTER_NAMES \ |
1270 | { \ | |
1271 | "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ | |
1272 | "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp", \ | |
1273 | } | |
2042e9d2 CS |
1274 | |
1275 | /* This is BSD, so it wants DBX format. */ | |
1276 | ||
1277 | #define DBX_DEBUGGING_INFO | |
1278 | ||
1279 | /* How to renumber registers for dbx and gdb. */ | |
1280 | ||
1281 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
1282 | ||
1283 | /* Do not break .stabs pseudos into continuations. */ | |
1284 | ||
1285 | #define DBX_CONTIN_LENGTH 0 | |
1286 | ||
1287 | /* This is the char to use for continuation (in case we need to turn | |
1288 | continuation back on). */ | |
1289 | ||
1290 | #define DBX_CONTIN_CHAR '?' | |
1291 | ||
1292 | /* Don't use stab extensions until GDB v4 port is available for convex. */ | |
1293 | ||
1294 | #define DEFAULT_GDB_EXTENSIONS 0 | |
1295 | #define DBX_NO_XREFS | |
1296 | ||
1297 | /* This is how to output the definition of a user-level label named NAME, | |
1298 | such as the label on a static function or variable NAME. */ | |
1299 | ||
1300 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1301 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1302 | ||
1303 | /* This is how to output a command to make the user-level label named NAME | |
1304 | defined for reference from other files. */ | |
1305 | ||
1306 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1307 | do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1308 | ||
1309 | /* This is how to output a reference to a user-level label named NAME. */ | |
1310 | ||
1311 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
1312 | fprintf (FILE, "_%s", NAME) | |
1313 | ||
1314 | /* This is how to output an internal numbered label where | |
1315 | PREFIX is the class of label and NUM is the number within the class. */ | |
1316 | ||
1317 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
1318 | fprintf (FILE, "%s%d:\n", PREFIX, NUM) | |
1319 | ||
1320 | /* Put case tables in .text 2, where they will be word-aligned */ | |
1321 | ||
1322 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ | |
1323 | ASM_OUTPUT_ALIGN (FILE, 2); \ | |
1324 | ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) | |
1325 | ||
1326 | #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \ | |
1327 | ASM_OUTPUT_ALIGN (FILE, 1) | |
1328 | ||
1329 | /* This is how to store into the string LABEL | |
1330 | the symbol_ref name of an internal numbered label where | |
1331 | PREFIX is the class of label and NUM is the number within the class. | |
1332 | This is suitable for output with `assemble_name'. */ | |
1333 | ||
1334 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1335 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
1336 | ||
1337 | /* This is how to output an assembler line defining a `double' constant. */ | |
1338 | ||
6cecf4ce CS |
1339 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ |
1340 | outfloat (FILE, VALUE, "%.17e", "\tds.d ", "\n") | |
2042e9d2 CS |
1341 | |
1342 | /* This is how to output an assembler line defining a `float' constant. */ | |
1343 | ||
6cecf4ce CS |
1344 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ |
1345 | outfloat (FILE, VALUE, "%.9e", "\tds.s ", "\n") | |
2042e9d2 CS |
1346 | |
1347 | /* This is how to output an assembler line defining an `int' constant. */ | |
1348 | ||
1349 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
6cecf4ce CS |
1350 | { \ |
1351 | fprintf (FILE, "\tds.w "); \ | |
1352 | output_addr_const (FILE, simplify_for_convex (VALUE)); \ | |
1353 | fprintf (FILE, "\n"); \ | |
1354 | } | |
2042e9d2 CS |
1355 | |
1356 | /* Likewise for a `long long int' constant. */ | |
1357 | ||
1358 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ | |
1359 | { \ | |
1360 | if (GET_CODE (VALUE) == CONST_DOUBLE) \ | |
1361 | fprintf (FILE, "\tds.w %d,%d\n", \ | |
1362 | const_double_high_int (VALUE), const_double_low_int (VALUE)); \ | |
1363 | else if (GET_CODE (VALUE) == CONST_INT) \ | |
1364 | { \ | |
1365 | int val = INTVAL (VALUE); \ | |
1366 | fprintf (FILE, "\tds.w %d,%d\n", val < 0 ? -1 : 0, val); \ | |
1367 | } \ | |
1368 | else \ | |
1369 | abort (); \ | |
1370 | } | |
1371 | ||
1372 | /* Likewise for `char' and `short' constants. */ | |
1373 | ||
1374 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1375 | ( fprintf (FILE, "\tds.h "), \ | |
1376 | output_addr_const (FILE, (VALUE)), \ | |
1377 | fprintf (FILE, "\n")) | |
1378 | ||
1379 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1380 | ( fprintf (FILE, "\tds.b "), \ | |
1381 | output_addr_const (FILE, (VALUE)), \ | |
1382 | fprintf (FILE, "\n")) | |
1383 | ||
1384 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1385 | ||
1386 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1387 | fprintf (FILE, "\tds.b %#x\n", (VALUE)) | |
1388 | ||
1389 | /* This is how to output a string */ | |
1390 | ||
1391 | #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \ | |
1392 | int i; \ | |
1393 | fprintf ((FILE), "\tds.b \""); \ | |
1394 | for (i = 0; i < (SIZE); i++) { \ | |
1395 | register int c = (STR)[i] & 0377; \ | |
1396 | if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \ | |
1397 | putc (c, (FILE)); \ | |
1398 | else \ | |
1399 | fprintf ((FILE), "\\%03o", c);} \ | |
1400 | fprintf ((FILE), "\"\n");} while (0) | |
1401 | ||
1402 | /* This is how to output an insn to push a register on the stack. | |
1403 | It need not be very fast code. */ | |
1404 | ||
1405 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1406 | fprintf (FILE, "\tpsh.%c %s\n", \ | |
1407 | S_REGNO_P (REGNO) ? 'l' : 'w', \ | |
1408 | reg_names[REGNO]) | |
1409 | ||
1410 | /* This is how to output an insn to pop a register from the stack. | |
1411 | It need not be very fast code. */ | |
1412 | ||
1413 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1414 | fprintf (FILE, "\tpop.%c %s\n", \ | |
1415 | S_REGNO_P (REGNO) ? 'l' : 'w', \ | |
1416 | reg_names[REGNO]) | |
1417 | ||
1418 | /* This is how to output an element of a case-vector that is absolute. */ | |
1419 | ||
1420 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1421 | fprintf (FILE, "\tds.w L%d\n", VALUE) | |
1422 | ||
1423 | /* This is how to output an element of a case-vector that is relative. | |
1424 | (not used on Convex) */ | |
1425 | ||
1426 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
1427 | fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL) | |
1428 | ||
1429 | /* This is how to output an assembler line | |
1430 | that says to advance the location counter by SIZE bytes. */ | |
1431 | ||
1432 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1433 | fprintf (FILE, "\tds.b %u(0)\n", (SIZE)) | |
1434 | ||
1435 | /* This says how to output an assembler line | |
1436 | to define a global common symbol. */ | |
1437 | ||
1438 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1439 | ( fputs (".comm ", (FILE)), \ | |
1440 | assemble_name ((FILE), (NAME)), \ | |
1441 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
1442 | ||
1443 | /* This says how to output an assembler line | |
1444 | to define a local common symbol. */ | |
1445 | ||
1446 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
1447 | ( bss_section (), \ | |
1448 | assemble_name ((FILE), (NAME)), \ | |
1449 | fprintf ((FILE), ":\tbs.b %u\n", (ROUNDED))) | |
1450 | ||
1451 | /* Store in OUTPUT a string (made with alloca) containing | |
1452 | an assembler-name for a local static variable named NAME. | |
1453 | LABELNO is an integer which is different for each call. */ | |
1454 | ||
1455 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1456 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1457 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1458 | ||
6cecf4ce CS |
1459 | /* Output an arg count before function entries. */ |
1460 | ||
1461 | #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ | |
1462 | asm_declare_function_name (FILE, NAME, DECL) | |
1463 | ||
2042e9d2 CS |
1464 | /* Define the parentheses used to group arithmetic operations |
1465 | in assembler code. */ | |
1466 | ||
1467 | #define ASM_OPEN_PAREN "(" | |
1468 | #define ASM_CLOSE_PAREN ")" | |
1469 | ||
1470 | /* Define results of standard character escape sequences. */ | |
1471 | #define TARGET_BELL 007 | |
1472 | #define TARGET_BS 010 | |
1473 | #define TARGET_TAB 011 | |
1474 | #define TARGET_NEWLINE 012 | |
1475 | #define TARGET_VT 013 | |
1476 | #define TARGET_FF 014 | |
1477 | #define TARGET_CR 015 | |
1478 | ||
1479 | /* Print an instruction operand X on file FILE. | |
1480 | CODE is the code from the %-spec that requested printing this operand; | |
1481 | if `%z3' was used to print operand 3, then CODE is 'z'. */ | |
1482 | ||
1483 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
6cecf4ce | 1484 | print_operand (FILE, X, CODE) |
2042e9d2 CS |
1485 | |
1486 | /* Print a memory operand whose address is X, on file FILE. */ | |
1487 | ||
1488 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
6cecf4ce | 1489 | print_operand_address (FILE, ADDR) |
2042e9d2 | 1490 | \f |
2042e9d2 CS |
1491 | /* Do not put out GNU stabs for constructors and destructors. |
1492 | ld bounces them. */ | |
1493 | ||
1494 | #define FASCIST_ASSEMBLER | |
1495 | ||
6cecf4ce CS |
1496 | /* __gcc_cleanup is loader-aliased to __ap$do_registered_functions if we |
1497 | are linking against standard libc, 0 if old (-traditional) libc. */ | |
2042e9d2 | 1498 | |
6cecf4ce CS |
1499 | #define EXIT_BODY \ |
1500 | { \ | |
1501 | extern void __gcc_cleanup (); \ | |
1502 | if (__gcc_cleanup != _cleanup) \ | |
1503 | __gcc_cleanup (); \ | |
1504 | _cleanup (); \ | |
1505 | } | |
1506 | \f | |
6cecf4ce CS |
1507 | /* Header for convex.c. |
1508 | Here at the end so we can use types defined above. */ | |
2042e9d2 | 1509 | |
6cecf4ce CS |
1510 | extern int target_cpu; |
1511 | extern int current_section_is_text; | |
1512 | extern enum reg_class regno_reg_class[]; | |
1513 | extern enum reg_class reg_class_from_letter[]; | |
1514 | extern char regno_ok_for_index_p_base[]; | |
1515 | #define regno_ok_for_index_p (regno_ok_for_index_p_base + 1) | |
2042e9d2 | 1516 | |
6cecf4ce CS |
1517 | extern int const_double_low_int (); |
1518 | extern int const_double_high_int (); | |
1519 | extern char *output_cmp (); | |
1520 | extern char *output_condjump (); | |
1521 | extern char *output_call (); | |
1522 | extern void gen_ap_for_call (); | |
8f530280 | 1523 | extern int check_float_value (); |
6cecf4ce | 1524 | extern void asm_declare_function_name (); |