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2042e9d2 CS |
1 | /* Definitions of target machine for GNU compiler. Convex version. |
2 | Copyright (C) 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Standard GCC variables that we reference. */ | |
22 | ||
23 | extern int target_flags; | |
24 | ||
25 | /* Interface to convex.c. */ | |
26 | ||
27 | extern int current_section_is_text; | |
28 | extern int const_double_low_int (); | |
29 | extern int const_double_high_int (); | |
30 | extern char *set_cmp (), *gen_cmp (); | |
31 | extern char *output_call (); | |
32 | ||
33 | /* Use the proper incantation to search Posix-compliant libraries. */ | |
34 | ||
35 | #define LINK_SPEC \ | |
36 | "%{!traditional:-Eposix}%{traditional:-Enoposix}\ | |
37 | -A__iob=___ap$iob\ | |
38 | -A_use_libc_sema=___ap$use_libc_sema\ | |
39 | -L /usr/lib" | |
40 | ||
41 | /* Use the matching startup files. */ | |
42 | ||
43 | #define STARTFILE_SPEC \ | |
44 | "%{pg:/usr/lib/crt/gcrt0.o}\ | |
45 | %{!pg:%{p:/usr/lib/crt/mcrt0.o}\ | |
46 | %{!p:/usr/lib/crt/crt0.o}}" | |
47 | ||
48 | /* Names to predefine in the preprocessor for this target machine. */ | |
49 | ||
50 | #define CPP_PREDEFINES "-Dconvex -Dunix" | |
51 | ||
52 | /* Print subsidiary information on the compiler version in use. */ | |
53 | ||
54 | #define TARGET_VERSION fprintf (stderr, " (convex)"); | |
55 | ||
56 | /* Macros used in the machine description to test the flags. */ | |
57 | ||
58 | /* | |
59 | -mc1 C1 target (avoid C2-only instructions) | |
60 | -mc2 C2 target | |
61 | -mc32 vitesse | |
62 | -mc34 javelin | |
63 | -mc38 neptune | |
64 | -margcount use standard calling sequence, with arg count word | |
65 | -mnoargcount don't push arg count, depend on symbol table | |
66 | */ | |
67 | ||
68 | #define TARGET_C1 (target_flags & 1) | |
69 | #define TARGET_C2 (target_flags & 2) | |
70 | #define TARGET_C34 (target_flags & 4) | |
71 | #define TARGET_C38 (target_flags & 010) | |
555b950b | 72 | #define TARGET_INDIRECTS (1) |
2042e9d2 CS |
73 | #define TARGET_ARGCOUNT (target_flags & 040) |
74 | ||
75 | /* Macro to define tables used to set the flags. | |
76 | This is a list in braces of pairs in braces, | |
77 | each pair being { "NAME", VALUE } | |
78 | where VALUE is the bits to set or minus the bits to clear. | |
79 | An empty string NAME is used to identify the default VALUE. */ | |
80 | ||
81 | #define TARGET_SWITCHES \ | |
82 | { { "c1", 021 }, \ | |
83 | { "c2", 022 }, \ | |
84 | { "c32", 022 }, \ | |
85 | { "c34", 006 }, \ | |
86 | { "c38", 012 }, \ | |
87 | { "noc1", -001 }, \ | |
555b950b | 88 | { "noc2", -002 }, \ |
2042e9d2 CS |
89 | { "argcount", 040 }, \ |
90 | { "noargcount", -040 }, \ | |
91 | { "", TARGET_DEFAULT }} | |
92 | ||
93 | /* Default target_flags if no switches specified. */ | |
94 | ||
95 | #ifndef TARGET_DEFAULT | |
96 | #define TARGET_DEFAULT 0 | |
97 | #endif | |
98 | ||
99 | /* Allow $ in identifiers. */ | |
100 | ||
101 | #define DOLLARS_IN_IDENTIFIERS 2 | |
102 | \f | |
103 | /* Target machine storage layout */ | |
104 | ||
105 | /* Define this if most significant bit is lowest numbered | |
106 | in instructions that operate on numbered bit-fields. */ | |
107 | #define BITS_BIG_ENDIAN 1 | |
108 | ||
109 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
110 | #define BYTES_BIG_ENDIAN 1 | |
111 | ||
112 | /* Define this if most significant word of a multiword number is numbered. */ | |
113 | #define WORDS_BIG_ENDIAN 1 | |
114 | ||
b4ac57ab | 115 | /* Number of bits in an addressable storage unit */ |
2042e9d2 CS |
116 | #define BITS_PER_UNIT 8 |
117 | ||
118 | /* Width in bits of a "word", which is the contents of a machine register. | |
119 | Note that this is not necessarily the width of data type `int'; | |
120 | if using 16-bit ints on a 68000, this would still be 32. | |
121 | But on a machine with 16-bit registers, this would be 16. */ | |
122 | #define BITS_PER_WORD 64 | |
123 | ||
124 | /* Width of a word, in units (bytes). */ | |
125 | #define UNITS_PER_WORD 8 | |
126 | ||
127 | /* Width in bits of a pointer. | |
128 | See also the macro `Pmode' defined below. */ | |
129 | #define POINTER_SIZE 32 | |
130 | ||
131 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
132 | #define PARM_BOUNDARY 32 | |
133 | ||
134 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
135 | #define STACK_BOUNDARY 32 | |
136 | ||
137 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
138 | #define FUNCTION_BOUNDARY 16 | |
139 | ||
140 | /* Alignment of field after `int : 0' in a structure. */ | |
141 | #define EMPTY_FIELD_BOUNDARY 32 | |
142 | ||
143 | /* Every structure's size must be a multiple of this. */ | |
144 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
145 | ||
146 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
147 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
148 | ||
149 | /* No data type wants to be aligned rounder than this. */ | |
150 | /* beware of doubles in structs -- 64 is incompatible with pcc */ | |
151 | #define BIGGEST_ALIGNMENT 32 | |
152 | ||
b4ac57ab | 153 | /* Set this nonzero if move instructions will actually fail to work |
2042e9d2 | 154 | when given unaligned data. */ |
b4ac57ab | 155 | #define STRICT_ALIGNMENT 0 |
2042e9d2 CS |
156 | |
157 | /* Define sizes of basic C types to conform to ordinary usage -- these | |
158 | types depend on BITS_PER_WORD otherwise. */ | |
159 | #define CHAR_TYPE_SIZE 8 | |
160 | #define SHORT_TYPE_SIZE 16 | |
161 | #define INT_TYPE_SIZE 32 | |
162 | #define LONG_TYPE_SIZE 32 | |
163 | #define LONG_LONG_TYPE_SIZE 64 | |
164 | #define FLOAT_TYPE_SIZE 32 | |
165 | #define DOUBLE_TYPE_SIZE 64 | |
166 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
167 | ||
2042e9d2 CS |
168 | /* Declare the standard types used by builtins to match convex stddef.h -- |
169 | with int rather than long. */ | |
170 | ||
171 | #define SIZE_TYPE "unsigned int" | |
172 | #define PTRDIFF_TYPE "int" | |
173 | \f | |
174 | /* Standard register usage. */ | |
175 | ||
176 | /* Number of actual hardware registers. | |
177 | The hardware registers are assigned numbers for the compiler | |
178 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
179 | All registers that the compiler knows about must be given numbers, | |
180 | even those that are not normally considered general registers. */ | |
181 | #define FIRST_PSEUDO_REGISTER 16 | |
182 | ||
183 | /* 1 for registers that have pervasive standard uses | |
184 | and are not available for the register allocator. | |
185 | For Convex, these are AP, FP, and SP. */ | |
186 | #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1} | |
187 | ||
188 | /* 1 for registers not available across function calls. | |
189 | These must include the FIXED_REGISTERS and also any | |
190 | registers that can be used without being saved. | |
191 | The latter must include the registers where values are returned | |
192 | and the register where structure-value addresses are passed. | |
193 | Aside from that, you can include as many other registers as you like. */ | |
194 | #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1} | |
195 | ||
196 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
197 | to hold something of mode MODE. | |
198 | This is ordinarily the length in words of a value of mode MODE | |
e622cd25 CS |
199 | but can be less for certain modes in special long registers. */ |
200 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
201 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
2042e9d2 CS |
202 | |
203 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
204 | On Convex, S registers can hold any type, A registers any nonfloat. */ | |
205 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
206 | ((REGNO) < 8 || (GET_MODE_CLASS (MODE) != MODE_FLOAT && \ | |
207 | GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT && \ | |
208 | (MODE) != DImode)) | |
209 | ||
210 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
211 | when one has mode MODE1 and one has mode MODE2. | |
212 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
213 | for any hard reg, then this must be 0 for correct output. */ | |
214 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
215 | ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
216 | || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT \ | |
217 | || (MODE1) == DImode) \ | |
218 | == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
219 | || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT \ | |
220 | || (MODE2) == DImode)) | |
221 | ||
222 | /* Specify the registers used for certain standard purposes. | |
223 | The values of these macros are register numbers. */ | |
224 | ||
225 | /* Register to use for pushing function arguments. */ | |
226 | #define STACK_POINTER_REGNUM 8 | |
227 | ||
228 | /* Base register for access to local variables of the function. */ | |
229 | #define FRAME_POINTER_REGNUM 15 | |
230 | ||
231 | /* Value should be nonzero if functions must have frame pointers. | |
232 | Zero means the frame pointer need not be set up (and parms | |
233 | may be accessed via the stack pointer) in functions that seem suitable. | |
234 | This is computed in `reload', in reload1.c. */ | |
235 | #define FRAME_POINTER_REQUIRED 1 | |
236 | ||
237 | /* Base register for access to arguments of the function. */ | |
238 | #define ARG_POINTER_REGNUM 14 | |
239 | ||
240 | /* Register in which static-chain is passed to a function. | |
241 | Use S0, not an A reg, because this rare use would otherwise prevent | |
242 | an A reg from being available to global-alloc across calls. */ | |
243 | #define STATIC_CHAIN_REGNUM 0 | |
244 | ||
245 | /* Register in which address to store a structure value | |
246 | is passed to a function. */ | |
247 | #define STRUCT_VALUE_REGNUM 9 | |
248 | \f | |
249 | /* Define the classes of registers for register constraints in the | |
250 | machine description. Also define ranges of constants. | |
251 | ||
252 | One of the classes must always be named ALL_REGS and include all hard regs. | |
253 | If there is more than one class, another class must be named NO_REGS | |
254 | and contain no registers. | |
255 | ||
256 | The name GENERAL_REGS must be the name of a class (or an alias for | |
257 | another name such as ALL_REGS). This is the class of registers | |
258 | that is allowed by "g" or "r" in a register constraint. | |
259 | Also, registers outside this class are allocated only when | |
260 | instructions express preferences for them. | |
261 | ||
262 | The classes must be numbered in nondecreasing order; that is, | |
263 | a larger-numbered class must never be contained completely | |
264 | in a smaller-numbered class. | |
265 | ||
266 | For any two classes, it is very desirable that there be another | |
267 | class that represents their union. */ | |
268 | ||
269 | /* Convex has classes A (address) and S (scalar). | |
270 | A is further divided into SP_REGS (stack pointer) and INDEX_REGS. | |
271 | Seems to work better to put S first, here and in the md. */ | |
272 | ||
273 | enum reg_class { | |
274 | NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, ALL_REGS, LIM_REG_CLASSES | |
275 | }; | |
276 | ||
277 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
278 | ||
279 | /* Since GENERAL_REGS is the same class as ALL_REGS, | |
280 | don't give it a different class number; just make it an alias. */ | |
281 | ||
282 | #define GENERAL_REGS ALL_REGS | |
283 | ||
284 | /* Give names of register classes as strings for dump file. */ | |
285 | ||
286 | #define REG_CLASS_NAMES \ | |
287 | {"NO_REGS", "S_REGS", "INDEX_REGS", "SP_REGS", "A_REGS", "ALL_REGS" } | |
288 | ||
289 | /* Define which registers fit in which classes. | |
290 | This is an initializer for a vector of HARD_REG_SET | |
291 | of length N_REG_CLASSES. */ | |
292 | ||
293 | #define REG_CLASS_CONTENTS {0, 0x00ff, 0xfe00, 0x0100, 0xff00, 0xffff} | |
294 | ||
295 | /* The same information, inverted: | |
296 | Return the class number of the smallest class containing | |
297 | reg number REGNO. This could be a conditional expression | |
298 | or could index an array. */ | |
299 | ||
300 | #define REGNO_REG_CLASS(REGNO) \ | |
301 | (S_REGNO_P (REGNO) ? S_REGS : REGNO == 8 ? SP_REGS : INDEX_REGS) | |
302 | ||
303 | #define S_REGNO_P(REGNO) ((REGNO) < 8) | |
304 | #define A_REGNO_P(REGNO) ((REGNO) >= 8) | |
305 | ||
306 | #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X))) | |
307 | #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X))) | |
308 | ||
309 | /* The class value for index registers, and the one for base regs. */ | |
310 | ||
311 | #define INDEX_REG_CLASS INDEX_REGS | |
312 | #define BASE_REG_CLASS INDEX_REGS | |
313 | ||
314 | /* Get reg_class from a letter such as appears in the machine description. */ | |
315 | /* S regs use the letter 'd' because 's' is taken. */ | |
316 | ||
317 | #define REG_CLASS_FROM_LETTER(C) \ | |
318 | ((C) == 'a' ? A_REGS : (C) == 'd' ? S_REGS : NO_REGS) | |
319 | ||
320 | /* The letters I, J, K, L and M in a register constraint string | |
321 | can be used to stand for particular ranges of immediate operands. | |
322 | This macro defines what the ranges are. | |
323 | C is the letter, and VALUE is a constant value. | |
324 | Return 1 if VALUE is in the range specified by C. */ | |
325 | ||
326 | /* Convex uses only I: | |
327 | 32-bit value with sign bit off, usable as immediate in DImode logical | |
328 | instructions and, or, xor */ | |
329 | ||
330 | #define CONST_OK_FOR_LETTER_P(VALUE, C) ((VALUE) >= 0) | |
331 | ||
332 | /* Similar, but for floating constants, and defining letters G and H. | |
333 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
334 | /* Convex uses only G: | |
335 | value usable in ld.d (low word 0) or ld.l (high word all sign) */ | |
336 | ||
337 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
338 | (LD_D_P (VALUE) || LD_L_P (VALUE)) | |
339 | ||
340 | #define LD_D_P(X) (const_double_low_int (X) == 0) | |
341 | ||
342 | #define LD_L_P(X) (const_double_low_int (X) >= 0 \ | |
343 | ? const_double_high_int (X) == 0 \ | |
344 | : const_double_high_int (X) == -1) | |
345 | ||
346 | /* Given an rtx X being reloaded into a reg required to be | |
347 | in class CLASS, return the class of reg to actually use. | |
348 | In general this is just CLASS; but on some machines | |
349 | in some cases it is preferable to use a more restrictive class. */ | |
350 | ||
351 | /* CONST_DOUBLEs (constraint 'F') are passed by LEGITIMATE_CONSTANT_P | |
352 | without regard to their value. Constraint 'G' is used by instructions | |
353 | that need to reject non-immediate values. The rejected values are | |
354 | dealt with by reload -- PREFERRED_RELOAD_CLASS returns NO_REGS for | |
355 | nonimmediate values, causing reload to put them in memory. Every insn | |
356 | that uses 'G' must have an alternative that accepts memory. */ | |
357 | ||
358 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
359 | (GET_CODE (X) != CONST_DOUBLE ? (CLASS) : \ | |
360 | (GET_MODE (X) != TFmode && (LD_L_P (X) || LD_D_P (X))) ? (CLASS) : NO_REGS) | |
361 | ||
362 | /* Return the maximum number of consecutive registers | |
363 | needed to represent mode MODE in a register of class CLASS. */ | |
364 | #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + 7) / 8) | |
365 | \f | |
366 | /* Stack layout; function entry, exit and calling. */ | |
367 | ||
368 | /* Define this if pushing a word on the stack | |
369 | makes the stack pointer a smaller address. */ | |
370 | #define STACK_GROWS_DOWNWARD | |
371 | ||
372 | /* Define this if the nominal address of the stack frame | |
373 | is at the high-address end of the local variables; | |
374 | that is, each additional local variable allocated | |
375 | goes at a more negative offset in the frame. */ | |
376 | #define FRAME_GROWS_DOWNWARD | |
377 | ||
378 | /* Define this if should default to -fcaller-saves. */ | |
379 | #define DEFAULT_CALLER_SAVES | |
380 | ||
381 | /* Offset within stack frame to start allocating local variables at. | |
382 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
383 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
384 | of the first local allocated. */ | |
385 | #define STARTING_FRAME_OFFSET 0 | |
386 | ||
387 | /* If we generate an insn to push BYTES bytes, | |
388 | this says how many the stack pointer really advances by. */ | |
389 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) | |
390 | ||
391 | /* Offset of first parameter from the argument pointer register value. */ | |
392 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
393 | ||
394 | /* Value is the number of bytes of arguments automatically | |
395 | popped when returning from a subroutine call. | |
396 | FUNTYPE is the data type of the function (as a tree), | |
397 | or for a library call it is an identifier node for the subroutine name. | |
398 | SIZE is the number of bytes of arguments passed on the stack. */ | |
399 | /* The standard Convex call, with arg count word, includes popping the | |
400 | args as part of the call template. We optionally omit the arg count | |
401 | word and let gcc combine the arg pops. */ | |
0bd2462c | 402 | #define RETURN_POPS_ARGS(FUNTYPE, SIZE) (TARGET_ARGCOUNT ? (SIZE) : 0) |
2042e9d2 CS |
403 | |
404 | /* Define how to find the value returned by a function. | |
405 | VALTYPE is the data type of the value (as a tree). | |
406 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
407 | otherwise, FUNC is 0. */ | |
408 | ||
409 | /* On Convex the return value is in S0 regardless. */ | |
410 | ||
411 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
412 | gen_rtx (REG, TYPE_MODE (VALTYPE), 0) | |
413 | ||
414 | /* Define how to find the value returned by a library function | |
415 | assuming the value has mode MODE. */ | |
416 | ||
417 | /* On Convex the return value is in S0 regardless. */ | |
418 | ||
419 | #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) | |
420 | ||
421 | /* Define this if PCC uses the nonreentrant convention for returning | |
422 | structure and union values. */ | |
423 | ||
424 | #define PCC_STATIC_STRUCT_RETURN | |
425 | ||
426 | /* 1 if N is a possible register number for a function value. | |
427 | On the Convex, S0 is the only register thus used. */ | |
428 | ||
429 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) | |
430 | ||
431 | /* 1 if N is a possible register number for function argument passing. */ | |
432 | ||
433 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
434 | \f | |
435 | /* Define a data type for recording info about an argument list | |
436 | during the scan of that argument list. This data type should | |
437 | hold all necessary information about the function itself | |
438 | and about the args processed so far, enough to enable macros | |
439 | such as FUNCTION_ARG to determine where the next arg should go. | |
440 | ||
441 | On convex, this is a single integer, which is a number of bytes | |
442 | of arguments scanned so far. */ | |
443 | ||
444 | #define CUMULATIVE_ARGS int | |
445 | ||
446 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
447 | for a call to a function whose data type is FNTYPE. | |
448 | For a library call, FNTYPE is 0. | |
449 | ||
450 | On Convex, the offset starts at 0. */ | |
451 | ||
452 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ | |
453 | ((CUM) = 0) | |
454 | ||
455 | /* Update the data in CUM to advance over an argument | |
456 | of mode MODE and data type TYPE. | |
457 | (TYPE is null for libcalls where that information may not be available.) */ | |
458 | ||
459 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
460 | ((CUM) += ((MODE) != BLKmode \ | |
461 | ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ | |
462 | : (int_size_in_bytes (TYPE) + 3) & ~3)) | |
463 | ||
464 | /* Define where to put the arguments to a function. | |
465 | Value is zero to push the argument on the stack, | |
466 | or a hard register in which to store the argument. | |
467 | ||
468 | MODE is the argument's machine mode. | |
469 | TYPE is the data type of the argument (as a tree). | |
470 | This is null for libcalls where that information may | |
471 | not be available. | |
472 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
473 | the preceding args and about the function being called. | |
474 | NAMED is nonzero if this argument is a named parameter | |
475 | (otherwise it is an extra parameter matching an ellipsis). */ | |
476 | ||
477 | /* On Convex, all args are pushed. */ | |
478 | ||
479 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0 | |
480 | ||
481 | /* This macro generates the assembly code for function entry. | |
482 | FILE is a stdio stream to output the code to. | |
483 | SIZE is an int: how many units of temporary storage to allocate. | |
484 | Refer to the array `regs_ever_live' to determine which registers | |
485 | to save; `regs_ever_live[I]' is nonzero if register number I | |
486 | is ever used in the function. This macro is responsible for | |
487 | knowing which registers should not be saved even if used. */ | |
488 | ||
489 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
490 | { if ((SIZE) != 0) fprintf (FILE, "\tsub.w #%d,sp\n", ((SIZE) + 3) & -4);} | |
491 | ||
492 | /* Output assembler code for a block containing the constant parts | |
493 | of a trampoline, leaving space for the variable parts. */ | |
494 | ||
495 | /* On convex, the code for a trampoline is | |
496 | ld.w #<link>,s0 | |
497 | jmp <func> */ | |
498 | ||
499 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
500 | { \ | |
501 | ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x11c8)); \ | |
502 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
503 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
504 | ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x0140)); \ | |
505 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
506 | ASM_OUTPUT_SHORT (FILE, const0_rtx); \ | |
507 | } | |
508 | ||
509 | /* Length in units of the trampoline for entering a nested function. */ | |
510 | ||
511 | #define TRAMPOLINE_SIZE 12 | |
512 | ||
513 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
514 | FNADDR is an RTX for the address of the function's pure code. | |
515 | CXT is an RTX for the static chain value for the function. */ | |
516 | ||
517 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
518 | { \ | |
519 | emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 2)), CXT); \ | |
520 | emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 8)), FNADDR); \ | |
521 | emit_call_insn (gen_call (gen_rtx (MEM, QImode, \ | |
522 | gen_rtx (SYMBOL_REF, Pmode, \ | |
523 | "__enable_execute_stack")), \ | |
524 | const0_rtx)); \ | |
525 | } | |
526 | ||
527 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
528 | for profiling a function entry. */ | |
529 | ||
530 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
531 | fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO)); | |
532 | ||
533 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
534 | the stack pointer does not matter. The value is tested only in | |
535 | functions that have frame pointers. | |
536 | No definition is equivalent to always zero. */ | |
537 | ||
538 | #define EXIT_IGNORE_STACK 1 | |
539 | ||
540 | /* This macro generates the assembly code for function exit, | |
541 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
542 | then individual return instructions are generated for each | |
543 | return statement. Args are same as for FUNCTION_PROLOGUE. */ | |
544 | ||
545 | /* #define FUNCTION_EPILOGUE(FILE, SIZE) */ | |
546 | ||
547 | /* Store in the variable DEPTH the initial difference between the | |
548 | frame pointer reg contents and the stack pointer reg contents, | |
549 | as of the start of the function body. This depends on the layout | |
550 | of the fixed parts of the stack frame and on how registers are saved. */ | |
551 | #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ | |
552 | { (DEPTH) = get_frame_size (); } | |
553 | \f | |
554 | /* Addressing modes, and classification of registers for them. */ | |
555 | ||
556 | /* #define HAVE_POST_INCREMENT */ | |
557 | /* #define HAVE_POST_DECREMENT */ | |
558 | ||
559 | /* #define HAVE_PRE_DECREMENT */ | |
560 | /* #define HAVE_PRE_INCREMENT */ | |
561 | ||
562 | /* Macros to check register numbers against specific register classes. */ | |
563 | ||
564 | /* These assume that REGNO is a hard or pseudo reg number. | |
565 | They give nonzero only if REGNO is a hard reg of the suitable class | |
566 | or a pseudo reg currently allocated to a suitable hard reg. | |
567 | Since they use reg_renumber, they are safe only once reg_renumber | |
568 | has been allocated, which happens in local-alloc.c. */ | |
569 | ||
570 | #define REGNO_OK_FOR_INDEX_P(regno) \ | |
571 | ((((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0) \ | |
572 | && regno != 8) | |
573 | ||
574 | #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno) | |
575 | \f | |
576 | /* Maximum number of registers that can appear in a valid memory address. */ | |
577 | ||
578 | #define MAX_REGS_PER_ADDRESS 1 | |
579 | ||
580 | /* 1 if X is an rtx for a constant that is a valid address. */ | |
581 | ||
582 | #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) | |
583 | ||
584 | /* Nonzero if the constant value X is a legitimate general operand. | |
585 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
586 | ||
587 | /* For convex, any single-word constant is ok; the only contexts | |
588 | allowing general_operand of mode DI or DF are movdi and movdf. */ | |
589 | ||
590 | #define LEGITIMATE_CONSTANT_P(X) \ | |
591 | (GET_CODE (X) != CONST_DOUBLE ? 1 : (LD_D_P (X) || LD_L_P (X))) | |
592 | ||
593 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
594 | and check its validity for a certain class. | |
595 | We have two alternate definitions for each of them. | |
596 | The usual definition accepts all pseudo regs; the other rejects | |
597 | them unless they have been allocated suitable hard regs. | |
598 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
599 | ||
600 | Most source files want to accept pseudo regs in the hope that | |
601 | they will get allocated to the class that the insn wants them to be in. | |
602 | Source files for reload pass need to be strict. | |
603 | After reload, it makes no difference, since pseudo regs have | |
604 | been eliminated by then. */ | |
605 | ||
606 | #ifndef REG_OK_STRICT | |
607 | ||
608 | /* Nonzero if X is a hard reg that can be used as an index | |
609 | or if it is a pseudo reg. */ | |
d31d3db4 RS |
610 | #define REG_OK_FOR_INDEX_P(X) \ |
611 | (REGNO (X) > 8 \ | |
612 | && REGNO (X) != VIRTUAL_STACK_VARS_REGNUM \ | |
613 | && REGNO (X) != VIRTUAL_STACK_DYNAMIC_REGNUM \ | |
614 | && REGNO (X) != VIRTUAL_OUTGOING_ARGS_REGNUM) | |
2042e9d2 CS |
615 | /* Nonzero if X is a hard reg that can be used as a base reg |
616 | or if it is a pseudo reg. */ | |
d31d3db4 | 617 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) |
2042e9d2 CS |
618 | |
619 | #else | |
620 | ||
621 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
622 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
623 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
624 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
625 | ||
626 | #endif | |
627 | \f | |
628 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
629 | that is a valid memory address for an instruction. | |
630 | The MODE argument is the machine mode for the MEM expression | |
631 | that wants to use this address. | |
632 | ||
633 | For Convex, valid addresses are | |
634 | indirectable or (MEM indirectable) | |
635 | where indirectable is | |
636 | const, reg, (PLUS reg const) | |
637 | ||
638 | On C3-series processors, we avoid indirection since it's substantially | |
639 | slower. */ | |
640 | ||
641 | /* 1 if X is an address that we could indirect through. */ | |
642 | #define INDIRECTABLE_ADDRESS_P(X) \ | |
643 | (CONSTANT_ADDRESS_P (X) \ | |
644 | || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ | |
645 | || (GET_CODE (X) == PLUS \ | |
646 | && GET_CODE (XEXP (X, 0)) == REG \ | |
647 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
648 | && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
649 | || (GET_CODE (X) == PLUS \ | |
650 | && GET_CODE (XEXP (X, 1)) == REG \ | |
651 | && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
652 | && CONSTANT_ADDRESS_P (XEXP (X, 0)))) | |
653 | ||
654 | /* Go to ADDR if X is a valid address. */ | |
655 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
656 | { register rtx xfoob = (X); \ | |
657 | if (INDIRECTABLE_ADDRESS_P (xfoob)) \ | |
658 | goto ADDR; \ | |
659 | xfoob = XEXP (X, 0); \ | |
660 | if (GET_CODE (X) == MEM \ | |
661 | && TARGET_INDIRECTS \ | |
662 | && INDIRECTABLE_ADDRESS_P (xfoob)) \ | |
663 | goto ADDR; \ | |
664 | if (GET_CODE (X) == PRE_DEC && REG_P (xfoob) \ | |
665 | && REGNO (xfoob) == STACK_POINTER_REGNUM) \ | |
666 | goto ADDR; } | |
667 | \f | |
668 | /* Try machine-dependent ways of modifying an illegitimate address | |
669 | to be legitimate. If we find one, return the new, valid address. | |
670 | This macro is used in only one place: `memory_address' in explow.c. | |
671 | ||
672 | OLDX is the address as it was before break_out_memory_refs was called. | |
673 | In some cases it is useful to look at this to decide what needs to be done. | |
674 | ||
675 | MODE and WIN are passed so that this macro can use | |
676 | GO_IF_LEGITIMATE_ADDRESS. | |
677 | ||
678 | It is always safe for this macro to do nothing. It exists to recognize | |
679 | opportunities to optimize the output. | |
680 | ||
681 | For Convex, nothing needs to be done. */ | |
682 | ||
683 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} | |
684 | ||
685 | /* Go to LABEL if ADDR (a legitimate address expression) | |
686 | has an effect that depends on the machine mode it is used for. */ | |
687 | ||
688 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} | |
689 | \f | |
690 | /* Specify the machine mode that this machine uses | |
691 | for the index in the tablejump instruction. */ | |
692 | #define CASE_VECTOR_MODE SImode | |
693 | ||
694 | /* Define this if the case instruction expects the table | |
695 | to contain offsets from the address of the table. | |
696 | Do not define this if the table should contain absolute addresses. */ | |
697 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
698 | ||
699 | /* Define this if the case instruction drops through after the table | |
700 | when the index is out of range. Don't define it if the case insn | |
701 | jumps to the default label instead. */ | |
702 | /* #define CASE_DROPS_THROUGH */ | |
703 | ||
704 | /* Specify the tree operation to be used to convert reals to integers. */ | |
705 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
706 | ||
707 | /* This is the kind of divide that is easiest to do in the general case. */ | |
708 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
709 | ||
710 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
711 | #define DEFAULT_SIGNED_CHAR 1 | |
712 | ||
713 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
714 | also convert validly to an unsigned one. */ | |
715 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
716 | ||
717 | /* Max number of bytes we can move from memory to memory | |
718 | in one reasonably fast instruction. */ | |
719 | #define MOVE_MAX 8 | |
720 | ||
721 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
722 | /* #define SLOW_ZERO_EXTEND */ | |
723 | ||
724 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
725 | #define SLOW_BYTE_ACCESS 0 | |
726 | ||
727 | /* Define if shifts truncate the shift count | |
728 | which implies one can omit a sign-extension or zero-extension | |
729 | of a shift count. */ | |
730 | #define SHIFT_COUNT_TRUNCATED | |
731 | ||
732 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
733 | is done just by pretending it is already truncated. */ | |
734 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
735 | ||
736 | /* On Convex, it is as good to call a constant function address as to | |
737 | call an address kept in a register. */ | |
738 | #define NO_FUNCTION_CSE | |
739 | ||
740 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
741 | #define PROMOTE_PROTOTYPES | |
742 | ||
743 | /* Specify the machine mode that pointers have. | |
744 | After generation of rtl, the compiler makes no further distinction | |
745 | between pointers and any other objects of this machine mode. */ | |
746 | #define Pmode SImode | |
747 | ||
748 | /* A function address in a call instruction | |
749 | is a byte address (for indexing purposes) | |
750 | so give the MEM rtx a byte's mode. */ | |
751 | #define FUNCTION_MODE QImode | |
752 | ||
753 | /* Compute the cost of computing a constant rtl expression RTX | |
754 | whose rtx-code is CODE. The body of this macro is a portion | |
755 | of a switch statement. If the code is computed here, | |
756 | return it with a return statement. Otherwise, break from the switch. */ | |
757 | ||
3bb22aee | 758 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
2042e9d2 CS |
759 | case CONST: \ |
760 | case LABEL_REF: \ | |
761 | case SYMBOL_REF: \ | |
762 | case CONST_INT: \ | |
763 | return 0; \ | |
764 | case CONST_DOUBLE: \ | |
765 | return 2; | |
766 | ||
767 | /* Provide the costs of a rtl expression. This is in the body of a | |
768 | switch on CODE. | |
769 | On C1 and C2, multiply is faster than shift. */ | |
770 | ||
3bb22aee | 771 | #define RTX_COSTS(RTX,CODE,OUTER_CODE) \ |
2042e9d2 CS |
772 | case MULT: \ |
773 | total = COSTS_N_INSNS (4); \ | |
774 | break; \ | |
775 | case LSHIFT: \ | |
776 | case ASHIFT: \ | |
777 | case LSHIFTRT: \ | |
778 | case ASHIFTRT: \ | |
779 | total = COSTS_N_INSNS (3); \ | |
780 | break; | |
781 | ||
782 | /* Compute the cost of an address. This is meant to approximate the size | |
783 | and/or execution delay of an insn using that address. If the cost is | |
784 | approximated by the RTL complexity, including CONST_COSTS above, as | |
785 | is usually the case for CISC machines, this macro should not be defined. | |
786 | For aggressively RISCy machines, only one insn format is allowed, so | |
787 | this macro should be a constant. The value of this macro only matters | |
788 | for valid addresses. */ | |
789 | ||
790 | #define ADDRESS_COST(RTX) (GET_CODE (RTX) == MEM ? 3 : 1) | |
791 | ||
e622cd25 CS |
792 | /* Specify the cost of a branch insn; roughly the number of extra insns that |
793 | should be added to avoid a branch. */ | |
794 | ||
795 | #define BRANCH_COST 0 | |
796 | ||
2042e9d2 CS |
797 | /* Check a `double' value for validity for a particular machine mode. */ |
798 | ||
799 | #define CHECK_FLOAT_VALUE(mode, d) \ | |
800 | if ((mode) == SFmode) \ | |
801 | { \ | |
802 | if ((d) > 1.7014117331926443e+38) \ | |
803 | { error ("magnitude of constant too large for `float'"); \ | |
804 | (d) = 1.7014117331926443e+38; } \ | |
805 | else if ((d) < -1.7014117331926443e+38) \ | |
806 | { error ("magnitude of constant too large for `float'"); \ | |
807 | (d) = -1.7014117331926443e+38; } \ | |
808 | else if (((d) > 0) && ((d) < 2.9387358770557188e-39)) \ | |
809 | { warning ("`float' constant truncated to zero"); \ | |
810 | (d) = 0.0; } \ | |
811 | else if (((d) < 0) && ((d) > -2.9387358770557188e-39)) \ | |
812 | { warning ("`float' constant truncated to zero"); \ | |
813 | (d) = 0.0; } \ | |
814 | } | |
815 | \f | |
816 | /* Tell final.c how to eliminate redundant test instructions. */ | |
817 | ||
818 | /* Here we define machine-dependent flags and fields in cc_status | |
819 | (see `conditions.h'). No extra ones are needed for convex. */ | |
820 | ||
821 | /* Store in cc_status the expressions | |
822 | that the condition codes will describe | |
823 | after execution of an instruction whose pattern is EXP. | |
824 | Do not alter them if the instruction would not alter the cc's. */ | |
825 | ||
826 | #define NOTICE_UPDATE_CC(EXP,INSN) {} | |
827 | \f | |
828 | /* Control the assembler format that we output. */ | |
829 | ||
830 | /* Output at beginning of assembler file. */ | |
831 | ||
832 | #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n") | |
833 | ||
834 | /* Output to assembler file text saying following lines | |
835 | may contain character constants, extra white space, comments, etc. */ | |
836 | ||
837 | #define ASM_APP_ON ";APP\n" | |
838 | ||
839 | /* Output to assembler file text saying following lines | |
840 | no longer contain unusual constructs. */ | |
841 | ||
842 | #define ASM_APP_OFF ";NO_APP\n" | |
843 | ||
0bd2462c CS |
844 | /* Output something following the gcc2_compiled tag to keep that label from |
845 | hiding a real function name for tools like adb and prof. */ | |
846 | ||
847 | #define ASM_IDENTIFY_GCC(FILE) \ | |
848 | fprintf (FILE, "gcc2_compiled.:\n\tds.h 0\n"); | |
849 | ||
2042e9d2 CS |
850 | /* Alignment with Convex's assembler goes like this: |
851 | .text can be .aligned up to a halfword. | |
852 | .data and .bss can be .aligned up to a longword. | |
853 | .lcomm is not supported, explicit declarations in .bss must be used instead. | |
854 | We get alignment for word and longword .text data by conventionally | |
855 | using .text 2 for word-aligned data and .text 3 for longword-aligned | |
856 | data. This requires that the data's size be a multiple of its alignment, | |
857 | which seems to be always true. */ | |
858 | ||
859 | /* Output before read-only data. */ | |
860 | ||
861 | #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text") | |
862 | ||
863 | /* Output before writable data. */ | |
864 | ||
865 | #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data") | |
866 | ||
867 | /* Output before uninitialized data. */ | |
868 | ||
869 | #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss") | |
870 | ||
871 | /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */ | |
872 | ||
873 | #define EXTRA_SECTIONS in_bss | |
874 | ||
875 | #define EXTRA_SECTION_FUNCTIONS \ | |
876 | void \ | |
877 | bss_section () \ | |
878 | { \ | |
879 | if (in_section != in_bss) \ | |
880 | { \ | |
881 | fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ | |
882 | in_section = in_bss; \ | |
883 | } \ | |
884 | } | |
885 | ||
886 | /* This is how to output an assembler line | |
887 | that says to advance the location counter | |
888 | to a multiple of 2**LOG bytes. */ | |
889 | ||
890 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
891 | if (current_section_is_text && (LOG) > 1) \ | |
892 | fprintf (FILE, ".text %d\n", LOG); \ | |
893 | else if (current_section_is_text) \ | |
894 | fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \ | |
895 | else \ | |
896 | fprintf (FILE, ".align %d\n", 1 << (LOG)) | |
897 | ||
898 | /* How to refer to registers in assembler output. | |
899 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
900 | ||
901 | #define REGISTER_NAMES \ | |
902 | {"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ | |
903 | "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp"} | |
904 | ||
905 | /* This is BSD, so it wants DBX format. */ | |
906 | ||
907 | #define DBX_DEBUGGING_INFO | |
908 | ||
909 | /* How to renumber registers for dbx and gdb. */ | |
910 | ||
911 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
912 | ||
913 | /* Do not break .stabs pseudos into continuations. */ | |
914 | ||
915 | #define DBX_CONTIN_LENGTH 0 | |
916 | ||
917 | /* This is the char to use for continuation (in case we need to turn | |
918 | continuation back on). */ | |
919 | ||
920 | #define DBX_CONTIN_CHAR '?' | |
921 | ||
922 | /* Don't use stab extensions until GDB v4 port is available for convex. */ | |
923 | ||
924 | #define DEFAULT_GDB_EXTENSIONS 0 | |
925 | #define DBX_NO_XREFS | |
926 | ||
927 | /* This is how to output the definition of a user-level label named NAME, | |
928 | such as the label on a static function or variable NAME. */ | |
929 | ||
930 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
931 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
932 | ||
933 | /* This is how to output a command to make the user-level label named NAME | |
934 | defined for reference from other files. */ | |
935 | ||
936 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
937 | do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
938 | ||
939 | /* This is how to output a reference to a user-level label named NAME. */ | |
940 | ||
941 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
942 | fprintf (FILE, "_%s", NAME) | |
943 | ||
944 | /* This is how to output an internal numbered label where | |
945 | PREFIX is the class of label and NUM is the number within the class. */ | |
946 | ||
947 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
948 | fprintf (FILE, "%s%d:\n", PREFIX, NUM) | |
949 | ||
950 | /* Put case tables in .text 2, where they will be word-aligned */ | |
951 | ||
952 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ | |
953 | ASM_OUTPUT_ALIGN (FILE, 2); \ | |
954 | ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) | |
955 | ||
956 | #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \ | |
957 | ASM_OUTPUT_ALIGN (FILE, 1) | |
958 | ||
959 | /* This is how to store into the string LABEL | |
960 | the symbol_ref name of an internal numbered label where | |
961 | PREFIX is the class of label and NUM is the number within the class. | |
962 | This is suitable for output with `assemble_name'. */ | |
963 | ||
964 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
965 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
966 | ||
967 | /* This is how to output an assembler line defining a `double' constant. */ | |
968 | ||
969 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
970 | fprintf (FILE, "\tds.d %.17e\n", (VALUE)) | |
971 | ||
972 | /* This is how to output an assembler line defining a `float' constant. */ | |
973 | ||
974 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
975 | fprintf (FILE, "\tds.s %.9e\n", (VALUE)) | |
976 | ||
977 | /* This is how to output an assembler line defining an `int' constant. */ | |
978 | ||
979 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
980 | ( fprintf (FILE, "\tds.w "), \ | |
981 | output_addr_const (FILE, (VALUE)), \ | |
982 | fprintf (FILE, "\n")) | |
983 | ||
984 | /* Likewise for a `long long int' constant. */ | |
985 | ||
986 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ | |
987 | { \ | |
988 | if (GET_CODE (VALUE) == CONST_DOUBLE) \ | |
989 | fprintf (FILE, "\tds.w %d,%d\n", \ | |
990 | const_double_high_int (VALUE), const_double_low_int (VALUE)); \ | |
991 | else if (GET_CODE (VALUE) == CONST_INT) \ | |
992 | { \ | |
993 | int val = INTVAL (VALUE); \ | |
994 | fprintf (FILE, "\tds.w %d,%d\n", val < 0 ? -1 : 0, val); \ | |
995 | } \ | |
996 | else \ | |
997 | abort (); \ | |
998 | } | |
999 | ||
1000 | /* Likewise for `char' and `short' constants. */ | |
1001 | ||
1002 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1003 | ( fprintf (FILE, "\tds.h "), \ | |
1004 | output_addr_const (FILE, (VALUE)), \ | |
1005 | fprintf (FILE, "\n")) | |
1006 | ||
1007 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1008 | ( fprintf (FILE, "\tds.b "), \ | |
1009 | output_addr_const (FILE, (VALUE)), \ | |
1010 | fprintf (FILE, "\n")) | |
1011 | ||
1012 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1013 | ||
1014 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1015 | fprintf (FILE, "\tds.b %#x\n", (VALUE)) | |
1016 | ||
1017 | /* This is how to output a string */ | |
1018 | ||
1019 | #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \ | |
1020 | int i; \ | |
1021 | fprintf ((FILE), "\tds.b \""); \ | |
1022 | for (i = 0; i < (SIZE); i++) { \ | |
1023 | register int c = (STR)[i] & 0377; \ | |
1024 | if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \ | |
1025 | putc (c, (FILE)); \ | |
1026 | else \ | |
1027 | fprintf ((FILE), "\\%03o", c);} \ | |
1028 | fprintf ((FILE), "\"\n");} while (0) | |
1029 | ||
1030 | /* This is how to output an insn to push a register on the stack. | |
1031 | It need not be very fast code. */ | |
1032 | ||
1033 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1034 | fprintf (FILE, "\tpsh.%c %s\n", \ | |
1035 | S_REGNO_P (REGNO) ? 'l' : 'w', \ | |
1036 | reg_names[REGNO]) | |
1037 | ||
1038 | /* This is how to output an insn to pop a register from the stack. | |
1039 | It need not be very fast code. */ | |
1040 | ||
1041 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1042 | fprintf (FILE, "\tpop.%c %s\n", \ | |
1043 | S_REGNO_P (REGNO) ? 'l' : 'w', \ | |
1044 | reg_names[REGNO]) | |
1045 | ||
1046 | /* This is how to output an element of a case-vector that is absolute. */ | |
1047 | ||
1048 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1049 | fprintf (FILE, "\tds.w L%d\n", VALUE) | |
1050 | ||
1051 | /* This is how to output an element of a case-vector that is relative. | |
1052 | (not used on Convex) */ | |
1053 | ||
1054 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ | |
1055 | fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL) | |
1056 | ||
1057 | /* This is how to output an assembler line | |
1058 | that says to advance the location counter by SIZE bytes. */ | |
1059 | ||
1060 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1061 | fprintf (FILE, "\tds.b %u(0)\n", (SIZE)) | |
1062 | ||
1063 | /* This says how to output an assembler line | |
1064 | to define a global common symbol. */ | |
1065 | ||
1066 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1067 | ( fputs (".comm ", (FILE)), \ | |
1068 | assemble_name ((FILE), (NAME)), \ | |
1069 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
1070 | ||
1071 | /* This says how to output an assembler line | |
1072 | to define a local common symbol. */ | |
1073 | ||
1074 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
1075 | ( bss_section (), \ | |
1076 | assemble_name ((FILE), (NAME)), \ | |
1077 | fprintf ((FILE), ":\tbs.b %u\n", (ROUNDED))) | |
1078 | ||
1079 | /* Store in OUTPUT a string (made with alloca) containing | |
1080 | an assembler-name for a local static variable named NAME. | |
1081 | LABELNO is an integer which is different for each call. */ | |
1082 | ||
1083 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1084 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1085 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1086 | ||
1087 | /* Define the parentheses used to group arithmetic operations | |
1088 | in assembler code. */ | |
1089 | ||
1090 | #define ASM_OPEN_PAREN "(" | |
1091 | #define ASM_CLOSE_PAREN ")" | |
1092 | ||
1093 | /* Define results of standard character escape sequences. */ | |
1094 | #define TARGET_BELL 007 | |
1095 | #define TARGET_BS 010 | |
1096 | #define TARGET_TAB 011 | |
1097 | #define TARGET_NEWLINE 012 | |
1098 | #define TARGET_VT 013 | |
1099 | #define TARGET_FF 014 | |
1100 | #define TARGET_CR 015 | |
1101 | ||
1102 | /* Print an instruction operand X on file FILE. | |
1103 | CODE is the code from the %-spec that requested printing this operand; | |
1104 | if `%z3' was used to print operand 3, then CODE is 'z'. */ | |
1105 | ||
1106 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1107 | { if (GET_CODE (X) == REG) \ | |
1108 | fprintf (FILE, "%s", reg_names[REGNO (X)]); \ | |
1109 | else if (GET_CODE (X) == MEM) \ | |
1110 | output_address (XEXP (X, 0)); \ | |
1111 | else if (GET_CODE (X) == CONST_DOUBLE \ | |
1112 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1113 | { union { double d; int i[2]; } u; \ | |
1114 | u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ | |
1115 | fprintf (FILE, "#%.9e", u.d); } \ | |
1116 | else { putc ('#', FILE); output_addr_const (FILE, X); }} | |
1117 | ||
1118 | /* Print a memory operand whose address is X, on file FILE. */ | |
1119 | ||
1120 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1121 | { \ | |
1122 | register rtx addr = ADDR; \ | |
1123 | register rtx index = 0; \ | |
1124 | register rtx offset = 0; \ | |
1125 | \ | |
1126 | if (GET_CODE (addr) == MEM) \ | |
1127 | { \ | |
1128 | fprintf (FILE, "@"); \ | |
1129 | addr = XEXP (addr, 0); \ | |
1130 | } \ | |
1131 | \ | |
1132 | switch (GET_CODE (addr)) \ | |
1133 | { \ | |
1134 | case REG: \ | |
1135 | index = addr; \ | |
1136 | break; \ | |
1137 | \ | |
1138 | case PLUS: \ | |
1139 | index = XEXP (addr, 0); \ | |
1140 | if (REG_P (index)) \ | |
1141 | offset = XEXP (addr, 1); \ | |
1142 | else \ | |
1143 | { \ | |
1144 | offset = XEXP (addr, 0); \ | |
1145 | index = XEXP (addr, 1); \ | |
1146 | if (! REG_P (index)) abort (); \ | |
1147 | } \ | |
1148 | break; \ | |
1149 | \ | |
1150 | default: \ | |
1151 | offset = addr; \ | |
1152 | break; \ | |
1153 | } \ | |
1154 | \ | |
1155 | if (offset) \ | |
1156 | output_addr_const (FILE, offset); \ | |
1157 | \ | |
1158 | if (index) \ | |
1159 | fprintf (FILE, "(%s)", reg_names[REGNO (index)]); \ | |
1160 | } | |
1161 | \f | |
1162 | /* Definitions for g++. */ | |
1163 | ||
1164 | /* Do not put out GNU stabs for constructors and destructors. | |
1165 | ld bounces them. */ | |
1166 | ||
1167 | #define FASCIST_ASSEMBLER | |
1168 | ||
1169 | /* Convex user addresses are negative, so use positive numbers | |
1170 | to mean `vtable index'. */ | |
1171 | ||
1172 | #define VTABLE_USES_MASK | |
1173 | #define VINDEX_MAX ((unsigned) 0x80000000) | |
1174 | #define SET_DECL_VINDEX(DECL, INDEX) \ | |
1175 | (DECL_VINDEX (DECL) = (INDEX)) | |
1176 | ||
c2724863 | 1177 | #if 0 /* collect2.c should no longer need these. */ |
2042e9d2 CS |
1178 | /* Defs for compiling collect2.c in -pcc mode during bootstrap. */ |
1179 | ||
1180 | #ifdef COLLECT | |
1181 | ||
c2724863 | 1182 | #ifndef __STDC__ |
2042e9d2 | 1183 | |
2042e9d2 CS |
1184 | #define WTERMSIG(x) (((union wait *) &(x))->w_termsig) |
1185 | #define WEXITSTATUS(x) (((union wait *) &(x))->w_retcode) | |
1186 | ||
1187 | #endif | |
1188 | ||
1189 | #endif /* COLLECT */ | |
c2724863 | 1190 | #endif /* 0 */ |