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e9a25f70 | 1 | /* Definitions of target machine for GNU compiler, Argonaut ARC cpu. |
16c484c7 | 2 | Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002 |
2398fb2a | 3 | Free Software Foundation, Inc. |
0143027a JL |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | /* ??? This is an old port, and is undoubtedly suffering from bit rot. */ | |
23 | ||
24 | /* Things to do: | |
25 | ||
26 | - PREDICATE_CODES | |
27 | - incscc, decscc? | |
28 | - print active compiler options in assembler output | |
29 | */ | |
30 | ||
0143027a JL |
31 | |
32 | #undef ASM_SPEC | |
33 | #undef LINK_SPEC | |
34 | #undef STARTFILE_SPEC | |
35 | #undef ENDFILE_SPEC | |
36 | #undef SIZE_TYPE | |
37 | #undef PTRDIFF_TYPE | |
38 | #undef WCHAR_TYPE | |
39 | #undef WCHAR_TYPE_SIZE | |
2b046bda | 40 | #undef ASM_OUTPUT_LABELREF |
0143027a JL |
41 | \f |
42 | /* Print subsidiary information on the compiler version in use. */ | |
43 | #define TARGET_VERSION fprintf (stderr, " (arc)") | |
44 | ||
45 | /* Names to predefine in the preprocessor for this target machine. */ | |
b166fadd NB |
46 | #define TARGET_CPU_CPP_BUILTINS() \ |
47 | do \ | |
48 | { \ | |
49 | builtin_define ("__arc__"); \ | |
50 | if (TARGET_BIG_ENDIAN) \ | |
51 | builtin_define ("__big_endian__"); \ | |
52 | if (arc_cpu_type == 0) \ | |
53 | builtin_define ("__base__"); \ | |
54 | builtin_assert ("cpu=arc"); \ | |
55 | builtin_assert ("machine=arc"); \ | |
56 | } while (0) | |
0143027a JL |
57 | |
58 | /* Pass -mmangle-cpu if we get -mcpu=*. | |
59 | Doing it this way lets one have it on as default with -mcpu=*, | |
60 | but also lets one turn it off with -mno-mangle-cpu. */ | |
61 | #define CC1_SPEC "\ | |
62 | %{mcpu=*:-mmangle-cpu} \ | |
63 | %{EB:%{EL:%emay not use both -EB and -EL}} \ | |
64 | %{EB:-mbig-endian} %{EL:-mlittle-endian} \ | |
65 | " | |
66 | ||
67 | #define ASM_SPEC "%{v} %{EB} %{EL}" | |
68 | ||
69 | #define LINK_SPEC "%{v} %{EB} %{EL}" | |
70 | ||
71 | #define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s" | |
72 | ||
73 | #define ENDFILE_SPEC "crtfini.o%s" | |
74 | \f | |
75 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
76 | ||
77 | extern int target_flags; | |
78 | ||
79 | /* Mangle all user symbols for the specified cpu. | |
80 | ARC's can be shipped in which a collection of cpus are coupled together. | |
81 | Each CPU may be different in some way, and thus we may need to distinguish | |
82 | code compiled for one to ensure it isn't linked with code compiled for | |
83 | another. */ | |
84 | #define TARGET_MASK_MANGLE_CPU 1 | |
85 | #define TARGET_MANGLE_CPU (target_flags & TARGET_MASK_MANGLE_CPU) | |
86 | ||
87 | #if 0 | |
88 | /* Mangle libgcc symbols by adding a suffix for the specified cpu. */ | |
89 | #define TARGET_MASK_MANGLE_CPU_LIBGCC 2 | |
90 | #define TARGET_MANGLE_CPU_LIBGCC (target_flags & TARGET_MASK_MANGLE_CPU_LIBGCC) | |
91 | #endif | |
92 | ||
93 | /* Align loops to 32 byte boundaries (cache line size). */ | |
94 | #define TARGET_MASK_ALIGN_LOOPS 4 | |
95 | #define TARGET_ALIGN_LOOPS (target_flags & TARGET_MASK_ALIGN_LOOPS) | |
96 | ||
97 | /* Big Endian. */ | |
98 | #define TARGET_MASK_BIG_ENDIAN 8 | |
99 | #define TARGET_BIG_ENDIAN (target_flags & TARGET_MASK_BIG_ENDIAN) | |
100 | ||
101 | /* Turn off conditional execution optimization, | |
102 | so we can see how well it does, or in case it's buggy. */ | |
103 | #define TARGET_MASK_NO_COND_EXEC 0x10 | |
104 | #define TARGET_NO_COND_EXEC (target_flags & TARGET_MASK_NO_COND_EXEC) | |
105 | ||
106 | /* Macro to define tables used to set the flags. | |
107 | This is a list in braces of pairs in braces, | |
108 | each pair being { "NAME", VALUE } | |
109 | where VALUE is the bits to set or minus the bits to clear. | |
110 | An empty string NAME is used to identify the default VALUE. */ | |
111 | ||
112 | #define TARGET_SWITCHES \ | |
113 | { \ | |
114 | { "mangle-cpu", TARGET_MASK_MANGLE_CPU }, \ | |
115 | { "no-mangle-cpu", -TARGET_MASK_MANGLE_CPU }, \ | |
116 | /* { "mangle-cpu-libgcc", TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \ | |
117 | /* { "no-mangle-cpu-libgcc", -TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \ | |
118 | { "align-loops", TARGET_MASK_ALIGN_LOOPS }, \ | |
119 | { "no-align-loops", -TARGET_MASK_ALIGN_LOOPS }, \ | |
120 | { "big-endian", TARGET_MASK_BIG_ENDIAN }, \ | |
121 | { "little-endian", -TARGET_MASK_BIG_ENDIAN }, \ | |
122 | { "no-cond-exec", TARGET_MASK_NO_COND_EXEC }, \ | |
123 | SUBTARGET_SWITCHES \ | |
124 | { "", TARGET_DEFAULT } \ | |
125 | } | |
126 | ||
127 | #define TARGET_DEFAULT (0) | |
128 | ||
129 | #define SUBTARGET_SWITCHES | |
130 | ||
131 | /* Instruction set characteristics. | |
132 | These are internal macros, set by the appropriate -mcpu= option. */ | |
133 | ||
134 | /* Non-zero means the cpu has a barrel shifter. */ | |
135 | #define TARGET_SHIFTER 0 | |
136 | ||
2b046bda KG |
137 | extern const char *arc_cpu_string; |
138 | extern const char *arc_text_string,*arc_data_string,*arc_rodata_string; | |
0143027a JL |
139 | |
140 | #define TARGET_OPTIONS \ | |
141 | { \ | |
142 | { "cpu=", &arc_cpu_string }, \ | |
143 | { "text=", &arc_text_string }, \ | |
144 | { "data=", &arc_data_string }, \ | |
145 | { "rodata=", &arc_rodata_string }, \ | |
146 | } | |
147 | ||
148 | /* Which cpu we're compiling for. */ | |
149 | extern int arc_cpu_type; | |
150 | ||
151 | /* Check if CPU is an extension and set `arc_cpu_type' and `arc_mangle_cpu' | |
152 | appropriately. The result should be non-zero if the cpu is recognized, | |
153 | otherwise zero. This is intended to be redefined in a cover file. | |
154 | This is used by arc_init. */ | |
155 | #define ARC_EXTENSION_CPU(cpu) 0 | |
156 | ||
157 | /* Sometimes certain combinations of command options do not make | |
158 | sense on a particular target machine. You can define a macro | |
159 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
160 | defined, is executed once just after all the command options have | |
161 | been parsed. | |
162 | ||
163 | Don't use this macro to turn on various extra optimizations for | |
164 | `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ | |
165 | ||
0143027a JL |
166 | |
167 | #define OVERRIDE_OPTIONS \ | |
168 | do { \ | |
169 | /* These need to be done at start up. It's convenient to do them here. */ \ | |
170 | arc_init (); \ | |
171 | } while (0) | |
172 | \f | |
173 | /* Target machine storage layout. */ | |
174 | ||
0143027a JL |
175 | /* Define this if most significant bit is lowest numbered |
176 | in instructions that operate on numbered bit-fields. */ | |
177 | #define BITS_BIG_ENDIAN 1 | |
178 | ||
179 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
180 | #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN) | |
181 | ||
182 | /* Define this if most significant word of a multiword number is the lowest | |
183 | numbered. */ | |
184 | #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN) | |
185 | ||
186 | /* Define this to set the endianness to use in libgcc2.c, which can | |
187 | not depend on target_flags. */ | |
188 | #ifdef __big_endian__ | |
189 | #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
190 | #else | |
191 | #define LIBGCC2_WORDS_BIG_ENDIAN 0 | |
192 | #endif | |
193 | ||
0143027a JL |
194 | /* Width of a word, in units (bytes). */ |
195 | #define UNITS_PER_WORD 4 | |
196 | ||
197 | /* Define this macro if it is advisable to hold scalars in registers | |
198 | in a wider mode than that declared by the program. In such cases, | |
199 | the value is constrained to be within the bounds of the declared | |
200 | type, but kept valid in the wider mode. The signedness of the | |
201 | extension may differ from that of the type. */ | |
202 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
203 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
204 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
205 | { \ | |
206 | (MODE) = SImode; \ | |
207 | } | |
208 | ||
209 | /* Define this macro if the promotion described by `PROMOTE_MODE' | |
210 | should also be done for outgoing function arguments. */ | |
211 | #define PROMOTE_FUNCTION_ARGS | |
212 | ||
213 | /* Likewise, if the function return value is promoted. */ | |
214 | #define PROMOTE_FUNCTION_RETURN | |
215 | ||
0143027a JL |
216 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ |
217 | #define PARM_BOUNDARY 32 | |
218 | ||
219 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
220 | #define STACK_BOUNDARY 64 | |
221 | ||
222 | /* ALIGN FRAMES on word boundaries */ | |
223 | #define ARC_STACK_ALIGN(LOC) (((LOC)+7) & ~7) | |
224 | ||
225 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
226 | #define FUNCTION_BOUNDARY 32 | |
227 | ||
228 | /* Alignment of field after `int : 0' in a structure. */ | |
229 | #define EMPTY_FIELD_BOUNDARY 32 | |
230 | ||
231 | /* Every structure's size must be a multiple of this. */ | |
232 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
233 | ||
234 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
235 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
236 | ||
237 | /* No data type wants to be aligned rounder than this. */ | |
238 | /* This is bigger than currently necessary for the ARC. If 8 byte floats are | |
239 | ever added it's not clear whether they'll need such alignment or not. For | |
240 | now we assume they will. We can always relax it if necessary but the | |
241 | reverse isn't true. */ | |
242 | #define BIGGEST_ALIGNMENT 64 | |
243 | ||
244 | /* The best alignment to use in cases where we have a choice. */ | |
245 | #define FASTEST_ALIGNMENT 32 | |
246 | ||
247 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
248 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
249 | ((TREE_CODE (EXP) == STRING_CST \ | |
250 | && (ALIGN) < FASTEST_ALIGNMENT) \ | |
251 | ? FASTEST_ALIGNMENT : (ALIGN)) | |
252 | ||
253 | /* Make arrays of chars word-aligned for the same reasons. */ | |
254 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
255 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
256 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
257 | && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) | |
258 | ||
259 | /* Set this nonzero if move instructions will actually fail to work | |
260 | when given unaligned data. */ | |
261 | /* On the ARC the lower address bits are masked to 0 as necessary. The chip | |
262 | won't croak when given an unaligned address, but the insn will still fail | |
263 | to produce the correct result. */ | |
264 | #define STRICT_ALIGNMENT 1 | |
265 | \f | |
266 | /* Layout of source language data types. */ | |
267 | ||
268 | #define SHORT_TYPE_SIZE 16 | |
269 | #define INT_TYPE_SIZE 32 | |
270 | #define LONG_TYPE_SIZE 32 | |
271 | #define LONG_LONG_TYPE_SIZE 64 | |
272 | #define FLOAT_TYPE_SIZE 32 | |
273 | #define DOUBLE_TYPE_SIZE 64 | |
274 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
275 | ||
276 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
277 | #define DEFAULT_SIGNED_CHAR 1 | |
278 | ||
279 | #define SIZE_TYPE "long unsigned int" | |
280 | #define PTRDIFF_TYPE "long int" | |
281 | #define WCHAR_TYPE "short unsigned int" | |
282 | #define WCHAR_TYPE_SIZE 16 | |
0143027a JL |
283 | \f |
284 | /* Standard register usage. */ | |
285 | ||
286 | /* Number of actual hardware registers. | |
287 | The hardware registers are assigned numbers for the compiler | |
288 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
289 | All registers that the compiler knows about must be given numbers, | |
290 | even those that are not normally considered general registers. */ | |
291 | /* Registers 61, 62, and 63 are not really registers and we needn't treat | |
292 | them as such. We still need a register for the condition code. */ | |
293 | #define FIRST_PSEUDO_REGISTER 62 | |
294 | ||
295 | /* 1 for registers that have pervasive standard uses | |
296 | and are not available for the register allocator. | |
297 | ||
298 | 0-28 - general purpose registers | |
299 | 29 - ilink1 (interrupt link register) | |
300 | 30 - ilink2 (interrupt link register) | |
301 | 31 - blink (branch link register) | |
302 | 32-59 - reserved for extensions | |
303 | 60 - LP_COUNT | |
304 | 61 - condition code | |
305 | ||
306 | For doc purposes: | |
307 | 61 - short immediate data indicator (setting flags) | |
308 | 62 - long immediate data indicator | |
309 | 63 - short immediate data indicator (not setting flags). | |
310 | ||
311 | The general purpose registers are further broken down into: | |
312 | 0-7 - arguments/results | |
313 | 8-15 - call used | |
314 | 16-23 - call saved | |
315 | 24 - call used, static chain pointer | |
316 | 25 - call used, gptmp | |
317 | 26 - global pointer | |
318 | 27 - frame pointer | |
319 | 28 - stack pointer | |
320 | ||
321 | By default, the extension registers are not available. */ | |
322 | ||
323 | #define FIXED_REGISTERS \ | |
324 | { 0, 0, 0, 0, 0, 0, 0, 0, \ | |
325 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
326 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
327 | 0, 0, 0, 1, 1, 1, 1, 0, \ | |
328 | \ | |
329 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
330 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
331 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
332 | 1, 1, 1, 1, 1, 1 } | |
333 | ||
334 | /* 1 for registers not available across function calls. | |
335 | These must include the FIXED_REGISTERS and also any | |
336 | registers that can be used without being saved. | |
337 | The latter must include the registers where values are returned | |
338 | and the register where structure-value addresses are passed. | |
339 | Aside from that, you can include as many other registers as you like. */ | |
340 | ||
341 | #define CALL_USED_REGISTERS \ | |
342 | { 1, 1, 1, 1, 1, 1, 1, 1, \ | |
343 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
344 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
345 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
346 | \ | |
347 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
348 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
349 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
350 | 1, 1, 1, 1, 1, 1 } | |
351 | ||
352 | /* If defined, an initializer for a vector of integers, containing the | |
353 | numbers of hard registers in the order in which GNU CC should | |
354 | prefer to use them (from most preferred to least). */ | |
355 | #define REG_ALLOC_ORDER \ | |
356 | { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, \ | |
357 | 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 31, \ | |
358 | 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ | |
359 | 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, \ | |
360 | 27, 28, 29, 30 } | |
361 | ||
5b43fed1 RH |
362 | /* Macro to conditionally modify fixed_regs/call_used_regs. */ |
363 | #define CONDITIONAL_REGISTER_USAGE \ | |
364 | do { \ | |
365 | if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ | |
366 | { \ | |
367 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
368 | call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
369 | } \ | |
370 | } while (0) | |
371 | ||
0143027a JL |
372 | /* Return number of consecutive hard regs needed starting at reg REGNO |
373 | to hold something of mode MODE. | |
374 | This is ordinarily the length in words of a value of mode MODE | |
375 | but can be less for certain modes in special long registers. */ | |
376 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
377 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
378 | ||
379 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ | |
0b5826ac | 380 | extern const unsigned int arc_hard_regno_mode_ok[]; |
0143027a JL |
381 | extern unsigned int arc_mode_class[]; |
382 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
383 | ((arc_hard_regno_mode_ok[REGNO] & arc_mode_class[MODE]) != 0) | |
384 | ||
385 | /* A C expression that is nonzero if it is desirable to choose | |
386 | register allocation so as to avoid move instructions between a | |
387 | value of mode MODE1 and a value of mode MODE2. | |
388 | ||
389 | If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, | |
390 | MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1, | |
391 | MODE2)' must be zero. */ | |
392 | ||
393 | /* Tie QI/HI/SI modes together. */ | |
394 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
395 | (GET_MODE_CLASS (MODE1) == MODE_INT \ | |
396 | && GET_MODE_CLASS (MODE2) == MODE_INT \ | |
397 | && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \ | |
398 | && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD) | |
399 | \f | |
400 | /* Register classes and constants. */ | |
401 | ||
402 | /* Define the classes of registers for register constraints in the | |
403 | machine description. Also define ranges of constants. | |
404 | ||
405 | One of the classes must always be named ALL_REGS and include all hard regs. | |
406 | If there is more than one class, another class must be named NO_REGS | |
407 | and contain no registers. | |
408 | ||
409 | The name GENERAL_REGS must be the name of a class (or an alias for | |
410 | another name such as ALL_REGS). This is the class of registers | |
411 | that is allowed by "g" or "r" in a register constraint. | |
412 | Also, registers outside this class are allocated only when | |
413 | instructions express preferences for them. | |
414 | ||
415 | The classes must be numbered in nondecreasing order; that is, | |
416 | a larger-numbered class must never be contained completely | |
417 | in a smaller-numbered class. | |
418 | ||
419 | For any two classes, it is very desirable that there be another | |
420 | class that represents their union. | |
421 | ||
422 | It is important that any condition codes have class NO_REGS. | |
423 | See `register_operand'. */ | |
424 | ||
425 | enum reg_class { | |
426 | NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES | |
427 | }; | |
428 | ||
429 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
430 | ||
6b857ce3 | 431 | /* Give names of register classes as strings for dump file. */ |
0143027a JL |
432 | #define REG_CLASS_NAMES \ |
433 | { "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" } | |
434 | ||
435 | /* Define which registers fit in which classes. | |
436 | This is an initializer for a vector of HARD_REG_SET | |
437 | of length N_REG_CLASSES. */ | |
438 | ||
439 | #define REG_CLASS_CONTENTS \ | |
440 | { {0, 0}, {0, 0x10000000}, {0xffffffff, 0xfffffff}, \ | |
441 | {0xffffffff, 0x1fffffff} } | |
442 | ||
443 | /* The same information, inverted: | |
444 | Return the class number of the smallest class containing | |
445 | reg number REGNO. This could be a conditional expression | |
446 | or could index an array. */ | |
f540a7d3 | 447 | extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER]; |
0143027a JL |
448 | #define REGNO_REG_CLASS(REGNO) \ |
449 | (arc_regno_reg_class[REGNO]) | |
450 | ||
451 | /* The class value for index registers, and the one for base regs. */ | |
452 | #define INDEX_REG_CLASS GENERAL_REGS | |
453 | #define BASE_REG_CLASS GENERAL_REGS | |
454 | ||
455 | /* Get reg_class from a letter such as appears in the machine description. */ | |
456 | #define REG_CLASS_FROM_LETTER(C) \ | |
457 | ((C) == 'l' ? LPCOUNT_REG /* ??? needed? */ \ | |
458 | : NO_REGS) | |
459 | ||
460 | /* These assume that REGNO is a hard or pseudo reg number. | |
461 | They give nonzero only if REGNO is a hard reg of the suitable class | |
462 | or a pseudo reg currently allocated to a suitable hard reg. | |
463 | Since they use reg_renumber, they are safe only once reg_renumber | |
464 | has been allocated, which happens in local-alloc.c. */ | |
465 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
466 | ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) | |
467 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
468 | ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) | |
469 | ||
470 | /* Given an rtx X being reloaded into a reg required to be | |
471 | in class CLASS, return the class of reg to actually use. | |
472 | In general this is just CLASS; but on some machines | |
473 | in some cases it is preferable to use a more restrictive class. */ | |
474 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
475 | (CLASS) | |
476 | ||
477 | /* Return the maximum number of consecutive registers | |
478 | needed to represent mode MODE in a register of class CLASS. */ | |
479 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
480 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
481 | ||
482 | /* The letters I, J, K, L, M, N, O, P in a register constraint string | |
483 | can be used to stand for particular ranges of immediate operands. | |
484 | This macro defines what the ranges are. | |
485 | C is the letter, and VALUE is a constant value. | |
486 | Return 1 if VALUE is in the range specified by C. */ | |
487 | /* 'I' is used for short immediates (always signed). | |
488 | 'J' is used for long immediates. | |
489 | 'K' is used for any constant up to 64 bits (for 64x32 situations?). */ | |
490 | ||
491 | /* local to this file */ | |
492 | #define SMALL_INT(X) ((unsigned) ((X) + 0x100) < 0x200) | |
493 | /* local to this file */ | |
494 | #define LARGE_INT(X) \ | |
495 | ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \ | |
496 | && (X) <= (unsigned HOST_WIDE_INT) 0xffffffff) | |
497 | ||
498 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
499 | ((C) == 'I' ? SMALL_INT (VALUE) \ | |
500 | : (C) == 'J' ? LARGE_INT (VALUE) \ | |
501 | : (C) == 'K' ? 1 \ | |
502 | : 0) | |
503 | ||
504 | /* Similar, but for floating constants, and defining letters G and H. | |
505 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
506 | /* 'G' is used for integer values for the multiplication insns where the | |
507 | operands are extended from 4 bytes to 8 bytes. | |
508 | 'H' is used when any 64 bit constant is allowed. */ | |
509 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
510 | ((C) == 'G' ? arc_double_limm_p (VALUE) \ | |
511 | : (C) == 'H' ? 1 \ | |
512 | : 0) | |
513 | ||
514 | /* A C expression that defines the optional machine-dependent constraint | |
515 | letters that can be used to segregate specific types of operands, | |
516 | usually memory references, for the target machine. It should return 1 if | |
517 | VALUE corresponds to the operand type represented by the constraint letter | |
518 | C. If C is not defined as an extra constraint, the value returned should | |
519 | be 0 regardless of VALUE. */ | |
520 | /* ??? This currently isn't used. Waiting for PIC. */ | |
521 | #if 0 | |
522 | #define EXTRA_CONSTRAINT(VALUE, C) \ | |
523 | ((C) == 'R' ? (SYMBOL_REF_FLAG (VALUE) || GET_CODE (VALUE) == LABEL_REF) \ | |
524 | : 0) | |
525 | #endif | |
526 | \f | |
527 | /* Stack layout and stack pointer usage. */ | |
528 | ||
529 | /* Define this macro if pushing a word onto the stack moves the stack | |
530 | pointer to a smaller address. */ | |
531 | #define STACK_GROWS_DOWNWARD | |
532 | ||
533 | /* Define this if the nominal address of the stack frame | |
534 | is at the high-address end of the local variables; | |
535 | that is, each additional local variable allocated | |
536 | goes at a more negative offset in the frame. */ | |
537 | #define FRAME_GROWS_DOWNWARD | |
538 | ||
539 | /* Offset within stack frame to start allocating local variables at. | |
540 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
541 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
542 | of the first local allocated. */ | |
543 | #define STARTING_FRAME_OFFSET 0 | |
544 | ||
545 | /* Offset from the stack pointer register to the first location at which | |
546 | outgoing arguments are placed. */ | |
547 | #define STACK_POINTER_OFFSET FIRST_PARM_OFFSET (0) | |
548 | ||
549 | /* Offset of first parameter from the argument pointer register value. */ | |
550 | /* 4 bytes for each of previous fp, return address, and previous gp. | |
551 | 4 byte reserved area for future considerations. */ | |
552 | #define FIRST_PARM_OFFSET(FNDECL) 16 | |
553 | ||
554 | /* A C expression whose value is RTL representing the address in a | |
555 | stack frame where the pointer to the caller's frame is stored. | |
556 | Assume that FRAMEADDR is an RTL expression for the address of the | |
557 | stack frame itself. | |
558 | ||
559 | If you don't define this macro, the default is to return the value | |
560 | of FRAMEADDR--that is, the stack frame address is also the address | |
561 | of the stack word that points to the previous frame. */ | |
e9a25f70 | 562 | /* ??? unfinished */ |
0143027a JL |
563 | /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/ |
564 | ||
565 | /* A C expression whose value is RTL representing the value of the | |
566 | return address for the frame COUNT steps up from the current frame. | |
567 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame | |
568 | pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' | |
569 | is defined. */ | |
570 | /* The current return address is in r31. The return address of anything | |
571 | farther back is at [%fp,4]. */ | |
572 | #if 0 /* The default value should work. */ | |
573 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
c5c76735 JL |
574 | (((COUNT) == -1) \ |
575 | ? gen_rtx_REG (Pmode, 31) \ | |
576 | : copy_to_reg (gen_rtx_MEM (Pmode, \ | |
577 | memory_address (Pmode, \ | |
578 | plus_constant ((FRAME), \ | |
579 | UNITS_PER_WORD))))) | |
0143027a JL |
580 | #endif |
581 | ||
582 | /* Register to use for pushing function arguments. */ | |
583 | #define STACK_POINTER_REGNUM 28 | |
584 | ||
585 | /* Base register for access to local variables of the function. */ | |
586 | #define FRAME_POINTER_REGNUM 27 | |
587 | ||
588 | /* Base register for access to arguments of the function. */ | |
589 | #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM | |
590 | ||
591 | /* Register in which static-chain is passed to a function. This must | |
592 | not be a register used by the prologue. */ | |
593 | #define STATIC_CHAIN_REGNUM 24 | |
594 | ||
595 | /* A C expression which is nonzero if a function must have and use a | |
596 | frame pointer. This expression is evaluated in the reload pass. | |
597 | If its value is nonzero the function will have a frame pointer. */ | |
598 | #define FRAME_POINTER_REQUIRED \ | |
599 | (current_function_calls_alloca) | |
600 | ||
601 | /* C statement to store the difference between the frame pointer | |
602 | and the stack pointer values immediately after the function prologue. */ | |
603 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
604 | ((VAR) = arc_compute_frame_size (get_frame_size ())) | |
605 | \f | |
606 | /* Function argument passing. */ | |
607 | ||
608 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
cb560352 | 609 | #define PROMOTE_PROTOTYPES 1 |
0143027a JL |
610 | |
611 | /* If defined, the maximum amount of space required for outgoing | |
612 | arguments will be computed and placed into the variable | |
613 | `current_function_outgoing_args_size'. No space will be pushed | |
614 | onto the stack for each call; instead, the function prologue should | |
615 | increase the stack frame size by this amount. */ | |
f73ad30e | 616 | #define ACCUMULATE_OUTGOING_ARGS 1 |
0143027a JL |
617 | |
618 | /* Value is the number of bytes of arguments automatically | |
619 | popped when returning from a subroutine call. | |
620 | FUNDECL is the declaration node of the function (as a tree), | |
621 | FUNTYPE is the data type of the function (as a tree), | |
622 | or for a library call it is an identifier node for the subroutine name. | |
623 | SIZE is the number of bytes of arguments passed on the stack. */ | |
624 | #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0 | |
625 | ||
626 | /* Define a data type for recording info about an argument list | |
627 | during the scan of that argument list. This data type should | |
628 | hold all necessary information about the function itself | |
629 | and about the args processed so far, enough to enable macros | |
630 | such as FUNCTION_ARG to determine where the next arg should go. */ | |
631 | #define CUMULATIVE_ARGS int | |
632 | ||
633 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
634 | for a call to a function whose data type is FNTYPE. | |
635 | For a library call, FNTYPE is 0. */ | |
636 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ | |
637 | ((CUM) = 0) | |
638 | ||
639 | /* The number of registers used for parameter passing. Local to this file. */ | |
640 | #define MAX_ARC_PARM_REGS 8 | |
641 | ||
642 | /* 1 if N is a possible register number for function argument passing. */ | |
643 | #define FUNCTION_ARG_REGNO_P(N) \ | |
644 | ((unsigned) (N) < MAX_ARC_PARM_REGS) | |
645 | ||
646 | /* The ROUND_ADVANCE* macros are local to this file. */ | |
647 | /* Round SIZE up to a word boundary. */ | |
648 | #define ROUND_ADVANCE(SIZE) \ | |
649 | (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
650 | ||
651 | /* Round arg MODE/TYPE up to the next word boundary. */ | |
652 | #define ROUND_ADVANCE_ARG(MODE, TYPE) \ | |
653 | ((MODE) == BLKmode \ | |
654 | ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \ | |
655 | : ROUND_ADVANCE (GET_MODE_SIZE (MODE))) | |
656 | ||
657 | /* Round CUM up to the necessary point for argument MODE/TYPE. */ | |
658 | #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \ | |
659 | ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \ | |
660 | > BITS_PER_WORD) \ | |
2b046bda | 661 | ? (((CUM) + 1) & ~1) \ |
0143027a JL |
662 | : (CUM)) |
663 | ||
664 | /* Return boolean indicating arg of type TYPE and mode MODE will be passed in | |
665 | a reg. This includes arguments that have to be passed by reference as the | |
666 | pointer to them is passed in a reg if one is available (and that is what | |
667 | we're given). | |
668 | When passing arguments NAMED is always 1. When receiving arguments NAMED | |
669 | is 1 for each argument except the last in a stdarg/varargs function. In | |
670 | a stdarg function we want to treat the last named arg as named. In a | |
671 | varargs function we want to treat the last named arg (which is | |
672 | `__builtin_va_alist') as unnamed. | |
673 | This macro is only used in this file. */ | |
0143027a JL |
674 | #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \ |
675 | ((!current_function_varargs || (NAMED)) \ | |
676 | && (CUM) < MAX_ARC_PARM_REGS \ | |
677 | && ((ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ | |
678 | + ROUND_ADVANCE_ARG ((MODE), (TYPE)) \ | |
679 | <= MAX_ARC_PARM_REGS))) | |
680 | ||
681 | /* Determine where to put an argument to a function. | |
682 | Value is zero to push the argument on the stack, | |
683 | or a hard register in which to store the argument. | |
684 | ||
685 | MODE is the argument's machine mode. | |
686 | TYPE is the data type of the argument (as a tree). | |
687 | This is null for libcalls where that information may | |
688 | not be available. | |
689 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
690 | the preceding args and about the function being called. | |
691 | NAMED is nonzero if this argument is a named parameter | |
692 | (otherwise it is an extra parameter matching an ellipsis). */ | |
693 | /* On the ARC the first MAX_ARC_PARM_REGS args are normally in registers | |
694 | and the rest are pushed. */ | |
695 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
696 | (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \ | |
c5c76735 | 697 | ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ |
0143027a JL |
698 | : 0) |
699 | ||
700 | /* A C expression for the number of words, at the beginning of an | |
701 | argument, must be put in registers. The value must be zero for | |
702 | arguments that are passed entirely in registers or that are entirely | |
703 | pushed on the stack. | |
704 | ||
705 | On some machines, certain arguments must be passed partially in | |
706 | registers and partially in memory. On these machines, typically the | |
707 | first @var{n} words of arguments are passed in registers, and the rest | |
708 | on the stack. If a multi-word argument (a @code{double} or a | |
709 | structure) crosses that boundary, its first few words must be passed | |
710 | in registers and the rest must be pushed. This macro tells the | |
711 | compiler when this occurs, and how many of the words should go in | |
712 | registers. */ | |
713 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 | |
714 | ||
715 | /* A C expression that indicates when an argument must be passed by | |
716 | reference. If nonzero for an argument, a copy of that argument is | |
717 | made in memory and a pointer to the argument is passed instead of | |
718 | the argument itself. The pointer is passed in whatever way is | |
719 | appropriate for passing a pointer to that type. */ | |
720 | /* All aggregates and arguments greater than 8 bytes are passed this way. */ | |
721 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
722 | (TYPE \ | |
723 | && (AGGREGATE_TYPE_P (TYPE) \ | |
724 | || int_size_in_bytes (TYPE) > 8)) | |
725 | ||
726 | /* A C expression that indicates when it is the called function's | |
727 | responsibility to make copies of arguments passed by reference. | |
728 | If the callee can determine that the argument won't be modified, it can | |
729 | avoid the copy. */ | |
730 | /* ??? We'd love to be able to use NAMED here. Unfortunately, it doesn't | |
731 | include the last named argument so we keep track of the args ourselves. */ | |
732 | ||
733 | #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ | |
734 | FUNCTION_ARG_PASS_BY_REFERENCE ((CUM), (MODE), (TYPE), (NAMED)) | |
735 | ||
736 | /* Update the data in CUM to advance over an argument | |
737 | of mode MODE and data type TYPE. | |
738 | (TYPE is null for libcalls where that information may not be available.) */ | |
739 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
740 | ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ | |
741 | + ROUND_ADVANCE_ARG ((MODE), (TYPE)))) | |
742 | ||
743 | /* If defined, a C expression that gives the alignment boundary, in bits, | |
744 | of an argument with the specified mode and type. If it is not defined, | |
745 | PARM_BOUNDARY is used for all arguments. */ | |
746 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
747 | (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ | |
748 | ? PARM_BOUNDARY \ | |
749 | : 2 * PARM_BOUNDARY) | |
750 | ||
751 | /* This macro offers an alternative | |
752 | to using `__builtin_saveregs' and defining the macro | |
753 | `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register | |
754 | arguments into the stack so that all the arguments appear to have | |
755 | been passed consecutively on the stack. Once this is done, you | |
756 | can use the standard implementation of varargs that works for | |
757 | machines that pass all their arguments on the stack. | |
758 | ||
759 | The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure, | |
760 | containing the values that obtain after processing of the named | |
761 | arguments. The arguments MODE and TYPE describe the last named | |
762 | argument--its machine mode and its data type as a tree node. | |
763 | ||
764 | The macro implementation should do two things: first, push onto the | |
765 | stack all the argument registers *not* used for the named | |
766 | arguments, and second, store the size of the data thus pushed into | |
767 | the `int'-valued variable whose name is supplied as the argument | |
768 | PRETEND_SIZE. The value that you store here will serve as | |
769 | additional offset for setting up the stack frame. | |
770 | ||
771 | If the argument NO_RTL is nonzero, it means that the | |
772 | arguments of the function are being analyzed for the second time. | |
773 | This happens for an inline function, which is not actually | |
774 | compiled until the end of the source file. The macro | |
775 | `SETUP_INCOMING_VARARGS' should not generate any instructions in | |
776 | this case. */ | |
777 | ||
778 | #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ | |
779 | arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) | |
780 | \f | |
781 | /* Function results. */ | |
782 | ||
783 | /* Define how to find the value returned by a function. | |
784 | VALTYPE is the data type of the value (as a tree). | |
785 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
786 | otherwise, FUNC is 0. */ | |
c5c76735 | 787 | #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) |
0143027a JL |
788 | |
789 | /* Define how to find the value returned by a library function | |
790 | assuming the value has mode MODE. */ | |
c5c76735 | 791 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) |
0143027a JL |
792 | |
793 | /* 1 if N is a possible register number for a function value | |
794 | as seen by the caller. */ | |
795 | /* ??? What about r1 in DI/DF values. */ | |
796 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) | |
797 | ||
798 | /* A C expression which can inhibit the returning of certain function | |
799 | values in registers, based on the type of value. A nonzero value says | |
800 | to return the function value in memory, just as large structures are | |
801 | always returned. Here TYPE will be a C expression of type `tree', | |
802 | representing the data type of the value. */ | |
803 | #define RETURN_IN_MEMORY(TYPE) \ | |
804 | (AGGREGATE_TYPE_P (TYPE) \ | |
805 | || int_size_in_bytes (TYPE) > 8 \ | |
806 | || TREE_ADDRESSABLE (TYPE)) | |
807 | ||
808 | /* Tell GCC to use RETURN_IN_MEMORY. */ | |
809 | #define DEFAULT_PCC_STRUCT_RETURN 0 | |
810 | ||
811 | /* Register in which address to store a structure value | |
812 | is passed to a function, or 0 to use `invisible' first argument. */ | |
813 | #define STRUCT_VALUE 0 | |
814 | \f | |
0143027a JL |
815 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
816 | the stack pointer does not matter. The value is tested only in | |
817 | functions that have frame pointers. | |
818 | No definition is equivalent to always zero. */ | |
819 | #define EXIT_IGNORE_STACK 0 | |
820 | ||
0143027a JL |
821 | /* Epilogue delay slots. */ |
822 | #define DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue () | |
823 | ||
824 | #define ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) \ | |
825 | arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED) | |
826 | ||
827 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
828 | for profiling a function entry. */ | |
829 | #define FUNCTION_PROFILER(FILE, LABELNO) | |
830 | \f | |
831 | /* Trampolines. */ | |
832 | /* ??? This doesn't work yet because GCC will use as the address of a nested | |
833 | function the address of the trampoline. We need to use that address | |
834 | right shifted by 2. It looks like we'll need PSImode after all. :-( */ | |
835 | ||
836 | /* Output assembler code for a block containing the constant parts | |
837 | of a trampoline, leaving space for the variable parts. */ | |
838 | /* On the ARC, the trampoline is quite simple as we have 32 bit immediate | |
839 | constants. | |
840 | ||
841 | mov r24,STATIC | |
842 | j.nd FUNCTION | |
843 | */ | |
844 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
845 | do { \ | |
301d03af RS |
846 | assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x631f7c00)); \ |
847 | assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ | |
848 | assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x381f0000)); \ | |
849 | assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ | |
0143027a JL |
850 | } while (0) |
851 | ||
852 | /* Length in units of the trampoline for entering a nested function. */ | |
853 | #define TRAMPOLINE_SIZE 16 | |
854 | ||
855 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
856 | FNADDR is an RTX for the address of the function's pure code. | |
857 | CXT is an RTX for the static chain value for the function. */ | |
858 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
859 | do { \ | |
c5c76735 JL |
860 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ |
861 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \ | |
862 | emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ | |
0143027a JL |
863 | } while (0) |
864 | \f | |
865 | /* Library calls. */ | |
866 | ||
867 | /* Generate calls to memcpy, memcmp and memset. */ | |
868 | #define TARGET_MEM_FUNCTIONS | |
869 | \f | |
870 | /* Addressing modes, and classification of registers for them. */ | |
871 | ||
872 | /* Maximum number of registers that can appear in a valid memory address. */ | |
873 | /* The `ld' insn allows 2, but the `st' insn only allows 1. */ | |
874 | #define MAX_REGS_PER_ADDRESS 1 | |
875 | ||
876 | /* We have pre inc/dec (load/store with update). */ | |
940da324 JL |
877 | #define HAVE_PRE_INCREMENT 1 |
878 | #define HAVE_PRE_DECREMENT 1 | |
0143027a JL |
879 | |
880 | /* Recognize any constant value that is a valid address. */ | |
881 | #define CONSTANT_ADDRESS_P(X) \ | |
882 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
883 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST) | |
884 | ||
885 | /* Nonzero if the constant value X is a legitimate general operand. | |
886 | We can handle any 32 or 64 bit constant. */ | |
887 | /* "1" should work since the largest constant should be a 64 bit critter. */ | |
888 | /* ??? Not sure what to do for 64x32 compiler. */ | |
889 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
890 | ||
891 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
892 | and check its validity for a certain class. | |
893 | We have two alternate definitions for each of them. | |
894 | The usual definition accepts all pseudo regs; the other rejects | |
895 | them unless they have been allocated suitable hard regs. | |
896 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
897 | ||
898 | Most source files want to accept pseudo regs in the hope that | |
899 | they will get allocated to the class that the insn wants them to be in. | |
900 | Source files for reload pass need to be strict. | |
901 | After reload, it makes no difference, since pseudo regs have | |
902 | been eliminated by then. */ | |
903 | ||
904 | #ifndef REG_OK_STRICT | |
905 | ||
906 | /* Nonzero if X is a hard reg that can be used as an index | |
907 | or if it is a pseudo reg. */ | |
908 | #define REG_OK_FOR_INDEX_P(X) \ | |
909 | ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) | |
910 | /* Nonzero if X is a hard reg that can be used as a base reg | |
911 | or if it is a pseudo reg. */ | |
912 | #define REG_OK_FOR_BASE_P(X) \ | |
913 | ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) | |
914 | ||
915 | #else | |
916 | ||
917 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
918 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
919 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
920 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
921 | ||
922 | #endif | |
923 | ||
924 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
925 | that is a valid memory address for an instruction. | |
926 | The MODE argument is the machine mode for the MEM expression | |
927 | that wants to use this address. */ | |
928 | /* The `ld' insn allows [reg],[reg+shimm],[reg+limm],[reg+reg],[limm] | |
929 | but the `st' insn only allows [reg],[reg+shimm],[limm]. | |
930 | The only thing we can do is only allow the most strict case `st' and hope | |
931 | other parts optimize out the restrictions for `ld'. */ | |
932 | ||
933 | /* local to this file */ | |
934 | #define RTX_OK_FOR_BASE_P(X) \ | |
935 | (REG_P (X) && REG_OK_FOR_BASE_P (X)) | |
936 | ||
937 | /* local to this file */ | |
938 | #define RTX_OK_FOR_INDEX_P(X) \ | |
e9a25f70 | 939 | (0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X)) |
0143027a JL |
940 | |
941 | /* local to this file */ | |
942 | /* ??? Loads can handle any constant, stores can only handle small ones. */ | |
943 | #define RTX_OK_FOR_OFFSET_P(X) \ | |
944 | (GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X))) | |
945 | ||
946 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \ | |
947 | (GET_CODE (X) == PLUS \ | |
948 | && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
949 | && (RTX_OK_FOR_INDEX_P (XEXP (X, 1)) \ | |
950 | || RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))) | |
951 | ||
952 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
953 | { if (RTX_OK_FOR_BASE_P (X)) \ | |
954 | goto ADDR; \ | |
955 | if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \ | |
956 | goto ADDR; \ | |
957 | if (GET_CODE (X) == CONST_INT && LARGE_INT (INTVAL (X))) \ | |
958 | goto ADDR; \ | |
959 | if (GET_CODE (X) == SYMBOL_REF \ | |
960 | || GET_CODE (X) == LABEL_REF \ | |
961 | || GET_CODE (X) == CONST) \ | |
962 | goto ADDR; \ | |
963 | if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \ | |
964 | /* We're restricted here by the `st' insn. */ \ | |
965 | && RTX_OK_FOR_BASE_P (XEXP ((X), 0))) \ | |
966 | goto ADDR; \ | |
967 | } | |
968 | ||
969 | /* Try machine-dependent ways of modifying an illegitimate address | |
970 | to be legitimate. If we find one, return the new, valid address. | |
971 | This macro is used in only one place: `memory_address' in explow.c. | |
972 | ||
973 | OLDX is the address as it was before break_out_memory_refs was called. | |
974 | In some cases it is useful to look at this to decide what needs to be done. | |
975 | ||
976 | MODE and WIN are passed so that this macro can use | |
977 | GO_IF_LEGITIMATE_ADDRESS. | |
978 | ||
979 | It is always safe for this macro to do nothing. It exists to recognize | |
980 | opportunities to optimize the output. */ | |
981 | ||
982 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) | |
983 | ||
984 | /* Go to LABEL if ADDR (a legitimate address expression) | |
985 | has an effect that depends on the machine mode it is used for. */ | |
986 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ | |
987 | { if (GET_CODE (ADDR) == PRE_DEC) \ | |
988 | goto LABEL; \ | |
989 | if (GET_CODE (ADDR) == PRE_INC) \ | |
990 | goto LABEL; \ | |
991 | } | |
992 | \f | |
993 | /* Condition code usage. */ | |
994 | ||
995 | /* Some insns set all condition code flags, some only set the ZNC flags, and | |
996 | some only set the ZN flags. */ | |
997 | ||
aa0b4465 ZW |
998 | #define EXTRA_CC_MODES \ |
999 | CC(CCZNCmode, "CCZNC") \ | |
1000 | CC(CCZNmode, "CCZN") | |
0143027a JL |
1001 | |
1002 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1003 | return the mode to be used for the comparison. */ | |
0143027a JL |
1004 | #define SELECT_CC_MODE(OP, X, Y) \ |
1005 | arc_select_cc_mode (OP, X, Y) | |
1006 | ||
1007 | /* Return non-zero if SELECT_CC_MODE will never return MODE for a | |
1008 | floating point inequality comparison. */ | |
e9a25f70 | 1009 | #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/ |
0143027a JL |
1010 | \f |
1011 | /* Costs. */ | |
1012 | ||
1013 | /* An insn is define to cost 4 "units", and we work from there. | |
1014 | COSTS_N_INSNS (N) is defined as (N) * 4 - 2 so that seems reasonable. | |
1015 | Some values are supposed to be defined relative to each other and thus | |
1016 | aren't necessarily related to COSTS_N_INSNS. */ | |
1017 | ||
1018 | /* Compute the cost of computing a constant rtl expression RTX | |
1019 | whose rtx-code is CODE. The body of this macro is a portion | |
1020 | of a switch statement. If the code is computed here, | |
1021 | return it with a return statement. Otherwise, break from the switch. */ | |
1022 | /* Small integers are as cheap as registers. 4 byte values can be fetched | |
6b857ce3 | 1023 | as immediate constants - let's give that the cost of an extra insn. */ |
0143027a JL |
1024 | #define CONST_COSTS(X, CODE, OUTER_CODE) \ |
1025 | case CONST_INT : \ | |
1026 | if (SMALL_INT (INTVAL (X))) \ | |
1027 | return 0; \ | |
1028 | /* fall through */ \ | |
1029 | case CONST : \ | |
1030 | case LABEL_REF : \ | |
1031 | case SYMBOL_REF : \ | |
1032 | return 4; \ | |
1033 | case CONST_DOUBLE : \ | |
1034 | { \ | |
1035 | rtx high, low; \ | |
1036 | split_double (X, &high, &low); \ | |
1037 | return 4 * (!SMALL_INT (INTVAL (high)) \ | |
1038 | + !SMALL_INT (INTVAL (low))); \ | |
1039 | } | |
1040 | ||
1041 | /* Compute the cost of an address. */ | |
1042 | #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : arc_address_cost (ADDR)) | |
1043 | ||
1044 | /* Compute extra cost of moving data between one register class | |
1045 | and another. */ | |
cf011243 | 1046 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2 |
0143027a JL |
1047 | |
1048 | /* Compute the cost of moving data between registers and memory. */ | |
1049 | /* Memory is 3 times as expensive as registers. | |
1050 | ??? Is that the right way to look at it? */ | |
cbd5b9a2 | 1051 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) \ |
0143027a JL |
1052 | (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12) |
1053 | ||
1054 | /* The cost of a branch insn. */ | |
1055 | /* ??? What's the right value here? Branches are certainly more | |
1056 | expensive than reg->reg moves. */ | |
1057 | #define BRANCH_COST 2 | |
1058 | ||
1059 | /* Provide the costs of a rtl expression. This is in the body of a | |
1060 | switch on CODE. The purpose for the cost of MULT is to encourage | |
1061 | `synth_mult' to find a synthetic multiply when reasonable. | |
1062 | ||
1063 | If we need more than 12 insns to do a multiply, then go out-of-line, | |
1064 | since the call overhead will be < 10% of the cost of the multiply. */ | |
1065 | #define RTX_COSTS(X, CODE, OUTER_CODE) \ | |
1066 | case ASHIFT : \ | |
1067 | case ASHIFTRT : \ | |
1068 | case LSHIFTRT : \ | |
1069 | if (TARGET_SHIFTER) \ | |
1070 | return COSTS_N_INSNS (1); \ | |
1071 | if (GET_CODE (XEXP ((X), 1)) != CONST_INT) \ | |
1072 | return COSTS_N_INSNS (16); \ | |
1073 | return COSTS_N_INSNS (INTVAL (XEXP ((X), 1))); | |
1074 | ||
1075 | /* Nonzero if access to memory by bytes is slow and undesirable. | |
1076 | For RISC chips, it means that access to memory by bytes is no | |
1077 | better than access by words when possible, so grab a whole word | |
1078 | and maybe make use of that. */ | |
1079 | #define SLOW_BYTE_ACCESS 1 | |
1080 | ||
1081 | /* Define this macro if it is as good or better to call a constant | |
1082 | function address than to call an address kept in a register. */ | |
1083 | /* On the ARC, calling through registers is slow. */ | |
1084 | #define NO_FUNCTION_CSE | |
1085 | ||
1086 | /* Define this macro if it is as good or better for a function to call | |
1087 | itself with an explicit address than to call an address kept in a | |
1088 | register. */ | |
1089 | /* On the ARC, calling through registers is slow. */ | |
1090 | #define NO_RECURSIVE_FUNCTION_CSE | |
1091 | \f | |
1092 | /* Section selection. */ | |
1093 | /* WARNING: These section names also appear in dwarfout.c. */ | |
1094 | ||
1095 | /* The names of the text, data, and readonly-data sections are runtime | |
1096 | selectable. */ | |
1097 | ||
1098 | #define ARC_SECTION_FORMAT "\t.section %s" | |
1099 | #define ARC_DEFAULT_TEXT_SECTION ".text" | |
1100 | #define ARC_DEFAULT_DATA_SECTION ".data" | |
1101 | #define ARC_DEFAULT_RODATA_SECTION ".rodata" | |
1102 | ||
2b046bda | 1103 | extern const char *arc_text_section, *arc_data_section, *arc_rodata_section; |
0143027a JL |
1104 | |
1105 | /* initfini.c uses this in an asm. */ | |
1106 | #if defined (CRT_INIT) || defined (CRT_FINI) | |
1107 | #define TEXT_SECTION_ASM_OP "\t.section .text" | |
1108 | #else | |
1109 | #define TEXT_SECTION_ASM_OP arc_text_section /*"\t.section .text"*/ | |
1110 | #endif | |
1111 | #define DATA_SECTION_ASM_OP arc_data_section /*"\t.section .data"*/ | |
1112 | ||
1113 | #undef CONST_SECTION_ASM_OP | |
1114 | #define CONST_SECTION_ASM_OP arc_rodata_section /*"\t.section .rodata"*/ | |
1115 | ||
1116 | #define BSS_SECTION_ASM_OP "\t.section .bss" | |
1117 | ||
1118 | /* Define this macro if jump tables (for tablejump insns) should be | |
1119 | output in the text section, along with the assembler instructions. | |
1120 | Otherwise, the readonly data section is used. | |
1121 | This macro is irrelevant if there is no separate readonly data section. */ | |
1122 | /*#define JUMP_TABLES_IN_TEXT_SECTION*/ | |
1123 | ||
1124 | /* Define this macro if references to a symbol must be treated | |
1125 | differently depending on something about the variable or | |
1126 | function named by the symbol (such as what section it is in). | |
1127 | ||
1128 | The macro definition, if any, is executed immediately after the | |
1129 | rtl for DECL or other node is created. | |
1130 | The value of the rtl will be a `mem' whose address is a | |
1131 | `symbol_ref'. | |
1132 | ||
1133 | The usual thing for this macro to do is to store a flag in the | |
1134 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
1135 | name string in the `symbol_ref' (if one bit is not enough | |
1136 | information). */ | |
1137 | ||
1138 | /* On the ARC, function addresses are not the same as normal addresses. | |
1139 | Branch to absolute address insns take an address that is right-shifted | |
1140 | by 2. We encode the fact that we have a function here, and then emit a | |
1141 | special assembler op when outputting the address. */ | |
b2003250 | 1142 | #define ENCODE_SECTION_INFO(DECL, FIRST) \ |
0143027a JL |
1143 | do { \ |
1144 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
1145 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ | |
1146 | } while (0) | |
1147 | ||
1148 | /* Decode SYM_NAME and store the real name part in VAR, sans | |
1149 | the characters that encode section info. Define this macro if | |
1150 | ENCODE_SECTION_INFO alters the symbol's name string. */ | |
1151 | /*#define STRIP_NAME_ENCODING(VAR, SYM_NAME)*/ | |
1152 | ||
1153 | /* For DWARF. Marginally different than default so output is "prettier" | |
1154 | (and consistent with above). */ | |
8202cda0 | 1155 | #define PUSHSECTION_ASM_OP "\t.section " |
0143027a JL |
1156 | |
1157 | /* Tell crtstuff.c we're using ELF. */ | |
1158 | #define OBJECT_FORMAT_ELF | |
1159 | \f | |
1160 | /* PIC */ | |
1161 | ||
1162 | /* The register number of the register used to address a table of static | |
1163 | data addresses in memory. In some cases this register is defined by a | |
1164 | processor's ``application binary interface'' (ABI). When this macro | |
1165 | is defined, RTL is generated for this register once, as with the stack | |
1166 | pointer and frame pointer registers. If this macro is not defined, it | |
1167 | is up to the machine-dependent files to allocate such a register (if | |
1168 | necessary). */ | |
5b43fed1 | 1169 | #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 26 : INVALID_REGNUM) |
0143027a JL |
1170 | |
1171 | /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is | |
1172 | clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM | |
1173 | is not defined. */ | |
1174 | /* This register is call-saved on the ARC. */ | |
1175 | /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/ | |
1176 | ||
1177 | /* By generating position-independent code, when two different programs (A | |
1178 | and B) share a common library (libC.a), the text of the library can be | |
1179 | shared whether or not the library is linked at the same address for both | |
1180 | programs. In some of these environments, position-independent code | |
1181 | requires not only the use of different addressing modes, but also | |
1182 | special code to enable the use of these addressing modes. | |
1183 | ||
1184 | The FINALIZE_PIC macro serves as a hook to emit these special | |
1185 | codes once the function is being compiled into assembly code, but not | |
1186 | before. (It is not done before, because in the case of compiling an | |
1187 | inline function, it would lead to multiple PIC prologues being | |
1188 | included in functions which used inline functions and were compiled to | |
1189 | assembly language.) */ | |
1190 | ||
0143027a JL |
1191 | #define FINALIZE_PIC arc_finalize_pic () |
1192 | ||
1193 | /* A C expression that is nonzero if X is a legitimate immediate | |
1194 | operand on the target machine when generating position independent code. | |
1195 | You can assume that X satisfies CONSTANT_P, so you need not | |
1196 | check this. You can also assume `flag_pic' is true, so you need not | |
1197 | check it either. You need not define this macro if all constants | |
1198 | (including SYMBOL_REF) can be immediate operands when generating | |
1199 | position independent code. */ | |
1200 | /*#define LEGITIMATE_PIC_OPERAND_P(X)*/ | |
1201 | \f | |
1202 | /* Control the assembler format that we output. */ | |
1203 | ||
1204 | /* Output at beginning of assembler file. */ | |
0143027a JL |
1205 | #undef ASM_FILE_START |
1206 | #define ASM_FILE_START(FILE) arc_asm_file_start (FILE) | |
1207 | ||
0143027a JL |
1208 | /* A C string constant describing how to begin a comment in the target |
1209 | assembler language. The compiler assumes that the comment will | |
1210 | end at the end of the line. */ | |
1211 | #define ASM_COMMENT_START ";" | |
1212 | ||
1213 | /* Output to assembler file text saying following lines | |
1214 | may contain character constants, extra white space, comments, etc. */ | |
1215 | #define ASM_APP_ON "" | |
1216 | ||
1217 | /* Output to assembler file text saying following lines | |
1218 | no longer contain unusual constructs. */ | |
1219 | #define ASM_APP_OFF "" | |
1220 | ||
0143027a JL |
1221 | /* This is how to output the definition of a user-level label named NAME, |
1222 | such as the label on a static function or variable NAME. */ | |
1223 | #define ASM_OUTPUT_LABEL(FILE, NAME) \ | |
1224 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1225 | ||
1226 | /* This is how to output a command to make the user-level label named NAME | |
1227 | defined for reference from other files. */ | |
1228 | #define ASM_GLOBALIZE_LABEL(FILE, NAME) \ | |
1229 | do { \ | |
1230 | fputs ("\t.global\t", FILE); \ | |
1231 | assemble_name (FILE, NAME); \ | |
1232 | fputs ("\n", FILE); \ | |
1233 | } while (0) | |
1234 | ||
1235 | /* A C statement (sans semicolon) to output on FILE an assembler pseudo-op to | |
1236 | declare a library function name external. The name of the library function | |
1237 | is given by SYMREF, which has type RTX and is a SYMBOL_REF. */ | |
1238 | #if 0 | |
1239 | /* On the ARC we want to have libgcc's for multiple cpus in one binary. | |
1240 | We can't use `assemble_name' here as that will call ASM_OUTPUT_LABELREF | |
1241 | and we'll get another suffix added on if -mmangle-cpu. */ | |
2b046bda | 1242 | extern const char *arc_mangle_cpu; |
0143027a JL |
1243 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, SYMREF) \ |
1244 | do { \ | |
1245 | if (TARGET_MANGLE_CPU_LIBGCC) \ | |
1246 | { \ | |
1247 | fprintf (FILE, "\t.rename\t_%s, _%s%s\n", \ | |
1248 | XSTR (SYMREF, 0), XSTR (SYMREF, 0), \ | |
1249 | arc_mangle_suffix); \ | |
1250 | } \ | |
1251 | } while (0) | |
1252 | #endif | |
1253 | ||
1254 | /* This is how to output a reference to a user-level label named NAME. | |
1255 | `assemble_name' uses this. */ | |
1256 | /* We mangle all user labels to provide protection from linking code | |
1257 | compiled for different cpus. */ | |
1258 | /* We work around a dwarfout.c deficiency by watching for labels from it and | |
1259 | not adding the '_' prefix nor the cpu suffix. There is a comment in | |
1260 | dwarfout.c that says it should be using ASM_OUTPUT_INTERNAL_LABEL. */ | |
2b046bda | 1261 | extern const char *arc_mangle_cpu; |
0143027a JL |
1262 | #define ASM_OUTPUT_LABELREF(FILE, NAME) \ |
1263 | do { \ | |
1264 | if ((NAME)[0] == '.' && (NAME)[1] == 'L') \ | |
1265 | fprintf (FILE, "%s", NAME); \ | |
1266 | else \ | |
1267 | { \ | |
1268 | fputc ('_', FILE); \ | |
1269 | if (TARGET_MANGLE_CPU && arc_mangle_cpu != NULL) \ | |
1270 | fprintf (FILE, "%s_", arc_mangle_cpu); \ | |
1271 | fprintf (FILE, "%s", NAME); \ | |
1272 | } \ | |
1273 | } while (0) | |
1274 | ||
1275 | /* This is how to output a definition of an internal numbered label where | |
1276 | PREFIX is the class of label and NUM is the number within the class. */ | |
1277 | #undef ASM_OUTPUT_INTERNAL_LABEL | |
1278 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ | |
1279 | do { \ | |
1280 | arc_ccfsm_at_label (PREFIX, NUM); \ | |
1281 | fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \ | |
1282 | } while (0) | |
1283 | ||
1284 | /* Store in OUTPUT a string (made with alloca) containing | |
1285 | an assembler-name for a local static variable named NAME. | |
1286 | LABELNO is an integer which is different for each call. */ | |
1287 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1288 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1289 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1290 | ||
1291 | /* Assembler pseudo-op to equate one value with another. */ | |
1292 | /* ??? This is needed because dwarfout.c provides a default definition too | |
1293 | late for defaults.h (which contains the default definition of ASM_OUTPUT_DEF | |
1294 | that we use). */ | |
8c13c7b3 | 1295 | #define SET_ASM_OP "\t.set\t" |
0143027a | 1296 | |
0143027a JL |
1297 | /* How to refer to registers in assembler output. |
1298 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1299 | #define REGISTER_NAMES \ | |
1300 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
1301 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
1302 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
1303 | "r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \ | |
1304 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \ | |
1305 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \ | |
1306 | "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \ | |
1307 | "r56", "r57", "r58", "r59", "lp_count", "cc"} | |
1308 | ||
1309 | /* Entry to the insn conditionalizer. */ | |
1310 | #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ | |
1311 | arc_final_prescan_insn (INSN, OPVEC, NOPERANDS) | |
1312 | ||
1313 | /* A C expression which evaluates to true if CODE is a valid | |
1314 | punctuation character for use in the `PRINT_OPERAND' macro. */ | |
f540a7d3 | 1315 | extern char arc_punct_chars[256]; |
0143027a JL |
1316 | #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ |
1317 | arc_punct_chars[(unsigned char) (CHAR)] | |
1318 | ||
1319 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1320 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1321 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1322 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1323 | arc_print_operand (FILE, X, CODE) | |
1324 | ||
1325 | /* A C compound statement to output to stdio stream STREAM the | |
1326 | assembler syntax for an instruction operand that is a memory | |
1327 | reference whose address is ADDR. ADDR is an RTL expression. | |
1328 | ||
1329 | On some machines, the syntax for a symbolic address depends on | |
1330 | the section that the address refers to. On these machines, | |
1331 | define the macro `ENCODE_SECTION_INFO' to store the information | |
1332 | into the `symbol_ref', and then check for it here. */ | |
1333 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1334 | arc_print_operand_address (FILE, ADDR) | |
1335 | ||
1336 | /* This is how to output an element of a case-vector that is absolute. */ | |
1337 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1338 | do { \ | |
1339 | char label[30]; \ | |
1340 | ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ | |
1341 | fprintf (FILE, "\t.word %%st("); \ | |
1342 | assemble_name (FILE, label); \ | |
1343 | fprintf (FILE, ")\n"); \ | |
1344 | } while (0) | |
1345 | ||
1346 | /* This is how to output an element of a case-vector that is relative. */ | |
33f7f353 | 1347 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
0143027a JL |
1348 | do { \ |
1349 | char label[30]; \ | |
1350 | ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ | |
1351 | fprintf (FILE, "\t.word %%st("); \ | |
1352 | assemble_name (FILE, label); \ | |
1353 | fprintf (FILE, "-"); \ | |
1354 | ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \ | |
1355 | assemble_name (FILE, label); \ | |
1356 | fprintf (FILE, ")\n"); \ | |
1357 | } while (0) | |
1358 | ||
fc470718 R |
1359 | /* The desired alignment for the location counter at the beginning |
1360 | of a loop. */ | |
0143027a JL |
1361 | /* On the ARC, align loops to 32 byte boundaries (cache line size) |
1362 | if -malign-loops. */ | |
fc470718 | 1363 | #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0) |
0143027a JL |
1364 | |
1365 | /* This is how to output an assembler line | |
1366 | that says to advance the location counter | |
1367 | to a multiple of 2**LOG bytes. */ | |
1368 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1369 | do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0) | |
1370 | \f | |
1371 | /* Debugging information. */ | |
1372 | ||
1373 | /* Generate DBX and DWARF debugging information. */ | |
2b046bda | 1374 | #ifndef DBX_DEBUGGING_INFO |
0143027a | 1375 | #define DBX_DEBUGGING_INFO |
2b046bda KG |
1376 | #endif |
1377 | #ifndef DWARF_DEBUGGING_INFO | |
0143027a | 1378 | #define DWARF_DEBUGGING_INFO |
2b046bda | 1379 | #endif |
0143027a JL |
1380 | |
1381 | /* Prefer STABS (for now). */ | |
1382 | #undef PREFERRED_DEBUGGING_TYPE | |
1383 | #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG | |
1384 | ||
0143027a JL |
1385 | /* Turn off splitting of long stabs. */ |
1386 | #define DBX_CONTIN_LENGTH 0 | |
1387 | \f | |
1388 | /* Miscellaneous. */ | |
1389 | ||
1390 | /* Specify the machine mode that this machine uses | |
1391 | for the index in the tablejump instruction. */ | |
1392 | #define CASE_VECTOR_MODE Pmode | |
1393 | ||
18543a22 ILT |
1394 | /* Define as C expression which evaluates to nonzero if the tablejump |
1395 | instruction expects the table to contain offsets from the address of the | |
1396 | table. | |
6b857ce3 | 1397 | Do not define this if the table should contain absolute addresses. */ |
0143027a JL |
1398 | /* It's not clear what PIC will look like or whether we want to use -fpic |
1399 | for the embedded form currently being talked about. For now require -fpic | |
1400 | to get pc relative switch tables. */ | |
18543a22 | 1401 | /*#define CASE_VECTOR_PC_RELATIVE 1 */ |
0143027a JL |
1402 | |
1403 | /* Define if operations between registers always perform the operation | |
1404 | on the full register even if a narrower mode is specified. */ | |
1405 | #define WORD_REGISTER_OPERATIONS | |
1406 | ||
1407 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1408 | will either zero-extend or sign-extend. The value of this macro should | |
1409 | be the code that says which one of the two operations is implicitly | |
1410 | done, NIL if none. */ | |
1411 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
1412 | ||
0143027a JL |
1413 | /* Max number of bytes we can move from memory to memory |
1414 | in one reasonably fast instruction. */ | |
1415 | #define MOVE_MAX 4 | |
1416 | ||
1417 | /* Define this to be nonzero if shift instructions ignore all but the low-order | |
6b857ce3 | 1418 | few bits. */ |
0143027a JL |
1419 | #define SHIFT_COUNT_TRUNCATED 1 |
1420 | ||
1421 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1422 | is done just by pretending it is already truncated. */ | |
1423 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1424 | ||
1425 | /* We assume that the store-condition-codes instructions store 0 for false | |
1426 | and some other value for true. This is the value stored for true. */ | |
1427 | #define STORE_FLAG_VALUE 1 | |
1428 | ||
1429 | /* Specify the machine mode that pointers have. | |
1430 | After generation of rtl, the compiler makes no further distinction | |
1431 | between pointers and any other objects of this machine mode. */ | |
1432 | /* ??? The arc doesn't have full 32 bit pointers, but making this PSImode has | |
9ec36da5 | 1433 | its own problems (you have to add extendpsisi2 and trucnsipsi2 but how does |
0143027a JL |
1434 | one do it without getting excess code?). Try to avoid it. */ |
1435 | #define Pmode SImode | |
1436 | ||
1437 | /* A function address in a call instruction. */ | |
1438 | #define FUNCTION_MODE SImode | |
1439 | ||
0143027a JL |
1440 | /* alloca should avoid clobbering the old register save area. */ |
1441 | /* ??? Not defined in tm.texi. */ | |
1442 | #define SETJMP_VIA_SAVE_AREA | |
1443 | \f | |
1444 | /* Define the information needed to generate branch and scc insns. This is | |
1445 | stored from the compare operation. Note that we can't use "rtx" here | |
1446 | since it hasn't been defined! */ | |
1447 | extern struct rtx_def *arc_compare_op0, *arc_compare_op1; | |
1448 | ||
6b857ce3 | 1449 | /* ARC function types. */ |
0143027a JL |
1450 | enum arc_function_type { |
1451 | ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL, | |
1452 | /* These are interrupt handlers. The name corresponds to the register | |
1453 | name that contains the return address. */ | |
1454 | ARC_FUNCTION_ILINK1, ARC_FUNCTION_ILINK2 | |
1455 | }; | |
1456 | #define ARC_INTERRUPT_P(TYPE) \ | |
1457 | ((TYPE) == ARC_FUNCTION_ILINK1 || (TYPE) == ARC_FUNCTION_ILINK2) | |
1458 | /* Compute the type of a function from its DECL. */ | |
965eb474 RH |
1459 | |
1460 | \f | |
1461 | /* Implement `va_start' for varargs and stdarg. */ | |
1462 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ | |
1463 | arc_va_start (stdarg, valist, nextarg) | |
1464 | ||
1465 | /* Implement `va_arg'. */ | |
1466 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
1467 | arc_va_arg (valist, type) |