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e9a25f70 | 1 | /* Definitions of target machine for GNU compiler, Argonaut ARC cpu. |
96ab60fc | 2 | Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2004 |
2398fb2a | 3 | Free Software Foundation, Inc. |
0143027a | 4 | |
7ec022b2 | 5 | This file is part of GCC. |
0143027a | 6 | |
7ec022b2 | 7 | GCC is free software; you can redistribute it and/or modify |
0143027a JL |
8 | it under the terms of the GNU General Public License as published by |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
7ec022b2 | 12 | GCC is distributed in the hope that it will be useful, |
0143027a JL |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
7ec022b2 | 18 | along with GCC; see the file COPYING. If not, write to |
0143027a JL |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | /* ??? This is an old port, and is undoubtedly suffering from bit rot. */ | |
23 | ||
24 | /* Things to do: | |
25 | ||
26 | - PREDICATE_CODES | |
27 | - incscc, decscc? | |
28 | - print active compiler options in assembler output | |
29 | */ | |
30 | ||
0143027a JL |
31 | |
32 | #undef ASM_SPEC | |
33 | #undef LINK_SPEC | |
34 | #undef STARTFILE_SPEC | |
35 | #undef ENDFILE_SPEC | |
36 | #undef SIZE_TYPE | |
37 | #undef PTRDIFF_TYPE | |
38 | #undef WCHAR_TYPE | |
39 | #undef WCHAR_TYPE_SIZE | |
2b046bda | 40 | #undef ASM_OUTPUT_LABELREF |
0143027a JL |
41 | \f |
42 | /* Print subsidiary information on the compiler version in use. */ | |
43 | #define TARGET_VERSION fprintf (stderr, " (arc)") | |
44 | ||
45 | /* Names to predefine in the preprocessor for this target machine. */ | |
b166fadd NB |
46 | #define TARGET_CPU_CPP_BUILTINS() \ |
47 | do \ | |
48 | { \ | |
49 | builtin_define ("__arc__"); \ | |
50 | if (TARGET_BIG_ENDIAN) \ | |
51 | builtin_define ("__big_endian__"); \ | |
52 | if (arc_cpu_type == 0) \ | |
53 | builtin_define ("__base__"); \ | |
54 | builtin_assert ("cpu=arc"); \ | |
55 | builtin_assert ("machine=arc"); \ | |
56 | } while (0) | |
0143027a JL |
57 | |
58 | /* Pass -mmangle-cpu if we get -mcpu=*. | |
59 | Doing it this way lets one have it on as default with -mcpu=*, | |
60 | but also lets one turn it off with -mno-mangle-cpu. */ | |
61 | #define CC1_SPEC "\ | |
62 | %{mcpu=*:-mmangle-cpu} \ | |
63 | %{EB:%{EL:%emay not use both -EB and -EL}} \ | |
64 | %{EB:-mbig-endian} %{EL:-mlittle-endian} \ | |
65 | " | |
66 | ||
67 | #define ASM_SPEC "%{v} %{EB} %{EL}" | |
68 | ||
69 | #define LINK_SPEC "%{v} %{EB} %{EL}" | |
70 | ||
71 | #define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s" | |
72 | ||
73 | #define ENDFILE_SPEC "crtfini.o%s" | |
74 | \f | |
75 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
76 | ||
77 | extern int target_flags; | |
78 | ||
79 | /* Mangle all user symbols for the specified cpu. | |
80 | ARC's can be shipped in which a collection of cpus are coupled together. | |
81 | Each CPU may be different in some way, and thus we may need to distinguish | |
82 | code compiled for one to ensure it isn't linked with code compiled for | |
83 | another. */ | |
84 | #define TARGET_MASK_MANGLE_CPU 1 | |
85 | #define TARGET_MANGLE_CPU (target_flags & TARGET_MASK_MANGLE_CPU) | |
86 | ||
87 | #if 0 | |
88 | /* Mangle libgcc symbols by adding a suffix for the specified cpu. */ | |
89 | #define TARGET_MASK_MANGLE_CPU_LIBGCC 2 | |
90 | #define TARGET_MANGLE_CPU_LIBGCC (target_flags & TARGET_MASK_MANGLE_CPU_LIBGCC) | |
91 | #endif | |
92 | ||
93 | /* Align loops to 32 byte boundaries (cache line size). */ | |
94 | #define TARGET_MASK_ALIGN_LOOPS 4 | |
95 | #define TARGET_ALIGN_LOOPS (target_flags & TARGET_MASK_ALIGN_LOOPS) | |
96 | ||
97 | /* Big Endian. */ | |
98 | #define TARGET_MASK_BIG_ENDIAN 8 | |
99 | #define TARGET_BIG_ENDIAN (target_flags & TARGET_MASK_BIG_ENDIAN) | |
100 | ||
101 | /* Turn off conditional execution optimization, | |
102 | so we can see how well it does, or in case it's buggy. */ | |
103 | #define TARGET_MASK_NO_COND_EXEC 0x10 | |
104 | #define TARGET_NO_COND_EXEC (target_flags & TARGET_MASK_NO_COND_EXEC) | |
105 | ||
106 | /* Macro to define tables used to set the flags. | |
107 | This is a list in braces of pairs in braces, | |
108 | each pair being { "NAME", VALUE } | |
109 | where VALUE is the bits to set or minus the bits to clear. | |
110 | An empty string NAME is used to identify the default VALUE. */ | |
111 | ||
112 | #define TARGET_SWITCHES \ | |
113 | { \ | |
114 | { "mangle-cpu", TARGET_MASK_MANGLE_CPU }, \ | |
115 | { "no-mangle-cpu", -TARGET_MASK_MANGLE_CPU }, \ | |
116 | /* { "mangle-cpu-libgcc", TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \ | |
117 | /* { "no-mangle-cpu-libgcc", -TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \ | |
118 | { "align-loops", TARGET_MASK_ALIGN_LOOPS }, \ | |
119 | { "no-align-loops", -TARGET_MASK_ALIGN_LOOPS }, \ | |
120 | { "big-endian", TARGET_MASK_BIG_ENDIAN }, \ | |
121 | { "little-endian", -TARGET_MASK_BIG_ENDIAN }, \ | |
122 | { "no-cond-exec", TARGET_MASK_NO_COND_EXEC }, \ | |
123 | SUBTARGET_SWITCHES \ | |
124 | { "", TARGET_DEFAULT } \ | |
125 | } | |
126 | ||
127 | #define TARGET_DEFAULT (0) | |
128 | ||
129 | #define SUBTARGET_SWITCHES | |
130 | ||
131 | /* Instruction set characteristics. | |
132 | These are internal macros, set by the appropriate -mcpu= option. */ | |
133 | ||
825dda42 | 134 | /* Nonzero means the cpu has a barrel shifter. */ |
0143027a JL |
135 | #define TARGET_SHIFTER 0 |
136 | ||
2b046bda KG |
137 | extern const char *arc_cpu_string; |
138 | extern const char *arc_text_string,*arc_data_string,*arc_rodata_string; | |
0143027a JL |
139 | |
140 | #define TARGET_OPTIONS \ | |
c409ea0d DD |
141 | { \ |
142 | { "cpu=", &arc_cpu_string, 0}, \ | |
143 | { "text=", &arc_text_string, 0}, \ | |
144 | { "data=", &arc_data_string, 0}, \ | |
145 | { "rodata=", &arc_rodata_string, 0}, \ | |
0143027a JL |
146 | } |
147 | ||
148 | /* Which cpu we're compiling for. */ | |
149 | extern int arc_cpu_type; | |
150 | ||
151 | /* Check if CPU is an extension and set `arc_cpu_type' and `arc_mangle_cpu' | |
825dda42 | 152 | appropriately. The result should be nonzero if the cpu is recognized, |
0143027a JL |
153 | otherwise zero. This is intended to be redefined in a cover file. |
154 | This is used by arc_init. */ | |
155 | #define ARC_EXTENSION_CPU(cpu) 0 | |
156 | ||
157 | /* Sometimes certain combinations of command options do not make | |
158 | sense on a particular target machine. You can define a macro | |
159 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
160 | defined, is executed once just after all the command options have | |
161 | been parsed. | |
162 | ||
163 | Don't use this macro to turn on various extra optimizations for | |
164 | `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ | |
165 | ||
0143027a JL |
166 | |
167 | #define OVERRIDE_OPTIONS \ | |
168 | do { \ | |
169 | /* These need to be done at start up. It's convenient to do them here. */ \ | |
170 | arc_init (); \ | |
171 | } while (0) | |
172 | \f | |
173 | /* Target machine storage layout. */ | |
174 | ||
0143027a JL |
175 | /* Define this if most significant bit is lowest numbered |
176 | in instructions that operate on numbered bit-fields. */ | |
177 | #define BITS_BIG_ENDIAN 1 | |
178 | ||
179 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
180 | #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN) | |
181 | ||
182 | /* Define this if most significant word of a multiword number is the lowest | |
183 | numbered. */ | |
184 | #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN) | |
185 | ||
186 | /* Define this to set the endianness to use in libgcc2.c, which can | |
187 | not depend on target_flags. */ | |
188 | #ifdef __big_endian__ | |
189 | #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
190 | #else | |
191 | #define LIBGCC2_WORDS_BIG_ENDIAN 0 | |
192 | #endif | |
193 | ||
0143027a JL |
194 | /* Width of a word, in units (bytes). */ |
195 | #define UNITS_PER_WORD 4 | |
196 | ||
197 | /* Define this macro if it is advisable to hold scalars in registers | |
198 | in a wider mode than that declared by the program. In such cases, | |
199 | the value is constrained to be within the bounds of the declared | |
200 | type, but kept valid in the wider mode. The signedness of the | |
201 | extension may differ from that of the type. */ | |
202 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
203 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
204 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
205 | { \ | |
206 | (MODE) = SImode; \ | |
207 | } | |
208 | ||
0143027a JL |
209 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ |
210 | #define PARM_BOUNDARY 32 | |
211 | ||
212 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
213 | #define STACK_BOUNDARY 64 | |
214 | ||
215 | /* ALIGN FRAMES on word boundaries */ | |
216 | #define ARC_STACK_ALIGN(LOC) (((LOC)+7) & ~7) | |
217 | ||
218 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
219 | #define FUNCTION_BOUNDARY 32 | |
220 | ||
221 | /* Alignment of field after `int : 0' in a structure. */ | |
222 | #define EMPTY_FIELD_BOUNDARY 32 | |
223 | ||
224 | /* Every structure's size must be a multiple of this. */ | |
225 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
226 | ||
43a88a8c | 227 | /* A bit-field declared as `int' forces `int' alignment for the struct. */ |
0143027a JL |
228 | #define PCC_BITFIELD_TYPE_MATTERS 1 |
229 | ||
230 | /* No data type wants to be aligned rounder than this. */ | |
231 | /* This is bigger than currently necessary for the ARC. If 8 byte floats are | |
232 | ever added it's not clear whether they'll need such alignment or not. For | |
233 | now we assume they will. We can always relax it if necessary but the | |
234 | reverse isn't true. */ | |
235 | #define BIGGEST_ALIGNMENT 64 | |
236 | ||
237 | /* The best alignment to use in cases where we have a choice. */ | |
238 | #define FASTEST_ALIGNMENT 32 | |
239 | ||
240 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
241 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
242 | ((TREE_CODE (EXP) == STRING_CST \ | |
243 | && (ALIGN) < FASTEST_ALIGNMENT) \ | |
244 | ? FASTEST_ALIGNMENT : (ALIGN)) | |
245 | ||
246 | /* Make arrays of chars word-aligned for the same reasons. */ | |
247 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
248 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
249 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
250 | && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) | |
251 | ||
252 | /* Set this nonzero if move instructions will actually fail to work | |
253 | when given unaligned data. */ | |
254 | /* On the ARC the lower address bits are masked to 0 as necessary. The chip | |
255 | won't croak when given an unaligned address, but the insn will still fail | |
256 | to produce the correct result. */ | |
257 | #define STRICT_ALIGNMENT 1 | |
258 | \f | |
259 | /* Layout of source language data types. */ | |
260 | ||
261 | #define SHORT_TYPE_SIZE 16 | |
262 | #define INT_TYPE_SIZE 32 | |
263 | #define LONG_TYPE_SIZE 32 | |
264 | #define LONG_LONG_TYPE_SIZE 64 | |
265 | #define FLOAT_TYPE_SIZE 32 | |
266 | #define DOUBLE_TYPE_SIZE 64 | |
267 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
268 | ||
269 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
270 | #define DEFAULT_SIGNED_CHAR 1 | |
271 | ||
272 | #define SIZE_TYPE "long unsigned int" | |
273 | #define PTRDIFF_TYPE "long int" | |
274 | #define WCHAR_TYPE "short unsigned int" | |
275 | #define WCHAR_TYPE_SIZE 16 | |
0143027a JL |
276 | \f |
277 | /* Standard register usage. */ | |
278 | ||
279 | /* Number of actual hardware registers. | |
280 | The hardware registers are assigned numbers for the compiler | |
281 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
282 | All registers that the compiler knows about must be given numbers, | |
283 | even those that are not normally considered general registers. */ | |
284 | /* Registers 61, 62, and 63 are not really registers and we needn't treat | |
285 | them as such. We still need a register for the condition code. */ | |
286 | #define FIRST_PSEUDO_REGISTER 62 | |
287 | ||
288 | /* 1 for registers that have pervasive standard uses | |
289 | and are not available for the register allocator. | |
290 | ||
291 | 0-28 - general purpose registers | |
292 | 29 - ilink1 (interrupt link register) | |
293 | 30 - ilink2 (interrupt link register) | |
294 | 31 - blink (branch link register) | |
295 | 32-59 - reserved for extensions | |
296 | 60 - LP_COUNT | |
297 | 61 - condition code | |
298 | ||
299 | For doc purposes: | |
300 | 61 - short immediate data indicator (setting flags) | |
301 | 62 - long immediate data indicator | |
302 | 63 - short immediate data indicator (not setting flags). | |
303 | ||
304 | The general purpose registers are further broken down into: | |
305 | 0-7 - arguments/results | |
306 | 8-15 - call used | |
307 | 16-23 - call saved | |
308 | 24 - call used, static chain pointer | |
309 | 25 - call used, gptmp | |
310 | 26 - global pointer | |
311 | 27 - frame pointer | |
312 | 28 - stack pointer | |
313 | ||
314 | By default, the extension registers are not available. */ | |
315 | ||
316 | #define FIXED_REGISTERS \ | |
317 | { 0, 0, 0, 0, 0, 0, 0, 0, \ | |
318 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
319 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
320 | 0, 0, 0, 1, 1, 1, 1, 0, \ | |
321 | \ | |
322 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
323 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
324 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
325 | 1, 1, 1, 1, 1, 1 } | |
326 | ||
327 | /* 1 for registers not available across function calls. | |
328 | These must include the FIXED_REGISTERS and also any | |
329 | registers that can be used without being saved. | |
330 | The latter must include the registers where values are returned | |
331 | and the register where structure-value addresses are passed. | |
332 | Aside from that, you can include as many other registers as you like. */ | |
333 | ||
334 | #define CALL_USED_REGISTERS \ | |
335 | { 1, 1, 1, 1, 1, 1, 1, 1, \ | |
336 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
337 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
338 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
339 | \ | |
340 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
341 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
342 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
343 | 1, 1, 1, 1, 1, 1 } | |
344 | ||
345 | /* If defined, an initializer for a vector of integers, containing the | |
7ec022b2 | 346 | numbers of hard registers in the order in which GCC should |
0143027a JL |
347 | prefer to use them (from most preferred to least). */ |
348 | #define REG_ALLOC_ORDER \ | |
349 | { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, \ | |
350 | 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 31, \ | |
351 | 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ | |
352 | 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, \ | |
353 | 27, 28, 29, 30 } | |
354 | ||
5b43fed1 RH |
355 | /* Macro to conditionally modify fixed_regs/call_used_regs. */ |
356 | #define CONDITIONAL_REGISTER_USAGE \ | |
357 | do { \ | |
358 | if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ | |
359 | { \ | |
360 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
361 | call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
362 | } \ | |
363 | } while (0) | |
364 | ||
0143027a JL |
365 | /* Return number of consecutive hard regs needed starting at reg REGNO |
366 | to hold something of mode MODE. | |
367 | This is ordinarily the length in words of a value of mode MODE | |
368 | but can be less for certain modes in special long registers. */ | |
369 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
370 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
371 | ||
372 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ | |
0b5826ac | 373 | extern const unsigned int arc_hard_regno_mode_ok[]; |
0143027a JL |
374 | extern unsigned int arc_mode_class[]; |
375 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
376 | ((arc_hard_regno_mode_ok[REGNO] & arc_mode_class[MODE]) != 0) | |
377 | ||
378 | /* A C expression that is nonzero if it is desirable to choose | |
379 | register allocation so as to avoid move instructions between a | |
380 | value of mode MODE1 and a value of mode MODE2. | |
381 | ||
382 | If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, | |
383 | MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1, | |
384 | MODE2)' must be zero. */ | |
385 | ||
386 | /* Tie QI/HI/SI modes together. */ | |
387 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
388 | (GET_MODE_CLASS (MODE1) == MODE_INT \ | |
389 | && GET_MODE_CLASS (MODE2) == MODE_INT \ | |
390 | && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \ | |
391 | && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD) | |
392 | \f | |
393 | /* Register classes and constants. */ | |
394 | ||
395 | /* Define the classes of registers for register constraints in the | |
396 | machine description. Also define ranges of constants. | |
397 | ||
398 | One of the classes must always be named ALL_REGS and include all hard regs. | |
399 | If there is more than one class, another class must be named NO_REGS | |
400 | and contain no registers. | |
401 | ||
402 | The name GENERAL_REGS must be the name of a class (or an alias for | |
403 | another name such as ALL_REGS). This is the class of registers | |
404 | that is allowed by "g" or "r" in a register constraint. | |
405 | Also, registers outside this class are allocated only when | |
406 | instructions express preferences for them. | |
407 | ||
408 | The classes must be numbered in nondecreasing order; that is, | |
409 | a larger-numbered class must never be contained completely | |
410 | in a smaller-numbered class. | |
411 | ||
412 | For any two classes, it is very desirable that there be another | |
413 | class that represents their union. | |
414 | ||
415 | It is important that any condition codes have class NO_REGS. | |
416 | See `register_operand'. */ | |
417 | ||
418 | enum reg_class { | |
419 | NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES | |
420 | }; | |
421 | ||
422 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
423 | ||
6b857ce3 | 424 | /* Give names of register classes as strings for dump file. */ |
0143027a JL |
425 | #define REG_CLASS_NAMES \ |
426 | { "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" } | |
427 | ||
428 | /* Define which registers fit in which classes. | |
429 | This is an initializer for a vector of HARD_REG_SET | |
430 | of length N_REG_CLASSES. */ | |
431 | ||
432 | #define REG_CLASS_CONTENTS \ | |
433 | { {0, 0}, {0, 0x10000000}, {0xffffffff, 0xfffffff}, \ | |
434 | {0xffffffff, 0x1fffffff} } | |
435 | ||
436 | /* The same information, inverted: | |
437 | Return the class number of the smallest class containing | |
438 | reg number REGNO. This could be a conditional expression | |
439 | or could index an array. */ | |
f540a7d3 | 440 | extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER]; |
0143027a JL |
441 | #define REGNO_REG_CLASS(REGNO) \ |
442 | (arc_regno_reg_class[REGNO]) | |
443 | ||
444 | /* The class value for index registers, and the one for base regs. */ | |
445 | #define INDEX_REG_CLASS GENERAL_REGS | |
446 | #define BASE_REG_CLASS GENERAL_REGS | |
447 | ||
448 | /* Get reg_class from a letter such as appears in the machine description. */ | |
449 | #define REG_CLASS_FROM_LETTER(C) \ | |
450 | ((C) == 'l' ? LPCOUNT_REG /* ??? needed? */ \ | |
451 | : NO_REGS) | |
452 | ||
453 | /* These assume that REGNO is a hard or pseudo reg number. | |
454 | They give nonzero only if REGNO is a hard reg of the suitable class | |
455 | or a pseudo reg currently allocated to a suitable hard reg. | |
456 | Since they use reg_renumber, they are safe only once reg_renumber | |
457 | has been allocated, which happens in local-alloc.c. */ | |
458 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
459 | ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) | |
460 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
461 | ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) | |
462 | ||
463 | /* Given an rtx X being reloaded into a reg required to be | |
464 | in class CLASS, return the class of reg to actually use. | |
465 | In general this is just CLASS; but on some machines | |
466 | in some cases it is preferable to use a more restrictive class. */ | |
467 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
468 | (CLASS) | |
469 | ||
470 | /* Return the maximum number of consecutive registers | |
471 | needed to represent mode MODE in a register of class CLASS. */ | |
472 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
473 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
474 | ||
475 | /* The letters I, J, K, L, M, N, O, P in a register constraint string | |
476 | can be used to stand for particular ranges of immediate operands. | |
477 | This macro defines what the ranges are. | |
478 | C is the letter, and VALUE is a constant value. | |
479 | Return 1 if VALUE is in the range specified by C. */ | |
480 | /* 'I' is used for short immediates (always signed). | |
481 | 'J' is used for long immediates. | |
482 | 'K' is used for any constant up to 64 bits (for 64x32 situations?). */ | |
483 | ||
484 | /* local to this file */ | |
485 | #define SMALL_INT(X) ((unsigned) ((X) + 0x100) < 0x200) | |
486 | /* local to this file */ | |
487 | #define LARGE_INT(X) \ | |
488 | ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \ | |
15a5dddc | 489 | && (unsigned HOST_WIDE_INT)(X) <= (unsigned HOST_WIDE_INT) 0xffffffff) |
0143027a JL |
490 | |
491 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
492 | ((C) == 'I' ? SMALL_INT (VALUE) \ | |
493 | : (C) == 'J' ? LARGE_INT (VALUE) \ | |
494 | : (C) == 'K' ? 1 \ | |
495 | : 0) | |
496 | ||
497 | /* Similar, but for floating constants, and defining letters G and H. | |
498 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
499 | /* 'G' is used for integer values for the multiplication insns where the | |
500 | operands are extended from 4 bytes to 8 bytes. | |
501 | 'H' is used when any 64 bit constant is allowed. */ | |
502 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
503 | ((C) == 'G' ? arc_double_limm_p (VALUE) \ | |
504 | : (C) == 'H' ? 1 \ | |
505 | : 0) | |
506 | ||
507 | /* A C expression that defines the optional machine-dependent constraint | |
508 | letters that can be used to segregate specific types of operands, | |
509 | usually memory references, for the target machine. It should return 1 if | |
510 | VALUE corresponds to the operand type represented by the constraint letter | |
511 | C. If C is not defined as an extra constraint, the value returned should | |
512 | be 0 regardless of VALUE. */ | |
513 | /* ??? This currently isn't used. Waiting for PIC. */ | |
514 | #if 0 | |
515 | #define EXTRA_CONSTRAINT(VALUE, C) \ | |
8cbd5ce0 | 516 | ((C) == 'R' ? (SYMBOL_REF_FUNCTION_P (VALUE) || GET_CODE (VALUE) == LABEL_REF) \ |
0143027a JL |
517 | : 0) |
518 | #endif | |
519 | \f | |
520 | /* Stack layout and stack pointer usage. */ | |
521 | ||
522 | /* Define this macro if pushing a word onto the stack moves the stack | |
523 | pointer to a smaller address. */ | |
524 | #define STACK_GROWS_DOWNWARD | |
525 | ||
526 | /* Define this if the nominal address of the stack frame | |
527 | is at the high-address end of the local variables; | |
528 | that is, each additional local variable allocated | |
529 | goes at a more negative offset in the frame. */ | |
530 | #define FRAME_GROWS_DOWNWARD | |
531 | ||
532 | /* Offset within stack frame to start allocating local variables at. | |
533 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
534 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
535 | of the first local allocated. */ | |
536 | #define STARTING_FRAME_OFFSET 0 | |
537 | ||
538 | /* Offset from the stack pointer register to the first location at which | |
539 | outgoing arguments are placed. */ | |
540 | #define STACK_POINTER_OFFSET FIRST_PARM_OFFSET (0) | |
541 | ||
542 | /* Offset of first parameter from the argument pointer register value. */ | |
543 | /* 4 bytes for each of previous fp, return address, and previous gp. | |
544 | 4 byte reserved area for future considerations. */ | |
545 | #define FIRST_PARM_OFFSET(FNDECL) 16 | |
546 | ||
547 | /* A C expression whose value is RTL representing the address in a | |
548 | stack frame where the pointer to the caller's frame is stored. | |
549 | Assume that FRAMEADDR is an RTL expression for the address of the | |
550 | stack frame itself. | |
551 | ||
552 | If you don't define this macro, the default is to return the value | |
553 | of FRAMEADDR--that is, the stack frame address is also the address | |
554 | of the stack word that points to the previous frame. */ | |
e9a25f70 | 555 | /* ??? unfinished */ |
0143027a JL |
556 | /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/ |
557 | ||
558 | /* A C expression whose value is RTL representing the value of the | |
559 | return address for the frame COUNT steps up from the current frame. | |
560 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame | |
561 | pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' | |
562 | is defined. */ | |
563 | /* The current return address is in r31. The return address of anything | |
564 | farther back is at [%fp,4]. */ | |
565 | #if 0 /* The default value should work. */ | |
566 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
c5c76735 JL |
567 | (((COUNT) == -1) \ |
568 | ? gen_rtx_REG (Pmode, 31) \ | |
569 | : copy_to_reg (gen_rtx_MEM (Pmode, \ | |
570 | memory_address (Pmode, \ | |
571 | plus_constant ((FRAME), \ | |
572 | UNITS_PER_WORD))))) | |
0143027a JL |
573 | #endif |
574 | ||
575 | /* Register to use for pushing function arguments. */ | |
576 | #define STACK_POINTER_REGNUM 28 | |
577 | ||
578 | /* Base register for access to local variables of the function. */ | |
579 | #define FRAME_POINTER_REGNUM 27 | |
580 | ||
581 | /* Base register for access to arguments of the function. */ | |
582 | #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM | |
583 | ||
584 | /* Register in which static-chain is passed to a function. This must | |
585 | not be a register used by the prologue. */ | |
586 | #define STATIC_CHAIN_REGNUM 24 | |
587 | ||
588 | /* A C expression which is nonzero if a function must have and use a | |
589 | frame pointer. This expression is evaluated in the reload pass. | |
590 | If its value is nonzero the function will have a frame pointer. */ | |
591 | #define FRAME_POINTER_REQUIRED \ | |
592 | (current_function_calls_alloca) | |
593 | ||
594 | /* C statement to store the difference between the frame pointer | |
595 | and the stack pointer values immediately after the function prologue. */ | |
596 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
597 | ((VAR) = arc_compute_frame_size (get_frame_size ())) | |
598 | \f | |
599 | /* Function argument passing. */ | |
600 | ||
0143027a JL |
601 | /* If defined, the maximum amount of space required for outgoing |
602 | arguments will be computed and placed into the variable | |
603 | `current_function_outgoing_args_size'. No space will be pushed | |
604 | onto the stack for each call; instead, the function prologue should | |
605 | increase the stack frame size by this amount. */ | |
f73ad30e | 606 | #define ACCUMULATE_OUTGOING_ARGS 1 |
0143027a JL |
607 | |
608 | /* Value is the number of bytes of arguments automatically | |
609 | popped when returning from a subroutine call. | |
610 | FUNDECL is the declaration node of the function (as a tree), | |
611 | FUNTYPE is the data type of the function (as a tree), | |
612 | or for a library call it is an identifier node for the subroutine name. | |
613 | SIZE is the number of bytes of arguments passed on the stack. */ | |
614 | #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0 | |
615 | ||
616 | /* Define a data type for recording info about an argument list | |
617 | during the scan of that argument list. This data type should | |
618 | hold all necessary information about the function itself | |
619 | and about the args processed so far, enough to enable macros | |
620 | such as FUNCTION_ARG to determine where the next arg should go. */ | |
621 | #define CUMULATIVE_ARGS int | |
622 | ||
623 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
624 | for a call to a function whose data type is FNTYPE. | |
625 | For a library call, FNTYPE is 0. */ | |
0f6937fe | 626 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
0143027a JL |
627 | ((CUM) = 0) |
628 | ||
629 | /* The number of registers used for parameter passing. Local to this file. */ | |
630 | #define MAX_ARC_PARM_REGS 8 | |
631 | ||
632 | /* 1 if N is a possible register number for function argument passing. */ | |
633 | #define FUNCTION_ARG_REGNO_P(N) \ | |
634 | ((unsigned) (N) < MAX_ARC_PARM_REGS) | |
635 | ||
636 | /* The ROUND_ADVANCE* macros are local to this file. */ | |
637 | /* Round SIZE up to a word boundary. */ | |
638 | #define ROUND_ADVANCE(SIZE) \ | |
639 | (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
640 | ||
641 | /* Round arg MODE/TYPE up to the next word boundary. */ | |
642 | #define ROUND_ADVANCE_ARG(MODE, TYPE) \ | |
643 | ((MODE) == BLKmode \ | |
644 | ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \ | |
645 | : ROUND_ADVANCE (GET_MODE_SIZE (MODE))) | |
646 | ||
647 | /* Round CUM up to the necessary point for argument MODE/TYPE. */ | |
648 | #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \ | |
649 | ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \ | |
650 | > BITS_PER_WORD) \ | |
2b046bda | 651 | ? (((CUM) + 1) & ~1) \ |
0143027a JL |
652 | : (CUM)) |
653 | ||
654 | /* Return boolean indicating arg of type TYPE and mode MODE will be passed in | |
655 | a reg. This includes arguments that have to be passed by reference as the | |
656 | pointer to them is passed in a reg if one is available (and that is what | |
657 | we're given). | |
0143027a | 658 | This macro is only used in this file. */ |
6c535c69 ZW |
659 | #define PASS_IN_REG_P(CUM, MODE, TYPE) \ |
660 | ((CUM) < MAX_ARC_PARM_REGS \ | |
0143027a JL |
661 | && ((ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ |
662 | + ROUND_ADVANCE_ARG ((MODE), (TYPE)) \ | |
663 | <= MAX_ARC_PARM_REGS))) | |
664 | ||
665 | /* Determine where to put an argument to a function. | |
666 | Value is zero to push the argument on the stack, | |
667 | or a hard register in which to store the argument. | |
668 | ||
669 | MODE is the argument's machine mode. | |
670 | TYPE is the data type of the argument (as a tree). | |
671 | This is null for libcalls where that information may | |
672 | not be available. | |
673 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
674 | the preceding args and about the function being called. | |
675 | NAMED is nonzero if this argument is a named parameter | |
676 | (otherwise it is an extra parameter matching an ellipsis). */ | |
677 | /* On the ARC the first MAX_ARC_PARM_REGS args are normally in registers | |
678 | and the rest are pushed. */ | |
679 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
6c535c69 | 680 | (PASS_IN_REG_P ((CUM), (MODE), (TYPE)) \ |
c5c76735 | 681 | ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ |
0143027a JL |
682 | : 0) |
683 | ||
684 | /* A C expression for the number of words, at the beginning of an | |
685 | argument, must be put in registers. The value must be zero for | |
686 | arguments that are passed entirely in registers or that are entirely | |
687 | pushed on the stack. | |
688 | ||
689 | On some machines, certain arguments must be passed partially in | |
690 | registers and partially in memory. On these machines, typically the | |
691 | first @var{n} words of arguments are passed in registers, and the rest | |
692 | on the stack. If a multi-word argument (a @code{double} or a | |
693 | structure) crosses that boundary, its first few words must be passed | |
694 | in registers and the rest must be pushed. This macro tells the | |
695 | compiler when this occurs, and how many of the words should go in | |
696 | registers. */ | |
697 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 | |
698 | ||
699 | /* A C expression that indicates when an argument must be passed by | |
700 | reference. If nonzero for an argument, a copy of that argument is | |
701 | made in memory and a pointer to the argument is passed instead of | |
702 | the argument itself. The pointer is passed in whatever way is | |
703 | appropriate for passing a pointer to that type. */ | |
704 | /* All aggregates and arguments greater than 8 bytes are passed this way. */ | |
705 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
706 | (TYPE \ | |
707 | && (AGGREGATE_TYPE_P (TYPE) \ | |
708 | || int_size_in_bytes (TYPE) > 8)) | |
709 | ||
710 | /* A C expression that indicates when it is the called function's | |
711 | responsibility to make copies of arguments passed by reference. | |
712 | If the callee can determine that the argument won't be modified, it can | |
713 | avoid the copy. */ | |
714 | /* ??? We'd love to be able to use NAMED here. Unfortunately, it doesn't | |
715 | include the last named argument so we keep track of the args ourselves. */ | |
716 | ||
717 | #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ | |
718 | FUNCTION_ARG_PASS_BY_REFERENCE ((CUM), (MODE), (TYPE), (NAMED)) | |
719 | ||
720 | /* Update the data in CUM to advance over an argument | |
721 | of mode MODE and data type TYPE. | |
722 | (TYPE is null for libcalls where that information may not be available.) */ | |
723 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
724 | ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ | |
725 | + ROUND_ADVANCE_ARG ((MODE), (TYPE)))) | |
726 | ||
727 | /* If defined, a C expression that gives the alignment boundary, in bits, | |
728 | of an argument with the specified mode and type. If it is not defined, | |
729 | PARM_BOUNDARY is used for all arguments. */ | |
730 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
731 | (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ | |
732 | ? PARM_BOUNDARY \ | |
733 | : 2 * PARM_BOUNDARY) | |
0143027a JL |
734 | \f |
735 | /* Function results. */ | |
736 | ||
737 | /* Define how to find the value returned by a function. | |
738 | VALTYPE is the data type of the value (as a tree). | |
739 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
740 | otherwise, FUNC is 0. */ | |
c5c76735 | 741 | #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) |
0143027a JL |
742 | |
743 | /* Define how to find the value returned by a library function | |
744 | assuming the value has mode MODE. */ | |
c5c76735 | 745 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) |
0143027a JL |
746 | |
747 | /* 1 if N is a possible register number for a function value | |
748 | as seen by the caller. */ | |
749 | /* ??? What about r1 in DI/DF values. */ | |
750 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) | |
751 | ||
07ba2efb | 752 | /* Tell GCC to use TARGET_RETURN_IN_MEMORY. */ |
0143027a | 753 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
0143027a | 754 | \f |
0143027a JL |
755 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
756 | the stack pointer does not matter. The value is tested only in | |
757 | functions that have frame pointers. | |
758 | No definition is equivalent to always zero. */ | |
759 | #define EXIT_IGNORE_STACK 0 | |
760 | ||
0143027a JL |
761 | /* Epilogue delay slots. */ |
762 | #define DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue () | |
763 | ||
764 | #define ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) \ | |
765 | arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED) | |
766 | ||
767 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
768 | for profiling a function entry. */ | |
769 | #define FUNCTION_PROFILER(FILE, LABELNO) | |
770 | \f | |
771 | /* Trampolines. */ | |
772 | /* ??? This doesn't work yet because GCC will use as the address of a nested | |
773 | function the address of the trampoline. We need to use that address | |
774 | right shifted by 2. It looks like we'll need PSImode after all. :-( */ | |
775 | ||
776 | /* Output assembler code for a block containing the constant parts | |
777 | of a trampoline, leaving space for the variable parts. */ | |
778 | /* On the ARC, the trampoline is quite simple as we have 32 bit immediate | |
779 | constants. | |
780 | ||
781 | mov r24,STATIC | |
782 | j.nd FUNCTION | |
783 | */ | |
784 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
785 | do { \ | |
301d03af RS |
786 | assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x631f7c00)); \ |
787 | assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ | |
788 | assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x381f0000)); \ | |
789 | assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \ | |
0143027a JL |
790 | } while (0) |
791 | ||
792 | /* Length in units of the trampoline for entering a nested function. */ | |
793 | #define TRAMPOLINE_SIZE 16 | |
794 | ||
795 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
796 | FNADDR is an RTX for the address of the function's pure code. | |
797 | CXT is an RTX for the static chain value for the function. */ | |
798 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
799 | do { \ | |
c5c76735 JL |
800 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ |
801 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \ | |
802 | emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ | |
0143027a JL |
803 | } while (0) |
804 | \f | |
0143027a JL |
805 | /* Addressing modes, and classification of registers for them. */ |
806 | ||
807 | /* Maximum number of registers that can appear in a valid memory address. */ | |
808 | /* The `ld' insn allows 2, but the `st' insn only allows 1. */ | |
809 | #define MAX_REGS_PER_ADDRESS 1 | |
810 | ||
811 | /* We have pre inc/dec (load/store with update). */ | |
940da324 JL |
812 | #define HAVE_PRE_INCREMENT 1 |
813 | #define HAVE_PRE_DECREMENT 1 | |
0143027a JL |
814 | |
815 | /* Recognize any constant value that is a valid address. */ | |
816 | #define CONSTANT_ADDRESS_P(X) \ | |
817 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
818 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST) | |
819 | ||
820 | /* Nonzero if the constant value X is a legitimate general operand. | |
821 | We can handle any 32 or 64 bit constant. */ | |
822 | /* "1" should work since the largest constant should be a 64 bit critter. */ | |
823 | /* ??? Not sure what to do for 64x32 compiler. */ | |
824 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
825 | ||
826 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
827 | and check its validity for a certain class. | |
828 | We have two alternate definitions for each of them. | |
829 | The usual definition accepts all pseudo regs; the other rejects | |
830 | them unless they have been allocated suitable hard regs. | |
831 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
832 | ||
833 | Most source files want to accept pseudo regs in the hope that | |
834 | they will get allocated to the class that the insn wants them to be in. | |
835 | Source files for reload pass need to be strict. | |
836 | After reload, it makes no difference, since pseudo regs have | |
837 | been eliminated by then. */ | |
838 | ||
839 | #ifndef REG_OK_STRICT | |
840 | ||
841 | /* Nonzero if X is a hard reg that can be used as an index | |
842 | or if it is a pseudo reg. */ | |
843 | #define REG_OK_FOR_INDEX_P(X) \ | |
844 | ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) | |
845 | /* Nonzero if X is a hard reg that can be used as a base reg | |
846 | or if it is a pseudo reg. */ | |
847 | #define REG_OK_FOR_BASE_P(X) \ | |
848 | ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) | |
849 | ||
850 | #else | |
851 | ||
852 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
853 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
854 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
855 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
856 | ||
857 | #endif | |
858 | ||
859 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
860 | that is a valid memory address for an instruction. | |
861 | The MODE argument is the machine mode for the MEM expression | |
862 | that wants to use this address. */ | |
863 | /* The `ld' insn allows [reg],[reg+shimm],[reg+limm],[reg+reg],[limm] | |
864 | but the `st' insn only allows [reg],[reg+shimm],[limm]. | |
865 | The only thing we can do is only allow the most strict case `st' and hope | |
866 | other parts optimize out the restrictions for `ld'. */ | |
867 | ||
868 | /* local to this file */ | |
869 | #define RTX_OK_FOR_BASE_P(X) \ | |
870 | (REG_P (X) && REG_OK_FOR_BASE_P (X)) | |
871 | ||
872 | /* local to this file */ | |
873 | #define RTX_OK_FOR_INDEX_P(X) \ | |
e9a25f70 | 874 | (0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X)) |
0143027a JL |
875 | |
876 | /* local to this file */ | |
877 | /* ??? Loads can handle any constant, stores can only handle small ones. */ | |
878 | #define RTX_OK_FOR_OFFSET_P(X) \ | |
879 | (GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X))) | |
880 | ||
881 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \ | |
882 | (GET_CODE (X) == PLUS \ | |
883 | && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
884 | && (RTX_OK_FOR_INDEX_P (XEXP (X, 1)) \ | |
885 | || RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))) | |
886 | ||
887 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
888 | { if (RTX_OK_FOR_BASE_P (X)) \ | |
889 | goto ADDR; \ | |
890 | if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \ | |
891 | goto ADDR; \ | |
892 | if (GET_CODE (X) == CONST_INT && LARGE_INT (INTVAL (X))) \ | |
893 | goto ADDR; \ | |
894 | if (GET_CODE (X) == SYMBOL_REF \ | |
895 | || GET_CODE (X) == LABEL_REF \ | |
896 | || GET_CODE (X) == CONST) \ | |
897 | goto ADDR; \ | |
898 | if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \ | |
899 | /* We're restricted here by the `st' insn. */ \ | |
900 | && RTX_OK_FOR_BASE_P (XEXP ((X), 0))) \ | |
901 | goto ADDR; \ | |
902 | } | |
903 | ||
0143027a JL |
904 | /* Go to LABEL if ADDR (a legitimate address expression) |
905 | has an effect that depends on the machine mode it is used for. */ | |
906 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ | |
907 | { if (GET_CODE (ADDR) == PRE_DEC) \ | |
908 | goto LABEL; \ | |
909 | if (GET_CODE (ADDR) == PRE_INC) \ | |
910 | goto LABEL; \ | |
911 | } | |
912 | \f | |
0143027a JL |
913 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, |
914 | return the mode to be used for the comparison. */ | |
0143027a JL |
915 | #define SELECT_CC_MODE(OP, X, Y) \ |
916 | arc_select_cc_mode (OP, X, Y) | |
917 | ||
825dda42 | 918 | /* Return nonzero if SELECT_CC_MODE will never return MODE for a |
0143027a | 919 | floating point inequality comparison. */ |
e9a25f70 | 920 | #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/ |
0143027a JL |
921 | \f |
922 | /* Costs. */ | |
923 | ||
0143027a JL |
924 | /* Compute extra cost of moving data between one register class |
925 | and another. */ | |
cf011243 | 926 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2 |
0143027a JL |
927 | |
928 | /* Compute the cost of moving data between registers and memory. */ | |
929 | /* Memory is 3 times as expensive as registers. | |
930 | ??? Is that the right way to look at it? */ | |
cbd5b9a2 | 931 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) \ |
0143027a JL |
932 | (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12) |
933 | ||
934 | /* The cost of a branch insn. */ | |
935 | /* ??? What's the right value here? Branches are certainly more | |
936 | expensive than reg->reg moves. */ | |
937 | #define BRANCH_COST 2 | |
938 | ||
0143027a JL |
939 | /* Nonzero if access to memory by bytes is slow and undesirable. |
940 | For RISC chips, it means that access to memory by bytes is no | |
941 | better than access by words when possible, so grab a whole word | |
942 | and maybe make use of that. */ | |
943 | #define SLOW_BYTE_ACCESS 1 | |
944 | ||
945 | /* Define this macro if it is as good or better to call a constant | |
946 | function address than to call an address kept in a register. */ | |
947 | /* On the ARC, calling through registers is slow. */ | |
948 | #define NO_FUNCTION_CSE | |
0143027a JL |
949 | \f |
950 | /* Section selection. */ | |
951 | /* WARNING: These section names also appear in dwarfout.c. */ | |
952 | ||
953 | /* The names of the text, data, and readonly-data sections are runtime | |
954 | selectable. */ | |
955 | ||
956 | #define ARC_SECTION_FORMAT "\t.section %s" | |
957 | #define ARC_DEFAULT_TEXT_SECTION ".text" | |
958 | #define ARC_DEFAULT_DATA_SECTION ".data" | |
959 | #define ARC_DEFAULT_RODATA_SECTION ".rodata" | |
960 | ||
2b046bda | 961 | extern const char *arc_text_section, *arc_data_section, *arc_rodata_section; |
0143027a JL |
962 | |
963 | /* initfini.c uses this in an asm. */ | |
964 | #if defined (CRT_INIT) || defined (CRT_FINI) | |
965 | #define TEXT_SECTION_ASM_OP "\t.section .text" | |
966 | #else | |
d48bc59a | 967 | #define TEXT_SECTION_ASM_OP arc_text_section |
0143027a | 968 | #endif |
d48bc59a | 969 | #define DATA_SECTION_ASM_OP arc_data_section |
0143027a | 970 | |
d48bc59a RH |
971 | #undef READONLY_DATA_SECTION_ASM_OP |
972 | #define READONLY_DATA_SECTION_ASM_OP arc_rodata_section | |
0143027a JL |
973 | |
974 | #define BSS_SECTION_ASM_OP "\t.section .bss" | |
975 | ||
976 | /* Define this macro if jump tables (for tablejump insns) should be | |
977 | output in the text section, along with the assembler instructions. | |
978 | Otherwise, the readonly data section is used. | |
979 | This macro is irrelevant if there is no separate readonly data section. */ | |
980 | /*#define JUMP_TABLES_IN_TEXT_SECTION*/ | |
981 | ||
0143027a JL |
982 | /* For DWARF. Marginally different than default so output is "prettier" |
983 | (and consistent with above). */ | |
8202cda0 | 984 | #define PUSHSECTION_ASM_OP "\t.section " |
0143027a JL |
985 | |
986 | /* Tell crtstuff.c we're using ELF. */ | |
987 | #define OBJECT_FORMAT_ELF | |
988 | \f | |
989 | /* PIC */ | |
990 | ||
991 | /* The register number of the register used to address a table of static | |
992 | data addresses in memory. In some cases this register is defined by a | |
993 | processor's ``application binary interface'' (ABI). When this macro | |
994 | is defined, RTL is generated for this register once, as with the stack | |
995 | pointer and frame pointer registers. If this macro is not defined, it | |
996 | is up to the machine-dependent files to allocate such a register (if | |
997 | necessary). */ | |
5b43fed1 | 998 | #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 26 : INVALID_REGNUM) |
0143027a JL |
999 | |
1000 | /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is | |
1001 | clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM | |
1002 | is not defined. */ | |
1003 | /* This register is call-saved on the ARC. */ | |
1004 | /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/ | |
1005 | ||
1006 | /* By generating position-independent code, when two different programs (A | |
1007 | and B) share a common library (libC.a), the text of the library can be | |
1008 | shared whether or not the library is linked at the same address for both | |
1009 | programs. In some of these environments, position-independent code | |
1010 | requires not only the use of different addressing modes, but also | |
1011 | special code to enable the use of these addressing modes. | |
1012 | ||
1013 | The FINALIZE_PIC macro serves as a hook to emit these special | |
1014 | codes once the function is being compiled into assembly code, but not | |
1015 | before. (It is not done before, because in the case of compiling an | |
1016 | inline function, it would lead to multiple PIC prologues being | |
1017 | included in functions which used inline functions and were compiled to | |
1018 | assembly language.) */ | |
1019 | ||
0143027a JL |
1020 | #define FINALIZE_PIC arc_finalize_pic () |
1021 | ||
1022 | /* A C expression that is nonzero if X is a legitimate immediate | |
1023 | operand on the target machine when generating position independent code. | |
1024 | You can assume that X satisfies CONSTANT_P, so you need not | |
1025 | check this. You can also assume `flag_pic' is true, so you need not | |
1026 | check it either. You need not define this macro if all constants | |
1027 | (including SYMBOL_REF) can be immediate operands when generating | |
1028 | position independent code. */ | |
1029 | /*#define LEGITIMATE_PIC_OPERAND_P(X)*/ | |
1030 | \f | |
1031 | /* Control the assembler format that we output. */ | |
1032 | ||
0143027a JL |
1033 | /* A C string constant describing how to begin a comment in the target |
1034 | assembler language. The compiler assumes that the comment will | |
1035 | end at the end of the line. */ | |
1036 | #define ASM_COMMENT_START ";" | |
1037 | ||
1038 | /* Output to assembler file text saying following lines | |
1039 | may contain character constants, extra white space, comments, etc. */ | |
1040 | #define ASM_APP_ON "" | |
1041 | ||
1042 | /* Output to assembler file text saying following lines | |
1043 | no longer contain unusual constructs. */ | |
1044 | #define ASM_APP_OFF "" | |
1045 | ||
506a61b1 KG |
1046 | /* Globalizing directive for a label. */ |
1047 | #define GLOBAL_ASM_OP "\t.global\t" | |
0143027a | 1048 | |
0143027a JL |
1049 | /* This is how to output a reference to a user-level label named NAME. |
1050 | `assemble_name' uses this. */ | |
1051 | /* We mangle all user labels to provide protection from linking code | |
1052 | compiled for different cpus. */ | |
1053 | /* We work around a dwarfout.c deficiency by watching for labels from it and | |
1054 | not adding the '_' prefix nor the cpu suffix. There is a comment in | |
4977bab6 | 1055 | dwarfout.c that says it should be using (*targetm.asm_out.internal_label). */ |
2b046bda | 1056 | extern const char *arc_mangle_cpu; |
0143027a JL |
1057 | #define ASM_OUTPUT_LABELREF(FILE, NAME) \ |
1058 | do { \ | |
1059 | if ((NAME)[0] == '.' && (NAME)[1] == 'L') \ | |
1060 | fprintf (FILE, "%s", NAME); \ | |
1061 | else \ | |
1062 | { \ | |
1063 | fputc ('_', FILE); \ | |
1064 | if (TARGET_MANGLE_CPU && arc_mangle_cpu != NULL) \ | |
1065 | fprintf (FILE, "%s_", arc_mangle_cpu); \ | |
1066 | fprintf (FILE, "%s", NAME); \ | |
1067 | } \ | |
1068 | } while (0) | |
1069 | ||
0143027a JL |
1070 | /* Assembler pseudo-op to equate one value with another. */ |
1071 | /* ??? This is needed because dwarfout.c provides a default definition too | |
1072 | late for defaults.h (which contains the default definition of ASM_OUTPUT_DEF | |
1073 | that we use). */ | |
8c13c7b3 | 1074 | #define SET_ASM_OP "\t.set\t" |
0143027a | 1075 | |
0143027a JL |
1076 | /* How to refer to registers in assembler output. |
1077 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1078 | #define REGISTER_NAMES \ | |
1079 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
1080 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
1081 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
1082 | "r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \ | |
1083 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \ | |
1084 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \ | |
1085 | "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \ | |
1086 | "r56", "r57", "r58", "r59", "lp_count", "cc"} | |
1087 | ||
1088 | /* Entry to the insn conditionalizer. */ | |
1089 | #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ | |
1090 | arc_final_prescan_insn (INSN, OPVEC, NOPERANDS) | |
1091 | ||
1092 | /* A C expression which evaluates to true if CODE is a valid | |
1093 | punctuation character for use in the `PRINT_OPERAND' macro. */ | |
f540a7d3 | 1094 | extern char arc_punct_chars[256]; |
0143027a JL |
1095 | #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ |
1096 | arc_punct_chars[(unsigned char) (CHAR)] | |
1097 | ||
1098 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1099 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1100 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1101 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1102 | arc_print_operand (FILE, X, CODE) | |
1103 | ||
1104 | /* A C compound statement to output to stdio stream STREAM the | |
1105 | assembler syntax for an instruction operand that is a memory | |
fb49053f | 1106 | reference whose address is ADDR. ADDR is an RTL expression. */ |
0143027a JL |
1107 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ |
1108 | arc_print_operand_address (FILE, ADDR) | |
1109 | ||
1110 | /* This is how to output an element of a case-vector that is absolute. */ | |
1111 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1112 | do { \ | |
1113 | char label[30]; \ | |
1114 | ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ | |
1115 | fprintf (FILE, "\t.word %%st("); \ | |
1116 | assemble_name (FILE, label); \ | |
1117 | fprintf (FILE, ")\n"); \ | |
1118 | } while (0) | |
1119 | ||
1120 | /* This is how to output an element of a case-vector that is relative. */ | |
33f7f353 | 1121 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
0143027a JL |
1122 | do { \ |
1123 | char label[30]; \ | |
1124 | ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ | |
1125 | fprintf (FILE, "\t.word %%st("); \ | |
1126 | assemble_name (FILE, label); \ | |
1127 | fprintf (FILE, "-"); \ | |
1128 | ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \ | |
1129 | assemble_name (FILE, label); \ | |
1130 | fprintf (FILE, ")\n"); \ | |
1131 | } while (0) | |
1132 | ||
fc470718 R |
1133 | /* The desired alignment for the location counter at the beginning |
1134 | of a loop. */ | |
0143027a JL |
1135 | /* On the ARC, align loops to 32 byte boundaries (cache line size) |
1136 | if -malign-loops. */ | |
fc470718 | 1137 | #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0) |
0143027a JL |
1138 | |
1139 | /* This is how to output an assembler line | |
1140 | that says to advance the location counter | |
1141 | to a multiple of 2**LOG bytes. */ | |
1142 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1143 | do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0) | |
1144 | \f | |
1145 | /* Debugging information. */ | |
1146 | ||
1147 | /* Generate DBX and DWARF debugging information. */ | |
23532de9 | 1148 | #define DBX_DEBUGGING_INFO 1 |
0143027a JL |
1149 | |
1150 | /* Prefer STABS (for now). */ | |
1151 | #undef PREFERRED_DEBUGGING_TYPE | |
1152 | #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG | |
1153 | ||
0143027a JL |
1154 | /* Turn off splitting of long stabs. */ |
1155 | #define DBX_CONTIN_LENGTH 0 | |
1156 | \f | |
1157 | /* Miscellaneous. */ | |
1158 | ||
1159 | /* Specify the machine mode that this machine uses | |
1160 | for the index in the tablejump instruction. */ | |
1161 | #define CASE_VECTOR_MODE Pmode | |
1162 | ||
0143027a JL |
1163 | /* Define if operations between registers always perform the operation |
1164 | on the full register even if a narrower mode is specified. */ | |
1165 | #define WORD_REGISTER_OPERATIONS | |
1166 | ||
1167 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1168 | will either zero-extend or sign-extend. The value of this macro should | |
1169 | be the code that says which one of the two operations is implicitly | |
1170 | done, NIL if none. */ | |
1171 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
1172 | ||
0143027a JL |
1173 | /* Max number of bytes we can move from memory to memory |
1174 | in one reasonably fast instruction. */ | |
1175 | #define MOVE_MAX 4 | |
1176 | ||
1177 | /* Define this to be nonzero if shift instructions ignore all but the low-order | |
6b857ce3 | 1178 | few bits. */ |
0143027a JL |
1179 | #define SHIFT_COUNT_TRUNCATED 1 |
1180 | ||
1181 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1182 | is done just by pretending it is already truncated. */ | |
1183 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1184 | ||
0143027a JL |
1185 | /* Specify the machine mode that pointers have. |
1186 | After generation of rtl, the compiler makes no further distinction | |
1187 | between pointers and any other objects of this machine mode. */ | |
1188 | /* ??? The arc doesn't have full 32 bit pointers, but making this PSImode has | |
9ec36da5 | 1189 | its own problems (you have to add extendpsisi2 and trucnsipsi2 but how does |
0143027a JL |
1190 | one do it without getting excess code?). Try to avoid it. */ |
1191 | #define Pmode SImode | |
1192 | ||
1193 | /* A function address in a call instruction. */ | |
1194 | #define FUNCTION_MODE SImode | |
1195 | ||
0143027a JL |
1196 | /* alloca should avoid clobbering the old register save area. */ |
1197 | /* ??? Not defined in tm.texi. */ | |
1198 | #define SETJMP_VIA_SAVE_AREA | |
1199 | \f | |
1200 | /* Define the information needed to generate branch and scc insns. This is | |
1201 | stored from the compare operation. Note that we can't use "rtx" here | |
1202 | since it hasn't been defined! */ | |
1203 | extern struct rtx_def *arc_compare_op0, *arc_compare_op1; | |
1204 | ||
6b857ce3 | 1205 | /* ARC function types. */ |
0143027a JL |
1206 | enum arc_function_type { |
1207 | ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL, | |
1208 | /* These are interrupt handlers. The name corresponds to the register | |
1209 | name that contains the return address. */ | |
1210 | ARC_FUNCTION_ILINK1, ARC_FUNCTION_ILINK2 | |
1211 | }; | |
1212 | #define ARC_INTERRUPT_P(TYPE) \ | |
1213 | ((TYPE) == ARC_FUNCTION_ILINK1 || (TYPE) == ARC_FUNCTION_ILINK2) | |
1214 | /* Compute the type of a function from its DECL. */ | |
965eb474 RH |
1215 | |
1216 | \f | |
1217 | /* Implement `va_start' for varargs and stdarg. */ | |
e5faf155 ZW |
1218 | #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ |
1219 | arc_va_start (valist, nextarg) | |
965eb474 RH |
1220 | |
1221 | /* Implement `va_arg'. */ | |
1222 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
1223 | arc_va_arg (valist, type) |