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e9a25f70 | 1 | /* Definitions of target machine for GNU compiler, Argonaut ARC cpu. |
2b046bda | 2 | Copyright (C) 1994, 95, 97, 98, 99, 2000 Free Software Foundation, Inc. |
0143027a JL |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | /* ??? This is an old port, and is undoubtedly suffering from bit rot. */ | |
22 | ||
23 | /* Things to do: | |
24 | ||
25 | - PREDICATE_CODES | |
26 | - incscc, decscc? | |
27 | - print active compiler options in assembler output | |
28 | */ | |
29 | ||
e9a25f70 | 30 | /* ??? Create elf.h and have svr4.h include it. */ |
0143027a JL |
31 | #include "svr4.h" |
32 | ||
33 | #undef ASM_SPEC | |
34 | #undef LINK_SPEC | |
35 | #undef STARTFILE_SPEC | |
36 | #undef ENDFILE_SPEC | |
37 | #undef SIZE_TYPE | |
38 | #undef PTRDIFF_TYPE | |
39 | #undef WCHAR_TYPE | |
40 | #undef WCHAR_TYPE_SIZE | |
2b046bda | 41 | #undef ASM_OUTPUT_LABELREF |
0143027a JL |
42 | \f |
43 | /* Print subsidiary information on the compiler version in use. */ | |
44 | #define TARGET_VERSION fprintf (stderr, " (arc)") | |
45 | ||
46 | /* Names to predefine in the preprocessor for this target machine. */ | |
2b57e919 | 47 | #define CPP_PREDEFINES "-Acpu=arc -Amachine=arc -D__arc__" |
0143027a JL |
48 | |
49 | /* Additional flags for the preprocessor. */ | |
50 | #define CPP_SPEC "\ | |
51 | %{!mcpu=*:-D__base__} %{mcpu=base:-D__base__} \ | |
52 | %{EB:-D__big_endian__} \ | |
53 | " | |
54 | ||
55 | /* Pass -mmangle-cpu if we get -mcpu=*. | |
56 | Doing it this way lets one have it on as default with -mcpu=*, | |
57 | but also lets one turn it off with -mno-mangle-cpu. */ | |
58 | #define CC1_SPEC "\ | |
59 | %{mcpu=*:-mmangle-cpu} \ | |
60 | %{EB:%{EL:%emay not use both -EB and -EL}} \ | |
61 | %{EB:-mbig-endian} %{EL:-mlittle-endian} \ | |
62 | " | |
63 | ||
64 | #define ASM_SPEC "%{v} %{EB} %{EL}" | |
65 | ||
66 | #define LINK_SPEC "%{v} %{EB} %{EL}" | |
67 | ||
68 | #define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s" | |
69 | ||
70 | #define ENDFILE_SPEC "crtfini.o%s" | |
71 | \f | |
72 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
73 | ||
74 | extern int target_flags; | |
75 | ||
76 | /* Mangle all user symbols for the specified cpu. | |
77 | ARC's can be shipped in which a collection of cpus are coupled together. | |
78 | Each CPU may be different in some way, and thus we may need to distinguish | |
79 | code compiled for one to ensure it isn't linked with code compiled for | |
80 | another. */ | |
81 | #define TARGET_MASK_MANGLE_CPU 1 | |
82 | #define TARGET_MANGLE_CPU (target_flags & TARGET_MASK_MANGLE_CPU) | |
83 | ||
84 | #if 0 | |
85 | /* Mangle libgcc symbols by adding a suffix for the specified cpu. */ | |
86 | #define TARGET_MASK_MANGLE_CPU_LIBGCC 2 | |
87 | #define TARGET_MANGLE_CPU_LIBGCC (target_flags & TARGET_MASK_MANGLE_CPU_LIBGCC) | |
88 | #endif | |
89 | ||
90 | /* Align loops to 32 byte boundaries (cache line size). */ | |
91 | #define TARGET_MASK_ALIGN_LOOPS 4 | |
92 | #define TARGET_ALIGN_LOOPS (target_flags & TARGET_MASK_ALIGN_LOOPS) | |
93 | ||
94 | /* Big Endian. */ | |
95 | #define TARGET_MASK_BIG_ENDIAN 8 | |
96 | #define TARGET_BIG_ENDIAN (target_flags & TARGET_MASK_BIG_ENDIAN) | |
97 | ||
98 | /* Turn off conditional execution optimization, | |
99 | so we can see how well it does, or in case it's buggy. */ | |
100 | #define TARGET_MASK_NO_COND_EXEC 0x10 | |
101 | #define TARGET_NO_COND_EXEC (target_flags & TARGET_MASK_NO_COND_EXEC) | |
102 | ||
103 | /* Macro to define tables used to set the flags. | |
104 | This is a list in braces of pairs in braces, | |
105 | each pair being { "NAME", VALUE } | |
106 | where VALUE is the bits to set or minus the bits to clear. | |
107 | An empty string NAME is used to identify the default VALUE. */ | |
108 | ||
109 | #define TARGET_SWITCHES \ | |
110 | { \ | |
111 | { "mangle-cpu", TARGET_MASK_MANGLE_CPU }, \ | |
112 | { "no-mangle-cpu", -TARGET_MASK_MANGLE_CPU }, \ | |
113 | /* { "mangle-cpu-libgcc", TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \ | |
114 | /* { "no-mangle-cpu-libgcc", -TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \ | |
115 | { "align-loops", TARGET_MASK_ALIGN_LOOPS }, \ | |
116 | { "no-align-loops", -TARGET_MASK_ALIGN_LOOPS }, \ | |
117 | { "big-endian", TARGET_MASK_BIG_ENDIAN }, \ | |
118 | { "little-endian", -TARGET_MASK_BIG_ENDIAN }, \ | |
119 | { "no-cond-exec", TARGET_MASK_NO_COND_EXEC }, \ | |
120 | SUBTARGET_SWITCHES \ | |
121 | { "", TARGET_DEFAULT } \ | |
122 | } | |
123 | ||
124 | #define TARGET_DEFAULT (0) | |
125 | ||
126 | #define SUBTARGET_SWITCHES | |
127 | ||
128 | /* Instruction set characteristics. | |
129 | These are internal macros, set by the appropriate -mcpu= option. */ | |
130 | ||
131 | /* Non-zero means the cpu has a barrel shifter. */ | |
132 | #define TARGET_SHIFTER 0 | |
133 | ||
134 | /* This macro is similar to `TARGET_SWITCHES' but defines names of | |
135 | command options that have values. Its definition is an | |
136 | initializer with a subgrouping for each command option. | |
137 | ||
138 | Each subgrouping contains a string constant, that defines the | |
139 | fixed part of the option name, and the address of a variable. | |
140 | The variable, type `char *', is set to the variable part of the | |
141 | given option if the fixed part matches. The actual option name | |
142 | is made by appending `-m' to the specified name. | |
143 | ||
144 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
145 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
146 | will be set to the string `"512"'. | |
147 | ||
148 | extern char *m88k_short_data; | |
149 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
150 | ||
2b046bda KG |
151 | extern const char *arc_cpu_string; |
152 | extern const char *arc_text_string,*arc_data_string,*arc_rodata_string; | |
0143027a JL |
153 | |
154 | #define TARGET_OPTIONS \ | |
155 | { \ | |
156 | { "cpu=", &arc_cpu_string }, \ | |
157 | { "text=", &arc_text_string }, \ | |
158 | { "data=", &arc_data_string }, \ | |
159 | { "rodata=", &arc_rodata_string }, \ | |
160 | } | |
161 | ||
162 | /* Which cpu we're compiling for. */ | |
163 | extern int arc_cpu_type; | |
164 | ||
165 | /* Check if CPU is an extension and set `arc_cpu_type' and `arc_mangle_cpu' | |
166 | appropriately. The result should be non-zero if the cpu is recognized, | |
167 | otherwise zero. This is intended to be redefined in a cover file. | |
168 | This is used by arc_init. */ | |
169 | #define ARC_EXTENSION_CPU(cpu) 0 | |
170 | ||
171 | /* Sometimes certain combinations of command options do not make | |
172 | sense on a particular target machine. You can define a macro | |
173 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
174 | defined, is executed once just after all the command options have | |
175 | been parsed. | |
176 | ||
177 | Don't use this macro to turn on various extra optimizations for | |
178 | `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ | |
179 | ||
0143027a JL |
180 | |
181 | #define OVERRIDE_OPTIONS \ | |
182 | do { \ | |
183 | /* These need to be done at start up. It's convenient to do them here. */ \ | |
184 | arc_init (); \ | |
185 | } while (0) | |
186 | \f | |
187 | /* Target machine storage layout. */ | |
188 | ||
189 | /* Define to use software floating point emulator for REAL_ARITHMETIC and | |
190 | decimal <-> binary conversion. */ | |
191 | #define REAL_ARITHMETIC | |
192 | ||
193 | /* Define this if most significant bit is lowest numbered | |
194 | in instructions that operate on numbered bit-fields. */ | |
195 | #define BITS_BIG_ENDIAN 1 | |
196 | ||
197 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
198 | #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN) | |
199 | ||
200 | /* Define this if most significant word of a multiword number is the lowest | |
201 | numbered. */ | |
202 | #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN) | |
203 | ||
204 | /* Define this to set the endianness to use in libgcc2.c, which can | |
205 | not depend on target_flags. */ | |
206 | #ifdef __big_endian__ | |
207 | #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
208 | #else | |
209 | #define LIBGCC2_WORDS_BIG_ENDIAN 0 | |
210 | #endif | |
211 | ||
212 | /* Number of bits in an addressable storage unit. */ | |
213 | #define BITS_PER_UNIT 8 | |
214 | ||
215 | /* Width in bits of a "word", which is the contents of a machine register. | |
216 | Note that this is not necessarily the width of data type `int'; | |
217 | if using 16-bit ints on a 68000, this would still be 32. | |
218 | But on a machine with 16-bit registers, this would be 16. */ | |
219 | #define BITS_PER_WORD 32 | |
220 | ||
221 | /* Width of a word, in units (bytes). */ | |
222 | #define UNITS_PER_WORD 4 | |
223 | ||
224 | /* Define this macro if it is advisable to hold scalars in registers | |
225 | in a wider mode than that declared by the program. In such cases, | |
226 | the value is constrained to be within the bounds of the declared | |
227 | type, but kept valid in the wider mode. The signedness of the | |
228 | extension may differ from that of the type. */ | |
229 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
230 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
231 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
232 | { \ | |
233 | (MODE) = SImode; \ | |
234 | } | |
235 | ||
236 | /* Define this macro if the promotion described by `PROMOTE_MODE' | |
237 | should also be done for outgoing function arguments. */ | |
238 | #define PROMOTE_FUNCTION_ARGS | |
239 | ||
240 | /* Likewise, if the function return value is promoted. */ | |
241 | #define PROMOTE_FUNCTION_RETURN | |
242 | ||
243 | /* Width in bits of a pointer. | |
244 | See also the macro `Pmode' defined below. */ | |
245 | #define POINTER_SIZE 32 | |
246 | ||
247 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
248 | #define PARM_BOUNDARY 32 | |
249 | ||
250 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
251 | #define STACK_BOUNDARY 64 | |
252 | ||
253 | /* ALIGN FRAMES on word boundaries */ | |
254 | #define ARC_STACK_ALIGN(LOC) (((LOC)+7) & ~7) | |
255 | ||
256 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
257 | #define FUNCTION_BOUNDARY 32 | |
258 | ||
259 | /* Alignment of field after `int : 0' in a structure. */ | |
260 | #define EMPTY_FIELD_BOUNDARY 32 | |
261 | ||
262 | /* Every structure's size must be a multiple of this. */ | |
263 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
264 | ||
265 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
266 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
267 | ||
268 | /* No data type wants to be aligned rounder than this. */ | |
269 | /* This is bigger than currently necessary for the ARC. If 8 byte floats are | |
270 | ever added it's not clear whether they'll need such alignment or not. For | |
271 | now we assume they will. We can always relax it if necessary but the | |
272 | reverse isn't true. */ | |
273 | #define BIGGEST_ALIGNMENT 64 | |
274 | ||
275 | /* The best alignment to use in cases where we have a choice. */ | |
276 | #define FASTEST_ALIGNMENT 32 | |
277 | ||
278 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
279 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
280 | ((TREE_CODE (EXP) == STRING_CST \ | |
281 | && (ALIGN) < FASTEST_ALIGNMENT) \ | |
282 | ? FASTEST_ALIGNMENT : (ALIGN)) | |
283 | ||
284 | /* Make arrays of chars word-aligned for the same reasons. */ | |
285 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
286 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
287 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
288 | && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) | |
289 | ||
290 | /* Set this nonzero if move instructions will actually fail to work | |
291 | when given unaligned data. */ | |
292 | /* On the ARC the lower address bits are masked to 0 as necessary. The chip | |
293 | won't croak when given an unaligned address, but the insn will still fail | |
294 | to produce the correct result. */ | |
295 | #define STRICT_ALIGNMENT 1 | |
296 | \f | |
297 | /* Layout of source language data types. */ | |
298 | ||
299 | #define SHORT_TYPE_SIZE 16 | |
300 | #define INT_TYPE_SIZE 32 | |
301 | #define LONG_TYPE_SIZE 32 | |
302 | #define LONG_LONG_TYPE_SIZE 64 | |
303 | #define FLOAT_TYPE_SIZE 32 | |
304 | #define DOUBLE_TYPE_SIZE 64 | |
305 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
306 | ||
307 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
308 | #define DEFAULT_SIGNED_CHAR 1 | |
309 | ||
310 | #define SIZE_TYPE "long unsigned int" | |
311 | #define PTRDIFF_TYPE "long int" | |
312 | #define WCHAR_TYPE "short unsigned int" | |
313 | #define WCHAR_TYPE_SIZE 16 | |
314 | ||
315 | /* Define results of standard character escape sequences. */ | |
316 | #define TARGET_BELL 007 | |
317 | #define TARGET_BS 010 | |
318 | #define TARGET_TAB 011 | |
319 | #define TARGET_NEWLINE 012 | |
320 | #define TARGET_VT 013 | |
321 | #define TARGET_FF 014 | |
322 | #define TARGET_CR 015 | |
323 | \f | |
324 | /* Standard register usage. */ | |
325 | ||
326 | /* Number of actual hardware registers. | |
327 | The hardware registers are assigned numbers for the compiler | |
328 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
329 | All registers that the compiler knows about must be given numbers, | |
330 | even those that are not normally considered general registers. */ | |
331 | /* Registers 61, 62, and 63 are not really registers and we needn't treat | |
332 | them as such. We still need a register for the condition code. */ | |
333 | #define FIRST_PSEUDO_REGISTER 62 | |
334 | ||
335 | /* 1 for registers that have pervasive standard uses | |
336 | and are not available for the register allocator. | |
337 | ||
338 | 0-28 - general purpose registers | |
339 | 29 - ilink1 (interrupt link register) | |
340 | 30 - ilink2 (interrupt link register) | |
341 | 31 - blink (branch link register) | |
342 | 32-59 - reserved for extensions | |
343 | 60 - LP_COUNT | |
344 | 61 - condition code | |
345 | ||
346 | For doc purposes: | |
347 | 61 - short immediate data indicator (setting flags) | |
348 | 62 - long immediate data indicator | |
349 | 63 - short immediate data indicator (not setting flags). | |
350 | ||
351 | The general purpose registers are further broken down into: | |
352 | 0-7 - arguments/results | |
353 | 8-15 - call used | |
354 | 16-23 - call saved | |
355 | 24 - call used, static chain pointer | |
356 | 25 - call used, gptmp | |
357 | 26 - global pointer | |
358 | 27 - frame pointer | |
359 | 28 - stack pointer | |
360 | ||
361 | By default, the extension registers are not available. */ | |
362 | ||
363 | #define FIXED_REGISTERS \ | |
364 | { 0, 0, 0, 0, 0, 0, 0, 0, \ | |
365 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
366 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
367 | 0, 0, 0, 1, 1, 1, 1, 0, \ | |
368 | \ | |
369 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
370 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
371 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
372 | 1, 1, 1, 1, 1, 1 } | |
373 | ||
374 | /* 1 for registers not available across function calls. | |
375 | These must include the FIXED_REGISTERS and also any | |
376 | registers that can be used without being saved. | |
377 | The latter must include the registers where values are returned | |
378 | and the register where structure-value addresses are passed. | |
379 | Aside from that, you can include as many other registers as you like. */ | |
380 | ||
381 | #define CALL_USED_REGISTERS \ | |
382 | { 1, 1, 1, 1, 1, 1, 1, 1, \ | |
383 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
384 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
385 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
386 | \ | |
387 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
388 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
389 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
390 | 1, 1, 1, 1, 1, 1 } | |
391 | ||
392 | /* If defined, an initializer for a vector of integers, containing the | |
393 | numbers of hard registers in the order in which GNU CC should | |
394 | prefer to use them (from most preferred to least). */ | |
395 | #define REG_ALLOC_ORDER \ | |
396 | { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, \ | |
397 | 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 31, \ | |
398 | 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ | |
399 | 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, \ | |
400 | 27, 28, 29, 30 } | |
401 | ||
402 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
403 | to hold something of mode MODE. | |
404 | This is ordinarily the length in words of a value of mode MODE | |
405 | but can be less for certain modes in special long registers. */ | |
406 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
407 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
408 | ||
409 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ | |
410 | extern unsigned int arc_hard_regno_mode_ok[]; | |
411 | extern unsigned int arc_mode_class[]; | |
412 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
413 | ((arc_hard_regno_mode_ok[REGNO] & arc_mode_class[MODE]) != 0) | |
414 | ||
415 | /* A C expression that is nonzero if it is desirable to choose | |
416 | register allocation so as to avoid move instructions between a | |
417 | value of mode MODE1 and a value of mode MODE2. | |
418 | ||
419 | If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, | |
420 | MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1, | |
421 | MODE2)' must be zero. */ | |
422 | ||
423 | /* Tie QI/HI/SI modes together. */ | |
424 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
425 | (GET_MODE_CLASS (MODE1) == MODE_INT \ | |
426 | && GET_MODE_CLASS (MODE2) == MODE_INT \ | |
427 | && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \ | |
428 | && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD) | |
429 | \f | |
430 | /* Register classes and constants. */ | |
431 | ||
432 | /* Define the classes of registers for register constraints in the | |
433 | machine description. Also define ranges of constants. | |
434 | ||
435 | One of the classes must always be named ALL_REGS and include all hard regs. | |
436 | If there is more than one class, another class must be named NO_REGS | |
437 | and contain no registers. | |
438 | ||
439 | The name GENERAL_REGS must be the name of a class (or an alias for | |
440 | another name such as ALL_REGS). This is the class of registers | |
441 | that is allowed by "g" or "r" in a register constraint. | |
442 | Also, registers outside this class are allocated only when | |
443 | instructions express preferences for them. | |
444 | ||
445 | The classes must be numbered in nondecreasing order; that is, | |
446 | a larger-numbered class must never be contained completely | |
447 | in a smaller-numbered class. | |
448 | ||
449 | For any two classes, it is very desirable that there be another | |
450 | class that represents their union. | |
451 | ||
452 | It is important that any condition codes have class NO_REGS. | |
453 | See `register_operand'. */ | |
454 | ||
455 | enum reg_class { | |
456 | NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES | |
457 | }; | |
458 | ||
459 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
460 | ||
461 | /* Give names of register classes as strings for dump file. */ | |
462 | #define REG_CLASS_NAMES \ | |
463 | { "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" } | |
464 | ||
465 | /* Define which registers fit in which classes. | |
466 | This is an initializer for a vector of HARD_REG_SET | |
467 | of length N_REG_CLASSES. */ | |
468 | ||
469 | #define REG_CLASS_CONTENTS \ | |
470 | { {0, 0}, {0, 0x10000000}, {0xffffffff, 0xfffffff}, \ | |
471 | {0xffffffff, 0x1fffffff} } | |
472 | ||
473 | /* The same information, inverted: | |
474 | Return the class number of the smallest class containing | |
475 | reg number REGNO. This could be a conditional expression | |
476 | or could index an array. */ | |
477 | extern enum reg_class arc_regno_reg_class[]; | |
478 | #define REGNO_REG_CLASS(REGNO) \ | |
479 | (arc_regno_reg_class[REGNO]) | |
480 | ||
481 | /* The class value for index registers, and the one for base regs. */ | |
482 | #define INDEX_REG_CLASS GENERAL_REGS | |
483 | #define BASE_REG_CLASS GENERAL_REGS | |
484 | ||
485 | /* Get reg_class from a letter such as appears in the machine description. */ | |
486 | #define REG_CLASS_FROM_LETTER(C) \ | |
487 | ((C) == 'l' ? LPCOUNT_REG /* ??? needed? */ \ | |
488 | : NO_REGS) | |
489 | ||
490 | /* These assume that REGNO is a hard or pseudo reg number. | |
491 | They give nonzero only if REGNO is a hard reg of the suitable class | |
492 | or a pseudo reg currently allocated to a suitable hard reg. | |
493 | Since they use reg_renumber, they are safe only once reg_renumber | |
494 | has been allocated, which happens in local-alloc.c. */ | |
495 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
496 | ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) | |
497 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
498 | ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) | |
499 | ||
500 | /* Given an rtx X being reloaded into a reg required to be | |
501 | in class CLASS, return the class of reg to actually use. | |
502 | In general this is just CLASS; but on some machines | |
503 | in some cases it is preferable to use a more restrictive class. */ | |
504 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
505 | (CLASS) | |
506 | ||
507 | /* Return the maximum number of consecutive registers | |
508 | needed to represent mode MODE in a register of class CLASS. */ | |
509 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
510 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
511 | ||
512 | /* The letters I, J, K, L, M, N, O, P in a register constraint string | |
513 | can be used to stand for particular ranges of immediate operands. | |
514 | This macro defines what the ranges are. | |
515 | C is the letter, and VALUE is a constant value. | |
516 | Return 1 if VALUE is in the range specified by C. */ | |
517 | /* 'I' is used for short immediates (always signed). | |
518 | 'J' is used for long immediates. | |
519 | 'K' is used for any constant up to 64 bits (for 64x32 situations?). */ | |
520 | ||
521 | /* local to this file */ | |
522 | #define SMALL_INT(X) ((unsigned) ((X) + 0x100) < 0x200) | |
523 | /* local to this file */ | |
524 | #define LARGE_INT(X) \ | |
525 | ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \ | |
526 | && (X) <= (unsigned HOST_WIDE_INT) 0xffffffff) | |
527 | ||
528 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
529 | ((C) == 'I' ? SMALL_INT (VALUE) \ | |
530 | : (C) == 'J' ? LARGE_INT (VALUE) \ | |
531 | : (C) == 'K' ? 1 \ | |
532 | : 0) | |
533 | ||
534 | /* Similar, but for floating constants, and defining letters G and H. | |
535 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
536 | /* 'G' is used for integer values for the multiplication insns where the | |
537 | operands are extended from 4 bytes to 8 bytes. | |
538 | 'H' is used when any 64 bit constant is allowed. */ | |
539 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
540 | ((C) == 'G' ? arc_double_limm_p (VALUE) \ | |
541 | : (C) == 'H' ? 1 \ | |
542 | : 0) | |
543 | ||
544 | /* A C expression that defines the optional machine-dependent constraint | |
545 | letters that can be used to segregate specific types of operands, | |
546 | usually memory references, for the target machine. It should return 1 if | |
547 | VALUE corresponds to the operand type represented by the constraint letter | |
548 | C. If C is not defined as an extra constraint, the value returned should | |
549 | be 0 regardless of VALUE. */ | |
550 | /* ??? This currently isn't used. Waiting for PIC. */ | |
551 | #if 0 | |
552 | #define EXTRA_CONSTRAINT(VALUE, C) \ | |
553 | ((C) == 'R' ? (SYMBOL_REF_FLAG (VALUE) || GET_CODE (VALUE) == LABEL_REF) \ | |
554 | : 0) | |
555 | #endif | |
556 | \f | |
557 | /* Stack layout and stack pointer usage. */ | |
558 | ||
559 | /* Define this macro if pushing a word onto the stack moves the stack | |
560 | pointer to a smaller address. */ | |
561 | #define STACK_GROWS_DOWNWARD | |
562 | ||
563 | /* Define this if the nominal address of the stack frame | |
564 | is at the high-address end of the local variables; | |
565 | that is, each additional local variable allocated | |
566 | goes at a more negative offset in the frame. */ | |
567 | #define FRAME_GROWS_DOWNWARD | |
568 | ||
569 | /* Offset within stack frame to start allocating local variables at. | |
570 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
571 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
572 | of the first local allocated. */ | |
573 | #define STARTING_FRAME_OFFSET 0 | |
574 | ||
575 | /* Offset from the stack pointer register to the first location at which | |
576 | outgoing arguments are placed. */ | |
577 | #define STACK_POINTER_OFFSET FIRST_PARM_OFFSET (0) | |
578 | ||
579 | /* Offset of first parameter from the argument pointer register value. */ | |
580 | /* 4 bytes for each of previous fp, return address, and previous gp. | |
581 | 4 byte reserved area for future considerations. */ | |
582 | #define FIRST_PARM_OFFSET(FNDECL) 16 | |
583 | ||
584 | /* A C expression whose value is RTL representing the address in a | |
585 | stack frame where the pointer to the caller's frame is stored. | |
586 | Assume that FRAMEADDR is an RTL expression for the address of the | |
587 | stack frame itself. | |
588 | ||
589 | If you don't define this macro, the default is to return the value | |
590 | of FRAMEADDR--that is, the stack frame address is also the address | |
591 | of the stack word that points to the previous frame. */ | |
e9a25f70 | 592 | /* ??? unfinished */ |
0143027a JL |
593 | /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/ |
594 | ||
595 | /* A C expression whose value is RTL representing the value of the | |
596 | return address for the frame COUNT steps up from the current frame. | |
597 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame | |
598 | pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' | |
599 | is defined. */ | |
600 | /* The current return address is in r31. The return address of anything | |
601 | farther back is at [%fp,4]. */ | |
602 | #if 0 /* The default value should work. */ | |
603 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
c5c76735 JL |
604 | (((COUNT) == -1) \ |
605 | ? gen_rtx_REG (Pmode, 31) \ | |
606 | : copy_to_reg (gen_rtx_MEM (Pmode, \ | |
607 | memory_address (Pmode, \ | |
608 | plus_constant ((FRAME), \ | |
609 | UNITS_PER_WORD))))) | |
0143027a JL |
610 | #endif |
611 | ||
612 | /* Register to use for pushing function arguments. */ | |
613 | #define STACK_POINTER_REGNUM 28 | |
614 | ||
615 | /* Base register for access to local variables of the function. */ | |
616 | #define FRAME_POINTER_REGNUM 27 | |
617 | ||
618 | /* Base register for access to arguments of the function. */ | |
619 | #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM | |
620 | ||
621 | /* Register in which static-chain is passed to a function. This must | |
622 | not be a register used by the prologue. */ | |
623 | #define STATIC_CHAIN_REGNUM 24 | |
624 | ||
625 | /* A C expression which is nonzero if a function must have and use a | |
626 | frame pointer. This expression is evaluated in the reload pass. | |
627 | If its value is nonzero the function will have a frame pointer. */ | |
628 | #define FRAME_POINTER_REQUIRED \ | |
629 | (current_function_calls_alloca) | |
630 | ||
631 | /* C statement to store the difference between the frame pointer | |
632 | and the stack pointer values immediately after the function prologue. */ | |
633 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
634 | ((VAR) = arc_compute_frame_size (get_frame_size ())) | |
635 | \f | |
636 | /* Function argument passing. */ | |
637 | ||
638 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
cb560352 | 639 | #define PROMOTE_PROTOTYPES 1 |
0143027a JL |
640 | |
641 | /* If defined, the maximum amount of space required for outgoing | |
642 | arguments will be computed and placed into the variable | |
643 | `current_function_outgoing_args_size'. No space will be pushed | |
644 | onto the stack for each call; instead, the function prologue should | |
645 | increase the stack frame size by this amount. */ | |
f73ad30e | 646 | #define ACCUMULATE_OUTGOING_ARGS 1 |
0143027a JL |
647 | |
648 | /* Value is the number of bytes of arguments automatically | |
649 | popped when returning from a subroutine call. | |
650 | FUNDECL is the declaration node of the function (as a tree), | |
651 | FUNTYPE is the data type of the function (as a tree), | |
652 | or for a library call it is an identifier node for the subroutine name. | |
653 | SIZE is the number of bytes of arguments passed on the stack. */ | |
654 | #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0 | |
655 | ||
656 | /* Define a data type for recording info about an argument list | |
657 | during the scan of that argument list. This data type should | |
658 | hold all necessary information about the function itself | |
659 | and about the args processed so far, enough to enable macros | |
660 | such as FUNCTION_ARG to determine where the next arg should go. */ | |
661 | #define CUMULATIVE_ARGS int | |
662 | ||
663 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
664 | for a call to a function whose data type is FNTYPE. | |
665 | For a library call, FNTYPE is 0. */ | |
666 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ | |
667 | ((CUM) = 0) | |
668 | ||
669 | /* The number of registers used for parameter passing. Local to this file. */ | |
670 | #define MAX_ARC_PARM_REGS 8 | |
671 | ||
672 | /* 1 if N is a possible register number for function argument passing. */ | |
673 | #define FUNCTION_ARG_REGNO_P(N) \ | |
674 | ((unsigned) (N) < MAX_ARC_PARM_REGS) | |
675 | ||
676 | /* The ROUND_ADVANCE* macros are local to this file. */ | |
677 | /* Round SIZE up to a word boundary. */ | |
678 | #define ROUND_ADVANCE(SIZE) \ | |
679 | (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
680 | ||
681 | /* Round arg MODE/TYPE up to the next word boundary. */ | |
682 | #define ROUND_ADVANCE_ARG(MODE, TYPE) \ | |
683 | ((MODE) == BLKmode \ | |
684 | ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \ | |
685 | : ROUND_ADVANCE (GET_MODE_SIZE (MODE))) | |
686 | ||
687 | /* Round CUM up to the necessary point for argument MODE/TYPE. */ | |
688 | #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \ | |
689 | ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \ | |
690 | > BITS_PER_WORD) \ | |
2b046bda | 691 | ? (((CUM) + 1) & ~1) \ |
0143027a JL |
692 | : (CUM)) |
693 | ||
694 | /* Return boolean indicating arg of type TYPE and mode MODE will be passed in | |
695 | a reg. This includes arguments that have to be passed by reference as the | |
696 | pointer to them is passed in a reg if one is available (and that is what | |
697 | we're given). | |
698 | When passing arguments NAMED is always 1. When receiving arguments NAMED | |
699 | is 1 for each argument except the last in a stdarg/varargs function. In | |
700 | a stdarg function we want to treat the last named arg as named. In a | |
701 | varargs function we want to treat the last named arg (which is | |
702 | `__builtin_va_alist') as unnamed. | |
703 | This macro is only used in this file. */ | |
0143027a JL |
704 | #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \ |
705 | ((!current_function_varargs || (NAMED)) \ | |
706 | && (CUM) < MAX_ARC_PARM_REGS \ | |
707 | && ((ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ | |
708 | + ROUND_ADVANCE_ARG ((MODE), (TYPE)) \ | |
709 | <= MAX_ARC_PARM_REGS))) | |
710 | ||
711 | /* Determine where to put an argument to a function. | |
712 | Value is zero to push the argument on the stack, | |
713 | or a hard register in which to store the argument. | |
714 | ||
715 | MODE is the argument's machine mode. | |
716 | TYPE is the data type of the argument (as a tree). | |
717 | This is null for libcalls where that information may | |
718 | not be available. | |
719 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
720 | the preceding args and about the function being called. | |
721 | NAMED is nonzero if this argument is a named parameter | |
722 | (otherwise it is an extra parameter matching an ellipsis). */ | |
723 | /* On the ARC the first MAX_ARC_PARM_REGS args are normally in registers | |
724 | and the rest are pushed. */ | |
725 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
726 | (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \ | |
c5c76735 | 727 | ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ |
0143027a JL |
728 | : 0) |
729 | ||
730 | /* A C expression for the number of words, at the beginning of an | |
731 | argument, must be put in registers. The value must be zero for | |
732 | arguments that are passed entirely in registers or that are entirely | |
733 | pushed on the stack. | |
734 | ||
735 | On some machines, certain arguments must be passed partially in | |
736 | registers and partially in memory. On these machines, typically the | |
737 | first @var{n} words of arguments are passed in registers, and the rest | |
738 | on the stack. If a multi-word argument (a @code{double} or a | |
739 | structure) crosses that boundary, its first few words must be passed | |
740 | in registers and the rest must be pushed. This macro tells the | |
741 | compiler when this occurs, and how many of the words should go in | |
742 | registers. */ | |
743 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 | |
744 | ||
745 | /* A C expression that indicates when an argument must be passed by | |
746 | reference. If nonzero for an argument, a copy of that argument is | |
747 | made in memory and a pointer to the argument is passed instead of | |
748 | the argument itself. The pointer is passed in whatever way is | |
749 | appropriate for passing a pointer to that type. */ | |
750 | /* All aggregates and arguments greater than 8 bytes are passed this way. */ | |
751 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
752 | (TYPE \ | |
753 | && (AGGREGATE_TYPE_P (TYPE) \ | |
754 | || int_size_in_bytes (TYPE) > 8)) | |
755 | ||
756 | /* A C expression that indicates when it is the called function's | |
757 | responsibility to make copies of arguments passed by reference. | |
758 | If the callee can determine that the argument won't be modified, it can | |
759 | avoid the copy. */ | |
760 | /* ??? We'd love to be able to use NAMED here. Unfortunately, it doesn't | |
761 | include the last named argument so we keep track of the args ourselves. */ | |
762 | ||
763 | #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ | |
764 | FUNCTION_ARG_PASS_BY_REFERENCE ((CUM), (MODE), (TYPE), (NAMED)) | |
765 | ||
766 | /* Update the data in CUM to advance over an argument | |
767 | of mode MODE and data type TYPE. | |
768 | (TYPE is null for libcalls where that information may not be available.) */ | |
769 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
770 | ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ | |
771 | + ROUND_ADVANCE_ARG ((MODE), (TYPE)))) | |
772 | ||
773 | /* If defined, a C expression that gives the alignment boundary, in bits, | |
774 | of an argument with the specified mode and type. If it is not defined, | |
775 | PARM_BOUNDARY is used for all arguments. */ | |
776 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
777 | (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ | |
778 | ? PARM_BOUNDARY \ | |
779 | : 2 * PARM_BOUNDARY) | |
780 | ||
781 | /* This macro offers an alternative | |
782 | to using `__builtin_saveregs' and defining the macro | |
783 | `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register | |
784 | arguments into the stack so that all the arguments appear to have | |
785 | been passed consecutively on the stack. Once this is done, you | |
786 | can use the standard implementation of varargs that works for | |
787 | machines that pass all their arguments on the stack. | |
788 | ||
789 | The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure, | |
790 | containing the values that obtain after processing of the named | |
791 | arguments. The arguments MODE and TYPE describe the last named | |
792 | argument--its machine mode and its data type as a tree node. | |
793 | ||
794 | The macro implementation should do two things: first, push onto the | |
795 | stack all the argument registers *not* used for the named | |
796 | arguments, and second, store the size of the data thus pushed into | |
797 | the `int'-valued variable whose name is supplied as the argument | |
798 | PRETEND_SIZE. The value that you store here will serve as | |
799 | additional offset for setting up the stack frame. | |
800 | ||
801 | If the argument NO_RTL is nonzero, it means that the | |
802 | arguments of the function are being analyzed for the second time. | |
803 | This happens for an inline function, which is not actually | |
804 | compiled until the end of the source file. The macro | |
805 | `SETUP_INCOMING_VARARGS' should not generate any instructions in | |
806 | this case. */ | |
807 | ||
808 | #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ | |
809 | arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) | |
810 | \f | |
811 | /* Function results. */ | |
812 | ||
813 | /* Define how to find the value returned by a function. | |
814 | VALTYPE is the data type of the value (as a tree). | |
815 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
816 | otherwise, FUNC is 0. */ | |
c5c76735 | 817 | #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) |
0143027a JL |
818 | |
819 | /* Define how to find the value returned by a library function | |
820 | assuming the value has mode MODE. */ | |
c5c76735 | 821 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) |
0143027a JL |
822 | |
823 | /* 1 if N is a possible register number for a function value | |
824 | as seen by the caller. */ | |
825 | /* ??? What about r1 in DI/DF values. */ | |
826 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) | |
827 | ||
828 | /* A C expression which can inhibit the returning of certain function | |
829 | values in registers, based on the type of value. A nonzero value says | |
830 | to return the function value in memory, just as large structures are | |
831 | always returned. Here TYPE will be a C expression of type `tree', | |
832 | representing the data type of the value. */ | |
833 | #define RETURN_IN_MEMORY(TYPE) \ | |
834 | (AGGREGATE_TYPE_P (TYPE) \ | |
835 | || int_size_in_bytes (TYPE) > 8 \ | |
836 | || TREE_ADDRESSABLE (TYPE)) | |
837 | ||
838 | /* Tell GCC to use RETURN_IN_MEMORY. */ | |
839 | #define DEFAULT_PCC_STRUCT_RETURN 0 | |
840 | ||
841 | /* Register in which address to store a structure value | |
842 | is passed to a function, or 0 to use `invisible' first argument. */ | |
843 | #define STRUCT_VALUE 0 | |
844 | \f | |
845 | /* Function entry and exit. */ | |
846 | ||
847 | /* This macro generates the assembly code for function entry. | |
848 | FILE is a stdio stream to output the code to. | |
849 | SIZE is an int: how many units of temporary storage to allocate. | |
850 | Refer to the array `regs_ever_live' to determine which registers | |
851 | to save; `regs_ever_live[I]' is nonzero if register number I | |
852 | is ever used in the function. This macro is responsible for | |
853 | knowing which registers should not be saved even if used. */ | |
854 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
855 | arc_output_function_prologue (FILE, SIZE) | |
856 | ||
857 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
858 | the stack pointer does not matter. The value is tested only in | |
859 | functions that have frame pointers. | |
860 | No definition is equivalent to always zero. */ | |
861 | #define EXIT_IGNORE_STACK 0 | |
862 | ||
863 | /* This macro generates the assembly code for function exit, | |
864 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
865 | then individual return instructions are generated for each | |
866 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
867 | ||
868 | The function epilogue should not depend on the current stack pointer! | |
869 | It should use the frame pointer only. This is mandatory because | |
870 | of alloca; we also take advantage of it to omit stack adjustments | |
871 | before returning. */ | |
872 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
873 | arc_output_function_epilogue (FILE, SIZE) | |
874 | ||
875 | /* Epilogue delay slots. */ | |
876 | #define DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue () | |
877 | ||
878 | #define ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) \ | |
879 | arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED) | |
880 | ||
881 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
882 | for profiling a function entry. */ | |
883 | #define FUNCTION_PROFILER(FILE, LABELNO) | |
884 | \f | |
885 | /* Trampolines. */ | |
886 | /* ??? This doesn't work yet because GCC will use as the address of a nested | |
887 | function the address of the trampoline. We need to use that address | |
888 | right shifted by 2. It looks like we'll need PSImode after all. :-( */ | |
889 | ||
890 | /* Output assembler code for a block containing the constant parts | |
891 | of a trampoline, leaving space for the variable parts. */ | |
892 | /* On the ARC, the trampoline is quite simple as we have 32 bit immediate | |
893 | constants. | |
894 | ||
895 | mov r24,STATIC | |
896 | j.nd FUNCTION | |
897 | */ | |
898 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
899 | do { \ | |
900 | ASM_OUTPUT_INT (FILE, GEN_INT (0x631f7c00)); \ | |
901 | ASM_OUTPUT_INT (FILE, const0_rtx); \ | |
902 | ASM_OUTPUT_INT (FILE, GEN_INT (0x381f0000)); \ | |
903 | ASM_OUTPUT_INT (FILE, const0_rtx); \ | |
904 | } while (0) | |
905 | ||
906 | /* Length in units of the trampoline for entering a nested function. */ | |
907 | #define TRAMPOLINE_SIZE 16 | |
908 | ||
909 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
910 | FNADDR is an RTX for the address of the function's pure code. | |
911 | CXT is an RTX for the static chain value for the function. */ | |
912 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
913 | do { \ | |
c5c76735 JL |
914 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ |
915 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \ | |
916 | emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ | |
0143027a JL |
917 | } while (0) |
918 | \f | |
919 | /* Library calls. */ | |
920 | ||
921 | /* Generate calls to memcpy, memcmp and memset. */ | |
922 | #define TARGET_MEM_FUNCTIONS | |
923 | \f | |
924 | /* Addressing modes, and classification of registers for them. */ | |
925 | ||
926 | /* Maximum number of registers that can appear in a valid memory address. */ | |
927 | /* The `ld' insn allows 2, but the `st' insn only allows 1. */ | |
928 | #define MAX_REGS_PER_ADDRESS 1 | |
929 | ||
930 | /* We have pre inc/dec (load/store with update). */ | |
940da324 JL |
931 | #define HAVE_PRE_INCREMENT 1 |
932 | #define HAVE_PRE_DECREMENT 1 | |
0143027a JL |
933 | |
934 | /* Recognize any constant value that is a valid address. */ | |
935 | #define CONSTANT_ADDRESS_P(X) \ | |
936 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
937 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST) | |
938 | ||
939 | /* Nonzero if the constant value X is a legitimate general operand. | |
940 | We can handle any 32 or 64 bit constant. */ | |
941 | /* "1" should work since the largest constant should be a 64 bit critter. */ | |
942 | /* ??? Not sure what to do for 64x32 compiler. */ | |
943 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
944 | ||
945 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
946 | and check its validity for a certain class. | |
947 | We have two alternate definitions for each of them. | |
948 | The usual definition accepts all pseudo regs; the other rejects | |
949 | them unless they have been allocated suitable hard regs. | |
950 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
951 | ||
952 | Most source files want to accept pseudo regs in the hope that | |
953 | they will get allocated to the class that the insn wants them to be in. | |
954 | Source files for reload pass need to be strict. | |
955 | After reload, it makes no difference, since pseudo regs have | |
956 | been eliminated by then. */ | |
957 | ||
958 | #ifndef REG_OK_STRICT | |
959 | ||
960 | /* Nonzero if X is a hard reg that can be used as an index | |
961 | or if it is a pseudo reg. */ | |
962 | #define REG_OK_FOR_INDEX_P(X) \ | |
963 | ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) | |
964 | /* Nonzero if X is a hard reg that can be used as a base reg | |
965 | or if it is a pseudo reg. */ | |
966 | #define REG_OK_FOR_BASE_P(X) \ | |
967 | ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) | |
968 | ||
969 | #else | |
970 | ||
971 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
972 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
973 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
974 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
975 | ||
976 | #endif | |
977 | ||
978 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
979 | that is a valid memory address for an instruction. | |
980 | The MODE argument is the machine mode for the MEM expression | |
981 | that wants to use this address. */ | |
982 | /* The `ld' insn allows [reg],[reg+shimm],[reg+limm],[reg+reg],[limm] | |
983 | but the `st' insn only allows [reg],[reg+shimm],[limm]. | |
984 | The only thing we can do is only allow the most strict case `st' and hope | |
985 | other parts optimize out the restrictions for `ld'. */ | |
986 | ||
987 | /* local to this file */ | |
988 | #define RTX_OK_FOR_BASE_P(X) \ | |
989 | (REG_P (X) && REG_OK_FOR_BASE_P (X)) | |
990 | ||
991 | /* local to this file */ | |
992 | #define RTX_OK_FOR_INDEX_P(X) \ | |
e9a25f70 | 993 | (0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X)) |
0143027a JL |
994 | |
995 | /* local to this file */ | |
996 | /* ??? Loads can handle any constant, stores can only handle small ones. */ | |
997 | #define RTX_OK_FOR_OFFSET_P(X) \ | |
998 | (GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X))) | |
999 | ||
1000 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \ | |
1001 | (GET_CODE (X) == PLUS \ | |
1002 | && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1003 | && (RTX_OK_FOR_INDEX_P (XEXP (X, 1)) \ | |
1004 | || RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))) | |
1005 | ||
1006 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1007 | { if (RTX_OK_FOR_BASE_P (X)) \ | |
1008 | goto ADDR; \ | |
1009 | if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \ | |
1010 | goto ADDR; \ | |
1011 | if (GET_CODE (X) == CONST_INT && LARGE_INT (INTVAL (X))) \ | |
1012 | goto ADDR; \ | |
1013 | if (GET_CODE (X) == SYMBOL_REF \ | |
1014 | || GET_CODE (X) == LABEL_REF \ | |
1015 | || GET_CODE (X) == CONST) \ | |
1016 | goto ADDR; \ | |
1017 | if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \ | |
1018 | /* We're restricted here by the `st' insn. */ \ | |
1019 | && RTX_OK_FOR_BASE_P (XEXP ((X), 0))) \ | |
1020 | goto ADDR; \ | |
1021 | } | |
1022 | ||
1023 | /* Try machine-dependent ways of modifying an illegitimate address | |
1024 | to be legitimate. If we find one, return the new, valid address. | |
1025 | This macro is used in only one place: `memory_address' in explow.c. | |
1026 | ||
1027 | OLDX is the address as it was before break_out_memory_refs was called. | |
1028 | In some cases it is useful to look at this to decide what needs to be done. | |
1029 | ||
1030 | MODE and WIN are passed so that this macro can use | |
1031 | GO_IF_LEGITIMATE_ADDRESS. | |
1032 | ||
1033 | It is always safe for this macro to do nothing. It exists to recognize | |
1034 | opportunities to optimize the output. */ | |
1035 | ||
1036 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) | |
1037 | ||
1038 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1039 | has an effect that depends on the machine mode it is used for. */ | |
1040 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ | |
1041 | { if (GET_CODE (ADDR) == PRE_DEC) \ | |
1042 | goto LABEL; \ | |
1043 | if (GET_CODE (ADDR) == PRE_INC) \ | |
1044 | goto LABEL; \ | |
1045 | } | |
1046 | \f | |
1047 | /* Condition code usage. */ | |
1048 | ||
1049 | /* Some insns set all condition code flags, some only set the ZNC flags, and | |
1050 | some only set the ZN flags. */ | |
1051 | ||
aa0b4465 ZW |
1052 | #define EXTRA_CC_MODES \ |
1053 | CC(CCZNCmode, "CCZNC") \ | |
1054 | CC(CCZNmode, "CCZN") | |
0143027a JL |
1055 | |
1056 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1057 | return the mode to be used for the comparison. */ | |
0143027a JL |
1058 | #define SELECT_CC_MODE(OP, X, Y) \ |
1059 | arc_select_cc_mode (OP, X, Y) | |
1060 | ||
1061 | /* Return non-zero if SELECT_CC_MODE will never return MODE for a | |
1062 | floating point inequality comparison. */ | |
e9a25f70 | 1063 | #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/ |
0143027a JL |
1064 | \f |
1065 | /* Costs. */ | |
1066 | ||
1067 | /* An insn is define to cost 4 "units", and we work from there. | |
1068 | COSTS_N_INSNS (N) is defined as (N) * 4 - 2 so that seems reasonable. | |
1069 | Some values are supposed to be defined relative to each other and thus | |
1070 | aren't necessarily related to COSTS_N_INSNS. */ | |
1071 | ||
1072 | /* Compute the cost of computing a constant rtl expression RTX | |
1073 | whose rtx-code is CODE. The body of this macro is a portion | |
1074 | of a switch statement. If the code is computed here, | |
1075 | return it with a return statement. Otherwise, break from the switch. */ | |
1076 | /* Small integers are as cheap as registers. 4 byte values can be fetched | |
1077 | as immediate constants - let's give that the cost of an extra insn. */ | |
1078 | #define CONST_COSTS(X, CODE, OUTER_CODE) \ | |
1079 | case CONST_INT : \ | |
1080 | if (SMALL_INT (INTVAL (X))) \ | |
1081 | return 0; \ | |
1082 | /* fall through */ \ | |
1083 | case CONST : \ | |
1084 | case LABEL_REF : \ | |
1085 | case SYMBOL_REF : \ | |
1086 | return 4; \ | |
1087 | case CONST_DOUBLE : \ | |
1088 | { \ | |
1089 | rtx high, low; \ | |
1090 | split_double (X, &high, &low); \ | |
1091 | return 4 * (!SMALL_INT (INTVAL (high)) \ | |
1092 | + !SMALL_INT (INTVAL (low))); \ | |
1093 | } | |
1094 | ||
1095 | /* Compute the cost of an address. */ | |
1096 | #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : arc_address_cost (ADDR)) | |
1097 | ||
1098 | /* Compute extra cost of moving data between one register class | |
1099 | and another. */ | |
1100 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) 2 | |
1101 | ||
1102 | /* Compute the cost of moving data between registers and memory. */ | |
1103 | /* Memory is 3 times as expensive as registers. | |
1104 | ??? Is that the right way to look at it? */ | |
cbd5b9a2 | 1105 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) \ |
0143027a JL |
1106 | (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12) |
1107 | ||
1108 | /* The cost of a branch insn. */ | |
1109 | /* ??? What's the right value here? Branches are certainly more | |
1110 | expensive than reg->reg moves. */ | |
1111 | #define BRANCH_COST 2 | |
1112 | ||
1113 | /* Provide the costs of a rtl expression. This is in the body of a | |
1114 | switch on CODE. The purpose for the cost of MULT is to encourage | |
1115 | `synth_mult' to find a synthetic multiply when reasonable. | |
1116 | ||
1117 | If we need more than 12 insns to do a multiply, then go out-of-line, | |
1118 | since the call overhead will be < 10% of the cost of the multiply. */ | |
1119 | #define RTX_COSTS(X, CODE, OUTER_CODE) \ | |
1120 | case ASHIFT : \ | |
1121 | case ASHIFTRT : \ | |
1122 | case LSHIFTRT : \ | |
1123 | if (TARGET_SHIFTER) \ | |
1124 | return COSTS_N_INSNS (1); \ | |
1125 | if (GET_CODE (XEXP ((X), 1)) != CONST_INT) \ | |
1126 | return COSTS_N_INSNS (16); \ | |
1127 | return COSTS_N_INSNS (INTVAL (XEXP ((X), 1))); | |
1128 | ||
1129 | /* Nonzero if access to memory by bytes is slow and undesirable. | |
1130 | For RISC chips, it means that access to memory by bytes is no | |
1131 | better than access by words when possible, so grab a whole word | |
1132 | and maybe make use of that. */ | |
1133 | #define SLOW_BYTE_ACCESS 1 | |
1134 | ||
1135 | /* Define this macro if it is as good or better to call a constant | |
1136 | function address than to call an address kept in a register. */ | |
1137 | /* On the ARC, calling through registers is slow. */ | |
1138 | #define NO_FUNCTION_CSE | |
1139 | ||
1140 | /* Define this macro if it is as good or better for a function to call | |
1141 | itself with an explicit address than to call an address kept in a | |
1142 | register. */ | |
1143 | /* On the ARC, calling through registers is slow. */ | |
1144 | #define NO_RECURSIVE_FUNCTION_CSE | |
1145 | \f | |
1146 | /* Section selection. */ | |
1147 | /* WARNING: These section names also appear in dwarfout.c. */ | |
1148 | ||
1149 | /* The names of the text, data, and readonly-data sections are runtime | |
1150 | selectable. */ | |
1151 | ||
1152 | #define ARC_SECTION_FORMAT "\t.section %s" | |
1153 | #define ARC_DEFAULT_TEXT_SECTION ".text" | |
1154 | #define ARC_DEFAULT_DATA_SECTION ".data" | |
1155 | #define ARC_DEFAULT_RODATA_SECTION ".rodata" | |
1156 | ||
2b046bda | 1157 | extern const char *arc_text_section, *arc_data_section, *arc_rodata_section; |
0143027a JL |
1158 | |
1159 | /* initfini.c uses this in an asm. */ | |
1160 | #if defined (CRT_INIT) || defined (CRT_FINI) | |
1161 | #define TEXT_SECTION_ASM_OP "\t.section .text" | |
1162 | #else | |
1163 | #define TEXT_SECTION_ASM_OP arc_text_section /*"\t.section .text"*/ | |
1164 | #endif | |
1165 | #define DATA_SECTION_ASM_OP arc_data_section /*"\t.section .data"*/ | |
1166 | ||
1167 | #undef CONST_SECTION_ASM_OP | |
1168 | #define CONST_SECTION_ASM_OP arc_rodata_section /*"\t.section .rodata"*/ | |
1169 | ||
1170 | #define BSS_SECTION_ASM_OP "\t.section .bss" | |
1171 | ||
1172 | /* Define this macro if jump tables (for tablejump insns) should be | |
1173 | output in the text section, along with the assembler instructions. | |
1174 | Otherwise, the readonly data section is used. | |
1175 | This macro is irrelevant if there is no separate readonly data section. */ | |
1176 | /*#define JUMP_TABLES_IN_TEXT_SECTION*/ | |
1177 | ||
1178 | /* Define this macro if references to a symbol must be treated | |
1179 | differently depending on something about the variable or | |
1180 | function named by the symbol (such as what section it is in). | |
1181 | ||
1182 | The macro definition, if any, is executed immediately after the | |
1183 | rtl for DECL or other node is created. | |
1184 | The value of the rtl will be a `mem' whose address is a | |
1185 | `symbol_ref'. | |
1186 | ||
1187 | The usual thing for this macro to do is to store a flag in the | |
1188 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
1189 | name string in the `symbol_ref' (if one bit is not enough | |
1190 | information). */ | |
1191 | ||
1192 | /* On the ARC, function addresses are not the same as normal addresses. | |
1193 | Branch to absolute address insns take an address that is right-shifted | |
1194 | by 2. We encode the fact that we have a function here, and then emit a | |
1195 | special assembler op when outputting the address. */ | |
1196 | #define ENCODE_SECTION_INFO(DECL) \ | |
1197 | do { \ | |
1198 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
1199 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ | |
1200 | } while (0) | |
1201 | ||
1202 | /* Decode SYM_NAME and store the real name part in VAR, sans | |
1203 | the characters that encode section info. Define this macro if | |
1204 | ENCODE_SECTION_INFO alters the symbol's name string. */ | |
1205 | /*#define STRIP_NAME_ENCODING(VAR, SYM_NAME)*/ | |
1206 | ||
1207 | /* For DWARF. Marginally different than default so output is "prettier" | |
1208 | (and consistent with above). */ | |
8202cda0 | 1209 | #define PUSHSECTION_ASM_OP "\t.section " |
0143027a JL |
1210 | |
1211 | /* Tell crtstuff.c we're using ELF. */ | |
1212 | #define OBJECT_FORMAT_ELF | |
1213 | \f | |
1214 | /* PIC */ | |
1215 | ||
1216 | /* The register number of the register used to address a table of static | |
1217 | data addresses in memory. In some cases this register is defined by a | |
1218 | processor's ``application binary interface'' (ABI). When this macro | |
1219 | is defined, RTL is generated for this register once, as with the stack | |
1220 | pointer and frame pointer registers. If this macro is not defined, it | |
1221 | is up to the machine-dependent files to allocate such a register (if | |
1222 | necessary). */ | |
1223 | #define PIC_OFFSET_TABLE_REGNUM 26 | |
1224 | ||
1225 | /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is | |
1226 | clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM | |
1227 | is not defined. */ | |
1228 | /* This register is call-saved on the ARC. */ | |
1229 | /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/ | |
1230 | ||
1231 | /* By generating position-independent code, when two different programs (A | |
1232 | and B) share a common library (libC.a), the text of the library can be | |
1233 | shared whether or not the library is linked at the same address for both | |
1234 | programs. In some of these environments, position-independent code | |
1235 | requires not only the use of different addressing modes, but also | |
1236 | special code to enable the use of these addressing modes. | |
1237 | ||
1238 | The FINALIZE_PIC macro serves as a hook to emit these special | |
1239 | codes once the function is being compiled into assembly code, but not | |
1240 | before. (It is not done before, because in the case of compiling an | |
1241 | inline function, it would lead to multiple PIC prologues being | |
1242 | included in functions which used inline functions and were compiled to | |
1243 | assembly language.) */ | |
1244 | ||
0143027a JL |
1245 | #define FINALIZE_PIC arc_finalize_pic () |
1246 | ||
1247 | /* A C expression that is nonzero if X is a legitimate immediate | |
1248 | operand on the target machine when generating position independent code. | |
1249 | You can assume that X satisfies CONSTANT_P, so you need not | |
1250 | check this. You can also assume `flag_pic' is true, so you need not | |
1251 | check it either. You need not define this macro if all constants | |
1252 | (including SYMBOL_REF) can be immediate operands when generating | |
1253 | position independent code. */ | |
1254 | /*#define LEGITIMATE_PIC_OPERAND_P(X)*/ | |
1255 | \f | |
1256 | /* Control the assembler format that we output. */ | |
1257 | ||
1258 | /* Output at beginning of assembler file. */ | |
0143027a JL |
1259 | #undef ASM_FILE_START |
1260 | #define ASM_FILE_START(FILE) arc_asm_file_start (FILE) | |
1261 | ||
1262 | /* A C statement to output assembler commands which will identify the | |
1263 | object file as having been compiled with GNU CC (or another GNU | |
1264 | compiler). */ | |
1265 | #undef ASM_IDENTIFY_GCC | |
1266 | #define ASM_IDENTIFY_GCC(FILE) /* nothing */ | |
1267 | ||
1268 | /* Needed because we define ASM_IDENTIFY_GCC. */ | |
1269 | #define ASM_IDENTIFY_LANGUAGE(FILE) output_lang_identify (FILE) | |
1270 | ||
1271 | /* A C string constant describing how to begin a comment in the target | |
1272 | assembler language. The compiler assumes that the comment will | |
1273 | end at the end of the line. */ | |
1274 | #define ASM_COMMENT_START ";" | |
1275 | ||
1276 | /* Output to assembler file text saying following lines | |
1277 | may contain character constants, extra white space, comments, etc. */ | |
1278 | #define ASM_APP_ON "" | |
1279 | ||
1280 | /* Output to assembler file text saying following lines | |
1281 | no longer contain unusual constructs. */ | |
1282 | #define ASM_APP_OFF "" | |
1283 | ||
1284 | /* This is how to output an assembler line defining a `char' constant. */ | |
1285 | #define ASM_OUTPUT_CHAR(FILE, VALUE) \ | |
1286 | ( fprintf (FILE, "\t.byte\t"), \ | |
1287 | output_addr_const (FILE, (VALUE)), \ | |
1288 | fprintf (FILE, "\n")) | |
1289 | ||
1290 | /* This is how to output an assembler line defining a `short' constant. */ | |
1291 | #define ASM_OUTPUT_SHORT(FILE, VALUE) \ | |
1292 | ( fprintf (FILE, "\t.hword\t"), \ | |
1293 | output_addr_const (FILE, (VALUE)), \ | |
1294 | fprintf (FILE, "\n")) | |
1295 | ||
1296 | /* This is how to output an assembler line defining an `int' constant. | |
1297 | We also handle symbol output here. Code addresses must be right shifted | |
1298 | by 2 because that's how the jump instruction wants them. */ | |
1299 | #define ASM_OUTPUT_INT(FILE, VALUE) \ | |
1300 | do { \ | |
1301 | fprintf (FILE, "\t.word\t"); \ | |
1302 | if ((GET_CODE (VALUE) == SYMBOL_REF && SYMBOL_REF_FLAG (VALUE)) \ | |
1303 | || GET_CODE (VALUE) == LABEL_REF) \ | |
1304 | { \ | |
1305 | fprintf (FILE, "%%st("); \ | |
1306 | output_addr_const (FILE, (VALUE)); \ | |
1307 | fprintf (FILE, ")"); \ | |
1308 | } \ | |
1309 | else \ | |
1310 | output_addr_const (FILE, (VALUE)); \ | |
1311 | fprintf (FILE, "\n"); \ | |
1312 | } while (0) | |
1313 | ||
1314 | /* This is how to output an assembler line defining a `float' constant. */ | |
1315 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ | |
1316 | { \ | |
1317 | long t; \ | |
1318 | char str[30]; \ | |
1319 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
1320 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
1321 | fprintf (FILE, "\t.word\t0x%lx %s %s\n", \ | |
1322 | t, ASM_COMMENT_START, str); \ | |
1323 | } | |
1324 | ||
1325 | /* This is how to output an assembler line defining a `double' constant. */ | |
1326 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ | |
1327 | { \ | |
1328 | long t[2]; \ | |
1329 | char str[30]; \ | |
1330 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
1331 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
1332 | fprintf (FILE, "\t.word\t0x%lx %s %s\n\t.word\t0x%lx\n", \ | |
1333 | t[0], ASM_COMMENT_START, str, t[1]); \ | |
1334 | } | |
1335 | ||
1336 | /* This is how to output an assembler line for a numeric constant byte. */ | |
8c13c7b3 | 1337 | #define ASM_BYTE_OP "\t.byte\t" |
0143027a | 1338 | #define ASM_OUTPUT_BYTE(FILE, VALUE) \ |
8202cda0 | 1339 | fprintf (FILE, "%s0x%x\n", ASM_BYTE_OP, (VALUE)) |
0143027a JL |
1340 | |
1341 | /* The assembler's parentheses characters. */ | |
1342 | #define ASM_OPEN_PAREN "(" | |
1343 | #define ASM_CLOSE_PAREN ")" | |
1344 | ||
1345 | /* This is how to output the definition of a user-level label named NAME, | |
1346 | such as the label on a static function or variable NAME. */ | |
1347 | #define ASM_OUTPUT_LABEL(FILE, NAME) \ | |
1348 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1349 | ||
1350 | /* This is how to output a command to make the user-level label named NAME | |
1351 | defined for reference from other files. */ | |
1352 | #define ASM_GLOBALIZE_LABEL(FILE, NAME) \ | |
1353 | do { \ | |
1354 | fputs ("\t.global\t", FILE); \ | |
1355 | assemble_name (FILE, NAME); \ | |
1356 | fputs ("\n", FILE); \ | |
1357 | } while (0) | |
1358 | ||
1359 | /* A C statement (sans semicolon) to output on FILE an assembler pseudo-op to | |
1360 | declare a library function name external. The name of the library function | |
1361 | is given by SYMREF, which has type RTX and is a SYMBOL_REF. */ | |
1362 | #if 0 | |
1363 | /* On the ARC we want to have libgcc's for multiple cpus in one binary. | |
1364 | We can't use `assemble_name' here as that will call ASM_OUTPUT_LABELREF | |
1365 | and we'll get another suffix added on if -mmangle-cpu. */ | |
2b046bda | 1366 | extern const char *arc_mangle_cpu; |
0143027a JL |
1367 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, SYMREF) \ |
1368 | do { \ | |
1369 | if (TARGET_MANGLE_CPU_LIBGCC) \ | |
1370 | { \ | |
1371 | fprintf (FILE, "\t.rename\t_%s, _%s%s\n", \ | |
1372 | XSTR (SYMREF, 0), XSTR (SYMREF, 0), \ | |
1373 | arc_mangle_suffix); \ | |
1374 | } \ | |
1375 | } while (0) | |
1376 | #endif | |
1377 | ||
1378 | /* This is how to output a reference to a user-level label named NAME. | |
1379 | `assemble_name' uses this. */ | |
1380 | /* We mangle all user labels to provide protection from linking code | |
1381 | compiled for different cpus. */ | |
1382 | /* We work around a dwarfout.c deficiency by watching for labels from it and | |
1383 | not adding the '_' prefix nor the cpu suffix. There is a comment in | |
1384 | dwarfout.c that says it should be using ASM_OUTPUT_INTERNAL_LABEL. */ | |
2b046bda | 1385 | extern const char *arc_mangle_cpu; |
0143027a JL |
1386 | #define ASM_OUTPUT_LABELREF(FILE, NAME) \ |
1387 | do { \ | |
1388 | if ((NAME)[0] == '.' && (NAME)[1] == 'L') \ | |
1389 | fprintf (FILE, "%s", NAME); \ | |
1390 | else \ | |
1391 | { \ | |
1392 | fputc ('_', FILE); \ | |
1393 | if (TARGET_MANGLE_CPU && arc_mangle_cpu != NULL) \ | |
1394 | fprintf (FILE, "%s_", arc_mangle_cpu); \ | |
1395 | fprintf (FILE, "%s", NAME); \ | |
1396 | } \ | |
1397 | } while (0) | |
1398 | ||
1399 | /* This is how to output a definition of an internal numbered label where | |
1400 | PREFIX is the class of label and NUM is the number within the class. */ | |
1401 | #undef ASM_OUTPUT_INTERNAL_LABEL | |
1402 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ | |
1403 | do { \ | |
1404 | arc_ccfsm_at_label (PREFIX, NUM); \ | |
1405 | fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \ | |
1406 | } while (0) | |
1407 | ||
1408 | /* Store in OUTPUT a string (made with alloca) containing | |
1409 | an assembler-name for a local static variable named NAME. | |
1410 | LABELNO is an integer which is different for each call. */ | |
1411 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1412 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1413 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1414 | ||
1415 | /* Assembler pseudo-op to equate one value with another. */ | |
1416 | /* ??? This is needed because dwarfout.c provides a default definition too | |
1417 | late for defaults.h (which contains the default definition of ASM_OUTPUT_DEF | |
1418 | that we use). */ | |
8c13c7b3 | 1419 | #define SET_ASM_OP "\t.set\t" |
0143027a JL |
1420 | |
1421 | /* A C statement (sans semicolon) to output an element in the table of | |
1422 | global constructors. */ | |
1423 | #undef ASM_OUTPUT_CONSTRUCTOR | |
1424 | #define ASM_OUTPUT_CONSTRUCTOR(FILE, NAME) \ | |
1425 | do { \ | |
1426 | ctors_section (); \ | |
1427 | fprintf (FILE, "\t.word\t%%st("); \ | |
1428 | assemble_name (FILE, NAME); \ | |
1429 | fprintf (FILE, ")\n"); \ | |
1430 | } while (0) | |
1431 | ||
1432 | /* A C statement (sans semicolon) to output an element in the table of | |
1433 | global destructors. */ | |
1434 | #undef ASM_OUTPUT_DESTRUCTOR | |
1435 | #define ASM_OUTPUT_DESTRUCTOR(FILE, NAME) \ | |
1436 | do { \ | |
1437 | dtors_section (); \ | |
1438 | fprintf (FILE, "\t.word\t%%st("); \ | |
1439 | assemble_name (FILE, NAME); \ | |
1440 | fprintf (FILE, ")\n"); \ | |
1441 | } while (0) | |
1442 | ||
1443 | /* How to refer to registers in assembler output. | |
1444 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1445 | #define REGISTER_NAMES \ | |
1446 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
1447 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
1448 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
1449 | "r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \ | |
1450 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \ | |
1451 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \ | |
1452 | "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \ | |
1453 | "r56", "r57", "r58", "r59", "lp_count", "cc"} | |
1454 | ||
1455 | /* Entry to the insn conditionalizer. */ | |
1456 | #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ | |
1457 | arc_final_prescan_insn (INSN, OPVEC, NOPERANDS) | |
1458 | ||
1459 | /* A C expression which evaluates to true if CODE is a valid | |
1460 | punctuation character for use in the `PRINT_OPERAND' macro. */ | |
1461 | extern char arc_punct_chars[]; | |
1462 | #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ | |
1463 | arc_punct_chars[(unsigned char) (CHAR)] | |
1464 | ||
1465 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1466 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1467 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1468 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1469 | arc_print_operand (FILE, X, CODE) | |
1470 | ||
1471 | /* A C compound statement to output to stdio stream STREAM the | |
1472 | assembler syntax for an instruction operand that is a memory | |
1473 | reference whose address is ADDR. ADDR is an RTL expression. | |
1474 | ||
1475 | On some machines, the syntax for a symbolic address depends on | |
1476 | the section that the address refers to. On these machines, | |
1477 | define the macro `ENCODE_SECTION_INFO' to store the information | |
1478 | into the `symbol_ref', and then check for it here. */ | |
1479 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1480 | arc_print_operand_address (FILE, ADDR) | |
1481 | ||
1482 | /* This is how to output an element of a case-vector that is absolute. */ | |
1483 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1484 | do { \ | |
1485 | char label[30]; \ | |
1486 | ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ | |
1487 | fprintf (FILE, "\t.word %%st("); \ | |
1488 | assemble_name (FILE, label); \ | |
1489 | fprintf (FILE, ")\n"); \ | |
1490 | } while (0) | |
1491 | ||
1492 | /* This is how to output an element of a case-vector that is relative. */ | |
33f7f353 | 1493 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
0143027a JL |
1494 | do { \ |
1495 | char label[30]; \ | |
1496 | ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ | |
1497 | fprintf (FILE, "\t.word %%st("); \ | |
1498 | assemble_name (FILE, label); \ | |
1499 | fprintf (FILE, "-"); \ | |
1500 | ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \ | |
1501 | assemble_name (FILE, label); \ | |
1502 | fprintf (FILE, ")\n"); \ | |
1503 | } while (0) | |
1504 | ||
fc470718 R |
1505 | /* The desired alignment for the location counter at the beginning |
1506 | of a loop. */ | |
0143027a JL |
1507 | /* On the ARC, align loops to 32 byte boundaries (cache line size) |
1508 | if -malign-loops. */ | |
fc470718 | 1509 | #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0) |
0143027a JL |
1510 | |
1511 | /* This is how to output an assembler line | |
1512 | that says to advance the location counter | |
1513 | to a multiple of 2**LOG bytes. */ | |
1514 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1515 | do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0) | |
1516 | \f | |
1517 | /* Debugging information. */ | |
1518 | ||
1519 | /* Generate DBX and DWARF debugging information. */ | |
2b046bda | 1520 | #ifndef DBX_DEBUGGING_INFO |
0143027a | 1521 | #define DBX_DEBUGGING_INFO |
2b046bda KG |
1522 | #endif |
1523 | #ifndef DWARF_DEBUGGING_INFO | |
0143027a | 1524 | #define DWARF_DEBUGGING_INFO |
2b046bda | 1525 | #endif |
0143027a JL |
1526 | |
1527 | /* Prefer STABS (for now). */ | |
1528 | #undef PREFERRED_DEBUGGING_TYPE | |
1529 | #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG | |
1530 | ||
1531 | /* How to renumber registers for dbx and gdb. */ | |
1532 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
1533 | ||
1534 | /* Turn off splitting of long stabs. */ | |
1535 | #define DBX_CONTIN_LENGTH 0 | |
1536 | \f | |
1537 | /* Miscellaneous. */ | |
1538 | ||
1539 | /* Specify the machine mode that this machine uses | |
1540 | for the index in the tablejump instruction. */ | |
1541 | #define CASE_VECTOR_MODE Pmode | |
1542 | ||
18543a22 ILT |
1543 | /* Define as C expression which evaluates to nonzero if the tablejump |
1544 | instruction expects the table to contain offsets from the address of the | |
1545 | table. | |
1546 | Do not define this if the table should contain absolute addresses. */ | |
0143027a JL |
1547 | /* It's not clear what PIC will look like or whether we want to use -fpic |
1548 | for the embedded form currently being talked about. For now require -fpic | |
1549 | to get pc relative switch tables. */ | |
18543a22 | 1550 | /*#define CASE_VECTOR_PC_RELATIVE 1 */ |
0143027a JL |
1551 | |
1552 | /* Define if operations between registers always perform the operation | |
1553 | on the full register even if a narrower mode is specified. */ | |
1554 | #define WORD_REGISTER_OPERATIONS | |
1555 | ||
1556 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1557 | will either zero-extend or sign-extend. The value of this macro should | |
1558 | be the code that says which one of the two operations is implicitly | |
1559 | done, NIL if none. */ | |
1560 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
1561 | ||
1562 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1563 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1564 | ||
1565 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1566 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1567 | ||
1568 | /* Max number of bytes we can move from memory to memory | |
1569 | in one reasonably fast instruction. */ | |
1570 | #define MOVE_MAX 4 | |
1571 | ||
1572 | /* Define this to be nonzero if shift instructions ignore all but the low-order | |
1573 | few bits. */ | |
1574 | #define SHIFT_COUNT_TRUNCATED 1 | |
1575 | ||
1576 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1577 | is done just by pretending it is already truncated. */ | |
1578 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1579 | ||
1580 | /* We assume that the store-condition-codes instructions store 0 for false | |
1581 | and some other value for true. This is the value stored for true. */ | |
1582 | #define STORE_FLAG_VALUE 1 | |
1583 | ||
1584 | /* Specify the machine mode that pointers have. | |
1585 | After generation of rtl, the compiler makes no further distinction | |
1586 | between pointers and any other objects of this machine mode. */ | |
1587 | /* ??? The arc doesn't have full 32 bit pointers, but making this PSImode has | |
9ec36da5 | 1588 | its own problems (you have to add extendpsisi2 and trucnsipsi2 but how does |
0143027a JL |
1589 | one do it without getting excess code?). Try to avoid it. */ |
1590 | #define Pmode SImode | |
1591 | ||
1592 | /* A function address in a call instruction. */ | |
1593 | #define FUNCTION_MODE SImode | |
1594 | ||
1595 | /* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS | |
1596 | is a valid machine specific attribute for DECL. | |
1597 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
0143027a JL |
1598 | #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \ |
1599 | arc_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS) | |
1600 | ||
1601 | /* A C expression that returns zero if the attributes on TYPE1 and TYPE2 are | |
1602 | incompatible, one if they are compatible, and two if they are | |
1603 | nearly compatible (which causes a warning to be generated). */ | |
0143027a JL |
1604 | #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \ |
1605 | arc_comp_type_attributes (TYPE1, TYPE2) | |
1606 | ||
1607 | /* Give newly defined TYPE some default attributes. */ | |
0143027a JL |
1608 | #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \ |
1609 | arc_set_default_type_attributes (TYPE) | |
1610 | ||
0143027a JL |
1611 | /* alloca should avoid clobbering the old register save area. */ |
1612 | /* ??? Not defined in tm.texi. */ | |
1613 | #define SETJMP_VIA_SAVE_AREA | |
1614 | \f | |
1615 | /* Define the information needed to generate branch and scc insns. This is | |
1616 | stored from the compare operation. Note that we can't use "rtx" here | |
1617 | since it hasn't been defined! */ | |
1618 | extern struct rtx_def *arc_compare_op0, *arc_compare_op1; | |
1619 | ||
0143027a JL |
1620 | /* ARC function types. */ |
1621 | enum arc_function_type { | |
1622 | ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL, | |
1623 | /* These are interrupt handlers. The name corresponds to the register | |
1624 | name that contains the return address. */ | |
1625 | ARC_FUNCTION_ILINK1, ARC_FUNCTION_ILINK2 | |
1626 | }; | |
1627 | #define ARC_INTERRUPT_P(TYPE) \ | |
1628 | ((TYPE) == ARC_FUNCTION_ILINK1 || (TYPE) == ARC_FUNCTION_ILINK2) | |
1629 | /* Compute the type of a function from its DECL. */ | |
965eb474 RH |
1630 | |
1631 | \f | |
1632 | /* Implement `va_start' for varargs and stdarg. */ | |
1633 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ | |
1634 | arc_va_start (stdarg, valist, nextarg) | |
1635 | ||
1636 | /* Implement `va_arg'. */ | |
1637 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
1638 | arc_va_arg (valist, type) |